Page 1
1
Cover Sheet
Block Diagram
Intel Yonah CPU
Intel 945GT
Intel ICH7M-DH - PCI & DMI & CPU & IRQ
Intel ICH7M-DH - LPC & ATA & USB & GPIO & POWER
LPC I/O - W83627EHG
Azalia ALC880 17
LAN -- INTEL 82573E
SATA2 - SIL 3132
DDR2 System Memory 1 & 2
DDR Termination Resistors
1
2
3-5
6-11
12
13-14
15 Clock -ICS954129 & FWH
16
18
19
20
21
MS-9631
CPU:
Intel Yonah/Merom Processor
System Chipset:
Intel 945 GT - GMCH (North Bridge)
Intel ICH7M-DH (South Bridge)
On Board Chipset:
Clock Generator - ICS954129
LAN -- INTEL 82573E
LPC Super I/O -- W83627EHG
Version 1.0
01/18/2006
Azalia ALC880
A A
TPM 22
PCI Slot / PCI EXPRESS X16 Slot
USB Connectors
23-24
25
VIA-6307 IEEE1394 Controller
SIL-3132 SATA2 Controller
BIOS -- FWH EEPROM
TPM -- Infineon SLD9635
26 23 ATX , VGA Connetcors & Front Panel
CH7307 & DVI CONNECTOR
MS-7 ACPI Controller & MS-6 Plus
27
28
Main Memory:
DDR 2 * 2 (Max 4GB)
FAN, SATA & IDE CONNECTORS
IEEE 1394 CONTROLLER
CPU Power
GPIO & JUMPER SETTTING
MANUAL PAR T S
Power MAP
CLOCK MAP
POWER SEQUENCE/SMBUS MAP 36
29
30
31
32
33
34
35
Expansion Slots:
PCI EXPRESS X16 SLOT
Mini PCI type III *1
PCI2.3 SLOT * 1
V-core PWM:
IMVP-6 Controller: ISL6262
System power PWM:
MS-7 & MS-6 +
1
Title
Size Document Number Rev
Custom
Date: Sheet
MICRO-STAR INt'L CO. , LTD.
Cover Sheet
MS-9631
of
13 7 Monday, February 13, 2006
1.0
Page 2
IMVP-6
ISL 6262
Intel Yonah Processor
PCI EXPRESS X 16
533/667MHz
Block Diagram
FSB
CH7307
DVI-I
IDE Primary
SATA 3~4
USB Port 0~7
Azalia
ALC880
SDVO
CRT
UltraDMA
33/66/100
SATA
USB
AC97
300 MB/s
945GT
Calistoga
DMI
2GB/s
ICH7M-DH
TPM
2 DDR II
64bit DDR
400/533/667MHz
DIMM
Modules
Type III
Mini-PCI
PCI Slot x 1
PCI bus PCI BUS
IEEE-1394
VT6307
PCI-E x1
PCI-E x1
LPC Bus
33MHz@16.5MB/s
SATA 2
SIL 3132
SATA II
300 MB/s
LAN Intel
82573E
SATA II 1~2
LPC SIO
Winbond
83627EHG
Flash
Title
Size Document Number Rev
Custom
Date: Sheet
MICRO-STAR INt'L CO. , LTD.
Block Diagram
MS-9631
23 7 Monday, February 13, 2006
of
1.0
Page 3
5
4
3
2
1
HREQ#[0..4]
HREQ#[0..4] 6
HA#[3..31] 6
HASTB#[0..1] 6
RS#[0..2] 6
D D
HA#3
HA#4
HA#5
HA#6
HA#7
HA#8
HA#9
HA#10
HA#11
HA#12
HA#13
HA#14
HA#15
HA#16
HASTB#0
HREQ#0
HREQ#1
HREQ#2
HREQ#3
HREQ#4
HA#17
HA#18
HA#19
HA#20
C C
H_A20M# 12
H_FERR# 12
H_IGNNE# 12
H_STPCLK# 12
H_INTR 12
H_NMI 12
ICH_H_SMI# 12
B B
TP7
HA#21
HA#22
HA#23
HA#24
HA#25
HA#26
HA#27
HA#28
HA#29
HA#30
HA#31
HASTB#1
IN
OUT
IN
H_STPCLK#
IN
IN
IN
IN
V_FSB_VTT
V_FSB_VTT
V_FSB_VTT
V_FSB_VTT
BI
HA#[3..31]
BI
HASTB#[0..1]
BI
RS#[0..2]
IN
U9A
J4
A[3]#
L4
A[4]#
M3
A[5]#
K5
M1
N2
J1
N3
P5
P2
L1
P4
P1
R1
L2
K3
H2
K2
J3
L5
Y2
U5
R3
W6
U4
Y5
U2
R4
T5
T3
W3
W5
Y4
W2
Y1
V4
A6
A5
C4
D5
C6
B4
A3
AA1
AA4
AB2
AA3
M4
N5
T2
V3
B2
C3
B25
A[6]#
A[7]#
A[8]#
A[9]#
A[10]#
A[11]#
A[12]#
A[13]#
A[14]#
A[15]#
A[16]#
ADSTB[0]#
REQ[0]#
REQ[1]#
REQ[2]#
REQ[3]#
REQ[4]#
A[17]#
A[18]#
A[19]#
A[20]#
A[21]#
A[22]#
A[23]#
A[24]#
A[25]#
A[26]#
A[27]#
A[28]#
A[29]#
A[30]#
A[31]#
ADSTB[1]#
A20M#
FERR#
IGNNE#
STPCLK#
LINT0
LINT1
SMI#
RSVD[01]
RSVD[02]
RSVD[03]
RSVD[04]
RSVD[05]
RSVD[06]
RSVD[07]
RSVD[08]
RSVD[09]
RSVD[10]
RSVD[11]
Yonah_Skt_0
ADDR GROUP 0 ADDR GROUP 1
RESERVED
PLACE AT CPU END OF ROUTE
R218 X_56_0402
R150 56R_0402
R235 X_54.9R1%0402
DEFER#
CONTROL
RESET#
BPM[0]#
BPM[1]#
BPM[2]#
BPM[3]#
XDP/ITP SIGNALS
PROCHOT#
THERMDA
THERMDC
THERMTRIP#
THERM
BCLK[0]
BCLK[1]
H
CLK
RSVD[12]
RSVD[13]
RSVD[14]
RSVD[15]
RSVD[16]
RSVD[17]
RSVD[18]
RSVD[19]
RSVD[20]
ADS#
BNR#
BPRI#
DRDY#
DBSY#
BR0#
IERR#
INIT#
LOCK#
RS[0]#
RS[1]#
RS[2]#
TRDY#
HIT#
HITM#
PRDY#
PREQ#
TCK
TDI
TDO
TMS
TRST#
DBR#
H_CPURST#
H_PROCHOT#
H1
E2
G5
H5
F21
E1
F1
D20
B3
H4
B1
F3
F4
G3
G2
G6
E4
AD4
AD3
AD1
AC4
AC2
AC1
AC5
AA6
AB3
AB5
AB6
C20
D21
A24
A25
C7
A22
A21
T22
D2
F6
D3
C1
AF1
D22
C23
C24
H_PWRGD
H_ADS#
H_BNR#
H_BPRI#
H_DEFER#
H_DRDY#
H_DBSY#
H_BR#0
H_IERR#
H_INIT#
H_LOCK#
RS#0
RS#1
RS#2
H_TRDY#
H_HIT#
H_HITM#
H_BPM#0
H_BPM#1
H_BPM#2
H_BPM#3
H_BPM#4
H_BPM#5
H_PROCHOT#
TRMTRIP#
CK_H_CPU
CK_H_CPU#
BI
BI
IN
IN
BI
BI
BI
IN
BI
IN
IN
BI
BI
H_TCK
H_TDI
H_TDO
H_TMS
H_TRST#
BI
CPU_TMPA 16
BI
THERMDC 16
OUT
TRMTRIP# 7,12
IN
CK_H_CPU 15
IN
CK_H_CPU# 15
Yonah 478pin socket
(keyed)
H_ADS# 6
H_BNR# 6
H_BPRI# 6
H_DEFER# 6
H_DRDY# 6
H_DBSY# 6
H_BR#0 6
H_INIT# 12
H_LOCK# 6
H_CPURST# 6
H_TRDY# 6
H_HIT# 6
H_HITM# 6
TP17
TP19
TP24
TP16
TP23
TP18
TP9
TP8
V_FSB_VTT
R154 56_0402
R211 54.9R1%0402
H_TMS
H_TDI
H_TCK
H_TRST#
H_IERR#
H_BPM#5
R205 54.9R1%0402
R238 54.9R1%0402
R214 54.9R1%0402
R220 54.9R1%0402
V_FSB_VTT
C137
0.1u_0603
R134
2K_1%_0603
V_FSB_VTT
HD#0
HD#1
HD#2
HD#3
HD#4
HD#5
HD#6
HD#7
HD#8
V_FSB_VTT
R135
1K_1%_0603
Don't need CAP. (Design Guide P.90)
CPU_GTLREF
0.5" max
length
BSEL0 7,15
BSEL1 7,15
BSEL2 7,15
C139
4.7U10V_0805
HD#9
HD#11
HD#12 HD#44
HD#13
HD#14
HD#15
HDSTBN#0
HDSTBP#0
DBI#0 DBI#2
HD#16
HD#17
HD#18
HD#19
HD#20
HD#21
HD#22
HD#23
HD#24
HD#25
HD#26
HD#27
HD#28
HD#29
HD#30
HD#31
HDSTBN#1
HDSTBP#1
DBI#1
1K_0603
R132
R131 51R
OUT
OUT
OUT
HD#[0..63] 6
HDSTBP#[0..3] 6
HDSTBN#[0..3] 6
DBI#[0..3] 6
E22
F24
E26
H22
F23
G25
E25
E23
K24
G24
J24
J23
H26
F26
K22
H25
H23
G22
J26
N22
K25
P26
R23
L25
L22
L23
M23
P25
P22
P23
T24
R24
L26
T25
N24
M24
N25
M26
AD26
C26
D25
B22
B23
C21
BI
BI
BI
BI
U9B
D[0]#
D[1]#
D[2]#
D[3]#
D[4]#
D[5]#
D[6]#
D[7]#
D[8]#
D[9]#
D[10]#
D[11]#
D[12]#
D[13]#
D[14]#
D[15]#
DSTBN[0]#
DSTBP[0]#
DINV[0]#
D[16]#
D[17]#
D[18]#
D[19]#
D[20]#
D[21]#
D[22]#
D[23]#
D[24]#
D[25]#
D[26]#
D[27]#
D[28]#
D[29]#
D[30]#
D[31]#
DSTBN[1]#
DSTBP[1]#
DINV[1]#
GTLREF
TEST1
TEST2
BSEL[0]
BSEL[1]
BSEL[2]
Yonah_Skt_0
HD#[0..63]
HDSTBP#[0..3]
HDSTBN#[0..3]
DBI#[0..3]
DATA GRP0 DATA GRP1
MISC
D[32]#
D[33]#
D[34]#
D[35]#
D[36]#
D[37]#
D[38]#
D[39]#
D[40]#
D[41]#
D[42]#
D[43]#
D[44]#
D[45]#
DATA GRP2 DATA GRP3
D[46]#
D[47]#
DSTBN[2]#
DSTBP[2]#
DINV[2]#
D[48]#
D[49]#
D[50]#
D[51]#
D[52]#
D[53]#
D[54]#
D[55]#
D[56]#
D[57]#
D[58]#
D[59]#
D[60]#
D[61]#
D[62]#
D[63]#
DSTBN[3]#
DSTBP[3]#
DINV[3]#
COMP[0]
COMP[1]
COMP[2]
COMP[3]
DPRSTP#
DPSLP#
DPWR#
PWRGOOD
SLP#
PSI#
AA23
AB24
V24
V26
W25
U23
U25
U22
AB25
W22
Y23
AA26
Y26
Y22
AC26
AA24
W24
Y25
V23
AC22
AC23
AB22
AA21
AB21
AC25
AD20
AE22
AF23
AD24
AE21
AD21
AE25
AF25
AF22
AF26
AD23
AE24
AC20
R26
U26
U1
V1
E5
B5
D24
D6
D7
AE6
HD#32
HD#33
HD#34
HD#35
HD#36
HD#37
HD#38
HD#39
HD#40
HD#41
HD#42 HD#10
HD#43
HD#45
HD#46
HD#47
HDSTBN#2
HDSTBP#2
HD#48
HD#49
HD#50
HD#51
HD#52
HD#53
HD#54
HD#55
HD#56
HD#57
HD#58
HD#59
HD#60
HD#61
HD#62
HD#63
HDSTBN#3
HDSTBP#3
DBI#3
HCOMP0
HCOMP1
HCOMP2
HCOMP3
H_DPRSTP#
H_DPSLP#
H_DPWR#
H_PWRGD
H_SLP#
0.5" max length
25 MIL AWAY FROM HIGH
SPEED SIGNAL
HCOMP0,2==>18MIL(27.4ohm)
HCOMP1,3==>5MIL(55ohm)
R133 27.4_1%_0603
R136 54.9_1%_0402
R236 27.4_1%_0603
R237 54.9_1%_0402
IN
H_DPRSTP# 12,31
IN
H_DPSLP# 12
IN
H_DPWR# 6
IN
H_PWRGD 12
IN
H_SLP# 6
OUT
PSI# 31
BSEL[2] BSEL[1] BSEL[0] BC LK
LLL
LL
A A
L
L
5
H
HH
RESERVED
H
133MHZ
L
RESERVED
166MHZ
Title
Size Document Number Rev
Custom
4
3
2
Date: Sheet
MICRO-STAR INt'L CO. , LTD.
Yonah - Host bus
MS-9631
1
1.0
of
33 7 Monday, February 13, 2006
Page 4
5
U9D
A4
VSS1
A8
VSS2
A11
VSS3
A14
VSS4
A16
VSS5
A19
VSS6
A23
VSS7
A26
VSS8
B6
VSS9
D D
C C
B B
B11
B13
B16
B19
B21
B24
C11
C14
C16
C19
C22
C25
D11
D13
D16
D19
D23
D26
E11
E14
E16
E19
E21
E24
F11
F13
F16
F19
F22
F25
G23
G26
H21
H24
J22
J25
K23
K26
L21
L24
M22
M25
N23
N26
B8
C5
C8
C2
D1
D4
D8
E3
E6
E8
F5
F8
F2
G4
G1
H3
H6
J2
J5
K1
K4
L3
L6
M2
M5
N1
N4
P3
VSS10
VSS11
VSS12
VSS13
VSS14
VSS15
VSS16
VSS17
VSS18
VSS19
VSS20
VSS21
VSS22
VSS23
VSS24
VSS25
VSS26
VSS27
VSS28
VSS29
VSS30
VSS31
VSS32
VSS33
VSS34
VSS35
VSS36
VSS37
VSS38
VSS39
VSS40
VSS41
VSS42
VSS43
VSS44
VSS45
VSS46
VSS47
VSS48
VSS49
VSS50
VSS51
VSS52
VSS53
VSS54
VSS55
VSS56
VSS57
VSS58
VSS59
VSS60
VSS61
VSS62
VSS63
VSS64
VSS65
VSS66
VSS67
VSS68
VSS69
VSS70
VSS71
VSS72
VSS73
VSS74
VSS75
VSS76
VSS77
VSS78
VSS79
VSS80
VSS81
Yonah_Skt_0
GND
VSS82
VSS83
VSS84
VSS85
VSS86
VSS87
VSS88
VSS89
VSS90
VSS91
VSS92
VSS93
VSS94
VSS95
VSS96
VSS97
VSS98
VSS99
VSS100
VSS101
VSS102
VSS103
VSS104
VSS105
VSS106
VSS107
VSS108
VSS109
VSS110
VSS111
VSS112
VSS113
VSS114
VSS115
VSS116
VSS117
VSS118
VSS119
VSS120
VSS121
VSS122
VSS123
VSS124
VSS125
VSS126
VSS127
VSS128
VSS129
VSS130
VSS131
VSS132
VSS133
VSS134
VSS135
VSS136
VSS137
VSS138
VSS139
VSS140
VSS141
VSS142
VSS143
VSS144
VSS145
VSS146
VSS147
VSS148
VSS149
VSS150
VSS151
VSS152
VSS153
VSS154
VSS155
VSS156
VSS157
VSS158
VSS159
VSS160
VSS161
VSS162
P6
P21
P24
R2
R5
R22
R25
T1
T4
T23
T26
U3
U6
U21
U24
V2
V5
V22
V25
W1
W4
W23
W26
Y3
Y6
Y21
Y24
AA2
AA5
AA8
AA11
AA14
AA16
AA19
AA22
AA25
AB1
AB4
AB8
AB11
AB13
AB16
AB19
AB23
AB26
AC3
AC6
AC8
AC11
AC14
AC16
AC19
AC21
AC24
AD2
AD5
AD8
AD11
AD13
AD16
AD19
AD22
AD25
AE1
AE4
AE8
AE11
AE14
AE16
AE19
AE23
AE26
AF3
AF6
AF8
AF11
AF13
AF16
AF19
AF21
AF24
VCORE VCORE
AA10
AA12
AA13
AA15
AA17
AA18
AA20
AC10
AB10
AB12
AB14
AB15
AB17
AB18
4
A7
A9
A10
A12
A13
A15
A17
A18
A20
B7
B9
B10
B12
B14
B15
B17
B18
B20
C9
C10
C12
C13
C15
C17
C18
D9
D10
D12
D14
D15
D17
D18
E7
E9
E10
E12
E13
E15
E17
E18
E20
F7
F9
F10
F12
F14
F15
F17
F18
F20
AA7
AA9
AB9
U9C
VCC[1]
VCC[2]
VCC[3]
VCC[4]
VCC[5]
VCC[6]
VCC[7]
VCC[8]
VCC[9]
VCC[10]
VCC[11]
VCC[12]
VCC[13]
VCC[14]
VCC[15]
VCC[16]
VCC[17]
VCC[18]
VCC[19]
VCC[20]
VCC[21]
VCC[22]
VCC[23]
VCC[24]
VCC[25]
VCC[26]
VCC[27]
VCC[28]
VCC[29]
VCC[30]
VCC[31]
VCC[32]
VCC[33]
VCC[34]
VCC[35]
VCC[36]
VCC[37]
VCC[38]
VCC[39]
VCC[40]
VCC[41]
VCC[42]
VCC[43]
VCC[44]
VCC[45]
VCC[46]
VCC[47]
VCC[48]
VCC[49]
VCC[50]
VCC[51]
VCC[52]
VCC[53]
VCC[54]
VCC[55]
VCC[56]
VCC[57]
VCC[58]
VCC[59]
VCC[60]
VCC[61]
VCC[62]
VCC[63]
VCC[64]
VCC[65]
VCC[66]
VCC[67]
Yonah_Skt_0
VCC[68]
VCC[69]
VCC[70]
VCC[71]
VCC[72]
VCC[73]
VCC[74]
VCC[75]
VCC[76]
VCC[77]
VCC[78]
VCC[79]
VCC[80]
VCC[81]
VCC[82]
VCC[83]
VCC[84]
VCC[85]
VCC[86]
VCC[87]
VCC[88]
VCC[89]
VCC[90]
VCC[91]
VCC[92]
VCC[93]
VCC[94]
POWER
VCC[95]
VCC[96]
VCC[97]
VCC[98]
VCC[99]
VCC[100]
VCCP[1]
VCCP[2]
VCCP[3]
VCCP[4]
VCCP[5]
VCCP[6]
VCCP[7]
VCCP[8]
VCCP[9]
VCCP[10]
VCCP[11]
VCCP[12]
VCCP[13]
VCCP[14]
VCCP[15]
VCCP[16]
VCCA
VID[0]
VID[1]
VID[2]
VID[3]
VID[4]
VID[5]
VID[6]
VCCSENSE
VSSSENSE
AB20
AB7
AC7
AC9
AC12
AC13
AC15
AC17
AC18
AD7
AD9
AD10
AD12
AD14
AD15
AD17
AD18
AE9
AE10
AE12
AE13
AE15
AE17
AE18
AE20
AF9
AF10
AF12
AF14
AF15
AF17
AF18
AF20
V6
G21
J6
K6
M6
J21
K21
M21
N21
N6
R21
R6
T21
T6
V21
W21
Internal PLL super filter
B26
VID0
AD6
VID1
AF5
VID2
AE5
VID3
AF4
VID4
AE3
VID5
AF2
VID6
AE2
AF7
AE7
V_FSB_VTT
V_1P5_CORE
OUT
3
0.01uf and 10uf near B26
C145 10U10V_0805
VID[0..6] 31
C1460.01U25V_0402
VCORE
R190
100_1%_0402
R192
100_1%_0402
2
U9E
X1
H1
XX1
GND
XX2
GND
HEAT
XX3
GND
SINK
X2
H2
GND
XX5
GND
XX6
GND
XX7
GND
Yonah_Skt_0
OUT
VCCSENSE_2 31
OUT
VSSSENSE_2 31
LAYOUT NOTE:
Route VCCSENSE and VSSSENSE traces at
27.4Ohm(18mil) with 7 mil spacing.
Place PU and PD within 1 inch of CPU.
GND
GND
GND
GND
GND
GND
1
Modify X1,X2,X3,X4 to NC
X3
XX9
XX10
XX11
X4
XX13
XX14
XX15
2005.11.3
H3
H4
A A
Title
Size Document Number Rev
5
4
3
2
Date: Sheet
MICRO-STAR INt'L CO. , LTD.
Yonah - Power / GND
Custom
MS-9631
1.0
of
43 7 Monday, February 13, 2006
1
Page 5
5
4
3
2
1
VCORE
C223
D D
22UF/6.3V_0805
C231
22UF/6.3V_0805
C197
22UF/6.3V_0805
C600
22UF/6.3V_0805-BOT
C214
22UF/6.3V_0805
C606
22UF/6.3V_0805-BOT
C219
22UF/6.3V_0805
C190
22UF/6.3V_0805
C601
22UF/6.3V_0805-BOT
C597
22UF/6.3V_0805-BOT
C193
22UF/6.3V_0805
VCORE
C607
C206
22UF/6.3V_0805
22UF/6.3V_0805-BOT
C182
22UF/6.3V_0805
C218
22UF/6.3V_0805
V_FSB_VTT
C C
C609
C595
C610
0.1u_0603-BOT
0.1u_0603-BOT
C176
C596
0.1u_0402
0.1u_0603-BOT
0.1u_0603-BOT
C604
C605
22UF/6.3V_0805-BOT
22UF/6.3V_0805-BOT
close to cpu socket
C608
C593
0.1u_0603-BOT
0.1u_0603-BOT
C212
C594
22UF/6.3V_0805
0.1u_0603-BOT
C598
C179
C599
22UF/6.3V_0805-BOT
C236
0.1u_0402
22UF/6.3V_0805-BOT
0.1u_0402
C191
22UF/6.3V_0805
C201
+
X_100U/2V
C603
C194
22UF/6.3V_0805
C181
22UF/6.3V_0805
C232
22UF/6.3V_0805
C207
22UF/6.3V_0805
C224
22UF/6.3V_0805
C198
22UF/6.3V_0805
C237
22UF/6.3V_0805
C227
22UF/6.3V_0805
C175
22UF/6.3V_0805
C168
22UF/6.3V_0805
22UF/6.3V_0805-BOT
V_FSB_VTT
C233
C178
C235
C234
0.1u_0402
B B
0.1u_0402
0.1u_0402
C177
0.1u_0402
0.1u_0402
A A
Title
Size Document Number Rev
5
4
3
2
Date: Sheet
MICRO-STAR INt'L CO. , LTD.
Yonah- Decoupling
Custom
MS-9631
1.0
of
53 7 Monday, February 13, 2006
1
Page 6
5
4
3
2
1
HD#[0..63] 3
D D
HYSWING
C238
0.1u_0402
0.5" max
length
V_FSB_VTT
R206
54.9_1%_0402
HYRCOMP
R183
24.9R1%_0402
V_FSB_VTT
R188
54.9_1%_0402
HXSCOMP
HYSCOMP
HXRCOMP
R200
24.9R1%_0402
V_FSB_VTT
C C
100_1%_0402
B B
R208
R187
221_1%_0402
R186
100_1%_0402
R209
221_1%_0402
HXSWING
0.1u_0402
V_FSB_VTT
C254
BI
IN
CK_H_MCH 15
IN
CK_H_MCH# 15
HXRCOMP
HXSCOMP
HXSWING
HYRCOMP
HYSCOMP
HYSWING
CK_H_MCH
CK_H_MCH#
HD#0
HD#1
HD#2
HD#3
HD#4
HD#5
HD#6
HD#7
HD#8
HD#9
HD#10
HD#11
HD#12
HD#13
HD#14
HD#15
HD#16
HD#17
HD#18
HD#19
HD#20
HD#21
HD#22
HD#23
HD#24
HD#25
HD#26
HD#27
HD#28
HD#29
HD#30
HD#31
HD#32
HD#33
HD#34
HD#35
HD#36
HD#37
HD#38
HD#39
HD#40
HD#41
HD#42
HD#43
HD#44
HD#45
HD#46
HD#47
HD#48
HD#49
HD#50
HD#51
HD#52
HD#53
HD#54
HD#55
HD#56
HD#57
HD#58
HD#59
HD#60
HD#61
HD#62
HD#63
AA10
AB11
AC11
AD10
W11
AG2
AG1
K11
T10
U11
T11
W9
W7
W6
AB7
AA9
W4
W3
W5
Y10
AB8
W2
AA4
AA7
AA2
AA6
AA1
AB4
AC9
AB3
AC2
AD1
AD9
AC1
AD7
AC6
AB5
AD4
AC8
W1
F1
J1
H1
J6
H3
K2
G1
G2
K9
K1
K7
J8
H4
J3
G4
T3
U7
U9
T1
T8
T4
U5
T9
T5
Y3
Y7
Y8
E1
E2
E4
Y1
U1
U11A
H_D#_0
H_D#_1
H_D#_2
H_D#_3
H_D#_4
H_D#_5
H_D#_6
H_D#_7
H_D#_8
H_D#_9
H_D#_10
H_D#_11
H_D#_12
H_D#_13
H_D#_14
H_D#_15
H_D#_16
H_D#_17
H_D#_18
H_D#_19
H_D#_20
H_D#_21
H_D#_22
H_D#_23
H_D#_24
H_D#_25
H_D#_26
H_D#_27
H_D#_28
H_D#_29
H_D#_30
H_D#_31
H_D#_32
H_D#_33
H_D#_34
H_D#_35
H_D#_36
H_D#_37
H_D#_38
H_D#_39
H_D#_40
H_D#_41
H_D#_42
H_D#_43
H_D#_44
H_D#_45
H_D#_46
H_D#_47
H_D#_48
H_D#_49
H_D#_50
H_D#_51
H_D#_52
H_D#_53
H_D#_54
H_D#_55
H_D#_56
H_D#_57
H_D#_58
H_D#_59
H_D#_60
H_D#_61
H_D#_62
H_D#_63
H_XRCOMP
H_XSCOMP
H_XSWING
H_YRCOMP
H_YSCOMP
H_YSWING
H_CLKIN
H_CLKIN#
945GT
H9
H_A#_3
C9
H_A#_4
E11
H_A#_5
G11
H_A#_6
F11
H_A#_7
G12
H_A#_8
F9
H_A#_9
H11
H_A#_10
J12
H_A#_11
G14
H_A#_12
D9
H_A#_13
J14
H_A#_14
H13
H_A#_15
J15
H_A#_16
F14
H_A#_17
D12
H_A#_18
A11
H_A#_19
C11
H_A#_20
A12
H_A#_21
A13
H_A#_22
E13
H_A#_23
G13
H_A#_24
F12
H_A#_25
B12
H_A#_26
B14
H_A#_27
C12
H_A#_28
A14
H_A#_29
C14
H_A#_30
D14
H_A#_31
E8
H_ADS#
B9
H_ADSTB#_0
C13
H_ADSTB#_1
J13
H_AVREF
C6
H_BNR#
F6
H_BPRI#
C7
H_BREQ#0
B7
H_CPURST#
A7
H_DBSY#
C3
H_DEFER#
J9
H_DPWR#
H8
H_DRDY#
H_DVREF
H_DINV#0
H_DINV#1
H_DINV#2
H_DINV#3
H_DSTBN#0
H_DSTBN#1
H_DSTBN#2
H_DSTBN#3
H_DSTBP#_0
H_DSTBP#_1
H_DSTBP#_2
H_DSTBP#_3
H_HIT#
H_HITM#
H_LOCK#
H_REQ#_0
H_REQ#_1
H_REQ#_2
H_REQ#_3
H_REQ#_4
H_RS#_0
H_RS#_1
H_RS#_2
H_CPUSLP#
H_TRDY#
K13
J7
W8
U3
AB10
K4
T7
Y5
AC4
K3
T6
AA5
AC5
D3
D4
B3
D8
G8
B8
F8
A8
B4
E6
D6
E3
E7
HOST
HA#3
HA#4
HA#5
HA#6
HA#7
HA#8
HA#9
HA#10
HA#11
HA#12
HA#13
HA#14
HA#15
HA#16
HA#17
HA#18
HA#19
HA#20
HA#21
HA#22
HA#23
HA#24
HA#25
HA#26
HA#27
HA#28
HA#29
HA#30
HA#31
H_ADS#
HASTB#0
HASTB#1
H_BNR#
H_BPRI#
H_BR#0
H_CPURST#
H_DBSY#
H_DEFER#
H_DPWR#
H_DRDY#
DBI#0
DBI#1
DBI#2
DBI#3
HDSTBN#0
HDSTBN#1
HDSTBN#2
HDSTBN#3
HDSTBP#0
HDSTBP#1
HDSTBP#2
HDSTBP#3
H_HIT#
H_HITM#
H_LOCK#
HREQ#0
HREQ#1
HREQ#2
HREQ#3
HREQ#4
RS#0
RS#1
RS#2
HCPUSLP#_GMCH
H_TRDY#
BI
BI
BI
BI
H_BNR# 3
OUT
H_BPRI# 3
BI
H_BR#0 3
OUT
H_CPURST# 3
BI
H_DBSY# 3
OUT
H_DEFER# 3
OUT
H_DPWR# 3
BI
H_DRDY# 3
BI
BI
IN
OUT
R217 0R_0603
HA#[3..31] 3
H_ADS# 3
HASTB#[0..1] 3
BI
BI
HDSTBN#[0..3] 3
BI
HDSTBP#[0..3] 3
H_HIT# 3
H_HITM# 3
H_LOCK# 3
BI
HREQ#[0..4] 3
RS#[0..2] 3
DBI#[0..3] 3
OUT
OUT
C268
0.1u_0402
Place C275 to bottom side.
2006.1.18
H_SLP# 3
H_TRDY# 3
as close as to
GMCH J13 pin
HVREF
C275
0.1u_0603-BOT
V_FSB_VTT
R247
100_1%_0402
R244
200_1%_0402
No MSI PN
A A
Title
Size Document Number Rev
5
4
3
2
Date: Sheet
MICRO-STAR INt'L CO. , LTD.
GMCH1- Host
Custom
MS-9631
1.0
of
63 7 Monday, February 13, 2006
1
Page 7
A
U11B
T32
RSVD_1
R32
RSVD_2
F3
RSVD_3
F7
RSVD_4
AG11
RSVD_5
AF11
RSVD_6
H7
RSVD_7
J19
AH33
AH34
BA41
BA40
BA39
AY41
AW41
AW1
A41
A35
A34
D28
D27
K16
K18
J18
F18
E15
F15
E18
D19
D16
G16
E16
D15
G15
K15
C15
H16
G18
H15
J25
K27
J26
G28
F25
H26
G6
H28
H27
K28
H32
D1
C41
C1
BA3
BA2
BA1
B41
B2
AY1
A40
A4
A39
A3
RSVD_8
RSVD_11
RSVD_12
RSVD_13
RSVD_14
RSVD_15
CFG_0
CFG_1
CFG_2
CFG_3
CFG_4
CFG_5
CFG_6
CFG_7
CFG_8
CFG_9
CFG_10
CFG_11
CFG_12
CFG_13
CFG_14
CFG_15
CFG_16
CFG_17
CFG_18
CFG_19
CFG_20
PM_BMBUSY#
PM_EXTTS#_0
PM_EXTTS#_1
PM_THRMTRIP#
PWROK
RSTIN#
SDVO_CTRLCLK
SDVO_CTRLDATA
ICH_SYNC#
CLK_REQ#
NC0
NC1
NC2
NC3
NC4
NC5
NC6
NC7
NC8
NC9
NC10
NC11
NC12
NC13
NC14
NC15
NC16
NC17
NC18
945GT
4 4
TP27
TP21
TP29
TP22
TP26
OUT
OUT
OUT
IN
IN
MCH_BSEL0
MCH_BSEL1
MCH_BSEL2
CFG3
CFG4
CFG5
CFG6
CFG7
CFG8
CFG9
CFG10
CFG11
CFG12
CFG13
CFG14
CFG15
CFG16
CFG17
CFG18
CFG19
CFG20
BM_BUSY#
PM_EXTTS#0
PM_EXTTS#1
BI
BI
BI
R253 10KR0402
OUT
BSEL0 3,15
R252 10KR0402
OUT
BSEL1 3,15
R251 10KR0402
OUT
BSEL2 3,15
3 3
2 2
TP25
TP28
TP20
TP30
CFG20 23
BM_BUSY# 13
TRMTRIP# 3,12
PWRGD 13,28
DEV_RST# 15,16,22,28
SDVO_CTRL_CLK 23,27
SDVO_CTRL_DATA 23,27
MCH_ICH_SYNC# 12
RSVD CFG
SM_OCDCOMP_0
SM_OCDCOMP_1
DDR MUXING
PM
D_REFSSCLKIN#
D_REFSSCLKIN
MISC
NC
DMI CLK
DPRSLPVR 13,31
SM_CK#_0
SM_CK#_1
SM_CK#_2
SM_CK#_3
SM_CKE_0
SM_CKE_1
SM_CKE_2
SM_CKE_3
SM_CS#_0
SM_CS#_1
SM_CS#_2
SM_CS#_3
SM_ODT_0
SM_ODT_1
SM_ODT_2
SM_ODT_3
SM_RCOMP#
SM_RCOMP
SM_VREF_0
SM_VREF_1
G_CLKIN#
D_REFCLKIN#
D_REFCLKIN
DMI_RXN_0
DMI_RXN_1
DMI_RXN_2
DMI_RXN_3
DMI_RXP_0
DMI_RXP_1
DMI_RXP_2
DMI_RXP_3
DMI_TXN_0
DMI_TXN_1
DMI_TXN_2
DMI_TXN_3
DMI_TXP_0
DMI_TXP_1
DMI_TXP_2
DMI_TXP_3
SM_CK_0
SM_CK_1
SM_CK_2
SM_CK_3
G_CLKIN
B
AY35
P_DDR1_A1
AR1
AW7
P_DDR1_B1
AW40
AW35
N_DDR1_A1
AT1
AY7
N_DDR1_B1
AY40
AU20
AT20
BA29
AY29
AW13
AW12
AY21
AW21
AL20
AF10
BA13
BA12
AY20
AU21
M_RCOMPN
AV9
M_RCOMPP
AT9
945GMDDR_VREF
AK1
AK41
AF33
AG33
A27
A26
C40
D41
AE35
AF39
AG35
AH39
AC35
AE39
AF35
AG39
AE37
AF41
AG37
AH41
AC37
AE41
AF37
AG41
OUT
P_DDR0_A 20
OUT
P_DDR0_B 20
OUT
N_DDR0_A 20
OUT
N_DDR0_B 20
OUT
SCKE_A0 20,21
OUT
SCKE_A1 20,21
OUT
SCKE_B0 20,21
OUT
SCKE_B1 20,21
OUT
SCS_A#0 20,21
OUT
SCS_A#1 20,21
OUT
SCS_B#0 20,21
OUT
SCS_B#1 20,21
TP14
TP15
OUT
ODT_A0 20,21
OUT
ODT_A1 20,21
OUT
ODT_B0 20,21
OUT
ODT_B1 20,21
IN
CK_PE_100M_MCH# 15
IN
CK_PE_100M_MCH 15
IN
CK_96M_DREF# 15
IN
CK_96M_DREF 15
0R_0402 R223
0R_0402 R222
IN
DMIRXN0 13
IN
DMIRXN1 13
IN
DMIRXN2 13
IN
DMIRXN3 13
IN
DMIRXP0 13
IN
DMIRXP1 13
IN
DMIRXP2 13
IN
DMIRXP3 13
OUT
DMITXN0 13
OUT
DMITXN1 13
OUT
DMITXN2 13
OUT
DMITXN3 13
OUT
DMITXP0 13
OUT
DMITXP1 13
OUT
DMITXP2 13
OUT
DMITXP3 13
PM_EXTTS#1
0R_0402 R227
80.6R1%_0603 R127
80.6R1%_0603 R128
V_1P5_CORE
R158 10R0402
R157 10R0402
R140 10R0402
R129 10R0402
R155 10R0402
R156 10R0402
R141 10R0402
R130 10R0402
VCC_DDR2
R162 1KR1%_0603
VCC_DDR2
Without LVDS
PM_EXTTS#0
R246 10K_0402
PM_EXTTS#1
R228 10K_0402
C
OUT
P_DDR1_A 20
OUT
P_DDR2_A 20
OUT
P_DDR1_B 20
OUT
P_DDR2_B 20
OUT
N_DDR1_A 20
OUT
N_DDR2_A 20
OUT
N_DDR1_B 20
OUT
N_DDR2_B 20
945GMDDR_VREF
C171
R161
VCC3
BI
BI
OUT
OUT
0.1u_0603
OUT
OUT
OUT
MCH_DDC_CLK
MCH_DDC_DATA
1KR1%_0603
VGA_BLUE 26
VGA_GREEN 26
VGA_RED 26
MCH_DDC_CLK 26
MCH_DDC_DATA 26
HSYNC 26
VSYNC 26
TP31
R489
1.5KR0402
R224
100KR0402
C169
0.1u_0603
V_1P5_CORE
VGA_BLUE
VGA_GREEN
VGA_RED
R232 39R_0402
R488 255R1%_0603-BOT
R233 39R_0402
D32
J30
H30
H29
G26
G25
B38
C35
F32
C33
C32
A33
A32
E27
E26
C37
B35
A37
B37
B34
A36
G30
D30
F29
F30
D29
F28
A16
C18
A19
J20
B16
B18
B19
K30
J29
E23
D23
C22
B22
A21
B21
C26
C25
G23
J22
H23
U11C
L_BKLTCTL
L_BKLTEN
L_CTLACLK
L_CTLB_DATA
L_DDC_CLK
L_DDC_DATA
L_IBG
L_VBG
L_VDDEN
L_VREFH
L_VREFL
LA_CLK#
LA_CLK
LB_CLK#
LB_CLK
LA_DATA#_0
LA_DATA#_1
LA_DATA#_2
LA_DATA_0
LA_DATA_1
LA_DATA_2
LB_DATA#_0
LB_DATA#_1
LB_DATA#_2
LB_DATA_0
LB_DATA_1
LB_DATA_2
TV_DACA_OUT
TV_DACB_OUT
TV_DACC_OUT
TV_IREF
TV_IRTNA
TV_IRTNB
TV_IRTNC
TV_DCONSEL0
TV_DCONSEL1
CRT_BLUE
CRT_BLUE#
CRT_GREEN
CRT_GREEN#
CRT_RED
CRT_RED#
CRT_DDC_CLK
CRT_DDC_DATA
CRT_HSYNC
CRT_IREF
CRT_VSYNC
945GT
D
SDVO_TVCLKIN# / EXP_A_RXN_0
SDVO_INT# / EXP_A_RXN_1
SDVO_FLDSTALL# / EXP_A_RXN_2
LVDS TV VGA
SDVO_TVCLKIN / EXP_A_RXP_0
SDVO_INT / EXP_A_RXP_1
SDVO_FLDSTALL / EXP_A_RXP_2
SDVOB_RED# / EXP_A_TXN_0
SDVOB_GREEN# / EXP_A_TXN_1
SDVOB_BLUE# / EXP_A_TXN_2
SDVOC_RED# / SDVOB_ALPHA# / EXP_A_TXN_4
SDVOB_CLKN / EXP_A_TXN_3
SDVOC_GREEN# / EXP_A_TXN_5
SDVOC_BLUE# / EXP_A_TXN_6
SDVOC_CLKN / EXP_A_TXN_7
PCI-EXPRESS GRAPHICS
SDVOB_RED / EXP_A_TXP_0
SDVOB_GREEN / EXP_A_TXP_1
SDVOB_BLUE / EXP_A_TXP_2
SDVOB_CLKP / EXP_A_TXP_3
SDVOC_RED / SDVOB_ALPHA / EXP_A_TXP_4
SDVOC_GREEN / EXP_A_TXP_5
SDVOC_BLUE / EXP_A_TXP_6
SDVOC_CLKP / EXP_A_TXP_7
EXP_A_COMPI
EXP_A_COMPO
EXP_A_RXN_3
EXP_A_RXN_4
EXP_A_RXN_5
EXP_A_RXN_6
EXP_A_RXN_7
EXP_A_RXN_8
EXP_A_RXN_9
EXP_A_RXN_10
EXP_A_RXN_11
EXP_A_RXN_12
EXP_A_RXN_13
EXP_A_RXN_14
EXP_A_RXN_15
EXP_A_RXP_3
EXP_A_RXP_4
EXP_A_RXP_5
EXP_A_RXP_6
EXP_A_RXP_7
EXP_A_RXP_8
EXP_A_RXP_9
EXP_A_RXP_10
EXP_A_RXP_11
EXP_A_RXP_12
EXP_A_RXP_13
EXP_A_RXP_14
EXP_A_RXP_15
EXP_A_TXN_8
EXP_A_TXN_9
EXP_A_TXN_10
EXP_A_TXN_11
EXP_A_TXN_12
EXP_A_TXN_13
EXP_A_TXN_14
EXP_A_TXN_15
EXP_A_TXP_8
EXP_A_TXP_9
EXP_A_TXP_10
EXP_A_TXP_11
EXP_A_TXP_12
EXP_A_TXP_13
EXP_A_TXP_14
EXP_A_TXP_15
GRCOMP
D40
D38
EXP_A_RXN_0
F34
EXP_A_RXN_1
G38
EXP_A_RXN_2
H34
EXP_A_RXN_3
J38
EXP_A_RXN_4
L34
EXP_A_RXN_5
M38
EXP_A_RXN_6
N34
EXP_A_RXN_7
P38
EXP_A_RXN_8
R34
EXP_A_RXN_9
T38
EXP_A_RXN_10
V34
EXP_A_RXN_11
W38
EXP_A_RXN_12
Y34
EXP_A_RXN_13
AA38
EXP_A_RXN_14
AB34
EXP_A_RXN_15
AC38
EXP_A_RXP_0
D34
EXP_A_RXP_1
F38
EXP_A_RXP_2
G34
EXP_A_RXP_3
H38
EXP_A_RXP_4
J34
EXP_A_RXP_5
L38
EXP_A_RXP_6
M34
EXP_A_RXP_7
N38
EXP_A_RXP_8
P34
EXP_A_RXP_9
R38
EXP_A_RXP_10
T34
EXP_A_RXP_11
V38
EXP_A_RXP_12
W34
EXP_A_RXP_13
Y38
EXP_A_RXP_14
AA34
EXP_A_RXP_15
AB38
EXP_A_TXN_0
F36
EXP_A_TXN_1
G40
EXP_A_TXN_2
H36
EXP_A_TXN_3
J40
EXP_A_TXN_4
L36
EXP_A_TXN_5
M40
EXP_A_TXN_6
N36
EXP_A_TXN_7
P40
EXP_A_TXN_8
R36
EXP_A_TXN_9
T40
EXP_A_TXN_10
V36
EXP_A_TXN_11
W40
EXP_A_TXN_12
Y36
EXP_A_TXN_13
AA40
EXP_A_TXN_14
AB36
EXP_A_TXN_15
AC40
EXP_A_TXP_0
D36
EXP_A_TXP_1
F40
EXP_A_TXP_2
G36
EXP_A_TXP_3
H40
EXP_A_TXP_4
J36
EXP_A_TXP_5
L40
EXP_A_TXP_6
M36
EXP_A_TXP_7
N40
EXP_A_TXP_8
P36
EXP_A_TXP_9
R40
EXP_A_TXP_10
T36
EXP_A_TXP_11
V40
EXP_A_TXP_12
W36
EXP_A_TXP_13
Y40
EXP_A_TXP_14
AA36
EXP_A_TXP_15
AB40
E
R234 24.9R1%_0603
IN
IN
OUT
OUT
VCC3G_PCIE
EXP_A_RXN_[0..15] 23,27
EXP_A_RXP_[0..15] 23,27
EXP_A_TXN_[0..15] 23,27
EXP_A_TXP_[0..15] 23,27
NB strapping
R239
CFG5 CFG19
X_2.2K_0402
HIGH
CFG5 DMI Width
LOW=DMI x 2
1 1
HIGH=DMI x 4
CFG7 CPU STRAP
LOW=REVERSED
HIGH=MOBILE CPU
A
CFG[3:17] Internal Pull up CFG[18:20] Internal Pull down
CFG7
R242 2.2K_0402
TP1
CFG10
R241 X_2.2K_0402
LOW HIGH
CFG9 PCIE
Graphics
LOW=REVERSE LAN
HIGH=NORMAL
CFG10 HOST PLL
VCO SELECT
LOW=REVERSED
HIGH=MOBILITY
B
R250 X_2.2K_0402
CFG11 PSB 4X
CLK ENABLE
LOW=4X ENABLE
HIGH=8X
CFG16 CFG9 CFG11
R240 X_2.2K_0402
HIGH LOW
CFG16 FSB Dynamic
ODT LOW=Dynamic ODT
Disabled
HIGH=Dynamic ODT
Enabled
C
CFG18
R231 2.2K_0402
HIGH
CFG18 VCC Select
LOW=1.05V
HIGH=1.5V
R229 X_2.2K_0402
LOW HIGH
CFG19 DMI LANE
REVERSAL LOW=Normal
HIGH=LANES REVRSED
D
VCC3 VCC3 VCC3
CFG20
R230 X_2.2K_0402
LOW
CFG20 SDVO/PCIe concurrent
LOW=Only SDVO or PCIE x 1 is
operational
HIGH=SDVO and PCIE x 1 are
operating simultaneously via
the PEG port
Title
Size Document Number Rev
Date: Sheet
MICRO-STAR INt'L CO. , LTD.
GMCH2-PCIE/DMI/CRT
Custom
MS-9631
of
73 7 Monday, February 13, 2006
E
1.0
Page 8
A
4 4
B
C
D
E
DATA_A[63:0] 20
3 3
2 2
DATA_A0
DATA_A1
DATA_A2
DATA_A3
DATA_A4
DATA_A5
DATA_A6
DATA_A7
DATA_A8
DATA_A9
DATA_A10
DATA_A11
DATA_A12
DATA_A13
DATA_A14
DATA_A15
DATA_A16
DATA_A17
DATA_A18
DATA_A19
DATA_A20
DATA_A21
DATA_A22
DATA_A23
DATA_A24
DATA_A25
DATA_A26
DATA_A27
DATA_A28
DATA_A29
DATA_A30
DATA_A31
DATA_A32
DATA_A33
DATA_A34
DATA_A35
DATA_A36
DATA_A37
DATA_A38
DATA_A39
DATA_A40
DATA_A41
DATA_A42
DATA_A43
DATA_A44
DATA_A45
DATA_A46
DATA_A47
DATA_A48
DATA_A49
DATA_A50
DATA_A51
DATA_A52
DATA_A53
DATA_A54
DATA_A55
DATA_A56
DATA_A57
DATA_A58
DATA_A59
DATA_A60
DATA_A61
DATA_A62
DATA_A63
AJ35
AJ34
AM31
AM33
AJ36
AK35
AJ32
AH31
AN35
AP33
AR31
AP31
AN38
AM36
AM34
AN33
AK26
AL27
AM26
AN24
AK28
AL28
AM24
AP26
AP23
AL22
AP21
AN20
AL23
AP24
AP20
AT21
AR12
AR14
AP13
AP12
AT13
AT12
AL14
AL12
AW2
U11D
SA_DQ0
SA_DQ1
SA_DQ2
SA_DQ3
SA_DQ4
SA_DQ5
SA_DQ6
SA_DQ7
SA_DQ8
SA_DQ9
SA_DQ10
SA_DQ11
SA_DQ12
SA_DQ13
SA_DQ14
SA_DQ15
SA_DQ16
SA_DQ17
SA_DQ18
SA_DQ19
SA_DQ20
SA_DQ21
SA_DQ22
SA_DQ23
SA_DQ24
SA_DQ25
SA_DQ26
SA_DQ27
SA_DQ28
SA_DQ29
SA_DQ30
SA_DQ31
SA_DQ32
SA_DQ33
SA_DQ34
SA_DQ35
SA_DQ36
SA_DQ37
SA_DQ38
SA_DQ39
AK9
SA_DQ40
AN7
SA_DQ41
AK8
SA_DQ42
AK7
SA_DQ43
AP9
SA_DQ44
AN9
SA_DQ45
AT5
SA_DQ46
AL5
SA_DQ47
AY2
SA_DQ48
SA_DQ49
AP1
SA_DQ50
AN2
SA_DQ51
AV2
SA_DQ52
AT3
SA_DQ53
AN1
SA_DQ54
AL2
SA_DQ55
AG7
SA_DQ56
AF9
SA_DQ57
AG4
SA_DQ58
AF6
SA_DQ59
AG9
SA_DQ60
AH6
SA_DQ61
AF4
SA_DQ62
AF8
SA_DQ63
945GT
DDR SYSTEM MEMORY A
SA_RCVEMIN#
SA_RCVENOUT#
SA_BS_0
SA_BS_1
SA_BS_2
SA_DM_0
SA_DM_1
SA_DM_2
SA_DM_3
SA_DM_4
SA_DM_5
SA_DM_6
SA_DM_7
SA_DQS_0
SA_DQS_1
SA_DQS_2
SA_DQS_3
SA_DQS_4
SA_DQS_5
SA_DQS_6
SA_DQS_7
SA_DQS#_0
SA_DQS#_1
SA_DQS#_2
SA_DQS#_3
SA_DQS#_4
SA_DQS#_5
SA_DQS#_6
SA_DQS#_7
SA_MA_0
SA_MA_1
SA_MA_2
SA_MA_3
SA_MA_4
SA_MA_5
SA_MA_6
SA_MA_7
SA_MA_8
SA_MA_9
SA_MA_10
SA_MA_11
SA_MA_12
SA_MA_13
SA_CAS#
SA_RAS#
SA_WE#
AU12
AV14
BA20
AJ33
AM35
AL26
AN22
AM14
AL9
AR3
AH4
AK33
AT33
AN28
AM22
AN12
AN8
AP3
AG5
AK32
AU33
AN27
AM21
AM12
AL8
AN3
AH5
AY16
AU14
AW16
BA16
BA17
AU16
AV17
AU17
AW17
AT16
AU13
AT17
AV20
AV12
AY13
AW14
AK23
AK24
AY14
MAA_A0
MAA_A1
MAA_A2
MAA_A3
MAA_A4
MAA_A5
MAA_A7
MAA_A8
MAA_A9
MAA_A10
MAA_A11
MAA_A12
MAA_A13
SBS_A0 20,21
SBS_A1 20,21
SBS_A2 20,21
DQS_A#0 20
DQS_A#1 20
DQS_A#2 20
DQS_A#3 20
DQS_A#4 20
DQS_A#5 20
DQS_A#6 20
DQS_A#7 20
TP11
TP13
DQM_A0 20
DQM_A1 20
DQM_A2 20
DQM_A3 20
DQM_A4 20
DQM_A5 20
DQM_A6 20
DQM_A7 20
DQS_A0 20
DQS_A1 20
DQS_A2 20
DQS_A3 20
DQS_A4 20
DQS_A5 20
DQS_A6 20
DQS_A7 20
MAA_A[0..13] 20,21
CAS_A# 20,21
RAS_A# 20,21
WE_A# 20,21
DATA_B[63:0] 20
DATA_B0
DATA_B1
DATA_B2
DATA_B3
DATA_B4
DATA_B5
DATA_B6
DATA_B7
DATA_B8
DATA_B9
DATA_B10
DATA_B11
DATA_B12
DATA_B13
DATA_B14
DATA_B15
DATA_B16
DATA_B17
DATA_B18
DATA_B19
DATA_B20
DATA_B21
DATA_B22
DATA_B23
DATA_B24
DATA_B25
DATA_B26
DATA_B27
DATA_B28
DATA_B29
DATA_B30
DATA_B31
DATA_B32
DATA_B33
DATA_B34
DATA_B35
DATA_B36
DATA_B37
DATA_B38
DATA_B39
DATA_B40
DATA_B41
DATA_B42
DATA_B43
DATA_B44
DATA_B45
DATA_B46
DATA_B47
DATA_B48
DATA_B49
DATA_B50
DATA_B51
DATA_B52
DATA_B53
DATA_B54
DATA_B55
DATA_B56
DATA_B57
DATA_B58
DATA_B59
DATA_B60
DATA_B61
DATA_B62
DATA_B63
AK39
AJ37
AP39
AR41
AJ38
AK38
AN41
AP41
AT40
AV41
AU38
AV38
AP38
AR40
AW38
AY38
BA38
AV36
AR36
AP36
BA36
AU36
AP35
AP34
AY33
BA33
AT31
AU29
AU31
AW31
AV29
AW29
AM19
AL19
AP14
AN14
AN17
AM16
AP15
AL15
AJ11
AH10
AN10
AK13
AH11
AK10
BA10
AW10
AW4
AY10
AW5
U11E
SB_DQ0
SB_DQ1
SB_DQ2
SB_DQ3
SB_DQ4
SB_DQ5
SB_DQ6
SB_DQ7
SB_DQ8
SB_DQ9
SB_DQ10
SB_DQ11
SB_DQ12
SB_DQ13
SB_DQ14
SB_DQ15
SB_DQ16
SB_DQ17
SB_DQ18
SB_DQ19
SB_DQ20
SB_DQ21
SB_DQ22
SB_DQ23
SB_DQ24
SB_DQ25
SB_DQ26
SB_DQ27
SB_DQ28
SB_DQ29
SB_DQ30
SB_DQ31
SB_DQ32
SB_DQ33
SB_DQ34
SB_DQ35
SB_DQ36
SB_DQ37
SB_DQ38
SB_DQ39
SB_DQ40
SB_DQ41
AJ9
SB_DQ42
SB_DQ43
SB_DQ44
SB_DQ45
SB_DQ46
AJ8
SB_DQ47
SB_DQ48
SB_DQ49
BA4
SB_DQ50
SB_DQ51
SB_DQ52
AY9
SB_DQ53
SB_DQ54
AY5
SB_DQ55
AV4
SB_DQ56
AR5
SB_DQ57
AK4
SB_DQ58
AK3
SB_DQ59
AT4
SB_DQ60
AK5
SB_DQ61
AJ5
SB_DQ62
AJ3
SB_DQ63
945GT
DDR SYSTEM MEMORY B
SB_RCVENIN#
SB_RCVENOUT#
SB_BS_0
SB_BS_1
SB_BS_2
SB_DM_0
SB_DM_1
SB_DM_2
SB_DM_3
SB_DM_4
SB_DM_5
SB_DM_6
SB_DM_7
SB_DQS_0
SB_DQS_1
SB_DQS_2
SB_DQS_3
SB_DQS_4
SB_DQS_5
SB_DQS_6
SB_DQS_7
SB_DQS#_0
SB_DQS#_1
SB_DQS#_2
SB_DQS#_3
SB_DQS#_4
SB_DQS#_5
SB_DQS#_6
SB_DQS#_7
SB_MA_0
SB_MA_1
SB_MA_2
SB_MA_3
SB_MA_4
SB_MA_5
SB_MA_6
SB_MA_7
SB_MA_8
SB_MA_9
SB_MA_10
SB_MA_11
SB_MA_12
SB_MA_13
SB_CAS#
SB_RAS#
SB_WE#
AT24
AV23
AY28
AK36
AR38
AT36
BA31
AL17
AH8
BA5
AN4
AM39
AT39
AU35
AR29
AR16
AR10
AR7
AN5
AM40
AU39
AT35
AP29
AP16
AT10
AT7
AP5
AY23
AW24
AY24
AR28
AT27
AT28
AU27
AV28
AV27
AW27
AV24
BA27
AY27
AR23
AR24
AU23
AK16
AK18
AR27
MAA_B0
MAA_B1
MAA_B2
MAA_B3
MAA_B4
MAA_B5 MAA_A6
MAA_B6
MAA_B7
MAA_B8
MAA_B9
MAA_B10
MAA_B11
MAA_B12
MAA_B13
TP12
TP10
SBS_B0 20,21
SBS_B1 20,21
SBS_B2 20,21
DQS_B0 20
DQS_B1 20
DQS_B2 20
DQS_B3 20
DQS_B4 20
DQS_B5 20
DQS_B6 20
DQS_B7 20
DQS_B#0 20
DQS_B#1 20
DQS_B#2 20
DQS_B#3 20
DQS_B#4 20
DQS_B#5 20
DQS_B#6 20
DQS_B#7 20
MAA_B[0..13] 20,21
CAS_B# 20,21
RAS_B# 20,21
WE_B# 20,21
DQM_B0 20
DQM_B1 20
DQM_B2 20
DQM_B3 20
DQM_B4 20
DQM_B5 20
DQM_B6 20
DQM_B7 20
1 1
Title
Size Document Number Rev
A
B
C
D
Date: Sheet
MICRO-STAR INt'L CO. , LTD.
GMCH3-MEM
Custom
MS-9631
1.0
of
83 7 Monday, February 13, 2006
E
Page 9
5
AA33
AA32
AA31
AA30
AA29
AB28
AA28
AB23
AA23
AC22
AB22
AC21
AA21
AC20
AB20
AB19
AA19
EC30
1000u_6.3V
V_1P5_CORE
+
1 2
1000u_6.3V
EC29
+
1 2
C281
10UF/10V_0805
5500mA
0.22UF/10V
D D
C C
B B
A A
5
4
U11F
VCC_0
W33
VCC_1
P33
VCC_2
N33
VCC_3
L33
VCC_4
J33
VCC_5
VCC_6
Y32
VCC_7
W32
VCC_8
V32
VCC_9
P32
VCC_10
N32
VCC_11
M32
VCC_12
L32
VCC_13
J32
VCC_14
VCC_15
W31
VCC_16
V31
VCC_17
T31
VCC_18
R31
VCC_19
P31
VCC_20
N31
VCC_21
M31
VCC_22
VCC_23
Y30
VCC_24
W30
VCC_25
V30
VCC_26
U30
VCC_27
T30
VCC_28
R30
VCC_29
P30
VCC_30
N30
VCC_31
M30
VCC_32
L30
VCC_33
VCC_34
Y29
VCC_35
W29
VCC_36
V29
VCC_37
U29
VCC_38
R29
VCC_39
P29
VCC_40
M29
VCC_41
L29
VCC_42
VCC_43
VCC_44
Y28
VCC_45
V28
VCC_46
U28
VCC_47
T28
VCC_48
R28
VCC_49
P28
VCC_50
N28
VCC_51
M28
VCC_52
L28
VCC_53
P27
VCC_54
N27
VCC_55
VCC_56
VCC_57
VCC_58
VCC_59
VCC_60
VCC_61
VCC_62
VCC_63
VCC_64
VCC_65
VCC_66
VCC_67
VCC_68
VCC_69
VCC_70
VCC_71
VCC_72
VCC_73
VCC_74
VCC_75
VCC_76
VCC_77
VCC_78
VCC_79
VCC_80
VCC_81
VCC_82
VCC_83
VCC_84
VCC_85
VCC_86
VCC_87
VCC_88
VCC_89
VCC_90
VCC_91
VCC_92
VCC_93
VCC_94
VCC_95
VCC_96
VCC_97
VCC_98
VCC_99
VCC_100
VCC_101
VCC_102
VCC_103
VCC_104
VCC_105
VCC_106
VCC_107
VCC_108
VCC_109
VCC_110
VCC
VCC_SM_100
VCC_SM_101
VCC_SM_102
VCC_SM_103
VCC_SM_104
VCC_SM_105
VCC_SM_106
VCC_SM_107
M27
L27
P26
N26
L26
N25
M25
L25
P24
N24
M24
Y23
P23
N23
M23
L23
Y22
W22
P22
N22
M22
L22
W21
N21
M21
L21
Y20
W20
P20
N20
M20
L20
Y19
N19
M19
L19
N18
M18
L18
P17
N17
M17
N16
M16
L16
945GT
VCC_SM_0
VCC_SM_1
VCC_SM_2
VCC_SM_3
VCC_SM_4
VCC_SM_5
VCC_SM_6
VCC_SM_7
VCC_SM_8
VCC_SM_9
VCC_SM_10
VCC_SM_11
VCC_SM_12
VCC_SM_13
VCC_SM_14
VCC_SM_15
VCC_SM_16
VCC_SM_17
VCC_SM_18
VCC_SM_19
VCC_SM_20
VCC_SM_21
VCC_SM_22
VCC_SM_23
VCC_SM_24
VCC_SM_25
VCC_SM_26
VCC_SM_27
VCC_SM_28
VCC_SM_29
VCC_SM_30
VCC_SM_31
VCC_SM_32
VCC_SM_33
VCC_SM_34
VCC_SM_35
VCC_SM_36
VCC_SM_37
VCC_SM_38
VCC_SM_39
VCC_SM_40
VCC_SM_41
VCC_SM_42
VCC_SM_43
VCC_SM_44
VCC_SM_45
VCC_SM_46
VCC_SM_47
VCC_SM_48
VCC_SM_49
VCC_SM_50
VCC_SM_51
VCC_SM_52
VCC_SM_53
VCC_SM_54
VCC_SM_55
VCC_SM_56
VCC_SM_57
VCC_SM_58
VCC_SM_59
VCC_SM_60
VCC_SM_61
VCC_SM_62
VCC_SM_63
VCC_SM_64
VCC_SM_65
VCC_SM_66
VCC_SM_67
VCC_SM_68
VCC_SM_69
VCC_SM_70
VCC_SM_71
VCC_SM_72
VCC_SM_73
VCC_SM_74
VCC_SM_75
VCC_SM_76
VCC_SM_77
VCC_SM_78
VCC_SM_79
VCC_SM_80
VCC_SM_81
VCC_SM_82
VCC_SM_83
VCC_SM_84
VCC_SM_85
VCC_SM_86
VCC_SM_87
VCC_SM_88
VCC_SM_89
VCC_SM_90
VCC_SM_91
VCC_SM_92
VCC_SM_93
VCC_SM_94
VCC_SM_95
VCC_SM_96
VCC_SM_97
VCC_SM_98
VCC_SM_99
AU41
AT41
AM41
AU40
BA34
AY34
AW34
AV34
AU34
AT34
AR34
BA30
AY30
AW30
AV30
AU30
AT30
AR30
AP30
AN30
AM30
AM29
AL29
AK29
AJ29
AH29
AJ28
AH28
AJ27
AH27
BA26
AY26
AW26
AV26
AU26
AT26
AR26
AJ26
AH26
AJ25
AH25
AJ24
AH24
BA23
AJ23
BA22
AY22
AW22
AV22
AU22
AT22
AR22
AP22
AK22
AJ22
AK21
AK20
BA19
AY19
AW19
AV19
AU19
AT19
AR19
AP19
AK19
AJ19
AJ18
AJ17
AH17
AJ16
AH16
BA15
AY15
AW15
AV15
AU15
AT15
AR15
AJ15
AJ14
AJ13
AH13
AK12
AJ12
AH12
AG12
AK11
BA8
AY8
AW8
AV8
AT8
AR8
AP8
BA6
AY6
AW6
AV6
AT6
AR6
AP6
AN6
AL6
AK6
AJ6
AV1
AJ1
C162
0.47UF C277
Remove C777 & C778 ->
VCC_DDR2 to GND -1025
C140
0.47UF
C186
0.47UF
4
C150
0.47UF
C143
0.47UF
3
C158
0.47UF
C142
10UF/10V_0805
Place close to GMCH
3
VCC_DDR2
V_1P5_CORE
C141
10UF/10V_0805
AD27
AC27
AB27
AA27
W27
AD26
AC26
AB26
AA26
W26
AD25
AC25
AB25
AA25
W25
AD24
AC24
AB24
AA24
W24
AD23
AD22
AD21
AD20
AD19
AD18
AC18
AB18
AA18
W18
U27
T27
R27
Y26
V26
U26
T26
R26
Y25
V25
U25
T25
R25
Y24
V24
U24
T24
R24
V23
U23
T23
R23
V22
U22
T22
R22
V21
U21
T21
R21
V20
U20
T20
R20
V19
U19
T19
Y18
V18
U18
T18
2
Y27
V27
2
U11G
VCC_NCTF0
VCC_NCTF1
VCC_NCTF2
VCC_NCTF3
VCC_NCTF4
VCC_NCTF5
VCC_NCTF6
VCC_NCTF7
VCC_NCTF8
VCC_NCTF9
VCC_NCTF10
VCC_NCTF11
VCC_NCTF12
VCC_NCTF13
VCC_NCTF14
VCC_NCTF15
VCC_NCTF16
VCC_NCTF17
VCC_NCTF18
VCC_NCTF19
VCC_NCTF20
VCC_NCTF21
VCC_NCTF22
VCC_NCTF23
VCC_NCTF24
VCC_NCTF25
VCC_NCTF26
VCC_NCTF27
VCC_NCTF28
VCC_NCTF29
VCC_NCTF30
VCC_NCTF31
VCC_NCTF32
VCC_NCTF33
VCC_NCTF34
VCC_NCTF35
VCC_NCTF36
VCC_NCTF37
VCC_NCTF38
VCC_NCTF39
VCC_NCTF40
VCC_NCTF41
VCC_NCTF42
VCC_NCTF43
VCC_NCTF44
VCC_NCTF45
VCC_NCTF46
VCC_NCTF47
VCC_NCTF48
VCC_NCTF49
VCC_NCTF50
VCC_NCTF51
VCC_NCTF52
VCC_NCTF53
VCC_NCTF54
VCC_NCTF55
VCC_NCTF56
VCC_NCTF57
VCC_NCTF58
VCC_NCTF59
VCC_NCTF60
VCC_NCTF61
VCC_NCTF62
VCC_NCTF63
VCC_NCTF64
VCC_NCTF65
VCC_NCTF66
VCC_NCTF67
VCC_NCTF68
VCC_NCTF69
VCC_NCTF70
VCC_NCTF71
VCC_NCTF72
945GT
NCTF
1
VSS_NCTF
AE27
VSS_NCTF0
AE26
VSS_NCTF1
AE25
VSS_NCTF2
AE24
VSS_NCTF3
AE23
VSS_NCTF4
AE22
VSS_NCTF5
AE21
VSS_NCTF6
AE20
VSS_NCTF7
AE19
VSS_NCTF8
AE18
VSS_NCTF9
AC17
VSS_NCTF10
Y17
VSS_NCTF11
U17
VSS_NCTF12
VCCAUX_NCTF0
VCCAUX_NCTF1
VCCAUX_NCTF2
VCCAUX_NCTF3
VCCAUX_NCTF4
VCCAUX_NCTF5
VCCAUX_NCTF6
VCCAUX_NCTF7
VCCAUX_NCTF8
VCCAUX_NCTF9
VCCAUX_NCTF10
VCCAUX_NCTF11
VCCAUX_NCTF12
VCCAUX_NCTF13
VCCAUX_NCTF14
VCCAUX_NCTF15
VCCAUX_NCTF16
VCCAUX_NCTF17
VCCAUX_NCTF18
VCCAUX_NCTF19
VCCAUX_NCTF20
VCCAUX_NCTF21
VCCAUX_NCTF22
VCCAUX_NCTF23
VCCAUX_NCTF24
VCCAUX_NCTF25
VCCAUX_NCTF26
VCCAUX_NCTF27
VCCAUX_NCTF28
VCCAUX_NCTF29
VCCAUX_NCTF30
VCCAUX_NCTF31
VCCAUX_NCTF32
VCCAUX_NCTF33
VCCAUX_NCTF34
VCCAUX_NCTF35
VCCAUX_NCTF36
VCCAUX_NCTF37
VCCAUX_NCTF38
VCCAUX_NCTF39
VCCAUX_NCTF40
VCCAUX_NCTF41
VCCAUX_NCTF42
VCCAUX_NCTF43
VCCAUX_NCTF44
VCCAUX_NCTF45
VCCAUX_NCTF46
VCCAUX_NCTF47
VCCAUX_NCTF48
VCCAUX_NCTF49
VCCAUX_NCTF50
VCCAUX_NCTF51
VCCAUX_NCTF52
VCCAUX_NCTF53
VCCAUX_NCTF54
VCCAUX_NCTF55
VCCAUX_NCTF56
VCCAUX_NCTF57
Title
GMCH-POWER1
Size Document Number Rev
Custom
Date: Sheet of
VCCAUX_NCTF
AG27
AF27
AG26
AF26
AG25
AF25
AG24
AF24
AG23
AF23
AG22
AF22
AG21
AF21
AG20
AF20
AG19
AF19
R19
AG18
AF18
R18
AG17
AF17
AE17
AD17
AB17
AA17
W17
V17
T17
R17
AG16
AF16
AE16
AD16
AC16
AB16
AA16
Y16
W16
V16
U16
T16
R16
AG15
AF15
AE15
AD15
AC15
AB15
AA15
Y15
W15
V15
U15
T15
R15
MS-9631 1.0
V_1P5_CORE
93 7 Monday, February 13, 2006
1
Page 10
A
4 4
3 3
2 2
V_1P5_CORE
V_FSB_VTT
V_2P5_MCH
VCC3G_PCIE
C189
0.1u_0402
VCC3G_PCIE
C188
10U10V_0805
VCCA_3GPLL
C602
0.1u_0603-BOT
L19 10U100mA_0805
C287
0.1u_0402
L17 10U100mA_0805
C272
0.1u_0402
L15 120L500m_350_0402
C215
0.1u_0402
L14 120L500m_350_0402
C204
0.1u_0402
D12
A C
RAS40WS
R261 10R_0603
C195
0.1u_0402
VCC3G_PCIE
C180
10U10V_0805
R176
1_1%_0603
C199
10U10V_0805
1 2
EC31
470u2.5V_POS
1 2
EC28
470u2.5V_POS
C216
22UF/6.3V_0805
VCCA_MPLL
C202
22UF/6.3V_0805
L18
180L1500m_90_0603
L12 91N1.5_1210-LF
1 2
EC14
220u_POS
L13 1U25m_0603
VCCA_DPLLA
VCCA_DPLLB
VCCA_HPLL
VCCA_CRTDAC
C276
0.1u_0402
B
V_1P5_CORE
C274
0.022U16V_0402
V_1P5_CORE
BI
VCCA_CRTDAC 26
C
V_2P5_MCH
C273
0.1u_0402
VCC3G_PCIE
VCCA_3GPLL
V_2P5_MCH
C264
0.1u_0402
V_1P5_CORE
V_1P5_CORE
VCC3
Modify TV Disable Circuit.
All TV power signals connect to 1.5V.
945GM Design Guide page 188.
2005.11.3
V_1P5_CORE
C269
0.1u_0402
C270
0.1u_0402
VCCA_DPLLB
VCCA_HPLL
V_1P5_CORE
C611
V_1P5_CORE
10U10V_0805-BOT
V_1P5_CORE
C612
10U10V_0805-BOT
70mA
VCCA_CRTDAC
VCCA_DPLLA
VCCA_MPLL
AJ41
AB41
AC33
AK31
AF31
AE31
AC31
AL30
AK30
AJ30
AH30
AG30
AF30
AE30
AD30
AC30
AG29
AF29
AE29
AD29
AC29
AG28
AF28
AE28
AH22
AJ21
AH21
AJ20
AH20
AH19
AH15
AH14
AG14
AF14
AE14
AF13
AE13
AF12
AE12
AD12
H22
C30
B30
A30
Y41
V41
R41
N41
L41
G41
H41
F21
E21
G21
B26
C39
AF1
A38
B39
AF2
H20
G20
E19
F19
C20
D20
E20
F20
AH1
AH2
A28
B28
C28
D21
A23
B23
B25
H19
P19
P16
P15
Y14
U11H
VCCSYNC
VCC_TXLVDS0
VCC_TXLVDS1
VCC_TXLVDS2
VCC3G0
VCC3G1
VCC3G2
VCC3G3
VCC3G4
VCC3G5
VCC3G6
VCCA_3GPLL
VCCA_3GBG
VSSA_3GBG
VCCA_CRTDAC0
VCCA_CRTDAC1
VSSA_CRTDAC
VCCA_DPLLA
VCCA_DPLLB
VCCA_HPLL
VCCA_LVDS
VSSA_LVDS
VCCA_MPLL
VCCA_TVBG
VSSA_TVBG
VCCA_TVDACA0
VCCA_TVDACA1
VCCA_TVDACB0
VCCA_TVDACB1
VCCA_TVDACC0
VCCA_TVDACC1
VCCD_HMPLL0
VCCD_HMPLL1
VCCD_LVDS0
VCCD_LVDS1
VCCD_LVDS2
VCCD_TVDAC
VCC_HV0
VCC_HV1
VCC_HV2
VCC_QTVDAC
VCCAUX0
VCCAUX1
VCCAUX2
VCCAUX3
VCCAUX4
VCCAUX5
VCCAUX6
VCCAUX7
VCCAUX8
VCCAUX9
VCCAUX10
VCCAUX11
VCCAUX12
VCCAUX13
VCCAUX14
VCCAUX15
VCCAUX16
VCCAUX17
VCCAUX18
VCCAUX19
VCCAUX20
VCCAUX21
VCCAUX22
VCCAUX23
VCCAUX24
VCCAUX25
VCCAUX26
VCCAUX27
VCCAUX28
VCCAUX29
VCCAUX30
VCCAUX31
VCCAUX32
VCCAUX33
VCCAUX34
VCCAUX35
VCCAUX36
VCCAUX37
VCCAUX38
VCCAUX39
VCCAUX40
945GT
D
POWER
VTT_0
VTT_1
VTT_2
VTT_3
VTT_4
VTT_5
VTT_6
VTT_7
VTT_8
VTT_9
VTT_10
VTT_11
VTT_12
VTT_13
VTT_14
VTT_15
VTT_16
VTT_17
VTT_18
VTT_19
VTT_20
VTT_21
VTT_22
VTT_23
VTT_24
VTT_25
VTT_26
VTT_27
VTT_28
VTT_29
VTT_30
VTT_31
VTT_32
VTT_33
VTT_34
VTT_35
VTT_36
VTT_37
VTT_38
VTT_39
VTT_40
VTT_41
VTT_42
VTT_43
VTT_44
VTT_45
VTT_46
VTT_47
VTT_48
VTT_49
VTT_50
VTT_51
VTT_52
VTT_53
VTT_54
VTT_55
VTT_56
VTT_57
VTT_58
VTT_59
VTT_60
VTT_61
VTT_62
VTT_63
VTT_64
VTT_65
VTT_66
VTT_67
VTT_68
VTT_69
VTT_70
VTT_71
VTT_72
VTT_73
VTT_74
VTT_75
VTT_76
AC14
AB14
W14
V14
T14
R14
P14
N14
M14
L14
AD13
AC13
AB13
AA13
Y13
W13
V13
U13
T13
R13
N13
M13
L13
AB12
AA12
Y12
W12
V12
U12
T12
R12
P12
N12
M12
L12
R11
P11
N11
M11
R10
P10
N10
M10
P9
N9
M9
R8
P8
N8
M8
P7
N7
M7
R6
P6
M6
A6
R5
P5
N5
M5
P4
N4
M4
R3
P3
N3
M3
R2
P2
M2
D2
AB1
R1
P1
N1
M1
E
C222
0.47UF
V_FSB_VTT
C271
0.47UF
C261
0.22UF/10V
1 1
Title
Size Document Number Rev
A
B
C
D
Date: Sheet
MICRO-STAR INt'L CO. , LTD.
GMCH4 - Power 2
Custom
MS-9631
1.0
of
10 37 Monday, February 13, 2006
E
Page 11
A
B
C
D
E
U11I
AC41
VSS_0
AA41
VSS_1
W41
VSS_2
T41
VSS_3
P41
VSS_4
M41
VSS_5
J41
VSS_6
4 4
3 3
2 2
1 1
AV40
AP40
AN40
AK40
AJ40
AH40
AG40
AF40
AE40
AY39
AW39
AV39
AR39
AN39
AJ39
AC39
AB39
AA39
AT38
AM38
AH38
AG38
AF38
AE38
AK37
AH37
AB37
AA37
AY36
AW36
AN36
AH36
AG36
AF36
AE36
AC36
BA35
AV35
AR35
AH35
AB35
AA35
AN34
F41
VSS_7
VSS_8
VSS_9
VSS_10
VSS_11
VSS_12
VSS_13
VSS_14
VSS_15
VSS_16
B40
VSS_17
VSS_18
VSS_19
VSS_20
VSS_21
VSS_22
VSS_23
VSS_24
VSS_25
VSS_26
Y39
VSS_27
W39
VSS_28
V39
VSS_29
T39
VSS_30
R39
VSS_31
P39
VSS_32
N39
VSS_33
M39
VSS_34
L39
VSS_35
J39
VSS_36
H39
VSS_37
G39
VSS_38
F39
VSS_39
D39
VSS_40
VSS_41
VSS_42
VSS_43
VSS_44
VSS_45
VSS_46
C38
VSS_47
VSS_48
VSS_49
VSS_50
VSS_51
Y37
VSS_52
W37
VSS_53
V37
VSS_54
T37
VSS_55
R37
VSS_56
P37
VSS_57
N37
VSS_58
M37
VSS_59
L37
VSS_60
J37
VSS_61
H37
VSS_62
G37
VSS_63
F37
VSS_64
D37
VSS_65
VSS_66
VSS_67
VSS_68
VSS_69
VSS_70
VSS_71
VSS_72
VSS_73
C36
VSS_74
B36
VSS_75
VSS_76
VSS_77
VSS_78
VSS_79
VSS_80
VSS_81
Y35
VSS_82
W35
VSS_83
V35
VSS_84
T35
VSS_85
R35
VSS_86
P35
VSS_87
N35
VSS_88
M35
VSS_89
L35
VSS_90
J35
VSS_91
H35
VSS_92
G35
VSS_93
F35
VSS_94
D35
VSS_95
VSS_96
945GT
VSS
VSS_97
VSS_98
VSS_99
VSS_100
VSS_101
VSS_102
VSS_103
VSS_104
VSS_105
VSS_106
VSS_107
VSS_108
VSS_109
VSS_110
VSS_111
VSS_112
VSS_113
VSS_114
VSS_115
VSS_116
VSS_117
VSS_118
VSS_119
VSS_120
VSS_121
VSS_122
VSS_123
VSS_124
VSS_125
VSS_126
VSS_127
VSS_128
VSS_129
VSS_130
VSS_131
VSS_132
VSS_133
VSS_134
VSS_135
VSS_136
VSS_137
VSS_138
VSS_139
VSS_140
VSS_141
VSS_142
VSS_143
VSS_144
VSS_145
VSS_146
VSS_147
VSS_148
VSS_149
VSS_150
VSS_151
VSS_152
VSS_153
VSS_154
VSS_155
VSS_156
VSS_157
VSS_158
VSS_159
VSS_160
VSS_161
VSS_162
VSS_163
VSS_164
VSS_165
VSS_166
VSS_167
VSS_168
VSS_169
VSS_170
VSS_171
VSS_172
VSS_173
VSS_174
VSS_175
VSS_176
VSS_177
VSS_178
VSS_179
AK34
AG34
AF34
AE34
AC34
C34
AW33
AV33
AR33
AE33
AB33
Y33
V33
T33
R33
M33
H33
G33
F33
D33
B33
AH32
AG32
AF32
AE32
AC32
AB32
G32
B32
AY31
AV31
AN31
AJ31
AG31
AB31
Y31
AB30
E30
AT29
AN29
AB29
T29
N29
K29
G29
E29
C29
B29
A29
BA28
AW28
AU28
AP28
AM28
AD28
AC28
W28
J28
E28
AP27
AM27
AK27
J27
G27
F27
C27
B27
AN26
M26
K26
F26
D26
AK25
P25
K25
H25
E25
D25
A25
BA24
AU24
AL24
AW23
AT23
AN23
AM23
AH23
AC23
W23
AA22
BA21
AV21
AR21
AN21
AL21
AB21
AW20
AR20
AM20
AA20
AN19
AC19
W19
AH18
AY17
AR17
AP17
AM17
AK17
AV16
AN16
AL16
AN15
AM15
AK15
M15
BA14
AT14
AK14
AD14
AA14
AV13
AR13
AN13
AM13
AL13
AG13
AY12
AC12
AD11
AA11
AV10
U11J
VSS_180
VSS_181
VSS_182
VSS_183
VSS_184
VSS_185
K23
VSS_186
J23
VSS_187
F23
VSS_188
C23
VSS_189
VSS_190
K22
VSS_191
G22
VSS_192
F22
VSS_193
E22
VSS_194
D22
VSS_195
A22
VSS_196
VSS_197
VSS_198
VSS_199
VSS_200
VSS_201
VSS_202
Y21
VSS_203
P21
VSS_204
K21
VSS_205
J21
VSS_206
H21
VSS_207
C21
VSS_208
VSS_209
VSS_210
VSS_211
VSS_212
K20
VSS_213
B20
VSS_214
A20
VSS_215
VSS_216
VSS_217
VSS_218
K19
VSS_219
G19
VSS_220
C19
VSS_221
VSS_222
P18
VSS_223
H18
VSS_224
D18
VSS_225
A18
VSS_226
VSS_227
VSS_228
VSS_229
VSS_230
VSS_231
VSS_232
VSS_233
VSS_234
J16
VSS_235
F16
VSS_236
C16
VSS_237
VSS_238
VSS_239
VSS_240
N15
VSS_241
VSS_242
L15
VSS_243
B15
VSS_244
A15
VSS_245
VSS_246
VSS_247
VSS_248
VSS_249
VSS_250
U14
VSS_251
K14
VSS_252
H14
VSS_253
E14
VSS_254
VSS_255
VSS_256
VSS_257
VSS_258
VSS_259
VSS_260
P13
VSS_261
F13
VSS_262
D13
VSS_263
B13
VSS_264
VSS_265
VSS_266
K12
VSS_267
H12
VSS_268
E12
VSS_269
VSS_270
VSS_271
Y11
VSS_272
J11
VSS_273
D11
VSS_274
B11
VSS_275
VSS_276
945GT
VSS
VSS_277
VSS_278
VSS_279
VSS_280
VSS_281
VSS_282
VSS_283
VSS_284
VSS_285
VSS_286
VSS_287
VSS_288
VSS_289
VSS_290
VSS_291
VSS_292
VSS_293
VSS_294
VSS_295
VSS_296
VSS_297
VSS_298
VSS_299
VSS_300
VSS_301
VSS_302
VSS_303
VSS_304
VSS_305
VSS_306
VSS_307
VSS_308
VSS_309
VSS_310
VSS_311
VSS_312
VSS_313
VSS_314
VSS_315
VSS_316
VSS_317
VSS_318
VSS_319
VSS_320
VSS_321
VSS_322
VSS_323
VSS_324
VSS_325
VSS_326
VSS_327
VSS_328
VSS_329
VSS_330
VSS_331
VSS_332
VSS_333
VSS_334
VSS_335
VSS_336
VSS_337
VSS_338
VSS_339
VSS_340
VSS_341
VSS_342
VSS_343
VSS_344
VSS_345
VSS_346
VSS_347
VSS_348
VSS_349
VSS_350
VSS_351
VSS_352
VSS_353
VSS_354
VSS_355
VSS_356
VSS_357
VSS_358
VSS_359
VSS_360
AP10
AL10
AJ10
AG10
AC10
W10
U10
BA9
AW9
AR9
AH9
AB9
Y9
R9
G9
E9
A9
AG8
AD8
AA8
U8
K8
C8
BA7
AV7
AP7
AL7
AJ7
AH7
AF7
AC7
R7
G7
D7
AG6
AD6
AB6
Y6
U6
N6
K6
H6
B6
AV5
AF5
AD5
AY4
AR4
AP4
AL4
AJ4
Y4
U4
R4
J4
F4
C4
AY3
AW3
AV3
AL3
AH3
AG3
AF3
AD3
AC3
AA3
G3
AT2
AR2
AP2
AK2
AJ2
AD2
AB2
Y2
U2
T2
N2
J2
H2
F2
C2
AL1
Title
Size Document Number Rev
A
B
C
D
Date: Sheet
MICRO-STAR INt'L CO. , LTD.
GMCH5 - Strap / GND
Custom
MS-9631
1.0
of
11 37 Monday, February 13, 2006
E
Page 12
8
7
6
5
4
3
2
1
15P50V_0603 C553
15P50V_0603 C551
VBAT
D D
SATALED# needs
3.3V external
pull high.
C C
B B
BAT1
VBAT
R457
330KR_0603
R458
X_0R
AC_BITCLK 17
AC_SYNC 17
AC_RST# 17
AC_SDIN0 17
AC_SDOUT 17
SATA_RX#2 29
SATA_RX2 29
SATA_RX#3 29
SATA_RX3 29
CK_ICHSATA# 15
D23
S-BAT54C_SOT23
3
R472
1K_0603
CK_ICHSATA 15
IDE_IRQ 29
PD_IORDY 29
PD_DREQ 29
VBAT VCC3_SB
SATA_BIAS < 500mil
5 mil trace width
1
2
SATALED# 13,19,26
SATA_TX#2 29
SATA_TX2 29
SATA_TX#3 29
SATA_TX3 29
PD_IOR# 29
PD_IOW# 29
PD_DACK# 29
R468 20K_1%_0603
C549
1U16V_0805
R455
10MR
R461 1MR0402
R466 39R_0402
OUT
R463 39R_0402
OUT
R464 39R_0402
OUT
IN
R465 39R_0402
OUT
OUT
IN
IN
OUT
OUT
IN
IN
OUT
OUT
IN
IN
OUT
OUT
OUT
IN
IN
IN
32.768KHZ12.5P_D
Y5
RTC_RST#
R436
SATA_BIAS
20R1%0402
C558
1U16V_0805
RTCX1
RTCX2
INTRUDER#
INTVRMEN
RTC_RST#
AB1
AB2
AA3
Y5
W4
W1
Y1
Y2
W3
V3
U3
U5
V4
T5
U7
V6
V7
U1
R6
R5
T2
T3
T1
T4
AF18
AF3
AE3
AG2
AH2
AF7
AE7
AG6
AH6
AF1
AE1
AH10
AG10
AF15
AH15
AF16
AH16
AG16
AE15
J_RTCRST#
U23A
RTXC1
RTCX2
RTCRST#
INTRUDER#
INTVRMEN
EE_CS
EE_SHCLK
EE_DOUT
EE_DIN
LAN_CLK
LAN_RSTSYNC
LAN_RXD0
LAN_RXD1
LAN_RXD2
LAN_TXD0
LAN_TXD1
LAN_TXD2
ACZ_BCLK
ACZ_SYNC
ACZ_RST#
ACZ_SDIN0
ACZ_SDIN1
ACZ_SDIN2
ACZ_SDOUT
SATALED#
SATA0RXN
SATA0RXP
SATA0TXN
SATA0TXP
SATA2RXN
SATA2RXP
SATA2TXN
SATA2TXP
SATA_CLKN
SATA_CLKP
SATARBIASN
SATARBIASP
DIOR#
DIOW#
DDACK#
IDEIRQ
IORDY
DDREQ
ICH7M-DH
CLR_CMOS1
H1X3_black
RTC
LAN
AC-97/AZALIA
SATA
ICH7-M
PARTA
3
2
1
LDRQ1#/GPIO23
LPC
TP1/DPRSTP#
TP2/DPSLP#
GPIO49/CPUPWRGD
CPU IDE
THERMTRIP#
LAD0
LAD1
LAD2
LAD3
LDRQ0#
LFRAME#
A20GATE
A20M#
CPUSLP#
FERR#
IGNNE#
INT3_3V#
INIT#
INTR
RCIN#
SMI#
STPCLK#
DD10
DD11
DD12
DD13
DD14
DD15
DCS1#
DCS3#
AA6
AB5
AC4
Y6
AC3
AA5
AB3
AE22
H_A20M#
AH28
AG27
AF24
AH25
H_FERR#
AG26
AG24
AG22
AG21
AF22
AF25
AG23
AH24
NMI
AF23
AH22
AF26
R370 24R0402
AB15
DD0
AE14
DD1
AG13
DD2
AF13
DD3
AD14
DD4
AC13
DD5
AD12
DD6
AC12
DD7
AE12
DD8
AF12
DD9
AB13
AC14
AF14
AH13
AH14
AC15
AH17
DA0
AE17
DA1
AF17
DA2
AE16
AD16
GPIO38 13
GPIO39 13
V_FSB_VTT
BI LPC_AD0 15,16,22
BI LPC_AD1 15,16,22
BI LPC_AD2 15,16,22
BI LPC_AD3 15,16,22
IN
LPC_DRQ#0 16
OUT
LPC_FRAME# 15,16,22
IN
A20GATE 16
OUT
H_A20M# 3
TP32
OUT
H_DPRSTP# 3,31
OUT
H_DPSLP# 3
IN
H_FERR# 3
OUT
H_PWRGD 3
OUT
H_IGNNE# 3
OUT
FWH_INIT 15
OUT
H_INIT# 3
OUT
H_INTR 3
IN
KBRST# 16
OUT
H_NMI 3
OUT
ICH_H_SMI# 3
OUT
H_STPCLK# 3
TRMTRIP#
IN
PDD0
PDD1
PDD2
PDD3
PDD4
PDD5
PDD6
PDD7
PDD8
PDD9
PDD10
PDD11
PDD12
PDD13
PDD14
PDD15
OUT PD_A0 29
OUT PD_A1 29
OUT PD_A2 29
OUT PD_CS#1 29
OUT PD_CS#3 29
IN
IN
R361 56R_0402
R375 56R_0402
TRMTRIP# 3,7
BI PDD[0..15] 29
KBRST#
A20GATE
GPIO38
GPIO39
Please R370 within 2"
from ICH7M
RN31
1 2
3 4
5 6
7 8
8P4R-8.2KR
Please R319 within 2"
from ICH7M
TRMTRIP#
H_FERR#
VCC3
E18
C18
A16
F18
E16
A18
E17
A17
A15
C14
E14
D14
B12
C13
G15
G13
E12
C11
D11
A11
A10
F11
F10
E9
D9
B9
A8
A6
C7
B6
E6
D6
A3
B4
C5
B5
AE5
AD5
AG4
AH4
AD9
U23B
AD0
AD1
AD2
AD3
AD4
AD5
AD6
AD7
AD8
AD9
AD10
AD11
AD12
AD13
AD14
AD15
AD16
AD17
AD18
AD19
AD20
AD21
AD22
AD23
AD24
AD25
AD26
AD27
AD28
AD29
AD30
AD31
Interrupt I/F
PIRQA#
PIRQB#
PIRQC#
PIRQD#
RSVD[1]
RSVD[2]
RSVD[3]
RSVD[4]
RSVD[5]
ICH7M-DH
PCI
ICH7-M
PARTB
MISC
REQ0#
GNT0#
REQ1#
GNT1#
REQ2#
GNT2#
REQ3#
GNT3#
REQ4#/GPIO22
GNT4#/GPIO48
GPIO1/REQ5#
GPIO17/GNT5#
C/BE0#
C/BE1#
C/BE2#
C/BE3#
IRDY#
PCIRST#
DEVSEL#
PERR#
PLOCK#
SERR#
STOP#
TRDY#
FRAME#
PLTRST#
PCICLK
PME#
GPIO2/PIRQE#
GPIO3/PIRQF#
GPIO4/PIRQG#
GPIO5/PIRQH#
RSVD[6]
RSVD[7]
RSVD[8]
MCH_SYNC#
PREQ#0
D7
E7
C16
D16
C17
D17
E13
F13
A13
A14
C8
D8
B15
C12
D12
C15
A7
E10
PAR
B18
A12
C9
E11
B10
F15
F14
F16
C26
A9
B19
G8
F7
F8
G7
AE9
AG8
AH8
F21
TP3
AH20
PGNT#0
PREQ#1
PGNT#1
PREQ#2
PGNT#2
PREQ#3
PGNT#3
PREQ#4
PREQ#5
C_BE#0
C_BE#1
C_BE#2
C_BE#3
OUT
OUT
OUT
OUT
OUT
OUT
TP36
IN
PREQ#0 24
PGNT#0 24
IN
PREQ#1 24
PGNT#1 24
IN
PREQ#2 24
PGNT#2 24
IN
PREQ#3 24,30
PGNT#3 30
IN
PREQ#4 24
IN
PREQ#5 24
BI C_BE#[3..0] 24,30
BI IRDY# 24,30
BI PAR 24,30
PCIRST_ICH7# 24,30
BI DEVSEL# 24,30
BI PERR# 24,30
BI LOCK# 24
BI SERR# 24
BI STOP# 24,30
BI TRDY# 24,30
BI FRAME# 24,30
PLTRST# 28
IN
ICH_PCLK 15
BI PCI_PME# 24
BI PIRQ#E 24
BI PIRQ#F 24,30
BI PIRQ#G 24
BI PIRQ#H 24
BI MCH_ICH_SYNC# 7
AD[31..0] 24,30
PIRQ#A 24
PIRQ#B 24
PIRQ#C 24
PIRQ#D 24
AD1
AD2
AD3
AD4
AD5
AD6
AD7
AD8
AD9
AD10
AD11
AD12
AD13
AD14
AD15
AD16
AD17
AD18
AD19
AD20
AD21
AD22
AD23
AD24
AD25
AD26
AD27
AD28
AD29
AD30
AD31
BI
BI
BI
BI
AD0
BI
SATALED#
R403 10KR0402
A A
8
7
6
5
VCC3
Title
Size Document Number Rev
4
3
Date: Sheet
MICRO-STAR INt'L CO. , LTD.
ICH7M- CPU/IDE/Azalia
Custom
2
MS-9631
1.0
of
12 37 Monday, February 13, 2006
1
Page 13
8
SMBCLK_RESUME
SMBCLK_RESUME 18,23,24
D D
C C
SMBDATA_RESUME 18,23,24
BI
SMBDATA_RESUME
BI
LINK_ALERT#
SM_LINK0
IN
SM_LINK0 24
SM_LINK1 24
SPKR 17,26
FP_RST# 15,26
BM_BUSY# 7
SMB_ALERT# 18
EL_STATE0 26
EL_STATE1 26
WAKE# 18,23
SERIRQ 16,22
THERM# 15,31
VRM_GD 31
SIO_OVT# 16
SLPBTIN# 26
TP37
TP34
SM_LINK1
IN
RI#
OUT
LPCPD#
IN
BM_BUSY#
IN
SMB_ALERT#
IN
OUT
OUT
OUTCPUFAN_GPIO 29
OUTSYSFAN_GPIO 29
IN
SERIRQ
BI
THERM#
IN
IN
SIO_OVT#
IN
GPIO7
SLPBTIN#
IN
GPIO[0:15] --> SMI
U23C
C22
SMBCLK
B22
SMBDATA
A26
LINKALERT#
B25
SMLINK0
A25
SMLINK1
A28
RI#
A19
SPKR
A27
SUS_STAT#
A22
SYS_RST#
AB18
GPIO0/BM_BUSY#
B23
GPIO11/SMBALERT#
AC20
GPIO18/STPPCI#
AF21
GPIO20/STPCPU#
A21
EL_RSVD/GPIO26
B21
EL_STATE0/GPIO27
E23
EL_STATE1/GPIO28
AG18
GPIO32/CLKRUN#
AC19
GPIO33/AZ_DOCK_EN#
U2
GPIO34/AZ_DOCK_RST#
F20
WAKE#
AH21
SERIRQ
AF20
THRM#
AD22
VRMPWRGD
AC21
GPIO6
AC18
GPIO7
E21
GPIO8
ICH7M-DH
7
SATA
GPIO
SMB
Clocks
GPIO16/DPRSLPVR
Power MGT GPIO
SYS
GPIO
GPIO35/SATACLKREQ#
ICH7-M
PARTC
GPIO21/SATA0GP
GPIO19/SATA1GP
GPIO36/SATA2GP
GPIO37/STAT3GP
CLK14
CLK48
SUSCLK
SLP_S3#
SLP_S4#
SLP_S5#
PWROK
TP0/BATLOW#
PWRBTN#
LAN_RST#
RSMRST#
GPIO9
GPIO10
GPIO12
GPIO13
GPIO14
GPIO15
GPIO24
GPIO25
GPIO38
GPIO39
6
RN34
1
AF19
AH18
AH19
AE19
AC1
B2
C20
B24
D23
F22
AA4
AC22
C21
C23
C19
Y4
E20
A20
F19
E19
R4
E22
R3
D20
AD21
AD20
AE20
LAN_RST#
GPIO9
2
3
4
5
6
7
8
8P4R-100R
R376 X_0R_0603
R368 0R_0603
0R_0402 PR1
BATTLOW#
RSMRST#
TP35
GPIO12
GPIO14
LAN_EN
TP38
TP33
GPIO38
GPIO39
OUT BIOS_WP# 15
OUT LAN_EN 18
OUT GPIO38 12
OUT GPIO39 12
5
IN ICH_14M 15
IN USB_48 15
OUT SUSCLK 22
OUT SLP_S3# 16,28,31
OUT SLP_S4# 28
IN PWRGD 7,28
OUT DPRSLPVR 7,31
IN RSMRST# 18,28
LAN_RST#
0R_0402 R406
GPIO24 default low
PCIE_RN1 18
PCIE_RP1 18
PCIE_TN1 18
PCIE_TP1 18
PCIE_RN2 19
PCIE_RP2 19
PCIE_TN2 19
PCIE_TP2 19
IN PWRBTN# 16
LAN_RST# connect to
PLTRST#. Follow Intel
schematic checklist
IN SIO_PME# 16
4
IN
IN
OUT
OUT
IN
IN
OUT
OUT
OC#1 25
OC#2 25
OC#3 25
OC#4 25
C433 0.1u_0402
C432 0.1u_0402
C423 0.1u_0402
C424 0.1u_0402
IN
IN
IN
IN
PCIE_TN1_C
PCIE_TP1_C
PCIE_TN2_C
PCIE_TP2_C
F26
F25
E28
E27
H26
H25
G28
G27
K26
K25
J28
J27
M26
M25
L28
L27
P26
P25
N28
N27
T25
T24
R28
R27
R2
P6
P1
P5
P2
D3
C4
D5
D4
E5
C3
A2
B3
3
U23D
PERn1
PERp1
PETn1
PETp1
PERn2
PERp2
PETn2
PETp2
PERn3
PERp3
PETn3
PETp3
PERn4
PERp4
PETn4
PETp4
PERn5
PERp5
PETn5
PETp5
PERn6
PERp6
PETn6
PETp6
SPI_CLK
SPI_CS#
SPI_ARB
SPI_MOSI
SPI_MISO
OC0#
OC1#
OC2#
OC3#
OC4#
OC5# / GPIO29
OC6# / GPIO30
OC7# / GPIO31
ICH7M-DH
PCI-Express SPI
ICH7-M
PARTD
Direct Media
Interface (
DMI_CLKN
DMI_CLKP
DMI_ZCOMP
DMI_IRCOMP
USB
USBRBIAS#
USBRBIAS
DMI0RXN
DMI0RXP
DMI0TXN
DMI0TXP
DMI1RXN
DMI1RXP
DMI1TXN
DMI1TXP
DMI2RXN
DMI2RXP
DMI2TXN
DMI2TXP
DMI3RXN
DMI )
DMI3RXP
DMI3TXN
DMI3TXP
USBP0N
USBP0P
USBP1N
USBP1P
USBP2N
USBP2P
USBP3N
USBP3P
USBP4N
USBP4P
USBP5N
USBP5P
USBP6N
USBP6P
USBP7N
USBP7P
V26
V25
U28
U27
Y26
Y25
W28
W27
AB26
AB25
AA28
AA27
AD25
AD24
AC28
AC27
AE28
AE27
C25
D25
F1
F2
G4
G3
H1
H2
J4
J3
K1
K2
L4
L5
M1
M2
N4
N3
D2
D1
2
<500mils
DMI_ZCOMP
R363 24.9R1%_0402
DMI_ZCOMP < 500mil
5 mil trace width
USB_BIAS
R448
22.6R1%_0402
USB_BIAS < 500mil
4 mil trace width
IN
DMITXN0 7
IN
DMITXP0 7
OUT
DMIRXN0 7
OUT
DMIRXP0 7
IN
DMITXN1 7
IN
DMITXP1 7
OUT
DMIRXN1 7
OUT
DMIRXP1 7
IN
DMITXN2 7
IN
DMITXP2 7
OUT
DMIRXN2 7
OUT
DMIRXP2 7
IN
DMITXN3 7
IN
DMITXP3 7
OUT
DMIRXN3 7
OUT
DMIRXP3 7
IN
CK_PE_100M_ICH# 15
IN
CK_PE_100M_ICH 15
BI USB0- 25
BI USB0+ 25
BI USB1- 25
BI USB1+ 25
BI USB2- 25
BI USB2+ 25
BI USB3- 25
BI USB3+ 25
BI USB4- 25
BI USB4+ 25
BI USB5- 25
BI USB5+ 25
BI USB6- 25
BI USB6+ 25
BI USB7- 25
BI USB7+ 25
1
V_1P5_CORE
SM BUS ISOLATION
OUT
SMBDATA_RESUME 18,23,24
Strapping & Pull-up Resistor
RI#
LINK_ALERT#
SM_LINK0
B B
SM_LINK1
SMB_ALERT#
SIO_PME#
SLPBTIN#
BATTLOW#
GPIO9
GPIO12
GPIO14
LPCPD#
WAKE#
BIOS_WP#
PWRGD
1 2
3 4
5 6
7 8
1 2
3 4
5 6
7 8
1 2
3 4
5 6
7 8
R360 X_10K
R395 1KR0402
R397 10K_0402
R477 10K_0402
VCC3_SB
RN27
8P4R-8.2KR
RN30
8P4R-8.2KR
RN33
8P4R-8.2KR
SATALED#
SATALED# 12,19,26
IN
SERIRQ
THERM#
SIO_OVT#
GPIO7
CPUFAN_GPIO
SPKR
1 2
3 4
5 6
7 8
R410 10K_0402
R409 10K_0402
R268 X_10K_0402
VCC3
RN32
8P4R-8.2KR
SMB_PWROK 28
Reserved for No Reboot
DPRSLPVR
R105 X_100KR0402
C555
0.1u_0603
+12V
IN
SMBCLK_MAIN
SMBDATA_MAIN
SMBCLK_RESUME
SMBDATA_RESUME
R471
4.7K_0603
R462 1K_0603
R476 1K_0603
N-2N7002_SOT23
N-2N7002_SOT23
R481
R469
4.7K_0603
R483 4.7K_0603
R399 4.7K_0603
(To: PCI,PCI-Express,ICH6)
Q43
(To:
CLK,DIMM,MS-7,HW_Monitor)
OUT
SMBDATA_MAIN 15,16,19,20,28
OUT
SMBCLK_RESUME 18,23,24
(To: PCI,PCI-Express,ICH6)
Q46
(To: CLK,DIMM,MS-7,
HW_Monitor)
OUT
SMBCLK_MAIN 15,16,19,20,28
4.7K_0603
VCC3
VCC3_SB
ADD
A A
RSMRST#
VCC5_SB
R475
4.7K_0402
R470
10K_0402
8
7
6
5
4
3
Title
Size Document Number Rev
Date: Sheet
MICRO-STAR INt'L CO. , LTD.
ICH7M - GPIO,USB,PCIE
Custom
MS-9631
2
13 37 Monday, February 13, 2006
1
1.0
of
Page 14
8
5VREF Sequencing C i r c u i t
5VREF
C10U6.3X50805
R422 1K_0603
C491 0.1u_0402
R446 1K_0603
C544 0.1u_0402
V_1P5_CORE
L21 80L3_100_0805
EC48
1000u_6.3V
V_1P5_CORE
R362 1R1%
C542
V_1P5_CORE
near AH9
VCC3_SB
C536
0.1u_0402
0.1u_0402
D18 1N5817
D D
D21 1N5817
5VREF_SUS
C C
B B
Be careful of SATAPLL
V_1P5_CORE
A A
L23 10U100mA_0805
+
1 2
0.01U25V_0402
C528
C512
1U10V_0603
7
VCC5 VCC3
VCC5_SB VCC3_SB
C431
0.1UF_0402
Near D28,T28,AD28
VCC3
L22
1U500m_0805
C437
V_1P5_CORE
near AH5
VCC3
V_1P5_CORE
V_EXP_ICH
C430
0.1u_0402
C500
0.1u_0402
C436
0.1UF_0402
C426
10UF/10V_0805
C516
2.2U16V_0805
C522
0.1u_0402
5VREF
5VREF_SUS
C434
0.1UF_0402
6
U23E
G10
V5REF[1]
AD17
V5REF[2]
F6
V5REF_Sus
AA22
Vcc1_5_B[1]
AA23
Vcc1_5_B[2]
AB22
Vcc1_5_B[3]
AB23
Vcc1_5_B[4]
AC23
Vcc1_5_B[5]
AC24
Vcc1_5_B[6]
AC25
Vcc1_5_B[7]
AC26
Vcc1_5_B[8]
AD26
Vcc1_5_B[9]
AD27
Vcc1_5_B[10]
AD28
Vcc1_5_B[11]
D26
Vcc1_5_B[12]
D27
Vcc1_5_B[13]
D28
Vcc1_5_B[14]
E24
Vcc1_5_B[15]
E25
Vcc1_5_B[16]
E26
Vcc1_5_B[17]
F23
Vcc1_5_B[18]
F24
Vcc1_5_B[19]
G22
Vcc1_5_B[20]
G23
Vcc1_5_B[21]
H22
Vcc1_5_B[22]
H23
Vcc1_5_B[23]
J22
Vcc1_5_B[24]
J23
Vcc1_5_B[25]
K22
Vcc1_5_B[26]
K23
Vcc1_5_B[27]
L22
Vcc1_5_B[28]
L23
Vcc1_5_B[29]
M22
Vcc1_5_B[30]
M23
Vcc1_5_B[31]
N22
Vcc1_5_B[32]
N23
Vcc1_5_B[33]
P22
Vcc1_5_B[34]
P23
Vcc1_5_B[35]
R22
Vcc1_5_B[36]
R23
Vcc1_5_B[37]
R24
Vcc1_5_B[38]
R25
Vcc1_5_B[39]
R26
Vcc1_5_B[40]
T22
Vcc1_5_B[41]
T23
Vcc1_5_B[42]
T26
Vcc1_5_B[43]
T27
Vcc1_5_B[44]
T28
Vcc1_5_B[45]
U22
Vcc1_5_B[46]
U23
Vcc1_5_B[47]
V22
Vcc1_5_B[48]
V23
Vcc1_5_B[49]
W22
Vcc1_5_B[50]
W23
Vcc1_5_B[51]
Y22
Vcc1_5_B[52]
Y23
Vcc1_5_B[53]
B27
Vcc3_3[1]
AG28
VccDMIPLL[1]
AB7
Vcc1_5_A[1]
AC6
Vcc1_5_A[2]
AC7
Vcc1_5_A[3]
AD6
Vcc1_5_A[4]
AE6
Vcc1_5_A[5]
AF5
Vcc1_5_A[6]
AF6
Vcc1_5_A[7]
AG5
Vcc1_5_A[8]
AH5
Vcc1_5_A[9]
AD2
VccSATAPLL
AH11
Vcc3_3[2]
AB10
Vcc1_5_A[10]
AB9
Vcc1_5_A[11]
AC10
Vcc1_5_A[12]
AD10
Vcc1_5_A[13]
AE10
Vcc1_5_A[14]
AF10
Vcc1_5_A[15]
AF9
Vcc1_5_A[16]
AG9
Vcc1_5_A[17]
AH9
Vcc1_5_A[18]
E3
VccSus3_3[19]
C1
VccUSBPLL
AA2
VccSus1_05/VccLAN1_05[1]
Y7
VccSus1_05/VccLAN1_05[2]
ICH7M-DH
VCC AUX
VccSus3_3/VccLAN3_3[1]
VccSus3_3/VccLAN3_3[2]
VccSus3_3/VccLAN3_3[3]
VccSus3_3/VccLAN3_3[4]
VCCA3GP
VccSus3_3/VccSusHDA
ARX ATX
ICH7-M
PARTE
USB CORE
Vcc1_05[10]
Vcc1_05[11]
CORE IDE PCI USB
Vcc1_05[12]
Vcc1_05[13]
Vcc1_05[14]
Vcc1_05[15]
Vcc1_05[16]
Vcc1_05[17]
Vcc1_05[18]
Vcc1_05[19]
Vcc1_05[20]
Vcc3_3/VccHDA
V_CPU_IO[1]
V_CPU_IO[2]
V_CPU_IO[3]
VccSus3_3[1]
VccSus3_3[2]
VccSus3_3[3]
VccSus3_3[4]
VccSus3_3[5]
VccSus3_3[6]
VccSus3_3[7]
VccSus3_3[8]
VccSus3_3[9]
VccSus3_3[10]
VccSus3_3[11]
VccSus3_3[12]
VccSus3_3[13]
VccSus3_3[14]
VccSus3_3[15]
VccSus3_3[16]
VccSus3_3[17]
VccSus3_3[18]
Vcc1_5_A[19]
Vcc1_5_A[20]
Vcc1_5_A[21]
Vcc1_5_A[22]
Vcc1_5_A[23]
Vcc1_5_A[24]
Vcc1_5_A[25]
VccSus1_05[1]
VccSus1_05[2]
VccSus1_05[3]
Vcc1_5_A[26]
Vcc1_5_A[27]
Vcc1_5_A[28]
Vcc1_5_A[29]
Vcc1_5_A[30]
Vcc1_05[1]
Vcc1_05[2]
Vcc1_05[3]
Vcc1_05[4]
Vcc1_05[5]
Vcc1_05[6]
Vcc1_05[7]
Vcc1_05[8]
Vcc1_05[9]
Vcc3_3[3]
Vcc3_3[4]
Vcc3_3[5]
Vcc3_3[6]
Vcc3_3[7]
Vcc3_3[8]
Vcc3_3[9]
Vcc3_3[10]
Vcc3_3[11]
Vcc3_3[12]
Vcc3_3[13]
Vcc3_3[14]
Vcc3_3[15]
Vcc3_3[16]
Vcc3_3[17]
Vcc3_3[18]
Vcc3_3[19]
Vcc3_3[20]
Vcc3_3[21]
VccRTC
5
L11
L12
L14
L16
L17
L18
M11
M18
P11
P18
T11
T18
U11
U18
V11
V12
V14
V16
V17
V18
V5
V1
W2
W7
U6
R7
AE23
AE26
AH26
AA7
AB12
AB20
AC16
AD13
AD18
AG12
AG15
AG19
A5
B13
B16
B7
C10
D15
F9
G11
G12
G16
W5
P7
A24
C24
D19
D22
G19
K3
K4
K5
K6
L1
L2
L3
L6
L7
M6
M7
N7
AB17
AC17
T7
F17
G17
AB8
AC8
K7
C28
G20
A1
H6
H7
J6
J7
0.1UF_0402
0.1UF_0402
1000u_6.3V
0.1UF_0402
0.1UF_0402
C479
0.1UF_0402
C534
0.1UF_0402
C422
0.1UF_0402
C523
0.1UF_0402
4
+
1 2
EC47
C455
C485
C445
C458
0.1UF_0402
C442
C529
0.1UF_0402
C466
0.1UF_0402
0.1UF_0402
C537
0.1UF_0402
C429
C535
0.1UF_0402
C541
0.1UF_0402
C540
0.1UF_0402
C482
0.1UF_0402
C546
C538
0.1UF_0402
Near A5,B7,C10
C427
1U10V_0603
C502
1U10V_0603
C533
0.1UF_0402
C446
4.7U10V_0805
C526
0.1UF_0402
V_1P5_CORE
V_FSB_VTT
VCC3_SB
VCC3
VCC3_SB
V_FSB_VTT
VCC3
VCC3
VBAT
VCC3_SB
V_1P5_CORE
3
Internal LAN power-off
in S3-S5.
Following Intel
schematic checklist.
2
U23F
A4
VSS[0]
A23
VSS[1]
B1
VSS[2]
B8
VSS[3]
B11
VSS[4]
B14
VSS[5]
B17
VSS[6]
B20
VSS[7]
B26
VSS[8]
B28
VSS[9]
C2
VSS[10]
C6
VSS[11]
C27
VSS[12]
D10
VSS[13]
D13
VSS[14]
D18
VSS[15]
D21
VSS[16]
D24
VSS[17]
E1
VSS[18]
E2
VSS[19]
E4
VSS[21]
E8
VSS[22]
E15
VSS[23]
F3
VSS[24]
F4
VSS[25]
F5
VSS[26]
F12
VSS[27]
F27
VSS[28]
F28
VSS[29]
G1
VSS[30]
G2
VSS[31]
G5
VSS[32]
G6
VSS[33]
G9
VSS[34]
G14
VSS[35]
G18
VSS[36]
G21
VSS[37]
G24
VSS[38]
G25
VSS[39]
G26
VSS[40]
H3
VSS[41]
H4
VSS[42]
H5
VSS[43]
H24
VSS[44]
H27
VSS[45]
H28
VSS[46]
J1
VSS[47]
J2
VSS[48]
J5
VSS[49]
J24
VSS[50]
J25
VSS[51]
J26
VSS[52]
K24
VSS[53]
K27
VSS[54]
K28
VSS[55]
L13
VSS[56]
L15
VSS[57]
L24
VSS[58]
L25
VSS[59]
L26
VSS[60]
M3
VSS[61]
M4
VSS[62]
M5
VSS[63]
M12
VSS[64]
M13
VSS[65]
M14
VSS[66]
M15
VSS[67]
M16
VSS[68]
M17
VSS[69]
M24
VSS[70]
M27
VSS[71]
M28
VSS[72]
N1
VSS[73]
N2
VSS[74]
N5
VSS[75]
N6
VSS[76]
N11
VSS[77]
N12
VSS[78]
N13
VSS[79]
N14
VSS[80]
N15
VSS[81]
N16
VSS[82]
N17
VSS[83]
N18
VSS[84]
N24
VSS[85]
N25
VSS[86]
N26
VSS[87]
P3
VSS[88]
P4
VSS[89]
P12
VSS[90]
P13
VSS[91]
P14
VSS[92]
P15
VSS[93]
P16
VSS[94]
P17
VSS[95]
P24
VSS[96]
P27
VSS[97]
ICH7M-DH
ICH7-M PART F
VSS[98]
VSS[99]
VSS[100]
VSS[101]
VSS[102]
VSS[103]
VSS[104]
VSS[105]
VSS[106]
VSS[107]
VSS[108]
VSS[109]
VSS[110]
VSS[111]
VSS[112]
VSS[113]
VSS[114]
VSS[115]
VSS[116]
VSS[117]
VSS[118]
VSS[119]
VSS[120]
VSS[121]
VSS[122]
VSS[123]
VSS[124]
VSS[125]
VSS[126]
VSS[127]
VSS[128]
VSS[129]
VSS[130]
VSS[131]
VSS[132]
VSS[133]
VSS[134]
VSS[135]
VSS[136]
VSS[137]
VSS[138]
VSS[139]
VSS[140]
VSS[141]
VSS[142]
VSS[143]
VSS[144]
VSS[145]
VSS[146]
VSS[147]
VSS[148]
VSS[149]
VSS[150]
VSS[151]
VSS[152]
VSS[153]
VSS[154]
VSS[155]
VSS[156]
VSS[157]
VSS[158]
VSS[159]
VSS[160]
VSS[161]
VSS[162]
VSS[163]
VSS[164]
VSS[165]
VSS[166]
VSS[167]
VSS[168]
VSS[169]
VSS[170]
VSS[171]
VSS[172]
VSS[173]
VSS[174]
VSS[175]
VSS[176]
VSS[177]
VSS[178]
VSS[179]
VSS[180]
VSS[181]
VSS[182]
VSS[183]
VSS[184]
VSS[185]
VSS[186]
VSS[187]
VSS[188]
VSS[189]
VSS[190]
VSS[191]
VSS[192]
VSS[193]
VSS[194]
P28
R1
R11
R12
R13
R14
R15
R16
R17
R18
T6
T12
T13
T14
T15
T16
T17
U4
U12
U13
U14
U15
U16
U17
U24
U25
U26
V2
V13
V15
V24
V27
V28
W6
W24
W25
W26
Y3
Y24
Y27
Y28
AA1
AA24
AA25
AA26
AB4
AB6
AB11
AB14
AB16
AB19
AB21
AB24
AB27
AB28
AC2
AC5
AC9
AC11
AD1
AD3
AD4
AD7
AD8
AD11
AD15
AD19
AD23
AE2
AE4
AE8
AE11
AE13
AE18
AE21
AE24
AE25
AF2
AF4
AF8
AF11
AF27
AF28
AG1
AG3
AG7
AG11
AG14
AG17
AG20
AG25
AH1
AH3
AH7
AH12
AH23
AH27
1
near A1
Title
Size Document Number Rev
8
7
6
5
4
3
Date: Sheet
MICRO-STAR INt'L CO. , LTD.
ICH7M - Power
Custom
MS-9631
2
1.0
of
14 37 Monday, February 13, 2006
1
Page 15
Clock Generator VTT Power Down Block
VCC3
D D
VCC3
C C
B B
8
FB3 80L3_100_0805
CB2
0.1u_0402
FB2 80L3_100_0805
CB1
0.1u_0402
SMBDATA_MAIN 13,16,19,20,28
SMBCLK_MAIN 13,16,19,20,28
FP_RST# 13,26
DEV_RST# 7,16,22,28
ATADET0 29
IN
IN
BI
LPC_AD0 12,16,22
BI
LPC_AD1 12,16,22
BI
LPC_AD2 12,16,22
C366
10U10V_0805
C323
10U10V_0805
VCC3
IN
R490 100R
VCC3VB
C387
0.1u_0402
VCC3VA
SMBDATA_MAIN
BI
SMBCLK_MAIN
BI
R344 X_2.2K_0402
R329 33R_0402
VCC3
PRES3
PRES2
PRES1
ATADET0
FWH_WP#
FWH_ID0
R390
10K_0603
Change to DEV_RST# 2005.3.21
FWH DECOUPLING CAPACITORS
VCC3
1 2
1 2
C383
1U16V_0805
A A
C392
1U16V_0805
0.1u_0603
Place Cap. as Close to FWH< 350 mil
8
C382
C393
0.1u_0603
7
Clock Generator - ICS954129
U18
43 44
C363
0.1u_0402
C389
0.1u_0402
C386
0.1u_0402
0.1u_0402
C390
0.1u_0402
C319
0.1u_0402
C318
0.1u_0402
VDDCPU CPU0#
40
GND
28
VDDSRC
34
VDDPCIE
0.1u_0402
C322
20
GND
25
GND
29
GND
37
VDDA
38
VSSA
56
VDDPCI
1
GND
5
VDDPCI
4
GND
10
VDD48
**SEL24_48#/24_48MHz
13
GND
48
VDDREF
51
GND
46
SDATA
47
SCLK
53
Reset#
ICS954129
* Slave Address = 0XD2
Firware Hub (FWH)
BIOS1
1
VPP
2
RST#
3
FGPI3
4
FGPI2
5
FGPI1
6
FGPI0
7
WP#
8
TBL#
9
ID3
10
ID2
11
ID1
12
ID0
13
FWH0
14
FWH1
15
FWH2
16 17
GND FWH3
SST49LF004A
<Priority>
7
32
VCC
31
CLK
30
FGPI4
29
IC(VIL)
28
GNDA
27
VCCA
26
GND
25
VCC
24
INIT#
23
FWH4
22
RFU
21
RFU
20
RFU
19
RFU
18
RFU
If you place the jumper very closed to FWH b i os socket ,
please use the same clock with FWH. But if you can not
place it so close, please use another clock to support it.
CPU0
CPU1
CPU1#
CPU2_ITP/PCIEX5
CPU2_ITP#/PCIEX5#
PCIEX0
PCIEX0#
PCIEX1 VDDPCIE
PCIEX1#
PCIEX2
PCIEX2#
SRC
SRC#
PCIEX3
PCIEX3#
PCIEX4
PCIEX4#
DOT96
DOT96#
FSLA/PCICLK_F1
FSLB/PCICLK_F2
ITP_EN/PCICLK_F0
PCI0
~PCI1
PCI2
PCICLK3
*Turbo#
USB_48M
REF0/FSLC
Vtt_PwrGd#/PD
IREF
VCC3
FWH_PCLK
PRES4
FWH_INIT
6
Trace length less than 0.5inchs
CPUCLK
45
42
41
36
35
CK_PE_SRC1
17
CK_PE_SRC1#
18
CK_PE_SRC2
21 19
22
CK_PE_SRC3
23
CK_PE_SRC3#
24
CK_PE_SRC4
26
CK_PE_SRC4#
27
CK_PE_SRC5
31
CK_PE_SRC5#
30
CK_PE_SRC6
33
CK_PE_SRC6#
32
CK_DOT96
14
CK_DOT96#
15
8
9
7
54
55
2
3
6
12
11
52
50
X1
49
X2
16
39
R327 33R_0402
CPUCLK#
MCHCLK
MCHCLK#
R297 33R_0402
R311 33R_0402
R296 33R_0402
R310 33R_0402
R309 33R_0402
R308 33R_0402
R307 33R_0402 C310 10P50V_0402
R306 33R_0402
R334 33R_0402
R333 33R_0402
R336 33R_0402
R335 33R_0402
PCI clock follow routing direction
R299 33R_0402
R298 33R_0402
CLK_FSA
CLK_FSB
ITP_EN
PCICLK2
PCICLK1
PCICLK0 PCI_CLK0
1394CLK
USB48
CLK_FSC
PLL_XI
PLL_XO
IREF
R302 33R_0402
R290 33R_0402
R303 15R_0402 C388
R330 33R_0402
R331 33R_0402
R305 33R_0402
R304 33R_0402
R291 33R_0402
R300 33R_0402
R301 33R_0402
R328 33R_0402
Y1
14.318MHZ32P_D
IN
R349 475_1%_0603
33R_0402 R326
33R_0402 R325
33R_0402 R324
51P50V_0603 C378
51P50V_0603 C372
CLK_EN# 31
5
CK_H_CPU
CK_H_CPU#
CK_H_MCH
CK_H_MCH#
CK_PE_100M_16PORT
CK_PE_100M_16PORT#
CK_SATA2
CK_SATA2# CK_PE_SRC2#
CK_PE_100M_MCH
CK_PE_100M_MCH#
CK_ICHSATA
CK_ICHSATA#
CK_PE_100M_ICH
CK_PE_100M_ICH#
CK_PE_100M_LAN
CK_PE_100M_LAN#
CK_96M_DREF
CK_96M_DREF#
SIO_PCLK
ICH_PCLK
FWH_PCLK
PCI_CLK2
PCI_CLK1
1394_PCLK
ICH_14M
1394CLK
OUT
CK_96M_DREF 7
OUT
CK_96M_DREF# 7
OUT
SIO_PCLK 16
OUT
ICH_PCLK 12
OUT
PCI_CLK2 24
OUT
PCI_CLK1 24
OUT
PCI_CLK0 24
OUT
1394_PCLK 30
IN
THERM# 13,31
OUT
USB_48 13
OUT
SIO_48 16
OUT
ICH_14M 13
R292 33R_0402
OUT
CK_H_CPU 3
OUT
CK_H_CPU# 3
OUT
CK_H_MCH 6
OUT
CK_H_MCH# 6
OUT
CK_PE_100M_16PORT 23
OUT
CK_PE_100M_16PORT# 23
OUT
CK_SATA2 19
OUT
CK_SATA2# 19
OUT
CK_PE_100M_MCH 7
OUT
CK_PE_100M_MCH# 7
OUT
CK_ICHSATA 12
OUT
CK_ICHSATA# 12
OUT
CK_PE_100M_ICH 13
OUT
CK_PE_100M_ICH# 13
OUT
CK_PE_100M_LAN 18
OUT
CK_PE_100M_LAN# 18
Clock Gen pin16 connect to CLK_EN# 2005.5.9
R491
10K
I
N
FWH_INIT 12
BI
LPC_FRAME# 12,16,22
BI
LPC_AD3 12,16,22
FWH_PCLK
FWH_WP
Close
Open
R337
Locked
Unlocked
R396 change to POP 2005.3.21
PCI_CK_33M_LPC_HDR
10R_0603
FWH write protect
BIOS_WP1
X_YJ102
BIOS_WP# 13
DEV_RST#
LPC_AD0
LPC_AD1
LPC_AD2
LPC_AD3
LPC_FRAME#
FWH_WP#
1
2
R396
IN
100R
JLPC1
VCC5 VCC3
2
4
6
8
12
14
JLPC1
1
3
5
7
9
11
13
JLPC1 need to near BIOS
FWH Resistors
default is high
6
FWH_WP#
PRES1
PRES2
PRES3
PRES4
FWH_INIT
RN24 8P4R-1KR
1 2
3 4
5 6
7 8
R338 1K_0603
R404 X_8.2KR
5
VCC3
VCC3
ITP_EN
FWH_ID0
4
Connect to SATA2
chip
OUT
TPM_CLK 22
R277 10K_0402
4
3
CK_H_CPU
CK_H_CPU#
CK_H_MCH
CK_H_MCH#
CK_PE_100M_ICH
CK_PE_100M_ICH#
CK_PE_100M_LAN#
CK_PE_100M_LAN
CK_ICHSATA#
CK_ICHSATA
CK_PE_100M_MCH
CK_PE_100M_MCH#
CK_PE_100M_16PORT
CK_PE_100M_16PORT#
CK_SATA2
CK_SATA2#
CK_96M_DREF
CK_96M_DREF#
49.9R1%_0402 R342
49.9R1%_0402 R341
49.9R1%_0402 R340
49.9R1%_0402 R339
49.9R1%_0402 R346
49.9R1%_0402 R345
49.9R1%_0402 R347
49.9R1%_0402 R348
49.9R1%_0402 R280
49.9R1%_0402 R281
49.9R1%_0402 R283
49.9R1%_0402 R282
49.9R1%_0402 R287
49.9R1%_0402 R286
49.9R1%_0402 R285
49.9R1%_0402 R284
49.9R1%_0402 R289
49.9R1%_0402 R288
2
FWH_PCLK
PCI_CLK2
PCI_CLK0
PCI_CLK1
ICH_PCLK
1394_PCLK
SIO_PCLK
USB_48
ICH_14M
SIO_48
C312 X_10P50V_0402
C396 X_10P50V_0402
C321 X_10P50V_0402
C397 X_10P50V_0402
C302 X_10P50V_0402
C320 X_10P50V_0402
C311 10P50V_0402
C309 10P50V_0402
C395 X_10P50V_0402
EMC HF filter capacitors, located close to PLL
Change C311 to POP for EMI 2005.5.16
CPU
(FSLC,FSLB,FSLA)
( 0 , 0 , 0 )
( 0 , 0 , 1 )
( 0 , 1 , 0 )
( 0 , 1 , 1 )
( 1 , 0 , 0 )
( 1 , 1 , 0 )
( 1 , 1 , 1 )
IN
BSEL0 3,7
IN
BSEL1 3,7
IN
BSEL2 3,7
BSEL0
BSEL1
BSEL2
266.66
133.33
200.00
166.66
333.33
100.00
400.00
R276
1KR0402
R275
1KR0402
R343
1KR0402
MHz
CLK_FSA
CLK_FSB
CLK_FSC
PCIEX
MHz
100.00
100.00
100.00
100.00
100.00 33.33
100.00( 1 , 0 , 1 )
100.00
RESERVED
Modify BSEL 0~2 to remove Jumper J4&J5 2005.5.16
Title
Size Document Number Rev
3
Date: Sheet
MICRO-STAR INt'L CO. , LTD.
ICS954129 Gen & FWH
Custom
2
MS-9631
PCI
MHz
33.33
33.33
33.33
33.33
33.33
33.33
1
1.0
of
15 37 Monday, February 13, 2006
1
Page 16
8
DEV_RST# 7,15,22,28
SIO_PCLK 15
BI
SERIRQ 13,22
LPC_DRQ#0 12
LPC_FRAME# 12,15,22
SIO_PME# 13
LPC_AD0
CPUFAN_PWM 29
AUXFAN_PWM 29
SMBDATA_MAIN 13,15,19,20,28
SMBCLK_MAIN 13,15,19,20,28
VCC3_SB
0.1u_0402
VCC3
BI
BICPU_TMPA 3
LPC_+12VIN
CPUFANOUT0, AUXFANOUT
are default PWM mode
CPUFANOUT0, CPUFANOUT1
support SmartFAN III
CPU_FAN 29
AUX_FAN 29
BI
BI
PWRBTN# 13
PWRBTIN 26
SLP_S3# 13,28,31
SIO_48 15
C3
CP2 X_COPPER
LPC_AD1
LPC_AD2
LPC_AD3
VCC3
0.1u_0402
R30 10R
R32 10R
OUTPS_ON# 26
VBAT
TMP_VREF
AUX_TMP
SYS_TMP
R34 10KR0402-1
LPC_5VIN
R36 10KR0402-1
R39 10KR0402-1
0R_0402 R52
0R_0402 R47
X_0R_0402 R51
X_0R_0402 R48
CHASSIS
PWRBTN#
C50
C65
0.1u_0402
LPC_AD[0..3] 12,15,22
D D
Change 1.0: 2005/09/15
Add R565; R564; R566.
VCC_DDR2
V_1P5_CORE
VCORE
Need to Close the Pin
C C
B B
1 2
1 2
1 2
PS_ON#
S2DA1
S2CK1
WDTO#
7
U2
30
LRESET#
21
PCICLK
23
SERIRQ
22
LDRQ#
29
LFRAME#
86
PME#
27
LAD0
26
LAD1
25
LAD2
24
LAD3
125
GP13/GPX2
123
GP15/GPY1
128
GP10/GPSA1
121
GP17/GPSA2
126
GP12/GPX1
124
GP14/GPY2
127
GP11/GPSB1
122
GP16/GPSB2
101
VREF
102
AUXTIN
103
CPUTIN
104
SYSTIN
93
RSTOUT1#
94
RSTOUT0#
95
VIN4
96
VIN3
97
VIN2
98
VIN1
99
VIN0
100
CPUVCORE
105
VID5
106
VID4
107
VID3
108
VID2
109
VID1
110
VID0
112
CPUFANIN0
115
CPUFANOUT0
119
CPUFANIN1/GP21/MSI
120
CPUFANOUT1/GP20/MSO
113
SYSFANIN
116
SYSFANOUT
111
AUXFANIN0
58
AUXFANIN1/SO
7
AUXFANOUT
76
CASEOPEN#
89
RSTOUT3#/GP33/SDA
90
RSTOUT2#/GP32/SCL
91
GP31
92
GP30
64
GP37
67
PSOUT#/GP57
68
PSIN/GP56
72
PSON#/GP53
73
SUSB#/GP52
18
IOCLK
61
3VSB
74
VBAT
28
3VCC
12
3VCC
48
3VCC
77
EN_VRM10/WDTO#/GP50
114
AVCC
W83627EHG-H
DRVDEN0
INDEX#
MOA#
DSA#
DIR#
STEP#
WD#
WE#
TRAK0#
WP#
RDATA#
HEAD#
DSKCHG#
GP23/SCK
OVT#/HM_SMI#
SLCT
BUSY
ACK#
SLIN#
INIT#
ERR#
AFD#
STB#
GP34/RSTOUT4#
GP36
GP35
GP55/SUSLED
GP61/DCDA#
GP66/DSRA#
GP63/SINA
GP65/HEFRAS/RTSA#
GP62/PENKBC/SOUTA
GP67/CTSA#
GP64/PENROM/DTRA#
GP60/RIA#
GP41/DCDB#
GP46/DSRB#
GP43/IRRX/SINB
GP45/RTSB#
GP42/IRTX/SOUTB
GP47/CTSB#
GP44/DTRB#
GP40/RIB#
GA20M
KBRST
GP26/KDAT
GP27/KCLK
GP24/MDAT
GP25/MCLK
SI/BEEP
GP51/RSMRST#
GP54/PWROK
GND
GND
GP22/SCE#
AGND
6
1
3
4
6
8
9
10
11
13
14
15
16
17
2
5
42
PD0
41
PD1
40
PD2
39
PD3
38
PD4
37
PD5
36
PD6
35
PD7
31
32
PE
33
34
43
44
45
46
47
88
69
87
70
56
50
53
RTSA#
51
SOUTA
54
49
DTRA#
52
57
DCDB#
84
DSRB#
79
SINB
82
80
SOUTB
83
CTSB#
78
81
RIB#
85
59
60
KBDAT#
63
KBCLK#
62
MSDAT#
66
MSCLK#
65
BEEP
118
75
71
20
55
19
117
VTIN_GND
SIO_OVT# 13
A20GATE 12
KBRST# 12
5
MSDAT#
MSCLK#
KBDAT#
KBCLK#
4
+12V
22KR
R38 56KR1%
LPC_5VIN
R35
R37
10K_0603
VCC3_SB
VCC5
Fix EMI issue to near by C42
11-17-2005
VCC5
246
8
RN1
8P4R-1KR
135
7
R46
10K_0603
VTIN_GND
FB1 X_0R
CP1 X_COPPER
C614
X_ 0.1uF
TMP_VREF
R44
10K_1%_0603
AUX_TMP
RT1
10K_1%_0805
VTIN_GND
NOTE: LOCATE CLOSE
STATUS PANEL
3
LPC_+12VIN
TMP_VREF
R45
10K_1%_0603
TMP_VREF
R40
15KR1%0402
CPU_TMPA
VTIN_GND
SYS_TMP
VTIN_GND
J1
1
2
YJ102
C61
2200P16V_0603
change 1.0 : 2005/09/15
change C61 to 2200P for
786NR
2
1
CP5 X_COPPER
CP6
X_COPPER
KBGND
CP7
X_COPPER
KBGND
IR HEADER
X_IRDA1
1
VCC5
3 4
IR
NOPOP
SINB SOUTB
6 5
Change VBAT0 to VBAT 2005.3.21
LPC I/O STRAPPING RESISTOR
WDTO#
R16 X_1K
SOUTA
48MHz
VCC3
R7 X_4.7KR
R4 4.7K_0603
R26 4.7K_0603
R5 4.7K_0603
SOUTB
4E
RTSA# CHASSIS
DTRA#
Disable SPI
A A
8
H: Enable KBC
H: 48MHZ
H: CFAD=4E
H: Enable SPI DTRA#
SOUTA
L: Disable KBC
L: 24MHZ
SOUTB
L: CFAD=2E
RTSA#
L: Disable SPI
EN_VRM10 L: TTL Level L: VRM10 Level
VCC3
VCC3_SB
7
R3 X_4.7KR0402
R8 4.7KR0402
Disable KBC
R22 4.7K
JCI1
X_H1X2_black
WDTO#
VCC5
6
Chasiss Intrusion
VBAT
R14
1MR0402
1
2
1
2
C48
0.1u_0603
C66
0.1u_0603
C4
X_0.1u_0603
OUT
0R_0402 R50
0R_0402 R49
C19
X_0.1u_0603
CHASSIS 24
VBAT
5
SYSFAN_PWR 29
CPUFAN_PWR 29
BITHERMDC 3
VTIN_GND
VCC5 VCC5
R55
4.7KR0402
BEEP
R53
X_4.7KR0402
Ver C: POP R53, Q7, R65, R55
NOPOP R54
Ver G,H: POP R55, R54
NOPOP R53,Q7,R65
4
R54
4.7KR0402
VCC5
RN2
SINB
1
DCDB#
R65
X_4.7KR0402
B
C E
Q7
B
X_2N3904S
3
C E
Q8
2N3904S
OUT
ALARM 26
Title
LPC - W83627EHF
Size Document Number Rev
Custom
Date: Sheet
2
DSRB#
CTSB#
RIB#
fix IR issue
MICRO-STAR INt'L CO. , LTD.
MS-9631
2
3
4
5
6
7
8
X_8P4R-4.7KR
R29 X_4.7KR
1.0
of
16 37 Monday, February 13, 2006
1
Page 17
Modify pin 2,3 to GPIO
AC_SDOUT 12
IN
AC_BITCLK 12
OUTAC_SDIN0 12
AC_SYNC 12
AC_RST# 12
C313
22P50V_0603
SPKR 13,26
D15
1N4148S
C381
0.1u_0603
PORT-E fix to ear-phone
EC33
+
ELS10/16-B
R313 X_0R_0603
R295 X_5.1KR1%
R279 39R_0402
C304
C303
22P50V_0603
10P50V_0603
47K_0603
3 2
+
EC40
X_10U/16V/S
CEN_OUT
C370 4.7U10V_0805
BASS
C371 4.7U10V_0805
SPDIFO
VCC3
0.1u_0402
C364
1
2
3
4
5
6
7
8
9
10
11
C294
X_0.1u_0603
12
R270
GNDF
X_5.1KR1%
EC27
EC26
EC25
EC24
R318
100_1%_0603
R317
300_1%_0603
C300
10P50V_0603
C298 0.1u_0603 R271 47K_0603
R274
PORTE_L
100U/16V
PORTE_R
100U/16V
PORTF_L
100U/16V
PORTF_R
100U/16V
AUDIO CODE REGULATORS
U19
YLT1087S-0.8A
VIN VOUT
ADJ
1
DVDDCORE
GPIO0
GPIO1
DVSS
SDO
BCLK
DVSS
SDI
DVDDCORE
SYNC
RESET#
PCBEEP
SENSE_A
4847464544424140394338
SPO
AVSS2
SPI/EAPD
JACKH_L/VROC2
JACKG_L/VROD2
JACKH_R/VROB2
JACKG_R/VROA2
SENSE A
JACKE_L
JACKE_R
JACKF_L
JACKF_R
CD_L
CD_C
1314151617181920212223
AVDD5
+
EC38
ELS10/16-B
GNDF
GNDF
R315 20K_1%_0603
37
VROA
VROH
AVDD2
JACKA_L
JACKA_R
JACKD_R
JACKD_L
SENSE B
CD_R
JACKB_L
JACKB_R
JACKC_L
JACKC_R
ALC880
24
C295 1U10V_0603
C296 1U10V_0603
C297 1U10V_0603
VCC5_SB +12V
C365
X_0.1u_0603
C369 4.7U10V_0805
C368 4.7U10V_0805
AVDD5
GNDF
U17
36
35
34
33
VROG
32
VROD
31
VROE
30
VROF
29
VROC
28
VROB
27
VREF
26
AVSS1
25
AVDD1
C289 1U16V_0805
C288 1U16V_0805
C292 1U16V_0805
C293 1U16V_0805
D14
1N5817
C358
0.1u_0603
SENSE_B
VROE
VROF
VROB
C291
0.1u_0603
7 8
SROUT_R
SROUT_L
1 23 45 6
RN23
X_8P4R-47KR
AVDD5
R264 X_0R
EC32
C10U16EL
RN22
1 2
3 4
5 6
7 8
8P4R-47KR
R312
10KR
LINE_OUT_R
LINE_OUT_L
LINE_IN_R
LINE_IN_L
ACMIC2
MIC_97
GNDF
ACMIC2_A
C308
1U16V_0805
GNDF
CD-L
CD-R
CD-G
100U/16V
100U/16V
SW_G
EC37
EC35
JCD1
4
3
2
1
AUDIO-CDIN1X4
SENSE_B
R278
10K_1%_0603
LOUT_R
LOUT_L
SW_A
SPDIF
CP3 X_COPPER
1 2
SPDIFO
L20 X_301/6
LINE_IN_R
LINE_IN_L
LOUT_R
LOUT_L
ACMIC2
MIC_97
R272
39.2K_1%_0603
SW_B
R243 X_0R
2 1
R258
20K_1%_0603
C305
560P50V_0603
SW_C
D10
3
S-BAT54A_SOT23
D9
3
S-BAT54A_SOT23
D11
3
S-BAT54A_SOT23
SPDIF
1 2
R257
10K_1%_0603
SW_D
4.7K_0603
SOT23
R216
2
4.7K_0603
R213
1
SOT23
R197 4.7K_0603
2
R198 4.7K_0603
1
SOT23
ACMIC2_A
2
R266 4.7K_0603
1
4.7K_0603
R265
SENSE_A
470P50V_0603 C278
R245
5.1K1%_0603
PORTE_R
PORTE_L
PORTF_R
PORTF_L
470P50V_0603 C286
ACMIC2
MIC_97
470P50V_0603 C290
470P50V_0603 C280
C373 X_0.1u_0603
GNDF
C255 X_0.1u_0603
GNDF
C282 X_0.1u_0603
GNDF
GNDF
X_COPPER
470P50V_0603 C299
470P50V_0603 C301
CP8
PORTF_R
PORTF_L
PORTE_R
SENSE_B
PORTE_L
1 23 45 6
7 8
GNDF
JAUD1
GNDF
1 2
3 4
6
7
9510
BH-2X5_cream white-2pitch
RN21
X_8P4R-47KR
SW_F
SW_E
R221
39.2K_1%_0603
GNDF
R215
20K_1%_0603
LINE_IN_R
LINE_IN_L
ACMIC2
MIC_97
SW_B
GNDF
BASS
X_COPPER
CEN_OUT
CP9
SROUT_R
Port/Func Signals Pin
LINE_IN_R
LINE_IN_L
Port_C
SW_C
ACMIC2
Port_B
MIC_97
SW_B
SOUT_L
Port_D
SOUT_R
SW_D
SROUT_L
Port_A
SROUT_R
SW_A
BASS
Port_G
CEN_OUT
SW_G
SPDIF SPDIF
VCC5
J4
1 2
3
5
9
11
15 16
17 18
19 20
BH2X10_black-2pitch
Pin 1
Pin 3
Pin 2
Pin 5
Pin 7
Pin 9
Pin 4
Pin 6
Pin 8
Pin 20
Pin 19
Pin 16
Pin 15
Pin 17
Pin 18
Pin 10
Pin 14
4
6
8 7
10
12
14
SW_C
LOUT_L
LOUT_R
SW_D
SPDIF
GNDF
SW_A
SW_G
SROUT_L
C367
0.1u_0603
VCC5
FS3
1.1A-microSMD110-S
POLY SWITCH
BASS
CEN_OUT
SROUT_R
SROUT_L
C377
470P50V_0603
C376
470P50V_0603
C375
470P50V_0603
C374
470P50V_0603
Title
Size Document Number Rev
Date: Sheet
MICRO-STAR INt'L CO. , L T D .
Audio - ALC880
Custom
MS-9631
17 37 Monday, February 13, 2006
of
1.0
Page 18
8
7
0.01U25V_0402
C230
0.1U16V_0402
C241
0.1U16V_0402
C226
U12
6
AVDD25_LAN
A2A3A7D9F3J4M2
M10N6N8P2P12
A11B6G3G5H4H5J12J5K13
L12M4N7B1B2
5
A10C4C5
4
AVDD12_LAN AVDD25_LAN VCC3_SB
F12
G12
G13G6H11
H12H6H7H8J10
J11J6J7J8J9
K10
K11K3K4K5K6K7K8K9L5L9L10
3
4.7U10V_0805
2
AVDD25_LAN VCC3_SB AVDD12_LAN
C239
4.7U10V_0805
C248
C170
0.1U16V_0402
0.1U16V_0402
C174
0.1U16V_0402
C247
C257
C10U6.3X50805
0.1U16V_0402
C229
0.1U16V_0402
C173
1
C210
C240
4.7U10V_0805
0.1U16V_0402
Close LAN
D D
PCIE_RP1 13
PCIE_RN1 13
PCIE_TN1 13
PCIE_TP1 13
CK_PE_100M_LAN 15
CK_PE_100M_LAN# 15
PCIE_RP1
OUT
PCIE_RN1
OUT
IN
IN
WAKE# 13,23
PCI_E_RST# 19,23,27,28
For iAMT
C C
VCC3
R225 X_3.3KR0402
IN
IN
OUT
IN
BISMBDATA_RESUME 13,23,24
BISMBCLK_RESUME 13,23,24
BISMB_ALERT# 13
SPI_LAN_SI
SPI_LAN_SK
PCI_E_RST#
ASF_PGD
C246 0.1u_0402
C245 0.1u_0402
SPI_LAN_SO
SPI_LAN_CS#
R201 3.3KR0402
R204 X_3.3KR0402
R180 3.3KR0402
For ASF
VCC3_SB
XTALO_LAN
25MCLK
B B
SPI_LAN_CS#
SPI_LAN_SO SPI_LAN_SO SPI_LAN_SO1
R189 47R0402
A A
8
R153 X_1M_0402
1 2
22P50V_0402
C161
VCC3_SB
R193
3.3KR0402
SPI_LAN_CS#
SPI_LAN_SO1
Co-layout with SIP
EEPROM and SIP flash
X1
25MHZ18P_D-1
22P50V_0402
C149
U13
1
CE#
VDD
2
SO
HOLD#
3
WP#
SCK
4
VSS
SI
SST25LF040A-33-4C-S2AE-RH
U14
1
CS
VCC
2
SO
HOLD
3
WP
SCK
4 5
GND SI
X_AT25010AN-10SU-2.7
8
7
6
8
7
6
5
VCC3_SB
C244
SPI_LAN_SK
SPI_LAN_SI
7
TXE_P
TXE_N
ASF_PGD
0R_0402 R226
R178 47R0402
R175 47R0402
R185
X_3.3KR0402
VCC3_SB
0.1U16V_0402
R207
3.3KR0402
SPI_LAN_SK
SPI_LAN_SI
D1
C1
F1
F2
G1
G2
P10
P7
M11
P11
N11
A9
B9
B10
C9
B4
A5
D3
A6
P4
P6
N4
N5
L3
L2
A8
B8
C8
C7
C3
N10
H1
H2
H3
J1
J2
J3
K1
L1
M1
M3
N2
P1
N3
M8
P9
E3
A14
VCC33/NC
FUSEV/NC
IREG25/NC
VCC33/VCC
IREG25/VCC
VCC33/NC#J4
VCC33/NC#F3
PETP0/NC
PETN0/NC
PERN0/NC
PERP0/NC
PECLKP/NC
PECLKN/NC
PEWAKE#/NC
PERST#/NC
SMB_DATA/NC
SMB_CLK/NC
SMB_ALRT#--ASF_PGD/NC
NVM_SI/NC
NVM_SO/NC
NVM_CS#/NC
NVM_SK/NC
NVM_REQ/NC
NVM_PROT/NC
NVM_SHRD/NC
NVM_TYPE/NC
JTDI/NC
JTDO/NC
JTMS/NC
JTCK/NC
THRMDP/NC
THRMDN/NC
SDP0/NC
SDP1/NC
SDP2/NC
SDP3/NC
DOCK_IND/NC
ALT_CLK125/NC
TESTPT_0/NC
TESTPT_1/NC
TESTPT_2/NC
TESTPT_3/NC
TESTPT_4/NC
TESTPT_5/NC
TESTPT_6/NC
TESTPT_7/NC
TESTPT_8/NC
TESTPT_9/NC
TESTPT_10/NC
TESTPT_11/NC
TESTPT_12/NC
TESTPT_13/NC
TESTPT_14/NC
TESTPT_15/NC
TESTPT_16/NC
(82573E-LF)
R212
10KR0402
VCC33/NC#M10
C260
0.1U16V_0402
C243
0.1U16V_0402
6
VCC25/NC
VCC25/VCC
VCC25/VCCR
VCC25/VCC33
VCC25/NC#H4
VCC25/NC#G3
VCC33/VCC#P2
VCC33/VCC#N6
VCC33/VCC#N8
VCC33/VCC#P12
VSS/NC
VSS
VSS#C10
VSS#C12
VSS/NC#C2
VSS#D13
VSS/NC#D2
A1B3C10
VSS#D4
C12C2D13D2D4D5D6D7D8E2E4E5E6E7E8E9E10F4F5F6F7F8F9
C267
C251
C22U6.3X1206
0.1U16V_0402
C252
C259
0.1U16V_0402
C22U6.3X1206
VCC25/NC#N7
VCC25/NC#M4
VCC25/NC#J12
VCC25/NC#L12
VCC25/VCC#K13
VCC25/VCCR#H5
VSS#D5
VSS#D6
VSS#D7
VSS#D8
VSS#E2
VSS#E4
VSS#E5
VCC3_SB
C263
C10U6.3X50805
VCC3_SB
C253
C10U6.3X50805
VCC12/NC
VCC12/VCC33
VCC12/NC#C4
VCC12/NC#C5
VCC12/NC#F12
VCC12/NC#H12
VCC25_OUT/NC
VSS#E6
VCC12/NC#G12
VCC12/VCC33#H6
VCC12/VCC33#H7
VCC12/VCC33#H8
VCC12/VCC33#G6
VCC12/VCC33#J10
VCC12/VCC33#J11
VCC25_OUT/NC#B2
VSS#E7
VSS#E8
VSS#E9
VCC12/VCC33#H11
VSS#E10
VSS#F4
VSS#F5
VSS#F6
VSS#F7
VSS#F8
VSS#F9
VSS#F10
VSS#F11
VSS/NC#G4
VSS#G7
VSS#G8
VSS#G9
F10
F11G4G7G8G9
Reserved for External Regulator
Q24
P-BCP69_SOT223
4
3 2
1
R210 4.7K_0402
Q20
P-BCP69_SOT223
R199
1R2010
R194 4.7K_0402
5
3 2
1
4
VCC12/VCC33#J6
VCC12/VCC33#J7
VCC12/VCC33#J8
VCC12/VCC33#J9
VSS#G10
VSS#G11
VSS#G14
VSS#H9
G10
G11
G14H9H10K2N1
C262
4.7U10V_0805
LAN_CTRL_25
4.7U10V_0805
LAN_CTRL_12
VCC12/VCC
VCC12/VCC33#K10
VCC12/VCC33#K11
VSS#H10
VSS#K2
VSS#N1
(298mA)
(523mA)
C211
VCC12/VCC#K4
VSS#N12
N12
4
MDIP0/TDP
VCC12/VCC33#L5
VCC12/VCC33#L9
VCC12/VCC33#K5
VCC12/VCC33#K6
VCC12/VCC33#K7
VCC12/VCC33#K8
VCC12/VCC33#K9
MDIN0/TDN
MDIP1/RDP
MDIN1/RDN
MDIP2/NC
MDIN2/NC
MDIP3/NC
MDIN3/NC
LED0#/SPDLED
LED1#/ACTLED
LED2#/LINKLED
XTAL1
XTAL2
EN25_REG/NC
CTRL_25/NC
CTRL_12/NC
DEV_OFF#/ADV10
LAN_PWRGOOD/NC
AUX_PRESENT/NC
HS_DACP/TOUT
HS_DACN/RBIAS100
PHY_TSTPT/RBIAS10
TEST_EN
PHY_REF/ISOL_T1
NC/ISOL_TEX
NC/ISOL_TEK
NC/LAN_TXD0
NC/LAN_TXD1
CLK_VIEW/LAN_TXD2
NC/LAN_RXD0
NC/LAN_RXD1
NC/LAN_RXD2
NC/LAN_RSTSYNC
NC/LAN_CLK
NC#J13
NC#L8
NC#M5
NC#M7
NC#M9
NC#N9
NC#P14
NC/VSS
NC/VCC
NC/VSS#K12
NC/VSS#L11
NC/VSS#L6
NC/VSS#M6
NC/VCC#L4
NC/VCCT
NC/VCCT#E12
VSS#P8
P8
AVDD25_LAN
C250
C258
0.1U16V_0402
0.1U16V_0402
AVDD12_LAN
C185
C184
0.1U16V_0402
0.1U16V_0402
VCC12/VCC33#L10
NC
C13
C14
E13
E14
F13
F14
H13
H14
B11
C11
A12
K14
J14
B5
A4
P3
L7
P5
C6
B12
B13
B14
A13
D12
D10
D14
M14
L13
L14
P13
N13
M12
M13
N14
D11
J13
L8
M5
M7
M9
N9
P14
B7
E1
K12
L11
L6
M6
L4
E11
E12
R219
1R0805
C10U6.3X50805
C10U6.3X50805
TR_D0+
TR_D0TR_D1+
TR_D1TR_D2+
TR_D2TR_D3+
TR_D3-
LED_LINK10/100
LED_ACT
LED_LINK1000
25MCLK
XTALO_LAN
LAN_CTRL_25
LAN_CTRL_12
I
N
I
N
R196 3.3KR0402
R172
4.99KR1%0402
VCC3_SB
LED0# = Link 100# (0110)
LED1# = Link/ACT# (0100)
LED2# = Link 1000#
(0111)
VCC3_SB
R203
X_3.3KR0402
LAN_EN 13
RSMRST# 13,28
VCC3_SB
R160
3.3KR0402
LED_LINK1000 LED_LINK1000_1
Modify LAN LED 2005.3.17
LED_ACT
LAN_LED_14
LED_LINK1000
LED_LINK10/100
R191
1R0805
C242
3
R202 3.3KR0402
AVDD25_LAN
LAN LED
R181 330R_0402
R179 330R_0402
1000P50V_0402 C208
1000P50V_0402 C221
1000P50V_0402 C228
15 16
JLAN1
LEFT
LED_ACT_Out
YELLOW
14
13
5
1
2
3
4
7
8
9
10
6
11
GREEN
12
49.9R1%_0402 R171
49.9R1%_0402 R170
49.9R1%_0402 R167 1000P50V_0402 C217 C266
49.9R1%_0402 R166
49.9R1%_0402 R165
49.9R1%_0402 R164
49.9R1%_0402 R169
49.9R1%_0402 R168
POWER
TD1+
TD1TD2+
TD2TD3+
TD3TD4+
TD4-
GND
RIGHT
ORG
CONN-RJ45_LEDX2_black-1
RN20
LED_LINK10/100_In
1
2
LED_LINK1000_In
3
4
LED_ACT_In
5
6
LAN_LED_14_In
7
8
X_8P4R-0R0402
RN19
LED_LINK10/100_Out
1
2
LED_ACT_Out
3
4
LAN_LED_14_Out
5
6
LED_LINK1000_Out
7
8
8P4R-0R0402
J3
LED_LINK1000_Out LAN_LED_14_Out
1 2
4
LED_LINK10/100_Out
5 6
H2X3(3)_black
C164 0.1u_0402
C165 0.1u_0402
C166 0.1u_0402
C167 0.1u_0402
R184 0R_0402
0.1u_0402
LAN_LED_14
LAN_LED_14_In
LED_ACT_In
TR_D0+
TR_D0TR_D1+
C225
TR_D1TR_D2+
TR_D2TR_D3+
TR_D3-
LED_LINK10/100_In
LED_LINK1000_In
Change 1.0:
Add RN62; RN63; J11
LED_LINK10/100
LED_LINK1000_1
LED_ACT
LAN_LED_14
TR_D0+
TR_D0-
TR_D1+
TR_D1-
TR_D2+
TR_D2-
TR_D3+
TR_D3-
Place these components near 82573E
Title
Size Document Number Rev
Date: Sheet
MICRO-STAR INt'L CO. , LTD.
LAN - Intel 82537E
Custom
2
MS-9631
1.0
of
18 37 Monday, February 13, 2006
1
Page 19
8
7
6
5
4
3
2
1
Y4
25MHZ18P_D-1
S2DA
S2CK
PSTXDP
PSTXDN
S2DA
S2CK
R449
10MR
20
21
25
26
30
29
34
82
83
80
87
86
2
23
33
7
10
12
15
3
19
27
32
38
75
44
67
85
1
6
11
16
22
24
28
31
35
48
60
U26
(sil3132-0.2)
RefClk+
RefClk-
PRx+
PRx-
PTx+
PTx-
PERst_N
I2C_SDA
I2C_SCLK
TRSTN
Xtal_I/ClkI
Xtal_O
VddsPLL
VddPRxPLL
VddPTxPLL
VddsTx
VddsTx
VddsTx
VddsTx
VddsRx
VddsRx
VddPRx
VddPTx
VddD
VddD
VddO
VddO
VddX
VsssPLL
VssRx
VssTx
VssRx
VssRef
VssA
VssA
VssA
VssD
VssD
VssD
Rx0+
Rx0Tx0+
Tx0-
Rx1+
Rx1Tx1+
Tx1-
LED1
LED0
Scan_Mode
TDO
TCK
TMS
FL_CS_N
FL_Wr_N
FL_Rd_N
FL_A18
FL_A17
FL_A16
FL_A15
FL_A14
FL_A13
FL_A12
FL_A11
FL_A10
FL_A09
FL_A08
FL_A07
FL_A06
FL_A05
FL_A04
FL_A03 VddD
FL_A02
FL_A01
FL_A00
FL_D7
FL_D6
FL_D5
FL_D4
FL_D3
FL_D2
FL_D1
FL_D0
EGnd
VssX
VssD
VssD
F_SATARP0
18
F_SATARN0
17
F_SATATP0
13
F_SATATN0
14
F_SATARP1
4
F_SATARN1
5
F_SATATP1
9
F_SATATN1
8
SATALED#
36
37
81
79
78
TDI
77
76
74
73
72
71
70
69
68
65
64
63
62
61
59
58
57
56
55
53
52 54
51
50
49
47
46
45
43
42
41
40
39
89
88
84
66
OUT
SATALED# 12,13,26
R451 1KR
VCC3
R450 1KR
VCC3
CK_SATA2 15
D D
CK_SATA2# 15
PCI_E_RST# 18,23,27,28
SMBDATA_MAIN 13,15,16,20,28
SMBCLK_MAIN 13,15,16,20,28
IN
IN
IN
PCIE_TP2 13
IN
PCIE_TN2 13
PCIE_RP2 13
PCIE_RN2 13
C582 0.1u_0603
OUT
C581 0.1u_0603
OUT
IN
BI
BI
R444 X_10R
R443 X_10R
R452 4.7KR
C27P50N C550
C27P50N C545
VSATA1.8
VSATA1.8
C C
VSATA1.8
VSATA1.8
VSATA1.8
VCC3
VSATA1.8
C548 0.1u_0603
C552 1U10V_0603
C557 0.1u_0603
C560 1U10V_0603
C569 0.1u_0603
C584 0.1u_0603
C577 1U10V_0603
C583 0.1u_0603
C579 1U10V_0603
C580 X_0.1u_0603
C559 0.1u_0603
C543 0.1u_0603
C530 0.1u_0603
C554 0.1u_0603
C531 0.1u_0603
SATA1
1
B B
A A
8
7
6
F_SATATP0
F_SATATN0
F_SATARN0
F_SATARP0
C572 0.01U25V_0402
C576 0.01U25V_0402
C588 0.01U25V_0402
C591 0.01U25V_0402
F_SATATP0_C
F_SATATN0_C
F_SATARN0_C
F_SATARP0_C
5
GND
2
HT+
3
HT-
4
GND
5
HR-
6
HR+
7
GND
CONN-SATA_white
4
F_SATATP1
F_SATATN1
F_SATARN1
F_SATARP1
C567 0.01U25V_0402
C561 0.01U25V_0402
C563 0.01U25V_0402
C562 0.01U25V_0402
F_SATATP1_C
F_SATATN1_C
F_SATARN1_C
F_SATARP1_C
3
SATA2
1
GND
2
HT+
3
HT-
4
GND
5
HR-
6
HR+
7
GND
CONN-SATA_white
Title
Size Document Number Rev
Date: Sheet
MICRO-STAR INt'L CO. , LTD.
Silimage 3132
Custom
MS-9631
2
of
19 37 Monday, February 13, 2006
1
1.0
Page 20
DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQ8
DQ9
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
DQ16
DQ17
DQ18
DQ19
DQ20
DQ21
DQ22
DQ23
DQ24
DQ25
DQ26
DQ27
DQ28
DQ29
DQ30
DQ31
DQ32
DQ33
DQ34
DQ35
DQ36
DQ37
DQ38
DQ39
DQ40
DQ41
DQ42
DQ43
DQ44
DQ45
DQ46
DQ47
DQ48
DQ49
DQ50
DQ51
DQ52
DQ53
DQ54
DQ55
DQ56
DQ57
DQ58
DQ59
DQ60
DQ61
DQ62
DQ63
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
68
102195156627278
18
55
NC
RC1
RC0
NC/TEST
VSS
VSS
VSS
VSS
100
103
106
109
112
VCC_DDR2
NC
VDD0
VSS
VSS
VSS
115
118
191
194
181
175
170535964197
75
VDD3
VDD1
VDD2
VDD3
VDD4
VDD5
VDD6
VDD7
VDD8
VDDQ0
VDDQ1
VDDQ2
VDDQ3
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
121
124
127
130
133
VSS
136
139
142
145
148
151
154
157
160
VCC_DDR2
DATA_A0
DATA_A5
DATA_A2
DATA_A3
DATA_A1
DATA_A4
DATA_A6
DATA_A7
DATA_A12
DATA_A8
DATA_A10
DATA_A11
DATA_A14
DATA_A13
DATA_A9
DATA_A15
DATA_A17
DATA_A21
DATA_A23
DATA_A19
DATA_A16
DATA_A20
DATA_A18
DATA_A22
DATA_A25
DATA_A24
DATA_A27
DATA_A31
DATA_A28
DATA_A29
DATA_A26
DATA_A30
DATA_A33
DATA_A34
DATA_A38
DATA_A39
DATA_A36
DATA_A37
DATA_A32
DATA_A35
DATA_A45
DATA_A41
DATA_A42
DATA_A47
DATA_A44
DATA_A40
DATA_A46
DATA_A43
DATA_A49
DATA_A52
DATA_A51
DATA_A55
DATA_A53
DATA_A48
DATA_A50
DATA_A54
DATA_A56
DATA_A61
DATA_A59
DATA_A63
DATA_A60
DATA_A57
DATA_A58
DATA_A62
DIMM2
122
123
128
129
131
132
140
141
143
144
149
150
152
153
158
159
199
200
205
206
208
209
214
215
107
108
217
218
226
227
110
111
116
117
229
230
235
236
68
102195156627278
18
55
NC
3
RC1
RC0
DQ0
4
DQ1
9
NC/TEST
DQ2
10
DQ3
DQ4
DQ5
DQ6
DQ7
12
DQ8
13
DQ9
21
DQ10
22
DQ11
DQ12
DQ13
DQ14
DQ15
24
DQ16
25
DQ17
30
DQ18
31
DQ19
DQ20
DQ21
DQ22
DQ23
33
DQ24
34
DQ25
39
DQ26
40
DQ27
DQ28
DQ29
DQ30
DQ31
80
DQ32
81
DQ33
86
DQ34
87
DQ35
DQ36
DQ37
DQ38
DQ39
89
DQ40
90
DQ41
95
DQ42
96
DQ43
DQ44
DQ45
DQ46
DQ47
98
DQ48
99
DQ49
DQ50
DQ51
DQ52
DQ53
DQ54
DQ55
DQ56
DQ57
DQ58
DQ59
DQ60
DQ61
DQ62
DQ63
2
VSS
5
VSS
8
VSS
11
VSS
14
VSS
17
VSS
20
VSS
23
VSS
26
VSS
29
VSS
32
VSS
35
VSS
38
VSS
41
VSS
44
VSS
47
VSS
50
VSS
65
VSS
66
VSS
79
VSS
82
VSS
85
VSS
88
VSS
91
VSS
94
VSS
97
VSS
VSS
VSS
VSS
VSS
100
103
106
109
112
191
194
181
175
170535964197
75
NC
VDD0
VDD1
VDD2
VDD3
VDD4
VDD5
VDD6
VDD7
VDD8
VDD3
VDDQ0
VDDQ1
VDDQ2
VDDQ3
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
115
118
121
124
127
130
133
VSS
136
139
142
145
148
151
154
157
160
DATA_A[0..63] 8
VCC3
42434849161
162
167
172
187
184
18967238
69
178
VDDQ4
VDDQ5
VDDQ6
VDDQ7
VDDQ8
VDDQ9
VDDQ4
VDDQ7
VDDSPD
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
163
VSS
166
169
198
201
204
207
210
213
216
168
CB0
CB1
CB2
CB3
CB4
CB5
CB6
CB7
7
DQS0
6
DQS0#
16
DQS1
15
DQS1#
28
DQS2
27
DQS2#
37
DQS3
36
DQS3#
84
DQS4
83
DQS4#
93
DQS5
92
DQS5#
105
DQS6
104
DQS6#
114
DQS7
113
DQS7#
46
DQS8
45
DQS8#
MAA_A0
188
A0
MAA_A1
183
A1
MAA_A2
63
A2
MAA_A3
182
A3
MAA_A4
61
A4
MAA_A5
60
A5
MAA_A6
180
A6
MAA_A7
58
A7
MAA_A8
179
A8
MAA_A9
177
A9
MAA_A10
70
A10_AP
MAA_A11
57
A11
MAA_A12
176
A12
MAA_A13
196
A13
174
A14
173
A15
SBS_A2
54
A16/BA2
SBS_A1
190
BA1
SBS_A0
71
BA0
WE_A#
73
WE#
CAS_A#
74
CAS#
RAS_A#
192
RAS#
125
DM0/DQS9
126
NC/DQS9#
134
DM1/DQS10
135
NC/DQS10#
146
DM2/DQS11
147
NC/DQS11#
155
DM3/DQS12
156
NC/DQS12#
202
DM4/DQS13
203
NC/DQS13#
211
DM5/DQS14
212
NC/DQS14#
223
DM6/DQS15
224
NC/DQS15#
232
DM7/DQS16
233
NC/DQS16#
164
DM8/DQS17
165
NC/DQS17#
195
ODT0
77
ODT1
SCKE_A0
52
CKE0
SCKE_A1
171
CKE1
SCS_A#0
193
CS0#
SCS_A#1
76
CS1#
P_DDR2_A
185
CK0(DU)
N_DDR2_A
186
CK0#(DU)
CK1#(CK0#)
CK2#(DU)
VSS
VSS
VSS
VSS
VSS
219
222
225
228
231
CK1(CK0)
CK2(DU)
SCL
SDA
VREF
SA0
SA1
SA2
VSS
VSS
VSS
_DDRII-240_Green
234
237
P_DDR0_A
137
N_DDR0_A
138
P_DDR1_A
220
N_DDR1_A
221
SMBCLK_MAIN
120
SMBDATA_MAIN
119
DIMM_VREF_A
1
239
240
101
DQS_A0 8
DQS_A#0 8
DQS_A1 8
DQS_A#1 8
DQS_A2 8
DQS_A#2 8
DQS_A3 8
DQS_A#3 8
DQS_A4 8
DQS_A#4 8
DQS_A5 8
DQS_A#5 8
DQS_A6 8
DQS_A#6 8
DQS_A7 8
DQS_A#7 8
MAA_A[0..13] 8,21
BI SBS_A2 8,21
BI SBS_A1 8,21
BI SBS_A0 8,21
BI WE_A# 8,21
BI CAS_A# 8,21
BI RAS_A# 8,21
BI DQM_A0 8
BI DQM_A1 8
BI DQM_A2 8
BI DQM_A3 8
BI DQM_A4 8
BI DQM_A5 8
BI DQM_A6 8 BI DQM_B7 8
BI DQM_A7 8
ODT_A0
ODT_A1
BI SCKE_A0 7,21
BI SCKE_A1 7,21
BI SCS_A#0 7,21
BI SCS_A#1 7,21
BI P_DDR2_A 7
BI N_DDR2_A 7
BI P_DDR0_A 7
BI N_DDR0_A 7
BI P_DDR1_A 7
BI N_DDR1_A 7
C68
0.1u_0603
PLACE CLOSE TO DIMM PIN
ADDRESS: 000
0xA0
BI ODT_A0 7,21
BI ODT_A1 7,21
DDR2 DIMM1-CH A
DATA_B[0..63] 8
DATA_B0
DATA_B1
DATA_B2
DATA_B3
DATA_B4
DATA_B5
DATA_B6
DATA_B7
DATA_B8
DATA_B9
DATA_B14
DATA_B15
DATA_B13
DATA_B12
DATA_B10
DATA_B11
DATA_B17
DATA_B20
DATA_B19
DATA_B23
DATA_B16
DATA_B21
DATA_B18
DATA_B22
DATA_B25
DATA_B29
DATA_B27
DATA_B31
DATA_B24
DATA_B28
DATA_B26
DATA_B30
DATA_B37
DATA_B36
DATA_B34
DATA_B35
DATA_B33
DATA_B32
DATA_B38
DATA_B39
DATA_B45
DATA_B41
DATA_B42
DATA_B47
DATA_B44
DATA_B40
DATA_B43
DATA_B46
DATA_B53
DATA_B49
DATA_B54
DATA_B51
DATA_B48
DATA_B52
DATA_B50
DATA_B55
DATA_B57
DATA_B61
DATA_B59
DATA_B63
DATA_B56
DATA_B60
DATA_B58
DATA_B62
DIMM1
122
123
128
129
131
132
140
141
143
144
149
150
152
153
158
159
199
200
205
206
208
209
214
215
107
108
217
218
226
227
110
111
116
117
229
230
235
236
3
4
9
10
12
13
21
22
24
25
30
31
33
34
39
40
80
81
86
87
89
90
95
96
98
99
2
5
8
11
14
17
20
23
26
29
32
35
38
41
44
47
50
65
66
79
82
85
88
91
94
97
VCC3
42434849161
162
167
172
187
184
18967238
69
178
VDDQ4
VDDQ7
VDDQ4
VDDQ5
VDDQ6
VDDQ7
VDDQ8
VDDQ9
VDDSPD
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
163
VSS
166
169
198
201
204
207
210
213
216
168
CB0
CB1
CB2
CB3
CB4
CB5
CB6
CB7
7
DQS0
6
DQS0#
16
DQS1
15
DQS1#
28
DQS2
27
DQS2#
37
DQS3
36
DQS3#
84
DQS4
83
DQS4#
93
DQS5
92
DQS5#
105
DQS6
104
DQS6#
114
DQS7
113
DQS7#
46
DQS8
45
DQS8#
188
A0
183
A1
63
A2
182
A3
61
A4
60
A5
180
A6
58
A7
179
A8
177
A9
70
A10_AP
57
A11
176
A12
196
A13
174
A14
173
A15
54
A16/BA2
190
BA1
71
BA0
73
WE#
74
CAS#
192
RAS#
125
DM0/DQS9
126
NC/DQS9#
134
DM1/DQS10
135
NC/DQS10#
146
DM2/DQS11
147
NC/DQS11#
155
DM3/DQS12
156
NC/DQS12#
202
DM4/DQS13
203
NC/DQS13#
211
DM5/DQS14
212
NC/DQS14#
223
DM6/DQS15
224
NC/DQS15#
232
DM7/DQS16
233
NC/DQS16#
164
DM8/DQS17
165
NC/DQS17#
195
ODT0
77
ODT1
52
CKE0
171
CKE1
193
CS0#
76
CS1#
185
CK0(DU)
186
CK0#(DU)
137
CK1(CK0)
138
CK1#(CK0#)
220
CK2(DU)
221
CK2#(DU)
120
SCL
119
SDA
1
VREF
239
SA0
240
SA1
101
SA2
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
_DDRII-240_Green
219
222
225
228
231
234
237
BI DQS_B0 8
BI DQS_B#0 8
BI DQS_B1 8
BI DQS_B#1 8
BI DQS_B2 8
BI DQS_B#2 8
BI DQS_B3 8
BI DQS_B#3 8
BI DQS_B4 8
BI DQS_B#4 8
BI DQS_B5 8
BI DQS_B#5 8
BI DQS_B6 8
BI DQS_B#6 8
BI DQS_B7 8
BI DQS_B#7 8
MAA_B0
MAA_B1
MAA_B2
MAA_B3
MAA_B4
MAA_B5
MAA_B6
MAA_B7
MAA_B8
MAA_B9
MAA_B10
MAA_B11
MAA_B12
MAA_B13
SBS_B2
BI SBS_B2 8,21
SBS_B1
BI SBS_B1 8,21
SBS_B0
BI SBS_B0 8,21
WE_B#
BI WE_B# 8,21
CAS_B#
BI CAS_B# 8,21
RAS_B#
BI RAS_B# 8,21
BI DQM_B0 8
BI DQM_B1 8
BI DQM_B2 8
BI DQM_B3 8
BI DQM_B4 8
BI DQM_B5 8
BI DQM_B6 8
ODT_B0
ODT_B1
SCKE_B0
BI SCKE_B0 7,21
SCKE_B1
BI SCKE_B1 7,21
SCS_B#0
BI SCS_B#0 7,21
SCS_B#1
BI SCS_B#1 7,21
P_DDR2_B
BI P_DDR2_B 7
N_DDR2_B
BI N_DDR2_B 7
P_DDR1_B
BI P_DDR1_B 7
N_DDR1_B
BI N_DDR1_B 7
P_DDR0_B
BI P_DDR0_B 7
N_DDR0_B
BI N_DDR0_B 7
SMBCLK_MAIN
SMBDATA_MAIN
DIMM_VREF_B
VCC3
C45
0.1u_0603
PLACE CLOSE TO DIMM PIN
ADDRESS: 001
0xA4
DDR2 DIMM2-CH B
MAA_B[0..13] 8,21
BI ODT_B0 7,21
BI ODT_B1 7,21
VCC_DDR2
R58 1K_1%_0603
R57
1K_1%_0603
DIMM_VREF_A
SMBCLK_MAIN
SMBDATA_MAIN
BI SMBCLK_MAIN 13,15,16,19,28
BI SMBDATA_MAIN 13,15,16,19,28
VCC_DDR2
R17 1K_1%_0603
DIMM_VREF_B
R18
1K_1%_0603
Title
Size Document Number Rev
Date: Sheet
MICRO-STAR INt'L CO. , L T D .
DDR2 DIMM1 &2
Custom
MS-9631
20 37 Monday, February 13, 2006
of
1.0
Page 21
CHANNEL A V_SM_VTT DECOULPING CAPS
VTT_DDR
C29
0.1u_0603
C28
0.1u_0603
VTT_DDR
C38
4.7U35V_1206
C22
X_4.7U35V_1206
VTT_DDR
C25
0.1u_0603
C33
0.1u_0603
C32
0.1u_0603
C24
0.1u_0603
C44
0.1u_0603
CHANNEL B V_SM_VTT DECOULPING CAPS
VTT_DDR
C35
4.7U35V_1206
C21
X_4.7U35V_1206
VTT_DDR
C37
0.1u_0603
C26
0.1u_0603
C31
0.1u_0603
C27
0.1u_0603
C30
0.1u_0603
C23
0.1u_0603
VTT_DDR
C43
0.1u_0603
C34
0.1u_0603
RN10 8P4R-56R
1
2
3
SCKE_A0
SCKE_A1
SBS_A2
MAA_A12
MAA_A11
MAA_A7
MAA_A9
MAA_A5
MAA_A8
MAA_A6
MAA_A4
MAA_A3
MAA_A2
MAA_A1
MAA_A0
SBS_A1
MAA_A10
MAA_B0
SCS_B#1
ODT_B1
WE_A# 8,20
CAS_A# 8,20
WE_A#
ODT_A0
CAS_A#
MAA_A13
ODT_A1
SCS_A#1
4
5
6
7
8
RN4 8P4R-56R
1
2
3
4
5
6
7
8
RN5 8P4R-56R
1
2
3
4
5
6
7
8
RN9 8P4R-56R
1
2
3
4
5
6
7
8
RN11 8P4R-56R
1
2
3
4
5
6
7
8
RN15 8P4R-56R
1
2
3
4
5
6
7
8
RN16 8P4R-56R
1
2
3
4
5
6
7
8
WE_B# 8,20
RAS_B# 8,20
CAS_B# 8,20
RAS_A# 8,20
RN6 8P4R-56R
SCKE_B0
SCKE_B1
MAA_B4
RN3 8P4R-56R
MAA_B3
MAA_B2
MAA_B1
MAA_B9
RN8 8P4R-56R
MAA_B5
MAA_B8
MAA_B6
SBS_B2
RN7 8P4R-56R
MAA_B7
MAA_B11
MAA_B12
SBS_A0
RN12 8P4R-56R
MAA_B10
SBS_B1
SBS_B0
WE_B#
RN13 8P4R-56R
RAS_B#
CAS_B#
SCS_B#0
ODT_B0
RN14 8P4R-56R
RAS_A#
MAA_B13
SCS_A#0
1
3
5
7
1
3
5
7
1
3
5
7
1
3
5
7
1
3
5
7
1
3
5
7
1
3
5
7
VTT_DDR VTT_DDR
2
4
6
8
2
4
6
8
2
4
6
8
2
4
6
8
2
4
6
8
2
4
6
8
2
4
6
8
VCC3
PC2
1U10V_0603
APL5301_SOT23
MAA_A[0..13] 8,20
SBS_A[0..2] 8,20
SCS_A#[0..1] 7,20
SCKE_A[0..1] 7,20
ODT_A[0..1] 7,20
PU1
3
2
IN
OUT
GND
PC1
1
1UF
V_2P5_MCH
VCC_DDR2
C75 1U10V_0603
C69 1U10V_0603
VCC_DDR2
C99
1U10V_0603
C70
1U10V_0603
C39
1U10V_0603
C42
1U10V_0603
C71
1U10V_0603
C92
1U10V_0603
C56
1U10V_0603
C419
1U10V_0603
C41
1U10V_0603
C55
1U10V_0603
C77
1U10V_0603
C60
1U10V_0603
C74
1U10V_0603
C57
1U10V_0603
VCC_DDR2
VCC_DDR2
1 2
+
1 2
EC2
+
+
EC8
CD1800U6.3EL20-2
MAA_B[0..13] 8,20
SCS_B#[0..1] 7,20
SCKE_B[0..1] 7,20
ODT_B[0..1] 7,20
ODT_A[0..1] 7,20
EC9
1000U/6.3V
CD1800U6.3EL20-2
SBS_B[0..2] 8,20
Title
Size Document Number Rev
Custom
Date: Sheet of
MICRO-STAR INt'L CO. , LTD.
DDR2 Terminator
MS-9631
21 37 Monday, February 13, 2006
1.0
Page 22
5
4
3
2
1
D D
C547
0.1U16V_0402
C519
0.1U16V_0402
C525
0.01U25V_0402
VCC3
C520
0.01U25V_0402
TPM Module
VCC3
GPIO
VDD
VSB
GND
NC#3
NC
4.7K_0402
6
19
24
10
5
18
25
11
4
14
13
12
3
R460
XTALO_TPM
XTALI_TPM
VCC3
VCC3_SB
Pin 10 - VDD or NC?
XTALO_TPM
XTALI_TPM
SUSCLK 13
0R_0402 R414
Address: PIN 9 pull up to Vcc3 = 4Eh/4Fh
Address: PIN 9 pull down to GND = 2Eh/2Fh
IN
32.768KHZ12.5P_D
X_0R_0402 R413
VCC3
R442
4.7K_0402
BADDR
15P50V_0603 C486
R417
Y3
10MR
15P50V_0603 C497
R441 4.7K_0402
C C
VCC3
DEV_RST# 7,15,16,28
IN
R440
4.7K_0402
IN
IN
IN
IN
IN
BADDR
TPM_PP
R447
4.7K_0402
4.7K_0402
VCC3
LPC_AD0 12,15,16
LPC_AD1 12,15,16
R456
4.7K_0402
SERIRQ 13,16
IN
LPC_AD2 12,15,16
LPC_AD3 12,15,16
LPC_FRAME# 12,15,16
R453 33R_0402
TPM_CLK 15
B B
R454
TPM_PP
U25
26
LAD0
23
LAD1
20
LAD2
17
LAD3
22
LFRAME#
16
LRESET#
28
LPCPD#
15
CLKRUN#
27
SERIRQ
21
LCLK
9
TESTBI/BADD
8
TESTI
7
PP
2
GPIO2
1
NC#1
SLB9635TT1.2-RH
VCC3
R438
X_4.7K_0603
VDD#24
VDD#10
GND#25
GND#11
GND#4
XTALO
XTALI/32KIN
R439 4.7K_0402
A A
Title
Size Document Number Rev
B
5
4
3
2
Date: Sheet
MICRO-STAR INt'L CO. , LTD.
TPM
MS-9631
22 37 Monday, February 13, 2006
1.0
of
1
Page 23
SDVOC_DET#
EXP_A_TXP_[0..15] 7,27
EXP_A_TXN_[0..15] 7,27
SDVO_CTRL_CLK 7,27
SDVO_CTRL_DATA 7,27
J_SDVO
1-2 : PCI-Ex16 Graphic Card
2-3 : DVI (Default)
BI
BI
EXP_A_TXP_11_1 27
EXP_A_TXN_11_1 27
EXP_A_TXP_10_1 27
EXP_A_TXN_10_1 27
EXP_A_TXP_9_1 27
EXP_A_TXN_9_1 27
EXP_A_TXP_8_1 27
EXP_A_TXN_8_1 27
J_SDVO
OUT
H1X3_black
SDVO_CTRL_CLK
SDVO_CTRL_DATA
1
2
3
VCC3
X_0.1u_0603
C361
I
N
I
N
I
N
I
N
I
N
I
N
I
N
I
N
IN
IN
VCC3
C380
X_0.1u_0603
SMBCLK_RESUME 13,18,24
SMBDATA_RESUME 13,18,24
EXP_A_TXP_15
EXP_A_TXN_15
EXP_A_TXP_14
EXP_A_TXN_14
EXP_A_TXP_13
EXP_A_TXN_13
EXP_A_TXP_12
EXP_A_TXN_12
EXP_A_TXP_11_1
EXP_A_TXN_11_1
EXP_A_TXP_10_1
EXP_A_TXN_10_1
EXP_A_TXP_9_1
EXP_A_TXN_9_1
EXP_A_TXP_8_1
EXP_A_TXN_8_1
EXP_A_TXP_7
EXP_A_TXN_7
EXP_A_TXP_6
EXP_A_TXN_6
EXP_A_TXP_5
EXP_A_TXN_5
EXP_A_TXP_4
EXP_A_TXN_4
EXP_A_TXP_3
EXP_A_TXN_3
EXP_A_TXP_2
EXP_A_TXN_2
EXP_A_TXP_1
EXP_A_TXN_1
EXP_A_TXP_0
EXP_A_TXN_0
VCC3_SB
C384
X_0.1u_0603
WAKE# 13,18
Trace width > 100 mils
SMBCLK_RESUME
BI
SMBDATA_RESUME
BI
WAKE#
OUT
C325 0.1u_0402
C324 0.1u_0402
C327 0.1u_0402
C326 0.1u_0402
C329 0.1u_0402
C328 0.1u_0402
C357 0.1u_0402
C356 0.1u_0402
C331 0.1u_0402
C330 0.1u_0402
C333 0.1u_0402
C332 0.1u_0402
C335 0.1u_0402
C334 0.1u_0402
C337 0.1u_0402
C336 0.1u_0402
IN
CFG20 7
C339 0.1u_0402
C338 0.1u_0402
C341 0.1u_0402
C340 0.1u_0402
C343 0.1u_0402
C342 0.1u_0402
C345 0.1u_0402
C344 0.1u_0402
C347 0.1u_0402
C346 0.1u_0402
C349 0.1u_0402
C348 0.1u_0402
C351 0.1u_0402
C350 0.1u_0402
C353 0.1u_0402
C352 0.1u_0402
+12V
C409
X_0.1u_0603
EXP_A_TXP_15_C
EXP_A_TXN_15_C
EXP_A_TXP_14_C
EXP_A_TXN_14_C
EXP_A_TXP_13_C
EXP_A_TXN_13_C
EXP_A_TXP_12_C
EXP_A_TXN_12_C
EXP_A_TXP_11_C
EXP_A_TXN_11_C
EXP_A_TXP_10_C
EXP_A_TXN_10_C
EXP_A_TXP_9_C
EXP_A_TXN_9_C
EXP_A_TXP_8_C
EXP_A_TXN_8_C
CFG20
EXP_A_TXP_7_C
EXP_A_TXN_7_C
EXP_A_TXP_6_C
EXP_A_TXN_6_C
EXP_A_TXP_5_C
EXP_A_TXN_5_C
EXP_A_TXP_4_C
EXP_A_TXN_4_C
EXP_A_TXP_3_C
EXP_A_TXN_3_C
EXP_A_TXP_2_C
EXP_A_TXN_2_C
EXP_A_TXP_1_C
EXP_A_TXN_1_C
EXP_A_TXP_0_C
EXP_A_TXN_0_C
C359
X_0.1u_0603
VCC3
VCC3_SB
+
+12V
EC43
470U/16V
B1
B2
B3
B4
B5
B6
B7
B8
B9
B10
B11
B12
B13
B14
B15
B16
B17
B18
B19
B20
B21
B22
B23
B24
B25
B26
B27
B28
B29
B30
B31
B32
B33
B34
B35
B36
B37
B38
B39
B40
B41
B42
B43
B44
B45
B46
B47
B48
B49
B50
B51
B52
B53
B54
B55
B56
B57
B58
B59
B60
B61
B62
B63
B64
B65
B66
B67
B68
B69
B70
B71
B72
B73
B74
B75
B76
B77
B78
B79
B80
B81
B82
+
EC34
470U/16V
PCI-E1
12V
12V
12V
GND
SMCLK
SMDAT
GND
3.3V
JTAG1
3.3VAUX
WAKE#
RSVD
GND
HSOP0
HSON0
GND
PRSNT2#
GND
HSOP1
HSON1
GND
GND
HSOP2
HSON2
GND
GND
HSOP3
HSON3
GND
RSVD
PRSNT2#
GND
HSOP4
HSON4
GND
GND
HSOP5
HSON5
GND
GND
HSOP6
HSON6
GND
GND
HSOP7
HSON7
GND
PRSNT2#
GND
HSOP8
HSON8
GND
GND
HSOP9
HSON9
GND
GND
HSOP10
HSON10
GND
GND
HSOP11
HSON11
GND
GND
HSOP12
HSON12
GND
GND
HSOP13
HSON13
GND
GND
HSOP14
HSON14
GND
GND
HSOP15
HSON15
GND
PRSNT2#
RSVD
SLOT-PCI164P_black
PRSNT1#
GND
JTAG2
JTAG3
JTAG4
JTAG5
PWRGD
GND
REFCLK+
REFCLK-
GND
HSIP0
HSIN0
GND
RSVD
GND
HSIP1
HSIN1
GND
GND
HSIP2
HSIN2
GND
GND
HSIP3
HSIN3
GND
RSVD
RSVD
GND
HSIP4
HSIN4
GND
GND
HSIP5
HSIN5
GND
GND
HSIP6
HSIN6
GND
GND
HSIP7
HSIN7
GND
RSVD
GND
HSIP8
HSIN8
GND
GND
HSIP9
HSIN9
GND
GND
HSIP10
HSIN10
GND
GND
HSIP11
HSIN11
GND
GND
HSIP12
HSIN12
GND
GND
HSIP13
HSIN13
GND
GND
HSIP14
HSIN14
GND
GND
HSIP15
HSIN15
GND
Lane Reverse
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10
A11
A12
A13
A14
A15
A16
A17
A18
A19
A20
A21
A22
A23
A24
A25
A26
A27
A28
A29
A30
A31
A32
A33
A34
A35
A36
A37
A38
A39
A40
A41
A42
A43
A44
A45
A46
A47
A48
A49
A50
A51
A52
A53
A54
A55
A56
A57
A58
A59
A60
A61
A62
A63
A64
A65
A66
A67
A68
A69
A70
A71
A72
A73
A74
A75
A76
A77
A78
A79
A80
A81
A82
+12V
VCC3
PCI_E_RST#
CK_PE_100M_16PORT
CK_PE_100M_16PORT#
EXP_A_RXP_15
EXP_A_RXN_15
EXP_A_RXP_14
EXP_A_RXN_14
EXP_A_RXP_13
EXP_A_RXN_13
EXP_A_RXP_12
EXP_A_RXN_12
EXP_A_RXP_11
EXP_A_RXN_11
EXP_A_RXP_10_1
EXP_A_RXN_10_1
EXP_A_RXP_9
EXP_A_RXN_9
EXP_A_RXP_8
EXP_A_RXN_8
EXP_A_RXP_7
EXP_A_RXN_7
EXP_A_RXP_6
EXP_A_RXN_6
EXP_A_RXP_5
EXP_A_RXN_5
EXP_A_RXP_4
EXP_A_RXN_4
EXP_A_RXP_3
EXP_A_RXN_3
EXP_A_RXP_2
EXP_A_RXN_2
EXP_A_RXP_1
EXP_A_RXN_1
EXP_A_RXP_0
EXP_A_RXN_0
I
N
PCI_E_RST# 18,19,27,28
IN
CK_PE_100M_16PORT 15
IN
CK_PE_100M_16PORT# 15
OUT
EXP_A_RXP_[0..15] 7,27
OUT
EXP_A_RXN_[0..15] 7,27
OUT
OUT
EXP_A_RXP_10_1 27
EXP_A_RXN_10_1 27
VCC3
C418 X_0.1u_0603
C488 X_0.1u_0603
+12V
C517
X_0.1u_0603
C515
X_0.1u_0603
12V
12V
3.3V
3.3V
Title
Size Document Number Rev
Date: Sheet of
MICRO-STAR INt'L CO. , LTD.
PCI Express 16 Port
MS-9631
23 37 Monday, February 13, 2006
1.0
Page 24
PCI_CLK0 15
Add INTB#
2006.1.18
PREQ#0 12
VCC5
VCC3 VCC3
TP3
TP2
PIRQ#G
IN
PREQ#0
OUT
AD31
AD29
AD27
AD25
C_BE#3
AD23
AD21
AD19
AD17
BIIRDY# 12,30
OUTSERR# 12
BIPERR# 12,30
C_BE#1
AD14
AD12
AD10
AD8
AD7
AD5
AD1
Mini PCI SOCKET
MINIPCI1
1
TIP
3
8PMJ-3
5
8PMJ-6
7
8PMJ-7
9
8PMJ-8
11
Led1_GrnP
13
Led_GrnN
15
CHSGND
17
INTB#
19
3.3V#19
21
REV_1
23
GND#23
25
CLK
27
GND#27
29
REQ#
31
3.3V
33
AD31
35
AD29
37
GND#37
39
AD27
41
AD25
43
REV#43
45
C/BE3#
47
AD23
49
GND#49
51
AD21
53
AD19
55
GND#55
57
AD17
59
C/BE2#
61
IRDY#
63
3.3V#63
65
CLKRUN#
67
SERR#
69
GND#69
71
PERR#
73
C/BE1#
75
AD14
77
GND#77
79
AD12
81
AD10
83
GND#83
85
AD08
87
AD07
89
3.3V#89
91
AD05
93
REV#93
95
AD03
97
5V#97
99
AD01
101
GND#101
103
AC_SYNC
105
AC_SDATA_IN
107
AC_BIT_CLK
109
AC_CODE_ID1#
111
MOD_AUDIO_MON
113
AUDIO_GND#113
115
SYS_AUDIO_OUT
117
SYS_AUDIO_OGND
119
AUDIO_GND#119
121
REV#121
123
VCC5VA
127 128
GND#127 GND#128
_SLOT-MINIPCI_III_white
RING
8PMJ-1
8PMJ-2
8PMJ-4
8PMJ-5
LED2_YELP
LED2_YELN
REV#16
5V#18
INTA#
REV#22
3.3VAUX#24
RST#
3.3V#28
GNT#
GND#32
PME#
REV#36
AD30
3.3V#40
AD28
AD26
AD24
IDSEL
GND#50
AD22
AD20
PAR
AD18
AD16
GND#62
FRAME#
TRDY#
STOP#
3.3V#70
DEVSEL#
GND#74
AD15
AD13
AD11
GND#82
AD09
C/BE0#
3.3V#88
AD06
AD04
AD02
AD00
REV_WIP#98
REV_WIP#100
GND#102
M66EN
AC_SDATA_OUT
AC_CODEC_ID0#
AC_RESET#
REV#112
GND#114
SYS_AUDIO_IN
SYS_AUDIO_IGND
AUDIO_GND#120
MPCIACT#
3.3VAUX#124
AD[31..0] 12,30
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
54
56
58
60
62
64
66
68
70
72
74
76
78
80
82
84
86
88
90
92
94
96
98
100
102
104
106
108
110
112
114
116
118
120
122
124
TP5
TP4
PIRQ#H
VCC3_SB
AD30
AD28
AD26
AD24
R418 330R_0603
AD22
AD20
PAR
AD18
AD16 C_BE#2
FRAME#
TRDY#
DEVSEL#
AD15
AD13
AD11
AD9
C_BE#0
AD6
AD4
AD2
AD0 AD3
TP6
VCC3_SB
VCC5
IN PCIRST_ICH7# 12,30
IN PGNT#0 12
OUT PCI_PME# 12
AD18
BI PAR 12,30
BI FRAME# 12,30
BI TRDY# 12,30
BI STOP# 12,30
BI DEVSEL# 12,30
C_BE#[3..0] 12,30
Change PGNT#2 to PCI1.B10 because
PGNT#2 is straping pin. PRSNT#2
is GND on PCI card
2006.1.18
IDSEL = AD18
MASTER = PREQ#0
PIRQ#H
AD[31..0]
BI
C_BE#[3..0]
BI
PGNT#2 12
IN
Add PCI_ACK64# pull high
2006.1.18
PGNT#2
R495 0R0402
R496 X_0R0402
PCI_CLK2 15
PCI_CLK1 15
PREQ#1 12
VCC5
PCI SLOT 1 (PCI VER: 2.2 COMPLY)
-12V
PCI1
B1
B10
B11
B12
B13
B14
B15
B16
B17
B18
B19
B20
B21
B22
B23
B24
B25
B26
B27
B28
B29
B30
B31
B32
B33
B34
B35
B36
B37
B38
B39
B40
B41
B42
B43
B44
B45
B46
B47
B48
B49
B52
B53
B54
B55
B56
B57
B58
B59
B60
B61
B62
B2
B3
B4
B5
B6
B7
B8
B9
-12V
TCK
GND
TDO
+5V
+5V
INTB#
INTD#
PRSNT#1
RESERVED
PRSNT#2
GND
GND
RESERVED
GND
CLK
GND
REQ#
+5V(I/O)
AD31
AD29
GND
AD27
AD25
+3.3V
C/BE#3
AD23
GND
AD21
AD19
+3.3V
AD17
C/BE#2
GND
IRDY#
+3.3V
DEVSEL#
GND
LOCK#
PERR#
+3.3V
SERR#
+3.3V
C/BE#1
AD14
GND
AD12
AD10
GND
AD8
AD7
+3.3V
AD5
AD3
GND
AD1
+5V(I/O)
ACK64#
+5V
+5V
_
PTCK
VCC5
PIRQ#C
PIRQ#A
VCC3
IN
IN
PREQ#1
OUT
AD31
AD29
AD27
AD25
C_BE#3
AD23
AD21
AD19
AD17 AD16
C_BE#2
IRDY#
BIIRDY# 12,30
DEVSEL#
BIDEVSEL# 12,30
LOCK#
BILOCK# 12
PERR#
BIPERR# 12,30
SERR#
OUTSERR# 12
C_BE#1
AD14
AD12
AD10
AD8
AD7
AD5
AD3
AD1
PCI_ACK64#
R497 4.7K_0603
TRST#
+12V
INTA#
INTC#
RESERVED
+5V(I/O)
RESERVED
GND
GND
RESERVED
RST#
+5V(I/O)
GNT#
GND
RESERVED
AD30
+3.3V
AD28
AD26
GND
AD24
IDSEL
AD22
AD20
GND
AD18
AD16
+3.3V
FRAME#
GND
TRDY#
GND
STOP#
+3.3V
SDONE
SBO#
GND
AD15
+3.3V
AD13
AD11
GND
C/BE#0
+3.3V
GND
+5V(I/O)
REQ64#
TMS
+3.3
PAR
AD9
AD6
AD4
AD2
AD0
TDI
+5V
+5V
+5V
+5V
IDSEL = AD17
MASTER = PREQ#1
PIRQ#B
+12V
VCC3
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10
A11
A12
A13
A14
A15
A16
A17
A18
A19
A20
A21
A22
A23
A24
A25
A26
A27
A28
A29
A30
A31
A32
A33
A34
A35
A36
A37
A38
A39
A40
A41
A42
A43
A44
A45
A46
A47
A48
A49
A52
A53
A54
A55
A56
A57
A58
A59
A60
A61
A62
PTRST#
PTMS
PTDI
PIRQ#B
PIRQ#D
PREQ#2
VCC3_SB
IN PGNT#1 12
PCI_PME#
AD30
AD28
AD26
AD24
ID2
R386
330R_0603
AD22
AD20
AD18
FRAME#
TRDY#
STOP#
SDONE
SBO#
PAR
AD15
AD13
AD11
AD9
C_BE#0
AD6
AD4
AD2
AD0
PCI_REQ64#
VCC5
IN CHASSIS 16
OUT
PREQ#2 12
IN PCIRST_ICH7# 12,30
OUT PCI_PME# 12
AD17
BI FRAME# 12,30
BI TRDY# 12,30
BI STOP# 12,30
BI PAR 12,30
R352 4.7K_0603
VCC5
PTRST#
PTMS
PTCK
PTDI
RN28
7 8
5 6
3 4
1 2
8.2K-8P4R
VCC5
PCI PULL-UP / DOW N R ESISTOR S
PREQ#2 12
PREQ#0 12
PREQ#3 12,30
PREQ#1 12
PREQ#4 12
PREQ#5 12
PREQ#0
BI
PREQ#3 PIRQ#D
BI
PREQ#1
BI
PREQ#4
BI
PREQ#5
BI
SERR#
BISERR# 12
PERR#
BIPERR# 12,30
LOCK#
BILOCK# 12
BISTOP# 12,30
DEVSEL#
BIDEVSEL# 12,30
TRDY#
BITRDY# 12,30
IRDY#
BIIRDY# 12,30
FRAME#
BIFRAME# 12,30
C404 X_0.1u_0603
VCC5
PREQ#2
BI
1 2
3 4
RN35
5 6
8P4R-2.7KR
7 8
1 2
3 4
RN36
5 6
8P4R-2.7KR
7 8
7 8
VCC5
5 6
RN26
3 4
8P4R-2.7KR
1 2
7 8
VCC5
5 6
RN25
3 4
8P4R-2.7KR
1 2
VCC3
SDONE
SBO# STOP#
PIRQ#A 12
PIRQ#C 12
PIRQ#D 12
PIRQ#B 12
PIRQ#F 12,30
PIRQ#E 12
PIRQ#G 12
PIRQ#H 12
R354 X_0R
R356 X_0R
R353 0R_0603
R355 0R_0603
PIRQ#A
BI
PIRQ#C
BI
BI
PIRQ#B
BI
PIRQ#F
BI
PIRQ#E
BI
PIRQ#G
BI
PIRQ#H
BI
SMBCLK_RESUME
SMBDATA_RESUME
7 8
5 6
3 4
1 2
7 8
5 6
3 4
1 2
R445 8.2KR_0603
BI
SM_LINK0 13
BI
SM_LINK1 13
VCC3 VCC5
RN29
8P4R-8.2KR
RN37
8P4R-8.2KR
BI
SMBCLK_RESUME 13,18,23
BI
SMBDATA_RESUME 13,18,23
VCC5
C415
X_0.1u_0603
X_0.1u_0603
C459
X_0.1u_0603
C499
X_0.1u_0603
C524
X_0.1u_0603
C407
X_0.1u_0603
C83
0.1u_0603
Add C83 for EMC 2005.5.9
PCI SLOT DECOUPLING CAPACITORS
EC50
1000u-6.3V
C489
X_0.1u_0603
C532
X_0.1u_0603
C410
X_0.1u_0603
C417
X_0.1u_0603
C490
X_0.1u_0603
-12V
C461
X_0.1u_0603
C408
X_0.1u_0603
VCC3
+
VCC3_SB
+
EC44
1000u-6.3V
C360
X_0.1u_0603 C405
C498
X_0.1u_0603
Title
Size Document Number Rev
Custom
Date: Sheet of
MICRO-STAR INt'L CO. , LTD.
PCI Slot & Mini PCI
MS-9631
24 37 Monday, February 13, 2006
1.0
Page 25
POWER CIRCUIT FOR USB PORT 0,1,2,3 (REAR)
FS2
5VDUAL2 5VDUAL1
1 2
2.6A-MINISMDC260-S
OC#1 13 OC#4 13
0.1u_0603
SVCC1 SVCC4
R138
4.7K_0603
R139
5.6K_0603
0.1u_0603
C144
SVCC1
+
C130
NEAR USB CONNECTOR
EC13
1000U/6.3V
POWER CIRCUIT FOR USB PORT 4 , 5,6,7 (FRO NT)
FS6
1 2
2.6A-MINISMDC260-S
OC#4
C573
0.1u_0603
R487
4.7K_0603
R484
5.6K_0603
0.1u_0603
C585
+
EC56
1000U/6.3V
REAR PANEL USB CONNECT O R F O R U S B P O RT 0, 1
USB Interface
Diff. Trace width 7.5 mils & 7.5 mils space.
Diff. & other space 20 mils.
Length matching: < 150 mils
Ttrace length 0" to 17"
SVCC1
USB1+ USB0USB1-
NEAR USB CONNECTOR
5 2
6
4
1
3
ESD-IP4220
U7
USB0+
Modify footprint for USB chock 2005.3.22
REAR PANEL USB CONNECT O R F O R U S B P O RT 2, 3
Modify footprint for USB chock 2005.10.24
Change 1.0: 2005/09/15
Add FS7; R556; R557; C758 ; EC47
5VDUAL2
SVCC2
SBD1SBD1+
5 2
6
4
1
3
ESD-IP4220
SVCC1
F_USB4
1 2
3 4
5
7 8
D2x5-1:9-BK
USB2- USB3-
USB2+ USB3+
2.6A-MINISMDC260-S
OC#2 13
U5
NEAR USB CONNECTOR
SBD0SBD0+
6
OC#1
10
FS1
SVCC2 SBD4-
1 2
OC#2
C138
C470P16X0402
USB1- 13
USB1+ 13
USB0- 13
USB0+ 13
R104
4.7K_0603
R106
5.6K_0603
USB2- 13
USB2+ 13
USB3- 13
USB3+ 13
SBD2SBD2+
L7
8
7
6
5
X_CMC-L02-9007020-C71
1
3
5
7
C119
0.1u_0603
SVCC2
1 2
3 4
5
7 8
D2x5-1:9-BK
1
2
3
4
2
4
6
8
8P4R-0R
+
EC10
1000U/6.3V
L5
8
7
6
5
X_CMC-L02-9007020-C71
RN17
1
3
5
7
8P4R-0R
F_USB3
SBD3SBD3+
6
10
OC#2
2
4
6
8
1
2
3
4
C114
C470P16X0402
SBD1SBD1+
SBD0SBD0+
SBD2SBD2+
SBD3SBD3+
FRONT PANEL USB CONNECTOR FOR USB PORT 6,7
Modify footprint for USB chock 2005.3.22
L25
1
USB6- 13
USB6+ 13
USB7- 13
USB7+ 13
8
2
7
3
6
4
5
X_CMC-L02-9007020-C71
RN40
1
2
3
4
5
6
7
8
8P4R-0R
SBD6SBD6+
SBD7SBD7+
FRONT PANEL USB CONNECTOR FOR USB PORT 4,5
Change 1.0: 2005/09/15
Add FS7; R556; R557; C758 ; EC47
5VDUAL1
2.6A-MINISMDC260-S
OC#3 13
FS5
1 2
OC#3
SVCC3
R482
4.7K_0603
R478
5.6K_0603
0.1u_0603
C578
Modify footprint for USB chock 2005.3.22
L24
1
USB4- 13
USB4+ 13
USB5- 13
USB5+ 13
USB Interface
Diff. Trace width 7.5 mils & 7.5 mils space.
Diff. & other space 20 mils.
Length matching: < 150 mils
Ttrace length 0" to 17"
8
2
7
3
6
4
5
X_CMC-L02-9007020-C71
RN39
1
2
3
4
5
6
7
8
8P4R-0R
SBD4SBD4+
SBD5SBD5+
SBD6- SBD7+
SBD6+ SBD7-
SBD7SBD7+
+
EC55
1000U/6.3V
6
1
SVCC4
F_USB1
1 2
3 4
5
7 8
D2x5-1:9-BK
SVCC4
5 2
U27
4
3
ESD-IP4220
NEAR USB CONNECTOR
6
10
SBD4+
C565
C470P16X0402 RN18
SBD6SBD6+
OC#4
SVCC3
5 2
U28
OC#3
SBD5+
SBD5-
C564
C470P16X0402
6
4
1
3
ESD-IP4220
SVCC3
F_USB2
1 2
SBD5-
3 4
SBD5+
5
7 8
D2x5-1:9-BK
Title
Size Document Number Rev
Custom
Date: Sheet
SBD4SBD4+
6
10
NEAR USB CONNECTOR
MICRO-STAR INt'L CO. , LTD.
USB Connector
MS-9631
25 37 Monday, February 13, 2006
1.0
of
Page 26
VCC5_SB
PS_ON# 16
IDEACTP# 29
SATALED# 12,13,19
SPKR 13,17
R11 1K_0603
IN
AGP_PTECT 28
IN
IN
IN
PS_ON#
IN
1 2
ALARM 16
R474
Video Connector
IN
IN
IN
BI
C67
0.1u_0603
PLACE CLOSE TO MCH,
WITHIN 750 MIL OF
PIN
VGA_RED
VGA_GREEN
VGA_BLUE
150R1%0402-1
MCH_DDC_CLK 7
MCH_DDC_DATA 7
R256
VCCA_CRTDAC 10
VGA_RED 7
VGA_GREEN 7
VGA_BLUE 7
R10 0R_0603
Q5
X_N-2N7002_SOT23
D20
BAT54A
3
IN
2.2K_0603
1 2
1 2
R255
150R1%0402-1
2.7K_0603
2.7K_0603
VCC5_SB
D S
G
HDDLED#
RN38 8P4R-100R
1 2
3 4
5 6
7 8
C E
Q44
B
N-MMBT3904_SOT23
200mA
PLACE CLOSE TO MCH
231
1 2
R254
150R1%0402-1
VCC3
R64
Q9 N-2N7002_SOT23
VCC3
VCC3
R90
Q11 N-2N7002_SOT23
ATX Connector
ATX1
3.3V
3.3V
3.3V
-12V
GND
GND
P_ON
GND
GND
GND
GND
GND
POK
-5V
5VSB
5V
+12V
5V
+12V
5V
DET
GND
2X12 POWER
PWR-2X12M
R42
R43
1
2
3
4
5V
5
6
5V
7
8
9
10
11
12
C63
C62
22P50V_0402
22P50V_0402
22P50V_0402
C64
C11
0.1u_0603
C15
0.1u_0603
VCC3
IN
VSYNC 7
IN
HSYNC 7
L1 0.082U300m_0603
L2 0.082U300m_0603
L3 0.082U300m_0603
C52
C33P50N0402
C33P50N0402
VSYNC_5V
R62 39R_0402
HSYNC_5V
R61 39R_0402
VCC3
C12
0.1u_0603
VCC5
C53
C8
0.1u_0603
C17
0.1u_0603
C54
C33P50N0402
8P4C-22P
VCC5
R9
10K_0603
VCC5_SB
C6
0.1u_0603
+12V
VCC5
1
2
R86
X_10KR
VCC5
13
12
R74
X_10KR
To prevent Grantsdale VSYNC and HSYNC signal level issue
CON_R
OUT
CON_G
OUT
CON_B
OUT
VCC5 VCC5
2
D6
3
1PS226_SOT23
1
5 6
3 4
CN1C
8P4C-22P
VCC3
-12V
C10
0.1u_0603 R459 200R_0603
R12 X_4.7K
C9
X_1000P10V
C13 X_0.1u_0603
VCC5
C7
0.1u_0603
VCC5
D22 1N4148S
SPK1
D2
1PS226_SOT23
231
D4
1PS226_SOT23
231
150_1%_0402
VCC3
VCC5
R63
8.2K_0603
G
5VDDCCL
D S
VCC5
R96
8.2K_0603
G
5VDDCDA
D S
13
14
15
16
17
18
19
20
21
22
23
24
1
2
BZ1
BUZZER
C527
0.1u_0603
D3
1PS226_SOT23
PLACE CLOSE TO VGA CONNECTOR
R41
150_1%_0402
150_1%_0402 CN1D
OUT
5VDDCCL 27
OUT
5VDDCDA 27
Changed HDD+ from VCC5 to VCC3
because ICH7 SATALED# need to
pull high to VCC3. 2005.11.8
VCC3_SB
OUT
PWR_OK 28
MS5_RST# 28
14 7
U3A
ACT08DR_SOIC14
14 7
U3D
ACT08DR_SOIC14
CON_R 27
CON_G 27
CON_B 27
2
3
1
CN1B
3
11
D5
1PS226_SOT23
CON_VSYNC
CON_HSYNC
VSYNC_5V
HSYNC_5V
CON_DDCDA
CON_DDCCL
VCC3
FP_RST# 13,15
CN1A
8P4C-22P
OUT
OUT
R480 4.7K_0603
CON_VSYNC 27
CON_HSYNC 27
Intel Front Panel
HDDLED
HDDLED#
OUT
R485
X_0R
OUT
JFP1
1
HDD+
3
HDD-
5 6
RESET- PWSW+
7
RESET+
9
NC
C566
0.1u_0603
MSIFP_CON5x2
PLED
SLED
PWSW-
PWR_LED
2
SUS_LED
4
PWRSW+
PWRBTIN
8
R473
10K_0603
IN
IN
C556
1U16V_0805
PWR_LED 28
SUS_LED 28
OUT
PWRBTIN 16
VCC5_SB
R467
1K_0603
J5
1
2
SLP_Button
SLPBTIN#
SLPSW-
OUT
SLPBTIN# 13
C514
1U16V_0805
Change footprint to JFP1 2005.3.28
Engery Lake LED
VCC3_SB
14 7
1 2
IN
EL_STATE0 13
VCC3_SB
14 7
3 4
IN
EL_STATE1 13
LVC07A_SOIC14
VCC3
C412
C457
C439
C112
For EMI
VCC5
C1
KBGND
X_0.1u_0402
VCC5
C456
X_0.1u_0402
X_0.1u_0402
X_0.1u_0402
X_0.1u_0402
0.1u_0402
0.1u_0402
5VDDCDA
R60 22R_0603
5VDDCCL
R59 22R_0603
7 8
1 2
8P4C-22P
0.1u_0402
C465
X_0.1u_0402
X_0.1u_0402
C487
C86
0.1u_0402
X_0.1u_0402
VCC5_SB
C589
Title
ATX Connector & Front Panel
Size Document Number Rev
Custom
Date: Sheet of
VCC3_SB
U24A
LVC07A_SOIC14
U24B
R432
300R
J6
1
2
YJ102
Close to JFP1
R433 300R
For EMI
C118
X_0.1u_0402
C518
X_0.1u_0402
C539
X_0.1u_0402
For EMI
C111
C79
X_0.1u_0402
C113
0.1u_0402
X_0.1u_0402
MICRO-STAR INt'L CO. , LTD.
MS-9631
C106
X_0.1u_0402
C14
0.1u_0402
VCC3_SB
C474
X_0.1u_0402
C80
0.1u_0402
26 37 Monday, February 13, 2006
C575
C151
1.0
Page 27
1
2
3
4
5
SDVOC_RED
SDVOC_RED#
SDVOC_GREEN
SDVOC_GREEN#
SDVOC_BLUE
SDVOC_BLUE#
SDVOC_CLK
SDVOC_CLK#
L9
V_2P5_MCH
A A
V_2P5_MCH
V_2P5_MCH
R148
10K
R151
X_100k
When using the INTEL driver
for the Ch7307,AS pin must
be pulled HIGH
VCC3
B B
C C
SDVO_CTRL_DATA
For SDVO strapping
SDVO_DET#
HIGH - onboard DVI
LOW - PCI-E slot
EXP_A_RXP_10 7
EXP_A_RXN_10 7
SDVO_CTRL_DATA 7,23
SDVO_CTRL_CLK 7,23
SDVOC_DET#
D D
Bead 80/3A_0805
C163
C152
0.1uF
10U10V_0805
L8
Bead 80/3A_0805
C135
C147
V_2P5_MCH
Bead 80/3A_0805
C160
10U10V_0805
8
VCC
7
WP
6
SCL
R122
X_0R
C613
X_ 0.1uF
1
0.1uF
R147
5.6K
SDVO_CTRL_CLK_DVI
SDVO_CTRL_DATA_DVI
SD_PROM
SC_PROM
SD_DDC
SC_DDC
C159
0.1uF
VCC5
X_1K
R121
2
3
6
7
9
11
12
15
16
PI2PCIE412-CZHE_TQFN42-LF
10U10V_0805
PCI_E_RST# 18,19,23,28
L10
U6
1
A0
2
A1
3
A2
4 5
VSS SDA
X_24C16
WP: PULL HIGH -Write Protect Enable
PULL LOW -Normal Operation
+12V
Fix EMI issue to near by U6
11-17-2005
OUT
OUT
IN
C136
0.1uF
C131
X_0.1uF
U29
A0
A1
A2
A3
SEL
A4
A5
A6
A7
R144
5.6K
C155
0.1uF
R116
5.6K
1 2
5
1330182042
VDD#5
VDD#13
VDD#18
GND
GND#1
GND#4
GND#14
GND#17
GND#10 VDD#8
1
4141719213941
10 8
C192 0.1u_0402
C187 0.1u_0402
C200 0.1u_0402
C196 0.1u_0402
C209 0.1u_0402
C203 0.1u_0402
C220 0.1u_0402
C213 0.1u_0402
C156
0.1uF
SDVOC_RED_1
SDVOC_RED_1#
SDVOC_GREEN_1
SDVOC_GREEN_1#
SDVOC_BLUE_1
SDVOC_BLUE_1#
SDVOC_CLK_1
SDVOC_CLK_1#
U8
1
AVDD_PLL
2
RESET*
3
AS
4
SPC
5
SPD
6
AGND_PLL
7
DGND
8
SD_PROM
9
SC_PROM
10
SD_DDC
11
SC_DDC
12
DVDD
CH7307
R115
5.6K
1 2
SC_PROM
SD_PROM
AS pin setting :
Pull HIGH = Device Address Byte
70h(Write),71h(Read)
Pull LOW = Device Address Byte
72h(Write),73h(Read)
VSATA1.8
R321
4.7KR0402
SDVOC_DET#
VSATA1.8
40
38
0B1
37
1B1
VDD#30
VDD#20
VDD#42
VDD#40
36
2B1
35
3B1
SDVO_INT
34
0B2
SDVO_INT#
33
1B2
SDVO_CTRL_DATA_DVI
32
2B2
SDVO_CTRL_CLK_DVI
31
3B2
29
4B1
28
5B1
27
6B1
26
7B1
25
4B2
24
5B2
23
6B2
22
7B2
GND#19
GND#21
GND#39
GND#41
43
43
4847464544434241403938
49
AVDD
AVDD
AGND
SDVOB_B-
SDVOB_B+
SDVOB_CLK-
Thermal_GND
SDVOB_CLK+
TLC*
TLC
TVDD
TDC0*
TDC0
TGND
TDC1*
1314151617181920212223
EXP_A_TXP_8 7
EXP_A_TXN_8 7
EXP_A_TXP_9 7
EXP_A_TXN_9 7
SDVOC_DET#
EXP_A_TXP_10 7
EXP_A_TXN_10 7
EXP_A_TXP_11 7
EXP_A_TXN_11 7
IN
IN
37
AGND
SDVOB_R-
SDVOB_G-
SDVOB_R+
SDVOB_G+
AVDD
SDVOB_STAFF-
SDVOB_STAFF+
SDVOB_INT-
SDVOB_INT+
AGND
DGND
HPDET
DVDD
ATPG
SCEN
VSWING
TDC1
TVDD
TDC2*
TDC2
TGND
24
IN
IN
IN
IN
IN
IN
IN
IN
IN
EXP_A_RXP_10_1 23
EXP_A_RXN_10_1 23
0R_0402 R493
0R_0402 R494
2
36
35
34
33
32
31
30
29
28
27
26
VSWING
25
TDC2
TDC2#
TDC1
TDC1#
TDC0
TDC0#
TLC
TLC#
PI2PCIE412-CZHE_TQFN42-LF
TDC2 TDC1
R23
X_0R
R25
X_0R
FOR EMI
TDC1#
TLC
TDC2#
TDC0
TDC0# TLC#
R24
X_0R
R21
X_0R
SDVO_INT_1#
SDVO_INT_1
HPDET
LINK0_HTPLG
C153 0.1u_0402
C148 0.1u_0402
R6
10K
SDVO_INT#
SDVO_INT
HPDET_0
3
1
D1
1PS226_SOT23
VCC3
R2
R1
1K
Q1
N-MMBT3904_SOT23
VCC3
2
1K
HPDET
Q2
N-MMBT3904_SOT23
Combined Analog and Digital DVI-I Connector
DVI
PCI-E
1
2
4
5
9
10
12
13
17
18
20
21
23
24
JDVI1
_CONN-D-SUB30P-2.38pitch
TMDS DATA2TMDS DATA2+
TMDS DATA4TMDS_DATA4+
TMDS DATA1TMDS DATA1+
TMDS DATA3TMDS DATA3+
TMDS DATA0TMDS DAT0+
TMDS DATA5TMDS DATA5+
TMDS CLOCK+
TMDS CLOCK-
4
DVI-I
C5b
C2C3C4
C1
161724 8
91
5VDDCDA 26
5VDDCCL 26
C5a
Analog Horizontal Sync
SD_DDC
SC_DDC
LINK0_HTPLG
HOT PLUG DET.
Analog Vertical Sync
IN
IN
16
DDC_CLK_C
6
DDC CLK
DDC DATA
Analog Red
Analog Green
Analog Blue
Analog Ground1
Analog Ground2
+5V POWER
GROUND (+5V)
CLOCK SHLD
DATA 2/4 SHLD
DATA 1/3 SHLD
DATA 0/5 SHLD
R31
X_10K
1 2
R28 0R
R27 0R
DDC_DATA_C
7
VGA_VSYNC
8
VGA_HSYNC
C4
C1
C2
C3
C5
C6
14
F1
15
F-MINISMDC110
22
3
11
19
MEC1
MEC1
MEC2
MEC2
VCC5
R33
C47
X_C150P50N
X_10K
1 2
R20 0R
R19 0R
Title
CH7307 & DVI CONNECTOR
Size Document Number Rev
C
MS-9631
Date: Sheet
FROM 945GT
IN
IN
IN
IN
IN
VCC5
C49
0.1uF
DDC_DATA_C
DDC_CLK_C
MICRO-START INT'L CO.,LTD.
5
CON_VSYNC 26
CON_HSYNC 26
CON_R 26
CON_G 26
CON_B 26
27 37 Monday, February 13, 2006
1.0
of
R142
R137
10K
1.2k/1%
C133
0.1uF
VSATA1.8
5
1330182042
VDD#5
VDD#13
GND
GND#1
GND#4
GND#14
GND#10 VDD#8
1
4141719213941
10 8
VDD#18
GND#17
VDD#20
GND#19
40
VDD#30
GND#21
VDD#40
GND#39
VDD#42
GND#41
43
38
0B1
37
1B1
36
2B1
35
3B1
SDVOC_CLK
34
0B2
SDVOC_CLK#
33
1B2
SDVOC_BLUE
32
2B2
SDVOC_BLUE#
31
3B2
29
4B1
28
5B1
27
6B1
26
7B1
SDVOC_GREEN
25
4B2
SDVOC_GREEN#
24
5B2
SDVOC_RED
23
6B2
SDVOC_RED#
22
7B2
43
U10
2
A0
3
A1
6
A2
7
A3
9
SEL
11
A4
12
A5
15
A6
16
A7
TVDD
C134
0.1uF
L6
Bead 80/3A_0805
C132
10U10V_0805
3
OUT
EXP_A_TXP_8_1 23
OUT
EXP_A_TXN_8_1 23
OUT
EXP_A_TXP_9_1 23
OUT
EXP_A_TXN_9_1 23
OUT
EXP_A_TXP_10_1 23
OUT
EXP_A_TXN_10_1 23
OUT
EXP_A_TXP_11_1 23
OUT
EXP_A_TXN_11_1 23
VCC3
SDVOC_DET#
HIGH
LOW
TDC2#
TDC2
TDC1#
TDC1
TDC0#
TDC0
TLC
TLC#
Page 28
ACPI Controller
Connect to GND 2005.3.16
PWR_LED 26
SUS_LED 26
PWR_OK
VCC5_SB
R388
R427
4.7K_0603
1K_0603
SMBCLK_MAIN 13,15,16,19,20
SMBDATA_MAIN 13,15,16,19,20
4.7K_0603
R383
Q39
N-MMBT3904_SOT23
MS5_RST# 26
PWRGD 7,13
DDR AND DDR II VOLT SELECT
DDRTYPE VDIMM
PULL LOW 2.5V
PULL HIGH 1.8V
VCC3_SB
U1
W83310DS_SOIC8
8
VREF2
C46
0.1u_0603
7
6
ENABLE
VCTRL
GND2
VREF1
VOUT BOOT_SEL
GND9
9
PWRGD
Q35
N-MMBT3904_SOT23
BI
BI
IN
SMB_PWROK 13
PWR_OK 26
OUT
AGP_PTECT 26
THIS PIN IS OPEN DRAIN OUTPUT
DDR VTT Power
VCC_DDR2
1
VIN
2
3
4 5
1000U/6.3V
R479
330R_0603
R430
1K_0603
+
1 2
EC4
VCC5_SB
VCC3
VTT_DDR
3VSB MODE SELECT
3VSB MODE VDIMM MODE
SINGLE MOSFET
3VDLDEC#
PULL HIGH
VDIMM LINEAR OR PWM SELECT
PULL LOW DUAL MOSFET PWM REGULATOR
R486
330R_0603
Q48
R416 4.7K_0603
N-MMBT3904_SOT23
Q45
R423 4.7K_0603
N-MMBT3904_SOT23
VCC5_SB
R428
1K_0603
R426
4.7K_0603
R424 33R_0402
R425 33R_0402
PWRGD
SMB_PWROK
X7R
C495 0.22U16V_0603
VCC5
C496
0.1u_0603
VCC5_SB
C20
+
1 2
EC5
0.1u_0603
1000U/6.3V
R415
1K_0603
R429
1K_0603
1
2
3
4
5
6
7
8
9
10
11
12
3.3R_0603
VCC_DDR2
3VDLDEC#
EXTRAM
R411
1K_0603
SCL
SDA
FP_RST#
CHIP_PWGD
CPU_PWGD
POK1
PWROK
PSOUT#
DDRTYPE
SS
GND
VCC5
R412
C478
1U10V_0603
X_1000P50V_0603
R13
1K_1%_0603
R15
1K_1%_0603
VCC5
R400
330R_0603
48
S3#
S5#
PCI_RST#
HDD_RST#
PLED1/EXTRAM
PLED0/3VDLDEC#
VIDGD#
VID_SEN
VID_DRV
5VSB
RAM_SEN
RAM_DRV
1314151617181920212223
C36
N-AP40N03H/J_TO252
C477
DEV_RST#
RAM_HDRV/DMV
RAMDRV
RAMDRV2
LINEAR REGULATOR
SLP_S3#
R408 2.7K_0603
V_FSB_VTT
R437 2.7K_0603
X_20P50V_0603
R398 10R_0603
R394 10R_0603
C469
0.1u_0603
3738394041424344454647
VCC3
AGND
RSMRST#
SLOT_RST#
CHARPMP
PCIRST_BUF#
5VSB
VLR1_DRV
VLR2_SEN
5VUSB_DRV
5V_DRV
VLR2_DRV
VLR2_SEN
GND
VAGP_DRV
RAM_HSEN
SVRAM_DRV/DMSB
3VSB
3VSB_DRV
VAGP_SEN
24
Wide Trace
RAM_SBDRV RAM_SBDRV
VCC3_SB
2
4
1
N-APM2054N_SOT89
3
Q4
G
1000U/6.3V
EXTRAM
PULL LOW
PULL HIGH
C513
1U10V_0603
SLP_S3#
PLTRST#
C355
C464
X_20P50V_0603
C2
C1
Change to 1K ohm
2005.3.16
U22
36
35
34
33
32
31
30
29
28
27
26
25
MS7-C
VCC3
VCC5_SB
C462
1000P50V_0603
X_20P50V_0603
EC49 1000U/6.3V
+
1 2
C449 1U10V_0603
9VSB
C454 1U16V_0805
Wide Trace
VCC3
S
EC3
G
Q3
N-AP40N03H/J_TO252
D
+
1 2
EC1
1000U/6.3V
+
1 2
Q6
D
S
Change R200,201 to 10K ohm 2005.5.9
VID_GD#
VID_GD# 31
Q41
N-MMBT3904_SOT23
Q40
N-MMBT3904_SOT23
SLP_S4# 13
SLP_S3# 13,16,31
IN PLTRST# 12
HD_RST# 29
DEV_RST# 7,15,16,22
PCI_E_RST# 18,19,23,27
OUT
RSMRST# 13,18
CHARGE PUMP VOLTAGE
OUTPUT
C453 1U16V_0805
R382
1K_0603
Close to MS6+
RAMDRV
G
RAMDRV2
G
PCI-Express POWER
C279
R262 18K_1%_0603
C451
X_1000P50V_0603
R434
220R1%
C362
X_2200P16V_0603
3VSB_DRV
5V_DRVH
+
EC36
VCC3
CD470U10EL11.5
VCC_DDR2
X_0.1u_0603
R263
X_33R1%
C283 2200P16V_0603
C285 X_0.01U16V_0603
R269
200R_0603
R435
100R1%
4 5
3
2
1
NN-P07D03LV_SO8
R260
1.02KR1%
R249
4.02KR1%
1.2V_REF
C450 1000P50V_0603
AGP_VREF
C441
1U16V_0805
VCC3
S
Q49
N-AP40N03H/J_TO252
D
D
N-AP40N03H/J_TO252
Q50
S
1 2
Add dual MOSFET for thermal issue.
2006.1.18
1.2V_REF
C284
0.1u_0603
VCC5
D
N-AP40N03H/J_TO252
G
S
+
1 2
EC54
1000u_6.3V
Q27
6
7
8
R267
49.9K1%_0603
U16
7 8
ISET BOOT
6
VREF_IN
5
FB
4
COMP
3
SS
2
GND
1
PWROK
MS-6+_SOP14
5V_DRVL PWR_OK
5V_DRVH
VCC3
Q37
VSATA1.8
VCC5_SB
VCC3_SB
H_DRV
PGND
ISEN
L_DRV
VDD
VDDA
C307 2.2U16V_0805
2200P16V_0603
X_2200P16V_0603
+12V
R293
X_0R
9
10
11
12
13
14
R273
10R_0805
C574
C570
R248
1.5K_1%
10K_1%
VCC5
C315
X_0.22U16Y_0603
CLOSE TO CHIP
VCC5
1.2V_REF
R259
D13
S-1N5817_DO214AC
R294 10K_0603
C316 2.2U16V_0805
Q47
4 5
3
2
1
NN-P07D03LV_SO8
VCC5
Q12
4 5
3
2
1
NN-P07D03LV_SO8
VCC5
PL2
80L6_30_0805
C406
0.1u_0603
C314 0.22U16V_0603
R314
2.2K_0805
C354
1000P16V
4
EC41
+
1 2
1000U/6.3V
EC42
+
1 2
876
9
1000U/6.3V
PQ2
AO4410
PL1
2
351
CH-0.5U30A_S
876
9
1000U/6.3V
4
PQ1
AO4410
2
351
5V DUAL Po w e r
VCC5_SB
6
7
8
C568
X_0.1u_0603
VCC5_SB
6
7
8
+12V
3
2
5VDUAL1
FRONT
CD1000U6.3EL15
5VDUAL2
CD1000U6.3EL15
REAR
V_1P5_CORE
+
1
-
U15A
NS-LM358MX/SOIC8
4 8
Title
MS7 - ACPI Controller
Size Document Number Rev
Custom
Date: Sheet
D S
G
MICRO-STAR INt'L CO. , LTD.
EC6
EC57
Q23
N-P50N03LD_TO252
MS-9631
VCC5
+
1 2
+
1 2
+
1 2
EC23
1000U/6.3V
V_1P5_CORE
+
1 2
EC45
VCC3
+
1 2
VCC3 VCC5
+
1 2
V_FSB_VTT
28 37 Monday, February 13, 2006
EC39
CD1000U6.3EL15
EC58
CD1000U6.3EL15
EC22
+
1 2
1000u_6.3V
of
1.0
Page 29
ATA 33/66/100 IDE Connectors
PDD[0..15]
R177 33R_0402
OUTHD_RST# 28
OUTPD_DREQ 12
INPD_IOW# 12
INPD_IOR# 12
OUTPD_IORDY 12
INPD_DACK# 12
OUTIDE_IRQ 12
INPD_A1 12
INPD_A0 12
INPD_CS#1 12
OUTIDEACTP# 26
R56
10K_0603
VCC5 VCC3
PDD7
PDD6
PDD5
PDD4
PDD3
PDD2
PDD1
PDD0
BI PDD[0..15] 12
HDRST#P
R89
R83
4.7K_0603
8.2KR_0603
IDE1
CONN-IDE(20)V_blue
1
2
3 4
5 6
7 8
91110
12
13 14
16 15
17 18
19
22
21
24
23
26
25
28
27
30
29
32
31
34
33
36
35
38
37
40 39
PDD8
PDD9
PDD10
PDD11
PDD12
PDD13
PDD14
PDD15
C94
X_4700P50V_0603
OUT
IN PD_A2 12
IN PD_CS#3 12
R72
15K_0603
ATADET0 15
INSATA_TX2 12
INSATA_TX#2 12
OUTSATA_RX#2 12
OUTSATA_RX2 12
INSATA_TX3 12
INSATA_TX#3 12
OUTSATA_RX#3 12
OUTSATA_RX3 12
C506 0.01U_0402
C511 0.01U_0402
C504 0.01U_0402
C509 0.01U_0402
C510 0.01U_0402
C505 0.01U_0402
C508 0.01U_0402
C503 0.01U_0402
Change to footprint SATA_ATA13 2005.3.28
FAN CONTROL
CPU FAN SYSTEM FAN
+12V
1N4148_SOD123
R125
D7
4.7KR
+12V
+
1 2
EC12
C124
0.1u_0603
CD100U16EL7
INCPUFAN_GPIO 13 INSYSFAN_GPIO 13
X_0R_0402 R173
Default High Default High
VCC3_SB
U24D
14 7
9 8
LVC07A_SOIC14
VCC3
VCC3_SB
R419
X_1MR0402
INCPUFAN_PWR 16 INSYSFAN_PWR 16
Default High Default High
C483
X_C10U16Y1206
14 7
5 6
LVC07A_SOIC14
X_1MR0402
10U10V_0805
X_0R_0402 R407
U24C
VCC3
R174
D S
X_N_2N7002_SOT23
Q18
G
C172
+12V
R149
10KR0402-1
1 2
VCC3 VCC3
R420
1KR0402
D S
N_2N7002_SOT23
G
C501
X_C10U16Y1206
R143
200R_0603
Q38
658
47 23
(BH1X4B_white )
1
FAN 0rpm delay circuit
R124
27KR
CPUFAN1
4
3
2
1
Q19
N-SI4410DY-T1-E3_SOIC8-RH
R146
1K_0603
R163
X_0R0805
VCC5
For Disable FAN
1. Disable FAN power for 0rpm.
Enable FAN after CPUFAN_PWR
GPIO setup and delay 2S.
2. Set FAN at lowest rpm (0%
duty) after FAN power enable
and delay about 2S.
CPU_FAN 16
R123
10KR
D8
1N4148_SOD123
For Push-Pull control signal (ver:C)
Solder R145,Q15,D8,R146
Remove R126
For Open-Drain control signal (Ver:H)
Solder R126,D8,R146
Remove R145,Q15
VCC3
R145
X_2.2K_0402
B
Q15
C E
X_2N3904S
0R_0402 R126
CPUFAN_PWM 16
VCC3_SB
14 7
13 12
LVC07A_SOIC14
VCC3
X_1MR0402
C475
X_C10U16Y1206
SATA_TX2_C
SATA_TX#2_C
SATA_RX#2_C
SATA_RX2_C
SATA_TX3_C
SATA_TX#3_C
SATA_RX#3_C
SATA_RX3_C
+12V
+
1 2
0.1u_0603
X_0R_0402 R379
X_0R_0402 R405
VCC3_SB
U24E
14 7
LVC07A_SOIC14
C428
X_1MR0402
10U10V_0805
1KR0402
EC46
CD100U16EL7
U24F
R402
11 10
FAN 0rpm delay circuit
R373 4.7KR
+12V
VCC3
R384
C447
R401
SATA3
1
2
3
4
5
6
7
CONN-SATA_white
SATA4
1
2
3
4
5
6
7
CONN-SATA_white
D S
X_N_2N7002_SOT23
G
R323
10KR0402-1
G
C471
X_C10U16Y1206
GND
HT+
HTGND
HRHR+
GND
GND
HT+
HTGND
HRHR+
GND
1N4148_SOD123
D16
Q34
+12V
1 2
D S
N_2N7002_SOT23
R365 27KR
SYSFAN1
(BH1X4B_white )
R377
200R_0603
Q28
658
47 23
1
N-SI4410DY-T1-E3_SOIC8-RH
4
3
2
1
1K_0603
R316
X_0R0805
R389
R366
10KR
VCC5
AUX_FAN 16
D17
1N4148_SOD123
AUXFAN_PWM 16
For Disable FAN
Q36
Title
Size Document Number Rev
Custom
Date: Sheet
MICRO-STAR INt'L CO. , LTD.
FAN & IDE Connectors
MS-9631
29 37 Monday, February 13, 2006
1.0
of
Page 30
Part Value Selection:
E: With IEEE-1394 option
X: No Stuff
PIRQ#F 12,24
PCIRST_ICH7# 12,24
1394_PCLK 15
IEEE-1394
A A
PGNT#3 12
PREQ#3 12,24
IDSEL = AD25
MASTER = PREQ#3
VCC3
AD[31..0]
C_BE#[3..0]
C468
0.1u_0603
0.1u_0603
C470
0.1u_0603
PERR# 12,24
PAR 12,24
VCC3
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
0.1u_0603
PIRQ#F
AD26
AD25
AD24
C_BE#3
AD25
R421 100R_0603
AD23
AD22
AD21
C_BE#[3..0] 12,24
AD20
AD19
AD18
AD17
AD16
C_BE#2
AD[31..0] 12,24
1394_VDD
FRAME# 12,24
IRDY# 12,24
TRDY# 12,24
DEVSEL# 12,24
STOP# 12,24
BI
BI
BI
BI
BI
BI
BI
B B
C C
1394_VDD
0.1u_0603
C401
0.1u_0603
P3VA VCC3
0.1u_0603
D D
VCC3
0.1u_0603
C460
0.1u_0603
C472
C411
NEAR EACH POWER PIN (8 PCS)
0.1u_0603
C467
C443
1
1
2
Add for EMI
2005.2.14
C317 X_0.1u_0603
OUT
IN
IN
IN
OUT
TPBIAS1
BJT_CTL
REG_OUT
C493
VSS1
VSS6
AD12
VCC3
PCICLK
AD12
INTA#
PCIRST#
AD11
AD10
AD9
AD11
AD10
0.1u_0603
VDDATX2
VDDARX2
AD9
AD8
AD8
C_BE#0
C413
C484
0.1u_0603
REG_FB
XTPA2P
XTPB2P
XTPA2M
XTPB2M
GNDATX2
XTPBIAS2
GNDARX2
CBE0#
VSS7
AD7
AD6
AD5
VDD5
AD4
AD6
AD7
AD3
AD4
AD5
C403
0.1u_0603
0.1u_0603
C402
AD31
AD28
AD27
AD29
AD30
102
101
10099989796959493929190898887868584838281807978777675747372717069686766
AD27
AD28
AD29
AD30
AD31
GNT#
REQ#
CBE1#
AD15
AD14
AD13
VDD4
PERR#
PAR
4567891011121314151617181920212223242526272829303132333435363738
AD13
AD15
AD14
C_BE#1
+
EC52
10U/16V
+
EC51
10U/16V
0.1u_0603
C492
VSS2
AD26
AD25
AD24
CBE3#
IDSEL
AD23
AD22
VSS3
AD21
VDD2
VDDC1
VSSC1
AD20
AD19
AD18
AD17
AD16
VSS4
CBE2#
FRAME#
IRDY#
VDD3
TRDY#
DEVSEL#
STOP#
0.1u_0603
C440
0.1u_0603
C421
C473
BI
BI
VDD1
VSS5
123
0.1u_0603
2
3
6.34K_1%_0603
R359
47P50V_0603
C420
TPB1-
TPA1+
TPB1+
TPA1-
TPA0+
TPBIAS0
TPB0+
TPB0-
TPA0-
XTPA1P
XTPB1P
XTPA0P
XTPB1M
VDDATX1
VDDARX1
XTPBIAS0
RAMVSS
VSS8
AD1
AD0
EECS
AD1
AD0
R380 X_2.7K
For save
EEPROM
L-FS_60-25%_0805
+
EC53 X_470U/10V
XTPB0P
XTPA0M
XTPB0M
GNDATX1
EEDO
SDA/EEDI
SCL/EECK
VDD6
VSS9
PWRDET
VIA_EECK
VIA_EEDI
FB4
XTPA1M
XTPBIAS1
AD3
AD2
RAMVDD
AD2
VCC3 P3VA
3
P3VA
65
NC
XREXT
VDDARX0
GNDARX1
GNDARX0
VDDATX0
GNDATX0
PHYRESET
LINKON/TSIJMP
LREQ/TSOJMP
CTL1/PC1JMP
CTL0/PC0JMP
D7/PC2JMP
D6/CMCJMP
PGND2
PVDD2
MODE0
MODE1
PGND1
PVDD1
VDDC2
VSSC2
PME#
LPS/CMC
1394_VDD
VCC3
XCPS
SCLK
XO
XI
D5
D4
D3
D2
D1
D0
VIA_EEDI
VIA_EECK
4
VIA_XOUT
VIA_XIN
1394_VCC0
U21
64
63
62
61
60
59
58
57
56
55
54
53
52
51
50
49
48
47
46
45
44
43
42
41
40
39
VIA-VT6307/6308P
R332
2.7K_0603
4
10P50V_0603 C399
Y2
24.576MHZ
10P50V_0603 C400
1 2
R357
11K_0603
R358
1K_1%_0603
P3VA
VIA_XOUT
VIA_XIN
C414
0.1u_0603
VCC3
R351
2.7K_0603
1394-EEPROM 24C02
R350
2.7K_0603 C444
1394_VDD
For 24C02
U20
3
A2
2
A1
1
A0
7
WP
5
SDA
6
SCL
24C01
GND
VCC
4
8
5
54.9_1%_0603
VCC3
5
TPBIAS0
R374
54.9_1%_0603
R371
4.99K_1%_0603
C425
270P50V_0603
Place close to pin 81
(Less then 500 mils)
TPBIAS1
R391
R393
54.9_1%_0603
R385
4.99K_1%_0603
C448
270P50V_0603
REG_OUT
1394 chip
VT6307
VT6308P
R364
1
REG_FB
VCC/PWRDET BJT_CTL
R369
R364
PWRDET
Pin VT6307 VT6308P
84 NC BJT_CTL
87 NC
35 VCC PWRDET
39 PVD
24 VCC
114
33
R378
54.9_1%_0603
R367
54.9_1%_0603
R372
54.9_1%_0603
R381
54.9_1%_0603
R387
54.9_1%_0603
X_4.7K
VCC3
Q42
3 2
X_P-BCP69_SOT223
4
Power Pin
C438
1U10V_0603
TPA0+
TPA0TPB0+
TPB0-
(T/S/S=5/7.5/20)
C463
1U10V_0603
(T/S/S=5/7.5/20)
Place close to pin 74
(Less then 500 mils)
VCC3 VCC3
Enable(R392)
Remove
On
NC
PVD
VCC
VCC
6
6
TPA1+
TPA1-
TPB1+
TPB1-
R369
0R_0603
C435
0.1u_0603
R431
0R_0603
VDD Power
R431
Q42
REG_FB
REG_OUT 88
VCC
VDD 49
VDD
VDD
VDD
7
FRONT 1394 PORT
J1394_1
12
TPB0+
TPA1+
TPB1+
TPA1TPB1-
BJT_CTL
1394_VDD
R392
Title
1394 Controller
Size Document Number Rev
Custom
Date: Sheet
34
KEY
KEY
X_4.7K
56
78
91 0
YJ205
N31-2051551-H06
J1394_2
12
34
56
78
91 0
YJ205
N31-2051551-H06
VCC3
1394_VCC0
TPA1-
TPB1-
1394_VCC0
CB4
1000P16V
MICRO-STAR INt'L CO. , LTD.
MS-9631
7
CB3
1000P16V
30 37 Monday, February 13, 2006
+12V
8
8
TPA0- TPA0+
TPB0-
A C
of
FS4 1.5A_miniSMDM150/24
D19
BRS340-S
1.0
Page 31
5
VCC3 +12V VCC5
D D
VRM_GD 13
VID[0..6] 4
PSI# 3
SLP_S3# 13,16,28
DPRSLPVR 7,13
H_DPRSTP# 3,12
CLK_EN# 15
VCC3
V_FSB_VTT
C C
VCCSENSE_2 4
VSSSENSE_2 4
B B
A A
THERM# 13,15
VID0
VID1
VID2
VID[0..6]
VID3
VID4
VID5
VID6
R195 0R_0420
R84 X_1K_0402
R98 1K_0402
Panasonic
ERT-J0EV474J
Throttling temp.
105 degree C
Close to Phase 1
Inductor
R102
X_1K_0402
X_0.01U_0402
470KRT0402-LF-1
0.01U25V_0402
5
IMVP_VREN
X_0.01U_0402
C97
C102
C96
0.01U25V_0402
RT2
R87
10K_0402
R100 499R1%0402
R82 2.7KR1%
C93
C5600P50X
C88
C47P50N
R67
20K_1%
R78
1.8KR1%
R66 X_1.8KR1%
C87 C47P50N
R77 X_2K_1%
X_0.01U_0402
C100
C98
R76
10K_0402
1 2
3.9K1%_0402
R70
C95
0.015U_0402
37
38
39
40
41
42
43
0R_0402 R80
0R_0402 R107
44
45
46
0R_0402 R95
47
C89
10
C3300P50X
11
12
13
14
15
VCC3
25
R71
147KR1%
BOTTOM PAD
CONNECT TO
GND THROUGH 6
VIAS
4
VCC3
VCC5
R103
4.7R
C115
0.1u_0402
U4 ISL6262CR
1
PGOOD
VID0
VID1
VID2
VID3
VID4
VID5
VID6
2
PSI#
3
PGD_IN
VR_ON
DPRSLPVR
DPRSTP#
CLK_EN#
9
VW
COMP
FB
FB2
VDIFF
VSEN
RTN
NC
5
VR_TT#
6
NTC
7
SOFT
4
RBIAS
GND_PAD VIN
49 20
4
GND
21
R101
4.7R
22
VDD
DROOP
16
1.58KR1%
R94
R91
4.7R
0.1u_0402
48
3V3
BOOT1
UGATE1
PHASE1
LGATE1
PGND1
BOOT2
UGATE2
PHASE2
LGATE2
PGND2
OCSET
180P
PVCC
ISEN1
ISEN2
VSUM
C105
3
+VIN
C108
C116
0.1u_0402
31
36
35
34
32
33
24
PH1
26
27
28
30
29
23
PH2
19
2.61K1%
R88
8
18
VO
DFB
17
R93
2KR1%
C592
4.7U10V_0805-BOT
R113 2.2R
R111
10KR1%
R112 2.2R
R109
10KR1%
RT3
1 2
10KRT-LF-2
R92
11KR1%
C110 C0.047U16X
C109 0.33uF
R68 15KR0402
C90
1000P_0402
C122
0.1uF/X7R
X_10K R110
C121 0.22U
C129 0.22uF/X7R
X_10K R108
0.22U
C120
3.65K1%
R97
3.65K1%
R99
C91
0.22UF/10V
VO1
0.1u_0402
VO2
X_0.1u_0402
PH1
PH2
R81
1R1%
R85
1R1%
+12VIN
3
C127
C126
VO1
VO2
C81
X_10000P50V_0603
R114
10KR0402-1
1 2
R120
10KR0402-1
1 2
J2 X_COPPER
3
4
D S
Q14
G
IPD09N03
D S
Q13
G
IPD06N03
IPD06N03
+VIN
D S
Q26
G
IPD09N03
D S
Q22
G
IPD06N03
IPD06N03
RT2 :
Panasonic
ERT-J1VR103J
Close to Phase
1 Inductor
JPW1
PWR-2X2M
1
GND
12V
2
GND
12V
G
G
G
IPD09N03
G
D S
Q17
IPD09N03
D S
Q16
1N5817
D S
Q21
D S
Q25
2
1 2
C103
1U16V_0805
PD1
A C
PD3
1N5817
A C
IMVP_VREN
2
R159
2.2/0805
PH1
VO1
C183
1000P50V_0805
1 2
1U16V_0805
R182
2.2/0805
PH2
C205
1000P50V_0805
VO2
+12VIN
R79
5.6K_0603
R75 1K_0603
Q10
N-MMBT3904_SOT23
1 2
EC7
330u/16V
L11
0.22uH
R152
0R-BOT
1 2
C107
EC18
X_1500u/16V
L16
0.22uH
R118
0-BOT
R73 1K_0603
Title
Size Document Number Rev
Date: Sheet
1 2
R119
0R-BOT
R117
0-BOT
Custom
L4 CH-2.2U14A_S-LF
EC11
330u/16V
VCC5_SB
C125
C10U16Y1206
C330U2.5POS-1
+
1 2
EC19
C330U2.5POS-1
+
1 2
EC20
C330U2.5POS-1
+
1 2
EC21
R69
1K_0603
C330U2.5POS-1
C330U2.5POS-1
C330U2.5POS-1
IN
VID_GD# 28
+
1 2
+
1 2
+
1 2
MICRO-STAR INt'L CO. , LTD.
CPU Power
MS-9631
1
+12VIN
1 2
C84
1U16V_0805
0.7~1.708V/41A
EC15
EC16
EC17
PD2
S-RB551V-30
A C
31 37 Monday, February 13, 2006
1
VCORE
1.0
of
Page 32
1
ICH6
GPIO Alt Func Pin I/O/NC Power PU SMI Tol Default Rickles Signal Name
GPIO[0] BM_BUSY# AB18 I VCC3p3 N Y 3.3 N/A BM_BUSY#
GPIO[1] PCIREQ[5]# C8 I V5REF Y N 5 N/A PREQ#5
GPIO[2] PIRQE# G8 I V5REF Y N 5 N/A PIRQ#E
GPIO[3] PIRQF# F7 I V5REF Y N 5 N/A PIRQ#F
GPIO[4] PIRQG# F8 I V5REF Y N 5 N/A PIRQ#G
GPIO[5] PIRQH# G7 I V5REF Y N 5 N/A PIRQ#H
GPIO[7] unmuxed AC18 I Vcc3p3 Y N 3.3 N/A NC
GPIO[8] unmuxed E21 I VccSus3p3 Y Y 3.3 N/A SLPBTIN#
GPIO[9] unmuxed E20 I VccSus3p3 Y N 3.3 N/A NC
GPIO[10] unmuxed A20 I VccSus3p3 Y N 3.3 N/A NC
GPIO[11] SMBALERT# B23 I VccSus3p3 Y Y 3.3 N/A SMB_ALERT#
GPIO[12] unmuxed F19 I VccSus3p3 Y N 3.3 N/A NC
GPIO[13] unmuxed E19 I VccSus3p3 Y Y 3.3 N/A SIO_PME#
GPIO[14] NC R4 I VccSus3p3 Y Y 3.3 NC
GPIO[15] NC E22 O VccSus3p3 N N 3.3 1 BIOS_WP#
GPIO[16] DPRSLPVR AC22 O Vcc3p3 N N 3.3 1 DPRSLPVR
GPIO[17] PCIGNT[5]# D8 O Vcc3p3 N N 3.3 1 NC
GPIO[18] STPPCI# AC20 O Vcc3p3 N N 3.3 1 NC
GPIO[19] SATA1GP AH18 I Vcc3p3 D N 3.3 1 NC
GPIO[20] STPCPU# AF21 O Vcc3p3 N N 3.3 O NC
GPIO[21] SATA0GP AF19 I Vcc3p3 N N 3.3 0 NC
GPIO[22] REQ4# A13 I Vcc3p3 N N 3.3 0 REQ4#
GPIO[23] LDRQ1# AA5 O Vcc3p3 N N 3.3 NC
GPIO[24] NC B3 O VccSus3p3 Y N 3.3 1 LAN_EN#
GPIO[25] NC D20 O VccSus3p3 N N 3.3 N/A NC
GPIO[26] EL_RSVD A21 O VccSus3p3 N N 3.3 0 NC
GPIO[27] EL_STAT0 B21 O VccSus3p3 N N 3.3 0 EL_STAT0
GPIO[28] EL_STAT1 E23 O VccSus3p3 N N 3.3 0 EL_STAT1
GPIO[29] OC#5 C3 I VccsUS3p3 Y N 3.3 OC#5
GPIO[30] OC#6 A2 I VccsUS3p3 Y N 3.3 OC#6
GPIO[31] OC#7 B3 I VccsUS3p3 Y N 3.3 OC#7
GPIO[32] CLKRUN# AG18 O Vcc3p3 N N 3.3 1 CPUFAN_GPIO
GPIO[33] AZ_DOCK_EN# AC19 O Vcc3p3 N N 3.3 1 SYSFAN_GPIO
GPIO[34] AZ_DOCK_RST# U2 O Vcc3p3 N N 3.3 0 NC
GPIO[35] SATACLKREQ# AD21 O Vcc3p3 N N 3.3 0 NC
GPIO[36] SATA2GP AH19 I Vcc3p3 N N 3.3 0 NC
A A
GPIO[37] SATA3GP AE19 I Vcc3p3 N N 3.3 0 NC
GPIO[38] unmuxed AD20 I Vcc3p3 Y N 3.3 1 NC
GPIO[39] unmuxed AE20 I Vcc3p3 Y N 3.3 1 NC
GPIO[48] GNT4# A14 O Vcc3p3 N N 3.3 1 NC
GPIO[49] H_PWRGD AG24 OD V_FSB_VTT Y N 3.3 1 H_PWRGD
Note: All inputs are sticky. The status bit remains set as long as the input was asserted for two clocks.
GPI's are sampled on PCI clocks in S0/S1. GPIs are sampled on RTC clocks in S3/S4/S5.
FWH
GPIO Pin# Power Tol Signal Name
FPGI[0] 6 Main 3.3 ATADET0
FPGI[1] 5 Main 3.3 pull-down
FPGI[2] 4 Main 3.3 pull-down
FPGI[3] 3 Main 3.3 pull-down
FPGI[4] 30 Main 3.3 pull-down GPIO[6] unmuxed AC21 I Vcc3p3 Y Y 3.3 N/A SIO_OVT#
Note: FWH GPs should only be used for static options,
do not put dynamic nets on these
PCI Config.
DEVICE
Mini - PCI PCICLK0
PCI Slot 1
Riser Card
(PCI Slot 1)
MCP1 INT Pi n IDSEL
PIRQH
PIRQC
PIRQD
PIRQA
REQ#/GNT#
PCI_REQ#0
PCI_GNT#0
PCI_REQ#1 AD17 PCICLK1 PIRQB
PCI_GNT#1
PCI_REQ#2
PCI_GNT#2
PCI_REQ#3 1394 AD25 PIRQF
PCI_GNT#3
AD18
CLOCK
PCICLK2
1394_PCLK
DDRII DIMM Config.
DEVICE
DIMM 2
DIMM 1 P_DDR0_B/N_DDR0_B
ADDRESS
(000)
(001)
CLOCK
P_DDR0_A/N_DDR0_A
P_DDR1_A/N_DDR1_A
P_DDR2_A/N_DDR2_A
P_DDR1_B/N_DDR1_B
P_DDR2_B/N_DDR2_B
JUMPER SETTING
RTCRST
(1-2)CLEAR
(2-3)NORMAL
PCI Reset
PLTRST#
(ICH6)
PCIRST_ICH6#
(ICH6)
PCI_E_RST#
(MS-7)
HD_RST#
(MS-7)
DEV_RST#
(MS-7)
1
Device DEVICE
MS-7
PCI Slot1
Mini- PCI
1394 Controller
LAN Controller
SATAII Controller
PCI-E X16 Slot
IDE1
915GM(GMCH)
Clock Gen
Firmware Hub
Super IO
MICRO-STAR INt'L CO. , LTD.
Title
General Purpose Spec & JUMPER SETTING
Size Document Number Rev
Custom
MS-9631
Date: Sheet
32 37 Monday, February 13, 2006
of
1.0
Page 33
MANUAL PART
U22_1
XX1
XX2
XX3
XX4
ICH7_Heatsink
Change to from U19_X to U22_X 2005.3.16
U10_2
D1x3-BK
U10_3
D1x3-BK
Change to from U11_X to U10_X 2005.3.16
VCC3
C154 X_0.1u_0603
VCC3
C85 X_0.1u_0603
VCC3
C398 X_0.1u_0603
VCC3
C480 X_0.1u_0603
VCC5_SB
C481 X_0.1u_0603
VCC5_SB
VCC5_SB
VCC5_SB
VCC5_SB
C5 X_0.1u_0603
C521 X_0.1u_0603
C507 X_0.1u_0603
C306 X_0.1u_0603
VCC5_SB
VCC5_SB
VCC5_SB
Add CPU RM 2005.5.9
PCB1
MS-9631-0A,Green
U22_3
D1x3-BK
U22_2
D1x3-BK
VCC3
VCC3
VCC3
C104 X_0.1u_0603
C586 X_0.1u_0603
C587 X_0.1u_0603
CPU_RM
CPU
RM
X_CPU_RM
C157 X_0.1u_0603
C256 X_0.1u_0603
C394 X_0.1u_0603
U10_X1
VCC3_SB
VCC3
+12V
+12V
+12V
+12V
+12V
+12V
X5
X6
X7
X8
FOR EMI
Heatsink
945GT_heatsink
C249 X_0.1u_0603
C494 X_0.1u_0603
C391 X_0.1u_0603
C16 0.1u_0603
C123 X_0.1u_0603
C51 X_0.1u_0603
C265 X_0.1u_0603
C385 X_0.1u_0603
MCH
BIOS1_1
PLCC32-SMT
X1
X2
X3
X4
VCC5 VCC3
X_0.1u_0603
C476
VCC3_SB
VCC3_SB
VCC3_SB
VCC3_SB
VCC3_SB
X_0.1u_0603
C2
C571 X_0.1u_0603 FM16
C452 X_0.1u_0603
C590 X_0.1u_0603
C416 X_0.1u_0603
Add C42 for EMC 2005.5.9
BAT1_1
KBGND
VCC5
14 7
U3B
VCC_DDR2
C82
+
CP4
X_COPPER
VCC_DDR2
C73
VCC_DDR2
C59
VCC_DDR2
C76
VCC_DDR2
C78
VCC_DDR2
C128
X_0.1u_0603
X_0.1u_0603
X_0.1u_0603
X_0.1u_0603
X_0.1u_0603
X_0.1u_0603
VCC_DDR2
VCC_DDR2
VCC3
VCC5
VCC5
VCC5
C379
C40
C72
C58
C117
C101
X_0.1u_0603
X_0.1u_0603
X_0.1u_0603
0.1u_0603
0.1u_0603
0.1u_0603
VCC3
X_0.1u_0603
C18
+12V
5
+
6
-
U15B
NS-LM358MX/SOIC8
4 8
7
4
5
10
9
ACT08DR_SOIC14
VCC5
14 7
U3C
ACT08DR_SOIC14
6
8
Add Caps for EMI 2005.5.16 Add Caps for EMI 2005.5.16
Optical Fiducial Marks
FM12
FM1
FM7
FM11
Mounting Hole s
MH7
1
5
2
6
(NPTH)
3
7
4
8
9
MH8
1
5
2
6
(NPTH)
3
7
4
8
9
FM8
FM3
(NPTH)
4
MH3
FM9
FM4
5
6
7
8
9
5
6
(NPTH)
7
4
8
9
FM5
MH6
1
2
3
1
2
3
FM15
FM10
FM14
FM13
MH9
1
5
2
6
(NPTH)
3
7
4
8
9
MH2
1
5
2
6
(NPTH)
3
7
4
8
9
FM17
FM2
FM6
MH1
1
5
2
6
(NPTH)
3
7
4
8
9
KBGND
MH10
1
5
2
6
(NPTH)
3
7
4
8
9
X_J1
Layer4 / 4mil / 55ohm Layer1 / 5mil / 55ohm
SIM1 SIM3
X_PIN1*2
VCC3_SB
C615
X_ 0.1uF
Fix EMI issue to near by C306
11-17-2005
X_J2
SIM2
X_PIN1*2
Layer6 / 5mil / 55ohm
X_J3
X_PIN1*2
MH5
1
5
2
6
(NPTH)
3
7
4
8
9
MH4
1
5
2
6
(NPTH)
3
7
4
8
9
Title
Size Document Number Rev
Date: Sheet
MICRO-STAR INt'L CO. , LTD.
Manual Part
Custom
MS-9631
1.0
of
33 37 Monday, February 13, 2006
Page 34
1
2
3
4
5
6
7
8
9
10
DDR DIMM & TERMINATOR
A A
Yonah/Merom
0.7625V - 1.325V Core
1.05V FSB Vtt
- 44A
- 2 A
Yonah-2M : 36A
Merom : 44A
ISL6262
VCORE
0.7625-1.325V
2-Phase Switch
IMVP-6
44A
0.9V VTT_DDR - 1.2A
1.8V VCC_DDR
(S0,S1)
(S3) - 400mA
- 9.4A 1.8V VCC_DDR
W83310DS
945GT GMCH
B B
*2.5V DAC
2.5V HV
C C
1.5V Core
(Integrated)
(Discrete) - 1.5A
ICH7M-DH
D D
E E
1.05V VTT
1.5V Core
*1.5V PCI Express
1.5V SATA
1.5V DMI - 50mA
(G3) - 5uA RTC
TDP: 14 - 16W
- 800mA 1.05V FSB Vtt
- 3.2A 1.8V DDR2 I/O
- 70mA
- 2mA
- 5.5A 1.5V Core
- 1.5A *1.5V PCI Express
- 0.86A
- 1.78A
- 560mA
- 50mA
- 52mA +3.3V VccSus
- 6mA 5VRef
VTT_DDR
Linear
1.5A 0.9V
MS7 Regulator
V_FSB_VTT
Linear 1.05V 5.0A
VCC_DDR2
1.8V
1.8V Linear
20A
V_2P5_MCH
2.5V Linear
100mA
VCC3_SB
3.3V Linear
1.5A
5VDUAL1,2
5V Linear
4A
MS6+ Regulator
V_1P5_CORE
1.5V
Switch 20A
Linear (S3)
425mA
PCI Express x16 slot
+12V
+3.3Vaux
+3.3Vaux
+3.3V
(wake)
(no wake)
- 5.5 A
- 375mA
- 20mA
- 3.0A
PCI slot x2
+3.3Vaux
+3.3Vaux
+3.3V
+5V
+12V
(wake)
(no wake)
- 375mA
- 20mA
- 7.6A
- 5.0A
- 0.5A
USB
+5V - 4.0A (S0,S1)
+5V (S3) - 20mA
5VrefSus
+3.3V
F F
FWH
+3.3V (S0,S1) - 107mA
G G
- 10mA
- 330mA
3V
+3.3V +5V +12V +5VSB
SATA II
+1.8V
TPM
+3.3V
- 12mA
Battery
ATX POWER
H H
1
2
3
4
5
6
7
8
Title
Size Document Number Rev
Custom
Date: Sheet of
MICRO-STAR INt'L CO. , LTD.
Power Map
MS-9631
9
34 37 Monday, February 13, 2006
1.0
10
Page 35
8
7
6
5
4
3
2
1
MS-9631 CLOCK BLOCK DIAGRAM
CPU
D D
DDRA_CLK_P/N pair
3
HOST PAIR
HOST PAIR
DOT_96
(96MHz)
C C
14.318MHZCrystal
USB (48MHz)
PCI 33MHz
REF0 14MHz
DOT_48
PCI 33MHz
PCI 33MHz
PCI 33MHz
PCI 33MHz
B B
PCI 33MHz
SRC 100MHz PAIR
SRC 100MHz PAIR
SRC 100MHz PAIR
SRC 100MHz PAIR
SRC 100MHz PAIR
SRC 100MHz PAIR
PCI 33MHz
CK_H_CPU_P/N (533/667MHz)
CK_H_MCH_P/N (533/667MHz)
CK_96M_DREF
USB_48
ICH_PCLK
ICH_14M
SIO_48
SIO_PCLK
PCI_CLK1/PCI_CLK2
PCI_CLK0
FWH_PCLK
1394_PCLK
CK_PE_100M_16PORT
CK_SATA2
CK_PE_100M_LAN
CK_ICHSATA
CH_PE_100M_ICH
CK_PE_100M_MCH
TPM_PCLK
32.768KHZ
Crystal
ICH7M-DH
SIO
PCI 32/33 ( SLOT 1/Riser )
Mini-PCI
FWH
1394 VT6307
PCI EXPRESS X16 SLOT # 1
SATA II
GIGA LAN
TPM
MCH
DDRB_CLK_P/N pair
DDR II DIMM # A1
3
DDR II DIMM # A2
A A
Title
Size Document Number Rev
Custom
8
7
6
5
4
3
Date: Sheet of
MICRO-STAR INt'L CO. , LTD.
<Title>
MS-9631 1.0
2
35 37 Monday, February 13, 2006
1
Page 36
1
2
VCC3(8) V_2P5_MCH(9)
3
4
5
6
7
8
9
10
A A
ATX POWER
+3.3V +5V +12V +5VSB
PWR_OK(9) V_GMCH_CORE(12)
PS_ON#(6)
945GT
V_1P5_CORE(11)
B B
PWRGD(13)
VCC5(8)
C C
VCC_5SB(2)
D D
ICH7M-DH
DMI(18)
VCC3(8)
V_1P5_CORE(11)
VCC5(8)
VCC12(8)
VRM_GD(13)
After VCC_SB 5ms
RSMRST#(4)
VCC_5SB(2)
VCC_3SB(3)
PWRGD(13)
PLTRST#(14)
E E
DEV_RST#(15)
ISL6262
MS-7
5VDUAL2(10)
USB
5VDUAL1(10)
H_ADS#(17)
H_CPURST#(16)
1.2V_REF(10)
VCC_DDR2(10)
V_FSB_VTT(12)
V_CORE(9)
PCIRST_ICH6#(14)
VCC3_SB(3)
VCC3_SB(3)
PCI_E_RST#(15)
Yonah
Merom
VCC3(8)
P3VA
PCI/Mini-PCI
Slot
LAN1
1394
Controller
PCIRST_ICH6#(14)
VCC5(8)
MS-6+
VBAT(1)
PWRBTNIN(6)
F F
VCC3(8)
G G
3V
Battery
For CASEOPEN# function
Clock Gen
VCC5(8)
PS_ON#(7)
VCC_5SB(2)
VBAT(1)
DEV_RST#(15)
Super IO
PWRBTNIN(5)
DEV_RST#(15)
VCC3_SB(3)
PCI_E_RST#(15)
PCI-E X16
Slot
DEV_RST#(15)
VCC3(8) VCC3(8)
FWH
FP
VCC12(8)
H H
CPU/SYSTEM FAN
1
2
3
4
VCC_DDR2(10)
VTT_DDR(11)
5
6
DDR2
MICRO-STAR INt'L CO. , LTD.
Title
LPC_BUS(19)
7
8
Power Sequence
Size Document Number Rev
MS-9631
A2
Date: Sheet
9
10
of
36 37 Monday, February 13, 2006
1.0
Page 37
5
D D
4
3
2
1
VCC3
Clock - Gen
ICS954129
SATA II
SIL 3132
DDR2
DIMM1&2
MS7
HW Monitor
Winbond
W83627EHF
SMB_Main
C C
SMB_PWROK (MS7)
VCC3_SB
ICH7M-DH PCI-E X1 6 PCI Slo t1
SMB_Resume
B B
A A
Title
Size Document Number Rev
5
4
3
2
Date: Sheet
MICRO-STAR INt'L CO. , LTD.
<Title>
MS-9631 1.0
Custom
37 37 Monday, February 13, 2006
1
of