MSI MS-9623 Schematics

Cover Sheet
1
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1
Block Diagram
2
Version 1.2
Intel Dothan CPU - Host
Intel Dothan CPU - Power & GND
3
4-5
MS-9623(ROHS)
07/31/2007
CPU:
Intel Alviso - Host & Memory Signals
Intel Alviso - Power & GND
Intel ICH6 - PCI & DMI & CPU & IRQ
Intel ICH6 - LPC & ATA & USB & GPIO & POWER
LPC I/O - W83627DHF
LAN1-Intel 82573L
LAN2-Intel 82573L/82562GZ
6-8
9-10
11
12-13
14Clock -ICS954310& FWH
15
16
17
Intel Pentium-M Processor/Celeron-M Processor
System Chipset:
Intel 915GME - GMCH (North Bridge)
Intel ICH6M(South Bridge)
On Board Chipset:
Clock Generator - ICS954310 LAN1 -- Intel 82573 LAN2 -- Intel 82573L/82562GZ LPC Super I/O -- W83627DHF
DDR2 DIMM 1 & 2
A A
DDR2 Termination Resistors
18
19
BIOS -- FWH EEPROM
Main Memory:
PCI -Express x1 2Port
20
DDR2 * 2 (Max 2GB)
PCI -Express x8 1Port
21
Expansion Slots:
PCI Slot
AC'97 Codec-ALC662 & ALC888
NMISwitch/PCIRST/JUMPER
22
23
24
PCI EXPRESS X1 SLOT * 2 PCI EXPRESS X8 SLOT * 1 PCI2.3 SLOT * 2
SATA&IDEConnectors/TPM
USB CONNECTORS
ATX ,Front Panel&VGA Conn
System Power
CPU Power
FAN Connectors
POST LED/Status LED
GPIO SETTING
25
26
27
28
29
30
31
32
Manual Part
System Clock Block Diagram
Power Delivery Block Diagram
Power on sequence
Board Map
History
HW:MIA CHENG #8871
1
33
34
35
36
37
38
MICRO-START INT'L CO.,LTD.
MICRO-START INT'L CO.,LTD.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
Date: Sheet
MICRO-START INT'L CO.,LTD.
MS-9623 1.2
MS-9623 1.2
MS-9623 1.2
of
138Friday, August 24, 2007
of
138Friday, August 24, 2007
of
138Friday, August 24, 2007
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1 X PATA IDE
2 X SATA
8 X USB 2.0
(4 X Real)
(4 X Internal)
Line-In
Line-Out
Mic
CD-ROM
Intersil
ISL6218CV
LVDS
VGA
Intel Pentium-M(478uFCPGA) Celeron-M(ULV)(479uFCBGA)
UltraDMA 33/66/100
SATA
150MB/s
USB
AC97
Code Realtek ALC662 & ALC888
LPC Bus
4.3GB/s 533MHz FSB
Intel
915GME Alviso
Integrated Graphic
(UMA-8M)
DMI
2GB/s
Intel
ICH6-M
4.3 GB/s
PCI 32bits / 33Mhz
TPM
SDRAM DIMM 2xDDR2-533 (Up to 2GB)
Non ECC
Unbuffered
PCI-E x8
PCI-E x1
PCI-E x1
PCI-E x1
PCI-E x1
Block Diagram
8 X PCI-E x 1 Slot
2 X PCI Slot
1Gb LAN Intel 82573L
1Gb LAN Intel 82573L 10/100 LAN Intel 82562GZ
1 X PCI-E x 1 Slot
1 X PCI-E x 1 Slot
Support 3 slots riser card
33MHz@16.5MB/s
LPC SIO Winbond 83627DHF
W/ HW monitor
FWH
MICRO-START INT'L CO.,LTD.
MICRO-START INT'L CO.,LTD.
.
.
.
.
.
.
.
.
.
....
.
.....
.
.....
.....
NMI Switch
.....
.
PS2 KB
PS2 Mouse
1 X IrDA 2 X Serial Ports
(1 X Real)
(1 X Internal)
Title
Title
Title
BLOCK DIAGRAM
BLOCK DIAGRAM
BLOCK DIAGRAM
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
Date: Sheet
MICRO-START INT'L CO.,LTD.
MS-9623 1.2
MS-9623 1.2
MS-9623 1.2
of
238Friday, August 24, 2007
of
238Friday, August 24, 2007
of
238Friday, August 24, 2007
5
4
3
2
1
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HA#[3..31]6
RS#[0..2]6
HREQ#[0..4]6
D D
HA#3 HA#4 HA#5 HA#6 HA#7 HA#8 HA#9 HA#10
HA#11
HA#12 HA#13 HA#14 HA#15 HA#16
V_FSB_VTT
V_FSB_VTT
HASTB#0
HREQ#0 HREQ#1 HREQ#2 HREQ#3 HREQ#4
HA#17 HA#18 HA#19 HA#20 HA#21 HA#22 HA#23 HA#24 HA#25 HA#26 HA#27 HA#28 HA#29 HA#30 HA#31
HASTB#1
H_STPCLK#
HASTB#06
C C
HASTB#16
H_A20M#11
H_FERR#11
H_IGNNE#11
H_STPCLK#11 H_INTR11 H_NMI11,24 ICH_H_SMI#11
B B
V_FSB_VTT
V_FSB_VTT
P4 U4 V3 R3 V2
W1
T4
W2
Y4 Y1 U1
AA3
Y3
AA2
U3
R2 P3 T2 P1 T1
AF4 AC4 AC7 AC3 AD3 AE4 AD2 AB4 AC6 AD5 AE2 AD6 AF3 AE1 AF1 AE5
C2 D3 A3
C6 D1 D4 B4
PLACE AT CPU END OF ROUTE
R216 X_56_0603R216 X_56_0603 R199 56_0603R199 56_0603
R272 200R_0402R272 200R_0402
HA#[3..31]
RS#[0..2]
HREQ#[0..4]
U18A
U18A
A3# A4#
ADDR GROUP 0 ADDR GROUP 1
ADDR GROUP 0 ADDR GROUP 1
A5# A6# A7# A8# A9# A10# A11# A12# A13# A14# A15# A16# ADSTB#0
REQ0# REQ1# REQ2# REQ3# REQ4#
A17# A18# A19# A20# A21# A22# A23# A24# A25# A26# A27# A28# A29# A30# A31# ADSTB#1
A20M# FERR# IGNNE#
STPCLK# LINT0 LINT1 SMI#
Dothan_Processor_Skt
Dothan_Processor_Skt
ADS# BNR#
BPRI#
DEFER#
DRDY# DBSY#
BR0#
IERR#
INIT#
CONTROL
CONTROL
LOCK#
RESET#
RS0# RS1# RS2#
TRDY#
HIT#
HITM#
BPM#0 BPM#1 BPM#2 BPM#3 PRDY# PREQ#
TCK
TDI TDO TMS
TRST#
ITP SIGNALS
ITP SIGNALS
DBR#
PROCHOT#
THERMDA THERMDC
THERM
THERM
THERMTRIP#
ITP_CLK0 ITP_CLK1
BCLK0 BCLK1
H CLK
H CLK
H_CPURST# H_PROCHOT#
H_PWRGD
N2 L1 J3
L4 H2 M2
N4
A4 B5
J2
B11 H1 K1 L2 M3
K3 K4
C8 B8 A9 C9 A10 B10 A13 C12 A12 C11 B13 A7
B17 B18 A18
C17
A16 A15 B15 B14
HD#[0..63]6
HDSTBP#[0..3]6
HDSTBN#[0..3]6
DBI#[0..3]6
H_ADS# H_BNR# H_BPRI#
H_DEFER# H_DRDY# H_DBSY#
H_BR#0
H_IERR# H_INIT#
H_LOCK#
RS#0 RS#1 RS#2 H_TRDY#
H_HIT# H_HITM#
H_BPM#0 H_BPM#1 H_BPM#2 H_BPM#3 H_BPM#4 H_BPM#5 H_TCK H_TDI
H_TDO H_TMS H_TRST#
H_PROCHOT#
CPU_TMPA 15
VTIN_GND 15
ITP_CLK0
ITP_CLK1 CK_H_CPU CK_H_CPU#
H_ADS# 6 H_BNR# 6 H_BPRI# 6
H_DEFER# 6 H_DRDY# 6 H_DBSY# 6
H_BR#0 6
H_INIT# 11
H_LOCK# 6
H_CPURST# 6
H_TRDY# 6
H_HIT# 6 H_HITM# 6
TRMTRIP#
CK_H_CPU 14 CK_H_CPU# 14
Celeron:A09-1020105-I06
Dothan:N12-4790010-L06
U900
U900
Celeron-M
Celeron-M
A A
5
4
HD#[0..63]
HDSTBP#[0..3]
HDSTBN#[0..3]
DBI#[0..3]
TP18TP18
TRMTRIP# 7,11
TP16TP16 TP17TP17
54.9_1%_0402
54.9_1%_0402
FP_RST#12,27
V_FSB_VTT
R267 56_0603R267 56_0603
R229 56_0603R229 56_0603
H_TMS
H_TDI
H_TCK
H_TRST#
R185
R185
R158 0R_0402R158 0R_0402
R218 39.2R_1%_0402R218 39.2R_1%_0402
R208 150_1%_0402R208 150_1%_0402
R203 27.4R1%R203 27.4R1%
R206 680_0603R206 680_0603
V_FSB_VTT
R187 22.6_1%_0402R187 22.6_1%_0402
VCC3_SB
R157
R157
240R_0402
240R_0402
3
H_IERR#
H_BPM#5
CPU_BSEL014 CPU_BSEL114
C143
C143
0.1U25V_0603
0.1U25V_0603
2K_1%_0603
2K_1%_0603
H_TDI H_TRST# H_TCK
CK_H_ITP
H_TCK H_BPM#5 H_BPM#4 H_BPM#3 H_BPM#2 H_BPM#1 H_BPM#0 ITP_DBR#
HD#0 HD#1 HD#2 HD#3 HD#4 HD#5 HD#6 HD#7 HD#8 HD#9 HD#10 HD#11 HD#12 HD#13 HD#14 HD#15
V_FSB_VTT
CPU_BSEL0 CPU_BSEL1
V_FSB_VTT
R169
R169
1K_1%_0603
1K_1%_0603
0.5" max
R168
R168
length
ITP NOPOP ­Remove R880, R890, R871, R151, JTAG1
HDSTBN#0 HDSTBP#0 DBI#0
HD#16 HD#17 HD#18 HD#19 HD#20 HD#21 HD#22 HD#23 HD#24 HD#25 HD#26 HD#27 HD#28 HD#29 HD#30 HD#31 HDSTBN#1 HDSTBP#1 DBI#1
CPU_GTLREF
CPU ITP 700FLEX connector
ALL COMPONENTS CLOSE TO ITP
JTAG1
JTAG1
TDI1TMS
3
TRST#
5
TDOITPH_TDO
TCK
7
TDO
9
BCLK
11
FBO
13
BPM#5
15
BPM#4
17
BPM#3
19
BPM#2
21
BPM#1
23
BPM#0
25
DBR#
27
VCC
X_I_Molex 52435-2891
X_I_Molex 52435-2891
BCLK#
GND
RESET#
GND GND GND GND
GND DBA# VTAP
VCC
2 4
NC
6
NC
8 10 12 14 16 18 20 22 24 26 28
U18B
U18B
A19
#D0
A25
#D1
A22
#D2
B21
#D3
A24
#D4
B26
#D5
A21
#D6
B20
#D7
C20
#D8
B24
#D9
D24
#D10
E24
#D11
C26
#D12
B23
#D13
E23
#D14
C25
#D15
C23
DSTBN0#
C22
DSTBP0#
D25
DINV0#
H23
#D16
G25
#D17
L23
#D18
M26
#D19
H24
#D20
F25
#D21
G24
#D22
J23
#D23
M23
#D24
J25
#D25
L26
#D26
N24
#D27
M25
#D28
H26
#D29
N25
#D30
K25
#D31
K24
DSTBN1#
L24
DSTBP1#
J26
DINV1#
E1
PSI#
C16
BSEL0
C14
BSEL1
B2
NC1
A1
NC2
C3
RSVD2
AF7
RSVD3
AC1
RSVD [GTLREF3]
E26
RSVD [GTLREF1]
AD26
GTLREF0
Dothan_Processor_Skt
Dothan_Processor_Skt
G1: NC for Dothan and DPRSTP# for Yonah
H_TMS
CK_H_ITP#
RESETITP#
VCORE
2
#D32 #D33 #D34 #D35
DATA GRP 2
DATA GRP 2
#D36 #D37 #D38 #D39 #D40 #D41 #D42 #D43 #D44 #D45 #D46
DATA GRP 0
DATA GRP 0
#D47 DSTBN2# DSTBP2#
DINV2#
#D48
#D49
#D50
#D51
DATA GRP 3
DATA GRP 3
#D52
#D53
#D54
#D55
#D56
#D57
#D58
#D59
#D60
#D61
#D62
DATA GRP 1
DATA GRP 1
#D63 DSTBN3# DSTBP3#
DINV3#
COMP0 COMP1 COMP2 COMP3
MISC
MISC
DPRSTP#
DPSLP#
DPWR#
PWRGOOD
SLP#
TEST1 TEST2
TDOITP < 1" RESETITP < 0.5"
R171 22.6_1%_0402R171 22.6_1%_0402
CK_H_ITP CK_H_ITP#
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
HD#32
Y26
HD#33
AA24
HD#34
T25
HD#35
U23
HD#36
V23
HD#37
R24
HD#38
R26
HD#39
R23
HD#40
AA23
HD#41
U26
HD#42
V24
HD#43
U25
HD#44
V26
HD#45
Y23
HD#46
AA26
HD#47
Y25
HDSTBN#2
W25
HDSTBP#2
W24
DBI#2
T24
HD#48
AB25
HD#49
AC23
HD#50
AB24
HD#51
AC20
HD#52
AC22
HD#53
AC25
HD#54
AD23
HD#55
AE22
HD#56
AF23
HD#57
AD24
HD#58
AF20
HD#59
AE21
HD#60
AD21
HD#61
AF25
HD#62
AF22
HD#63
AF26
HDSTBN#3
AE24
HDSTBP#3
AE25
DBI#3
AD20
HCOMP0
P25
HCOMP1
P26
HCOMP2
AB2
HCOMP3
AB1
H_DPRSTP#
G1
H_DPSLP#
B7
H_DPWR#
C19
H_PWRGD
E4
H_SLP#
A6
R264 X_1K_0603R264 X_1K_0603
C5
R173 X_1K_0603R173 X_1K_0603
F23
0.5" max length
25 MIL AWAY FROM HIGH SPEED SIGNAL
R170 27.4_1%_0603R170 27.4_1%_0603 R172 54.9_1%_0402R172 54.9_1%_0402 R274 27.4_1%_0603R274 27.4_1%_0603 R277 54.9_1%_0402R277 54.9_1%_0402
H_DPRSTP# 12 H_DPSLP# 12 H_DPWR# 6 H_PWRGD 11 H_SLP# 6,11
BSEL1 BSEL0 FREQ
L
H
LL
LH
V_FSB_VTT
Please near R151
220R_0402
220R_0402
Dothan (Host Bus)
Dothan (Host Bus)
Dothan (Host Bus)
HH
R178
R178
H_CPURST# 6
CK_H_ITP 14 CK_H_ITP# 14
MICRO-START INT'L CO.,LTD.
MICRO-START INT'L CO.,LTD.
MICRO-START INT'L CO.,LTD.
MS-9623 1.2
MS-9623 1.2
MS-9623 1.2
1
100 MHz
133 MHz
REV
REV
338Friday, August 24, 2007
338Friday, August 24, 2007
338Friday, August 24, 2007
5
4
3
2
1
U18D
U18D
A2
VSS0
A5
VSS1
A8
VSS2
A11
VSS3
A14
VSS4
A17
VSS5
A20
VSS6
A23
VSS7
D D
C C
B B
A A
A26
VSS8
AA1
VSS9
AA4
VSS10
AA6
VSS11
AA8
VSS12
AA10
VSS13
AA12
VSS14
AA14
VSS15
AA16
VSS16
AA18
VSS17
AA20
VSS18
AA22
VSS19
AA25
VSS20
AB3
VSS21
AB5
VSS22
AB7
VSS23
AB9
VSS24
AB11
VSS25
AB13
VSS26
AB15
VSS27
AB17
VSS28
AB19
VSS29
AB21
VSS30
AB23
VSS31
AB26
VSS32
AC2
VSS33
AC5
VSS34
AC8
VSS35
AC10
VSS36
AC12
VSS37
AC14
VSS38
AC16
VSS39
AC18
VSS40
AC21
VSS41
AC24
VSS42
AD1
VSS43
AD4
VSS44
AD7
VSS45
AD9
VSS46
AD11
VSS47
AD13
VSS48
AD15
VSS49
AD17
VSS50
AD19
VSS51
AD22
VSS52
AD25
VSS53
AE3
VSS54
AE6
VSS55
AE8
VSS56
AE10
VSS57
AE12
VSS58
AE14
VSS59
AE16
VSS60
AE18
VSS61
AE20
VSS62
AE23
VSS63
AE26
VSS64
AF2
VSS65
AF5
VSS66
AF9
VSS67
AF11
VSS68
AF13
VSS69
AF15
VSS70
AF17
VSS71
AF19
VSS72
AF21
VSS73
AF24
VSS74
B3
VSS75
B6
VSS76
B9
VSS77
B12
VSS78
B16
VSS79
B19
VSS80
B22
VSS81
B25
VSS82
C1
VSS83
C4
VSS84
C7
VSS85
C10
VSS86
C13
VSS87
C15
VSS88
C18
VSS89
C21
VSS90
C24
VSS91
D2
VSS92
D5
VSS93
D7
VSS94
D9
VSS95
D11
VSS96
Dothan_Processor_Skt
Dothan_Processor_Skt
5
VSS97 VSS98
VSS99 VSS100 VSS101 VSS102 VSS103 VSS104 VSS105 VSS106 VSS107 VSS108 VSS109 VSS110 VSS111 VSS112 VSS113 VSS114 VSS115 VSS116 VSS117 VSS118 VSS119 VSS120 VSS121 VSS122 VSS123 VSS124 VSS125 VSS126 VSS127 VSS128 VSS129 VSS130 VSS131 VSS132 VSS133 VSS134 VSS135 VSS136 VSS137 VSS138 VSS139 VSS140 VSS141 VSS142 VSS143 VSS144 VSS145 VSS146 VSS147 VSS148 VSS149 VSS150 VSS151 VSS152 VSS153 VSS154 VSS155 VSS156 VSS157 VSS158 VSS159 VSS160 VSS161 VSS162 VSS163 VSS164 VSS165 VSS166 VSS167 VSS168 VSS169 VSS170 VSS171 VSS172 VSS173 VSS174 VSS175 VSS176 VSS177 VSS178 VSS179 VSS180 VSS181 VSS182 VSS183 VSS184 VSS185 VSS186 VSS187 VSS188 VSS189 VSS190 VSS191
D13 D15 D17 D19 D21 D23 D26 E3 E6 E8 E10 E12 E14 E16 E18 E20 E22 E25 F1 F4 F5 F7 F9 F11 F13 F15 F17 F19 F21 F24 G2 G6 G22 G23 G26 H3 H5 H21 H25 J1 J4 J6 J22 J24 K2 K5 K21 K23 K26 L3 L6 L22 L25 M1 M4 M5 M21 M24 N3 N6 N22 N23 N26 P2 P5 P21 P24 R1 R4 R6 R22 R25 T3 T5 T21 T23 T26 U2 U6 U22 U24 V1 V4 V5 V21 V25 W3 W6 W22 W23 W26 Y2 Y5 Y21 Y24
VCORE VCORE
Remove GND net 2006.2.27
U18C
U18C
D6
VCC0
D8
VCC1
D18
VCC2
D20
VCC3
D22
VCC4
E5
VCC5
E9
VCC6
E17
VCC7
E19
VCC8
E21
VCC9
F6
VCC10
F8
VCC11
F18
VCC12
F20
VCC13
F22
VCC14
G5
VCC15
G21
VCC16
H6
VCC17
H22
VCC18
J5
VCC19
J21
VCC20
K22
VCC21
U5
VCC22
V6
VCC23
V22
VCC24
W5
VCC25
W21
VCC26
Y6
VCC27
Y22
VCC28
AA5
VCC29
AA7
VCC30
AA9
VCC31
AA11
VCC32
AA13
VCC33
AA15
VCC34
AA17
VCC35
AA19
VCC36
AA21
VCC37
AB6
VCC38
AB8
VCC39
AB10
VCC40
AB12
VCC41
AB14
VCC42
AB16
VCC43
AB18
VCC44
AB20
VCC45
AB22
VCC46
AC9
VCC47
AC11
VCC48
AC13
VCC49
AC15
VCC50
AC17
VCC51
AD8
VCC52
AD10
VCC53
AD12
VCC54
AD14
VCC55
AD16
VCC56
AD18
VCC57
AE9
VCC58
Dothan_Processor_Skt
Dothan_Processor_Skt
U18E
U18E
XX4
GND
XX1
GND
XX2
GND
XX3
GND
XX8
GND
XX5
GND
XX6
GND
XX7
GND
Dothan_Processor_Skt
Dothan_Processor_Skt
4
VCCSENSE
VSSSENCE
HEAT
HEAT SINK
SINK GND
GND
VCC59 VCC60 VCC61 VCC62 VCC63 VCC64 VCC65 VCC66 VCC67 VCC68 VCC69 VCC70 VCC71
VCCA0 VCCA1 VCCA2 VCCA3
VCCP0 VCCP1 VCCP2 VCCP3 VCCP4 VCCP5 VCCP6 VCCP7 VCCP8
VCCP9 VCCP10 VCCP11 VCCP12 VCCP13 VCCP14 VCCP15 VCCP16 VCCP17 VCCP18 VCCP19 VCCP20 VCCP21 VCCP22 VCCP23 VCCP24
VCCQ0
VCCQ1
VID0 VID1 VID2 VID3 VID4 VID5
GND GND GND GND
GND GND GND GND
AE11 AE13 AE15 AE17 AE19 AF8 AF10 AF12 AF14 AF16 AF18 E7 AC19
F26 B1 N1 AC26
D10 D12 D14 D16 E11 E13 E15 F10 F12 F14 F16 K6 L21 L5 M22 M6 N21 N5 P22 P6 R21 R5 T22 T6 U21
P23 W4
E2 F2 F3 G3 G4 H4
AE7
AF6
XX12 XX9 XX10 XX11
XX16 XX13 XX14 XX15
R177
R177
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CPU_VCCA
0.01uf and 10uf of a pair capacitors
X_0_0402
X_0_0402
VID0 VID1 VID2 VID3 VID4 VID5
TP8TP8
TP9TP9
V_FSB_VTT
VID0 29 VID1 29 VID2 29 VID3 29 VID4 29 VID5 29
3
C145 10U6.3V_0805C145 10U6.3V_0805
C144 0.01U25V_0402C144 0.01U25V_0402
C146 0.01U25V_0402C146 0.01U25V_0402
R123
R123
4.7K_0603
4.7K_0603
VID4
R114
R114
4.7K_0603
4.7K_0603
VID5
R106
R106
4.7K_0603
4.7K_0603
VCC3VCC3
R156
R122
R122
10K_0603
10K_0603
CE
Q24
Q24
B
MMBT3904
MMBT3904
VCC3
R111
R111
10K_0603
10K_0603
CE
Q23
Q23
B
MMBT3904
MMBT3904
VCC3
R104
R104
10K_0603
10K_0603
CE
Q22
Q22
B
MMBT3904
MMBT3904
GPVID4 15
GPVID5 15
2
VID0VID3
R155
R155
4.7K_0603
4.7K_0603
VID1
R144
R144
4.7K_0603
4.7K_0603
VID2
R129
R129
4.7K_0603
4.7K_0603
MICRO-START INT'L CO.,LTD.
MICRO-START INT'L CO.,LTD.
Title
Title
Title
Dothan (Power/GND)/ITP
Dothan (Power/GND)/ITP
Dothan (Power/GND)/ITP
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
MICRO-START INT'L CO.,LTD.
MS-9623 1.2
MS-9623 1.2
MS-9623 1.2
R156
10K_0603
10K_0603
1
GPVID0 15GPVID3 15
GPVID1 15
GPVID2 15
438Friday, August 24, 2007
438Friday, August 24, 2007
438Friday, August 24, 2007
CE
Q27
Q27
B
MMBT3904
MMBT3904
VCC3
R142
R142
10K_0603
10K_0603
CE
Q26
Q26
B
MMBT3904
MMBT3904
VCC3
R130
R130
10K_0603
10K_0603
CE
Q25
Q25
B
MMBT3904
MMBT3904
5
4
3
2
1
http://adf.ly/3o8pJ
VCORE
D D
C C
B B
C199
C199
10U6.3V_0805
10U6.3V_0805
C535
C535
C530
C530
C211
C211
10U6.3V_0805
10U6.3V_0805
C541
C541
10U6.3V_0805
10U6.3V_0805
C536
C536
0.1U25V_0603
0.1U25V_0603
C166
C166
10U6.3V_0805
10U6.3V_0805
C188
C188
0.1U25V_0603
0.1U25V_0603
V_FSB_VTT
C537
C537
10U6.3V_0805
10U6.3V_0805
C190
C190
10U6.3V_0805
10U6.3V_0805
C539
C539
0.1U16V_0402
0.1U16V_0402
C525
C525
10U6.3V_0805
10U6.3V_0805
C538
C538
10U6.3V_0805
10U6.3V_0805
V_FSB_VTT
C543
C543
0.1U25V_0603
0.1U25V_0603
C165
C165
10U6.3V_0805
10U6.3V_0805
C533
C533
10U6.3V_0805
10U6.3V_0805
C186
C186
10U6.3V_0805
10U6.3V_0805
close to cpu socket
C519
C524
C524
0.1U25V_0603
0.1U25V_0603
C519
0.1U25V_0603
0.1U25V_0603
C528
C528
10U6.3V_0805
10U6.3V_0805
C527
C527
10U6.3V_0805
10U6.3V_0805
C515
C515
0.1U25V_0603
0.1U25V_0603
C523
C523
10U6.3V_0805
10U6.3V_0805
C209
C209
0.1U25V_0603
0.1U25V_0603
C191
C191
10U6.3V_0805
10U6.3V_0805
10U6.3V_0805
10U6.3V_0805
C208
C208
0.1U16V_0402
0.1U16V_0402
C173
C173
+
+
0.1U16V_0402
0.1U16V_0402
VCORE
C522
C522
10U6.3V_0805
10U6.3V_0805
C182
C182
X_CX_100U_2V
X_CX_100U_2V
C176
C176
10U6.3V_0805
10U6.3V_0805
C174
C174
10U6.3V_0805
10U6.3V_0805
C162
C162
10U6.3V_0805
10U6.3V_0805
C210
C210
10U6.3V_0805
10U6.3V_0805
C520
C520
10U6.3V_0805
10U6.3V_0805
C183
C183
10U6.3V_0805
10U6.3V_0805
C521
C521
10U6.3V_0805
10U6.3V_0805
C198
C198
10U6.3V_0805
10U6.3V_0805
1U10V_0603
1U10V_0603
C179
C179
C177
C177
10U6.3V_0805
10U6.3V_0805
10U6.3V_0805
10U6.3V_0805
C164
C207
C207
C206
C206
0.1U16V_0402
0.1U16V_0402
C205
C205
0.1U16V_0402
0.1U16V_0402
C164
0.1U16V_0402
0.1U16V_0402
C163
C163
0.1U16V_0402
0.1U16V_0402
0.1U16V_0402
0.1U16V_0402
Without on Celeron-M
A A
MICRO-START INT'L CO.,LTD.
MICRO-START INT'L CO.,LTD.
Title
Title
Title
Dothan (By Pass)
Dothan (By Pass)
Dothan (By Pass)
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
5
4
3
2
Date: Sheet
MICRO-START INT'L CO.,LTD.
MS-9623 1.2
MS-9623 1.2
MS-9623 1.2
1
of
538Friday, August 24, 2007
of
538Friday, August 24, 2007
of
538Friday, August 24, 2007
5
4
3
2
1
http://adf.ly/3o8pJ
U20A
HD#[0..63]3
D D
V_FSB_VTT
HXRCOMP
R273
R268
R268
24.9_1%_0402
R266
R266
24.9_1%_0402
V_FSB_VTT
R263
R263
221_1%_0402
221_1%_0402
V_FSB_VTT
R255
R255
54.9_1%_0402
54.9_1%_0402
HYSCOMP
HXSWING HYRCOMP
C245
C245
0.1U16V_0402
0.1U16V_0402
0.5" max length
5
C C
100R_0402
100R_0402
B B
A A
R273
54.9_1%_0402
54.9_1%_0402
HXSCOMP
R225
R225
24.9_1%_0603
24.9_1%_0603
R232
R232
221_1%_0402
221_1%_0402
R235
R235
100R_0402
100R_0402
V_FSB_VTT
HYSWING
C215
C215
0.1U16V_0402
0.1U16V_0402
4
HD#0 HD#1 HD#2 HD#3 HD#4 HD#5 HD#6 HD#7 HD#8 HD#9 HD#10 HD#11 HD#12 HD#13 HD#14 HD#15 HD#16 HD#17 HD#18 HD#19 HD#20 HD#21 HD#22 HD#23 HD#24 HD#25 HD#26 HD#27 HD#28 HD#29 HD#30 HD#31 HD#32 HD#33 HD#34 HD#35 HD#36 HD#37 HD#38 HD#39 HD#40 HD#41 HD#42 HD#43 HD#44 HD#45 HD#46 HD#47 HD#48 HD#49 HD#50 HD#51 HD#52 HD#53 HD#54 HD#55 HD#56 HD#57 HD#58 HD#59 HD#60 HD#61 HD#62 HD#63
HXRCOMP HXSCOMP HXSWING HYRCOMP HYSCOMP HYSWING
E4 E1 F4 H7 E2 F1 E3 D3 K7 F2
J7
J8 H6 F3 K8 H5 H1 H2 K5 K6
J4
G3
H3
J1 L5 K4
J5 P7 L7
J3 P5 L3 U7 V6 R6 R5 P3 T8 R7 R8 U8 R4 T4 T5 R1 T3 V8 U6
W6
U3 V5
W8 W7
U2 U1 Y5 Y2 V4 Y7
W1 W3
Y3 Y6
W2
C1 C2 D1 T1 L1 P1
U20A
HD0# HD1# HD2# HD3# HD4# HD5# HD6# HD7# HD8# HD9# HD10# HD11# HD12# HD13# HD14# HD15# HD16# HD17# HD18# HD19# HD20# HD21# HD22# HD23# HD24# HD25# HD26# HD27# HD28# HD29# HD30# HD31# HD32# HD33# HD34# HD35# HD36# HD37# HD38# HD39# HD40# HD41# HD42# HD43# HD44# HD45# HD46# HD47# HD48# HD49# HD50# HD51# HD52# HD53# HD54# HD55# HD56# HD57# HD58# HD59# HD60# HD61# HD62# HD63#
HXRCOMP HXSCOMP HXSWING HYRCOMP HYSCOMP HYSWING
ALVISO-915GME
ALVISO-915GME
HA3# HA4# HA5# HA6# HA7# HA8#
HA9# HA10# HA11# HA12# HA13# HA14# HA15# HA16# HA17# HA18# HA19# HA20# HA21# HA22# HA23# HA24# HA25# HA26# HA27# HA28# HA29# HA30# HA31#
HADS# HADSTB0# HADSTB1#
HVREF
HBNR#
HBPRI#
BREQ0#
HCPURST#
HOST
HOST
HCLKINN HCLKINP
HDBSY#
HDEFER#
HDINV#0 HDINV#1 HDINV#2 HDINV#3
HDPWR#
HDRDY# HDSTBN0# HDSTBN1# HDSTBN2# HDSTBN3# HDSTBP0# HDSTBP1# HDSTBP2# HDSTBP3#
HEDRDY#
HHIT#
HHITM#
HLOCK#
HPCREQ#
HREQ0#
HREQ1#
HREQ2#
HREQ3#
HREQ4#
HRS0# HRS1# HRS2#
HCPUSLP#
HTRDY#
G9 C9 E9 B7 A10 F9 D8 B10 E10 G10 D9 E11 F10 G11 G13 C10 C11 D11 C12 B13 A12 F12 G12 E12 C13 B11 D13 A13 F13
F8 B9 E13 J11 A5 D5 E7 H10
AB1 AB2
C6 E6 H8 K3 T7 U5 G6 F7 G4 K1 R3 V3 G5 K2 R2 W4 F6 D4 D6 B3 A11 A7 D7 B8 C7 A8 A4 C5 B4 G8 B5
3
HA#3 HA#4 HA#5 HA#6 HA#7 HA#8 HA#9 HA#10 HA#11 HA#12 HA#13 HA#14 HA#15 HA#16 HA#17 HA#18 HA#19 HA#20 HA#21 HA#22 HA#23 HA#24 HA#25 HA#26 HA#27 HA#28 HA#29 HA#30 HA#31
H_ADS# HASTB#0 HASTB#1
H_BNR#
H_BPRI# H_BR#0 H_CPURST#
CK_H_MCH#
CK_H_MCH
H_DBSY#
H_DEFER# DBI#0 DBI#1 DBI#2 DBI#3
H_DPWR# H_DRDY#
HDSTBN#0 HDSTBN#1 HDSTBN#2 HDSTBN#3 HDSTBP#0 HDSTBP#1 HDSTBP#2 HDSTBP#3
H_HIT#
H_HITM#
H_LOCK#
HREQ#0 HREQ#1 HREQ#2 HREQ#3 HREQ#4
RS#0 RS#1 RS#2
HCPUSLP#_GMCH
H_TRDY#
HA#[3..31] 3
H_ADS# 3 HASTB#0 3 HASTB#1 3
H_BNR# 3 H_BPRI# 3 H_BR#0 3 H_CPURST# 3
CK_H_MCH# 14 CK_H_MCH 14
H_DBSY# 3 H_DEFER# 3
DBI#[0..3] 3
H_DPWR# 3
H_DRDY# 3
HDSTBN#[0..3] 3
HDSTBP#[0..3] 3
H_HIT# 3 H_HITM# 3 H_LOCK# 3
HREQ#[0..4] 3
RS#[0..2] 3
R278 0R_0603R278 0R_0603
H_TRDY# 3
as close as to GMCH J11 pin
HVREF
C544
C544
0.1U25V_0603
0.1U25V_0603
H_SLP# 3,11
2
V_FSB_VTT
R297
R297
100R_0402
100R_0402
C267
C267
0.1U16V_0402
0.1U16V_0402
R296
R296
200_1%_0402
200_1%_0402
MICRO-START INT'L CO.,LTD.
MICRO-START INT'L CO.,LTD.
Title
Title
Title
ALVISO (HOST)
ALVISO (HOST)
ALVISO (HOST)
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
Date: Sheet
MICRO-START INT'L CO.,LTD.
MS-9623 1.2
MS-9623 1.2
MS-9623 1.2
638Friday, August 24, 2007
638Friday, August 24, 2007
638Friday, August 24, 2007
1
of
of
of
A
U20C
U20C
DMIRXN011 DMIRXN111 DMIRXN211 DMIRXN311
4 4
P_DDR0_A18 P_DDR1_A18 P_DDR2_A18 P_DDR0_B18 P_DDR1_B18 P_DDR2_B18
N_DDR0_A18 N_DDR1_A18 N_DDR2_A18 N_DDR0_B18 N_DDR1_B18
3 3
N_DDR2_B18
SCKE_A018,19 SCKE_A118,19 SCKE_B018,19 SCKE_B118,19
SCS_A#018,19 SCS_A#118,19 SCS_B#018,19 SCS_B#118,19
40.2_1%_0603 R60040.2_1%_0603 R600
40.2_1%_0603 R59940.2_1%_0603 R599
VCC_DDR2
2 2
PM_EXTTS#0
PM_EXTTS#1
VCC_DDR2
1 1
DMIRXP011 DMIRXP111 DMIRXP211 DMIRXP311
DMITXN011 DMITXN111 DMITXN211 DMITXN311
DMITXP011 DMITXP111 DMITXP211 DMITXP311
ODT_A018,19 ODT_A118,19 ODT_B018,19 ODT_B118,19
80.6_1%_0603R598 80.6_1%_0603R598
80.6_1%_0603R597 80.6_1%_0603R597
R310 10K_0402R310 10K_0402
R311 10K_0402R311 10K_0402
R186 1K_1%_0603R186 1K_1%_0603
TXL0-
X_90ohm_0603
X_90ohm_0603
L6004
L6004
TXL0+
X_90ohm_0603
X_90ohm_0603
L6003
L6003
TXL1+
M_OCDCOMP0 M_OCDCOMP1
M_RCOMPN M_RCOMPP
915GMDDR_VREF
SMXSLEW
SMYSLEW
V_2P5_MCH
R174
R174
1K_1%_0603
1K_1%_0603
R550 0R_0402R550 0R_0402
34
21
R557 0R_0402R557 0R_0402
R551 0R_0402R551 0R_0402
34
21
R552 0R_0402R552 0R_0402
AA31
AB35 AC31 AD35
Y31
AA35 AB31 AC35
AA33
AB37 AC33 AD37
Y33
AA37 AB33 AC37
AM33
AL1 AE11 AJ34
AF6
AC10
AN33
AK1
AE10
AJ33
AF5
AD10
AP21
AM21
AH21 AK21
AN16
AM14
AH15 AG16
AF22 AF16
AP14
AL15
AM11
AN10
AK10 AK11 AF37
AD1
AE27 AE28
AF9
AF10
915GMDDR_VREF
C172
C172
0.1U25V_0603
0.1U25V_0603
R563
R563
X_0R,0402,5%
X_0R,0402,5%
R553
R553
X_0R,0402,5%
X_0R,0402,5%
DMIRXN0 DMIRXN1 DMIRXN2 DMIRXN3
DMIRXP0 DMIRXP1 DMIRXP2 DMIRXP3
DMITXN0 DMITXN1 DMITXN2 DMITXN3
DMITXP0 DMITXP1 DMITXP2 DMITXP3
SM_CK0 SM_CK1 SM_CK2 SM_CK3 SM_CK4 SM_CK5
SM_CK0# SM_CK1# SM_CK2# SM_CK3# SM_CK4# SM_CK5#
SM_CKE0 SM_CKE1 SM_CKE2 SM_CKE3
SM_CS0# SM_CS1# SM_CS2# SM_CS3#
SM_OCDCOMP0 SM_OCDCOMP1
SM_ODT0 SM_ODT1 SM_ODT2 SM_ODT3
SMRCOMPN SMRCOMPP SMVREF0 SMVREF1 SMXSLEWIN SMXSLEWOUT SMYSLEWIN SMYSLEWOUT
ALVISO-915GME
ALVISO-915GME
C149
C149
0.1U25V_0603
0.1U25V_0603
DMIDDR MUXING
DMIDDR MUXING
CFG/RSVDPM
CFG/RSVDPM
BM_BUSY#
EXT_TS0# EXT_TS1#
THRMTRIP#
DREF_CLKN
DREF_CLKP DREF_SSCLKN DREF_SSCLKP
CLK
CLK
NC
NC
VCC3
TX_L0­TX_L0+
TX_L1-TXL1­TX_L1+
A
CFG0 CFG1 CFG2 CFG3 CFG4 CFG5 CFG6 CFG7 CFG8
CFG9 CFG10 CFG11 CFG12 CFG13 CFG14 CFG15 CFG16 CFG17 CFG18 CFG19 CFG20
RSVD21 RSVD22 RSVD23 RSVD24 RSVD25 RSVD26 RSVD27
PWROK
RSTIN#
NC1 NC2 NC3 NC4 NC5 NC6 NC7 NC8
NC9 NC10 NC11
B
MCH_BSEL0
G16
MCH_BSEL1
H13
MCH_BSEL2
G14 F16
CFG4
F15
CFG5
G15
CFG6
E16
CFG7
D17
CFG8
J16
CFG9
D15
CFG10
E15
CFG11
D14
CFG12
E14
CFG13
H12
CFG14
C14
CFG15
H15
CFG16
J15
CFG17
H14
CFG18
G22
CFG19
G23 D23 G25 G24 J17 A31 A30 D26 D25
BM_BUSY#
J23
PM_EXTTS#0
J21
PM_EXTTS#1
H22 F5 AD30 AE29
A24 A23 C37 D37
AP37 AN37 AP36 AP2 AP1 AN1 B1 A2 B37 A36 A37
BH2X10_WHITE-2pitch
BH2X10_WHITE-2pitch
PWRGD 12,24,27,33 PLTRST_MCH# 24
TP1TP1 TP5TP5 TP3TP3 TP2TP2 TP4TP4 TP6TP6 TP10TP10 TP11TP11 TP34TP34 TP35TP35 TP37TP37
JLVDS1
JLVDS1
1 20 2 3
5 6 7 8 13 9 12
10 11
B
V_FSB_VTT
http://adf.ly/3o8pJ
R308
R308
10K_0603
10K_0603
MCH_BSEL1 14 MCH_BSEL2 14
TP26TP26
TP28TP28 TP19TP19
R304
R304
TP27TP27
X_2.2K_0402
X_2.2K_0402 TP33TP33 TP29TP29 TP22TP22
LOW=DMIX2
TP36TP36
HIGH=DMIX4
TP24TP24
TP23TP23
TP25TP25
MCH_CFG_20 21
IN
BM_BUSY# 12
TRMTRIP# 3,11
CK_96M_DREF# 14 CK_96M_DREF 14 CK_LVDS# 14 CK_LVDS 14
U20_AD30 connect to PWRGD 2005.1.26
X_0R,0402,5%
19
LBKLT_EN
18
LVDD_EN
174 16
TXL_CLK+
15
TXL_CLK-
14
TX_L2+ TX_L2-
X_0R,0402,5%
X_0R,0402,5%
X_0R,0402,5%
R538
R538
R532
R532
V_2P5_MCH
C
CFG16 (FSB Dynamic ODT)
CFG9 PCIE Graphics Lane
SDVO_CTRL_DATA21
SDVO_CTRL_CLK21
MCH_DDC_CLK27 MCH_DDC_DATA27 VGA_BLUE27
VGA_GREEN27
VGA_RED27
VSYNC27 HSYNC27
R322 X_2.2K_0402R322 X_2.2K_0402 R323 X_2.2K_0402R323 X_2.2K_0402
R290 0R_0402R290 0R_0402
3 4
2 1
R465 0R_0402R465 0R_0402
R535 0R_0402R535 0R_0402
3 4
2 1
R537 0R_0402R537 0R_0402
C
R287 X_2.2K_0402R287 X_2.2K_0402
LOW = Dynamic ODT Disable HIGH = Dynamic ODT Enable
CFG9
R293 X_2.2K_0402R293 X_2.2K_0402
BI
CK_PE_100M_MCH#14 CK_PE_100M_MCH14
L6001
L6001 X_90ohm_0603
X_90ohm_0603
L6002
L6002 X_90ohm_0603
X_90ohm_0603
BI
MCH_DDC_CLK
MCH_DDC_DATA
VGA_BLUE
VGA_GREEN
VGA_RED
R292 39_0402R292 39_0402 R285 39_0402R285 39_0402 R288 255_1%_0603R288 255_1%_0603
TXLCLK+
TXLCLK-
CFG16
LOW = Reverse Lane HIGH = Normal operation
H24
H25 AB29 AC29
A15
C16
A17
B15
B16
B17
E24
E23
E21
D21
C20
B20
A19
B19
H21
G21
R291 100K_0603R291 100K_0603
LBKLT_EN
LDDC_CLK LDDC_DATA
LVDD_EN
R275 1.5K_0603R275 1.5K_0603
TP31TP31 TP32TP32
TXL2+
TXL2-
TXLCLK­TXLCLK+
TXL0­TXL1­TXL2-
TXL0+ TXL1+ TXL2+
E25
F25
C23
C22
F23
F22
F26
C33
C31
F28
F27
B30
B29
1
C25
.
1
C24
.
B34
B33
B32
A34
A33
B31
C29
D28
C27
C28
D27
C26
U20F
U20F
SDVOCTRL_DATA SDVOCTRL_CLK GCLKN GCLKP
TVDAC_A TVDAC_B TVDAC_C
J18
TV_REFSET TV_IRTNA TV_IRTNB TV_IRTNC
DDCCLK DDCDATA BLUE BLUE# GREEN GREEN# RED RED# VSYNC HSYNC
J20
REFSET
LBKLT_CTRL LBKLT_EN LCTLA_CLK LCTLB_DATA LDDC_CLK LDDC_DATA LVDD_EN LIBG LVBG LVREFH LVREFL
LACLKN LACLKP LBCLKN LBCLKP
LADATAN0 LADATAN1 LADATAN2
LADATAP0 LADATAP1 LADATAP2
LBDATAN0 LBDATAN1 LBDATAN2
LBDATAP0 LBDATAP1 LBDATAP2
ALVISO-915GME
ALVISO-915GME
VCC3
C598 1U10V_0603C598 1U10V_0603
D
CFG6
V_2P5_MCH
CFG18
D
LOW=DDR2
R303 2.2K_0402R303 2.2K_0402
MISC
MISC
TV VGA LVDS
TV VGA LVDS
HIGH=DDR1
CFG18: VCC Select
R301
R301
X_1K_0402
X_1K_0402
Remove D11 and leave R301 NON-POP. 2006.10.24
EXP_RXN0 EXP_RXN1 EXP_RXN2 EXP_RXN3 EXP_RXN4 EXP_RXN5 EXP_RXN6 EXP_RXN7 EXP_RXN8 EXP_RXN9
EXP_RXP0 EXP_RXP1 EXP_RXP2 EXP_RXP3 EXP_RXP4 EXP_RXP5 EXP_RXP6 EXP_RXP7 EXP_RXP8 EXP_RXP9
EXP_TXN0 EXP_TXN1 EXP_TXN2 EXP_TXN3 EXP_TXN4 EXP_TXN5 EXP_TXN6 EXP_TXN7 EXP_TXN8 EXP_TXN9
EXP_TXP0 EXP_TXP1 EXP_TXP2 EXP_TXP3 EXP_TXP4 EXP_TXP5 EXP_TXP6 EXP_TXP7 EXP_TXP8 EXP_TXP9
D36 D34
E30 F34 G30 H34 J30 K34 L30 M34 N30 P34 R30 T34 U30 V34 W30 Y34
D30 E34 F30 G34 H30 J34 K30 L34 M30 N34 P30 R34 T30 U34 V30 W34
E32 F36 G32 H36 J32 K36 L32 M36 N32 P36 R32 T36 U32 V36 W32 Y36
D32 E36 F32 G36 H32 J36 K32 L36 M32 N36 P32 R36 T32 U36 V32 W36
EXP_COMPI
EXP_ICOMPO
EXP_RXN10 EXP_RXN11 EXP_RXN12 EXP_RXN13 EXP_RXN14 EXP_RXN15
EXP_RXP10 EXP_RXP11 EXP_RXP12 EXP_RXP13 EXP_RXP14 EXP_RXP15
PCI-EXPRESS GRAPHICS
PCI-EXPRESS GRAPHICS
EXP_TXN10 EXP_TXN11 EXP_TXN12 EXP_TXN13 EXP_TXN14 EXP_TXN15
EXP_TXP10 EXP_TXP11 EXP_TXP12 EXP_TXP13 EXP_TXP14 EXP_TXP15
Remove 1PORT_TX2A 2006.1.27
Title
Title
Title
ALVISO (CORE)
ALVISO (CORE)
ALVISO (CORE)
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet of
Date: Sheet of
E
LOW = 1.05V HIGH = 1.5V
VCC3G_PCIE
GRCOMP
R270 24.9_1%_0603R270 24.9_1%_0603
EXP_8PORT_RXN0 EXP_8PORT_RXN1 EXP_8PORT_RXN2 EXP_8PORT_RXN3 EXP_8PORT_RXN4 EXP_8PORT_RXN5 EXP_8PORT_RXN6 EXP_8PORT_RXN7
EXP_8PORT_RXP0 EXP_8PORT_RXP1 EXP_8PORT_RXP2 EXP_8PORT_RXP3 EXP_8PORT_RXP4 EXP_8PORT_RXP5 EXP_8PORT_RXP6 EXP_8PORT_RXP7
EXP_8PORT_TXN0 EXP_8PORT_TXN1 EXP_8PORT_TXN2 EXP_8PORT_TXN3 EXP_8PORT_TXN4 EXP_8PORT_TXN5 EXP_8PORT_TXN6 EXP_8PORT_TXN7EXP_8PORT_TXN7
EXP_8PORT_TXP0 EXP_8PORT_TXP1 EXP_8PORT_TXP2 EXP_8PORT_TXP3 EXP_8PORT_TXP4 EXP_8PORT_TXP5 EXP_8PORT_TXP6 EXP_8PORT_TXP7
MICRO-START INT'L CO.,LTD.
MICRO-START INT'L CO.,LTD.
MICRO-START INT'L CO.,LTD.
MS-9623 1.2
MS-9623 1.2
MS-9623 1.2
EXP_8PORT_RXN[0..7] 21
EXP_8PORT_RXP[0..7] 21
EXP_8PORT_TXN[0..7] 21
EXP_8PORT_TXP[0..7] 21
of
738Friday, August 24, 2007
738Friday, August 24, 2007
738Friday, August 24, 2007
E
A
B
C
D
E
http://adf.ly/3o8pJ
4 4
U20B
DATA_A[63:0]18
3 3
2 2
DATA_A0 DATA_A1 DATA_A2 DATA_A3 DATA_A4 DATA_A5 DATA_A6 DATA_A7 DATA_A8 DATA_A9 DATA_A10 DATA_A11 DATA_A12 DATA_A13 DATA_A14 DATA_A15 DATA_A16 DATA_A17 DATA_A18 DATA_A19 DATA_A20 DATA_A21 DATA_A22 DATA_A23 DATA_A24 DATA_A25 DATA_A26 DATA_A27 DATA_A28 DATA_A29 DATA_A30 DATA_A31 DATA_A32 DATA_A33 DATA_A34 DATA_A35 DATA_A36 DATA_A37 DATA_A38 DATA_A39 DATA_A40 DATA_A41 DATA_A42 DATA_A43 DATA_A44 DATA_A45 DATA_A46 DATA_A47 DATA_A48 DATA_A49 DATA_A50 DATA_A51 DATA_A52 DATA_A53 DATA_A54 DATA_A55 DATA_A56 DATA_A57 DATA_A58 DATA_A59 DATA_A60 DATA_A61 DATA_A62 DATA_A63
AG35 AH35
AL35 AL37
AH36
AJ35
AK37
AL34
AM36
AN35
AP32 AM31 AM34 AM35
AL32
AM32
AN31
AP31
AN28
AP28
AL30 AM30 AM28
AL28
AP27 AM27 AM23 AM22
AL23
AM24
AN22
AP22
AM9
AP11
AP10
AM7 AN5 AN6 AN3
AM6
AM3
AG2 AG1
AM2 AH3 AG3
AD6 AC4
AD4 AD5
AL9 AL6 AP7
AL7
AP3 AP6
AL4
AK2 AK3
AL3
AF3 AE3
AF2 AF1
U20B
SADQ0 SADQ1 SADQ2 SADQ3 SADQ4 SADQ5 SADQ6 SADQ7 SADQ8 SADQ9 SADQ10 SADQ11 SADQ12 SADQ13 SADQ14 SADQ15 SADQ16 SADQ17 SADQ18 SADQ19 SADQ20 SADQ21 SADQ22 SADQ23 SADQ24 SADQ25 SADQ26 SADQ27 SADQ28 SADQ29 SADQ30 SADQ31 SADQ32 SADQ33 SADQ34 SADQ35 SADQ36 SADQ37 SADQ38 SADQ39 SADQ40 SADQ41 SADQ42 SADQ43 SADQ44 SADQ45 SADQ46 SADQ47 SADQ48 SADQ49 SADQ50 SADQ51 SADQ52 SADQ53 SADQ54 SADQ55 SADQ56 SADQ57 SADQ58 SADQ59 SADQ60 SADQ61 SADQ62 SADQ63
ALVISO-915GME
ALVISO-915GME
AK15
SA_BS0#
AK16
SA_BS1#
AL21
SA_BS2#
AJ37
SA_DM0
AP35
SA_DM1
AL29
SA_DM2
AP24
SA_DM3
AP9
SA_DM4
AP4
SA_DM5
AJ2
SA_DM6
AD3
SA_DM7
AK36
SA_DQS0
AP33
SA_DQS1
AN29
SA_DQS2
AP23
SA_DQS3
AM8
SA_DQS4
AM4
SA_DQS5
AJ1
SA_DQS6
AE5
SA_DQS7
AK35
SA_DQS0#
AP34
SA_DQS1#
AN30
SA_DQS2#
AN23
SA_DQS3#
AN8
SA_DQS4#
AM5
SA_DQS5#
AH1
SA_DQS6#
AE4
SA_DQS7#
SA_MA0 SA_MA1 SA_MA2 SA_MA3 SA_MA4 SA_MA5 SA_MA6 SA_MA7 SA_MA8
SA_MA9 SA_MA10 SA_MA11 SA_MA12 SA_MA13
DDR SYSTEM MEMORY A
DDR SYSTEM MEMORY A
SA_CAS# SA_RAS#
SA_RCVENIN#
SA_RCVENOUT#
SA_WE#
AL17 AP17 AP18 AM17 AN18 AM18 AL19 AP20 AM19 AL20 AM16 AN20 AM20 AM15
AN15 AP16 AF29 AF28 AP15
MAA_A0 MAA_A1 MAA_A2 MAA_A3 MAA_A4 MAA_A5 MAA_A6 MAA_A7 MAA_A8 MAA_A9 MAA_A10 MAA_A11 MAA_A12 MAA_A13
TP14TP14 TP13TP13
DQM_A0 18 DQM_A1 18 DQM_A2 18 DQM_A3 18 DQM_A4 18 DQM_A5 18 DQM_A6 18 DQM_A7 18
DQS_A0 18 DQS_A1 18 DQS_A2 18 DQS_A3 18 DQS_A4 18 DQS_A5 18 DQS_A6 18 DQS_A7 18
DQS_A#0 18 DQS_A#1 18 DQS_A#2 18 DQS_A#3 18 DQS_A#4 18 DQS_A#5 18 DQS_A#6 18 DQS_A#7 18
SBS_A0 18,19 SBS_A1 18,19 SBS_A2 18,19
MAA_A[0..13] 18,19
CAS_A# 18,19 RAS_A# 18,19
WE_A# 18,19
U20G
DATA_B[63:0]18
DATA_B0 DATA_B1 DATA_B2 DATA_B3 DATA_B4 DATA_B5 DATA_B6 DATA_B7 DATA_B8 DATA_B9 DATA_B10 DATA_B11 DATA_B12 DATA_B13 DATA_B14 DATA_B15 DATA_B16 DATA_B17 DATA_B18 DATA_B19 DATA_B20 DATA_B21 DATA_B22 DATA_B23 DATA_B24 DATA_B25 DATA_B26 DATA_B27 DATA_B28 DATA_B29 DATA_B30 DATA_B31 DATA_B32 DATA_B33 DATA_B34 DATA_B35 DATA_B36 DATA_B37 DATA_B38 DATA_B39 DATA_B40 DATA_B41 DATA_B42 DATA_B43 DATA_B44 DATA_B45 DATA_B46 DATA_B47 DATA_B48 DATA_B49 DATA_B50 DATA_B51 DATA_B52 DATA_B53 DATA_B54 DATA_B55 DATA_B56 DATA_B57 DATA_B58 DATA_B59 DATA_B60 DATA_B61 DATA_B62 DATA_B63
AE31 AE32 AG32 AG36 AE34 AE33 AF31 AF30 AH33 AH32 AK31 AG30 AG34 AG33 AH31
AJ31
AK30
AJ30 AH29 AH28 AK29 AH30 AH27 AG28 AF24 AG23
AJ22 AK22 AH24 AH23 AG22
AJ21 AG10
AG9 AG8
AH8 AH11 AH10
AJ9
AK9
AJ7
AK6
AJ4 AH5 AK8
AJ8
AJ5 AK4 AG5 AG4 AD8 AD9 AH4 AG6 AE8 AD7 AC5 AB8 AB6 AA8 AC8 AC7 AA4 AA5
U20G
SBDQ0 SBDQ1 SBDQ2 SBDQ3 SBDQ4 SBDQ5 SBDQ6 SBDQ7 SBDQ8 SBDQ9 SBDQ10 SBDQ11 SBDQ12 SBDQ13 SBDQ14 SBDQ15 SBDQ16 SBDQ17 SBDQ18 SBDQ19 SBDQ20 SBDQ21 SBDQ22 SBDQ23 SBDQ24 SBDQ25 SBDQ26 SBDQ27 SBDQ28 SBDQ29 SBDQ30 SBDQ31 SBDQ32 SBDQ33 SBDQ34 SBDQ35 SBDQ36 SBDQ37 SBDQ38 SBDQ39 SBDQ40 SBDQ41 SBDQ42 SBDQ43 SBDQ44 SBDQ45 SBDQ46 SBDQ47 SBDQ48 SBDQ49 SBDQ50 SBDQ51 SBDQ52 SBDQ53 SBDQ54 SBDQ55 SBDQ56 SBDQ57 SBDQ58 SBDQ59 SBDQ60 SBDQ61 SBDQ62 SBDQ63
ALVISO-915GME
ALVISO-915GME
AJ15
SB_BS0#
AG17
SB_BS1#
AG21
SB_BS2#
AF32
SB_DM0
AK34
SB_DM1
AK27
SB_DM2
AK24
SB_DM3
AJ10
SB_DM4
AK5
SB_DM5
AE7
SB_DM6
AB7
SB_DM7
AF34
SB_DQS0
AK32
SB_DQS1
AJ28
SB_DQS2
AK23
SB_DQS3
AM10
SB_DQS4
AH6
SB_DQS5
AF8
SB_DQS6
AB4
SB_DQS7
AF35
SB_DQS0#
AK33
SB_DQS1#
AK28
SB_DQS2#
AJ23
SB_DQS3#
AL10
SB_DQS4#
AH7
SB_DQS5#
AF7
SB_DQS6#
AB5
SB_DQS7#
SB_MA0 SB_MA1 SB_MA2 SB_MA3 SB_MA4 SB_MA5 SB_MA6 SB_MA7 SB_MA8
SB_MA9 SB_MA10 SB_MA11 SB_MA12 SB_MA13
SB_CAS#
DDR SYSTEM MEMORY B
DDR SYSTEM MEMORY B
SB_RAS#
SB_RCVENIN#
SB_RCVENOUT#
SB_WE#
AH17 AK17 AH18 AJ18 AK18 AJ19 AK19 AH19 AJ20 AH20 AJ16 AG18 AG20 AG15
AH14 AK14 AF15 AF14 AH16
MAA_B0 MAA_B1 MAA_B2 MAA_B3 MAA_B4 MAA_B5 MAA_B6 MAA_B7 MAA_B8 MAA_B9 MAA_B10 MAA_B11 MAA_B12 MAA_B13
TP12TP12 TP15TP15
DQM_B0 18 DQM_B1 18 DQM_B2 18 DQM_B3 18 DQM_B4 18 DQM_B5 18 DQM_B6 18 DQM_B7 18
DQS_B0 18 DQS_B1 18 DQS_B2 18 DQS_B3 18 DQS_B4 18 DQS_B5 18 DQS_B6 18 DQS_B7 18
DQS_B#0 18 DQS_B#1 18 DQS_B#2 18 DQS_B#3 18 DQS_B#4 18 DQS_B#5 18 DQS_B#6 18 DQS_B#7 18
SBS_B0 18,19 SBS_B1 18,19 SBS_B2 18,19
MAA_B[0..13] 18,19
CAS_B# 18,19 RAS_B# 18,19
WE_B# 18,19
1 1
MICRO-START INT'L CO.,LTD.
MICRO-START INT'L CO.,LTD.
Title
Title
Title
ALVISO (MEMORY)
ALVISO (MEMORY)
ALVISO (MEMORY)
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet
MICRO-START INT'L CO.,LTD.
MS-9623 1.2
MS-9623 1.2
MS-9623 1.2
of
838Friday, August 24, 2007
838Friday, August 24, 2007
838Friday, August 24, 2007
A
V_GMCH_CORE
C286
C286
10U6.3V_0805
10U6.3V_0805
10U6.3V_0805
10U6.3V_0805
C290
C290
0.1U16V_0402
0.1U16V_0402
C540
C540
10U6.3V_0805
10U6.3V_0805
C283
C283
0.1U25V_0603
0.1U25V_0603
C280
C280
0.1U16V_0402
0.1U16V_0402
C531
C531
4 4
V_1P5_CORE
L17 1U500mA_0805L17 1U500mA_0805
C268
C268
0.1U16V_0402
0.1U16V_0402
L15 1U500mA_0805L15 1U500mA_0805
C263
C263
0.1U16V_0402
0.1U16V_0402
12
EC34
EC34
470u2.5V
470u2.5V
12
EC30
EC30
470u2.5V
470u2.5V
VCCA_DPLLA
VCCA_DPLLB
3 3
L14 1U500mA_0805L14 1U500mA_0805
C187
C187
0.1U16V_0402
0.1U16V_0402
L13 1U500mA_0805L13 1U500mA_0805
C194
C194
0.1U16V_0402
0.1U16V_0402
12
EC24
EC24
470u2.5V
470u2.5V
12
EC23
EC23
470u2.5V
470u2.5V
VCCA_HPLL
VCCA_MPLL
2 2
VCCA_CRTDAC
V_2P5_MCH
C281
C281
0.1U16V_0402
0.1U16V_0402
V_FSB_VTT
1 1
C226
C226
4.7U10V_0805
4.7U10V_0805
C225
C225
4.7U10V_0805
4.7U10V_0805
C272 0.47U16V_0603C272 0.47U16V_0603
C265 0.47U16V_0603C265 0.47U16V_0603
C204 0.22U16V_0603C204 0.22U16V_0603
C243 0.22U16V_0603C243 0.22U16V_0603
V_FSB_VTT
A
B
0.1U25V_0603
0.1U25V_0603
C532
C532
0.1U25V_0603
0.1U25V_0603
VCCP_GMCH_CAP1
VCCP_GMCH_CAP2 VCCP_GMCH_CAP3
VCCP_GMCH_CAP4
B
C542
C542
T29
VCC0
R29
VCC1
N29
VCC2
M29
VCC3
K29
VCC4
J29
VCC5
V28
VCC6
U28
VCC7
T28
VCC8
R28
VCC9
P28
VCC10
N28
VCC11
M28
VCC12
L28
VCC13
K28
VCC14
J28
VCC15
H28
VCC16
G28
VCC17
V27
VCC18
U27
VCC19
T27
VCC20
R27
VCC21
P27
VCC22
N27
VCC23
M27
VCC24
L27
VCC25
K27
VCC26
J27
VCC27
H27
VCC28
K26
VCC29
H26
VCC30
K25
VCC31
J25
VCC32
K24
VCC33
K23
VCC34
K22
VCC35
K21
VCC36
W20
VCC37
U20
VCC38
T20
VCC39
K20
VCC40
V19
VCC41
U19
VCC42
K19
VCC43
W18
VCC44
V18
VCC45
T18
VCC46
K18
VCC47
K17
VCC48
AC2
VCCH_MPLL1
AC1
VCCH_MPLL0
B23
VCCA_DPLLA
C35
VCCA_DPLLB
AA1
VCCA_HPLL
AA2
VCCA_MPLL
F19
VCCA_CRTDAC0
E19
VCCA_CRTDAC1
G19
VSSA_CRTDAC
H20
VCC_SYNC
K13
VTT0
J13
VTT1
K12
VTT2
W11
VTT3
V11
VTT4
U11
VTT5
T11
VTT6
R11
VTT7
P11
VTT8
N11
VTT9
M11
VTT10
L11
VTT11
K11
VTT12
W10
VTT13
V10
VTT14
U10
VTT15
T10
VTT16
R10
VTT17
P10
VTT18
N10
VTT19
M10
VTT20
K10
VTT21
J10
VTT22
Y9
VTT23
W9
VTT24
U9
VTT25
R9
VTT26
P9
VTT27
N9
VTT28
M9
VTT29
L9
VTT30
J9
VTT31
N8
VTT32
M8
VTT33
N7
VTT34
M7
VTT35
N6
VTT36
M6
VTT37
A6
VTT38
N5
VTT39
M5
VTT40
N4
VTT41
M4
VTT42
N3
VTT43
M3
VTT44
N2
VTT45
M2
VTT46
B2
VTT47
V1
VTT48
N1
VTT49
M1
VTT50
G1
VTT51
ALVISO-915GME
ALVISO-915GME
U20H
U20H
C
http://adf.ly/3o8pJ
VCCHV0 VCCHV1 VCCHV2
VCCSM0 VCCSM1 VCCSM2 VCCSM3 VCCSM4 VCCSM5 VCCSM6 VCCSM7 VCCSM8
VCCSM9 VCCSM10 VCCSM11 VCCSM12 VCCSM13 VCCSM14 VCCSM15 VCCSM16 VCCSM17 VCCSM18 VCCSM19 VCCSM20 VCCSM21 VCCSM22 VCCSM23 VCCSM24 VCCSM25 VCCSM26 VCCSM27 VCCSM28 VCCSM29 VCCSM30 VCCSM31 VCCSM32 VCCSM33 VCCSM34 VCCSM35 VCCSM36 VCCSM37 VCCSM38 VCCSM39 VCCSM40 VCCSM41 VCCSM42 VCCSM43 VCCSM44 VCCSM45 VCCSM46 VCCSM47 VCCSM48 VCCSM49 VCCSM50 VCCSM51 VCCSM52 VCCSM53 VCCSM54 VCCSM55 VCCSM56 VCCSM57 VCCSM58 VCCSM59 VCCSM60 VCCSM61 VCCSM62 VCCSM63 VCCSM64
VCCA_SM0 VCCA_SM1 VCCA_SM2 VCCA_SM3
VCC3G0 VCC3G1 VCC3G2 VCC3G3 VCC3G4 VCC3G5 VCC3G6
F17 E17 D18 C18 F18 E18
H18 G18
D19 H17
B26 B25 A25
A35
B22 B21 A21
AM37 AH37 AP29 AD28 AD27 AC27 AP26 AN26 AM26 AL26 AK26 AJ26 AH26 AG26 AF26 AE26 AP25 AN25 AM25 AL25 AK25 AJ25 AH25 AG25 AF25 AE25 AE24 AE23 AE22 AE21 AE20 AE19 AE18 AE17 AE16 AE15 AE14 AP13 AN13 AM13 AL13 AK13 AJ13 AH13 AG13 AF13 AE13 AP12 AN12 AM12 AL12 AK12 AJ12 AH12 AG12 AF12 AE12 AD11 AC11 AB11 AB10 AB9 AP8 AM1 AE1
B28 A28 A27
AF20 AP19 AF19 AF18
AE37 W37 U37 R37 N37 L37 J37
Y29 Y28 Y27
F37 G37
C
V1.8_DDR_CAP1 V1.8_DDR_CAP2 V1.8_DDR_CAP3
C517
C517
0.1U25V_0603
0.1U25V_0603
V1.8_DDR_CAP6 V1.8_DDR_CAP4 V1.8_DDR_CAP5
C160
C160
0.1U16V_0402
0.1U16V_0402
C150
C150 X_10u_0805
X_10u_0805
C516 0.1U25V_0603C516 0.1U25V_0603
C153 0.1U16V_0402C153 0.1U16V_0402
C169 0.1U16V_0402C169 0.1U16V_0402
VCC_DDRDLL
VCC3G_PCIE
VCCA_3GPLL
C241
C241
0.1U16V_0402
0.1U16V_0402
VCCA_TVDACA0 VCCA_TVDACA1 VCCA_TVDACB0
VCCA_TVDACB1 VCCA_TVDACC0 VCCA_TVDACC1
VCCA_TVBG VSSA_TVBG
VCCD_TVDAC
VCCDQ_TVDAC
VCCD_LVDS0 VCCD_LVDS1 VCCD_LVDS2
VCCA_LVDS
POWER
POWER
VCCTX_LVDS0 VCCTX_LVDS1 VCCTX_LVDS2
VCCA_3GPLL0 VCCA_3GPLL1 VCCA_3GPLL2
VCCA_3GBG
VSSA_3GBG
C518
C518
0.1U25V_0603
0.1U25V_0603
VCC_DDR2
C152
C152 10U6.3V_0805
10U6.3V_0805
V_2P5_MCH
12
C545
C545
0.1U16V_0402
0.1U16V_0402
C546
C546
0.1U16V_0402
0.1U16V_0402
EC16
EC16 X_220u,2.5V
X_220u,2.5V
C266
C266
0.1U16V_0402
0.1U16V_0402
C269
C269
0.1U16V_0402
0.1U16V_0402
C276
C276
0.01U25V_0402
0.01U25V_0402
C278
C278
10U6.3V_0805
10U6.3V_0805
V_GMCH_CORE
V_2P5_MCH
C293
C293
4.7U10V_0805
4.7U10V_0805
D
C296
C296
10U6.3V_0805
10U6.3V_0805
V_2P5_MCH
V_2P5_MCH
A C
V_2P5_MCH
D
V_1P5_CORE
D12
D12
RAS40WS
RAS40WS
E
V_1P5_CORE
D10
D10
X_RAS40WS
X_RAS40WS
R330
R330
X_1K_0603
X_1K_0603
V_FSB_VTT
V_GMCH_CORE
R313
R313 10R_0603
10R_0603
L16
L16 180L1500m_90_0603
180L1500m_90_0603
Max: 390mA
VCC_DDRDLL
EC14
EC14
100U_1210
100U_1210
VCC3G_PCIE
C180
C180
0.1U16V_0402
0.1U16V_0402
VCCA_3GPLL
0.1U25V_0603
0.1U25V_0603
10U6.3V_0805
10U6.3V_0805
C529
C529
Title
Title
Title
ALVISO (POWER)
ALVISO (POWER)
ALVISO (POWER)
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet
VCC3
AC
D9
A C
RAS40WSD9RAS40WS
C264
C264
0.1U16V_0402
0.1U16V_0402
Change L9 to 0805 500mA because VCC_DDRDLL max 390mA. 2006.3.16
L9 1U500mA_0805L9 1U500mA_0805
C151
C151
0.1U16V_0402
0.1U16V_0402
VCC3G_PCIE
C159
C159
R211
R211
1R_0603
1R_0603
C192
C192
10U6.3V_0805
10U6.3V_0805
MS-9623 1.2
MS-9623 1.2
MS-9623 1.2
R233
R233 10R_0603
10R_0603
VCCA_CRTDAC
C273
C273
0.022U16V_0402
0.022U16V_0402
L11 80L3_100_0805L11 80L3_100_0805
12
EC21
EC21
220u,35V
220u,35V
Change EC21 to DIP CAP.
2006.10.11
L12 1U500mA_0805L12 1U500mA_0805
MICRO-START INT'L CO.,LTD.
MICRO-START INT'L CO.,LTD.
MICRO-START INT'L CO.,LTD.
E
V_1P5_CORE
938Friday, August 24, 2007
938Friday, August 24, 2007
938Friday, August 24, 2007
V_1P5_CORE
V_1P5_CORE
of
A
B
C
D
E
http://adf.ly/3o8pJ
B36
AL24
Y1
4 4
VSS268J2VSS269G2VSS270D2VSS271
VSSALVDS
VSS132
VSS133
VSS134
VSS135
J24
F24
B24
D24
AG24
B27
J26
G26
E26
A26
AN24
VSS262
VSS263
VSS264
VSS265
VSS266
VSS267
VSS123
VSS124
VSS125
VSS126
VSS127
VSS128
VSS129
VSS130
VSS131
E27
G27
W27
AJ24
AJ27
AF27
AB27
AA27
AG27
AN2
AL2
AH2
AE2
AD2
VSS253
VSS254
VSS255
VSS256
VSS257V2VSS258T2VSS259P2VSS260L2VSS261
VSS117
VSS118
VSS119
VSS120
VSS121
VSS122
E28
W28
AL27
AB28
AA28
AN27
AJ3
AC3
AB3
AA3
VSS247
VSS248
VSS249
VSS250C3VSS251A3VSS252
VSS105
VSS106
VSS107
VSS108
VSS109
VSS110
VSS111
VSS112
VSS113
VSS114
VSS115
VSS116
L29
F29
E29
A29
D29
AC28
G29
H29
V29
P29
U29
W29
AP5
AL5
AN4
AF4
VSS235
VSS236W5VSS237E5VSS238
VSS239
VSS240Y4VSS241U4VSS242P4VSS243L4VSS244H4VSS245C4VSS246
VSS96
VSS97
VSS98
VSS99
VSS100
VSS101
VSS102
VSS103
VSS104
Y30
C30
AJ29
AB30
AA29
AA30
AD29
AG29
AM29
AJ6
AE6
AC6
AA6
VSS226
VSS227
VSS228
VSS229T6VSS230P6VSS231L6VSS232J6VSS233B6VSS234
VSS90
VSS91
VSS92
VSS93
VSS94
VSS95
F31
E31
D31
AP30
AE30
AC30
AN7
AK7
AG7
AA7
VSS220
VSS221
VSS222
VSS223V7VSS224G7VSS225
VSS84
VSS85
VSS86
VSS87
VSS88
VSS89
J31
L31
K31
H31
G31
M31
AL8
VSS214Y8VSS215P8VSS216L8VSS217E8VSS218C8VSS219
VSS
VSS
VSS73
VSS74
VSS75
VSS76
VSS77
VSS78
VSS79
VSS80
VSS81
VSS82
VSS83
N31
T31
P31
R31
U31
A32
V31
W31
AL31
AD31
AG31
D10
AN9
AH9
AE9
AC9
AA9
VSS203
VSS204
VSS205
VSS206
VSS207
VSS208V9VSS209T9VSS210K9VSS211H9VSS212A9VSS213
VSS67
VSS68
VSS69
VSS70
VSS71
VSS72
Y32
C32
AB32
AA32
AD32
AC32
Y11
H11
F11
AA10
Y10
L10
VSS197
VSS198
VSS199
VSS200
VSS201
VSS202
VSS61
VSS62
VSS63
VSS64
VSS65
VSS66
F33
E33
D33
G33
AJ32
AN32
AN11
AL11
AJ11
AG11
AF11
AA11
VSS191
VSS192
VSS193
VSS194
VSS195
VSS196
VSS55
VSS56
VSS57
VSS58
VSS59
VSS60
J33
L33
K33
N33
H33
M33
F14
B14
A14
J12
D12
B12
VSS185
VSS186
VSS187
VSS188
VSS189
VSS190
VSS49
VSS50
VSS51
VSS52
VSS53
VSS54
T33
V33
P33
U33
R33
W33
AN14
AL14
AJ14
AG14
K14
J14
VSS179
VSS180
VSS181
VSS182
VSS183
VSS184
VSS43
VSS44
VSS45
VSS46
VSS47
VSS48
C34
AL33
AF33
AB34
AA34
AD33
3 3
AB26
AA26
Y26
AB25
AA25
Y25
AB24
AA24
Y24
Y12
VSS_NCTF68
AA12
Y13
VSS_NCTF67
VSS_NCTF66
AA13
VSS_NCTF65
L14
VSS_NCTF64
M14
N14
VSS_NCTF63
VSS_NCTF62
P14
VSS_NCTF61
R14
VSS_NCTF60
T14
VSS_NCTF59
U14
VSS_NCTF58
V14
VSS_NCTF57
W14
Y14
VSS_NCTF56
VSS_NCTF55
AA14
VSS_NCTF54
AB14
VSS_NCTF0
VSS_NCTF1
VSS_NCTF2
VSS_NCTF3
VSS_NCTF4
VSS_NCTF5
VSS_NCTF6
VSS_NCTF7
VSS_NCTF8
VSS_NCTF9
VSS_NCTF10
VSS_NCTF11
VSS_NCTF12
VSS_NCTF13
VSS_NCTF14
VSS_NCTF15
VSS_NCTF16
VSS_NCTF17
VSS_NCTF18
VSS_NCTF19
VSS_NCTF20
VSS_NCTF21
VSS_NCTF22
VSS_NCTF23
VSS_NCTF24
VSS_NCTF25
VSS_NCTF26
VSS_NCTF27
VSS_NCTF28
VSS_NCTF29
VSS_NCTF30
VSS_NCTF31
VSS_NCTF32
VSS_NCTF33
VSS_NCTF34
VSS_NCTF35
VSS_NCTF36
VSS_NCTF37
VSS_NCTF38
VSS_NCTF39
VSS_NCTF40
VSS_NCTF41
VSS_NCTF42
VSS_NCTF43
VSS_NCTF44
VSS_NCTF45
VSS_NCTF46
VSS_NCTF47
VSS_NCTF48
VSS_NCTF49
VSS_NCTF50
VSS_NCTF51
VSS_NCTF52
VSS_NCTF53
N12
M12
L12
VTT_NCTF16
VTT_NCTF17
AB23
AA23
Y23
AB22
AA22
Y22
AB21
AA21
Y21
R21
AB20
AA20
AB19
AA19
AB18
AA18
AB17
AA17
Y17
R17
AB16
AA16
Y16
W16
V16
U16
T16
R16
P16
N16
M16
L16
AB15
AA15
Y15
W15
V15
U15
T15
R15
P15
N15
M15
L15
U12
T12
R12
P12
VTT_NCTF12
VTT_NCTF13
VTT_NCTF14
VTT_NCTF15
W12
V12
VTT_NCTF10
VTT_NCTF11
VTT_NCTF9
T13
R13
P13
N13
M13
L13
VTT_NCTF4
VTT_NCTF5
VTT_NCTF6
VTT_NCTF7
VTT_NCTF8
K15
C15
VSS177
VSS178
VSS41
VSS42
AD34
AC34
V_FSB_VTT
V13
U13
VTT_NCTF2
VTT_NCTF3
VSS176
VSS40
VTT_NCTF1
A16
AH34
W13
VSS175
VSS39
VTT_NCTF0
D16
AN34
K16
H16
VSS173
VSS174
VSS37
VSS38
B35
D35
AN17
AJ17
AF17
G17
C17
AL16
VSS167
VSS168
VSS169
VSS170
VSS171
VSS172
VSS31
VSS32
VSS33
VSS34
VSS35
VSS36
J35
F35
K35
E35
H35
G35
H19
C19
AL18
U18
B18
A18
VSS161
VSS162
VSS163
VSS164
VSS165
VSS166
VSS25
VSS26
VSS27
VSS28
VSS29
VSS30
L35
T35
P35
R35
N35
M35
A20
AN19
AG19
W19
T19
J19
VSS155
VSS156
VSS157
VSS158
VSS159
VSS160
VSS19
VSS20
VSS21
VSS22
VSS23
VSS24
Y35
V35
C36
U35
W35
AE35
V20
G20
F20
E20
D20
VSS150
VSS151
VSS152
VSS153
VSS154
VSS14
VSS15
VSS16
VSS17
VSS18
AE36
AB36
AA36
AD36
AC36
U20D
U20D
ALVISO-915GME
ALVISO-915GME
AK20
VSS149
VSS13
AF36
D22
A22
AN21
AF21
F21
C21
VSS143
VSS144
VSS145
VSS146
VSS147
VSS148
VSS7
VSS8
VSS9
VSS10
VSS11
VSS12
K37
E37
H37
AJ36
AL36
AN36
E22
VSS142
VSS6
M37
J22
VSS141
VSS5
P37
AH22
VSS140
VSS4
T37
AL22
VSS139
VSS3
V37
H23
VSS138
VSS2
Y37
AF23
VSS137
VSS1
AG37
U20E
U20E
ALVISO-915GME
ALVISO-915GME
VSS136
VSS0
NCTF
NCTF
2 2
VCCSM_NCTF0
VCCSM_NCTF1
VCCSM_NCTF2
VCCSM_NCTF3
VCCSM_NCTF4
VCCSM_NCTF5
VCCSM_NCTF6
VCCSM_NCTF7
VCCSM_NCTF8
VCCSM_NCTF9
VCCSM_NCTF10
VCCSM_NCTF11
VCCSM_NCTF12
VCCSM_NCTF13
VCCSM_NCTF14
VCCSM_NCTF15
VCCSM_NCTF16
VCCSM_NCTF17
VCCSM_NCTF18
VCCSM_NCTF19
VCCSM_NCTF20
VCCSM_NCTF21
VCCSM_NCTF22
VCCSM_NCTF23
VCCSM_NCTF24
VCCSM_NCTF25
VCCSM_NCTF26
VCCSM_NCTF27
VCCSM_NCTF28
VCCSM_NCTF29
VCCSM_NCTF30
VCCSM_NCTF31
VCC_NCTF0
VCC_NCTF1
VCC_NCTF2
VCC_NCTF3
VCC_NCTF4
VCC_NCTF5
VCC_NCTF6
VCC_NCTF7
VCC_NCTF8
VCC_NCTF9
VCC_NCTF10
VCC_NCTF11
VCC_NCTF12
VCC_NCTF13
VCC_NCTF14
VCC_NCTF15
VCC_NCTF16
VCC_NCTF17
VCC_NCTF18
VCC_NCTF19
VCC_NCTF20
VCC_NCTF21
VCC_NCTF22
VCC_NCTF23
VCC_NCTF24
VCC_NCTF25
VCC_NCTF26
VCC_NCTF27
VCC_NCTF28
VCC_NCTF29
VCC_NCTF30
VCC_NCTF31
VCC_NCTF32
VCC_NCTF33
VCC_NCTF34
VCC_NCTF35
VCC_NCTF36
VCC_NCTF37
VCC_NCTF38
VCC_NCTF39
VCC_NCTF40
VCC_NCTF41
VCC_NCTF42
VCC_NCTF43
VCC_NCTF44
VCC_NCTF45
VCC_NCTF46
VCC_NCTF47
VCC_NCTF48
VCC_NCTF49
VCC_NCTF50
VCC_NCTF51
VCC_NCTF52
VCC_NCTF53
VCC_NCTF54
VCC_NCTF55
VCC_NCTF56
VCC_NCTF57
VCC_NCTF58
VCC_NCTF59
VCC_NCTF60
VCC_NCTF61
VCC_NCTF62
VCC_NCTF63
VCC_NCTF64
VCC_NCTF65
VCC_NCTF66
VCC_NCTF67
VCC_NCTF68
VCC_NCTF69
VCC_NCTF70
VCC_NCTF71
VCC_NCTF72
VCC_NCTF73
VCC_NCTF74
VCC_NCTF75
VCC_NCTF76
VCC_NCTF77
VCC_NCTF78
R23
L24
T23
U23
P24
V23
N24
M24
W23
M19
N19
L20
Y19
P19
R19
M18
N18
L19
Y18
P18
R18
L17
N17
M17
L18
T17
V17
P17
U17
W17
M20
N20
L21
Y20
P20
R20
M21
N21
L22
T21
V21
P21
U21
W21
M22
N22
L23
T22
P22
U22
R22
P23
V22
N23
M23
W22
R24
L25
T24
U24
P25
V24
N25
M25
W24
R25
L26
M26
N26
T26
P26
U26
R26
V_GMCH_CORE
V26
W26
AB13
AB12
AC14
AD13
AC13
AD12
AC12
AC17
AD16
AC16
AD15
AC15
AD14
AD20
AC20
AD19
AC19
AD18
AC18
AD17
AD23
AC23
AD22
AC22
AD21
AC21
AC24
AC25
AD24
AD26
AC26
AD25
VCC_DDR2
T25
V25
U25
W25
1 1
MICRO-START INT'L CO.,LTD.
MICRO-START INT'L CO.,LTD.
Title
Title
Title
ALVISO (POWER/GND)
ALVISO (POWER/GND)
ALVISO (POWER/GND)
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet
MICRO-START INT'L CO.,LTD.
MS-9623 1.2
MS-9623 1.2
MS-9623 1.2
of
10 38Friday, August 24, 2007
10 38Friday, August 24, 2007
10 38Friday, August 24, 2007
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