MSI MS-91C2 Schematic 0A

5

4

3

2

1

Uniwide TWIN Blade server

01

2008 04/28

MSI

D D

TYLERSBURG 36D + ICH10R Schematics

Table of Contents

C C

B B

A A

MS-91C2 REV 0A

Page

01
02
03
04
05
06
07~10
11~14
15~20

27~32
33~35
36~37
38
39
40
41
42
43
44
45
46
47
48
49 CPU1_VTT_POWER
50
51
52
53
54 CPLD
55
56
57
58

60
61
62
63
64
65
66

Title

Cover / Table of SPEC
System Block Diagram
Power Delivery Block Diagram
System Clock Block Diagram
System SMBus Block Diagram
System Reset Block Diagram
CPU0
CPU2
DDR3_CHANNELA~C
DDR3_CHANNELD~F21~26
Intel TYLERSBURG 36D
Intel ICH10R
CLOCKGEN / CLOCK BUFFER
LAN INTEL 82567LM Boazman
PCI slot & USB connector
PCIE*16 SLOT
PCIE*8 SLOT
PCIE*8(4) SLOT
SUPER IO SMSC 5617C
IEEE 1394 TI Chip
HD AUDIO ADI1984A
CPU0_VCORE_ISL6334CRZ
CPU1_VCORE_ISL6334CRZ
CPU0_VTT_POWER

CPU0_DDR3_POWER_ISL6312CR
CPU1_DDR3_POWER_ISL6312CR
CPU0_&_CPU1_DDR3_VTT
CPU0_&_CPU1_SFR_PLL

1.5V_VR & 3.3_5VDUAL
IOH_1.1V

1.8VDUAL & ICH_POWER
SSI_POWER_CONNECTOR
CPU_SIDEBAND59
XDP0_CPU_JTAG
XDP0_&_XDP1_JTAG_CKTS
SPI & Front Panel & TPM
HWM ADT7490 & 7462 & FAN
SYSTEM_POWERGOODSEQUENCE
MISC_PART
History & GPIO

Preliminary Spec

* Intel LGA-1366 Gainstown
* Intel Tylersburg 36D / ICH10R Chipset
* 12 DDR3 (2 CPU / 6 Channel)
* USB 2.0 (Rear x2 , Front x4)
* 1PCI Express X16 for Riser
* Serial ATA (4 channel)
* Infiniband MT25408
* LAN INTEL 82576 Kawela
* LPC SIO W83627DHG
* BMC AST2050/1100
* HWM W83793G
* VCORE_ISL6334CRZ + DDR3_POWER_ISL6312CR + CPU_VTT_ISL6314CRZ

MICRO-START INT'L CO.,LTD.

MICRO-START INT'L CO.,LTD.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet

Date: Sheet

5

4

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2

Date: Sheet

MICRO-START INT'L CO.,LTD.

Cover / Table of SPEC

Cover / Table of SPEC

Cover / Table of SPEC

MS-91C2 0A

MS-91C2 0A

MS-91C2 0A

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MS-91C2 SYSTEM BLOCK DIAGRAM

02

DIMM x2

D D

Modules
DIMM x2

Modules

DIMM x2

DDR3 Channel 0

DDR3 Channel 1

DDR3 Channel 2

CPU0
Intel LGA-1366
Nehalem-EP

QPI

CPU1
Intel LGA-1366
Nehalem-EP

DDR3 Channel 0

DDR3 Channel 1

DDR3 Channel 2

Modules

QPI

1066/1333MHz

16X Connector
for Riser

C C

PCI Express X16

Tylersburg

36D

QPI

1066/1333MHz

PCI Express X 8

PCI Express X 4

MT25408
Infiniband

INTEL 82576

ESI BUS

DIMM x2
Modules

DIMM x2
Modules

DIMM x2
Modules

Port 0

Port 1

Port 0

Port 1

SATA 0~3

B B

USB2.0 (6 Port)

BMC
AST2050/1100

A A

5

SATA

USB 2.0

PCI BUS

LPC Bus

ICH 10R

SPI

LPC SIO

W83627DHG 2 X Serial Port

4

3

SPI Flash BIOS

MICRO-START INT'L CO.,LTD.

MICRO-START INT'L CO.,LTD.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet

Date: Sheet

2

Date: Sheet

MICRO-START INT'L CO.,LTD.

Block_Diagram

Block_Diagram

Block_Diagram

MS-91C2 0A

MS-91C2 0A

MS-91C2 0A

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277Thursday, August 28, 2008

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4

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1

03

PWRGD_CPU0_VCCP<14,70>

FM_CPU0_PSI_N

VCORE_CPU0

R1122

R1122

R1123

R1123

VR_CPU0_IOUT

VCORE_CPU0

VID_CPU0[7..0]

VID_CPU00

R616 X_1K_0402R616 X_1K_0402

VID_CPU01

R611 1K_0402R611 1K_0402

VID_CPU02

R612 1K_0402R612 1K_0402

VID_CPU03

R613 1K_0402R613 1K_0402

VID_CPU04

R608 1K_0402R608 1K_0402

VID_CPU05

R614 1K_0402R614 1K_0402

VID_CPU06

R615 X_1K_0402R615 X_1K_0402

VID_CPU07

R664 X_1K_0402R664 X_1K_0402

PWRGD_CPU0_VCCP
PWRGD_PLD_CPU0_EN

R635 X_0R_0402R635 X_0R_0402

P0_V2

R670 20KST_0402R670 20KST_0402
C513 22pC513 22p

C510 680pC510 680p

C534

C534
X_0.1u_0402

V_6334_CPU0

R591

R591
X_0R

X_0R

R633

R633
21KST

21KST

R626 0RR626 0R

R589

R589

17.8KST_0402

17.8KST_0402

X_0.1u_0402

C536

C536

X_0.1u_0402

X_0.1u_0402

C531

C531

X_0.1u_0402

X_0.1u_0402

10u*25

C1321 C10u6.3X50805C1321 C10u6.3X50805
C1323 C10u6.3X50805C1323 C10u6.3X50805
C1259 C10u6.3X50805C1259 C10u6.3X50805
C1304 C10u6.3X50805C1304 C10u6.3X50805
C1273 C10u6.3X50805C1273 C10u6.3X50805
C1299 C10u6.3X50805C1299 C10u6.3X50805
C1252 C10u6.3X50805C1252 C10u6.3X50805
C1277 C10u6.3X50805C1277 C10u6.3X50805
C1258 C10u6.3X50805C1258 C10u6.3X50805
C1307 C10u6.3X50805C1307 C10u6.3X50805
C1279 C10u6.3X50805C1279 C10u6.3X50805
C1306 C10u6.3X50805C1306 C10u6.3X50805
C1303 C10u6.3X50805C1303 C10u6.3X50805
C1275 C10u6.3X50805C1275 C10u6.3X50805

C1302 C10u6.3X50805C1302 C10u6.3X50805
C1278 C10u6.3X50805C1278 C10u6.3X50805
C1255 C10u6.3X50805C1255 C10u6.3X50805
C1253 C10u6.3X50805C1253 C10u6.3X50805
C1271 C10u6.3X50805C1271 C10u6.3X50805
C1300 C10u6.3X50805C1300 C10u6.3X50805
C1325 C10u6.3X50805C1325 C10u6.3X50805
C1254 C10u6.3X50805C1254 C10u6.3X50805
C1272 C10u6.3X50805C1272 C10u6.3X50805
C1301 C10u6.3X50805C1301 C10u6.3X50805

+1.1V_VTT_CPU0

+3.3V

R617

R617

4.7K_0402

4.7K_0402

R675 200RR675 200R

C498

C498

2.2n_0402

2.2n_0402

V_6334_CPU0

R707

R707
10K_0402

10K_0402

R706

R706

27.4KST

27.4KST

R590

R590
X_1M_0402

X_1M_0402

C496

C496
22n_0402

22n_0402

22u*26 on socket

VCORE_CPU0

C402 C22u6.3X1206C402 C22u6.3X1206
C382 C22u6.3X1206C382 C22u6.3X1206
C374 C22u6.3X1206C374 C22u6.3X1206
C368 C22u6.3X1206C368 C22u6.3X1206
C356 C22u6.3X1206C356 C22u6.3X1206
C367 C22u6.3X1206C367 C22u6.3X1206
C373 C22u6.3X1206C373 C22u6.3X1206
C381 C22u6.3X1206C381 C22u6.3X1206
C401 C22u6.3X1206C401 C22u6.3X1206
C400 C22u6.3X1206C400 C22u6.3X1206
C380 C22u6.3X1206C380 C22u6.3X1206
C372 C22u6.3X1206C372 C22u6.3X1206
C366 C22u6.3X1206C366 C22u6.3X1206
C1158 C22u6.3X1206C1158 C22u6.3X1206
C1141 C22u6.3X1206C1141 C22u6.3X1206C1256 C10u6.3X50805C1256 C10u6.3X50805
C1103 C22u6.3X1206C1103 C22u6.3X1206
C1120 C22u6.3X1206C1120 C22u6.3X1206
C1140 C22u6.3X1206C1140 C22u6.3X1206
C1157 C22u6.3X1206C1157 C22u6.3X1206
C1101 C22u6.3X1206C1101 C22u6.3X1206
C1122 C22u6.3X1206C1122 C22u6.3X1206
C1142 C22u6.3X1206C1142 C22u6.3X1206
C1159 C22u6.3X1206C1159 C22u6.3X1206
C357 C22u6.3X1206C357 C22u6.3X1206
C1102 C22u6.3X1206C1102 C22u6.3X1206
C1121 C22u6.3X1206C1121 C22u6.3X1206

VID_CPU0[7..0]<19>

R636 1K_0402R636 1K_0402
R637 X_1K_0402R637 X_1K_0402
R638 X_1K_0402R638 X_1K_0402

FM_CPU0_PSI_N<19>

VR_CPU0_IOUT<19>

10u*11

R639 X_1K_0402R639 X_1K_0402
R640 X_1K_0402R640 X_1K_0402
R641 X_1K_0402R641 X_1K_0402
R642 1K_0402R642 1K_0402
R663 1K_0402R663 1K_0402

PWRGD_PLD_CPU0_EN<14>

R676 2.8KST_0402R676 2.8KST_0402

P0_V1

100R_0402_B

100R_0402_B

R699 0R_0402R699 0R_0402

R692 0R_0402R692 0R_0402

100R_0402_B

100R_0402_B

5

D D

+3.3V

R1260

R1260
1K_0402_B

1K_0402_B

PWRGD_CPU0_VCCP

C C

VSENSE_DIE_CPU0_P<19>

VSENSE_DIE_CPU0_N<19>

B B

VCORE_CPU0

C1322 C10u6.3X50805C1322 C10u6.3X50805
C1326 C10u6.3X50805C1326 C10u6.3X50805
C1324 C10u6.3X50805C1324 C10u6.3X50805
C1276 C10u6.3X50805C1276 C10u6.3X50805
C1251 C10u6.3X50805C1251 C10u6.3X50805
C1298 C10u6.3X50805C1298 C10u6.3X50805
C1274 C10u6.3X50805C1274 C10u6.3X50805
C1305 C10u6.3X50805C1305 C10u6.3X50805
C1260 C10u6.3X50805C1260 C10u6.3X50805
C1280 C10u6.3X50805C1280 C10u6.3X50805
C1257 C10u6.3X50805C1257 C10u6.3X50805

A A

+12V_CPU0

R711

R711
10K

VID_CPU07
VID_CPU06
VID_CPU05
VID_CPU04
VID_CPU03
VID_CPU02
VID_CPU01
VID_CPU00

P0_EN_PWR

C514

C514
C0.1u25X

C0.1u25X

10K

C539

C539

0.1u_0402

0.1u_0402

V_6334_CPU0

4

P0_EN_PWR

R708

R708
1KST_0402

1KST_0402

C505 1000p_0402C505 1000p_0402

R646 1KST_0402R646 1KST_0402

+5V

U44

U44

36

VR_RDY

33

EN_VTT

40

VID7

1

VID6

2

VID5

3

VID4

4

VID3

5

VID2

6

VID1

7

VID0

8

PSI#

13

COMP

14

FB

15

VDIFF

17

VSEN

16

RGND

9

OFS

11

DAC

12

REF

32

EN_PWR

10

IMON

18

TCOMP

38

VR_HOT

37

VR_FAN

39

TM

35

R678

R678
2K_0805

2K_0805

RT2

RT2
10KST

10KST

VCORE_CPU0

R687

R687
243KST

243KST

330u*3 on top side

+

+

12

+

+

12

EC26

EC26
330u

330u

VCORE_CPU0

+

+

12

EC29

EC29
330u_B

330u_B

R727

R727

2.2R_0805

2.2R_0805

19

6X6 QFN

VCC

PWM1
ISEN1-

ISEN1+

PWM2
ISEN2-

ISEN2+

PWM3
ISEN3-

ISEN3+

PWM4
ISEN4-

ISEN4+

FS34SS

GND

ISL6334CRZ_QFN40-RH

ISL6334CRZ_QFN40-RH

41

R695

R695

64.9K_0402

64.9K_0402

EC30

EC30
330u

330u

+

+

12

EC27

EC27
330u

330u

+12VP0_FET

C1418 10u_1206_BC1418 10u_1206_B

+12V_CPU0

V_6334_CPU0

C5441uC544
1u

CPU0_PWM1

26

CPU0_PH1

R725 2.94KST_0402R725 2.94KST_0402

27

R739 432RSTR739 432RST

28

C555 68pC555 68p

CPU0_PWM2

20

CPU0_PH2

21

R736 432RSTR736 432RST

22

C559 68pC559 68p

CPU0_PWM3

31

CPU0_PH3

30

R740 432RSTR740 432RST

29

C556 68pC556 68p SP29

CPU0_PWM4

25

CPU0_PH4

24

R737 432RSTR737 432RST

23

C554 68pC554 68p

+

+

12

EC28

EC28
330u_B

330u_B

C552 0.1u_0402C552 0.1u_0402

R724 2.94KST_0402R724 2.94KST_0402

C551 0.1u_0402C551 0.1u_0402

R726 2.94KST_0402R726 2.94KST_0402

C553 0.1u_0402C553 0.1u_0402

R728 2.94KST_0402R728 2.94KST_0402

C560 0.1u_0402C560 0.1u_0402

R1243

R1243
X_499RST_0805_B

X_499RST_0805_B

HS3

HS3

CPU0_Vcore_Hearsink

CPU0_Vcore_Hearsink

CPU0_ISEN1

C570

C570

0.1u_0402

0.1u_0402

CPU0_ISEN2

C568

C568

0.1u_0402

0.1u_0402

CPU0_ISEN3

C571

C571

0.1u_0402

0.1u_0402

CPU0_ISEN4

C569

C569

0.1u_0402

0.1u_0402

112

334

2

4

3

R1253

R1253

2.2R1%0805

2.2R1%0805

R1266 X_0R_0805_BR1266 X_0R_0805_B

C1345 1u_0805_BC1345 1u_0805_B

15p_0402_B

15p_0402_B

+12V_CPU0

R1258

R1258

2.2R1%0805

2.2R1%0805

R1268 X_0R_0805_BR1268 X_0R_0805_B

C1367 1u_0805_BC1367 1u_0805_B

15p_0402_B

15p_0402_B

+12V_CPU0

R1254

R1254

2.2R1%0805

2.2R1%0805

R1267 X_0R_0805_BR1267 X_0R_0805_B

C1346 1u_0805_BC1346 1u_0805_B

15p_0402_B

15p_0402_B

+12V_CPU0

R1259

R1259

2.2R1%0805

2.2R1%0805

R1265 X_0R_0805_BR1265 X_0R_0805_B

C1347 1u_0805_BC1347 1u_0805_B

15p_0402_B

15p_0402_B

+12V_CPU0 +12VP0_FET

CPU0_PWM1

C1394

C1394

CPU0_PWM2

C1398

C1398

CPU0_PWM3

C1397

C1397

CPU0_PWM4

C1392

C1392

L23 0.68u_25A_BL23 0.68u_25A_B

R1319 2.2R1%0805R1319 2.2R1%0805

U83

U83

2

BOOT

9

VCC

8

UVCC

7

PVCC

4

PWM

5

GND

C1373

C1373

0.1u_0402_B

0.1u_0402_B

R1325 2.2R1%0805R1325 2.2R1%0805

U85

U85

2

BOOT

9

VCC

8

UVCC

7

PVCC

4

PWM

5

GND

C1375

C1375

0.1u_0402_B

0.1u_0402_B

R1317 2.2R1%0805R1317 2.2R1%0805

U84

U84

2

BOOT

9

VCC

8

UVCC

7

PVCC

4

PWM

5

GND

C1374

C1374

0.1u_0402_B

0.1u_0402_B

R1322 2.2R1%0805R1322 2.2R1%0805

U82

U82

2

BOOT

9

VCC

8

UVCC

7

PVCC

4

PWM

5

GND

C1357

C1357

0.1u_0402_B

0.1u_0402_B

GND

GND

GND

GND

GND

GND

GND

GND

EP_GND

GD SEL

3

EP_GND

GD SEL

3

EP_GND

GD SEL

3

EP_GND

GD SEL

3

ISL6622_B

ISL6622_B

UGATE
PHASE

LGATE

ISL6622_B

ISL6622_B

UGATE
PHASE

LGATE

ISL6622_B

ISL6622_B

UGATE
PHASE

LGATE

ISL6622_B

ISL6622_B

UGATE
PHASE

LGATE

C1401 C0.1u25XC1401 C0.1u25X

CPU0_U_G1

1

CPU0_PHASE1

10

CPU0_L_G1

6
11

C1405 C0.1u25XC1405 C0.1u25X

CPU0_U_G2

1

CPU0_PHASE2

10

CPU0_L_G2

6
11

C1399 C0.1u25XC1399 C0.1u25X

CPU0_U_G3

1

CPU0_PHASE3

10

CPU0_L_G3

6
11

C1400 C0.1u25XC1400 C0.1u25X

CPU0_U_G4

1

CPU0_PHASE4

10

CPU0_L_G4

6
11

2

R1324 1R_0805_BR1324 1R_0805_B

R1312

R1312

10K_0402_B

10K_0402_B

R1277 0R_0805_BR1277 0R_0805_B

R1326 1R_0805_BR1326 1R_0805_B

R1305

R1305

10K_0402_B

10K_0402_B

R1278 0R_0805_BR1278 0R_0805_B

R1318 1R_0805_BR1318 1R_0805_B

R1327

R1327

10K_0402_B

10K_0402_B

R1280 0R_0805_BR1280 0R_0805_B

R1321 1R_0805_BR1321 1R_0805_B

R1320

R1320

10K_0402_B

10K_0402_B

R1279 0R_0805_BR1279 0R_0805_B

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet

Date: Sheet

Date: Sheet

C1419 10u_1206_BC1419 10u_1206_B
C1417 10u_1206_BC1417 10u_1206_B

5

Q92 NTMFS4841Q92 NTMFS4841

4
3
2
1

5

4
3
2
1

Q84 NTMFS4833Q84 NTMFS4833

+12VP0_FET

C1416 10u_1206_BC1416 10u_1206_B
C1415 10u_1206_BC1415 10u_1206_B
C1420 10u_1206_BC1420 10u_1206_B

5

Q94 NTMFS4841Q94 NTMFS4841

4
3
2
1

5

4
3
2
1

Q86 NTMFS4833Q86 NTMFS4833

+12VP0_FET

C1413 10u_1206_BC1413 10u_1206_B
C1412 10u_1206_BC1412 10u_1206_B
C1414 10u_1206_BC1414 10u_1206_B

5

Q93 NTMFS4841Q93 NTMFS4841

4
3
2
1

5

4
3
2
1

Q87 NTMFS4833Q87 NTMFS4833

+12VP0_FET

C1409 10u_1206_BC1409 10u_1206_B
C1410 10u_1206_BC1410 10u_1206_B
C1411 10u_1206_BC1411 10u_1206_B

5

Q91 NTMFS4841Q91 NTMFS4841

4
3
2
1

5

4
3
2
1

Q85 NTMFS4833Q85 NTMFS4833

MICRO-START INT'L CO.,LTD.

MICRO-START INT'L CO.,LTD.

MICRO-START INT'L CO.,LTD.

0.5V~1.6V/110A

CHOK16 0.2u_30ACHOK16 0.2u_30A

R1274

R1274

2.2R1%0805

2.2R1%0805

C1391

C1391
C2200p50X0402

C2200p50X0402

CPU0_PH1

R1275

R1275

2.2R1%0805

2.2R1%0805

C1393

C1393
C2200p50X0402

C2200p50X0402

CPU0_PH2 CPU0_ISEN2

R1276

R1276

2.2R1%0805

2.2R1%0805

C1390

C1390
C2200p50X0402

C2200p50X0402

R1252

R1252

2.2R1%0805

2.2R1%0805

C1384

C1384
C2200p50X0402

C2200p50X0402

CPU0_PH4 CPU0_ISEN4

CPU0_VCORE_ISL6334CRZ

CPU0_VCORE_ISL6334CRZ

CPU0_VCORE_ISL6334CRZ

SP27

SP27
X_PAD_0402

X_PAD_0402

CPU0_ISEN1

CHOK19 0.2u_30ACHOK19 0.2u_30A

SP29
X_PAD_0402

X_PAD_0402

CHOK17 0.2u_30ACHOK17 0.2u_30A

SP25

SP25
X_PAD_0402

X_PAD_0402

CPU0_ISEN3CPU0_PH3

CHOK18 0.2u_30ACHOK18 0.2u_30A

SP31

SP31
X_PAD_0402

X_PAD_0402

MS-91C2 0A

MS-91C2 0A

MS-91C2 0A

1

377Thursday, August 28, 2008

377Thursday, August 28, 2008

377Thursday, August 28, 2008

VCORE_CPU0

SP28

SP28
X_PAD_0402

X_PAD_0402

SP30

SP30
X_PAD_0402

X_PAD_0402

SP26

SP26
X_PAD_0402

X_PAD_0402

SP32

SP32
X_PAD_0402

X_PAD_0402

of

of

of

5

4

3

2

1

VID_CPU1[7..0]<23>

R858 1K_0402_BR858 1K_0402_B
R856 X_1K_0402_BR856 X_1K_0402_B
R855 X_1K_0402_BR855 X_1K_0402_B
R854 X_1K_0402_BR854 X_1K_0402_B
R857 X_1K_0402_BR857 X_1K_0402_B
R859 X_1K_0402_BR859 X_1K_0402_B
R861 1K_0402_BR861 1K_0402_B

D D

C C

VSENSE_DIE_CPU1_P<23>

VSENSE_DIE_CPU1_N<23>

B B

A A

R860 1K_0402R860 1K_0402

+3.3V

R832

R832
1K_0402

1K_0402

PWRGD_CPU1_VCCP

FM_CPU1_PSI_N<23>

VCORE_CPU1 VCORE_CPU1 VCORE_CPU1 VCORE_CPU1

VID_CPU1[7..0]

VID_CPU10

R150 X_1K_0402_BR150 X_1K_0402_B

VID_CPU11

R151 1K_0402_BR151 1K_0402_B

VID_CPU12

R152 1K_0402_BR152 1K_0402_B

VID_CPU13

R153 1K_0402_BR153 1K_0402_B

VID_CPU14

R154 1K_0402_BR154 1K_0402_B

VID_CPU15

R155 1K_0402_BR155 1K_0402_B

VID_CPU16

R156 X_1K_0402_BR156 X_1K_0402_B

VID_CPU17

R158 X_1K_0402R158 X_1K_0402

PWRGD_CPU1_VCCP<14,70>

PWRGD_PLD_CPU1_EN<14>

FM_CPU1_PSI_N

R182 2.8KST_0402R182 2.8KST_0402

P1_V1

VCORE_CPU1

R883

R883

100R_0402_B

100R_0402_B

R871 0R_0402_BR871 0R_0402_B

R864 0R_0402_BR864 0R_0402_B

R884

R884

100R_0402_B

100R_0402_B

VR_CPU1_IOUT<23>

VR_CPU1_IOUT

10u*11 10u*25

C681 C10u6.3X50805C681 C10u6.3X50805
C687 C10u6.3X50805C687 C10u6.3X50805
C674 C10u6.3X50805C674 C10u6.3X50805
C696 C10u6.3X50805C696 C10u6.3X50805
C659 C10u6.3X50805C659 C10u6.3X50805
C655 C10u6.3X50805C655 C10u6.3X50805
C656 C10u6.3X50805C656 C10u6.3X50805
C666 C10u6.3X50805C666 C10u6.3X50805
C661 C10u6.3X50805C661 C10u6.3X50805
C657 C10u6.3X50805C657 C10u6.3X50805
C660 C10u6.3X50805C660 C10u6.3X50805

+1.1V_VTT_CPU1

PWRGD_CPU1_VCCP
PWRGD_PLD_CPU1_EN

R826 X_0R_0402R826 X_0R_0402

P1_V2

R177 20KST_0402R177 20KST_0402
C129 22pC129 22p

C732 680pC732 680p

C155

C155

X_0.1u_0402

X_0.1u_0402

C160

C160
X_0.1u_0402

X_0.1u_0402

C149

C149
X_0.1u_0402

X_0.1u_0402

V_6334_CPU1

R830

R830
X_0R

X_0R

R829

R829
21KST

21KST

R825 0RR825 0R

R844

R844

17.8KST_0402

17.8KST_0402

C673 C10u6.3X50805C673 C10u6.3X50805
C702 C10u6.3X50805C702 C10u6.3X50805
C667 C10u6.3X50805C667 C10u6.3X50805
C694 C10u6.3X50805C694 C10u6.3X50805
C671 C10u6.3X50805C671 C10u6.3X50805
C672 C10u6.3X50805C672 C10u6.3X50805
C685 C10u6.3X50805C685 C10u6.3X50805
C703 C10u6.3X50805C703 C10u6.3X50805
C689 C10u6.3X50805C689 C10u6.3X50805
C700 C10u6.3X50805C700 C10u6.3X50805
C688 C10u6.3X50805C688 C10u6.3X50805
C697 C10u6.3X50805C697 C10u6.3X50805
C683 C10u6.3X50805C683 C10u6.3X50805
C669 C10u6.3X50805C669 C10u6.3X50805
C675 C10u6.3X50805C675 C10u6.3X50805

C701 C10u6.3X50805C701 C10u6.3X50805
C699 C10u6.3X50805C699 C10u6.3X50805
C686 C10u6.3X50805C686 C10u6.3X50805
C695 C10u6.3X50805C695 C10u6.3X50805
C682 C10u6.3X50805C682 C10u6.3X50805
C668 C10u6.3X50805C668 C10u6.3X50805
C670 C10u6.3X50805C670 C10u6.3X50805
C684 C10u6.3X50805C684 C10u6.3X50805
C698 C10u6.3X50805C698 C10u6.3X50805

+3.3V

R827

R827

4.7K_0402

4.7K_0402

+12V_CPU1

P1_EN_PWR

R870

R870
1KST_0402

1KST_0402

C126 1000p_0402C126 1000p_0402

R852 200RR852 200R

R167 1KST_0402R167 1KST_0402

C118

C118

2.2n_0402

2.2n_0402

V_6334_CPU1

R197

R197
10K_0402

10K_0402

R195

R195

27.4KST

27.4KST

R831

R831
X_1M_0402

X_1M_0402

C119

C119
22n_0402

22n_0402

R876

R876
10K

10K

C794

C794

0.1u_0402

0.1u_0402

VID_CPU17
VID_CPU16
VID_CPU15
VID_CPU14
VID_CPU13
VID_CPU12
VID_CPU11
VID_CPU10

P1_EN_PWR

V_6334_CPU1

C121

C121
C0.1u25X

C0.1u25X

R135

R135
2K_0805

2K_0805

RT1

RT1
10KST

10KST

36
33

40

13
14

15
17

16

11
12

32
10
18
38

37
39

1
2
3
4
5
6
7
8

9

U9

U9

VR_RDY
EN_VTT

VID7
VID6
VID5
VID4
VID3
VID2
VID1
VID0
PSI#

COMP
FB

VDIFF
VSEN

RGND
OFS
DAC

REF
EN_PWR
IMON
TCOMP
VR_HOT

VR_FAN
TM

35

+5V

FS34SS

R183

R183
243KST

243KST

R204

R204

2.2R_0805

2.2R_0805

C1761uC176
1u

19

6X6 QFN

VCC

PWM1
ISEN1-

ISEN1+

PWM2
ISEN2-

ISEN2+

PWM3
ISEN3-

ISEN3+

PWM4
ISEN4-

ISEN4+

GND

ISL6334CRZ_QFN40-RH

ISL6334CRZ_QFN40-RH

41

R194

R194

64.9K_0402

64.9K_0402

26
27
28

20
21
22

31
30
29

25
24
23

22u*26 on socket 330u*3 on top side

C133 C22u6.3X1206C133 C22u6.3X1206
C172 C22u6.3X1206C172 C22u6.3X1206
C152 C22u6.3X1206C152 C22u6.3X1206
C132 C22u6.3X1206C132 C22u6.3X1206
C180 C22u6.3X1206C180 C22u6.3X1206
C167 C22u6.3X1206C167 C22u6.3X1206
C153 C22u6.3X1206C153 C22u6.3X1206
C182 C22u6.3X1206C182 C22u6.3X1206
C168 C22u6.3X1206C168 C22u6.3X1206
C154 C22u6.3X1206C154 C22u6.3X1206
C134 C22u6.3X1206C134 C22u6.3X1206
C181 C22u6.3X1206C181 C22u6.3X1206
C166 C22u6.3X1206C166 C22u6.3X1206
C801 C22u6.3X1206C801 C22u6.3X1206
C811 C22u6.3X1206C811 C22u6.3X1206
C754 C22u6.3X1206C754 C22u6.3X1206C690 C10u6.3X50805C690 C10u6.3X50805
C812 C22u6.3X1206C812 C22u6.3X1206
C797 C22u6.3X1206C797 C22u6.3X1206
C776 C22u6.3X1206C776 C22u6.3X1206
C753 C22u6.3X1206C753 C22u6.3X1206
C796 C22u6.3X1206C796 C22u6.3X1206
C775 C22u6.3X1206C775 C22u6.3X1206
C752 C22u6.3X1206C752 C22u6.3X1206
C813 C22u6.3X1206C813 C22u6.3X1206
C798 C22u6.3X1206C798 C22u6.3X1206
C777 C22u6.3X1206C777 C22u6.3X1206

+

+

12

EC38

EC38
330u_B

330u_B

VCORE_CPU1

+

+

12

EC36

EC36
330u

330u

+

+

12

V_6334_CPU1

CPU1_PWM1

CPU1_PH1

R210 432RSTR210 432RST
C819 68pC819 68p

CPU1_PWM2

CPU1_PH2

R208 432RSTR208 432RST
C821 68pC821 68p

CPU1_PWM3

CPU1_PH3

R211 432RSTR211 432RST
C818 68pC818 68p

CPU1_PWM4

CPU1_PH4

R209 432RSTR209 432RST
C820 68pC820 68p

EC39

EC39
330u

330u

+

+

12

R202 2.94KST_0402R202 2.94KST_0402

C185 0.1u_0402C185 0.1u_0402

R200 2.94KST_0402R200 2.94KST_0402

C183 0.1u_0402C183 0.1u_0402

R203 2.94KST_0402R203 2.94KST_0402

C186 0.1u_0402C186 0.1u_0402

R201 2.94KST_0402R201 2.94KST_0402

C184 0.1u_0402C184 0.1u_0402

+

+

12

EC11

EC11
330u

330u

EC9

EC9
330u

330u

R252

R252
X_499RST_0805_B

X_499RST_0805_B

CPU1_ISEN1

C209

C209

0.1u_0402

0.1u_0402

CPU1_ISEN2

C210

C210

0.1u_0402

0.1u_0402

CPU1_ISEN3

C212

C212

0.1u_0402

0.1u_0402

CPU1_ISEN4

C211

C211

0.1u_0402

0.1u_0402

+12V_CPU1

R846

R846

2.2R1%0805

2.2R1%0805

R845 X_0R_0805_BR845 X_0R_0805_B

CPU1_PWM1

C726

C726
1u_0805_B

1u_0805_B

C755

C755

15p_0402_B

15p_0402_B

+12V_CPU1

R799

R799

2.2R1%0805

2.2R1%0805

R798 X_0R_0805_BR798 X_0R_0805_B

CPU1_PWM2

C664

C664
1u_0805_B

1u_0805_B

C691

C691

15p_0402_B

15p_0402_B

+12V_CPU1

R875

R875

2.2R1%0805

2.2R1%0805

R874 X_0R_0805_BR874 X_0R_0805_B

CPU1_PWM3

C799

C799
1u_0805_B

1u_0805_B

C866

C866

15p_0402_B

15p_0402_B

+12V_CPU1

R804

R804

2.2R1%0805

2.2R1%0805

R803 X_0R_0805_BR803 X_0R_0805_B

CPU1_PWM4

C709

C709
1u_0805_B

1u_0805_B

C719

C719

15p_0402_B

15p_0402_B

L5 0.68u_25AL5 0.68u_25A

R848 2.2R1%0805R848 2.2R1%0805

C756

C756

0.1u_0402_B

0.1u_0402_B

C704

C704

0.1u_0402_B

0.1u_0402_B

C840

C840

0.1u_0402_B

0.1u_0402_B

C712

C712

0.1u_0402_B

0.1u_0402_B

+12VP1_FET+12V_CPU1

U63

U63

2

BOOT

9

VCC

8

GND

GND

UVCC

7

PVCC

4

PWM

5

GND

EP_GND

GD SEL

3

R797 2.2R1%0805R797 2.2R1%0805

U59

U59

2

BOOT

9

VCC

8

GND

GND

UVCC

7

PVCC

4

PWM

5

GND

EP_GND

GD SEL

3

R894 2.2R1%0805R894 2.2R1%0805

U65

U65

2

BOOT

9

VCC

8

GND

GND

UVCC

7

PVCC

4

PWM

5

GND

EP_GND

GD SEL

3

R808 2.2R1%0805R808 2.2R1%0805

U62

U62

2

BOOT

9

VCC

8

GND

GND

UVCC

7

PVCC

4

PWM

5

GND

EP_GND

GD SEL

3

HS2

HS2

112

2

CPU1_Vcore_Hearsink

CPU1_Vcore_Hearsink

ISL6622_B

ISL6622_B

UGATE
PHASE

LGATE

ISL6622_B

ISL6622_B

UGATE
PHASE

LGATE

ISL6622_B

ISL6622_B

UGATE
PHASE

LGATE

ISL6622_B

ISL6622_B

UGATE
PHASE

LGATE

C743 C0.1u25XC743 C0.1u25X

CPU1_U_G1

1

CPU1_PHASE1

10

CPU1_L_G1

6
11

C676 C0.1u25XC676 C0.1u25X

CPU1_U_G2

1

CPU1_PHASE2

10

CPU1_L_G2

6
11

C865 C0.1u25XC865 C0.1u25X

CPU1_U_G3

1

CPU1_PHASE3

10

CPU1_L_G3

6
11

C717 C0.1u25XC717 C0.1u25X

CPU1_U_G4

1

CPU1_PHASE4

10

CPU1_L_G4

6
11

334

4

R836 1R_0805_BR836 1R_0805_B

R833

R833
10K_0402_B

10K_0402_B

R862 0R_0805_BR862 0R_0805_B

R795 1R_0805_BR795 1R_0805_B

R790

R790
10K_0402_B

10K_0402_B

R800 0R_0805_BR800 0R_0805_B

R885 1R_0805_BR885 1R_0805_B

R886

R886
10K_0402_B

10K_0402_B

R888 0R_0805_BR888 0R_0805_B

R805 1R_0805_BR805 1R_0805_B

R806

R806
10K_0402_B

10K_0402_B

R809 0R_0805_BR809 0R_0805_B

+12VP1_FET

5

Q26 NTMFS4841Q26 NTMFS4841

4
3
2
1

5

4
3
2
1

Q25 NTMFS4833Q25 NTMFS4833

+12VP1_FET

5

Q10 NTMFS4841Q10 NTMFS4841

4
3
2
1

5

4
3
2
1

Q11 NTMFS4833Q11 NTMFS4833

+12VP1_FET

5

Q30 NTMFS4841Q30 NTMFS4841

4
3
2
1

5

4
3
2
1

Q31 NTMFS4833Q31 NTMFS4833

+12VP1_FET

5

Q20 NTMFS4841Q20 NTMFS4841

4
3
2
1

5

4
3
2
1

Q18 NTMFS4833Q18 NTMFS4833

C223 10u_1206_BC223 10u_1206_B
C745 10u_1206_BC745 10u_1206_B
C734 10u_1206_BC734 10u_1206_B

R867

R867

2.2R1%0805

2.2R1%0805

C779

C779
C2200p50X0402

C2200p50X0402

CPU1_PH1

C654 10u_1206_BC654 10u_1206_B
C665 10u_1206_BC665 10u_1206_B
C680 10u_1206_BC680 10u_1206_B

R802

R802

2.2R1%0805

2.2R1%0805

C708

C708
C2200p50X0402

C2200p50X0402

CPU1_PH2

C876 10u_1206_BC876 10u_1206_B
C886 10u_1206_BC886 10u_1206_B
C895 10u_1206_BC895 10u_1206_B

R897

R897

2.2R1%0805

2.2R1%0805

C857

C857
C2200p50X0402

C2200p50X0402

CPU1_PH3

C710 10u_1206_BC710 10u_1206_B
C724 10u_1206_BC724 10u_1206_B
C716 10u_1206_BC716 10u_1206_B

R816

R816

2.2R1%0805

2.2R1%0805

C720

C720
C2200p50X0402

C2200p50X0402

CPU1_PH4

CHOK7 0.2u_30ACHOK7 0.2u_30A

SP9

SP9
X_PAD_0402

X_PAD_0402

CPU1_ISEN1

CHOK3 0.2u_30ACHOK3 0.2u_30A

SP1

SP1
X_PAD_0402

X_PAD_0402

CPU1_ISEN2

CHOK9 0.2u_30ACHOK9 0.2u_30A

SP13

SP13
X_PAD_0402

X_PAD_0402

CPU1_ISEN3

CHOK5 0.2u_30ACHOK5 0.2u_30A

SP5

SP5
X_PAD_0402

X_PAD_0402

CPU1_ISEN4

04

0.5V~1.6V/110A

VCORE_CPU1

SP10

SP10
X_PAD_0402

X_PAD_0402

SP2

SP2
X_PAD_0402

X_PAD_0402

SP14

SP14
X_PAD_0402

X_PAD_0402

SP6

SP6
X_PAD_0402

X_PAD_0402

MICRO-START INT'L CO.,LTD.

MICRO-START INT'L CO.,LTD.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet

Date: Sheet

5

4

3

2

Date: Sheet

MICRO-START INT'L CO.,LTD.

CPU1_VCORE_ISL6334CRZ

CPU1_VCORE_ISL6334CRZ

CPU1_VCORE_ISL6334CRZ

MS-91C2 0A

MS-91C2 0A

MS-91C2 0A

1

of

477Thursday, August 28, 2008

of

477Thursday, August 28, 2008

of

477Thursday, August 28, 2008

5

4

3

2

1

05

VID_CPU0VTT7
VID_CPU0VTT6
VID_CPU0VTT5
VID_CPU0VTT4

D D

C C

VSENSE_DIE_CPU0_VTT_P<19>

VSENSE_DIE_CPU0_VTT_N<19>

B B

VID_CPU0VTT3
VID_CPU0VTT2
VID_CPU0VTT1
VID_CPU0VTT0

PWRGD_PLD_CPU0_VTT_EN_R<14>

VSENSE_DIE_CPU0_VTT_P

VSENSE_DIE_CPU0_VTT_N

PWRGD_CPU0_VTT<7,9,11,14,15,19>

CPU0_VTT_VID<19>
CPU0_VTT_VID2<19>
CPU0_VTT_VID1<19>

+5V

R661 0R_0402R661 0R_0402
R654 X_0R_0402R654 X_0R_0402
R655 0R_0402R655 0R_0402
R656 0R_0402R656 0R_0402
R657 0R_0402R657 0R_0402
R658 0R_0402R658 0R_0402
R659 X_0R_0402R659 X_0R_0402
R660 0R_0402R660 0R_0402

PWRGD_CPU0_VTT
PWRGD_PLD_CPU0_VTT_EN_R

CPU0_VTT_VID
CPU0_VTT_VID2
CPU0_VTT_VID1

R512 0R_0402R512 0R_0402

R513 0R_0402R513 0R_0402

R580

R580
X_100K_0402

X_100K_0402

R584

R584
110KST_0402

110KST_0402

R1242 0R_BR1242 0R_B
R1241 0R_BR1241 0R_B
R1240 0R_BR1240 0R_B

+1.1V_VTT_CPU0

R511

R511
100R_0402

100R_0402

R514

R514
100R_0402

100R_0402

R579 X_2.7K_0402R579 X_2.7K_0402

+5V

C491

C491
C0.01u25X0402

C0.01u25X0402

+3.3V

R649

R649

2.7K_0402

2.7K_0402

C458

C458
X_0.1u_0402

X_0.1u_0402

C448

C448
X_0.01u_0402

X_0.01u_0402

R578

R578

51.1KST_0402

51.1KST_0402

C5001uC500
1u

VID_CPU0VTT7
VID_CPU0VTT6
VID_CPU0VTT5
VID_CPU0VTT4
VID_CPU0VTT3
VID_CPU0VTT2
VID_CPU0VTT1
VID_CPU0VTT0

C456

C456
X_0.01u_0402

X_0.01u_0402

C449

C449
X_0.1u_0402

X_0.1u_0402

P0_SS

17
32
25
26
27
28
29
30
31

12

11

R622

R622
243KST

243KST

U36

U36

1

PGOOD
EN
VID7
VID6
VID5
VID4
VID3
VID2
VID1
VID0

VSEN

RGND

5

OFS

4

REF

3

FS

2

SS

6X6 QFN

+5V

R583

R583

2.2R

2.2R

C4891uC489
1u

18

VCC

GND

ISL6314CRZ

ISL6314CRZ

33

BOTTOM PAD
CONNECT TO GND
Through 8 VIAs

PVCC
BOOT

UGATE
PHASE
LGATE

ISEN+

ISEN-

ISENNO

OCSET

VDIFF

COMP

NC

DVC

FB

APA

C495

C495
1u_0805

1u_0805

19
22
23

24
21

16
15

14

13

20

10

8

9

7

6

+12V

R621 2.2RSTR621 2.2RST

R592

R592

2.2R

2.2R

C499 0.1u_0402C499 0.1u_0402

R526 432RR526 432R

R524 220RST_0402R524 220RST_0402
R531 3.3KST_0402R531 3.3KST_0402

R527 4.99KST_0402R527 4.99KST_0402

C467 1000p_0402C467 1000p_0402

R548 3KSTR548 3KST

ISEN_CPU0
PHASE_CPU0

R520 20KST_0402R520 20KST_0402

PWRGD_CPU0_VTT

R518 15.4KST_0402R518 15.4KST_0402

R523 31.6KST_0402R523 31.6KST_0402

C451 22n_0402C451 22n_0402

C442 2200pC442 2200p

C453 1000p_0402C453 1000p_0402

C422 100pC422 100p

C424 1000p_0402C424 1000p_0402

Q78

Q78

2N3904

2N3904

2N3904_B

2N3904_B

R1220 0R_0805_BR1220 0R_0805_B

R1221 10K_0402_BR1221 10K_0402_B

R501 0R_0805_BR501 0R_0805_B

C454 X_0.1u_0402C454 X_0.1u_0402

+3.3V

R694

R694

4.7K_0402

4.7K_0402

Q77

Q77

C441

C441

0.1u_0402

0.1u_0402

R703 10K_0402R703 10K_0402

+12V_VTT0

C439

C439
10u_1206

10u_1206

5

Q69 NTMFS4841Q69 NTMFS4841

4
3
2
1

5

4
3
2
1

Q68 NTMFS4833Q68 NTMFS4833

+1.1V_VTT_CPU0

PWRGD_PS_BUF_GATED

R573

R573

2.2R1%0805

2.2R1%0805

C476

C476
C1000p50X0402

C1000p50X0402

PHASE_CPU0

+12V_CPU0 +12V_VTT0

CHOK13 0.68u_25ACHOK13 0.68u_25A

+

+

EC20 330u

EC20 330u

1 2

+

+

EC53 330u

EC53 330u

1 2

+

+

EC21 330u

EC21 330u

1 2

+

+

EC51 X_330u_B

EC51 X_330u_B

1 2

C396 C10u6.3X50805C396 C10u6.3X50805
C1152 C10u6.3X50805C1152 C10u6.3X50805
C395 C10u6.3X50805C395 C10u6.3X50805
C1151 C10u6.3X50805C1151 C10u6.3X50805

L19 0.2u_30AL19 0.2u_30A

SP24

SP24
X_PAD_0402

X_PAD_0402

ISEN_CPU0

EC22

EC22

+

+

270u

270u

PWRGD_PS_BUF_GATED <6,14,70>

SP23

SP23
X_PAD_0402

X_PAD_0402

25A

+1.1V_VTT_CPU0

A A

MICRO-START INT'L CO.,LTD.

MICRO-START INT'L CO.,LTD.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet

Date: Sheet

5

4

3

2

Date: Sheet

MICRO-START INT'L CO.,LTD.

CPU0_VTT_Power_ISL6314CRZ

CPU0_VTT_Power_ISL6314CRZ

CPU0_VTT_Power_ISL6314CRZ

MS-91C2 0A

MS-91C2 0A

MS-91C2 0A

1

of

577Thursday, August 28, 2008

of

577Thursday, August 28, 2008

of

577Thursday, August 28, 2008

5

4

3

2

1

06

D D

VID_CPU1VTT7
VID_CPU1VTT6
VID_CPU1VTT5
VID_CPU1VTT4
VID_CPU1VTT3
VID_CPU1VTT2
VID_CPU1VTT1
VID_CPU1VTT0

PWRGD_CPU1_VTT<8,9,11,14,23>

PWRGD_PLD_CPU1_VTT_EN_R<14>

CPU1_VTT_VID<23>
CPU1_VTT_VID2<23>
CPU1_VTT_VID1<23>

C C

VSENSE_DIE_CPU1_VTT_P<23>

VSENSE_DIE_CPU1_VTT_N<23>

B B

R380 0R_0402R380 0R_0402
R1021 X_0R_0402R1021 X_0R_0402
R1028 0R_0402R1028 0R_0402
R363 0R_0402R363 0R_0402
R368 0R_0402R368 0R_0402
R372 0R_0402R372 0R_0402
R378 X_0R_0402R378 X_0R_0402
R379 0R_0402R379 0R_0402

PWRGD_CPU1_VTT
PWRGD_PLD_CPU1_VTT_EN_R

CPU1_VTT_VID
CPU1_VTT_VID2
CPU1_VTT_VID1

R366 0R_0402R366 0R_0402

R369 0R_0402R369 0R_0402

+5V

R391

R391
X_100K_0402

X_100K_0402

R1045

R1045
110KST_0402

110KST_0402

R1024 0R_BR1024 0R_B
R1031 0R_BR1031 0R_B
R1035 0R_BR1035 0R_B

+1.1V_VTT_CPU1

+5V

C974

C974
C0.01u25X0402

C0.01u25X0402

+3.3V +5V

R402

R402

2.7K_0402

2.7K_0402

C2981uC298
1u

VID_CPU1VTT7
VID_CPU1VTT6
VID_CPU1VTT5
VID_CPU1VTT4
VID_CPU1VTT3
VID_CPU1VTT2
VID_CPU1VTT1
VID_CPU1VTT0

C935

C935
X_0.1u_0402_B

X_0.1u_0402_B

R1023

R1023
100R_0402_B

100R_0402_B

C273

C273
X_0.01u_0402

X_0.01u_0402

R1033

R1033
100R_0402_B

100R_0402_B

C955

C955
X_0.01u_0402

X_0.01u_0402

R390 X_2.7K_0402R390 X_2.7K_0402

C966

C966
X_0.1u_0402

X_0.1u_0402

P1_SS

R1046

R1046

51.1KST_0402

51.1KST_0402

R403

R403
243KST

243KST

U23

U23

1
17
32
25
26
27
28
29
30
31

12

11

5

4

3

2

6X6 QFN

PGOOD
EN
VID7
VID6
VID5
VID4
VID3
VID2
VID1
VID0

VSEN

RGND

OFS
REF

FS
SS

R344

R344

2.2R

2.2R

C2571uC257
1u

18

VCC

ISENNO

GND

ISL6314CRZ

ISL6314CRZ

33

BOTTOM PAD
CONNECT TO GND
Through 8 VIAs

PVCC
BOOT

UGATE
PHASE
LGATE

ISEN+
ISEN-

OCSET

VDIFF

DVC

COMP

C936

C936
1u_0805_B

1u_0805_B

NC

FB

APA

+12V

R343

R343

2.2R

2.2R

19

R342 2.2RSTR342 2.2RST

22
23

24
21

ISEN_CPU1

16
15

PHASE_CPU1

14

R354 432RR354 432R

13

20

R374 220RST_0402R374 220RST_0402

10

R375 3.3KST_0402R375 3.3KST_0402

8

9

7

6

C260 0.1u_0402C260 0.1u_0402

R345 15.4KST_0402R345 15.4KST_0402

R353 31.6KST_0402R353 31.6KST_0402

C269 22n_0402C269 22n_0402

R387 4.99KST_0402R387 4.99KST_0402

C290 1000p_0402C290 1000p_0402

R408 3KSTR408 3KST

C259 X_0.1u_0402C259 X_0.1u_0402

R406 20KST_0402R406 20KST_0402

R974 0R_0805_BR974 0R_0805_B
R973 10K_0402_BR973 10K_0402_B

R910 0R_0805_BR910 0R_0805_B

C258

C258

0.1u_0402

0.1u_0402

C285 2200pC285 2200p

C291 1000p_0402C291 1000p_0402

C302 100pC302 100p

C292 1000p_0402C292 1000p_0402

+12V_VTT1

C252

C252
10u_1206

10u_1206

5

Q38 NTMFS4841Q38 NTMFS4841

4
3
2
1

5

4
3
2
1

Q35 NTMFS4833Q35 NTMFS4833

+12V_CPU1 +12V_VTT1

CHOK10 0.68u_25ACHOK10 0.68u_25A

+1.1V_VTT_CPU1

R945

R945

2.2R1%0805

2.2R1%0805

C901

C901
C1000p50X0402

C1000p50X0402

PHASE_CPU1 ISEN_CPU1

+

+

EC40 330u

EC40 330u

1 2

+

+

EC13 330u

EC13 330u

1 2

+

+

EC15 330u_B

EC15 330u_B

1 2

+

+

EC43 330u_B

EC43 330u_B

1 2

C174 C10u6.3X50805C174 C10u6.3X50805
C759 C10u6.3X50805C759 C10u6.3X50805
C814 C10u6.3X50805C814 C10u6.3X50805

L6 0.2u_30AL6 0.2u_30A

SP15

SP15
X_PAD_0402

X_PAD_0402

C254

C254
10u_1206_B

10u_1206_B

25A

+1.1V_VTT_CPU1

SP16

SP16
X_PAD_0402

X_PAD_0402

C234

C234
10u_1206_B

10u_1206_B

C255

C255
10u_1206_B

10u_1206_B

C253

C253
10u_1206_B

10u_1206_B

+3.3V

A A

5

PWRGD_CPU1_VTT

Q120

Q120
2N3904

2N3904

Q119

Q119

2N3904_B

2N3904_B

R1060

R1060

4.7K_0402_B

4.7K_0402_B

R1074 10K_0402_BR1074 10K_0402_B

4

PWRGD_PS_BUF_GATED

PWRGD_PS_BUF_GATED <5,14,70>

MICRO-START INT'L CO.,LTD.

MICRO-START INT'L CO.,LTD.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet

Date: Sheet

3

2

Date: Sheet

MICRO-START INT'L CO.,LTD.

CPU0_VTT_Power_ISL6314CRZ

CPU0_VTT_Power_ISL6314CRZ

CPU0_VTT_Power_ISL6314CRZ

MS-91C2 0A

MS-91C2 0A

MS-91C2 0A

1

of

677Thursday, August 28, 2008

of

677Thursday, August 28, 2008

of

677Thursday, August 28, 2008

5

+3.3VDUAL

U58

U58
74LVC1G32GV_B

74LVC1G32GV_B

5

PWRGD_CPU0_VTT<5,9,11,14,15,19>

S3_ON<8,13,44>

D D

PWRGD_CPU0_DDR3<9,10,14>

PWRGD_PLD_CPU0_DDR3_EN_R<14>

C C

B B

A A

5

1

S3_ON

2

3

PWRGD_CPU0_DDR3

PWRGD_PLD_CPU0_DDR3_EN_R

R71 680RSTR71 680RST

+5VSB

R10 X_100K_0402R10 X_100K_0402
R4 X_5.1KSTR4 X_5.1KST
R13 X_1K_0402R13 X_1K_0402

R14

R14
0R_0402

0R_0402

R54 2KSTR54 2KST

R63 200RST_0402R63 200RST_0402

4

+3.3V

R73

R73
1K_0402

1K_0402

C36

C36
C0.1u16X0402

C0.1u16X0402

R794 0RR794 0R
R789 X_0RR789 X_0R

+1.5V_DDR3_CPU0

R56 0R_0402R56 0R_0402

R55 0R_0402R55 0R_0402

R11

R11
X_39.2KST_0402

X_39.2KST_0402

+12V_CPU0_DDR3

C14 2200pC14 2200p
C15 10p_0402C15 10p_0402

R70 X_0R_0402R70 X_0R_0402
C32 680pC32 680p

C6

C6
C0.01u25X0402

C0.01u25X0402

4

C663

C663
C0.1u16X0402

C0.1u16X0402

37

R785

R785

R41

R41

64.9KST

64.9KST

36
46
47
48

1
2
3
4
5
6

13
14

15

16

18

17

12

7
8

11
45

9

R12

R12
240K

240K

4

P0_DDR_VID7
P0_DDR_VID6
P0_DDR_VID5
P0_DDR_VID4
P0_DDR_VID3
P0_DDR_VID2
P0_DDR_VID1
P0_DDR_VID0

26.1KST_0402

26.1KST_0402

CHOK2 1uH_22ACHOK2 1uH_22A

+5VSB

R3

2.2RR32.2R

C71uC7
1u

U3

U3

+12V_CPU0_DDR3_FET

10

PGOOD
EN
VID7
VID6
VID5
VID4
VID3
VID2
VID1
VID0
VRSEL

COMP
FB

IDROOP

VDIFF

VSEN

RGND

OFS
DRSEL/SCL
OVPSEL/SDA
REF

FS
SS/RST/A0

VCC

GND

49

BOTTOM PAD
CONNECT TO GND
Through 8 VIAs

PVCC1_2

BOOT1

UGATE1
PHASE1
LGATE1

ISEN1+

ISEN1-

BOOT2

UGATE2
PHASE2
LGATE2

ISEN2+

ISEN2-

PVCC3

BOOT3

UGATE3
PHASE3
LGATE3

ISEN3+

ISEN3-

ISEN4+

ISEN4-

PWM4

EN_PH4

ISL6312CR

ISL6312CR

+12V_CPU0_DDR3

29

R88 2.2RSTR88 2.2RST

31
32

33
30

35
34

P0DDR_PH1

R83 2.2RSTR83 2.2RST

27
26

25
28

19
20

P0DDR_PH2

42

C644

C644
1u_0805_B

1u_0805_B

R66 2.2RSTR66 2.2RST

40
39

38
41

44
43

P0DDR_PH3

21
22

24

R87 0R_0402R87 0R_0402

23

R791

R791

2.2R

2.2R

C531uC53
1u

C52 C0.1u16X0402C52 C0.1u16X0402

R84 2.8KST_0402R84 2.8KST_0402

C51 C0.1u16X0402C51 C0.1u16X0402

R86 2.8KST_0402R86 2.8KST_0402

R788 2.2R1%0805R788 2.2R1%0805

C35 C0.1u16X0402C35 C0.1u16X0402

R60 2.8KST_0402R60 2.8KST_0402

+5VSB

C143 C0.1u10X0402C143 C0.1u10X0402
C104 C0.1u10X0402C104 C0.1u10X0402
C25 C0.1u10X0402C25 C0.1u10X0402
C198 C0.1u10X0402C198 C0.1u10X0402
C105 C0.1u10X0402C105 C0.1u10X0402
C61 C0.1u10X0402C61 C0.1u10X0402
C66 C0.1u10X0402C66 C0.1u10X0402
C106 C0.1u10X0402C106 C0.1u10X0402
C22 C0.1u10X0402C22 C0.1u10X0402
C24 C0.1u10X0402C24 C0.1u10X0402
C29 C0.1u10X0402C29 C0.1u10X0402
C140 C0.1u10X0402C140 C0.1u10X0402
C141 C0.1u10X0402C141 C0.1u10X0402
C202 C0.1u10X0402C202 C0.1u10X0402
C28 C0.1u10X0402C28 C0.1u10X0402
C199 C0.1u10X0402C199 C0.1u10X0402
C30 C0.1u10X0402C30 C0.1u10X0402
C20 C0.1u10X0402C20 C0.1u10X0402
C26 C0.1u10X0402C26 C0.1u10X0402
C201 C0.1u10X0402C201 C0.1u10X0402
C145 C0.1u10X0402C145 C0.1u10X0402
C68 C0.1u10X0402C68 C0.1u10X0402
C107 C0.1u10X0402C107 C0.1u10X0402
C99 C0.1u10X0402C99 C0.1u10X0402
C62 C0.1u10X0402C62 C0.1u10X0402
C67 C0.1u10X0402C67 C0.1u10X0402
C109 C0.1u10X0402C109 C0.1u10X0402
C23 C0.1u10X0402C23 C0.1u10X0402
C21 C0.1u10X0402C21 C0.1u10X0402
C146 C0.1u10X0402C146 C0.1u10X0402
C142 C0.1u10X0402C142 C0.1u10X0402
C63 C0.1u10X0402C63 C0.1u10X0402
C110 C0.1u10X0402C110 C0.1u10X0402

3

P0_DDR3_G_U1
P0_DDR3_PHASE1
P0_DDR3_G_L1

R85 0R_0402R85 0R_0402
C677 C0.1u16X0402C677 C0.1u16X0402

R796 X_4.7KST_0402R796 X_4.7KST_0402

P0_DDR3_G_U2
P0_DDR3_PHASE2
P0_DDR3_G_L2

R81 0R_0402R81 0R_0402
C42 C0.1u16X0402C42 C0.1u16X0402

R82 X_4.7KST_0402R82 X_4.7KST_0402

+12V_CPU0_DDR3

P0_DDR3_G_U3
P0_DDR3_PHASE3

P0_DDR3_G_L3

R49 0R_0402R49 0R_0402

C650 C0.1u16X0402C650 C0.1u16X0402
R781 X_4.7KST_0402R781 X_4.7KST_0402

22u*260.1u_0402*33

+1.5V_DDR3_CPU0+1.5V_DDR3_CPU0

C653 C22u6.3X0805C653 C22u6.3X0805
C707 C22u6.3X0805C707 C22u6.3X0805
C808 C22u6.3X0805C808 C22u6.3X0805
C880 C22u6.3X0805C880 C22u6.3X0805
C730 C22u6.3X0805C730 C22u6.3X0805
C890 C22u6.3X0805C890 C22u6.3X0805
C858 C22u6.3X0805C858 C22u6.3X0805
C92 C22u6.3X0805C92 C22u6.3X0805
C706 C22u6.3X0805C706 C22u6.3X0805
C715 C22u6.3X0805C715 C22u6.3X0805
C859 C22u6.3X0805C859 C22u6.3X0805
C723 C22u6.3X0805C723 C22u6.3X0805
C758 C22u6.3X0805C758 C22u6.3X0805
C760 C22u6.3X0805C760 C22u6.3X0805
C693 C22u6.3X0805C693 C22u6.3X0805
C778 C22u6.3X0805C778 C22u6.3X0805
C679 C22u6.3X0805C679 C22u6.3X0805
C844 C22u6.3X0805C844 C22u6.3X0805
C846 C22u6.3X0805C846 C22u6.3X0805
C868 C22u6.3X0805C868 C22u6.3X0805
C894 C22u6.3X0805C894 C22u6.3X0805
C649 C22u6.3X0805C649 C22u6.3X0805
C714 C22u6.3X0805C714 C22u6.3X0805
C830 C22u6.3X0805C830 C22u6.3X0805
C742 C22u6.3X0805C742 C22u6.3X0805
C692 C22u6.3X0805C692 C22u6.3X0805

+1.5V_DDR3_CPU0

+

+

12

EC37

EC37
330u_B

330u_B

3

P0DDR_ISEN1

P0DDR_ISEN2

P0DDR_ISEN3

+

+

12

EC10

EC10
330u_B

330u_B

C678

C678
C0.1u16X0402

C0.1u16X0402

C41

C41
C0.1u16X0402

C0.1u16X0402

C651

C651
C0.1u16X0402

C0.1u16X0402

+

+

12

EC3

EC3
330u_B

330u_B

R823 0R_0805_BR823 0R_0805_B
R824 10K_BR824 10K_B

R106 0R_0805_BR106 0R_0805_B
R112 10K_BR112 10K_B

R865 0R_0805_BR865 0R_0805_B
R866 10K_BR866 10K_B

+3.3VDUAL +3.3VDUAL +3.3VDUAL +3.3VDUAL +3.3VDUAL +3.3VDUAL +3.3VDUAL +3.3VDUAL

P0_DDR_VID7
P0_DDR_VID6
P0_DDR_VID5
P0_DDR_VID4
P0_DDR_VID3
P0_DDR_VID2
P0_DDR_VID1
P0_DDR_VID0

2

Q23 NTMFS4841Q23 NTMFS4841

4
3
2
1

4
3
2
1

Q22 NTMFS4833Q22 NTMFS4833

Q12 NTMFS4841Q12 NTMFS4841

4
3
2
1

4
3
2
1

Q13 NTMFS4833Q13 NTMFS4833

4
3
2
1

4
3
2
1

Q27 NTMFS4833Q27 NTMFS4833

R15

R15

4.7K_0402

4.7K_0402

R774

R774
X_4.7K_0402

X_4.7K_0402

HS1

HS1

112

2

CPU0_DDR_Power_Hearsink

CPU0_DDR_Power_Hearsink

2

R16

R16
X_4.7K_0402

X_4.7K_0402

R773

R773

4.7K_0402

4.7K_0402

334

4

+12V_CPU0_DDR3_FET

5

5

+12V_CPU0_DDR3_FET

5

5

+12V_CPU0_DDR3_FET

5

Q28 NTMFS4841Q28 NTMFS4841

5

R17

R17

4.7K_0402

4.7K_0402

R772

R772
X_4.7K_0402

X_4.7K_0402

1

C127

C127
10u_1206_B

10u_1206_B

R828

R828

2.2R1%0805

2.2R1%0805

C721

C721
C1000p50X0402

C1000p50X0402

C95

C95
10u_1206_B

10u_1206_B

R801

R801

2.2R1%0805

2.2R1%0805

C705

C705
C1000p50X0402

C1000p50X0402

C750

C750
10u_1206_B

10u_1206_B

R863

R863

2.2R1%0805

2.2R1%0805

C761

C761
C1000p50X0402

C1000p50X0402

R18

R18

4.7K_0402

4.7K_0402

R771

R771
X_4.7K_0402

X_4.7K_0402

C120

C120

C713

C713
10u_1206_B

10u_1206_B

10u_1206_B

10u_1206_B

C135

C135

C87

C87
10u_1206_B

10u_1206_B

10u_1206_B

10u_1206_B

P0DDR_PH2 P0DDR_ISEN2

C169

C169

C727

C727

10u_1206_B

10u_1206_B

10u_1206_B

10u_1206_B

P0DDR_PH3 P0DDR_ISEN3

R19

R19
X_4.7K_0402

X_4.7K_0402

R770

R770

4.7K_0402

4.7K_0402

C111

C111
10u_1206_B

10u_1206_B

CHOK6 0.2u_30ACHOK6 0.2u_30A

SP7

SP7
X_PAD_0402

X_PAD_0402

P0DDR_ISEN1P0DDR_PH1

C84

C84
10u_1206_B

10u_1206_B

CHOK4 0.2u_30ACHOK4 0.2u_30A

SP3

SP3
X_PAD_0402

X_PAD_0402

C156

C156
10u_1206_B

10u_1206_B

CHOK8 0.2u_30ACHOK8 0.2u_30A

SP11

SP11
X_PAD_0402

X_PAD_0402

R22

R22
X_4.7K_0402

X_4.7K_0402

R775

R775

4.7K_0402

4.7K_0402

SP8

SP8
X_PAD_0402

X_PAD_0402

SP4

SP4
X_PAD_0402

X_PAD_0402

SP12

SP12
X_PAD_0402

X_PAD_0402

R26

R26
X_4.7K_0402

X_4.7K_0402

R776

R776

4.7K_0402

4.7K_0402

VID 00001101 >> 1.531V
VID 01101110 >> 1.5V

MICRO-START INT'L CO.,LTD.

MICRO-START INT'L CO.,LTD.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet

Date: Sheet

Date: Sheet

MICRO-START INT'L CO.,LTD.

CPU0_DDR3_Power_ISL6312CR

CPU0_DDR3_Power_ISL6312CR

CPU0_DDR3_Power_ISL6312CR

MS-91C2 0A

MS-91C2 0A

MS-91C2 0A

1

1.5V/ 80A

+1.5V_DDR3_CPU0

R33

R33
X_4.7K_0402

X_4.7K_0402

R777

R777

4.7K_0402

4.7K_0402

777Thursday, August 28, 2008

777Thursday, August 28, 2008

777Thursday, August 28, 2008

of

of

of

07

5

4

3

2

1

877Thursday, August 28, 2008

877Thursday, August 28, 2008

877Thursday, August 28, 2008

08

R433

R433
X_4.7K_0402_B

X_4.7K_0402_B

R1086

R1086

4.7K_0402

4.7K_0402

of

of

of

R397

R397
X_4.7K_0402_B

X_4.7K_0402_B

R1061

R1061

4.7K_0402_B

4.7K_0402_B

+

+

12

EC58

EC58
330u_B

330u_B

2

+12V_CPU1_DDR3_FET

5

Q57

Q57

4
3
2
1

NTMFS4841

NTMFS4841

5

Q55

Q55

4
3
2
1

NTMFS4833

NTMFS4833

+12V_CPU1_DDR3_FET

5

Q52

Q52

4
3
2
1

NTMFS4841

NTMFS4841

5

Q51

Q51

4
3
2
1

NTMFS4833

NTMFS4833

+12V_CPU1_DDR3_FET

5

Q63

Q63

4
3
2
1

NTMFS4841

NTMFS4841

5

Q62

Q62

4
3
2
1

NTMFS4833

NTMFS4833

+

+

12

EC31

EC31
330u_B

330u_B

C1041

C1041

C1240

C1240

10u_1206

10u_1206

10u_1206

10u_1206

R1132

R1132

2.2R1%0805

2.2R1%0805

C1126

C1126
C1000p50X0402

C1000p50X0402

C1185

C1185
10u_1206

10u_1206

R1096

R1096

2.2R1%0805

2.2R1%0805

C1047

C1047
C1000p50X0402

C1000p50X0402

C1082

C1082
10u_1206

10u_1206

R1161

R1161

2.2R1%0805

2.2R1%0805

C1179

C1179
C1000p50X0402

C1000p50X0402

R407

R407

4.7K_0402_B

4.7K_0402_B

R1065

R1065
X_4.7K_0402_B

X_4.7K_0402_B

C1145

C1145
10u_1206

10u_1206

C1022

C1022
10u_1206

10u_1206

R412

R412

4.7K_0402_B

4.7K_0402_B

R1068

R1068
X_4.7K_0402

X_4.7K_0402

P1DDR_PH1

P1DDR_PH2

P1DDR_PH3

R415

R415
X_4.7K_0402_B

X_4.7K_0402_B

R1070

R1070

4.7K_0402

4.7K_0402

VID 00001101 >> 1.531V
VID 01101110 >> 1.5V

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet

Date: Sheet

Date: Sheet

1.5V/ 80A

C1127

C1127
10u_1206

10u_1206

CHOK12 0.2u_30ACHOK12 0.2u_30A

SP19

SP19
X_PAD_0402

X_PAD_0402

C1109

C1109

C1063

C1063

10u_1206

10u_1206

10u_1206

10u_1206

CHOK11 0.2u_30ACHOK11 0.2u_30A

SP17

SP17
X_PAD_0402

X_PAD_0402

P1DDR_ISEN2

C1166

C1166

C1193

C1193

10u_1206

10u_1206

10u_1206

10u_1206

CHOK14 0.2u_30ACHOK14 0.2u_30A

SP21

SP21
X_PAD_0402

X_PAD_0402

P1DDR_ISEN3

R420

R420
X_4.7K_0402_B

X_4.7K_0402_B

R1075

R1075

4.7K_0402

4.7K_0402

MICRO-START INT'L CO.,LTD.

MICRO-START INT'L CO.,LTD.

MICRO-START INT'L CO.,LTD.

CPU1_DDR3_Power_ISL6312CR

CPU1_DDR3_Power_ISL6312CR

CPU1_DDR3_Power_ISL6312CR

+1.5V_DDR3_CPU1

SP20

SP20
X_PAD_0402

X_PAD_0402

SP18

SP18
X_PAD_0402

X_PAD_0402

SP22

SP22
X_PAD_0402

X_PAD_0402

R422

R422
X_4.7K_0402_B

X_4.7K_0402_B

R1081

R1081

4.7K_0402

4.7K_0402

MS-91C2 0A

MS-91C2 0A

MS-91C2 0A

1

+3.3VDUAL

U74

U74
74LVC1G32GV_B

74LVC1G32GV_B

5

PWRGD_CPU1_VTT<6,9,11,14,23>

D D

PWRGD_PLD_CPU1_DDR3_EN_R<14>

C C

B B

+1.5V_DDR3_CPU1 +1.5V_DDR3_CPU1

C394 C0.1u10X0402C394 C0.1u10X0402
C427 C0.1u10X0402C427 C0.1u10X0402
C477 C0.1u10X0402C477 C0.1u10X0402
C386 C0.1u10X0402C386 C0.1u10X0402
C391 C0.1u10X0402C391 C0.1u10X0402
C348 C0.1u10X0402C348 C0.1u10X0402
C393 C0.1u10X0402C393 C0.1u10X0402
C482 C0.1u10X0402C482 C0.1u10X0402
C354 C0.1u10X0402C354 C0.1u10X0402
C519 C0.1u10X0402C519 C0.1u10X0402
C525 C0.1u10X0402C525 C0.1u10X0402
C523 C0.1u10X0402C523 C0.1u10X0402
C433 C0.1u10X0402C433 C0.1u10X0402
C390 C0.1u10X0402C390 C0.1u10X0402
C434 C0.1u10X0402C434 C0.1u10X0402
C428 C0.1u10X0402C428 C0.1u10X0402
C475 C0.1u10X0402C475 C0.1u10X0402
C392 C0.1u10X0402C392 C0.1u10X0402
C479 C0.1u10X0402C479 C0.1u10X0402
C346 C0.1u10X0402C346 C0.1u10X0402
C431 C0.1u10X0402C431 C0.1u10X0402
C483 C0.1u10X0402C483 C0.1u10X0402
C520 C0.1u10X0402C520 C0.1u10X0402
C518 C0.1u10X0402C518 C0.1u10X0402
C430 C0.1u10X0402C430 C0.1u10X0402
C1065 C0.1u10X0402C1065 C0.1u10X0402
C904 C0.1u10X0402C904 C0.1u10X0402

A A

C429 C0.1u10X0402C429 C0.1u10X0402
C889 C0.1u10X0402C889 C0.1u10X0402
C389 C0.1u10X0402C389 C0.1u10X0402
C903 C0.1u10X0402C903 C0.1u10X0402
C885 C0.1u10X0402C885 C0.1u10X0402
C478 C0.1u10X0402C478 C0.1u10X0402

S3_ON<7,13,44>

PWRGD_CPU1_DDR3<9,10,14>

5

1

S3_ON

2

3

PWRGD_CPU1_DDR3
PWRGD_PLD_CPU1_DDR3_EN_R

R355 680RSTR355 680RST

+5VSB

R357 X_100K_0402R357 X_100K_0402
R1034 X_5.1KSTR1034 X_5.1KST
R382 X_1K_0402R382 X_1K_0402

0R_0402

0R_0402

22u*260.1u_0402*33

C1232 C22u6.3X0805C1232 C22u6.3X0805

C1270 C22u6.3X0805C1270 C22u6.3X0805
C1207 C22u6.3X0805C1207 C22u6.3X0805
C1104 C22u6.3X0805C1104 C22u6.3X0805
C1018 C22u6.3X0805C1018 C22u6.3X0805
C1070 C22u6.3X0805C1070 C22u6.3X0805
C1352 C22u6.3X0805C1352 C22u6.3X0805
C1368 C22u6.3X0805C1368 C22u6.3X0805
C1153 C22u6.3X0805C1153 C22u6.3X0805

C1221 C22u6.3X0805C1221 C22u6.3X0805
C1200 C22u6.3X0805C1200 C22u6.3X0805
C1199 C22u6.3X0805C1199 C22u6.3X0805
C1164 C22u6.3X0805C1164 C22u6.3X0805
C1138 C22u6.3X0805C1138 C22u6.3X0805
C1123 C22u6.3X0805C1123 C22u6.3X0805
C1250 C22u6.3X0805C1250 C22u6.3X0805
C1080 C22u6.3X0805C1080 C22u6.3X0805
C1245 C22u6.3X0805C1245 C22u6.3X0805
C1048 C22u6.3X0805C1048 C22u6.3X0805
C1025 C22u6.3X0805C1025 C22u6.3X0805

R1047

R1047

+3.3V

R421

R421
1K_0402_B

4

R348 2KSTR348 2KST

R347 200RST_0402R347 200RST_0402

1K_0402_B

R1067 0R_BR1067 0R_B
R1063 X_0R_BR1063 X_0R_B

+1.5V_DDR3_CPU1

R356

R356
X_39.2KST_0402

X_39.2KST_0402

+12V_CPU1_DDR3

C314

C314
C0.1u16X0402

C0.1u16X0402

C311

C311
C0.1u16X0402

C0.1u16X0402

37

P1_DDR_VID7
P1_DDR_VID6 P1DDR_ISEN1
P1_DDR_VID5
P1_DDR_VID4
P1_DDR_VID3
P1_DDR_VID2
P1_DDR_VID1
P1_DDR_VID0

C261 2200pC261 2200p
C268 10p_0402C268 10p_0402

R360 X_0R_0402R360 X_0R_0402
C267 680pC267 680p

26.1KST_0402

26.1KST_0402

R682 0R_0402R682 0R_0402

R683 0R_0402R683 0R_0402

R1071

R1071

C274

C274

64.9KST

64.9KST

C0.01u25X0402

C0.01u25X0402

HS4

HS4

112

2

CPU1_DDR_Power_Hearsink

CPU1_DDR_Power_Hearsink

CHOK15 1uH_22A_BCHOK15 1uH_22A_B

36
46
47
48

13
14

15

16

R349

R349

18

17

12

11
45

R364

R364
240K

240K

334

4

+12V_CPU1_DDR3_FET

4

1
2
3
4
5
6

7
8

9

+5VSB

R384

R384

2.2R

2.2R

C2771uC277
1u

U24

U24

10

PGOOD
EN
VID7
VID6
VID5
VID4
VID3
VID2
VID1
VID0
VRSEL

COMP
FB

IDROOP

VDIFF

VSEN

RGND

OFS
DRSEL/SCL
OVPSEL/SDA
REF

FS
SS/RST/A0

VCC

GND

49

BOTTOM PAD
CONNECT TO GND
Through 8 VIAs

ISL6312CR

ISL6312CR

PVCC1_2

BOOT1

UGATE1
PHASE1
LGATE1

ISEN1+

ISEN1-

BOOT2

UGATE2
PHASE2
LGATE2

ISEN2+

ISEN2-

PVCC3

BOOT3

UGATE3
PHASE3
LGATE3

ISEN3+

ISEN3-

ISEN4+

ISEN4-

PWM4

EN_PH4

+12V_CPU1_DDR3

29

R376 2.2RSTR376 2.2RST

31
32

33
30

35
34

P1DDR_PH1

R367 2.2RSTR367 2.2RST

27
26

25
28

19
20

P1DDR_PH2

42

C1004

C1004
1u_0805

1u_0805

R1083 2.2RSTR1083 2.2RST

40
39

38
41

44
43

P1DDR_PH3

21
22

24

R358 0R_0402R358 0R_0402

23

R1039

R1039

2.2R

2.2R

C2751uC275
1u

C297 C0.1u16X0402C297 C0.1u16X0402

R413 0R_0402R413 0R_0402
R1055 2.8KST_0402R1055 2.8KST_0402

C271 C0.1u16X0402C271 C0.1u16X0402

R359 0R_0402R359 0R_0402
R352 2.8KST_0402R352 2.8KST_0402

R1066 2.2R1%0805R1066 2.2R1%0805

C1014 C0.1u16X0402C1014 C0.1u16X0402

R1078 0R_0402_BR1078 0R_0402_B
R1080 2.8KST_0402_BR1080 2.8KST_0402_B

+5VSB

P1_DDR3_G_U1
P1_DDR3_PHASE1
P1_DDR3_G_L1

P1DDR_ISEN1

C303 C0.1u16X0402C303 C0.1u16X0402
R1062 X_4.7KST_0402_BR1062 X_4.7KST_0402_B

P1_DDR3_G_U2
P1_DDR3_PHASE2
P1_DDR3_G_L2

P1DDR_ISEN2

C270 C0.1u16X0402C270 C0.1u16X0402
R351 X_4.7KST_0402_BR351 X_4.7KST_0402_B

+12V_CPU1_DDR3

P1_DDR3_G_U3
P1_DDR3_PHASE3
P1_DDR3_G_L3

P1DDR_ISEN3

C1016 C0.1u16X0402C1016 C0.1u16X0402
R1079 X_4.7KST_0402_BR1079 X_4.7KST_0402_B

3

C1005

C1005
C0.1u16X0402

C0.1u16X0402

C263

C263
C0.1u16X0402

C0.1u16X0402

C1015

C1015
C0.1u16X0402

C0.1u16X0402

P1_DDR_VID7
P1_DDR_VID6
P1_DDR_VID5
P1_DDR_VID4
P1_DDR_VID3
P1_DDR_VID2
P1_DDR_VID1
P1_DDR_VID0

R1136 0R_0805_BR1136 0R_0805_B
R1134 10K_BR1134 10K_B

R1097 0R_0805_BR1097 0R_0805_B
R1094 10K_BR1094 10K_B

R528 0R_0805_BR528 0R_0805_B
R521 10K_BR521 10K_B

+3.3VDUAL +3.3VDUAL +3.3VDUAL +3.3VDUAL +3.3VDUAL +3.3VDUAL +3.3VDUAL +3.3VDUAL

R383

R383

4.7K_0402_B

4.7K_0402_B

R1054

R1054
X_4.7K_0402_B

X_4.7K_0402_B

+1.5V_DDR3_CPU1

+

+

12

EC54

EC54
330u_B

330u_B

5

4

3

2

1

09

+5V

+5V

+1.5V_DDR3_CPU0

R787

R787
3KST

D D

PWRGD_PLD_CPU0_DDR_VTT_EN<14>

C C

PWRGD_PLD_CPU1_DDR_VTT_EN<14>

B B

PWRGD_PLD_CPU0_DDR_VTT_EN
PWRGD_CPU0_DDR3VTT_SFR_EN

PWRGD_PLD_CPU1_DDR_VTT_EN
PWRGD_CPU1_DDR3VTT_SFR_EN

PWRGD_CPU0_VTT<5,7,11,14,15,19>

PWRGD_CPU0_DDR3<7,10,14>

R793 X_0RR793 X_0R
R792 49.9RSTR792 49.9RST

R761 X_0R_BR761 X_0R_B
R760 49.9RST_BR760 49.9RST_B

PWRGD_CPU0_VTT

+5V

R783

R783
10K

10K

Q103

Q103

B

2N3904

2N3904

E C

+5V

R759

R759
10K

10K

Q90

Q90

B

2N3904_B

2N3904_B

E C

R766 10KR1%R766 10KR1%

R747 10KR1%R747 10KR1%

3KST

Q102

Q102

B

2N3904

2N3904

E C

+1.5V_DDR3_CPU1

R735

R735
3KST

3KST

Q89

Q89

B

2N3904

2N3904

E C

PWRGD_CPU0_VTT_R

PWRGD_CPU0_DDR3_RPWRGD_CPU0_DDR3

Vref = 0.765V

R786

R786

C662

C662

3KST

3KST

1u_0402

1u_0402

Vref = 0.765V

C579

C579

R738

R738

1u_0402

1u_0402

3KST

3KST

G

U4

7

COMP

6

FB

U46

U46

7

COMP

6

FB

R751

R751

4.7K

4.7K

PWRGD_CPU0_VTT_N

DS

Q97

Q97
2N7002

2N7002

G

+3.3V

5

VCC

GND

up6103s8U4up6103s8

3

+5V

5

VCC

GND

up6103s8

up6103s8

3

+3.3V

R750

R750

4.7K

4.7K

PWRGD_CPU0_DDR3_N

DS

Q96

Q96
2N7002

2N7002

UGATE

BOOT

PHASE
LGATE

UGATE

BOOT

PHASE
LGATE

B

C8
1uC81u

R65 0R_0805R65 0R_0805

2

C658 0.22u_0402C658 0.22u_0402

1
8

R53 1R_0805R53 1R_0805

4

R40

R40
10KR1%

10KR1%

C5081uC508
1u

R723 0R_0805R723 0R_0805

2

C564 0.22u_0402C564 0.22u_0402

1
8

R713 1R_0805R713 1R_0805

4

R705

R705
10KR1%

10KR1%

+3.3V+3.3V

PWRGD_CPU0_DDR3VTT_SFR_EN

R758

R758

4.7K

4.7K

Q99

Q99
2N3904

2N3904

E C

B

+3.3V

C1361

C1361

C642

C642

10u_1206_B

10u_1206_B

10u_1206

10u_1206

+5V

C516

C516

C641

C641

10u_1206_B

10u_1206_B

10u_1206

10u_1206

PWRGD_CPU0_DDR3VTT_SFR_EN

Q98

Q98
2N3904

2N3904

E C

Q3

Q3

2

3

4

N-SP8K10S_SO8

N-SP8K10S_SO8

Q83

Q83

2

3

4

N-SP8K10S_SO8

N-SP8K10S_SO8

81

7

6

5

81

7

6

5

PWRGD_CPU0_DDR3VTT_SFR_EN <10>

+0.75V DDR3 CPU0 (3.9A)

+0.75V_DDR3_CPU0

CHOK1 1uH_22ACHOK1 1uH_22A

+

+

R784

R784
0R_0402

0R_0402

R782

R782
X_1.5KST_0402

X_1.5KST_0402

12

EC35

EC35

C646

C646

C330u2.5pSO

C330u2.5pSO

C10u6.3X5

C10u6.3X5

Changed Cap.!!!!!!!!

R769

R769

2.2R1%0805

2.2R1%0805

C640

C640
C2200p50X0402

C2200p50X0402

C652

C652
X_10p_0402

X_10p_0402

+0.75V DDR3 CPU1 (3.9A)

+0.75V_DDR3_CPU1

CHOK21 1uH_22ACHOK21 1uH_22A

+

+

R1282

R1282
0R_0402

0R_0402

R1302

R1302
X_1.5KST_0402

X_1.5KST_0402

EC34

EC34

C614

C614

C330u2.5pSO

C330u2.5pSO

C10u6.3X5

C10u6.3X5

Changed Cap.!!!!!!!!

R765

R765

2.2R1%0805

2.2R1%0805

C632

C632
C2200p50X0402

C2200p50X0402

C1386

C1386
X_10p_0402

X_10p_0402

C645

C645
C10u6.3X5

C10u6.3X5

C567

C567
C10u6.3X5

C10u6.3X5

PWRGD_CPU1_DDR3VTT_SFR_EN

R1342

R1341

R1341

4.7K_B

4.7K_B

PWRGD_CPU1_VTT_N

DS

A A

PWRGD_CPU1_VTT<6,8,11,14,23>

PWRGD_CPU1_DDR3<8,10,14>

5

PWRGD_CPU1_VTT

PWRGD_CPU1_DDR3

4

R1307 10KR1%R1307 10KR1%

R1299 10KR1%R1299 10KR1%

PWRGD_CPU1_VTT_R

PWRGD_CPU1_DDR3_R

G

Q150

Q150
2N7002_B

2N7002_B

+3.3V

DS

G

3

R1336

R1336

4.7K_B

4.7K_B

PWRGD_CPU1_DDR3_N

Q147

Q147
2N7002_B

2N7002_B

R1342

4.7K_B

4.7K_B

Q154

Q154

B

2N3904_B

2N3904_B

E C

PWRGD_CPU1_DDR3VTT_SFR_EN

Q151

Q151

B

2N3904_B

2N3904_B

E C

PWRGD_CPU1_DDR3VTT_SFR_EN <10>

2

MICRO-START INT'L CO.,LTD.

MICRO-START INT'L CO.,LTD.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet

Date: Sheet

Date: Sheet

MICRO-START INT'L CO.,LTD.

CPU0_&_CPU1_DDR3_VTT

CPU0_&_CPU1_DDR3_VTT

CPU0_&_CPU1_DDR3_VTT

MS-91C2 0A

MS-91C2 0A

MS-91C2 0A

1

of

977Thursday, August 28, 2008

of

977Thursday, August 28, 2008

of

977Thursday, August 28, 2008

5

4

3

2

1

10

+5V

D D

PWRGD_CPU0_SFR<14>

PWRGD_CPU0_DDR3VTT_SFR_EN<9>

PWRGD_PLD_CPU0_SFR_EN<14>

C C

B B

PWRGD_CPU1_SFR<14>

PWRGD_CPU1_DDR3VTT_SFR_EN<9>

PWRGD_PLD_CPU1_SFR_EN<14>

PWRGD_CPU0_SFR

PWRGD_CPU0_DDR3VTT_SFR_EN
PWRGD_PLD_CPU0_SFR_EN

PWRGD_CPU0_DDR3<7,9,14>

PWRGD_CPU1_SFR

PWRGD_CPU1_DDR3VTT_SFR_EN
PWRGD_PLD_CPU1_SFR_EN

R732 X_0RR732 X_0R
R743 0RR743 0R

R111 X_0RR111 X_0R
R110 0RR110 0R

+3.3V

R7541KR754
1K

APL5913KAC-TRL_SOP8

APL5913KAC-TRL_SOP8

PWRGD_CPU0_DDR3

+3.3V

R1031KR103
1K

APL5913KAC-TRL_SOP8

APL5913KAC-TRL_SOP8

U51

U51

7

8

U6

U6

7

8

POK

EN

G

POK

EN

6

VOUT#3

1

+3.3V

DS

+5V

6

VOUT#3

1

VCNTL

VIN#9

VOUT

GND

R753

R753

4.7K

4.7K

PWRGD_CPU0_VDD_N

Q101

Q101
2N7002

2N7002

VCNTL

VIN#9

VOUT

GND

CPU0 SFR 1.8V (1.5A)

C6281uC628
1u

5

VIN

9

4
3

2

FB

C721uC72
1u

5

VIN

9

4
3

2

FB

R756 43KSTR756 43KST
C622 56pC622 56p

R755

R755
34KST

34KST

+1.1V_VTT_CPU0

R749

R749
100R

100R

PWRGD_CPU0_VDD_GTL

Q100

Q100

B

2N3904

2N3904

E C

CPU1 SFR 1.8V (1.5A)

R100 43KSTR100 43KST
C73 56pC73 56p

R101

R101
34KST

34KST

+3.3V

+3.3V

C633

C633
47u_1206

47u_1206

C60

C60
47u_1206

47u_1206

+1.8V_CPU0_PLL

C631

C631
47u_1206

47u_1206

PWRGD_CPU0_VDD_GTL <19>

+1.8V_CPU1_PLL

C58

C58
47u_1206

47u_1206

+1.1V_VTT_CPU1

+3.3V

R409

R409

4.7K

4.7K

PWRGD_CPU1_VDD_N

DS

Q48

Q48
2N7002

A A

5

PWRGD_CPU1_DDR3<8,9,14>

4

PWRGD_CPU1_DDR3

2N7002

G

3

R362

R362
100R

100R

PWRGD_CPU1_VDD_GTL

B

E C

Q47

Q47
2N3904

2N3904

PWRGD_CPU1_VDD_GTL <23>

2

MICRO-START INT'L CO.,LTD.

MICRO-START INT'L CO.,LTD.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet

Date: Sheet

Date: Sheet

MICRO-START INT'L CO.,LTD.

CPU0_&_CPU1_SFR_PLL

CPU0_&_CPU1_SFR_PLL

CPU0_&_CPU1_SFR_PLL

MS-91C2 0A

MS-91C2 0A

MS-91C2 0A

1

of

10 77Thursday, August 28, 2008

of

10 77Thursday, August 28, 2008

of

10 77Thursday, August 28, 2008

5

4

3

2

1

11

+1.1V_IOH==>22.9A (IOH)+1.63A (ICH)=24.63A

U40

U40

7

COMP

6

FB

R690 47KR690 47K

+3.3V +3.3V

+12V

5

UGATE

VCC

BOOT

PHASE
LGATE

GND

ISL6545CBZ

ISL6545CBZ

3

R1294

R1294

4.7KR0402

4.7KR0402

Q143

Q143
N-PMBS3904

N-PMBS3904

R1295

R1295

4.7KR0402

4.7KR0402

Q144

Q144
N-PMBS3904

N-PMBS3904

C5351uC535
1u

R648 0R_0805R648 0R_0805

2

R644 2.2R1%0805R644 2.2R1%0805

1
8

R672 1R_0805R672 1R_0805

4

R698

R698

4.87KST

4.87KST

R686

R686

R1

1KST_0402

1KST_0402

R1293

R1293
X_4.7KR0402

X_4.7KR0402

PWRGD_CPU1_VTT <6,8,9,14,23>

Q142

Q142
N-PMBS3904

N-PMBS3904

PWRGD_IOH_P1V1 <14>

+3.3V+3.3V

R1244

R1244
X_4.7KR0402

X_4.7KR0402

PWRGD_CPU0_VTT <5,7,9,14,15,19>

Q139

Q139
N-PMBS3904

N-PMBS3904

C501 C0.1u25XC501 C0.1u25X

R2

R697 845RST_0402R697 845RST_0402

0.6*(1+R2/R1)

+12V

5

Q146

Q146

4
3
2
1

59N03S

59N03S

5

Q145

Q145

4
3
2
1

32N03S

32N03S

PWRGD_IOH_P1V1

+3.3VDUAL

C538

C538

C545

10u_1206

10u_1206

CHOK20 1u_40ACHOK20 1u_40A

R710

R710
X_845RST_0402

X_845RST_0402

R709 0R_0402R709 0R_0402

C545
10u_1206

10u_1206

X_10pC541 X_10pC541

C561

C561
10u_1206

10u_1206

C578

C578
10u_1206

10u_1206

R717

R717

2.2R1%0805

2.2R1%0805

C540

C540
1000p_B

1000p_B

+1.8V_IOH==>1.94A

+2.5V_REF

U47

U47

9
8
7
6
5

W83310DS

W83310DS

G

NC
VREF2
ENABLE
VCNTL
BOOT_SEL

+12V

R588

R588

4.7KR0402

4.7KR0402

DS

Q74

Q74
N-2N7002

N-2N7002

GND

VREF1

VOUT

R688

R688

4.99KR1%

4.99KR1%

DS

Q73

Q73
N-2N7002

N-2N7002

C506

G

1

VIN

2
3
4

C506
C1000p50X0402

C1000p50X0402

+

+

EC33

EC33
CD270u16SO

CD270u16SO

Changed Cap.!!!!!!

+1.1V_IOH

+1.1V_IOH

+

+

EC47 C330u2.5pSO

EC47 C330u2.5pSO

1 2

+

+

EC63 C330u2.5pSO

EC63 C330u2.5pSO

1 2

+

+

EC62 C330u2.5pSO

EC62 C330u2.5pSO

1 2

+

+

EC60 C330u2.5pSO

EC60 C330u2.5pSO

1 2

+

+

EC61 C330u2.5pSO

EC61 C330u2.5pSO

1 2

R673

R673
13KR1%

13KR1%

+1.8V_IOHDUAL+1.8V_IOHDUAL

R700

R700
1KR1%

1KR1%

R696

R696
1KR1%

1KR1%

DDR2_VTTDUAL

C532

C532
C22u6.3X50805

C22u6.3X50805

U48

U48

1

1

2

2
334

LMV321AP5X_SC70

LMV321AP5X_SC70

R666

R666

R677

R677

0R0402

0R0402

0R0402

0R0402

C507 X_C0.01u16X0402C507 X_C0.01u16X0402

C533

C533
C22u6.3X50805

C22u6.3X50805

5

5

4

R958 2.8KR1%R958 2.8KR1%

R959 4.99KR1%R959 4.99KR1%

+9VDUAL

+

+

C905

C905
C1000p50X0402

C1000p50X0402

C906

C906
C1000p50X0402

C1000p50X0402

+3.3V

Q95

Q95

4
3
2
1

NTMFS4841

NTMFS4841

EC25

EC25
C330u2.5pSO

C330u2.5pSO

3

+

+

1

2

-

-

U16A

U16A
AZ358M-E1

R947

R947

2.2KR1%

2.2KR1%

R948

R948
13KR1%

13KR1%

+1.8V_IOH

5

C537

C537
C10u6.3X50805

C10u6.3X50805

AZ358M-E1

4 8

5

+

+

7

6

-

-

U16B

U16B
AZ358M-E1

AZ358M-E1

4 8

D D

+12V

R1261

R1261

DS

4.7K_0402

4.7K_0402

DS

Q137

Q137
X_2N7002

X_2N7002

PWRGD_PLD_IOH_P1V1_EN_R<14>

G

Q136

Q136
X_2N7002

X_2N7002

G

Vref = 0.6V

+1.5V_ICH

R1247

R1247
10K

C C

+12V

U43B

U43B
LM393DR

LM393DR

5

+

+

7

6

-

-

4 8

B B

R1250

R1250
10K

10K

R1249

R1249

2.2KST

2.2KST

A A

10K

Q138

Q138
N-PMBS3904

N-PMBS3904

+3.3V+5V +12V+1.1V_IOH

R1236

R1236
1K_0402

U43A

U43A
LM393DR

LM393DR

3

+

+

2

-

-

4 8

1K_0402

1

10p_0402C511 10p_0402C511
1500pC509 1500pC509

R1251 10K_0402R1251 10K_0402

R1245 10K_0402R1245 10K_0402

+3.3VDUAL+2.5VDUAL_REF +9VDUAL

5

Q110

Q110

4
3
2
1

NTMFS4841

NTMFS4841

C951

C951
C10u6.3X50805

C10u6.3X50805

+3.3VDUAL+2.5VDUAL_REF +9VDUAL

5

Q111

Q111

4
3
2
1

NTMFS4841

NTMFS4841

C919

C919
C10u6.3X50805

C10u6.3X50805

+1.1V_IOHDUAL

+

+

EC41

EC41
C330u6.3

C330u6.3

+1.8V_IOHDUAL

+

+

EC42

EC42
C330u6.3

C330u6.3

MICRO-START INT'L CO.,LTD.

MICRO-START INT'L CO.,LTD.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet

Date: Sheet of

5

4

3

2

Date: Sheet of

MICRO-START INT'L CO.,LTD.

IOH Power

IOH Power

IOH Power

MS-91C2 0A

MS-91C2 0A

MS-91C2 0A

1

of

11 77Thursday, August 28, 2008

11 77Thursday, August 28, 2008

11 77Thursday, August 28, 2008

5

4

3

2

1

12

+2.5VDUAL_LAN==>2.06A

+2.5VDUAL_REF

D D

U64

U64

R903 0RR903 0R

C872

C872
C1000p50X0402

C1000p50X0402

C C

R900

R900
X_13KR1%

X_13KR1%

1

1

2

2

3

3

LMV321AP5X_SC70

LMV321AP5X_SC70

5

4

+9VDUAL

5

4

+3.3VDUAL

5

Q106

Q106

4
3
2
1

NTMFS4841

NTMFS4841

C131

C131
C10u6.3X50805

C10u6.3X50805

+2.5VDUAL_LAN

+

+

EC8

EC8
C330u6.3

C330u6.3

+2.5V==>2.57A

R386 0RR386 0R

C293

C293
C1000p50X0402

C1000p50X0402

R385

R385
X_13KR1%

X_13KR1%

+2.5V+2.5V_REF +3.3V+12V

5

Q46

3

+

+

-

-

4 8

1

U22A

U22A
AZ358M-E1

AZ358M-E1

2

Q46

4
3
2
1

NTMFS4841

NTMFS4841

C287

C287
C10u6.3X50805

C10u6.3X50805

+

+

EC16

EC16
C330u6.3

C330u6.3

+9V DUAL

+12V +9VDUAL+5VSB

AC

R227

R227

8.2K

8.2K

C220

B B

C220
C0.01u25X0402

C0.01u25X0402

+5VSB

2
1

53

U12

U12
7S14_SOT23-5

7S14_SOT23-5

D14

D14
S-1N5817_DO214AC

S-1N5817_DO214AC

4

C836 C10u16X51206C836 C10u16X51206

D3 S-1N5817_DO214ACD3 S-1N5817_DO214AC

D2

D2
1N4148S

1N4148S

C161

C161
C22u6.3X50805

C22u6.3X50805

C163

C163
C0.01u25X0402

C0.01u25X0402

C164

C164
C0.1u16X0402

C0.1u16X0402

+1.5V_ICH==>2.57A

R1037 10KR1%R1037 10KR1%

C964

C964
C1000p50X0402

C1000p50X0402

R1036

R1036
15KR1%

15KR1%

5
6

+

+

-

-

4 8

7

U22B

U22B
AZ358M-E1

AZ358M-E1

Q115

Q115

4
3
2
1

NTMFS4841

NTMFS4841

+1.5V_ICH+2.5V_REF +2.5V+12V

5

+5VDUAL

C956

R907

C874

C874
C1u16X0805

C1u16X0805

A A

5

R907

+2.5VDUAL_REF

220R

220R

Y

U67

U67
LM431AIM3_NOPB_SOT23

LM431AIM3_NOPB_SOT23

Z X

C956
C1u16X0805

C1u16X0805

4

+5V

R1029

R1029

+2.5V_REF

220R

220R

Y

U73

U73
LM431AIM3_NOPB_SOT23

LM431AIM3_NOPB_SOT23

Z X

+

+

C933

C933
C10u6.3X50805

C10u6.3X50805

EC14

EC14
C330u2.5pSO

C330u2.5pSO

Changed Cap.!!!!!!!!

MICRO-START INT'L CO.,LTD.

MICRO-START INT'L CO.,LTD.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Date: Sheet of

3

Date: Sheet

2

MICRO-START INT'L CO.,LTD.

ICH_Power & +2.5V_DUAL

ICH_Power & +2.5V_DUAL

ICH_Power & +2.5V_DUAL

MS-91C2 0A

MS-91C2 0A

MS-91C2 0A

1

of

12 77Thursday, August 28, 2008

12 77Thursday, August 28, 2008

12 77Thursday, August 28, 2008

5

4

3

2

1

R1151

R1151

4.7KR1%0402

4.7KR1%0402

R1144

R1144
1KR1%0402

1KR1%0402

1 2

13

+5V

12V3_IN

Z

D8

C443

C443
10u_1206_B

10u_1206_B

D D

+3.3V@20A

EC64

EC64
C330u6.3

C330u6.3

CHOKE3 1u_40ACHOKE3 1u_40A

+

+

12

12

EC18

EC18

CD470u6.3SO

CD470u6.3SO

+3.3V_+5V_EN<60>

+

+

EC17

EC17
C330u6.3

C330u6.3

+3.3V

+

+

12

EC65

EC65

C403

C403

C330u6.3

C330u6.3

10u_1206_B

R477

R477

2.74KST_0402_B

2.74KST_0402_B

R484

R484

1KR1%0402

1KR1%0402

C C

1 2

10u_1206_B

C399

C399

C0.01u16X0402

C0.01u16X0402

+

+

12

C1100

C1100
10u_1206_B

10u_1206_B

C416

C416
10u_1206_B

10u_1206_B

12

R1140

R1140

2.2R1%0805

2.2R1%0805

C1165

C1165

C1000p50X

C1000p50X

C1177

C1177
X_C1u16X

X_C1u16X

EC23

EC23

CD270u16SO

CD270u16SO

C378

C378
C0.1u25X

C0.1u25X

R1141 200RST_0402R1141 200RST_0402

5

Q130NTMFS4841 Q130NTMFS4841

5

Q131NTMFS4841 Q131NTMFS4841

C1178

C1178

X_C100p50N0402

X_C100p50N0402

+

+

D8

BAT54A_B

BAT54A_B

4
3

C406 C0.01u16X0402C406 C0.01u16X0402

2
1

R1135 0R0805R1135 0R0805

4

R1129 0R0805R1129 0R0805

3
2
1

R1152 1.8KR1%0402R1152 1.8KR1%0402

X

VR_VSEN1

+3.3V_OK

R487

R487

64.9KR1%0402

64.9KR1%0402

Y

6

12

5
4

2
3
9

10

8

15

7

11

VRM1

VRM1

BOOT1
SOFT1

UGATE1
PHASE1

LGATE1
PGND1
GND

VSEN1
EN1

PG1
ISEN1
OCSET1

DC_ISL6539

DC_ISL6539

PWR team modify

PGND1, PGND2 need to connect to output CAP GND.

+5VSB +5VDUAL

Q129

R1174

R485

R485

4.7KR

4.7KR

S0 S3 S5
0 1 1

S3_ON<7,8,44>

DS

G

R443 1K_0402R443 1K_0402

S0 S3 S5
1 1 0

Q61

Q61
N-2N7002

N-2N7002

B B

A A

PWRGD_PS

S0 S3 S5
1 0 0

R1174

S0 S3 S5

4.7KR

4.7KR

1 0 1

DS

+12V

Q54

Q54
N-2N7002

N-2N7002

G

G

DS

Q53

Q53
N-2N7002

N-2N7002

G

+5VSB +3.3VSB

S0 S3 S5

R4832KR483

1 0 0

2K

DS

Q58

Q58
N-2N7002

N-2N7002

5VSB to 3VSB

3

C1212

C1212
C1u16X5

C1u16X5

LM1085IS-3.3_NOPB_TO263-RH

LM1085IS-3.3_NOPB_TO263-RH

1
2
3

G

R474

R474
10K

10K

VIN

GND

1

Q129

P-SI4435DY-T1-E3_SOIC8-RH

P-SI4435DY-T1-E3_SOIC8-RH

S
S
S
G4D

DS

+5V

U34

U34

VOUT
VOUT

8

D

7

D

6

D

5

Q59

Q59
IPD06N03LA_TO252

IPD06N03LA_TO252

2
4

C1211

C1211
C1u16X5

C1u16X5

+

+

EC46

EC46
C330u6.3

C330u6.3

+

+

EC56

EC56
C330u6.3

C330u6.3

C1175

C1175
C1u16X

C1u16X

PWRGD_PS<70>

+5V_OK

+3.3V_OK

G

+5VSB +12V +3.3VSB +3.3VDUAL+3.3VSB +5VSB

DS

+5V

+3.3V

R499

R499

4.7KR

4.7KR

Q65

Q65
N-2N7002

N-2N7002

R495

R495

4.7KR

4.7KR

R486 10KR1%R486 10KR1%

R473

R473

4.7KR

4.7KR

R475 10KR1%R475 10KR1%

35uA

+5VDUAL+5VDUAL

28

VIN

VCC

GND1DDR

13

BOOT2

SOFT2

UGATE2
PHASE2

LGATE2

PGND2

GND

VSEN2

PG2/REF

ISEN2

OCSET2

1.8mA

C363

C363

4.7u_0805

4.7u_0805

EN2

23
17

24
25

27
26
20

VR_VSEN2

19

+3.3V_+5V_EN

21

+5V_OK

16
22

R1143 1.3KR0.1%0402R1143 1.3KR0.1%0402

18

C1124

C1124
C0.1u25X

C0.1u25X

C1182 C0.01u16X0402C1182 C0.01u16X0402

R1138 0R0805R1138 0R0805

R1126 0R0805R1126 0R0805

N-AO4456_SOIC8-RH

N-AO4456_SOIC8-RH

R1145

R1145
56KST_0402

56KST_0402

12V3_IN

876

4

2

351

876

Q123

Q123

4

2

351

R1142 200RST_0402R1142 200RST_0402

C1161

C1161
X_C100p50N0402

X_C100p50N0402

Q127

Q127
N-AO4468_SOIC8

N-AO4468_SOIC8

C1190

C1190
C1u16X50805

C1u16X50805

CHOKE1

CHOKE1
CH-1u22A10mS

CH-1u22A10mS

R458

R458

2.2R1%0805

2.2R1%0805

C359

C359

C1000p50X

C1000p50X

C1225

C1225
10u_1206_B

10u_1206_B

+

+

12

EC48

EC48
C330u6.3

C330u6.3

C1174

C1174
C0.01u16X0402

C0.01u16X0402

+

+

12

EC52

EC52
C330u6.3

C330u6.3

C1214

C1214
10u_1206_B

10u_1206_B

+

+

12

EC55

EC55
C330u6.3

C330u6.3

+12V

14

Vout = 0.9*(R1+R2)/R2

+3.3V

C0.1u16X0402C1363 C0.1u16X0402C1363

Q70

R491

R491
10K

10K

1
2
3

U31

U31

GND

GND

NC7S08

NC7S08

Q70

1

S

2

S

3

S
G4D

SI4463BDY-T1-E3

SI4463BDY-T1-E3

DS

G

+3.3V

VCC

VCC

5
4

8

D

7

D

6

D

5

Q132

Q132
IPD06N03LA_TO252

IPD06N03LA_TO252

+5VSB

PWRGD_PS_O <70>

+

+

EC57

EC57
C330u6.3

C330u6.3

C1294

C1294
C1u16X

C1u16X

R4902KR490
2K

DS

Q64

Q64
N-2N7002

N-2N7002

G

C385

C385
C1u16X

C1u16X

C384

C384
C1u16X

C1u16X

C0.1u16X0402C1362 C0.1u16X0402C1362
C0.1u16X0402C527 C0.1u16X0402C527
C0.1u16X0402C528 C0.1u16X0402C528

+5V

C0.1u16X0402C116 C0.1u16X0402C116
C0.1u16X0402C1094 C0.1u16X0402C1094
C0.1u16X0402C1096 C0.1u16X0402C1096
C0.1u16X0402C114 C0.1u16X0402C114
C0.1u16X0402C115 C0.1u16X0402C115
C0.1u16X0402C117 C0.1u16X0402C117
C0.1u16X0402C94 C0.1u16X0402C94
C0.1u16X0402C1095 C0.1u16X0402C1095

+12V 12V3_IN

CHOKE4

CHOKE4

1 2

CH-1u22A10mS

CH-1u22A10mS

MICRO-START INT'L CO.,LTD.

MICRO-START INT'L CO.,LTD.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet

Date: Sheet

5

4

3

2

Date: Sheet

MICRO-START INT'L CO.,LTD.

+3.3V & +5V

+3.3V & +5V

+3.3V & +5V

MS-91C2 0A

MS-91C2 0A

MS-91C2 0A

1

of

13 77Monday, September 01, 2008

of

13 77Monday, September 01, 2008

of

13 77Monday, September 01, 2008

5

4

3

2

1

+3.3VDUAL +3.3VDUAL

U81

U81

LCMX0640

D D

PWRGD_PLD_CPU1_DDR_VTT_EN<9>
PWRGD_PLD_CPU1_SFR_EN<10>

RST_CPU_RESET_PLD_N<38>

+3.3VDUAL

R1246 4.7KRR1246 4.7KR

C C

PWRGD_PLD_CPU0_DDR_VTT_EN<9>
PWRGD_PLD_CPU0_SFR_EN<10>

PWRGD_IOH_P1V1<11>

+3.3VDUAL

+3.3VDUAL

PWRGD_PLD_CPU1_DDR3_EN_R<8>
CSI_CPU1_SKTOCC<68,69>

B B

A A

PWRGD_PLD_CPU0_VTT_EN_R<5>
SLP_S4#<44>
PWRGD_PLD_CPU1_VTT_EN_R<6>
PWRGD_PS_BUF_GATED<5,6,70>
CSI_CPU0_SKTOCC<68,69>

+3.3VDUAL

PWRGD_PLD_IOH_P1V1_EN_R<11>
PWRGD_PLD_CPU0_DDR3_EN_R<7>

+3.3VDUAL

5

PWRGD_CPU0_VTT<5,7,9,11,15,19>
PWRGD_CPU0_DDR3<7,9,10>

R1256 4.7KRR1256 4.7KR

R537 4.7KRR537 4.7KR

JTAG_PLD_TDI
JTAG_PLD_TDO
JTAG_PLD_TMS
JTAG_PLD_TCK

R1290 4.7KRR1290 4.7KR

R1287 4.7KRR1287 4.7KR
R1292 4.7KRR1292 4.7KR

R1289 4.7KRR1289 4.7KR
R1291 4.7KRR1291 4.7KR
R1288 4.7KRR1288 4.7KR

R1300 4.7KRR1300 4.7KR

FM_SLEEP_PLD_N

35
90
88

100

99
98
97
96
95
94
91
89
87
86
85
83
82
81
80
79
78
77
76
73
72
71
70
69
68
67
66
65
64
63
61
59
58
57
56
55
54
53
52
51

48
33
31
26
28

40
84

4

VCC
VCC
VCCAUX

PT2A
PT2C
PT2B
PT2E
PT2F
PT3A
PT3B
PT3F
PT4F
PT5A
PT5B
PT6B
PT7A
PT7E
GNDIO0
VCCIO0
PT9A
PT9C
PT9E
PT9F
PR2B
PR2D
PR3B
PR3D
PR4B
PR4D
PR5B
PR5D
PR6B
PR6C
PR7B
PR9B
PR9D
PR10A
PR10B
PR10C
PR10D
PR11A
PR11C
PR11B
PR11D

SLEEPN
TDI
TDO
TMS
TCK

GND
GND

LCMX0640

VCCIO1
VCCIO1
VCCIO0
VCCIO3
VCCIO3
VCCIO2

PL2A
PL2C
PL2B
PL2D
PL3A
PL3B
PL3C
PL3D
PL4A
PL4C
PL4D
PL5B
PL7B
PL8C
PL8D
PL9A

PL9C
PL10A
PL10C
PL11A
PL11C

PB2C
VCCIO2
GNDIO2

PB4C

PB4E

PB5B

PB5D

PB6B

PB6C

PB8B

PB8C

PB8D

PB9A

PB9C

PB9D

PB9F

GNDIO1
GNDIO1
GNDIO0
GNDIO3
GNDIO3
GNDIO2

LCMX0640

LCMX0640

60
74
92
10
24
41

1
2
3
4
5
6
7
8
9
11
13
14
15
16
17
18
19
20
21
22
23
27
29
30
32
34
36
37
38
39
43
44
45
46
47
49
50

62
75
93
12
25
42

FM_SLEEP_PLD_N
PD_FPGA_TSALL

R539 4.7KRR539 4.7KR
R540 4.7KRR540 4.7KR
R541 4.7KRR541 4.7KR

R1234 22RR1234 22R

R1264 4.7KRR1264 4.7KR

3

PWRGD_CPU1_DDR3 <8,9,10>
PWRGD_CPU1_VTT <6,8,9,11,23>
SLP_S3# <44,60,69>
RST_IOH_CORERST_DELAYED_N <38,68,70>

+3.3VDUAL

R536

R536
X_10K

X_10K

R1286 10K_0402R1286 10K_0402

+3.3VDUAL

PWRGD_PLD_CPU0_EN <3>

PWRGD_PLD_CPU1_EN <4>
CLK_25M_CPLD <16>

PWRGD_CPU1_SFR <10>
PWRGD_CPU0_SFR <10>
PWRGD_CPU0_VCCP <3,70>
PWRGD_CPU1_VCCP <4,70>

+3.3VDUAL

R538

R538
10K

10K

R1232 33RR1232 33R

C1269

C1269
X_C10p50N0402

X_C10p50N0402

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Date: Sheet of

Date: Sheet

2

R1301 10K_0402R1301 10K_0402
R1248 10K_0402R1248 10K_0402
R1225 10K_0402R1225 10K_0402

+3.3VDUAL

C1317 C0.01u25X0402C1317 C0.01u25X0402
C1309 C0.01u25X0402C1309 C0.01u25X0402
C1344 0.1u_0402C1344 0.1u_0402
C1331 0.1u_0402C1331 0.1u_0402
C1389 0.1u_0402C1389 0.1u_0402
C1308 0.1u_0402C1308 0.1u_0402
C472 0.1u_0402C472 0.1u_0402
C549 0.1u_0402C549 0.1u_0402
C460 0.1u_0402C460 0.1u_0402
C639 0.1u_0402C639 0.1u_0402
C637 0.1u_0402C637 0.1u_0402
C459 C10u6.3X5C459 C10u6.3X5
C1281 C10u6.3X5C1281 C10u6.3X5

PWRGD_PLD_CPU0_DDR3_EN_R
PWRGD_PLD_CPU1_DDR3_EN_R
PWRGD_PLD_CPU0_DDR_VTT_EN
PWRGD_PLD_CPU1_DDR_VTT_EN

CLK_33K_SUSCLK <44>

+3.3VDUAL

J7

JTAG_PLD_TDI
JTAG_PLD_TDO
JTAG_PLD_TMS
JTAG_PLD_TCK

R1222

R1222

4.7KR

4.7KR

MICRO-START INT'L CO.,LTD.

MICRO-START INT'L CO.,LTD.

MICRO-START INT'L CO.,LTD.

CPLD

CPLD

CPLD

MS-91C2 0A

MS-91C2 0A

MS-91C2 0A

1
2
3
4
5
6

H1X6J7H1X6

of

14 77Thursday, August 28, 2008

14 77Thursday, August 28, 2008

14 77Thursday, August 28, 2008

1

14

5

4

3

2

1

15

+3.3V

FB8

FB8
600Ohm_0805_B

D D

C C

B B

600Ohm_0805_B

R850

R850

R880

R880

1R_B

1R_B

1R_B

1R_B

C744

C744

0.1u_0402_B

0.1u_0402_B

C848

C848
10u_0805_B

10u_0805_B

CLK_100M_DB800_DP<16>
CLK_100M_DB800_DN<16>

CLK_100M_ICH_SATA_DP<43>
CLK_100M_ICH_SATA_DN<43>

CLK_100M_ICH_ESI_DP<43>
CLK_100M_ICH_ESI_DN<43>

+3.3V

C789

C789
10u_0805_B

10u_0805_B

C746

C746
10u_0805_B

10u_0805_B

C832

C832

0.1u_0402_B

0.1u_0402_B

R218 33R1%0402R218 33R1%0402
R219 33R1%0402R219 33R1%0402

R216 33R1%0402R216 33R1%0402
R217 33R1%0402R217 33R1%0402

R214 33R1%0402R214 33R1%0402
R215 33R1%0402R215 33R1%0402

SMBUS_NORMAL_CLK<16,65,68>

R834 2.7K_0402R834 2.7K_0402
R160 X_2.7K_0402R160 X_2.7K_0402
R163 X_2.7K_0402R163 X_2.7K_0402

R161 X_1KST_0402R161 X_1KST_0402
R138 1KST_0402R138 1KST_0402
R162 1KST_0402R162 1KST_0402

SMBUS_NORMAL_DATA<16,65,68>

FS_BFS_C FS_A

0

0

1

0

1

1

1

0

1

C807

C807

0.1u_0402_B

0.1u_0402_B

CPU_MHZ

133.33

166.67

100.00

C826

C826

0.1u_0402_B

0.1u_0402_B

CLK_100M_DB800_R_DP
CLK_100M_DB800_R_DN

CLK_100M_ICH_SATA_R_DP
CLK_100M_ICH_SATA_R_DN

CLK_100M_ICH_ESI_R_DP
CLK_100M_ICH_ESI_R_DN CLK_33M_SIO_R

R234 49.9R1%0402R234 49.9R1%0402
R235 49.9R1%0402R235 49.9R1%0402

R232 49.9R1%0402R232 49.9R1%0402
R231 49.9R1%0402R231 49.9R1%0402

R230 49.9R1%0402R230 49.9R1%0402
R233 49.9R1%0402R233 49.9R1%0402

DEFAULT=133MHZ

A A

CK_FS_A
CK_FS_B
CK_FS_C

+3.3V_CK410B

R869

R869

2.2R_B

2.2R_B

C757

C771

C771
10u_0805_B

10u_0805_B

U10

U10

35

VDDA

38

VDDCPU<2>

47

VDDCPU<1>

44

VDDCPU<0>

28

VDDSRC<2>

25

VDDSRC<1>

15

VDDSRC<0>

8

VDDPCI<1>

1

VDDPCI<0>

53

VDDREF

12

VDD48

26

SRCCLKT4

27

SRCCLKC4

24

SRCCLKT3

23

SRCCLKC3

21

SRCCLKT2

22

SRCCLKC2

19

SRCCLKT1

18

SRCCLKC1

16

SRCCLKT0

17

SRCCLKC0

29

SCLK

30

SDATA

48

FS_A

49

FS_B_TEST_MODE

56

FS_C_TEST_SEL

34

GNDA

41

GNDCPU

20

GNDSRC

7

GNDPCI<1>

2

GNDPCI<0>

50

GNDREF

14

GND48

C757

0.1u_0402_B

0.1u_0402_B

ICS932

ICS932

VTT_PWRGD_N_PD

SMBUS ADDRESS - 0XD2

CLK_100M_ICH_ESI_DP
CLK_100M_ICH_ESI_DN

CLK_100M_ICH_SATA_DP
CLK_100M_ICH_SATA_DN

CLK_100M_DB800_DP
CLK_100M_DB800_DN

REF1
REF0

CPUCLKT3
CPUCLKC3

CPUCLKT2
CPUCLKC2

CPUCLKT1
CPUCLKC1

CPUCLKT0

CPUCLKC0
PCICLK_F<2>
PCICLK_F<1>
PCICLK_F<0>

PCICLK<3>
PCICLK<2>
PCICLK<1>
PCICLK<0>

48MHZ

IREF

CK410B+

CK410B+

+3.3V_CK410B+3.3V

FB7 600Ohm_0805_BFB7 600Ohm_0805_B

C158 33p_0402C158 33p_0402

Y1

Y1

14.31818MHz

14.31818MHz

52

X1

51

X2

54

CLK_14M_ICH_R

55

CLK_133M_IOH_CSI0_R_DP

37

CLK_133M_IOH_CSI0_R_DN

36

CLK_133M_IOH_CSI1_R_DP

40

CLK_133M_IOH_CSI1_R_DN

39

CLK_133M_CPU0_R_DP

43

CLK_133M_CPU0_R_DN

42

CLK_133M_CPU1_R_DP

46

CLK_133M_CPU1_R_DN

45
11
10

CLK_33M_LPC_R

9

CLK_33M_DEBUG_R

6
5

CLK_33M_BMC_R

4

CLK_33M_ICH_R

3

CLK_48M_USB_R

13

PWRGD_CLK_N

31

33

32

NC

C170 33p_0402C170 33p_0402

R169

R169
475RST_0402

475RST_0402

R164 33R1%0402R164 33R1%0402

R145 33R1%0402R145 33R1%0402
R146 33R1%0402R146 33R1%0402

R143 33R1%0402R143 33R1%0402
R144 33R1%0402R144 33R1%0402

R141 33R1%0402R141 33R1%0402
R142 33R1%0402R142 33R1%0402

R139 33R1%0402R139 33R1%0402
R140 33R1%0402R140 33R1%0402

R212 33R1%0402R212 33R1%0402
R213 33R1%0402R213 33R1%0402
R222 33R1%0402R222 33R1%0402
R221 33R1%0402R221 33R1%0402
R220 33R1%0402R220 33R1%0402

R882 33R1%0402R882 33R1%0402
R170 4.7K_0402R170 4.7K_0402

DS

PWRGD_CPU0_VTT

G

Q15

Q15

N-2N7002

N-2N7002

C787

C787
10u_0805_B

10u_0805_B

CLK_14M_ICH <44>

CLK_133M_IOH_CSI0_DP <37>
CLK_133M_IOH_CSI0_DN <37>

CLK_133M_IOH_CSI1_DP <37>
CLK_133M_IOH_CSI1_DN <37>

CLK_133M_CPU0_DP <19>
CLK_133M_CPU0_DN <19>

CLK_133M_CPU1_DP <23>
CLK_133M_CPU1_DN <23>

CLK_33M_LPC <48>
CLK_33M_DEBUG <69>
CLK_33M_SIO <58>
CLK_33M_BMC <48>
CLK_33M_ICH <44>

CLK_48M_USB <43>

+3.3V

PWRGD_CLK_N <16>

PWRGD_CPU0_VTT <5,7,9,11,14,19>

C747

C747

0.1u_0402_B

0.1u_0402_B

C749

C748

C748

0.1u_0402_B

0.1u_0402_B

C749

0.1u_0402_B

0.1u_0402_B

CLK_133M_IOH_CSI0_DP
CLK_133M_IOH_CSI0_DN

CLK_133M_IOH_CSI1_DP
CLK_133M_IOH_CSI1_DN

CLK_133M_CPU0_DP
CLK_133M_CPU0_DN

CLK_133M_CPU1_DP
CLK_133M_CPU1_DN

CLK_14M_ICH
CLK_33M_LPC
CLK_33M_DEBUG
CLK_33M_SIO
CLK_33M_BMC
CLK_33M_ICH
CLK_48M_USB

C790

C790

0.1u_0402_B

0.1u_0402_B

R121 49.9R1%0402R121 49.9R1%0402
R122 49.9R1%0402R122 49.9R1%0402

R123 49.9R1%0402R123 49.9R1%0402
R124 49.9R1%0402R124 49.9R1%0402

R119 49.9R1%0402R119 49.9R1%0402
R120 49.9R1%0402R120 49.9R1%0402

R117 49.9R1%0402R117 49.9R1%0402
R118 49.9R1%0402R118 49.9R1%0402

C122 X_10p_0402C122 X_10p_0402
C217 X_10p_0402C217 X_10p_0402
C218 X_10p_0402C218 X_10p_0402
C216 X_10p_0402C216 X_10p_0402
C215 X_10p_0402C215 X_10p_0402
C214 X_10p_0402C214 X_10p_0402
C112 X_10p_0402C112 X_10p_0402

C791

C791

0.1u_0402_B

0.1u_0402_B

C804

C804

0.1u_0402_B

0.1u_0402_B

MICRO-START INT'L CO.,LTD.

MICRO-START INT'L CO.,LTD.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Date: Sheet of

5

4

3

2

Date: Sheet

MICRO-START INT'L CO.,LTD.

Clock generator_CK410B+

Clock generator_CK410B+

Clock generator_CK410B+

MS-91C2 0A

MS-91C2 0A

MS-91C2 0A

1

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15 77Thursday, August 28, 2008

15 77Thursday, August 28, 2008

15 77Thursday, August 28, 2008

5

4

3

2

1

16

+3.3V_DB800 +3.3V_DB800 +3.3V_DB800_A

U26

U26

R1073

R1073

R1100

R1100

R454

2.7K

D D

C C

2.7K

R401

R401

X_1KST

X_1KST

R454

2.7K

2.7K

1KST

1KST

PU_DB800_PLL_MODE

PU_DB800_LOWBW

R455

R455
X_1KST

X_1KST

+3.3V

BYPASS MODE : input clock is passed directly to
the output stage resulting in 50ps additive
jitter.

(50ps + input jitter)

pll mode : input clock is passed through apll
to reduce high frequency jitter.

+3.3V +3.3VSB_MNG_RMII+3.3VSB_MNG+3.3VSB_MNG_IOH

CLK_100M_DB800_DP<15>
CLK_100M_DB800_DN<15>

SMBUS_NORMAL_CLK<15,65,68>
SMBUS_NORMAL_DATA<15,65,68>

R400 1KR1%R400 1KR1%

PWRGD_CLK_N<15>

+3.3V_DB800

PU_DB800_OE_INV

R398

R398
475RST_0402

475RST_0402

R399

R399
1KST

1KST

OE_[7:0]

PWRDWN

SRC_STOP

DB803

DB803

4

SRC_IN_P

5

SRC_IN_N

1

SRC_DIV_N

22

BYPASS_N_PLL

23

SCLK

24

SDATA

26

PWRDWN_N

27

DIF_STOP_N

28

HIGH_BW_N

44

OE_7

36

OE_6

35

OE_5

43

OE_4

7

OE_3

15

OE_2

14

OE_1

6

OE_0

40

OE_INV

46

IREF

48

VDD_A

39

VDD4

31

VDD3

19

VDD2

11

VDD1

2

VDD0

DIF_7_P
DIF_7_N
DIF_6_P
DIF_6_N
DIF_5_P
DIF_5_N
DIF_4_P
DIF_4_N
DIF_3_P
DIF_3_N
DIF_2_P
DIF_2_N
DIF_1_P
DIF_1_N
DIF_0_P
DIF_0_N

LOCK

GND_A

GND4
GND3
GND2
GND1
GND0

ICS9D803

ICS9D803

SMBUS ADDRESS = 0XDC

OE_INV=0 OE_INV=1

ACTIVE
HIGH
ACTIVE
LOW
ACTIVE
LOW

ACTIVE
LOW
ACTIVE
HIGH
ACTIVE
HIGH

42
41
38
37
34
33

CLK_100M_82576_R_DP

30

CLK_100M_82576_R_DN

29

CLK_100M_IB_R_DP

20

CLK_100M_IB_R_DN

21

CLK_100M_SLOT_R_DP

16

CLK_100M_SLOT_R_DN

17

CLK_100M_IOH_PCIE1_R_DP

12

CLK_100M_IOH_PCIE1_R_DN

13

CLK_100M_IOH_PCIE0_R_DP

8

CLK_100M_IOH_PCIE0_R_DN

9

45

47
32

25
18
10
3

R394 33R1%0402R394 33R1%0402
R395 33R1%0402R395 33R1%0402
R451 33R1%0402R451 33R1%0402
R452 33R1%0402R452 33R1%0402
R449 33R1%0402R449 33R1%0402
R450 33R1%0402R450 33R1%0402
R447 33R1%0402R447 33R1%0402
R448 33R1%0402R448 33R1%0402
R445 33R1%0402R445 33R1%0402
R446 33R1%0402R446 33R1%0402

CLK_100M_82576_DP
CLK_100M_82576_DN

CLK_100M_IB_DP
CLK_100M_IB_DN

CLK_100M_SLOT_DP
CLK_100M_SLOT_DN

CLK_100M_IOH_PCIE1_DP
CLK_100M_IOH_PCIE1_DN

CLK_100M_IOH_PCIE0_DP
CLK_100M_IOH_PCIE0_DN

CLK_100M_82576_DP <46>
CLK_100M_82576_DN <46>
CLK_100M_IB_DP <54>
CLK_100M_IB_DN <54>
CLK_100M_SLOT_DP <61>
CLK_100M_SLOT_DN <61>
CLK_100M_IOH_PCIE1_DP <39>
CLK_100M_IOH_PCIE1_DN <39>
CLK_100M_IOH_PCIE0_DP <39>
CLK_100M_IOH_PCIE0_DN <39>

R393 49.9R1%0402R393 49.9R1%0402
R396 49.9R1%0402R396 49.9R1%0402

R463 49.9R1%0402R463 49.9R1%0402
R464 49.9R1%0402R464 49.9R1%0402

R1111 49.9R1%0402R1111 49.9R1%0402
R1110 49.9R1%0402R1110 49.9R1%0402

R1113 49.9R1%0402R1113 49.9R1%0402
R1112 49.9R1%0402R1112 49.9R1%0402

R1115 49.9R1%0402R1115 49.9R1%0402
R1114 49.9R1%0402R1114 49.9R1%0402

+3.3V

FB14 600Ohm_0805_BFB14 600Ohm_0805_B

C1006

C1006

C1009

C1009

10u_0805_B

10u_0805_B

0.1u_0402_B

0.1u_0402_B

10UF CAP AND 0.1UF CAPS SHOULD BE SEPARATED BY
250MILS PLACE 10UF CLOSE TO FERRITE BEAD PLACE
ALL 0.1UF NEAR CHIP PIN CURRENT SHOULD FLOW
THROUGH 10UF CAP PAD

+3.3V_DB800 +3.3V_DB800_A

R404

R404

2.2RST

2.2RST

C289

C289

C300

C300

10u_0805

10u_0805

0.1u_0402

0.1u_0402

10UF CAP AND 0.1UF CAPS SHOULD BE
SEPARATED BY 250MILS PLACE 10UF CLOSE
TORESISTOR PLACE 0.1UF NEAR CHIP PIN

+3.3VDUAL +3.3VSB_MNG

FB4 600Ohm_0805FB4 600Ohm_0805

C307

C307
C1u16X

C1u16X

C1010

C1010

0.1u_0402_B

0.1u_0402_B

C306

C306
10u_1206

10u_1206

C1008

C1008

0.1u_0402_B

0.1u_0402_B

C997

C997
C0.1u16X0402

C0.1u16X0402

C998

C998
C0.1u16X0402

C0.1u16X0402

C1036

C1036

0.1u_0402_B

0.1u_0402_B

C999

C999
C0.1u16X0402

C0.1u16X0402

+3.3V_DB800

C1035

C1035

0.1u_0402_B

0.1u_0402_B

U75

R4350RR435
0R

B B

A A

+3.3VSB_MNG

R1059

R1059

4.7KR0402

4.7KR0402

C996

C996
C0.1u16X0402

C0.1u16X0402

FB5 X_600Ohm_0805FB5 X_600Ohm_0805

+3.3VDUAL

R1093

R1093
1KR1%0402

1KR1%0402

C1024

C1024
C0.1u16X0402

C0.1u16X0402

SMBUS_DUAL_MNG_CLK
SMBUS_DUAL_MNG_DATA

5

C320

C320
C0.01u16X0402

C0.01u16X0402

Y4

25MHzY425MHz

C1011

C1011
27p_0402

27p_0402

C325

C325

SMBUS_DUAL_MNG_CLK

C1u16X

C1u16X

SMBUS_DUAL_MNG_DATA

R436 0RR436 0R

C1007

C1007
27p_0402

27p_0402

+3.3VDUAL

R1082

R1082
X_1K_0402

X_1K_0402

R1076

R1076
X_1K_0402

X_1K_0402

R1072 0RR1072 0R
R1087 0RR1087 0R

U75

34

VDD_50<1>

26

VDD_50<0>

2

VDD_96

9

VDD_133

23

VDD_33

15

VDD_REF

12

VDD_32K

38

SCL

39

SDA

30

OE_50B

31

OE_50A

5

OE_96

6

OE_133

19

XTAL_IN

20

XTAL_OUT

40

VTT_PWRGD_PWRDWN_N

22

33P33MHZ_SMBADR

R1056

R1056
1KR1%0402

1KR1%0402

4

32P768KHZ

25MHZ<1>
25MHZ<0>

50MHZ<7>
50MHZ<6>
50MHZ<5>
50MHZ<4>
50MHZ<3>
50MHZ<2>
50MHZ<1>
50MHZ<0>

DOT_96_P

DOT_96_N

CPU_133_P
CPU_133_N

IREF

GND_50<1>
GND_50<0>

GND_133

GND<2>
GND<1>
GND<0>

VSSREF

GND_32K

ICS9FGP202AKLF_MLF40

ICS9FGP202AKLF_MLF40

SMBUS_DUAL_CLK <38,58,61,65>
SMBUS_DUAL_DATA <38,58,61,65>

13
17

CLK_25M_R_CPLD

16
24

25

CLK_50M_R_82576

28

CLK_50M_R_BMCRMII1

29

CLK_50M_R_BMCRMII2

32
33
36
37

3
4

CLK_133M_IOH_ME_R_DP

7

CLK_133M_IOH_ME_R_DN

8
11
35

27
10
41
21
1

18
14

R1090

R1090
475_1%_0402

475_1%_0402

Ball Pin

IOH N27

R1084 33R1%0402R1084 33R1%0402

R1058 22R1%0402R1058 22R1%0402
R1057 22R1%0402R1057 22R1%0402
R1064 22R1%0402R1064 22R1%0402

R1098 33R1%0402R1098 33R1%0402
R1099 33R1%0402R1099 33R1%0402

Pin name

ME_CLK_SRC

3

+3.3VSB_MNG

C1037

C1037
C1u16X

C1u16X

CI16 C10p50N0402CI16 C10p50N0402
CI3 C10p50N0402CI3 C10p50N0402
CI4 C10p50N0402CI4 C10p50N0402
CI14 C10p50N0402CI14 C10p50N0402

CI15 C10p50N0402CI15 C10p50N0402

R405

R405

2.2R

2.2R

C995

C995
C0.01u16X0402

C0.01u16X0402

CLK_25M_CPLD <14>

CLK_50M_82576 <46>
CLK_50M_BMCRMII1 <49>
CLK_50M_BMCRMII2 <49>

R1108

R1108

R1107

R1107

49.9R1%0402

49.9R1%0402

49.9R1%0402

49.9R1%0402

CLK_133M_IOH_ME_DP <38>
CLK_133M_IOH_ME_DN <38>

+3.3VSB_MNG

R1101

R1101

2.2R

2.2R

C1038

C1038
C0.01u16X0402

C0.01u16X0402

CLK_25M_CPLD
CLK_50M_82576
CLK_50M_BMCRMII1
CLK_50M_BMCRMII2

SMBUS_DUAL_MNG_CLK

+3.3VSB_MNG_IOH

EMI

Definition

Used for ME default clock source:"1": PLL - clock from external source (default)
"0" Ring Oscillator (back-up) - clock from internal source.

MICRO-START INT'L CO.,LTD.

MICRO-START INT'L CO.,LTD.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet

Date: Sheet

2

Date: Sheet

MICRO-START INT'L CO.,LTD.

Clock buffer_DB803 & MNG

Clock buffer_DB803 & MNG

Clock buffer_DB803 & MNG

MS-91C2 0A

MS-91C2 0A

MS-91C2 0A

+3.3VSB_MNG_RMII

C994

C994
C1u16X

C1u16X

1

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16 77Thursday, August 28, 2008

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16 77Thursday, August 28, 2008

of

16 77Thursday, August 28, 2008

5

CPU0A

CPU0A

CSI_CPU0_CPU1_CLK_DP<21>
CSI_CPU0_CPU1_CLK_DN<21>
CSI_CPU1_CPU0_CLK_DN<21>
CSI_CPU1_CPU0_CLK_DP<21>
CSI_CPU0_CMP0<19>

CSI_CPU0_CPU1_DP[0:19]<21>

D D

CSI_CPU0_CPU1_DN[0:19]<21>

C C

CSI_CPU1_CPU0_DN[0:19]<21>

極性對調
&順序對調

CSI_CPU1_CPU0_DP[0:19]<21>

B B

極性對調
&順序對調

A A

SMBUS_ICH_CLK<21,44,65>
SMBUS_ICH_DATA<21,44,65>

CSI_CPU0_CPU1_DP0
CSI_CPU0_CPU1_DP1
CSI_CPU0_CPU1_DP2
CSI_CPU0_CPU1_DP3
CSI_CPU0_CPU1_DP4
CSI_CPU0_CPU1_DP5
CSI_CPU0_CPU1_DP6
CSI_CPU0_CPU1_DP7
CSI_CPU0_CPU1_DP8
CSI_CPU0_CPU1_DP9
CSI_CPU0_CPU1_DP10
CSI_CPU0_CPU1_DP11
CSI_CPU0_CPU1_DP12
CSI_CPU0_CPU1_DP13
CSI_CPU0_CPU1_DP14
CSI_CPU0_CPU1_DP15
CSI_CPU0_CPU1_DP16
CSI_CPU0_CPU1_DP17
CSI_CPU0_CPU1_DP18
CSI_CPU0_CPU1_DP19

CSI_CPU0_CPU1_DN0
CSI_CPU0_CPU1_DN1
CSI_CPU0_CPU1_DN2
CSI_CPU0_CPU1_DN3
CSI_CPU0_CPU1_DN4
CSI_CPU0_CPU1_DN5
CSI_CPU0_CPU1_DN6
CSI_CPU0_CPU1_DN7
CSI_CPU0_CPU1_DN8
CSI_CPU0_CPU1_DN9
CSI_CPU0_CPU1_DN10
CSI_CPU0_CPU1_DN11
CSI_CPU0_CPU1_DN12
CSI_CPU0_CPU1_DN13
CSI_CPU0_CPU1_DN14
CSI_CPU0_CPU1_DN15
CSI_CPU0_CPU1_DN16
CSI_CPU0_CPU1_DN17
CSI_CPU0_CPU1_DN18
CSI_CPU0_CPU1_DN19

CSI_CPU1_CPU0_DN0
CSI_CPU1_CPU0_DN1
CSI_CPU1_CPU0_DN2
CSI_CPU1_CPU0_DN3
CSI_CPU1_CPU0_DN4
CSI_CPU1_CPU0_DN5
CSI_CPU1_CPU0_DN6
CSI_CPU1_CPU0_DN7
CSI_CPU1_CPU0_DN8
CSI_CPU1_CPU0_DN9
CSI_CPU1_CPU0_DN10
CSI_CPU1_CPU0_DN11
CSI_CPU1_CPU0_DN12
CSI_CPU1_CPU0_DN13
CSI_CPU1_CPU0_DN14
CSI_CPU1_CPU0_DN15
CSI_CPU1_CPU0_DN16
CSI_CPU1_CPU0_DN17
CSI_CPU1_CPU0_DN18
CSI_CPU1_CPU0_DN19

CSI_CPU1_CPU0_DP0
CSI_CPU1_CPU0_DP1
CSI_CPU1_CPU0_DP2
CSI_CPU1_CPU0_DP3
CSI_CPU1_CPU0_DP4
CSI_CPU1_CPU0_DP5
CSI_CPU1_CPU0_DP6
CSI_CPU1_CPU0_DP7
CSI_CPU1_CPU0_DP8
CSI_CPU1_CPU0_DP9
CSI_CPU1_CPU0_DP10
CSI_CPU1_CPU0_DP11
CSI_CPU1_CPU0_DP12
CSI_CPU1_CPU0_DP13
CSI_CPU1_CPU0_DP14
CSI_CPU1_CPU0_DP15
CSI_CPU1_CPU0_DP16
CSI_CPU1_CPU0_DP17
CSI_CPU1_CPU0_DP18
CSI_CPU1_CPU0_DP19

5

C1423 C0.1u16X0402C1423 C0.1u16X0402
R1355 0R0402R1355 0R0402
R1356 0R0402R1356 0R0402

AG42

CSI0_CLKTX_DP

AF42

CSI0_CLKTX_DN

AR41

CSI0_CLKRX_DP

AR42

CSI0_CLKRX_DN

AL43

CSI0_COMP

AE40

CSI0_DTX_DP<19>

AD38

CSI0_DTX_DP<18>

AB39

CSI0_DTX_DP<17>

AC39

CSI0_DTX_DP<16>

AC41

CSI0_DTX_DP<15>

AD40

CSI0_DTX_DP<14>

AC43

CSI0_DTX_DP<13>

AD42

CSI0_DTX_DP<12>

AE42

CSI0_DTX_DP<11>

AF43

CSI0_DTX_DP<10>

AG40

CSI0_DTX_DP<9>

AJ43

CSI0_DTX_DP<8>

AK42

CSI0_DTX_DP<7>

AH41

CSI0_DTX_DP<6>

AK40

CSI0_DTX_DP<5>

AH40

CSI0_DTX_DP<4>

AJ38

CSI0_DTX_DP<3>

AK37

CSI0_DTX_DP<2>

AF39

CSI0_DTX_DP<1>

AG38

CSI0_DTX_DP<0>

AF40

CSI0_DTX_DN<19>

AE38

CSI0_DTX_DN<18>

AB38

CSI0_DTX_DN<17>

AC38

CSI0_DTX_DN<16>

AC40

CSI0_DTX_DN<15>

AD39

CSI0_DTX_DN<14>

AB43

CSI0_DTX_DN<13>

AC42

CSI0_DTX_DN<12>

AE41

CSI0_DTX_DN<11>

AE43

CSI0_DTX_DN<10>

AG41

CSI0_DTX_DN<9>

AH43

CSI0_DTX_DN<8>

AJ42

CSI0_DTX_DN<7>

AH42

CSI0_DTX_DN<6>

AK41

CSI0_DTX_DN<5>

AJ40

CSI0_DTX_DN<4>

AJ39

CSI0_DTX_DN<3>

AK38

CSI0_DTX_DN<2>

AG39

CSI0_DTX_DN<1>

AH38

CSI0_DTX_DN<0>

AP38

CSI0_DRX_DP<19>

AN39

CSI0_DRX_DP<18>

AP41

CSI0_DRX_DP<17>

AM42

CSI0_DRX_DP<16>

AN40

CSI0_DRX_DP<15>

AN43

CSI0_DRX_DP<14>

AP42

CSI0_DRX_DP<13>

AT40

CSI0_DRX_DP<12>

AT43

CSI0_DRX_DP<11>

AU42

CSI0_DRX_DP<10>

AU40

CSI0_DRX_DP<9>

AW40

CSI0_DRX_DP<8>

AU39

CSI0_DRX_DP<7>

BA38

CSI0_DRX_DP<6>

AW37

CSI0_DRX_DP<5>

BA36

CSI0_DRX_DP<4>

AW36

CSI0_DRX_DP<3>

AV36

CSI0_DRX_DP<2>

AU38

CSI0_DRX_DP<1>

AT37

CSI0_DRX_DP<0>

AR38

CSI0_DRX_DN<19>

AP39

CSI0_DRX_DN<18>

AP40

CSI0_DRX_DN<17>

AM41

CSI0_DRX_DN<16>

AM40

CSI0_DRX_DN<15>

AM43

CSI0_DRX_DN<14>

AN42

CSI0_DRX_DN<13>

AR40

CSI0_DRX_DN<12>

AR43

CSI0_DRX_DN<11>

AT42

CSI0_DRX_DN<10>

AU41

CSI0_DRX_DN<9>

AV40

CSI0_DRX_DN<8>

AT39

CSI0_DRX_DN<7>

AY38

CSI0_DRX_DN<6>

AW38

CSI0_DRX_DN<5>

BA37

CSI0_DRX_DN<4>

AY36

CSI0_DRX_DN<3>

AV37

CSI0_DRX_DN<2>

AV38

CSI0_DRX_DN<1>

AU37

CSI0_DRX_DN<0>

+3.3V +1.5V_DDR3_CPU0

U88

U88

1
3
4
2

ISL90728

ISL90728

VCC
SCL
SDA
GND

Gainstown

Gainstown

1/10

1/10

Gainstown

Gainstown

6

RH

5

RW

4

CSI1_CLKTX_DP
CSI1_CLKTX_DN

CS1_CLKRX_DP

CSI1_CLKRX_DN

CSI1_DTX_DP<19>
CSI1_DTX_DP<18>
CSI1_DTX_DP<17>
CSI1_DTX_DP<16>
CSI1_DTX_DP<15>
CSI1_DTX_DP<14>
CSI1_DTX_DP<13>
CSI1_DTX_DP<12>
CSI1_DTX_DP<11>
CSI1_DTX_DP<10>

CSI1_DTX_DP<9>
CSI1_DTX_DP<8>
CSI1_DTX_DP<7>
CSI1_DTX_DP<6>
CSI1_DTX_DP<5>
CSI1_DTX_DP<4>
CSI1_DTX_DP<3>
CSI1_DTX_DP<2>
CSI1_DTX_DP<1>
CSI1_DTX_DP<0>

CSI1_DTX_DN<19>
CSI1_DTX_DN<18>
CSI1_DTX_DN<17>
CSI1_DTX_DN<16>
CSI1_DTX_DN<15>
CSI1_DTX_DN<14>
CSI1_DTX_DN<13>
CSI1_DTX_DN<12>
CSI1_DTX_DN<11>
CSI1_DTX_DN<10>

CSI1_DTX_DN<9>
CSI1_DTX_DN<8>
CSI1_DTX_DN<7>
CSI1_DTX_DN<6>
CSI1_DTX_DN<5>
CSI1_DTX_DN<4>
CSI1_DTX_DN<3>
CSI1_DTX_DN<2>
CSI1_DTX_DN<1>
CSI1_DTX_DN<0>

CSI1_DRX_DP<19>
CSI1_DRX_DP<18>
CSI1_DRX_DP<17>
CSI1_DRX_DP<16>
CSI1_DRX_DP<15>
CSI1_DRX_DP<14>
CSI1_DRX_DP<13>
CSI1_DRX_DP<12>
CSI1_DRX_DP<11>
CSI1_DRX_DP<10>

CSI1_DRX_DP<9>
CSI1_DRX_DP<8>
CSI1_DRX_DP<7>
CSI1_DRX_DP<6>
CSI1_DRX_DP<5>
CSI1_DRX_DP<4>
CSI1_DRX_DP<3>
CSI1_DRX_DP<2>
CSI1_DRX_DP<1>
CSI1_DRX_DP<0>

CS1_DRX_DN<19>
CSI1_DRX_DN<18>
CSI1_DRX_DN<17>
CSI1_DRX_DN<16>
CSI1_DRX_DN<15>
CSI1_DRX_DN<14>
CSI1_DRX_DN<13>
CSI1_DRX_DN<12>
CSI1_DRX_DN<11>
CSI1_DRX_DN<10>

CSI1_DRX_DN<9>
CSI1_DRX_DN<8>
CSI1_DRX_DN<7>
CSI1_DRX_DN<6>
CSI1_DRX_DN<5>
CSI1_DRX_DN<4>
CSI1_DRX_DN<3>
CSI1_DRX_DN<2>
CSI1_DRX_DN<1>
CSI1_DRX_DN<0>

R1357 12.1KR1%0402R1357 12.1KR1%0402

R1358 12.1KR1%0402R1358 12.1KR1%0402

4

CSI1_COMP

AF6
AE6
AT6
AR6
AL6

CSI_CPU0_IOH_DP19

AC8

CSI_CPU0_IOH_DP18

AD5

CSI_CPU0_IOH_DP17

AD6

CSI_CPU0_IOH_DP16

AB6

CSI_CPU0_IOH_DP15

AC4

CSI_CPU0_IOH_DP14

AE3

CSI_CPU0_IOH_DP13

AC3

CSI_CPU0_IOH_DP12

AD2

CSI_CPU0_IOH_DP11

AE1

CSI_CPU0_IOH_DP10

AF2

CSI_CPU0_IOH_DP9

AH2

CSI_CPU0_IOH_DP8

AH3

CSI_CPU0_IOH_DP7

AK1

CSI_CPU0_IOH_DP6

AJ3

CSI_CPU0_IOH_DP5

AG7

CSI_CPU0_IOH_DP4

AJ4

CSI_CPU0_IOH_DP3

AK6

CSI_CPU0_IOH_DP2

AH6

CSI_CPU0_IOH_DP1

AJ8

CSI_CPU0_IOH_DP0

AG8

CSI_CPU0_IOH_DN19

AD8

CSI_CPU0_IOH_DN18

AE5

CSI_CPU0_IOH_DN17

AD7

CSI_CPU0_IOH_DN16

AC6

CSI_CPU0_IOH_DN15

AD4

CSI_CPU0_IOH_DN14

AE4

CSI_CPU0_IOH_DN13

AB3

CSI_CPU0_IOH_DN12

AD3

CSI_CPU0_IOH_DN11

AD1

CSI_CPU0_IOH_DN10

AF3

CSI_CPU0_IOH_DN9

AG2

CSI_CPU0_IOH_DN8

AH4

CSI_CPU0_IOH_DN7

AJ1

CSI_CPU0_IOH_DN6

AJ2

CSI_CPU0_IOH_DN5

AG6

CSI_CPU0_IOH_DN4

AK4

CSI_CPU0_IOH_DN3

AK5

CSI_CPU0_IOH_DN2

AJ6

CSI_CPU0_IOH_DN1

AJ7

CSI_CPU0_IOH_DN0

AH8

CSI_IOH_CPU0_DP0

AM8

CSI_IOH_CPU0_DN1

AM6

CSI_IOH_CPU0_DP2

AN5

CSI_IOH_CPU0_DP3

AM4

CSI_IOH_CPU0_DP4

AP3

CSI_IOH_CPU0_DP5

AM2

CSI_IOH_CPU0_DP6

AN1

CSI_IOH_CPU0_DP7

AP2

CSI_IOH_CPU0_DP8

AR4

CSI_IOH_CPU0_DP9

AT1

CSI_IOH_CPU0_DP10

AT3

CSI_IOH_CPU0_DP11

AU4

CSI_IOH_CPU0_DP12

AW4

CSI_IOH_CPU0_DP13

AU7

CSI_IOH_CPU0_DP14

AY6

CSI_IOH_CPU0_DP15

BA7

CSI_IOH_CPU0_DP16

AV5

CSI_IOH_CPU0_DP17

AY8

CSI_IOH_CPU0_DP18

AV7

CSI_IOH_CPU0_DP19

AU8

CSI_IOH_CPU0_DN0

AL8

CSI_IOH_CPU0_DP1

AM7

CSI_IOH_CPU0_DN2

AN6

CSI_IOH_CPU0_DN3

AN4

CSI_IOH_CPU0_DN4

AP4

CSI_IOH_CPU0_DN5

AM3

CSI_IOH_CPU0_DN6

AM1

CSI_IOH_CPU0_DN7

AN2

CSI_IOH_CPU0_DN8

AR5

CSI_IOH_CPU0_DN9

AR1

CSI_IOH_CPU0_DN10

AT2

CSI_IOH_CPU0_DN11

AU3

CSI_IOH_CPU0_DN12

AW3

CSI_IOH_CPU0_DN13

AU6

CSI_IOH_CPU0_DN14

AY5

CSI_IOH_CPU0_DN15

BA6

CSI_IOH_CPU0_DN16

AW5

CSI_IOH_CPU0_DN17

BA8

CSI_IOH_CPU0_DN18

AW7

CSI_IOH_CPU0_DN19

AV8

+5V

5

+

+

6

-

-

U89B

U89B
AZ358M-E1

AZ358M-E1

4 8

CSI_CPU0_IOH_CLK_DP <37>
CSI_CPU0_IOH_CLK_DN <37>
CSI_IOH_CPU0_CLK_DP <37>
CSI_IOH_CPU0_CLK_DN <37>
CSI_CPU0_CMP1 <19>

C1427

C1427
C1u16X5

C1u16X5

7

R1362 2.2R0402R1362 2.2R0402

R1381

R1381
100R0402

100R0402

3

CSI_CPU0_IOH_DP[0:19] <37>

CSI_CPU0_IOH_DN[0:19] <37>

CSI_IOH_CPU0_DP[0:19] <37>

CSI_IOH_CPU0_DN[0:19] <37>

R1359 0R0402R1359 0R0402
R1360 0R0402R1360 0R0402
R1361 0R0402R1361 0R0402

C1424

C1424
X_C1u6.3X50402

X_C1u6.3X50402

3

M_A_DQ[0:63]<25,26>

M_A_ECC[0:7]<25,26>

M_A_MA_PAR<25,26>

M_A_PAR_ERR_N1<25>
M_A_PAR_ERR_N0<26>

M_A_ODT3<25>
M_A_ODT2<25>
M_A_ODT1<26>
M_A_ODT0<26>

EMI

+3.3V +12V

C332 0.1u_0402C332 0.1u_0402

P1V5_DDR3_CPU0_VREF_A_D <25,26>
P1V5_DDR3_CPU0_VREF_B_D <27,28>
P1V5_DDR3_CPU0_VREF_C_D <29,30>

M_A_DQ63
M_A_DQ62
M_A_DQ61
M_A_DQ60
M_A_DQ59
M_A_DQ58
M_A_DQ57
M_A_DQ56
M_A_DQ55
M_A_DQ54
M_A_DQ53
M_A_DQ52
M_A_DQ51
M_A_DQ50
M_A_DQ49
M_A_DQ48
M_A_DQ47
M_A_DQ46
M_A_DQ45
M_A_DQ44
M_A_DQ43
M_A_DQ42
M_A_DQ41
M_A_DQ40
M_A_DQ39
M_A_DQ38
M_A_DQ37
M_A_DQ36
M_A_DQ35
M_A_DQ34
M_A_DQ33
M_A_DQ32
M_A_DQ31
M_A_DQ30
M_A_DQ29
M_A_DQ28
M_A_DQ27
M_A_DQ26
M_A_DQ25
M_A_DQ24
M_A_DQ23
M_A_DQ22
M_A_DQ21
M_A_DQ20
M_A_DQ19
M_A_DQ18
M_A_DQ17
M_A_DQ16
M_A_DQ15
M_A_DQ14
M_A_DQ13
M_A_DQ12
M_A_DQ11
M_A_DQ10

M_A_DQ9
M_A_DQ8
M_A_DQ7
M_A_DQ6
M_A_DQ5
M_A_DQ4
M_A_DQ3
M_A_DQ2
M_A_DQ1
M_A_DQ0

M_A_ECC7
M_A_ECC6
M_A_ECC5
M_A_ECC4
M_A_ECC3
M_A_ECC2
M_A_ECC1
M_A_ECC0

W4

DDR0_DQ<63>

V4

DDR0_DQ<62>

U3

DDR0_DQ<61>

U1

DDR0_DQ<60>

Y3

DDR0_DQ<59>

Y2

DDR0_DQ<58>

V1

DDR0_DQ<57>

U4

DDR0_DQ<56>

T3

DDR0_DQ<55>

R4

DDR0_DQ<54>

N3

DDR0_DQ<53>

M3

DDR0_DQ<52>

T2

DDR0_DQ<51>

T1

DDR0_DQ<50>

N2

DDR0_DQ<49>

N1

DDR0_DQ<48>

L2

DDR0_DQ<47>

L3

DDR0_DQ<46>

H3

DDR0_DQ<45>

G1

DDR0_DQ<44>

M1

DDR0_DQ<43>

L1

DDR0_DQ<42>

H1

DDR0_DQ<41>

H2

DDR0_DQ<40>

F2

DDR0_DQ<39>

F3

DDR0_DQ<38>

C6

DDR0_DQ<37>

B6

DDR0_DQ<36>

G3

DDR0_DQ<35>

F1

DDR0_DQ<34>

C4

DDR0_DQ<33>

B5

DDR0_DQ<32>

B38

DDR0_DQ<31>

C38

DDR0_DQ<30>

D42

DDR0_DQ<29>

D41

DDR0_DQ<28>

D37

DDR0_DQ<27>

A38

DDR0_DQ<26>

C41

DDR0_DQ<25>

D40

DDR0_DQ<24>

F42

DDR0_DQ<23>

F43

DDR0_DQ<22>

J41

DDR0_DQ<21>

J42

DDR0_DQ<20>

E43

DDR0_DQ<19>

E42

DDR0_DQ<18>

H43

DDR0_DQ<17>

H41

DDR0_DQ<16>

L42

DDR0_DQ<15>

L43

DDR0_DQ<14>

P41

DDR0_DQ<13>

P42

DDR0_DQ<12>

K43

DDR0_DQ<11>

K42

DDR0_DQ<10>

N43

DDR0_DQ<9>

N41

DDR0_DQ<8>

T42

DDR0_DQ<7>

U41

DDR0_DQ<6>

W42

DDR0_DQ<5>

W40

DDR0_DQ<4>

R42

DDR0_DQ<3>

R43

DDR0_DQ<2>

V41

DDR0_DQ<1>

W41

DDR0_DQ<0>

C34

DDR0_ECC<7>

B34

DDR0_ECC<6>

A37

DDR0_ECC<5>

C37

DDR0_ECC<4>

C33

DDR0_ECC<3>

F32

DDR0_ECC<2>

A36

DDR0_ECC<1>

C36

DDR0_ECC<0>

B20

DDR0_MA_PAR

A27

DDR0_PAR_ERR_N<2>

B28

DDR0_PAR_ERR_N<1>

D25

DDR0_PAR_ERR_N<0>

C7

DDR0_ODT<3>

B11

DDR0_ODT<2>

C9

DDR0_ODT<1>

F12

DDR0_ODT<0>

2

CPU0B

CPU0B

Gainstown

Gainstown

DDR0_CS_N7_DDR_ODT<5>
DDR0_CS_N6_DDR_ODT<4>

2/10

2/10

Gainstown

Gainstown

+5V

3

+

+

2

-

-

4 8

2

DDR0_DQS_P<17>
DDR0_DQS_P<16>
DDR0_DQS_P<15>
DDR0_DQS_P<14>
DDR0_DQS_P<13>
DDR0_DQS_P<12>
DDR0_DQS_P<11>
DDR0_DQS_P<10>

DDR0_DQS_P<9>
DDR0_DQS_P<8>
DDR0_DQS_P<7>
DDR0_DQS_P<6>
DDR0_DQS_P<5>
DDR0_DQS_P<4>
DDR0_DQS_P<3>
DDR0_DQS_P<2>
DDR0_DQS_P<1>
DDR0_DQS_P<0>

DDR0_DQS_N<17>
DDR0_DQS_N<16>
DDR0_DQS_N<15>
DDR0_DQS_N<14>
DDR0_DQS_N<13>
DDR0_DQS_N<12>
DDR0_DQS_N<11>
DDR0_DQS_N<10>

DDR0_DQS_N<9>
DDR0_DQS_N<8>
DDR0_DQS_N<7>
DDR0_DQS_N<6>
DDR0_DQS_N<5>
DDR0_DQS_N<4>
DDR0_DQS_N<3>
DDR0_DQS_N<2>
DDR0_DQS_N<1>
DDR0_DQS_N<0>

DDR0_MA<15>
DDR0_MA<14>
DDR0_MA<13>
DDR0_MA<12>
DDR0_MA<11>
DDR0_MA<10>

DDR0_MA<9>
DDR0_MA<8>
DDR0_MA<7>
DDR0_MA<6>
DDR0_MA<5>
DDR0_MA<4>
DDR0_MA<3>
DDR0_MA<2>
DDR0_MA<1>
DDR0_MA<0>

DDR0_BA<2>
DDR0_BA<1>
DDR0_BA<0>

DDR0_CLK_P<3>
DDR0_CLK_P<2>
DDR0_CLK_P<1>
DDR0_CLK_P<0>

DDR0_CLK_N<3>
DDR0_CLK_N<2>
DDR0_CLK_N<1>
DDR0_CLK_N<0>

DDR0_CS_N<5>
DDR0_CS_N<4>
DDR0_CS_N<3>
DDR0_CS_N<2>
DDR0_CS_N<1>
DDR0_CS_N<0>

DDR0_CKE<3>
DDR0_CKE<2>
DDR0_CKE<1>
DDR0_CKE<0>

DDR0_WE_N
DDR0_RAS_N
DDR0_CAS_N

DDR0_RESET_N

1

U89A

U89A
AZ358M-E1

AZ358M-E1

1

17

M_A_DQS_DP17

B36

M_A_DQS_DP16

V2

M_A_DQS_DP15

P2

M_A_DQS_DP14

J2

M_A_DQS_DP13

D5

M_A_DQS_DP12

D39

M_A_DQS_DP11

H42

M_A_DQS_DP10

N42

M_A_DQS_DP9

V43

M_A_DQS_DP8

D34

M_A_DQS_DP7

W2

M_A_DQS_DP6

R2

M_A_DQS_DP5

K2

M_A_DQS_DP4

E3

M_A_DQS_DP3

B39

M_A_DQS_DP2

F41

M_A_DQS_DP1

L41

M_A_DQS_DP0

T43

M_A_DQS_DN17

B35

M_A_DQS_DN16

V3

M_A_DQS_DN15

P1

M_A_DQS_DN14

J1

M_A_DQS_DN13

D4

M_A_DQS_DN12

C39

M_A_DQS_DN11

G43

M_A_DQS_DN10

M43

M_A_DQS_DN9

V42

M_A_DQS_DN8

D35

M_A_DQS_DN7

W1

M_A_DQS_DN6

R3

M_A_DQS_DN5

K3

M_A_DQS_DN4

E4

M_A_DQS_DN3

B40

M_A_DQS_DN2

G41

M_A_DQS_DN1

M41

M_A_DQS_DN0

U43

M_A_MA15

B29

M_A_MA14

A28

M_A_MA13

A10

M_A_MA12

B26

M_A_MA11

A26

M_A_MA10

B19

M_A_MA9

C26

M_A_MA8

B25

M_A_MA7

A25

M_A_MA6

C24

M_A_MA5

B24

M_A_MA4

B23

M_A_MA3

D24

M_A_MA2

C23

M_A_MA1

B21

M_A_MA0

A20

M_A_BA2

C28

M_A_BA1

A16

M_A_BA0

B16
E20

F18
D19
J19

E19
E18
C19
K19

B8
C11
A7
B15
B9
C13
B10
G15

B31
B30
A30
C29

B13
A15
C12

D32

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet

Date: Sheet

Date: Sheet

M_A_DQS_DP[0:17] <25,26>

M_A_DQS_DN[0:17] <25,26>

M_A_MA[0:15] <25,26>

M_A_BA[0:2] <25,26>

M_A_CLK_DP3 <25>
M_A_CLK_DP2 <26>
M_A_CLK_DP1 <25>
M_A_CLK_DP0 <26>

M_A_CLK_DN3 <25>
M_A_CLK_DN2 <26>
M_A_CLK_DN1 <25>
M_A_CLK_DN0 <26>

M_A_CS#_7 <25>
M_A_CS#_6 <25>
M_A_CS#_5 <25>
M_A_CS#_4 <25>
M_A_CS#_3 <26>
M_A_CS#_2 <26>
M_A_CS#_1 <26>
M_A_CS#_0 <26>

M_A_CKE3 <25>
M_A_CKE2 <26>
M_A_CKE1 <25>
M_A_CKE0 <26>

M_A_WE# <25,26>
M_A_RAS# <25,26>
M_A_CAS# <25,26>

M_A_RESET# <25,26>

MICRO-START INT'L CO.,LTD.

MICRO-START INT'L CO.,LTD.

MICRO-START INT'L CO.,LTD.

CPU0_CSI & DDR3-A

CPU0_CSI & DDR3-A

CPU0_CSI & DDR3-A

MS-91C2 0A

MS-91C2 0A

MS-91C2 0A

1

of

17 77Thursday, August 28, 2008

of

17 77Thursday, August 28, 2008

of

17 77Thursday, August 28, 2008

5

4

3

2

1

CPU0C

CPU0C

Gainstown

M_B_DQ[0:63]<27,28>

D D

C C

B B

A A

M_B_ECC[0:7]<27,28>

M_B_MA_PAR<27,28>

M_B_PAR_ERR_N1<27>
M_B_PAR_ERR_N0<28>

M_B_ODT[0:3]<27,28>

M_B_DQ63
M_B_DQ62
M_B_DQ61
M_B_DQ60
M_B_DQ59
M_B_DQ58
M_B_DQ57
M_B_DQ56
M_B_DQ55
M_B_DQ54
M_B_DQ53
M_B_DQ52
M_B_DQ51
M_B_DQ50
M_B_DQ49
M_B_DQ48
M_B_DQ47
M_B_DQ46
M_B_DQ45
M_B_DQ44
M_B_DQ43
M_B_DQ42
M_B_DQ41
M_B_DQ40
M_B_DQ39
M_B_DQ38
M_B_DQ37
M_B_DQ36
M_B_DQ35
M_B_DQ34
M_B_DQ33
M_B_DQ32
M_B_DQ31
M_B_DQ30
M_B_DQ29
M_B_DQ28
M_B_DQ27
M_B_DQ26
M_B_DQ25
M_B_DQ24
M_B_DQ23
M_B_DQ22
M_B_DQ21
M_B_DQ20
M_B_DQ19
M_B_DQ18
M_B_DQ17
M_B_DQ16
M_B_DQ15
M_B_DQ14
M_B_DQ13
M_B_DQ12
M_B_DQ11
M_B_DQ10
M_B_DQ9
M_B_DQ8
M_B_DQ7
M_B_DQ6
M_B_DQ5
M_B_DQ4
M_B_DQ3
M_B_DQ2
M_B_DQ1
M_B_DQ0

M_B_ECC7
M_B_ECC6
M_B_ECC5
M_B_ECC4
M_B_ECC3
M_B_ECC2
M_B_ECC1
M_B_ECC0

M_B_ODT3
M_B_ODT2
M_B_ODT1
M_B_ODT0

W9

DDR1_DQ<63>

AA7

DDR1_DQ<62>

W5

DDR1_DQ<61>

V9

DDR1_DQ<60>

W10

DDR1_DQ<59>

Y10

DDR1_DQ<58>

W7

DDR1_DQ<57>

W6

DDR1_DQ<56>

R7

DDR1_DQ<55>

R8

DDR1_DQ<54>

M6

DDR1_DQ<53>

J4

DDR1_DQ<52>

T5

DDR1_DQ<51>

R5

DDR1_DQ<50>

K5

DDR1_DQ<49>

K4

DDR1_DQ<48>

J5

DDR1_DQ<47>

G5

DDR1_DQ<46>

H9

DDR1_DQ<45>

G9

DDR1_DQ<44>

H4

DDR1_DQ<43>

G4

DDR1_DQ<42>

J6

DDR1_DQ<41>

H8

DDR1_DQ<40>

F6

DDR1_DQ<39>

D6

DDR1_DQ<38>

G8

DDR1_DQ<37>

F10

DDR1_DQ<36>

F5

DDR1_DQ<35>

E5

DDR1_DQ<34>

E8

DDR1_DQ<33>

E9

DDR1_DQ<32>

K30

DDR1_DQ<31>

L32

DDR1_DQ<30>

H34

DDR1_DQ<29>

J34

DDR1_DQ<28>

J32

DDR1_DQ<27>

K32

DDR1_DQ<26>

L33

DDR1_DQ<25>

H33

DDR1_DQ<24>

H36

DDR1_DQ<23>

J36

DDR1_DQ<22>

M36

DDR1_DQ<21>

N34

DDR1_DQ<20>

J35

DDR1_DQ<19>

K35

DDR1_DQ<18>

M34

DDR1_DQ<17>

M35

DDR1_DQ<16>

N38

DDR1_DQ<15>

N37

DDR1_DQ<14>

R35

DDR1_DQ<13>

R34

DDR1_DQ<12>

N39

DDR1_DQ<11>

P39

DDR1_DQ<10>

P35

DDR1_DQ<9>

P34

DDR1_DQ<8>

Y39

DDR1_DQ<7>

Y40

DDR1_DQ<6>

AB36

DDR1_DQ<5>

AA35

DDR1_DQ<4>

Y34

DDR1_DQ<3>

Y35

DDR1_DQ<2>

AA36

DDR1_DQ<1>

AA37

DDR1_DQ<0>

G35

DDR1_ECC<7>

E34

DDR1_ECC<6>

F37

DDR1_ECC<5>

E37

DDR1_ECC<4>

G36

DDR1_ECC<3>

E33

DDR1_ECC<2>

F36

DDR1_ECC<1>

D36

DDR1_ECC<0>

D20

DDR1_MA_PAR

F25

DDR1_PAR_ERR_N<2>

E25

DDR1_PAR_ERR_N<1>

C22

DDR1_PAR_ERR_N<0>

F11

DDR1_ODT<3>

D14

DDR1_ODT<2>

C8

DDR1_ODT<1>

D11

DDR1_ODT<0>

Gainstown

DDR1_CS_N7_DDR_ODT<5>
DDR1_CS_N6_DDR_ODT<4>

3/10

3/10

Gainstown

Gainstown

DDR1_DQS_P<17>
DDR1_DQS_P<16>
DDR1_DQS_P<15>
DDR1_DQS_P<14>
DDR1_DQS_P<13>
DDR1_DQS_P<12>
DDR1_DQS_P<11>
DDR1_DQS_P<10>

DDR1_DQS_P<9>
DDR1_DQS_P<8>
DDR1_DQS_P<7>
DDR1_DQS_P<6>
DDR1_DQS_P<5>
DDR1_DQS_P<4>
DDR1_DQS_P<3>
DDR1_DQS_P<2>
DDR1_DQS_P<1>
DDR1_DQS_P<0>

DDR1_DQS_N<17>
DDR1_DQS_N<16>
DDR1_DQS_N<15>
DDR1_DQS_N<14>
DDR1_DQS_N<13>
DDR1_DQS_N<12>
DDR1_DQS_N<11>
DDR1_DQS_N<10>

DDR1_DQS_N<9>
DDR1_DQS_N<8>
DDR1_DQS_N<7>
DDR1_DQS_N<6>
DDR1_DQS_N<5>
DDR1_DQS_N<4>
DDR1_DQS_N<3>
DDR1_DQS_N<2>
DDR1_DQS_N<1>
DDR1_DQS_N<0>

DDR0_MA<15>
DDR0_MA<14>
DDR0_MA<13>
DDR0_MA<12>
DDR1_MA<11>
DDR1_MA<10>

DDR1_MA<9>
DDR1_MA<8>
DDR1_MA<7>
DDR1_MA<6>
DDR1_MA<5>
DDR1_MA<4>
DDR1_MA<3>
DDR1_MA<2>
DDR1_MA<1>
DDR1_MA<0>

DDR1_BA<2>
DDR1_BA<1>
DDR1_BA<0>

DDR1_CLK_P<3>
DDR1_CLK_P<2>
DDR1_CLK_P<1>
DDR1_CLK_P<0>

DDR1_CLK_N<3>
DDR1_CLK_N<2>
DDR1_CLK_N<1>
DDR1_CLK_N<0>

DDR1_CS_N<5>
DDR1_CS_N<4>
DDR1_CS_N<3>
DDR1_CS_N<2>
DDR1_CS_N<1>
DDR1_CS_N<0>

DDR1_CKE<3>
DDR1_CKE<2>
DDR1_CKE<1>
DDR1_CKE<0>

DDR1_WE_N
DDR1_RAS_N
DDR1_CAS_N

DDR1_RESET_N

F35
Y4
M5
H7
F8
K34
L37
P36
AA40
G33
Y8
L6
H6
E7
L30
L35
R38
Y38

E35
Y5
M4
J7
F7
K33
K37
P37
AA41
G34
Y9
L5
G6
D7
L31
L36
R37
Y37

F26
H26
B14
E24
E23
H14
G24
E22
D22
J27
F22
K28
L28
J17
J16
J14

H27
K13
C18

H18
K18
G19
C21

H19
L18
G20
D21

E12
C14
E10
C17
E13
E15
A8
D12

C27
D27
E27
H28

G13
G14
E14

D29

M_B_DQS_DP17
M_B_DQS_DP16
M_B_DQS_DP15
M_B_DQS_DP14
M_B_DQS_DP13
M_B_DQS_DP12
M_B_DQS_DP11
M_B_DQS_DP10
M_B_DQS_DP9
M_B_DQS_DP8
M_B_DQS_DP7
M_B_DQS_DP6
M_B_DQS_DP5
M_B_DQS_DP4
M_B_DQS_DP3
M_B_DQS_DP2
M_B_DQS_DP1
M_B_DQS_DP0

M_B_DQS_DN17
M_B_DQS_DN16
M_B_DQS_DN15
M_B_DQS_DN14
M_B_DQS_DN13
M_B_DQS_DN12
M_B_DQS_DN11
M_B_DQS_DN10
M_B_DQS_DN9
M_B_DQS_DN8
M_B_DQS_DN7
M_B_DQS_DN6
M_B_DQS_DN5
M_B_DQS_DN4
M_B_DQS_DN3
M_B_DQS_DN2
M_B_DQS_DN1
M_B_DQS_DN0

M_B_MA15
M_B_MA14
M_B_MA13
M_B_MA12
M_B_MA11
M_B_MA10
M_B_MA9
M_B_MA8
M_B_MA7
M_B_MA6
M_B_MA5
M_B_MA4
M_B_MA3
M_B_MA2
M_B_MA1
M_B_MA0

M_B_BA2
M_B_BA1
M_B_BA0

M_B_CLK_DP3
M_B_CLK_DP2
M_B_CLK_DP1
M_B_CLK_DP0

M_B_CLK_DN3
M_B_CLK_DN2
M_B_CLK_DN1
M_B_CLK_DN0

M_B_CS#_7
M_B_CS#_6
M_B_CS#_5
M_B_CS#_4
M_B_CS#_3
M_B_CS#_2
M_B_CS#_1
M_B_CS#_0

M_B_CKE3
M_B_CKE2
M_B_CKE1
M_B_CKE0

M_B_DQS_DP[0:17] <27,28>

M_B_DQS_DN[0:17] <27,28>

M_B_MA[0:15] <27,28>

M_B_BA[0:2] <27,28>

M_B_CLK_DP[0:3] <27,28>

M_B_CLK_DN[0:3] <27,28>

M_B_CS#_[0:7] <27,28>

M_B_CKE[0:3] <27,28>

M_B_WE# <27,28>
M_B_RAS# <27,28>
M_B_CAS# <27,28>

M_B_RESET# <27,28>

M_C_DQ[0:63]<29,30>

M_C_ECC[0:7]<29,30>

M_C_MA_PAR<29,30>

M_C_PAR_ERR_N1<29>
M_C_PAR_ERR_N0<30>

M_C_ODT[0:3]<29,30>

M_C_DQ63
M_C_DQ62
M_C_DQ61
M_C_DQ60
M_C_DQ59
M_C_DQ58
M_C_DQ57
M_C_DQ56
M_C_DQ55
M_C_DQ54
M_C_DQ53
M_C_DQ52
M_C_DQ51
M_C_DQ50
M_C_DQ49
M_C_DQ48
M_C_DQ47
M_C_DQ46
M_C_DQ45
M_C_DQ44
M_C_DQ43
M_C_DQ42
M_C_DQ41
M_C_DQ40
M_C_DQ39
M_C_DQ38
M_C_DQ37
M_C_DQ36
M_C_DQ35
M_C_DQ34
M_C_DQ33
M_C_DQ32
M_C_DQ31
M_C_DQ30
M_C_DQ29
M_C_DQ28
M_C_DQ27
M_C_DQ26
M_C_DQ25
M_C_DQ24
M_C_DQ23
M_C_DQ22
M_C_DQ21
M_C_DQ20
M_C_DQ19
M_C_DQ18
M_C_DQ17
M_C_DQ16
M_C_DQ15
M_C_DQ14
M_C_DQ13

M_C_DQ11
M_C_DQ10
M_C_DQ9
M_C_DQ8
M_C_DQ7
M_C_DQ6
M_C_DQ5
M_C_DQ4
M_C_DQ3
M_C_DQ2
M_C_DQ1
M_C_DQ0

M_C_ECC7
M_C_ECC6
M_C_ECC5
M_C_ECC4
M_C_ECC3
M_C_ECC2
M_C_ECC1
M_C_ECC0

M_C_ODT3
M_C_ODT2
M_C_ODT1
M_C_ODT0

U9

DDR2_DQ<63>

V8

DDR2_DQ<62>

T7

DDR2_DQ<61>

T6

DDR2_DQ<60>

U10

DDR2_DQ<59>

T10

DDR2_DQ<58>

U6

DDR2_DQ<57>

U5

DDR2_DQ<56>

R9

DDR2_DQ<55>

R10

DDR2_DQ<54>

N7

DDR2_DQ<53>

N8

DDR2_DQ<52>

P10

DDR2_DQ<51>

P9

DDR2_DQ<50>

N6

DDR2_DQ<49>

P7

DDR2_DQ<48>

M8

DDR2_DQ<47>

L8

DDR2_DQ<46>

M10

DDR2_DQ<45>

L11

DDR2_DQ<44>

N9

DDR2_DQ<43>

M9

DDR2_DQ<42>

K10

DDR2_DQ<41>

L10

DDR2_DQ<40>

L12

DDR2_DQ<39>

H12

DDR2_DQ<38>

G10

DDR2_DQ<37>

G11

DDR2_DQ<36>

L13

DDR2_DQ<35>

H13

DDR2_DQ<34>

J12

DDR2_DQ<33>

K12

DDR2_DQ<32>

E38

DDR2_DQ<31>

F38

DDR2_DQ<30>

G39

DDR2_DQ<29>

H39

DDR2_DQ<28>

H37

DDR2_DQ<27>

J37

DDR2_DQ<26>

F40

DDR2_DQ<25>

G40

DDR2_DQ<24>

K38

DDR2_DQ<23>

L40

DDR2_DQ<22>

N36

DDR2_DQ<21>

P40

DDR2_DQ<20>

J39

DDR2_DQ<19>

J40

DDR2_DQ<18>

M40

DDR2_DQ<17>

M39

DDR2_DQ<16>

R40

DDR2_DQ<15>

T41

DDR2_DQ<14>

V39

DDR2_DQ<13>

W39

DDR2_DQ<12>

T36

DDR2_DQ<11>

R39

DDR2_DQ<10>

U39

DDR2_DQ<9>

U38

DDR2_DQ<8>

V38

DDR2_DQ<7>

V37

DDR2_DQ<6>

V34

DDR2_DQ<5>

U34

DDR2_DQ<4>

U36

DDR2_DQ<3>

V36

DDR2_DQ<2>

W35

DDR2_DQ<1>

W34

DDR2_DQ<0>

F30

DDR2_ECC<7>

F31

DDR2_ECC<6>

J30

DDR2_ECC<5>

J31

DDR2_ECC<4>

E30

DDR2_ECC<3>

E29

DDR2_ECC<2>

F33

DDR2_ECC<1>

H32

DDR2_ECC<0>

B18

DDR2_MA_PAR

F23

DDR2_PAR_ERR_N<2>

J25

DDR2_PAR_ERR_N<1>

F21

DDR2_PAR_ERR_N<0>

D10

DDR2_ODT<3>

D15

DDR2_ODT<2>

F13

DDR2_ODT<1>

L16

DDR2_ODT<0>

CPU0D

CPU0D

Gainstown

Gainstown

DDR2_CS_N7_DDR2_ODT<5>
DDR2_CS_N6_DDR2_ODT<4>

4/10

4/10

Gainstown

Gainstown

DDR1_DQS_P<17>
DDR1_DQS_P<16>
DDR1_DQS_P<15>
DDR1_DQS_P<14>
DDR1_DQS_P<13>
DDR1_DQS_P<12>
DDR2_DQS_P<11>
DDR2_DQS_P<10>

DDR2_DQS_P<9>
DDR2_DQS_P<8>
DDR2_DQS_P<7>
DDR2_DQS_P<6>
DDR2_DQS_P<5>
DDR2_DQS_P<4>
DDR2_DQS_P<3>
DDR2_DQS_P<2>
DDR2_DQS_P<1>
DDR2_DQS_P<0>

DDR2_DQS_N<17>
DDR2_DQS_N<16>
DDR2_DQS_N<15>
DDR2_DQS_N<14>
DDR2_DQS_N<13>
DDR2_DQS_N<12>
DDR2_DQS_N<11>
DDR2_DQS_N<10>

DDR2_DQS_N<9>
DDR2_DQS_N<8>
DDR2_DQS_N<7>
DDR2_DQS_N<6>
DDR2_DQS_N<5>
DDR2_DQS_N<4>
DDR2_DQS_N<3>
DDR2_DQS_N<2>
DDR2_DQS_N<1>
DDR2_DQS_N<0>

DDR0_MA<15>
DDR0_MA<14>
DDR0_MA<13>
DDR0_MA<12>
DDR2_MA<11>
DDR2_MA<10>

DDR2_MA<9>
DDR2_MA<8>
DDR2_MA<7>
DDR2_MA<6>
DDR2_MA<5>
DDR2_MA<4>
DDR2_MA<3>
DDR2_MA<2>
DDR2_MA<1>
DDR2_MA<0>

DDR2_BA<2>
DDR2_BA<1>
DDR2_BA<0>

DDR2_CLK_P<3>
DDR2_CLK_P<2>
DDR2_CLK_P<1>
DDR2_CLK_P<0>

DDR2_CLK_N<3>
DDR2_CLK_N<2>
DDR2_CLK_N<1>
DDR2_CLK_N<0>

DDR2_CS_N<5>
DDR2_CS_N<4>
DDR2_CS_N<3>
DDR2_CS_N<2>
DDR2_CS_N<1>
DDR2_CS_N<0>

DDR2_CKE<3>
DDR2_CKE<2>
DDR2_CKE<1>
DDR2_CKE<0>

DDR2_WE_N
DDR2_RAS_N
DDR2_CAS_N

DDR2_RESET_N

H31
V6
N4
K9
H11
H38
M38
U40
U35
G29
U8
P6
L7
J10
E39
K40
T37
W37

G31
V7
P4
K8
J11
G38
L38
T40
T35
G30
T8
P5
K7
J9
E40
K39
T38
W36

G25
H24
F15
G23
H23
H17
H22
L25
J24
K22
K23
F20
J20
G18
K17
A18

L26
F17
A17

L22
H21
L20
J22

L21
G21
K20
J21

J15
L17
D9
E17
H16
D16
K14
G16

L27
D26
G26
J26

C16
D17
F16

E32

M_C_DQS_DP17
M_C_DQS_DP16
M_C_DQS_DP15
M_C_DQS_DP14
M_C_DQS_DP13
M_C_DQS_DP12
M_C_DQS_DP11
M_C_DQS_DP10
M_C_DQS_DP9
M_C_DQS_DP8
M_C_DQS_DP7
M_C_DQS_DP6
M_C_DQS_DP5
M_C_DQS_DP4
M_C_DQS_DP3
M_C_DQS_DP2
M_C_DQS_DP1
M_C_DQS_DP0

M_C_DQS_DN17
M_C_DQS_DN16
M_C_DQS_DN15
M_C_DQS_DN14
M_C_DQS_DN13
M_C_DQS_DN12
M_C_DQS_DN11
M_C_DQS_DN10
M_C_DQS_DN9
M_C_DQS_DN8
M_C_DQS_DN7
M_C_DQS_DN6
M_C_DQS_DN5
M_C_DQS_DN4
M_C_DQS_DN3
M_C_DQS_DN2
M_C_DQS_DN1
M_C_DQS_DN0

M_C_MA15
M_C_MA14
M_C_MA13
M_C_MA12
M_C_MA11
M_C_MA10
M_C_MA9
M_C_MA8
M_C_MA7
M_C_MA6
M_C_MA5
M_C_MA4
M_C_MA3
M_C_MA2M_C_DQ12
M_C_MA1
M_C_MA0

M_C_BA2
M_C_BA1
M_C_BA0

M_C_CLK_DP3
M_C_CLK_DP2
M_C_CLK_DP1
M_C_CLK_DP0

M_C_CLK_DN3
M_C_CLK_DN2
M_C_CLK_DN1
M_C_CLK_DN0

M_C_CS#_7
M_C_CS#_6
M_C_CS#_5
M_C_CS#_4
M_C_CS#_3
M_C_CS#_2
M_C_CS#_1
M_C_CS#_0

M_C_CKE3
M_C_CKE2
M_C_CKE1
M_C_CKE0

M_C_DQS_DP[0:17] <29,30>

M_C_DQS_DN[0:17] <29,30>

M_C_MA[0:15] <29,30>

M_C_BA[0:2] <29,30>

M_C_CLK_DP[0:3] <29,30>

M_C_CLK_DN[0:3] <29,30>

M_C_CS#_[0:7] <29,30>

M_C_CKE[0:3] <29,30>

M_C_WE# <29,30>
M_C_RAS# <29,30>
M_C_CAS# <29,30>

M_C_RESET# <29,30>

18

MICRO-START INT'L CO.,LTD.

MICRO-START INT'L CO.,LTD.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet

Date: Sheet

5

4

3

2

Date: Sheet

MICRO-START INT'L CO.,LTD.

CPU0_DDR3-B & C

CPU0_DDR3-B & C

CPU0_DDR3-B & C

MS-91C2 0A

MS-91C2 0A

MS-91C2 0A

1

of

18 77Thursday, August 28, 2008

of

18 77Thursday, August 28, 2008

of

18 77Thursday, August 28, 2008

5

4

3

2

1

19

CPU0E

RST_CPU_RESET_N<23,38,68>
CSI_CATERR_N<23,66>
CSI_CPU0_THERMTRIP_N<66>

D D

C C

B B

CSI_CPU0_PRCHT_N<66>
CSI_CPU0_SKTOCC_N<69,70>

IRQ_CPU0_RDIMM_EVENT_N<25,26,27,28,29,30,43>

PECI_CPU<23,50>

CLK_133M_CPU0_DP<15>
CLK_133M_CPU0_DN<15>
CLK_133M_CPU0_ITP_DP<67>
CLK_133M_CPU0_ITP_DN<67>

PWRGD_CPU_GTL<23,44,68>
PWRGD_CPU0_VDD_GTL<10>

VID_CPU0[0:7]<3>

CPU0_VTT_VID<5>
FM_CPU0_PSI_N<3>

VR_CPU0_IOUT<3>

VSENSE_DIE_CPU0_P<3>
VSENSE_DIE_CPU0_N<3>

VSENSE_DIE_CPU0_VTT_P<5>
VSENSE_DIE_CPU0_VTT_N<5>

XDP_CPU0_PRDY_N<68>
XDP_CPU0_PREQ_N<68>

XDP_CPU0_MBP_N[0:7]<67>

JTAG_CPU_TRST_N<23,68>
JTAG_CPU_TCLK<23,68>
JTAG_CPU_TMS<23,68>
JTAG_CPU0_TDI<68>
JTAG_CPU0_TDO<68>

+1.1V_VTT_CPU0 +1.5V_DDR3_CPU0 +1.1V_VTT_CPU0 +1.1V_VTT_CPU0

CSI_CPU0_CMPSTH
M_CPU0_DDR_COMP[2]

M_CPU0_DDR_COMP[1]
M_CPU0_DDR_COMP[0]

FM_PECI_CPU0_ID

R1173 0RR1173 0R

PWRGD_CPU0_VTT_GTL

VID_CPU07
VID_CPU06
VID_CPU05
VID_CPU04
VID_CPU03
VID_CPU02
VID_CPU01
VID_CPU00

P1V5_DDR3_VREF_CPU0
PV_VTT_VREF_CPU0

XDP_CPU0_MBP_N7
XDP_CPU0_MBP_N6
XDP_CPU0_MBP_N5
XDP_CPU0_MBP_N4
XDP_CPU0_MBP_N3
XDP_CPU0_MBP_N2
XDP_CPU0_MBP_N1
XDP_CPU0_MBP_N0

AL39

RESET_N

AC37

CAT_ERR_N

AG37

THERMTRIP_N

AG35

PROCHOT_N

AG36

SKTOCC_N

AB5

DDR_THERM_N

AB41

COMP0

AC1

DDR_COMP<2>

Y7

DDR_COMP<1>

AA8

DDR_COMP<0>

AH36

PECI

AK35

PECI_ID

AJ35

BCLK_DP

AH35

BCLK_DN

AA5

BCLK_ITP_DP

AA4

BCLK_ITP_DN

AR7

VCCPWRGOOD

AA6

VDDPWRGOOD

AB35

VTTPWRGOOD

AN8

VID<7>

AP8

VID<6>

AP9

VID5_CSC<2>

AN10

VID4_CSC<1>

AM10

VID3_CSC<0>

AN9

VID2_MSID<2>

AL9

VID1_MSID<1>

AL10

VID0_MSID<0>

AV6

VTT_VID

AP7

PSI_N

L23

DDR_VREF

AJ37

GTLREF

AK8

ISENSE

AR9

VCC_SENSE

AR8

VSS_SENSE

AE36

VTTD_SENSE

AE37

VSS_SENSE_VTTD

AF10

DBR_N

B41

PRDY_N

C42

PREQ_N

E2

BPM_N<7>

D2

BPM_N<6>

C3

BPM_N<5>

D1

BPM_N<4>

B4

BPM_N<3>

C2

BPM_N<2>

A5

BPM_N<1>

B3

BPM_N<0>

AH9

TRST_N

AH10

TCK

AG10

TMS

AJ9

TDI

AJ10

TDO

CPU0E

Gainstown

Gainstown

5/10

5/10

Gainstown

Gainstown

RSVD<66>
RSVD<65>
RSVD<64>
RSVD<63>
RSVD<62>
RSVD<61>
RSVD<60>
RSVD<59>
RSVD<58>
RSVD<57>
RSVD<56>
RSVD<55>
RSVD<54>
RSVD<53>
RSVD<52>
RSVD<51>
RSVD<50>
RSVD<49>
RSVD<48>
RSVD<47>
RSVD<46>
RSVD<45>
RSVD<44>
RSVD<43>
RSVD<42>
RSVD<41>
RSVD<40>
RSVD<39>
RSVD<38>
RSVD<37>
RSVD<36>
RSVD<35>
RSVD<34>

RSVD<32>
RSVD<31>
RSVD<30>
RSVD<29>
RSVD<28>
RSVD<27>
RSVD<26>
RSVD<25>
RSVD<24>
RSVD<23>
RSVD<22>
RSVD<21>
RSVD<20>
RSVD<19>

RSVD<17>
RSVD<16>
RSVD<15>
RSVD<14>
RSVD<13>
RSVD<12>
RSVD<11>
RSVD<10>

RSVD<9>
RSVD<8>
RSVD<7>
RSVD<6>
RSVD<5>
RSVD<4>
RSVD<3>
RSVD<2>
RSVD<1>
RSVD<0>

B33
F27
K25
K27
D30
K29
J29
G28
H29
E28
F28
A31
C32
C31
D31
AL3
AL38
AG1
AF1
AK7
AT5
AT4
V11
U11
A40
AL4
AL5
AL41
AL40
K24
AK36
K15
L15

AU2
BA40
AY40
AW41
AY41
AW42
AV43
AV42

+1.1V_VTT_CPU0

AV1
AY3
AW2
AV2
AY4
BA4

AF4
AF7
AG4
AG5
AH5
AK2
AM36
AM38
AN36
AN38
AR36
AR37
AT36
AV3
AV35
AW39
AY35
AY39

PWRGD_CPU0_VTT<5,7,9,11,14,15>

R1148

R1148
1KR1%

1KR1%

CPU0_VTT_VID2 <5>

XDP_CPU_TAPPWRGD <23,68>

R1149 1KR1%R1149 1KR1%

CPU0_VTT_VID1 <5>

+1.1V_VTT_CPU0

R607 4.7KR0402R607 4.7KR0402

CSI_CPU0_THERMTRIP_N

+3.3VDUAL

R497 4.7KR0402R497 4.7KR0402

R1137 21R1%R1137 21R1%
R529 21R1%R529 21R1%
R482 49.9R1%0402R482 49.9R1%0402
R1127 130R1%R1127 130R1%
R1119 24.9R1%R1119 24.9R1%
R1118 100R1%R1118 100R1%

RST_CPU_RESET_N<23,38,68>

CSI_CATERR_N<23,66>

+5V +1.1V_VTT_CPU0

R530

R530
1KR1%

1KR1%

DS

Q72

Q72
N-2N7002

N-2N7002

G

close to CPU0

R492 45.3R1%0402R492 45.3R1%0402

CSI_CPU0_SKTOCC_N

CSI_CPU0_CMP1 <17>
CSI_CPU0_CMP0 <17>

CSI_CPU0_CMPSTH
M_CPU0_DDR_COMP[2]
M_CPU0_DDR_COMP[1]
M_CPU0_DDR_COMP[0]

R543 X_49.9R1%R543 X_49.9R1%
R488 75R_0402R488 75R_0402

R489

R489
100R

100R

PWRGD_CPU0_VTT_GTL

Q66

Q66

N-PMBS3904

N-PMBS3904

+1.1V_VTT_CPU0

C474

C474
C0.1u16X0402

C0.1u16X0402

+1.1V_VTT_CPU0

R506

R506
X_100R1%0402

A A

X_100R1%0402

PV_VTT_VREF_CPU0 P1V5_DDR3_VREF_CPU0 FM_CPU0_PSI_N FM_PECI_CPU0_ID

C418

R502

R502
X_100R1%0402

X_100R1%0402

5

C418
X_C0.1u16X0402

X_C0.1u16X0402

R1128

R1128
X_100R1%0402

X_100R1%0402

R1120

R1120
X_100R1%0402

X_100R1%0402

C1125

C1125
X_C0.1u16X0402

X_C0.1u16X0402

4

R1157

R1157
X_1KR1%

X_1KR1%

R1156

R1156
1KR1%

1KR1%

R517

R517
X_49.9R1%

X_49.9R1%

MICRO-START INT'L CO.,LTD.

MICRO-START INT'L CO.,LTD.

R522

R522

49.9R1%

49.9R1%

3

2

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet

Date: Sheet of

Date: Sheet of

MICRO-START INT'L CO.,LTD.

CPU0_XDP & VID

CPU0_XDP & VID

CPU0_XDP & VID

MS-91C2 0A

MS-91C2 0A

MS-91C2 0A

1

of

19 77Thursday, August 28, 2008

19 77Thursday, August 28, 2008

19 77Thursday, August 28, 2008

5

+1.5V_DDR3_CPU0 +1.1V_VTT_CPU0

CPU0F

A14

VDDQ<44>

A19

VDDQ<43>

A24

VDDQ<42>

A29

VDDQ<41>

A9

VDDQ<40>

B12

VDDQ<39>

B17

VDDQ<38>

B22

VDDQ<37>

B27

VDDQ<36>

D D

C C

B B

A A

B32

VDDQ<35>

B7

VDDQ<34>

C10

VDDQ<33>

C15

VDDQ<32>

C20

VDDQ<31>

C25

VDDQ<30>

C30

VDDQ<29>

D13

VDDQ<28>

D18

VDDQ<27>

D23

VDDQ<26>

D28

VDDQ<25>

E11

VDDQ<24>

E16

VDDQ<23>

E21

VDDQ<22>

E26

VDDQ<21>

E31

VDDQ<20>

F14

VDDQ<19>

F19

VDDQ<18>

F24

VDDQ<17>

G17

VDDQ<16>

G22

VDDQ<15>

G27

VDDQ<14>

H15

VDDQ<13>

H20

VDDQ<12>

H25

VDDQ<11>

J18

VDDQ<10>

J23

VDDQ<9>

J28

VDDQ<8>

K16

VDDQ<7>

K21

VDDQ<6>

K26

VDDQ<5>

L14

VDDQ<4>

L19

VDDQ<3>

L24

VDDQ<2>

M17

VDDQ<1>

M27
U33
W33

AH11
AH33

AJ11

AJ33
AK11
AK12
AK13
AK15
AK16
AK18
AK19
AK21
AK24
AK25
AK27
AK28
AK30
AK31
AK33

AL12

AL13

AL15

AL16

AL18

AL19

AL21

AL24

AL25

AL27

AL28

AL30

AL31

AL33

AL34
AM12
AM13
AM15
AM16
AM18
AM19
AM21
AM24
AM25
AM27
AM28
AM30
AM31
AM33
AM34
AN12
AN13
AN15
AN16

V33

VDDQ<0>
VCCPLL<2>

VCCPLL<1>
VCCPLL<0>

VCC<209>
VCC<208>
VCC<207>
VCC<206>
VCC<205>
VCC<204>
VCC<203>
VCC<202>
VCC<201>
VCC<200>
VCC<199>
VCC<198>
VCC<197>
VCC<196>
VCC<195>
VCC<194>
VCC<193>
VCC<192>
VCC<191>
VCC<190>
VCC<189>
VCC<188>
VCC<187>
VCC<186>
VCC<185>
VCC<184>
VCC<183>
VCC<182>
VCC<181>
VCC<180>
VCC<179>
VCC<178>
VCC<177>
VCC<176>
VCC<175>
VCC<174>
VCC<173>
VCC<172>
VCC<171>
VCC<170>
VCC<169>
VCC<168>
VCC<167>
VCC<166>
VCC<165>
VCC<164>
VCC<163>
VCC<162>
VCC<161>
VCC<160>
VCC<159>
VCC<158>
VCC<157>

+1.8V_CPU0_PLL

VCORE_CPU0 VCORE_CPU0

CPU0F

Gainstown

Gainstown

6/10

6/10

Gainstown

Gainstown

CPU0G

CPU0G

Gainstown

Gainstown

7/10

7/10

Gainstown

Gainstown

5

VTTD<25>
VTTD<24>
VTTD<23>
VTTD<22>
VTTD<21>
VTTD<20>
VTTD<19>
VTTD<18>
VTTD<17>
VTTD<16>
VTTD<15>
VTTD<14>
VTTD<13>
VTTD<12>
VTTD<11>
VTTD<10>

VTTD<9>
VTTD<8>
VTTD<7>
VTTD<6>
VTTD<5>
VTTD<4>
VTTD<3>
VTTD<2>
VTTD<1>
VTTD<0>

VTTA<7>
VTTA<6>
VTTA<5>
VTTA<4>
VTTA<3>
VTTA<2>
VTTA<1>
VTTA<0>

VCC<156>
VCC<155>
VCC<154>
VCC<153>
VCC<152>
VCC<151>
VCC<150>
VCC<149>
VCC<148>
VCC<147>
VCC<146>
VCC<145>
VCC<144>
VCC<143>
VCC<142>
VCC<141>
VCC<140>
VCC<139>
VCC<138>
VCC<137>
VCC<136>
VCC<135>
VCC<134>
VCC<133>
VCC<132>
VCC<131>
VCC<130>
VCC<129>
VCC<128>
VCC<127>
VCC<126>
VCC<125>
VCC<124>
VCC<123>
VCC<122>
VCC<121>
VCC<120>
VCC<119>
VCC<118>
VCC<117>
VCC<116>
VCC<115>
VCC<114>
VCC<113>
VCC<112>
VCC<111>
VCC<110>
VCC<109>
VCC<108>
VCC<107>
VCC<106>
VCC<105>
VCC<104>

AF37
AA10
AA11
AA33
AB10
AB11
AB33
AB34
AB8
AB9
AC10
AC11
AC33
AC34
AC35
AD34
AD35
AD36
AD9
AE34
AE35
AE8
AE9
AF36
AF8
AF9

AG34
AF34
AF33
AF11
AE33
AE11
AE10
AD10

AN18
AN19
AN21
AN24
AN25
AN27
AN28
AN30
AN31
AN33
AN34
AP12
AP13
AP15
AP16
AP18
AP19
AP21
AP24
AP25
AP27
AP28
AP30
AP31
AP33
AP34
AR10
AR12
AR13
AR15
AR16
AR18
AR19
AR21
AR24
AR25
AR27
AR28
AR30
AR31
AR33
AR34
AT10
AT12
AT13
AT15
AT16
AT18
AT19
AT21
AT24
AT25
AT27

VCORE_CPU0 VCORE_CPU0

4

AT28
AT30
AT31
AT33
AT34

AT9
AU10
AU12
AU13
AU15
AU16
AU18
AU19
AU21
AU24
AU25
AU27
AU28
AU30
AU31
AU33
AU34

AU9
AV10
AV12
AV13
AV15
AV16
AV18
AV19
AV21
AV24
AV25
AV27
AV28
AV30
AV31
AV33
AV34

AV9

AW10
AW12
AW13
AW15
AW16
AW18
AW19
AW21
AW24
AW25
AW27
AW28

4

VCC<103>
VCC<102>
VCC<101>
VCC<100>
VCC<99>
VCC<98>
VCC<97>
VCC<96>
VCC<95>
VCC<94>
VCC<93>
VCC<92>
VCC<91>
VCC<90>
VCC<89>
VCC<88>
VCC<87>
VCC<86>
VCC<85>
VCC<84>
VCC<83>
VCC<82>
VCC<81>
VCC<80>
VCC<79>
VCC<78>
VCC<77>
VCC<76>
VCC<75>
VCC<74>
VCC<73>
VCC<72>
VCC<71>
VCC<70>
VCC<69>
VCC<68>
VCC<67>
VCC<66>
VCC<65>
VCC<64>
VCC<63>
VCC<62>
VCC<61>
VCC<60>
VCC<59>
VCC<58>
VCC<57>
VCC<56>
VCC<55>
VCC<54>
VCC<53>
VCC<52>

CPU0H

CPU0H

Gainstown

Gainstown

8/10

8/10

Gainstown

Gainstown

3

AW30

VCC<51>

AW31

VCC<50>

AW33

VCC<49>

AW34

VCC<48>

AW9

VCC<47>

AY10

VCC<46>

AY12

VCC<45>

AY13

VCC<44>

AY15

VCC<43>

AY16

VCC<42>

AY18

VCC<41>

AY19

VCC<40>

AY21

VCC<39>

AY24

VCC<38>

AY25

VCC<37>

AY27

VCC<36>

AY28

VCC<35>

AY30

VCC<34>

AY31

VCC<33>

AY33

VCC<32>

AY34

VCC<31>

AY9

VCC<30>

BA10

VCC<29>

BA12

VCC<28>

BA13

VCC<27>

BA15

VCC<26>

BA16

VCC<25>

BA18

VCC<24>

BA19

VCC<23>

BA24

VCC<22>

BA25

VCC<21>

BA27

VCC<20>

BA28

VCC<19>

BA30

VCC<18>

BA9

VCC<17>

M11

VCC<16>

M13

VCC<15>

M15

VCC<14>

M19

VCC<13>

M21

VCC<12>

M23

VCC<11>

M25

VCC<10>

M29

VCC<9>

M31

VCC<8>

M33

VCC<7>

N11

VCC<6>

N33

VCC<5>

R11

VCC<4>

R33

VCC<3>

T11

VCC<2>

T33

VCC<1>

W11

VCC<0>

+1.1V_VTT_CPU0

+1.8V_CPU0_PLL +1.5V_DDR3_CPU0

9 0805 10 UF CAPS AND 2 0805 22UF CAPS AND 1 1206 47UF FOR VTTA

C1068

C1068
10u_0805_B

10u_0805_B

C340

C340

10u_0805

10u_0805

C339

C339
10u_0805

10u_0805

C341

C341
10u_0805

10u_0805

3

Y6
Y41
Y36
Y33
Y11

Y1

W8
W43
W38

W3

V5
V40
V35
V10

U7

U42
U37

U2

T9

T4
T39
T34

R6

R41
R36

R1

P8
P43
P38
P33

P3
P11

N5

N40
N35
N10

M7
M42
M37
M32
M30
M28
M26
M24
M22
M20

M2
M18
M16
M14
M12

L9

L4
L39
L34
L29

K6
K41
K36
K31
K11

K1

J8
J43
J38
J33

J3
J13

H5

H40
H35
H30
H10

G7

G42
G37
G32

G2

G12

C1053

C1053
10u_0805_B

10u_0805_B

C342

C342
10u_0805

10u_0805

VSS<309>
VSS<308>
VSS<307>
VSS<306>
VSS<305>
VSS<304>
VSS<303>
VSS<302>
VSS<301>
VSS<300>
VSS<299>
VSS<298>
VSS<297>
VSS<296>
VSS<295>
VSS<294>
VSS<293>
VSS<292>
VSS<291>
VSS<290>
VSS<289>
VSS<288>
VSS<287>
VSS<286>
VSS<285>
VSS<284>
VSS<283>
VSS<282>
VSS<281>
VSS<280>
VSS<279>
VSS<278>
VSS<277>
VSS<276>
VSS<275>
VSS<274>
VSS<273>
VSS<272>
VSS<271>
VSS<270>
VSS<269>
VSS<268>
VSS<267>
VSS<266>
VSS<265>
VSS<264>
VSS<263>
VSS<262>
VSS<261>
VSS<260>
VSS<259>
VSS<258>
VSS<257>
VSS<256>
VSS<255>
VSS<254>
VSS<253>
VSS<252>
VSS<251>
VSS<250>
VSS<249>
VSS<248>
VSS<247>
VSS<246>
VSS<245>
VSS<244>
VSS<243>
VSS<242>
VSS<241>
VSS<240>
VSS<239>
VSS<238>
VSS<237>
VSS<236>
VSS<235>
VSS<234>
VSS<233>
VSS<232>
VSS<231>

Gainstown

Gainstown

9/10

9/10

Gainstown

Gainstown

C1052

C1052
10u_0805_B

10u_0805_B

C343

C343
10u_0805

10u_0805

CPU0I

CPU0I

C1075

C1075
10u_0805_B

10u_0805_B

C1056

C1056
10u_0805_B

10u_0805_B

VSS<230>
VSS<229>
VSS<228>
VSS<227>
VSS<226>
VSS<225>
VSS<224>
VSS<223>
VSS<222>
VSS<221>
VSS<220>
VSS<219>
VSS<218>
VSS<217>
VSS<216>
VSS<215>
VSS<214>
VSS<213>
VSS<212>
VSS<211>
VSS<210>
VSS<209>
VSS<208>
VSS<207>
VSS<206>
VSS<205>
VSS<204>
VSS<203>
VSS<202>
VSS<201>
VSS<200>
VSS<199>
VSS<198>
VSS<197>
VSS<196>
VSS<195>
VSS<194>
VSS<193>
VSS<192>
VSS<191>
VSS<190>
VSS<189>
VSS<188>
VSS<187>
VSS<186>
VSS<185>
VSS<184>
VSS<183>
VSS<182>
VSS<181>
VSS<180>
VSS<179>
VSS<178>
VSS<177>
VSS<176>
VSS<175>
VSS<174>
VSS<173>
VSS<172>
VSS<171>
VSS<170>
VSS<169>
VSS<168>
VSS<167>
VSS<166>
VSS<165>
VSS<164>
VSS<163>
VSS<162>
VSS<161>
VSS<160>
VSS<159>
VSS<158>
VSS<157>
VSS<156>
VSS<155>
VSS<154>
VSS<153>

C338

C338
22u_0805

22u_0805

C1054

C1054
10u_0805_B

10u_0805_B

2

F9
F4
F39
F34
F29
E6
E41
E36
E1
D8
D43
D38
D33
D3
C5
C43
C40
C35
BA5
BA39
BA35
BA3
BA29
BA26
BA20
BA17
BA14
BA11
B42
B37
B2
AY7
AY42
AY37
AY32
AY29
AY26
AY23
AY22
AY20
AY2
AY17
AY14
AY11
AW8
AW6
AW35
AW32
AW29
AW26
AW23
AW22
AW20
AW17
AW14
AW11
AW1
AV41
AV4
AV39
AV32
AV29
AV26
AV23
AV22
AV20
AV17
AV14
AV11
AU5
AU43
AU36
AU35
AU32
AU29
AU26
AU23
AU22

C1051

C1051
22u_0805_B

22u_0805_B

C1055

C1055
10u_0805_B

10u_0805_B

2

C355

C355
47u_1206

47u_1206

1

CPU0J

AU20

VSS<152>

AU17

VSS<151>

AU14

VSS<150>

AU11

VSS<149>

AU1

VSS<148>

AT8

VSS<147>

AT7

VSS<146>

AT41

VSS<145>

AT38

VSS<144>

AT35

VSS<143>

AT32

VSS<142>

AT29

VSS<141>

AT26

VSS<140>

AT23

VSS<139>

AT22

VSS<138>

AT20

VSS<137>

AT17

VSS<136>

AT14

VSS<135>

AT11

VSS<134>

AR39

VSS<133>

AR35

VSS<132>

AR32

VSS<131>

AR3

VSS<130>

AR29

VSS<129>

AR26

VSS<128>

AR23

VSS<127>

AR22

VSS<126>

AR20

VSS<125>

AR2

VSS<124>

AR17

VSS<123>

AR14

VSS<122>

AR11

VSS<121>

AP6

VSS<120>

AP5

VSS<119>

AP43

VSS<118>

AP37

VSS<117>

AP36

VSS<116>

AP35

VSS<115>

AP32

VSS<114>

AP29

VSS<113>

AP26

VSS<112>

AP23

VSS<111>

AP22

VSS<110>

AP20

VSS<109>

AP17

VSS<108>

AP14

VSS<107>

AP11

VSS<106>

AP10

VSS<105>

AP1

VSS<104>

AN7

VSS<103>

AN41

VSS<102>

AN37

VSS<101>

AN35

VSS<100>

AN32

VSS<99>

AN3

VSS<98>

AN29

VSS<97>

AN26

VSS<96>

AN23

VSS<95>

AN22

VSS<94>

AN20

VSS<93>

AN17

VSS<92>

AN14

VSS<91>

AN11

VSS<90>

AM9

VSS<89>

AM5

VSS<88>

AM39

VSS<87>

AM37

VSS<86>

AM35

VSS<85>

AM32

VSS<84>

AM29

VSS<83>

AM26

VSS<82>

AM23

VSS<81>

AM22

VSS<80>

AM20

VSS<79>

AM17

VSS<78>

AM14

VSS<77>

AM11

VSS<76>

AL7

VSS<75>

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet

Date: Sheet

Date: Sheet

CPU0J

Gainstown

Gainstown

10/10

10/10

Gainstown

Gainstown

MICRO-START INT'L CO.,LTD.

MICRO-START INT'L CO.,LTD.

MICRO-START INT'L CO.,LTD.

CPU0_Power & Ground

CPU0_Power & Ground

CPU0_Power & Ground

VSS<74>
VSS<73>
VSS<72>
VSS<71>
VSS<70>
VSS<69>
VSS<68>
VSS<67>
VSS<66>
VSS<65>
VSS<64>
VSS<63>
VSS<62>
VSS<61>
VSS<60>
VSS<59>
VSS<58>
VSS<57>
VSS<56>
VSS<55>
VSS<54>
VSS<53>
VSS<52>
VSS<51>
VSS<50>
VSS<49>
VSS<48>
VSS<47>
VSS<46>
VSS<45>
VSS<44>
VSS<43>
VSS<42>
VSS<41>
VSS<40>
VSS<39>
VSS<38>
VSS<37>
VSS<36>
VSS<35>
VSS<34>
VSS<33>
VSS<32>
VSS<31>
VSS<30>
VSS<29>
VSS<28>
VSS<27>
VSS<26>
VSS<25>
VSS<24>
VSS<23>
VSS<22>
VSS<21>
VSS<20>
VSS<19>
VSS<18>
VSS<17>
VSS<16>
VSS<15>
VSS<14>
VSS<13>
VSS<12>
VSS<11>
VSS<10>

VSS<9>
VSS<8>
VSS<7>
VSS<6>
VSS<5>
VSS<4>
VSS<3>
VSS<2>
VSS<1>
VSS<0>

MS-91C2 0A

MS-91C2 0A

MS-91C2 0A

1

20

AL42
AL37
AL36
AL35
AL32
AL29
AL26
AL23
AL22
AL20
AL2
AL17
AL14
AL11
AL1
AK9
AK43
AK39
AK34
AK32
AK3
AK29
AK26
AK23
AK22
AK20
AK17
AK14
AK10
AJ5
AJ41
AJ36
AJ34
AH7
AH39
AH37
AH34
AH1
AG9
AG43
AG33
AG3
AG11
AF5
AF41
AF38
AF35
AE7
AE39
AE2
AD43
AD41
AD37
AD33
AD11
AC9
AC7
AC5
AC36
AC2
AB7
AB42
AB40
AB4
AB37
AA9
AA39
AA38
AA34
AA3
A6
A41
A4
A39
A35

of

20 77Thursday, August 28, 2008

of

20 77Thursday, August 28, 2008

of

20 77Thursday, August 28, 2008

5

4

3

2

1

21

CPU1A

CPU1A

1
3
4
2

AM42

AW40

AW37
AW36

AM41
AM40
AM43

AW38

U91

U91

VCC
SCL
SDA
GND

ISL90727

ISL90727

AG42
AF42
AR41
AR42

AL43

AE40
AD38
AB39
AC39
AC41
AD40
AC43
AD42
AE42
AF43
AG40

AJ43
AK42
AH41
AK40
AH40

AJ38
AK37
AF39
AG38

AF40
AE38
AB38
AC38
AC40
AD39
AB43
AC42
AE41
AE43
AG41
AH43

AJ42
AH42
AK41

AJ40

AJ39
AK38
AG39
AH38

AP38
AN39
AP41

AN40
AN43
AP42
AT40
AT43
AU42
AU40

AU39
BA38

BA36
AV36

AU38
AT37

AR38
AP39
AP40

AN42
AR40
AR43
AT42
AU41
AV40
AT39
AY38

BA37
AY36
AV37
AV38
AU37

RH

RW

CSI0_CLKTX_DP
CSI0_CLKTX_DN
CSI0_CLKRX_DP
CSI0_CLKRX_DN
CSI0_COMP

CSI0_DTX_DP<19>
CSI0_DTX_DP<18>
CSI0_DTX_DP<17>
CSI0_DTX_DP<16>
CSI0_DTX_DP<15>
CSI0_DTX_DP<14>
CSI0_DTX_DP<13>
CSI0_DTX_DP<12>
CSI0_DTX_DP<11>
CSI0_DTX_DP<10>
CSI0_DTX_DP<9>
CSI0_DTX_DP<8>
CSI0_DTX_DP<7>
CSI0_DTX_DP<6>
CSI0_DTX_DP<5>
CSI0_DTX_DP<4>
CSI0_DTX_DP<3>
CSI0_DTX_DP<2>
CSI0_DTX_DP<1>
CSI0_DTX_DP<0>

CSI0_DTX_DN<19>
CSI0_DTX_DN<18>
CSI0_DTX_DN<17>
CSI0_DTX_DN<16>
CSI0_DTX_DN<15>
CSI0_DTX_DN<14>
CSI0_DTX_DN<13>
CSI0_DTX_DN<12>
CSI0_DTX_DN<11>
CSI0_DTX_DN<10>
CSI0_DTX_DN<9>
CSI0_DTX_DN<8>
CSI0_DTX_DN<7>
CSI0_DTX_DN<6>
CSI0_DTX_DN<5>
CSI0_DTX_DN<4>
CSI0_DTX_DN<3>
CSI0_DTX_DN<2>
CSI0_DTX_DN<1>
CSI0_DTX_DN<0>

CSI0_DRX_DP<19>
CSI0_DRX_DP<18>
CSI0_DRX_DP<17>
CSI0_DRX_DP<16>
CSI0_DRX_DP<15>
CSI0_DRX_DP<14>
CSI0_DRX_DP<13>
CSI0_DRX_DP<12>
CSI0_DRX_DP<11>
CSI0_DRX_DP<10>
CSI0_DRX_DP<9>
CSI0_DRX_DP<8>
CSI0_DRX_DP<7>
CSI0_DRX_DP<6>
CSI0_DRX_DP<5>
CSI0_DRX_DP<4>
CSI0_DRX_DP<3>
CSI0_DRX_DP<2>
CSI0_DRX_DP<1>
CSI0_DRX_DP<0>

CSI0_DRX_DN<19>
CSI0_DRX_DN<18>
CSI0_DRX_DN<17>
CSI0_DRX_DN<16>
CSI0_DRX_DN<15>
CSI0_DRX_DN<14>
CSI0_DRX_DN<13>
CSI0_DRX_DN<12>
CSI0_DRX_DN<11>
CSI0_DRX_DN<10>
CSI0_DRX_DN<9>
CSI0_DRX_DN<8>
CSI0_DRX_DN<7>
CSI0_DRX_DN<6>
CSI0_DRX_DN<5>
CSI0_DRX_DN<4>
CSI0_DRX_DN<3>
CSI0_DRX_DN<2>
CSI0_DRX_DN<1>
CSI0_DRX_DN<0>

+1.5V_DDR3_CPU1

6
5

Gainstown

Gainstown

1/10

1/10

Gainstown

Gainstown

R1366 12.1KR1%0402R1366 12.1KR1%0402

R1367 12.1KR1%0402R1367 12.1KR1%0402

4

CSI1_CLKTX_DP
CSI1_CLKTX_DN

CS1_CLKRX_DP

CSI1_CLKRX_DN

CSI1_DTX_DP<19>
CSI1_DTX_DP<18>
CSI1_DTX_DP<17>
CSI1_DTX_DP<16>
CSI1_DTX_DP<15>
CSI1_DTX_DP<14>
CSI1_DTX_DP<13>
CSI1_DTX_DP<12>
CSI1_DTX_DP<11>
CSI1_DTX_DP<10>

CSI1_DTX_DP<9>
CSI1_DTX_DP<8>
CSI1_DTX_DP<7>
CSI1_DTX_DP<6>
CSI1_DTX_DP<5>
CSI1_DTX_DP<4>
CSI1_DTX_DP<3>
CSI1_DTX_DP<2>
CSI1_DTX_DP<1>
CSI1_DTX_DP<0>

CSI1_DTX_DN<19>
CSI1_DTX_DN<18>
CSI1_DTX_DN<17>
CSI1_DTX_DN<16>
CSI1_DTX_DN<15>
CSI1_DTX_DN<14>
CSI1_DTX_DN<13>
CSI1_DTX_DN<12>
CSI1_DTX_DN<11>
CSI1_DTX_DN<10>

CSI1_DTX_DN<9>
CSI1_DTX_DN<8>
CSI1_DTX_DN<7>
CSI1_DTX_DN<6>
CSI1_DTX_DN<5>
CSI1_DTX_DN<4>
CSI1_DTX_DN<3>
CSI1_DTX_DN<2>
CSI1_DTX_DN<1>
CSI1_DTX_DN<0>

CSI1_DRX_DP<19>
CSI1_DRX_DP<18>
CSI1_DRX_DP<17>
CSI1_DRX_DP<16>
CSI1_DRX_DP<15>
CSI1_DRX_DP<14>
CSI1_DRX_DP<13>
CSI1_DRX_DP<12>
CSI1_DRX_DP<11>
CSI1_DRX_DP<10>

CSI1_DRX_DP<9>
CSI1_DRX_DP<8>
CSI1_DRX_DP<7>
CSI1_DRX_DP<6>
CSI1_DRX_DP<5>
CSI1_DRX_DP<4>
CSI1_DRX_DP<3>
CSI1_DRX_DP<2>
CSI1_DRX_DP<1>
CSI1_DRX_DP<0>

CS1_DRX_DN<19>
CSI1_DRX_DN<18>
CSI1_DRX_DN<17>
CSI1_DRX_DN<16>
CSI1_DRX_DN<15>
CSI1_DRX_DN<14>
CSI1_DRX_DN<13>
CSI1_DRX_DN<12>
CSI1_DRX_DN<11>
CSI1_DRX_DN<10>

CSI1_DRX_DN<9>
CSI1_DRX_DN<8>
CSI1_DRX_DN<7>
CSI1_DRX_DN<6>
CSI1_DRX_DN<5>
CSI1_DRX_DN<4>
CSI1_DRX_DN<3>
CSI1_DRX_DN<2>
CSI1_DRX_DN<1>
CSI1_DRX_DN<0>

CSI_CPU1_IOH_CLK_DP<37>
CSI_CPU1_IOH_CLK_DN<37>
CSI_IOH_CPU1_CLK_DP<37>
CSI_IOH_CPU1_CLK_DN<37>
CSI_CPU1_CMP0<23>

D D

C C

B B

A A

CSI_CPU1_IOH_DP[0:19]<37>

CSI_CPU1_IOH_DN[0:19]<37>

CSI_IOH_CPU1_DP[0:19]<37>

CSI_IOH_CPU1_DN[0:19]<37>

SMBUS_ICH_CLK<17,44,65>
SMBUS_ICH_DATA<17,44,65>

5

CSI_CPU1_IOH_DP0
CSI_CPU1_IOH_DP1
CSI_CPU1_IOH_DP2
CSI_CPU1_IOH_DP3
CSI_CPU1_IOH_DP4
CSI_CPU1_IOH_DP5
CSI_CPU1_IOH_DP6
CSI_CPU1_IOH_DP7
CSI_CPU1_IOH_DP8
CSI_CPU1_IOH_DP9
CSI_CPU1_IOH_DP10
CSI_CPU1_IOH_DP11
CSI_CPU1_IOH_DP12
CSI_CPU1_IOH_DP13
CSI_CPU1_IOH_DP14
CSI_CPU1_IOH_DP15
CSI_CPU1_IOH_DP16
CSI_CPU1_IOH_DP17
CSI_CPU1_IOH_DP18
CSI_CPU1_IOH_DP19

CSI_CPU1_IOH_DN0
CSI_CPU1_IOH_DN1
CSI_CPU1_IOH_DN2
CSI_CPU1_IOH_DN3
CSI_CPU1_IOH_DN4
CSI_CPU1_IOH_DN5
CSI_CPU1_IOH_DN6
CSI_CPU1_IOH_DN7
CSI_CPU1_IOH_DN8
CSI_CPU1_IOH_DN9
CSI_CPU1_IOH_DN10
CSI_CPU1_IOH_DN11
CSI_CPU1_IOH_DN12
CSI_CPU1_IOH_DN13
CSI_CPU1_IOH_DN14
CSI_CPU1_IOH_DN15
CSI_CPU1_IOH_DN16
CSI_CPU1_IOH_DN17
CSI_CPU1_IOH_DN18
CSI_CPU1_IOH_DN19

CSI_IOH_CPU1_DP19
CSI_IOH_CPU1_DP18
CSI_IOH_CPU1_DP17
CSI_IOH_CPU1_DP16
CSI_IOH_CPU1_DP15
CSI_IOH_CPU1_DP14
CSI_IOH_CPU1_DP13
CSI_IOH_CPU1_DP12
CSI_IOH_CPU1_DP11
CSI_IOH_CPU1_DP10
CSI_IOH_CPU1_DP9
CSI_IOH_CPU1_DP8
CSI_IOH_CPU1_DP7
CSI_IOH_CPU1_DP6
CSI_IOH_CPU1_DP5
CSI_IOH_CPU1_DP4
CSI_IOH_CPU1_DP3
CSI_IOH_CPU1_DP2
CSI_IOH_CPU1_DP1
CSI_IOH_CPU1_DP0

CSI_IOH_CPU1_DN19
CSI_IOH_CPU1_DN18
CSI_IOH_CPU1_DN17
CSI_IOH_CPU1_DN16
CSI_IOH_CPU1_DN15
CSI_IOH_CPU1_DN14
CSI_IOH_CPU1_DN13
CSI_IOH_CPU1_DN12
CSI_IOH_CPU1_DN11
CSI_IOH_CPU1_DN10
CSI_IOH_CPU1_DN9
CSI_IOH_CPU1_DN8
CSI_IOH_CPU1_DN7
CSI_IOH_CPU1_DN6
CSI_IOH_CPU1_DN5
CSI_IOH_CPU1_DN4
CSI_IOH_CPU1_DN3
CSI_IOH_CPU1_DN2
CSI_IOH_CPU1_DN1
CSI_IOH_CPU1_DN0

C1426 C0.1u16X0402C1426 C0.1u16X0402
R1363 0R0402R1363 0R0402
R1365 0R0402R1365 0R0402

CSI1_COMP

+5V

5

+

+

6

-

-

4 8

AF6
AE6
AT6
AR6
AL6

AC8
AD5
AD6
AB6
AC4
AE3
AC3
AD2
AE1
AF2
AH2
AH3
AK1
AJ3
AG7
AJ4
AK6
AH6
AJ8
AG8

AD8
AE5
AD7
AC6
AD4
AE4
AB3
AD3
AD1
AF3
AG2
AH4
AJ1
AJ2
AG6
AK4
AK5
AJ6
AJ7
AH8

AM8
AM6
AN5
AM4
AP3
AM2
AN1
AP2
AR4
AT1
AT3
AU4
AW4
AU7
AY6
BA7
AV5
AY8
AV7
AU8

AL8
AM7
AN6
AN4
AP4
AM3
AM1
AN2
AR5
AR1
AT2
AU3
AW3
AU6
AY5
BA6
AW5
BA8
AW7
AV8

C1428

C1428
C1u16X5

C1u16X5

7

U90B

U90B
AZ358M-E1

AZ358M-E1

CSI_CPU1_CPU0_CLK_DP <17>
CSI_CPU1_CPU0_CLK_DN <17>
CSI_CPU0_CPU1_CLK_DP <17>
CSI_CPU0_CPU1_CLK_DN <17>

CSI_CPU1_CMP1 <23>

CSI_CPU1_CPU0_DP0
CSI_CPU1_CPU0_DP1
CSI_CPU1_CPU0_DP2
CSI_CPU1_CPU0_DP3
CSI_CPU1_CPU0_DP4
CSI_CPU1_CPU0_DP5
CSI_CPU1_CPU0_DP6
CSI_CPU1_CPU0_DP7
CSI_CPU1_CPU0_DP8
CSI_CPU1_CPU0_DP9
CSI_CPU1_CPU0_DP10
CSI_CPU1_CPU0_DP11
CSI_CPU1_CPU0_DP12
CSI_CPU1_CPU0_DP13
CSI_CPU1_CPU0_DP14
CSI_CPU1_CPU0_DP15
CSI_CPU1_CPU0_DP16
CSI_CPU1_CPU0_DP17
CSI_CPU1_CPU0_DP18
CSI_CPU1_CPU0_DP19

CSI_CPU1_CPU0_DN0
CSI_CPU1_CPU0_DN1
CSI_CPU1_CPU0_DN2
CSI_CPU1_CPU0_DN3
CSI_CPU1_CPU0_DN4
CSI_CPU1_CPU0_DN5
CSI_CPU1_CPU0_DN6
CSI_CPU1_CPU0_DN7
CSI_CPU1_CPU0_DN8
CSI_CPU1_CPU0_DN9
CSI_CPU1_CPU0_DN10
CSI_CPU1_CPU0_DN11
CSI_CPU1_CPU0_DN12
CSI_CPU1_CPU0_DN13
CSI_CPU1_CPU0_DN14
CSI_CPU1_CPU0_DN15
CSI_CPU1_CPU0_DN16
CSI_CPU1_CPU0_DN17
CSI_CPU1_CPU0_DN18
CSI_CPU1_CPU0_DN19

CSI_CPU0_CPU1_DN0
CSI_CPU0_CPU1_DN1
CSI_CPU0_CPU1_DN2
CSI_CPU0_CPU1_DN3
CSI_CPU0_CPU1_DN4
CSI_CPU0_CPU1_DN5
CSI_CPU0_CPU1_DN6
CSI_CPU0_CPU1_DN7
CSI_CPU0_CPU1_DN8
CSI_CPU0_CPU1_DN9
CSI_CPU0_CPU1_DN10
CSI_CPU0_CPU1_DN11
CSI_CPU0_CPU1_DN12
CSI_CPU0_CPU1_DN13
CSI_CPU0_CPU1_DN14
CSI_CPU0_CPU1_DN15
CSI_CPU0_CPU1_DN16
CSI_CPU0_CPU1_DN17
CSI_CPU0_CPU1_DN18
CSI_CPU0_CPU1_DN19

CSI_CPU0_CPU1_DP0
CSI_CPU0_CPU1_DP1
CSI_CPU0_CPU1_DP2
CSI_CPU0_CPU1_DP3
CSI_CPU0_CPU1_DP4
CSI_CPU0_CPU1_DP5
CSI_CPU0_CPU1_DP6
CSI_CPU0_CPU1_DP7
CSI_CPU0_CPU1_DP8
CSI_CPU0_CPU1_DP9
CSI_CPU0_CPU1_DP10
CSI_CPU0_CPU1_DP11
CSI_CPU0_CPU1_DP12
CSI_CPU0_CPU1_DP13
CSI_CPU0_CPU1_DP14
CSI_CPU0_CPU1_DP15
CSI_CPU0_CPU1_DP16
CSI_CPU0_CPU1_DP17
CSI_CPU0_CPU1_DP18
CSI_CPU0_CPU1_DP19

R1370 2.2R0402R1370 2.2R0402

R1382

R1382
100R0402

100R0402

CSI_CPU1_CPU0_DP[0:19] <17>

CSI_CPU1_CPU0_DN[0:19] <17>

CSI_CPU0_CPU1_DN[0:19] <17>

CSI_CPU0_CPU1_DP[0:19] <17>

R1368 0R0402R1368 0R0402
R1369 0R0402R1369 0R0402
R1364 0R0402R1364 0R0402

C1425

C1425
X_C1u6.3X50402

X_C1u6.3X50402

3

M_D_DQ[0:63]<31,32>

M_D_ECC[0:7]<31,32>

M_D_MA_PAR<31,32>

M_D_PAR_ERR_N1<31>
M_D_PAR_ERR_N0<32>

M_D_ODT[0:3]<31,32>

P1V5_DDR3_CPU1_VREF_D_D <31,32>
P1V5_DDR3_CPU1_VREF_E_D <33,34>
P1V5_DDR3_CPU1_VREF_F_D <35,36>

M_D_DQ63
M_D_DQ62
M_D_DQ61
M_D_DQ60
M_D_DQ59
M_D_DQ58
M_D_DQ57
M_D_DQ56
M_D_DQ55
M_D_DQ54
M_D_DQ53
M_D_DQ52
M_D_DQ51
M_D_DQ50
M_D_DQ49
M_D_DQ48
M_D_DQ47
M_D_DQ46
M_D_DQ45
M_D_DQ44
M_D_DQ43
M_D_DQ42
M_D_DQ41
M_D_DQ40
M_D_DQ39
M_D_DQ38
M_D_DQ37
M_D_DQ36
M_D_DQ35
M_D_DQ34
M_D_DQ33
M_D_DQ32
M_D_DQ31
M_D_DQ30
M_D_DQ29
M_D_DQ28
M_D_DQ27
M_D_DQ26
M_D_DQ25
M_D_DQ24
M_D_DQ23
M_D_DQ22
M_D_DQ21
M_D_DQ20
M_D_DQ19
M_D_DQ18
M_D_DQ17
M_D_DQ16
M_D_DQ15
M_D_DQ14
M_D_DQ13
M_D_DQ12
M_D_DQ11
M_D_DQ10
M_D_DQ9
M_D_DQ8
M_D_DQ7
M_D_DQ6
M_D_DQ5
M_D_DQ4
M_D_DQ3
M_D_DQ2
M_D_DQ1
M_D_DQ0

M_D_ECC7
M_D_ECC6
M_D_ECC5
M_D_ECC4
M_D_ECC3
M_D_ECC2
M_D_ECC1
M_D_ECC0

M_D_ODT3
M_D_ODT2
M_D_ODT1
M_D_ODT0

W4

DDR0_DQ<63>

V4

DDR0_DQ<62>

U3

DDR0_DQ<61>

U1

DDR0_DQ<60>

Y3

DDR0_DQ<59>

Y2

DDR0_DQ<58>

V1

DDR0_DQ<57>

U4

DDR0_DQ<56>

T3

DDR0_DQ<55>

R4

DDR0_DQ<54>

N3

DDR0_DQ<53>

M3

DDR0_DQ<52>

T2

DDR0_DQ<51>

T1

DDR0_DQ<50>

N2

DDR0_DQ<49>

N1

DDR0_DQ<48>

L2

DDR0_DQ<47>

L3

DDR0_DQ<46>

H3

DDR0_DQ<45>

G1

DDR0_DQ<44>

M1

DDR0_DQ<43>

L1

DDR0_DQ<42>

H1

DDR0_DQ<41>

H2

DDR0_DQ<40>

F2

DDR0_DQ<39>

F3

DDR0_DQ<38>

C6

DDR0_DQ<37>

B6

DDR0_DQ<36>

G3

DDR0_DQ<35>

F1

DDR0_DQ<34>

C4

DDR0_DQ<33>

B5

DDR0_DQ<32>

B38

DDR0_DQ<31>

C38

DDR0_DQ<30>

D42

DDR0_DQ<29>

D41

DDR0_DQ<28>

D37

DDR0_DQ<27>

A38

DDR0_DQ<26>

C41

DDR0_DQ<25>

D40

DDR0_DQ<24>

F42

DDR0_DQ<23>

F43

DDR0_DQ<22>

J41

DDR0_DQ<21>

J42

DDR0_DQ<20>

E43

DDR0_DQ<19>

E42

DDR0_DQ<18>

H43

DDR0_DQ<17>

H41

DDR0_DQ<16>

L42

DDR0_DQ<15>

L43

DDR0_DQ<14>

P41

DDR0_DQ<13>

P42

DDR0_DQ<12>

K43

DDR0_DQ<11>

K42

DDR0_DQ<10>

N43

DDR0_DQ<9>

N41

DDR0_DQ<8>

T42

DDR0_DQ<7>

U41

DDR0_DQ<6>

W42

DDR0_DQ<5>

W40

DDR0_DQ<4>

R42

DDR0_DQ<3>

R43

DDR0_DQ<2>

V41

DDR0_DQ<1>

W41

DDR0_DQ<0>

C34

DDR0_ECC<7>

B34

DDR0_ECC<6>

A37

DDR0_ECC<5>

C37

DDR0_ECC<4>

C33

DDR0_ECC<3>

F32

DDR0_ECC<2>

A36

DDR0_ECC<1>

C36

DDR0_ECC<0>

B20

DDR0_MA_PAR

A27

DDR0_PAR_ERR_N<2>

B28

DDR0_PAR_ERR_N<1>

D25

DDR0_PAR_ERR_N<0>

C7

DDR0_ODT<3>

B11

DDR0_ODT<2>

C9

DDR0_ODT<1>

F12

DDR0_ODT<0>

CPU1B

CPU1B

Gainstown

Gainstown

2/10

2/10

Gainstown

Gainstown

+5V+3.3V

3

+

+

2

-

-

U90A

U90A
AZ358M-E1

AZ358M-E1

4 8

2

DDR0_DQS_P<17>
DDR0_DQS_P<16>
DDR0_DQS_P<15>
DDR0_DQS_P<14>
DDR0_DQS_P<13>
DDR0_DQS_P<12>
DDR0_DQS_P<11>
DDR0_DQS_P<10>

DDR0_DQS_P<9>
DDR0_DQS_P<8>
DDR0_DQS_P<7>
DDR0_DQS_P<6>
DDR0_DQS_P<5>
DDR0_DQS_P<4>
DDR0_DQS_P<3>
DDR0_DQS_P<2>
DDR0_DQS_P<1>
DDR0_DQS_P<0>

DDR0_DQS_N<17>
DDR0_DQS_N<16>
DDR0_DQS_N<15>
DDR0_DQS_N<14>
DDR0_DQS_N<13>
DDR0_DQS_N<12>
DDR0_DQS_N<11>
DDR0_DQS_N<10>

DDR0_DQS_N<9>
DDR0_DQS_N<8>
DDR0_DQS_N<7>
DDR0_DQS_N<6>
DDR0_DQS_N<5>
DDR0_DQS_N<4>
DDR0_DQS_N<3>
DDR0_DQS_N<2>
DDR0_DQS_N<1>
DDR0_DQS_N<0>

DDR0_MA<15>
DDR0_MA<14>
DDR0_MA<13>
DDR0_MA<12>
DDR0_MA<11>
DDR0_MA<10>

DDR0_MA<9>
DDR0_MA<8>
DDR0_MA<7>
DDR0_MA<6>
DDR0_MA<5>
DDR0_MA<4>
DDR0_MA<3>
DDR0_MA<2>
DDR0_MA<1>
DDR0_MA<0>

DDR0_BA<2>
DDR0_BA<1>
DDR0_BA<0>

DDR0_CLK_P<3>
DDR0_CLK_P<2>
DDR0_CLK_P<1>
DDR0_CLK_P<0>

DDR0_CLK_N<3>
DDR0_CLK_N<2>
DDR0_CLK_N<1>
DDR0_CLK_N<0>

DDR0_CS_N7_DDR_ODT<5>
DDR0_CS_N6_DDR_ODT<4>

DDR0_CS_N<5>
DDR0_CS_N<4>
DDR0_CS_N<3>
DDR0_CS_N<2>
DDR0_CS_N<1>
DDR0_CS_N<0>

DDR0_CKE<3>
DDR0_CKE<2>
DDR0_CKE<1>
DDR0_CKE<0>

DDR0_WE_N
DDR0_RAS_N
DDR0_CAS_N

DDR0_RESET_N

1

M_D_DQS_DP17

B36

M_D_DQS_DP16

V2

M_D_DQS_DP15

P2

M_D_DQS_DP14

J2

M_D_DQS_DP13

D5

M_D_DQS_DP12

D39

M_D_DQS_DP11

H42

M_D_DQS_DP10

N42

M_D_DQS_DP9

V43

M_D_DQS_DP8

D34

M_D_DQS_DP7

W2

M_D_DQS_DP6

R2

M_D_DQS_DP5

K2

M_D_DQS_DP4

E3

M_D_DQS_DP3

B39

M_D_DQS_DP2

F41

M_D_DQS_DP1

L41

M_D_DQS_DP0

T43

M_D_DQS_DN17

B35

M_D_DQS_DN16

V3

M_D_DQS_DN15

P1

M_D_DQS_DN14

J1

M_D_DQS_DN13

D4

M_D_DQS_DN12

C39

M_D_DQS_DN11

G43

M_D_DQS_DN10

M43

M_D_DQS_DN9

V42

M_D_DQS_DN8

D35

M_D_DQS_DN7

W1

M_D_DQS_DN6

R3

M_D_DQS_DN5

K3

M_D_DQS_DN4

E4

M_D_DQS_DN3

B40

M_D_DQS_DN2

G41

M_D_DQS_DN1

M41

M_D_DQS_DN0

U43

M_D_MA15

B29

M_D_MA14

A28

M_D_MA13

A10

M_D_MA12

B26

M_D_MA11

A26

M_D_MA10

B19

M_D_MA9

C26

M_D_MA8

B25

M_D_MA7

A25

M_D_MA6

C24

M_D_MA5

B24

M_D_MA4

B23

M_D_MA3

D24

M_D_MA2

C23

M_D_MA1

B21

M_D_MA0

A20

M_D_BA2

C28

M_D_BA1

A16

M_D_BA0

B16

M_D_CLK_DP3

E20

M_D_CLK_DP2

F18

M_D_CLK_DP1

D19

M_D_CLK_DP0

J19

M_D_CLK_DN3

E19

M_D_CLK_DN2

E18

M_D_CLK_DN1

C19

M_D_CLK_DN0

K19

M_D_CS#_7

B8

M_D_CS#_6

C11

M_D_CS#_5

A7

M_D_CS#_4

B15

M_D_CS#_3

B9

M_D_CS#_2

C13

M_D_CS#_1

B10

M_D_CS#_0

G15

M_D_CKE3

B31

M_D_CKE2

B30

M_D_CKE1

A30

M_D_CKE0

C29
B13

A15
C12

D32

MICRO-START INT'L CO.,LTD.

MICRO-START INT'L CO.,LTD.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet

Date: Sheet

Date: Sheet

MICRO-START INT'L CO.,LTD.

M_D_DQS_DP[0:17] <31,32>

M_D_DQS_DN[0:17] <31,32>

M_D_MA[0:15] <31,32>

M_D_BA[0:2] <31,32>

M_D_CLK_DP[0:3] <31,32>

M_D_CLK_DN[0:3] <31,32>

M_D_CS#_[0:7] <31,32>

M_D_CKE[0:3] <31,32>

M_D_WE# <31,32>
M_D_RAS# <31,32>
M_D_CAS# <31,32>

M_D_RESET# <31,32>

CPU1_CSI & DDR3-D

CPU1_CSI & DDR3-D

CPU1_CSI & DDR3-D

MS-91C2 0A

MS-91C2 0A

MS-91C2 0A

1

of

21 77Thursday, August 28, 2008

of

21 77Thursday, August 28, 2008

of

21 77Thursday, August 28, 2008

5

4

3

2

1

22

CPU1C

CPU1C

Gainstown

M_E_DQ[0:63]<33,34>

D D

C C

B B

A A

M_E_ECC[0:7]<33,34>

M_E_MA_PAR<33,34>

M_E_PAR_ERR_N1<33>
M_E_PAR_ERR_N0<34>

M_E_ODT[0:3]<33,34>

M_E_DQ63
M_E_DQ62
M_E_DQ61
M_E_DQ60
M_E_DQ59
M_E_DQ58
M_E_DQ57
M_E_DQ56
M_E_DQ55
M_E_DQ54
M_E_DQ53
M_E_DQ52
M_E_DQ51
M_E_DQ50
M_E_DQ49
M_E_DQ48
M_E_DQ47
M_E_DQ46
M_E_DQ45
M_E_DQ44
M_E_DQ43
M_E_DQ42
M_E_DQ41
M_E_DQ40
M_E_DQ39
M_E_DQ38
M_E_DQ37
M_E_DQ36
M_E_DQ35
M_E_DQ34
M_E_DQ33
M_E_DQ32
M_E_DQ31
M_E_DQ30
M_E_DQ29
M_E_DQ28
M_E_DQ27
M_E_DQ26
M_E_DQ25
M_E_DQ24
M_E_DQ23
M_E_DQ22
M_E_DQ21
M_E_DQ20
M_E_DQ19
M_E_DQ18
M_E_DQ17
M_E_DQ16
M_E_DQ15
M_E_DQ14
M_E_DQ13
M_E_DQ12
M_E_DQ11
M_E_DQ10
M_E_DQ9
M_E_DQ8
M_E_DQ7
M_E_DQ6
M_E_DQ5
M_E_DQ4
M_E_DQ3
M_E_DQ2
M_E_DQ1
M_E_DQ0

M_E_ECC7
M_E_ECC6
M_E_ECC5
M_E_ECC4
M_E_ECC3
M_E_ECC2
M_E_ECC1
M_E_ECC0

M_E_ODT3
M_E_ODT2
M_E_ODT1
M_E_ODT0

W9

DDR1_DQ<63>

AA7

DDR1_DQ<62>

W5

DDR1_DQ<61>

V9

DDR1_DQ<60>

W10

DDR1_DQ<59>

Y10

DDR1_DQ<58>

W7

DDR1_DQ<57>

W6

DDR1_DQ<56>

R7

DDR1_DQ<55>

R8

DDR1_DQ<54>

M6

DDR1_DQ<53>

J4

DDR1_DQ<52>

T5

DDR1_DQ<51>

R5

DDR1_DQ<50>

K5

DDR1_DQ<49>

K4

DDR1_DQ<48>

J5

DDR1_DQ<47>

G5

DDR1_DQ<46>

H9

DDR1_DQ<45>

G9

DDR1_DQ<44>

H4

DDR1_DQ<43>

G4

DDR1_DQ<42>

J6

DDR1_DQ<41>

H8

DDR1_DQ<40>

F6

DDR1_DQ<39>

D6

DDR1_DQ<38>

G8

DDR1_DQ<37>

F10

DDR1_DQ<36>

F5

DDR1_DQ<35>

E5

DDR1_DQ<34>

E8

DDR1_DQ<33>

E9

DDR1_DQ<32>

K30

DDR1_DQ<31>

L32

DDR1_DQ<30>

H34

DDR1_DQ<29>

J34

DDR1_DQ<28>

J32

DDR1_DQ<27>

K32

DDR1_DQ<26>

L33

DDR1_DQ<25>

H33

DDR1_DQ<24>

H36

DDR1_DQ<23>

J36

DDR1_DQ<22>

M36

DDR1_DQ<21>

N34

DDR1_DQ<20>

J35

DDR1_DQ<19>

K35

DDR1_DQ<18>

M34

DDR1_DQ<17>

M35

DDR1_DQ<16>

N38

DDR1_DQ<15>

N37

DDR1_DQ<14>

R35

DDR1_DQ<13>

R34

DDR1_DQ<12>

N39

DDR1_DQ<11>

P39

DDR1_DQ<10>

P35

DDR1_DQ<9>

P34

DDR1_DQ<8>

Y39

DDR1_DQ<7>

Y40

DDR1_DQ<6>

AB36

DDR1_DQ<5>

AA35

DDR1_DQ<4>

Y34

DDR1_DQ<3>

Y35

DDR1_DQ<2>

AA36

DDR1_DQ<1>

AA37

DDR1_DQ<0>

G35

DDR1_ECC<7>

E34

DDR1_ECC<6>

F37

DDR1_ECC<5>

E37

DDR1_ECC<4>

G36

DDR1_ECC<3>

E33

DDR1_ECC<2>

F36

DDR1_ECC<1>

D36

DDR1_ECC<0>

D20

DDR1_MA_PAR

F25

DDR1_PAR_ERR_N<2>

E25

DDR1_PAR_ERR_N<1>

C22

DDR1_PAR_ERR_N<0>

F11

DDR1_ODT<3>

D14

DDR1_ODT<2>

C8

DDR1_ODT<1>

D11

DDR1_ODT<0>

Gainstown

DDR1_CS_N7_DDR_ODT<5>
DDR1_CS_N6_DDR_ODT<4>

3/10

3/10

Gainstown

Gainstown

DDR1_DQS_P<17>
DDR1_DQS_P<16>
DDR1_DQS_P<15>
DDR1_DQS_P<14>
DDR1_DQS_P<13>
DDR1_DQS_P<12>
DDR1_DQS_P<11>
DDR1_DQS_P<10>

DDR1_DQS_P<9>
DDR1_DQS_P<8>
DDR1_DQS_P<7>
DDR1_DQS_P<6>
DDR1_DQS_P<5>
DDR1_DQS_P<4>
DDR1_DQS_P<3>
DDR1_DQS_P<2>
DDR1_DQS_P<1>
DDR1_DQS_P<0>

DDR1_DQS_N<17>
DDR1_DQS_N<16>
DDR1_DQS_N<15>
DDR1_DQS_N<14>
DDR1_DQS_N<13>
DDR1_DQS_N<12>
DDR1_DQS_N<11>
DDR1_DQS_N<10>

DDR1_DQS_N<9>
DDR1_DQS_N<8>
DDR1_DQS_N<7>
DDR1_DQS_N<6>
DDR1_DQS_N<5>
DDR1_DQS_N<4>
DDR1_DQS_N<3>
DDR1_DQS_N<2>
DDR1_DQS_N<1>
DDR1_DQS_N<0>

DDR0_MA<15>
DDR0_MA<14>
DDR0_MA<13>
DDR0_MA<12>
DDR1_MA<11>
DDR1_MA<10>

DDR1_MA<9>
DDR1_MA<8>
DDR1_MA<7>
DDR1_MA<6>
DDR1_MA<5>
DDR1_MA<4>
DDR1_MA<3>
DDR1_MA<2>
DDR1_MA<1>
DDR1_MA<0>

DDR1_BA<2>
DDR1_BA<1>
DDR1_BA<0>

DDR1_CLK_P<3>
DDR1_CLK_P<2>
DDR1_CLK_P<1>
DDR1_CLK_P<0>

DDR1_CLK_N<3>
DDR1_CLK_N<2>
DDR1_CLK_N<1>
DDR1_CLK_N<0>

DDR1_CS_N<5>
DDR1_CS_N<4>
DDR1_CS_N<3>
DDR1_CS_N<2>
DDR1_CS_N<1>
DDR1_CS_N<0>

DDR1_CKE<3>
DDR1_CKE<2>
DDR1_CKE<1>
DDR1_CKE<0>

DDR1_WE_N
DDR1_RAS_N
DDR1_CAS_N

DDR1_RESET_N

M_E_DQS_DP17

F35

M_E_DQS_DP16

Y4

M_E_DQS_DP15

M5

M_E_DQS_DP14

H7

M_E_DQS_DP13

F8

M_E_DQS_DP12

K34

M_E_DQS_DP11

L37

M_E_DQS_DP10

P36

M_E_DQS_DP9

AA40

M_E_DQS_DP8

G33

M_E_DQS_DP7

Y8

M_E_DQS_DP6

L6

M_E_DQS_DP5

H6

M_E_DQS_DP4

E7

M_E_DQS_DP3

L30

M_E_DQS_DP2

L35

M_E_DQS_DP1

R38

M_E_DQS_DP0

Y38

M_E_DQS_DN17

E35

M_E_DQS_DN16

Y5

M_E_DQS_DN15

M4

M_E_DQS_DN14

J7

M_E_DQS_DN13

F7

M_E_DQS_DN12

K33

M_E_DQS_DN11

K37

M_E_DQS_DN10

P37

M_E_DQS_DN9

AA41

M_E_DQS_DN8

G34

M_E_DQS_DN7

Y9

M_E_DQS_DN6

L5

M_E_DQS_DN5

G6

M_E_DQS_DN4

D7

M_E_DQS_DN3

L31

M_E_DQS_DN2

L36

M_E_DQS_DN1

R37

M_E_DQS_DN0

Y37

M_E_MA15

F26

M_E_MA14

H26

M_E_MA13

B14

M_E_MA12

E24

M_E_MA11

E23

M_E_MA10

H14

M_E_MA9

G24

M_E_MA8

E22

M_E_MA7

D22

M_E_MA6

J27

M_E_MA5

F22

M_E_MA4

K28

M_E_MA3

L28

M_E_MA2

J17

M_E_MA1

J16

M_E_MA0

J14

M_E_BA2

H27

M_E_BA1

K13

M_E_BA0

C18
H18

K18
G19
C21

H19
L18
G20
D21

E12
C14
E10
C17
E13
E15
A8
D12

C27
D27
E27
H28

G13
G14
E14

D29

M_E_CLK_DP3
M_E_CLK_DP2
M_E_CLK_DP1
M_E_CLK_DP0

M_E_CLK_DN3
M_E_CLK_DN2
M_E_CLK_DN1
M_E_CLK_DN0

M_E_CS#_7
M_E_CS#_6
M_E_CS#_5
M_E_CS#_4
M_E_CS#_3
M_E_CS#_2
M_E_CS#_1
M_E_CS#_0

M_E_CKE3
M_E_CKE2
M_E_CKE1
M_E_CKE0

M_E_DQS_DP[0:17] <33,34>

M_E_DQS_DN[0:17] <33,34>

M_E_MA[0:15] <33,34>

M_E_BA[0:2] <33,34>

M_E_CLK_DP[0:3] <33,34>

M_E_CLK_DN[0:3] <33,34>

M_E_CS#_[0:7] <33,34>

M_E_CKE[0:3] <33,34>

M_E_WE# <33,34>
M_E_RAS# <33,34>
M_E_CAS# <33,34>

M_E_RESET# <33,34>

M_F_DQ[0:63]<35,36>

M_F_ECC[0:7]<35,36>

M_F_MA_PAR<35,36>

M_F_PAR_ERR_N1<35>
M_F_PAR_ERR_N0<36>

M_F_ODT[0:3]<35,36>

M_F_DQ63
M_F_DQ62
M_F_DQ61
M_F_DQ60
M_F_DQ59
M_F_DQ58
M_F_DQ57
M_F_DQ56
M_F_DQ55
M_F_DQ54
M_F_DQ53
M_F_DQ52
M_F_DQ51
M_F_DQ50
M_F_DQ49
M_F_DQ48
M_F_DQ47
M_F_DQ46
M_F_DQ45
M_F_DQ44
M_F_DQ43
M_F_DQ42
M_F_DQ41
M_F_DQ40
M_F_DQ39
M_F_DQ38
M_F_DQ37
M_F_DQ36
M_F_DQ35
M_F_DQ34
M_F_DQ33
M_F_DQ32
M_F_DQ31
M_F_DQ30
M_F_DQ29
M_F_DQ28
M_F_DQ27
M_F_DQ26
M_F_DQ25
M_F_DQ24
M_F_DQ23
M_F_DQ22
M_F_DQ21
M_F_DQ20
M_F_DQ19
M_F_DQ18
M_F_DQ17
M_F_DQ16
M_F_DQ15
M_F_DQ14
M_F_DQ13
M_F_DQ12
M_F_DQ11
M_F_DQ10
M_F_DQ9
M_F_DQ8
M_F_DQ7
M_F_DQ6
M_F_DQ5
M_F_DQ4
M_F_DQ3
M_F_DQ2
M_F_DQ1
M_F_DQ0

M_F_ECC7
M_F_ECC6
M_F_ECC5
M_F_ECC4
M_F_ECC3
M_F_ECC2
M_F_ECC1
M_F_ECC0

M_F_ODT3
M_F_ODT2
M_F_ODT1
M_F_ODT0

U9

DDR2_DQ<63>

V8

DDR2_DQ<62>

T7

DDR2_DQ<61>

T6

DDR2_DQ<60>

U10

DDR2_DQ<59>

T10

DDR2_DQ<58>

U6

DDR2_DQ<57>

U5

DDR2_DQ<56>

R9

DDR2_DQ<55>

R10

DDR2_DQ<54>

N7

DDR2_DQ<53>

N8

DDR2_DQ<52>

P10

DDR2_DQ<51>

P9

DDR2_DQ<50>

N6

DDR2_DQ<49>

P7

DDR2_DQ<48>

M8

DDR2_DQ<47>

L8

DDR2_DQ<46>

M10

DDR2_DQ<45>

L11

DDR2_DQ<44>

N9

DDR2_DQ<43>

M9

DDR2_DQ<42>

K10

DDR2_DQ<41>

L10

DDR2_DQ<40>

L12

DDR2_DQ<39>

H12

DDR2_DQ<38>

G10

DDR2_DQ<37>

G11

DDR2_DQ<36>

L13

DDR2_DQ<35>

H13

DDR2_DQ<34>

J12

DDR2_DQ<33>

K12

DDR2_DQ<32>

E38

DDR2_DQ<31>

F38

DDR2_DQ<30>

G39

DDR2_DQ<29>

H39

DDR2_DQ<28>

H37

DDR2_DQ<27>

J37

DDR2_DQ<26>

F40

DDR2_DQ<25>

G40

DDR2_DQ<24>

K38

DDR2_DQ<23>

L40

DDR2_DQ<22>

N36

DDR2_DQ<21>

P40

DDR2_DQ<20>

J39

DDR2_DQ<19>

J40

DDR2_DQ<18>

M40

DDR2_DQ<17>

M39

DDR2_DQ<16>

R40

DDR2_DQ<15>

T41

DDR2_DQ<14>

V39

DDR2_DQ<13>

W39

DDR2_DQ<12>

T36

DDR2_DQ<11>

R39

DDR2_DQ<10>

U39

DDR2_DQ<9>

U38

DDR2_DQ<8>

V38

DDR2_DQ<7>

V37

DDR2_DQ<6>

V34

DDR2_DQ<5>

U34

DDR2_DQ<4>

U36

DDR2_DQ<3>

V36

DDR2_DQ<2>

W35

DDR2_DQ<1>

W34

DDR2_DQ<0>

F30

DDR2_ECC<7>

F31

DDR2_ECC<6>

J30

DDR2_ECC<5>

J31

DDR2_ECC<4>

E30

DDR2_ECC<3>

E29

DDR2_ECC<2>

F33

DDR2_ECC<1>

H32

DDR2_ECC<0>

B18

DDR2_MA_PAR

F23

DDR2_PAR_ERR_N<2>

J25

DDR2_PAR_ERR_N<1>

F21

DDR2_PAR_ERR_N<0>

D10

DDR2_ODT<3>

D15

DDR2_ODT<2>

F13

DDR2_ODT<1>

L16

DDR2_ODT<0>

CPU1D

CPU1D

Gainstown

Gainstown

DDR2_CS_N7_DDR2_ODT<5>
DDR2_CS_N6_DDR2_ODT<4>

4/10

4/10

Gainstown

Gainstown

DDR1_DQS_P<17>
DDR1_DQS_P<16>
DDR1_DQS_P<15>
DDR1_DQS_P<14>
DDR1_DQS_P<13>
DDR1_DQS_P<12>
DDR2_DQS_P<11>
DDR2_DQS_P<10>

DDR2_DQS_P<9>
DDR2_DQS_P<8>
DDR2_DQS_P<7>
DDR2_DQS_P<6>
DDR2_DQS_P<5>
DDR2_DQS_P<4>
DDR2_DQS_P<3>
DDR2_DQS_P<2>
DDR2_DQS_P<1>
DDR2_DQS_P<0>

DDR2_DQS_N<17>
DDR2_DQS_N<16>
DDR2_DQS_N<15>
DDR2_DQS_N<14>
DDR2_DQS_N<13>
DDR2_DQS_N<12>
DDR2_DQS_N<11>
DDR2_DQS_N<10>

DDR2_DQS_N<9>
DDR2_DQS_N<8>
DDR2_DQS_N<7>
DDR2_DQS_N<6>
DDR2_DQS_N<5>
DDR2_DQS_N<4>
DDR2_DQS_N<3>
DDR2_DQS_N<2>
DDR2_DQS_N<1>
DDR2_DQS_N<0>

DDR0_MA<15>
DDR0_MA<14>
DDR0_MA<13>
DDR0_MA<12>
DDR2_MA<11>
DDR2_MA<10>

DDR2_MA<9>
DDR2_MA<8>
DDR2_MA<7>
DDR2_MA<6>
DDR2_MA<5>
DDR2_MA<4>
DDR2_MA<3>
DDR2_MA<2>
DDR2_MA<1>
DDR2_MA<0>

DDR2_BA<2>
DDR2_BA<1>
DDR2_BA<0>

DDR2_CLK_P<3>
DDR2_CLK_P<2>
DDR2_CLK_P<1>
DDR2_CLK_P<0>

DDR2_CLK_N<3>
DDR2_CLK_N<2>
DDR2_CLK_N<1>
DDR2_CLK_N<0>

DDR2_CS_N<5>
DDR2_CS_N<4>
DDR2_CS_N<3>
DDR2_CS_N<2>
DDR2_CS_N<1>
DDR2_CS_N<0>

DDR2_CKE<3>
DDR2_CKE<2>
DDR2_CKE<1>
DDR2_CKE<0>

DDR2_WE_N
DDR2_RAS_N
DDR2_CAS_N

DDR2_RESET_N

H31
V6
N4
K9
H11
H38
M38
U40
U35
G29
U8
P6
L7
J10
E39
K40
T37
W37

G31
V7
P4
K8
J11
G38
L38
T40
T35
G30
T8
P5
K7
J9
E40
K39
T38
W36

G25
H24
F15
G23
H23
H17
H22
L25
J24
K22
K23
F20
J20
G18
K17
A18

L26
F17
A17

L22
H21
L20
J22

L21
G21
K20
J21

J15
L17
D9
E17
H16
D16
K14
G16

L27
D26
G26
J26

C16
D17
F16

E32

M_F_DQS_DP17
M_F_DQS_DP16
M_F_DQS_DP15
M_F_DQS_DP14
M_F_DQS_DP13
M_F_DQS_DP12
M_F_DQS_DP11
M_F_DQS_DP10
M_F_DQS_DP9
M_F_DQS_DP8
M_F_DQS_DP7
M_F_DQS_DP6
M_F_DQS_DP5
M_F_DQS_DP4
M_F_DQS_DP3
M_F_DQS_DP2
M_F_DQS_DP1
M_F_DQS_DP0

M_F_DQS_DN17
M_F_DQS_DN16
M_F_DQS_DN15
M_F_DQS_DN14
M_F_DQS_DN13
M_F_DQS_DN12
M_F_DQS_DN11
M_F_DQS_DN10
M_F_DQS_DN9
M_F_DQS_DN8
M_F_DQS_DN7
M_F_DQS_DN6
M_F_DQS_DN5
M_F_DQS_DN4
M_F_DQS_DN3
M_F_DQS_DN2
M_F_DQS_DN1
M_F_DQS_DN0

M_F_MA15
M_F_MA14
M_F_MA13
M_F_MA12
M_F_MA11
M_F_MA10
M_F_MA9
M_F_MA8
M_F_MA7
M_F_MA6
M_F_MA5
M_F_MA4
M_F_MA3
M_F_MA2
M_F_MA1
M_F_MA0

M_F_BA2
M_F_BA1
M_F_BA0

M_F_CLK_DP3
M_F_CLK_DP2
M_F_CLK_DP1
M_F_CLK_DP0

M_F_CLK_DN3
M_F_CLK_DN2
M_F_CLK_DN1
M_F_CLK_DN0

M_F_CS#_7
M_F_CS#_6
M_F_CS#_5
M_F_CS#_4
M_F_CS#_3
M_F_CS#_2
M_F_CS#_1
M_F_CS#_0

M_F_CKE3
M_F_CKE2
M_F_CKE1
M_F_CKE0

M_F_DQS_DP[0:17] <35,36>

M_F_DQS_DN[0:17] <35,36>

M_F_MA[0:15] <35,36>

M_F_BA[0:2] <35,36>

M_F_CLK_DP[0:3] <35,36>

M_F_CLK_DN[0:3] <35,36>

M_F_CS#_[0:7] <35,36>

M_F_CKE[0:3] <35,36>

M_F_WE# <35,36>
M_F_RAS# <35,36>
M_F_CAS# <35,36>

M_F_RESET# <35,36>

MICRO-START INT'L CO.,LTD.

MICRO-START INT'L CO.,LTD.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet

Date: Sheet

5

4

3

2

Date: Sheet

MICRO-START INT'L CO.,LTD.

CPU1_DDR3-E & F

CPU1_DDR3-E & F

CPU1_DDR3-E & F

MS-91C2 0A

MS-91C2 0A

MS-91C2 0A

1

of

22 77Thursday, August 28, 2008

of

22 77Thursday, August 28, 2008

of

22 77Thursday, August 28, 2008

5

4

3

2

1

CPU1E

RST_CPU_RESET_N<19,38,68>
CSI_CATERR_N<19,66>
CSI_CPU1_THERMTRIP_N<66>
CSI_CPU1_PRCHT_N<66>
CSI_CPU1_SKTOCC_N<69,70>

D D

C C

B B

IRQ_CPU1_RDIMM_EVENT_N<31,32,33,34,35,36,43>

PECI_CPU<19,50>

CLK_133M_CPU1_DP<15>
CLK_133M_CPU1_DN<15>
CLK_133M_CPU1_ITP_DP<67>
CLK_133M_CPU1_ITP_DN<67>

PWRGD_CPU_GTL<19,44,68>
PWRGD_CPU1_VDD_GTL<10>

VID_CPU1[0:7]<4>

CPU1_VTT_VID<6>
FM_CPU1_PSI_N<4>

VR_CPU1_IOUT<4>
VSENSE_DIE_CPU1_P<4>

VSENSE_DIE_CPU1_N<4>

VSENSE_DIE_CPU1_VTT_P<6>
VSENSE_DIE_CPU1_VTT_N<6>

XDP_CPU1_PRDY_N<68>
XDP_CPU1_PREQ_N<68>

XDP_CPU1_MBP_N[0:7]<67>

JTAG_CPU_TRST_N<19,68>
JTAG_CPU_TCLK<19,68>
JTAG_CPU_TMS<19,68>
JTAG_CPU1_TDI<68>
JTAG_CPU1_TDO<68>

CSI_CPU1_CMPSTH
M_CPU1_DDR_COMP[2]

M_CPU1_DDR_COMP[1]
M_CPU1_DDR_COMP[0]

FM_PECI_CPU1_ID

PWRGD_CPU1_VTT_GTL

VID_CPU17
VID_CPU16
VID_CPU15
VID_CPU14
VID_CPU13
VID_CPU12
VID_CPU11
VID_CPU10

P1V5_DDR3_VREF_CPU1
PV_VTT_VREF_CPU1

XDP_CPU1_MBP_N7
XDP_CPU1_MBP_N6
XDP_CPU1_MBP_N5
XDP_CPU1_MBP_N4
XDP_CPU1_MBP_N3
XDP_CPU1_MBP_N2
XDP_CPU1_MBP_N1
XDP_CPU1_MBP_N0

AL39

RESET_N

AC37

CAT_ERR_N

AG37

THERMTRIP_N

AG35

PROCHOT_N

AG36

SKTOCC_N

AB5

DDR_THERM_N

AB41

COMP0

AC1

DDR_COMP<2>

Y7

DDR_COMP<1>

AA8

DDR_COMP<0>

AH36

PECI

AK35

PECI_ID

AJ35

BCLK_DP

AH35

BCLK_DN

AA5

BCLK_ITP_DP

AA4
AR7

AA6

AB35

AN8
AP8
AP9

AN10

AM10

AN9
AL9

AL10

AV6
AP7

L23

AJ37

AK8
AR9

AR8

AE36
AE37

AF10

B41
C42

AH9
AH10
AG10

AJ9

AJ10

E2
D2
C3
D1
B4
C2
A5
B3

BCLK_ITP_DN
VCCPWRGOOD

VDDPWRGOOD
VTTPWRGOOD

VID<7>
VID<6>
VID5_CSC<2>
VID4_CSC<1>
VID3_CSC<0>
VID2_MSID<2>
VID1_MSID<1>
VID0_MSID<0>
VTT_VID
PSI_N

DDR_VREF
GTLREF

ISENSE
VCC_SENSE

VSS_SENSE
VTTD_SENSE

VSS_SENSE_VTTD
DBR_N

PRDY_N
PREQ_N

BPM_N<7>
BPM_N<6>
BPM_N<5>
BPM_N<4>
BPM_N<3>
BPM_N<2>
BPM_N<1>
BPM_N<0>

TRST_N
TCK
TMS
TDI
TDO

R15949.9R1% R15949.9R1%

CPU1E

Gainstown

Gainstown

5/10

5/10

Gainstown

Gainstown

RSVD<66>
RSVD<65>
RSVD<64>
RSVD<63>
RSVD<62>
RSVD<61>
RSVD<60>
RSVD<59>
RSVD<58>
RSVD<57>
RSVD<56>
RSVD<55>
RSVD<54>
RSVD<53>
RSVD<52>
RSVD<51>
RSVD<50>
RSVD<49>
RSVD<48>
RSVD<47>
RSVD<46>
RSVD<45>
RSVD<44>
RSVD<43>
RSVD<42>
RSVD<41>
RSVD<40>
RSVD<39>
RSVD<38>
RSVD<37>
RSVD<36>
RSVD<35>
RSVD<34>

RSVD<32>
RSVD<31>
RSVD<30>
RSVD<29>
RSVD<28>
RSVD<27>
RSVD<26>
RSVD<25>
RSVD<24>
RSVD<23>
RSVD<22>
RSVD<21>
RSVD<20>
RSVD<19>

RSVD<17>
RSVD<16>
RSVD<15>
RSVD<14>
RSVD<13>
RSVD<12>
RSVD<11>
RSVD<10>

RSVD<9>
RSVD<8>
RSVD<7>
RSVD<6>
RSVD<5>
RSVD<4>
RSVD<3>
RSVD<2>
RSVD<1>
RSVD<0>

B33
F27
K25
K27
D30
K29
J29
G28
H29
E28
F28
A31
C32
C31
D31
AL3
AL38
AG1
AF1
AK7
AT5
AT4
V11
U11
A40
AL4
AL5
AL41
AL40
K24
AK36
K15
L15

AU2
BA40
AY40
AW41
AY41
AW42
AV43
AV42
AV1
AY3
AW2
AV2
AY4
BA4

AF4
AF7
AG4
AG5
AH5
AK2
AM36
AM38
AN36
AN38
AR36
AR37
AT36
AV3
AV35
AW39
AY35
AY39

+1.1V_VTT_CPU1

R877

R877
1KR1%

1KR1%

CPU1_VTT_VID2 <6>

XDP_CPU_TAPPWRGD <19,68>

R1163 X_1KR1%R1163 X_1KR1%

CPU1_VTT_VID1 <6>

PWRGD_CPU1_VTT<6,8,9,11,14>

+1.1V_VTT_CPU1

R114 4.7KRR114 4.7KR

CSI_CPU1_THERMTRIP_N

+3.3VDUAL

R136 4.7KR0402R136 4.7KR0402
R180 21RSTR180 21RST
R102 21RSTR102 21RST
R174 49.9R1%R174 49.9R1%
R185 130R1%R185 130R1%
R176 24.9RSTR176 24.9RST
R172 100R1%R172 100R1%

G

CSI_CPU1_SKTOCC_N

CSI_CPU1_CMPSTH
M_CPU1_DDR_COMP[2]
M_CPU1_DDR_COMP[1]
M_CPU1_DDR_COMP[0]

RST_CPU_RESET_N
CSI_CATERR_N

+1.1V_VTT_CPU1+5V

R157

R157
1KR1%

1KR1%

DS

Q21

Q21
N-2N7002

N-2N7002

R165

R165
100R

100R

Q24

Q24

N-PMBS3904

N-PMBS3904

close to CPU1

R147 45.3R1%0402R147 45.3R1%0402

CSI_CPU1_CMP1 <21>
CSI_CPU1_CMP0 <21>

+1.1V_VTT_CPU1

R104 X_49.9R1%R104 X_49.9R1%
R168 75R_0402R168 75R_0402

PWRGD_CPU1_VTT_GTL

+1.1V_VTT_CPU1

CSI_CPU1_SKTOCC_N <69,70>

C85

C85
C0.1u16X0402

C0.1u16X0402

23

+1.1V_VTT_CPU1+1.5V_DDR3_CPU1+1.1V_VTT_CPU1 +1.1V_VTT_CPU1

R898

R115

R115
X_100R1%0402

A A

X_100R1%0402

R116

R116
X_100R1%0402

X_100R1%0402

5

C93

C93
X_C0.1u16X0402

X_C0.1u16X0402

R898
X_100R1%0402

X_100R1%0402

R893

R893
X_100R1%0402

X_100R1%0402

C834

C834
X_C0.1u16X0402

X_C0.1u16X0402

4

R108

R108

49.9R1%

49.9R1%

FM_PECI_CPU1_IDP1V5_DDR3_VREF_CPU1PV_VTT_VREF_CPU1 FM_CPU1_PSI_N

R109

R109
X_49.9R1%

X_49.9R1%

R853

R853
X_1KR1%0402

X_1KR1%0402

R847

R847
1KR1%0402

1KR1%0402

3

MICRO-START INT'L CO.,LTD.

MICRO-START INT'L CO.,LTD.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet

Date: Sheet of

2

Date: Sheet of

MICRO-START INT'L CO.,LTD.

CPU1_XDP & VID

CPU1_XDP & VID

CPU1_XDP & VID

MS-91C2 0A

MS-91C2 0A

MS-91C2 0A

1

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23 77Thursday, August 28, 2008

23 77Thursday, August 28, 2008

23 77Thursday, August 28, 2008