MSI MS-9196 Schematic 0a_0502

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TITLE

Cover / Table of Contents
System Block Diagram
System Voltage Table / Board Stackup
Power Delivery Block Diagram
System Clock Block Diagram
System Reset Block Diagram
System SMBus Block Diagram
XDP Block Diagram
CPU0 SIGNAL
CPU0 POWER / PECI
CPU0 GND
CPU1 SIGNAL
CPU1 POWER
CPU1 GND
5000P CPU
5000P FBD
5000P PCI-E
5000P POWER/GND
FB DIMM11~13
FB DIMM21~23
FB DIMM31~33

MSI

Version: 0.ASSI EEB (12"X13")

Intel 5000P + 632xESB Schematics

FB DIMM41~4322
23
24
25
26
27
28
29
30
31
32
33
34

B B

35
36
37
38

39~40

PCI-Express X8/X4 Slots

632xESB PCI / PCI-X

632xESB PCIE/ESI/LAN/USB/FRU

632xESB SATA/IDE/RTC/SMBUS

632xESB Power/GND

PCI / PCI-X SLOTs (PCI1/PCI2)

PCI Express X8 Slot and Thermtrip

GILGAL LAN

CLOCKGEN / CLOCK BUFFER

PILOT2 PCI-E/LPC/USB/DDR

PILOT2 BMC MODULES

PILOT2 UART & OSC

PILOT2 POWER

PILOT2 MSIC

PILOT2 LAN

FAN & HW MONITOR

CPU1 VRD

41~42 CPU2 VRD

43
44
45
46

POWER 1.8V

POWER 1.5V

POWER P_VTT

PLD / XDP

CPU BSEL47
48
49
50
51
52

A A

53

SYSTEM POWER / BIOS /TPM

POWER CONN & Front Panel

PECI

SGPIO CPLD

MISC

GPIO Maping

Reset and Pwr Good PLD Logic54
55
56
57
58

5

Power On/Off Sequence

System Reset Sequence

History

Reserved Page

MICRO-STAR INT'L CO.,LTD

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MS-9196

MS-9196

MSI

MSI

MSI

Size Document Description Rev

Size Document Description Rev

Size Document Description Rev

Custom

Custom

Custom

Date:

Wednesday, May 02, 2007

Date:

Wednesday, May 02, 2007

Date:

4

3

2

Wednesday, May 02, 2007

MS-9196

COVER SHEET

COVER SHEET

COVER SHEET

1

Sheet of

Sheet of

Sheet of

158

158

158

00A

00A

00A

5

4

3

2

1

MS-9196 SYSTEM BLOCK DIAGRAM

CPU0 Intel
FC-LGA4 771

D D

VRD 11
VT1115M
5-Phase PWM

VRD VRD

Woodcrest/
Clovertown

FSB0

1066/1333MHz

Dempsey/

CPU1 Intel
FC-LGA4 771
Dempsey/
Woodcrest/
Clovertown

FSB1

1066/1333MHz

VRM 11
VT1115M
5-Phase PWM

Spec

* Dual LGA-771 CPU
* Intel 500P / 632XESB Chipset
* 8 Layer E-ATX Form Factor (12" X 13")
* 12 Fully-Buffered DIMM (4 Channel)
* USB 2.0 (Rear x2, Front x2, Internal x2)
* 4 PCI-E X 8 Slot
* 1 PCI-64 slot

FBD

PCI-E X8 SLOT PCI5

PCI-E X8 SLOT PCI4

C C

PCI-E X8 SLOT PCI6

For RAID Card

PCI-E X8 SLOT PCI3

PCI Express X8

BW = 4GB/s

PCI Express X4

BW = 2GB/s

PCI Express X4

BW = 2GB/s

PCI EXPRESS X8

BW = 4GB/s

5000P

PCIE X8 BUS

ESI X 4 BUS

FBD CH0

FBD CH1

FBD

FBD CH2

FBD CH3

Ultra DMA 66/100

FBD

FBD

ATA Primary

* 1 PCI-32 slot
* ServerEngines Pilot II
* Dual Giga-Lan Gilgal
* Serial ATA x4 + IDE x1

PCI-64 SLOT PCI2

B B

PCI-32 SLOT PCI1

GbE PHY (2ch)

Intel 82563EB

PCI-X 133

BW = 1.06MB/s

PCI-32

Gilgsl PHY BUS

632xESB

LPC Bus

PCI-E X1

SATA 3.0Gb/s

USB 2.0

USB X1

ServerEngines

PilotII

SATA 0~5

USB2.0 Port 0~5

Port #0,1 Front
Port #2,3 Rear
Port #4,5 Internal

SGPIO

cPLD

SGPIO1
SGPIO2

SGPIO Headers

PHY

RJ-45 RJ-45

A A

PS2 - KB Serial Port

FWH

5

TPM 1.2

4

PS2 - MS

VGA CONN

LAN Port

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MS-9196

MS-9196

MSI

MSI

MSI

Size Document Description Rev

Size Document Description Rev

Size Document Description Rev

Custom

Custom

Custom

Date:

Wednesday, May 02, 2007

Date:

Wednesday, May 02, 2007

Date:

3

2

Wednesday, May 02, 2007

MS-9196

SYSTEM BLOCK DIAGRAM

SYSTEM BLOCK DIAGRAM

SYSTEM BLOCK DIAGRAM

1

Sheet of

Sheet of

Sheet of

00A

00A

00A

258

258

258

Voltage Table and Board Stackup

Voltage Level

Netname

Generated From

1

Board Stack-up

62+8/-5mils

+3.3V

+5V

+5V STBY

-12V
+12V1
+12V2
+12V3
+12V4 P12V4 AC

VID_CPU0 P12V1
VID_CPU1

A A

+1.2V
+1.5V

+1.5V AUX

+1.8V
+0.9V

+3.3V STBY
+3.3V AUX

P3V3
P5V
P5VSB
P-12V

P12V1
P12V2
P12V3

AC
AC
AC
AC
AC
AC
AC

VCORE0
VCORE1

P_VTT

P1V5

P1V5_AUX

P12V2
P5V

P12V4
P3V3_AUX

P1V8 P12V3

P0V9 P1V8

P3VSB

P5VSB

P3V3_AUX P3V3 / P3VSB

Solder Mask

L1

L2

L3

L4

L5

L6

L7

L8

Solder Mask

PREPREG 4mils

CORE 4mils

PREPREG 12mils

CORE 9.3mils

PREPREG 12mils

CORE 4mils

PREPREG 4mils

Outer Impedances

Target Actual Line Space

60ohms
55ohms
50ohms
100ohms-diff
90ohms-diff
85ohms-diff

59.76 4.0 N/A

54.96

50.80

100.50

88.58

85.48

Inner Impedances

Target Actual Line Space

50ohms
48ohms
100ohms-diff
90ohms-diff
85ohms-diff

50.80

48.66

97.82

89.08

84.86 5.0

N/A

5.0
N/A

6.0

6.0

4.0

5.0

5.0

6.0

6.0

4.5 N/A
N/A

5.0

9.0

4.0

5.0

8.0

6.5

0.65mils Solder Mask

1.5 oz. (1.8mils) Cu plus plating

1 oz. (1.3mils) Cu GND Plane

1 oz. (1.3mils) Cu INT3 Plane

1 oz. (1.3mils) Cu Power Plane

1 oz. (1.3mils) Cu Power Plane

1 oz. (1.3mils) Cu INT6 Plane

1 oz. (1.3mils) Cu GND Plane

1.5 oz. (1.8mils) Cu plus plating

0.65mils Solder Mask

+1.8V1 AUX
+1.2V1 AUX
+1.8V2 AUX

+1.2V2 AUX

P1V8LAN
P1V2LAN

P1V8AUX
P1V2AUX

P3V3_AUX
P3V3_AUX
P3V3_AUX
P3V3_AUX

MICRO-STAR INT'L CO.,LTD

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MS-9196

MS-9196

MSI

MSI

MSI

Size Document Description Rev

Size Document Description Rev

Size Document Description Rev

Custom

Custom

Custom

Date:

Wednesday, May 02, 2007

Date:

Wednesday, May 02, 2007

Date:

1

Wednesday, May 02, 2007

MS-9196

Voltage Table and Board Stackup

Voltage Table and Board Stackup

Voltage Table and Board Stackup

Sheet of

Sheet of

Sheet of

00A

00A

00A

358

358

358

5

4

3

2

1

MS-9196 POWER DELIEVERY DIAGRAM

D D

P12V1

VRD11 CPU0

P3V3

SWITCH

P3V3_AUX

1.5V

P12V2

VRD11 CPU1

P5VSB

3.3V
REG

P3VSB

REG

1.8V

C C

P12V3

1.8V
REG

P1V8

FB DIMM

REG

1.2V

P1V5_AUX

P1V8LAN

P1V2LAN

ESB2

GILGAL

GILGAL

REG

1.8V

P0V9

FBD VTT

REG

BMC
PHY

P12V4

1.5V
REG

P1V5

MCH
ESB2

PCI-E, PCI-X,
PCI SLOTS

B B

P12V4

1.2V
REG

P_VTT

FSB VTT

1.8V
REG

1.2V

P1V8AUX

P1V2AUX

BMC

BMC

REG

A A

MICRO-STAR INT'L CO.,LTD

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MS-9196

MS-9196

MSI

MSI

MSI

Size Document Description Rev

Size Document Description Rev

Size Document Description Rev

B

B

B

Date:

Wednesday, May 02, 2007

Date:

Wednesday, May 02, 2007

Date:

Wednesday, May 02, 2007

5

4

3

2

MS-9196

POWER DELIVERY BLOCK

POWER DELIVERY BLOCK

POWER DELIVERY BLOCK

Sheet of

Sheet of

Sheet of

1

00A

00A

00A

458

458

458

1

Clock Block Diagram

DB1900

CPU_2P/N

CPU_3P/N

CPU_1P/N

CPU_0P/N

BCLK 267/333MHz

CK_H_P0 (267/333MHz)

CK_H_P1 (267/333MHz)

CK_H_FBD (267/333MHz)

CK_H_MCH (267/333MHz)

CORECLKP/N

MCH_100CLK
(100MHz)

BCLK0/1

BCLK0/1

5000P

PECLKP/N

CPU0

CPU1

FBD01CLKP/N

FBD23CLKP/N

SRC_1P/N

SRC_2P/N

DIF_3P/N

SRC_4P/N

SRC_INP/N

DIF_6P/N

DIF_5P/N

DB800

ICS932S401

A A

Serial Ref Clk 100MHz

USB_48

PCIF_1

REF_1

PCIF_2

CK_48M_ESB

ESB2_PCLK

ESB_14MHZ

SIO_PCLK

DIF_4P/N

PILOT II

LCLK

DIF_2P/N

DIF_1P/N

DIF_0P/N

PCIE_CLK

CLKI

XDP (CPU)

SLOT6_100CLK

SLOT5_100CLK

SLOT4_100CLK

SLOT3_100CLK

ESI_100CLK_P/N (100MHz)

ESB2_100CLK_P/N (100MHz)

SATA_100CLK_P/N (100MHz)

CK_48M_PILOT

CLK

FBD01CLK_P/N

FBD23CLK_P/N

PCI6:PCI-E X8

PCI5:PCI-E X8

PCI4:PCI-E X8

PCI3:PCI-E X8

OSC2

XDP0_BCLK_P/N

DIF_17P/N

CLK_INP/N

DIF_15P/N

DIF_16P/N

ESICLK100P/N

PECLKP/N

SATACLKP/N

632xESB

CLK48

PCICLK

CLK14

32.768KHz
Crystal

DIF_0P/N

DIF_1P/N

DIF_2P/N

DIF_3P/N

DIF_4P/N

DIF_5P/N

DIF_6P/N

DIF_7P/N

DIF_8P/N

DIF_9P/N

DIF_10P/N

DIF_11P/N

SER_CLK_IN

PXPCLKO_0

PXPCLKO_6

PXPCLKI

PXPCLK0

CK_H_FBD0_P/N

CK_H_FBD1_P/N

CK_H_FBD2_P/N

CK_H_FBD3_P/N

CK_H_FBD4_P/N

CK_H_FBD5_P/N

CK_H_FBD6_P/N

CK_H_FBD7_P/N

CK_H_FBD8_P/N

CK_H_FBD9_P/N

CK_H_FBD10_P/N

CK_H_FBD11_P/N

SK_LAN_CLK

Gilgal LAN

PHY_CLK_OUT

25MHz
Crystal

PCI1:PCI-X

SCKP/N

SCKP/N

SCKP/N

SCKP/N

SCKP/N

SCKP/N

SCKP/N

SCKP/N

SCKP/N

SCKP/N

SCKP/N

SCKP/N

FB DIMM11

FB DIMM12

FB DIMM13

FB DIMM21

FB DIMM22

FB DIMM23

FB DIMM31

FB DIMM32

FB DIMM33

FB DIMM41

FB DIMM42

FB DIMM43

14.318MHz
Crystal

PCIF_0

PCI_0

PCI_2

PCI_3

XDP0_33MHZ_CLK

FWH_PCLK

PCI_CLK0

PLD_33MHZ_CLK

XDP

FWH

PCI2:PCI32

PLD

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MS-9196

MS-9196

MSI

MSI

MSI

Size Document Description Rev

Size Document Description Rev

Size Document Description Rev

Custom

Custom

Custom

Date:

Wednesday, May 02, 2007

Date:

Wednesday, May 02, 2007

Date:

1

Wednesday, May 02, 2007

MS-9196

SYSTEM CLOCK BLOCK DIAGRAM

SYSTEM CLOCK BLOCK DIAGRAM

SYSTEM CLOCK BLOCK DIAGRAM

558

558

558

Sheet of

Sheet of

Sheet of

00A

00A

00A

System Reset Block Diagram

1

VRM0_PWRGD

CK410B

PWRDOWN

DB800

PWRDOWN_N

CPU_VRD_PWRGD

EPLD

CPU0_SKTOCC#

VRM1_PWRGD

CPU1_SKTOCC#

POWER SUPPLY

PWOK

PSON#

ONCTL#

VDDPWR_GD

PILOT II

EPLD

PS_PWROK_BUF

GPIO8

PWBTOUTn

SLPS3n

SLPS5n

CPU_VRD_PWRGD

EPLD

100 ms

Delay

PWR_BT_SSI_#

SYS_PWRGD_BUFF

3.3V STBY

SYS_PWRGD_3_3V

RSMRST#

PWRBTN_N

SLP_S3_N

SLP_S4_N

PERST_N

PXPWROK

PWROK

VRMPWRGD

RSMRST_N

LAN_PWR_GD

PWR BTN

3.3VAUX

10Kohms

GND

PWR_BT_IN#

A A

PLTRST_BUFF1#

THERMTRIP0_N

THERMTRIP1_N

ONCTLn

PWBTINn

PCIRSTn

GPIO19

GPIO20

RST BTN

GND

ESB_SYS_RST_N

SYS_RESET_N

632xESB

PHY_PWR_DOWN

PHY_SLEEP

PHY_PWR_GD

10Kohms

3.3VAUX

PHYRST_0_N

PHY_RESET_N

Pwrgd

CPU1 VRD

Pwrgd

CPU_PWR_GD

PLTRST_IN_N

PXPCIRST_N

THRMTRIP_N

Gilgal

CPU0 VRD

OE

VID[6..0]

OE

VID[6..0]

INIT_N

INIT3_3V_N

PLTRST_N

PCIRST_N

GPIO33

THERMTRIP_N

VRD0_EN

P0VID[6..0]

VRD1_EN

P1VID[6..0]

CPU_PWRGD

INIT#_3_3V

ESB_PLTRST#

PCIRST_N

PXPCIRST_N

EPLD

EPLD
CPU0

EPLD
CPU1

FSB_INIT#

FWH

INIT#

EPLD

PCI32 Slot

PCIX Slot

FBD_RESET

PLTRST_BUFF2#

SYS_PWRGD_3_3V

RST_N

PLTRST_BUFF1#

ESB_SYS_RST_N

PLTRST_N

PCIE_RST#

DBR_N

INIT_N

PWRGOOD

DBR_N

INIT_N

PWRGOOD

IDE_RSTDRV_N

IDE

5000P

PLTRST_N

PCIE_RST4#

PCIE_RST1#

PCIE_RST2#

PCIE_RST3#

FSB VTT VRD

VTTPWRGD

CPU0

CPU1

THERMTRIP_N

RESET#

VTTPWRGD

THERMTRIP_N

RESET#

FSB1RESET_N

FSB0RESET_N

PWRGOOD

SYS_PWRGD_3_3V

EPLD

SYS_PWRGD_3_3V

GLUE
LOGIC

PCI EXPRESS (SLOT #3)

PCI EXPRESS (SLOT #4)

PCI EXPRESS (SLOT #5)

PCI EXPRESS (SLOT #6)

FSB1_THERMTRIP_N

FSB1_RESET_N

FSB0_RESET_N

FBD_BR0_RST#
FBD_BR1_RST#

Level

STAT

VTT_PWRGD

FSB0_THERMTRIP_N

Translation
GTL to 3.3V

Level
Translation

3.3V to GTL

ESB_SYS_RST_N

RESET_IN#

PWRGOOD

DIMM#00,01,02,10,11,12
DIMM#20,21,22,30,31,32

VTT_PWRGD_3_3V

PLD_VTT_PWRGD_3_3V

GLUE

LOGIC

RESET_OUT#

XDP

EPLD

THERMTRIP_N
THERMTRIP0_N
THERMTRIP1_N

ESB2

PILOT

MICRO-STAR INT'L CO.,LTD

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MS-9196

MS-9196

MSI

MSI

MSI

Size Document Description Rev

Size Document Description Rev

Size Document Description Rev

Custom

Custom

Custom

Date:

Wednesday, May 02, 2007

Date:

Wednesday, May 02, 2007

Date:

1

Wednesday, May 02, 2007

MS-9196

RESET BLOCK DIAGRAM

RESET BLOCK DIAGRAM

RESET BLOCK DIAGRAM

Sheet of

Sheet of

Sheet of

00A

00A

00A

658

658

658

SMBus Block Diagram

1

CPU0 VCORE
VRD11

ADDR

CPU1 VCORE
VRD11

ADDR

1.8V VREG

ADDR

1.5V VREG

ADDR

CLK410B

ADDR 0XD2

ADDR 0XDC

ADDR 0XDE

MAIN_SMBus

DB800

DB1900

SPD0SDA/SPD0SCL
(Master SPD, 100KHz)

5000P

SPD1SDA/SPD1SCL

(Master SPD, 100KHz)

SPD2SDA/SPD2SCL

(Master SPD, 100KHz)

SPD3SDA/SPD3SCL

(Master SPD, 100KHz)

CFGSMBDATA/CFGSMBCLK

(Slave, 100KHz, 0XC0)

3.3V

DIMM #00

Serial EEPROM: 0XA0
AMB:ADDR 0XB0

3.3V MCH_SPD0_SMB

DIMM #10 DIMM #11 DIMM #12

Serial EEPROM: 0XA0
AMB:ADDR 0XB0

3.3V

DIMM #20

Serial EEPROM: 0XA0
AMB:ADDR 0XB0

3.3V MCH_SPD2_SMB

DIMM #30 DIMM #31 DIMM #32

Serial EEPROM: 0XA0
AMB:ADDR 0XB0

3.3V

MCH_SPD1_SMB

MCH_SPD3_SMB

PCI-X Slot

PCI Slot

DIMM #01

Serial EEPROM: 0XA2
AMB:ADDR 0XB2

Serial EEPROM: 0XA2 Serial EEPROM: 0XA4
AMB:ADDR 0XB2

DIMM #21

Serial EEPROM: 0XA2
AMB:ADDR 0XB2

Serial EEPROM: 0XA2 Serial EEPROM: 0XA4
AMB:ADDR 0XB2

DIMM #02

Serial EEPROM: 0XA4

AMB:ADDR 0XB4

AMB:ADDR 0XB4

DIMM #22

Serial EEPROM: 0XA4

AMB:ADDR 0XB4

AMB:ADDR 0XB4

SDA0/SCL0

SMBus

Selector

SDA1/SCL1

SDA2/SCL2

SDA3/SCL3

SDA/SCL

632xESB

A A

SMBDATA/SMBCLK

3.3V AUX

5VSB

PCA9515

SMBus Isolator

3.3V AUX

PCA9515

SMBus Isolator

3.3V AUX

SDA5/SCL5

SDA1/SCL1

SDA2/SCL2

FRU ROM

ADDR 0XAE

PCA9515

SMBus Isolator

IPMB Header

3.3V AUX

PCI-E X8 Slot

PCI-E X8 Slot

PCI-E X8 Slot

PCI-E X8 Slot

SDA3/SCL3

3.3V AUX

HW Monitor

ADT7462

ADDR

HW Monitor

ADT7462

ADDR

POWER
SUPPLY

ADDR

5VSB

PCA9515

SMBus Isolator

3.3V AUX

Front Panel

ADDR

SDA4/SCL4

PILOT II

1

SDA6/SCL6

3.3V AUX

PCA9515

SMBus Isolator

PECI
CY8C21234

ADDR 0X

MICRO-STAR INT'L CO.,LTD

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MS-9196

MS-9196

MSI

MSI

MSI

Size Document Description Rev

Size Document Description Rev

Size Document Description Rev

Custom

Custom

Custom

Date:

Wednesday, May 02, 2007

Date:

Wednesday, May 02, 2007

Date:

Wednesday, May 02, 2007

MS-9196

SMBUS BLOCK DIAGRAM

SMBUS BLOCK DIAGRAM

SMBUS BLOCK DIAGRAM

Sheet of

Sheet of

Sheet of

758

758

758

00A

00A

00A

JTAG Block Diagram

1

P_VTT

XDP0_TDI_MAIN

TDI

TCK0

51 OHM

XDP0_TDI_FSB0

TDI

CPU0

TMS TRST#

TDO

TCK

XDP0_TCK0

1
2

CPU XDP0
Connector

0

3
4

XDP0_TDO_FSB0
XDP0_TDI_MAIN_JMP

TDO

TMS

TRST#

A A

0 OHM

P_VTT

51 OHM

XDP0_TDI_MCH

TDI

TMS

TCK1

XDP0_TDO_MAIN
XDP0_TMS_MAIN
XDP0_TRST#

TRST#

MCH

TCK

TDO

MCH in chain

51 OHM

GND

XDP0_TDO_MCH

P_VTT

51 OHM

P_VTT

51 OHM

XDP0_TDI_FSB1

P_VTT

51 OHM

1
2

1

3
4

GTL-TTL

Translator

TRST#

TDO

TDI

TMS TRST#

TDI

CPU1

XDP0_TDO_FSB1

TDO

TCK

51 OHM

GND

XDP0_TDI_ESB
XDP0_TRST_ESB#

1K OHM

GND

P_VTT

51 OHM

TDI
TRST#

XDP0_TMS_ESB

TMS

TMS

ESB2

GTL-TTL

Translator

ESB2 in chain

TDO

TCK

XDP0_TCK1_ESB

TCK

JUMPER 0

1-2, 3-4 : CPU0 in chain
2-3 : CPU0 bypass

JUMPER 1

1-2, 3-4 : CPU1 in chain
2-3 : CPU1 bypass

P3V3

1K OHM

1K OHM

51 OHM

GND

XDP0_TCK1

P_VTT

51 OHM

1

XDP0_TMS_GTL

0 OHM

XDP0_TDO_ESB

GND

MICRO-STAR INT'L CO.,LTD

MICRO-STAR INT'L CO.,LTD

MICRO-STAR INT'L CO.,LTD

MS-9196

MS-9196

MSI

MSI

MSI

Size Document Description Rev

Size Document Description Rev

Size Document Description Rev

Custom

Custom

Custom

Date:

Wednesday, May 02, 2007

Date:

Wednesday, May 02, 2007

Date:

Wednesday, May 02, 2007

MS-9196

XDP BLOCK DIAGRAM

XDP BLOCK DIAGRAM

XDP BLOCK DIAGRAM

858

858

858

Sheet of

Sheet of

Sheet of

00A

00A

00A

5

4

3

2

1

P0 Intel LGA771 Signal

VCC0_SENSE2
VSS0_SENSE2
VCC0_SENSE1
VSS0_SENSE1

FSB0_A[35..3]

FSB0_A35

FSB0_A33

FSB0_A34

AJ6

AJ5

AH5

A35#

A34#

A33#

FSB0_A31

FSB0_A30

FSB0_A32

AH4

AG5

AG4

A32#

A31#

FSB0_A29

FSB0_A28

AG6

AF4

A30#

A29#

A28#

FSB0_A27

FSB0_A26

FSB0_A25

AF5

AB4

AC5

A27#

A26#

FSB0_A23

FSB0_A24

AB5

AA5

A25#

A24#

A23#

FSB0_A22

FSB0_A21

AD6

AA4

A22#

FSB0_A18

FSB0_A20

FSB0_A19

A21#

A20#Y4A19#Y6A18#W6A17#

FSB0_A14

FSB0_A13

FSB0_A16

FSB0_A15

FSB0_A17

AB6

A16#W5A15#V4A14#V5A13#U4A12#U5A11#T4A10#

FSB0_A11

FSB0_A12

FSB0_A10

U6

FSB0_A7

FSB0_A4

FSB0_A8

FSB0_A6

FSB0_A9

FSB0_A5

A9#T5A8#R4A7#M4A6#L4A5#L5A4#P6A3#

M5

AN3

AN4

AL8

AL7

VSS_DIE_SENSE

VCC_DIE_SENSE

VSS_DIE_SENSE2

VCC_DIE_SENSE2

LGA771

PART 1

FSB Signal

D53#

D52#

D51#

D50#

D49#

D48#

D47#

D46#

D45#

D44#

D43#

D42#

D41#

D40#

D39#

D38#

D37#

D36#

D35#

D34#

D33#

D32#

D31#

D30#

D29#

D28#

D27#

D26#

D25#

D24#

D23#

D22#

D21#

D20#D7D19#E9D18#F9D17#F8D16#G9D15#

D14#

D13#

D12#D8D11#

D10#

D9#

F21

F20

F18

B15

A14

C14

E22

C15

D17

D20

D22

G22

G21

F17

E21

E19

E18

F15

F14

F12

E16

E15

G17

G18

G16

G15

F11

E13

E10

D13

G14

D10

G13

B12

B10

A11

D11

A10

C12

C11

G23

AE1

AG1

AE8
AH7
AK1

AH2
AN7

AA2

G29
G30

FSB0_A[35..3]15

A8
G11
D19
C20

H4
G8
E3
G7

P2
K3

AK6

L1

K1

N2
M3
P3

AD1
AF1
AC1

AB2

R3

AL2

M2
D2

C2
D4
B2
C1
E4

C3
AD3
AB3

AJ7
AL1

AC2

Y1

V2

V1

W1

H30

B22
A22
A19
B19
B21
C21
B18
A17
B16
C18

DBI0#
DBI1#
DBI2#
DBI3#

RESET#
RSP#
BPRI#
TRDY#
DEFER#

SMI#
A20M#
FORCEPR#
LINT1/NMI
LINT0/INTR
IGNNE#
STPCLK#
INIT#

TCK
TDI
TDO
TMS
TRST#

IERR#
FERR#/PBE#
PROCHOT#
THERMTRIP#

ADS#
BNR#
HIT#
DBSY#
DRDY#
HITM#
LOCK#
BINIT#
MCERR#

SKTOCC#
THERMDA2
THERMDC2
THERMDA
THERMDC

DBR#
BOOTSELECT

TEST_BUS
VID_SELECT

LL_ID1
LL_ID0
MS_ID1
MS_ID0

BSEL0
BSEL1
BSEL2

D63#
D62#
D61#
D60#
D59#
D58#
D57#
D56#
D55#
D54#

D D

FSB0_DBI#[3..0]15

C C

CPU1_TESTBUS12

B B

FSB0_D[63..0]15

FSB0_DBI#[3..0]

FSB0_RESET_N15

FSB0_RSP_N15

FSB0_BPRI_N15

FSB0_TRDY_N15

FSB0_DEFER_N15

FSB_A20M#12,25

FSB0_FORCEPR#39

FSB_NMI12,25

FSB_INTR12,25

FSB_IGNNE#12,25

FSB_STPCLK#12,25

FSB_INIT#12,25

XDP0_TCK012,46

XDP0_TDI_FSB046
XDP0_TDO_FSB046
XDP0_TMS_MAIN12,17,46

XDP0_TRST#12,17,46

FSB0_GTL_IERR#47

FSB_FERR#12,25

FSB0_PROCHOT#38

FSB0_THERMTRIP_N29

FSB0_ADS_N15
FSB0_BNR_N15

FSB0_HIT_N15

FSB0_DBSY_N15

FSB0_DRDY_N15

FSB0_HITM_N15

FSB0_LOCK_N15

FSB0_BINIT_N15

FSB0_MCERR_N15

CPU0_SKTOCC#33,38,46,47

P0THERMDA238
P0THERMDC238

P0THERMDA38

P0THERMDC38

CPU_DBR_RST#12,46

R73 0_0402R73 0_0402 R132 49.9RST_0402R132 49.9RST_0402

FSB0_VIDSEL39,46

P0_MS_ID146
P0_MS_ID046

FSB0_BSEL047
FSB0_BSEL147
FSB0_BSEL247

FSB0_D[63..0]

FSB0_DBI#0
FSB0_DBI#1
FSB0_DBI#2
FSB0_DBI#3

FSB0_RESET_N
FSB0_RSP_N
FSB0_BPRI_N
FSB0_TRDY_N
FSB0_DEFER_N

CPU0_SMI_N
FSB_A20M#
FSB0_FORCEPR#
FSB_NMI
FSB_INTR
FSB_IGNNE#
FSB_STPCLK#
FSB_INIT#

XDP0_TCK0
XDP0_TDI_FSB0
XDP0_TDO_FSB0
XDP0_TMS_MAIN
XDP0_TRST#

FSB0_GTL_IERR#
FSB_FERR#
FSB0_PROCHOT#
FSB0_THERMTRIP_N

FSB0_ADS_N
FSB0_BNR_N
FSB0_HIT_N
FSB0_DBSY_N
FSB0_DRDY_N
FSB0_HITM_N
FSB0_LOCK_N
FSB0_BINIT_N
FSB0_MCERR_N

CPU0_SKTOCC#
P0THERMDA2
P0THERMDC2
P0THERMDA
P0THERMDC

CPU_DBR_RST#
CPU0_BOOT

CPU0_TESTBUS
FSB0_VIDSEL

P0_LL_ID1
P0_LL_ID0
P0_MS_ID1
P0_MS_ID0

FSB0_BSEL0
FSB0_BSEL1
FSB0_BSEL2

FSB0_D63
FSB0_D62
FSB0_D61
FSB0_D60
FSB0_D59
FSB0_D58
FSB0_D57
FSB0_D56
FSB0_D55
FSB0_D54

AM5

AL4

AK4

VID6

VID5

GTLREF_DATA_C1

GTLREF_ADD_C1

GTLREF_DATA_C0

GTLREF_ADD_C0

D8#

D7#A7D6#B7D5#B6D4#A5D3#C6D2#A4D1#C5D0#

R60 0_0402R60 0_0402
R64 0_0402R64 0_0402
R71 0_0402R71 0_0402
R70 0_0402R70 0_0402

AL6

AM3

AL5

AM2

CPU1A

CPU1A

VID4

VID3

VID2

VID1

VID0

BPM5#
BPM4#
BPM3#
BPM2#
BPM1#
BPM0#

REQ4#
REQ3#
REQ2#
REQ1#
REQ0#

TESTHI11
TESTHI10

TESTHI9
TESTHI8
TESTHI7
TESTHI6
TESTHI5
TESTHI4
TESTHI3
TESTHI2
TESTHI1
TESTHI0

BCLK1
BCLK0

RS2#
RS1#
RS0#

AP1#

AP0#
BR1#
BR0#

PWRGOOD

COMP7
COMP6
COMP5
COMP4
COMP3
COMP2
COMP1
COMP0

DP3#
DP2#
DP1#
DP0#

ADSTB1#
ADSTB0#
DSTBP3#
DSTBP2#
DSTBP1#
DSTBP0#
DSTBN3#
DSTBN2#
DSTBN1#
DSTBN0#

SOCKET771

SOCKET771

B4

VID6
VID5
VID4
VID3
VID2
VID1
VID0

F2
H2
G10
H1

AG3
AF2
AG2
AD2
AJ1
AJ2

J6
K6
M6
J5
K4

L2
P1
G4
G3
F24
G24
G26
G27
G25
F25
W3
F26

G28
F28

A3
F5
B3

U3
U2
H5
F3

N1
AE3
Y3
T2
J2
R1
G2
T1
A13

J17
H16
H15
J16

AD5
R6
C17
G19
E12
B9
A16
G20
G12
C8

VID6 38,39
VID5 39
VID4 39
VID3 39
VID2 39
VID1 39
VID0 39

P0_GTLREF_DATA1
P0_GTLREF_ADD1
P0_GTLREF_DATA0
P0_GTLREF_ADD0

FSB0_BPM_N5
FSB0_BPM_N4
FSB0_BPM_N3
FSB0_BPM_N2
FSB0_BPM_N1
FSB0_BPM_N0

FSB0_REQ_N4
FSB0_REQ_N3
FSB0_REQ_N2
FSB0_REQ_N1
FSB0_REQ_N0

H_TESTHI11
H_TESTHI10
FSB0_BPM_B2#
FSB0_BPM_B3#

H_TESTHI2_7
H_TESTHI0_1

CK_H_P0_N
CK_H_P0

FSB0_RS2_N
FSB0_RS1_N
FSB0_RS0_N

FSB0_AP1
FSB0_AP0
FSB0_BR_N1
FSB0_BR_N0

H_COMP7
H_COMP6
H_COMP5
H_COMP4
H_COMP3
H_COMP2
H_COMP1
H_COMP0

FSB0_DP_N3
FSB0_DP_N2
FSB0_DP_N1
FSB0_DP_N0

FSB0_ADSTB_N1
FSB0_ADSTB_N0
FSB0_DSTBP_N3
FSB0_DSTBP_N2
FSB0_DSTBP_N1
FSB0_DSTBP_N0
FSB0_DSTBN_N3
FSB0_DSTBN_N2
FSB0_DSTBN_N1
FSB0_DSTBN_N0

VCC0_SENSE 39

VSS0_SENSE 39

FSB0_BPM_N5 15,46
FSB0_BPM_N4 15,46
FSB0_BPM_N3 46
FSB0_BPM_N2 46
FSB0_BPM_N1 46
FSB0_BPM_N0 46

FSB0_REQ_N[4..0]

R142 51_0402R142 51_0402
R140 51_0402R140 51_0402
R141 51_0402R141 51_0402
R114 51_0402R114 51_0402

P_VTT

Place BPM Termination Near CPU

R21 51_0402R21 51_0402
R116 51_0402R116 51_0402

CK_H_P0_N 31
CK_H_P0 31

FSB0_RS2_N 15
FSB0_RS1_N 15
FSB0_RS0_N 15

FSB0_AP1 15
FSB0_AP0 15
FSB0_BR_N1 15
FSB0_BR_N0 15
CPU_PWRGD 12,25,46

R121 49.9RST_0402R121 49.9RST_0402
R118 49.9RST_0402R118 49.9RST_0402
R137 49.9RST_0402R137 49.9RST_0402
R127 49.9RST_0402R127 49.9RST_0402

R113 49.9RST_0402R113 49.9RST_0402
R136 49.9RST_0402R136 49.9RST_0402
R37 49.9RST_0402R37 49.9RST_0402

FSB0_DP_N3 15
FSB0_DP_N2 15
FSB0_DP_N1 15
FSB0_DP_N0 15

FSB0_ADSTB_N[1..0]
FSB0_DSTBP_N[3..0]

FSB0_DSTBN_N[3..0]

P_VTT

P_VTT

FSB0_ADSTB_N[1..0] 15
FSB0_DSTBP_N[3..0] 15

FSB0_DSTBN_N[3..0] 15

FSB0_REQ_N[4..0] 15

FSB0_BPM_B2#
FSB0_BPM_B3#

C155

C155
X_0.1u

X_0.1u

FSB0_BPM_B2# 46
FSB0_BPM_B3# 46

Processor 0 Termination

Place Termination Close to CPU At End of Bus

P_VTT

P3V3_AUX

R51

R51

49.9RST_0402

49.9RST_0402

R45

R45

100RST_0402

100RST_0402

R145

R145

49.9RST_0402

49.9RST_0402

R150

R150

100RST_0402

100RST_0402

R115 51_0402R115 51_0402
R147 51_0402R147 51_0402
R119 51_0402R119 51_0402
R125 51_0402R125 51_0402
R133 51_0402R133 51_0402
R135 51_0402R135 51_0402
R36 51_0402R36 51_0402

R117 X_51_0402R117 X_51_0402
R134 150_0402R134 150_0402

R372 X_220_0402R372 X_220_0402
R344 X_220_0402R344 X_220_0402
R371 X_220_0402R371 X_220_0402
R359 X_220_0402R359 X_220_0402
R342 X_220_0402R342 X_220_0402

R374 220_0402R374 220_0402
R343 220_0402R343 220_0402

R61 4.7K_0402R61 4.7K_0402

CPU_DBR_RST#

Place BPM Termination Near CPU

FSB0_BPM_N3
FSB0_BPM_N2
FSB0_BPM_N1
FSB0_BPM_N0

800mV at 1.2V FSB Vtt

P_VTT

Minmum trace and width as wide as possible

12 mils

P0_GTLREF_ADD0

C951uC95
1u

800mV at 1.2V FSB Vtt

P_VTT

Minmum trace and width as wide as possible

12 mils

C1451uC145
1u

R152

R152

0_0402

0_0402

P0_LL_ID0
P0_LL_ID1

P0_MS_ID1
P0_MS_ID0

FSB0_BR_N1
FSB0_BR_N0
FSB0_GTL_IERR#
FSB0_PROCHOT#
FSB0_THERMTRIP_N
FSB_FERR#
FSB0_RESET_N

CPU0_BOOT
CPU_PWRGD

FSB_A20M#
FSB_STPCLK#
FSB_IGNNE#
FSB_INIT#
FSB_INTR

FSB_SMI#
FSB_NMI

CPU0_SKTOCC#

ESB_SYS_RST# 25,33,49

R122 51_0402R122 51_0402
R120 51_0402R120 51_0402
R123 51_0402R123 51_0402
R124 51_0402R124 51_0402

R151

R151
X_4.7K_0402

X_4.7K_0402

R153 X_51_0402R153 X_51_0402
R155 X_51_0402R155 X_51_0402

R2060R206

0

C94

C94
220P

220P

R3920R392

0

C147

C147
220P

220P

P_VTT

P3V3

R154

R154
X_4.7K_0402

X_4.7K_0402

P0_GTLREF_DATA0

C104

C104
220P

220P

P0_GTLREF_DATA1P0_GTLREF_ADD1

C146

C146
220P

220P

FSB0_D26

FSB0_D27

FSB0_D25

FSB0_D22

FSB0_D24

FSB0_D23

FSB0_D21

FSB0_D19

FSB0_D20

FSB0_D18

FSB0_D17

FSB0_D16 FSB0_A3

FSB0_D15

FSB0_D13

FSB0_D14

FSB0_D46

FSB0_D45

FSB0_D44

FSB0_D43

FSB0_D42

FSB0_D40

FSB0_D52

FSB0_D50

FSB0_D47

FSB0_D51

FSB0_D48

FSB0_D49

A A

CPU0 SMI Voltage Translation

U13

U13

A
B4C
BE

PI5C3303

PI5C3303

VCC
GND

2
5
3

FSB_SMI#12,25,33

CPU0_DISABLE_N33,38

6
1

FSB0_D53

P5V

CPU0_SMI_N

FSB0_D37

FSB0_D29

FSB0_D28

FSB0_D31

FSB0_D34

FSB0_D38

FSB0_D33

FSB0_D35

FSB0_D30

FSB0_D32

FSB0_D36

FSB0_D39

FSB0_D41

BE=High, C=B

5

4

FSB0_D10

FSB0_D12

FSB0_D11

FSB0_D7

FSB0_D9

FSB0_D8

FSB0_D6

FSB0_D5

FSB0_D4

FSB0_D3

FSB0_D2

3

FSB0_D1

FSB0_D0

MICRO-STAR INT'L CO.,LTD

MICRO-STAR INT'L CO.,LTD

MICRO-STAR INT'L CO.,LTD

MS-9196

MS-9196

MSI

MSI

MSI

Size Document Description Rev

Size Document Description Rev

Size Document Description Rev

Custom

Custom

Custom

Date:

Wednesday, May 02, 2007

Date:

Wednesday, May 02, 2007

Date:

2

Wednesday, May 02, 2007

MS-9196

CPU0 SIGNAL

CPU0 SIGNAL

CPU0 SIGNAL

1

Sheet of

Sheet of

Sheet of

958

958

958

00A

00A

00A

5

4

3

2

1

P0 Intel LGA771 Power

VCORE0

D D

AH27

AH26

AH25

AH22

AH21

AH19

AH18

AH15

AH14

AH12

AH11

AG9

AG8

AG30

AG29

AG28

AG27

AG26

AG25

AG22

AG21

AG19

AG18

AG15

AG14

AG12

AG11

AF9

AF8

AF22

AF21

VCORE0

AF19

VCC

AF18

VCC

AF15

VCC

AF14

VCC

AF12

VCC

AF11

VCC

AE9

VCC

AE23

VCC

AE22

VCC

AE21

VCC

AE19

VCC

AE18

VCC

AE15

VCC

AE14

VCC

AE12

VCC

AE11

VCC

AD8

VCC

AD30

VCC

AD29

VCC

AD28

VCC

AD27

VCC

AD26

VCC

AD25

VCC

C C

AD24
AD23

AC30
AC29
AC28
AC27
AC26
AC25
AC24
AC23

AC8

AB8
AA8

VCORE0

VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

Y8

Y28

Y29

Y30

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCCW8VCC

VCC

VCC

VCC

VCC

Y23

Y24

Y25

Y26

Y27

W30

W29

VCC

VCC

W28

VCC

VCC

W27

VCC

VCC

W26

VCC

VCC

W25

VCC

VCC

W24

VCC

VCC

VCC

W23

VCC

VCC

VCCU8VCCV8VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

U26

U27

U28

U29

U30

AH28

AH29

AH30

AH8

AH9

AJ11

AJ12

AJ14

AJ15

AJ18

AJ19

AJ21

AJ22

AJ25

AJ26

AJ8

AJ9

AK11

AK12

AK14

AK15

AK18

AK19

AK21

AK22

AK25

AK26

AK8

AK9

AL11

AL12

AL14

AL15

AL18

AL19

AL21

AL22

AL25

AL26

AL29

AL30

AL9

AM11

AM12

AM14

AM15

AM18

AM19

AM21

AM22

AM25

AM26

AM29

AM30

AM8

AM9

AN11

AN12

AN14

AN15

AN18

AN19

AN21

AN22

CPU1B

CPU1B

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

A23

VCCA

B23

VSSA

D23

VCCPLL

C23

VCCIOPLL

F30

VTT

E30

VTT

A25

VTT

A26

VTT

B25

VTT

B26

VTT

B27

VTT

B28

VTT

B29

VTTPWRGD

VTT_OUT1
VTT_OUT0

NONE

NONE

SOCKET771

SOCKET771

AN29

AN30

VTT_SEL

VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT

B30
C25
C26
C27
C28
C29
C30
D25
D26
D27
D28
D29
D30

AM6
AA1
J1
F27

LGA771

PART 2

Power

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCCJ8VCCJ9VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCCK8VCCL8VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCCM8VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCCN8VCCP8VCCR8VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCCT8VCC

VCC

VCC

J10

J11

J12

J13

J14

J15

J18

J19

J20

J21

J22

J23

J24

J25

J26

J27

J28

J29

T30

U23

U24

U25

N30

N23

N24

N25

N26

N27

N28

N29

M30

M29

M28

M27

M26

M25

M24

M23

K27

K28

K29

K30

T23

T24

T25

T26

T27

T28

T29

J30

K23

K24

K25

K26

AN9

AN8

AN26

AN25

H0_VCCA
H0_VSSA
H0_VCCPLL

VTT_PWRGD

VTT_SEL0

P_VTT

R863 0R863 0

VTT_PWRGD 13,48

VTT_SEL 13,45

B B

Minmum trace and width as wide as possible < 12 mils

P_VTT

DC current if 100mA

L1 10uH-0805-0.1AL1 10uH-0805-0.1A
L2 10uH-0805-0.1AL2 10uH-0805-0.1A

P1V5

A A

5

R200R20

C21

C21
22u-1206

22u-1206

0

C10

C10
103P

103P

C37

C37
X_10u-1206

X_10u-1206

C7

4.7u-0805C74.7u-0805

H0_VCCA

C23

C23
X_1u

X_1u

H0_VSSA

H0_VCCPLL

C8

4.7u-0805C84.7u-0805

4

P_VTT

C35

C35
10u-1206

10u-1206

C164

C164
10u-1206

10u-1206

C703

C703

0.1u

0.1u

C705

C705

0.1u

0.1u

C706

C706

0.1u

0.1u

3

C174

C174

0.1u

0.1u

C175

C175

0.1u

0.1u

C176

C176

0.1u

0.1u

MICRO-STAR INT'L CO.,LTD

MICRO-STAR INT'L CO.,LTD

MICRO-STAR INT'L CO.,LTD

MS-9196

MS-9196

MSI

MSI

MSI

Size Document Description Rev

Size Document Description Rev

Size Document Description Rev
Custom

Custom

Custom
Date:

Wednesday, May 02, 2007

Date:

Wednesday, May 02, 2007

Date:

2

Wednesday, May 02, 2007

MS-9196

CPU0 POWER

CPU0 POWER

CPU0 POWER

1

10 58

10 58

10 58

Sheet of

Sheet of

Sheet of

00A

00A

00A

5

4

3

2

1

P0 Intel LGA771 GND

A12
A15
A18

A21
A24

AA23
AA24
AA25
AA26
AA27
AA28
AA29

AA3

AA30

AA6
AA7

AB1
AB23
AB24
AB25
AB26
AB27
AB28
AB29
AB30

AB7

AC3

AC6

AC7

AD4

AD7
AE10
AE13
AE16
AE17

AE2
AE20
AE24
AE25
AE26
AE27
AE28

P_VTT

PECI_CPU 14,34,50

R422

R422
51_0402

51_0402

AC4

AE4

D14

E23

G6

E24

G5

W2

D16

A20

F1

VSS

RESVDC9RESVD

VSS
VSS
VSS

A2

VSS
VSS
VSS

A6

VSS

A9

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

VSS

VSS

AE29

AE30

RESVD

RESVD

VSS

VSS

AE5

AE7

RESVD

VSS

AF10

AF13

RESVD

RESVD

VSS

VSS

AF16

AF17

RESVD

RESVD

VSS

VSS

AF20

AF23

RESVDD1RESVD

RESVD

VSS

VSS

VSS

AF24

AF25

RESVDE5RESVDE6RESVDE7RESVD

VSS

VSS

VSS

AF26

AF27

AF28

F23

VSS

AF29

AF3

B13

RESVDF6RESVD

VSS

AF30

R57

R57

X_49.9RST_0402

X_49.9RST_0402

P5

E1

RESVDJ3RESVDN4RESVD

RESVD

VSS

VSS

VSS

VSS

VSS

AF6

AF7

AG10

AG13

AG16

AE6

AN5

AN6

RESVDN5RESVD

RESVD

VSS

VSS

VSS

AG17

AG20

AG23

AJ3

RESVD

RESVD

VSS

VSS

AG24

AK3

F29

RESVD

VSS

AH1

AG7

AN28

RESVD

VSS

VSS

AH10

AH13

AN27

NONE

VSS

AH16

VSSY7VSSY5VSSY2VSSW7VSSW4VSSV7VSSV6VSS

NONE

VSS

VSS

VSS

VSS

VSS

VSS

AH3

AH6

AH17

AH20

AH23

AH24

VSS

VSS

AJ10

VSS

AJ13

V30

VSS

AJ16

VSSV3VSS

VSS

AJ17

V29

VSS

AJ20

V28

AJ23

D D

FSB0_BPM_B1#46

C C

B B

P_VTT

R426

R426
51_0402

51_0402

V27

V26

V25

V24

V23

VSS

VSS

VSS

VSS

VSS

VSS

VSSU7VSSU1VSST7VSST6VSST3VSSR7VSSR5VSS

LGA771

PART 3

GND

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

AJ4

AJ24

AJ27

AJ28

AJ29

AJ30

AK10

AK13

VSS

AK16

VSS

AK17

AK2

VSS

VSS

AK20

R30

VSS

AK23

R29

VSS

VSS

AK24

R28

VSS

VSS

AK27

R27

VSS

VSS

AK28

R26

VSS

VSS

AK29

R25

VSS

VSS

AK30

R24

AK5

R23

VSS

VSS

AK7

VSS

VSSR2VSSP7VSSP4VSS

VSS

VSS

VSS

AL10

AL13

VSS

AL16

P30

VSS

AL17

P29

VSS

VSS

AL20

P28

VSS

VSS

AL23

P27

VSS

VSS

AL24

P26

VSS

VSS

AL27

P25

VSS

VSS

AL28

P24

VSS

VSS

AL3

P23

VSS

VSSN7VSSN6VSSN3VSSM7VSSM1VSSL7VSSL6VSS

VSS

VSS

VSS

VSS

VSS

VSS

AM1

AM10

AM13

AM16

AM17

AM20

VSS

AM23

VSS

AM24

L30

VSS

AM27

VSSL3VSS

VSS

AM28

L29

VSS

AM4

L28

AM7

VSS

VSS

L27

AN1

VSS

VSS

L26

VSS

VSS

AN10

L25

VSS

VSS

AN13

L24

VSS

VSS

AN16

L23

VSS

VSS

AN17

VSSK7VSSK5VSSK2VSSJ7VSSJ4VSSH9VSSH8VSSH7VSSH6VSSH3VSS

VSS

VSSB5VSS

VSS

VSS

VSS

VSS

VSSB1VSS

VSS

B8

B17

B11

AN24

B14

AN2

AN20

AN23

H29

B20

VSS

H28

B24

H27

VSS

VSS

H26

H25

VSS

VSS

VSS

VSSC4VSS

SOCKET771

SOCKET771

C7

H24

CPU1C

CPU1C

VSS

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

H23
H22
H21
H20
H19
H18
H17
H14
H13
H12
H11
H10
G1
F7
F4
F22
F19
F16
F13
F10
E8
E29
E28
E27
E26
E25
E20
E2
E17
E14
E11
D9
D6
D5
D3
D24
D21
D18
D15
D12
C24
C22
C19
C16
C13
C10

P_VTT

R402

R402
51_0402

51_0402

FSB0_BPM_B0# 46

A A

MICRO-STAR INT'L CO.,LTD

MICRO-STAR INT'L CO.,LTD

MICRO-STAR INT'L CO.,LTD

MS-9196

MS-9196

MSI

MSI

MSI

Size Document Description Rev

Size Document Description Rev

Size Document Description Rev

Custom

Custom

Custom

Date:

Wednesday, May 02, 2007

Date:

Wednesday, May 02, 2007

Date:

5

4

3

2

Wednesday, May 02, 2007

MS-9196

CPU0 GND

CPU0 GND

CPU0 GND

Sheet of

Sheet of

Sheet of

1

11 58

11 58

11 58

00A

00A

00A

5

4

3

2

1

P1 Intel LGA771 Signal

Processor 1 Termination

VCC1_SENSE2
VSS1_SENSE2
VCC1_SENSE1
VSS1_SENSE1

D D

FSB1_DBI#[3..0]15

C C

B B

FSB1_D[63..0]15

FSB1_DBI#[3..0]

FSB1_RESET_N15,46

FSB1_RSP_N15

FSB1_BPRI_N15

FSB1_TRDY_N15

FSB1_DEFER_N15

FSB1_FORCEPR#41

FSB_STPCLK#9,25

XDP0_TDI_FSB146

XDP0_TDO_FSB146
XDP0_TMS_MAIN9,17,46

FSB1_GTL_IERR#47
FSB1_PROCHOT#38

FSB1_THERMTRIP_N29

FSB1_DBSY_N15

FSB1_DRDY_N15

FSB1_HITM_N15

FSB1_LOCK_N15

FSB1_BINIT_N15

FSB1_MCERR_N15

CPU1_SKTOCC#33,38,46

P1THERMDA238
P1THERMDC238

CPU_DBR_RST#9,46

CPU1_TESTBUS9

FSB1_VIDSEL41,46

FSB1_D[63..0]

FSB_A20M#9,25

FSB_NMI9,25

FSB_INTR9,25

FSB_IGNNE#9,25

FSB_INIT#9,25

XDP0_TCK09,46

XDP0_TRST#9,17,46

FSB_FERR#9,25

FSB1_ADS_N15
FSB1_BNR_N15

FSB1_HIT_N15

P1THERMDA38

P1THERMDC38

P1_MS_ID146
P1_MS_ID046

FSB1_BSEL047
FSB1_BSEL147
FSB1_BSEL247

FSB1_A[35..3]15

FSB1_DBI#0
FSB1_DBI#1
FSB1_DBI#2
FSB1_DBI#3

FSB1_RESET_N
FSB1_RSP_N
FSB1_BPRI_N
FSB1_TRDY_N
FSB1_DEFER_N

CPU1_SMI_N
FSB_A20M#
FSB1_FORCEPR#
FSB_NMI
FSB_INTR
FSB_IGNNE#
FSB_STPCLK#
FSB_INIT#

XDP0_TCK0
XDP0_TDI_FSB1
XDP0_TDO_FSB1
XDP0_TMS_MAIN
XDP0_TRST#

FSB1_GTL_IERR#
FSB_FERR#
FSB1_PROCHOT#
FSB1_THERMTRIP_N

FSB1_ADS_N
FSB1_BNR_N
FSB1_HIT_N
FSB1_DBSY_N
FSB1_DRDY_N
FSB1_HITM_N
FSB1_LOCK_N
FSB1_BINIT_N
FSB1_MCERR_N

CPU1_SKTOCC#
P1THERMDA2
P1THERMDC2
P1THERMDA
P1THERMDC

CPU_DBR_RST#
CPU1_BOOT

CPU1_TESTBUS
FSB1_VIDSEL

P1_LL_ID1
P1_LL_ID0
P1_MS_ID1
P1_MS_ID0

FSB1_BSEL0
FSB1_BSEL1
FSB1_BSEL2

FSB1_D63
FSB1_D62
FSB1_D61
FSB1_D60
FSB1_D59
FSB1_D58
FSB1_D57
FSB1_D56
FSB1_D55
FSB1_D54

AG1

A8
G11
D19
C20

G23

H4
G8

E3

G7

P2

K3
AK6

L1

K1

N2
M3

P3
AE1

AD1
AF1
AC1

AB2

R3

AL2

M2
D2

C2
D4

B2

C1

E4

C3
AD3
AB3

AE8

AJ7
AH7
AL1
AK1

AC2

Y1
AH2
AN7

AA2

V2

V1

W1

G29
H30
G30

B22
A22
A19
B19
B21
C21
B18
A17
B16
C18

DBI0#
DBI1#
DBI2#
DBI3#

RESET#
RSP#
BPRI#
TRDY#
DEFER#

SMI#
A20M#
FORCEPR#
LINT1/NMI
LINT0/INTR
IGNNE#
STPCLK#
INIT#

TCK
TDI
TDO
TMS
TRST#

IERR#
FERR#/PBE#
PROCHOT#
THERMTRIP#

ADS#
BNR#
HIT#
DBSY#
DRDY#
HITM#
LOCK#
BINIT#
MCERR#

SKTOCC#
THERMDA2
THERMDC2
THERMDA
THERMDC

DBR#
BOOTSELECT

TEST_BUS
VID_SELECT

LL_ID1
LL_ID0
MS_ID1
MS_ID0

BSEL0
BSEL1
BSEL2

D63#
D62#
D61#
D60#
D59#
D58#
D57#
D56#
D55#
D54#

D53#

B15

FSB1_A[35..3]

D52#

D51#

D50#

D49#

A14

C14

C15

D17

FSB1_A33

FSB1_A35

FSB1_A34

AJ6

AJ5

AH5

A35#

A34#

D48#

D47#

D20

D22

G22

FSB1_A31

FSB1_A32

AH4

AG5

A33#

A32#

A31#

D46#

D45#

D44#

E22

G21

FSB1_A28

FSB1_A29

FSB1_A30

AG4

AG6

AF4

A30#

A29#

D43#

D42#

F21

F20

E21

FSB1_A27

FSB1_A26

AF5

AB4

A28#

A27#

A26#

D41#

D40#

D39#

E19

E18

FSB1_A23

FSB1_A24

FSB1_A25

AC5

AB5

A25#

A24#

D38#

D37#

F18

F17

FSB1_A22

FSB1_A19

FSB1_A16

FSB1_A15

FSB1_A18

FSB1_A21

FSB1_A20

FSB1_A17

FSB1_A14

AA5

AD6

AA4

AB6

A23#

A22#

A21#

A20#Y4A19#Y6A18#W6A17#

A16#W5A15#V4A14#V5A13#U4A12#U5A11#T4A10#

LGA771

PART 1

FSB Signal

D36#

D35#

D34#

D33#

D32#

D31#

D30#

D29#

D28#

F15

F14

E16

E15

G17

G18

G16

G15

G14

G13

FSB1_A12

FSB1_A13

D27#

D26#

D25#

E13

D13

FSB1_A11

FSB1_A9

FSB1_A8

FSB1_A10

U6

A9#T5A8#R4A7#M4A6#L4A5#L5A4#P6A3#

D24#

D23#

D22#

F12

F11

E10

D10

FSB1_A3

FSB1_A5

FSB1_A7

FSB1_A6

FSB1_A4

M5

D21#

D20#D7D19#E9D18#F9D17#F8D16#G9D15#

AL8

AL7

VSS_DIE_SENSE2

VCC_DIE_SENSE2

D14#

D13#

D12#D8D11#

B12

D11

C12

AN3

AN4

VSS_DIE_SENSE

VCC_DIE_SENSE

D10#

D9#

D8#

B10

A11

A10

C11

R231 0_0402R231 0_0402
R232 0_0402R232 0_0402
R244 0_0402R244 0_0402
R241 0_0402R241 0_0402

AM5

AL4

AK4

AL6

AM3

VID6

VID5

VID4

VID3

GTLREF_DATA_C1

GTLREF_ADD_C1

GTLREF_DATA_C0

GTLREF_ADD_C0

PWRGOOD

D7#A7D6#B7D5#B6D4#A5D3#C6D2#A4D1#C5D0#

B4

AL5

AM2

CPU2A

CPU2A

VID2

VID1

VID0

BPM5#
BPM4#
BPM3#
BPM2#
BPM1#
BPM0#

REQ4#
REQ3#
REQ2#
REQ1#
REQ0#

TESTHI11
TESTHI10

TESTHI9
TESTHI8
TESTHI7
TESTHI6
TESTHI5
TESTHI4
TESTHI3
TESTHI2
TESTHI1
TESTHI0

BCLK1
BCLK0

RS2#
RS1#
RS0#

AP1#
AP0#
BR1#
BR0#

COMP7
COMP6
COMP5
COMP4
COMP3
COMP2
COMP1
COMP0

DP3#
DP2#
DP1#
DP0#

ADSTB1#
ADSTB0#
DSTBP3#
DSTBP2#
DSTBP1#

DSTBP0#
DSTBN3#
DSTBN2#
DSTBN1#
DSTBN0#

SOCKET771

SOCKET771

P1VID6
P1VID5
P1VID4
P1VID3
P1VID2
P1VID1
P1VID0

F2
H2
G10
H1

AG3
AF2
AG2
AD2
AJ1
AJ2

J6
K6
M6
J5
K4

L2
P1
G4
G3
F24
G24
G26
G27
G25
F25
W3
F26

G28
F28

A3
F5
B3

U3
U2
H5
F3

N1
AE3
Y3
T2
J2
R1
G2
T1
A13

J17
H16
H15
J16

AD5
R6
C17
G19
E12
B9
A16
G20
G12
C8

P1VID6 38,41
P1VID5 41
P1VID4 41
P1VID3 41
P1VID2 41
P1VID1 41
P1VID0 41

P1_GTLREF_DATA1
P1_GTLREF_ADD1
P1_GTLREF_DATA0
P1_GTLREF_ADD0

FSB1_BPM_N5
FSB1_BPM_N4
FSB1_BPM_N3
FSB1_BPM_N2
FSB1_BPM_N1
FSB1_BPM_N0

FSB1_REQ_N4
FSB1_REQ_N3
FSB1_REQ_N2
FSB1_REQ_N1
FSB1_REQ_N0

H1_TESTHI11
H1_TESTHI10
FSB1_BPM_B2#
FSB1_BPM_B3#

H1_TESTHI2_7

H1_TESTHI2_7
H1_TESTHI0_1

H1_TESTHI0_1

CK_H_P1_N
CK_H_P1

FSB1_RS2_N
FSB1_RS1_N
FSB1_RS0_N

FSB1_AP1
FSB1_AP0
FSB1_BR_N1
FSB1_BR_N0

H1_COMP7
H1_COMP6
H1_COMP5
H1_COMP4
H1_COMP3
H1_COMP2
H1_COMP1
H1_COMP0

FSB1_DP_N3
FSB1_DP_N2
FSB1_DP_N1
FSB1_DP_N0

FSB1_ADSTB_N1
FSB1_ADSTB_N0
FSB1_DSTBP_N3
FSB1_DSTBP_N2
FSB1_DSTBP_N1
FSB1_DSTBP_N0
FSB1_DSTBN_N3
FSB1_DSTBN_N2
FSB1_DSTBN_N1
FSB1_DSTBN_N0

VCC1_SENSE 41

VSS1_SENSE 41

FSB1_BPM_N5 15,46
FSB1_BPM_N4 15,46
FSB1_BPM_N3 46
FSB1_BPM_N2 46
FSB1_BPM_N1 46
FSB1_BPM_N0 46

FSB1_REQ_N[4..0]

R373 51_0402R373 51_0402
R346 51_0402R346 51_0402
R384 51_0402R384 51_0402
R360 51_0402R360 51_0402

R165 51_0402R165 51_0402
R166 51_0402R166 51_0402

CK_H_P1_N 31
CK_H_P1 31

FSB1_RS2_N 15
FSB1_RS1_N 15
FSB1_RS0_N 15

FSB1_AP1 15
FSB1_AP0 15
FSB1_BR_N1 15
FSB1_BR_N0 15
CPU_PWRGD 9,25,46

R353 49.9RST_0402R353 49.9RST_0402
R350 49.9RST_0402R350 49.9RST_0402
R348 49.9RST_0402R348 49.9RST_0402
R340 49.9RST_0402R340 49.9RST_0402
R375 49.9RST_0402R375 49.9RST_0402
R335 49.9RST_0402R335 49.9RST_0402
R376 49.9RST_0402R376 49.9RST_0402
R212 49.9RST_0402R212 49.9RST_0402

FSB1_DP_N3 15
FSB1_DP_N2 15
FSB1_DP_N1 15
FSB1_DP_N0 15

FSB1_ADSTB_N[1..0]
FSB1_DSTBP_N[3..0]

FSB1_DSTBN_N[3..0]

FSB1_REQ_N[4..0] 15

FSB1_BPM_B2#
FSB1_BPM_B3#

P_VTT

P_VTT

Max Length 1.2 inches

P_VTT

C173

C173
X_0.1u

X_0.1u

FSB1_ADSTB_N[1..0] 15
FSB1_DSTBP_N[3..0] 15

FSB1_DSTBN_N[3..0] 15

FSB1_BPM_B2# 46
FSB1_BPM_B3# 46

49.9RST_0402

49.9RST_0402

100RST_0402

100RST_0402

49.9RST_0402

49.9RST_0402

100RST_0402

100RST_0402

Place Termination Close to CPU At End of Bus

P_VTT

R347 51_0402R347 51_0402
R345 51_0402R345 51_0402
R356 51_0402R356 51_0402
R361 51_0402R361 51_0402
R163 51_0402R163 51_0402
R380 51_0402R380 51_0402
R341 51_0402R341 51_0402

R351 X_51_0402R351 X_51_0402

P3V3_AUX

R381 4.7K_0402R381 4.7K_0402

FSB1_BPM_N3
FSB1_BPM_N2
FSB1_BPM_N1
FSB1_BPM_N0

FSB_FERR#
FSB1_THERMTRIP_N
FSB1_PROCHOT#
FSB1_BR_N0
FSB1_RESET_N
FSB1_GTL_IERR#
FSB1_BR_N1

CPU1_BOOT

CPU1_SKTOCC#

R354 51_0402R354 51_0402
R352 51_0402R352 51_0402
R358 51_0402R358 51_0402
R355 51_0402R355 51_0402

Place BPM Termination Near CPU

R379

R379
X_4.7K_0402

X_4.7K_0402

P1_LL_ID0
P1_LL_ID1

P1_MS_ID1
P1_MS_ID0

P_VTT

800mV at 1.2V FSB Vtt

Minmum trace and width as wide as possible

12 mils

R383

R383

P1_GTLREF_ADD1 P1_GTLREF_DATA1

R365

R365

C3711uC371
1u

P_VTT

800mV at 1.2V FSB Vtt

Minmum trace and width as wide as possible

12 mils

R339

R339

P1_GTLREF_ADD0 P1_GTLREF_DATA0

C3681uC368

R338

R338

1u

R377 X_51_0402R377 X_51_0402
R378 X_51_0402R378 X_51_0402

R3640R364

0

C372

C372
220P

220P

R3670R367

0

C367

C367
220P

220P

C365

C365
220P

220P

C370

C370
220P

220P

P_VTT

P3V3P3V3

R349

R349
X_4.7K_0402

X_4.7K_0402

FSB1_D45

FSB1_D50

FSB1_D48

FSB1_D44

FSB1_D47

FSB1_D51

FSB1_D52

FSB1_D49

FSB1_D46

A A

5

FSB1_D53

FSB1_D41

FSB1_D42

FSB1_D43

FSB1_D39

FSB1_D40

FSB1_D38

4

FSB1_D37

FSB1_D36

FSB1_D35

FSB1_D34

FSB1_D33

FSB1_D32

FSB1_D30

FSB1_D31

FSB1_D29

FSB1_D26

FSB1_D28

FSB1_D27

FSB1_D23

FSB1_D25

FSB1_D24

FSB1_D22

FSB1_D21

FSB1_D20

FSB1_D18

FSB1_D17

FSB1_D19

FSB1_D15

FSB1_D16

FSB1_D14

FSB1_D12

FSB1_D11

FSB1_D13

FSB1_D10

FSB1_D8

FSB1_D9

FSB1_D7

FSB1_D6

FSB1_D5

FSB1_D4

FSB1_D2

FSB1_D3

3

FSB1_D1

FSB1_D0

CPU1 SMI Voltage Translation

U37

U37

6

FSB_SMI#9,25,33

CPU1_DISABLE_N33,38

1

A
B4C
BE

PI5C3303

PI5C3303

BE=High, C=B

VCC
GND

P5V

2

CPU1_SMI_N

5
3

MSI

MSI

MSI

2

MICRO-STAR INT'L CO.,LTD

MICRO-STAR INT'L CO.,LTD

MICRO-STAR INT'L CO.,LTD

MS-9196

MS-9196

Size Document Description Rev

Size Document Description Rev

Size Document Description Rev

Custom

Custom

Custom

Date:

Wednesday, May 02, 2007

Date:

Wednesday, May 02, 2007

Date:

Wednesday, May 02, 2007

MS-9196

CPU1 SIGNAL

CPU1 SIGNAL

CPU1 SIGNAL

1

Sheet of

Sheet of

Sheet of

12 58

12 58

12 58

00A

00A

00A

5

4

3

2

1

P1 Intel LGA771 Power

VCORE1

D D

AH27

AH26

AH25

AH22

AH21

AH19

AH18

AH15

AH14

AH12

AH11

AG9

AG8

AG30

AG29

AG28

AG27

AG26

AG25

AG22

AG21

AG19

AG18

AG15

AG14

AG12

AG11

AF9

AF8

AF22

AF21

VCORE1

AF19

VCC

AF18

VCC

AF15

VCC

AF14

VCC

AF12

VCC

AF11

VCC

AE9

VCC

AE23

VCC

AE22

VCC

AE21

VCC

AE19

VCC

AE18

VCC

AE15

VCC

AE14

VCC

AE12

VCC

AE11

VCC

AD8

VCC

AD30

VCC

AD29

VCC

AD28

VCC

AD27

VCC

AD26

VCC

AD25

VCC

AD24

C C

AD23

AC8
AC30
AC29
AC28
AC27
AC26
AC25
AC24
AC23

AB8

AA8

VCORE1

VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

Y8

Y28

Y29

Y30

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCCW8VCC

VCC

VCC

VCC

VCC

Y23

Y24

Y25

Y26

Y27

W30

W29

VCC

VCC

W28

VCC

VCC

W27

VCC

VCC

W26

VCC

VCC

W25

VCC

VCC

W24

VCC

VCC

VCC

W23

VCC

VCC

VCCU8VCCV8VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

U26

U27

U28

U29

U30

AH28

AH29

AH30

AH8

AH9

AJ11

AJ12

AJ14

AJ15

AJ18

AJ19

AJ21

AJ22

AJ25

AJ26

AJ8

AJ9

AK11

AK12

AK14

AK15

AK18

AK19

AK21

AK22

AK25

AK26

AK8

AK9

AL11

AL12

AL14

AL15

AL18

AL19

AL21

AL22

AL25

AL26

AL29

AL30

AL9

AM11

AM12

AM14

AM15

AM18

AM19

AM21

AM22

AM25

AM26

AM29

AM30

AM8

AM9

AN11

AN12

AN14

AN15

AN18

AN19

AN21

AN22

CPU2B

CPU2B

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

A23

VCCA

B23

VSSA

D23

VCCPLL

C23

VCCIOPLL

F30

VTT

E30

VTT

A25

VTT

A26

VTT

B25

VTT

B26

VTT

B27

VTT

B28

VTT

VTT_OUT1
VTT_OUT0

VTT_SEL

NONE

SOCKET771

SOCKET771

VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT

B29
B30
C25
C26
C27
C28
C29
C30
D25
D26
D27
D28
D29
D30

AM6
AA1
J1
F27

LGA771

PART 2
Power

VTTPWRGD

VCC

VCC

NONE

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCCJ8VCCJ9VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCCK8VCCL8VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCCM8VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCCN8VCCP8VCCR8VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCCT8VCC

VCC

VCC

J10

J11

J12

J13

J14

J15

J18

J19

J20

J21

J22

J23

J24

J25

J26

J27

J28

J29

T30

U23

U24

U25

N30

N23

N24

N25

N26

N27

N28

N29

M30

M29

M28

M27

M26

M25

M24

M23

K27

K28

K29

K30

T23

T24

T25

T26

T27

T28

T29

J30

K23

K24

K25

K26

AN9

AN8

AN26

AN25

AN30

AN29

H1_VCCA
H1_VSSA
H1_VCCPLL

VTT_PWRGD

VTT_SEL1

R8660R866

0

P_VTT

VTT_PWRGD 10,48

VTT_SEL 10,45

B B

A A

Minmum trace and width as wide as possible < 12 mils

P_VTT

DC current if 100mA

L5 10uH-0805-0.1AL5 10uH-0805-0.1A
L6 10uH-0805-0.1AL6 10uH-0805-0.1A

P1V5

5

R1780R178

0

C39

C39
22u-1206

22u-1206

C199

C199
103P

103P

C40

C40
X_10u-1206

X_10u-1206

C194

C194

4.7u-0805

4.7u-0805

4

H1_VCCA

C183

C183
X_1u

X_1u

H1_VSSA

H1_VCCPLL

C195

C195

4.7u-0805

4.7u-0805

P_VTT

C764

C764
10u-1206

10u-1206

C760

C760
10u-1206

10u-1206

C755

C755

0.1u

0.1u

C769

C769

0.1u

0.1u

MICRO-STAR INT'L CO.,LTD

MICRO-STAR INT'L CO.,LTD

MICRO-STAR INT'L CO.,LTD

MS-9196

MS-9196

MSI

MSI

MSI

Size Document Description Rev

Size Document Description Rev

Size Document Description Rev
Custom

Custom

Custom
Date:

Wednesday, May 02, 2007

Date:

Wednesday, May 02, 2007

Date:

3

2

Wednesday, May 02, 2007

MS-9196

CPU1 POWER

CPU1 POWER

CPU1 POWER

1

13 58

13 58

13 58

Sheet of

Sheet of

Sheet of

00A

00A

00A

5

4

3

2

1

P1 Intel LGA771 GND

A12
A15
A18

A21
A24

AA23
AA24
AA25
AA26
AA27
AA28
AA29

AA3

AA30

AA6
AA7

AB1
AB23
AB24
AB25
AB26
AB27
AB28
AB29
AB30

AB7

AC3

AC6

AC7

AD4

AD7
AE10
AE13
AE16
AE17

AE2
AE20
AE24
AE25
AE26
AE27
AE28

P_VTT

F1

A2

A6
A9

R431

R431
51_0402

51_0402

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

D16

A20

RESVDC9RESVD

VSS

VSS

AE5

AE29

AE30

G5

W2

RESVD

RESVD

VSS

VSS

AE7

AF10

G6

E24

RESVD

RESVD

VSS

VSS

AF13

AF16

AC4

AE4

RESVD

RESVD

VSS

VSS

AF17

AF20

D14

RESVD

RESVDD1RESVD

VSS

VSS

AF23

AF24

PECI_CPU 11,34,50

E23

F23

RESVD

RESVDE5RESVDE6RESVDE7RESVD

VSS

VSS

VSS

VSS

VSS

AF25

AF26

AF27

AF28

AF29

D D

FSB1_BPM_B1#46

C C

B B

B13

RESVDF6RESVD

VSS

VSS

VSS

AF3

AF30

P_VTT

R253

R253

X_49.9RST_0402

X_49.9RST_0402

P5

E1

RESVDJ3RESVDN4RESVD

RESVD

VSS

VSS

VSS

VSS

AF6

AF7

AG10

AG13

AG16

R435

R435
51_0402

51_0402

AE6

AN5

AN6

RESVDN5RESVD

RESVD

VSS

VSS

VSS

AG17

AG20

AG23

AJ3

AK3

RESVD

RESVD

VSS

VSS

AG7

AG24

F29

RESVD

RESVD

VSS

VSS

AH1

AH10

VSS

AN27

AN28

NONE

VSS

AH13

AH16

NONE

VSS

VSS

AH17

V30

VSSY7VSSY5VSSY2VSSW7VSSW4VSSV7VSSV6VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

AH3

AH6

AJ10

AJ13

AH24

AJ16

AH20

AH23

VSS

V29

V28

V27

V26

V25

V24

VSSV3VSS

VSS

VSS

VSS

VSS

LGA771

VSS

VSS

VSS

VSS

VSS

VSS

AJ17

AJ20

AJ23

AJ24

AJ27

AJ28

AJ29

V23

VSS

VSS

VSSU7VSSU1VSST7VSST6VSST3VSSR7VSSR5VSS

PART 3

GND

VSS

VSS

VSS

VSS

VSS

VSS

VSS

AJ4

AJ30

AK10

AK13

AK16

AK17

AK2

VSS

VSS

AK20

R30

VSS

AK23

R29

VSS

VSS

AK24

R28

VSS

VSS

AK27

R27

VSS

VSS

AK28

R26

VSS

VSS

AK29

R25

VSS

VSS

AK30

R24

VSS

VSS

AK5

R23

VSS

VSSR2VSSP7VSSP4VSS

VSS

VSS

AK7

AL10

VSS

AL13

VSS

AL16

P30

VSS

AL17

P29

VSS

VSS

AL20

P28

VSS

VSS

AL23

P27

VSS

VSS

AL24

P26

VSS

VSS

AL27

P25

P24

P23

VSS

VSS

VSS

VSSN7VSSN6VSSN3VSSM7VSSM1VSSL7VSSL6VSS

VSS

VSS

VSS

VSS

AL3

AM1

AL28

AM10

VSS

AM13

VSS

AM16

VSS

AM17

VSS

AM20

VSS

AM23

VSS

AM24

L30

VSS

AM27

L29

VSSL3VSS

VSS

AM4

AM28

VSS

L28

AM7

VSS

VSS

L27

AN1

L26

L25

L24

L23

VSS

VSS

VSS

VSS

VSS

VSSK7VSSK5VSSK2VSSJ7VSSJ4VSSH9VSSH8VSSH7VSSH6VSSH3VSS

VSS

VSS

VSS

VSS

VSS

VSS

AN2

AN10

AN13

AN16

AN17

VSS

AN20

VSS

AN23

AN24

VSSB5VSS

VSS

VSSB1VSS

H29

H28

H27

H26

H25

H24

CPU2C

CPU2C

VSS

VSS

VSS

VSS

VSS

H23

VSS

H22

VSS

H21

VSS

H20

VSS

H19

VSS

H18

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

VSS

VSS

VSS

VSSC4VSS

VSS

SOCKET771

B17

B20

B24

SOCKET771

C7

B8

B11

B14

H17
H14
H13
H12
H11
H10
G1
F7
F4
F22
F19
F16
F13
F10
E8
E29
E28
E27
E26
E25
E20
E2
E17
E14
E11
D9
D6
D5
D3
D24
D21
D18
D15
D12
C24
C22
C19
C16
C13
C10

P_VTT

R427

R427
51_0402

51_0402

FSB1_BPM_B0# 46

A A

MICRO-STAR INT'L CO.,LTD

MICRO-STAR INT'L CO.,LTD

MICRO-STAR INT'L CO.,LTD

MS-9196

MS-9196

MSI

MSI

MSI

Size Document Description Rev

Size Document Description Rev

Size Document Description Rev

Custom

Custom

Custom

Date:

Wednesday, May 02, 2007

Date:

Wednesday, May 02, 2007

Date:

5

4

3

2

Wednesday, May 02, 2007

MS-9196

CPU1 GND

CPU1 GND

CPU1 GND

Sheet of

Sheet of

Sheet of

1

14 58

14 58

14 58

00A

00A

00A

5

5000P FSB0/1

FSB0_D[63..0]9

D D

C C

FSB0_DBI#[3..0]9

FSB0_DSTBP_N[3..0]9

B B

FSB0_DSTBN_N[3..0]9

MCH FSB0 VREF CKTS

P_VTT

R201

R201

49.9RST

49.9RST

R199

R199

100RST

100RST

A A

FSB0_D[63..0]

FSB0_DBI#[3..0]

FSB0_DSTBP_N[3..0]

FSB0_DSTBN_N[3..0]

CK_H_MCH31

CK_H_MCH_N31

800mV at 1.2V FSB Vtt

Minmum trace and width as wide as possible

12 mils

R1980R198

0

C247

C2481uC248
1u

C247
220P

220P

FSB0_VREF

C255

C255
220P

220P

FSB0_D63
FSB0_D62
FSB0_D61
FSB0_D60
FSB0_D59
FSB0_D58
FSB0_D57
FSB0_D56
FSB0_D55
FSB0_D54
FSB0_D53
FSB0_D52
FSB0_D51
FSB0_D50
FSB0_D49
FSB0_D48
FSB0_D47
FSB0_D46
FSB0_D45
FSB0_D44
FSB0_D43
FSB0_D42
FSB0_D41
FSB0_D40
FSB0_D39
FSB0_D38
FSB0_D37
FSB0_D36
FSB0_D35
FSB0_D34
FSB0_D33
FSB0_D32
FSB0_D31
FSB0_D30
FSB0_D29
FSB0_D28
FSB0_D27
FSB0_D26
FSB0_D25
FSB0_D24
FSB0_D23
FSB0_D22
FSB0_D21
FSB0_D20
FSB0_D19
FSB0_D18
FSB0_D17
FSB0_D16
FSB0_D15
FSB0_D14
FSB0_D13
FSB0_D12
FSB0_D11
FSB0_D10
FSB0_D9
FSB0_D8
FSB0_D7
FSB0_D6
FSB0_D5
FSB0_D4
FSB0_D3
FSB0_D2
FSB0_D1
FSB0_D0

FSB0_DBI#3
FSB0_DBI#2
FSB0_DBI#1
FSB0_DBI#0

FSB0_DSTBP_N3
FSB0_DSTBP_N2
FSB0_DSTBP_N1
FSB0_DSTBP_N0

FSB0_DSTBN_N3
FSB0_DSTBN_N2
FSB0_DSTBN_N1
FSB0_DSTBN_N0

CK_H_MCH
CK_H_MCH_N

BLACKFORD 4/11

BLACKFORD 4/11

AE37

FSB0_D63

AE36

FSB0_D62

AH36

FSB0_D61

AG36

FSB0_D60

AF38

FSB0_D59

AE38

FSB0_D58

AH38

FSB0_D57

AJ38

FSB0_D56

AJ37

FSB0_D55

AG35

FSB0_D54

AK36

FSB0_D53

AL37

FSB0_D52

AL36

FSB0_D51

AL38

FSB0_D50

AJ34

FSB0_D49

AF37

FSB0_D48

AE28

FSB0_D47

AD29

FSB0_D46

AF28

FSB0_D45

AC31

FSB0_D44

AE29

FSB0_D43

AC30

FSB0_D42

AD30

FSB0_D41

AE31

FSB0_D40

AE32

FSB0_D39

AD35

FSB0_D38

AF33

FSB0_D37

AG32

FSB0_D36

AF31

FSB0_D35

AE34

FSB0_D34

AG30

FSB0_D33

AG33

FSB0_D32

AM37

FSB0_D31

AK35

FSB0_D30

AM34

FSB0_D29

AM38

FSB0_D28

AP38

FSB0_D27

AN36

FSB0_D26

AL35

FSB0_D25

AN35

FSB0_D24

AP36

FSB0_D23

AT37

FSB0_D22

AU36

FSB0_D21

AP34

FSB0_D20

AT36

FSB0_D19

AP35

FSB0_D18

AL34

FSB0_D17

AN33

FSB0_D16

AJ33

FSB0_D15

AG27

FSB0_D14

AG29

FSB0_D13

AM33

FSB0_D12

AH31

FSB0_D11

AJ30

FSB0_D10

AH32

FSB0_D9

AJ31

FSB0_D8

AL31

FSB0_D7

AK30

FSB0_D6

AN32

FSB0_D5

AH29

FSB0_D4

AK29

FSB0_D3

AH28

FSB0_D2

AL29

FSB0_D1

AJ28

FSB0_D0

AH37

FSB0_DBI3

AF30

FSB0_DBI2

AP37

FSB0_DBI1

AL32

FSB0_DBI0

AH35

FSB0_DSTBP3

AD33

FSB0_DSTBP2

AR38

FSB0_DSTBP1

AK33

FSB0_DSTBP0

AH34

FSB0_DSTBN3

AD32

FSB0_DSTBN2

AR37

FSB0_DSTBN1

AK32

FSB0_DSTBN0

AN17

CORECLKP

AP17

CORECLKN

MCH FSB SLEW Control

MCH_FSB_SLWCTRL

R441

MCH_FSB_SLWCTRL#46

R441

X_100

X_100

5

Q36

Q36

B

X_2N3904S

X_2N3904S

E C

To Set FSB Slew Control Manually Follow Table Below:

Stuffing Options

Roption = Stuffed
Roption = Empty

4

U24D

U24D

FSB0_A35
FSB0_A34
FSB0_A33
FSB0_A32
FSB0_A31
FSB0_A30
FSB0_A29
FSB0_A28
FSB0_A27
FSB0_A26
FSB0_A25
FSB0_A24
FSB0_A23
FSB0_A22
FSB0_A21
FSB0_A20
FSB0_A19
FSB0_A18
FSB0_A17
FSB0_A16
FSB0_A15
FSB0_A14
FSB0_A13
FSB0_A12
FSB0_A11
FSB0_A10

FSB0_A9
FSB0_A8
FSB0_A7
FSB0_A6
FSB0_A5
FSB0_A4
FSB0_A3

FSB0_REQ4
FSB0_REQ3
FSB0_REQ2
FSB0_REQ1
FSB0_REQ0

FSB 0

FSB 0

FSB0_ADSTB1
FSB0_ADSTB0

FSB0_BPRI_N

FSB0_DEFER_N

FSB0_RESET_N

FSB0_RS2
FSB0_RS1
FSB0_RS0

FSB0_RSP_N

FSB0_TRDY_N

FSB0_ADS_N

FSB0_AP1
FSB0_AP0

FSB0_BINIT_N

FSB0_BNR_N

FSB0_BPM5

FSB0_BPM4
FSB0_BREQ1
FSB0_BREQ0

FSB0_DBSY_N

FSB0_DP3
FSB0_DP2
FSB0_DP1
FSB0_DP0

FSB0_DRDY_N

FSB0_HIT_N

FSB0_HITM_N

FSB0_LOCK_N

FSB0_MCERR_N

PSEL2
PSEL1
PSEL0

FSB0_VREF

FSB0_VREF

FSB0_VREF

BLACKFORD

BLACKFORD

P1V5

P1V5

MCH_FSB_SLEWCTRL

0
1

4

3

FSB0_A35

AV22

FSB0_A34

AU22

FSB0_A33

AR22

FSB0_A32

AP22

FSB0_A31

AV24

FSB0_A30

AT23

FSB0_A29

AU23

FSB0_A28

AV25

FSB0_A27

AT24

FSB0_A26

AR25

FSB0_A25

AU26

FSB0_A24

AT26

FSB0_A23

AT27

FSB0_A22

AU25

FSB0_A21

AU28

FSB0_A20

AR24

FSB0_A19

AR27

FSB0_A18

AP25

FSB0_A17 FSB1_A16

AV28

FSB0_A16

AF22

FSB0_A15

AG23

FSB0_A14

AF25

FSB0_A13

AH22

FSB0_A12

AL22

FSB0_A11

AJ22

FSB0_A10

AG24

FSB0_A9

AM22

FSB0_A8

AH23

FSB0_A7

AP26

FSB0_A6

AN26

FSB0_A5

AM25

FSB0_A4

AN24

FSB0_A3

AL25

FSB0_REQ_N4

AJ25

FSB0_REQ_N3

AJ24

FSB0_REQ_N2

AK24

FSB0_REQ_N1

AH25

FSB0_REQ_N0

AL26

FSB0_ADSTB_N1

AP23

FSB0_ADSTB_N0

AL23

FSB0_BPRI_N

AU34

FSB0_DEFER_N

AV34

FSB0_RESET_N

AN30

FSB0_RS2_N

AU31

FSB0_RS1_N

AL28

FSB0_RS0_N

AV31

FSB0_RSP_N

AN27

FSB0_TRDY_N

AT32

FSB0_ADS_N

AU29

FSB0_AP1

AK26

FSB0_AP0

AH26

FSB0_BINIT_N

AK27

FSB0_BNR_N

AV30

FSB0_BPM_N5

AP29

FSB0_BPM_N4

AR28

FSB0_BR_N1

AG26

FSB0_BR_N0

AM28

FSB0_DBSY_N

AR30

FSB0_DP_N3

AN29

FSB0_DP_N2

AP31

FSB0_DP_N1

AT33

FSB0_DP_N0

AR31

FSB0_DRDY_N

AT29

FSB0_HIT_N

AU32

FSB0_HITM_N

AV33

FSB0_LOCK_N

AT30

FSB0_MCERR_N

AJ27

AB1
AB2
AC1

AF34
AM30
AM27

Route MCH_CORE_VSSA Between

MCH_FSB_VCCA and MCH_CORE_VCCA

Width=25mils, Space=10mils

R229

R229

0.499RST

0.499RST

R234

R234

0.499RST

0.499RST

MCH_SEL2 47
MCH_SEL1 47
MCH_SEL0 47

FSB0_VREF

L11

L11

4.7uH-0805-30mA

4.7uH-0805-30mA

L13

L13

4.7uH-0805-30mA

4.7uH-0805-30mA

FSB0_A[35..3]

FSB0_REQ_N[4..0]

FSB0_ADSTB_N[1..0]

FSB0_BPRI_N 9
FSB0_DEFER_N 9
FSB0_RESET_N 9
FSB0_RS2_N 9
FSB0_RS1_N 9
FSB0_RS0_N 9
FSB0_RSP_N 9
FSB0_TRDY_N 9

FSB0_ADS_N 9
FSB0_AP1 9
FSB0_AP0 9
FSB0_BINIT_N 9
FSB0_BNR_N 9
FSB0_BPM_N5 9,46
FSB0_BPM_N4 9,46
FSB0_BR_N1 9
FSB0_BR_N0 9
FSB0_DBSY_N 9
FSB0_DP_N3 9
FSB0_DP_N2 9
FSB0_DP_N1 9
FSB0_DP_N0 9
FSB0_DRDY_N 9
FSB0_HIT_N 9
FSB0_HITM_N 9
FSB0_LOCK_N 9
FSB0_MCERR_N 9

FSB1_DSTBP_N[3..0]12

FSB1_DSTBN_N[3..0]12

C305

C305
22u-1206

22u-1206

C317

C317
22u-1206

22u-1206

FSB1_D[63..0]12

FSB1_DBI#[3..0]12

MCH_FSB_VCCA

C301

C301
103P

103P

MCH_CORE_VSSA
MCH_CORE_VCCA

C308

C308
103P

103P

MCH_CORE_VSSA

FSB0_A[35..3] 9

FSB1_D[63..0]

FSB0_REQ_N[4..0] 9

FSB0_ADSTB_N[1..0] 9

FSB1_DBI#[3..0]
FSB1_DSTBP_N[3..0]
FSB1_DSTBN_N[3..0]

FSB1_D63
FSB1_D62
FSB1_D61
FSB1_D60
FSB1_D59
FSB1_D58
FSB1_D57
FSB1_D56
FSB1_D55
FSB1_D54
FSB1_D53
FSB1_D52
FSB1_D51
FSB1_D50
FSB1_D49
FSB1_D48
FSB1_D47
FSB1_D46
FSB1_D45
FSB1_D44
FSB1_D43
FSB1_D42
FSB1_D41
FSB1_D40
FSB1_D39
FSB1_D38
FSB1_D37
FSB1_D36
FSB1_D35
FSB1_D34
FSB1_D33
FSB1_D32
FSB1_D31
FSB1_D30
FSB1_D29
FSB1_D28
FSB1_D27
FSB1_D26
FSB1_D25
FSB1_D24
FSB1_D23
FSB1_D22
FSB1_D21
FSB1_D20
FSB1_D19
FSB1_D18
FSB1_D17
FSB1_D16
FSB1_D15
FSB1_D14
FSB1_D13
FSB1_D12
FSB1_D11
FSB1_D10
FSB1_D9
FSB1_D8
FSB1_D7
FSB1_D6
FSB1_D5
FSB1_D4
FSB1_D3
FSB1_D2
FSB1_D1
FSB1_D0

FSB1_DBI#3
FSB1_DBI#2
FSB1_DBI#1
FSB1_DBI#0

FSB1_DSTBP_N3
FSB1_DSTBP_N2
FSB1_DSTBP_N1
FSB1_DSTBP_N0

FSB1_DSTBN_N3
FSB1_DSTBN_N2
FSB1_DSTBN_N1
FSB1_DSTBN_N0

MCH_CORE_VCCA
MCH_FSB_VCCA
MCH_CORE_VSSA

MCH FSB1 VREF CKTS

P_VTT

R245

R245

49.9RST

49.9RST

R247

R247

100RST

100RST

AF16

FSB1_D63

AG14

FSB1_D62

AJ16

FSB1_D61

AJ15

FSB1_D60

AG15

FSB1_D59

AF15

FSB1_D58

AJ13

FSB1_D57

AL16

FSB1_D56

AP16

FSB1_D55

AH16

FSB1_D54

AN15

FSB1_D53

AL14

FSB1_D52

AM15

FSB1_D51

AN14

FSB1_D50

AM16

FSB1_D49

AH14

FSB1_D48

AP14

FSB1_D47

AR12

FSB1_D46

AR13

FSB1_D45

AP11

FSB1_D44

AP13

FSB1_D43

AT12

FSB1_D42

AT11

FSB1_D41

AV12

FSB1_D40

AV10

FSB1_D39

AU10

FSB1_D38

AV9

FSB1_D37

AT8

FSB1_D36

AR9

FSB1_D35

AT9

FSB1_D34

AU8

FSB1_D33

AV7

FSB1_D32

AK12

FSB1_D31

AL13

FSB1_D30

AL11

FSB1_D29

AM13

FSB1_D28

AN11

FSB1_D27

AM12

FSB1_D26

AN12

FSB1_D25

AN9

FSB1_D24

AN8

FSB1_D23

AP8

FSB1_D22

AM9

FSB1_D21

AM6

FSB1_D20

AK9

FSB1_D19

AN6

FSB1_D18

AL8

FSB1_D17

AL7

FSB1_D16

AU5

FSB1_D15

AR7

FSB1_D14

AU7

FSB1_D13

AR6

FSB1_D12

AT6

FSB1_D11

AV4

FSB1_D10

AV6

FSB1_D9

AT5

FSB1_D8

AT3

FSB1_D7

AT2

FSB1_D6

AR4

FSB1_D5

AR3

FSB1_D4

AR1

FSB1_D3

AP4

FSB1_D2

AP5

FSB1_D1

AP1

FSB1_D0

AH13

FSB1_DBI3

AU11

FSB1_DBI2

AK11

FSB1_DBI1

AP7

FSB1_DBI0

AK15

FSB1_DSTBP3

AR10

FSB1_DSTBP2

AM10

FSB1_DSTBP1

AU4

FSB1_DSTBP0

AK14

FSB1_DSTBN3

AP10

FSB1_DSTBN2

AL10

FSB1_DSTBN1

AU3

FSB1_DSTBN0

AT17

COREVCCA

AU17

FSBVCCA

AU16

COREVSSA

800mV at 1.2V FSB Vtt

Minmum trace and width as wide as possible

12 mils

R2430R243

0

C3231uC323
1u

2

BLACKFORD 5/11

BLACKFORD 5/11

C322

C322

C321

C321

220P

220P

220P

220P

FSB 1

FSB 1

FSB1_DEFER_N

FSB1_MCERR_N

FSB1_VREF

FSB1_A35
FSB1_A34
FSB1_A33
FSB1_A32
FSB1_A31
FSB1_A30
FSB1_A29
FSB1_A28
FSB1_A27
FSB1_A26
FSB1_A25
FSB1_A24
FSB1_A23
FSB1_A22
FSB1_A21
FSB1_A20
FSB1_A19
FSB1_A18
FSB1_A17
FSB1_A16
FSB1_A15
FSB1_A14
FSB1_A13
FSB1_A12
FSB1_A11
FSB1_A10

FSB1_A9
FSB1_A8
FSB1_A7
FSB1_A6
FSB1_A5
FSB1_A4
FSB1_A3

FSB1_REQ4
FSB1_REQ3
FSB1_REQ2
FSB1_REQ1
FSB1_REQ0

FSB1_ADSTB1
FSB1_ADSTB0

FSB1_BPRI_N

FSB1_RESET_N

FSB1_RS2
FSB1_RS1
FSB1_RS0

FSB1_RSP_N

FSB1_TRDY_N

FSB1_ADS_N

FSB1_AP1
FSB1_AP0

FSB1_BINIT_N

FSB1_BNR_N

FSB1_BPM5

FSB1_BPM4
FSB1_BREQ1
FSB1_BREQ0

FSB1_DBSY_N

FSB1_DP3
FSB1_DP2
FSB1_DP1
FSB1_DP0

FSB1_DRDY_N

FSB1_HIT_N

FSB1_HITM_N

FSB1_LOCK_N

FSBCRES

FSBODTCRES

FSBSLWCRES

FSBSLWCTRL

FSB1_VREF

FSB1_VREF

FSB1_VREF

BLACKFORD

BLACKFORD

SLEW

2.5V/ns

3.75 or 5V/ns

3

2

1

U24E

U24E

FSB1_A35

AC3

FSB1_A34

AC4

FSB1_A33

AD2

FSB1_A32

AE1

FSB1_A31

AE2

FSB1_A30

AE4

FSB1_A29

AD3

FSB1_A28

AF3

FSB1_A27

AF1

FSB1_A26

AJ3

FSB1_A25

AH1

FSB1_A24

AH2

FSB1_A23

AD5

FSB1_A22

AC6

FSB1_A21

AE5

FSB1_A20

AD6

FSB1_A19

AH5

FSB1_A18

AG5

FSB1_A17

AF4
AA12

FSB1_A15

AC7

FSB1_A14

AB10

FSB1_A13

AC9

FSB1_A12

AD8

FSB1_A11

AF6

FSB1_A10

AB11

FSB1_A9

AE7

FSB1_A8

AF7

FSB1_A7

AG8

FSB1_A6

AH8

FSB1_A5

AC12

FSB1_A4

AD9

FSB1_A3

AD12

FSB1_REQ_N4

AE10

FSB1_REQ_N3

AF9

FSB1_REQ_N2

AJ6

FSB1_REQ_N1

AD11

FSB1_REQ_N0

AG9

FSB1_ADSTB_N1

AG3

FSB1_ADSTB_N0

AC10

FSB1_BPRI_N

AJ10

FSB1_DEFER_N

AJ9

FSB1_RESET_N

AE11

FSB1_RS2_N

AL5

FSB1_RS1_N

AL1

FSB1_RS0_N

AK5

FSB1_RSP_N

AK2

FSB1_TRDY_N

AK6

FSB1_ADS_N

AP2

FSB1_AP1

AG10

FSB1_AP0

AG12

FSB1_BINIT_N

AJ4

FSB1_BNR_N

AK3

FSB1_BPM_N5

AN3

FSB1_BPM_N4

AN2

FSB1_BR_N1

AM1

FSB1_BR_N0

AL2

FSB1_DBSY_N

AM4

FSB1_DP_N3

AF13

FSB1_DP_N2

AF12

FSB1_DP_N1

AJ12

FSB1_DP_N0

AG11

FSB1_DRDY_N

AM3

FSB1_HIT_N

AK8

FSB1_HITM_N

AJ7

FSB1_LOCK_N

AL4

FSB1_MCERR_N

AH11

MCH_FSB_CRES

AT35

MCH_FSB_ODTCRES

AR34

MCH_FSB_SLWCRES

AU35

MCH_FSB_SLWCTRL

AV13

AT14
AN5
AH4

FSB1_VREF

FSB1_A[35..3]

FSB1_REQ_N[4..0]

FSB1_ADSTB_N[1..0]

FSB1_BPRI_N 12
FSB1_DEFER_N 12
FSB1_RESET_N 12,46
FSB1_RS2_N 12
FSB1_RS1_N 12
FSB1_RS0_N 12
FSB1_RSP_N 12
FSB1_TRDY_N 12

FSB1_ADS_N 12
FSB1_AP1 12
FSB1_AP0 12
FSB1_BINIT_N 12
FSB1_BNR_N 12
FSB1_BPM_N5 12,46
FSB1_BPM_N4 12,46
FSB1_BR_N1 12
FSB1_BR_N0 12
FSB1_DBSY_N 12
FSB1_DP_N3 12
FSB1_DP_N2 12
FSB1_DP_N1 12
FSB1_DP_N0 12
FSB1_DRDY_N 12
FSB1_HIT_N 12
FSB1_HITM_N 12
FSB1_LOCK_N 12
FSB1_MCERR_N 12

P1V5

R2371KR237

1K

FSB1_A[35..3] 12

FSB1_REQ_N[4..0] 12

FSB1_ADSTB_N[1..0] 12

MCH FSB PLL/COMP/VREF CKTS

MCH_FSB_CRES

R189

R189

R188

R188

49.9RST

49.9RST

649RST

649RST

MICRO-STAR INT'L CO.,LTD

MICRO-STAR INT'L CO.,LTD

MICRO-STAR INT'L CO.,LTD

MSI

MSI

MSI

Size Document Description Rev

Size Document Description Rev

Size Document Description Rev
Custom

Custom

Custom
Date:

Wednesday, May 02, 2007

Date:

Wednesday, May 02, 2007

Date:

Wednesday, May 02, 2007

MCH_FSB_ODTCRES

MCH_FSB_SLWCRES

MS-9196

MS-9196

MS-9196

5000P CPU SIGNAL

5000P CPU SIGNAL

5000P CPU SIGNAL

1

Sheet of

Sheet of

Sheet of

15 58

15 58

15 58

00A

00A

00A

5

4

3

2

1

500P FBD Interface

U24A

U24A

BLACKFORD 1/11

BLACKFORD 1/11

V29

FBD0NBIP13

U30

FBD0NBIP12

U36

FBD0NBIP11

V35

FBD0NBIP10

W34

FBD0NBIP9

U33

FBD0NBIP8

V32

FBD0NBIP7

T31

FBD0NBIP6

W28

FBD0NBIP5

U28

FBD0NBIP4

V27

FBD0NBIP3

AB31

FBD0NBIP2

Y30

FBD0NBIP1

Y27

FBD0NBIP0

V30

FBD0NBIN13

U31

FBD0NBIN12

U37

FBD0NBIN11

V36

FBD0NBIN10

W35

FBD0NBIN9

U34

FBD0NBIN8

V33

FBD0NBIN7

T32

FBD0NBIN6

W29

FBD0NBIN5

T28

FBD0NBIN4

U27

FBD0NBIN3

AB32

FBD0NBIN2

Y31

FBD0NBIN1

Y28

FBD0NBIN0

K31

FBD1NBIP13

M32

FBD1NBIP12

G38

FBD1NBIP11

H36

FBD1NBIP10

F36

FBD1NBIP9

J35

FBD1NBIP8

K34

FBD1NBIP7

L33

FBD1NBIP6

L30

FBD1NBIP5

M29

FBD1NBIP4

N28

FBD1NBIP3

L27

FBD1NBIP2

M26

FBD1NBIP1

P27

FBD1NBIP0

K32

FBD1NBIN13

N32

FBD1NBIN12

H38

FBD1NBIN11

H37

FBD1NBIN10

F37

FBD1NBIN9

K35

FBD1NBIN8

L34

FBD1NBIN7

M33

FBD1NBIN6

L31

FBD1NBIN5

M30

FBD1NBIN4

N29

FBD1NBIN3

L28

FBD1NBIN2

M27

FBD1NBIN1

P28

FBD1NBIN0

R38

FBD01CLKP

T38

FBD01CLKN

T35

FBD01VCCA

T34

FBD01VSSA

FBD0SDA

5

SDA0
SCL0

SDA1
SCL1

SDA2
SCL2

SDA3
SCL3

INT0
INT1
INT2
INT3

INTOUT

FBD0SCL

6

FBD1SDA

8

FBD1SCL

9

FBD2SDA

12

FBD2SCL

13

FBD3SDA

15

FBD3SCL

16
4

7
11
14

17

Northbound

Northbound

Southbound

Southbound

Channel 0

Channel 0

Northbound

Northbound

Southbound

Southbound

Channel 1

Channel 1

FBDICOMPBIAS

FBDBGBIASEXT

4

FBD0SBOP9
FBD0SBOP8
FBD0SBOP7
FBD0SBOP6
FBD0SBOP5
FBD0SBOP4
FBD0SBOP3
FBD0SBOP2
FBD0SBOP1
FBD0SBOP0

FBD0SBON9
FBD0SBON8
FBD0SBON7
FBD0SBON6
FBD0SBON5
FBD0SBON4
FBD0SBON3
FBD0SBON2
FBD0SBON1
FBD0SBON0

FBD1SBOP9
FBD1SBOP8
FBD1SBOP7
FBD1SBOP6
FBD1SBOP5
FBD1SBOP4
FBD1SBOP3
FBD1SBOP2
FBD1SBOP1
FBD1SBOP0

FBD1SBON9
FBD1SBON8
FBD1SBON7
FBD1SBON6
FBD1SBON5
FBD1SBON4
FBD1SBON3
FBD1SBON2
FBD1SBON1
FBD1SBON0

FBD0SCL

FBD0SDA

FBD1SCL

FBD1SDA

FBDRESIN

BLACKFORD

BLACKFORD

AC34
AB35
AB37
AA38
Y36
Y34
AA32
V38
W32

AA35
AC33
AB34
AC37
AB38
Y37
Y33
AA33
W38
W31

N38
R33
P34
R36
P37
N34
M35
K38
L36
J36

N37
R32
P33
R35
P36
N35
M36
L38
L37
J37

H13
G13

J16
K15

F35
E36
E37

FBD_CH0_SB_P8
FBD_CH0_SB_P7
FBD_CH0_SB_P6
FBD_CH0_SB_P5
FBD_CH0_SB_P4
FBD_CH0_SB_P3
FBD_CH0_SB_P2
FBD_CH0_SB_P1
FBD_CH0_SB_P0

FBD_CH0_SB_N9
FBD_CH0_SB_N8
FBD_CH0_SB_N7
FBD_CH0_SB_N6
FBD_CH0_SB_N5
FBD_CH0_SB_N4
FBD_CH0_SB_N3
FBD_CH0_SB_N2
FBD_CH0_SB_N1
FBD_CH0_SB_N0

FBD_CH1_SB_P9
FBD_CH1_SB_P8
FBD_CH1_SB_P7
FBD_CH1_SB_P6
FBD_CH1_SB_P5
FBD_CH1_SB_P4
FBD_CH1_SB_P3
FBD_CH1_SB_P2
FBD_CH1_SB_P1
FBD_CH1_SB_P0

FBD_CH1_SB_N9
FBD_CH1_SB_N8
FBD_CH1_SB_N7
FBD_CH1_SB_N6
FBD_CH1_SB_N5
FBD_CH1_SB_N4
FBD_CH1_SB_N3
FBD_CH1_SB_N2
FBD_CH1_SB_N1
FBD_CH1_SB_N0

FBD0SCL
FBD0SDA

FBD1SCL
FBD1SDA

FBDICOMBIAS
FBDRESIN
FBDBGBIASEXT

FBD_CH0_SB_P9

AA36

MCH FBD PLL/COMP CKTS

R174

R174
100RST

100RST

R173

R173

51.1RST

51.1RST

P3V3

FBD_CH0_NB_P[13..0]

FBD_CH0_NB_N[13..0]

FBD_CH1_NB_P[13..0]

FBD_CH1_NB_N[13..0]

FBD01CLKP31
FBD01CLKN31 FBD23CLKP31

SDA633
SCL633

R268 100R268 100
R266 100R266 100
R267 100R267 100

5

FBD_CH0_NB_P13
FBD_CH0_NB_P12
FBD_CH0_NB_P11
FBD_CH0_NB_P10
FBD_CH0_NB_P9
FBD_CH0_NB_P8
FBD_CH0_NB_P7
FBD_CH0_NB_P6
FBD_CH0_NB_P5
FBD_CH0_NB_P4
FBD_CH0_NB_P3
FBD_CH0_NB_P2
FBD_CH0_NB_P1
FBD_CH0_NB_P0

FBD_CH0_NB_N13
FBD_CH0_NB_N12
FBD_CH0_NB_N11
FBD_CH0_NB_N10
FBD_CH0_NB_N9
FBD_CH0_NB_N8
FBD_CH0_NB_N7
FBD_CH0_NB_N6
FBD_CH0_NB_N5
FBD_CH0_NB_N4
FBD_CH0_NB_N3
FBD_CH0_NB_N2
FBD_CH0_NB_N1
FBD_CH0_NB_N0

FBD_CH1_NB_P13
FBD_CH1_NB_P12
FBD_CH1_NB_P11
FBD_CH1_NB_P10
FBD_CH1_NB_P9
FBD_CH1_NB_P8
FBD_CH1_NB_P7
FBD_CH1_NB_P6
FBD_CH1_NB_P5
FBD_CH1_NB_P4
FBD_CH1_NB_P3
FBD_CH1_NB_P2
FBD_CH1_NB_P1
FBD_CH1_NB_P0

FBD_CH1_NB_N13
FBD_CH1_NB_N12
FBD_CH1_NB_N11
FBD_CH1_NB_N10
FBD_CH1_NB_N9
FBD_CH1_NB_N8
FBD_CH1_NB_N7
FBD_CH1_NB_N6
FBD_CH1_NB_N5
FBD_CH1_NB_N4
FBD_CH1_NB_N3
FBD_CH1_NB_N2
FBD_CH1_NB_N1
FBD_CH1_NB_N0

FBD01CLKP
FBD01CLKN

FBD01VCCA
FBD01VSSA

SMBus Selector

Address : 1110 001Z

U28

U28

19

SDA

18

SCL

1

A0

2

A1

3

A2

P3V3

20

VDD

10

VSS

I98-0954413-P03

I98-0954413-P03

FBD_CH0_NB_P[13..0]19

D D

FBD_CH0_NB_N[13..0]19

FBD_CH1_NB_P[13..0]20

C C

FBD_CH1_NB_N[13..0]20

B B

A A

P1V5

R175

R175
100RST

100RST

R172

R172
121RST

121RST

FBD_CH0_SB_P[9..0]

FBD_CH0_SB_N[9..0]

FBD_CH1_SB_P[9..0]

FBD_CH1_SB_N[9..0]

FBD0SCL 19
FBD0SDA 19

FBD1SCL 20
FBD1SDA 20

R176

R176
100RST

100RST

FBDRESIN
FBDBGBIASEXT
FBDICOMBIAS

FBD_CH2_NB_N[13..0]21

FBD_CH3_NB_P[13..0]22

FBD_CH3_NB_N[13..0]22

FBD_CH0_SB_P[9..0] 19

FBD_CH0_SB_N[9..0] 19

FBD_CH1_SB_P[9..0] 20

FBD_CH1_SB_N[9..0] 20

FBD_CH2_NB_P[13..0]

FBD_CH2_NB_N[13..0]

FBD_CH3_NB_P[13..0]

FBD_CH3_NB_N[13..0]

3

FBD_CH2_NB_P13
FBD_CH2_NB_P12
FBD_CH2_NB_P11
FBD_CH2_NB_P10
FBD_CH2_NB_P9
FBD_CH2_NB_P8
FBD_CH2_NB_P7
FBD_CH2_NB_P6
FBD_CH2_NB_P5
FBD_CH2_NB_P4
FBD_CH2_NB_P3
FBD_CH2_NB_P2
FBD_CH2_NB_P1
FBD_CH2_NB_P0

FBD_CH2_NB_N13
FBD_CH2_NB_N12
FBD_CH2_NB_N11
FBD_CH2_NB_N10
FBD_CH2_NB_N9
FBD_CH2_NB_N8
FBD_CH2_NB_N7
FBD_CH2_NB_N6
FBD_CH2_NB_N5
FBD_CH2_NB_N4
FBD_CH2_NB_N3
FBD_CH2_NB_N2
FBD_CH2_NB_N1
FBD_CH2_NB_N0

FBD_CH3_NB_P13
FBD_CH3_NB_P12
FBD_CH3_NB_P11
FBD_CH3_NB_P10
FBD_CH3_NB_P9
FBD_CH3_NB_P8
FBD_CH3_NB_P7
FBD_CH3_NB_P6
FBD_CH3_NB_P5
FBD_CH3_NB_P4
FBD_CH3_NB_P3
FBD_CH3_NB_P2
FBD_CH3_NB_P1
FBD_CH3_NB_P0

FBD_CH3_NB_N13
FBD_CH3_NB_N12
FBD_CH3_NB_N11
FBD_CH3_NB_N10
FBD_CH3_NB_N9
FBD_CH3_NB_N8
FBD_CH3_NB_N7
FBD_CH3_NB_N6
FBD_CH3_NB_N5
FBD_CH3_NB_N4
FBD_CH3_NB_N3
FBD_CH3_NB_N2
FBD_CH3_NB_N1
FBD_CH3_NB_N0

FBD23CLKP

FBD23CLKN31

Route FBD VCCA with Corresponding VSSA

As Differential Pair

Width=25mils, Space=10mils

P1V5

P1V5

FBD23CLKN

FBD23VCCA
FBD23VSSA

R1970R197

4.7uH-0805-30mA

4.7uH-0805-30mA

0

R1710R1710L7

4.7uH-0805-30mA

4.7uH-0805-30mA

L9

L9

L7

C31
B32
D38
C37
C36
B35
C34
B33
B30
B29
C28
B27
B26
C25

B31
A32
E38
D37
B36
A35
B34
A33
A30
A29
B28
A27
A26
B25

D20
C21
D25
E24
F23
A24
D23
B22
D19
A19
B18
C17
F18

G20

C20
B21
D26
E25
F24
B24
C23
A22
E19
B19
C18
D17
E18
F20

D28
E28

E27
F27

C234

C234
22u-1206

22u-1206

C188

C188
22u-1206

22u-1206

BLACKFORD 2/11

BLACKFORD 2/11

FBD2NBIP13
FBD2NBIP12
FBD2NBIP11
FBD2NBIP10
FBD2NBIP9
FBD2NBIP8
FBD2NBIP7
FBD2NBIP6
FBD2NBIP5
FBD2NBIP4
FBD2NBIP3
FBD2NBIP2
FBD2NBIP1
FBD2NBIP0

FBD2NBIN13
FBD2NBIN12
FBD2NBIN11
FBD2NBIN10
FBD2NBIN9
FBD2NBIN8
FBD2NBIN7
FBD2NBIN6
FBD2NBIN5
FBD2NBIN4
FBD2NBIN3
FBD2NBIN2
FBD2NBIN1
FBD2NBIN0

FBD3NBIP13
FBD3NBIP12
FBD3NBIP11
FBD3NBIP10
FBD3NBIP9
FBD3NBIP8
FBD3NBIP7
FBD3NBIP6
FBD3NBIP5
FBD3NBIP4
FBD3NBIP3
FBD3NBIP2
FBD3NBIP1
FBD3NBIP0

FBD3NBIN13
FBD3NBIN12
FBD3NBIN11
FBD3NBIN10
FBD3NBIN9
FBD3NBIN8
FBD3NBIN7
FBD3NBIN6
FBD3NBIN5
FBD3NBIN4
FBD3NBIN3
FBD3NBIN2
FBD3NBIN1
FBD3NBIN0

FBD23CLKP
FBD23CLKN

FBD23VCCA
FBD23VSSA

C232

C232
103P

103P

C191

C191
103P

103P

Northbound

Northbound

Northbound

Northbound

FBD23VCCA

FBD23VSSA

FBD01VCCA

FBD01VSSA

2

Channel 2

Channel 2

Channel 3

Channel 3

U24B

U24B

FBD2SBOP9
FBD2SBOP8
FBD2SBOP7
FBD2SBOP6
FBD2SBOP5
FBD2SBOP4
FBD2SBOP3
FBD2SBOP2
FBD2SBOP1
FBD2SBOP0

Southbound

Southbound

FBD2SBON9
FBD2SBON8
FBD2SBON7
FBD2SBON6
FBD2SBON5
FBD2SBON4
FBD2SBON3
FBD2SBON2
FBD2SBON1
FBD2SBON0

FBD3SBOP9
FBD3SBOP8
FBD3SBOP7
FBD3SBOP6
FBD3SBOP5
FBD3SBOP4
FBD3SBOP3
FBD3SBOP2
FBD3SBOP1
FBD3SBOP0

Southbound

Southbound

FBD3SBON9
FBD3SBON8
FBD3SBON7
FBD3SBON6
FBD3SBON5
FBD3SBON4
FBD3SBON3
FBD3SBON2
FBD3SBON1
FBD3SBON0

FBD2SCL
FBD2SDA

FBD3SCL
FBD3SDA

BLACKFORD

BLACKFORD

FBD_CH2_SB_P9

E33

FBD_CH2_SB_P8

J32

FBD_CH2_SB_P7

H33

FBD_CH2_SB_P6

G34

FBD_CH2_SB_P5

D34

FBD_CH2_SB_P4

F32

FBD_CH2_SB_P3

D31

FBD_CH2_SB_P2

E30

FBD_CH2_SB_P1

F29

FBD_CH2_SB_P0

G28

FBD_CH2_SB_N9

E34

FBD_CH2_SB_N8

J33

FBD_CH2_SB_N7

H34

FBD_CH2_SB_N6

G35

FBD_CH2_SB_N5

D35

FBD_CH2_SB_N4

F33

FBD_CH2_SB_N3

D32

FBD_CH2_SB_N2

E31

FBD_CH2_SB_N1

F30

FBD_CH2_SB_N0

G29

FBD_CH3_SB_P9

H22

FBD_CH3_SB_P8

K19

FBD_CH3_SB_P7

H18

FBD_CH3_SB_P6

G19

FBD_CH3_SB_P5

J21

FBD_CH3_SB_P4

G23

FBD_CH3_SB_P3

J24

FBD_CH3_SB_P2

H25

FBD_CH3_SB_P1

G26

FBD_CH3_SB_P0

D22

FBD_CH3_SB_N9

H21

FBD_CH3_SB_N8

K18

FBD_CH3_SB_N7

J18

FBD_CH3_SB_N6

H19

FBD_CH3_SB_N5

J20

FBD_CH3_SB_N4

G22

FBD_CH3_SB_N3

J23

FBD_CH3_SB_N2

H24

FBD_CH3_SB_N1

G25

FBD_CH3_SB_N0

E22

FBD2SCL

F15

FBD2SDA

E15

FBD3SCL

H15

FBD3SDA

H16

MSI

MSI

MSI

Size Document Description Rev

Size Document Description Rev

Size Document Description Rev

Custom

Custom

Custom

Date:

Wednesday, May 02, 2007

Date:

Wednesday, May 02, 2007

Date:

Wednesday, May 02, 2007

FBD_CH2_SB_P[9..0]

FBD_CH2_SB_N[9..0]

FBD_CH3_SB_P[9..0]

FBD_CH3_SB_N[9..0]

FBD2SCL 21
FBD2SDA 21

FBD3SCL 22
FBD3SDA 22

RN3

MS-9196

MS-9196

MS-9196

RN3

1 2
3 4
5 6
7 8

8P4R-4.7K

8P4R-4.7K
RN4

RN4

1 2
3 4
5 6
7 8

8P4R-4.7K

8P4R-4.7K

1

FBD2SCL
FBD2SDA
FBD3SCL
FBD3SDA

FBD0SCL
FBD0SDA
FBD1SCL
FBD1SDA

MICRO-STAR INT'L CO.,LTD

MICRO-STAR INT'L CO.,LTD

MICRO-STAR INT'L CO.,LTD

5000P MEMORY SIGNAL

5000P MEMORY SIGNAL

5000P MEMORY SIGNAL

FBD_CH2_SB_P[9..0] 21FBD_CH2_NB_P[13..0]21

FBD_CH2_SB_N[9..0] 21

FBD_CH3_SB_P[9..0] 22

FBD_CH3_SB_N[9..0] 22

P3V3

Sheet of

Sheet of

Sheet of

16 58

16 58

16 58

00A

00A

00A

5

5000P PCI-E Interface

MCH_EXP0_RXP325
MCH_EXP0_RXP225
MCH_EXP0_RXP125
MCH_EXP0_RXP025

MCH_EXP0_RXN325
MCH_EXP0_RXN225
MCH_EXP0_RXN125

P1V5

MCH_EXP0_RXN025

MCH_EXP2_RXP325
MCH_EXP2_RXP225
MCH_EXP2_RXP125
MCH_EXP2_RXP025

MCH_EXP2_RXN325
MCH_EXP2_RXN225
MCH_EXP2_RXN125
MCH_EXP2_RXN025

MCH_EXP3_RXP325
MCH_EXP3_RXP225
MCH_EXP3_RXP125
MCH_EXP3_RXP025

MCH_EXP3_RXN325
MCH_EXP3_RXN225
MCH_EXP3_RXN125
MCH_EXP3_RXN025

MCH_EXP4_RXP323
MCH_EXP4_RXP223
MCH_EXP4_RXP123
MCH_EXP4_RXP023

MCH_EXP4_RXN323
MCH_EXP4_RXN223
MCH_EXP4_RXN123
MCH_EXP4_RXN023

MCH_EXP5_RXP323
MCH_EXP5_RXP223
MCH_EXP5_RXP123
MCH_EXP5_RXP023

MCH_EXP5_RXN323
MCH_EXP5_RXN223
MCH_EXP5_RXN123
MCH_EXP5_RXN023

MCH_EXP6_RXP323
MCH_EXP6_RXP223
MCH_EXP6_RXP123
MCH_EXP6_RXP023

MCH_EXP6_RXN323
MCH_EXP6_RXN223
MCH_EXP6_RXN123
MCH_EXP6_RXN023

MCH_EXP7_RXP323
MCH_EXP7_RXP223
MCH_EXP7_RXP123
MCH_EXP7_RXP023

MCH_EXP7_RXN323
MCH_EXP7_RXN223
MCH_EXP7_RXN123
MCH_EXP7_RXN023

0.499RST

0.499RST

D D

C C

B B

MCH_EXP0_RXP3
MCH_EXP0_RXP2
MCH_EXP0_RXP1
MCH_EXP0_RXP0

MCH_EXP0_RXN3
MCH_EXP0_RXN2
MCH_EXP0_RXN1
MCH_EXP0_RXN0

MCH_EXP2_RXP3
MCH_EXP2_RXP2
MCH_EXP2_RXP1
MCH_EXP2_RXP0

MCH_EXP2_RXN3
MCH_EXP2_RXN2
MCH_EXP2_RXN1
MCH_EXP2_RXN0

MCH_EXP3_RXP3
MCH_EXP3_RXP2
MCH_EXP3_RXP1
MCH_EXP3_RXP0

MCH_EXP3_RXN3
MCH_EXP3_RXN2
MCH_EXP3_RXN1
MCH_EXP3_RXN0

MCH_EXP4_RXP3
MCH_EXP4_RXP2
MCH_EXP4_RXP1
MCH_EXP4_RXP0

MCH_EXP4_RXN3
MCH_EXP4_RXN2
MCH_EXP4_RXN1
MCH_EXP4_RXN0

MCH_EXP5_RXP3
MCH_EXP5_RXP2
MCH_EXP5_RXP1
MCH_EXP5_RXP0

MCH_EXP5_RXN3
MCH_EXP5_RXN2
MCH_EXP5_RXN1
MCH_EXP5_RXN0

MCH_EXP6_RXP3
MCH_EXP6_RXP2
MCH_EXP6_RXP1
MCH_EXP6_RXP0

MCH_EXP6_RXN3
MCH_EXP6_RXN2
MCH_EXP6_RXN1
MCH_EXP6_RXN0

MCH_EXP7_RXP3
MCH_EXP7_RXP2
MCH_EXP7_RXP1
MCH_EXP7_RXP0

MCH_EXP7_RXN3
MCH_EXP7_RXN2
MCH_EXP7_RXN1
MCH_EXP7_RXN0

MCH_100CLK_P31

MCH_100CLK_N31

Route MCH_PE_VCCA With MCH_PE_VSSA

As Differential Pair

Width=25mils, Space=10mils

R331

R331

P5V

L15

L15

4.7uH-0805-30mA

4.7uH-0805-30mA

C808 0.1uC808 0.1u
C810 0.1uC810 0.1u
C790 0.1uC790 0.1u
C796 0.1uC796 0.1u

C807 0.1uC807 0.1u
C809 0.1uC809 0.1u
C791 0.1uC791 0.1u
C797 0.1uC797 0.1u

C795 0.1uC795 0.1u
C804 0.1uC804 0.1u
C799 0.1uC799 0.1u
C803 0.1uC803 0.1u

C794 0.1uC794 0.1u
C805 0.1uC805 0.1u
C798 0.1uC798 0.1u
C802 0.1uC802 0.1u

C789 0.1uC789 0.1u
C800 0.1uC800 0.1u
C792 0.1uC792 0.1u
C806 0.1uC806 0.1u

C788 0.1uC788 0.1u
C801 0.1uC801 0.1u
C793 0.1uC793 0.1u
C811 0.1uC811 0.1u

MCH_100CLK_P
MCH_100CLK_N

MCH_PE_VCCA
MCH_PE_VSSA

C351

C351
22u-1206

22u-1206

MCH_PE_VCCA

C342

C342
103P

103P

MCH_PE_VSSA

M0RP3
M0RP2
M0RP1
M0RP0

M0RN3
M0RN2
M0RN1
M0RN0

M2RP3
M2RP2
M2RP1
M2RP0

M2RN3
M2RN2
M2RN1
M2RN0

M3RP3
M3RP2
M3RP1
M3RP0

M3RN3
M3RN2
M3RN1
M3RN0

BLACKFORD 3/11

BLACKFORD 3/11

AA5

PE0RP3

AB8

PE0RP2

Y4

PE0RP1

Y10

PE0RP0

AA6

PE0RN3

AB7

PE0RN2

Y3

PE0RN1

Y9

PE0RN0

T1

PE2RP3

P3

PE2RP2

N4

PE2RP1

T5

PE2RP0

U1

PE2RN3

R3

PE2RN2

P4

PE2RN1

R5

PE2RN0

U9

PE3RP3

W7

PE3RP2

V5

PE3RP1

V2

PE3RP0

U10

PE3RN3

W8

PE3RN2

V6

PE3RN1

W2

PE3RN0

K10

PE4RP3

D10

PE4RP2

G11

PE4RP1

F12

PE4RP0

L10

PE4RN3

E10

PE4RN2

F11

PE4RN1

E12

PE4RN0

G7

PE5RP3

F8

PE5RP2

C9

PE5RP1

H10

PE5RP0

H7

PE5RN3

G8

PE5RN2

B9

PE5RN1

G10

PE5RN0

J8

PE6RP3

F6

PE6RP2

E4

PE6RP1

C6

PE6RP0

K8

PE6RN3

F5

PE6RN2

E3

PE6RN1

C5

PE6RN0

K4

PE7RP3

H3

PE7RP2

D1

PE7RP1

F3

PE7RP0

L4

PE7RN3

H4

PE7RN2

E1

PE7RN1

F2

PE7RN0

J2

PECLKP

K2

PECLKN

K1

PEVCCA

L1

PEVSSA

MCH PCI-E PLL/COMP/BAND GAP CKTS

C362

C362
1u-0805

A A

1u-0805

2.50V Reference

3

Top View

12

Route MCH_PE_VCCBG With MCH_PE_VSSBG

R327

R327

As Differential Pair

220

220

Width=25mils, Space=10mils

R313

R313

L14

P2V5_REF

1

U34

U34
LM431AIM3/Vf=2.5V

LM431AIM3/Vf=2.5V

3 2

5

0.499RST

0.499RST

L14

4.7uH-0805-30mA

4.7uH-0805-30mA

MCH_PE_VCCBG

C343

C343

C355

C355

103P

103P

22u-1206

22u-1206

MCH_PE_VSSBG

R3080R308
0

Keep Stub Between 0ohm resistor

And 22uF Cap As Short As Possible

4

U24C

U24C

MCH_EXP0_TXP3

AA8

PE0TP3
PE0TP2
PE0TP1
PE0TP0

PE0TN3
PE0TN2

PORT0

PORT0

PE0TN1
PE0TN0

PE2TP3
PE2TP2
PE2TP1
PE2TP0

PE2TN3
PE2TN2

PORT2PORT3PORT4PORT5PORT6PORT7

PORT2PORT3PORT4PORT5PORT6PORT7

PE2TN1
PE2TN0

PE3TP3
PE3TP2
PE3TP1
PE3TP0

PE3TN3
PE3TN2
PE3TN1
PE3TN0

PE4TP3
PE4TP2
PE4TP1
PE4TP0

PE4TN3
PE4TN2
PE4TN1
PE4TN0

PE5TP3
PE5TP2
PE5TP1
PE5TP0

PE5TN3
PE5TN2
PE5TN1
PE5TN0

PE6TP3
PE6TP2
PE6TP1
PE6TP0

PE6TN3
PE6TN2
PE6TN1
PE6TN0

PE7TP3
PE7TP2
PE7TP1
PE7TP0

PE7TN3
PE7TN2
PE7TN1
PE7TN0

PEICOMPI

PERCOMPO

PEVCCBG
PEVSSBG

PEWIDTH3
PEWIDTH2
PEWIDTH1
PEWIDTH0

BLACKFORD

BLACKFORD

PEWIDTH[3:0] PORT2 PORT4 PORT7PORT6PORT3 PORT5

0000
0001
0010
0011
0100

OTHERS

1000
1001

1010(default)

1011
1100

OTHERS

1111

MCH_EXP0_TXP2

AB4

MCH_EXP0_TXP1

AA3

MCH_EXP0_TXP0

Y7

MCH_EXP0_TXN3

AA9

MCH_EXP0_TXN2

AB5

MCH_EXP0_TXN1

AA2

MCH_EXP0_TXN0

Y6

MCH_EXP2_TXP3

R2

MCH_EXP2_TXP2

N1

MCH_EXP2_TXP1

U4

MCH_EXP2_TXP0

T8

MCH_EXP2_TXN3

T2

MCH_EXP2_TXN2

P1

MCH_EXP2_TXN1

T4

MCH_EXP2_TXN0

T7

MCH_EXP3_TXP3

V8

MCH_EXP3_TXP2

U6

MCH_EXP3_TXP1

W5

MCH_EXP3_TXP0

U3

MCH_EXP3_TXN3

V9

MCH_EXP3_TXN2

U7

MCH_EXP3_TXN1

W4

MCH_EXP3_TXN0

V3

MCH_EXP4_TXP3

J11

MCH_EXP4_TXP2

C11

MCH_EXP4_TXP1

C12

MCH_EXP4_TXP0

H12

MCH_EXP4_TXN3

K11

MCH_EXP4_TXN2

D11

MCH_EXP4_TXN1

B12

MCH_EXP4_TXN0

J12

MCH_EXP5_TXP3

D7

MCH_EXP5_TXP2

D8

MCH_EXP5_TXP1

F9

MCH_EXP5_TXP0

J9

MCH_EXP5_TXN3

E7

MCH_EXP5_TXN2

C8

MCH_EXP5_TXN1

E9

MCH_EXP5_TXN0

H9

MCH_EXP6_TXP3

H6

MCH_EXP6_TXP2

C3

MCH_EXP6_TXP1

D5

MCH_EXP6_TXP0

M9

MCH_EXP6_TXN3

J6

MCH_EXP6_TXN2

C2

MCH_EXP6_TXN1

D4

MCH_EXP6_TXN0

M8

MCH_EXP7_TXP3

J5

MCH_EXP7_TXP2

K7

MCH_EXP7_TXP1

G2

MCH_EXP7_TXP0

G5

MCH_EXP7_TXN3

K5

MCH_EXP7_TXN2

L7

MCH_EXP7_TXN1

G1

MCH_EXP7_TXN0

G4

MCH_PE_COMP

R12
P12

MCH_PE_VCCBG

R11

MCH_PE_VSSBG

N11

W10
W11
Y12
AA11

PEWIDTH3
PEWIDTH2
PEWIDTH1
PEWIDTH0

R309 1KR309 1K
R315 100R315 100
R301 1KR301 1K
R300 100R300 100

X4 X4

X4

X4

X4

X4

X4

X4

X4

X4

------RESERVED------­X8
X8
X8
X8
X8

------RESERVED-------

Automatic Link negotiation (Not Support)

Port 0 (ESI) is always set to X4 width.

4

3

MCH_EXP0_TXP3 25
MCH_EXP0_TXP2 25
MCH_EXP0_TXP1 25
MCH_EXP0_TXP0 25

MCH_EXP0_TXN3 25
MCH_EXP0_TXN2 25
MCH_EXP0_TXN1 25
MCH_EXP0_TXN0 25

MCH_EXP2_TXP3 25
MCH_EXP2_TXP2 25
MCH_EXP2_TXP1 25
MCH_EXP2_TXP0 25

MCH_EXP2_TXN3 25
MCH_EXP2_TXN2 25
MCH_EXP2_TXN1 25
MCH_EXP2_TXN0 25

MCH_EXP3_TXP3 25
MCH_EXP3_TXP2 25
MCH_EXP3_TXP1 25
MCH_EXP3_TXP0 25

MCH_EXP3_TXN3 25
MCH_EXP3_TXN2 25
MCH_EXP3_TXN1 25
MCH_EXP3_TXN0 25

MCH_EXP4_TXP3 23
MCH_EXP4_TXP2 23
MCH_EXP4_TXP1 23
MCH_EXP4_TXP0 23

MCH_EXP4_TXN3 23
MCH_EXP4_TXN2 23
MCH_EXP4_TXN1 23
MCH_EXP4_TXN0 23

MCH_EXP5_TXP3 23
MCH_EXP5_TXP2 23
MCH_EXP5_TXP1 23
MCH_EXP5_TXP0 23

MCH_EXP5_TXN3 23
MCH_EXP5_TXN2 23
MCH_EXP5_TXN1 23
MCH_EXP5_TXN0 23

MCH_EXP6_TXP3 23
MCH_EXP6_TXP2 23
MCH_EXP6_TXP1 23
MCH_EXP6_TXP0 23

MCH_EXP6_TXN3 23
MCH_EXP6_TXN2 23
MCH_EXP6_TXN1 23
MCH_EXP6_TXN0 23

MCH_EXP7_TXP3 23
MCH_EXP7_TXP2 23
MCH_EXP7_TXP1 23
MCH_EXP7_TXP0 23

MCH_EXP7_TXN3 23
MCH_EXP7_TXN2 23
MCH_EXP7_TXN1 23
MCH_EXP7_TXN0 23

R1088

R1088

24.9RST

24.9RST

X4X4X4X4X4 X4

X8
X8

X4X4X4X4X4 X4

X8
X8

P1V5

P1V5

PCI5
PCI-EX8

PCI4
PCI-EX4

PCI6
PCI-EX4

For RAID Card

X4 X4

X16

X4 X4

X16

3

X8

X8

X8

X8

P3V3

2

P3V3

SMBus Voltage Translation

R565

R565

R564

R564

4.7K

4.7K

4.7K

4.7K

U24F

U24F

BLACKFORD 6/11

BLACKFORD 6/11

AR15

AK17

AR16

AP32
AP28

AK23
AM24
AM31
AN23
AR33

AV27

H17
G17

M12

D29
N10

AM7
AG6
M11
AE8
AG2
AH7

P10

T37

AJ1

D2
A5
E6

M3

N5
P7
R9
L3

M5

P6
R8
N2

M6

N8

M2

L6
N7
P9

R6
H1

W1

Y1

J3

PWRGOOD
PLTRST_N

ERR_N2
ERR_N1
ERR_N0

RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD

TDIO_ANODE

TDIO_CATHODE

XDPDSTBP_N

XDPDSTBN_N

XDPODTCRES
XDPSLWCRES
XDPCOMCRES

TESTHI_V3REF
TESTHI_V3REF

SYS_PWRGD_3_3V19,21,24,25,28,46 SMBCLK_MAIN 26,31,41,44

MCH_ERR_N224
MCH_ERR_N124
MCH_ERR_N024

R295 1KR295 1K
R296 1KR296 1K
R297 1KR297 1K

MCH_ERR_N2
MCH_ERR_N1
MCH_ERR_N0

MCH_ERR_N2
MCH_ERR_N1
MCH_ERR_N0

CFG_SCL
CFG_SDA

GPIO_SCL

GPIO_SDA

TCK

TDI
TDO
TMS

TRST_N

XDPD_N15
XDPD_N14
XDPD_N13
XDPD_N12
XDPD_N11
XDPD_N10

XDPD_N9
XDPD_N8
XDPD_N7
XDPD_N6
XDPD_N5
XDPD_N4
XDPD_N3
XDPD_N2
XDPD_N1
XDPD_N0

XDPRDY_N

TESTHI

BLACKFORD

BLACKFORD

K14
J14

R1085 5.1KR1085 5.1K

K13

R1087 5.1KR1087 5.1K

L12

A6
B7
B6
A7
A8

A4
B4

E16
D16
A15
C16
A16
A14
B15
D15
B14
B13
E14
A12
D13
A10
B10
A11

C14
C13

A17

XDP1_ODTCRES

G14

XDP1_SLWCRES

J15

XDP1_COMCRES

F14

AC36

G16
F17

XDP0_TCK1
XDP0_TDI_MAIN
XDP0_TDO_MCH
XDP0_TMS_MAIN
XDP0_TRST#

TESTHI0

TESTHI_V3REF1
TESTHI_V3REF0

U43

U43

1
2
3

PCA9515

PCA9515

R567 X_0R567 X_0
R566 X_0R566 X_0

XDP1_COMCRES

XDP1_ODTCRES
XDP1_SLWCRES

XDP GTL/TTL Level translation

U36

XDP0_TDO_MCH
XDP0_TMS_MAIN
XDP0_TCK1
XDP0_TRST#

P_VTT

P3V3

R4481KR448
1K

R454

XDP0_TDO_ESB26

R454
X_1.6K

X_1.6K

R382

R382

49.9RST

49.9RST

R366

R366
100RST

100RST

B

P_VTT

R385 0R385 0

R394 1KR394 1K

C3661uC366
1u

R416

R416
X_330

X_330

B

Q30

Q30
X_2N3904S

X_2N3904S

E C

2

P_VTT

R439

R439
51_0402

51_0402

Q33

Q33
X_2N3904S

X_2N3904S

E C

U36

2

A0

3

A1

5

A2

6

A3

1

DIR

4

GTLREF

XDP0_TDO_MAIN 46

13

B0

12

B1

10

B2

9

MSI

MSI

MSI

VCC3

GND1
GND2
GND3

GTL2005

GTL2005

B3

P3V3

14

7
8
11

MICRO-STAR INT'L CO.,LTD

MICRO-STAR INT'L CO.,LTD

MICRO-STAR INT'L CO.,LTD

Size Document Description Rev

Size Document Description Rev

Size Document Description Rev

Custom

Custom

Custom

Date:

Wednesday, May 02, 2007

Date:

Wednesday, May 02, 2007

Date:

Wednesday, May 02, 2007

P3V3_AUX

8

NC

VCC

7

SCL0

SCL1

6

SDA0

SDA1

5

GND4EN

P3V3

R391 51_0402R391 51_0402

XDP0_TCK1 46
XDP0_TDI_MAIN 46

XDP0_TMS_MAIN 9,12,46
XDP0_TRST# 9,12,46

R177 1KR177 1K

R207 5.1KR207 5.1K
R210 5.1KR210 5.1K

R368 X_1KR368 X_1K
R386 X_1KR386 X_1K

XDP0_TDI_ESB

XDP0_TMS_ESB
XDP0_TCK1_ESB
XDP0_TRST#_ESB

C380

C380

0.1u

0.1u

MS-9196

MS-9196

MS-9196

5000P PCI-E SIGNAL

5000P PCI-E SIGNAL

5000P PCI-E SIGNAL

SMBDAT_MAIN 26,31,41,44PLTRST_N24,46

P3V3

1

SCL5 33
SDA5 33

R568 4.7KR568 4.7K

P_VTT

R1086

R1086

49.9RST

49.9RST

P1V5

P3V3

XDP0_TDI_ESB 26
XDP0_TMS_ESB 26
XDP0_TCK1_ESB 26
XDP0_TRST#_ESB 26

R362 1KR362 1K
R333 1KR333 1K

Sheet of

Sheet of

Sheet of

1

R1083

R1083
549RST

549RST

P3V3

17 58

17 58

17 58

00A

00A

00A

5

4

3

2

1

5000P Power/GND

C284

C284

4.7u-1206

4.7u-1206
C34

C34

4.7u-1206

4.7u-1206
C138

C138

4.7u-1206

4.7u-1206
C190

C190

4.7u-1206

D D

C C

P1V5

P0V9 P0V9 P0V9

B B

4.7u-1206
C262

C262

4.7u-1206

4.7u-1206
C163

C163

4.7u-1206

4.7u-1206
C307

C307

4.7u-1206

4.7u-1206
C300

C300

4.7u-1206

4.7u-1206
C79

C79

4.7u-1206

4.7u-1206
C109

C109

4.7u-1206

4.7u-1206

C1311uC131
1u
C1301uC130
1u
C1441uC144
1u
C1421uC142
1u
C3941uC394
1u
C1601uC160
1u
C1591uC159
1u
C178

C178

4.7u-1206

4.7u-1206
C720

C720

4.7u-1206

4.7u-1206

C311uC31
1u
C301uC30
1u
C451uC45
1u
C461uC46
1u
C671uC67
1u
C681uC68
1u
C921uC92
1u
C901uC90
1u
C1141uC114
1u
C1151uC115
1u

C321uC32
1u
C661uC66
1u
C1611uC161
1u
C291uC29
1u
C1171uC117
1u
C1621uC162
1u
C3951uC395
1u

P_VTT P_VTTP_VTT

P1V5P1V5 P1V5

P3V3

+

+

1 2

C3091uC309
1u

C911uC91
1u
C1161uC116
1u
C481uC48
1u
C691uC69
1u
C1331uC133
1u
C3921uC392
1u
C3831uC383
1u

C4281uC428
1u
C2641uC264
1u
C33

C33

4.7u-1206

4.7u-1206
C156

C156

4.7u-1206

4.7u-1206
C224

C224

4.7u-1206

4.7u-1206

C7571uC757
1u
C7681uC768
1u
C7221uC722
1u
C7431uC743
1u
C7381uC738
1u
C1851uC185
1u

CT7

CT7
560u/4V

560u/4V

P_VTT

C7661uC766
1u
C7701uC770
1u
C7671uC767
1u
C7541uC754
1u
C7531uC753
1u
C7561uC756
1u
C7361uC736
1u
C7321uC732
1u
C7351uC735
1u
C7331uC733
1u

C3931uC393
1u
C4101uC410
1u
C3811uC381
1u
C7491uC749
1u
C7471uC747
1u
C7591uC759
1u
C7651uC765
1u
C3821uC382
1u
C4111uC411
1u

CM55

CM55

0.1u-0402

0.1u-0402
CM58

CM58

0.1u-0402

0.1u-0402
CM56

CM56

0.1u-0402

0.1u-0402
CM15

CM15

0.1u-0402

0.1u-0402
CM16

CM16

0.1u-0402

0.1u-0402
CM73

CM73

0.1u-0402

0.1u-0402

C1431uC143
1u
C471uC47
1u
C1321uC132
1u
C931uC93
1u
C1411uC141
1u
C4081uC408
1u
C4091uC409
1u

P1V5 P1V5

P3V3

BLACKFORD 7/11

BLACKFORD 7/11

AL17

VCC

L16

VCC

L17

VCC

L18

VCC

L19

VCC

M16

VCC

M17

VCC

M18

VCC

N17

VCC

N19

VCC

P16

VCC

P18

VCC

P20

VCC

P22

VCC

P24

VCC

R15

VCC

R17

VCC

R19

VCC

R21

VCC

R23

VCC

T16

VCC

T18

VCC

T20

VCC

T22

VCC

T24

VCC

U15

VCC

U17

VCC

U19

VCC

U21

VCC

U23

VCC

V16

VCC

V18

VCC

V20

VCC

V22

VCC

V24

VCC

W15

VCC

W17

VCC

W19

VCC

W21

VCC

W23

VCC

Y16

VCC

Y18

VCC

Y20

VCC

Y22

VCC

Y24

VCC

AA15

VCC

AA17

VCC

AA19

VCC

AA21

VCC

AA23

VCC

AB16

VCC

AB18

VCC

AB20

VCC

AB22

VCC

AB24

VCC

AC15

VCC

AC17

VCC

AC19

VCC

AC21

VCC

AC23

VCC

AH10

VCCSF

AE35

VCCSF

AA13

VCCSF

AB13

VCCSF

AB14

VCCSF

AC25

VCCSF

AC26

VCCSF

AD26

VCCSF

L24

VCCSEN

F13

V3REF

U24G

U24G

VCCFBD
VCCFBD
VCCFBD
VCCFBD
VCCFBD
VCCFBD
VCCFBD
VCCFBD
VCCFBD
VCCFBD
VCCFBD
VCCFBD
VCCFBD
VCCFBD
VCCFBD
VCCFBD
VCCFBD
VCCFBD
VCCFBD
VCCFBD
VCCFBD
VCCFBD
VCCFBD
VCCFBD
VCCFBD
VCCFBD
VCCFBD
VCCFBD
VCCFBD
VCCFBD
VCCFBD
VCCFBD
VCCFBD
VCCFBD
VCCFBD
VCCFBD
VCCFBD
VCCFBD
VCCFBD
VCCFBD
VCCFBD
VCCFBD
VCCFBD
VCCFBD
VCCFBD

VCCPE
VCCPE
VCCPE
VCCPE
VCCPE
VCCPE
VCCPE
VCCPE
VCCPE
VCCPE
VCCPE
VCCPE
VCCPE
VCCPE
VCCPE
VCCPE
VCCPE
VCCPE
VCCPE
VCCPE
VCCPE
VCCPE
VCCPE
VCCPE
VCCPE
VCCPE
VCCPE
VCCPE
VCCPE
VCCPE
VCCPE
VCCPE
VCCPE
VCCPE
VCCPE

BLACKFORD

BLACKFORD

A20
E20
E23
F25
H20
H23
K21
K22
K23
L20
L21
L22
L23
M20
M21
M22
M23
M24
M25
N20
N21
N22
N23
N24
N25
N26
P25
P26
R25
T25
T26
T27
U25
U26
V25
V26
W25
W26
Y25
Y26
AA25
AA26
AA27
AB25
AB26

G12
J10
L2
L8
L13
L14
L15
M13
M14
M15
N6
N12
N13
N14
N15
P13
P14
R4
R10
R13
R14
T13
T14
U2
U8
U13
U14
V13
V14
W6
W12
W13
W14
Y13
Y14

P_VTT

BLACKFORD 8/11

BLACKFORD 8/11

AC13

VTT

AC14

VTT

AD13

VTT

AD14

VTT

AD15

VTT

AD16

VTT

AD17

VTT

AD18

VTT

AD19

VTT

AD20

VTT

AD21

VTT

AD22

VTT

AD23

VTT

AD24

VTT

AD25

VTT

AE13

VTT

AE14

VTT

AE15

VTT

AE16

VTT

AE17

VTT

AE18

VTT

AE19

VTT

AE20

VTT

AE21

VTT

AE22

VTT

AE23

VTT

AE24

VTT

AE25

VTT

AE26

VTT

AF18

VTT

AF19

VTT

AF20

VTT

AF21

VTT

AG18

VTT

AG19

VTT

AG20

VTT

AG21

VTT

AH18

VTT

AH19

VTT

AH20

VTT

AH21

VTT

AJ18

VTT

AJ19

VTT

AJ20

VTT

AJ21

VTT

AK18

VTT

AK19

VTT

AK20

VTT

AK21

VTT

AL18

VTT

AL19

VTT

AL20

VTT

AL21

VTT

AM18

VTT

AM19

VTT

AM20

VTT

AM21

VTT

AN18

VTT

AN19

VTT

AN20

VTT

AN21

VTT

AP18

VTT

AP19

VTT

AP20

VTT

AP21

VTT

AR18

VTT

AR19

VTT

AR20

VTT

AR21

VTT

AT18

VTT

AT19

VTT

AT20

VTT

AT21

VTT

AU18

VTT

AU19

VTT

AU20

VTT

AU21

VTT

AV18

VTT

AV19

VTT

AV20

VTT

AV21

VTT

U24H

U24H

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

BLACKFORD

BLACKFORD

U24I

BLACKFORD 9/11

BLACKFORD 9/11

C30
C32
C33
C35
C38
D3
D6
D9
D12
D14
D18
D21
D24
D27
D30
D33
D36
E2
E5
E8
E11
E13
E17
E26
E29
E32
E35
F1
F4
F7
F10
F16
F19
F22
F26
F28
F31
F34
F38
G3
G6
G9
G15
G18
G21
G24
G27
G30
G33
G36
G37
H2
H5
H8
H11
H14
H26
H29
H32
H35
J1
J4
J7
J13
J17
J19
J22
J25
J28
J31
J34
J38
K3
K6
K9
K12
K16
K17
K20
K24
K27

AM5

AM8
AM11
AM14
AM17
AM23
AM26
AM29
AM32
AM35
AM36

AN10
AN13
AN16
AN22
AN25
AN28
AN31
AN34
AN37
AN38

AP12
AP15
AP24
AP27
AP30
AP33

AR11
AR14
AR17
AR23
AR26
AR29
AR32
AR35
AR36

AT10
AT13

AT16
AT22
AT25
AT28
AT31
AT34
AT38

AU12
AU15
AU24
AU27
AU30
AU33
AU37

AV11
AV14
AV17
AV23
AV26
AV29
AV32
AV35
AV36

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

AN1

VSS

AN4

VSS

AN7

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

AP3

VSS

AP6

VSS

AP9

VSS
VSS
VSS
VSS
VSS
VSS
VSS

AR2

VSS

AR5

VSS

AR8

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

AT1

VSS

AT4

VSS

AT7

VSS
VSS
VSS

C29

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

AU2

VSS

AU6

VSS

AU9

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

AV3

VSS

AV5

VSS

AV8

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

U24I

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

BLACKFORD

BLACKFORD

AD36
AD37
AD38
AE3
AE6
AE9
AE12
AE30
AE33
AF2
AF5
AF8
AF10
AF11
AF14
AF17
AF23
AF24
AF26
AF27
AF29
AF32
AF35
AF36
AG1
AG4
AG7
AG13
AG16
AG22
AG25
AG28
AG31
AG34
AG37
AG38
AH3
AH6
AH9
AH12
AH15
AH24
AH27
AH30
AH33
AJ2
AJ5
AJ8
AJ11
AJ14
AJ17
AJ23
AJ26
AJ29
AJ32
AJ35
AJ36
AK1
AK4
AK7
AK10
AK13
AK16
AK22
AK25
AK28
AK31
AK34
AK37
AK38
AL3
AL6
AL9
AL12
AL15
AL24
AL27
AL30
AL33
AM2

BLACKFORD 10/11

BLACKFORD 10/11

V17

VSS

V19

VSS

V21

VSS

V23

VSS

V28

VSS

V31

VSS

V34

VSS

V37

VSS

W3

VSS

W9

VSS

W16

VSS

W18

VSS

W20

VSS

W22

VSS

W24

VSS

W27

VSS

W30

VSS

W33

VSS

W36

VSS

W37

VSS

Y2

VSS

Y5

VSS

Y8

VSS

Y11

VSS

Y15

VSS

Y17

VSS

Y19

VSS

Y21

VSS

Y23

VSS

Y29

VSS

Y32

VSS

Y35

VSS

Y38

VSS

AA1

VSS

AA4

VSS

AA7

VSS

AA10

VSS

AA14

VSS

AA16

VSS

AA18

VSS

AA20

VSS

AA22

VSS

AA24

VSS

AA28

VSS

AA31

VSS

AA34

VSS

AA37

VSS

AB3

VSS

AB6

VSS

AB9

VSS

AB12

VSS

AB15

VSS

AB17

VSS

AB19

VSS

AB21

VSS

AB23

VSS

AB27

VSS

AB30

VSS

AB33

VSS

AB36

VSS

AC2

VSS

AC5

VSS

AC8

VSS

AC11

VSS

AC16

VSS

AC18

VSS

AC20

VSS

AC22

VSS

AC24

VSS

AC29

VSS

AC32

VSS

AC35

VSS

AC38

VSS

AD1

VSS

AD4

VSS

AD7

VSS

AD10

VSS

AD28

VSS

AD31

VSS

AD34

VSS

U24J

U24J

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

BLACKFORD

BLACKFORD

U24K

BLACKFORD 11/11

K30
K33
K36
K37
L5
L11
L26
L29
L32
L35
M1
M4
M7
M10
M19
M28
M31
M34
M37
M38
N3
N9
N16
N18
N27
N30
N33
N36
P2
P5
P8
P11
P15
P17
P19
P21
P23
P29
P32
P35
P38
R1
R7
R16
R18
R20
R22
R24
R28
R31
R34
R37
T3
T6
T9
T12
T15
T17
T19
T21
T23
T30
T33
T36
U5
U11
U16
U18
U20
U22
U24
U29
U32
U35
U38
V1
V4
V7
V10
V15

BLACKFORD 11/11

AC27

VSS

AB28

VSS

AA29

VSS

AE27

VSS

AC28

VSS

AB29

VSS

A3

VSS

A9

VSS

A13

VSS

A18

VSS

A21

VSS

A23

VSS

A25

VSS

A28

VSS

A31

VSS

A34

VSS

A36

VSS

B2

VSS

B3

VSS

B5

VSS

B8

VSS

B11

VSS

B16

VSS

B17

VSS

B20

VSS

B23

VSS

B37

VSS

C1

VSS

C4

VSS

C7

VSS

C10

VSS

C15

VSS

C19

VSS

C22

VSS

C24

VSS

C26

VSS

C27

VSS

T11

VSS

U24K

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

VSSSEN

VSSQUIET

BLACKFORD

BLACKFORD

AU13
V12
AT15
T10
AH17
AV16
AV15
U12
AU14
V11
AG17
AA30
J27
K26
F21
H28
J26
K25
E21
H27
K29
J30
H31
G32
K28
J29
H30
G31
R27
R29
P30
N31
R26
T29
R30
P31
AD27

L25
L9

P0V9

+

+

1 2

+

+

1 2

+

+

1 2

A A

+

+

1 2

CT10

CT10
560u/4V

560u/4V
CT1

CT1
560u/4V

560u/4V
CT4

CT4
560u/4V

560u/4V
CT9

CT9
560u/4V

560u/4V

P_VTT

+

+

CT11

CT11

1 2

X_1000u6.3V

X_1000u6.3V

+

+

CT8

CT8

1 2

560u/4V

560u/4V

+

+

CT5

CT5

1 2

X_1000u6.3V

X_1000u6.3V

MICRO-STAR INT'L CO.,LTD

MICRO-STAR INT'L CO.,LTD

MICRO-STAR INT'L CO.,LTD

MS-9196

MS-9196

MSI

MSI

MSI

Size Document Description Rev

Size Document Description Rev

Size Document Description Rev

Custom

Custom

Custom

Date:

Wednesday, May 02, 2007

Date:

Wednesday, May 02, 2007

Date:

5

4

3

2

Wednesday, May 02, 2007

MS-9196

5000P POWER GND

5000P POWER GND

5000P POWER GND

1

Sheet of

Sheet of

Sheet of

18 58

18 58

18 58

00A

00A

00A