MSI MS-9189 Schematic 1.3_m
A B C
Dell Controlled Print
D
REVISIONS
1
SUB=NP Always no-pop
BOM options
REV
DESCRIPTIONECO DATE
APPROVED
A00 ECO218834 RELEASE FOR PRODUCTION 3/02/07 Kurtis Bowman
A01 ECO219910
A02 ECO220966 4/13/07 Kurtis Bowman
A03 ECO221932
A04
A05
ECO224477
ECO268380
Increase the hole diameter for a PTH inductor.
Corrected USB disable issue
Revision to PCIe silicon, Update to NB VRDs
Bullion 1.1 Barcelona Support (BIOS required)
Bullion TPM Support (BIOS Required)
3/23/07 Kurtis Bowman
4/26/07 Kurtis Bowman
9/12/07
10/01/08
Kurtis Bowman
Belayneh Million
1
2
0 = Production
1 = Development/Debug parts (non-ST part)
4 = Development/Debug parts (ST parts)
2 = Adds 2U Parts
3 = Adds 1U Parts
5 = Adds parts for Microvue+ on breakaway
6 = Adds parts for interposer on breakaway
7 = Adds parts for serial board on breakaway
8 = Adds parts for ROW TPM
9 = No TPM
BOM Instructions
In order to build a proper BOM, you must run a combo build
*** UT/ Product Test ***
2U= Builds 1,2,4
1U= Builds 1,3,4 <NOT TESTED>
SUB=POP1
SUB=POP4
SUB=POP2
SUB=POP3
SUB=POP5
SUB=POP6
SUB=POP7
SUB=POP8
SUB=POP9
2
*** System Test ***
2U= Builds 0,2,4
1U= Builds 0,3,4 <NOT TESTED>
*** Production ***
2U= Builds 0,2,8 (Boards with TPM)
2U= Builds 0,2,9 (Boards with NO TPM)
1U= Builds 0,3 <NOT TESTED>
*** For Sample Boards with TPM & New SST FWH ***
2U= Builds 0,2,8
3
4
EXPORT RESTRICTION:
THE EXPORT OF THE INFORMATION, SCHEMATICS AND OTHER TECHNICAL DATA CONTAINED IN THIS DOCUMENT
IS CONTROLLED BY THE U.S. GOVERNMENT. THE EXPORT, DEEMED EXPORT OR OTHER TRANSFER OF THIS DATA
TO CERTAIN COUNTRIES AND INDIVIDUALS IS RESTRICTED. ANY TRANSFER, EXPORT OR REEXPORT, MUST BE
IN COMPLIANCE WITH THE U.S. EXPORT ADMINISTRATION REGULATIONS.
x02_12551_ws: updated table of contents (TOC)
x04_13566_ws:ECO# and sign-offs added
PROPRIETARY NOTE
THIS ITEM IS THE PROPERTY OF DELL INC. ROUND ROCK, TEXAS
AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS
ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL INC.,
EXCEPT AS AUTHORIZED BY DELL INC., AND THEN ONLY BY WAY
OF LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN
WHOLE OR IN PART AND MUST BE RETURNED TO DELL INC.
UPON REQUEST AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE
OF THE LOAN. NEITHER THIS ITEM NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED
FOR SUCH USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE
LOAN WITHOUT THE PRIOR WRITTEN CONSENT OF DELL INC.
PWA: CY813
ASSY: FP976
PWB: FP974
SCH: FP975
DRAWN
DESIGNED
CHECKED
APPROVED
APPROVED
APPROVED
APPROVED
RELEASED
2U DPNs
03/02/2007Will Smith
Will Smith
Sean Hart
03/02/2007
03/02/2007
Randy Hemingway 03/02/2007
04/13/2007Randy Hemingway
Randy Hemingway 04/26/2007
Randy Hemingway
09/12/2007
A CURRENT ISSUE OF THIS DRAWING MUST
INCLUDE A COPY OF THE FOLLOWING
ECO'S:
ECO
ECO
ECO
ECO
ECO
ECO
ECO
ECO
ECO268380
DATE
DATE
DATE
DATE
DATE
DATE
DATE
DATE
INC.
ROUND ROCK,TEXAS
TITLE
SCHEM, PLN, SV, PE2970
DWG NO.
FP975
DATE
SHEET
3
04/29/2008
4
REV.
A05
1 OF 12010/2/2008
SCHEM, PLN, SV, PE2970
FP975
A05
2 OF 12010/2/2008
A B C
D
1
1
2
2
3
3
4
PROPRIETARY NOTE: THIS ITEM IS THE PROPERTY OF DELL INC. ROUND ROCK, TEXAS AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL INC. EXCEPT
AS AUTHORIZED BY DELL INC., AND THEN ONLY BY WAY OF LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE
OR IN PART AND MUST BE RETURNED TO DELL INC. UPON REQUEST AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF THE
LOAN. NEITHER THIS ITEM OR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH
USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT THE PRIOR WRITTEN CONSENT OF DELL INC.
TITLE
DWG NO.
DATE
INC.
ROUND ROCK,TEXAS
SCHEM, PLN, SV, PE2970
REV.
FP975
SHEET
10/2/2008 3 OF 120
DCBA
4
A05
A B C
D
1
1
2
2
3
3
4
x04_13526_ws: Updated diagrams
PROPRIETARY NOTE: THIS ITEM IS THE PROPERTY OF DELL INC. ROUND ROCK, TEXAS AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL INC. EXCEPT
AS AUTHORIZED BY DELL INC., AND THEN ONLY BY WAY OF LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE
OR IN PART AND MUST BE RETURNED TO DELL INC. UPON REQUEST AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF THE
LOAN. NEITHER THIS ITEM OR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH
USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT THE PRIOR WRITTEN CONSENT OF DELL INC.
TITLE
DWG NO.
DATE
INC.
ROUND ROCK,TEXAS
SCHEM, PLN, SV, PE2970
FP975
SHEET
DCBA
4
REV.
A05
4 OF 12010/2/2008
A B C
D
1
1
2
2
3
3
4
x04_13526_ws: Updated diagrams
PROPRIETARY NOTE: THIS ITEM IS THE PROPERTY OF DELL INC. ROUND ROCK, TEXAS AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL INC. EXCEPT
AS AUTHORIZED BY DELL INC., AND THEN ONLY BY WAY OF LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE
OR IN PART AND MUST BE RETURNED TO DELL INC. UPON REQUEST AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF THE
LOAN. NEITHER THIS ITEM OR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH
USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT THE PRIOR WRITTEN CONSENT OF DELL INC.
TITLE
DWG NO.
DATE
INC.
ROUND ROCK,TEXAS
SCHEM, PLN, SV, PE2970
FP975
SHEET
DCBA
4
REV.
A05
5 OF 12010/2/2008
A B C
D
1
1
2
2
3
3
4
PROPRIETARY NOTE: THIS ITEM IS THE PROPERTY OF DELL INC. ROUND ROCK, TEXAS AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL INC. EXCEPT
AS AUTHORIZED BY DELL INC., AND THEN ONLY BY WAY OF LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE
OR IN PART AND MUST BE RETURNED TO DELL INC. UPON REQUEST AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF THE
LOAN. NEITHER THIS ITEM OR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH
USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT THE PRIOR WRITTEN CONSENT OF DELL INC.
TITLE
DWG NO.
DATE
INC.
ROUND ROCK,TEXAS
SCHEM, PLN, SV, PE2970
FP975
SHEET
DCBA
4
REV.
A05
6 OF 12010/2/2008
A B C
D
1
1
2
2
3
3
4
X03_13327_SCH updated timing diagram to v1.0
Powerup Timing- VRDs
PROPRIETARY NOTE: THIS ITEM IS THE PROPERTY OF DELL INC. ROUND ROCK, TEXAS AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL INC. EXCEPT
AS AUTHORIZED BY DELL INC., AND THEN ONLY BY WAY OF LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE
OR IN PART AND MUST BE RETURNED TO DELL INC. UPON REQUEST AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF THE
LOAN. NEITHER THIS ITEM OR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH
USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT THE PRIOR WRITTEN CONSENT OF DELL INC.
TITLE
DWG NO.
DATE
INC.
ROUND ROCK,TEXAS
SCHEM, PLN, SV, PE2970
FP975
SHEET
DCBA
4
REV.
A05
7 OF 12010/2/2008
A B C
D
1
1
2
2
BLANK PAGE
3
3
4
Power up Timing - Chipset
PROPRIETARY NOTE: THIS ITEM IS THE PROPERTY OF DELL INC. ROUND ROCK, TEXAS AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL INC. EXCEPT
AS AUTHORIZED BY DELL INC., AND THEN ONLY BY WAY OF LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE
OR IN PART AND MUST BE RETURNED TO DELL INC. UPON REQUEST AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF THE
LOAN. NEITHER THIS ITEM OR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH
USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT THE PRIOR WRITTEN CONSENT OF DELL INC.
TITLE
DWG NO.
DATE
INC.
ROUND ROCK,TEXAS
SCHEM, PLN, SV, PE2970
REV.
FP975
SHEET
10/2/2008 8 OF 120
DCBA
4
A05
A B C
D
1
1
2
2
BLANK PAGE
3
3
4
PROPRIETARY NOTE: THIS ITEM IS THE PROPERTY OF DELL INC. ROUND ROCK, TEXAS AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL INC. EXCEPT
AS AUTHORIZED BY DELL INC., AND THEN ONLY BY WAY OF LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE
OR IN PART AND MUST BE RETURNED TO DELL INC. UPON REQUEST AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF THE
LOAN. NEITHER THIS ITEM OR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH
USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT THE PRIOR WRITTEN CONSENT OF DELL INC.
TITLE
DWG NO.
DATE
INC.
ROUND ROCK,TEXAS
SCHEM, PLN, SV, PE2970
REV.
FP975
SHEET
10/2/2008 9 OF 120
DCBA
4
A05
A B C
D
1
1
2
2
BLANK PAGE
3
3
4
PROPRIETARY NOTE: THIS ITEM IS THE PROPERTY OF DELL INC. ROUND ROCK, TEXAS AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL INC. EXCEPT
AS AUTHORIZED BY DELL INC., AND THEN ONLY BY WAY OF LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE
OR IN PART AND MUST BE RETURNED TO DELL INC. UPON REQUEST AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF THE
LOAN. NEITHER THIS ITEM OR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH
USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT THE PRIOR WRITTEN CONSENT OF DELL INC.
TITLE
DWG NO.
DATE
INC.
ROUND ROCK,TEXAS
SCHEM, PLN, SV, PE2970
FP975
SHEET
DCBA
4
REV.
A05
10 OF 12010/2/2008
A B C
D
1
1
2
2
BLANK PAGE
3
3
4
PROPRIETARY NOTE: THIS ITEM IS THE PROPERTY OF DELL INC. ROUND ROCK, TEXAS AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL INC. EXCEPT
AS AUTHORIZED BY DELL INC., AND THEN ONLY BY WAY OF LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE
OR IN PART AND MUST BE RETURNED TO DELL INC. UPON REQUEST AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF THE
LOAN. NEITHER THIS ITEM OR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH
USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT THE PRIOR WRITTEN CONSENT OF DELL INC.
TITLE
DWG NO.
DATE
INC.
ROUND ROCK,TEXAS
SCHEM, PLN, SV, PE2970
FP975
SHEET
DCBA
4
REV.
A05
11 OF 12010/2/2008
1
A B C
Place series R's within 0.5 inch of U8002
Place shut R within 100 mil of series R's
ICS932S805
All Unused Clock Outputs Can be Turned Off
R9427
1 2
47.5-1%
CK_200M_CPU1_C_DP
D
17
1
2
3
21
C8674
22pF
50V-5%
14.31818MHz
+3.3V
X5
12
+3.3V
L1820
BLM21AH601
21
21
C8673
L1819
BLM21AH601
1 2
C8738
88,120
22pF
50V-5%
21
10uF 6.3V
CLKGEN_PD_N
48
48
12
MOD_CLKGEN_VCC3
C8682
I2C_CLKGEN_SDA
I2C_CLKGEN_SCL
MOD_CLKGEN_SSC_EN
MOD_CLKGEN_VDDSRC
21
.1uF
R8661
1 2
2.2-5%
21
C8683
16V-10%
R8678
1-1%
.1uF
16V-10%
1 2
C8739
21
21
C8677
MOD_CLKGEN_VDDA
.1uF
16V-10%
10uF 6.3V
21
C8678
MOD_CLKGEN_XTALI
MOD_CLKGEN_XTALO
+3.3V
R8716
1 2
475-1%
21
C8687
MOD_CLKGEN_VDD48M
.1uF
.1uF
21
C8679
16V-10%
16V-10%
.1uF
MOD_CLKGEN_IREF
21
C8686
C8680
16V-10%
.1uF
16V-10%
21
.1uF
C8688
R8641
1 2
4.7K-5%
21
C8685
16V-10%
1 2
.1uF
C8684
16V-10%
C8681
.047uF
16V-10%
Through SMBus For EMI Consideration
R9425
U8002
1
XTALI
2
XTALO
19
PD_N
14
SDATA
13
SCLK
60
SPREAD_EN
23
IREF
3
VDDREF
15
VDDPCI
64
VDD25MHZ
21
.1uF
16V-10%
21
.1uF
16V-10%
7
GNDREF
18
GNDPCI
20
GND
61
GND25MHZ
8
VDD48MHZ
24
VDDA_24
31
VDDSRC_31
39
VDDSRC_39
41
VDDCPU1
49
VDDCPU2
55
VDDCPU3
12
GND48MHZ
32
GNDSRC
40
GND_40
48
GND_48
54
GND_54
21
VDDA_21
22
GNDA
ICS932S805
CPUCLK8T0
CPUCLK8C0
CPUCLK8T1
CPUCLK8C1
CPUCLK8T2
CPUCLK8C2
CPUCLK8T3
CPUCLK8C3
CPUCLK8T4
CPUCLK8C4
CPUCLK8T5
CPUCLK8C5
CPUCLK8T6
CPUCLK8C6
48MHZ_0
48MHZ_1
48MHZ_2
FS3/PCICLK0
PCICLK1
25MHZ_0
25MHZ_1
FS0/REF0
FS1/REF1
FS2/REF2
SRCCLKT0
SRCCLKC0
SRCCLKT1
SRCCLKC1
SRCCLKT2
SRCCLKC2
SRCCLKT3
SRCCLKC3
SRCCLKT4
SRCCLKC4
SRCCLKT5
SRCCLKC5
43
42
45
44
47
46
51
50
53
52
57
56
59
58
9
10
11
16
17
63
62
4
5
6
25
26
27
28
29
30
34
33
36
35
38
37
MOD_CLKGEN_K8CLK_0_DP
MOD_CLKGEN_K8CLK_0_DN
MOD_CLKGEN_K8CLK_1_DP
MOD_CLKGEN_K8CLK_1_DN
NC_CLKGEN_K8CLK_2_DP
NC_CLKGEN_K8CLK_2_DN
NC_CLKGEN_K8CLK_3_DP
NC_CLKGEN_K8CLK_3_DN
NC_CLKGEN_K8CLK_4_DP
NC_CLKGEN_K8CLK_4_DN
MOD_CLKGEN_K8CLK_5_DP
MOD_CLKGEN_K8CLK_5_DN
MOD_CLKGEN_K8CLK_6_DP
MOD_CLKGEN_K8CLK_6_DN
R8662
MOD_CLKGEN_CK48M
NC_CLKGEN_48M_1
NC_CLKGEN_48M_2
MOD_CLKGEN_PCICLK0
MOD_CLKGEN_PCICLK1
TP_CLKGEN_25M_0
NC_CLKGEN_25M_1
MOD_CLKGEN_REF0
MOD_CLKGEN_REF1
MOD_CLKGEN_REF2
NC_MOD_CLKGEN_SRCCLK_0_DP
NC_MOD_CLKGEN_SRCCLK_0_DN
MOD_CLKGEN_SRCCLK_1_DP CK_100M_PCIE_NH_B_DP
MOD_CLKGEN_SRCCLK_1_DN CK_100M_PCIE_NH_B_DN
MOD_CLKGEN_SRCCLK_2_DP CK_100M_PCIE_ROMB_DP
MOD_CLKGEN_SRCCLK_2_DN
NC_MOD_CLKGEN_SRCCLK_3_DP
NC_MOD_CLKGEN_SRCCLK_3_DN
NC_MOD_CLKGEN_SRCCLK_4_DP
NC_MOD_CLKGEN_SRCCLK_4_DN
MOD_CLKGEN_SRCCLK_5_DP CK_100M_PCIE_DB400_DN
MOD_CLKGEN_SRCCLK_5_DN
62-5%
R9492
1 2
33-5%
R9271
1 2
33-5%
R8675
1 2
33-5%
R9175
1 2
33-5%
R8951
1 2
33-5%
1 2
47.5-1%
R9408
1 2
15-1%
R9424
1 2
47.5-1%
R9426
1 2
47.5-1%
R9406
1 2
15-1%
21
R8677
1 2
220-5%
R8676
1 2
33-5%
R8671
1 2
33-5%
R8674
1 2
33-5%
R9174
1 2
33-5%
R8950
1 2
33-5%
R9428
R9409
1 2
15-1%
R9429
R9407
1 2
15-1%
1 2
1 2
261-1%
261-1%
CK_200M_CPU1_C_DN
CK_200M_NH_C_DP
CK_200M_NH_C_DN
CK_200M_CPU2_C_DP
CK_200M_CPU2_C_DN
CK_200M_SH_C_DP
CK_200M_SH_C_DN
CK_48M_SH_USB
NOTE: USB Clock is 2.5V, not 3.3V
CK_33M_SMARTVU
CK_33M_SH
40
12,117
41
17
34
34
27
27
42
42
+3.3V
R8621
1 2
8.2K-5%
R8620
1 2
8.2K-5%
R8618
1 2
8.2K-5%
CK_14M_SH
CK_14M_SIO
CK_100M_PCIE_ROMB_DN
CK_100M_PCIE_DB400_DP
12,41
49
36
36
74
74
120
120
2
3
4
FREQUENCY
FS2 FS1 FS0 CPU MHz
0 0
0 0
10
0 1 1
1 0
1
1 0
1
0
1
1
0
1
0
0
1
1
Hi-Z
X/6
180.00
220.00
100.00
133.33
166.67
200.00
12
Default Strapping
Spread Spectrum Clock Enabled
Can be Disabled through SMBus
MOD_CLKGEN_SSC_EN
Debug Jumper for Disable SSC
R8624
1 2
8.2K-5%
R8623
NP
1 2
8.2K-5%
NP
1 2
J7
X
X
+3.3V
SMBUS ADDRESS 0xD2
FS3=1 CPU OverClock Enable
FS3=0 CPU OverClock Disable
12,117
12,41
CK_33M_SMARTVU
CK_14M_SH
FS0
R9240
NP
1 2
8.2K-5%
R8817
1 2
8.2K-5%
NP
1 2
8.2K-5%
R8818
X
X
+3.3V
R8627
1 2
R4197
49.9-1%
1 2
49.9-1%
ROOM=CLOCK_ICS932S805
PROPRIETARY NOTE
THIS ITEM IS THE PROPERTY OF DELL INC. ROUND ROCK, TEXAS
AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS
ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL INC.,
EXCEPT AS AUTHORIZED BY DELL INC., AND THEN ONLY BY WAY OF
LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE
OR IN PART AND MUST BE RETURNED TO DELL INC. UPON REQUEST
AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF
THE LOAN. NEITHER THIS ITEM NOR THE INFORMATION IT CONTAINS MAY
BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH
USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT
THE PRIOR WRITTEN CONSENT OF DELL INC.
R9094
1 2
R9093
49.9-1%
1 2
R8824
49.9-1%
1 2
R8825
49.9-1%
1 2
49.9-1%
TITLE
DWG NO.
DATE
INC.
ROUND ROCK,TEXAS
SCHEM, PLN, SV, PE2970
FP975
SHEET
10/2/2008
MODULE:
DESC:
REV: OF
REV.
DB410B, DB1200, DB800
A05
12 OF 120
SEC
CK
41
4
C
DBA
A B C
D
1
HT_CK_C2L0_C1L0_1_DP
23
HT_CK_C2L0_C1L0_1_DN
23
HT_CK_C2L0_C1L0_0_DP
23
HT_CK_C2L0_C1L0_0_DN
23
HT_CT_C2L0_C1L0_1_DP
23
HT_CT_C2L0_C1L0_1_DN
23
HT_CT_C2L0_C1L0_0_DP
23
HT_CT_C2L0_C1L0_0_DN
23
J_CPU1
M6 AC5
L0_CLKIN_H_1 L0_CLKOUT_H_1
N6
L0_CLKIN_L_1
M3 AC1
L0_CLKIN_H_0 L0_CLKOUT_H_0
M2
L0_CLKIN_L_0
U4
L0_CTLIN_H_1
U5
L0_CTLIN_L_1
T1
L0_CTLIN_H_0
U1
L0_CTLIN_L_0
L0_CLKOUT_L_1
L0_CLKOUT_L_0
L0_CTLOUT_H_1
L0_CTLOUT_L_1
L0_CTLOUT_H_0
L0_CTLOUT_L_0
AC4
AB1
W6
V6
V2
V3
HT_CK_C1L0_C2L0_1_DP
HT_CK_C1L0_C2L0_1_DN
HT_CK_C1L0_C2L0_0_DP
HT_CK_C1L0_C2L0_0_DN
HT_CT_C1L0_C2L0_1_DP
HT_CT_C1L0_C2L0_1_DN
HT_CT_C1L0_C2L0_0_DP
HT_CT_C1L0_C2L0_0_DN
23
23
23
23
23
23
23
23
HT_CK_C2L1_C1L2_1_DP
23
HT_CK_C2L1_C1L2_1_DN
23
HT_CK_C2L1_C1L2_0_DP
23
HT_CK_C2L1_C1L2_0_DN
23
HT_CT_C2L1_C1L2_1_DP
23
HT_CT_C2L1_C1L2_1_DN
23
HT_CT_C2L1_C1L2_0_DP
23
HT_CT_C2L1_C1L2_0_DN
23
AK7
AK8
AM7
AN7
AM12
AL12
AP11
AP12
L2_CLKIN_H_1
L2_CLKIN_L_1
L2_CLKIN_H_0
L2_CLKIN_L_0
L2_CTLIN_H_1
L2_CTLIN_L_1
L2_CTLIN_H_0
L2_CTLIN_L_0
J_CPU1
L2_CLKOUT_H_1
L2_CLKOUT_L_1
L2_CLKOUT_H_0
L2_CLKOUT_L_0
L2_CTLOUT_H_1
L2_CTLOUT_L_1
L2_CTLOUT_H_0
L2_CTLOUT_L_0
AM18
AN18
AR18
AR17
AL14
AL13
AP13
AN13
HT_CK_C1L2_C2L1_1_DP
HT_CK_C1L2_C2L1_1_DN
HT_CK_C1L2_C2L1_0_DP
HT_CK_C1L2_C2L1_0_DN
HT_CT_C1L2_C2L1_1_DP
HT_CT_C1L2_C2L1_1_DN
HT_CT_C1L2_C2L1_0_DP
HT_CT_C1L2_C2L1_0_DN
1
23
23
23
23
23
23
23
23
2
3
HT_AD_C2L0_C1L0_15_DP
23
HT_AD_C2L0_C1L0_15_DN
23
HT_AD_C2L0_C1L0_14_DP
23
HT_AD_C2L0_C1L0_14_DN
23
HT_AD_C2L0_C1L0_13_DP
23
HT_AD_C2L0_C1L0_13_DN
23
HT_AD_C2L0_C1L0_12_DP
23
HT_AD_C2L0_C1L0_12_DN
23
HT_AD_C2L0_C1L0_11_DP
23
HT_AD_C2L0_C1L0_11_DN
23
HT_AD_C2L0_C1L0_10_DP
23
HT_AD_C2L0_C1L0_10_DN
23
HT_AD_C2L0_C1L0_9_DP
23
HT_AD_C2L0_C1L0_9_DN
23
HT_AD_C2L0_C1L0_8_DP
23
HT_AD_C2L0_C1L0_8_DN
23
HT_AD_C2L0_C1L0_7_DP
23
HT_AD_C2L0_C1L0_7_DN
23
HT_AD_C2L0_C1L0_6_DP
23
HT_AD_C2L0_C1L0_6_DN
23
HT_AD_C2L0_C1L0_5_DP
23
HT_AD_C2L0_C1L0_5_DN
23
HT_AD_C2L0_C1L0_4_DP
23
HT_AD_C2L0_C1L0_4_DN
23
HT_AD_C2L0_C1L0_3_DP
23
HT_AD_C2L0_C1L0_3_DN
23
HT_AD_C2L0_C1L0_2_DP
23
HT_AD_C2L0_C1L0_2_DN
23
HT_AD_C2L0_C1L0_1_DP
23
HT_AD_C2L0_C1L0_1_DN
23
HT_AD_C2L0_C1L0_0_DP
23
HT_AD_C2L0_C1L0_0_DN
23
T6
L0_CADIN_H_15
U6
L0_CADIN_L_15
R4
L0_CADIN_H_14
R5
L0_CADIN_L_14
P6
L0_CADIN_H_13
R6
L0_CADIN_L_13
N4
L0_CADIN_H_12
N5
L0_CADIN_L_12
L4
L0_CADIN_H_11
L5
L0_CADIN_L_11
K6
L0_CADIN_H_10
L6
L0_CADIN_L_10
J4
L0_CADIN_H_9
J5
L0_CADIN_L_9
H6
L0_CADIN_H_8
J6
L0_CADIN_L_8
T3
L0_CADIN_H_7
P1
L0_CADIN_L_7
T2
L0_CADIN_H_6
R1
L0_CADIN_L_6
P3
L0_CADIN_H_5
P2
L0_CADIN_L_5
M1
L0_CADIN_H_4
N1
L0_CADIN_L_4
K1
L0_CADIN_H_3
L1
L0_CADIN_L_3
K3
L0_CADIN_H_2
K2
L0_CADIN_L_2
H1
L0_CADIN_H_1
J1
L0_CADIN_L_1
H3
L0_CADIN_H_0
H2
L0_CADIN_L_0
L0_CADOUT_H_15
L0_CADOUT_L_15
L0_CADOUT_H_14
L0_CADOUT_L_14
L0_CADOUT_H_13
L0_CADOUT_L_13
L0_CADOUT_H_12
L0_CADOUT_L_12
L0_CADOUT_H_11
L0_CADOUT_L_11
L0_CADOUT_H_10
L0_CADOUT_L_10
L0_CADOUT_H_9
L0_CADOUT_L_9
L0_CADOUT_H_8
L0_CADOUT_L_8
L0_CADOUT_H_7
L0_CADOUT_L_7
L0_CADOUT_H_6
L0_CADOUT_L_6
L0_CADOUT_H_5
L0_CADOUT_L_5
L0_CADOUT_H_4
L0_CADOUT_L_4
L0_CADOUT_H_3
L0_CADOUT_L_3
L0_CADOUT_H_2
L0_CADOUT_L_2
L0_CADOUT_H_1
L0_CADOUT_L_1
L0_CADOUT_H_0
L0_CADOUT_L_0
W5
W4
AA6
Y6
AA5
AA4
AC6
AB6
AE6
AD6
AE5
AE4
AG6
AF6
AG5
AG4
W1
V1
Y2
Y3
AA1
Y1
AB2
AB3
AD2
AD3
AE1
AD1
AF2
AF3
AG1
AF1
HT_AD_C1L0_C2L0_15_DP
HT_AD_C1L0_C2L0_15_DN
HT_AD_C1L0_C2L0_14_DP
HT_AD_C1L0_C2L0_14_DN
HT_AD_C1L0_C2L0_13_DP
HT_AD_C1L0_C2L0_13_DN
HT_AD_C1L0_C2L0_12_DP
HT_AD_C1L0_C2L0_12_DN
HT_AD_C1L0_C2L0_11_DP
HT_AD_C1L0_C2L0_11_DN
HT_AD_C1L0_C2L0_10_DP
HT_AD_C1L0_C2L0_10_DN
HT_AD_C1L0_C2L0_9_DP
HT_AD_C1L0_C2L0_9_DN
HT_AD_C1L0_C2L0_8_DP
HT_AD_C1L0_C2L0_8_DN
HT_AD_C1L0_C2L0_7_DP
HT_AD_C1L0_C2L0_7_DN
HT_AD_C1L0_C2L0_6_DP
HT_AD_C1L0_C2L0_6_DN
HT_AD_C1L0_C2L0_5_DP
HT_AD_C1L0_C2L0_5_DN
HT_AD_C1L0_C2L0_4_DP
HT_AD_C1L0_C2L0_4_DN
HT_AD_C1L0_C2L0_3_DP
HT_AD_C1L0_C2L0_3_DN
HT_AD_C1L0_C2L0_2_DP
HT_AD_C1L0_C2L0_2_DN
HT_AD_C1L0_C2L0_1_DP
HT_AD_C1L0_C2L0_1_DN
HT_AD_C1L0_C2L0_0_DP
HT_AD_C1L0_C2L0_0_DN
23
23
23
23
23
23
23
23
23
23
23
23
23
23
23
23
23
23
23
23
23
23
23
23
23
23
23
23
23
23
23
23
HT_AD_C2L1_C1L2_15_DP
23
HT_AD_C2L1_C1L2_15_DN
23
HT_AD_C2L1_C1L2_14_DP
23
HT_AD_C2L1_C1L2_14_DN
23
HT_AD_C2L1_C1L2_13_DP
23
HT_AD_C2L1_C1L2_13_DN
23
HT_AD_C2L1_C1L2_12_DP
23
HT_AD_C2L1_C1L2_12_DN
23
HT_AD_C2L1_C1L2_11_DP
23
HT_AD_C2L1_C1L2_11_DN
23
HT_AD_C2L1_C1L2_10_DP
23
HT_AD_C2L1_C1L2_10_DN
23
HT_AD_C2L1_C1L2_9_DP
23
HT_AD_C2L1_C1L2_9_DN
23
HT_AD_C2L1_C1L2_8_DP
23
HT_AD_C2L1_C1L2_8_DN
23
HT_AD_C2L1_C1L2_7_DP
23
HT_AD_C2L1_C1L2_7_DN
23
HT_AD_C2L1_C1L2_6_DP
23
HT_AD_C2L1_C1L2_6_DN
23
HT_AD_C2L1_C1L2_5_DP
23
HT_AD_C2L1_C1L2_5_DN
23
HT_AD_C2L1_C1L2_4_DP
23
HT_AD_C2L1_C1L2_4_DN
23
HT_AD_C2L1_C1L2_3_DP
23
HT_AD_C2L1_C1L2_3_DN
23
HT_AD_C2L1_C1L2_2_DP
23
HT_AD_C2L1_C1L2_2_DN
23
HT_AD_C2L1_C1L2_1_DP
23
HT_AD_C2L1_C1L2_1_DN
23
HT_AD_C2L1_C1L2_0_DP
23
HT_AD_C2L1_C1L2_0_DN
23
AK11
AK12
AM10
AL10
AK9
AK10
AM8
AL8
AM6
AL6
AK5
AK6
AM4
AL4
AK3
AK4
AM11
AN11
AP9
AP10
AM9
AN9
AP7
AP8
AP5
AP6
AM5
AN5
AP3
AP4
AM3
AN3
L2_CADIN_H_15
L2_CADIN_L_15
L2_CADIN_H_14
L2_CADIN_L_14
L2_CADIN_H_13
L2_CADIN_L_13
L2_CADIN_H_12
L2_CADIN_L_12
L2_CADIN_H_11
L2_CADIN_L_11
L2_CADIN_H_10
L2_CADIN_L_10
L2_CADIN_H_9
L2_CADIN_L_9
L2_CADIN_H_8
L2_CADIN_L_8
L2_CADIN_H_7
L2_CADIN_L_7
L2_CADIN_H_6
L2_CADIN_L_6
L2_CADIN_H_5
L2_CADIN_L_5
L2_CADIN_H_4
L2_CADIN_L_4
L2_CADIN_H_3
L2_CADIN_L_3
L2_CADIN_H_2
L2_CADIN_L_2
L2_CADIN_H_1
L2_CADIN_L_1
L2_CADIN_H_0
L2_CADIN_L_0
L2_CADOUT_H_15
L2_CADOUT_L_15
L2_CADOUT_H_14
L2_CADOUT_L_14
L2_CADOUT_H_13
L2_CADOUT_L_13
L2_CADOUT_H_12
L2_CADOUT_L_12
L2_CADOUT_H_11
L2_CADOUT_L_11
L2_CADOUT_H_10
L2_CADOUT_L_10
L2_CADOUT_H_9
L2_CADOUT_L_9
L2_CADOUT_H_8
L2_CADOUT_L_8
L2_CADOUT_H_7
L2_CADOUT_L_7
L2_CADOUT_H_6
L2_CADOUT_L_6
L2_CADOUT_H_5
L2_CADOUT_L_5
L2_CADOUT_H_4
L2_CADOUT_L_4
L2_CADOUT_H_3
L2_CADOUT_L_3
L2_CADOUT_H_2
L2_CADOUT_L_2
L2_CADOUT_H_1
L2_CADOUT_L_1
L2_CADOUT_H_0
L2_CADOUT_L_0
AM14
AN14
AL16
AL15
AM16
AN16
AL18
AL17
AL20
AL19
AM20
AN20
AL22
AL21
AM22
AN22
AR14
AR13
AP15
AN15
AR16
AR15
AP17
AN17
AP19
AN19
AR20
AR19
AP21
AN21
AR22
AR21
HT_AD_C1L2_C2L1_15_DP
HT_AD_C1L2_C2L1_15_DN
HT_AD_C1L2_C2L1_14_DP
HT_AD_C1L2_C2L1_14_DN
HT_AD_C1L2_C2L1_13_DP
HT_AD_C1L2_C2L1_13_DN
HT_AD_C1L2_C2L1_12_DP
HT_AD_C1L2_C2L1_12_DN
HT_AD_C1L2_C2L1_11_DP
HT_AD_C1L2_C2L1_11_DN
HT_AD_C1L2_C2L1_10_DP
HT_AD_C1L2_C2L1_10_DN
HT_AD_C1L2_C2L1_9_DP
HT_AD_C1L2_C2L1_9_DN
HT_AD_C1L2_C2L1_8_DP
HT_AD_C1L2_C2L1_8_DN
HT_AD_C1L2_C2L1_7_DP
HT_AD_C1L2_C2L1_7_DN
HT_AD_C1L2_C2L1_6_DP
HT_AD_C1L2_C2L1_6_DN
HT_AD_C1L2_C2L1_5_DP
HT_AD_C1L2_C2L1_5_DN
HT_AD_C1L2_C2L1_4_DP
HT_AD_C1L2_C2L1_4_DN
HT_AD_C1L2_C2L1_3_DP
HT_AD_C1L2_C2L1_3_DN
HT_AD_C1L2_C2L1_2_DP
HT_AD_C1L2_C2L1_2_DN
HT_AD_C1L2_C2L1_1_DP
HT_AD_C1L2_C2L1_1_DN
HT_AD_C1L2_C2L1_0_DP
HT_AD_C1L2_C2L1_0_DN
23
23
23
23
23
23
23
23
23
23
23
23
23
23
23
23
23
23
23
23
23
23
23
23
23
23
23
23
23
23
23
23
2
3
From CPU2 L0
AMC CPU F1207
HETERO 1 OF 11
To CPU2 L0
From CPU2 L1 To CPU2 L1
CPU1 TO CPU2 HYPER TRANSPORT LINKS
AMC CPU F1207
HETERO 3 OF 11
4
ROOM=CPU1
PROPRIETARY NOTE
THIS ITEM IS THE PROPERTY OF DELL INC. ROUND ROCK, TEXAS
AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS
ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL INC.,
EXCEPT AS AUTHORIZED BY DELL INC., AND THEN ONLY BY WAY OF
LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE
OR IN PART AND MUST BE RETURNED TO DELL INC. UPON REQUEST
AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF
THE LOAN. NEITHER THIS ITEM NOR THE INFORMATION IT CONTAINS MAY
BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH
USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT
THE PRIOR WRITTEN CONSENT OF DELL INC.
C
TITLE
DWG NO.
DATE
MODULE:
DESC:
REV: OF
INC.
ROUND ROCK,TEXAS
SCHEM, PLN, SV, PE2970
FP975
SHEET
10/2/2008
DBA
SEC
REV.
A05
13 OF 120
211
4
A B C
D
1
+1.2V_VLDT
R8749
51-5%51-5%
1 2
34
34
34
34
34
34
J_CPU1
HT_CK_NBLA_C1L1_1_DP
HT_CK_NBLA_C1L1_1_DN
HT_CK_NBLA_C1L1_0_DP
HT_CK_NBLA_C1L1_0_DN
CPU1_CTLIN_L1_H1 NC_CPU1_AL14
CPU1_CTLIN_L1_L1
HT_CT_NBLA_C1L1_0_DP
HT_CT_NBLA_C1L1_0_DN
E18
L1_CLKIN_H_1
E17
L1_CLKIN_L_1
C18
L1_CLKIN_H_0
B18
L1_CLKIN_L_0
C13
L1_CTLIN_H_1
D13
L1_CTLIN_L_1
A14
L1_CTLIN_H_0
A13
L1_CTLIN_L_0
L1_CLKOUT_H_1
L1_CLKOUT_L_1
L1_CLKOUT_H_0
L1_CLKOUT_L_0
L1_CTLOUT_H_1
L1_CTLOUT_L_1
L1_CTLOUT_H_0
L1_CTLOUT_L_0
E6
D6
B6
B7
F10
F11
C11
D11
HT_CK_C1L1_NBLA_1_DP
HT_CK_C1L1_NBLA_1_DN
HT_CK_C1L1_NBLA_0_DP
HT_CK_C1L1_NBLA_0_DN
NC_CPU1_AL13
HT_CT_C1L1_NBLA_0_DP
HT_CT_C1L1_NBLA_0_DN
1
34
34
34
34
34
34
2
3
R8748
1 2
34
34
34
34
34
34
34
34
34
34
34
34
34
34
34
34
34
34
34
34
34
34
34
34
34
34
34
34
34
34
34
34
HT_AD_NBLA_C1L1_15_DP
HT_AD_NBLA_C1L1_15_DN
HT_AD_NBLA_C1L1_14_DP
HT_AD_NBLA_C1L1_14_DN
HT_AD_NBLA_C1L1_13_DP
HT_AD_NBLA_C1L1_13_DN
HT_AD_NBLA_C1L1_12_DP
HT_AD_NBLA_C1L1_12_DN
HT_AD_NBLA_C1L1_11_DP
HT_AD_NBLA_C1L1_11_DN
HT_AD_NBLA_C1L1_10_DP
HT_AD_NBLA_C1L1_10_DN
HT_AD_NBLA_C1L1_9_DP
HT_AD_NBLA_C1L1_9_DN
HT_AD_NBLA_C1L1_8_DP
HT_AD_NBLA_C1L1_8_DN
HT_AD_NBLA_C1L1_7_DP
HT_AD_NBLA_C1L1_7_DN
HT_AD_NBLA_C1L1_6_DP
HT_AD_NBLA_C1L1_6_DN
HT_AD_NBLA_C1L1_5_DP
HT_AD_NBLA_C1L1_5_DN
HT_AD_NBLA_C1L1_4_DP
HT_AD_NBLA_C1L1_4_DN
HT_AD_NBLA_C1L1_3_DP
HT_AD_NBLA_C1L1_3_DN
HT_AD_NBLA_C1L1_2_DP
HT_AD_NBLA_C1L1_2_DN
HT_AD_NBLA_C1L1_1_DP
HT_AD_NBLA_C1L1_1_DN
HT_AD_NBLA_C1L1_0_DP
HT_AD_NBLA_C1L1_0_DN
E14
L1_CADIN_H_15
E13
L1_CADIN_L_15
C15
L1_CADIN_H_14
D15
L1_CADIN_L_14
E16
L1_CADIN_H_13
E15
L1_CADIN_L_13
C17
L1_CADIN_H_12
D17
L1_CADIN_L_12
C19
L1_CADIN_H_11
D19
L1_CADIN_L_11
E20
L1_CADIN_H_10
E19
L1_CADIN_L_10
C21
L1_CADIN_H_9
D21
L1_CADIN_L_9
E22
L1_CADIN_H_8
E21
L1_CADIN_L_8
C14
L1_CADIN_H_7
B14
L1_CADIN_L_7
A16
L1_CADIN_H_6
A15
L1_CADIN_L_6
C16
L1_CADIN_H_5
B16
L1_CADIN_L_5
A18
L1_CADIN_H_4
A17
L1_CADIN_L_4
A20
L1_CADIN_H_3
A19
L1_CADIN_L_3
C20
L1_CADIN_H_2
B20
L1_CADIN_L_2
A22
L1_CADIN_H_1
A21
L1_CADIN_L_1
C22
L1_CADIN_H_0
B22
L1_CADIN_L_0
L1_CADOUT_H_15
L1_CADOUT_L_15
L1_CADOUT_H_14
L1_CADOUT_L_14
L1_CADOUT_H_13
L1_CADOUT_L_13
L1_CADOUT_H_12
L1_CADOUT_L_12
L1_CADOUT_H_11
L1_CADOUT_L_11
L1_CADOUT_H_10
L1_CADOUT_L_10
L1_CADOUT_H_9
L1_CADOUT_L_9
L1_CADOUT_H_8
L1_CADOUT_L_8
L1_CADOUT_H_7
L1_CADOUT_L_7
L1_CADOUT_H_6
L1_CADOUT_L_6
L1_CADOUT_H_5
L1_CADOUT_L_5
L1_CADOUT_H_4
L1_CADOUT_L_4
L1_CADOUT_H_3
L1_CADOUT_L_3
L1_CADOUT_H_2
L1_CADOUT_L_2
L1_CADOUT_H_1
L1_CADOUT_L_1
L1_CADOUT_H_0
L1_CADOUT_L_0
E10
D10
F8
F9
E8
D8
F6
F7
F4
F5
E4
D4
F2
F3
E2
D2
B10
B11
C9
D9
B8
B9
C7
D7
C5
D5
B4
B5
C3
D3
B2
B3
HT_AD_C1L1_NBLA_15_DP
HT_AD_C1L1_NBLA_15_DN
HT_AD_C1L1_NBLA_14_DP
HT_AD_C1L1_NBLA_14_DN
HT_AD_C1L1_NBLA_13_DP
HT_AD_C1L1_NBLA_13_DN
HT_AD_C1L1_NBLA_12_DP
HT_AD_C1L1_NBLA_12_DN
HT_AD_C1L1_NBLA_11_DP
HT_AD_C1L1_NBLA_11_DN
HT_AD_C1L1_NBLA_10_DP
HT_AD_C1L1_NBLA_10_DN
HT_AD_C1L1_NBLA_9_DP
HT_AD_C1L1_NBLA_9_DN
HT_AD_C1L1_NBLA_8_DP
HT_AD_C1L1_NBLA_8_DN
HT_AD_C1L1_NBLA_7_DP
HT_AD_C1L1_NBLA_7_DN
HT_AD_C1L1_NBLA_6_DP
HT_AD_C1L1_NBLA_6_DN
HT_AD_C1L1_NBLA_5_DP
HT_AD_C1L1_NBLA_5_DN
HT_AD_C1L1_NBLA_4_DP
HT_AD_C1L1_NBLA_4_DN
HT_AD_C1L1_NBLA_3_DP
HT_AD_C1L1_NBLA_3_DN
HT_AD_C1L1_NBLA_2_DP
HT_AD_C1L1_NBLA_2_DN
HT_AD_C1L1_NBLA_1_DP
HT_AD_C1L1_NBLA_1_DN
HT_AD_C1L1_NBLA_0_DP
HT_AD_C1L1_NBLA_0_DN
34
34
34
34
34
34
34
34
34
34
34
34
34
34
34
34
34
34
34
34
34
34
34
34
34
34
34
34
34
34
34
34
2
3
AMC CPU F1207
HETERO 2 OF 11
From HT2100 LA
CPU 1 HYPERTRANSPORT TO HT2100
To HT2100 LA
4
ROOM = CPU1
PROPRIETARY NOTE
THIS ITEM IS THE PROPERTY OF DELL INC. ROUND ROCK, TEXAS
AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS
ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL INC.,
EXCEPT AS AUTHORIZED BY DELL INC., AND THEN ONLY BY WAY OF
LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE
OR IN PART AND MUST BE RETURNED TO DELL INC. UPON REQUEST
AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF
THE LOAN. NEITHER THIS ITEM NOR THE INFORMATION IT CONTAINS MAY
BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH
USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT
THE PRIOR WRITTEN CONSENT OF DELL INC.
C
TITLE
DWG NO.
DATE
INC.
ROUND ROCK,TEXAS
SCHEM, PLN, SV, PE2970
FP975
SHEET
10/2/2008
DBA
4
REV.
A05
14 OF 120
1
2
3
4
A B C
ROOM=CPU1
20
20
20,22
20,22
20,22
21
21
21,22
21,22
21,22
20,22
20,22
20,22
21,22
21,22
21,22
CK_CPU1_MEM_MA0_DP
CK_CPU1_MEM_MA0_DN
CPU1_MEM_MA0_CS_L1
CPU1_MEM_MA0_CS_L0
CPU1_MEM_MA0_ODT0
CK_CPU1_MEM_MA1_DP
CK_CPU1_MEM_MA1_DN
CPU1_MEM_MA1_CS_L1
CPU1_MEM_MA1_CS_L0
CPU1_MEM_MA1_ODT0
NC_CPU1_Y30
NC_CPU1_Y31
CPU1_MEM_MA2_CS_L1
CPU1_MEM_MA2_CS_L0
CPU1_MEM_MA2_ODT0
NC_CPU1_AA31
NC_CPU1_AA32
CPU1_MEM_MA3_CS_L1
CPU1_MEM_MA3_CS_L0
CPU1_MEM_MA3_ODT0
AD31
AD32
AM34
AH33
AJ32
AE31
AF31
AM35
AH34
AK34
Y30
Y31
AC30
AB32
AB31
AA31
AA32
AD30
AB30
AC32
MA0_CLK_H
MA0_CLK_L
MA0_CS_L_1
MA0_CS_L_0
MA0_ODT_0
MA1_CLK_H
MA1_CLK_L
MA1_CS_L_1
MA1_CS_L_0
MA1_ODT_0
MA2_CLK_H
MA2_CLK_L
MA2_CS_L_1
MA2_CS_L_0
MA2_ODT_0
MA3_CLK_H
MA3_CLK_L
MA3_CS_L_1
MA3_CS_L_0
MA3_ODT_0
X00_DT10369 SCH name fix
20,21
20,21
20,21
20,21
20,21
20,21
20,21
20,21
20,21
20,21
20,21
20,21
20,21
20,21
20,21
20,21
20,21
20,21
20,21
20,21
20,21
20,21
20,21
20,21
20,21
20,21
20,21
20,21
20,21
20,21
20,21
20,21
20,21
20,21
20,21
20,21
CPU1_MEM_MA_ERR_R_N
22
20-22
20-22
20-22
20-22
20,21
20-22
20-22
20-22
21,22
20,22
CPU1_MEM_MA_PAR
CPU1_MEM_MA_CAS_N
CPU1_MEM_MA_RAS_N
CPU1_MEM_MA_WE_N
CPU1_MEM_MA_RESET_N
CPU1_MEM_MA_BANK2
CPU1_MEM_MA_BANK1
CPU1_MEM_MA_BANK0
CPU1_MEM_MA_CKE1
CPU1_MEM_MA_CKE0
CPU1_MEM_MA_DQS_17_DP
CPU1_MEM_MA_DQS_17_DN
CPU1_MEM_MA_DQS_16_DP
CPU1_MEM_MA_DQS_16_DN
CPU1_MEM_MA_DQS_15_DP
CPU1_MEM_MA_DQS_15_DN
CPU1_MEM_MA_DQS_14_DP
CPU1_MEM_MA_DQS_14_DN
CPU1_MEM_MA_DQS_13_DP
CPU1_MEM_MA_DQS_13_DN
CPU1_MEM_MA_DQS_12_DP
CPU1_MEM_MA_DQS_12_DN
CPU1_MEM_MA_DQS_11_DP
CPU1_MEM_MA_DQS_11_DN
CPU1_MEM_MA_DQS_10_DP
CPU1_MEM_MA_DQS_10_DN
CPU1_MEM_MA_DQS_9_DP
CPU1_MEM_MA_DQS_9_DN
CPU1_MEM_MA_DQS_8_DP
CPU1_MEM_MA_DQS_8_DN
CPU1_MEM_MA_DQS_7_DP
CPU1_MEM_MA_DQS_7_DN
CPU1_MEM_MA_DQS_6_DP
CPU1_MEM_MA_DQS_6_DN
CPU1_MEM_MA_DQS_5_DP
CPU1_MEM_MA_DQS_5_DN
CPU1_MEM_MA_DQS_4_DP
CPU1_MEM_MA_DQS_4_DN
CPU1_MEM_MA_DQS_3_DP
CPU1_MEM_MA_DQS_3_DN
CPU1_MEM_MA_DQS_2_DP
CPU1_MEM_MA_DQS_2_DN
CPU1_MEM_MA_DQS_1_DP
CPU1_MEM_MA_DQS_1_DN
CPU1_MEM_MA_DQS_0_DP
CPU1_MEM_MA_DQS_0_DN
P30
AF32
AJ33
AH32
AJ31
D33
N32
AF33
AG32
M30
M31
T27
T26
AL26
AM26
AL31
AM31
AH29
AG29
AB27
AC27
J31
J32
L29
K29
D31
D32
F27
F26
U25
U26
AK25
AK26
AK30
AK31
AH28
AJ28
AD26
AD27
K33
J33
H29
G29
F31
E31
D27
D26
MA_ERR_L
MA_PAR
MA_CAS_L
MA_RAS_L
MA_WE_L
MA_RESET_L
MA_BANK_2
MA_BANK_1
MA_BANK_0
MA_CKE_1
MA_CKE_0
MA_DQS_H_17
MA_DQS_L_17
MA_DQS_H_16
MA_DQS_L_16
MA_DQS_H_15
MA_DQS_L_15
MA_DQS_H_14
MA_DQS_L_14
MA_DQS_H_13
MA_DQS_L_13
MA_DQS_H_12
MA_DQS_L_12
MA_DQS_H_11
MA_DQS_L_11
MA_DQS_H_10
MA_DQS_L_10
MA_DQS_H_9
MA_DQS_L_9
MA_DQS_H_8
MA_DQS_L_8
MA_DQS_H_7
MA_DQS_L_7
MA_DQS_H_6
MA_DQS_L_6
MA_DQS_H_5
MA_DQS_L_5
MA_DQS_H_4
MA_DQS_L_4
MA_DQS_H_3
MA_DQS_L_3
MA_DQS_H_2
MA_DQS_L_2
MA_DQS_H_1
MA_DQS_L_1
MA_DQS_H_0
MA_DQS_L_0
CPU 1 - CHANNEL A MEMORY
J_CPU1
AMC CPU F1207
HETERO 4 OF 11
MA_DATA_63
MA_DATA_62
MA_DATA_61
MA_DATA_60
MA_DATA_59
MA_DATA_58
MA_DATA_57
MA_DATA_56
MA_DATA_55
MA_DATA_54
MA_DATA_53
MA_DATA_52
MA_DATA_51
MA_DATA_50
MA_DATA_49
MA_DATA_48
MA_DATA_47
MA_DATA_46
MA_DATA_45
MA_DATA_44
MA_DATA_43
MA_DATA_42
MA_DATA_41
MA_DATA_40
MA_DATA_39
MA_DATA_38
MA_DATA_37
MA_DATA_36
MA_DATA_35
MA_DATA_34
MA_DATA_33
MA_DATA_32
MA_DATA_31
MA_DATA_30
MA_DATA_29
MA_DATA_28
MA_DATA_27
MA_DATA_26
MA_DATA_25
MA_DATA_24
MA_DATA_23
MA_DATA_22
MA_DATA_21
MA_DATA_20
MA_DATA_19
MA_DATA_18
MA_DATA_17
MA_DATA_16
MA_DATA_15
MA_DATA_14
MA_DATA_13
MA_DATA_12
MA_DATA_11
MA_DATA_10
MA_DATA_9
MA_DATA_8
MA_DATA_7
MA_DATA_6
MA_DATA_5
MA_DATA_4
MA_DATA_3
MA_DATA_2
MA_DATA_1
MA_DATA_0
MA_ADD_0
MA_ADD_1
MA_ADD_2
MA_ADD_3
MA_ADD_4
MA_ADD_5
MA_ADD_6
MA_ADD_7
MA_ADD_8
MA_ADD_9
MA_ADD_10
MA_ADD_11
MA_ADD_12
MA_ADD_13
MA_ADD_14
MA_ADD_15
MA_CHECK_7
MA_CHECK_6
MA_CHECK_5
MA_CHECK_4
MA_CHECK_3
MA_CHECK_2
MA_CHECK_1
MA_CHECK_0
AM24
AM25
AL28
AK28
AK24
AL24
AM27
AL27
AK29
AM30
AL33
AK33
AM29
AL29
AM32
AL32
AF28
AF29
AG30
AE30
AE28
AE29
AH30
AJ30
AB25
AB26
AC29
AB29
AC25
AD25
AD28
AC28
L31
K31
G32
G31
L32
L33
H33
H32
H30
G30
K28
L28
K30
J30
H28
J28
E33
D35
F29
E29
F33
F32
E30
D30
F28
E26
B24
C24
E28
D28
E25
D25
AE33
V33
Y33
U31
U32
U30
T32
R31
T31
P32
AG31
R30
P31
AL34
N30
M32
V29
V27
R29
R28
V25
V28
R25
R26
CPU1_MEM_MA_DATA63
CPU1_MEM_MA_DATA62
CPU1_MEM_MA_DATA61
CPU1_MEM_MA_DATA60
CPU1_MEM_MA_DATA59
CPU1_MEM_MA_DATA58
CPU1_MEM_MA_DATA57
CPU1_MEM_MA_DATA56
CPU1_MEM_MA_DATA55
CPU1_MEM_MA_DATA54
CPU1_MEM_MA_DATA53
CPU1_MEM_MA_DATA52
CPU1_MEM_MA_DATA51
CPU1_MEM_MA_DATA50
CPU1_MEM_MA_DATA49
CPU1_MEM_MA_DATA48
CPU1_MEM_MA_DATA47
CPU1_MEM_MA_DATA46
CPU1_MEM_MA_DATA45
CPU1_MEM_MA_DATA44
CPU1_MEM_MA_DATA43
CPU1_MEM_MA_DATA42
CPU1_MEM_MA_DATA41
CPU1_MEM_MA_DATA40
CPU1_MEM_MA_DATA39
CPU1_MEM_MA_DATA38
CPU1_MEM_MA_DATA37
CPU1_MEM_MA_DATA36
CPU1_MEM_MA_DATA35
CPU1_MEM_MA_DATA34
CPU1_MEM_MA_DATA33
CPU1_MEM_MA_DATA32
CPU1_MEM_MA_DATA31
CPU1_MEM_MA_DATA30
CPU1_MEM_MA_DATA29
CPU1_MEM_MA_DATA28
CPU1_MEM_MA_DATA27
CPU1_MEM_MA_DATA26
CPU1_MEM_MA_DATA25
CPU1_MEM_MA_DATA24
CPU1_MEM_MA_DATA23
CPU1_MEM_MA_DATA22
CPU1_MEM_MA_DATA21
CPU1_MEM_MA_DATA20
CPU1_MEM_MA_DATA19
CPU1_MEM_MA_DATA18
CPU1_MEM_MA_DATA17
CPU1_MEM_MA_DATA16
CPU1_MEM_MA_DATA15
CPU1_MEM_MA_DATA14
CPU1_MEM_MA_DATA13
CPU1_MEM_MA_DATA12
CPU1_MEM_MA_DATA11
CPU1_MEM_MA_DATA10
CPU1_MEM_MA_DATA9
CPU1_MEM_MA_DATA8
CPU1_MEM_MA_DATA7
CPU1_MEM_MA_DATA6
CPU1_MEM_MA_DATA5
CPU1_MEM_MA_DATA4
CPU1_MEM_MA_DATA3
CPU1_MEM_MA_DATA2
CPU1_MEM_MA_DATA1
CPU1_MEM_MA_DATA0
CPU1_MEM_MA_ADD0
CPU1_MEM_MA_ADD1
CPU1_MEM_MA_ADD2
CPU1_MEM_MA_ADD3
CPU1_MEM_MA_ADD4
CPU1_MEM_MA_ADD5
CPU1_MEM_MA_ADD6
CPU1_MEM_MA_ADD7
CPU1_MEM_MA_ADD8
CPU1_MEM_MA_ADD9
CPU1_MEM_MA_ADD10
CPU1_MEM_MA_ADD11
CPU1_MEM_MA_ADD12
CPU1_MEM_MA_ADD13
CPU1_MEM_MA_ADD14
CPU1_MEM_MA_ADD15
CPU1_MEM_MA_CHECK7
CPU1_MEM_MA_CHECK6
CPU1_MEM_MA_CHECK5
CPU1_MEM_MA_CHECK4
CPU1_MEM_MA_CHECK3
CPU1_MEM_MA_CHECK2
CPU1_MEM_MA_CHECK1
CPU1_MEM_MA_CHECK0
20,21
20,21
20,21
20,21
20,21
20,21
20,21
20,21
20,21
20,21
20,21
20,21
20,21
20,21
20,21
20,21
20,21
20,21
20,21
20,21
20,21
20,21
20,21
20,21
20,21
20,21
20,21
20,21
20,21
20,21
20,21
20,21
20,21
20,21
20,21
20,21
20,21
20,21
20,21
20,21
20,21
20,21
20,21
20,21
20,21
20,21
20,21
20,21
20,21
20,21
20,21
20,21
20,21
20,21
20,21
20,21
20,21
20,21
20,21
20,21
20,21
20,21
20,21
20,21
20-22
20-22
20-22
20-22
20-22
20-22
20-22
20-22
20-22
20-22
20-22
20-22
20-22
20-22
20-22
20-22
20,21
20,21
20,21
20,21
20,21
20,21
20,21
20,21
PROPRIETARY NOTE
THIS ITEM IS THE PROPERTY OF DELL INC. ROUND ROCK, TEXAS
AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS
ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL INC.,
EXCEPT AS AUTHORIZED BY DELL INC., AND THEN ONLY BY WAY OF
LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE
OR IN PART AND MUST BE RETURNED TO DELL INC. UPON REQUEST
AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF
THE LOAN. NEITHER THIS ITEM NOR THE INFORMATION IT CONTAINS MAY
BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH
USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT
THE PRIOR WRITTEN CONSENT OF DELL INC.
TITLE
DWG NO.
DATE
D
INC.
ROUND ROCK,TEXAS
SCHEM, PLN, SV, PE2970
FP975
SHEET
10/2/2008
1
2
3
4
REV.
A05
15 OF 120
C
DBA
1
2
3
4
A B C
J_CPU1
CK_CPU1_MEM_MB0_DP
20
CK_CPU1_MEM_MB0_DN
20
20,22
20,22
20,22
21,22
21,22
21,22
CPU1_MEM_MB0_CS_L1
CPU1_MEM_MB0_CS_L0
CPU1_MEM_MB0_ODT0
CK_CPU1_MEM_MB1_DP
21
CK_CPU1_MEM_MB1_DN
21
CPU1_MEM_MB1_CS_L1
CPU1_MEM_MB1_CS_L0
CPU1_MEM_MB1_ODT0
NC_CPU1_U29
NC_CPU1_U28
20,22
20,22
20,22
CPU1_MEM_MB2_CS_L1
CPU1_MEM_MB2_CS_L0
CPU1_MEM_MB2_ODT0
NC_CPU1_T29
NC_CPU1_T28
21,22
21,22
21,22
CPU1_MEM_MB3_CS_L1
CPU1_MEM_MB3_CS_L0
CPU1_MEM_MB3_ODT0
X00_DT10369 SCH name fix
CPU1_MEM_MB_ERR_R_N
22
20-22
20-22
20-22
20-22
20,21
20-22
20-22
20-22
21,22
20,22
20,21
20,21
20,21
20,21
20,21
20,21
20,21
20,21
20,21
20,21
20,21
20,21
20,21
20,21
20,21
20,21
20,21
20,21
20,21
20,21
20,21
20,21
20,21
20,21
20,21
20,21
20,21
20,21
20,21
20,21
20,21
20,21
20,21
20,21
20,21
20,21
CPU1_MEM_MB_PAR
CPU1_MEM_MB_CAS_N
CPU1_MEM_MB_RAS_N
CPU1_MEM_MB_WE_N
CPU1_MEM_MB_RESET_N
CPU1_MEM_MB_BANK2
CPU1_MEM_MB_BANK1
CPU1_MEM_MB_BANK0
CPU1_MEM_MB_CKE1
CPU1_MEM_MB_CKE0
CPU1_MEM_MB_DQS_17_DP
CPU1_MEM_MB_DQS_17_DN
CPU1_MEM_MB_DQS_16_DP
CPU1_MEM_MB_DQS_16_DN
CPU1_MEM_MB_DQS_15_DP
CPU1_MEM_MB_DQS_15_DN
CPU1_MEM_MB_DQS_14_DP
CPU1_MEM_MB_DQS_14_DN
CPU1_MEM_MB_DQS_13_DP
CPU1_MEM_MB_DQS_13_DN
CPU1_MEM_MB_DQS_12_DP
CPU1_MEM_MB_DQS_12_DN
CPU1_MEM_MB_DQS_11_DP
CPU1_MEM_MB_DQS_11_DN
CPU1_MEM_MB_DQS_10_DP
CPU1_MEM_MB_DQS_10_DN
CPU1_MEM_MB_DQS_9_DP
CPU1_MEM_MB_DQS_9_DN
CPU1_MEM_MB_DQS_8_DP
CPU1_MEM_MB_DQS_8_DN
CPU1_MEM_MB_DQS_7_DP
CPU1_MEM_MB_DQS_7_DN
CPU1_MEM_MB_DQS_6_DP
CPU1_MEM_MB_DQS_6_DN
CPU1_MEM_MB_DQS_5_DP
CPU1_MEM_MB_DQS_5_DN
CPU1_MEM_MB_DQS_4_DP
CPU1_MEM_MB_DQS_4_DN
CPU1_MEM_MB_DQS_3_DP
CPU1_MEM_MB_DQS_3_DN
CPU1_MEM_MB_DQS_2_DP
CPU1_MEM_MB_DQS_2_DN
CPU1_MEM_MB_DQS_1_DP
CPU1_MEM_MB_DQS_1_DN
CPU1_MEM_MB_DQS_0_DP
CPU1_MEM_MB_DQS_0_DN
Y35
Y34
AJ35
AE35
AG34
AA34
AA33
AK35
AD35
AG35
U29
U28
W31
V32
W32
T29
T28
W30
V30
W33
P33
AB34
AF34
AD33
AE34
A33
N33
AC34
AC33
M34
M35
M29
N29
AN28
AN27
AN33
AN32
AG27
AH27
AA29
AA28
G34
G35
K26
J26
A31
A32
A26
A27
N27
N28
AP26
AP27
AP31
AP32
AJ26
AJ27
W26
W27
H35
H34
H27
G27
C32
B32
B27
C27
MB0_CLK_H
MB0_CLK_L
MB0_CS_L_1
MB0_CS_L_0
MB0_ODT_0
MB1_CLK_H
MB1_CLK_L
MB1_CS_L_1
MB1_CS_L_0
MB1_ODT_0
MB2_CLK_H
MB2_CLK_L
MB2_CS_L_1
MB2_CS_L_0
MB2_ODT_0
MB3_CLK_H
MB3_CLK_L
MB3_CS_L_1
MB3_CS_L_0
MB3_ODT_0
MB_ERR_L
MB_PAR
MB_CAS_L
MB_RAS_L
MB_WE_L
MB_RESET_L
MB_BANK_2
MB_BANK_1
MB_BANK_0
MB_CKE_1
MB_CKE_0
MB_DQS_H_17
MB_DQS_L_17
MB_DQS_H_16
MB_DQS_L_16
MB_DQS_H_15
MB_DQS_L_15
MB_DQS_H_14
MB_DQS_L_14
MB_DQS_H_13
MB_DQS_L_13
MB_DQS_H_12
MB_DQS_L_12
MB_DQS_H_11
MB_DQS_L_11
MB_DQS_H_10
MB_DQS_L_10
MB_DQS_H_9
MB_DQS_L_9
MB_DQS_H_8
MB_DQS_L_8
MB_DQS_H_7
MB_DQS_L_7
MB_DQS_H_6
MB_DQS_L_6
MB_DQS_H_5
MB_DQS_L_5
MB_DQS_H_4
MB_DQS_L_4
MB_DQS_H_3
MB_DQS_L_3
MB_DQS_H_2
MB_DQS_L_2
MB_DQS_H_1
MB_DQS_L_1
MB_DQS_H_0
MB_DQS_L_0
AMC CPU F1207
HETERO 5 OF 11
MB_DATA_63
MB_DATA_62
MB_DATA_61
MB_DATA_60
MB_DATA_59
MB_DATA_58
MB_DATA_57
MB_DATA_56
MB_DATA_55
MB_DATA_54
MB_DATA_53
MB_DATA_52
MB_DATA_51
MB_DATA_50
MB_DATA_49
MB_DATA_48
MB_DATA_47
MB_DATA_46
MB_DATA_45
MB_DATA_44
MB_DATA_43
MB_DATA_42
MB_DATA_41
MB_DATA_40
MB_DATA_39
MB_DATA_38
MB_DATA_37
MB_DATA_36
MB_DATA_35
MB_DATA_34
MB_DATA_33
MB_DATA_32
MB_DATA_31
MB_DATA_30
MB_DATA_29
MB_DATA_28
MB_DATA_27
MB_DATA_26
MB_DATA_25
MB_DATA_24
MB_DATA_23
MB_DATA_22
MB_DATA_21
MB_DATA_20
MB_DATA_19
MB_DATA_18
MB_DATA_17
MB_DATA_16
MB_DATA_15
MB_DATA_14
MB_DATA_13
MB_DATA_12
MB_DATA_11
MB_DATA_10
MB_DATA_9
MB_DATA_8
MB_DATA_7
MB_DATA_6
MB_DATA_5
MB_DATA_4
MB_DATA_3
MB_DATA_2
MB_DATA_1
MB_DATA_0
MB_ADD_0
MB_ADD_1
MB_ADD_2
MB_ADD_3
MB_ADD_4
MB_ADD_5
MB_ADD_6
MB_ADD_7
MB_ADD_8
MB_ADD_9
MB_ADD_10
MB_ADD_11
MB_ADD_12
MB_ADD_13
MB_ADD_14
MB_ADD_15
MB_CHECK_7
MB_CHECK_6
MB_CHECK_5
MB_CHECK_4
MB_CHECK_3
MB_CHECK_2
MB_CHECK_1
MB_CHECK_0
AN25
AR26
AN29
AR29
AP25
AR25
AR28
AP28
AN30
AR31
AR34
AN34
AR30
AP30
AR33
AP33
AG25
AE25
AF26
AE26
AF24
AE24
AG26
AF27
Y26
AA27
W28
W25
Y25
AA26
Y28
Y29
K35
J35
E35
C35
L34
K34
F34
E34
L24
J27
K25
K24
L27
L26
G26
J25
B34
A34
C30
C29
C34
C33
B31
B30
C28
A28
B25
A24
A29
B29
B26
C25
AB35
V34
W35
V35
U34
U35
T33
R33
T34
R35
AC35
R34
P35
AH35
N35
N34
P27
P28
N25
M25
P25
P26
M26
M27
CPU1_MEM_MB_DATA63
CPU1_MEM_MB_DATA62
CPU1_MEM_MB_DATA61
CPU1_MEM_MB_DATA60
CPU1_MEM_MB_DATA59
CPU1_MEM_MB_DATA58
CPU1_MEM_MB_DATA57
CPU1_MEM_MB_DATA56
CPU1_MEM_MB_DATA55
CPU1_MEM_MB_DATA54
CPU1_MEM_MB_DATA53
CPU1_MEM_MB_DATA52
CPU1_MEM_MB_DATA51
CPU1_MEM_MB_DATA50
CPU1_MEM_MB_DATA49
CPU1_MEM_MB_DATA48
CPU1_MEM_MB_DATA47
CPU1_MEM_MB_DATA46
CPU1_MEM_MB_DATA45
CPU1_MEM_MB_DATA44
CPU1_MEM_MB_DATA43
CPU1_MEM_MB_DATA42
CPU1_MEM_MB_DATA41
CPU1_MEM_MB_DATA40
CPU1_MEM_MB_DATA39
CPU1_MEM_MB_DATA38
CPU1_MEM_MB_DATA37
CPU1_MEM_MB_DATA36
CPU1_MEM_MB_DATA35
CPU1_MEM_MB_DATA34
CPU1_MEM_MB_DATA33
CPU1_MEM_MB_DATA32
CPU1_MEM_MB_DATA31
CPU1_MEM_MB_DATA30
CPU1_MEM_MB_DATA29
CPU1_MEM_MB_DATA28
CPU1_MEM_MB_DATA27
CPU1_MEM_MB_DATA26
CPU1_MEM_MB_DATA25
CPU1_MEM_MB_DATA24
CPU1_MEM_MB_DATA23
CPU1_MEM_MB_DATA22
CPU1_MEM_MB_DATA21
CPU1_MEM_MB_DATA20
CPU1_MEM_MB_DATA19
CPU1_MEM_MB_DATA18
CPU1_MEM_MB_DATA17
CPU1_MEM_MB_DATA16
CPU1_MEM_MB_DATA15
CPU1_MEM_MB_DATA14
CPU1_MEM_MB_DATA13
CPU1_MEM_MB_DATA12
CPU1_MEM_MB_DATA11
CPU1_MEM_MB_DATA10
CPU1_MEM_MB_DATA9
CPU1_MEM_MB_DATA8
CPU1_MEM_MB_DATA7
CPU1_MEM_MB_DATA6
CPU1_MEM_MB_DATA5
CPU1_MEM_MB_DATA4
CPU1_MEM_MB_DATA3
CPU1_MEM_MB_DATA2
CPU1_MEM_MB_DATA1
CPU1_MEM_MB_DATA0
CPU1_MEM_MB_ADD0
CPU1_MEM_MB_ADD1
CPU1_MEM_MB_ADD2
CPU1_MEM_MB_ADD3
CPU1_MEM_MB_ADD4
CPU1_MEM_MB_ADD5
CPU1_MEM_MB_ADD6
CPU1_MEM_MB_ADD7
CPU1_MEM_MB_ADD8
CPU1_MEM_MB_ADD9
CPU1_MEM_MB_ADD10
CPU1_MEM_MB_ADD11
CPU1_MEM_MB_ADD12
CPU1_MEM_MB_ADD13
CPU1_MEM_MB_ADD14
CPU1_MEM_MB_ADD15
CPU1_MEM_MB_CHECK7
CPU1_MEM_MB_CHECK6
CPU1_MEM_MB_CHECK5
CPU1_MEM_MB_CHECK4
CPU1_MEM_MB_CHECK3
CPU1_MEM_MB_CHECK2
CPU1_MEM_MB_CHECK1
CPU1_MEM_MB_CHECK0
20,21
20,21
20,21
20,21
20,21
20,21
20,21
20,21
20,21
20,21
20,21
20,21
20,21
20,21
20,21
20,21
20,21
20,21
20,21
20,21
20,21
20,21
20,21
20,21
20,21
20,21
20,21
20,21
20,21
20,21
20,21
20,21
20,21
20,21
20,21
20,21
20,21
20,21
20,21
20,21
20,21
20,21
20,21
20,21
20,21
20,21
20,21
20,21
20,21
20,21
20,21
20,21
20,21
20,21
20,21
20,21
20,21
20,21
20,21
20,21
20,21
20,21
20,21
20,21
20-22
20-22
20-22
20-22
20-22
20-22
20-22
20-22
20-22
20-22
20-22
20-22
20-22
20-22
20-22
20-22
20,21
20,21
20,21
20,21
20,21
20,21
20,21
20,21
D
1
2
3
4
INC.
ROUND ROCK,TEXAS
TITLE
CPU1 - CHANNEL B MEMORY
ROOM=CPU1
PROPRIETARY NOTE: THIS ITEM IS THE PROPERTY OF DELL INC. ROUND ROCK, TEXAS AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL INC. EXCEPT
AS AUTHORIZED BY DELL INC., AND THEN ONLY BY WAY OF LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE
OR IN PART AND MUST BE RETURNED TO DELL INC. UPON REQUEST AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF THE
LOAN. NEITHER THIS ITEM OR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH
USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT THE PRIOR WRITTEN CONSENT OF DELL INC.
DWG NO.
DATE
SCHEM, PLN, SV, PE2970
FP975
SHEET
10/2/2008
DCBA
REV.
A05
16 OF 120
1
A B C
CK_200M_CPU1_C_DP
12
12
X00_DT9693 SCH routes to CPLD now
CK_200M_CPU1_C_DN
C9383
21
3900pF
50V-10%
C9384
21
3900pF
50V-10%
R9109
1 2
169-1%
17,91
CK_200M_CPU1_DP
CK_200M_CPU1_DN
SYSTEM_PWRGOOD_CPU1
17,91
17,91
49,88
17
17
RST_CPU1_N
CPU1_LDTSTOP_N
CPU1_PRES_N
MOD_CPU1_SIC
MOD_CPU1_SID
+VDDA_CPU1
G2
G3
G4
K22
J22
F21
F19
H25
AP1
AG19
AF19
VDDA1
VDDA2
VDDA3
CLKIN_H
CLKIN_L
PWROK
RESET_L
LDTSTOP_L
CPU_PRESENT_L
SIC
SID
J_CPU1
VID_5
VID_4
VID_3
VID_2
VID_1
VID_0
THERMTRIP_L
PROCHOT_L
E24
G18
J19
H19
K19
H18
AH19
AJ19
CPU1_VID5
CPU1_VID4
CPU1_VID3
CPU1_VID2
CPU1_VID1
CPU1_VID0
CPU1_THERMTRIP_N
CPU1_PROCHOT_N
90,93
90,93
90,93
90,93
90,93
90,93
17,88
17,88
90,97
NC_CPU1_J18
NC_CPU1_G19
CPU1_CORE_TYPE
NC_CPU1_H11
NC_CPU1_J11
NC_CPU1_K11 NC_CPU1_AG18
J18
G19
AN1
H11
J11
K11
RSVD_J18
RSVD_G19
RSVD_AN1
RSVD_H11
RSVD_J11
RSVD_K11
J_CPU1
AMC CPU F1207
HETERO 7 OF 11
RSVD_H10
RSVD_H9
RSVD_AJ18
RSVD_AH18
RSVD_AG18
H10
H9
AJ18
AH18
AG18
D
CPU1_NB_COREFB_POS
CPU1_NB_COREFB_NEG
NC_CPU1_AJ18
NC_CPU1_AH18
97
97
1
2
+MEM_CPU1
93
93
102
CPU1_COREFB_POS
CPU1_COREFB_NEG
CPU1_DDRVTT_SENSE
17,117
17
17
17
17
33
33
33
33
33
R9113
1 2
0-5%
CPU1_PLLTEST_1
CPU1_PLLTEST_0
NC_MOD_CPU1_TEST_2
NC_MOD_CPU1_TEST_3
CPU1_TDI
CPU1_TRST_N
CPU1_TCK
CPU1_TMS
CPU1_DBREQ_N
R9112
1 2
V_MEM_CPU1_VREF
CPU1_M_ZN
CPU1_M_ZP
0-5%
R9180
NP
1 2
300-5%
X
AJ22
AG22
AF22
AJ21
F24
J9
J10
AF17
F18
AJ25
AH25
AF20
F23
F20
AG8
AG9
TDI
TRST_L
TCK
TMS
DBREQ_L
VDD_FB_H
VDD_FB_L
VTT_SENSE
M_VREF
M_ZN
M_ZP
TEST23
TEST18
TEST19
TEST2
TEST3
TDO
DBRDY
VDDIO_FB_H
VDDIO_FB_L
HTREF1
HTREF0
THERMDA
THERMDC
TEST13
TEST28_H
TEST28_L
AH22
J24
AG17
AH17
V7
U7
AF8
AF9
AH8
L8
M9
CPU1_TDO
CPU1_DBRDY
V_MEM_CPU1_SENSE_POS
V_MEM_CPU1_SENSE_NEG
MOD_CPU1_L0_REF_1
MOD_CPU1_L0_REF_0
MOD_CPU1_THERMDA
MOD_CPU1_THERMDC
NC_CPU1_TEST_28_DP
NC_CPU1_TEST_28_DN
27,33
33
80
80
103
103
R9234
1 2
44.2-1%
C9352
1 2
R9233
1 2
44.2-1%
C9353
1000pF
50V-10%
+1.2V_VLDT
1 2
1000pF
50V-10%
2
3
+MEM_CPU1
R9184
1 2
NP
R9183
X
300-5%
1 2
R9220
1 2
510-5%
NP
R9179
X
300-5%
1 2
NP
R9181
X
300-5%
1 2
R9221
1 2
510-5%
NP
R9182
X
300-5%
1 2
MOD_CPU1_SCANEN
MOD_CPU1_SCANCK2
MOD_CPU1_SCANCK1
MOD_CPU1_SCANSHIFTENA
MOD_CPU1_SCANSHIFTENB
R9178
NP
1 2
R9185
1 2
300-5%
300-5%
NC_MOD_CPU1_TEST_6
300-5%
X
G21
H21
AJ20
AH20
AG20
AG21
AF21
AH21
AF18
U8
AH9
TEST25_H
TEST25_L
TEST21
TEST20
TEST24
TEST22
TEST12
TEST27
TEST26
TEST9
TEST6
AMC CPU F1207
HETERO 6 OF 11
TEST17
TEST16
TEST15
TEST14
TEST7
TEST10
TEST8
TEST29_H
TEST29_L
J20
G20
K20
H20
J8
V8
H8
G23
G24
NC_MOD_CPU1_TEST_17
NC_MOD_CPU1_TEST_16
NC_MOD_CPU1_TEST_15
NC_MOD_CPU1_TEST_14
NC_MOD_CPU1_TEST_7
NC_MOD_CPU1_TEST_10
NC_MOD_CPU1_TEST_8
R9154
1 2
80.6-1%
+MEM_CPU1
3
4
+MEM_CPU1
ROOM = CPU1
R9318
1 2
300-5%
R9319
1 2
300-5%
R9320
1 2
300-5%
R9321
1 2
300-5%
R9322
NP
1 2
300-5%
R9323
NP
1 2
300-5%
R9324
NP
1 2
300-5%
CPU1_THERMTRIP_N
CPU1_PROCHOT_N
MOD_CPU1_SIC
MOD_CPU1_SID
SYSTEM_PWRGOOD_CPU1
X
RST_CPU1_N
X
CPU1_LDTSTOP_N
X
X00_DT9809 SCH depop'd R
17,88
17,88
17
17
17,91
17,91
17,91
CPU1 MISC
R9325
1 2
300-5%
R9326
1 2
300-5%
+MEM_CPU1
1 2
1 2
X00_DT9808 SCH added caps
CPU1_PLLTEST_1
CPU1_PLLTEST_0
R9216
39.2-1%
R9215
39.2-1%
C9766
1 2
C9767
1000pF
50V-10%
CPU1_M_ZN
CPU1_M_ZP
1 2
1000pF
50V-10%
17
17
17
17
R9430
1 2
R9805
1 2
R9431
1 2
15-1%
0-5%
R9812
1 2
10K-5%
V_MEM_CPU1_VREF
C9539
1 2
V_MEM_CPU1_VREF_FEEDBACK
1000pF
50V-10%
117
21
C9537
17,117
.1uF
16V-10%
This value calculated to be negative 14ohm.
Hence just keeping a place holder with 10kohm
15-1%
This value calculated to be negative 16ohm. left as is
THIS ITEM IS THE PROPERTY OF DELL INC. ROUND ROCK, TEXAS
AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS
ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL INC.,
EXCEPT AS AUTHORIZED BY DELL INC., AND THEN ONLY BY WAY OF
LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE
OR IN PART AND MUST BE RETURNED TO DELL INC. UPON REQUEST
AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF
THE LOAN. NEITHER THIS ITEM NOR THE INFORMATION IT CONTAINS MAY
BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH
USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT
THE PRIOR WRITTEN CONSENT OF DELL INC.
PROPRIETARY NOTE
TITLE
DWG NO.
DATE
INC.
ROUND ROCK,TEXAS
SCHEM, PLN, SV, PE2970
FP975
SHEET
10/2/2008
4
REV.
A05
17 OF 120
C
DBA
1
A9
A5
VSS_A9
VSS_A5
A B C
AJ24
AJ23
AJ17
AJ15
AJ11
AJ9
AJ7
AJ5
AJ3
AJ1
AH26
AH24
AH16
AH14
AH12
AH10
AH6
AG28
AG23
AG15
AG13
AG11
AG7
AF30
AF25
AF16
AF14
AF12
AF10
AE27
AE23
AE21
AE19
AE17
AE15
AE13
AE11
AE9
AE7
AE3
AE2
AD29
AD24
AD22
AD20
AD18
AD16
AD14
AD12
AD10
AD8
AD5
AD4
AC26
AC23
AC21
AC19
AC17
AC15
AC13
AC11
AC9
AC7
AB28
AB24
AB22
AB20
AB18
AB16
AB14
AB12
AB10
AB8
AA25
AA23
AA21
AA19
AA17
AA15
AA13
AA11
AA9
AA7
AA3
AA2
A30
A25
VSS_AJ9
VSS_AJ7
VSS_AJ5
VSS_AJ3
VSS_AA2
VSS_A30
VSS_A25
VSS_AA9
VSS_AA7
VSS_AA3
VSS_AA15
VSS_AA13
VSS_AA11
VSS_AA21
VSS_AA19
VSS_AA17
VSS_AB8
VSS_AA25
VSS_AA23
VSS_AB14
VSS_AB12
VSS_AB10
VSS_AB20
VSS_AB18
VSS_AB16
VSS_AB28
VSS_AB24
VSS_AB22
VSS_AC9
VSS_AC7
VSS_AC11
VSS_AC17
VSS_AC15
VSS_AC13
VSS_AC23
VSS_AC21
VSS_AC19
VSS_AD5
VSS_AD4
VSS_AC26
VSS_AD8
VSS_AD12
VSS_AD10
VSS_AD18
VSS_AD16
VSS_AD14
VSS_AD24
VSS_AD22
VSS_AD20
VSS_AE3
VSS_AE2
VSS_AD29
VSS_AE9
VSS_AE7
VSS_AE11
VSS_AE17
VSS_AE15
VSS_AE13
VSS_AE23
VSS_AE21
VSS_AE19
VSS_AF12
VSS_AF10
VSS_AE27
VSS_AF25
VSS_AF16
VSS_AF14
VSS_AG7
VSS_AG11
VSS_AF30
VSS_AG23
VSS_AG15
VSS_AG13
VSS_AH6
VSS_AH10
VSS_AG28
VSS_AH16
VSS_AH14
VSS_AH12
VSS_AJ1
VSS_AH26
VSS_AH24
VSS_AJ17
VSS_AJ15
VSS_AJ11
VSS_AJ24
VSS_AJ23
AK14
AK2
AJ29
VSS_AK2
VSS_AK14
VSS_AJ29
AK20
AK18
AK16
VSS_AK20
VSS_AK18
VSS_AK16
AK27
AK23
AK22
VSS_AK27
VSS_AK23
VSS_AK22
AL3
AL1
AK32
VSS_AL3
VSS_AL1
VSS_AK32
AL25
AL11
AL7
VSS_AL7
VSS_AL11
AM19
AM15
AL30
VSS_AM15
VSS_AL30
VSS_AL25
AN6
AM33
AM28
VSS_AM33
VSS_AM28
VSS_AM19
AN24
AN10
VSS_AN6
VSS_AN24
VSS_AN10
AN35
AN31
AN26
VSS_AN35
VSS_AN31
VSS_AN26
AP22
AP18
AP14
VSS_AP22
VSS_AP18
VSS_AP14
AP29
AP24
VSS_AP29
VSS_AP24
D
1
J_CPU1
VDD_A6
A6
VDD_AA8
VDD_A10
AA8
A10
AA10
VDD_AA14
VDD_AA12
VDD_AA10
AA16
AA14
AA12
VDD_AA20
VDD_AA18
VDD_AA16
AB4
AA20
AA18
VDD_AB7
VDD_AB5
VDD_AB4
AB7
AB5
VDD_AB11
VDD_AB9
AB9
AB13
AB11
VDD_AB17
VDD_AB15
VDD_AB13
AB19
AB17
AB15
VDD_AC2
VDD_AB21
VDD_AB19
AC3
AC2
AB21
VDD_AC10
VDD_AC8
VDD_AC3
AC8
AC10
VDD_AC16
VDD_AC14
VDD_AC12
AC16
AC14
AC12
VDD_AD7
VDD_AC20
VDD_AC18
AD7
AC20
AC18
VDD_AD11
VDD_AD9
AD9
AD11
VDD_AD17
VDD_AD15
VDD_AD13
AD17
AD15
AD13
VDD_AE8
VDD_AD21
VDD_AD19
AE8
AD21
AD19
VDD_AE14
VDD_AE12
VDD_AE10
AE14
AE12
AE10
VDD_AE20
VDD_AE18
VDD_AE16
AE20
AE18
AE16
VDD_AF5
VDD_AF4
AF7
AF5
AF4
VDD_AF13
VDD_AF11
VDD_AF7
AF13
AF11
VDD_AG3
VDD_AG2
VDD_AF15
AG3
AG2
AF15
VDD_AG14
VDD_AG12
VDD_AG10
AG14
AG12
AG10
VDD_AH7
VDD_AH5
VDD_AG16
AH7
AH5
AG16
VDD_AH15
VDD_AH13
VDD_AH11
AH15
AH13
AH11
VDD_AJ4
VDD_AJ2
AJ6
AJ4
AJ2
VDD_AJ10
VDD_AJ8
VDD_AJ6
AJ8
AJ10
VDD_AJ16
VDD_AJ14
VDD_AJ12
AJ16
AJ14
AJ12
VDD_AK13
VDD_AK1
AK1
AK15
AK13
VDD_AK19
VDD_AK17
VDD_AK15
AK21
AK19
AK17
VDD_AL5
VDD_AL2
VDD_AK21
AL9
AL5
AL2
VDD_AM13
VDD_AM1
VDD_AL9
AM1
AM13
VDD_AN4
VDD_AM21
VDD_AM17
AN4
AM21
AM17
VDD_AN12
VDD_AN8
AN8
AP16
AN12
VDD_AR6
VDD_AP20
VDD_AP16
AR6
AR10
AP20
VDD_B19
VDD_B15
VDD_AR10
C2
B19
B15
VDD_C6
VDD_C2
C6
C10
VDD_D16
VDD_C12
VDD_C10
D16
C12
VDD_E3
VDD_D20
E7
E3
D20
VDD_E11
VDD_E7
E12
E11
VDD_F15
VDD_F13
VDD_E12
F15
F13
VDD_G1
VDD_F17
G6
G1
F17
VDD_G8
VDD_G6
G8
G10
VDD_G14
VDD_G12
VDD_G10
G14
G12
VDD_H7
VDD_G16
H7
H13
G16
VDD_H17
VDD_H15
VDD_H13
H17
H15
VDD_J16
VDD_J14
J12
J16
J14
VDD_K5
VDD_K4
VDD_J12
K5
K4
AMC CPU F1207
HETERO 8 OF 11
VDD_K7
K7
CPU socket screws
ADD=ADD*_RP956
ADD1=ADD*_RP956
ADD2=ADD*_RP956
ADD3=ADD*_RP956
CPU socket washers
ADD4=ADD*_GR683
ADD5=ADD*_GR683
ADD6=ADD*_GR683
ADD7=ADD*_GR683
X01_DT12339_GT
+VCORE_CPU1
2
3
AP34
VSS_AP34
J_CPU1
VDD_K9
K9
AR9
AR5
AP35
VSS_AR9
VSS_AR5
VSS_AP35
VDD_K17
VDD_K15
VDD_K13
K17
K15
K13
AR32
AR27
AR24
VSS_AR32
VSS_AR27
VSS_AR24
VDD_L10
VDD_L3
VDD_L2
L3
L2
L10
B17
B13
B12
VSS_B13
VSS_B12
VDD_L14
VDD_L12
L16
L14
L12
B28
B21
VSS_B28
VSS_B21
VSS_B17
VDD_L20
VDD_L18
VDD_L16
L20
L18
J_CPU1
C4
B35
B33
VSS_B35
VSS_B33
VDD_M11
VDD_M7
M7
M13
M11
N17
N15
VSS_N17
VSS_N15
C26
C8
VSS_C8
VSS_C4
VSS_C26
VDD_M17
VDD_M15
VDD_M13
M17
M15
N23
N21
N19
VSS_N21
VSS_N19
D14
D12
C31
VSS_D12
VSS_C31
VDD_M21
VDD_M19
N8
M21
M19
P8
N26
VSS_P8
VSS_N26
VSS_N23
D22
D18
VSS_D22
VSS_D18
VSS_D14
VDD_N12
VDD_N10
VDD_N8
N12
N10
P14
P12
P10
VSS_P12
VSS_P10
D34
D29
D24
VSS_D29
VSS_D24
VDD_N16
VDD_N14
N18
N16
N14
P18
P16
VSS_P18
VSS_P16
VSS_P14
E9
E5
VSS_E9
VSS_E5
VSS_D34
VDD_P4
VDD_N20
VDD_N18
P4
N20
P24
P22
P20
VSS_P22
VSS_P20
F14
E32
E27
VSS_E32
VSS_E27
VDD_P7
VDD_P5
P9
P7
P5
R7
P29
VSS_R7
VSS_P29
VSS_P24
F22
F16
VSS_F22
VSS_F16
VSS_F14
VDD_P13
VDD_P11
VDD_P9
P13
P11
R13
R11
R9
VSS_R9
VSS_R11
F35
F30
F25
VSS_F30
VSS_F25
VDD_P17
VDD_P15
P19
P17
P15
R17
R15
VSS_R17
VSS_R15
VSS_R13
G7
G5
VSS_G7
VSS_G5
VSS_F35
VDD_R2
VDD_P21
VDD_P19
R2
P21
R23
R21
R19
VSS_R21
VSS_R19
G13
G11
G9
VSS_G9
VSS_G11
VDD_R8
VDD_R3
R8
R3
R10
T4
R27
VSS_T4
VSS_R27
VSS_R23
G17
G15
VSS_G17
VSS_G15
VSS_G13
VDD_R14
VDD_R12
VDD_R10
R14
R12
T10
T8
T5
VSS_T8
VSS_T5
G28
G25
G22
VSS_G25
VSS_G22
VDD_R18
VDD_R16
R20
R18
R16
T14
T12
VSS_T14
VSS_T12
VSS_T10
H4
G33
VSS_H4
VSS_G33
VSS_G28
VDD_T11
VDD_T9
VDD_R20
T9
T11
T20
T18
T16
VSS_T18
VSS_T16
H14
H12
H5
VSS_H5
VSS_H12
VDD_T15
VDD_T13
T17
T15
T13
T24
T22
VSS_T24
VSS_T22
VSS_T20
H22
H16
VSS_H22
VSS_H16
VSS_H14
VDD_T21
VDD_T19
VDD_T17
T21
T19
U3
U2
T25
VSS_U2
VSS_T25
H24
H23
VSS_H24
VSS_H23
VDD_U14
VDD_U12
U14
U12
U13
U11
VSS_U3
VSS_U11
J2
H31
H26
VSS_H31
VSS_H26
VDD_U18
VDD_U16
U20
U18
U16
U17
U15
VSS_U17
VSS_U15
VSS_U13
J7
J3
VSS_J7
VSS_J3
VSS_J2
VDD_V5
VDD_V4
VDD_U20
V5
V4
U23
U21
U19
VSS_U21
VSS_U19
J17
J15
J13
VSS_J15
VSS_J13
VDD_V13
VDD_V11
V15
V13
V11
V12
U27
VSS_V12
VSS_U27
VSS_U23
J23
J21
VSS_J23
VSS_J21
VSS_J17
VDD_V19
VDD_V17
VDD_V15
V19
V17
V18
V16
V14
VSS_V16
VSS_V14
K8
J34
J29
VSS_J34
VSS_J29
VDD_W2
VDD_V21
W3
W2
V21
V22
V20
VSS_V22
VSS_V20
VSS_V18
K12
K10
VSS_K8
VSS_K10
VDD_W8
VDD_W3
W8
W10
V26
V24
VSS_V26
VSS_V24
K16
K14
VSS_K16
VSS_K14
VSS_K12
VDD_W14
VDD_W12
VDD_W10
W14
W12
W11
W9
W7
VSS_W9
VSS_W7
K23
K21
K18
VSS_K21
VSS_K18
VDD_W18
VDD_W16
W20
W18
W16
W15
W13
VSS_W15
VSS_W13
VSS_W11
K32
K27
VSS_K32
VSS_K27
VSS_K23
VDD_Y9
VDD_Y7
VDD_W20
Y9
Y7
W21
W19
W17
VSS_W19
VSS_W17
L11
L9
L7
VSS_L9
VSS_L7
VDD_Y13
VDD_Y11
Y15
Y13
Y11
W29
W23
VSS_W29
VSS_W23
VSS_W21
L15
L13
VSS_L15
VSS_L13
VSS_L11
VDD_Y19
VDD_Y17
VDD_Y15
Y19
Y17
Y8
Y5
Y4
VSS_Y5
VSS_Y4
U9
L17
VSS_U9
VSS_L17
VDD_V9
VDD_Y21
V9
Y21
Y12
Y10
VSS_Y8
VSS_Y10
V10
VSS_V10
AMC CPU F1207
HETERO 9 OF 11
VDD_U10
U10
Y18
Y16
Y14
VSS_Y18
VSS_Y16
VSS_Y14
VSS_Y12
Y24
Y22
Y20
VSS_Y22
VSS_Y20
T7
Y27
VSS_T7
VSS_Y27
VSS_Y24
AJ13
F12
VSS_F12
VSS_AJ13
+VCORE_CPU1
AMC CPU F1207
HETERO 11 OF 11
VCORE_CPU1_NB
19,97,117
AA22
AA24
AB23
AC22
AC24
AD23
AE22
AF23
AG24
AH23
L22
M23
N22
N24
P23
R22
R24
T23
U22
U24
V23
W22
W24
Y23
VDD_AA22
VDD_AA24
VDD_AB23
VDD_AC22
VDD_AC24
VDD_AD23
VDD_AE22
VDD_AF23
VDD_AG24
VDD_AH23
VDD_L22
VDD_M23
VDD_N22
VDD_N24
VDD_P23
VDD_R22
VDD_R24
VDD_T23
VDD_U22
VDD_U24
VDD_V23
VDD_W22
VDD_W24
VDD_Y23
J_CPU1
AMC CPU F1207
HETERO 10 OF 11
VSS_L19
VSS_L21
VSS_L23
VSS_L25
VSS_L30
VSS_L35
VSS_M4
VSS_M5
VSS_M8
VSS_M10
VSS_M12
VSS_M14
VSS_M16
VSS_M18
VSS_M20
VSS_M22
VSS_M24
VSS_M28
VSS_N2
VSS_N3
VSS_N7
VSS_N9
VSS_N11
VSS_N13
L19
L21
L23
L25
L30
L35
M4
M5
M8
M10
M12
M14
M16
M18
M20
M22
M24
M28
N2
N3
N7
N9
N11
N13
2
3
4
+MEM_CPU1
ROOM=CPU1
VDDIO2
VDDIO1
AA35
AA30
VDDIO4
VDDIO3
AC31
AB33
VDDIO6
VDDIO5
AE32
AD34
VDDIO8
VDDIO7
AG33
AF35
+VTT_CPU1
VDDIO10
VDDIO9
AJ34
AH31
VDDIO12
VDDIO11
N31
M33
AL35
VDDIO15
VDDIO14
VDDIO13
R32
P34
VDDIO17
VDDIO16
U33
T35
T30
VDDIO20
VDDIO19
VDDIO18
W34
V31
VDDIO21
A23
Y32
VTT2
VTT1
AM23
VTT3
AP23
AN23
VTT5
VTT4
AR23
VTT6
B23
VTT7
C23
VTT8
D23
VTT9
E23
AL23
VTT10
VLDT_02
VLDT_01
AH3
AH2
AH1
VLDT_04
VLDT_03
AH4
VLDT_12
VLDT_11
E1
D1
C1
VLDT_14
VLDT_13
F1
VLDT_22
VLDT_21
AP2
AN2
AM2
VLDT_24
VLDT_23
AR2
+1.2V_VLDT
CPU1 POWER
PROPRIETARY NOTE: THIS ITEM IS THE PROPERTY OF DELL INC. ROUND ROCK, TEXAS AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL INC. EXCEPT
AS AUTHORIZED BY DELL INC., AND THEN ONLY BY WAY OF LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE
OR IN PART AND MUST BE RETURNED TO DELL INC. UPON REQUEST AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF THE
LOAN. NEITHER THIS ITEM OR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH
USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT THE PRIOR WRITTEN CONSENT OF DELL INC.
TITLE
DWG NO.
DATE
MODULE:
DESC:
REV: OF
INC.
ROUND ROCK,TEXAS
SCHEM, PLN, SV, PE2970
FP975
SHEET
DCBA
MCH
CPUS,FSB,NB,XDP0,XDP1
SEC
211
4
REV.
A05
18 OF 12010/2/2008
A B C
D
1
+VCORE_CPU1
+MEM_CPU1
21
C8933
21
C8934
22uF 6.3V
22uF 6.3V
C8973
21
10uF 6.3V
21
C8974
21
C8975
10uF 6.3V
21
C8976
10uF 6.3V
21
C8977
10uF 6.3V
21
C8981
10uF 6.3V
21
C8980
10uF 6.3V
10uF 6.3V
21
C8979
21
C8982
10uF 6.3V
21
C8978
10uF 6.3V
21
C8986
10uF 6.3V
21
C8985
10uF 6.3V
21
C8984
10uF 6.3V
21
C8987
10uF 6.3V
X03_13326_SCH changed caps to correct 180pF value
21
C8983
10uF 6.3V
21
C8989
10uF 6.3V
21
C8988
10uF 6.3V
C8880
10uF 6.3V
1 2
.22uF
10V-20%
1 2
C8881
.22uF
10V-20%
1 2
C8882
.22uF
10V-20%
21
C8787
.01uF
16V-10%
C8764
1 2
180pF
50V-10%
+MEM_CPU1
+VTT_CPU1
21
C8793
.1uF
16V-10%
21
C8794
.1uF
C8795
16V-10%
+VTT_CPU1
21
.1uF
21
C8796
16V-10%
.1uF
16V-10%
21
C8797
.1uF
16V-10%
21
C8802
.1uF
16V-10%
21
C8801
.1uF
16V-10%
21
C8800
.1uF
16V-10%
21
C8799
.1uF
16V-10%
21
C8798
.1uF
16V-10%
21
C9835
.1uF
16V-10%
21
C9834
.1uF
16V-10%
1
2
21
C8991
+1.2V_VLDT +1.2V_VLDT +1.2V_VLDT
21
21
C8990
10uF 6.3V
21
10uF 6.3V
21
C8951
4.7uF
21
C8950
6.3V-10%
4.7uF
C8949
6.3V-10%
21
4.7uF
C8948
6.3V-10%
21
4.7uF
6.3V-10%
1 2
C8888
.22uF
10V-20%
21
1 2
C8887
.22uF
10V-20%
21
1 2
C8886
.22uF
10V-20%
1 2
C8885
.22uF
10V-20%
1 2
C8884
.22uF
10V-20%
1 2
C8883
.22uF
10V-20%
21
C8789
.01uF
16V-10%
21
C8788
.01uF
16V-10%
21
C8766
1 2
21
180pF
50V-10%
C8765
1 2
180pF
50V-10%
C9818
1 2
180pF
C9819
50V-10%
1 2
180pF
50V-10%
C9820
1 2
C9823
1 2
180pF
C9821
50V-10%
180pF
C9824
50V-10%
1 2
1 2
180pF
C9822
50V-10%
180pF
C9825
50V-10%
1 2
1 2
180pF
50V-10%
180pF
50V-10%
+MEM_CPU1
21
21
C8812
+VTT_CPU1
.1uF
21
C8811
16V-10%
.1uF
16V-10%
21
C8810
.1uF
16V-10%
21
C8809
.1uF
16V-10%
21
C8808
.1uF
16V-10%
21
C8807
.1uF
16V-10%
21
C8806
.1uF
16V-10%
21
C8805
.1uF
16V-10%
21
C8804
.1uF
16V-10%
21
C8803
.1uF
16V-10%
2
21
21
21
21
21
21
21
21
21
21
21
3
C8953
+VTT_CPU1
21
C8960
4.7uF
C8954
6.3V-10%
4.7uF
C8959
6.3V-10%
21
4.7uF
6.3V-10%
4.7uF
C8958
6.3V-10%
21
1 2
C8891
4.7uF
C8957
6.3V-10%
1 2
.22uF
C8892
10V-20%
X03_13326_SCH changed caps to correct 180pF value
21
.22uF
4.7uF
6.3V-10%
10V-20%
C8898
C8768
1 2
1 2
.22uF
180pF
C8769
50V-10%
1 2
C8897
10V-20%
180pF
1 2
.22uF
C8896
10V-20%
50V-10%
1 2
.22uF
C8952
1 2
C8895
10V-20%
4.7uF
C8947
6.3V-10%
.22uF
10V-20%
4.7uF
6.3V-10%
C8942
1 2
C8890
C8941
1000pF
50V-10%
1 2
1 2
.22uF
C8889
10V-20%
C8940
1000pF
50V-10%
1 2
1 2
.22uF
10V-20%
C8939
1000pF
50V-10%
1 2
C8767
1 2
1000pF
50V-10%
180pF
50V-10%
C8763
1 2
C8772
1 2
180pF
50V-10%
180pF
50V-10%
C8773
1 2
180pF
50V-10%
C8955
18,97,117
C8774
1 2
4.7uF
C8956
6.3V-10%
180pF
C8775
50V-10%
4.7uF
6.3V-10%
VCORE_CPU1_NB
180pF
1 2
50V-10%
1 2
C8893
.22uF
C8894
10V-20%
1 2
C9928
1 2
.22uF
.22uF
C9926
10V-20%
10V-20%
180pF
1 2
50V-10%
C8770
1 2
21
C9930
180pF
C8771
1 2
50V-10%
21
C9931
10uF 6.3V
10uF 6.3V
180pF
50V-10%
21
C9932
21
C9933
10uF 6.3V
21
C9934
10uF 6.3V
10uF 6.3V
C9836
.1uF
16V-10%
C9837
.1uF
16V-10%
+VTT_CPU1
C8813
21
C8823
.1uF
16V-10%
.1uF
16V-10%
C8814
21
C8824
.1uF
16V-10%
.1uF
16V-10%
C8815
21
C8825
.1uF
16V-10%
.1uF
16V-10%
C8816
21
C8826
.1uF
16V-10%
.1uF
16V-10%
C8817
21
C8827
.1uF
16V-10%
.1uF
16V-10%
C8818
21
C8828
.1uF
16V-10%
.1uF
16V-10%
C8819
21
C8829
.1uF
16V-10%
.1uF
16V-10%
C8820
21
C8830
.1uF
16V-10%
.1uF
16V-10%
C8821
21
C8831
.1uF
16V-10%
.1uF
16V-10%
C8822
21
C8832
.1uF
16V-10%
.1uF
16V-10%
3
+VCORE_CPU1
1 2
C8900
.22uF
1 2
C8899
10V-20%
.22uF
10V-20%
2.5V-20%
+
330uF
1 2
2.5V-20%
330uF
C8920
+
C8921
1 2
2.5V-20%
+
330uF
1 2
2.5V-20%
C8922
+
330uF
ROOM = CPU1
2.5V-20%
+
C8923
1 2
330uF
1 2
C8924
2.5V-20%
+
330uF
1 2
C8925
2.5V-20%
820uF
+
1 2
2.5V-20%
C8755
820uF
+
1 2
2.5V-20%
C8756
820uF
+
1 2
2.5V-20%
C8757
820uF
+
1 2
2.5V-20%
820uF
C8758
+
1 2
2.5V-20%
820uF
C9597
+
21
C9598
+MEM_CPU1
PLACE BETWEEN DIMMS
21
C9496
21
C9495
10uF 6.3V
ROOM = CPU1DIMM
21
C9497
10uF 6.3V
21
C9498
10uF 6.3V
21
C9499
10uF 6.3V
21
C9500
10uF 6.3V
10uF 6.3V
MODULE:
DESC:
REV: OF
CPUS,FSB,NB,XDP0,XDP1
SEC
MCH
211
4
ROOM = CPU1_REG
Was this pulled from Fat Tire/Guiness
PROPRIETARY NOTE: THIS ITEM IS THE PROPERTY OF DELL INC. ROUND ROCK, TEXAS AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL INC. EXCEPT
AS AUTHORIZED BY DELL INC., AND THEN ONLY BY WAY OF LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE
OR IN PART AND MUST BE RETURNED TO DELL INC. UPON REQUEST AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF THE
LOAN. NEITHER THIS ITEM OR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH
USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT THE PRIOR WRITTEN CONSENT OF DELL INC.
CPU1 Decoupling
TITLE
DWG NO.
DATE
INC.
ROUND ROCK,TEXAS
SCHEM, PLN, SV, PE2970
FP975
SHEET
DCBA
4
REV.
A05
19 OF 12010/2/2008
A B C
D
1
2
3
4
15,21,22
15,21,22
15,21,22
15,21,22
15,21,22
15,21,22
15,21,22
15,21,22
15,21,22
15,21,22
15,21,22
15,21,22
15,21,22
15,21,22
15,21,22
15,21,22
15,21,22
15,21,22
15,21,22
15,22
15,22
15,21,22
15,21,22
15,21,22
15,22
15,22
15
15
CPU1_MEM_MA_BANK1
CPU1_MEM_MA_BANK0
CPU1_MEM_MA_BANK2
CPU1_MEM_MA_ADD15
CPU1_MEM_MA_ADD14
CPU1_MEM_MA_ADD13
CPU1_MEM_MA_ADD12
CPU1_MEM_MA_ADD11
CPU1_MEM_MA_ADD10
CPU1_MEM_MA_ADD9
CPU1_MEM_MA_ADD8
CPU1_MEM_MA_ADD7
CPU1_MEM_MA_ADD6
CPU1_MEM_MA_ADD5
CPU1_MEM_MA_ADD4
CPU1_MEM_MA_ADD3
CPU1_MEM_MA_ADD2
CPU1_MEM_MA_ADD1
CPU1_MEM_MA_ADD0
CPU1_MEM_MA0_CS_L1
CPU1_MEM_MA0_CS_L0
CPU1_MEM_MA_RAS_N
CPU1_MEM_MA_CAS_N
CPU1_MEM_MA_WE_N
CPU1_MEM_MA2_CS_L1
CPU1_MEM_MA2_CS_L0
NC_DIMM1_P138
NC_DIMM1_P137
CK_CPU1_MEM_MA0_DN
CK_CPU1_MEM_MA0_DP
190
71
54
173
174
196
176
57
70
177
179
58
180
60
61
182
63
183
188
76
193
192
74
73
221
220
138
137
186
185
171
52
119
120
101
240
239
+3.3V
15,22
48
48
CPU1_MEM_MA_CKE0
I2C_P1_DIMM1_SDA
I2C_P1_DIMM1_SCL
20,21
20,21
20,21
CPU1_DIMM_PD
CPU1_DIMM_PD
CPU1_DIMM_PD
238
20-22
15,22
15,22
15,21
15,21
15,21
15,21
15,21
15,21
X00_DT9812 SCH I2C address lines use pullup/pulldowns
15,21
15,21
15,21
15,21
15,21
15,21
15,21
15,21
15,21
15,21
15,21
15,21
15,21
15,21
15,21
15,21
15,21
15,21
15,21
15,21
15,21
15,21
15,21
15,21
15,21
15,21
15,21
15,21
15,21
15,21
15,21
15,21
15,21
15,21
15,21
15,21
15,21
15,21
21,22
15,21,22
V_MEM_CPU1_DIMM_VREF
CPU1_MEM_MA2_ODT0
CPU1_MEM_MA0_ODT0
CPU1_MEM_MA_CHECK7
CPU1_MEM_MA_CHECK6
CPU1_MEM_MA_CHECK5
CPU1_MEM_MA_CHECK4
CPU1_MEM_MA_CHECK3
CPU1_MEM_MA_CHECK2
CPU1_MEM_MA_CHECK1
CPU1_MEM_MA_CHECK0
CPU1_MEM_MA_DQS_17_DP
CPU1_MEM_MA_DQS_17_DN
CPU1_MEM_MA_DQS_16_DP
CPU1_MEM_MA_DQS_16_DN
CPU1_MEM_MA_DQS_15_DP
CPU1_MEM_MA_DQS_15_DN
CPU1_MEM_MA_DQS_14_DP
CPU1_MEM_MA_DQS_14_DN
CPU1_MEM_MA_DQS_13_DP
CPU1_MEM_MA_DQS_13_DN
CPU1_MEM_MA_DQS_12_DP
CPU1_MEM_MA_DQS_12_DN
CPU1_MEM_MA_DQS_11_DP
CPU1_MEM_MA_DQS_11_DN
CPU1_MEM_MA_DQS_10_DP
CPU1_MEM_MA_DQS_10_DN
CPU1_MEM_MA_DQS_9_DP
CPU1_MEM_MA_DQS_9_DN
CPU1_MEM_MA_DQS_8_DP
CPU1_MEM_MA_DQS_8_DN
CPU1_MEM_MA_DQS_7_DP
CPU1_MEM_MA_DQS_7_DN
CPU1_MEM_MA_DQS_6_DP
CPU1_MEM_MA_DQS_6_DN
CPU1_MEM_MA_DQS_5_DP
CPU1_MEM_MA_DQS_5_DN
CPU1_MEM_MA_DQS_4_DP
CPU1_MEM_MA_DQS_4_DN
CPU1_MEM_MA_DQS_3_DP
CPU1_MEM_MA_DQS_3_DN
CPU1_MEM_MA_DQS_2_DP
CPU1_MEM_MA_DQS_2_DN
CPU1_MEM_MA_DQS_1_DP
CPU1_MEM_MA_DQS_1_DN
CPU1_MEM_MA_DQS_0_DP
CPU1_MEM_MA_DQS_0_DN
CPU1_MEM_MA_ERR_N
CPU1_MEM_MA_PAR
NC_DIMM1_P102
77
195
168
167
162
161
49
48
43
42
164
165
232
233
223
224
211
212
202
203
155
156
146
147
134
135
125
126
46
45
114
113
105
104
93
92
84
83
37
36
28
27
16
15
55
68
102
SUB*_MW921
DQS's don't follow naming convention.
Check that we match the 4DIMM quad rank connection scheme
BA1
BA0
A16/BA2
A15
A14
A13
A12
A11
A10/AP
A9
A8
A7
A6
A5
A4
A3
A2
A1
A0
S1
S0
RAS
CAS
WE
CK2
CK2
CK1
CK1
CK0
CK0
CKE1
CKE0
SDA
SCL
SA2
SA1
SA0
VDDSPD
1
VREF
ODT1
ODT0
CB7
CB6
CB5
CB4
CB3
CB2
CB1
CB0
DM8/DQS17/NC
DQS17/NC
DM7/DQS16
DQS16/NC
DM6/DQS15
DQS15/NC
DM5/DQS14
DQS14/NC
DM4/DQS13
DQS13/NC
DM3/DQS12
DQS12/NC
DM2/DQS11
DQS11/NC
DM1/DQS10
DQS10/NC
DM0/DQS9
DQS9/NC
DQS8/NC
DQS8/NC
DQS7
DQS7
DQS6
DQS6
DQS5
DQS5
DQS4
DQS4
DQS3
DQS3
DQS2
DQS2
DQS1
DQS1
7
DQS0
6
DQS0
ERR_OUT
PAR_IN
TEST
240 PIN DDR II DIMM
J_DIMM1A
ranked DIMMs
to support quad
additional chip selects
CK2, CK2# are used for
X00_DT9841 SCH added note
DQ63
DQ62
DQ61
DQ60
DQ59
DQ58
DQ57
DQ56
DQ55
DQ54
DQ53
DQ52
DQ51
DQ50
DQ49
DQ48
DQ47
DQ46
DQ45
DQ44
DQ43
DQ42
DQ41
DQ40
DQ39
DQ38
DQ37
DQ36
DQ35
DQ34
DQ33
DQ32
DQ31
DQ30
DQ29
DQ28
DQ27
DQ26
DQ25
DQ24
DQ23
DQ22
DQ21
DQ20
DQ19
DQ18
DQ17
DQ16
DQ15
DQ14
DQ13
DQ12
DQ11
DQ10
DQ9
DQ8
DQ7
DQ6
DQ5
DQ4
DQ3
DQ2
DQ1
DQ0
VDD10
VDD9
VDD8
VDD7
VDD6
VDD5
VDD4
VDD3
VDD2
VDD1
VDD0
VDDQ10
VDDQ9
VDDQ8
VDDQ7
VDDQ6
VDDQ5
VDDQ4
VDDQ3
VDDQ2
VDDQ1
VDDQ0
NC
RESET
236
235
230
229
117
116
111
110
227
226
218
217
108
107
99
98
215
214
209
208
96
95
90
89
206
205
200
199
87
86
81
80
159
158
153
152
40
39
34
33
150
149
144
143
31
30
25
24
141
140
132
131
22
21
13
12
129
128
123
122
10
9
4
3
197
189
187
184
178
172
69
67
64
59
53
194
191
181
175
170
78
75
72
62
56
51
19
18
CPU1_MEM_MA_DATA63
CPU1_MEM_MA_DATA62
CPU1_MEM_MA_DATA61
CPU1_MEM_MA_DATA60
CPU1_MEM_MA_DATA59
CPU1_MEM_MA_DATA58
CPU1_MEM_MA_DATA57
CPU1_MEM_MA_DATA56
CPU1_MEM_MA_DATA55
CPU1_MEM_MA_DATA54
CPU1_MEM_MA_DATA53
CPU1_MEM_MA_DATA52
CPU1_MEM_MA_DATA51
CPU1_MEM_MA_DATA50
CPU1_MEM_MA_DATA49
CPU1_MEM_MA_DATA48
CPU1_MEM_MA_DATA47
CPU1_MEM_MA_DATA46
CPU1_MEM_MA_DATA45
CPU1_MEM_MA_DATA44
CPU1_MEM_MA_DATA43
CPU1_MEM_MA_DATA42
CPU1_MEM_MA_DATA41
CPU1_MEM_MA_DATA40
CPU1_MEM_MA_DATA39
CPU1_MEM_MA_DATA38
CPU1_MEM_MA_DATA37
CPU1_MEM_MA_DATA36
CPU1_MEM_MA_DATA35
CPU1_MEM_MA_DATA34
CPU1_MEM_MA_DATA33
CPU1_MEM_MA_DATA32
CPU1_MEM_MA_DATA31
CPU1_MEM_MA_DATA30
CPU1_MEM_MA_DATA29
CPU1_MEM_MA_DATA28
CPU1_MEM_MA_DATA27
CPU1_MEM_MA_DATA26
CPU1_MEM_MA_DATA25
CPU1_MEM_MA_DATA24
CPU1_MEM_MA_DATA23
CPU1_MEM_MA_DATA22
CPU1_MEM_MA_DATA21
CPU1_MEM_MA_DATA20
CPU1_MEM_MA_DATA19
CPU1_MEM_MA_DATA18
CPU1_MEM_MA_DATA17
CPU1_MEM_MA_DATA16
CPU1_MEM_MA_DATA15
CPU1_MEM_MA_DATA14
CPU1_MEM_MA_DATA13
CPU1_MEM_MA_DATA12
CPU1_MEM_MA_DATA11
CPU1_MEM_MA_DATA10
CPU1_MEM_MA_DATA9
CPU1_MEM_MA_DATA8
CPU1_MEM_MA_DATA7
CPU1_MEM_MA_DATA6
CPU1_MEM_MA_DATA5
CPU1_MEM_MA_DATA4
CPU1_MEM_MA_DATA3
CPU1_MEM_MA_DATA2
CPU1_MEM_MA_DATA1
CPU1_MEM_MA_DATA0
NC_DIMM1_P19
CPU1_MEM_MA_RESET_N
15,21
15,21
15,21
15,21
15,21
15,21
15,21
15,21
15,21
15,21
15,21
15,21
15,21
15,21
15,21
15,21
15,21
15,21
15,21
15,21
15,21
15,21
15,21
15,21
15,21
15,21
15,21
15,21
15,21
15,21
15,21
15,21
15,21
15,21
15,21
15,21
15,21
15,21
15,21
15,21
15,21
15,21
15,21
15,21
15,21
15,21
15,21
15,21
15,21
15,21
15,21
15,21
15,21
15,21
15,21
15,21
15,21
15,21
15,21
15,21
15,21
15,21
15,21
15,21
15,21
+MEM_CPU1
16,21,22
16,21,22
16,21,22
16,21,22
16,21,22
16,21,22
16,21,22
16,21,22
16,21,22
16,21,22
16,21,22
16,21,22
16,21,22
16,21,22
16,21,22
16,21,22
16,21,22
16,21,22
16,21,22
16,22
16,22
16,21,22
16,21,22
16,21,22
16,22
16,22
16
16
16,22
48
48
+3.3V
20-22
16,22
16,22
16,21
16,21
16,21
16,21
16,21
X00_DT9812 SCH I2C address lines use pullup/pulldowns
16,21
16,21
16,21
16,21
16,21
16,21
16,21
16,21
16,21
16,21
16,21
16,21
16,21
16,21
16,21
16,21
16,21
16,21
16,21
16,21
16,21
16,21
16,21
16,21
16,21
16,21
16,21
16,21
16,21
16,21
16,21
16,21
16,21
16,21
16,21
16,21
16,21
16,21
16,21
21,22
16,21,22
CPU1_MEM_MB_BANK1
CPU1_MEM_MB_BANK0
CPU1_MEM_MB_BANK2
CPU1_MEM_MB_ADD15
CPU1_MEM_MB_ADD14
CPU1_MEM_MB_ADD13
CPU1_MEM_MB_ADD12
CPU1_MEM_MB_ADD11
CPU1_MEM_MB_ADD10
CPU1_MEM_MB_ADD9
CPU1_MEM_MB_ADD8
CPU1_MEM_MB_ADD7
CPU1_MEM_MB_ADD6
CPU1_MEM_MB_ADD5
CPU1_MEM_MB_ADD4
CPU1_MEM_MB_ADD3
CPU1_MEM_MB_ADD2
CPU1_MEM_MB_ADD1
CPU1_MEM_MB_ADD0
CPU1_MEM_MB0_CS_L1
CPU1_MEM_MB0_CS_L0
CPU1_MEM_MB_RAS_N
CPU1_MEM_MB_CAS_N
CPU1_MEM_MB_WE_N
CPU1_MEM_MB2_CS_L1
CPU1_MEM_MB2_CS_L0
NC_DIMM2_P138
NC_DIMM2_P137
CK_CPU1_MEM_MB0_DN
CK_CPU1_MEM_MB0_DP
CPU1_MEM_MB_CKE0
I2C_P1_DIMM2_SDA
I2C_P1_DIMM2_SCL
20,21
20,21
CPU1_DIMM_PD
CPU1_DIMM_PD
CPU1_DIMM_PU
21
V_MEM_CPU1_DIMM_VREF
CPU1_MEM_MB2_ODT0
CPU1_MEM_MB0_ODT0
CPU1_MEM_MB_CHECK7
CPU1_MEM_MB_CHECK6
CPU1_MEM_MB_CHECK5
CPU1_MEM_MB_CHECK4
CPU1_MEM_MB_CHECK3
CPU1_MEM_MB_CHECK2
CPU1_MEM_MB_CHECK1
CPU1_MEM_MB_CHECK0
CPU1_MEM_MB_DQS_17_DP
CPU1_MEM_MB_DQS_17_DN
CPU1_MEM_MB_DQS_16_DP
CPU1_MEM_MB_DQS_16_DN
CPU1_MEM_MB_DQS_15_DP
CPU1_MEM_MB_DQS_15_DN
CPU1_MEM_MB_DQS_14_DP
CPU1_MEM_MB_DQS_14_DN
CPU1_MEM_MB_DQS_13_DP
CPU1_MEM_MB_DQS_13_DN
CPU1_MEM_MB_DQS_12_DP
CPU1_MEM_MB_DQS_12_DN
CPU1_MEM_MB_DQS_11_DP
CPU1_MEM_MB_DQS_11_DN
CPU1_MEM_MB_DQS_10_DP
CPU1_MEM_MB_DQS_10_DN
CPU1_MEM_MB_DQS_9_DP
CPU1_MEM_MB_DQS_9_DN
CPU1_MEM_MB_DQS_8_DP
CPU1_MEM_MB_DQS_8_DN
CPU1_MEM_MB_DQS_7_DP
CPU1_MEM_MB_DQS_7_DN
CPU1_MEM_MB_DQS_6_DP
CPU1_MEM_MB_DQS_6_DN
CPU1_MEM_MB_DQS_5_DP
CPU1_MEM_MB_DQS_5_DN
CPU1_MEM_MB_DQS_4_DP
CPU1_MEM_MB_DQS_4_DN
CPU1_MEM_MB_DQS_3_DP
CPU1_MEM_MB_DQS_3_DN
CPU1_MEM_MB_DQS_2_DP
CPU1_MEM_MB_DQS_2_DN
CPU1_MEM_MB_DQS_1_DP
CPU1_MEM_MB_DQS_1_DN
CPU1_MEM_MB_DQS_0_DP
CPU1_MEM_MB_DQS_0_DN
CPU1_MEM_MB_ERR_N
CPU1_MEM_MB_PAR
NC_DIMM2_P102
190
71
54
173
174
196
176
57
70
177
179
58
180
60
61
182
63
183
188
76
193
192
74
73
221
220
138
137
186
185
171
52
119
120
101
240
239
238
77
195
168
167
162
161
49
48
43
42
164
165
232
233
223
224
211
212
202
203
155
156
146
147
134
135
125
126
46
45
114
113
105
104
93
92
84
83
37
36
28
27
16
15
55
68
102
BA1
BA0
A16/BA2
A15
A14
A13
A12
A11
A10/AP
A9
A8
A7
A6
A5
A4
A3
A2
A1
A0
S1
S0
RAS
CAS
WE
CK2
CK2
CK1
CK1
CK0
CK0
CKE1
CKE0
SDA
SCL
SA2
SA1
SA0
VDDSPD
1
VREF
ODT1
ODT0
CB7
CB6
CB5
CB4
CB3
CB2
CB1
CB0
DM8/DQS17/NC
DQS17/NC
DM7/DQS16
DQS16/NC
DM6/DQS15
DQS15/NC
DM5/DQS14
DQS14/NC
DM4/DQS13
DQS13/NC
DM3/DQS12
DQS12/NC
DM2/DQS11
DQS11/NC
DM1/DQS10
DQS10/NC
DM0/DQS9
DQS9/NC
DQS8/NC
DQS8/NC
DQS7
DQS7
DQS6
DQS6
DQS5
DQS5
DQS4
DQS4
DQS3
DQS3
DQS2
DQS2
DQS1
DQS1
7
DQS0
6
DQS0
ERR_OUT
PAR_IN
TEST
240 PIN DDR II DIMM
SUB*_MW921
I2C ID = A0 I2C ID = A2
CPU1 DIMMS 1A & 1B
ROOM = CPU1DIMM
J_DIMM1B
ranked DIMMs
to support quad
additional chip selects
CK2, CK2# are used for
X00_DT9841 SCH added note
THIS ITEM IS THE PROPERTY OF DELL INC. ROUND ROCK, TEXAS
AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS
ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL INC.,
EXCEPT AS AUTHORIZED BY DELL INC., AND THEN ONLY BY WAY OF
LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE
OR IN PART AND MUST BE RETURNED TO DELL INC. UPON REQUEST
AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF
THE LOAN. NEITHER THIS ITEM NOR THE INFORMATION IT CONTAINS MAY
BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH
USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT
THE PRIOR WRITTEN CONSENT OF DELL INC.
DQ63
DQ62
DQ61
DQ60
DQ59
DQ58
DQ57
DQ56
DQ55
DQ54
DQ53
DQ52
DQ51
DQ50
DQ49
DQ48
DQ47
DQ46
DQ45
DQ44
DQ43
DQ42
DQ41
DQ40
DQ39
DQ38
DQ37
DQ36
DQ35
DQ34
DQ33
DQ32
DQ31
DQ30
DQ29
DQ28
DQ27
DQ26
DQ25
DQ24
DQ23
DQ22
DQ21
DQ20
DQ19
DQ18
DQ17
DQ16
DQ15
DQ14
DQ13
DQ12
DQ11
DQ10
DQ9
DQ8
DQ7
DQ6
DQ5
DQ4
DQ3
DQ2
DQ1
DQ0
VDD10
VDD9
VDD8
VDD7
VDD6
VDD5
VDD4
VDD3
VDD2
VDD1
VDD0
VDDQ10
VDDQ9
VDDQ8
VDDQ7
VDDQ6
VDDQ5
VDDQ4
VDDQ3
VDDQ2
VDDQ1
VDDQ0
NC
RESET
236
235
230
229
117
116
111
110
227
226
218
217
108
107
99
98
215
214
209
208
96
95
90
89
206
205
200
199
87
86
81
80
159
158
153
152
40
39
34
33
150
149
144
143
31
30
25
24
141
140
132
131
22
21
13
12
129
128
123
122
10
9
4
3
197
189
187
184
178
172
69
67
64
59
53
194
191
181
175
170
78
75
72
62
56
51
19
18
CPU1_MEM_MB_DATA63
CPU1_MEM_MB_DATA62
CPU1_MEM_MB_DATA61
CPU1_MEM_MB_DATA60
CPU1_MEM_MB_DATA59
CPU1_MEM_MB_DATA58
CPU1_MEM_MB_DATA57
CPU1_MEM_MB_DATA56
CPU1_MEM_MB_DATA55
CPU1_MEM_MB_DATA54
CPU1_MEM_MB_DATA53
CPU1_MEM_MB_DATA52
CPU1_MEM_MB_DATA51
CPU1_MEM_MB_DATA50
CPU1_MEM_MB_DATA49
CPU1_MEM_MB_DATA48
CPU1_MEM_MB_DATA47
CPU1_MEM_MB_DATA46
CPU1_MEM_MB_DATA45
CPU1_MEM_MB_DATA44
CPU1_MEM_MB_DATA43
CPU1_MEM_MB_DATA42
CPU1_MEM_MB_DATA41
CPU1_MEM_MB_DATA40
CPU1_MEM_MB_DATA39
CPU1_MEM_MB_DATA38
CPU1_MEM_MB_DATA37
CPU1_MEM_MB_DATA36
CPU1_MEM_MB_DATA35
CPU1_MEM_MB_DATA34
CPU1_MEM_MB_DATA33
CPU1_MEM_MB_DATA32
CPU1_MEM_MB_DATA31
CPU1_MEM_MB_DATA30
CPU1_MEM_MB_DATA29
CPU1_MEM_MB_DATA28
CPU1_MEM_MB_DATA27
CPU1_MEM_MB_DATA26
CPU1_MEM_MB_DATA25
CPU1_MEM_MB_DATA24
CPU1_MEM_MB_DATA23
CPU1_MEM_MB_DATA22
CPU1_MEM_MB_DATA21
CPU1_MEM_MB_DATA20
CPU1_MEM_MB_DATA19
CPU1_MEM_MB_DATA18
CPU1_MEM_MB_DATA17
CPU1_MEM_MB_DATA16
CPU1_MEM_MB_DATA15
CPU1_MEM_MB_DATA14
CPU1_MEM_MB_DATA13
CPU1_MEM_MB_DATA12
CPU1_MEM_MB_DATA11
CPU1_MEM_MB_DATA10
CPU1_MEM_MB_DATA9
CPU1_MEM_MB_DATA8
CPU1_MEM_MB_DATA7
CPU1_MEM_MB_DATA6
CPU1_MEM_MB_DATA5
CPU1_MEM_MB_DATA4
CPU1_MEM_MB_DATA3
CPU1_MEM_MB_DATA2
CPU1_MEM_MB_DATA1
CPU1_MEM_MB_DATA0
NC_DIMM2_P19
CPU1_MEM_MB_RESET_N
PROPRIETARY NOTE
16,21
16,21
16,21
16,21
16,21
16,21
16,21
16,21
16,21
16,21
16,21
16,21
16,21
16,21
16,21
16,21
16,21
16,21
16,21
16,21
16,21
16,21
16,21
16,21
16,21
16,21
16,21
16,21
16,21
16,21
16,21
16,21
16,21
16,21
16,21
16,21
16,21
16,21
16,21
16,21
16,21
16,21
16,21
16,21
16,21
16,21
16,21
16,21
16,21
16,21
16,21
16,21
16,21
16,21
16,21
16,21
16,21
16,21
16,21
16,21
16,21
16,21
16,21
16,21
16,21
+MEM_CPU1
TITLE
DWG NO.
DATE
INC.
ROUND ROCK,TEXAS
SCHEM, PLN, SV, PE2970
FP975
SHEET
10/2/2008
1
2
3
4
REV.
A05
20 OF 120
C
DBA
A B C
D
1
2
3
4
15,20,22
15,20,22
15,20,22
15,20,22
15,20,22
15,20,22
15,20,22
15,20,22
15,20,22
15,20,22
15,20,22
15,20,22
15,20,22
15,20,22
15,20,22
15,20,22
15,20,22
15,20,22
15,20,22
15,22
15,22
15,20,22
15,20,22
15,20,22
15,22
15,22
15
15
15,22
48
48
+3.3V
20-22
15,22
15,22
15,20
15,20
15,20
15,20
15,20
X00_DT9812 SCH I2C address lines use pullup/pulldowns
15,20
15,20
15,20
15,20
15,20
15,20
15,20
15,20
15,20
15,20
15,20
15,20
15,20
15,20
15,20
15,20
15,20
15,20
15,20
15,20
15,20
15,20
15,20
15,20
15,20
15,20
15,20
15,20
15,20
15,20
15,20
15,20
15,20
15,20
15,20
15,20
15,20
15,20
15,20
20,22
15,20,22
CPU1_MEM_MA_BANK1
CPU1_MEM_MA_BANK0
CPU1_MEM_MA_BANK2
CPU1_MEM_MA_ADD15
CPU1_MEM_MA_ADD14
CPU1_MEM_MA_ADD13
CPU1_MEM_MA_ADD12
CPU1_MEM_MA_ADD11
CPU1_MEM_MA_ADD10
CPU1_MEM_MA_ADD9
CPU1_MEM_MA_ADD8
CPU1_MEM_MA_ADD7
CPU1_MEM_MA_ADD6
CPU1_MEM_MA_ADD5
CPU1_MEM_MA_ADD4
CPU1_MEM_MA_ADD3
CPU1_MEM_MA_ADD2
CPU1_MEM_MA_ADD1
CPU1_MEM_MA_ADD0
CPU1_MEM_MA1_CS_L1
CPU1_MEM_MA1_CS_L0
CPU1_MEM_MA_RAS_N
CPU1_MEM_MA_CAS_N
CPU1_MEM_MA_WE_N
CPU1_MEM_MA3_CS_L1
CPU1_MEM_MA3_CS_L0
NC_DIMM3_P138
NC_DIMM3_P137
CK_CPU1_MEM_MA1_DN
CK_CPU1_MEM_MA1_DP
CPU1_MEM_MA_CKE1
I2C_P1_DIMM3_SDA
I2C_P1_DIMM3_SCL
20,21
20,21
20,21
CPU1_DIMM_PD
CPU1_DIMM_PU
CPU1_DIMM_PD
V_MEM_CPU1_DIMM_VREF
CPU1_MEM_MA3_ODT0
CPU1_MEM_MA1_ODT0
CPU1_MEM_MA_CHECK7
CPU1_MEM_MA_CHECK6
CPU1_MEM_MA_CHECK5
CPU1_MEM_MA_CHECK4
CPU1_MEM_MA_CHECK3
CPU1_MEM_MA_CHECK2
CPU1_MEM_MA_CHECK1
CPU1_MEM_MA_CHECK0
CPU1_MEM_MA_DQS_17_DP
CPU1_MEM_MA_DQS_17_DN
CPU1_MEM_MA_DQS_16_DP
CPU1_MEM_MA_DQS_16_DN
CPU1_MEM_MA_DQS_15_DP
CPU1_MEM_MA_DQS_15_DN
CPU1_MEM_MA_DQS_14_DP
CPU1_MEM_MA_DQS_14_DN
CPU1_MEM_MA_DQS_13_DP
CPU1_MEM_MA_DQS_13_DN
CPU1_MEM_MA_DQS_12_DP
CPU1_MEM_MA_DQS_12_DN
CPU1_MEM_MA_DQS_11_DP
CPU1_MEM_MA_DQS_11_DN
CPU1_MEM_MA_DQS_10_DP
CPU1_MEM_MA_DQS_10_DN
CPU1_MEM_MA_DQS_9_DP
CPU1_MEM_MA_DQS_9_DN
CPU1_MEM_MA_DQS_8_DP
CPU1_MEM_MA_DQS_8_DN
CPU1_MEM_MA_DQS_7_DP
CPU1_MEM_MA_DQS_7_DN
CPU1_MEM_MA_DQS_6_DP
CPU1_MEM_MA_DQS_6_DN
CPU1_MEM_MA_DQS_5_DP
CPU1_MEM_MA_DQS_5_DN
CPU1_MEM_MA_DQS_4_DP
CPU1_MEM_MA_DQS_4_DN
CPU1_MEM_MA_DQS_3_DP
CPU1_MEM_MA_DQS_3_DN
CPU1_MEM_MA_DQS_2_DP
CPU1_MEM_MA_DQS_2_DN
CPU1_MEM_MA_DQS_1_DP
CPU1_MEM_MA_DQS_1_DN
CPU1_MEM_MA_DQS_0_DP
CPU1_MEM_MA_DQS_0_DN
CPU1_MEM_MA_ERR_N
CPU1_MEM_MA_PAR
SUB*_TM615
190
71
54
173
174
196
176
57
70
177
179
58
180
60
61
182
63
183
188
76
193
192
74
73
221
220
138
137
186
185
171
52
119
120
101
240
239
238
77
195
168
167
162
161
49
48
43
42
164
165
232
233
223
224
211
212
202
203
155
156
146
147
134
135
125
126
46
45
114
113
105
104
93
92
84
83
37
36
28
27
16
15
55
68
102
BA1
BA0
A16/BA2
A15
A14
A13
A12
A11
A10/AP
A9
A8
A7
A6
A5
A4
A3
A2
A1
A0
S1
S0
RAS
CAS
WE
CK2
CK2
CK1
CK1
CK0
CK0
CKE1
CKE0
SDA
SCL
SA2
SA1
SA0
VDDSPD
1
VREF
ODT1
ODT0
CB7
CB6
CB5
CB4
CB3
CB2
CB1
CB0
DM8/DQS17/NC
DQS17/NC
DM7/DQS16
DQS16/NC
DM6/DQS15
DQS15/NC
DM5/DQS14
DQS14/NC
DM4/DQS13
DQS13/NC
DM3/DQS12
DQS12/NC
DM2/DQS11
DQS11/NC
DM1/DQS10
DQS10/NC
DM0/DQS9
DQS9/NC
DQS8/NC
DQS8/NC
DQS7
DQS7
DQS6
DQS6
DQS5
DQS5
DQS4
DQS4
DQS3
DQS3
DQS2
DQS2
DQS1
DQS1
7
DQS0
6
DQS0
ERR_OUT
PAR_IN
TEST
240 PIN DDR II DIMM
DQ63
DQ62
DQ61
DQ60
DQ59
DQ58
DQ57
DQ56
DQ55
DQ54
DQ53
DQ52
DQ51
DQ50
J_DIMM2A
DQ49
DQ48
DQ47
DQ46
DQ45
DQ44
DQ43
DQ42
DQ41
DQ40
DQ39
DQ38
DQ37
DQ36
DQ35
DQ34
ranked DIMMs
to support quad
additional chip selects
CK2, CK2# are used for
DQ33
DQ32
DQ31
DQ30
X00_DT9841 SCH added note
DQ29
DQ28
DQ27
DQ26
DQ25
DQ24
DQ23
DQ22
DQ21
DQ20
DQ19
DQ18
DQ17
DQ16
DQ15
DQ14
DQ13
DQ12
DQ11
DQ10
DQ9
DQ8
DQ7
DQ6
DQ5
DQ4
DQ3
DQ2
DQ1
DQ0
VDD10
VDD9
VDD8
VDD7
VDD6
VDD5
VDD4
VDD3
VDD2
VDD1
VDD0
VDDQ10
VDDQ9
VDDQ8
VDDQ7
VDDQ6
VDDQ5
VDDQ4
VDDQ3
VDDQ2
VDDQ1
VDDQ0
NC
RESET
I2C ID = A4
same issues as on page 32
236
235
230
229
117
116
111
110
227
226
218
217
108
107
99
98
215
214
209
208
96
95
90
89
206
205
200
199
87
86
81
80
159
158
153
152
40
39
34
33
150
149
144
143
31
30
25
24
141
140
132
131
22
21
13
12
129
128
123
122
10
9
4
3
197
189
187
184
178
172
69
67
64
59
53
194
191
181
175
170
78
75
72
62
56
51
19
18
CPU1_MEM_MA_RESET_N
CPU1_MEM_MA_DATA63
CPU1_MEM_MA_DATA62
CPU1_MEM_MA_DATA61
CPU1_MEM_MA_DATA60
CPU1_MEM_MA_DATA59
CPU1_MEM_MA_DATA58
CPU1_MEM_MA_DATA57
CPU1_MEM_MA_DATA56
CPU1_MEM_MA_DATA55
CPU1_MEM_MA_DATA54
CPU1_MEM_MA_DATA53
CPU1_MEM_MA_DATA52
CPU1_MEM_MA_DATA51
CPU1_MEM_MA_DATA50
CPU1_MEM_MA_DATA49
CPU1_MEM_MA_DATA48
CPU1_MEM_MA_DATA47
CPU1_MEM_MA_DATA46
CPU1_MEM_MA_DATA45
CPU1_MEM_MA_DATA44
CPU1_MEM_MA_DATA43
CPU1_MEM_MA_DATA42
CPU1_MEM_MA_DATA41
CPU1_MEM_MA_DATA40
CPU1_MEM_MA_DATA39
CPU1_MEM_MA_DATA38
CPU1_MEM_MA_DATA37
CPU1_MEM_MA_DATA36
CPU1_MEM_MA_DATA35
CPU1_MEM_MA_DATA34
CPU1_MEM_MA_DATA33
CPU1_MEM_MA_DATA32
CPU1_MEM_MA_DATA31
CPU1_MEM_MA_DATA30
CPU1_MEM_MA_DATA29
CPU1_MEM_MA_DATA28
CPU1_MEM_MA_DATA27
CPU1_MEM_MA_DATA26
CPU1_MEM_MA_DATA25
CPU1_MEM_MA_DATA24
CPU1_MEM_MA_DATA23
CPU1_MEM_MA_DATA22
CPU1_MEM_MA_DATA21
CPU1_MEM_MA_DATA20
CPU1_MEM_MA_DATA19
CPU1_MEM_MA_DATA18
CPU1_MEM_MA_DATA17
CPU1_MEM_MA_DATA16
CPU1_MEM_MA_DATA15
CPU1_MEM_MA_DATA14
CPU1_MEM_MA_DATA13
CPU1_MEM_MA_DATA12
CPU1_MEM_MA_DATA11
CPU1_MEM_MA_DATA10
CPU1_MEM_MA_DATA9
CPU1_MEM_MA_DATA8
CPU1_MEM_MA_DATA7
CPU1_MEM_MA_DATA6
CPU1_MEM_MA_DATA5
CPU1_MEM_MA_DATA4
CPU1_MEM_MA_DATA3
CPU1_MEM_MA_DATA2
CPU1_MEM_MA_DATA1
CPU1_MEM_MA_DATA0
NC_DIMM3_P19
15,20
15,20
15,20
15,20
15,20
15,20
15,20
15,20
15,20
15,20
15,20
15,20
15,20
15,20
15,20
15,20
15,20
15,20
15,20
15,20
15,20
15,20
15,20
15,20
15,20
15,20
15,20
15,20
15,20
15,20
15,20
15,20
15,20
15,20
15,20
15,20
15,20
15,20
15,20
15,20
15,20
15,20
15,20
15,20
15,20
15,20
15,20
15,20
15,20
15,20
15,20
15,20
15,20
15,20
15,20
15,20
15,20
15,20
15,20
15,20
15,20
15,20
15,20
15,20
15,20
X00_DT9812 SCH I2C address lines use pullup/pulldowns
+MEM_CPU1
CPU1 DIMMS 2A & 2B
+3.3V
16,20,22
16,20,22
16,20,22
16,20,22
16,20,22
16,20,22
16,20,22
16,20,22
16,20,22
16,20,22
16,20,22
16,20,22
16,20,22
16,20,22
16,20,22
16,20,22
16,20,22
16,20,22
16,20,22
16,22
16,22
16,20,22
16,20,22
16,20,22
16,22
16,22
16
16
16,22
48
48
20-22
16,22
16,22
16,20
16,20
16,20
16,20
16,20
16,20
16,20
16,20
16,20
16,20
16,20
16,20
16,20
16,20
16,20
16,20
16,20
16,20
16,20
16,20
16,20
16,20
16,20
16,20
16,20
16,20
16,20
16,20
16,20
16,20
16,20
16,20
16,20
16,20
16,20
16,20
16,20
16,20
16,20
16,20
16,20
16,20
16,20
16,20
20,22
16,20,22
CPU1_MEM_MB_BANK1
CPU1_MEM_MB_BANK0
CPU1_MEM_MB_BANK2
CPU1_MEM_MB_ADD15
CPU1_MEM_MB_ADD14
CPU1_MEM_MB_ADD13
CPU1_MEM_MB_ADD12
CPU1_MEM_MB_ADD11
CPU1_MEM_MB_ADD10
CPU1_MEM_MB_ADD9
CPU1_MEM_MB_ADD8
CPU1_MEM_MB_ADD7
CPU1_MEM_MB_ADD6
CPU1_MEM_MB_ADD5
CPU1_MEM_MB_ADD4
CPU1_MEM_MB_ADD3
CPU1_MEM_MB_ADD2
CPU1_MEM_MB_ADD1
CPU1_MEM_MB_ADD0
CPU1_MEM_MB1_CS_L1
CPU1_MEM_MB1_CS_L0
CPU1_MEM_MB_RAS_N
CPU1_MEM_MB_CAS_N
CPU1_MEM_MB_WE_N
CPU1_MEM_MB3_CS_L1
CPU1_MEM_MB3_CS_L0
NC_DIMM4_P138
NC_DIMM4_P137
CK_CPU1_MEM_MB1_DN
CK_CPU1_MEM_MB1_DP
CPU1_MEM_MB_CKE1
I2C_P1_DIMM4_SDA
I2C_P1_DIMM4_SCL
20,21
20,21
20,21
CPU1_DIMM_PD
CPU1_DIMM_PU
CPU1_DIMM_PU
V_MEM_CPU1_DIMM_VREF
CPU1_MEM_MB3_ODT0
CPU1_MEM_MB1_ODT0
CPU1_MEM_MB_CHECK7
CPU1_MEM_MB_CHECK6
CPU1_MEM_MB_CHECK5
CPU1_MEM_MB_CHECK4
CPU1_MEM_MB_CHECK3
CPU1_MEM_MB_CHECK2
CPU1_MEM_MB_CHECK1
CPU1_MEM_MB_CHECK0
CPU1_MEM_MB_DQS_17_DP
CPU1_MEM_MB_DQS_17_DN
CPU1_MEM_MB_DQS_16_DP
CPU1_MEM_MB_DQS_16_DN
CPU1_MEM_MB_DQS_15_DP
CPU1_MEM_MB_DQS_15_DN
CPU1_MEM_MB_DQS_14_DP
CPU1_MEM_MB_DQS_14_DN
CPU1_MEM_MB_DQS_13_DP
CPU1_MEM_MB_DQS_13_DN
CPU1_MEM_MB_DQS_12_DP
CPU1_MEM_MB_DQS_12_DN
CPU1_MEM_MB_DQS_11_DP
CPU1_MEM_MB_DQS_11_DN
CPU1_MEM_MB_DQS_10_DP
CPU1_MEM_MB_DQS_10_DN
CPU1_MEM_MB_DQS_9_DP
CPU1_MEM_MB_DQS_9_DN
CPU1_MEM_MB_DQS_8_DP
CPU1_MEM_MB_DQS_8_DN
CPU1_MEM_MB_DQS_7_DP
CPU1_MEM_MB_DQS_7_DN
CPU1_MEM_MB_DQS_6_DP
CPU1_MEM_MB_DQS_6_DN
CPU1_MEM_MB_DQS_5_DP
CPU1_MEM_MB_DQS_5_DN
CPU1_MEM_MB_DQS_4_DP
CPU1_MEM_MB_DQS_4_DN
CPU1_MEM_MB_DQS_3_DP
CPU1_MEM_MB_DQS_3_DN
CPU1_MEM_MB_DQS_2_DP
CPU1_MEM_MB_DQS_2_DN
CPU1_MEM_MB_DQS_1_DP
CPU1_MEM_MB_DQS_1_DN
CPU1_MEM_MB_DQS_0_DP
CPU1_MEM_MB_DQS_0_DN
CPU1_MEM_MB_ERR_N
CPU1_MEM_MB_PAR
NC_DIMM4_P102NC_DIMM3_P102
ROOM = CPU1DIMM
190
173
174
196
176
177
179
180
182
183
188
193
192
221
220
138
137
186
185
171
119
120
101
240
239
238
195
168
167
162
161
164
165
232
233
223
224
211
212
202
203
155
156
146
147
134
135
125
126
114
113
105
104
102
SUB*_TM615
BA1
71
BA0
54
A16/BA2
A15
A14
A13
A12
57
A11
70
A10/AP
A9
A8
58
A7
A6
60
A5
61
A4
A3
63
A2
A1
A0
76
S1
S0
RAS
74
CAS
73
WE
CK2
CK2
CK1
CK1
CK0
CK0
CKE1
52
CKE0
SDA
SCL
SA2
SA1
SA0
VDDSPD
1
VREF
77
ODT1
ODT0
CB7
CB6
CB5
CB4
49
CB3
48
CB2
43
CB1
42
CB0
DM8/DQS17/NC
DQS17/NC
DM7/DQS16
DQS16/NC
DM6/DQS15
DQS15/NC
DM5/DQS14
DQS14/NC
DM4/DQS13
DQS13/NC
DM3/DQS12
DQS12/NC
DM2/DQS11
DQS11/NC
DM1/DQS10
DQS10/NC
DM0/DQS9
DQS9/NC
46
DQS8/NC
45
DQS8/NC
DQS7
DQS7
DQS6
DQS6
93
DQS5
92
DQS5
84
DQS4
83
DQS4
37
DQS3
36
DQS3
28
DQS2
27
DQS2
16
DQS1
15
DQS1
7
DQS0
6
DQS0
55
ERR_OUT
68
PAR_IN
TEST
I2C ID = A6
DQ63
DQ62
DQ61
DQ60
DQ59
DQ58
DQ57
DQ56
DQ55
DQ54
DQ53
DQ52
DQ51
J_DIMM2B
DQ50
DQ49
DQ48
DQ47
DQ46
DQ45
DQ44
DQ43
DQ42
DQ41
DQ40
DQ39
DQ38
DQ37
DQ36
DQ35
DQ34
ranked DIMMs
to support quad
additional chip selects
CK2, CK2# are used for
DQ33
DQ32
DQ31
DQ30
X00_DT9841 SCH added note
DQ29
DQ28
DQ27
DQ26
DQ25
DQ24
DQ23
DQ22
DQ21
DQ20
DQ19
DQ18
DQ17
DQ16
DQ15
DQ14
DQ13
DQ12
DQ11
DQ10
VDD10
VDD9
VDD8
VDD7
VDD6
VDD5
VDD4
VDD3
VDD2
VDD1
VDD0
VDDQ10
VDDQ9
VDDQ8
VDDQ7
VDDQ6
VDDQ5
VDDQ4
VDDQ3
VDDQ2
VDDQ1
VDDQ0
RESET
240 PIN DDR II DIMM
THIS ITEM IS THE PROPERTY OF DELL INC. ROUND ROCK, TEXAS
AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS
ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL INC.,
EXCEPT AS AUTHORIZED BY DELL INC., AND THEN ONLY BY WAY OF
LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE
OR IN PART AND MUST BE RETURNED TO DELL INC. UPON REQUEST
AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF
THE LOAN. NEITHER THIS ITEM NOR THE INFORMATION IT CONTAINS MAY
BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH
USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT
THE PRIOR WRITTEN CONSENT OF DELL INC.
DQ9
DQ8
DQ7
DQ6
DQ5
DQ4
DQ3
DQ2
DQ1
DQ0
NC
236
235
230
229
117
116
111
110
227
226
218
217
108
107
99
98
215
214
209
208
96
95
90
89
206
205
200
199
87
86
81
80
159
158
153
152
40
39
34
33
150
149
144
143
31
30
25
24
141
140
132
131
22
21
13
12
129
128
123
122
10
9
4
3
197
189
187
184
178
172
69
67
64
59
53
194
191
181
175
170
78
75
72
62
56
51
19
18
CPU1_MEM_MB_DATA63
CPU1_MEM_MB_DATA62
CPU1_MEM_MB_DATA61
CPU1_MEM_MB_DATA60
CPU1_MEM_MB_DATA59
CPU1_MEM_MB_DATA58
CPU1_MEM_MB_DATA57
CPU1_MEM_MB_DATA56
CPU1_MEM_MB_DATA55
CPU1_MEM_MB_DATA54
CPU1_MEM_MB_DATA53
CPU1_MEM_MB_DATA52
CPU1_MEM_MB_DATA51
CPU1_MEM_MB_DATA50
CPU1_MEM_MB_DATA49
CPU1_MEM_MB_DATA48
CPU1_MEM_MB_DATA47
CPU1_MEM_MB_DATA46
CPU1_MEM_MB_DATA45
CPU1_MEM_MB_DATA44
CPU1_MEM_MB_DATA43
CPU1_MEM_MB_DATA42
CPU1_MEM_MB_DATA41
CPU1_MEM_MB_DATA40
CPU1_MEM_MB_DATA39
CPU1_MEM_MB_DATA38
CPU1_MEM_MB_DATA37
CPU1_MEM_MB_DATA36
CPU1_MEM_MB_DATA35
CPU1_MEM_MB_DATA34
CPU1_MEM_MB_DATA33
CPU1_MEM_MB_DATA32
CPU1_MEM_MB_DATA31
CPU1_MEM_MB_DATA30
CPU1_MEM_MB_DATA29
CPU1_MEM_MB_DATA28
CPU1_MEM_MB_DATA27
CPU1_MEM_MB_DATA26
CPU1_MEM_MB_DATA25
CPU1_MEM_MB_DATA24
CPU1_MEM_MB_DATA23
CPU1_MEM_MB_DATA22
CPU1_MEM_MB_DATA21
CPU1_MEM_MB_DATA20
CPU1_MEM_MB_DATA19
CPU1_MEM_MB_DATA18
CPU1_MEM_MB_DATA17
CPU1_MEM_MB_DATA16
CPU1_MEM_MB_DATA15
CPU1_MEM_MB_DATA14
CPU1_MEM_MB_DATA13
CPU1_MEM_MB_DATA12
CPU1_MEM_MB_DATA11
CPU1_MEM_MB_DATA10
CPU1_MEM_MB_DATA9
CPU1_MEM_MB_DATA8
CPU1_MEM_MB_DATA7
CPU1_MEM_MB_DATA6
CPU1_MEM_MB_DATA5
CPU1_MEM_MB_DATA4
CPU1_MEM_MB_DATA3
CPU1_MEM_MB_DATA2
CPU1_MEM_MB_DATA1
CPU1_MEM_MB_DATA0
NC_DIMM4_P19
CPU1_MEM_MB_RESET_N
PROPRIETARY NOTE
16,20
16,20
16,20
16,20
16,20
16,20
16,20
16,20
16,20
16,20
16,20
16,20
16,20
16,20
16,20
16,20
16,20
16,20
16,20
16,20
16,20
16,20
16,20
16,20
16,20
16,20
16,20
16,20
16,20
16,20
16,20
16,20
16,20
16,20
16,20
16,20
16,20
16,20
16,20
16,20
16,20
16,20
16,20
16,20
16,20
16,20
16,20
16,20
16,20
16,20
16,20
16,20
16,20
16,20
16,20
16,20
16,20
16,20
16,20
16,20
16,20
16,20
16,20
16,20
+MEM_CPU1
X00_DT9812 SCH I2C address lines use pullup/pulldowns
+3.3V
R9771
1 2
220-5%
R9772
1 2
220-5%
16,20
TITLE
SCHEM, PLN, SV, PE2970
DWG NO.
FP975
DATE
10/2/2008
CPU1_DIMM_PU
CPU1_DIMM_PD
INC.
ROUND ROCK,TEXAS
1
2
3
20,21
20,21
4
REV.
A05
SHEET
21 OF 120
C
DBA
A B C
D
1
2
3
15,20-22
15,21,22
15,20,22
15,20-22
15,21,22
15,20-22
15,20-22
15,20-22
15,20-22
15,20-22
15,20,22
15,20-22
15,21,22
15,20-22
15,20-22
15,20-22
15,20-22
15,20-22
15,20-22
15,20-22
15,20-22
15,20-22
15,20,22
15,21,22
16,20,22
16,20-22
16,20,22
16,21,22
15,20,22
15,20-22
15,20-22
15,20-22
15,20-22
15,20-22
15,21,22
15,20,22
16,20,22
16,21,22
16,21,22
16,20-22
16,20-22
CPU1_MEM_MA1_CS_L1
CPU1_MEM_MA0_CS_L1
CPU1_MEM_MA_ADD13
CPU1_MEM_MA1_ODT0
CPU1_MEM_MA_ADD6
CPU1_MEM_MA_ADD5
CPU1_MEM_MA_ADD8
CPU1_MEM_MA_ADD7
CPU1_MEM_MA_CAS_N
CPU1_MEM_MA0_ODT0
CPU1_MEM_MA_WE_N
CPU1_MEM_MA1_CS_L0
CPU1_MEM_MA_ADD11
CPU1_MEM_MA_ADD9
CPU1_MEM_MA_ADD12
CPU1_MEM_MA_BANK2
CPU1_MEM_MA_BANK0
CPU1_MEM_MA_BANK1
CPU1_MEM_MA_PAR
CPU1_MEM_MA_ADD0
CPU1_MEM_MA_ADD14
CPU1_MEM_MA_ADD15
CPU1_MEM_MA_CKE0
CPU1_MEM_MA_CKE1
CPU1_MEM_MB0_ODT0
CPU1_MEM_MB_ADD13
CPU1_MEM_MB0_CS_L1
CPU1_MEM_MB1_CS_L1
CPU1_MEM_MA0_CS_L0
CPU1_MEM_MA_RAS_N
15,20-22
CPU1_MEM_MA_ADD2
CPU1_MEM_MA_ADD1
CPU1_MEM_MA_ADD3
CPU1_MEM_MA_ADD4
CPU1_MEM_MA3_ODT0
CPU1_MEM_MA2_ODT0
CPU1_MEM_MB2_ODT0
CPU1_MEM_MB3_ODT0
CPU1_MEM_MB1_CS_L0
CPU1_MEM_MB_RAS_N
CPU1_MEM_MB_BANK0
CPU1_MEM_MA_ADD10
R9674
1 2
R9675
1 2
10-1%
1 2
10-1%
R9670
1 2
R9671
1 2
10-1%
1 2
10-1%
R9666
1 2
R9667
1 2
10-1%
1 2
10-1%
R9662
1 2
R9663
1 2
10-1%
1 2
10-1%
R9658
1 2
R9659
1 2
10-1%
1 2
10-1%
R9654
1 2
R9655
1 2
10-1%
1 2
10-1%
R9650
1 2
R9651
1 2
10-1%
1 2
10-1%
R9647
1 2
1 2
10-1%
R9643
1 2
R9644
1 2
10-1%
1 2
10-1%
R9639
1 2
R9640
1 2
10-1%
1 2
10-1%
R9635
1 2
R9636
1 2
10-1%
1 2
10-1%
R9672
R9673
1 2
10-1%
10-1%
R9668
R9669
1 2
10-1%
10-1%
R9664
R9665
1 2
10-1%
10-1%
R9660
R9661
1 2
10-1%
10-1%
R9656
R9657
1 2
10-1%
10-1%
R9652
R9653
1 2
10-1%
10-1%
R9648
R9649
1 2
10-1%
10-1%
R9645
R9646
1 2
10-1%
10-1%
R9641
R9642
1 2
10-1%
10-1%
R9637
R9638
1 2
10-1%
10-1%
R9634
10-1%
C9646
1 2
C9644
1 2
15pF
50V-5%
15pF
50V-5%
C9650
1 2
C9648
1 2
15pF
50V-5%
15pF
50V-5%
C9654
1 2
C9652
1 2
15pF
50V-5%
15pF
50V-5%
C9658
1 2
C9656
1 2
15pF
50V-5%
15pF
50V-5%
C9662
1 2
C9660
1 2
15pF
50V-5%
15pF
50V-5%
C9666
1 2
C9664
1 2
15pF
50V-5%
15pF
50V-5%
C9670
1 2
C9668
1 2
15pF
50V-5%
15pF
50V-5%
C9672
1 2
15pF
50V-5%
C9677
1 2
C9675
1 2
15pF
50V-5%
15pF
50V-5%
C9681
1 2
C9679
1 2
15pF
50V-5%
15pF
50V-5%
C9684
1 2
C9683
1 2
15pF
50V-5%
15pF
50V-5%
C9647
1 2
C9645
1 2
15pF
50V-5%
15pF
50V-5%
C9651
1 2
C9649
1 2
15pF
50V-5%
15pF
50V-5%
C9655
1 2
C9653
1 2
15pF
50V-5%
15pF
50V-5%
C9659
1 2
C9657
1 2
15pF
50V-5%
15pF
50V-5%
C9663
1 2
C9661
1 2
15pF
50V-5%
15pF
50V-5%
C9667
1 2
C9665
1 2
15pF
50V-5%
15pF
50V-5%
C9671
1 2
C9669
1 2
15pF
50V-5%
15pF
50V-5%
C9674
1 2
C9673
1 2
15pF
50V-5%
15pF
50V-5%
C9678
1 2
C9676
1 2
15pF
50V-5%
15pF
50V-5%
C9682
1 2
C9680
1 2
15pF
50V-5%
15pF
50V-5%
C9685
1 2
15pF
50V-5%
+MEM_CPU1
16,20-22
16,20-22
16,20-22
16,20-22
16,20-22
16,20-22
16,20-22
16,20-22
16,20-22
16,20-22
16,20-22
16,20-22
16,20-22
16,20-22
16,20-22
16,20-22
16,21,22
16,20,22
16,20-22
16,20-22
15,20,22
15,20,22
15,21,22
15,21,22
16,20,22
16,20,22
16,21,22
16,21,22
CPU1_MEM_MB_ADD0
CPU1_MEM_MB_PAR
CPU1_MEM_MB_BANK1
CPU1_MEM_MB_ADD10
CPU1_MEM_MB_ADD4
CPU1_MEM_MB_ADD3
CPU1_MEM_MB_ADD1
CPU1_MEM_MB_ADD2
CPU1_MEM_MB_ADD7
CPU1_MEM_MB_ADD8
CPU1_MEM_MB_ADD6
CPU1_MEM_MB_ADD5
CPU1_MEM_MB_BANK2
CPU1_MEM_MB_ADD12
CPU1_MEM_MB_ADD9
CPU1_MEM_MB_ADD11
CPU1_MEM_MB_CKE1
CPU1_MEM_MB_CKE0
CPU1_MEM_MB_ADD15
CPU1_MEM_MB_ADD14
CPU1_MEM_MA2_CS_L0
CPU1_MEM_MA2_CS_L1
CPU1_MEM_MA3_CS_L0
CPU1_MEM_MA3_CS_L1
CPU1_MEM_MB2_CS_L0
CPU1_MEM_MB2_CS_L1
CPU1_MEM_MB3_CS_L0
CPU1_MEM_MB3_CS_L1
+MEM_CPU1
R8721
1 2
R8722
1 2
C8742
C8746
49.9-1% 49.9-1%
21
.1uF
21
0.33uF 16V
1 2
1 2
1 2
1 2
1 2
1 2
1 2
16V-10%
20%
R9628
R9629
1 2
10-1%
1 2
10-1%
R9624
R9625
1 2
10-1%
1 2
10-1%
R9620
R9621
1 2
10-1%
1 2
10-1%
R9616
R9617
1 2
10-1%
1 2
10-1%
R9612
R9613
1 2
10-1%
1 2
10-1%
R9608
R9609
1 2
10-1%
1 2
10-1%
R9604
R9605
1 2
10-1%
1 2
10-1%
C8743
1 2
R9626
R9627
1 2
10-1%
10-1%
R9622
R9623
1 2
10-1%
10-1%
R9618
R9619
1 2
10-1%
10-1%
R9614
R9615
1 2
10-1%
10-1%
R9610
R9611
1 2
10-1%
10-1%
R9606
R9607
1 2
10-1%
10-1%
R9602
R9603
1 2
10-1%
10-1%
1000pF
50V-10%
C8744
1 2
1000pF
50V-10%
C9642
1 2
C9640
C9643
1 2
15pF
50V-5%
1 2
15pF
50V-5%
15pF
50V-5%
C9641
1 2
15pF
50V-5%
C9638
1 2
C9636
C9639
1 2
15pF
50V-5%
1 2
15pF
50V-5%
15pF
50V-5%
C9637
1 2
15pF
50V-5%
C9634
1 2
C9632
C9635
1 2
15pF
50V-5%
1 2
15pF
50V-5%
15pF
50V-5%
C9633
1 2
15pF
50V-5%
C9630
1 2
C9628
C9631
1 2
15pF
50V-5%
1 2
15pF
50V-5%
15pF
50V-5%
C9629
1 2
15pF
50V-5%
C9626
1 2
C9624
C9627
1 2
15pF
50V-5%
1 2
15pF
50V-5%
15pF
50V-5%
C9625
1 2
15pF
50V-5%
C9622
1 2
C9620
C9623
1 2
15pF
50V-5%
1 2
15pF
50V-5%
15pF
50V-5%
C9621
1 2
15pF
50V-5%
C9618
1 2
C9616
C9619
1 2
15pF
50V-5%
50V-5%
15pF
50V-5%
C9617
1 2
1 2
15pF
15pF
50V-5%
V_MEM_CPU1_DIMM_VREF
21
C8745
0.01uF
50V-10%
+MEM_CPU1
21
C8741
.1uF
16V-10%
20,21
16,21,22
16,20,22
16,20-22
16,20-22
16,20-22
16,20-22
16,20-22
16,20-22
16,20-22
16,20-22
16,20-22
16,20-22
16,20-22
16,20-22
16,20-22
16,20-22
16,20-22
16,20-22
16,21,22
16,20,22
16,20-22
16,20-22
16,21,22
16,20,22
16,20,22
16,20-22
16,21,22
15,20-22
16,21,22
16,20,22
15,20,22
15,21,22
15,21,22
15,20,22
15,21,22
15,20,22
20-22
16,20-22
16,20-22
16,20-22
CPU1_MEM_MB_CKE1
CPU1_MEM_MB_CKE0
CPU1_MEM_MB_ADD15
CPU1_MEM_MB_ADD14
CPU1_MEM_MB_ADD7
CPU1_MEM_MB_ADD8
CPU1_MEM_MB_ADD6
CPU1_MEM_MB_ADD5
CPU1_MEM_MB_ADD4
CPU1_MEM_MB_ADD3
CPU1_MEM_MB_ADD1
CPU1_MEM_MB_ADD2
CPU1_MEM_MB_ADD0
CPU1_MEM_MB_PAR
CPU1_MEM_MB_BANK1
CPU1_MEM_MB_ADD10
CPU1_MEM_MB_BANK0
CPU1_MEM_MB_RAS_N
CPU1_MEM_MB1_CS_L0
CPU1_MEM_MB0_CS_L0
CPU1_MEM_MB_WE_N
CPU1_MEM_MB_CAS_N
CPU1_MEM_MB1_ODT0
CPU1_MEM_MB0_ODT0
CPU1_MEM_MB0_CS_L1
CPU1_MEM_MB_ADD13
CPU1_MEM_MB1_CS_L1
CPU1_MEM_MA_ADD13
CPU1_MEM_MB3_ODT0
CPU1_MEM_MB2_ODT0
CPU1_MEM_MA2_ODT0
CPU1_MEM_MA3_ODT0
CPU1_MEM_MA3_CS_L0
CPU1_MEM_MA2_CS_L1
CPU1_MEM_MA3_CS_L1
CPU1_MEM_MA2_CS_L0
CPU1_MEM_MB_ERR_N
CPU1_MEM_MB_ADD12
CPU1_MEM_MB_ADD9
CPU1_MEM_MB_ADD11
+VTT_CPU1
RN138
1
2
3
4
47-5%
8
7
6
5
15,21,22
15,20,22
15,20-22
15,20-22
CPU1_MEM_MA_CKE1
CPU1_MEM_MA_CKE0
CPU1_MEM_MA_ADD15
CPU1_MEM_MA_ADD14
RN155
1
2
3
4
47-5%
+VTT_CPU1
8
7
6
5
1
RN139
1
2
3
4
47-5%
8
7
6
5
15,20-22
15,20-22
15,20-22
15,20-22
CPU1_MEM_MA_ADD7
CPU1_MEM_MA_ADD8
CPU1_MEM_MA_ADD6
CPU1_MEM_MA_ADD5
RN141
1
2
3
4
47-5%
8
7
6
5
15,20-22
15,20-22
15,20-22
15,20-22
CPU1_MEM_MA_ADD4
CPU1_MEM_MA_ADD3
CPU1_MEM_MA_ADD1
CPU1_MEM_MA_ADD2
RN140
1
2
3
4
47-5%
8
7
6
5
15,20-22
15,20-22
15,20-22
15,20-22
CPU1_MEM_MA_ADD0
CPU1_MEM_MA_PAR
CPU1_MEM_MA_BANK1
CPU1_MEM_MA_ADD10
RN143
1
2
3
4
47-5%
8
7
6
5
15,20-22
15,20-22
15,21,22
15,20,22
CPU1_MEM_MA_BANK0
CPU1_MEM_MA_RAS_N
CPU1_MEM_MA1_CS_L0
CPU1_MEM_MA0_CS_L0
RN142
1
2
3
4
47-5%
8
7
6
5
15,20-22
15,20,22
15,20-22
15,21,22
15,21,22
CPU1_MEM_MA_WE_N
CPU1_MEM_MA0_ODT0
CPU1_MEM_MA_CAS_N
CPU1_MEM_MA1_ODT0
CPU1_MEM_MA1_CS_L1
RN147
1
2
3
4
47-5%
RN146
1
2
3
4
47-5%
8
7
15,20,22
CPU1_MEM_MA0_CS_L1
6
5
16,20,22
16,20,22
16,21,22
8
16,21,22
CPU1_MEM_MB2_CS_L0
CPU1_MEM_MB2_CS_L1
CPU1_MEM_MB3_CS_L0
CPU1_MEM_MB3_CS_L1
7
6
5
15,20-22
16,20-22
CPU1_MEM_MA_BANK2
CPU1_MEM_MB_BANK2
RN145
1
2
3
4
47-5%
8
7
6
5
+MEM_CPU1
20-22
15,20-22
15,20-22
15,20-22
CPU1_MEM_MA_ERR_N
CPU1_MEM_MA_ADD12
CPU1_MEM_MA_ADD9
CPU1_MEM_MA_ADD11
RN144
1
2
3
4
47-5%
8
7
6
5
R8586
CPU1_MEM_MA_ERR_R_N
15
1 2
CPU1_MEM_MA_ERR_N
22-5%
R8587
CPU1_MEM_MB_ERR_R_N
16
1 2
CPU1_MEM_MB_ERR_N
22-5%
RN154
1
2
3
4
47-5%
RN153
1
2
3
4
47-5%
RN152
1
2
3
4
47-5%
RN151
1
2
3
4
47-5%
RN150
1
2
3
4
47-5%
R8727
1 2
47-5%
R8726
1 2
47-5%
RN149
1
2
3
4
47-5%
R8724
1 2
47-5%
R8725
1 2
47-5%
1
2
3
4
RN148
47-5%
8
7
6
5
8
7
6
5
8
7
6
5
8
7
6
5
2
8
7
6
5
8
7
6
5
+MEM_CPU1
8
7
6
5
20-22
20-22
3
4
16,20,22
16,20-22
16,20-22
16,21,22
CPU1_MEM_MB0_CS_L0
CPU1_MEM_MB_WE_N
CPU1_MEM_MB_CAS_N
CPU1_MEM_MB1_ODT0
R9632
1 2
R9633
1 2
10-1%
1 2
10-1%
R9630
R9631
1 2
10-1%
10-1%
C9688
1 2
C9686
1 2
15pF
50V-5%
15pF
50V-5%
C9689
1 2
C9687
1 2
15pF
50V-5%
15pF
50V-5%
CPU1 DIMMS TERMINATION
ROOM = CPU1DIMM
PROPRIETARY NOTE
THIS ITEM IS THE PROPERTY OF DELL INC. ROUND ROCK, TEXAS
AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS
ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL INC.,
EXCEPT AS AUTHORIZED BY DELL INC., AND THEN ONLY BY WAY OF
LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE
OR IN PART AND MUST BE RETURNED TO DELL INC. UPON REQUEST
AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF
THE LOAN. NEITHER THIS ITEM NOR THE INFORMATION IT CONTAINS MAY
BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH
USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT
THE PRIOR WRITTEN CONSENT OF DELL INC.
C
X00_DT10369 SCH name fix
TITLE
DWG NO.
DATE
MODULE:
DESC:
REV: OF
INC.
ROUND ROCK,TEXAS
SCHEM, PLN, SV, PE2970
FP975
SHEET
10/2/2008
DBA
MEM
SEC
4
REV.
A05
22 OF 120
A B C
D
1
HT_CK_C1L0_C2L0_1_DP
13
HT_CK_C1L0_C2L0_1_DN
13
HT_CK_C1L0_C2L0_0_DP
13
HT_CK_C1L0_C2L0_0_DN
13
HT_CT_C1L0_C2L0_1_DP
13
HT_CT_C1L0_C2L0_1_DN
13
HT_CT_C1L0_C2L0_0_DP
13
HT_CT_C1L0_C2L0_0_DN
13
J_CPU2
M6 AC5
L0_CLKIN_H_1 L0_CLKOUT_H_1
N6
L0_CLKIN_L_1
M3 AC1
L0_CLKIN_H_0 L0_CLKOUT_H_0
M2
L0_CLKIN_L_0
U4
L0_CTLIN_H_1
U5
L0_CTLIN_L_1
T1
L0_CTLIN_H_0
U1
L0_CTLIN_L_0
L0_CLKOUT_L_1
L0_CLKOUT_L_0
L0_CTLOUT_H_1
L0_CTLOUT_L_1
L0_CTLOUT_H_0
L0_CTLOUT_L_0
AC4
AB1
W6
V6
V2
V3
HT_CK_C2L0_C1L0_1_DP
HT_CK_C2L0_C1L0_1_DN
HT_CK_C2L0_C1L0_0_DP
HT_CK_C2L0_C1L0_0_DN
HT_CT_C2L0_C1L0_1_DP
HT_CT_C2L0_C1L0_1_DN
HT_CT_C2L0_C1L0_0_DP
HT_CT_C2L0_C1L0_0_DN
13
13
13
13
13
13
13
13
HT_CK_C1L2_C2L1_1_DP
13
HT_CK_C1L2_C2L1_1_DN
13
HT_CK_C1L2_C2L1_0_DP
13
HT_CK_C1L2_C2L1_0_DN
13
HT_CT_C1L2_C2L1_1_DP
13
HT_CT_C1L2_C2L1_1_DN
13
HT_CT_C1L2_C2L1_0_DP
13
HT_CT_C1L2_C2L1_0_DN
13
E18
L1_CLKIN_H_1
E17
L1_CLKIN_L_1
C18
L1_CLKIN_H_0
B18
L1_CLKIN_L_0
C13
L1_CTLIN_H_1
D13
L1_CTLIN_L_1
A14
L1_CTLIN_H_0
A13
L1_CTLIN_L_0
J_CPU2
L1_CLKOUT_H_1
L1_CLKOUT_L_1
L1_CLKOUT_H_0
L1_CLKOUT_L_0
L1_CTLOUT_H_1
L1_CTLOUT_L_1
L1_CTLOUT_H_0
L1_CTLOUT_L_0
E6
D6
B6
B7
F10
F11
C11
D11
HT_CK_C2L1_C1L2_1_DP
HT_CK_C2L1_C1L2_1_DN
HT_CK_C2L1_C1L2_0_DP
HT_CK_C2L1_C1L2_0_DN
HT_CT_C2L1_C1L2_1_DP
HT_CT_C2L1_C1L2_1_DN
HT_CT_C2L1_C1L2_0_DP
HT_CT_C2L1_C1L2_0_DN
1
13
13
13
13
13
13
13
13
2
3
HT_AD_C1L0_C2L0_15_DP
13
HT_AD_C1L0_C2L0_15_DN
13
HT_AD_C1L0_C2L0_14_DP
13
HT_AD_C1L0_C2L0_14_DN
13
HT_AD_C1L0_C2L0_13_DP
13
HT_AD_C1L0_C2L0_13_DN
13
HT_AD_C1L0_C2L0_12_DP
13
HT_AD_C1L0_C2L0_12_DN
13
HT_AD_C1L0_C2L0_11_DP
13
HT_AD_C1L0_C2L0_11_DN
13
HT_AD_C1L0_C2L0_10_DP
13
HT_AD_C1L0_C2L0_10_DN
13
HT_AD_C1L0_C2L0_9_DP
13
HT_AD_C1L0_C2L0_9_DN
13
HT_AD_C1L0_C2L0_8_DP
13
HT_AD_C1L0_C2L0_8_DN
13
HT_AD_C1L0_C2L0_7_DP
13
HT_AD_C1L0_C2L0_7_DN
13
HT_AD_C1L0_C2L0_6_DP
13
HT_AD_C1L0_C2L0_6_DN
13
HT_AD_C1L0_C2L0_5_DP
13
HT_AD_C1L0_C2L0_5_DN
13
HT_AD_C1L0_C2L0_4_DP
13
HT_AD_C1L0_C2L0_4_DN
13
HT_AD_C1L0_C2L0_3_DP
13
HT_AD_C1L0_C2L0_3_DN
13
HT_AD_C1L0_C2L0_2_DP
13
HT_AD_C1L0_C2L0_2_DN
13
HT_AD_C1L0_C2L0_1_DP
13
HT_AD_C1L0_C2L0_1_DN
13
HT_AD_C1L0_C2L0_0_DP
13
HT_AD_C1L0_C2L0_0_DN
13
T6
L0_CADIN_H_15
U6
L0_CADIN_L_15
R4
L0_CADIN_H_14
R5
L0_CADIN_L_14
P6
L0_CADIN_H_13
R6
L0_CADIN_L_13
N4
L0_CADIN_H_12
N5
L0_CADIN_L_12
L4
L0_CADIN_H_11
L5
L0_CADIN_L_11
K6
L0_CADIN_H_10
L6
L0_CADIN_L_10
J4
L0_CADIN_H_9
J5
L0_CADIN_L_9
H6
L0_CADIN_H_8
J6
L0_CADIN_L_8
T3
L0_CADIN_H_7
P1
L0_CADIN_L_7
T2
L0_CADIN_H_6
R1
L0_CADIN_L_6
P3
L0_CADIN_H_5
P2
L0_CADIN_L_5
M1
L0_CADIN_H_4
N1
L0_CADIN_L_4
K1
L0_CADIN_H_3
L1
L0_CADIN_L_3
K3
L0_CADIN_H_2
K2
L0_CADIN_L_2
H1
L0_CADIN_H_1
J1
L0_CADIN_L_1
H3
L0_CADIN_H_0
H2
L0_CADIN_L_0
L0_CADOUT_H_15
L0_CADOUT_L_15
L0_CADOUT_H_14
L0_CADOUT_L_14
L0_CADOUT_H_13
L0_CADOUT_L_13
L0_CADOUT_H_12
L0_CADOUT_L_12
L0_CADOUT_H_11
L0_CADOUT_L_11
L0_CADOUT_H_10
L0_CADOUT_L_10
L0_CADOUT_H_9
L0_CADOUT_L_9
L0_CADOUT_H_8
L0_CADOUT_L_8
L0_CADOUT_H_7
L0_CADOUT_L_7
L0_CADOUT_H_6
L0_CADOUT_L_6
L0_CADOUT_H_5
L0_CADOUT_L_5
L0_CADOUT_H_4
L0_CADOUT_L_4
L0_CADOUT_H_3
L0_CADOUT_L_3
L0_CADOUT_H_2
L0_CADOUT_L_2
L0_CADOUT_H_1
L0_CADOUT_L_1
L0_CADOUT_H_0
L0_CADOUT_L_0
W5
W4
AA6
Y6
AA5
AA4
AC6
AB6
AE6
AD6
AE5
AE4
AG6
AF6
AG5
AG4
W1
V1
Y2
Y3
AA1
Y1
AB2
AB3
AD2
AD3
AE1
AD1
AF2
AF3
AG1
AF1
HT_AD_C2L0_C1L0_15_DP
HT_AD_C2L0_C1L0_15_DN
HT_AD_C2L0_C1L0_14_DP
HT_AD_C2L0_C1L0_14_DN
HT_AD_C2L0_C1L0_13_DP
HT_AD_C2L0_C1L0_13_DN
HT_AD_C2L0_C1L0_12_DP
HT_AD_C2L0_C1L0_12_DN
HT_AD_C2L0_C1L0_11_DP
HT_AD_C2L0_C1L0_11_DN
HT_AD_C2L0_C1L0_10_DP
HT_AD_C2L0_C1L0_10_DN
HT_AD_C2L0_C1L0_9_DP
HT_AD_C2L0_C1L0_9_DN
HT_AD_C2L0_C1L0_8_DP
HT_AD_C2L0_C1L0_8_DN
HT_AD_C2L0_C1L0_7_DP
HT_AD_C2L0_C1L0_7_DN
HT_AD_C2L0_C1L0_6_DP
HT_AD_C2L0_C1L0_6_DN
HT_AD_C2L0_C1L0_5_DP
HT_AD_C2L0_C1L0_5_DN
HT_AD_C2L0_C1L0_4_DP
HT_AD_C2L0_C1L0_4_DN
HT_AD_C2L0_C1L0_3_DP
HT_AD_C2L0_C1L0_3_DN
HT_AD_C2L0_C1L0_2_DP
HT_AD_C2L0_C1L0_2_DN
HT_AD_C2L0_C1L0_1_DP
HT_AD_C2L0_C1L0_1_DN
HT_AD_C2L0_C1L0_0_DP
HT_AD_C2L0_C1L0_0_DN
13
13
13
13
13
13
13
13
13
13
13
13
13
13
13
13
13
13
13
13
13
13
13
13
13
13
13
13
13
13
13
13
HT_AD_C1L2_C2L1_15_DP
13
HT_AD_C1L2_C2L1_15_DN
13
HT_AD_C1L2_C2L1_14_DP
13
HT_AD_C1L2_C2L1_14_DN
13
HT_AD_C1L2_C2L1_13_DP
13
HT_AD_C1L2_C2L1_13_DN
13
HT_AD_C1L2_C2L1_12_DP
13
HT_AD_C1L2_C2L1_12_DN
13
HT_AD_C1L2_C2L1_11_DP
13
HT_AD_C1L2_C2L1_11_DN
13
HT_AD_C1L2_C2L1_10_DP
13
HT_AD_C1L2_C2L1_10_DN
13
HT_AD_C1L2_C2L1_9_DP
13
HT_AD_C1L2_C2L1_9_DN
13
HT_AD_C1L2_C2L1_8_DP
13
HT_AD_C1L2_C2L1_8_DN
13
HT_AD_C1L2_C2L1_7_DP
13
HT_AD_C1L2_C2L1_7_DN
13
HT_AD_C1L2_C2L1_6_DP
13
HT_AD_C1L2_C2L1_6_DN
13
HT_AD_C1L2_C2L1_5_DP
13
HT_AD_C1L2_C2L1_5_DN
13
HT_AD_C1L2_C2L1_4_DP
13
HT_AD_C1L2_C2L1_4_DN
13
HT_AD_C1L2_C2L1_3_DP
13
HT_AD_C1L2_C2L1_3_DN
13
HT_AD_C1L2_C2L1_2_DP
13
HT_AD_C1L2_C2L1_2_DN
13
HT_AD_C1L2_C2L1_1_DP
13
HT_AD_C1L2_C2L1_1_DN
13
HT_AD_C1L2_C2L1_0_DP
13
HT_AD_C1L2_C2L1_0_DN
13
E14
L1_CADIN_H_15
E13
L1_CADIN_L_15
C15
L1_CADIN_H_14
D15
L1_CADIN_L_14
E16
L1_CADIN_H_13
E15
L1_CADIN_L_13
C17
L1_CADIN_H_12
D17
L1_CADIN_L_12
C19
L1_CADIN_H_11
D19
L1_CADIN_L_11
E20
L1_CADIN_H_10
E19
L1_CADIN_L_10
C21
L1_CADIN_H_9
D21
L1_CADIN_L_9
E22
L1_CADIN_H_8
E21
L1_CADIN_L_8
C14
L1_CADIN_H_7
B14
L1_CADIN_L_7
A16
L1_CADIN_H_6
A15
L1_CADIN_L_6
C16
L1_CADIN_H_5
B16
L1_CADIN_L_5
A18
L1_CADIN_H_4
A17
L1_CADIN_L_4
A20
L1_CADIN_H_3
A19
L1_CADIN_L_3
C20
L1_CADIN_H_2
B20
L1_CADIN_L_2
A22
L1_CADIN_H_1
A21
L1_CADIN_L_1
C22
L1_CADIN_H_0
B22
L1_CADIN_L_0
L1_CADOUT_H_15
L1_CADOUT_L_15
L1_CADOUT_H_14
L1_CADOUT_L_14
L1_CADOUT_H_13
L1_CADOUT_L_13
L1_CADOUT_H_12
L1_CADOUT_L_12
L1_CADOUT_H_11
L1_CADOUT_L_11
L1_CADOUT_H_10
L1_CADOUT_L_10
L1_CADOUT_H_9
L1_CADOUT_L_9
L1_CADOUT_H_8
L1_CADOUT_L_8
L1_CADOUT_H_7
L1_CADOUT_L_7
L1_CADOUT_H_6
L1_CADOUT_L_6
L1_CADOUT_H_5
L1_CADOUT_L_5
L1_CADOUT_H_4
L1_CADOUT_L_4
L1_CADOUT_H_3
L1_CADOUT_L_3
L1_CADOUT_H_2
L1_CADOUT_L_2
L1_CADOUT_H_1
L1_CADOUT_L_1
L1_CADOUT_H_0
L1_CADOUT_L_0
E10
D10
F8
F9
E8
D8
F6
F7
F4
F5
E4
D4
F2
F3
E2
D2
B10
B11
C9
D9
B8
B9
C7
D7
C5
D5
B4
B5
C3
D3
B2
B3
HT_AD_C2L1_C1L2_15_DP
HT_AD_C2L1_C1L2_15_DN
HT_AD_C2L1_C1L2_14_DP
HT_AD_C2L1_C1L2_14_DN
HT_AD_C2L1_C1L2_13_DP
HT_AD_C2L1_C1L2_13_DN
HT_AD_C2L1_C1L2_12_DP
HT_AD_C2L1_C1L2_12_DN
HT_AD_C2L1_C1L2_11_DP
HT_AD_C2L1_C1L2_11_DN
HT_AD_C2L1_C1L2_10_DP
HT_AD_C2L1_C1L2_10_DN
HT_AD_C2L1_C1L2_9_DP
HT_AD_C2L1_C1L2_9_DN
HT_AD_C2L1_C1L2_8_DP
HT_AD_C2L1_C1L2_8_DN
HT_AD_C2L1_C1L2_7_DP
HT_AD_C2L1_C1L2_7_DN
HT_AD_C2L1_C1L2_6_DP
HT_AD_C2L1_C1L2_6_DN
HT_AD_C2L1_C1L2_5_DP
HT_AD_C2L1_C1L2_5_DN
HT_AD_C2L1_C1L2_4_DP
HT_AD_C2L1_C1L2_4_DN
HT_AD_C2L1_C1L2_3_DP
HT_AD_C2L1_C1L2_3_DN
HT_AD_C2L1_C1L2_2_DP
HT_AD_C2L1_C1L2_2_DN
HT_AD_C2L1_C1L2_1_DP
HT_AD_C2L1_C1L2_1_DN
HT_AD_C2L1_C1L2_0_DP
HT_AD_C2L1_C1L2_0_DN
13
13
13
13
13
13
13
13
13
13
13
13
13
13
13
13
13
13
13
13
13
13
13
13
13
13
13
13
13
13
13
13
2
3
From CPU1 L0
AMC CPU F1207
HETERO 1 OF 11
To CPU1 L0 From CPU1 L2
CPU2 TO CPU1 HYPER TRANSPORT LINKS
AMC CPU F1207
HETERO 2 OF 11
To CPU1 L2
4
ROOM=CPU2
PROPRIETARY NOTE: THIS ITEM IS THE PROPERTY OF DELL INC. ROUND ROCK, TEXAS AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL INC. EXCEPT
AS AUTHORIZED BY DELL INC., AND THEN ONLY BY WAY OF LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE
OR IN PART AND MUST BE RETURNED TO DELL INC. UPON REQUEST AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF THE
LOAN. NEITHER THIS ITEM OR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH
USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT THE PRIOR WRITTEN CONSENT OF DELL INC.
TITLE
DWG NO.
DATE
INC.
ROUND ROCK,TEXAS
SCHEM, PLN, SV, PE2970
FP975
SHEET
10/2/2008
DCBA
4
REV.
A05
23 OF 120
A B C
D
1
NC_CPU2_AK7
NC_CPU2_AK8
NC_CPU2_AM7
NC_CPU2_AN7
NC_CPU2_AM12
NC_CPU2_AL12
NC_CPU2_AP11
NC_CPU2_AP12
AK7
AK8
AM7
AN7
AM12
AL12
AP11
AP12
L2_CLKIN_H_1
L2_CLKIN_L_1
L2_CLKIN_H_0
L2_CLKIN_L_0
L2_CTLIN_H_1
L2_CTLIN_L_1
L2_CTLIN_H_0
L2_CTLIN_L_0
J_CPU2
L2_CLKOUT_H_1
L2_CLKOUT_L_1
L2_CLKOUT_H_0
L2_CLKOUT_L_0
L2_CTLOUT_H_1
L2_CTLOUT_L_1
L2_CTLOUT_H_0
L2_CTLOUT_L_0
AM18
AN18
AR18
AR17
AL14
AL13
AP13
AN13
1
NC_CPU2_AM18
NC_CPU2_AN18
NC_CPU2_AR18
NC_CPU2_AR17
NC_CPU2_AL14
NC_CPU2_AL13
NC_CPU2_AP13
NC_CPU2_AN13
2
3
NC_CPU2_AK11
NC_CPU2_AK12
NC_CPU2_AM10
NC_CPU2_AL10
NC_CPU2_AK9
NC_CPU2_AK10
NC_CPU2_AM8
NC_CPU2_AL8
NC_CPU2_AM6
NC_CPU2_AL6
NC_CPU2_AK5
NC_CPU2_AK6
NC_CPU2_AM4
NC_CPU2_AL4
NC_CPU2_AK3
NC_CPU2_AK4
NC_CPU2_AM11
NC_CPU2_AN11
NC_CPU2_AP9
NC_CPU2_AP10
NC_CPU2_AM9
NC_CPU2_AN9
NC_CPU2_AP7
NC_CPU2_AP8
NC_CPU2_AP5
NC_CPU2_AP6
NC_CPU2_AM5
NC_CPU2_AN5
NC_CPU2_AP3
NC_CPU2_AP4
NC_CPU2_AM3
NC_CPU2_AN3
AK11
AK12
AM10
AL10
AK9
AK10
AM8
AL8
AM6
AL6
AK5
AK6
AM4
AL4
AK3
AK4
AM11
AN11
AP9
AP10
AM9
AN9
AP7
AP8
AP5
AP6
AM5
AN5
AP3
AP4
AM3
AN3
L2_CADIN_H_15
L2_CADIN_L_15
L2_CADIN_H_14
L2_CADIN_L_14
L2_CADIN_H_13
L2_CADIN_L_13
L2_CADIN_H_12
L2_CADIN_L_12
L2_CADIN_H_11
L2_CADIN_L_11
L2_CADIN_H_10
L2_CADIN_L_10
L2_CADIN_H_9
L2_CADIN_L_9
L2_CADIN_H_8
L2_CADIN_L_8
L2_CADIN_H_7
L2_CADIN_L_7
L2_CADIN_H_6
L2_CADIN_L_6
L2_CADIN_H_5
L2_CADIN_L_5
L2_CADIN_H_4
L2_CADIN_L_4
L2_CADIN_H_3
L2_CADIN_L_3
L2_CADIN_H_2
L2_CADIN_L_2
L2_CADIN_H_1
L2_CADIN_L_1
L2_CADIN_H_0
L2_CADIN_L_0
AMC CPU F1207
HETERO 3 OF 11
L2_CADOUT_H_15
L2_CADOUT_L_15
L2_CADOUT_H_14
L2_CADOUT_L_14
L2_CADOUT_H_13
L2_CADOUT_L_13
L2_CADOUT_H_12
L2_CADOUT_L_12
L2_CADOUT_H_11
L2_CADOUT_L_11
L2_CADOUT_H_10
L2_CADOUT_L_10
L2_CADOUT_H_9
L2_CADOUT_L_9
L2_CADOUT_H_8
L2_CADOUT_L_8
L2_CADOUT_H_7
L2_CADOUT_L_7
L2_CADOUT_H_6
L2_CADOUT_L_6
L2_CADOUT_H_5
L2_CADOUT_L_5
L2_CADOUT_H_4
L2_CADOUT_L_4
L2_CADOUT_H_3
L2_CADOUT_L_3
L2_CADOUT_H_2
L2_CADOUT_L_2
L2_CADOUT_H_1
L2_CADOUT_L_1
L2_CADOUT_H_0
L2_CADOUT_L_0
AM14
AN14
AL16
AL15
AM16
AN16
AL18
AL17
AL20
AL19
AM20
AN20
AL22
AL21
AM22
AN22
AR14
AR13
AP15
AN15
AR16
AR15
AP17
AN17
AP19
AN19
AR20
AR19
AP21
AN21
AR22
AR21
NC_CPU2_AM14
NC_CPU2_AN14
NC_CPU2_AL16
NC_CPU2_AL15
NC_CPU2_AM16
NC_CPU2_AN16
NC_CPU2_AL18
NC_CPU2_AL17
NC_CPU2_AL20
NC_CPU2_AL19
NC_CPU2_AM20
NC_CPU2_AN20
NC_CPU2_AL22
NC_CPU2_AL21
NC_CPU2_AM22
NC_CPU2_AN22
NC_CPU2_AR14
NC_CPU2_AR13
NC_CPU2_AP15
NC_CPU2_AN15
NC_CPU2_AR16
NC_CPU2_AR15
NC_CPU2_AP17
NC_CPU2_AN17
NC_CPU2_AP19
NC_CPU2_AN19
NC_CPU2_AR20
NC_CPU2_AR19
NC_CPU2_AP21
NC_CPU2_AN21
NC_CPU2_AR22
NC_CPU2_AR21
2
3
4
ROOM = CPU2
CPU 2 NC HYPERTRANSPORT LINK
PROPRIETARY NOTE
THIS ITEM IS THE PROPERTY OF DELL INC. ROUND ROCK, TEXAS
AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS
ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL INC.,
EXCEPT AS AUTHORIZED BY DELL INC., AND THEN ONLY BY WAY OF
LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE
OR IN PART AND MUST BE RETURNED TO DELL INC. UPON REQUEST
AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF
THE LOAN. NEITHER THIS ITEM NOR THE INFORMATION IT CONTAINS MAY
BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH
USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT
THE PRIOR WRITTEN CONSENT OF DELL INC.
TITLE
DWG NO.
DATE
INC.
ROUND ROCK,TEXAS
SCHEM, PLN, SV, PE2970
FP975
SHEET
10/2/2008
4
REV.
A05
24 OF 120
C
DBA
1
2
3
4
A B C
J_CPU2
CK_CPU2_MEM_MA0_DP
30
CK_CPU2_MEM_MA0_DN
30
30,32
30,32
30,32
31,32
31,32
31,32
CPU2_MEM_MA0_CS_L1
CPU2_MEM_MA0_CS_L0
CPU2_MEM_MA0_ODT0
CK_CPU2_MEM_MA1_DP
31
CK_CPU2_MEM_MA1_DN
31
CPU2_MEM_MA1_CS_L1
CPU2_MEM_MA1_CS_L0
CPU2_MEM_MA1_ODT0
NC_CPU2_Y30
NC_CPU2_Y31
30,32
30,32
30,32
CPU2_MEM_MA2_CS_L1
CPU2_MEM_MA2_CS_L0
CPU2_MEM_MA2_ODT0
NC_CPU2_AA31
NC_CPU2_AA32
31,32
31,32
31,32
CPU2_MEM_MA3_CS_L1
CPU2_MEM_MA3_CS_L0
CPU2_MEM_MA3_ODT0
X00_DT10369 SCH name fix
CPU2_MEM_MA_ERR_R_N
32
30-32
30-32
30-32
30-32
30,31
30-32
30-32
30-32
31,32
30,32
30,31
30,31
30,31
30,31
30,31
30,31
30,31
30,31
30,31
30,31
30,31
30,31
30,31
30,31
30,31
30,31
30,31
30,31
30,31
30,31
30,31
30,31
30,31
30,31
30,31
30,31
30,31
30,31
30,31
30,31
30,31
30,31
30,31
30,31
30,31
30,31
CPU2_MEM_MA_PAR
CPU2_MEM_MA_CAS_N
CPU2_MEM_MA_RAS_N
CPU2_MEM_MA_WE_N
CPU2_MEM_MA_RESET_N
CPU2_MEM_MA_BANK2
CPU2_MEM_MA_BANK1
CPU2_MEM_MA_BANK0
CPU2_MEM_MA_CKE1
CPU2_MEM_MA_CKE0
CPU2_MEM_MA_DQS_17_DP
CPU2_MEM_MA_DQS_17_DN
CPU2_MEM_MA_DQS_16_DP
CPU2_MEM_MA_DQS_16_DN
CPU2_MEM_MA_DQS_15_DP
CPU2_MEM_MA_DQS_15_DN
CPU2_MEM_MA_DQS_14_DP
CPU2_MEM_MA_DQS_14_DN
CPU2_MEM_MA_DQS_13_DP
CPU2_MEM_MA_DQS_13_DN
CPU2_MEM_MA_DQS_12_DP
CPU2_MEM_MA_DQS_12_DN
CPU2_MEM_MA_DQS_11_DP
CPU2_MEM_MA_DQS_11_DN
CPU2_MEM_MA_DQS_10_DP
CPU2_MEM_MA_DQS_10_DN
CPU2_MEM_MA_DQS_9_DP
CPU2_MEM_MA_DQS_9_DN
CPU2_MEM_MA_DQS_8_DP
CPU2_MEM_MA_DQS_8_DN
CPU2_MEM_MA_DQS_7_DP
CPU2_MEM_MA_DQS_7_DN
CPU2_MEM_MA_DQS_6_DP
CPU2_MEM_MA_DQS_6_DN
CPU2_MEM_MA_DQS_5_DP
CPU2_MEM_MA_DQS_5_DN
CPU2_MEM_MA_DQS_4_DP
CPU2_MEM_MA_DQS_4_DN
CPU2_MEM_MA_DQS_3_DP
CPU2_MEM_MA_DQS_3_DN
CPU2_MEM_MA_DQS_2_DP
CPU2_MEM_MA_DQS_2_DN
CPU2_MEM_MA_DQS_1_DP
CPU2_MEM_MA_DQS_1_DN
CPU2_MEM_MA_DQS_0_DP
CPU2_MEM_MA_DQS_0_DN
AD31
AD32
AM34
AH33
AJ32
AE31
AF31
AM35
AH34
AK34
Y30
Y31
AC30
AB32
AB31
AA31
AA32
AD30
AB30
AC32
P30
AF32
AJ33
AH32
AJ31
D33
N32
AF33
AG32
M30
M31
T27
T26
AL26
AM26
AL31
AM31
AH29
AG29
AB27
AC27
J31
J32
L29
K29
D31
D32
F27
F26
U25
U26
AK25
AK26
AK30
AK31
AH28
AJ28
AD26
AD27
K33
J33
H29
G29
F31
E31
D27
D26
MA0_CLK_H
MA0_CLK_L
MA0_CS_L_1
MA0_CS_L_0
MA0_ODT_0
MA1_CLK_H
MA1_CLK_L
MA1_CS_L_1
MA1_CS_L_0
MA1_ODT_0
MA2_CLK_H
MA2_CLK_L
MA2_CS_L_1
MA2_CS_L_0
MA2_ODT_0
MA3_CLK_H
MA3_CLK_L
MA3_CS_L_1
MA3_CS_L_0
MA3_ODT_0
MA_ERR_L
MA_PAR
MA_CAS_L
MA_RAS_L
MA_WE_L
MA_RESET_L
MA_BANK_2
MA_BANK_1
MA_BANK_0
MA_CKE_1
MA_CKE_0
MA_DQS_H_17
MA_DQS_L_17
MA_DQS_H_16
MA_DQS_L_16
MA_DQS_H_15
MA_DQS_L_15
MA_DQS_H_14
MA_DQS_L_14
MA_DQS_H_13
MA_DQS_L_13
MA_DQS_H_12
MA_DQS_L_12
MA_DQS_H_11
MA_DQS_L_11
MA_DQS_H_10
MA_DQS_L_10
MA_DQS_H_9
MA_DQS_L_9
MA_DQS_H_8
MA_DQS_L_8
MA_DQS_H_7
MA_DQS_L_7
MA_DQS_H_6
MA_DQS_L_6
MA_DQS_H_5
MA_DQS_L_5
MA_DQS_H_4
MA_DQS_L_4
MA_DQS_H_3
MA_DQS_L_3
MA_DQS_H_2
MA_DQS_L_2
MA_DQS_H_1
MA_DQS_L_1
MA_DQS_H_0
MA_DQS_L_0
MA_DATA_63
MA_DATA_62
MA_DATA_61
MA_DATA_60
MA_DATA_59
MA_DATA_58
MA_DATA_57
MA_DATA_56
MA_DATA_55
MA_DATA_54
MA_DATA_53
MA_DATA_52
MA_DATA_51
MA_DATA_50
MA_DATA_49
MA_DATA_48
MA_DATA_47
MA_DATA_46
MA_DATA_45
MA_DATA_44
MA_DATA_43
MA_DATA_42
MA_DATA_41
MA_DATA_40
MA_DATA_39
MA_DATA_38
MA_DATA_37
MA_DATA_36
MA_DATA_35
MA_DATA_34
MA_DATA_33
MA_DATA_32
MA_DATA_31
MA_DATA_30
MA_DATA_29
MA_DATA_28
MA_DATA_27
MA_DATA_26
MA_DATA_25
MA_DATA_24
MA_DATA_23
MA_DATA_22
MA_DATA_21
MA_DATA_20
MA_DATA_19
MA_DATA_18
MA_DATA_17
MA_DATA_16
MA_DATA_15
MA_DATA_14
MA_DATA_13
MA_DATA_12
MA_DATA_11
MA_DATA_10
MA_DATA_9
MA_DATA_8
MA_DATA_7
MA_DATA_6
MA_DATA_5
MA_DATA_4
MA_DATA_3
MA_DATA_2
MA_DATA_1
MA_DATA_0
MA_ADD_0
MA_ADD_1
MA_ADD_2
MA_ADD_3
MA_ADD_4
MA_ADD_5
MA_ADD_6
MA_ADD_7
MA_ADD_8
MA_ADD_9
MA_ADD_10
MA_ADD_11
MA_ADD_12
MA_ADD_13
MA_ADD_14
MA_ADD_15
MA_CHECK_7
MA_CHECK_6
MA_CHECK_5
MA_CHECK_4
MA_CHECK_3
MA_CHECK_2
MA_CHECK_1
MA_CHECK_0
AMC CPU F1207
HETERO 4 OF 11
AM24
AM25
AL28
AK28
AK24
AL24
AM27
AL27
AK29
AM30
AL33
AK33
AM29
AL29
AM32
AL32
AF28
AF29
AG30
AE30
AE28
AE29
AH30
AJ30
AB25
AB26
AC29
AB29
AC25
AD25
AD28
AC28
L31
K31
G32
G31
L32
L33
H33
H32
H30
G30
K28
L28
K30
J30
H28
J28
E33
D35
F29
E29
F33
F32
E30
D30
F28
E26
B24
C24
E28
D28
E25
D25
AE33
V33
Y33
U31
U32
U30
T32
R31
T31
P32
AG31
R30
P31
AL34
N30
M32
V29
V27
R29
R28
V25
V28
R25
R26
CPU2_MEM_MA_DATA63
CPU2_MEM_MA_DATA62
CPU2_MEM_MA_DATA61
CPU2_MEM_MA_DATA60
CPU2_MEM_MA_DATA59
CPU2_MEM_MA_DATA58
CPU2_MEM_MA_DATA57
CPU2_MEM_MA_DATA56
CPU2_MEM_MA_DATA55
CPU2_MEM_MA_DATA54
CPU2_MEM_MA_DATA53
CPU2_MEM_MA_DATA52
CPU2_MEM_MA_DATA51
CPU2_MEM_MA_DATA50
CPU2_MEM_MA_DATA49
CPU2_MEM_MA_DATA48
CPU2_MEM_MA_DATA47
CPU2_MEM_MA_DATA46
CPU2_MEM_MA_DATA45
CPU2_MEM_MA_DATA44
CPU2_MEM_MA_DATA43
CPU2_MEM_MA_DATA42
CPU2_MEM_MA_DATA41
CPU2_MEM_MA_DATA40
CPU2_MEM_MA_DATA39
CPU2_MEM_MA_DATA38
CPU2_MEM_MA_DATA37
CPU2_MEM_MA_DATA36
CPU2_MEM_MA_DATA35
CPU2_MEM_MA_DATA34
CPU2_MEM_MA_DATA33
CPU2_MEM_MA_DATA32
CPU2_MEM_MA_DATA31
CPU2_MEM_MA_DATA30
CPU2_MEM_MA_DATA29
CPU2_MEM_MA_DATA28
CPU2_MEM_MA_DATA27
CPU2_MEM_MA_DATA26
CPU2_MEM_MA_DATA25
CPU2_MEM_MA_DATA24
CPU2_MEM_MA_DATA23
CPU2_MEM_MA_DATA22
CPU2_MEM_MA_DATA21
CPU2_MEM_MA_DATA20
CPU2_MEM_MA_DATA19
CPU2_MEM_MA_DATA18
CPU2_MEM_MA_DATA17
CPU2_MEM_MA_DATA16
CPU2_MEM_MA_DATA15
CPU2_MEM_MA_DATA14
CPU2_MEM_MA_DATA13
CPU2_MEM_MA_DATA12
CPU2_MEM_MA_DATA11
CPU2_MEM_MA_DATA10
CPU2_MEM_MA_DATA9
CPU2_MEM_MA_DATA8
CPU2_MEM_MA_DATA7
CPU2_MEM_MA_DATA6
CPU2_MEM_MA_DATA5
CPU2_MEM_MA_DATA4
CPU2_MEM_MA_DATA3
CPU2_MEM_MA_DATA2
CPU2_MEM_MA_DATA1
CPU2_MEM_MA_DATA0
CPU2_MEM_MA_ADD0
CPU2_MEM_MA_ADD1
CPU2_MEM_MA_ADD2
CPU2_MEM_MA_ADD3
CPU2_MEM_MA_ADD4
CPU2_MEM_MA_ADD5
CPU2_MEM_MA_ADD6
CPU2_MEM_MA_ADD7
CPU2_MEM_MA_ADD8
CPU2_MEM_MA_ADD9
CPU2_MEM_MA_ADD10
CPU2_MEM_MA_ADD11
CPU2_MEM_MA_ADD12
CPU2_MEM_MA_ADD13
CPU2_MEM_MA_ADD14
CPU2_MEM_MA_ADD15
CPU2_MEM_MA_CHECK7
CPU2_MEM_MA_CHECK6
CPU2_MEM_MA_CHECK5
CPU2_MEM_MA_CHECK4
CPU2_MEM_MA_CHECK3
CPU2_MEM_MA_CHECK2
CPU2_MEM_MA_CHECK1
CPU2_MEM_MA_CHECK0
30,31
30,31
30,31
30,31
30,31
30,31
30,31
30,31
30,31
30,31
30,31
30,31
30,31
30,31
30,31
30,31
30,31
30,31
30,31
30,31
30,31
30,31
30,31
30,31
30,31
30,31
30,31
30,31
30,31
30,31
30,31
30,31
30,31
30,31
30,31
30,31
30,31
30,31
30,31
30,31
30,31
30,31
30,31
30,31
30,31
30,31
30,31
30,31
30,31
30,31
30,31
30,31
30,31
30,31
30,31
30,31
30,31
30,31
30,31
30,31
30,31
30,31
30,31
30,31
30-32
30-32
30-32
30-32
30-32
30-32
30-32
30-32
30-32
30-32
30-32
30-32
30-32
30-32
30-32
30-32
30,31
30,31
30,31
30,31
30,31
30,31
30,31
30,31
D
1
2
3
4
INC.
ROUND ROCK,TEXAS
TITLE
CPU 2 - CHANNEL A MEMORY
ROOM=CPU2
PROPRIETARY NOTE: THIS ITEM IS THE PROPERTY OF DELL INC. ROUND ROCK, TEXAS AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL INC. EXCEPT
AS AUTHORIZED BY DELL INC., AND THEN ONLY BY WAY OF LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE
OR IN PART AND MUST BE RETURNED TO DELL INC. UPON REQUEST AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF THE
LOAN. NEITHER THIS ITEM OR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH
USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT THE PRIOR WRITTEN CONSENT OF DELL INC.
PROCESSOR 2
DWG NO.
DATE
SCHEM, PLN, SV, PE2970
FP975
SHEET
10/2/2008
DCBA
REV.
A05
25 OF 120
1
2
3
4
A B C
J_CPU2
CK_CPU2_MEM_MB0_DP
30
CK_CPU2_MEM_MB0_DN
30
30,32
30,32
30,32
31,32
31,32
31,32
CPU2_MEM_MB0_CS_L1
CPU2_MEM_MB0_CS_L0
CPU2_MEM_MB0_ODT0
CK_CPU2_MEM_MB1_DP
31
CK_CPU2_MEM_MB1_DN
31
CPU2_MEM_MB1_CS_L1
CPU2_MEM_MB1_CS_L0
CPU2_MEM_MB1_ODT0
NC_CPU2_U29
NC_CPU2_U28
30,32
30,32
30,32
CPU2_MEM_MB2_CS_L1
CPU2_MEM_MB2_CS_L0
CPU2_MEM_MB2_ODT0
NC_CPU2_T29
NC_CPU2_T28
31,32
31,32
31,32
CPU2_MEM_MB3_CS_L1
CPU2_MEM_MB3_CS_L0
CPU2_MEM_MB3_ODT0
X00_DT10369 SCH name fix
CPU2_MEM_MB_ERR_R_N
32
30-32
30-32
30-32
30-32
30,31
30-32
30-32
30-32
31,32
30,32
30,31
30,31
30,31
30,31
30,31
30,31
30,31
30,31
30,31
30,31
30,31
30,31
30,31
30,31
30,31
30,31
30,31
30,31
30,31
30,31
30,31
30,31
30,31
30,31
30,31
30,31
30,31
30,31
30,31
30,31
30,31
30,31
30,31
30,31
30,31
30,31
CPU2_MEM_MB_PAR
CPU2_MEM_MB_CAS_N
CPU2_MEM_MB_RAS_N
CPU2_MEM_MB_WE_N
CPU2_MEM_MB_RESET_N
CPU2_MEM_MB_BANK2
CPU2_MEM_MB_BANK1
CPU2_MEM_MB_BANK0
CPU2_MEM_MB_CKE1
CPU2_MEM_MB_CKE0
CPU2_MEM_MB_DQS_17_DP
CPU2_MEM_MB_DQS_17_DN
CPU2_MEM_MB_DQS_16_DP
CPU2_MEM_MB_DQS_16_DN
CPU2_MEM_MB_DQS_15_DP
CPU2_MEM_MB_DQS_15_DN
CPU2_MEM_MB_DQS_14_DP
CPU2_MEM_MB_DQS_14_DN
CPU2_MEM_MB_DQS_13_DP
CPU2_MEM_MB_DQS_13_DN
CPU2_MEM_MB_DQS_12_DP
CPU2_MEM_MB_DQS_12_DN
CPU2_MEM_MB_DQS_11_DP
CPU2_MEM_MB_DQS_11_DN
CPU2_MEM_MB_DQS_10_DP
CPU2_MEM_MB_DQS_10_DN
CPU2_MEM_MB_DQS_9_DP
CPU2_MEM_MB_DQS_9_DN
CPU2_MEM_MB_DQS_8_DP
CPU2_MEM_MB_DQS_8_DN
CPU2_MEM_MB_DQS_7_DP
CPU2_MEM_MB_DQS_7_DN
CPU2_MEM_MB_DQS_6_DP
CPU2_MEM_MB_DQS_6_DN
CPU2_MEM_MB_DQS_5_DP
CPU2_MEM_MB_DQS_5_DN
CPU2_MEM_MB_DQS_4_DP
CPU2_MEM_MB_DQS_4_DN
CPU2_MEM_MB_DQS_3_DP
CPU2_MEM_MB_DQS_3_DN
CPU2_MEM_MB_DQS_2_DP
CPU2_MEM_MB_DQS_2_DN
CPU2_MEM_MB_DQS_1_DP
CPU2_MEM_MB_DQS_1_DN
CPU2_MEM_MB_DQS_0_DP
CPU2_MEM_MB_DQS_0_DN
Y35
Y34
AJ35
AE35
AG34
AA34
AA33
AK35
AD35
AG35
U29
U28
W31
V32
W32
T29
T28
W30
V30
W33
P33
AB34
AF34
AD33
AE34
A33
N33
AC34
AC33
M34
M35
M29
N29
AN28
AN27
AN33
AN32
AG27
AH27
AA29
AA28
G34
G35
K26
J26
A31
A32
A26
A27
N27
N28
AP26
AP27
AP31
AP32
AJ26
AJ27
W26
W27
H35
H34
H27
G27
C32
B32
B27
C27
MB0_CLK_H
MB0_CLK_L
MB0_CS_L_1
MB0_CS_L_0
MB0_ODT_0
MB1_CLK_H
MB1_CLK_L
MB1_CS_L_1
MB1_CS_L_0
MB1_ODT_0
MB2_CLK_H
MB2_CLK_L
MB2_CS_L_1
MB2_CS_L_0
MB2_ODT_0
MB3_CLK_H
MB3_CLK_L
MB3_CS_L_1
MB3_CS_L_0
MB3_ODT_0
MB_ERR_L
MB_PAR
MB_CAS_L
MB_RAS_L
MB_WE_L
MB_RESET_L
MB_BANK_2
MB_BANK_1
MB_BANK_0
MB_CKE_1
MB_CKE_0
MB_DQS_H_17
MB_DQS_L_17
MB_DQS_H_16
MB_DQS_L_16
MB_DQS_H_15
MB_DQS_L_15
MB_DQS_H_14
MB_DQS_L_14
MB_DQS_H_13
MB_DQS_L_13
MB_DQS_H_12
MB_DQS_L_12
MB_DQS_H_11
MB_DQS_L_11
MB_DQS_H_10
MB_DQS_L_10
MB_DQS_H_9
MB_DQS_L_9
MB_DQS_H_8
MB_DQS_L_8
MB_DQS_H_7
MB_DQS_L_7
MB_DQS_H_6
MB_DQS_L_6
MB_DQS_H_5
MB_DQS_L_5
MB_DQS_H_4
MB_DQS_L_4
MB_DQS_H_3
MB_DQS_L_3
MB_DQS_H_2
MB_DQS_L_2
MB_DQS_H_1
MB_DQS_L_1
MB_DQS_H_0
MB_DQS_L_0
MB_DATA_63
MB_DATA_62
MB_DATA_61
MB_DATA_60
MB_DATA_59
MB_DATA_58
MB_DATA_57
MB_DATA_56
MB_DATA_55
MB_DATA_54
MB_DATA_53
MB_DATA_52
MB_DATA_51
MB_DATA_50
MB_DATA_49
MB_DATA_48
MB_DATA_47
MB_DATA_46
MB_DATA_45
MB_DATA_44
MB_DATA_43
MB_DATA_42
MB_DATA_41
MB_DATA_40
MB_DATA_39
MB_DATA_38
MB_DATA_37
MB_DATA_36
MB_DATA_35
MB_DATA_34
MB_DATA_33
MB_DATA_32
MB_DATA_31
MB_DATA_30
MB_DATA_29
MB_DATA_28
MB_DATA_27
MB_DATA_26
MB_DATA_25
MB_DATA_24
MB_DATA_23
MB_DATA_22
MB_DATA_21
MB_DATA_20
MB_DATA_19
MB_DATA_18
MB_DATA_17
MB_DATA_16
MB_DATA_15
MB_DATA_14
MB_DATA_13
MB_DATA_12
MB_DATA_11
MB_DATA_10
MB_DATA_9
MB_DATA_8
MB_DATA_7
MB_DATA_6
MB_DATA_5
MB_DATA_4
MB_DATA_3
MB_DATA_2
MB_DATA_1
MB_DATA_0
MB_ADD_0
MB_ADD_1
MB_ADD_2
MB_ADD_3
MB_ADD_4
MB_ADD_5
MB_ADD_6
MB_ADD_7
MB_ADD_8
MB_ADD_9
MB_ADD_10
MB_ADD_11
MB_ADD_12
MB_ADD_13
MB_ADD_14
MB_ADD_15
MB_CHECK_7
MB_CHECK_6
MB_CHECK_5
MB_CHECK_4
MB_CHECK_3
MB_CHECK_2
MB_CHECK_1
MB_CHECK_0
AMC CPU F1207
HETERO 5 OF 11
AN25
AR26
AN29
AR29
AP25
AR25
AR28
AP28
AN30
AR31
AR34
AN34
AR30
AP30
AR33
AP33
AG25
AE25
AF26
AE26
AF24
AE24
AG26
AF27
Y26
AA27
W28
W25
Y25
AA26
Y28
Y29
K35
J35
E35
C35
L34
K34
F34
E34
L24
J27
K25
K24
L27
L26
G26
J25
B34
A34
C30
C29
C34
C33
B31
B30
C28
A28
B25
A24
A29
B29
B26
C25
AB35
V34
W35
V35
U34
U35
T33
R33
T34
R35
AC35
R34
P35
AH35
N35
N34
P27
P28
N25
M25
P25
P26
M26
M27
CPU2_MEM_MB_DATA63
CPU2_MEM_MB_DATA62
CPU2_MEM_MB_DATA61
CPU2_MEM_MB_DATA60
CPU2_MEM_MB_DATA59
CPU2_MEM_MB_DATA58
CPU2_MEM_MB_DATA57
CPU2_MEM_MB_DATA56
CPU2_MEM_MB_DATA55
CPU2_MEM_MB_DATA54
CPU2_MEM_MB_DATA53
CPU2_MEM_MB_DATA52
CPU2_MEM_MB_DATA51
CPU2_MEM_MB_DATA50
CPU2_MEM_MB_DATA49
CPU2_MEM_MB_DATA48
CPU2_MEM_MB_DATA47
CPU2_MEM_MB_DATA46
CPU2_MEM_MB_DATA45
CPU2_MEM_MB_DATA44
CPU2_MEM_MB_DATA43
CPU2_MEM_MB_DATA42
CPU2_MEM_MB_DATA41
CPU2_MEM_MB_DATA40
CPU2_MEM_MB_DATA39
CPU2_MEM_MB_DATA38
CPU2_MEM_MB_DATA37
CPU2_MEM_MB_DATA36
CPU2_MEM_MB_DATA35
CPU2_MEM_MB_DATA34
CPU2_MEM_MB_DATA33
CPU2_MEM_MB_DATA32
CPU2_MEM_MB_DATA31
CPU2_MEM_MB_DATA30
CPU2_MEM_MB_DATA29
CPU2_MEM_MB_DATA28
CPU2_MEM_MB_DATA27
CPU2_MEM_MB_DATA26
CPU2_MEM_MB_DATA25
CPU2_MEM_MB_DATA24
CPU2_MEM_MB_DATA23
CPU2_MEM_MB_DATA22
CPU2_MEM_MB_DATA21
CPU2_MEM_MB_DATA20
CPU2_MEM_MB_DATA19
CPU2_MEM_MB_DATA18
CPU2_MEM_MB_DATA17
CPU2_MEM_MB_DATA16
CPU2_MEM_MB_DATA15
CPU2_MEM_MB_DATA14
CPU2_MEM_MB_DATA13
CPU2_MEM_MB_DATA12
CPU2_MEM_MB_DATA11
CPU2_MEM_MB_DATA10
CPU2_MEM_MB_DATA9
CPU2_MEM_MB_DATA8
CPU2_MEM_MB_DATA7
CPU2_MEM_MB_DATA6
CPU2_MEM_MB_DATA5
CPU2_MEM_MB_DATA4
CPU2_MEM_MB_DATA3
CPU2_MEM_MB_DATA2
CPU2_MEM_MB_DATA1
CPU2_MEM_MB_DATA0
CPU2_MEM_MB_ADD0
CPU2_MEM_MB_ADD1
CPU2_MEM_MB_ADD2
CPU2_MEM_MB_ADD3
CPU2_MEM_MB_ADD4
CPU2_MEM_MB_ADD5
CPU2_MEM_MB_ADD6
CPU2_MEM_MB_ADD7
CPU2_MEM_MB_ADD8
CPU2_MEM_MB_ADD9
CPU2_MEM_MB_ADD10
CPU2_MEM_MB_ADD11
CPU2_MEM_MB_ADD12
CPU2_MEM_MB_ADD13
CPU2_MEM_MB_ADD14
CPU2_MEM_MB_ADD15
CPU2_MEM_MB_CHECK7
CPU2_MEM_MB_CHECK6
CPU2_MEM_MB_CHECK5
CPU2_MEM_MB_CHECK4
CPU2_MEM_MB_CHECK3
CPU2_MEM_MB_CHECK2
CPU2_MEM_MB_CHECK1
CPU2_MEM_MB_CHECK0
30,31
30,31
30,31
30,31
30,31
30,31
30,31
30,31
30,31
30,31
30,31
30,31
30,31
30,31
30,31
30,31
30,31
30,31
30,31
30,31
30,31
30,31
30,31
30,31
30,31
30,31
30,31
30,31
30,31
30,31
30,31
30,31
30,31
30,31
30,31
30,31
30,31
30,31
30,31
30,31
30,31
30,31
30,31
30,31
30,31
30,31
30,31
30,31
30,31
30,31
30,31
30,31
30,31
30,31
30,31
30,31
30,31
30,31
30,31
30,31
30,31
30,31
30,31
30,31
30-32
30-32
30-32
30-32
30-32
30-32
30-32
30-32
30-32
30-32
30-32
30-32
30-32
30-32
30-32
30-32
30,31
30,31
30,31
30,31
30,31
30,31
30,31
30,31
D
1
2
3
4
INC.
ROUND ROCK,TEXAS
TITLE
CPU 2 - CHANNEL B MEMORY
ROOM=CPU2
PROPRIETARY NOTE: THIS ITEM IS THE PROPERTY OF DELL INC. ROUND ROCK, TEXAS AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL INC. EXCEPT
AS AUTHORIZED BY DELL INC., AND THEN ONLY BY WAY OF LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE
OR IN PART AND MUST BE RETURNED TO DELL INC. UPON REQUEST AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF THE
LOAN. NEITHER THIS ITEM OR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH
USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT THE PRIOR WRITTEN CONSENT OF DELL INC.
DWG NO.
DATE
SCHEM, PLN, SV, PE2970
FP975
SHEET
10/2/2008
DCBA
REV.
A05
26 OF 120
1
A B C
CK_200M_CPU2_C_DP
12
12
CK_200M_CPU2_C_DN
C9385
21
3900pF
50V-10%
C9386
21
3900pF
50V-10%
R9110
27,91
CK_200M_CPU2_DP
169-1%
1 2
SYSTEM_PWRGOOD_CPU2
27,91
27,91
33,49,88
CK_200M_CPU2_DN
RST_CPU2_N
CPU2_LDTSTOP_N
CPU2_PRES_N
+VDDA_CPU2
G2
VDDA1
G3
VDDA2
G4
VDDA3
K22
CLKIN_H
J22
CLKIN_L
F21
PWROK
F19
RESET_L
H25
LDTSTOP_L
AP1
CPU_PRESENT_L
J_CPU2
VID_5
VID_4
VID_3
VID_2
VID_1
VID_0
E24
G18
J19
H19
K19
H18
CPU2_VID5
CPU2_VID4
CPU2_VID3
CPU2_VID2
CPU2_VID1
CPU2_VID0
90,95
90,95
90,95
90,95
90,95
90,95
90,98
CPU2_CORE_TYPE
NC_CPU2_J18
NC_CPU2_G19
NC_CPU2_H11
NC_CPU2_J11
NC_CPU2_K11
J18
G19
AN1
H11
J11
K11
RSVD_J18
RSVD_G19
RSVD_AN1
RSVD_H11
RSVD_J11
RSVD_K11
J_CPU2
AMC CPU F1207
HETERO 7 OF 11
RSVD_H10
RSVD_H9
RSVD_AJ18
RSVD_AH18
RSVD_AG18
H10
H9
AJ18
AH18
AG18
D
CPU2_NB_COREFB_POS
CPU2_NB_COREFB_NEG
NC_CPU2_AJ18
NC_CPU2_AH18
NC_CPU2_AG18
98
98
1
2
95
95
17,33
CPU2_COREFB_POS
CPU2_COREFB_NEG
CPU1_TDO
102
1 2
CPU2_DDRVTT_SENSE
27,117
+MEM_CPU2
R9930
0-5%
27
27
27
27
27
27
33
33
33
33
R9114
1 2
0-5%
CPU2_M_ZN
CPU2_M_ZP
CPU2_PLLTEST_1
CPU2_PLLTEST_0
NC_MOD_CPU2_TEST_2
NC_MOD_CPU2_TEST_3
MOD_CPU2_SIC
MOD_CPU2_SID
CPU2_TDI
CPU2_TRST_N
CPU2_TCK
CPU2_TMS
CPU2_DBREQ_N
R9115
1 2
V_MEM_CPU2_VREF
0-5%
R9186
NP
1 2
300-5%
X
AG19
AF19
AJ22
AG22
AF22
AJ21
F24
J9
J10
AF17
F18
AJ25
AH25
AF20
F23
F20
AG8
AG9
SIC
SID
TDI
TRST_L
TCK
TMS
DBREQ_L
VDD_FB_H
VDD_FB_L
VTT_SENSE
M_VREF
M_ZN
M_ZP
TEST23
TEST18
TEST19
TEST2
TEST3
THERMTRIP_L
PROCHOT_L
TDO
DBRDY
VDDIO_FB_H
VDDIO_FB_L
HTREF1
HTREF0
THERMDA
THERMDC
TEST13
TEST28_H
TEST28_L
AH19
AJ19
AH22
J24
AG17
AH17
V7
U7
AF8
AF9
AH8
L8
M9
CPU2_THERMTRIP_N
CPU2_PROCHOT_N
CPU2_TDO
CPU2_DBRDY
V_MEM_CPU2_SENSE_POS
V_MEM_CPU2_SENSE_NEG
MOD_CPU2_L0_REF_1
MOD_CPU2_L0_REF_0
MOD_CPU2_THERMDA
MOD_CPU2_THERMDC
NC_CPU2_TEST_28_DP
NC_CPU2_TEST_28_DN
27,88
27,88
33
33
104
104
80
80
R9235
1 2
44.2-1%
C9354
1 2
1000pF
R9236
1 2
44.2-1%
C9355
1 2
50V-10%
+1.2V_VLDT
1000pF
50V-10%
2
+MEM_CPU2
R9189
1 2
NP
R9190
X
300-5%
1 2
NP
R9191
X
300-5%
1 2
NP
R9192
X
300-5%
1 2
NP
R9193
X
300-5%
1 2
R9223
1 2
R9222
510-5%
MOD_CPU2_SCANEN
MOD_CPU2_SCANCK2
MOD_CPU2_SCANCK1
MOD_CPU2_SCANSHIFTENA
MOD_CPU2_SCANSHIFTENB
R9187
1 2
300-5%
300-5%
NC_MOD_CPU2_TEST_6
1 2
510-5%
R9188
NP
1 2
300-5%
X
G21
H21
AJ20
AH20
AG20
AG21
AF21
AH21
AF18
U8
AH9
TEST25_H
TEST25_L
TEST21
TEST20
TEST24
TEST22
TEST12
TEST27
TEST26
TEST9
TEST6
AMC CPU F1207
HETERO 6 OF 11
TEST17
TEST16
TEST15
TEST14
TEST7
TEST10
TEST8
TEST29_H
TEST29_L
J20
G20
K20
H20
J8
V8
H8
G23
G24
TP_MOD_CPU2_TEST_17
TP_MOD_CPU2_TEST_16
TP_MOD_CPU2_TEST_15
TP_MOD_CPU2_TEST_14
NC_MOD_CPU2_TEST_7
NC_MOD_CPU2_TEST_10
NC_MOD_CPU2_TEST_8
R9155
1 2
80.6-1%
+MEM_CPU2
3
4
ROOM = CPU2
+MEM_CPU2
R9439
1 2
300-5%
R9438
1 2
300-5%
R9437
1 2
300-5%
R9436
1 2
300-5%
R9440
NP
1 2
300-5%
R9441
NP
1 2
300-5%
R9442
NP
1 2
300-5%
CPU2_THERMTRIP_N
CPU2_PROCHOT_N
MOD_CPU2_SIC
MOD_CPU2_SID
SYSTEM_PWRGOOD_CPU2
X
RST_CPU2_N
X
CPU2_LDTSTOP_N
X
X00_DT9809 SCH depop'd R
27,88
27,88
27
27
27,91
27,91
27,91
R9435
1 2
300-5%
R9434
1 2
300-5%
CPU2 MISC
CPU2_PLLTEST_1
CPU2_PLLTEST_0
+MEM_CPU2
1 2
39.2-1%
1 2
39.2-1%
X00_DT9808 SCH added caps
R9217
R9218
C9768
1 2
C9769
1000pF
50V-10%
27
27
CPU2_M_ZN
CPU2_M_ZP
1 2
1000pF
50V-10%
27
27
R9432
1 2
R9806
1 2
R9433
1 2
0-5% 15-1%15-1%
R9813
1 2
10K-5%
C9540
1 2
V_MEM_CPU2_VREF_FEEDBACK
V_MEM_CPU2_VREF
21
1000pF
50V-10%
C9538
117
27,117
.1uF
16V-10%
This value calculated to be negative 14ohm.
Hence just keeping a place holder with 10kohm
This value calculated to be negative 16ohm. left as is
THIS ITEM IS THE PROPERTY OF DELL INC. ROUND ROCK, TEXAS
AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS
ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL INC.,
EXCEPT AS AUTHORIZED BY DELL INC., AND THEN ONLY BY WAY OF
LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE
OR IN PART AND MUST BE RETURNED TO DELL INC. UPON REQUEST
AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF
THE LOAN. NEITHER THIS ITEM NOR THE INFORMATION IT CONTAINS MAY
BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH
USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT
THE PRIOR WRITTEN CONSENT OF DELL INC.
PROPRIETARY NOTE
TITLE
DWG NO.
DATE
INC.
ROUND ROCK,TEXAS
SCHEM, PLN, SV, PE2970
FP975
SHEET
10/2/2008
3
4
REV.
A05
27 OF 120
C
DBA
1
A5
VSS_A5
J_CPU2
A B C
AJ23
AJ17
AJ15
AJ11
AJ9
AJ7
AJ5
AJ3
AJ1
AH26
AH24
AH16
AH14
AH12
AH10
AH6
AG28
AG23
AG15
AG13
AG11
AG7
AF30
AF25
AF16
AF14
AF12
AF10
AE27
AE23
AE21
AE19
AE17
AE15
AE13
AE11
AE9
AE7
AE3
AE2
AD29
AD24
AD22
AD20
AD18
AD16
AD14
AD12
AD10
AD8
AD5
AD4
AC26
AC23
AC21
AC19
AC17
AC15
AC13
AC11
AC9
AC7
AB28
AB24
AB22
AB20
AB18
AB16
AB14
AB12
AB10
AB8
AA25
AA23
AA21
AA19
AA17
AA15
AA13
AA11
AA9
AA7
AA3
AA2
A30
A25
A9
VSS_A9
VSS_A25
VSS_AA3
VSS_AA2
VSS_A30
VSS_AA9
VSS_AA7
VSS_AA11
VSS_AA17
VSS_AA15
VSS_AA13
VSS_AA23
VSS_AA21
VSS_AA19
VSS_AB8
VSS_AB10
VSS_AA25
VSS_AB16
VSS_AB14
VSS_AB12
VSS_AB22
VSS_AB20
VSS_AB18
VSS_AC7
VSS_AB28
VSS_AB24
VSS_AC9
VSS_AC13
VSS_AC11
VSS_AC19
VSS_AC17
VSS_AC15
VSS_AC26
VSS_AC23
VSS_AC21
VSS_AD8
VSS_AD5
VSS_AD4
VSS_AD14
VSS_AD12
VSS_AD10
VSS_AD20
VSS_AD18
VSS_AD16
VSS_AD29
VSS_AD24
VSS_AD22
VSS_AE7
VSS_AE3
VSS_AE2
VSS_AE9
VSS_AE13
VSS_AE11
VSS_AE19
VSS_AE17
VSS_AE15
VSS_AE27
VSS_AE23
VSS_AE21
VSS_AF14
VSS_AF12
VSS_AF10
VSS_AF30
VSS_AF25
VSS_AF16
VSS_AG7
VSS_AG13
VSS_AG11
VSS_AG28
VSS_AG23
VSS_AG15
VSS_AH6
VSS_AH12
VSS_AH10
VSS_AH24
VSS_AH16
VSS_AH14
VSS_AJ3
VSS_AJ1
VSS_AH26
VSS_AJ9
VSS_AJ7
VSS_AJ5
VSS_AJ17
VSS_AJ15
VSS_AJ11
VSS_AJ23
AK2
AJ29
AJ24
VSS_AK2
VSS_AJ29
VSS_AJ24
AK18
AK16
AK14
VSS_AK18
VSS_AK16
VSS_AK14
AK23
AK22
AK20
VSS_AK23
VSS_AK22
VSS_AK20
AL1
AK32
AK27
VSS_AL1
VSS_AK32
VSS_AK27
AL11
AL7
AL3
VSS_AL7
VSS_AL3
AM15
AL30
AL25
VSS_AL30
VSS_AL25
VSS_AL11
AM33
AM28
AM19
VSS_AM28
VSS_AM19
VSS_AM15
AN24
AN10
AN6
VSS_AN6
VSS_AN10
VSS_AM33
AN35
AN31
AN26
VSS_AN31
VSS_AN26
VSS_AN24
AP22
AP18
AP14
VSS_AP18
VSS_AP14
VSS_AN35
AP29
AP24
VSS_AP29
VSS_AP24
VSS_AP22
AMC CPU F1207
HETERO 8 OF 11
CPU socket screws
D
ADD=ADD*_RP956
ADD1=ADD*_RP956
ADD2=ADD*_RP956
ADD3=ADD*_RP956
1
CPU socket washers
ADD4=ADD*_GR683
ADD5=ADD*_GR683
ADD6=ADD*_GR683
ADD7=ADD*_GR683
2
VDD_AA8
VDD_A10
VDD_A6
A6
AA8
A10
AR5
AP35
AP34
VSS_AR5
VSS_AP35
VSS_AP34
VDD_AA14
VDD_AA12
VDD_AA10
AA14
AA12
AA10
AR27
AR24
AR9
VSS_AR9
VSS_AR27
VSS_AR24
VDD_AA20
VDD_AA18
VDD_AA16
AA20
AA18
AA16
B13
B12
AR32
VSS_B13
VSS_B12
VSS_AR32
VDD_AB5
VDD_AB4
AB7
AB5
AB4
B28
B21
B17
VSS_B21
VSS_B17
VDD_AB11
VDD_AB9
VDD_AB7
AB9
AB11
B35
B33
VSS_B35
VSS_B33
VSS_B28
VDD_AB17
VDD_AB15
VDD_AB13
AB17
AB15
AB13
C26
C8
C4
VSS_C8
VSS_C4
VSS_C26
VDD_AC2
VDD_AB21
VDD_AB19
AC2
AB21
AB19
D14
D12
C31
VSS_D14
VSS_D12
VSS_C31
VDD_AC8
VDD_AC3
AC8
AC3
D22
D18
VSS_D22
VSS_D18
VDD_AC14
VDD_AC12
VDD_AC10
AC14
AC12
AC10
D34
D29
D24
VSS_D34
VSS_D29
VSS_D24
VDD_AC20
VDD_AC18
VDD_AC16
AC20
AC18
AC16
E27
E9
E5
VSS_E9
VSS_E5
VSS_E27
VDD_AD9
VDD_AD7
AD9
AD7
AD11
F16
F14
E32
VSS_F14
VSS_E32
VDD_AD15
VDD_AD13
VDD_AD11
AD17
AD15
AD13
F30
F25
F22
VSS_F25
VSS_F22
VSS_F16
VDD_AD21
VDD_AD19
VDD_AD17
AE8
AD21
AD19
G7
G5
F35
VSS_G5
VSS_F35
VSS_F30
VDD_AE12
VDD_AE10
VDD_AE8
AE12
AE10
G11
G9
VSS_G9
VSS_G7
VSS_G11
VDD_AE18
VDD_AE16
VDD_AE14
AE18
AE16
AE14
G17
G15
G13
VSS_G17
VSS_G15
VSS_G13
VDD_AF5
VDD_AF4
VDD_AE20
AF5
AF4
AE20
G28
G25
G22
VSS_G28
VSS_G25
VSS_G22
VDD_AF11
VDD_AF7
AF7
AF13
AF11
H5
H4
G33
VSS_H4
VSS_G33
VDD_AG2
VDD_AF15
VDD_AF13
AG3
AG2
AF15
H16
H14
H12
VSS_H5
VSS_H14
VSS_H12
VDD_AG12
VDD_AG10
VDD_AG3
AG12
AG10
H23
H22
VSS_H23
VSS_H22
VSS_H16
VDD_AH5
VDD_AG16
VDD_AG14
AH5
AG16
AG14
H31
H26
H24
VSS_H31
VSS_H26
VSS_H24
VDD_AH11
VDD_AH7
AH7
AH13
AH11
J7
J3
J2
VSS_J3
VSS_J2
VDD_AJ2
VDD_AH15
VDD_AH13
AJ4
AJ2
AH15
J17
J15
J13
VSS_J7
VSS_J15
VSS_J13
VDD_AJ8
VDD_AJ6
VDD_AJ4
AJ8
AJ6
J23
J21
VSS_J23
VSS_J21
VSS_J17
VDD_AJ14
VDD_AJ12
VDD_AJ10
AJ14
AJ12
AJ10
K8
J34
J29
VSS_K8
VSS_J34
VSS_J29
VDD_AK13
VDD_AK1
VDD_AJ16
AK1
AK13
AJ16
K14
K12
K10
VSS_K14
VSS_K12
VSS_K10
VDD_AK19
VDD_AK17
VDD_AK15
AK19
AK17
AK15
K21
K18
K16
VSS_K21
VSS_K18
VSS_K16
VDD_AL5
VDD_AL2
VDD_AK21
AL5
AL2
AK21
K32
K27
K23
VSS_K32
VSS_K27
VSS_K23
VDD_AM1
VDD_AL9
AM1
AL9
AM13
L11
L9
L7
VSS_L9
VSS_L7
VDD_AM21
VDD_AM17
VDD_AM13
AN4
AM21
AM17
L17
L15
L13
VSS_L15
VSS_L13
VSS_L11
VDD_AN12
VDD_AN8
VDD_AN4
AN8
AN12
V10
U9
VSS_U9
VSS_V10
VSS_L17
VDD_AR6
VDD_AP20
VDD_AP16
AR6
AP20
AP16
VDD_B19
VDD_B15
VDD_AR10
B19
B15
AR10
VDD_C6
VDD_C2
C6
C2
VDD_C12
VDD_C10
D16
C12
C10
VDD_E3
VDD_D20
VDD_D16
E3
D20
VDD_F13
VDD_E12
VDD_E11
VDD_E7
E7
VCORE_CPU2_NB
E11
F13
E12
29,98,117
VDD_F17
VDD_F15
G1
F17
F15
VDD_G6
VDD_G1
G8
G6
VDD_G10
VDD_G8
G12
G10
VDD_G16
VDD_G14
VDD_G12
G16
G14
VDD_H13
VDD_H7
H7
H13
VDD_H17
VDD_H15
J14
H17
H15
VDD_J12
VDD_J16
VDD_J14
J12
J16
VDD_K5
VDD_K4
K5
K4
VDD_K7
K7
X01_DT12339_GT
+VCORE_CPU2
2
3
J_CPU2
VDD_K9
K9
VDD_K15
VDD_K13
K17
K15
K13
VDD_L3
VDD_L2
VDD_K17
L3
L2
VDD_L12
VDD_L10
L14
L12
L10
VDD_L18
VDD_L16
VDD_L14
L18
L16
VDD_M7
VDD_L20
M7
M11
L20
VDD_M15
VDD_M13
VDD_M11
M15
M13
N17
N15
VSS_N17
VSS_N15
VDD_M19
VDD_M17
M21
M19
M17
N23
N21
N19
VSS_N21
VSS_N19
VDD_N10
VDD_N8
VDD_M21
N8
N10
P8
N26
VSS_P8
VSS_N26
VSS_N23
VDD_N14
VDD_N12
N16
N14
N12
P14
P12
P10
VSS_P12
VSS_P10
VDD_N20
VDD_N18
VDD_N16
N20
N18
P18
P16
VSS_P18
VSS_P16
VSS_P14
VDD_P5
VDD_P4
P7
P5
P4
P24
P22
P20
VSS_P22
VSS_P20
VDD_P11
VDD_P9
VDD_P7
P9
P11
R7
P29
VSS_R7
VSS_P29
VSS_P24
VDD_P15
VDD_P13
P17
P15
P13
R13
R11
R9
VSS_R9
VSS_R11
VDD_P21
VDD_P19
VDD_P17
P21
P19
R17
R15
VSS_R17
VSS_R15
VSS_R13
VDD_R3
VDD_R2
R8
R3
R2
R23
R21
R19
VSS_R21
VSS_R19
VDD_R12
VDD_R10
VDD_R8
R12
R10
T4
R27
VSS_T4
VSS_R27
VSS_R23
VDD_R16
VDD_R14
R18
R16
R14
T10
T8
T5
VSS_T8
VSS_T5
VDD_T9
VDD_R20
VDD_R18
T9
R20
T14
T12
VSS_T14
VSS_T12
VSS_T10
VDD_T13
VDD_T11
T15
T13
T11
T20
T18
T16
VSS_T18
VSS_T16
VDD_T19
VDD_T17
VDD_T15
T19
T17
T24
T22
VSS_T24
VSS_T22
VSS_T20
VDD_U12
VDD_T21
U14
U12
T21
U3
U2
T25
VSS_U2
VSS_T25
VDD_U18
VDD_U16
VDD_U14
U18
U16
U13
U11
VSS_U3
VSS_U13
VSS_U11
VDD_V4
VDD_U20
V5
V4
U20
U19
U17
U15
VSS_U17
VSS_U15
VDD_V13
VDD_V11
VDD_V5
V13
V11
U23
U21
VSS_U23
VSS_U21
VSS_U19
VDD_V17
VDD_V15
V19
V17
V15
V14
V12
U27
VSS_V12
VSS_U27
VDD_W2
VDD_V21
VDD_V19
W2
V21
V18
V16
VSS_V18
VSS_V16
VSS_V14
VDD_W8
VDD_W3
W8
W3
W10
V24
V22
V20
VSS_V22
VSS_V20
VDD_W14
VDD_W12
VDD_W10
W14
W12
W7
V26
VSS_W7
VSS_V26
VSS_V24
VDD_W18
VDD_W16
W20
W18
W16
W13
W11
W9
VSS_W9
VSS_W11
VDD_Y9
VDD_Y7
VDD_W20
Y9
Y7
W17
W15
VSS_W17
VSS_W15
VSS_W13
VDD_Y13
VDD_Y11
Y15
Y13
Y11
W23
W21
W19
VSS_W21
VSS_W19
VDD_Y19
VDD_Y17
VDD_Y15
Y19
Y17
Y4
W29
VSS_Y4
VSS_W29
VSS_W23
VDD_V9
VDD_Y21
V9
U10
Y21
Y10
Y8
Y5
VSS_Y8
VSS_Y5
AMC CPU F1207
HETERO 9 OF 11
VDD_U10
Y16
Y14
Y12
VSS_Y16
VSS_Y14
VSS_Y12
VSS_Y10
Y20
Y18
VSS_Y20
VSS_Y18
Y27
Y24
Y22
VSS_Y24
VSS_Y22
F12
T7
VSS_T7
VSS_F12
VSS_Y27
AJ13
VSS_AJ13
+VCORE_CPU2
AA22
AA24
AB23
AC22
AC24
AD23
AE22
AF23
AG24
AH23
L22
M23
N22
N24
P23
R22
R24
T23
U22
U24
V23
W22
W24
Y23
VDD_AA22
VDD_AA24
VDD_AB23
VDD_AC22
VDD_AC24
VDD_AD23
VDD_AE22
VDD_AF23
VDD_AG24
VDD_AH23
VDD_L22
VDD_M23
VDD_N22
VDD_N24
VDD_P23
VDD_R22
VDD_R24
VDD_T23
VDD_U22
VDD_U24
VDD_V23
VDD_W22
VDD_W24
VDD_Y23
J_CPU2
AMC CPU F1207
HETERO 10 OF 11
VSS_L19
VSS_L21
VSS_L23
VSS_L25
VSS_L30
VSS_L35
VSS_M4
VSS_M5
VSS_M8
VSS_M10
VSS_M12
VSS_M14
VSS_M16
VSS_M18
VSS_M20
VSS_M22
VSS_M24
VSS_M28
VSS_N2
VSS_N3
VSS_N7
VSS_N9
VSS_N11
VSS_N13
L19
L21
L23
L25
L30
L35
M4
M5
M8
M10
M12
M14
M16
M18
M20
M22
M24
M28
N2
N3
N7
N9
N11
N13
3
4
ROOM=CPU2
+MEM_CPU2
J_CPU2
VDDIO1
AA30
VDDIO3
VDDIO2
AB33
AA35
VDDIO5
VDDIO4
AD34
AC31
VDDIO8
VDDIO7
VDDIO6
AG33
AF35
AE32
+VTT_CPU2
VDDIO10
VDDIO9
AJ34
AH31
VDDIO12
VDDIO11
N31
M33
AL35
VDDIO15
VDDIO14
VDDIO13
R32
P34
VDDIO17
VDDIO16
U33
T35
T30
VDDIO20
VDDIO19
VDDIO18
W34
V31
VDDIO21
A23
Y32
VTT2
VTT1
AM23
VTT3
AP23
AN23
VTT5
VTT4
AR23
VTT6
B23
VTT7
C23
VTT8
D23
VTT9
E23
AL23
VTT10
VLDT_02
VLDT_01
AH3
AH2
AH1
VLDT_04
VLDT_03
AH4
VLDT_12
VLDT_11
E1
D1
C1
VLDT_14
VLDT_13
F1
VLDT_22
VLDT_21
AP2
AN2
AM2
VLDT_24
VLDT_23
AR2
+1.2V_VLDT
AMC CPU F1207
HETERO 11 OF 11
CPU2 POWER
PROPRIETARY NOTE
THIS ITEM IS THE PROPERTY OF DELL INC. ROUND ROCK, TEXAS
AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS
ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL INC.,
EXCEPT AS AUTHORIZED BY DELL INC., AND THEN ONLY BY WAY OF
LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE
OR IN PART AND MUST BE RETURNED TO DELL INC. UPON REQUEST
AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF
THE LOAN. NEITHER THIS ITEM NOR THE INFORMATION IT CONTAINS MAY
BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH
USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT
THE PRIOR WRITTEN CONSENT OF DELL INC.
TITLE
DWG NO.
DATE
INC.
ROUND ROCK,TEXAS
SCHEM, PLN, SV, PE2970
FP975
SHEET
10/2/2008
4
REV.
A05
28 OF 120
C
DBA
+VCORE_CPU2
A B C
D
+VTT_CPU2
1
21
C8935
+MEM_CPU2
21
C8992
21
C8936
22uF 6.3V
21
C8993
10uF 6.3V
22uF 6.3V
10uF 6.3V
21
C8968
21
C9009
4.7uF
C8969
6.3V-10%
C9008
10uF 6.3V
21
4.7uF
21
10uF 6.3V
21
C8970
6.3V-10%
21
C9007
4.7uF
C8971
6.3V-10%
21
C9010
10uF 6.3V
21
4.7uF
6.3V-10%
21
C9006
10uF 6.3V
C8908
21
C9004
10uF 6.3V
1 2
.22uF
10V-20%
21
C9003
10uF 6.3V
1 2
C8909
.22uF
C9002
10uF 6.3V
1 2
C8910
10V-20%
21
10uF 6.3V
.22uF
10V-20%
21
C9005
1 2
C8911
21
C9001
10uF 6.3V
.22uF
1 2
C8912
10V-20%
21
C8999
10uF 6.3V
.22uF
1 2
C8913
10V-20%
21
C8998
10uF 6.3V
.22uF
10V-20%
21
C8997
10uF 6.3V
21
C8790
21
C9000
10uF 6.3V
.01uF
C8791
16V-10%
21
C8996
10uF 6.3V
X03_13326_SCH changed caps to correct 180pF value
21
.01uF
16V-10%
21
C8995
10uF 6.3V
C8783
1 2
21
C8994
10uF 6.3V
180pF
C8784
1 2
50V-10%
C8916
10uF 6.3V
180pF
C9826
50V-10%
1 2
1 2
.22uF
10V-20%
180pF
C9827
50V-10%
1 2
C8915
1 2
.22uF
10V-20%
180pF
50V-10%
1 2
C8914
C9828
1 2
.22uF
10V-20%
180pF
C9829
50V-10%
1 2
21
C8792
180pF
C9830
50V-10%
.01uF
1 2
16V-10%
180pF
50V-10%
C8785
1 2
180pF
50V-10%
+MEM_CPU2
21
C8872
+MEM_CPU2
.1uF
21
C8871
16V-10%
+VTT_CPU2
.1uF
16V-10%
21
C8862
21
C8870
.1uF
16V-10%
.1uF
16V-10%
21
C8861
21
C8869
.1uF
16V-10%
.1uF
16V-10%
21
C8860
21
C8868
.1uF
16V-10%
.1uF
16V-10%
21
C8859
21
C8867
.1uF
16V-10%
.1uF
16V-10%
21
C8858
21
C8866
.1uF
16V-10%
.1uF
16V-10%
21
C8857
21
C8865
.1uF
16V-10%
.1uF
16V-10%
21
C8856
21
C8864
.1uF
16V-10%
.1uF
16V-10%
21
C8855
21
C8863
.1uF
16V-10%
.1uF
16V-10%
21
C8854
21
C9839
.1uF
16V-10%
.1uF
21
C8853
21
C9838
16V-10%
.1uF
16V-10%
.1uF
16V-10%
1
2
+1.2V_VLDT +1.2V_VLDT
21
C8965
+VTT_CPU2
4.7uF
C8966
6.3V-10%
21
4.7uF
6.3V-10%
1 2
C8905
.22uF
C8906
10V-20%
1 2
.22uF
10V-20%
C8780
1 2
180pF
50V-10%
C8781
1 2
180pF
50V-10%
21
C8967
4.7uF
X03_13326_SCH changed caps to correct 180pF value
21
C8972
6.3V-10%
4.7uF
6.3V-10%
1 2
C8917
.22uF
C8907
10V-20%
1 2
.22uF
10V-20%
C8782
1 2
180pF
50V-10%
C8786
1 2
180pF
50V-10%
28,98,117
VCORE_CPU2_NB
C9831
1 2
21
180pF
C9832
50V-10%
21
1 2
180pF
C9833
50V-10%
21
1 2
180pF
50V-10%
21
+VTT_CPU2
2
21
C9840
21
.1uF
21
C9841
16V-10%
.1uF
21
C8843
16V-10%
+VTT_CPU2
.1uF
21
C8844
16V-10%
.1uF
21
C8845
16V-10%
.1uF
21
C8846
16V-10%
.1uF
21
C8847
16V-10%
.1uF
21
C8848
16V-10%
.1uF
21
C8849
16V-10%
.1uF
21
C8850
16V-10%
.1uF
21
C8851
16V-10%
.1uF
21
C8852
16V-10%
.1uF
16V-10%
3
NP
C8961
21
NP
21
4.7uF
C8962
6.3V-10%
+VCORE_CPU2
NP
4.7uF
C8963
6.3V-10%
21
NP
4.7uF
C8964
6.3V-10%
21
4.7uF
6.3V-10%
NP
C8901
1 2
NP
.22uF
C8902
10V-20%
NP
.22uF
C8904
10V-20%
1 2
NP
.22uF
C8903
10V-20%
1 2
ROOM = CPU2
1 2
.22uF
10V-20%
C8943
1 2
C8944
1000pF
50V-10%
1 2
C8945
1000pF
50V-10%
1 2
C8946
1000pF
50V-10%
1 2
1000pF
50V-10%
C8779
1 2
180pF
50V-10%
C8778
1 2
180pF
50V-10%
C8777
1 2
180pF
50V-10%
C8776
1 2
180pF
50V-10%
C9927
1 2
180pF
50V-10%
1 2
C9929
.22uF
10V-20%
C9935
C9936
10uF 6.3V
C9938
10uF 6.3V
C9937
10uF 6.3V
C9939
10uF 6.3V
10uF 6.3V
21
C8833
+MEM_CPU2
21
21
.1uF
C8834
16V-10%
PLACE BETWEEN DIMMS
.1uF
C8835
16V-10%
21
21
21
.1uF
21
C8836
16V-10%
21
.1uF
21
C8837
16V-10%
21
.1uF
21
21
C8838
16V-10%
.1uF
21
C8839
16V-10%
.1uF
21
C8840
16V-10%
.1uF
21
C8841
16V-10%
.1uF
21
C8842
16V-10%
.1uF
16V-10%
3
4
1 2
C8918
.22uF
C8919
10V-20%
1 2
.22uF
10V-20%
2.5V-20%
+
330uF
1 2
2.5V-20%
330uF
C8929
+
1 2
C8928
2.5V-20%
+
330uF
1 2
2.5V-20%
C8930
2.5V-20%
+
330uF
1 2
TO DO: determine correct BULK parts
330uF
C8931
+
C8927
1 2
2.5V-20%
+
330uF
1 2
2.5V-20%
C8926
ROOM = CPU2_REG
820uF
+
1 2
C9599
2.5V-20%
820uF
+
1 2
2.5V-20%
C9600
820uF
+
1 2
2.5V-20%
C8762
820uF
+
1 2
2.5V-20%
C8761
820uF
+
1 2
2.5V-20%
C8760
1 2
820uF
PROPRIETARY NOTE: THIS ITEM IS THE PROPERTY OF DELL INC. ROUND ROCK, TEXAS AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL INC. EXCEPT
AS AUTHORIZED BY DELL INC., AND THEN ONLY BY WAY OF LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE
OR IN PART AND MUST BE RETURNED TO DELL INC. UPON REQUEST AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF THE
LOAN. NEITHER THIS ITEM OR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH
USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT THE PRIOR WRITTEN CONSENT OF DELL INC.
C8759
+
C9506
C9505
10uF 6.3V
10uF 6.3V
ROOM = CPU2DIMM
CPU2 Decoupling
C9504
C9503
10uF 6.3V
C9502
10uF 6.3V
C9501
10uF 6.3V
10uF 6.3V
TITLE
DWG NO.
DATE
MODULE:
DESC:
REV: OF
INC.
ROUND ROCK,TEXAS
SCHEM, PLN, SV, PE2970
FP975
SHEET
CPUS,FSB,NB,XDP0,XDP1
SEC
REV.
A05
29 OF 12010/2/2008
MCH
211
4
DCBA
A B C
D
1
2
3
4
25,31,32
25,31,32
25,31,32
25,31,32
25,31,32
25,31,32
25,31,32
25,31,32
25,31,32
25,31,32
25,31,32
25,31,32
25,31,32
25,31,32
25,31,32
25,31,32
25,31,32
25,31,32
25,31,32
25,32
25,32
25,31,32
25,31,32
25,31,32
25,32
25,32
25
25
25,32
48
48
+3.3V
30-32
25,32
25,32
25,31
25,31
25,31
X00_DT9812 SCH I2C address lines use pullup/pulldowns
25,31
25,31
25,31
25,31
25,31
25,31
25,31
25,31
25,31
25,31
25,31
25,31
25,31
25,31
25,31
25,31
25,31
25,31
25,31
25,31
25,31
25,31
25,31
25,31
25,31
25,31
25,31
25,31
25,31
25,31
25,31
25,31
25,31
25,31
25,31
25,31
25,31
25,31
25,31
25,31
25,31
31,32
25,31,32
CPU2_MEM_MA_BANK1
CPU2_MEM_MA_BANK0
CPU2_MEM_MA_BANK2
CPU2_MEM_MA_ADD15
CPU2_MEM_MA_ADD14
CPU2_MEM_MA_ADD13
CPU2_MEM_MA_ADD12
CPU2_MEM_MA_ADD11
CPU2_MEM_MA_ADD10
CPU2_MEM_MA_ADD9
CPU2_MEM_MA_ADD8
CPU2_MEM_MA_ADD7
CPU2_MEM_MA_ADD6
CPU2_MEM_MA_ADD5
CPU2_MEM_MA_ADD4
CPU2_MEM_MA_ADD3
CPU2_MEM_MA_ADD2
CPU2_MEM_MA_ADD1
CPU2_MEM_MA_ADD0
CPU2_MEM_MA0_CS_L1
CPU2_MEM_MA0_CS_L0
CPU2_MEM_MA_RAS_N
CPU2_MEM_MA_CAS_N
CPU2_MEM_MA_WE_N
CPU2_MEM_MA2_CS_L1
CPU2_MEM_MA2_CS_L0
NC_DIMM5_P138
NC_DIMM5_P137
CK_CPU2_MEM_MA0_DN
CK_CPU2_MEM_MA0_DP
CPU2_MEM_MA_CKE0
I2C_P2_DIMM5_SDA
I2C_P2_DIMM5_SCL
30,31
30,31
30,31
CPU2_DIMM_PD
CPU2_DIMM_PD
CPU2_DIMM_PD
V_MEM_CPU2_DIMM_VREF
CPU2_MEM_MA2_ODT0
CPU2_MEM_MA0_ODT0
CPU2_MEM_MA_CHECK7
CPU2_MEM_MA_CHECK6
CPU2_MEM_MA_CHECK5
CPU2_MEM_MA_CHECK4
CPU2_MEM_MA_CHECK3
CPU2_MEM_MA_CHECK2
CPU2_MEM_MA_CHECK1
CPU2_MEM_MA_CHECK0
CPU2_MEM_MA_DQS_17_DP
CPU2_MEM_MA_DQS_17_DN
CPU2_MEM_MA_DQS_16_DP
CPU2_MEM_MA_DQS_16_DN
CPU2_MEM_MA_DQS_15_DP
CPU2_MEM_MA_DQS_15_DN
CPU2_MEM_MA_DQS_14_DP
CPU2_MEM_MA_DQS_14_DN
CPU2_MEM_MA_DQS_13_DP
CPU2_MEM_MA_DQS_13_DN
CPU2_MEM_MA_DQS_12_DP
CPU2_MEM_MA_DQS_12_DN
CPU2_MEM_MA_DQS_11_DP
CPU2_MEM_MA_DQS_11_DN
CPU2_MEM_MA_DQS_10_DP
CPU2_MEM_MA_DQS_10_DN
CPU2_MEM_MA_DQS_9_DP
CPU2_MEM_MA_DQS_9_DN
CPU2_MEM_MA_DQS_8_DP
CPU2_MEM_MA_DQS_8_DN
CPU2_MEM_MA_DQS_7_DP
CPU2_MEM_MA_DQS_7_DN
CPU2_MEM_MA_DQS_6_DP
CPU2_MEM_MA_DQS_6_DN
CPU2_MEM_MA_DQS_5_DP
CPU2_MEM_MA_DQS_5_DN
CPU2_MEM_MA_DQS_4_DP
CPU2_MEM_MA_DQS_4_DN
CPU2_MEM_MA_DQS_3_DP
CPU2_MEM_MA_DQS_3_DN
CPU2_MEM_MA_DQS_2_DP
CPU2_MEM_MA_DQS_2_DN
CPU2_MEM_MA_DQS_1_DP
CPU2_MEM_MA_DQS_1_DN
CPU2_MEM_MA_DQS_0_DP
CPU2_MEM_MA_DQS_0_DN
CPU2_MEM_MA_ERR_N
CPU2_MEM_MA_PAR
same issues as previous DIMM's
190
173
174
196
176
177
179
180
182
183
188
193
192
221
220
138
137
186
185
171
119
120
101
240
239
238
195
168
167
162
161
164
165
232
233
223
224
211
212
202
203
155
156
146
147
134
135
125
126
114
113
105
104
102
BA1
71
BA0
54
A16/BA2
A15
A14
A13
A12
57
A11
70
A10/AP
A9
A8
58
A7
A6
60
A5
61
A4
A3
63
A2
A1
A0
76
S1
S0
RAS
74
CAS
73
WE
CK2
CK2
CK1
CK1
CK0
CK0
CKE1
52
CKE0
SDA
SCL
SA2
SA1
SA0
VDDSPD
1
VREF
77
ODT1
ODT0
CB7
CB6
CB5
CB4
49
CB3
48
CB2
43
CB1
42
CB0
DM8/DQS17/NC
DQS17/NC
DM7/DQS16
DQS16/NC
DM6/DQS15
DQS15/NC
DM5/DQS14
DQS14/NC
DM4/DQS13
DQS13/NC
DM3/DQS12
DQS12/NC
DM2/DQS11
DQS11/NC
DM1/DQS10
DQS10/NC
DM0/DQS9
DQS9/NC
46
DQS8/NC
45
DQS8/NC
DQS7
DQS7
DQS6
DQS6
93
DQS5
92
DQS5
84
DQS4
83
DQS4
37
DQS3
36
DQS3
28
DQS2
27
DQS2
16
DQS1
15
DQS1
7
DQS0
6
DQS0
55
ERR_OUT
68
PAR_IN
TEST
SUB*_MW921
DQ63
DQ62
DQ61
DQ60
DQ59
DQ58
DQ57
DQ56
DQ55
DQ54
DQ53
DQ52
DQ51
J_DIMM3A
DQ50
DQ49
DQ48
DQ47
DQ46
DQ45
DQ44
DQ43
DQ42
DQ41
DQ40
DQ39
DQ38
DQ37
DQ36
DQ35
DQ34
ranked DIMMs
to support quad
additional chip selects
CK2, CK2# are used for
DQ33
DQ32
DQ31
X00_DT9841 SCH added note
DQ30
DQ29
DQ28
DQ27
DQ26
DQ25
DQ24
DQ23
DQ22
DQ21
DQ20
DQ19
DQ18
DQ17
DQ16
DQ15
DQ14
DQ13
DQ12
DQ11
DQ10
VDD10
VDD9
VDD8
VDD7
VDD6
VDD5
VDD4
VDD3
VDD2
VDD1
VDD0
VDDQ10
VDDQ9
VDDQ8
VDDQ7
VDDQ6
VDDQ5
VDDQ4
VDDQ3
VDDQ2
VDDQ1
VDDQ0
RESET
240 PIN DDR II DIMM
I2C ID = A0
CPU2 DIMMS 3A & 3B
DQ9
DQ8
DQ7
DQ6
DQ5
DQ4
DQ3
DQ2
DQ1
DQ0
NC
236
235
230
229
117
116
111
110
227
226
218
217
108
107
99
98
215
214
209
208
96
95
90
89
206
205
200
199
87
86
81
80
159
158
153
152
40
39
34
33
150
149
144
143
31
30
25
24
141
140
132
131
22
21
13
12
129
128
123
122
10
9
4
3
197
189
187
184
178
172
69
67
64
59
53
194
191
181
175
170
78
75
72
62
56
51
19
18
CPU2_MEM_MA_DATA63
CPU2_MEM_MA_DATA62
CPU2_MEM_MA_DATA61
CPU2_MEM_MA_DATA60
CPU2_MEM_MA_DATA59
CPU2_MEM_MA_DATA58
CPU2_MEM_MA_DATA57
CPU2_MEM_MA_DATA56
CPU2_MEM_MA_DATA55
CPU2_MEM_MA_DATA54
CPU2_MEM_MA_DATA53
CPU2_MEM_MA_DATA52
CPU2_MEM_MA_DATA51
CPU2_MEM_MA_DATA50
CPU2_MEM_MA_DATA49
CPU2_MEM_MA_DATA48
CPU2_MEM_MA_DATA47
CPU2_MEM_MA_DATA46
CPU2_MEM_MA_DATA45
CPU2_MEM_MA_DATA44
CPU2_MEM_MA_DATA43
CPU2_MEM_MA_DATA42
CPU2_MEM_MA_DATA41
CPU2_MEM_MA_DATA40
CPU2_MEM_MA_DATA39
CPU2_MEM_MA_DATA38
CPU2_MEM_MA_DATA37
CPU2_MEM_MA_DATA36
CPU2_MEM_MA_DATA35
CPU2_MEM_MA_DATA34
CPU2_MEM_MA_DATA33
CPU2_MEM_MA_DATA32
CPU2_MEM_MA_DATA31
CPU2_MEM_MA_DATA30
CPU2_MEM_MA_DATA29
CPU2_MEM_MA_DATA28
CPU2_MEM_MA_DATA27
CPU2_MEM_MA_DATA26
CPU2_MEM_MA_DATA25
CPU2_MEM_MA_DATA24
CPU2_MEM_MA_DATA23
CPU2_MEM_MA_DATA22
CPU2_MEM_MA_DATA21
CPU2_MEM_MA_DATA20
CPU2_MEM_MA_DATA19
CPU2_MEM_MA_DATA18
CPU2_MEM_MA_DATA17
CPU2_MEM_MA_DATA16
CPU2_MEM_MA_DATA15
CPU2_MEM_MA_DATA14
CPU2_MEM_MA_DATA13
CPU2_MEM_MA_DATA12
CPU2_MEM_MA_DATA11
CPU2_MEM_MA_DATA10
CPU2_MEM_MA_DATA9
CPU2_MEM_MA_DATA8
CPU2_MEM_MA_DATA7
CPU2_MEM_MA_DATA6
CPU2_MEM_MA_DATA5
CPU2_MEM_MA_DATA4
CPU2_MEM_MA_DATA3
CPU2_MEM_MA_DATA2
CPU2_MEM_MA_DATA1
CPU2_MEM_MA_DATA0
CPU2_MEM_MA_RESET_N
25,31
25,31
25,31
25,31
25,31
25,31
25,31
25,31
25,31
25,31
25,31
25,31
25,31
25,31
25,31
25,31
25,31
25,31
25,31
25,31
25,31
25,31
25,31
25,31
25,31
25,31
25,31
25,31
25,31
25,31
25,31
25,31
25,31
25,31
25,31
25,31
25,31
25,31
25,31
25,31
25,31
25,31
25,31
25,31
25,31
25,31
25,31
25,31
25,31
25,31
25,31
25,31
25,31
25,31
25,31
25,31
25,31
25,31
25,31
25,31
25,31
25,31
25,31
25,31
25,31
+MEM_CPU2
26,31,32
26,31,32
26,31,32
26,31,32
26,31,32
26,31,32
26,31,32
26,31,32
26,31,32
26,31,32
26,31,32
26,31,32
26,31,32
26,31,32
26,31,32
26,31,32
26,31,32
26,31,32
26,31,32
26,32
26,32
26,31,32
26,31,32
26,31,32
26,32
26,32
26
26
CPU2_MEM_MB_BANK1
CPU2_MEM_MB_BANK0
CPU2_MEM_MB_BANK2
CPU2_MEM_MB_ADD15
CPU2_MEM_MB_ADD14
CPU2_MEM_MB_ADD13
CPU2_MEM_MB_ADD12
CPU2_MEM_MB_ADD11
CPU2_MEM_MB_ADD10
CPU2_MEM_MB_ADD9
CPU2_MEM_MB_ADD8
CPU2_MEM_MB_ADD7
CPU2_MEM_MB_ADD6
CPU2_MEM_MB_ADD5
CPU2_MEM_MB_ADD4
CPU2_MEM_MB_ADD3
CPU2_MEM_MB_ADD2
CPU2_MEM_MB_ADD1
CPU2_MEM_MB_ADD0
CPU2_MEM_MB0_CS_L1
CPU2_MEM_MB0_CS_L0
CPU2_MEM_MB_RAS_N
CPU2_MEM_MB_CAS_N
CPU2_MEM_MB_WE_N
CPU2_MEM_MB2_CS_L1
CPU2_MEM_MB2_CS_L0
NC_DIMM6_P138
NC_DIMM6_P137
CK_CPU2_MEM_MB0_DN
CK_CPU2_MEM_MB0_DP
190
71
54
173
174
196
176
57
70
177
179
58
180
60
61
182
63
183
188
76
193
192
74
73
221
220
138
137
186
185
171
52
119
120
101
240
239
+3.3V
26,32
48
48
CPU2_MEM_MB_CKE0
I2C_P2_DIMM6_SDA
I2C_P2_DIMM6_SCL
30,31
30,31
CPU2_DIMM_PD
CPU2_DIMM_PD
CPU2_DIMM_PU
31
238
30-32
26,32
26,32
26,31
26,31
X00_DT9812 SCH I2C address lines use pullup/pulldowns
26,31
26,31
26,31
26,31
26,31
26,31
26,31
26,31
26,31
26,31
26,31
26,31
26,31
26,31
26,31
26,31
26,31
26,31
26,31
26,31
26,31
26,31
26,31
26,31
26,31
26,31
26,31
26,31
26,31
26,31
26,31
26,31
26,31
26,31
26,31
26,31
26,31
26,31
26,31
26,31
26,31
26,31
31,32
26,31,32
V_MEM_CPU2_DIMM_VREF
CPU2_MEM_MB2_ODT0
CPU2_MEM_MB0_ODT0
CPU2_MEM_MB_CHECK7
CPU2_MEM_MB_CHECK6
CPU2_MEM_MB_CHECK5
CPU2_MEM_MB_CHECK4
CPU2_MEM_MB_CHECK3
CPU2_MEM_MB_CHECK2
CPU2_MEM_MB_CHECK1
CPU2_MEM_MB_CHECK0
CPU2_MEM_MB_DQS_17_DP
CPU2_MEM_MB_DQS_17_DN
CPU2_MEM_MB_DQS_16_DP
CPU2_MEM_MB_DQS_16_DN
CPU2_MEM_MB_DQS_15_DP
CPU2_MEM_MB_DQS_15_DN
CPU2_MEM_MB_DQS_14_DP
CPU2_MEM_MB_DQS_14_DN
CPU2_MEM_MB_DQS_13_DP
CPU2_MEM_MB_DQS_13_DN
CPU2_MEM_MB_DQS_12_DP
CPU2_MEM_MB_DQS_12_DN
CPU2_MEM_MB_DQS_11_DP
CPU2_MEM_MB_DQS_11_DN
CPU2_MEM_MB_DQS_10_DP
CPU2_MEM_MB_DQS_10_DN
CPU2_MEM_MB_DQS_9_DP
CPU2_MEM_MB_DQS_9_DN
CPU2_MEM_MB_DQS_8_DP
CPU2_MEM_MB_DQS_8_DN
CPU2_MEM_MB_DQS_7_DP
CPU2_MEM_MB_DQS_7_DN
CPU2_MEM_MB_DQS_6_DP
CPU2_MEM_MB_DQS_6_DN
CPU2_MEM_MB_DQS_5_DP
CPU2_MEM_MB_DQS_5_DN
CPU2_MEM_MB_DQS_4_DP
CPU2_MEM_MB_DQS_4_DN
CPU2_MEM_MB_DQS_3_DP
CPU2_MEM_MB_DQS_3_DN
CPU2_MEM_MB_DQS_2_DP
CPU2_MEM_MB_DQS_2_DN
CPU2_MEM_MB_DQS_1_DP
CPU2_MEM_MB_DQS_1_DN
CPU2_MEM_MB_DQS_0_DP
CPU2_MEM_MB_DQS_0_DN
CPU2_MEM_MB_ERR_N
CPU2_MEM_MB_PAR
NC_DIMM6_P102NC_DIMM5_P102
1
77
195
168
167
162
161
49
48
43
42
164
165
232
233
223
224
211
212
202
203
155
156
146
147
134
135
125
126
46
45
114
113
105
104
93
92
84
83
37
36
28
27
16
15
7
6
55
68
102
SUB*_MW921
I2C ID = A2
ROOM = CPU2DIMM
BA1
BA0
A16/BA2
A15
A14
A13
A12
A11
A10/AP
A9
A8
A7
A6
A5
A4
J_DIMM3B
A3
A2
A1
A0
S1
S0
RAS
CAS
WE
CK2
CK2
CK1
CK1
CK0
CK0
ranked DIMMs
to support quad
additional chip selects
CKE1
CKE0
CK2, CK2# are used for
X00_DT9841 SCH added note
SDA
SCL
SA2
SA1
SA0
VDDSPD
VREF
ODT1
ODT0
CB7
CB6
CB5
CB4
CB3
CB2
CB1
CB0
DM8/DQS17/NC
DQS17/NC
DM7/DQS16
DQS16/NC
DM6/DQS15
DQS15/NC
DM5/DQS14
DQS14/NC
DM4/DQS13
DQS13/NC
DM3/DQS12
DQS12/NC
DM2/DQS11
DQS11/NC
DM1/DQS10
DQS10/NC
DM0/DQS9
DQS9/NC
DQS8/NC
DQS8/NC
DQS7
DQS7
DQS6
DQS6
DQS5
DQS5
DQS4
DQS4
DQS3
DQS3
DQS2
DQS2
DQS1
DQS1
DQS0
DQS0
ERR_OUT
PAR_IN
TEST
240 PIN DDR II DIMM
THIS ITEM IS THE PROPERTY OF DELL INC. ROUND ROCK, TEXAS
AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS
ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL INC.,
EXCEPT AS AUTHORIZED BY DELL INC., AND THEN ONLY BY WAY OF
LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE
OR IN PART AND MUST BE RETURNED TO DELL INC. UPON REQUEST
AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF
THE LOAN. NEITHER THIS ITEM NOR THE INFORMATION IT CONTAINS MAY
BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH
USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT
THE PRIOR WRITTEN CONSENT OF DELL INC.
DQ63
DQ62
DQ61
DQ60
DQ59
DQ58
DQ57
DQ56
DQ55
DQ54
DQ53
DQ52
DQ51
DQ50
DQ49
DQ48
DQ47
DQ46
DQ45
DQ44
DQ43
DQ42
DQ41
DQ40
DQ39
DQ38
DQ37
DQ36
DQ35
DQ34
DQ33
DQ32
DQ31
DQ30
DQ29
DQ28
DQ27
DQ26
DQ25
DQ24
DQ23
DQ22
DQ21
DQ20
DQ19
DQ18
DQ17
DQ16
DQ15
DQ14
DQ13
DQ12
DQ11
DQ10
DQ9
DQ8
DQ7
DQ6
DQ5
DQ4
DQ3
DQ2
DQ1
DQ0
VDD10
VDD9
VDD8
VDD7
VDD6
VDD5
VDD4
VDD3
VDD2
VDD1
VDD0
VDDQ10
VDDQ9
VDDQ8
VDDQ7
VDDQ6
VDDQ5
VDDQ4
VDDQ3
VDDQ2
VDDQ1
VDDQ0
NC
RESET
236
235
230
229
117
116
111
110
227
226
218
217
108
107
99
98
215
214
209
208
96
95
90
89
206
205
200
199
87
86
81
80
159
158
153
152
40
39
34
33
150
149
144
143
31
30
25
24
141
140
132
131
22
21
13
12
129
128
123
122
10
9
4
3
197
189
187
184
178
172
69
67
64
59
53
194
191
181
175
170
78
75
72
62
56
51
19
18
CPU2_MEM_MB_DATA63
CPU2_MEM_MB_DATA62
CPU2_MEM_MB_DATA61
CPU2_MEM_MB_DATA60
CPU2_MEM_MB_DATA59
CPU2_MEM_MB_DATA58
CPU2_MEM_MB_DATA57
CPU2_MEM_MB_DATA56
CPU2_MEM_MB_DATA55
CPU2_MEM_MB_DATA54
CPU2_MEM_MB_DATA53
CPU2_MEM_MB_DATA52
CPU2_MEM_MB_DATA51
CPU2_MEM_MB_DATA50
CPU2_MEM_MB_DATA49
CPU2_MEM_MB_DATA48
CPU2_MEM_MB_DATA47
CPU2_MEM_MB_DATA46
CPU2_MEM_MB_DATA45
CPU2_MEM_MB_DATA44
CPU2_MEM_MB_DATA43
CPU2_MEM_MB_DATA42
CPU2_MEM_MB_DATA41
CPU2_MEM_MB_DATA40
CPU2_MEM_MB_DATA39
CPU2_MEM_MB_DATA38
CPU2_MEM_MB_DATA37
CPU2_MEM_MB_DATA36
CPU2_MEM_MB_DATA35
CPU2_MEM_MB_DATA34
CPU2_MEM_MB_DATA33
CPU2_MEM_MB_DATA32
CPU2_MEM_MB_DATA31
CPU2_MEM_MB_DATA30
CPU2_MEM_MB_DATA29
CPU2_MEM_MB_DATA28
CPU2_MEM_MB_DATA27
CPU2_MEM_MB_DATA26
CPU2_MEM_MB_DATA25
CPU2_MEM_MB_DATA24
CPU2_MEM_MB_DATA23
CPU2_MEM_MB_DATA22
CPU2_MEM_MB_DATA21
CPU2_MEM_MB_DATA20
CPU2_MEM_MB_DATA19
CPU2_MEM_MB_DATA18
CPU2_MEM_MB_DATA17
CPU2_MEM_MB_DATA16
CPU2_MEM_MB_DATA15
CPU2_MEM_MB_DATA14
CPU2_MEM_MB_DATA13
CPU2_MEM_MB_DATA12
CPU2_MEM_MB_DATA11
CPU2_MEM_MB_DATA10
CPU2_MEM_MB_DATA9
CPU2_MEM_MB_DATA8
CPU2_MEM_MB_DATA7
CPU2_MEM_MB_DATA6
CPU2_MEM_MB_DATA5
CPU2_MEM_MB_DATA4
CPU2_MEM_MB_DATA3
CPU2_MEM_MB_DATA2
CPU2_MEM_MB_DATA1
CPU2_MEM_MB_DATA0
NC_DIMM6_P19NC_DIMM5_P19
CPU2_MEM_MB_RESET_N
PROPRIETARY NOTE
26,31
26,31
26,31
26,31
26,31
26,31
26,31
26,31
26,31
26,31
26,31
26,31
26,31
26,31
26,31
26,31
26,31
26,31
26,31
26,31
26,31
26,31
26,31
26,31
26,31
26,31
26,31
26,31
26,31
26,31
26,31
26,31
26,31
26,31
26,31
26,31
26,31
26,31
26,31
26,31
26,31
26,31
26,31
26,31
26,31
26,31
26,31
26,31
26,31
26,31
26,31
26,31
26,31
26,31
26,31
26,31
26,31
26,31
26,31
26,31
26,31
26,31
26,31
26,31
26,31
+MEM_CPU2
TITLE
DWG NO.
DATE
INC.
ROUND ROCK,TEXAS
SCHEM, PLN, SV, PE2970
FP975
SHEET
10/2/2008
1
2
3
4
REV.
A05
30 OF 120
C
DBA
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