MSI MS-9170 Schematic H3007_A02

A B C

Dell Controlled Print

D

12-5-2003_15:26

1

2

3

100/66/33

3.3V

PCI-X BUS 5

HOT

PCI-X BUS 4

PLUG

PCI7 - 3.3V

U121

CIOB-X CIOB-X

352 ABGA 352 ABGA

100/66/33

3.3V
64bit

PCI2 - 3.3VPCI6 - 3.3V

PCI3 - 3.3V

PCI BUS 1 - 64/66 3.3V

BREAKOUT ON i80303

BROADCOM

BCM5700

10/100/1000

MAC/MEM

388 PBGA

PCI-X BUS 3

HP CONTROL
FOR PCIX2
THRU PCIX7

FLOPPY/IDE

U123

HOT

PLUG

INTEL

U135

i80303

XOR/P2P/I20

64bit RAID

CONTROLLER

540 HL-PBGA

100/66/33

3.3V
64bit64bit

PCI4 - 3.3V

PCI5 - 3.3V

USB1
USB2

NOT HOT

PLUG

U134

PROCESSOR 1 - SKT603

PROCESSOR 2 - SKT603

IMB_B

IMB_A

U61

SOUTH
BRIDGE
"CSB5"

LPC BRIDGE
& IDE/USB

272 PBGA

PORTXX

DIMM_RAID

BATTERY

16MBx8 RAID

FLASH

FOSTER/PRESTONIA HOST BUS

U118

ADDR DOUBLE PUMPED, DATA QUAD PUMPED

SERVERWORKS

GCHE "CMIC"

CHAMPION MEMORY

& I/O CONTROLLER

899 FCBGA

THIN IMB_D

8MBx8

SYSTEM

PC100 UNBUFFERED DIMM

FLASH

U26

EMBEDDED LPC BUS

NATIONAL

PC87414

SUPER I/O

U129

& RTC

VGA

VRM1(9.1)

VRM2(9.1)

MEMORY CARDS SUPPORT TWELVE

PC200 REG DDR DIMMS(MIN 512MB/MAX 12GB)

MEMORY CARD SLOTS

REMC

U117

NOT HOT PLUG

PCI BUS 0 - 32/33 5V

PCI1 - 5V

ADAPTEC

AIC-7890

32bit ULTRA2

SE/LVD

272 BGA

SCSI_C

COM1

U62

RAGE XL

272 BGA

U78

8MB

SDRAM

DRAC3 SLOT

ATI

VGA

FLOPPY/IDE
PARALLEL

MOUSE
KEYBD

U96 U25

QLOGIC

Zircon

BMC

160 LQFP

REV

X00 9/8/03

A01
A02

MECA

MECB

INTEL
82559

10/100 ENET

196 BGA

MAG

ENET_100Mb

U147

ESM3

REVISIONS

DESCRIPTIONECO DATE

Changes from F0055 - A01
152750A00 11/11/03
155050 12/4/03

Promotion to A00 from X00

Corrected and Updated A00 SCH

Component change to correct manufac issue

12/5/03155112

TABLE OF CONTENTS

BLOCK DIAGRAMPage 1.
Page 2. CLOCK DIAGRAM
Page 3. RESET DIAGRAM & PCI DEVICES CHART

CLOCKS & PCI-X CLK BUFFERPage 4.
Page 5. PROCESSORS
Page 6.
Page 7. PROCESSORS
Page 8.
Page 9.
Page 10.
Page 11.
Page 12.
Page 13.
Page 14.
Page 15.
Page 16.
Page 17.
Page 18.
Page 19.
Page 20.
Page 21.
Page 22.
Page 23.
Page 24.
Page 25.
Page 26.
Page 27.
Page 28.
Page 29.
Page 30.
Page 31.
Page 32.
Page 33.
Page 34.

Page 36.
Page 37.
Page 38.
Page 39.
Page 40.
Page 41.

Page 44.
Page 45.
Page 46.
Page 47. AIC-7890
Page 48. RAGE XL VIDEO
Page 49. RAGE XL VIDEO CONTINUED
Page 50. INTEL 82559 10/100 ENET
Page 51.
Page 52.
Page 53.
Page 54.
Page 55.
Page 56.
Page 57.
Page 58.
Page 59.
Page 60.
Page 61.
Page 62. Spares
Page 63 Schematic Revisions Overview

PROCESSORS

VRM

ITP 32 & LEVEL TRANSLATION CIRCUITS

CMIC

CMIC

REMC PLL

MEC A

MEC B

REMC

REMC RESISTORS & PCI-X BUFFERS

CIOB 1

HOTPLUG SLOT 2

PCI-X 100/66/33 SLOTS 2

HOTPLUG SLOT 3

PCI-X 100/66/33 SLOTS 3

BROADCOM 5700 10/100/1000 MAC

BROADCOM 5401 PHY

INTEL 80303 "ZION" RAID PROCESSOR

RAID CONTINUED

RAID CONTINUED, DEBUG CIRCUITS

ADAPTEC AIC-7899 U160 SCSI

AIC-7899 CONTINUED

U160 SCSI TERMINATION & CONNECTORS

CIOB 2

HOTPLUG SLOT 4

PCI-X 100/66/33 SLOTS 4

HOTPLUG SLOT 5

PCI-X 100/66/33 SLOTS 5

HOTPLUG SLOT 6Page 35.

PCI-X 100/66/33 SLOTS 6

HOTPLUG SLOT 7

PCI-X 100/66/33 SLOTS 7

CSB5

PIRQ SERIALIZING & X-BUS LATCH

SYSTEM CPLD

IDE, USB, ETCPage 42.

SYSTEM FLASHPage 43.

SIO

PARALLEL PORT, SERIAL PORTS

PCI 32/33 SLOT 1

ESM3: Zircon and CPLD

ESM3: Memory

ESM3: Misc

ESM3: Fans, Analog

Hotplug PCI FPGA

RAID Battery Charger

Backplane, CtrlPnl, Buttons, Etc.

VR FOR 2.5V

3.3V_AUX VR, PCIRST CIRCUITS

PowerGood Circuit

Decoupling, Power Conns

APPROVED

1

2

3

10/100/1000

4

DOUBLE BOXED
MEANS HEATSINK

IS REQUIRED

BCM5401

PHY

256 TBGA

MAG

ENET_1Gb

U27

PCI BUS 2 - 64/66 3.3V

ADAPTEC

AIC-7899W

PIN FOR PIN COMPATIBLE PART

DUAL U160

SE/LVD

456 BGA

SCSI_A SCSI_B

Directory: R: \ Schematic_Projects\ PowerEdge\ Jaguar \ Planar_H3007\ A02

EXPORT RESTRICTION:

THE EXPORT OF THE INFORMATION, SCHEMATICS AND OTHER TECHNICAL DATA CONTAINED IN THIS DOCUMENT
IS CONTROLLED BY THE U.S. GOVERNMENT. THE EXPORT, DEEMED EXPORT OR OTHER TRANSFER OF THIS DATA
TO CERTAIN COUNTRIES AND INDIVIDUALS IS RESTRICTED. ANY TRANSFER, EXPORT OR REEXPORT, MUST BE
IN COMPLIANCE WITH THE U.S. EXPORT ADMINISTRATION REGULATIONS.

U156

FOR MIGRATION PLAN
TO AIC-7902 FOR DUAL U320

128 PQFP

U20

COM2

PWA:

PWB:

SCHEM:

ASSY DWG:

H3009
H3008
H3007
H3006

PROPRIETARY NOTE

THIS ITEM IS THE PROPERTY OF DELL COMPUTER CORP. AUSTIN, TEXAS
AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS
ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL COMPUTER
CORP., EXCEPT AS AUTHORIZED BY DELL COMPUTER CORP., AND THEN
ONLY BY WAY OF LOAN FOR LIMITED PURPOSES. IT MUST NOT BE
REPRODUCED IN WHOLE OR IN PART AND MUST BE RETURNED TO DELL
COMPUTER CORP. UPON REQUEST AND IN ALL EVENTS UPON COMPLETION
OF THE PURPOSE OF THE LOAN. NEITHER THIS ITEM NOR THE
INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO PERSONS
NOT HAVING A NEED FOR SUCH USE OR DISCLOSURE CONSISTENT WITH
THE PURPOSE OF THE LOAN WITHOUT THE PRIOR WRITTEN CONSENT OF
DELL COMPUTER CORPORATION.

NVRAMFLASH

8MBx16

U160 U148

128KB

JAGUAR PLANAR

DRAWN

DESIGNED

CHECKED

APPROVED

APPROVED

APPROVED

APPROVED

RELEASED

Haseeb Bhutta

SHAWN DUBE,LIBBY MCTEER,WILL SMITH,ROBERTO LAGO
KEVIN MILLER,CLAY PHENNICIE

Danny King

12/5/03
10/25/02
12/5/03

XLBOM Build option table

0 Production Build
9 Prototype Build

A CURRENT ISSUE OF THIS DRAWING MUST

INCLUDE A COPY OF THE FOLLOWING

ECO'S:

ECO

ECO

ECO

ECO

ECO

ECO

ECO

ECO

TITLE

DWG NO.

134552 11/3/02
152750 11/11/03

155050 12/4/03

SCHEM,PLN,PE4600,2P

DATE
DATE
DATE
DATE
DATE
DATE
DATE
DATE

COMPUTER
CORPORATION
AUSTIN,TEXAS

H3007

DATE

SHEET

12/5/03155112

4

REV.

A02

1 OF 6312/5/2003

DCBA

B D

CA

12-5-2003_10:50

1

14.318MHZ
XTAL

100MHZ

DIFF CLKS

14.318 MHZ

14.318 MHZ

CPU CLK
CPU CLK
CPU CLK

CPU CLK
CPU CLK

CPU CLK
CPU CLK
CPU CLK

33.3 MHZ

CSB5

FOSTER

PROCESSOR

1

FOSTER

PROCESSOR

2

GCHE
CMIC

IMB CLK_A
IMB CLK_B IMB CLK_A
IMB CLK_C
IMB CLK_D

CIOB-X

CLOCK DISTRIBUTION

BLOCK DIAGRAM

TI CDCV304

FETSWITCH

BUFFER

100/66/33MHZ

100/66/33MHZ

PCICLKIN

PCICLKFB

1

PCIX SLOT 7

PCIX SLOT 6

2

RCC_SYN

48 MHZ
48 MHZ

MECA

MECB

REMC AP

ITP32B

CLKIN

TI CDCV304

BUFFER

100/66/33MHZ

100/66/33MHZ

PCICLKIN

FETSWITCH

PCIX SLOT 3

PCIX SLOT 2

2

PCICLKIN

PCICLKFB

100/66/33MHZ

100/66/33MHZ

BUFFER

PCIX SLOT 5

PCIX SLOT 4

2

FETSWITCH

AUX_POWER

32KHZ

XTAL

97414

CSB5

USB

PCICLK

PCICLK

IMB CLK_B

CIOB-X

1

TI CDCV304

PCICLKFB

PCICLKIN

PCICLKFB

66MHZ

BROADCOM

BCM5700

BROADCOM

BCM5401

1Gb PHY

125 MHZ

TI CDCV304

25MHZ

XTAL

100MHZ
100MHZ
100MHZ
100MHZ

3

10 MHZ

OSC

AUX_POWER

QLOGIC

BMC

10MHZ

QLOGIC BMC

PCICLK
PCICLK
PCICLK

PCICLK

PCICLK

PCICLK

BUFFER

NATIONAL

PC87417

ADAPTEC

7890

66MHZ

INTEL
i80303
(ZION)

66MHZ

3

ADAPTEC

7899

RAID_MEMORY

XILINX

14.318MHZ
XTAL

ALWAYS

ON

25MHZ

25MHZ

20MHZ

40MHZ

40MHZ

BROADCOM 5700

INTEL 559

CIRRUS 8900A EMP NIC

ADAPTEC 7899

ADAPTEC 7890

PHILIPS PCK2001M

LOW SKEW BUFFER

PCICLK

PCICLK

PCICLK_IRQ0

PCICLK_IRQ1

PCICLK_IRQ2

PCICLK_IRQ3

ATI

RAGE XL

VGA

INTEL
82559

10/100 LOM

PCI SLOT 1

cPLD

25MHZ

XTAL

40 MHZ

40 MHZ

OSC

QLOGIC

14.31818MHZ
ATI RAGE XL

BMC

(80 MHZ NEEDED FOR AIC-7902)

4 4

XILINX

cPLD

(40 MHZ NEEDED FOR AIC-7899 & AIC-7890)

USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT THE PRIOR WRITTEN CONSENT OF DELL COMPUTER CORPORATION.

LOAN. NEITHER THIS ITEM OR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH

OR IN PART AND MUST BE RETURNED TO DELL COMPUTER CORP. UPON REQUEST AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF THE

AS AUTHORIZED BY DELL COMPUTER CORP., AND THEN ONLY BY WAY OF LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE

AND TRADE SECRET INFORMATION. THIS ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL COMPUTER CORP. EXCEPT

PROPRIETARY NOTE: THIS ITEM IS THE PROPERTY OF DELL COMPUTER CORP. AUSTIN, TEXAS AND CONTAINS CONFIDENTIAL

CY2922-????

COMPUTER
CORPORATION

AUSTIN,TEXAS

TITLE

48 MHZ

14.318 MHZ

SCHEM,PLN,PE4600,2P

CSB5

REPLACES FIVE CRYSTALS/OSCILLATORS

A B

IMB CLK_D

LPC_CLK

33.3MHZ

DWG NO.

DATE

DC

H3007

SHEET

12/5/2003

REV.

A02

2 OF 63

To do:

B D

CA

I2C CHART & MAP

12-5-2003_10:50

1

Move RN150 silkscreen up

SAMPLE LAYOUT OF BOARD BELOW

32bit/33MHZ

PCI

5V

SYSTEM BOARD

SIO

FLOPPY/IDE

7890

SCSI_C

MSE/
KYBDPARALLEL

FLASH

i559

CSB5

ENET_100/

USB

ENET_1GB

5401

VGA

XL

CLKS

PCI1

PCIX2

64bit/100MHZ

PCI 3.3V

PCIX3

PCIX4

PCIX5

PCIX6

PCIX7

ADD SEG DEVICE
A0 0 Memory CPU 1

A2 0 Memory CPU 2
30 0 Thermal Sensor CPU 1
32 0 Thermal Sensor CPU 2
C0 0 CMIC Function 0 *
C2 0 CMIC Function 1 *
C4 0 CMIC Function 2 *
C6 0 CMIC Function 3 *
C8 0 CIOB 1 *
CA 0 CIOB 2 *
CC 0 CIOB 3 - RSVD IMB_EXP *
B0 0 CSB5
C0 0 REMC AP *

1

CMIC

REMC

VRM_1

PROC_1 PROC_2

VRM_2

PWR1 PWR2 PWR3

MEC_A

MEC_B

CIOB30

1

ZION

RAID_DIMM

FLASH

5700

BACKPLANE

RESET BLOCK DIAGRAM & PCI DEVICES CHART

7899

CIOB30

SCSI_ASCSI_B

2

FLASH

ESM3

90 0 lm75 planar
98 0 lm75 ambient
AA 0 Control panel
A8 0 CPU card
5E 2 PSPB LM81
AA 2 PDB
14 2 PDB device
A0 2 PS 1
A2 2 PS 2
A4 2 PS 3
A6 2 PS 4
AE 2 AC Switch
A0 1 system event log
AE 1 RAID DIMM (If Present)

2

32BIT PCI DEVICES - BUS 0 - INTERRUPTS

D#
17 0,2
16
15

14
8
6

4 82559 10/100 ETHERNETPCI0_AD20
0 -- CMIC

PCI DEVICES SCANNED

LOW TO HIGH

F#

0,2
0-6

2,3

--

--

(PCI0_AD31)

PCI0_AD30
PCI0_AD24
PCI0_AD22

CIOB-X 2(BUS 4 & 5)
CIOB-X 1(BUS 1 & 3)
CSB5 (SOUTH BRIDGE)

ATI RAGE XL PCI VIDEO
PCI SLOT 1 (PCI1)
ULTRA2 SCSI AIC-7890

4TH3RD2ND1STDEVICEIDSEL

--

--

-- -- --

--

------

------

-- -- -- -­PIRQ_0 PIRQ_1

PIRQ_2
PIRQ_3

-- -- --

-- -- --

PIRQ_0 PIRQ_1

-- -- --0,1,

--

REQ/GNT

5
4
3
2
1
0

REQ/GNT

PCIX5 BUS DEVICE

SPARE
SPARE
SPARE
SPARE
PCIX SLOT 7
PCIX SLOT 6

PCIX4 BUS DEVICE

AA 5 ROMB
AC 0 Mem card A
9C 0 Mem card A temp
AC 4 Mem card B
9C 4 Mem card B temp
A8 4 I/O card
E0 4 hot-plug device
EB 3 REMC DP0
EA 3 REMC DP1
EC 7 REMC DP2
EE 7 REMC DP3
A0 3 DIMM 1 Card A
A2 3 DIMM 2 Card A
A4 3 DIMM 3 Card A
A6 3 DIMM 4 Card A
A8 3 DIMM 5 Card A
AA 3 DIMM 6 Card A
AC 3 DIMM 7 Card A
AE 3 DIMM 8 Card A
D2 3 Memory CLKBUF 1
D2 7 Memory CLKBUF 2

2

3

64BIT PCI DEVICES - BUS 1 - INTERRUPTS

D#

8
6

F#

0,1

PCI1_AD24
PCI1_AD22

INTEL GC80303
BROADCOM 5700 1Gb NIC

64BIT PCI DEVICES - BUS 2 - INTERRUPTS

D#

6

F#

0,1

IDSEL DEVICE 1ST 2ND 3RD 4TH

PCI2_AD22

ULTRA160 SCSI AIC-7899

64BIT PCIX DEVICES - BUS 3 - INTERRUPTS

D#

F#

PIRQ_4 PIRQ_5
PIRQ_6

SIRQ_0(A) SIRQ_1(B)

2ND1ST 4TH3RDDEVICEIDSEL

4TH3RD2ND1STDEVICEIDSEL

-- --

------

5 SPARE

SPARE4

3
2
1
0

REQ/GNT

5
4
3
2
1
0

----

REQ/GNT

5 SPARE
4
3
2
1
0

SPARE
SPARE
PCIX SLOT 5
PCIX SLOT 4

PCIX3 BUS DEVICE

SPARE
SPARE
SPARE
SPARE
PCIX SLOT 3
PCIX SLOT 2

PCI2 BUS DEVICE

SPARE
SPARE
SPARE
SPARE
AIC-7899

A0 7 DIMM 1 Card B
A2 7 DIMM 2 Card B
A4 7 DIMM 3 Card B
A6 7 DIMM 4 Card B
A8 7 DIMM 5 Card B
AA 7 DIMM 6 Card B
AC 7 DIMM 7 Card B
AE 7 DIMM 8 Card B

* Removed, but can be reinserted

by reinstalling QB14 & QB 15

3

8
6

PCIX3_AD24
PCIX3_AD22

PCIX SLOT 3 (PCIX3)
PCIX SLOT 2 (PCIX2)

PIRQ_7 PIRQ_8 PIRQ_9 PIRQ_10
PIRQ_11 PIRQ_13

PIRQ_12

PIRQ_14

64BIT PCIX DEVICES - BUS 4 - INTERRUPTS

D#

F#

8
6

4 4

IDSEL DEVICE 3RD

PCIX4_AD24
PCIX4_AD22

PCIX SLOT 5 (PCIX5)
PCIX SLOT 4 (PCIX4)

PIRQ_15 PIRQ_16 PIRQ_17 PIRQ_18
PIRQ_19 PIRQ_20 PIRQ_21 PIRQ_22

4TH1ST 2ND

REQ/GNT

4 SPARE

3
2
1
0

REQ/GNT

4 RESERVED
3
2
1
0

PCI1 BUS DEVICE

SPARE5

SPARE
SPARE
INTEL GC80303 ZION
BROADCOM 5700 1Gb

PCI0 BUS DEVICE

AIC-7890
INTEL i82559 10/100
ATI RAGE XL VGA
PCI SLOT 1

64BIT PCIX DEVICES - BUS 5 - INTERRUPTS

D#

F#

2ND1ST 4TH3RDDEVICEIDSEL

COMPUTER
CORPORATION

8
6

PCIX5_AD24
PCIX5_AD22

PCI DEVICES CHART -- THREE XIOAPIC'S! INPUTS FOR 2ND & 3RD BELOW

PCIX SLOT 7 (PCIX7)
PCIX SLOT 6 (PCIX6)

PIRQ_31 IS SPARE!

PIRQ_23 PIRQ_24 PIRQ_25 PIRQ_26
PIRQ_27 PIRQ_28 PIRQ_29

A B

PIRQ_30

PROPRIETARY NOTE: THIS ITEM IS THE PROPERTY OF DELL COMPUTER CORP. AUSTIN, TEXAS AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL COMPUTER CORP. EXCEPT
AS AUTHORIZED BY DELL COMPUTER CORP., AND THEN ONLY BY WAY OF LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE
OR IN PART AND MUST BE RETURNED TO DELL COMPUTER CORP. UPON REQUEST AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF THE
LOAN. NEITHER THIS ITEM OR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH
USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT THE PRIOR WRITTEN CONSENT OF DELL COMPUTER CORPORATION.

TITLE

DWG NO.

DATE

DC

AUSTIN,TEXAS

SCHEM,PLN,PE4600,2P

H3007

SHEET

12/5/2003

REV.

A02

3 OF 63

1

+3.3V

R321

10K-5%

R270

10K-5%

R318

10K-5%

R326

10K-5%

21

21

21

21

NP*

NP*

R275

1 2

10K-5%

NP*

R314

1 2

10K-5%

R276

1 2

10K-5%

R271

1 2

10K-5%

NP*

NP*

R325

1 2

R274

1K-5%

21

ROOM=MAIN_SYN

21

R269

1K-5%

R315

1K-5%

1 2

220

21

R319

NP*

220

21

R277

NP*

220

R327

1 2

NP*

220

CK_14M_CSB_R

CK_48M_SIO_R

CK_48M_USB_R

SYN_MULTSEL0

SYN_MULTSEL1

SYN_PWRDN

SPREAD

2 1

SUB*_20272

R272

ADD*_81526

220

1 2

4

4

4

4

4

4,41

GPI_SPREAD_EN

GPI_SYN_SEL100

12

SEL100

NP*

R273

22-5%

4,44

4,44

21

1 2

R267

22-5%

R279

1 2

R322

22-5%

B D

ROOM=MAIN_SYN

21

CK_14M_CSB

CK_48M_SIO

CK_48M_USB

CK_33M_PBUF2

39

44

39

4

ROOM=MAIN_SYN_TOP

CA

DIFF PAIR GUIDELINE: 6MIL TRACE/14MIL SPACING

12-5-2003_10:50

ROOMS COMPLETE

1

2

SPREAD IN = SPREAD ENABLED
SPREAD OUT = SPREAD DISABLED

SEL100 IN = 100MHZ
SEL100 OUT = 133MHZ

MULTSEL0 & MULTSEL1 SELECTION

0 0 60ohm, 0.71V
0 1 50ohm, 0.71V

SELA & SELB SELECTION

0 0 H=100M,ACTIVE MODE
1 1 ALL CLOCKS TRI-STATED

+3.3V

L35

21

600mA

21

C275

+3.3V

4.7uF

C277

6.3V-10%

1 2

.01uF 50V.01uF 50V

21

CB331

4.7uF

CB319

6.3V-10%

1 2

1 2

CB330

0.1uF 16V0.1uF 16V

21

CB324

0.1uF 16V

390pF

50V-10%

C314

10pF

1 2

NP*

1 2

CB322

SUB*_32JGM

20272 IS A 2X4

SYN_XIN1
SYN_XIN2

X4

21

14.31818MHz

R323

12

1M-5%

NP*

21

50V-5%

3300pF

50V-20%

C315

NP*

21

CB325

R324

10pF

50V-5%

21

CB315

0.1uF 16V

475-1%

1 2

CB345

0.1uF 16V

4

4

4

21

0.1uF 16V

4,44

4,44

4,41

V_3P3_SYN1

CK_33M_PCI_R

GPI_SYN_SEL100

CK_14M_CSB_R

SYN_IREF_26

CK_48M_USB_R
CK_48M_SIO_R

SYN_MULTSEL0

4

SYN_MULTSEL1

4

GPI_SPREAD_EN

SYN_PWRDN

22-5%

U97

22 7

XIN HCLK0

23

XOUT

1

CLK33

48

SEL100/133

19

REF

26

IREF

3

3V48/SELA

4

3V48B/SELB

30

MULTISEL0

29

MULTISEL1

20

SPREAD

44

PWRDWN

2

VDD0

6

VDD1

12

VDD2

18

VDD3

24

VDD4

25

VDD5

31

VDD6

37

VDD7

43

VDD8

46

VDD9

CDC950/9248
TSSOP48
SUB*_4C853

HCLKB0

HCLK1

HCLKB1

HCLK2

HCLKB2

HCLK3

HCLKB3

HCLK4

HCLKB4

HCLK5

HCLKB5

HCLK6

HCLKB6

HCLK7

HCLKB7

GND0
GND1
GND2
GND3
GND4
GND5
GND6
GND7
GND8
GND9

8

10
11

13
14

16
17

42
41

39
38

36
35

33
32

5
9
15
21
27
28
34
40
45
47

R_CK_100M_MECA_P

R_CK_100M_MECA_N

R_CK_100M_AP_P

R_CK_100M_AP_N

R_CK_100M_ITP

R_CK_100M_ITP

R_CK_100M_MECB_P

R_CK_100M_MECB_N

R_CK_100M_CMIC

R_CK_100M_CMIC

NC_CK_100M_SYN33
NC_CK_100M_SYN32

R_CK_100M_CPU0

R_CK_100M_CPU0

R_CK_100M_CPU1

R_CK_100M_CPU1

R283

22-5%

R301

1 2

22-5%

R309

22-5%

R317

1 2

22-5%

R284

1

22-5%

R302

1 2

22-5%

R310

1 2

22-5%

1 2

21

1 2

21

1 2

2

1 2

R278

22-5%

R287

22-5%

R305

22-5%

R313

22-5%

R281

22-5%

R288

22-5%

R306

22-5%

MATCH LENGTH OF ALL THESE CLOCKS
ALL OF BELOW ARE 5W RULE

CK_100M_CPU0

CK_100M_CPU0

21

21

21

21

R280

49.9-1%

R286

21

49.9-1%

21

R304

49.9-1%

R312

21

49.9-1%

21

R418

49.9-1%

21

R289

49.9-1%

CK_100M_AP_FIRST_P

CK_100M_AP_FIRST_N

21

R307

49.9-1%

CK_100M_CPU1

CK_100M_CPU1

CK_100M_MECA_P

CK_100M_MECA_N

CK_100M_ITP

CK_100M_ITP

CK_100M_MECB_P

CK_100M_MECB_N

CK_100M_CMIC

CK_100M_CMIC

5

5

5

5

13

13

12

12

9

9

14

14

11

11

2

ROOM=PCI_BUF1

ROOM=PCI_BUF1_TOP

3

21

C276

4.7uF

C278

6.3V-10%

1 2

L36

1 2

600mA

21

CB300

4.7uF

CB301

6.3V-10%

V_3P3_SYN2

21

390pF

1 2

CB344

50V-10%

21

CB313

3300pF

SUB*_32JGM

50V-20%

1 2

CB308

0.1uF 16V

4C853 IS TSSOP48 ONLY

21

R282

49.9-1%

21

R300

49.9-1%

R308

21

49.9-1%

21

R316

49.9-1%

R285

21

49.9-1%

21

R303

49.9-1%

21

R311

49.9-1%

4C853 RCC_SYN (TSSOP48) IS:

TI CDC950DGG
ICS ICS9248AG-150
PHILIPS PCK2022RDGG
PERICOM PI6C210A

R328

ROOM=PCI_BUF2_TOP

MATCH ALL BELOW CLOCK LENGTHS (SLOTS WILL BE SHORTER)

CK_33M_NICCSB5_R 21

R329

21

22-5%

22-5%

R334

CK_33M_NIC100

CK_33M_CSB5

DELAY_RULE=::1.200N:1.300N
CK_33M_CIOB1

21

50

39

17

3

R361

+3.3V

KLM_X04 -- DELETED EMPNIC RESISTOR R2010

L48

V_3P3_PCK

600mA

21

1 2

CB387

+3.3V_AUX

R398

39,44

4 4

CSB_SLP_S5

14.31818MHz

NP*

15pF 50V

C367

1 2

X6

1 2

R391

1M-5%

0-5%

12

15pF 50V

C369

PER_CLK_XIN
PER_CLK_XOUT

R394

1 2

NP*

8.2K-5%

EN_SLP_S5

+3.3V_AUX

21

R386

P#5E714 IS CY2292SL-1N2 (HAS 20MHZ)
OLD P#12MWW IS CY2292SL-1M1

8.2K-5%
4

XTALIN

5

XTALOUT

15

S2/SUSPEND*

13

S1

12

S0

16

SHUTDWN*/OE

3

GND3

11

GND11

ROOM=PER_CLK

U119

CY2292SL-319

Peripheral CLK

SUB=SUB*_5E714

VDD2

VDD14

XBUF

CPUCLK

CLKA
CLKB
CLKC
CLKD

2
14
6
8
10
9
1
7

CK_14M_XLSYN_R

CK_40M_7890SYN_R

CK_25M_I559SYN_R

CK_20M_CPLD_R CK_20M_CPLD

CK_10M_ZIRCONSYN_R

CB388

0.1uF 16V

CB382

0.1uF 16V

4.7uF

1 2

R187

33-5%

R407

1 2

33-5%

R401

33-5%

R406

22-5%

R385

1 2

33-5%

12

CB383

6.3V-10%

CK_14M_XLSYN

21

CK_40M_7890SYN

CK_25M_I559SYN

21

NP*

21

CK_10M_ZIRCONSYN

.01uF 50V

+3.3V_AUX

21

12

C362

.01uF 50V

21

CB367

48

47

50

41

51

4.7uF

C352

6.3V-10%

1 2

1 2

.01uF 50V

L40

600mA

21

CB359

4.7uF

CB358

6.3V-10%

21

0.1uF 16V

V_3P3_PBUF2

21

CB350

390pF

50V-10%

1 2

CB349

3300pF

SUB*_32JGM

1 2

CB357

50V-20%

1 2

CB346

0.1uF 16V

.01uF 50V

1 2

CB347

.01uF 50V

4

ROOM=PCI_BUF2

R364

10K-5%

R366

10K-5%

NP*

SP_R10K_2

CK_33M_PBUF2

21

21

R363

10K-5%

1

VDD0

5

VDD1

10

VDD2

19

VDD3

24

VDD4

28

VDD5

14

SDATA

21

15

9

4

8
12
17
21
25

SCLOCK

BUF_IN

VSS0
VSS1
VSS2
VSS3
VSS4
VSS5

W40S11_02

SUB*_2204T

10K-5%

U110

21

VDDIIC

OE

SDRAM0
SDRAM1
SDRAM2
SDRAM3
SDRAM4
SDRAM5
SDRAM6
SDRAM7
SDRAM8
SDRAM9

VSSIIC

PBUF2_OE

13

20

2
3
6
7
22
23
26
27
11
18

16

CK_33M_CIOBS_R

CK_33M_7890SIO_R

CK_33M_HPCVIDEO_R

CK_33M_ZIRCON_CPLD_R

CK_33M_SLOT1_R

CK_33M_PIRQ01_R

CK_33M_PIRQ23_R

SP_CK_33M_CKBF_11

SP_CK_33M_CKBF_18

R335

21

22-5%

R346

21

22-5%

R352

21

22-5%

R353

21

22-5%

R336

21

22-5%

R331

1 2

22-5%

22-5%

R347

1 2

22-5%

R360

1 2

22-5%

R348

1 2

22-5%

R337

1 2

22-5%

R330

22-5%

DELAY_RULE=::1.200N:1.300N
CK_33M_CIOB2

CK_33M_7890

CK_33M_SIO

CK_33M_HPC

CK_33M_VIDEO

CK_33M_ZIRCON

CK_33M_SLOT1

CK_33M_PIRQ0

CK_33M_PIRQ1

CK_33M_PIRQ2

CK_33M_PIRQ3

21

30

47

44

55

48

51

46

40

40

40

40

12

NP*

12

NP*

P#12MWW USED TO BE CY2292SL-1E5 & ALSO CY2292SL-1K6 & ALSO CY2292SL-1M1
????? IS: CY2292SL-1M1 & ICS ?????

OLD P#57846 IS CY2292F BLANK IF NEEDED

CK_40M_7899SYN_R

ROOM=PER_CLK

PLAN IS TO REMOVE AS MANY DISCRETE XTALS & OSC AS POSSIBLE WHERE POSSIBLE

A B

R402

1 2

33-5%

ROOM=PER_CLK_TOP

CK_40M_7899SYN

27

2204T CKBUF_M (SSOP28) IS:

CYPRESS W40S11-02
PERICOM PI6C182AH
ICS ICS9279AF-03

PROPRIETARY NOTE: THIS ITEM IS THE PROPERTY OF DELL COMPUTER CORP. AUSTIN, TEXAS AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL COMPUTER CORP. EXCEPT
AS AUTHORIZED BY DELL COMPUTER CORP., AND THEN ONLY BY WAY OF LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE
OR IN PART AND MUST BE RETURNED TO DELL COMPUTER CORP. UPON REQUEST AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF THE
LOAN. NEITHER THIS ITEM OR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH
USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT THE PRIOR WRITTEN CONSENT OF DELL COMPUTER CORPORATION.

CLOCK CHIPS

TITLE

DWG NO.

DATE

DC

COMPUTER
CORPORATION

AUSTIN,TEXAS

SCHEM,PLN,PE4600,2P

H3007

SHEET

12/5/2003

REV.

A02

4 OF 63

B D

CA

12-5-2003_10:50

1

2

3

ROOM=PROC_1

5,10

5,10

5,10

5,10

5,10

5,10

5,10

5,10

5,10

5,10

5,10

5,10

5,10

5,10

5,10

5,10

5,10

5,10

5,10

5,10

5,10

5,10

5,10

5,10

5,10

5,10

5,10

5,10

5,10

5,10

5,10

5,10

5,10

5,10

5,10

5,10

5,10

5,10

5,10

5,10

5,10

5,10

5,10

5,10

5,10

5,10

5,10

5,10

5,10

5,10

5,10

5,10

5,10

5,10

5,10

5,10

5,41

5,41

5,39

5,39

5,39

5,44

5,9,11

5,41

5,41

H_A3
H_A4
H_A5
H_A6
H_A7
H_A8
H_A9
H_A10
H_A11
H_A12
H_A13
H_A14
H_A15
H_A16
H_A17
H_A18
H_A19
H_A20
H_A21
H_A22
H_A23
H_A24
H_A25
H_A26
H_A27
H_A28
H_A29
H_A30
H_A31
H_A32
H_A33
H_A34
H_A35

H_ADSTB0
H_ADSTB1

H_REQ0
H_REQ1
H_REQ2
H_REQ3
H_REQ4

H_ADS
H_AP0
H_AP1

H_BREQ0
H_BREQ1

5

H_BREQ23_PU

5

H_BREQ23_PU

5

H_BINIT
H0_IERR

5,9

H_BPRI
H_BNR
H_LOCK

H_HIT
H_HITM
H_DEFER

H_RS0
H_RS1
H_RS2
H_RSP
H_TRDY

H_A20M
H_FERR

5,9

H_IGNNE
H_SMI
H_STPCLK
H_SLP
H_INIT
H_RST

H_INTR
H_NMI

CK_100M_CPU0

4

CK_100M_CPU0

4

A22
A20
B18
C18
A19
C17
D17
A13
B16
B14
B13
A12
C15
C14
D16
D15
F15
A10
B10
B11
C12
E14
D13

A9

B8
E13
D12
C11

B7

A6

A7

C9

C8

F17
F14

B19
B21
C21
C20
B22

D19
E10

D9

D20
F12
E11
D10
F11

E5

D23
F20
A17

E22
A23
C23

E21
D22
F21

C6
E19

F27
E27
C26
C27

D4
AE6

D6

Y8

B24
G23

Y4

W5

PROC_1

A3
A4
A5
A6
A7
A8
A9
A10
A11
A12
A13
A14
A15
A16
A17
A18
A19
A20
A21
A22
A23
A24
A25
A26
A27
A28
A29
A30
A31
A32
A33
A34
A35

ADSTB0
ADSTB1

REQ0
REQ1
REQ2
REQ3
REQ4

ADS
AP0
AP1

BR0
BR1
BR2
BR3
BINIT
IERR

BPRI
BNR
LOCK

HIT
HITM
DEFER

RS0
RS1
RS2
RSP
TRDY

A20M
FERR
IGNNE
SMI
STPCLK
SLP
INIT
RESET

LINT0
LINT1

BCLK0
BCLK1

FOSTER DP REV 1.0

HETERO 1 OF 3

D0
D1
D2
D3
D4
D5
D6
D7
D8

D9
D10
D11
D12
D13
D14
D15
D16
D17
D18
D19
D20
D21
D22
D23
D24
D25
D26
D27
D28
D29
D30
D31
D32
D33
D34
D35
D36
D37
D38
D39
D40
D41
D42
D43
D44
D45
D46
D47
D48
D49
D50
D51
D52
D53
D54
D55
D56
D57
D58
D59
D60
D61
D62
D63

DP0
DP1
DP2
DP3

DSTBN0
DSTBN1
DSTBN2
DSTBN3

DSTBP0
DSTBP1
DSTBP2
DSTBP3

DBSY
DRDY

SUB*_0C997

Y26
AA27
Y24
AA25
AD27
Y23
AA24
AB26
AB25
AB23
AA22
AA21
AB20
AB22
AB19
AA19
AE26
AC26
AD25
AE25
AC24
AD24
AE23
AC23
AA18
AC20
AC21
AE22
AE20
AD21
AD19
AB17
AB16
AA16
AC17
AE13
AD18
AB15
AD13
AD14
AD11
AC12
AE10
AC11
AE9
AD10
AD8
AC9
AA13
AA14
AC14
AB12
AB13
AA11
AA10
AB10
AC8
AD7
AE7
AC6
AC5
AA8
Y9
AB6

AC18
AE19
AC15
AE17

Y21
Y18
Y15
Y12

Y20
Y17
Y14
Y11

F18
E18

H_DP0
H_DP1
H_DP2
H_DP3

H_DSTBN0
H_DSTBN1
H_DSTBN2
H_DSTBN3

H_DSTBP0
H_DSTBP1
H_DSTBP2
H_DSTBP3

H_DBSY
H_DRDY

NEW TOOL-LESS P#0C997

H_D0
H_D1
H_D2
H_D3
H_D4
H_D5
H_D6
H_D7
H_D8

H_D9
H_D10
H_D11
H_D12
H_D13
H_D14
H_D15
H_D16
H_D17
H_D18
H_D19
H_D20
H_D21
H_D22
H_D23
H_D24
H_D25
H_D26
H_D27
H_D28
H_D29
H_D30
H_D31
H_D32
H_D33
H_D34
H_D35
H_D36
H_D37
H_D38
H_D39
H_D40
H_D41
H_D42
H_D43
H_D44
H_D45
H_D46
H_D47
H_D48
H_D49
H_D50
H_D51
H_D52
H_D53
H_D54
H_D55
H_D56
H_D57
H_D58
H_D59
H_D60
H_D61
H_D62
H_D63

5,10

5,10

5,10

5,10

5,10

5,10

5,10

5,10

5,10

5,10

5,10

5,10

5,10

5,10

5,10

5,10

5,10

5,10

5,10

5,10

5,10

5,10

5,10

5,10

5,10

5,10

5,10

5,10

5,10

5,10

5,10

5,10

5,10

5,10

5,10

5,10

5,10

5,10

5,10

5,10

5,10

5,10

5,10

5,10

5,10

5,10

5,10

5,10

5,10

5,10

5,10

5,10

5,10

5,10

5,10

5,10

5,10

5,10

5,10

5,10

5,10

5,10

5,10

5,10

5,10

5,10

5,10

5,10

5,11

5,11

5,11

5,11

5,11

5,11

5,11

5,11

5,10

5,10

Swizzled.

5,10

5,10

5,10

5,10

5,10

5,10

5,10

5,10

5,10

5,10

5,10

5,10

5,10

5,10

5,10

5,10

5,10

5,10

5,10

5,10

5,10

5,10

5,10

5,10

5,10

5,10

5,10

5,10

5,10

5,10

5,10

5,10

5,10

5,10

5,10

5,10

5,10

5,10

5,10

5,10

5,10

5,10

5,10

5,10

5,10

5,9

5,10

5,10

5,10

5,10

5,10

5,10

5,10

5,10

5,10

5,10

5,10

5,41

5,9

5,41

5,39

5,39

5,39

5,44

5,9,11

5,41

5,41

H_A3
H_A4
H_A5
H_A6
H_A7
H_A8
H_A9
H_A10
H_A11
H_A12
H_A13
H_A14
H_A15
H_A16
H_A17
H_A18
H_A19
H_A20
H_A21
H_A22
H_A23
H_A24
H_A25
H_A26
H_A27
H_A28
H_A29
H_A30
H_A31
H_A32
H_A33
H_A34
H_A35

H_ADSTB0
H_ADSTB1

H_REQ0
H_REQ1
H_REQ2
H_REQ3
H_REQ4

H_ADS
H_AP0
H_AP1

H_BREQ1

5

H_BREQ0
H_BREQ23_PU

5

H_BREQ23_PU

5

H_BINIT
H1_IERR

H_BPRI
H_BNR
H_LOCK

H_HIT
H_HITM
H_DEFER

H_RS0
H_RS1
H_RS2
H_RSP
H_TRDY

H_A20M
H_FERR
H_IGNNE
H_SMI
H_STPCLK
H_SLP
H_INIT
H_RST

H_INTR
H_NMI

CK_100M_CPU1

4

CK_100M_CPU1

4

A22
A20
B18
C18
A19
C17
D17
A13
B16
B14
B13
A12
C15
C14
D16
D15
F15
A10
B10
B11
C12
E14
D13

A9

B8
E13
D12
C11

B7

A6

A7

C9

C8

F17
F14

B19
B21
C21
C20
B22

D19
E10

D9

D20
F12
E11
D10
F11

E5

D23
F20
A17

E22
A23
C23

E21
D22
F21

C6
E19

F27
E27
C26
C27

D4
AE6

D6

Y8

B24
G23

Y4

W5

PROC_2

A3
A4
A5
A6
A7
A8
A9
A10
A11
A12
A13
A14
A15
A16
A17
A18
A19
A20
A21
A22
A23
A24
A25
A26
A27
A28
A29
A30
A31
A32
A33
A34
A35

ADSTB0
ADSTB1

REQ0
REQ1
REQ2
REQ3
REQ4

ADS
AP0
AP1

BR0
BR1
BR2
BR3
BINIT
IERR

BPRI
BNR
LOCK

HIT
HITM
DEFER

RS0
RS1
RS2
RSP
TRDY

A20M
FERR
IGNNE
SMI
STPCLK
SLP
INIT
RESET

LINT0
LINT1

BCLK0
BCLK1

FOSTER DP REV 1.0

HETERO 1 OF 3

SUB*_0C997

D0
D1
D2
D3
D4
D5
D6
D7
D8

D9
D10
D11
D12
D13
D14
D15
D16
D17
D18
D19
D20
D21
D22
D23
D24
D25
D26
D27
D28
D29
D30
D31
D32
D33
D34
D35
D36
D37
D38
D39
D40
D41
D42
D43
D44
D45
D46
D47
D48
D49
D50
D51
D52
D53
D54
D55
D56
D57
D58
D59
D60
D61
D62
D63

DP0
DP1
DP2
DP3

DSTBN0
DSTBN1
DSTBN2
DSTBN3

DSTBP0
DSTBP1
DSTBP2
DSTBP3

DBSY
DRDY

ROOM=PROC_2OLD TOOL-REQUIRED P#07RGT

Y26
AA27
Y24
AA25
AD27
Y23
AA24
AB26
AB25
AB23
AA22
AA21
AB20
AB22
AB19
AA19
AE26
AC26
AD25
AE25
AC24
AD24
AE23
AC23
AA18
AC20
AC21
AE22
AE20
AD21
AD19
AB17
AB16
AA16
AC17
AE13
AD18
AB15
AD13
AD14
AD11
AC12
AE10
AC11
AE9
AD10
AD8
AC9
AA13
AA14
AC14
AB12
AB13
AA11
AA10
AB10
AC8
AD7
AE7
AC6
AC5
AA8
Y9
AB6

AC18
AE19
AC15
AE17

Y21
Y18
Y15
Y12

Y20
Y17
Y14
Y11

F18
E18

H_DP0
H_DP1
H_DP2
H_DP3

H_DSTBN0
H_DSTBN1
H_DSTBN2
H_DSTBN3

H_DSTBP0
H_DSTBP1
H_DSTBP2
H_DSTBP3

H_DBSY
H_DRDY

H_D0
H_D1
H_D2
H_D3
H_D4
H_D5
H_D6
H_D7
H_D8

H_D9
H_D10
H_D11
H_D12
H_D13
H_D14
H_D15
H_D16
H_D17
H_D18
H_D19
H_D20
H_D21
H_D22
H_D23
H_D24
H_D25
H_D26
H_D27
H_D28
H_D29
H_D30
H_D31
H_D32
H_D33
H_D34
H_D35
H_D36
H_D37
H_D38
H_D39
H_D40
H_D41
H_D42
H_D43
H_D44
H_D45
H_D46
H_D47
H_D48
H_D49
H_D50
H_D51
H_D52
H_D53
H_D54
H_D55
H_D56
H_D57
H_D58
H_D59
H_D60
H_D61
H_D62
H_D63

5,10

5,10

5,10

5,10

5,10

5,10

5,10

5,10

5,10

5,10

5,10

5,10

5,10

5,10

5,10

5,10

5,10

5,10

5,10

5,10

5,10

5,10

5,10

5,10

5,10

5,10

5,10

5,10

5,10

5,10

5,10

5,10

5,10

5,10

5,10

5,10

5,10

5,10

5,10

5,10

5,10

5,10

5,10

5,10

5,10

5,10

5,10

5,10

5,10

5,10

5,10

5,10

5,10

5,10

5,10

5,10

5,10

5,10

5,10

5,10

5,10

5,10

5,10

5,10

5,10

5,10

5,10

5,10

5,11

5,11

5,11

5,11

5,11

5,11

5,11

5,11

5,10

5,10

ROOM=PROC_1

VCORE

RB418

12

H0_THERMTRIP

56.2-1%
RB372

2 1

56.2-1%
RB383

2 1

56.2-1%

RB410

2 1

56.2-1%
RB453

56.2-1%
RB390

1 2

56.2-1%

RB368

1 2

301-1%

RB427

1 2

301-1%

RB428

1 2

301-1%

RB452

1 2

301-1%

RB344

1 2

301-1%

RB421

1 2

301-1%

RB425

1 2

301-1%

RB369

1 2

301-1%

RB334

1 2

301-1%

RB447

1 2

150-1%

RB380

1 2

150-1%

RB382

150-1%

RB381

1 2

150-1%

RB391

150-1%

RB435

40.2-1%

RB413

H1_THERMTRIP

H_FERR

H0_IERR

21

H1_IERR

H_A20M

H_IGNNE

H_SMI

H_STPCLK

H_SLP

H_INIT

H_INTR

H_NMI

H_PWRGOOD

21

21

21

21

H_BINIT

H_BNR

H_HITM

H_HIT

H_MCERR

H_BREQ1

6,9

6,9

5,9

ROOM=CSB

1

Put RB424 close to PROC_1

Put RB411 close to FET

5,9

5,9

5,41

5,41

5,39

5,39

5,39

2

5,44

5,41

5,41

6,60

5,10

5,10

Do need for termination!

5,10

5,10

6,9

ROOM=PROC_2

3

5

40.2-1%

RB414

21

40.2-1%

RB446

40.2-1%

R503

150-1%

RB417

1 2

150-1%

R502

150-1%

RB409

1 2

H_BREQ23_PU

12

21

21

H_BREQ0

C457

21

47pF
50V-5%
CB652

1 2

47pF
50V-5%

C456

21

47pF
50V-5%
CB642

1 2

5,10

0-OHM

SUB*_30661

0-OHM

SUB*_30661

0-OHM

SUB*_30661

0-OHM

5

H_BINIT

H_BNR

H_HIT

H_HITM

5,10

5,10

5,10

5,10

150-1%

47pF
50V-5%

SUB*_30661

4 4

PROCESSORS 1 & 2

COMPUTER
CORPORATION

AUSTIN,TEXAS

TITLE

SCHEM,PLN,PE4600,2P

PROPRIETARY NOTE: THIS ITEM IS THE PROPERTY OF DELL COMPUTER CORP. AUSTIN, TEXAS AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL COMPUTER CORP. EXCEPT
AS AUTHORIZED BY DELL COMPUTER CORP., AND THEN ONLY BY WAY OF LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE
OR IN PART AND MUST BE RETURNED TO DELL COMPUTER CORP. UPON REQUEST AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF THE
LOAN. NEITHER THIS ITEM OR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH
USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT THE PRIOR WRITTEN CONSENT OF DELL COMPUTER CORPORATION.

DWG NO.

DATE

H3007

REV.

A02

SHEET

5 OF 6312/5/2003

A B

DC

B D

CA

12-5-2003_10:50

1

2

3

VCORE

21

R491

R492

1 2

VCORE

21

R508

R509

1 2

PROC_1 GTL VREF

ROOM=PROC1_REF

49.9-1%100-1%
H0_GTLREF01

SUB*_83008

1 2

1 2

RB363

1K-1%
RB365

1K-1%
RB367

1K-1%
RB360

1K-1%
RB355

1K-1%
RB333

1K-1%
RB343

1K-1%

1uF

10V-10%

1uF

CB622

10V-10%

12

12

12

12

12

12

12

CB564

2 1

0.1uF 16V

H0_GTLREF23

2 1

0.1uF 16V

H0_TESTHI0

H0_TESTHI1

H0_TESTHI2

H0_TESTHI3

H0_TESTHI4

H0_TESTHI5

H0_TESTHI6

CB565

CB517

LM_X04--83008 sub for p/n consolidation

SUB*_83008

CB643

100-1% 49.9-1%

VCORE

21

21

CB621

220pF

50V-10%

220pF

50V-10%

21

CB522

21

CB644

6

6

6

6

6

6

6

6

Route <1.5" trace.
Place 220pf caps under CPU

220pF

50V-10%

6

Route <1.5" trace.
Place 220pf caps under CPU

220pF

50V-10%

GALLATIN SUPPORT

6

6,9

6,9

6,9

6,9

6,9

6,9

6,9

5,6,60

+3.3V

HEATSINK P#????? ***NOT PART OF PWA***
HEATSINK CLIPS P#83MGJ (2 PER PROC) ***NOT PART OF PWA***

1 2

8.2K-5%
RB339

HEATSINK CLIP PLASTIC BOAT P#52JXN (2 PER PROC)
PLASTIC BOAT SCREWS P#89JJP (4 PER PROC)

CPU_SMBALERT

ADD=ADD_52JXN_ASSYDWG
ADD1=ADD_52JXN_ASSYDWG
ADD2=ADD_89JJP_ASSYDWG
ADD3=ADD_89JJP_ASSYDWG
ADD4=ADD_89JJP_ASSYDWG
ADD5=ADD_89JJP_ASSYDWG
ADD6=ADD_92GXR_ASSYDWG

DUAL SCREW MOUNTING UNDERNEATH P#92GXR (1 PER PROC)
EMI CLIP P#?????

AMP TOOL-LESS SOCKET P#0C997

ROOM=PROC_1

12

CB521

0.1uF 16V

PROC_1

H_BPM02
H_BPM13

H_BPM4
H_BPM5

ITP_TDI_H0

9

ITP_TDO_H0

9

ITP_TMS
ITP_TRST

H_PWRGOOD

H0_GTLREF01

6

H0_GTLREF23

6

H0_TESTHI0

6

H0_TESTHI1

6

H0_TESTHI2

6

H0_TESTHI3

6

H0_TESTHI4

6

H0_TESTHI5

6

H0_TESTHI6

6

NC_H0_RSVD1 NC_H1_RSVD1
NC_H0_RSVD2
NC_H0_RSVD3
NC_H0_RSVD4
NC_H0_RSVD5

NC_H0_RSVD8

NC_H0_RSVD13

NC_H0_RSVD17

F6
F8
E7
F5
E8
E4

E24
C24
E25
A25
F24

AB7

W23

W9

F23

F9

W6
W7
W8

Y6
AA7
AD5
AE5

A1

A4
A15
A16
A26
A30
A31

B1

B4
B30
B31

C1

C5
C30
C31

D1
D25
D30
D31

E1
E30
E31

F1
F30
F31

G1
G30
G31

H1
H30
H31

J1
J30
J31

K1
K30
K31

L1
L30
L31

M1
M30
M31

N1
N30
N31

P1
P30
P31

R1
R30
R31

BPM0
BPM1
BPM2
BPM3
BPM4
BPM5

TCK
TDI
TDO
TMS
TRST

PWRGOOD

GTLREF0
GTLREF1
GTLREF2
GTLREF3

TESTHI0
TESTHI1
TESTHI2
TESTHI3
TESTHI4
TESTHI5
TESTHI6

RSVD1
RSVD2
RSVD3
RSVD4
RSVD5
RSVD6
RSVD7
RSVD8
RSVD9
RSVD10
RSVD11
RSVD12
RSVD13
RSVD14
RSVD15
RSVD16
RSVD17
RSVD18
RSVD19
RSVD20
RSVD21
RSVD22
RSVD23
RSVD24
RSVD25
RSVD26
RSVD27
RSVD28
RSVD29
RSVD30
RSVD31
RSVD32
RSVD33
RSVD34
RSVD35
RSVD36
RSVD37
RSVD38
RSVD39
RSVD40
RSVD41
RSVD42
RSVD43
RSVD44
RSVD45
RSVD46
RSVD47
RSVD48
RSVD49
RSVD50
RSVD51
RSVD52

DBI0
DBI1
DBI2
DBI3

VCCA
VCCIOPLL
VCCSENSE

VSSA
VSSSENSE

MCERR
ODTEN

PROCHOT

SKTOCC

THERMTRIP

COMP0
COMP1

VID0

VID1

VID2

VID3

VID4

SM_VCC1
SM_VCC2

SM_ALERT

SM_CLK

SM_DATA

SM_WP
SM_EP_A0
SM_EP_A1
SM_EP_A2
SM_TS_A0
SM_TS_A1

RSVD89
RSVD53
RSVD54
RSVD55
RSVD56
RSVD57
RSVD58
RSVD59
RSVD60
RSVD61
RSVD62
RSVD63
RSVD64
RSVD65

RSVD66
RSVD68
RSVD69
RSVD70
RSVD71
RSVD72
RSVD73
RSVD74
RSVD75
RSVD76
RSVD77
RSVD78
RSVD79
RSVD80
RSVD81
RSVD82
RSVD83
RSVD84
RSVD85
RSVD86
RSVD87
RSVD88

FOSTER DP REV 1.0

HETERO 2 OF 3

AC27
AD22
AE12
AB9

AB4
AD4
B27

AA5
D26

D7
B5
B25
A3

F26

AD16
E16

F3
E3
D3
C3
B3

AE28
AE29
AD28
AC28
AC29
AD29
AA29
AB29
AB28
AA28
Y29

W3
T1
T30
T31
U1
U30
U31
V1
V30
V31
W1
W30
W31
Y1

Y3
Y27
Y28
Y30
Y31
AA1
AA3
AA30
AA31
AB1
AB3
AB30
AB31
AC1
AC30
AC31
AD1
AD30
AD31
AE4
AE15
AE16

NC_H0_VCCSENSE

X05_LM--p/n sub for part consolidation

+3.3V

H_DBI0
H_DBI1
H_DBI2
H_DBI3

V_VID_H0_VCCA
V_VID_H0_VPLL

H_MCERR
H0_ODTEN
H0_PROCHOT
H0_CPU_PRES

H0_THERMTRIP

H0_COMP0
H0_COMP1

H0_VID0
H0_VID1
H0_VID2
H0_VID3
H0_VID4

CPU_SMBALERT
ENV_SEG0_SCL
ENV_SEG0_SDA

GPO_SMB_WP
H0_SM_EP_A0
H0_SM_EP_A1
H0_SM_EP_A2
H0_SM_TS_A0
H0_SM_TS_A1

NC_H0_RSVD89

NC_H0_RSVD67
NC_H0_RSVD68
NC_H0_RSVD69

NC_H0_RSVD73

NC_H0_RSVD77

NC_H0_RSVD80

NC_H0_RSVD86 NC_H1_RSVD86
NC_H0_RSVD87
NC_H0_RSVD88

SUB*_83009

8,41

8,41

8,41

8,41

8,41

6,10

6,10

6,10

6,10

22uF 6.3V

1 2

5,6,9

9

41

5,9

22uF 6.3V

CB487

21

R504

6

6,13,39,53,57

6,13,39,53,57

6

6

6

6

6

6

CB520

2 1

0.1uF 16V

LB22

4.7uH 30mA

LB20

1 2

1 2

SUB*_83009

45.3 -1%

4.7uH 30mA

CB533

21

RB340

SUB=SUB*_08DFE

Tsensor = 30h/31h

PI-ROM = A0h/A1h

45.3 -1%

08DFE IS 43.2ohm 1% SM0603

H0_SM_TS_A0

6

H0_SM_TS_A1

6

H0_SM_EP_A0

6

H0_SM_EP_A1

6

H0_SM_EP_A2

6

VCORE

V_VID_H0_VCCA_FB

RB336

21

V_VID_H0_VPLL_FB

VCORE

21

RB411

Should MCERR be NC or pulled up here?

SUB=SUB*_08DFE

1K-1%

On DIE term
enabled

21

220

RB412

NP*

1 2

1-5%

RB331

1-5%

RB348

1 2

SUB*_21873

21

SUB*_21873

1K-1%

RB350

1K-1%

1 2

6,9

RB356

1 2

6,9

6,9

6,9

6,9

1K-1%

RB361

H_BPM02
H_BPM13

H_BPM4
H_BPM5

RB268

1 2

1 2

150-1%

1K-1%

RB353

1 2

RNB85

6,9

6,9

5,6,60

1K-1%

54

RNB85

39 OHM-5%

ITP_TCK
ITP_TDI_H1

9

ITP_TDO_H1

9

ITP_TMS
ITP_TRST

H_PWRGOOD

H1_GTLREF01

6

H1_GTLREF23

6

NC_H1_RSVD2
NC_H1_RSVD3
NC_H1_RSVD4
NC_H1_RSVD5

NC_H1_RSVD8

NC_H1_RSVD13

NC_H1_RSVD17

VCORE

1 8

39 OHM-5%

H1_TESTHI0

6

H1_TESTHI1

6

H1_TESTHI2

6

H1_TESTHI3

6

H1_TESTHI4

6

H1_TESTHI5

6

H1_TESTHI6

6

RNB85

3 6

72

RNB85

39 OHM-5%

39 OHM-5%

ROOM=PROC_2

PROC_2

F6

BPM0

F8

BPM1

E7

BPM2

F5

BPM3

E8

BPM4

E4

BPM5

E24

TCK

C24

TDI

E25

TDO

A25

TMS

F24

TRST

AB7

PWRGOOD

W23

GTLREF0

W9

GTLREF1

F23

GTLREF2

F9

GTLREF3

W6

TESTHI0

W7

TESTHI1

W8

TESTHI2

Y6

TESTHI3

AA7

TESTHI4

AD5

TESTHI5

AE5

TESTHI6

A1

RSVD1

A4

RSVD2

A15

RSVD3

A16

RSVD4

A26

RSVD5

A30

RSVD6

A31

RSVD7

B1

RSVD8

B4

RSVD9

B30

RSVD10

B31

RSVD11

C1

RSVD12

C5

RSVD13

C30

RSVD14

C31

RSVD15

D1

RSVD16

D25

RSVD17

D30

RSVD18

D31

RSVD19

E1

RSVD20

E30

RSVD21

E31

RSVD22

F1

RSVD23

F30

RSVD24

F31

RSVD25

G1

RSVD26

G30

RSVD27

G31

RSVD28

H1

RSVD29

H30

RSVD30

H31

RSVD31

J1

RSVD32

J30

RSVD33

J31

RSVD34

K1

RSVD35

K30

RSVD36

K31

RSVD37

L1

RSVD38

L30

RSVD39

L31

RSVD40

M1

RSVD41

M30

RSVD42

M31

RSVD43

N1

RSVD44

N30

RSVD45

N31

RSVD46

P1

RSVD47

P30

RSVD48

P31

RSVD49

R1

RSVD50

R30

RSVD51

R31

RSVD52

FOSTER DP REV 1.0

HETERO 2 OF 3

DBI0
DBI1
DBI2
DBI3

VCCA
VCCIOPLL
VCCSENSE

VSSA
VSSSENSE

MCERR
ODTEN

PROCHOT

SKTOCC

THERMTRIP

COMP0
COMP1

VID0

VID1

VID2

VID3

VID4

SM_VCC1
SM_VCC2

SM_ALERT

SM_CLK

SM_DATA

SM_WP
SM_EP_A0
SM_EP_A1
SM_EP_A2
SM_TS_A0
SM_TS_A1

RSVD89
RSVD53
RSVD54
RSVD55
RSVD56
RSVD57
RSVD58
RSVD59
RSVD60
RSVD61
RSVD62
RSVD63
RSVD64
RSVD65

RSVD66
RSVD68
RSVD69
RSVD70
RSVD71
RSVD72
RSVD73
RSVD74
RSVD75
RSVD76
RSVD77
RSVD78
RSVD79
RSVD80
RSVD81
RSVD82
RSVD83
RSVD84
RSVD85
RSVD86
RSVD87
RSVD88

AC27
AD22
AE12
AB9

AB4
AD4
B27

AA5
D26

D7
B5
B25
A3

F26

AD16
E16

F3
E3
D3
C3
B3

AE28
AE29
AD28
AC28
AC29
AD29
AA29
AB29
AB28
AA28
Y29

W3
T1
T30
T31
U1
U30
U31
V1
V30
V31
W1
W30
W31
Y1

Y3
Y27
Y28
Y30
Y31
AA1
AA3
AA30
AA31
AB1
AB3
AB30
AB31
AC1
AC30
AC31
AD1
AD30
AD31
AE4
AE15
AE16

ADD=ADD_52JXN_ASSYDWG
ADD1=ADD_52JXN_ASSYDWG
ADD2=ADD_89JJP_ASSYDWG
ADD3=ADD_89JJP_ASSYDWG
ADD4=ADD_89JJP_ASSYDWG
ADD5=ADD_89JJP_ASSYDWG
ADD6=ADD_92GXR_ASSYDWG

CB500

2 1

H_DBI0
H_DBI1
H_DBI2
H_DBI3

V_VID_H1_VCCA
V_VID_H1_VPLLITP_TCK

NC_H1_VCCSENSE

H1_VSSAH0_VSSA

NC_H1_VSSSENSENC_H0_VSSSENSE

X05_LM--p/n sub for part consolidation

H_MCERR
H1_ODTEN
H1_PROCHOT
H1_CPU_PRES

H1_THERMTRIP

H1_COMP0
H1_COMP1

H1_VID0
H1_VID1
H1_VID2
H1_VID3
H1_VID4

CPU_SMBALERT

ENV_SEG0_SCL
ENV_SEG0_SDA
GPO_SMB_WP

NC_H1_RSVD89

NC_H1_RSVD67
NC_H1_RSVD68
NC_H1_RSVD69

NC_H1_RSVD73

NC_H1_RSVD77

NC_H1_RSVD80

NC_H1_RSVD83NC_H0_RSVD83

NC_H1_RSVD87
NC_H1_RSVD88

6,10

6,10

6,10

6,10

+3.3V

22uF 6.3V

1 2

CB490

SUB*_83009

5,6,9

9

41

5,9

8,41

8,41

8,41

8,41

8,41

6

6,13,39,53,57

6,13,39,53,57

6

NC_H1_SM_TS_A1

12

CB540

0.1uF 16V

4.7uH 30mA

1 2

22uF 6.3V

1 2

21

R505

Tsensor = 32h/33h

PI-ROM = A2h/A3h

4.7uH 30mA

CB532

SUB*_83009

45.3 -1%
SUB=SUB*_08DFE

H1_SM_PR_A0
H1_SM_PR_A1
H1_SM_PR_A2
H1_SM_TS_A0

0.1uF 16V

V_VID_H1_VCCA_FB

LB23

21

V_VID_H1_VPLL_FB

LB21

21

RB335

08DFE IS 43.2ohm 1% SM0603

45.3 -1%
SUB=SUB*_08DFE

21873 IS ZERO OHM

RB341

1-5%

RB332

1 2

1-5%

VCORE

21

NP*

RB407

RB419

1K-1%

1K-1%

On DIE term disabled

21

220

+3.3V

100-1%

12

12

1K-1%

RB349

RB351

RB1091

12

VCORE

21

SUB*_21873

SUB*_21873

1K-1%

RB1090

12

VCORE

21

R493

R494

1 2

VCORE

21

RB373

RB374

1 2

+3.3V

0.1uF 16V
1 2

CB515

Jaguar 2.0 Change: Intel recommendation: Changed
address resistors from just 1 (RB349) into 3
separate ones. RB1090 & 1091 should be near RB349

100-1% 49.9-1%

100-1% 49.9-1%

ROOMS COMPLETE

PROC_2 GTL VREF

ROOM=PROC2_REF

H1_GTLREF01

21

1uF

CB510

1 2

SUB*_83008

CB641

1 2

SUB*_83008

CB509

1uF

CB619

10V-10%

2 1

10V-10%

0.1uF 16V

H1_GTLREF23

2 1

0.1uF 16V

VCORE

CB562

RB362

1K-1%
RB364

1K-1%
RB366

1K-1%
RB357

1K-1%
RB354

1K-1%
RB338

1K-1%
RB337

1K-1%

220pF

21

CB620

12

12

12

12

12

12

12

21

CB561

50V-10%

220pF

CB656

50V-10%

H1_TESTHI0

H1_TESTHI1

H1_TESTHI2

H1_TESTHI3

H1_TESTHI4

H1_TESTHI5

H1_TESTHI6

6

220pF

50V-10%

Route <1.5" trace.
Place 220pf caps under CPU

6

21

220pF

50V-10%

Route <1.5" trace.
Place 220pf caps under CPU

6

6

6

6

6

6

6

1

2

3

VCORE

VCORE

CPU-- Misc. & RSVD

GALLATIN SUPPORT

4 4

KLM -- CHANGED RB334, RB328, RB339, RB329 TO 1 OHM

PROPRIETARY NOTE: THIS ITEM IS THE PROPERTY OF DELL COMPUTER CORP. AUSTIN, TEXAS AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL COMPUTER CORP. EXCEPT
AS AUTHORIZED BY DELL COMPUTER CORP., AND THEN ONLY BY WAY OF LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE
OR IN PART AND MUST BE RETURNED TO DELL COMPUTER CORP. UPON REQUEST AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF THE
LOAN. NEITHER THIS ITEM OR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH
USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT THE PRIOR WRITTEN CONSENT OF DELL COMPUTER CORPORATION.

PROCESSORS 1 & 2

TITLE

SCHEM,PLN,PE4600,2P

DWG NO.

H3007

DATE

12/5/2003

COMPUTER
CORPORATION

AUSTIN,TEXAS

REV.

A02

SHEET

6 OF 63

A B

DC

Length matching groups

1 ADSTB0 REQ[4:0]#,A[16:3]#
2 ADSTB1 A[35:17]#

3 DSTBP0#/N0# D[15:0]#,DBI0#
4 DSTBP1#/N1# D[31:16]#,DBI1#

5 DSTBP2#/N2# D[47:32]#,DBI2#
6 DSTBP3#/N3# D[63:48]#,DBI3#

General routing rule 5mil, 15 mil space
FERR#,PROCHOT#, THRMTRIP

BR[3:0]#

- Proc0 to Proc1 is ~4.5" matched to within 0.5"

B D

CA

12-5-2003_10:50

ROOMS COMPLETE

1

2

3

A2

A8
A14
A18
A24
A28

B6
B12
B20
B26
B29

C2

C4
C10
C16
C22
C28

D8
D14
D18
D24
D29

E2

E6
E12
E20
E26
E28

F4
F10
F16
F22
F29

G2

G4

G6

G8
G24
G26
G28

H3

H5

H7

H9
H23
H25
H27
H29

J2

J4

J6

J8
J24
J26
J28

K3

K5

K7

K9
K23
K25
K27
K29

L2

L4

L6

L8
L24
L26
L28

M3

M5

M7

M9
M23
M25
M27

PROC_1

VCC1
VCC2
VCC3
VCC4
VCC5
VCC6
VCC7
VCC8
VCC9
VCC10
VCC11
VCC12
VCC13
VCC14
VCC15
VCC16
VCC17
VCC18
VCC19
VCC20
VCC21
VCC22
VCC23
VCC24
VCC25
VCC26
VCC27
VCC28
VCC29
VCC30
VCC31
VCC32
VCC33
VCC34
VCC35
VCC36
VCC37
VCC38
VCC39
VCC40
VCC41
VCC42
VCC43
VCC44
VCC45
VCC46
VCC47
VCC48
VCC49
VCC50
VCC51
VCC52
VCC53
VCC54
VCC55
VCC56
VCC57
VCC58
VCC59
VCC60
VCC61
VCC62
VCC63
VCC64
VCC65
VCC66
VCC67
VCC68
VCC69
VCC70
VCC71
VCC72
VCC73
VCC74
VCC75
VCC76
VCC77

VCC78
VCC79
VCC80
VCC81
VCC82
VCC83
VCC84
VCC85
VCC86
VCC87
VCC88
VCC89
VCC90
VCC91
VCC92
VCC93
VCC94
VCC95
VCC96
VCC97
VCC98

VCC99
VCC100
VCC101
VCC102
VCC103
VCC104
VCC105
VCC106
VCC107
VCC108
VCC109
VCC110
VCC111
VCC112
VCC113
VCC114
VCC115
VCC116
VCC117
VCC118
VCC119
VCC120
VCC121
VCC122
VCC123
VCC124
VCC125
VCC126
VCC127
VCC128
VCC129
VCC130
VCC131
VCC132
VCC133
VCC134
VCC135
VCC136
VCC137
VCC138
VCC139
VCC140
VCC141
VCC142
VCC143
VCC144
VCC145
VCC146
VCC147
VCC148
VCC149
VCC150
VCC151
VCC152
VCC153
VCC154
VCC155

M29
N3
N5
N7
N9
N23
N25
N27
N29
P2
P4
P6
P8
P24
P26
P28
R3
R5
R7
R9
R23
R25
R27
R29
T2
T4
T6
T8
T24
T26
T28
U3
U5
U7
U9
U23
U25
U27
U29
V2
V4
V6
V8
V24
V26
V28
W25
W27
W29
Y10
Y16
Y22
AA4
AA6
AA12
AA20
AA26
AB2
AB8
AB14
AB18
AB24
AC3
AC4
AC10
AC16
AC22
AD2
AD6
AD12
AD20
AD26
AE3
AE8
AE14
AE18
AE24
Y2

1

VCORE

ROOM=PROC_2ROOM=PROC_1

4V-20%

Length matching groups

1 ADSTB0 REQ[4:0]#,A[16:3]#

VCOREVCORE

PROC_2

M29
N3
N5
N7
N9
N23
N25
N27
N29
P2
P4
P6
P8
P24
P26
P28
R3
R5
R7
R9
R23
R25
R27
R29
T2
T4
T6
T8
T24
T26
T28
U3
U5
U7
U9
U23
U25
U27
U29
V2
V4
V6
V8
V24
V26
V28
W25
W27
W29
Y10
Y16
Y22
AA4
AA6
AA12
AA20
AA26
AB2
AB8
AB14
AB18
AB24
AC3
AC4
AC10
AC16
AC22
AD2
AD6
AD12
AD20
AD26
AE3
AE8
AE14
AE18
AE24
Y2

A2

A8
A14
A18
A24
A28

B6
B12
B20
B26
B29

C2

C4
C10
C16
C22
C28

D8
D14
D18
D24
D29

E2

E6
E12
E20
E26
E28

F4
F10
F16
F22
F29

G2

G4

G6

G8
G24
G26
G28

H3

H5

H7

H9
H23
H25
H27
H29

J2

J4

J6

J8
J24
J26
J28

K3

K5

K7

K9
K23
K25
K27
K29

L2

L4

L6

L8
L24
L26
L28

M3

M5

M7

M9
M23
M25
M27

VCC1
VCC2
VCC3
VCC4
VCC5
VCC6
VCC7
VCC8
VCC9
VCC10
VCC11
VCC12
VCC13
VCC14
VCC15
VCC16
VCC17
VCC18
VCC19
VCC20
VCC21
VCC22
VCC23
VCC24
VCC25
VCC26
VCC27
VCC28
VCC29
VCC30
VCC31
VCC32
VCC33
VCC34
VCC35
VCC36
VCC37
VCC38
VCC39
VCC40
VCC41
VCC42
VCC43
VCC44
VCC45
VCC46
VCC47
VCC48
VCC49
VCC50
VCC51
VCC52
VCC53
VCC54
VCC55
VCC56
VCC57
VCC58
VCC59
VCC60
VCC61
VCC62
VCC63
VCC64
VCC65
VCC66
VCC67
VCC68
VCC69
VCC70
VCC71
VCC72
VCC73
VCC74
VCC75
VCC76
VCC77

VCC78
VCC79
VCC80
VCC81
VCC82
VCC83
VCC84
VCC85
VCC86
VCC87
VCC88
VCC89
VCC90
VCC91
VCC92
VCC93
VCC94
VCC95
VCC96
VCC97
VCC98

VCC99
VCC100
VCC101
VCC102
VCC103
VCC104
VCC105
VCC106
VCC107
VCC108
VCC109
VCC110
VCC111
VCC112
VCC113
VCC114
VCC115
VCC116
VCC117
VCC118
VCC119
VCC120
VCC121
VCC122
VCC123
VCC124
VCC125
VCC126
VCC127
VCC128
VCC129
VCC130
VCC131
VCC132
VCC133
VCC134
VCC135
VCC136
VCC137
VCC138
VCC139
VCC140
VCC141
VCC142
VCC143
VCC144
VCC145
VCC146
VCC147
VCC148
VCC149
VCC150
VCC151
VCC152
VCC153
VCC154
VCC155

2 ADSTB1 A[35:17]#
3 DSTBP0#/N0# D[15:0]#,DBI0#
4 DSTBP1#/N1# D[31:16]#,DBI1#

5 DSTBP2#/N2# D[47:32]#,DBI2#
6 DSTBP3#/N3# D[63:48]#,DBI3#

General routing rule 5mil, 15 mil space
FERR#,PROCHOT#, THRMTRIP

- 10 mil trace with pullup at each end <1" past ball
A20M#,IGNE#, INIT#, Lint[1:0],SLP#,SMI#, STPCLK#, and H_PWRGOOD

- 10 mil trace with pullup <1" from ball after last processor
BR[3:0]#

- Proc0 to Proc1 is ~4.5" matched to within 0.5"

- pullup at each end with <1" past ball (BR0, BR2, and BR3 only have pullup at end)

ROOM=PROC_1

VCORE

Place 3-4 over Addr\Ctrl
Place 4-6 over data

h1

1 2

CB590

VCORE

1 2

CB585

1 2

CB613

0.1uF 16V
603 pkg

1 2

CB599

0.1uF 16V

1 2

CB612

0.1uF 16V

1 2

CB616

0.1uF 16V

1 2

CB597

0.1uF 16V

C434

1 2

0.1uF 16V

C451

1 2

0.1uF 16V

Place 3-4 over Addr\Ctrl
Place 4-6 over data

1 2

CB611

0.1uF 16V

0.1uF 16V

0.1uF 16V

ROOM=PROC_2

VCORE

+80%-20%

+80%-20%

22uF 10V

1 2

VCORE

+80%-20%

22uF 10V

1 2

CB635

CB558

22uF 10V

1 2

C441

+80%-20%

22uF 10V

1 2

CB575

1210 package

+80%-20%

22uF 10V

1 2

+80%-20%

22uF 10V

1 2

CB589

CB594

VCORE

+80%-20%

22uF 10V

1 2

+80%-20%

22uF 10V

1 2

C440

C442

+80%-20%

22uF 10V

1 2

+80%-20%

22uF 10V

1 2

CB654

C443

1 2

CB580

CB579

+80%-20%

0.1uF 16V

1 2

0.1uF 16V

22uF 10V

1 2

+80%-20%

22uF 10V

C450

CB610

CB632

1 2

CB514

1 2

0.1uF 16V

1 2

0.1uF 16V

+80%-20%

22uF 10V

+80%-20%

22uF 10V

C431

1 2

1 2

CB578

1 2

CB655

1 2

CB581

0.1uF 16V

CB605

0.1uF 16V

+80%-20%

22uF 10V

+80%-20%

CB593

1 2

0.1uF 16V

1 2

0.1uF 16V

1 2

CB606

22uF 10V

1 2

CB636

C432

1 2

C433

1 2

+80%-20%

22uF 10V

+80%-20%

22uF 10V

0.1uF 16V

0.1uF 16V

1 2

CB542

1 2

CB504

1 2

820uF

+

VCORE

+80%-20%

22uF 10V

+80%-20%

22uF 10V

C394

1 2

CB596

1 2

4V-20%

820uF

4V-20%

820uF

+80%-20%

CB634

+

21

+

21

10V-10%

SUB*_83008

10V-10%

22uF 10V

+80%-20%

22uF 10V

4V-20%

C438

C395

SUB*_83008

1uF

1uF

1 2

1 2

820uF

4V-20%

820uF

VCORE

1 2

CB518

805 pkg

VCORE

1 2

CB506

+80%-20%

CB637

CB600

1 2

+

1 2

+

10V-10%

1uF

10V-10%

1uF

SUB*_83008

22uF 10V

+80%-20%

22uF 10V

4V-20%

4V-20%

1 2

CB614

1 2

C454

+80%-20%

CB617

CB653

820uF

820uF

10V-10%

SUB*_83008

10V-10%

+80%-20%

C460

C397

SUB*_83008

1 2

1 2

4V-20%

C416

+

21

4V-20%

C396

+

21

SUB*_83008

10V-10%

1 2

1 2

1 2

CB511

1 2

CB516

1uF

10V-10%

C430

1uF

SUB*_83008

+80%-20%

+80%-20%

CB548

1uF

LM_X04--83008 sub for p/n consolidation

1uF

22uF 10V

22uF 10V

1 2

820uF

+

1 2

820uF

+

10V-10%

1 2

CB574

SUB*_83008

SUB*_83008

10V-10%

1 2

C429

22uF 10V

1 2

CB512

22uF 10V

1 2

CB502

C468

C479

SUB*_83008

1uF

1uF

+80%-20%

+80%-20%

4V-20%

820uF

+

10V-10%

1 2

C453

10V-10%

1 2

CB571

SUB*_83008

22uF 10V

1 2

CB595

22uF 10V

1 2

C498

21

1 2

1uF

1uF

CB513

SUB*_83008

1 2

CB508

+80%-20%

+80%-20%

CB568

4V-20%

820uF

+

4V-20%

820uF

+

SUB*_83008

10V-10%

1uF

SUB*_83008

10V-10%

1uF

22uF 10V

1 2

CB628

22uF 10V

1 2

CB501

1 2

C489

1 2

C467

1 2

CB645

1 2

CB507

SUB*_83008

+80%-20%

4V-20%

820uF

10V-10%

10V-10%

1 2

1uF

SUB*_83008

1 2

1uF

22uF 10V

1 2

CB541

C481

+

21

10V-10%

C427

SUB*_83008

10V-10%

CB629

+80%-20%

SUB*_83008

1 2

1uF

1uF

C428

1 2

CB528

22uF 10V

1 2

CB519

+80%-20%

22uF 10V

1 2

10V-10%

10V-10%

CB494

1 2

1uF

1 2

1uF

+80%-20%

22uF 10V

+80%-20%

22uF 10V

CB573

SUB*_83008

CB572

SUB*_83008

1 2

CB551

1 2

CB650

ROOM=PROC_1

ROOM=PROC_2

ROOM=PROC_1

ROOM=PROC_2

+80%-20%

22uF 10V

1 2

CB582

ROOM=PROC_1

+80%-20%

22uF 10V

1 2

CB651

ROOM=PROC_2

2

3

FOSTER DP REV 1.0

HETERO 3 OF 3

4 4

FOSTER DP REV 1.0

HETERO 3 OF 3

VCORE_SENSE

8

VCORE_GND_SENSE

8

C386

1 2

C391

1 2

0.1uF 16V

RB359

1 2

0-5%

RB358

21

0-5%

C381

1 2

0.1uF 16V

VCORE

C593

1 2

0.1uF 16V

C592

1 2

0.1uF 16V

C591

1 2

0.1uF 16V

VCORE

0.1uF 16V
2 1

C404

C439

1 2

0.1uF 16V

0.1uF 16V
C409

12

C435

1 2

0.1uF 16V

0.1uF 16V
2 1

C455

1 2

0.1uF 16V

0.1uF 16V

C403

12

C445

1 2

0.1uF 16V

0.1uF 16V

C408

0.1uF 16V

0.1uF 16V

2 1

CB484

C449

1 2

CB486

12

C426

1 2

0.1uF 16V

0.1uF 16V
2 1

CB664

C597

1 2

0.1uF 16V

0.1uF 16V
CB662

12

C595

1 2

0.1uF 16V

C596

1 2

0.1uF 16V

C418

1 2

0.1uF 16V

C419

1 2

0.1uF 16V

0.1uF 16V

COMPUTER
CORPORATION

AUSTIN,TEXAS

TITLE

SCHEM,PLN,PE4600,2P

PROPRIETARY NOTE: THIS ITEM IS THE PROPERTY OF DELL COMPUTER CORP. AUSTIN, TEXAS AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL COMPUTER CORP. EXCEPT
AS AUTHORIZED BY DELL COMPUTER CORP., AND THEN ONLY BY WAY OF LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE
OR IN PART AND MUST BE RETURNED TO DELL COMPUTER CORP. UPON REQUEST AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF THE
LOAN. NEITHER THIS ITEM OR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH
USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT THE PRIOR WRITTEN CONSENT OF DELL COMPUTER CORPORATION.

DWG NO.

DATE

H3007

REV.

A02

SHEET

7 OF 6312/5/2003

A B

DC

SD_X06 -- added support for detecting VRM9.1 and 9.0's

B D

CA

12-5-2003_10:50

ROOMS COMPLETE

1

ROOM=VRM_P1

VRM_+12V

12

+

C224

R247

1 2

0-5%

270uF

16V-20%

C238

1

+12V

ROOM=VRM_P2

L32

21

1uH 4.4A

L30

21

1uH 4.4A

C223

12

+

270uF

16V-20%

12

+

270uF

16V-20%

C237

12

+

270uF

16V-20%

2

VRM0_VRM91

44

41,44,51

41

GPI_VRM1_PRES

VRM0_I2C_A1

R1012

0-5%

+3.3V

21

R1086

R240

1 2

NP*

ENV_SEG0_SCL_3.3

VOLTAGE REG, CORE

0-5%
R260

+3.3V

0-5%

VRM_P1

21

R233

8,41,51,60

+3.3V

R1013

21

R261

1 2

21

8.2K-5%

220

NP*

8,41

8,41

8,41

7,8

8.2K-5%

VRM_VID4
VRM_VID2
VRM_VID0
VRM0_ISHARE

CPU_VRM_EN
VCORE_SENSE

VIN-_62

62

VIN-_61

61

VIN-_60

60

VIN-_59

59

VRM-PRES

58

VID4

57

VID2

56

VID0

55

ISHARE

54

OUTEN

53

VO-SEN+

52

RSVD_51

51

VO+_50

50

VO+_49

49

VO-_48

48

VO+_47

47

VO-_46

46

VO+_45

45

VO-_44

44

VO+_43

43

VO-_42

42

VO+_41

41

VO-_40

40

VO+_39

39

VO-_38

38

VO+_37

37

VO-_36

36

VO+_35

35

VO-_34

34

VO+_33

33

VO-_32

32

VIN+_1
VIN+_2
VIN+_3
VIN+_4
RXVD_5

VID3
VID1

RSVD_9

PWRGD
VO-SEN­RSVD_12

VO-_13
VO+_14
VO-_15
VO+_16
VO-_17
VO+_18
VO-_19
VO+_20
VO-_21
VO+_22
VO-_23
VO+_24
VO-_25
VO+_26
VO-_27
VO+_28
VO-_29
VO+_30
VO-_31

1
2
3
4
5

7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31

VRM0_SCL

VRM0_SDA
VRM1_PWRGOOD
VCORE_GND_SENSE

VCOREVCORE

R1026

0-5%

21

7,8

R246

1 2

21

NP*

ENV_SEG0_SDA_3.3

VRM0_VENID1

VRM_VID3
VRM_VID1

VRM0_I2C_A0

Do any VRM vendors want SMBUS?

220

NP*

Jaguar 2.0 Change: Change for 9.1 VRM:

8.2K-5%
added 8.2K pullups and 0 ohm series to VRM enable lines

8

8

+3.3V

41

21

GPI_VRM2_PRES

VRM_VID4
VRM_VID2
VRM_VID0

VRM1_I2C_A1

41

8,41

8,41

41

R248

10K-5%

51,60

41,44,51

8,41

8,41

8,41

5 SMB_CLK

9 SMB_DATA

VRM1_VRM91

44

12 SMB_A0

51 SMB_A1

RB1014

1 2

0-5%

+3.3V

R234

1 2

8,41,51,60

+3.3V

R268

8.2K-5%

7,8

21

8.2K-5%

VRM1_ISHARE

CPU_VRM_EN

VCORE_SENSE

VOLTAGE REG, CORE

VRM_P2

VIN-_62

62

VIN-_61

61

VIN-_60

60

VIN-_59

59

VRM-PRES

58

VID4

57

VID2

56

VID0

55

ISHARE

54

OUTEN

53

VO-SEN+

52

RSVD_51

51

VO+_50

50

VO+_49

49

VO-_48

48

VO+_47

47

VO-_46

46

VO+_45

45

VO-_44

44

VO+_43

43

VO-_42

42

VO+_41

41

VO-_40

40

VO+_39

39

VO-_38

38

VO+_37

37

VO-_36

36

VO+_35

35

VO-_34

34

VO+_33

33

VO-_32

32

VIN+_1
VIN+_2
VIN+_3
VIN+_4
RXVD_5

VID3
VID1

RSVD_9

PWRGD
VO-SEN­RSVD_12

VO-_13
VO+_14
VO-_15
VO+_16
VO-_17
VO+_18
VO-_19
VO+_20
VO-_21
VO+_22
VO-_23
VO+_24
VO-_25
VO+_26
VO-_27
VO+_28
VO-_29
VO+_30
VO-_31

1
2
3
4
5

7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31

VRM1_SCL

VRM_VID1
VRM1_SDA

VCORE_GND_SENSE

VRM_VID3

VCOREVCORE

R231

0-5%
R259

1 2

0-5%

R1027

0-5%

R262

NP*

21

NP*

21

8,41

8,41

7,8

21

220

NP*

+3.3V

21

R1087

VRM1_I2C_A0

8.2K-5%

ENV_SEG0_SCL_3.3

ENV_SEG0_SDA_3.3

VRM1_VENID1

L29

1uH 4.4A

L31

1uH 4.4A

41

41

21

21

Jaguar 2.0 Change: Change for 9.1 VRM:
added 8.2K pullups and 0 ohm series to

8

VRM enable lines

8

+3.3V

2

21

R264

10K-5%

VRM2_PWRGOOD

51,60

3

+3.3V

8.2K-5%
RNB87

7 2

8.2K-5%
RNB8736RNB87

8.2K-5%

5 4

8.2K-5%
RNB87

8.2K-5%
RB388

8.2K-5%

8.2K-5%

R242

5 4

8.2K-5%

RN7136RN71

VRM 9.0 EDG SKT

LATCHED

SUB*_7G715

LM_X04--7G715 is p/n for 9.1 conn keyed for 9.0
Post RTS this connector will change to 7G715 to be consistent with Merlot

(LATCHED VERSION)

7 2

8.2K-5%

8.2K-5%

RN7118RN71

5 4

8.2K-5%
RN57

8.2K-5%
RN57

7 2

8.2K-5%

8.2K-5%

RN5718RN57

8.2K-5%

VRM 9.0 EDG SKT

LATCHED

SUB*_7G715

3

LM_X04--7G715 is p/n for 9.1 conn keyed for 9.0
Post RTS this connector will change to 7G715 to be consistent with Merlot

(LATCHED VERSION)

00JDV IS OLD VRM9.0 LATCHING CONNECTOR
7G715 IS NEW VRM9.1 LATCHING CONNECTOR

R235

18

12

4 4

12

H0_VID0
H0_VID1
H0_VID2
H0_VID3
H0_VID4

H1_VID0
H1_VID1
H1_VID2
H1_VID3
H1_VID4

36

6,41

6,41

6,41

6,41

6,41

6,41

6,41

6,41

6,41

6,41

12

VRM_VID0
VRM_VID1
VRM_VID2
VRM_VID3
VRM_VID4

8,41

8,41

8,41

8,41

8,41

Core VRMs

A B

PROPRIETARY NOTE: THIS ITEM IS THE PROPERTY OF DELL COMPUTER CORP. AUSTIN, TEXAS AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL COMPUTER CORP. EXCEPT
AS AUTHORIZED BY DELL COMPUTER CORP., AND THEN ONLY BY WAY OF LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE
OR IN PART AND MUST BE RETURNED TO DELL COMPUTER CORP. UPON REQUEST AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF THE
LOAN. NEITHER THIS ITEM OR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH
USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT THE PRIOR WRITTEN CONSENT OF DELL COMPUTER CORPORATION.

TITLE

DWG NO.

DATE

DC

COMPUTER
CORPORATION

AUSTIN,TEXAS

SCHEM,PLN,PE4600,2P

H3007

SHEET

12/5/2003

REV.

A02

8 OF 63

VCORE

LM_X04--83008 sub for p/n consolidation
SUB*_83008

LM_X04--83XMY sub for p/n consolidation

+3.3V

B D

CA

ITP_TDI_H0

12-5-2003_10:50

ROOMS COMPLETE

1

C383

1 2

C388

1 2

0.1uF 16V

6

6

H_BPM4

6

H_BPM5

6

5,9,11

H_RST

CK_100M_ITP

4

CK_100M_ITP

4

1uF

10V-10%

H_BPM02
H_BPM13

21

R438

RB257

40.2-1%

1 2

RB270

40.2-1%

1 2

RB265

40.2-1%

1 2

ITP PORT

RB256

1 2

(FBO)

40.2-1%

ITP

1
3 4
5 6
7 8

9
11 12
13 14
15 16
17 18
19
21 22
23
25

K

2MM SMT

KEY 26

POP9

40.2-1%

(BPM5DR#)

2

10

20

24
26

NP*

RB424

1 2

RB449

1 2

R427

150-1%

1 2

ITP_PWR

150-1%

40.2-1%

SUB*_83XMY

21

RB269

R423

1 2

C390

27-5%

1 2

R421

1.5K-5%

0.1uF 16V

21

R424

1 2

220

NP*

NP*

75-1%

ITP_DBA

ITP_DBR

ITP_TDI_H0

(FBI)

ITP_TDO_H1

NC_ITP_26_KEY

RB264

1 2

ITP_TMS
ITP_TRST
ITP_TCK

150-1%

6

6

6

6,9

R145

1.5K-5%

1 2

SUB*_83XMY

11 10

U40

7407

6

JTDO

ROOM=ITP

CMIC_SRESET

VCORE

R585

1
2
3

POP9

150-1%

1 2

ITP_TDI_H1
ITP_TDO_H0
ITP_TDO_H1

11,60

6

6

6,9

FOR JTDO:

Install 1-2 for TWO processor system
Install 2-3 for UNI processor system

1

(UNI-PROCESSOR IS WITH PROC_1 INSTALLED ONLY!)

PROC_1 PROC_2

ITP_TDO_H0

ITP_TDI_H1

TDITDI

JTDO

1

2
3

2

Jaguar 2.0 Change: Pop Debug Connector - only for prototype builds!

Route ITP_TCK from pin 16
star to both processors
and then from H0 back
to pin 17. Match length
on all 3 segments

TDO

ITP_TD0_H1

TDO

2

ITP ROUTING DRAWING

H0_THERMTRIP

5,6

RB420

2.7K-5%

VCORE

+3.3V

21

3

2

1K-1%

H0_THERMTRIP_3V

51

H1_THERMTRIP

5,6

RB384

1 2

2.7K-5%

QB22

3904

RB433

QB24

3904

1

21

+3.3V

RB445

RB393

1

1K-1%

1 2

H1_THERMTRIP_3V

3

2

51

H0_PROCHOT

6

1 2

56.2-1%

RB450

2.7K-5%

QB26

3904

21

+3.3V

21

RB464

1

1K-1%

H0_PROCHOT_3V

3

2

51

H1_PROCHOT

6

VCORE

21

RB432

56.2-1%

RB426

1 2

2.7K-5%

QB25

3904

+3.3V

+3.3V

RB429

1

1K-1%

1 2

H1_PROCHOT_3V

3

2

51

5

H_FERR

R236

2.7K-5%

+3.3V

R218

21

Q19

3904

1

3

2

1K-1%

CSB_FERR_3V

R238

1 2

2.7K-5%

RB394

Q20

3904

1

21

1K-1%

1 2

CSB_FERR_3V

3

2

39

3

5

H0_IERR

RB451

1 2

2.7K-5%

QB23

3904

1

51-54,59,60

GPE_IERR1

3

2

39

5

H1_IERR

RB389

2.7K-5%

QB21

3904

1

21

3

2

GPE_IERR2

39

5,9,11

H_RST

Jaguar 2.0 - X02: Added processor reset to CPLD for proper ThermTrip Operation

P3V3AUX_DIRECT

QB29

RB1033

1 2

2.7K-5%

3904

1

R1101

1 2

3

2

1K-1%

H_RST_3V

51

5,6

H_MCERR

VCORE

21

RB399

150-1%

RB392

1 2

2.7K-5%

QB1

3904

1

3

GPE_MCERR

3

2

39

KLM_X03 -- ADDED R2600 ABOVE

INVERTING LEVEL TRANSLATION

4 4

COMPUTER
CORPORATION

AUSTIN,TEXAS

TITLE

A B

PROPRIETARY NOTE: THIS ITEM IS THE PROPERTY OF DELL COMPUTER CORP. AUSTIN, TEXAS AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL COMPUTER CORP. EXCEPT
AS AUTHORIZED BY DELL COMPUTER CORP., AND THEN ONLY BY WAY OF LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE
OR IN PART AND MUST BE RETURNED TO DELL COMPUTER CORP. UPON REQUEST AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF THE
LOAN. NEITHER THIS ITEM OR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH
USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT THE PRIOR WRITTEN CONSENT OF DELL COMPUTER CORPORATION.

DWG NO.

DATE

DC

SCHEM,PLN,PE4600,2P

H3007

SHEET

12/5/2003

REV.

A02

9 OF 63

B D

CA

12-5-2003_10:50

U118

HOST

BUS

REMC

HETERO 1 OF 6

D0
D1
D2
D3
D4
D5
D6
D7
D8

D9
D10
D11
D12
D13
D14
D15
D16
D17
D18
D19
D20
D21
D22
D23
D24
D25
D26
D27
D28
D29
D30
D31
D32
D33
D34
D35
D36
D37
D38
D39
D40
D41
D42
D43
D44
D45
D46
D47
D48
D49
D50
D51
D52
D53
D54
D55
D56
D57
D58
D59
D60
D61
D62
D63

DINV0
DINV1
DINV2
DINV3

INIT

MA8
MA9

MA10
MA11
MA12
MA13
MA14
MA15
MA16

CSTRB4
CSTRB5
CSTRB6
CSTRB7

AH7
AJ5
AH9
AJ8
AK5
AH10
AK8
AK6
AJ7
AK9
AJ11
AK11
AK12
AJ10
AH13
AK14
AF5
AG5
AG6
AE6
AF7
AE7
AF8
AG8
AG12
AG11
AF10
AE9
AF11
AE10
AE12
AE13
AH16
AK15
AH15
AK18
AJ14
AK17
AH19
AH18
AK20
AJ19
AK21
AH21
AJ22
AH22
AK23
AJ23
AF16
AF14
AE15
AF17
AE16
AG18
AE18
AF19
AG21
AE21
AF22
AG23
AF23
AF20
AE19
AE22

AH6
AG9
AJ20
AG20

B2

A17
D16
E16
B17
A16
B16
F16
H15
C15

D8
E7
F2
L2

H_D0
H_D1
H_D2
H_D3
H_D4
H_D5
H_D6
H_D7
H_D8
H_D9
H_D10
H_D11
H_D12
H_D13
H_D14
H_D15
H_D16
H_D17
H_D18
H_D19
H_D20
H_D21
H_D22
H_D23
H_D24
H_D25
H_D26
H_D27
H_D28
H_D29
H_D30
H_D31
H_D32
H_D33
H_D34
H_D35
H_D36
H_D37
H_D38
H_D39
H_D40
H_D41
H_D42
H_D43
H_D44
H_D45
H_D46
H_D47
H_D48
H_D49
H_D50
H_D51
H_D52
H_D53
H_D54
H_D55
H_D56
H_D57
H_D58
H_D59
H_D60
H_D61
H_D62
H_D63

CMIC_INIT

RMA8
RMA9
RMA10
RMA11
RMA12
RMA13
RMA14
RMA15
RMA16

RCSTRB4
RCSTRB5
RCSTRB6
RCSTRB7

H_DBI0
H_DBI1
H_DBI2
H_DBI3

R127

1 2

1K-5%

10

10

10

10

10

10

10

10

10

10

10

10

10

5

5

5

5

5

5

5

5

5

5

5

5

5

5

5

5

5

5

5

5

5

5

5

5

5

5

5

5

5

5

5

5

5

5

5

5

5

5

5

5

5

5

5

5

5

5

5

5

5

5

5

5

5

5

5

5

5

5

5

5

5

5

5

5

6

6

6

6

44

+2.5V

15

15

15

MECB_SDOE

14

NC_RN235_1

NC_RN235_2

13

MECA_CMD0

13

13

MECA_CMD2

13

MECA_CMD3

13

MECA_CMD4

13

MECA_CMD5

13

MECA_CMD6

13

MECA_CMD7

13

MECA_CMD8

13

MECA_CMD9

13

MECA_CMD10

13

MECA_CMD11

13

MECA_CMD12

13

MECA_CMD13

13

MECA_CMD14

13

MECA_CMD15

13

MECA_CMD16

13

13

MECA_CMD18

13

MECA_CMD19

13

MECA_CMD20

13

MECA_CMD21

13

MECA_CMD22

13

MECA_CMD23

13

MECA_CMD24

13

MECA_CMD25

13

MECA_CMD26

13

MECA_CMD27

13

MECA_CMD28

13

MECA_CMD29

13

MECA_CMD30

13

MECA_CMD31

13

MECA_CMD32

13

MECA_CMD33

13

MECA_CMD34

13

MECA_CMD35

13

MECA_CMD36

13

MECA_CMD37

13

MECA_CMD38

13

MECA_CMD39

13

MECA_CMD40

13

MECA_CMD41

13

MECA_CMD42

13

MECA_CMD43

13

MECA_CMD44

13

MECA_CMD45

13

13

13

MECA_CMD48

13

MECA_CMD49

13

MECA_CMD50

13

MECA_CMD51

13

MECA_CMD52

13

13

MECA_CMD54

13

13

MECA_CMD56

13

MECA_CMD57

13

MECA_CMD58

13

MECA_CMD59

13

MECA_CMD60

13

MECA_CMD61

13

MECA_CMD62

13

14

MECB_CMD64

14

MECB_CMD65

14

MECB_CMD66

14

MECB_CMD67

14

MECB_CMD68

14

MECB_CMD69

14

MECB_CMD70

14

MECB_CMD71

14

MECB_CMD72

13

13

MECA_RCMD1

13

MECA_RCMD2

13

MECA_RCMD3

14

MECB_RCMD0

14

MECB_RCMD1

14

14

MECB_RCMD3

AP_MEMPAR

15

AP_RAS

15

MECA_SDOE

13

AP_CKE

15

NC_RN148_1

AP_ECS1_1

AP_ECS0_2

AP_ECS1_0

RNB10

1 8

39 OHM-5%

RN85

1 8

39 OHM-5%

RN73

1 8

43-5%

RN73

2 7

43-5%

RN78

39 OHM-5%

RN80

39 OHM-5%

RN86

2 7

43-5%

RNB9

2 7

43-5%

RN86

3 6

43-5%

RN104

3 6

39 OHM-5%

39 OHM-5%

39 OHM-5%

39 OHM-5%

39 OHM-5%

39 OHM-5%

39 OHM-5%

39 OHM-5%

39 OHM-5%

39 OHM-5%

39 OHM-5%

39 OHM-5%

1 2

39 OHM-5%
39 OHM-5%

R339

10-5%

NC_RN235_8

NC_RN235_7

81

81

RAECS1_1

RAECS1_0

RN100

1 8

RNB31

81

RN95

2 7

39 OHM-5%

RN99

3 6

39 OHM-5%

RN96

1 8

39 OHM-5%

RNB16MECA_CMD17

54

RN104

2 7

39 OHM-5%

RNB16

72

RNB13

81

RN96

4 5

39 OHM-5%

RNB5

2 7

39 OHM-5%

RNB4

81

RN79

3 6

RNB7

72

RN89

3 6

39 OHM-5%

RN80

54

RN88

1 8

39 OHM-5%

RN88

63

RNB7

4 5

RB206

39-5%

RB207

1 2

39-5%

RN85

63

8 1

RNB11

RN75

3 6

10-5%

2 7

RB194

1 2

10-5%

RB208

21

10-5%

21

RBSDOE

NC_RN155_8NC_RN155_1

NC_RN151_8NC_RN151_1

NC_RN148_8

RAECS0_2

RN104

1 8

39 OHM-5%

39 OHM-5%

39 OHM-5%

39 OHM-5%

39 OHM-5%

39 OHM-5%

39 OHM-5%

39 OHM-5%

39 OHM-5%

39 OHM-5%

39 OHM-5%

39 OHM-5%

39 OHM-5%

39 OHM-5%

39 OHM-5%

39 OHM-5%

39 OHM-5%

39 OHM-5%

4 5

39 OHM-5%

2 7

39 OHM-5%

39 OHM-5%

39 OHM-5%

39 OHM-5%

39 OHM-5%

8 1

RN74

10-5%

RASDOE

RN103

RN103

1 8

RN95

RN104

4 5

RN100

RN99

RN96

RN96

RN100

3 6

RNB13

RNB4

3 6

RN89

RN80

RN89

RNB6

81

RN88

RNB6

3 6

RN88

RN78

RN78

RN85

RN84

RN92

RN75MECA_RCMD0

4 5

10-5%

RN74

1 8

10-5%

RN75MECB_RCMD2

2 7

10-5%

RN77

4 5

43-5%

10

10

10

RNB31

39 OHM-5%

72

39 OHM-5%

39 OHM-5%

63

4 5

39 OHM-5%

2 7

39 OHM-5%

72

3 6

39 OHM-5%

54

2 7

39 OHM-5%

72

1 8

39 OHM-5%

63

39 OHM-5%

39 OHM-5%

63

2 7

39 OHM-5%

39 OHM-5%

81

1 8

39 OHM-5%

63

39 OHM-5%

72

2 7

39 OHM-5%

RNB7

3 6

39 OHM-5%

72

39 OHM-5%

RN79

39 OHM-5%

2 7

39 OHM-5%

RNB6 RCMD58

39 OHM-5%

63

39 OHM-5%

72

RNB10

4 5

39 OHM-5%

63

RN85

39 OHM-5%

3 6

39 OHM-5%

RN73

36

43-5%

10

63

RN103

63

RN99

81

RN103

RNB31

RNB16

RNB13

RN95

81

RNB16

RN99

72

RN80

RNB4

72

RNB5

RN89

54

RN79

RNB7

81

81

RNB6

54

RN78

54

54

RNB10

RN74

4 5

10-5%

RN74

3 6

10-5%

RN75

1 8

10-5%

DELAY_RULE=:::2000

RARCMD0
RARCMD1
RARCMD2
RARCMD3

RBRCMD0
RBRCMD1
RBRCMD2
RBRCMD3

RAMEMPAS

NC_BMEMPAR

RARAS
NC_BRAS

RBSDOE

10

RACKE
NC_BCKE

15

RCMD0
RCMD1MECA_CMD1
RCMD2
RCMD3
RCMD4
RCMD5
RCMD6
RCMD7
RCMD8
RCMD9
RCMD10
RCMD11
RCMD12
RCMD13
RCMD14
RCMD15
RCMD16
RCMD17
RCMD18
RCMD19
RCMD20
RCMD21
RCMD22
RCMD23
RCMD24
RCMD25
RCMD26
RCMD27
RCMD28
RCMD29
RCMD30
RCMD31
RCMD32
RCMD33
RCMD34
RCMD35
RCMD36
RCMD37
RCMD38
RCMD39
RCMD40
RCMD41
RCMD42
RCMD43
RCMD44
RCMD45
RCMD46MECA_CMD46
RCMD47MECA_CMD47
RCMD48
RCMD49
RCMD50
RCMD51
RCMD52
RCMD53MECA_CMD53
RCMD54
RCMD55MECA_CMD55
RCMD56
RCMD57

RCMD59
RCMD60
RCMD61
RCMD62
RCMD63MECA_CMD63
RCMD64
RCMD65
RCMD66
RCMD67
RCMD68
RCMD69
RCMD70
RCMD71
RCMD72

AP_ECS0_0

L24
M23
K25
H27
G30
G29
J26
G28
E30
C30
B30
F29
D29
K23
J24
F27
H25
G26
J23
D27
E28
K22
F26
C28
G25
F25
G23
E27
H23
D28
F24
E26
E23
D24
A27
B26
C25
B25
D23
F21
D22
C23
H19
B24
E21
A24
F20
G19
C22
B22
H18
A23
E20
C21
B21
A21
D20
E19
B20
A20
F18
C19
D19
G17

C9

D10

B8
B6
A7

C7
H11
G11
F10

C11
F13
G13
B12

E13
A11
D12
J21

D15
E15

D11
E12
F12
E11

B9

A8

U118

CMD0_0
CMD0_1
CMD0_2
CMD0_3
CMD0_4
CMD0_5
CMD0_6
CMD0_7
CMD0_8
CMD0_9
CMD0_10
CMD0_11
CMD0_12
CMD0_13
CMD0_14
CMD0_15
CMD1_0
CMD1_1
CMD1_2
CMD1_3
CMD1_4
CMD1_5
CMD1_6
CMD1_7
CMD1_8
CMD1_9
CMD1_10
CMD1_11
CMD1_12
CMD1_13
CMD1_14
CMD1_15
CMD2_0
CMD2_1
CMD2_2
CMD2_3
CMD2_4
CMD2_5
CMD2_6
CMD2_7
CMD2_8
CMD2_9
CMD2_10
CMD2_11
CMD2_12
CMD2_13
CMD2_14
CMD2_15
CMD3_0
CMD3_1
CMD3_2
CMD3_3
CMD3_4
CMD3_5
CMD3_6

REMC

CMD4_9
CMD4_10
CMD4_11
CMD4_12
CMD4_13
CMD4_14
CMD4_15

CMD5_0

CMD5_1

CMD5_2

CMD5_3

CMD5_4

CMD5_5

CMD5_6

CMD5_7

CMD5_8

CMD5_9
CMD5_10
CMD5_11
CMD5_12
CMD5_13
CMD5_14
CMD5_15

CMD6_0

CMD6_1

CMD6_2

CMD6_3

CMD6_4

CMD6_5

CMD6_6

CMD6_7

CMD6_8

CMD6_9
CMD6_10
CMD6_11
CMD6_12
CMD6_13
CMD6_14
CMD6_15

CMD7_0

CMD7_1

CMD7_2

CMD7_3

CMD7_4

CMD7_5

CMD7_6

CMD7_7

CMD7_8

CMD7_9
CMD7_10
CMD7_11
CMD7_12
CMD7_13
CMD7_14
CMD7_15

CMD3_7
CMD3_8
CMD3_9
CMD3_10
CMD3_11
CMD3_12
CMD3_13
CMD3_14
CMD3_15
CMD4_0
CMD4_1
CMD4_2
CMD4_3
CMD4_4
CMD4_5
CMD4_6
CMD4_7
CMD4_8

ARCMD0
ARCMD1
ARCMD2
ARCMD3

BRCMD0
BRCMD1
BRCMD2
BRCMD3

AMEMPAR
BMEMPAR

ARAS
BRAS

MECC10

MECC11

MECC12

MECC13

MECC14

MECC15

AECS0_0
AECS0_1
AECS0_2
AECS1_0
AECS1_1
AECS1_2

BECS0_0
BECS0_1
BECS0_2
BECS1_0
BECS1_1
BECS1_2

ASDOE
BSDOE
ACKE
BCKE

SERVERWORKS GCHE "CMIC" - REV 1.1

HETERO 3 OF 6

RNB14

NC_RN157_4 NC_RN157_5

4 5

39 OHM-5%

RNB12

NC_RN128_1

1 8

39 OHM-5%

RCSTRB0

10

RCSTRB1

10

RCSTRB2

10

RCSTRB3

10

RCSTRB4

10

RCSTRB5

10

RCSTRB6

10

RCSTRB7

10

RNB8

1 8

RAECS0_0

43-5%

MECC0
MECC1
MECC2
MECC3
MECC4
MECC5
MECC6
MECC7
MECC8
MECC9

ACAS
BCAS

AWE
BWE

NC_RN128_8

RB203

RB199

1 2

10

A5
D7
E9
F9
J11
G10
E8
H10
C6
B5
C5
D6
G9
F8
D4
A4
B4
G7
A3
H9
F6
D3
E5
G3
E1
H5
K6
L7
J5
H4
F1
H2
J4
M8
G2
L6
H1
J3
N9
K4
M6
J1
N8
L5
N7
K3
K2
L1
M5
L3
P7
M4
N5
P8
P6

K8
D2
C1
B1
K7
F4
G5
J7
E24
D25
G22
A29
G21
H20
F22
A28

G15
C14
G14
B14
A15
F14

H14
A13
D14
C13
A12
B13

B10
A9
C10
H12

15

15

39 OHM-5%

RCMD73
RCMD74
RCMD75
RCMD76
RCMD77
RCMD78
RCMD79
RCMD80
RCMD81
RCMD82
RCMD83
RCMD84
RCMD85
RCMD86
RCMD87
RCMD88
RCMD89
RCMD90

39 OHM-5%

4 5

39 OHM-5%
39 OHM-5%

5 4

1 8

39 OHM-5%

39 OHM-5%

18

RN83
RN82

72

RN82 MECB_CMD78

RN84
RN82

45

RN83

R350
RCMD91
RCMD92
RCMD93
RCMD94
RCMD95
RCMD96
RCMD97
RCMD98
RCMD99
RCMD100
RCMD101
RCMD102
RCMD103
RCMD104
RCMD105
RCMD106
RCMD107 MECB_CMD107
RCMD108
RCMD109
RCMD110
RCMD111
RCMD112
RCMD113
RCMD114
RCMD115
RCMD116
RCMD117
RCMD118
RCMD119
RCMD120
RCMD121
RCMD122
RCMD123
RCMD124
RCMD125
RCMD126
RCMD127

39-5%

RN93

2 7

39 OHM-5%

RN97

54

39 OHM-5%

RNB15

3 6

39 OHM-5%

RN97

3 6

39 OHM-5%

RN98

1 8

39 OHM-5%
RN101

72

39 OHM-5%

RN94

2 7

39 OHM-5%

RNB28

63

39 OHM-5%

RN105

54

39 OHM-5%

RNB28

72

39 OHM-5%

RN98

63

39 OHM-5%

RN102

1 8

RNB11

39 OHM-5%

R338

1 2

39-5%

RN92

2 7

39 OHM-5%
39 OHM-5%

7 2

RN83

RNB11

4 5

39 OHM-5%

R343

1 2

39-5%

21

RNB14

1 8

39 OHM-5%

RNB11

3 6

39 OHM-5%

RN92

3 6

39 OHM-5%

RN94

1 8

39 OHM-5%

RN101

3 6

39 OHM-5%

RN101

4 5

39 OHM-5%

RN94

4 5

39 OHM-5%

RN98

2 7

39 OHM-5%

RN98

4 5

39 OHM-5%

RN105

3 6

39 OHM-5%

RN105

39 OHM-5%

RN102

4 5

39 OHM-5%

72

81

39 OHM-5%

27

RNB10

RN82

3 6

39 OHM-5%
39 OHM-5%

27

RN84

39 OHM-5%

8 1

RN84

39 OHM-5%

6 3

RN83

RNB12

3 6

39 OHM-5%

RNB12

4 5

39 OHM-5%

RN97

2 7

39 OHM-5%

RNB15

72

39 OHM-5%

RN97

81

39 OHM-5%

RN94

63

39 OHM-5%

RNB15

4 5

39 OHM-5%

RNB28

4 5

39 OHM-5%

RN101

1 8

39 OHM-5%

RNB28

1 8

39 OHM-5%

RN105 MECB_CMD119

2 7

39 OHM-5%

RN102

2 7

39 OHM-5%

RN102

63

39 OHM-5%

MECB_CMD73
MECB_CMD74
MECB_CMD75
MECB_CMD76
MECB_CMD77

MECB_CMD79
MECB_CMD80
MECB_CMD81
MECB_CMD82
MECB_CMD83
MECB_CMD84
MECB_CMD85
MECB_CMD86
MECB_CMD87
MECB_CMD88
MECB_CMD89
MECB_CMD90
MECB_CMD91
MECB_CMD92
MECB_CMD93
MECB_CMD94
MECB_CMD95
MECB_CMD96
MECB_CMD97
MECB_CMD98

MECB_CMD99
MECB_CMD100
MECB_CMD101
MECB_CMD102
MECB_CMD103
MECB_CMD104
MECB_CMD105
MECB_CMD106

MECB_CMD108
MECB_CMD109
MECB_CMD110
MECB_CMD111
MECB_CMD112
MECB_CMD113
MECB_CMD114
MECB_CMD115
MECB_CMD116
MECB_CMD117
MECB_CMD118

MECB_CMD120
MECB_CMD121
MECB_CMD122
MECB_CMD123
MECB_CMD124
MECB_CMD125
MECB_CMD126
MECB_CMD127

39 OHM-5%

RNB14
RMECC0
RMECC1
RMECC2
RMECC3
RMECC4
RMECC5
RMECC6
RMECC7
RMECC8
RMECC9
RMECC10
RMECC11
RMECC12
RMECC13
RMECC14
RMECC15

39 OHM-5%

RN93

4 5

39 OHM-5%

RN92

54

39 OHM-5%
39 OHM-5%

45

RNB5

39 OHM-5%

5 4

RN100

39 OHM-5%

5 4

72

RN93

1 8

39 OHM-5%

RNB15

1 8

39 OHM-5%

RNB14

3 6

39 OHM-5%
39 OHM-5%

5 4

RN79

39 OHM-5%

5 4

RNB31

RN93

63

39 OHM-5%

RNB12

72

39 OHM-5%
39 OHM-5%

36

RNB5

39 OHM-5%

5 4

RNB4

RNB13

5 4

39 OHM-5%

MECB_MECC0
MECB_MECC1
MECB_MECC2
MECB_MECC3
MECB_MECC4
MECB_MECC5
MECB_MECC6
MECB_MECC7
MECA_MECC8
MECA_MECC9
MECA_MECC10
MECA_MECC11
MECA_MECC12
MECA_MECC13
MECA_MECC14
MECA_MECC15

RN95

RAECS0_0
RAECS0_1
RAECS0_2
RAECS1_0
RAECS1_1
RAECS1_2

10

10

10

10

10

10

NC_BECS0_0
NC_BECS0_1
NC_BECS0_2
NC_BECS1_0
NC_BECS1_1
NC_BECS1_2

RN73

RACAS
NC_BCAS

NC_BWE

4 5

43-5%
RAWE

RNB9

43-5%

18

AP_CAS

AP_WE

15

15

RB220

1 2

21

1 2

RB230

15

RB209

15

RB226

1 2

21

21

15

RB205

15

RB215

21

15

MECA_CSTRB0
MECA_CSTRB1
MECA_CSTRB2
MECA_CSTRB3
MECB_CSTRB4
MECB_CSTRB5
MECB_CSTRB6
MECB_CSTRB7

13

13

13

13

14

14

14

14

15

KLM_X04 -- CHANGED TO 15 OHM FOR C-STROBES

14

14

14

14

14

14

14

14

14

14

14

14

14

14

14

14

14

14

14

14

14

14

14

14

14

14

14

14

14

14

14

14

14

14

14

14

14

14

14

14

14

14

14

14

14

14

14

14

14

14

14

14

14

14

14

14

14

14

14

14

14

14

14

13

13

13

13

13

13

13

13

U118

A14

GND_1

A2

GND_2

A22

GND_3

A30

GND_4

A6

GND_5

AA11
AA13
AA15
AA17
AA19
AA21
AA23
AA29

AB10
AB12
AB14
AB16
AB18
AB20
AB22
AB26

AC11
AC13
AC17
AC19
AC21

AD10
AD12
AD14
AD16
AD18
AD20
AD25
AD28

AE11
AE14
AE17

AE20
AE23

AF27
AF30
AG10
AG13
AG16
AG19
AG22
AG25

AH27

AJ12
AJ15
AJ18
AJ21
AJ29

AK26

AA6
AB1

AB9

AC8

AD3
AD6
AD9

AE2

AE5
AE8

AG4
AG7

AJ1

AJ6
AJ9

AK4
B11
B19
C16
C24
C27

C4

C8
D13
D21
D30
E10
E18

E2
E25
F15
F23
F28

F7
G12
G20

G4
H17
H26
H30

H7
J10
J12
J14
J16
J18

J2
J20

J9
K10
K12

GND_6
GND_7
GND_8
GND_9
GND_10
GND_11
GND_12
GND_13
GND_14
GND_15
GND_16
GND_17
GND_18
GND_19
GND_20
GND_21
GND_22
GND_23
GND_24
GND_25
GND_26
GND_27
GND_28
GND_29
GND_30
GND_31
GND_32
GND_33
GND_34
GND_35
GND_36
GND_37
GND_38
GND_39
GND_40
GND_41
GND_42
GND_43
GND_44
GND_45
GND_46
GND_47
GND_48
GND_49
GND_50
GND_51
GND_52
GND_53
GND_54
GND_55
GND_56
GND_57
GND_58
GND_59
GND_60
GND_61
GND_62
GND_63
GND_64
GND_65
GND_66
GND_67
GND_68
GND_69
GND_70
GND_71
GND_72
GND_73
GND_74
GND_75
GND_76
GND_77
GND_78
GND_79
GND_80
GND_81
GND_82
GND_83
GND_84
GND_85
GND_86
GND_87
GND_88
GND_89
GND_90
GND_91
GND_92
GND_93
GND_94
GND_95
GND_96
GND_97
GND_98
GND_99
GND_100
GND_101
GND_102
GND_103
GND_104
GND_105

SERVERWORKS GCHE "CMIC" - REV 1.1

HETERO 6 OF 6

DDRRESERVE
TTLRESERVE1
TTLRESERVE2
GTLRESERVE1
GTLRESERVE2
GTLRESERVE3

TITLE

GND_106
GND_107
GND_108
GND_109
GND_110
GND_111
GND_112
GND_113
GND_114
GND_115
GND_116
GND_117
GND_118
GND_119
GND_120
GND_121
GND_122
GND_123
GND_124
GND_125
GND_126
GND_127
GND_128
GND_129
GND_130
GND_131
GND_132
GND_133
GND_134
GND_135
GND_136
GND_137
GND_138
GND_139
GND_140
GND_141
GND_142
GND_143
GND_144
GND_145
GND_146
GND_147
GND_148
GND_149
GND_150
GND_151
GND_152
GND_153
GND_154
GND_155
GND_156
GND_157
GND_158
GND_159
GND_160
GND_161
GND_162
GND_163
GND_164
GND_165
GND_166
GND_167
GND_168
GND_169
GND_170
GND_171
GND_172
GND_173
GND_174
GND_175
GND_176
GND_177
GND_178
GND_179
GND_180
GND_181
GND_182
GND_183
GND_184
GND_185
GND_186
GND_187
GND_188
GND_189
GND_190
GND_191
GND_192
GND_193
GND_194
GND_195
GND_196
GND_197
GND_198
GND_199
GND_200
GND_201

NC1
NC2
NC3

K14
K16
K18
K20
K24
K28
K5
K9
L11
L13
L15
L17
L19
L21
L22
L8
M10
M12
M14
M16
M18
M20
M26
M3
M30
M9
N11
N13
N15
N17
N19
N21
N22
N6
P1
P10
P12
P14
P16
P18
P20
P24
P28
P9
R11
R13
R15
R17
R19
R21
R22
R4
T10
T12
T14
T16
T18
T20
T26
T7
T9
U11
U13
U15
U17
U19
U2
U21
U22
U29
V10
V12
V14
V16
V18
V24
V5
V9
W11
W13
W15
W17
W19
W22
W27
W8
Y10
Y12
Y14
Y16
Y18
Y20
Y24
Y3
Y9
AC15

C29
C2
G6
AH4
AJ4
AD5
AC20
J19
W9

SKEW_IMB
OBSRV_BINIT_EN
BIST_EN
GTL_RESERVED_AH4
GTL_RESERVED_AJ4
NC_GTL_RESERVED_AD5
NC_CMIC_RESERVED_AC20
NC_CMIC_RESERVED_J19
NC_CMIC_RESERVED_W9

COMPUTER
CORPORATION

AUSTIN,TEXAS

+2.5V

21

RB294

11

11

11

RB293

2.7K-5%

1 2

RB300

2.7K-5%

220

1 2

NP*

1

2

3

1

2

3

15

15

15

15

15

15

15

15

ROOM=CMIC

AP_MA7

AP_MA6

AP_MA4

AP_MA3

15

AP_MA16

15

AP_MA5

15

AP_MA14

15

AP_MA8

15

AP_MA15

15

AP_MA11

15

AP_MA12

15

AP_MA13

15

AP_MA1

AP_MA0

AP_MA2

AP_MA10

AP_MA9

RNB8

3 6

43-5%

RNB8

2 7

43-5%

RNB8

4 5

43-5%

RN86

1 8

43-5%

RN76

4 5

43-5%

RN76

3 6

43-5%

RN87

1 8

43-5%

RNB9

4 5

43-5%

RN87

2 7

43-5%

RN87

4 5

43-5%

RN87

3 6

43-5%

RN77

1 8

43-5%

RN77

2 7

43-5%

RN77

3 6

43-5%

RN76

2 7

43-5%

RN76

1 8

43-5%

RMA7

RMA6

RMA4

RB214

1 2

43 OHM

5%

RMA16

RMA5

RMA14

RMA8

RMA15

RMA11

RMA12

RMA13

RMA1

RMA0

RMA2

RMA10

RMA9

10

10

10

RMA3

SUB*_08DFE

10

10

10

10

10

10

10

10

10

10

10

10

10

5

10

08DFE IS 43.2 1%

5

5

5

5

5

5

5

5

5

5

5

5

5

5

5

5

5

5

5

5

5

5

5

5

5

5

5

5

H_ADS

H_ADSTB0
H_ADSTB1

H_AP0
H_AP1

H_BPRI
H_BREQ0
H_BINIT
H_BNR

H_DRDY
H_DBSY
H_DEFER
H_HIT
H_HITM
H_LOCK

H_RS0
H_RS1
H_RS2

H_RSP

H_REQ0
H_REQ1
H_REQ2
H_REQ3
H_REQ4

H_TRDY

H_DP0
H_DP1
H_DP2
H_DP3

5

5

5

5

5

5

5

5

5

5

5

5

5

5

5

5

5

5

5

5

5

5

5

5

5

5

5

5

5

5

5

5

5

10

10

10

10

10

10

10

10

10

10

10

10

H_A3
H_A4
H_A5
H_A6
H_A7
H_A8
H_A9
H_A10
H_A11
H_A12
H_A13
H_A14
H_A15
H_A16
H_A17
H_A18
H_A19
H_A20
H_A21
H_A22
H_A23
H_A24
H_A25
H_A26
H_A27
H_A28
H_A29
H_A30
H_A31
H_A32
H_A33
H_A34
H_A35

RMA0
RMA1
RMA2
RMA3
RMA4
RMA5
RMA6
RMA7

RCSTRB0
RCSTRB1
RCSTRB2
RCSTRB3

AA30

AA22
AB24
AH25
AK25
AK24
AG26
AJ26
AJ28
AH26
AJ27
AH28
AH29
AK27
AK28
AD23
AG24
AD24
AK29
AE28
AF28
AD26
AF25
AF26
AG29
AH30
AE25
AG27
AD27
AD29
AD30
AG30
AF29
AJ30

AE27
AE24

AC25
AC30

Y25

W30
AE30
AA27

AB27
AB28

Y30

Y23

W29
AB29

AA26

Y26

Y29

AC28

AH24
AB23
AC23
AJ24
AC22

Y27

AB25
AA28
AC26
AA24

C18

B18

D18

A19

C17

H16

F17

E17

F30

H24

A25

G18

ADS

A3
A4
A5
A6
A7
A8
A9
A10
A11
A12
A13
A14
A15
A16
A17
A18
A19
A20
A21
A22
A23
A24
A25
A26
A27
A28
A29
A30
A31
A32
A33
A34
A35

AD_STB0
AD_STB1

AP0
AP1

BPRI
BREQ0
BINIT
BNR

DRDY
DBSY
DEFER
HIT
HITM
LOCK

RS0
RS1
RS2

RSP

REQ0
REQ1
REQ2
REQ3
REQ4

TRDY

DP0
DP1
DP2
DP3

MA0
MA1
MA2
MA3
MA4
MA5
MA6
MA7

CSTRB0
CSTRB1
CSTRB2
CSTRB3

SERVERWORKS GCHE "CMIC" REV 1.1

SUB=SUB*_867VX
ADD=ADD*_724YF_U118

WILL NEED HEATSINK FOR CMIC

LM_X04--9C725 changed to 724YF at Celestica's request

HEATSINK W/ LOCTITE384 P#724YF

I2C FOR CMIC IS C0h

867VX IS CMIC REV A2.0 CURRENTLY

REV 1.0 -- NEC UPD84916S8-011
REV 1.1 -- NEC UPD84916S8-012
REV 2.0 -- NEC UPD84919S8-011
REV 2.1 -- NEC UPD?????????????

** DO NOT CHANGE RESISTOR VALUES TO MATCH

4 4

SERVERWORKS SCHEMATIC!! IT IS WRONG! **

** FOLLOW LAYOUT GUIDELINES ONLY! **

A B

15

AP_ECS1_2

15

AP_ECS0_1

RN86

4 5

43-5%

RNB9

3 6

43-5%

RAECS0_1

RAECS1_2

10

10

PROPRIETARY NOTE: THIS ITEM IS THE PROPERTY OF DELL COMPUTER CORP. AUSTIN, TEXAS AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL COMPUTER CORP. EXCEPT
AS AUTHORIZED BY DELL COMPUTER CORP., AND THEN ONLY BY WAY OF LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE
OR IN PART AND MUST BE RETURNED TO DELL COMPUTER CORP. UPON REQUEST AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF THE
LOAN. NEITHER THIS ITEM OR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH
USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT THE PRIOR WRITTEN CONSENT OF DELL COMPUTER CORPORATION.

DWG NO.

DATE

DC

SCHEM,PLN,PE4600,2P

H3007

SHEET

12/5/2003

REV.

A02

10 OF 63

B D

CA

12-5-2003_10:50

+2.5V

+2.5V +2.5V+2.5V+2.5V+2.5V+2.5V

+2.5V

U118

VDD_78
VDD_79
VDD_80
VDD_81
VDD_82
VDD_83
VDD_84
VDD_85
VDD_86
VDD_87

P11
P13
P15
P17
P19
P21
P5
R10
R12
R14

A_IMB_DN_BRKOUT_CLK

11

LOOP_SNGL_A_IMB_DN_CLK

R404

21

NP*

R405

1 2

0-5% 0-5%

R403

21

A_IMB_DN_CLK

17

1

11

IOQ_DEPTH

R298

1 2

NP*

2.7K-5%

11

COMP_IMB

21

R296

NP*

21

2.7K-5%

11

CMIC_DEFER_EN

R293

1 2

2.7K-5%

CMIC_PLL_EN

11

21

R291

NP*

21

2.7K-5%

OBSRV_BINIT

11

R257

1 2

NP*

2.7K-5%

11

EN_BIST

21

R255

21

2.7K-5%

SKEW_IMB_STRAP

11

R252

1 2

2.7K-5%
1 2

CB360

1000pF

50V-10%

4V-20%

820uF

A10

VDD_1

A18

VDD_2

C312

+

21

A26
AA10
AA12
AA14
AA16
AA18

AA2
AA20

VDD_3
VDD_4
VDD_5
VDD_6
VDD_7
VDD_8
VDD_9
VDD_10

1

1 2

0-5%0-5%

21

1 2

0-5%0-5%

1 2

39-5%

1 2

39-5%

.01uF 50V

1uF

10V-10%

R409

39-5%

R389

NP*

R393

1 2

R396

39-5%

R355

NP*

R349

1 2

R356

39-5%

CB213

21

.01uF 50V

CB460

1 2

R413

1 2

0-5%

.01uF 50V

.01uF 50V

1 2

ROOM=CMIC

9,11,60

R250

21

1K-5%

2

R390

220

3

SUB*_9655T

LM_X04--9655T sub for p/n consolidation

39

39

39

39

39

39

39

21

1 2

150-5%

R378

R384

75

SUB*_9655T

CSB_IMB_UP_CLK
CSB_IMB_UP_CON
CSB_IMB_UP_PAR
CSB_IMB_UP_D0
CSB_IMB_UP_D1
CSB_IMB_UP_D2
CSB_IMB_UP_D3

75

21

13-15,17,30,39,60

150-5%

R342

21

1 2

R351

75

SUB*_9655T

39,51,55

15,17,30,53

R299

1K-5%

1 2

CMIC_SRESET

11

11

11

11

11

11

SKEW_IMB_STRAP

11

+2.5V

1 2

150-5%

R341

R340

21

SUB*_5470T

subbed to 150ohm

V7

GPE_CMIC_FATAL

ENV_SEG0_25V_SCL

4

4

CK_100M_CMIC
CK_100M_CMIC

PU : IOQ DEPTH IS 1

PD : IOQ DEPTH IS 12 (default)

19

OEB

CMIC_PLL_EN
CMIC_DEFER_EN
COMP_IMB

2

A1

4

A2

6

A3

IOQ_DEPTH
OBSRV_BINIT
EN_BIST

11
13
15

B1
B2
B3

74VHC244

SUB=SUB*_3535R

A_IMB_UP_CLK

17

B_IMB_UP_CLK

30

A_IMB_UP_CON

17

B_IMB_UP_CON

30

A_IMB_UP_PAR

17

B_IMB_UP_PAR

30

A_IMB_UP_D0

17

A_IMB_UP_D1

17

A_IMB_UP_D2

17

A_IMB_UP_D3

17

A_IMB_UP_D4

17

A_IMB_UP_D5

17

A_IMB_UP_D6

17

A_IMB_UP_D7

17

A_IMB_UP_D8

17

A_IMB_UP_D9

17

A_IMB_UP_D10

17

A_IMB_UP_D11

17

A_IMB_UP_D12

17

A_IMB_UP_D13

17

A_IMB_UP_D14

17

A_IMB_UP_D15

17

B_IMB_UP_D0

30

B_IMB_UP_D1

30

B_IMB_UP_D2

30

B_IMB_UP_D3

30

B_IMB_UP_D4

30

B_IMB_UP_D5

30

B_IMB_UP_D6

30

B_IMB_UP_D7

30

B_IMB_UP_D8

30

B_IMB_UP_D9

30

B_IMB_UP_D10

30

B_IMB_UP_D11

30

B_IMB_UP_D12

30

B_IMB_UP_D13

30

B_IMB_UP_D14

30

B_IMB_UP_D15

30

SUB*_11ERE

V1

432

220

567

V2

100 Ohm 5%

1

RN81

8

subbed to 75ohm

V3

4

100

5

V5

V6

1

2

3

RN90

8

7

6

V4

PLLRST

R295

1K-5%

R292

1K-5%

1 2

NP*

PU : DEFER ENABLED (DEFAULT)

PD : DEFER IS DISABLED

PU : A_IMB IS COMPATIBILITY IMB

PD : THIN IMB IS COMPATIBILITY IMB (DEFAULT)

U88

VOEA

YA1
YA2
YA3
YA4A4
YB1
YB2
YB3
YB4B4

+2.5V

201

18

CMIC_FREEZE

16

CMIC_WARMRST

14

MEMOFF_CSB

128

MEMOFFACK

9

OBSRV_BINIT_EN

7

BIST_EN

5

SKEW_IMB

317

NC_CMIC_BUF_3

11

11

11,39

11

10,11

10,11

10,11

U118

AK1 AD1

A_IMBCLK_R

W2 T8

B_IMBCLK_R

N27 T28

C_IMBCLK_R

AK2 AG1

A_IMBCON_R

AA1 U1

B_IMBCON_R

K30 P30

C_IMBCON_R

AK3 AG2

A_IMBPAR_R

Y2 U3

B_IMBPAR_R

L30 R30

C_IMBPAR_R

AA7

A_IMBD_R0

AA8

A_IMBD_R1

AB6

A_IMBD_R2

AB7

A_IMBD_R3

AB8

A_IMBD_R4

AC5

A_IMBD_R5

AC6

A_IMBD_R6

AC7

A_IMBD_R7

AD4

A_IMBD_R8

AE4

A_IMBD_R9

AE3

A_IMBD_R10

AF3

A_IMBD_R11

AG3

A_IMBD_R12

AH1

A_IMBD_R13

AH2

A_IMBD_R14

AJ3

A_IMBD_R15

U5

B_IMBD_R0

U7

B_IMBD_R1

U8

B_IMBD_R2

U9

B_IMBD_R3

V2

B_IMBD_R4

V3

B_IMBD_R5

V4

B_IMBD_R6

V6

B_IMBD_R7

V7

B_IMBD_R8

V8

B_IMBD_R9

W1

B_IMBD_R10

W3

B_IMBD_R11

W5

B_IMBD_R12

W6

B_IMBD_R13

W7

B_IMBD_R14

Y1

B_IMBD_R15

R24

C_IMBD_R0

R25

C_IMBD_R1

R26

C_IMBD_R2

P23

C_IMBD_R3

P25

C_IMBD_R4

P26

C_IMBD_R5

P27

C_IMBD_R6

P29

C_IMBD_R7

N26

C_IMBD_R8

N28

C_IMBD_R9

N30

C_IMBD_R10

M27

C_IMBD_R11

M28

C_IMBD_R12

M29

C_IMBD_R13

L28

C_IMBD_R14

L29

C_IMBD_R15

J30 H28

D_IMBCLK_R

K29 H29

D_IMBCON_R

K27 J28

D_IMBPAR_R

N23

D_IMBD_R0

N24

D_IMBD_R1

M25

D_IMBD_R2

L26

D_IMBD_R3

FATAL

J8 F5

SCK

W24

BCLKP

W25

BCLKN

IM

RAS

PLLRST

A_IMBCLK_T
B_IMBCLK_T
C_IMBCLK_T

A_IMBCON_T
B_IMBCON_T
C_IMBCON_T

A_IMBPAR_T
B_IMBPAR_T
C_IMBPAR_T

A_IMBD_TO
A_IMBD_T1
A_IMBD_T2
A_IMBD_T3
A_IMBD_T4
A_IMBD_T5
A_IMBD_T6
A_IMBD_T7
A_IMBD_T8

A_IMBD_T9
A_IMBD_T10
A_IMBD_T11
A_IMBD_T12
A_IMBD_T13
A_IMBD_T14
A_IMBD_T15

B_IMBD_TO

B_IMBD_T1

B_IMBD_T2

B_IMBD_T3

B_IMBD_T4

B_IMBD_T5

B_IMBD_T6

B_IMBD_T7

B_IMBD_T8

B_IMBD_T9
B_IMBD_T10
B_IMBD_T11
B_IMBD_T12
B_IMBD_T13
B_IMBD_T14
B_IMBD_T15

C_IMBD_TO

C_IMBD_T1

C_IMBD_T2

C_IMBD_T3

C_IMBD_T4

C_IMBD_T5

C_IMBD_T6

C_IMBD_T7

C_IMBD_T8

C_IMBD_T9
C_IMBD_T10
C_IMBD_T11
C_IMBD_T12
C_IMBD_T13
C_IMBD_T14
C_IMBD_T15

D_IMBCLK_T
D_IMBCON_T
D_IMBPAR_T

D_IMBD_T0

D_IMBD_T1

D_IMBD_T2

D_IMBD_T3

ALERT

IMBVREF1
IMBVREF2

SERVERWORKS GCHE "CMIC" - REV 1.1

HETERO 2 OF 6

SDA

Y4
Y5
Y6
Y8
AA3
AA4
AA5
AB2
AB3
AB4
AC1
AC2
AC3
AD2
AE1
AF2

N1
P2
P3
P4
R1
R2
R3
R5
R6
R7
T1
T2
T4
T5
T6
U4

V29
V30
U23
U24
U26
U27
U28
U30
T22
T23
T24
T25
T27
T29
R28
R29

M24
L25
K26
J27

N4N3

P22
AA9V27

R290

1K-5%

+2.5V

0.1uF 16V
1 2

R_A_IMB_DN_CLK
R_B_IMB_DN_CLK

NC_C_IMBCLK_T

R_A_IMB_DN_CON
R_B_IMB_DN_CON

NC_C_IBMSCON_T

R_A_IMB_DN_PAR
R_B_IMB_DN_PAR

NC_C_IMBPAR_T

R_A_IMB_DN_D0
R_A_IMB_DN_D1
R_A_IMB_DN_D2
R_A_IMB_DN_D3
R_A_IMB_DN_D4
R_A_IMB_DN_D5
R_A_IMB_DN_D6
R_A_IMB_DN_D7
R_A_IMB_DN_D8
R_A_IMB_DN_D9
R_A_IMB_DN_D10
R_A_IMB_DN_D11
R_A_IMB_DN_D12
R_A_IMB_DN_D13
R_A_IMB_DN_D14
R_A_IMB_DN_D15

R_B_IMB_DN_D0
R_B_IMB_DN_D1
R_B_IMB_DN_D2
R_B_IMB_DN_D3
R_B_IMB_DN_D4
R_B_IMB_DN_D5
R_B_IMB_DN_D6
R_B_IMB_DN_D7
R_B_IMB_DN_D8
R_B_IMB_DN_D9
R_B_IMB_DN_D10
R_B_IMB_DN_D11
R_B_IMB_DN_D12
R_B_IMB_DN_D13
R_B_IMB_DN_D14
R_B_IMB_DN_D15

NC_CIMB_DN_D0
NC_CIMB_DN_D1
NC_CIMB_DN_D2
NC_CIMB_DN_D3
NC_CIMB_DN_D4
NC_CIMB_DN_D5
NC_CIMB_DN_D6
NC_CIMB_DN_D7
NC_CIMB_DN_D8
NC_CIMB_DN_D9
NC_CIMB_DN_D10
NC_CIMB_DN_D11
NC_CIMB_DN_D12
NC_CIMB_DN_D13
NC_CIMB_DN_D14
NC_CIMB_DN_D15

R_CSB_IMB_DN_CLK

R_CSB_IMB_DN_D0
R_CSB_IMB_DN_D1
R_CSB_IMB_DN_D2
R_CSB_IMB_DN_D3

GPE_CMIC_ALERT

ENV_SEG0_25V_SDA

CMIC_IMBVREF

RB173

1 2

R256

1 2

PU : APLL DISABLED

PD : APLL IS ENABLED (DEFAULT)

0.1uF 16V

C373

0.1uF 16V

C589

1 2

0.1uF 16V

C573

21

RB263

1 2

A_IMB_DN_BRKOUT_CLK

39-5%

R431

39-5%

1 2

1 2

39-5%

R429

1 2

RB244

1 2

39-5%

39-5%

RNB51

1 8

39 OHM-5%

RNB51

39 OHM-5%

RNB51

54

39 OHM-5%

RN108

3 6

39 OHM-5%

RN108

54

39 OHM-5%

RN108

39 OHM-5%

RNB58

72

39 OHM-5%

RNB58

3 6

39 OHM-5%

RN109

3 6

39 OHM-5%

RN109

4 5

39 OHM-5%

RN109

1 8

39 OHM-5%

RN106

54

39 OHM-5%

RN106

1 8

39 OHM-5%

RN106

3 6

39 OHM-5%

RNB42

3 6

39 OHM-5%

RNB42

72

39 OHM-5%

RNB42

1 8

39 OHM-5%

RN107

3 6

39 OHM-5%

RN107

39 OHM-5%

RNB47

1 8

39 OHM-5%

RNB47

3 6

39 OHM-5%

RNB47

72

39 OHM-5%

11

R_CSB_IMB_DN_CON
R_CSB_IMB_DN_PAR

39,55

15,17,30,53

11

39 OHM-5%

+2.5V

1K-5%

PU : OBSERVE BINIT# (DEFAULT)

PD : IGNORE BINIT#

+2.5V

RB240

1 2

100-1%100-1%

LM_X04--83008 & 78020 sub for p/n consolidation

SUB*_83008

C299

21

RB239

21

CB398

1 2

11

21

B_IMB_DN_BRKOUT_CLK

RB237

RB245

A_IMB_DN_CON
B_IMB_DN_CON

39-5%

A_IMB_DN_PAR
B_IMB_DN_PAR

A_IMB_DN_D0

72

39 OHM-5%

RNB51

3 6

A_IMB_DN_D1
A_IMB_DN_D2
A_IMB_DN_D3
A_IMB_DN_D4

39 OHM-5%

72

39 OHM-5%

RN108

1 8

RNB58

1 8

A_IMB_DN_D5
A_IMB_DN_D6
A_IMB_DN_D7
A_IMB_DN_D8
A_IMB_DN_D9
A_IMB_DN_D10

RNB58

54

39 OHM-5%

A_IMB_DN_D11
A_IMB_DN_D12
A_IMB_DN_D13

RN109

72

39 OHM-5%

A_IMB_DN_D14
A_IMB_DN_D15

B_IMB_DN_D0
B_IMB_DN_D1

RN106

72

39 OHM-5%

B_IMB_DN_D2
B_IMB_DN_D3
B_IMB_DN_D4

RNB42

54

39 OHM-5%

B_IMB_DN_D5
B_IMB_DN_D6
B_IMB_DN_D7

39 OHM-5%

72

39 OHM-5%

RN107

RN107

1 8

54

B_IMB_DN_D8
B_IMB_DN_D9
B_IMB_DN_D10
B_IMB_DN_D11
B_IMB_DN_D12
B_IMB_DN_D13

RNB47

54

39 OHM-5%

B_IMB_DN_D14
B_IMB_DN_D15

ROOM=CMIC

RNB3

NC_RN152_6 NC_RN152_336

39 OHM-5%

RN91

NC_RN116_3NC_RN116_6 6 3

39 OHM-5%

RNB3

27

RN91

4 5

39 OHM-5%

RN91

2 7

39 OHM-5%

RNB3

18

39 OHM-5%

RNB3

39 OHM-5%

RN91

39 OHM-5%

45

81

CSB_IMB_DN_D3

CSB_IMB_DN_PAR

R254

1K-5%

NP*

PU : ENABLE BIST# (DEFAULT)

1uF

10V-10%

CSB_IMB_DN_CON

CSB_IMB_DN_D0

CSB_IMB_DN_D1

CSB_IMB_DN_D2

CB433

SUB*_78020

11

17

30

17

30

PD : DISABLE BIST#

.01UF

1 2

17

17

17

17

17

17

17

17

17

17

17

17

17

17

17

17

30

30

30

30

30

30

30

30

30

30

30

30

30

30

30

30

39

39

39

39

39

39

CB434

50V-20%

11

11

9,11,60

11,39

1 2

11

11

11

220pF

CMIC_AVDD
CMIC_DVDD

R251

1 2

NP*

21

CB393

50V-10%

220pF

VCORE

CMIC_FREEZE
CMIC_SRESET
MEMOFF_CSB
MEMOFFACK
CMIC_TESTMODE

1K-5%

PD : DATA LEADS CLOCK BY 1.25nS

PU : CLOCK & DATA IN PHASE (DEFAULT)

CMIC_IMBVREF

11

50V-10%

U118
AA25
AB11
AB13
AB15
AB17
AB19
AB21
AB30
AC12
AC14
AC16
AC18
AC24
AC27

AD11
AD13
AD15
AD17
AD19
AD21
AD22

AE26
AE29
AF12
AF15
AF18
AF21
AF24

AG28
AH11
AH14
AH17
AH20
AH23

AJ25
AK10
AK13
AK16
AK19
AK22
AK30

AC9

AD7

AF4
AF6
AF9

AH3
AH5
AH8
AJ2

AK7
Y21
Y28

VTT_1
VTT_2
VTT_3
VTT_4
VTT_5
VTT_6
VTT_7
VTT_8
VTT_9
VTT_10
VTT_11
VTT_12
VTT_13
VTT_14
VTT_15
VTT_16
VTT_17
VTT_18
VTT_19
VTT_20
VTT_21
VTT_22
VTT_23
VTT_24
VTT_25
VTT_26
VTT_27
VTT_28
VTT_29
VTT_30
VTT_31
VTT_32
VTT_33
VTT_34
VTT_35
VTT_36
VTT_37
VTT_38
VTT_39
VTT_40
VTT_41
VTT_42
VTT_43
VTT_44
VTT_45
VTT_46
VTT_47
VTT_48
VTT_49
VTT_50
VTT_51
VTT_52
VTT_53

AVDD AGND
DVDD

RESET & TEST

E4

FREEZE

V26

SRESET

H8

MEMOFF

C3

MEMOFFACK

V23

TESTMODE

SERVERWORKS GCHE "CMIC" - REV 1.1

HETERO 4 OF 6

ICOMP

DCOMP

GCOMP0
GCOMP1
GCOMP2

MSTRB0
MSTRB1
MSTRB2
MSTRB3

DSTBN0
DSTBN1
DSTBN2
DSTBN3

DSTBP0
DSTBP1
DSTBP2
DSTBP3

VREFDDR1
VREFDDR2
VREFDDR3
VREFDDR4
VREFDDR5

GTLVREF1
GTLVREF2
GTLVREF3

DGND

CPURST

DLYRESET

WARMRST

PCIRST

0.1uF 16V
CB369

1 2

.01uF 50V

CB399

1 2

.01uF 50V

1 2

LM_X04--83008 sub for p/n consolidation

.01uF 50V

CB384

10V-10%

1uF

SUB*_83008

1 2

1 2

0.1uF 16V

CB380

CB362

LM_X06--SWC said to change ICOMP and DCOMP
resistors from 75 ohms to 250 ohms and GCOMP0
from 249 ohms to 100 ohms

RB204

H22

B28

W28
W26
AD8

E3
H6
B27
C26

AH12
AF13
AJ16
AG17

AJ13
AG14
AJ17
AG15

J13

CMIC_ICOMP

CMIC_DCOMP

CMIC_GCOMP0
CMIC_GCOMP1
CMIC_GCOMP2

RMSTRB0
RMSTRB1
RMSTRB2
RMSTRB3

H_DSTBN0
H_DSTBN1
H_DSTBN2
H_DSTBN3

H_DSTBP0
H_DSTBP1
H_DSTBP2
H_DSTBP3

VREF_CMIC

RB200

39-5%
RB211

1 2

39-5%

5

5

5

5

5

5

5

5

1 2

249 Ohm-1%

R430

1 2

100-1%

21

RB213

1 2

39-5%

RB212

1 2

249 Ohm-1%

1 2

20.5 Ohm-1%

Jaguar H3007 - X00: Changed R433 on GCOMP1

J17
L9
M22
R9

V22
Y22
AC10

V21V20

CMIC_GTLVREF1
CMIC_GTLVREF2
CMIC_GTLVREF3

CMIC_AGND

11

11

11

11

W21W20

AC29
M2
V25

H_RST
CMIC_DLYRST

CMIC_WARMRST

5,9

41

11

M1

CMIC_PCIRST

59

+2.5V

0.1uF 16V

21

0.1uF 16V

C313

1 2

0.1uF 16V

C580

21

0.1uF 16V

C333

1 2

C575

21

0.1uF 16V

CB286

.01uF 50V

10V-10%

1uF

21

1 2

CB390

CB401

CB394

SUB*_83008

10V-10%

1uF

1 2

10V-10%

CB376

0.1uF 16V

.01uF 50V

1uF

21

SUB*_83008

+2.5V

SUB*_83008

VCORE

R433

RB290

21

249 Ohm-1%

SUB=SUB*_20JDN
MECB_MSTRB0
MECB_MSTRB1

RB210

39-5%

MECA_MSTRB2

21

MECA_MSTRB3

from 249 to 332 ohm (P/N 20JDN)
to avoid FSB parity errors, per SW

ROOM=CMIC

+2.5V

21

CB389

RB235

RB233

0.1uF 16V

1 2

1 2

100-1%100-1%

21

1uF

CB379

SUB*_83008

AB5
AC4
AF1

CB402

B15
B23

21

B29

C12
C20

D17
D26

CB400

1 2

E14
E22
E29

F11
F19

G16
G24
G27

CB416

21

H13
H21

J15
J22
J25
J29

K11
K13
K15
K17
K19
K21
L10
L12
L14
L16
L18
L20
L23
L27

M11
M13
M15

14

14

13

13

M17
M19
M21

N10
N12
N14
N16
N18

N20
N25
N29

21

220pF

CB374

10V-10%

LM_X04--83008 sub for p/n consolidation

CB375

50V-10%

1 2

220pF

50V-10%

CB391

VDD_11
VDD_12
VDD_13
VDD_14
VDD_15
VDD_16

B3

VDD_17

B7

VDD_18
VDD_19
VDD_20

D1

VDD_21
VDD_22
VDD_23

D5

VDD_24

D9

VDD_25
VDD_26
VDD_27
VDD_28

E6

VDD_29
VDD_30
VDD_31

F3

VDD_32

G1

VDD_33
VDD_34
VDD_35
VDD_36

G8

VDD_37
VDD_38
VDD_39

H3

VDD_40
VDD_41
VDD_42
VDD_43
VDD_44

J6

VDD_45

K1

VDD_46
VDD_47
VDD_48
VDD_49
VDD_50
VDD_51
VDD_52
VDD_53
VDD_54
VDD_55
VDD_56
VDD_57
VDD_58
VDD_59
VDD_60

L4

VDD_61
VDD_62
VDD_63
VDD_64
VDD_65
VDD_66
VDD_67

M7

VDD_68
VDD_69
VDD_70
VDD_71
VDD_72
VDD_73

N2

VDD_74
VDD_75
VDD_76
VDD_77

SERVERWORKS GCHE "CMIC" - REV 1.1

HETERO 5 OF 6

21

1 2

0.1uF 16V

CB370

0.1uF 16V

1 2

CB373

CB385

0.1uF 16V

VDD_88
VDD_89
VDD_90
VDD_91
VDD_92
VDD_93
VDD_94
VDD_95
VDD_96
VDD_97
VDD_98

VDD_99
VDD_100
VDD_101
VDD_102
VDD_103
VDD_104
VDD_105
VDD_106
VDD_107
VDD_108
VDD_109
VDD_110
VDD_111
VDD_112
VDD_113
VDD_114
VDD_115
VDD_116
VDD_117
VDD_118
VDD_119
VDD_120
VDD_121
VDD_122
VDD_123
VDD_124
VDD_125
VDD_126
VDD_127
VDD_128
VDD_129

21

R16
R18
R20
R23
R27
R8
T11
T13
T15
T17
T19
T21
T3
T30
U10
U12
U14
U16
U18
U20
U25
U6
V1
V11
V13
V15
V17
V19
V28
W10
W12
W14
W16
W18
W23
W4
Y11
Y13
Y15
Y17
Y19
Y7

0.1uF 16V

B_IMB_DN_BRKOUT_CLK

11

R_CSB_IMB_DN_CLK

11

SUB*_83008

NP*

LOOP_DBL_A_IMB_DN_CLK

LOOP_SNGL_B_IMB_DN_CLK

NP*

LOOP_DBL_B_IMB_DN_CLK

LOOP_SNGL_CSB_IMB_DN_CLK

NP*

LOOP_DBL_CSB_IMB_DN_CLK

CMIC_AGND

11

+2.5V

.01uF 50V

CB200

1 2

SUB*_83008

21

21

1uF

CB467

LM_X04--83008 sub for p/n consolidation

CB449

10V-10%

+2.5V

R211

21

ROOM=CMIC

1K-5%

+2.5V

+2.5V

1K-5%

VCOREVCORE

4 4

11

21

C378

220pF

50V-10%

RB288

1 2

RB289

1 2

49.9-1%

SUB*_83008

100-1%

CMIC_GTLVREF2

21

1uF

CB456

10V-10%

21

CB454

220pF

50V-10%

11

1 2

CB455

.01uF 50V

220pF

50V-10%

1 2

CB457

1 2

CB458

1000pF

.01uF 50V

CB395

1 2

C376

1 2

R411

R410

1000pF

50V-10%

1 2

1 2

49.9-1%

SUB*_83008

100-1%

CMIC_GTLVREF1

LM_X04--83008 sub for p/n consolidation

21

C372

1uF

10V-10%

C377

1 2

220pF

50V-10%

VCORE

RB292

LM_X04--83008 sub for p/n consolidation

RB291

50V-10%

1 2

1 2

49.9-1%

SUB*_83008

100-1%

CMIC_GTLVREF3

21

1uF

CB466

10V-10%

1 2

CB464

220pF

50V-10%

11

21

CB465

.01uF 50V

1 2

220pF

50V-10%

CB463

1 2

CB462

R297

1 2

1000pF

10K-5%

50V-10%

21

R249

21

R253

10K-5%

R354

10K-5%

21

21

R362

10K-5%

10K-5%

21

R294

RB241

10K-5%

21

L46

21

1K-5%

1 2

RB181

10K-5%

CMIC_WARMRST

CMIC_TESTMODE
SKEW_IMB
OBSRV_BINIT_EN
MEMOFFACK
MEMOFF_CSB

CMIC_FREEZE

BIST_EN

11

11

10,11

10,11

11

11,39

11

10,11

PROPRIETARY NOTE: THIS ITEM IS THE PROPERTY OF DELL COMPUTER CORP. AUSTIN, TEXAS AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL COMPUTER CORP. EXCEPT
AS AUTHORIZED BY DELL COMPUTER CORP., AND THEN ONLY BY WAY OF LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE
OR IN PART AND MUST BE RETURNED TO DELL COMPUTER CORP. UPON REQUEST AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF THE
LOAN. NEITHER THIS ITEM OR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH
USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT THE PRIOR WRITTEN CONSENT OF DELL COMPUTER CORPORATION.

11

11

11

CMIC_AVDD
CMIC_DVDD

CMIC_AGND

LM_X05--83009 sub for p/n consolidation
LM_X04--83008 sub for p/n consolidation

0.1uF 16V
1 2

22uF 6.3V

CB413

SUB*_83009

1 2

C380

SUB*_83008

10V-10%

1uF

C392

21

22uF 6.3V

1 2

C374

SUB*_83009

10V-10%

1uF

1 2

47uH 135MA

L50

1 2

47uH 135MA

C371

SUB*_83008

R387

1 2

2.2-5%

R416

21

2.2-5%

TITLE

SCHEM,PLN,PE4600,2P

DWG NO.

H3007

DATE

12/5/2003

1 2

R408

NP*

1 2

0-5% 0-5%

R388

B_IMB_DN_CLK

R395

NP*

21

R332

21

CSB_IMB_DN_CLK

1 2

0-5%0-5%

R333

NP*

CB239

21

ROOM=CMIC

.01uF 50V

CB453

CB638

1 2

CB505

COMPUTER
CORPORATION

AUSTIN,TEXAS

SHEET

1 2

1000pF

11 OF 63

30

1 2

CB459

50V-10%

REV.

39

.01uF 50V

1000pF

50V-10%

A02

21

VCORE

1 2

CB461

CB205

1000pF

50V-10%

2

3

A B

DC

ROOM = REMC_PLL

B D

CA

ROOMS COMPLETE

1

1

2

OVERLAP RESISTOR PADS AS MUCH AS POSSIBLE
CK_100M_AP_x_LOOP1 = ~2"
CK_100M_AP_x_LOOP2 = ~4"

CK_100M_AP_N_LOOP1

CK_100M_AP_FIRST_N

4

RB320

1 2

0-5%

RB325

1 2

0-5%

RB329

NP*

0-5%

1 2

CK_100M_AP_N_LOOP_CONNECT

CK_100M_AP_N_LOOP2

NP*

RB330

0-5%

1 2

RB326

1 2

0-5%

NP*

RB321

1 2

0-5%

CK_100M_AP_LAST_N

2

15

3

CK_100M_AP_FIRST_P

4

RB318

1 2

0-5%

RB323

1 2

0-5%

RB327

NP*

0-5%

1 2

CK_100M_AP_P_LOOP_CONNECT

CK_100M_AP_P_LOOP2CK_100M_AP_P_LOOP1

NP*

RB328

1 2

0-5%

RB324

1 2

0-5%

NP*

RB319

1 2

0-5%

CK_100M_AP_LAST_P

15

3

+2.5V

C354

1 2

C351

1 2

0.1uF 16V

C360

1 2

0.1uF 16V

C582

1 2

0.1uF 16V

C586

1 2

0.1uF 16V

C584

1 2

0.1uF 16V

C334

1 2

0.1uF 16V

C332

1 2

0.1uF 16V

C578

1 2

0.1uF 16V

C579

1 2

0.1uF 16V

0.1uF 16V

C331

1 2

C585

1 2

0.1uF 16V

C576

1 2

0.1uF 16V

C574

1 2

0.1uF 16V

C577

1 2

0.1uF 16V

0.1uF 16V

4 4

REMC CLOCK BUFFER

COMPUTER
CORPORATION

AUSTIN,TEXAS

TITLE

SCHEM,PLN,PE4600,2P

PROPRIETARY NOTE: THIS ITEM IS THE PROPERTY OF DELL COMPUTER CORP. AUSTIN, TEXAS AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL COMPUTER CORP. EXCEPT
AS AUTHORIZED BY DELL COMPUTER CORP., AND THEN ONLY BY WAY OF LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE
OR IN PART AND MUST BE RETURNED TO DELL COMPUTER CORP. UPON REQUEST AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF THE
LOAN. NEITHER THIS ITEM OR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH
USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT THE PRIOR WRITTEN CONSENT OF DELL COMPUTER CORPORATION.

DWG NO.

DATE

H3007

12/5/2003

REV.

A02

SHEET

12 OF 63

DC

A B

B D

CA

12-5-2003_10:50

ROOMS COMPLETE

1

ROOM=MECA

13,14

VCC12_MECS

C296

UNIQUE_ID_MEM_CARD_A

13

21

R365

220

1

+12V

L37

21

470nH 6A

L51

1 2

C295

12

+

270uF

16V-20%

12

+

270uF

16V-20%

C452

12

+

270uF

16V-20%

470nH 6A

PLACE CAPS CLOSE TO CONNECTOR

2

3

L. McTeer 1/17/01
Was ground pin

NC_MECA_A2

13,14

13,14

13,14

VCC12_MECS
VCC12_MECS
VCC12_MECS
NC_MECA_A6

MECA_CSTRB1

10

MECA_CSTRB0

10

MECA_CMD18

10

MECA_CMD21

10

MECA_CMD23

10

MECA_CMD19

10

MECA_CMD1

10

MECA_CMD7

10

MECA_CMD5

10

MECA_CMD4

10

MECA_CMD8

10

MECA_CMD9

10

MECA_CMD12

10

MECA_CMD10

10

MECA_CMD25

10

8.2K-5%

VCC25_PWRGD_A

60

+3.3V

RNB2

18

13,14,41,58

MECA_CMD31

10

MECA_CMD29

10

MECA_CMD30

10

MECA_MECC15

10

MECA_MECC13

10

VRM_EN

VCC25_START_A

MECA_B_MA12

15

UNIQUE_ID_MEM_CARD_A

13

MECA_B_MA11

15

MECA_B_MA9

15

MECA_B_MA7

15

MECA_A_MA5

15

6,39,53,57

ENV_SEG0_SDA

VTT_SSTL_A

54

SD_X04 -- changed VRM Enable from PSPG to CPLD VRM_EN

ENV_SEG0 = FRU/LM75 MEM CARD A

VTT_PWRGD_A USED TO MONITOR PWRGD
SIGNAL FROM VTT VOLTAGE REG ON MEM

MECA

A1
A2
A3
A4
A5
A6
A7
A8
A9
A10
A11
A12
A13
A14
A15
A16
A17
A18
A19
A20
A21
A22
A23
A24
A25
A26
A27
A28
A29
A30
A31
A32
A33
A34
A35
A36
A37
A38
A39
A40
A41
A42
A43
A44
A45
A46
A47
A48
A49
A50
A51
A52
A53
A54
A55
A56

B10
B11
B12
B13
B14
B15
B16
B17
B18
B19
B20
B21
B22
B23
B24
B25
B26
B27
B28
B29
B30
B31
B32
B33
B34
B35
B36
B37
B38
B39
B40
B41
B42
B43
B44
B45
B46
B47
B48
B49
B50
B51
B52
B53
B54
B55
B56

SLOT2 WIDE SKT

HETERO 3 OF 3

GND SHIELD

B1
B2
B3
B4
B5
B6
B7
B8
B9

NC_MECA_B2
VCC12_MECS
VCC12_MECS
VCC12_MECS
MECA_CMD17

MECA_CMD20

MECA_CMD16
MECA_CMD22

MECA_CMD3
MECA_CMD6

MECA_CMD2
MECA_CMD0

MECA_CMD15
MECA_CMD13

MECA_CMD14
MECA_CMD11

MECA_CMD24

MECA_CMD28

MECA_CMD26
MECA_CMD27

13,14

13,14

13,14

10

10

10

10

10

10

10

10

10

10

10

10

10

10

10

10

NC_CARDA_B30

MECA_MECC14

MECA_MSTRB3

MECA_MECC12

10

11

10

NC_CARDA_4

REMC_RESET

MECA_A_MA12

14,15,59

15

NC_CARDA_5

NC_CARDA_6
MECA_A_MA11

15

NC_CARDA_7
MECA_A_MA9

15

NC_CARDA_8
MECA_A_MA7

MECA_A_MA8

15

15

NC_CARDA_9

B53 GNDED FOR CARD PRES DETECT/SEATING

NC_CARDA_10

ENV_SEG0_SCL

6,39,53,57

ENV_SEG3 = SPDs/REMCs/PLL MEM CARD A

MECA

+3.3V

15

39,53

39,53

15

15

15

15

15

15

15

15

16

16

16

16

16

16

16

MECA_R2_RAS

16

16

16

10

10

54

NC_CLK0_A_N
NC_CLK0_A_P

MECA_B_MA5

ENV_SEG3_SCL
ENV_SEG3_SDA

MECA_R1_MA10

MECA_B_MA3

MECA_B_MA2

MECA_B_MA1

MECA_B_MA0

MECA_B_CKE

MECA_A_CKE
MECA_R2_MA10

MECA_R1_WE

MECA_R2_BA1

MECA_CS_3

MECA_R1_BA0

MECA_R0_BA0
MECA_CS_0

MECA_R0_WE

MECA_CS_4

MECA_CS_5

NC_CLK1_A_N
NC_CLK1_A_P

NC_CARDA_14

MECA_MECC11

MECA_MECC10

NC_CARDA_20

VCC25_MECA

A57
A58
A59
A60
A61
A62
A63
A64
A65
A66
A67
A68
A69
A70
A71
A72
A73
A74
A75
A76
A77
A78
A79
A80
A81
A82
A83
A84
A85
A86
A87
A88
A89
A90
A91
A92
A93
A94
A95
A96
A97
A98
A99
A100
A101
A102
A103
A104
A105
A106
A107
A108
A109
A110
A111
A112
A113
A114
A115
A116
A117
A118

B57
B58
B59
B60
B61
B62
B63
B64
B65
B66
B67
B68
B69
B70
B71
B72
B73
B74
B75
B76
B77
B78
B79
B80
B81
B82
B83
B84
B85
B86
B87
B88
B89
B90
B91
B92
B93
B94
B95
B96
B97
B98

B99
B100
B101
B102
B103
B104
B105
B106
B107
B108
B109
B110
B111
B112
B113
B114
B115
B116
B117
B118

MECA_B_MA8

MECA_A_MA6

NC_CARDA_25

NC_CARDA_26

MECA_B_MA6

MECA_A_MA4

MECA_B_MA4

MECA_A_MA3
MECA_A_MA2

NC_MECA_B71

MECA_A_MA1

NC_CARDA_28

NC_CARDA_29

MECA_A_MA0

MECA_R0_MA10

MECA_R1_BA1

MECA_R0_BA1

MECA_R1_CAS

MECA_CS_2

MECA_R1_RAS

MECA_CS_1

MECA_R0_RAS

MECA_R0_CAS
MECA_R2_BA0

MECA_R2_WE

MECA_R2_CAS

NC_CARDA_30

NC_CARDA_31

MECA_MSTRB2

MECA_MECC8

MECA_MECC9
MECA_RCMD1

MECA_RCMD2
MECA_RCMD3

MECA_RCMD0

NC_CARDA_32

NC_CARDA_33
NC_CARDA_34

NC_CARDA_35
NC_CARDA_36

15

15

15

15

15

15

15

15

15

15

16

16

16

16

16

16

11

10

10

10

10

10

10

16

16

16

16

16

11,14,15,17,30,39,60

10

10

10

10

10

10

10

10

10

10

10

10

10

10

10

10

10

10

13,14

NC_CARDA_37

PLLRST

MECA_CSTRB2

MECA_CSTRB3
MECA_CMD38

MECA_CMD39
MECA_CMD32

MECA_CMD36
MECA_CMD33

MECA_CMD37
MECA_CMD46

MECA_CMD43
MECA_CMD48

MECA_CMD51
MECA_CMD55

MECA_CMD52
MECA_CMD63

MECA_CMD61
MECA_CMD62

MECA_CMD60
NC_MECA_A160

VCC12_MECS
NC_MECA_A163

MECA

A119
A120
A121
A122
A123
A124
A125
A126
A127
A128
A129
A130
A131
A132
A133
A134
A135
A136
A137
A138
A139
A140
A141
A142
A143
A144
A145
A146
A147
A148
A149
A150
A151
A152
A153
A154
A155
A156
A157
A158
A159
A160
A161
A162
A163
A164
A165

B119
B120
B121
B122
B123
B124
B125
B126
B127
B128
B129
B130
B131
B132
B133
B134
B135
B136
B137
B138
B139
B140
B141
B142
B143
B144
B145
B146
B147
B148
B149
B150
B151
B152
B153
B154
B155
B156
B157
B158
B159
B160
B161
B162
B163
B164
B165

SLOT2 WIDE SKT

HETERO 1 OF 3

GND SHIELD

MECA_SDOE

NC_CARDA_45
NC_CARDA_46

NC_CARDA_47
NC_CARDA_48

NC_MECA_B127

CK_100M_MECA_N
CK_100M_MECA_P

NC_CARDA_B133

MECA_CMD45
MECA_CMD34

MECA_CMD44
MECA_CMD35

MECA_CMD47

MECA_CMD42

MECA_CMD41
MECA_CMD40

MECA_CMD49

MECA_CMD50

MECA_CMD54
MECA_CMD53

MECA_CMD56
MECA_CMD57

MECA_CMD59
MECA_CMD58

VCC12_MECS

NC_MECA_B163

VRM_EN

+3.3V

10

13,14,41,58

VTT_START_A

4

4

10

10

10

10

10

10

10

10

10

10

10

10

10

10

10

10

13,14

R477

1K-5%

1 2

VTT_PWRGD_A

MC_PRES_A

44,51

2

+3.3V

RNB2

72

8.2K-5%

60

3

CARD A

SLOT2 WIDE SKT

HETERO 2 OF 3

GND SHIELD

VCC25_PWRGD_A USED TO MONITOR
PWRGD SIGNAL FROM 2.5V VOLTAGE REG
ON MEM CARD A

VTT_SSTL_A USED TO MONITOR VTT
VOLTAGE FROM MEM CARD A

VCC25_MECA USED TO MONITOR 2.5V
VOLTAGE FROM MEM CARD A

4 4

MEM CARD A

VCC25_START_A USED TO DISABLE 2.5V
VOLTAGE REG UNTIL 12V IS GOOD

VTT_START_A USED TO DISABLE VTT
VOLTAGE REG UNTIL 12V IS GOOD

A B

PROPRIETARY NOTE: THIS ITEM IS THE PROPERTY OF DELL COMPUTER CORP. AUSTIN, TEXAS AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL COMPUTER CORP. EXCEPT
AS AUTHORIZED BY DELL COMPUTER CORP., AND THEN ONLY BY WAY OF LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE
OR IN PART AND MUST BE RETURNED TO DELL COMPUTER CORP. UPON REQUEST AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF THE
LOAN. NEITHER THIS ITEM OR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH
USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT THE PRIOR WRITTEN CONSENT OF DELL COMPUTER CORPORATION.

TITLE

DWG NO.

DATE

DC

COMPUTER
CORPORATION

AUSTIN,TEXAS

SCHEM,PLN,PE4600,2P

H3007

SHEET

12/5/2003

REV.

A02

13 OF 63

B D

CA

+2.5V

12-5-2003_10:50

ROOMS COMPLETE

1

2

3

ROOM = MECB

L. McTeer 1/17/01
Was ground pin

MECB

NC_MECB_A2 NC_MECB_B2

13,14

13,14

13,14

VCC12_MECS
VCC12_MECS
VCC12_MECS
NC_MECB_A6

MECB_CSTRB7

10

MECB_CSTRB6

10

MECB_CMD114

10

MECB_CMD117

10

MECB_CMD119

10

MECB_CMD115

10

MECB_CMD97

10

MECB_CMD103

10

MECB_CMD101

10

MECB_CMD100

10

MECB_CMD104

10

MECB_CMD105

10

MECB_CMD108

10

MECB_CMD106

10

MECB_CMD121

53,55

10

MECB_CMD127

10

MECB_CMD125

10

MECB_CMD126

10

MECB_MECC7

10

MECB_MECC5

10

VRM_EN

MECB_D_MA12

15

UNIQUE_ID_MEM_CARD_B

14

MECB_D_MA11

15

MECB_D_MA9

15

MECB_D_MA7

15

MECB_C_MA5

15

ENV_SEG4_SDA

VTT_SSTL_B

54

+3.3V

8.2K-5%
RNB2

36

VCC25_PWRGD_B

60

13,14,41,58

VCC25_START_B

SD_X04 -- changed VRM Enable from PSPG to CPLD VRM_EN

A1
A2
A3
A4
A5
A6
A7
A8
A9
A10
A11
A12
A13
A14
A15
A16
A17
A18
A19
A20
A21
A22
A23
A24
A25
A26
A27
A28
A29
A30
A31
A32
A33
A34
A35
A36
A37
A38
A39
A40
A41
A42
A43
A44
A45
A46
A47
A48
A49
A50
A51
A52
A53
A54
A55
A56

SLOT2 WIDE SKT

HETERO 3 OF 3

GND SHIELD

B1
B2
B3
B4
B5
B6
B7
B8

B9
B10
B11
B12
B13
B14
B15
B16
B17
B18
B19
B20
B21
B22
B23
B24
B25
B26
B27
B28
B29
B30
B31
B32
B33
B34
B35
B36
B37
B38
B39
B40
B41
B42
B43
B44
B45
B46
B47
B48
B49
B50
B51
B52
B53
B54
B55
B56

ENV_SEG4 = FRU/LM75 MEM CARD B

VTT_PWRGD_B USED TO MONITOR PWRGD
SIGNAL FROM VTT VOLTAGE REG ON MEM
CARD B

VCC25_PWRGD_B USED TO MONITOR
PWRGD SIGNAL FROM 2.5V VOLTAGE REG
ON MEM CARD B

VCC12_MECS
VCC12_MECS
VCC12_MECS

MECB_CMD113

MECB_CMD116

MECB_CMD112
MECB_CMD118

MECB_CMD99
MECB_CMD102

MECB_CMD98
MECB_CMD96

MECB_CMD111
MECB_CMD109

MECB_CMD110
MECB_CMD107

MECB_CMD120

MECB_CMD124

MECB_CMD122
MECB_CMD123

NC_CARDB_B30

MECB_MECC6

MECB_MSTRB1

MECB_MECC4

NC_CARDB_4

REMC_RESET

MECB_C_MA12

NC_CARDB_5

NC_CARDB_6
MECB_C_MA11

NC_CARDB_7
MECB_C_MA9

NC_CARDB_8
MECB_C_MA7

MECB_C_MA8
NC_CARDB_9

B53 GNDED FOR CARD PRES DETECT/SEATING

NC_CARDB_10

ENV_SEG4_SCL

13,14

13,14

13,14

10

10

10

10

10

10

10

10

10

10

10

10

10

10

10

10

10

11

10

13,15,59

15

15

15

15

15

53,55

ENV_SEG7 = SPDs/REMCs/PLL MEM CARD B

MECB

MECB_D_MA8

MECB_C_MA6

NC_CARDB_25

NC_CARDB_26

MECB_D_MA6

MECB_C_MA4

MECB_D_MA4

MECB_C_MA3
MECB_C_MA2

NC_MECB_B71

MECB_C_MA1
NC_CARDB_28

NC_CARDB_29
MECB_C_MA0

MECB_R0_MA10

MECB_R1_BA1

MECB_R0_BA1

MECB_R1_CAS

MECB_CS_2

MECB_R1_RAS

MECB_CS_1

MECB_R0_RAS

MECB_R0_CAS
MECB_R2_BA0

MECB_R2_WE

MECB_R2_CAS

NC_CARDB_30

NC_CARDB_31

MECB_MSTRB0

MECB_MECC0

MECB_MECC1
MECB_RCMD1

MECB_RCMD2
MECB_RCMD3

MECB_RCMD0

NC_CARDB_32

NC_CARDB_33
NC_CARDB_34

NC_CARDB_35
NC_CARDB_36

+3.3V

15

39,53

39,53

15

15

15

15

15

15

15

15

16

16

16

16

16

16

16

MECB_R2_RAS

16

16

16

10

10

54

NC_CLK0_B_N
NC_CLK0_B_P

MECB_D_MA5

ENV_SEG7_SCL
ENV_SEG7_SDA

MECB_R1_MA10

MECB_D_MA3

MECB_D_MA2

MECB_D_MA1

MECB_D_MA0

MECB_D_CKE

MECB_C_CKE
MECB_R2_MA10

MECB_R1_WE

MECB_R2_BA1

MECB_CS_3

MECB_R1_BA0

MECB_R0_BA0
MECB_CS_0

MECB_R0_WE

MECB_CS_4

MECB_CS_5

NC_CLK1_B_N
NC_CLK1_B_P

NC_CARDB_14

MECB_MECC3

MECB_MECC2

NC_CARDB_20

VCC25_MECB

A57
A58
A59
A60
A61
A62
A63
A64
A65
A66
A67
A68
A69
A70
A71
A72
A73
A74
A75
A76
A77
A78
A79
A80
A81
A82
A83
A84
A85
A86
A87
A88
A89
A90
A91
A92
A93
A94
A95
A96
A97
A98
A99
A100
A101
A102
A103
A104
A105
A106
A107
A108
A109
A110
A111
A112
A113
A114
A115
A116
A117
A118

B57
B58
B59
B60
B61
B62
B63
B64
B65
B66
B67
B68
B69
B70
B71
B72
B73
B74
B75
B76
B77
B78
B79
B80
B81
B82
B83
B84
B85
B86
B87
B88
B89
B90
B91
B92
B93
B94
B95
B96
B97
B98

B99
B100
B101
B102
B103
B104
B105
B106
B107
B108
B109
B110
B111
B112
B113
B114
B115
B116
B117
B118

SLOT2 WIDE SKT

HETERO 2 OF 3

GND SHIELD

15

15

15

15

15

15

15

15

15

15

16

16

16

16

16

16

11

10

10

10

10

10

10

16

16

16

16

16

14

11,13,15,17,30,39,60

10

10

10

10

10

10

10

10

10

10

10

10

10

10

10

10

10

10

13,14

R370

1K-5%

1 2

UNIQUE_ID_MEM_CARD_B

X03 - was 5V - LM 3/23/01

MECB

A119

NC_CARDB_37

PLLRST

MECB_CSTRB4

MECB_CSTRB5
MECB_CMD70

MECB_CMD71
MECB_CMD64

MECB_CMD68
MECB_CMD65

MECB_CMD69
MECB_CMD78

MECB_CMD75
MECB_CMD80

MECB_CMD83
MECB_CMD87

MECB_CMD84
MECB_CMD95

MECB_CMD93
MECB_CMD94

MECB_CMD92
NC_MECA_B160

VCC12_MECS
NC_MECB_A163 NC_MECB_B163

A120
A121
A122
A123
A124
A125
A126
A127
A128
A129
A130
A131
A132
A133
A134
A135
A136
A137
A138
A139
A140
A141
A142
A143
A144
A145
A146
A147
A148
A149
A150
A151
A152
A153
A154
A155
A156
A157
A158
A159
A160
A161
A162
A163
A164
A165

B119
B120
B121
B122
B123
B124
B125
B126
B127
B128
B129
B130
B131
B132
B133
B134
B135
B136
B137
B138
B139
B140
B141
B142
B143
B144
B145
B146
B147
B148
B149
B150
B151
B152
B153
B154
B155
B156
B157
B158
B159
B160
B161
B162
B163
B164
B165

NC_CARDB_45

NC_CARDB_46

NC_MECB_B127

CK_100M_MECB_N
CK_100M_MECB_P

NC_CARDB_B133

MECB_SDOE

NC_CARDB_47
NC_CARDB_48

MECB_CMD77
MECB_CMD66

MECB_CMD76
MECB_CMD67

MECB_CMD79

MECB_CMD74

MECB_CMD73
MECB_CMD72

MECB_CMD81

MECB_CMD82

MECB_CMD86
MECB_CMD85

MECB_CMD88
MECB_CMD89

MECB_CMD91
MECB_CMD90

VCC12_MECS

SLOT2 WIDE SKT

HETERO 1 OF 3

GND SHIELD

VRM_EN

10

13,14,41,58

VTT_START_B

4

4

10

10

10

10

10

10

10

10

10

10

10

10

10

10

10

10

13,14

+3.3V

R522

1 2

1K-5%

MC_PRES_B

VTT_PWRGD_B

1

44,51

2

+3.3V

RNB2

54

8.2K-5%

60

3

VTT_SSTL_B USED TO MONITOR VTT
VOLTAGE FROM MEM CARD B

VCC25_B USED TO MONITOR 2.5V
VOLTAGE FROM MEM CARD B

VCC25_START_B USED TO DISABLE 2.5V
VOLTAGE REG UNTIL 12V IS GOOD

4 4

MEM CARD B

VTT_START_B USED TO DISABLE VTT
VOLTAGE REG UNTIL 12V IS GOOD

COMPUTER
CORPORATION

A B

PROPRIETARY NOTE: THIS ITEM IS THE PROPERTY OF DELL COMPUTER CORP. AUSTIN, TEXAS AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL COMPUTER CORP. EXCEPT
AS AUTHORIZED BY DELL COMPUTER CORP., AND THEN ONLY BY WAY OF LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE
OR IN PART AND MUST BE RETURNED TO DELL COMPUTER CORP. UPON REQUEST AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF THE
LOAN. NEITHER THIS ITEM OR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH
USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT THE PRIOR WRITTEN CONSENT OF DELL COMPUTER CORPORATION.

TITLE

DWG NO.

DATE

DC

AUSTIN,TEXAS

SCHEM,PLN,PE4600,2P

H3007

SHEET

12/5/2003

REV.

A02

14 OF 63

B D

CA

12-5-2003_10:50

ROOMS COMPLETE

1

2

ECS0_0=0=PLL ENABLED

3

~ALERT=1=AP MODE

AP_ECS0_0

10

GPE_REMC_ALERT

39

+2.5V

+2.5V

R379

1 2

R372

1 2

+2.5V

RB217

1 2

RB161

1 2

LM_X04 -- REMC PINOUT

R6 & D13 PINOUT WRONG

ON PRIOR REMC APs
SERVERWORKS ERROR

AP_MA16

10

NC_REMC_AP_R6
AP_MA15

10

AP_CKE

10

AP_MEMPAR

10

RB225

NP*

2.2K-5% 2.2K-5%

2.2K-5%

1K-5%

1 2

249 Ohm-1%

+2.5V

21

RB222

PU_ISOLATE

2.2K-5%

COMP0_AP

AP_MA14

10

AP_MA13

10

AP_MA2

10

AP_MA11

10

AP_MA10

10

AP_MA9

10

AP_MA8

10

AP_MA7

10

AP_MA6

10

AP_MA5

10

AP_MA4

10

AP_MA3

10

AP_MA12

10

AP_MA1

10

AP_MA0

10

10

10

NC_R3_WE_1
RR2_WE_1

16

RR1_WE_1

16

RR0_WE_1

16

NC_R3_RAS_1
RR2_RAS_1

16

RR1_RAS_1

16

RR0_RAS_1

16

16

16

16

NC_R3_BA1_0

RR2_BA1_0

16

RR1_BA1_0

16

RR0_BA1_0

16

16

16

16

16

16

16

16

16

16

16

16

16

16

16

16

MECB_D_CKE

14

MECB_C_CKE

14

MECA_B_CKE

13

MECA_A_CKE

13

10

10

10

10

10

10

AP_ECS1_2
AP_ECS1_1

NC_R3_CAS_1
RR2_CAS_1
RR1_CAS_1
RR0_CAS_1

NC_B_CS_7
NC_A_CS_7
NC_B_CS_6
NC_A_CS_6

RB_CS_5
RA_CS_5
RB_CS_4
RA_CS_4

RB_CS_3
RA_CS_3
RB_CS_2
RA_CS_2

RB_CS_1
RA_CS_1
RB_CS_0
RA_CS_0

NC_R3_BA0_0
RR2_BA0_0
RR1_BA0_0
RR0_BA0_0

AP_ECS1_0
AP_ECS0_2
AP_ECS0_1

AP_WE
AP_RAS

AP_CAS

L12

D13

B14
C13
B15
C14

N15

CSTRB1_1/MA16

R6

CSTRB1_0/NC

G3

CSTRB0_1/MA15

D9

CSTRB0_0/CKE

MSTRB/MEMPAR

C3

COMP0

A2

RSVD2/ECS1_2

B3

RSVD1/ECS1_1

CMD9_3/D_WE1
CMD9_2/C_WE1
CMD9_1/B_WE1
CMD9_0/A_WE1

E12

CMD8_3/D_RAS1

D14

CMD8_2/C_RAS1

F11

CMD8_1/B_RAS1

D15

CMD8_0/A_RAS1

K11

CMD7_3/D_CAS1

L14

CMD7_2/C_CAS1

L13

CMD7_1/B_CAS1

M15

CMD7_0/A_CAS1

M14

CMD6_3/D_BA1_0
CMD6_2/C_BA1_0

M13

CMD6_1/B_BA1_0

L11

CMD6_0/A_BA1_0

R7

CMD5_3/B_CS7

P7

CMD5_2/A_CS7

N7

CMD5_1/B_CS6

M7

CMD5_0/A_CS6

N6

CMD4_3/B_CS5

M6

CMD4_2/A_CS5

R5

CMD4_1/B_CS4

L6

CMD4_0/A_CS4

H2

CMD3_3/B_CS3

H3

CMD3_2/A_CS3

G1

CMD3_1/B_CS2

G2

CMD3_0/A_CS2

G4

CMD2_3/B_CS1

F1

CMD2_2/A_CS1

F2

CMD2_1/B_CS0

F3

CMD2_0/A_CS0

C8

CMD1_3/D_BA0_0

A9

CMD1_2/C_BA0_0

B9

CMD1_1/B_BA0_0

C9

CMD1_0/A_BA0_0

A10

CMD0_3/D_CKE0

B10

CMD0_2/C_CKE0

C10

CMD0_1/B_CKE0

D10

CMD0_0/A_CKE0

C4

RCMD3/ECS1_0

B4

RCMD2/ECS0_2

D5

RCMD1/ECS0_1

A3

RCMD0/ECS0_0

F15

DQS8_1/WE

G11

DQS8_0/RAS

J14

DQS7_1/CAS

J13

DQS7_0/MA14

R13

DQS6_1/MA13

M11

DQS6_0/MA2

N9

DQS5_1/MA11

R9

DQS5_0/MA10

M3

DQS4_1/MA9

N1

DQS4_0/MA8

K1

DQS3_1/MA7

J4

DQS3_0/MA6

E4

DQS2_1/MA5

D2

DQS2_0/MA4

A6

DQS1_1/MA3

D7

DQS1_0/MA12

A13

DQS0_1/MA1

C12

DQS0_0/MA0

B2

ISOLATE

A4

SDOE/ALERT

U117

REMC Version 1.0

HETERO 1 OF 2

ROOM = REMC_ADDR

SD8_7/D_WE
SD8_6/C_WE
SD8_5/B_WE

SD8_4/A_WE
SD8_3/D_RAS
SD8_2/C_RAS
SD8_1/B_RAS
SD8_0/A_RAS

SD7_7/D_CAS
SD7_6/C_CAS
SD7_5/B_CAS
SD7_4/A_CAS

SD7_3/D_MA12
SD7_2/C_MA12
SD7_1/B_MA12
SD7_0/A_MA12

SD6_7/D_BA1_1
SD6_6/C_BA1_1
SD6_5/B_BA1_1
SD6_4/A_BA1_1

SD6_3/D_MA2
SD6_2/C_MA2
SD6_1/B_MA2
SD6_0/A_MA2

SD5_7/D_MA11
SD5_6/C_MA11
SD5_5/B_MA11
SD5_4/A_MA11
SD5_3/D_MA10
SD5_2/C_MA10
SD5_1/B_MA10
SD5_0/A_MA10

SD4_7/D_MA9
SD4_6/C_MA9
SD4_5/B_MA9
SD4_4/A_MA9
SD4_3/D_MA8
SD4_2/C_MA8
SD4_1/B_MA8
SD4_0/A_MA8

SD3_7/D_MA7
SD3_6/C_MA7
SD3_5/B_MA7
SD3_4/A_MA7
SD3_3/D_MA6
SD3_2/C_MA6
SD3_1/B_MA6
SD3_0/A_MA6

SD2_7/D_MA5
SD2_6/C_MA5
SD2_5/B_MA5
SD2_4/A_MA5
SD2_3/D_MA4
SD2_2/C_MA4
SD2_1/B_MA4
SD2_0/A_MA4

SD1_7/D_MA3
SD1_6/C_MA3
SD1_5/B_MA3
SD1_4/A_MA3

SD1_3/D_BA0_1
SD1_2/C_BA0_1
SD1_1/B_BA0_1
SD1_0/A_BA0_1

SD0_7/D_MA1
SD0_6/C_MA1
SD0_5/B_MA1
SD0_4/A_MA1
SD0_3/D_MA0
SD0_2/C_MA0
SD0_1/B_MA0
SD0_0/A_MA0

E14
E15
F13
F14
G12
G13
G15
H11

H15
H14
H13
J15
J12
K15
K14
K13

N13
R14
P13
N12
P12
R12
N11
M10

N10
P10
R10
M9
P9
M8
R8
P8

P2
N3
P1
N2
L4
M2
K5
M1

L2
L1
K3
K2
J3
J1
J2
H5

F5
E2
E3
D1
C1
D3
C2
B1

B5
A5
C6
B6
C7
A7
B7
D8

C11
A12
D11
B12
E11
A14
B13
D12

NC_R3_WE_0

RR2_WE_0
RR1_WE_0

RR0_WE_0
NC_R3_RAS_0
RR2_RAS_0
RR1_RAS_0
RR0_RAS_0

NC_R3_CAS_0
RR2_CAS_0
RR1_CAS_0
RR0_CAS_0

NC_R3_BA1_1
RR2_BA1_1
RR1_BA1_1
RR0_BA1_1

NC_R3_BA0_1
RR2_BA0_1
RR1_BA0_1
RR0_BA0_1

MECB_D_MA12
MECB_C_MA12
MECA_B_MA12
MECA_A_MA12

MECB_D_MA2
MECB_C_MA2
MECA_B_MA2
MECA_A_MA2

MECB_D_MA11
MECB_C_MA11
MECA_B_MA11
MECA_A_MA11
NC_R3_MA10

R2_MA10
R1_MA10
R0_MA10

MECB_D_MA9
MECB_C_MA9
MECA_B_MA9
MECA_A_MA9
MECB_D_MA8
MECB_C_MA8
MECA_B_MA8
MECA_A_MA8

MECB_D_MA7
MECB_C_MA7
MECA_B_MA7
MECA_A_MA7
MECB_D_MA6
MECB_C_MA6
MECA_B_MA6
MECA_A_MA6

MECB_D_MA5
MECB_C_MA5
MECA_B_MA5
MECA_A_MA5
MECB_D_MA4
MECB_C_MA4
MECA_B_MA4
MECA_A_MA4

MECB_D_MA3
MECB_C_MA3
MECA_B_MA3
MECA_A_MA3

MECB_D_MA1
MECB_C_MA1
MECA_B_MA1
MECA_A_MA1
MECB_D_MA0
MECB_C_MA0
MECA_B_MA0
MECA_A_MA0

KLM_X03 -- DEPOPPED REF CAP

C358 needs to be subbed to 83008 if ever populated

16

16

16

16

16

16

16

16

16

16

16

16

16

16

16

14

14

13

13

14

14

13

13

14

14

13

13

15

15

15

14

14

13

13

14

14

13

13

14

14

13

13

14

14

13

13

14

14

13

13

14

14

13

13

14

14

13

13

14

14

13

13

14

14

13

13

C590

1 2

SUB*_78020

LM_X04--83008 & 78020 sub for p/n consolidation

CB368

.01UF

50V-20%

.01UF

1 2

SUB*_78020

50V-20%

1 2

CB428

OPTION TO TAKE REMC AP OFF I2C BUS

11,17,30,53

Jaguar 2.0 Change: REMC should not answer on I2C when addressed.

Depop U172, RB218, and pop RB216, RB219 to 2.5V

11,17,30,53

LM_X05 -- Popped fix since using 2.0 REMCs in prod
LM_X04 -- Fast Edge fix for REMC

REMC AP SCL NEEDS FAST EDGE

ENV_SEG0_25V_SCL

NP*

21

220pF

C347

50V-10%

ENV_SEG0_25V_SDA

220pF

SUB*_83008

21

C387

21

C348

50V-10%

1uF

10V-10%

1uF

10V-10%

+2.5V

R357

1 2

R358

1 2

NP*

100-1%

SSTLREF_R5

100-1%

RB218

1 2

0-5%

+2.5V

143U172

1
2

74VHC08

+2.5V

21

RB242

+2.5V

20K-5%

21

NP*

1K-1%

RB216

REMC_AP_SDA

+2.5V

20K-5%

TESTMODE_AP

15

RB219

21

REMC_AP_SCL

12,15

12,15

13,14,59

DELAY LOOPS ON PAGE 63

12,15

CK_100M_AP_LAST_N
CK_100M_AP_LAST_P

11,13,14,17,30,39,60

REMC_RESET

REMC_AP_SDA

15

REMC_AP_SCL

15

SSTLREF_R5

15

15

15

+2.5V

CK_100M_AP_LAST_N

PLLRST

+2.5V

10V-20%

+

33uF

1

2

2

1

CB392

1000pF

50V-10%

2

1

CB404

C317

1000pF

M12

R15
P15

P14
P11

L15

K10

J11
J10

H12

G10

F10

E13

A15
A11

10V-20%

+

33uF

1

1

CB405

50V-10%

R2

CLKN

P3

CLKP

N5

PLLRST

TESTMODE

A1

RESET

L5

SDA

N4

SCK

VREF_R15
VREF_P15

D4

VREF_D4

C5

VREF_C5

VDD_P14
VDD_P11

P6

VDD_P6

M4

VDD_M4
VDD_L15

L9

VDD_L9

L7

VDD_L7
VDD_K10

K9

VDD_K9

K7

VDD_K7

K6

VDD_K6

K4

VDD_K4
VDD_J11
VDD_J10

J6

VDD_J6
VDD_H12

H4

VDD_H4

H1

VDD_H1
VDD_G10

G6

VDD_G6

VDD_F10

F9

VDD_F9

F7

VDD_F7

F6

VDD_F6

F4

VDD_F4
VDD_E13

E9

VDD_E9

E7

VDD_E7

D6

VDD_D6

B8

VDD_B8
VDD_A15
VDD_A11

C344

2

2

1000pF

10V-20%

+

100uF

1

1

CB365

50V-10%

RB223

1 2

120-5%

NP*

U117

REMC Version 1.0

HETERO 2 OF 2

+2.5V

10V-20%

+

C318

2

33uF

1

C343

2

2

1000pF

50V-10%

CK_100M_AP_LAST_P

DVDD
DGND
AVDD
AGND

GND_R11

GND_R1
GND_P5

GND_N14

GND_N8

GND_L10

GND_L8
GND_L3

GND_K12

GND_K8
GND_J9
GND_J8
GND_J7
GND_J5

GND_H10

GND_H9
GND_H8
GND_H7
GND_H6

GND_G14

GND_G9

GND_G8
GND_G7
GND_G5

GND_F12

GND_F8

GND_E10

GND_E8
GND_E6
GND_E5

GND_E1
GND_C15
GND_B11

GND_A8

2

1

CB361

R3
P4
M5
R4

R11
R1
P5
N14
N8
L10
L8
L3
K12
K8
J9
J8
J7
J5
H10
H9
H8
H7
H6
G14
G9

G8
G7
G5
F12
F8
E10
E8
E6
E5
E1
C15
B11
A8

LM_X04--83008 sub for p/n consolidation

SUB*_83008

21

CB396

1000pF

50V-10%

1uF

10V-10%

12,15

21

L38

47uH 135MA

22uF 10V

12

BE USED ON NEW DESIGNS.

C346

THIS PART IS NOT TO

AGND_AP_REMC

R0_MA10

15

R1_MA10

15

R2_MA10

15

12

C335

R359

1 2

2-5%

0.1uF 16V

15

+2.5V

1 8

3 6

1 8

RNB40

22-5%

RNB40

22-5%

RNB40

22-5%

RNB40

22-5%

RNB18

22-5%

RNB18

22-5%

15

MECA_R0_MA10

MECB_R0_MA10

72

MECA_R1_MA10

MECB_R1_MA10

54

MECA_R2_MA10

MECB_R2_MA10

72

AGND_AP_REMC

RB224

1 2

0-5%

13

14

13

14

13

14

NC_RN4_4

unused pins tied together to reduce TP's

1

2

3

RNB18

3 6

22-5%

RNB18

54

22-5%

NP*

+2.5V

SUB*_13JJW

C375

1 2

C583

1 2

0.1uF 16V

C581

1 2

0.1uF 16V

0.1uF 16V

13JJW IS REMC REV A2.0 CURRENTLY

+2.5V

REV 1.0 -- NEC UPD84910S1-011
REV 1.1 -- NEC UPD84910S1-012

SUB*_78020

SUB*_78020

SUB*_78020

REV 2.0 -- NEC UPD84917S1-011

4 4

REV 2.1 -- NEC UPD??????????

CB417

1 2

.01UF

50V-20%

CB363

1 2

CB377

.01UF

50V-20%

.01UF

1 2

50V-20%

CB364

1 2

CB366

.01UF

50V-20%

1 2

CB371

.01UF

50V-20%

.01UF

1 2

50V-20%

REMC AP

SUB*_78020

SUB*_78020

LM_X04--Sub for part consolidation

SUB*_78020

COMPUTER
CORPORATION

A B

CENTER

PROPRIETARY NOTE: THIS ITEM IS THE PROPERTY OF DELL COMPUTER CORP. AUSTIN, TEXAS AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL COMPUTER CORP. EXCEPT
AS AUTHORIZED BY DELL COMPUTER CORP., AND THEN ONLY BY WAY OF LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE
OR IN PART AND MUST BE RETURNED TO DELL COMPUTER CORP. UPON REQUEST AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF THE
LOAN. NEITHER THIS ITEM OR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH
USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT THE PRIOR WRITTEN CONSENT OF DELL COMPUTER CORPORATION.

TITLE

DWG NO.

DATE

DC

AUSTIN,TEXAS

SCHEM,PLN,PE4600,2P

REV.

H3007

SHEET

12/5/2003 15 OF 63

A02

B D

CA

12-5-2003_10:50

ROOMS COMPLETE

1

2

3

14

MECB_R2_CAS

RN111

3 6

RR2_CAS_1

39 OHM-5%

RN111

4 5

NC_RN7013_5NC_RN7013_4

39 OHM-5%

MECB_R0_CAS

14

RN111

1 8

39 OHM-5%

14

MECB_R1_BA0

RN111

2 7

39 OHM-5%

RN113

RR1_CAS_0

15

3 6

MECA_R1_CAS

39 OHM-5%

RN113

4 5

NC_RN7014_5NC_RN7014_4

39 OHM-5%

RR1_RAS_0

15

RN113

1 8

MECA_R1_RAS

39 OHM-5%

RN113

RR2_RAS_0

15

2 7

MECA_R2_RAS

39 OHM-5%

RR2_BA0_0

15

RNB52

3 6

MECA_R2_BA0

39 OHM-5%

RNB52

RR2_BA0_1

15

4 5

MECA_R2_BA1

39 OHM-5%

RNB52

RR1_BA0_1

15

2 7

MECA_R1_BA1

39 OHM-5%

RNB52

1 8

NC_RN7015_8NC_RN7015_1

39 OHM-5%

RR2_RAS_1

15

RN114

1 8

MECB_R2_RAS

39 OHM-5%

RR0_RAS_1

15

RN115

4 5

MECB_R0_RAS

39 OHM-5%

RN115

RR1_WE_1

15

1 8

MECB_R1_WE

39 OHM-5%

RR0_WE_1

15

RN115

2 7

MECB_R0_WE

39 OHM-5%

RN115

RR2_WE_1

15

3 6

MECB_R2_WE

39 OHM-5%

RR0_WE_0

15

RN114

4 5

MECA_R0_WE

39 OHM-5%

RR2_WE_0

15

RN114

2 7

MECA_R2_WE

39 OHM-5%

RR1_WE_0

15

RN114

3 6

MECA_R1_WE

39 OHM-5%

RNB53

RR1_BA0_0

15

4 5

MECA_R1_BA0

39 OHM-5%

RR0_BA0_0

15

RNB53

3 6

MECA_R0_BA0

39 OHM-5%

RR0_BA0_1

15

RNB53

2 7

MECA_R0_BA1

39 OHM-5%

RNB53

RR1_RAS_1

15

1 8

MECB_R1_RAS

39 OHM-5%

RN112

MECA_R0_CAS

13

2 7

RR0_CAS_0

39 OHM-5%

RN112

13

MECA_R2_CAS

3 6

RR2_CAS_0

39 OHM-5%

14

MECB_R1_CAS

RN112

1 8

RR1_CAS_1

39 OHM-5%

RN112

NC_RN7019_4 NC_RN7019_5

4 5

39 OHM-5%

MECB_R2_BA1

14

RN110

1 8

RR2_BA1_1

39 OHM-5%

14

MECB_R1_BA1

RN110

2 7

RR1_BA1_1

39 OHM-5%

RN110

MECB_R2_BA0

14

3 6

RR2_BA1_0

39 OHM-5%

RN110

4 5

NC_RN7020_5NC_RN7020_4

39 OHM-5%

Rx_BA0_0 is copy 0 of Rx_BA0 -> MECA

RR0_CAS_1

RR1_BA1_0

13

13

14

14

14

13

14

13

15

13

13

13

13

13

15

15

15

15

15

15

13

13

15

14

13

15

14

RR0_RAS_0

15

14

MECB_R0_BA1

14

13

13

14

14

MECB_R0_BA0

14

13

13

14

14

RB_CS_0

15

RA_CS_1

15

RA_CS_0

15

MECB_CS_3

MECA_CS_4

MECA_CS_3

MECB_CS_1

MECB_CS_2

MECA_CS_2

MECA_CS_5

MECB_CS_5

MECB_CS_4

RNB54

2 7

39 OHM-5%

RNB54

3 6

39 OHM-5%

RNB54

4 5

39 OHM-5%

RNB54

1 8

39 OHM-5%

RNB56

2 7

39 OHM-5%

RNB56

3 6

39 OHM-5%

RNB56

4 5

39 OHM-5%

RNB56

1 8

39 OHM-5%

RNB55

2 7

39 OHM-5%

RNB55

3 6

39 OHM-5%

RNB55

4 5

39 OHM-5%

RNB55

1 8

39 OHM-5%

RNB57

2 7

39 OHM-5%

RNB57

3 6

39 OHM-5%

RNB57

4 5

39 OHM-5%

RNB57

1 8

39 OHM-5%

MECA_R0_RAS

MECB_CS_0

MECA_CS_1

MECA_CS_0

NC_RN7027_8NC_RN7027_1

RB_CS_3

RA_CS_4

RA_CS_3

RB_CS_1

RB_CS_2

RR0_BA1_0

RA_CS_2

RA_CS_5

RB_CS_5

RB_CS_4

RR0_BA1_1

15

15

15

15

13

13

15

15

15

14

15

15

13

15

15

+3.3V

+3.3V

L42

600mA

+3.3V

17

L41

1 2

600mA

21

L43

1 2

600mA

CK_100M_CKINPBUF3

+3.3V

21

RB229

10K-5%

PBUF3_OE

21

C363

17

CK_100M_CKINPBUF1

+3.3V

RB232

10K-5%

1 2

PBUF4_OE

C358

30

1 2

4.7uF

6.3V-10%

CB378

CK_100M_CKINPBUF4

+3.3V

21

RB234

10K-5%

PBUF5_OE

21

CB386

30

4.7uF

CK_100M_CKINPBUF5

+3.3V

RB246

10K-5%

1 2

PBUF6_OE

4.7uF

CB372

6.3V-10%

1 2

0.1uF 16V

CB381

6.3V-10%

21

21

0.1uF 16V

0.1uF 16V

CLKIN

1

OE

2

GND

4

VDD

6

TEXAS INSTR 133-MHZ PCI-X

CLOCK BUFFER (CDCV304)

SUB=SUB*_379PG

ROOM=PCI_BUF3

379PG PCI-X BUFFER (TSSOP8) IS:

COULD ALSO BE:

CLKIN

1

OE

2

GND

4

VDD

6

TEXAS INSTR 133-MHZ PCI-X

CLOCK BUFFER (CDCV304)

SUB=SUB*_379PG

CLKIN

1

OE

2

GND

4

VDD

6

TEXAS INSTR 133-MHZ PCI-X

CLOCK BUFFER (CDCV304)

SUB=SUB*_379PG

CLKIN

1

OE

2

GND

4

U114

SP_CK_33M_PBUF3_3

1Y_0

3

1Y_1

5

1Y_2

7

1Y_3

8

TI CDCV304PW
ICS ICS9112AG-27
PERICOM PI6CV304L

PHILIPS ?????
IMI ?????
CYPRESS ?????

U115

1Y_0

3

1Y_1

5

1Y_2

7

1Y_3

8

ROOM=PCI_BUF4

U116

SP_CK_33M_PBUF5_3

1Y_0

3

1Y_1

5

1Y_2

7

1Y_3

8

ROOM=PCI_BUF5

U120

SP_CK_33M_PBUF6_3

1Y_0

3

1Y_1

5

1Y_2

7

1Y_3

8

NC_RN7037_3 NC_RN7037_63 6

1 2

R_CK_100M_SWSLOT2

R_CK_100M_SWSLOT3 72

R_CK_100M_FBPBUF3

ROOM=PCI_BUF3_TOP

SP_PBUF4_RN_3

SP_CK_33M_PBUF4_3

R_CK_66M_ROMB

R_CK_66M_BCM5700

R_CK_100M_FBPBUF1

ROOM=PCI_BUF4_TOP

SP_PBUF5_RN_3 SP_PBUF5_RN_6

R_CK_100M_SWSLOT5

R_CK_100M_SWSLOT4

R_CK_100M_FBPBUF4

ROOM=PCI_BUF5_TOP

R_CK_100M_SWSLOT6

R_CK_100M_SWSLOT7

R373

1K-5%

R374

1K-5%

1 2

1K-5%

R412

1K-5%

RNB17

22-5%

21

3 6

R371

3 6

RNB27

22-5%

RNB30

22-5%

21

RNB45

RNB17

22-5%

1 8

63

RNB17

54

22-5%

RNB17

22-5%

RNB27

22-5%

RNB27

2 7

22-5%

RNB27

22-5%

RNB30

1 8

22-5%

RNB30

22-5%

RNB30

4 5

22-5%

RNB45

22-5%

RNB45

2 7

22-5%

QS_CK_100M_SWSLOT2
QS_CK_100M_SWSLOT3

CK_100M_FBPBUF3_QS

81

SP_PBUF4_RN_6

CK_66M_ROMB

CK_66M_BCM5700

54

CK_100M_FBPBUF1

72

CK_100M_FBPBUF4_QS

VCC

1 2

81

SP_PBUF6_RN_6SP_PBUF6_RN_3

RB113

8.2K-5%

VCC

55

55

VCC

RB75

1 2

8.2K-5%

S2_QS_EN
S3_QS_EN

NC_CLKQS_23_14

24

22

17

RB83

8.2K-5%

55

55

21

QS_CK_100M_SWSLOT5
QS_CK_100M_SWSLOT4

55

55

QS_CK_100M_SWSLOT6
QS_CK_100M_SWSLOT7

U18

VCC1OE

5

2OE

12

3OE

15

4OE

3 4

1A 1Y

6 7

2A 2Y

11 10

3A 3Y

14 13

4A 4Y

QS3126

S5_QS_EN
S4_QS_EN

S6_QS_EN
S7_QS_EN

VCC

C122

162

0.1uF 16V

CK_100M_SWSLOT2
CK_100M_SWSLOT3

CK_100M_FBPBUF3

NC_CLKQS_23_13

U19

5

2OE

12

3OE

15

4OE

3 4

1A 1Y

6 7

2A 2Y

11 10

3A 3Y

14 13

4A 4Y

QS3126

NC_CLKQS2_23_14

U30

2 16
5

2OE

12

3OE

15

4OE

1A 1Y
2A 2Y
3A 3Y
4A 4Y

QS3126

NC_CLKQS3_23_14

1

21

19

21

17

2

LM_X04--Sub for part consolidation

VCC

162

VCC1OE

VCC

VCC1OE

43
76
1011
1314

SUB*_78020

C556

21

.01UF

50V-20%

CK_100M_SWSLOT5
CK_100M_SWSLOT4
CK_100M_FBPBUF4

NC_CLKQS2_23_13

LM_X04--Sub for part consolidation

SUB*_78020

CB78

1 2

.01UF

50V-20%

CK_100M_SWSLOT6
CK_100M_SWSLOT7

CK_100M_FBPBUF5

NC_CLKQS3_23_13

34

32

30

3

36

38

30

Rx_BA1_0 is copy 1 of Rx_BA0 -> MECB

Rx_BA0_1 is copy 0 of Rx_BA1 -> MECA

+3.3V

L44

600mA

VDD

6

R_CK_100M_FBPBUF5

TEXAS INSTR 133-MHZ PCI-X

21

CLOCK BUFFER (CDCV304)

SUB=SUB*_379PG

22-5%

RNB45

22-5%

54

CK_100M_FBPBUF5_QS

Rx_BA1_1 is copy 1 of Rx_BA1 -> MECB

ROOM=PCI_BUF6_TOP

ROOM=PCI_BUF6

C370

kind of confusing, huh!

4 4

1 2

4.7uF

CB415

6.3V-10%

1 2

0.1uF 16V

COMPUTER
CORPORATION

AUSTIN,TEXAS

TITLE

A B

PROPRIETARY NOTE: THIS ITEM IS THE PROPERTY OF DELL COMPUTER CORP. AUSTIN, TEXAS AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL COMPUTER CORP. EXCEPT
AS AUTHORIZED BY DELL COMPUTER CORP., AND THEN ONLY BY WAY OF LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE
OR IN PART AND MUST BE RETURNED TO DELL COMPUTER CORP. UPON REQUEST AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF THE
LOAN. NEITHER THIS ITEM OR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH
USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT THE PRIOR WRITTEN CONSENT OF DELL COMPUTER CORPORATION.

DWG NO.

DATE

DC

SCHEM,PLN,PE4600,2P

H3007

SHEET

REV.

A02

16 OF 6312/5/2003

B D

U123

P25
N26
N25
M26
M25
M24
L26
L25
L24
K25
K24
J26
J25
J24
H26
H25
D25
C26
D24
C25
B26
C24
A25
B24
A24
B23
A23
C22
B22
A22
C21

B21
AF23
AD22
AE23
AF24
AD23
AE24
AF25
AD24
AE26
AD25
AC24
AD26
AC25
AC26
AB24
AB25
AB26
AA24
AA25
AA26

Y24

Y25

Y26

W24

W25

W26

V24

V25

V26

U24

U25

U26

P_AD0
P_AD1
P_AD2
P_AD3
P_AD4
P_AD5
P_AD6
P_AD7
P_AD8
P_AD9
P_AD10
P_AD11
P_AD12
P_AD13
P_AD14
P_AD15
P_AD16
P_AD17
P_AD18
P_AD19
P_AD20
P_AD21
P_AD22
P_AD23
P_AD24
P_AD25
P_AD26
P_AD27
P_AD28
P_AD29
P_AD30
P_AD31
P_AD32
P_AD33
P_AD34
P_AD35
P_AD36
P_AD37
P_AD38
P_AD39
P_AD40
P_AD41
P_AD42
P_AD43
P_AD44
P_AD45
P_AD46
P_AD47
P_AD48
P_AD49
P_AD50
P_AD51
P_AD52
P_AD53
P_AD54
P_AD55
P_AD56
P_AD57
P_AD58
P_AD59
P_AD60
P_AD61
P_AD62
P_AD63

P_CBE0
P_CBE1
P_CBE2
P_CBE3
P_CBE4
P_CBE5
P_CBE6
P_CBE7

P_REQ0
P_REQ1
P_REQ2
P_REQ3
P_REQ4
P_REQ5
P_REQ6

PRIMARY PCI-X BUS

P_GNT0
P_GNT1
P_GNT2
P_GNT3
P_GNT4
P_GNT5
P_GNT6

P_TRDY
P_STOP
P_LOCK

P_IRDY

P_FRAME

P_DEVSEL

P_PAR
P_PERR
P_SERR

P_REQ64
P_ACK64
P_PAR64

P_PHPNC1
P_PHPNC2
P_PHPNC3

P_M66EN
P_PCICAP1
P_PCICAP2

P_PCIRST

PCLKO

PFBCLK

LM_X04--9C725 changed to 724YF at Celestica's request

1

2

22,24

22,24

22,24

22,24

22,24

22,24

22,24

22,24

22,24,41

22,24

22,24

22,24

22,24

22,24

22,24

22,24

22,24

22,24

22,24

22,24

22,24

22,24

22,24

22,24

22,24,41

22,24

22,24

22,24

22,24

22,24

22,24

22,24

17,22,24

17,22,24

17,22,24

17,22,24

17,22,24

17,22,24

17,22,24

17,22,24

17,22,24

17,22,24

17,22,24

17,22,24

17,22,24

17,22,24

17,22,24

17,22,24

17,22,24

17,22,24

17,22,24

17,22,24

17,22,24

17,22,24

17,22,24

17,22,24

17,22,24

17,22,24

17,22,24

17,22,24

17,22,24

17,22,24

17,22,24

17,22,24

PCI1_AD0
PCI1_AD1
PCI1_AD2
PCI1_AD3
PCI1_AD4
PCI1_AD5
PCI1_AD6
PCI1_AD7
PCI1_AD8
PCI1_AD9
PCI1_AD10
PCI1_AD11
PCI1_AD12
PCI1_AD13
PCI1_AD14
PCI1_AD15
PCI1_AD16
PCI1_AD17
PCI1_AD18
PCI1_AD19
PCI1_AD20
PCI1_AD21
PCI1_AD22
PCI1_AD23
PCI1_AD24
PCI1_AD25
PCI1_AD26
PCI1_AD27
PCI1_AD28
PCI1_AD29
PCI1_AD30
PCI1_AD31
PCI1_AD32
PCI1_AD33
PCI1_AD34
PCI1_AD35
PCI1_AD36
PCI1_AD37
PCI1_AD38
PCI1_AD39
PCI1_AD40
PCI1_AD41
PCI1_AD42
PCI1_AD43
PCI1_AD44
PCI1_AD45
PCI1_AD46
PCI1_AD47
PCI1_AD48
PCI1_AD49
PCI1_AD50
PCI1_AD51
PCI1_AD52
PCI1_AD53
PCI1_AD54
PCI1_AD55
PCI1_AD56
PCI1_AD57
PCI1_AD58
PCI1_AD59
PCI1_AD60
PCI1_AD61
PCI1_AD62
PCI1_AD63

SERVERWORKS CIOB-X Ver 1.2

HETERO 1 OF 3

ROOM=PCI1_PU

1uF

PCI1_AD32
PCI1_AD33
PCI1_AD34
PCI1_AD35
PCI1_AD36
PCI1_AD37
PCI1_AD38
PCI1_AD39
PCI1_AD40
PCI1_AD41
PCI1_AD42
PCI1_AD43
PCI1_AD44
PCI1_AD45
PCI1_AD46
PCI1_AD47
PCI1_AD48
PCI1_AD49
PCI1_AD50
PCI1_AD51
PCI1_AD52
PCI1_AD53
PCI1_AD54
PCI1_AD55
PCI1_AD56
PCI1_AD57
PCI1_AD58
PCI1_AD59
PCI1_AD60
PCI1_AD61
PCI1_AD62
PCI1_AD63
PCI1_CBE4
PCI1_CBE5
PCI1_CBE6
PCI1_CBE7
PCI1_PAR64
PCI1_PERR
PCI1_SERR

1 2

CB419

10V-10%

1 2

1uF

SUB*_83008

RN129

8.2K-5%

RN129

3 6

8.2K-5%

RN129

1 8

8.2K-5%

RNB83

1 8

8.2K-5%

RNB82

1 8

8.2K-5%

RNB81

1 8

8.2K-5%

RNB80

1 8

8.2K-5%

RNB79

1 8

8.2K-5%

RNB78

1 8

8.2K-5%

RB352

1 2

8.2K-5%

CB479

72

RNB84

8.2K-5%

RN129

8.2K-5%

RN130

1 8

8.2K-5%

RNB83

8.2K-5%

RNB82

8.2K-5%

RNB81

8.2K-5%

RNB80

8.2K-5%

RNB79

8.2K-5%

RNB78

8.2K-5%

R513

1 2

8.2K-5%

17,22,24

17,22,24

17,22,24

17,22,24

17,22,24

17,22,24

17,22,24

17,22,24

17,22,24

17,22,24

17,22,24

17,22,24

17,22,24

17,22,24

3

17,22,24

17,22,24

17,22,24

17,22,24

17,22,24

17,22,24

17,22,24

17,22,24

17,22,24

17,22,24

17,22,24

17,22,24

17,22,24

17,22,24

17,22,24

17,22,24

17,22,24

17,22,24

17,22,24

17,22,24

17,22,24

17,22,24

17,22,24

17,22,24

17,22,24

+2.5V

10V-10%

4 4

SUB*_83008

+3.3V

LM_X04--83008 sub for p/n consolidation

K26
H24
E24
C23
R24
T26
T25
T24

C18
B18
A18
C17
B17
A17
C16

A21
C20
B20
A20
C19
B19
A19

E26
F25
F26

E25
D26
F24

G26
G24
G25

R26
P26
R25

B14
A14
A15

B16
A16
C15

B15

AF6
AE6

63

RNB84

2 7

8.2K-5%

54

RN130

4 5

8.2K-5%

RN130

3 6

8.2K-5%

72

RNB83

3 6

8.2K-5%

72

RNB82

3 6

8.2K-5%

72

RNB81

3 6

8.2K-5%

72

RNB80

3 6

8.2K-5%

72

RNB79

3 6

8.2K-5%

72

RNB78

3 6

8.2K-5%

R507

1 2

8.2K-5%

PCI1_TRDY
PCI1_STOP
PCI1_LOCK

PCI1_IRDY
PCI1_FRAME
PCI1_DEVSEL

PCI1_PAR
PCI1_PERR
PCI1_SERR

PCI1_ACK64
PCI1_PAR64

NC_PCI1_SIL

NC_PCI1_SOD

PCI1_M66EN

R_CK_100M_CKINPBUF1 CK_100M_CKINPBUF1
CK_100M_FBPBUF1

HEATSINK W/ LOCTITE384 P#724YF

CIOB WILL NEED A HEATSINK
ADD=ADD*_724YF_U123

SUB=SUB*_205VF

RNB84

RNB84

RN130

RNB83

RNB82

RNB81

RNB80

RNB79

RNB78

21

81

54

72

54

54

54

54

54

54

CB485

8.2K-5%

8.2K-5%

8.2K-5%

8.2K-5%

8.2K-5%

8.2K-5%

8.2K-5%

8.2K-5%

8.2K-5%

0.1uF 16V

PCI1_CBE0
PCI1_CBE1
PCI1_CBE2
PCI1_CBE3
PCI1_CBE4
PCI1_CBE5
PCI1_CBE6
PCI1_CBE7

PCI1_BRDCM_REQ
PCI1_ZION_REQ

PCI1_BRDCM_GNT
PCI1_ZION_GNT
PCI1_GNT2
PCI1_GNT3
PCI1_GNT4
NC_PCI1_GNT5
PCI1_GNT6

RB277

22-5%

+3.3V

0.1uF 16V
1 2

17,24

17,22,24

17,22,24

17,22,24

17,22,24

17,22,24

CB482

21

PCI1_PCIRESET

PCI1_LOCK

PCI1_STOP

PCI1_DEVSEL

PCI1_TRDY

PCI1_FRAME

PCI1_IRDY

0.1uF 16V
1 2

NC_RN1001_4

CB452

PCI1_REQ64

16

0.1uF 16V
CB448

21

22,24

22,24

7

8

RNB61

2

1

+3.3V

5

6

2.7K

4

3

22,24

22,24

17,22,24

17,22,24

17,22,24

17,22,24

22

24

17,22

17,24

17

17

17

17

Jaguar H3007 - X00: Added 8.2K +3.3V PU to PCI1_REQ64

17,22,24

17,22,24

17,24

17,22,24

17,22,24

17,22,24

22,24

17,22,24

17,22,24

22,24

17,22,24

UNUSED_HPC_CIOB_1

17,22

+3.3V

RB495

1 2

on CIOB-X for embedded PCI (i960 and BCM5700).

PCI1_M66EN

8.2K-5%

22,24

17,22

+3.3V

21

+3.3V

R432

NP*

2.2K-5%

NP*

21

RB282

RB280

2.2K-5%

1 2

2.2K-5%

21

1K-5%

22,59

RB281

RB227

1 2

16

22-5%

Jaguar 2.0 Change: RB227 needs to be terminated at CIOB not at buffer

+3.3V

RNB77

1 8

8.2K-5%

RNB77

72

RNB77

8.2K-5%

3 6

8.2K-5%

RNB77

54

RNB76

8.2K-5%

81

8.2K-5%

RNB76

2 7

8.2K-5%

RNB76

NC_RN1001_6NC_RN1001_3

63

8.2K-5%
RNB76

4 5

NC_RN1001_5

8.2K-5%

50V-10%

1000pF

50V-10%

CB403

1000pF

1 2

CB445

21

RB276

1 2

2.2K-5%

R435

1 2

1K-5%

DELAY_RULE=:::500

+2.5V

RB261

1 2

100-1%100-1%

SUB*_83008

RB267

1 2

18,20

18,20

18,20

18,20

18,20

+3.3V

18,20

18,20

18,20

18,20

18,20

18,20

18,20

18,20

18,20

18,20

18,20

18,20

18,20

18,20

18,20

18,20

18,20

18,20

18,20

18,20

18,20

18,20

18,20

18,20

18,20

18,20

18,20

18-20

18-20

18-20

18-20

18-20

18-20

18-20

18-20

18-20

18-20

18-20

18-20

18-20

18-20

18-20

18-20

18-20

18-20

18-20

18-20

18-20

18-20

18-20

18-20

18-20

18-20

18-20

18-20

18-20

18-20

18-20

18-20

205VF IS CIOB REV A2.0 CURRENTLY

REV 1.0 -- NEC UPD84915F2-011
REV 1.1 -- NEC UPD84915F2-012
REV 2.0 -- NEC UPD84918F2-011
REV 2.1 -- NEC UPD??????????

LM_X04--83008 sub for p/n consolidation

CIOB1_IMBVREF

21

1uF

CB437

21

CB446

10V-10%

220pF

CB430

50V-10%

1 2

220pF

50V-10%

PCIX3_AD0
PCIX3_AD1
PCIX3_AD2
PCIX3_AD3
PCIX3_AD4
PCIX3_AD5
PCIX3_AD6
PCIX3_AD7
PCIX3_AD8
PCIX3_AD9
PCIX3_AD10
PCIX3_AD11
PCIX3_AD12
PCIX3_AD13
PCIX3_AD14
PCIX3_AD15
PCIX3_AD16
PCIX3_AD17
PCIX3_AD18
PCIX3_AD19
PCIX3_AD20
PCIX3_AD21
PCIX3_AD22
PCIX3_AD23
PCIX3_AD24
PCIX3_AD25
PCIX3_AD26
PCIX3_AD27
PCIX3_AD28
PCIX3_AD29
PCIX3_AD30
PCIX3_AD31
PCIX3_AD32
PCIX3_AD33
PCIX3_AD34
PCIX3_AD35
PCIX3_AD36
PCIX3_AD37
PCIX3_AD38
PCIX3_AD39
PCIX3_AD40
PCIX3_AD41
PCIX3_AD42
PCIX3_AD43
PCIX3_AD44
PCIX3_AD45
PCIX3_AD46
PCIX3_AD47
PCIX3_AD48
PCIX3_AD49
PCIX3_AD50
PCIX3_AD51
PCIX3_AD52
PCIX3_AD53
PCIX3_AD54
PCIX3_AD55
PCIX3_AD56
PCIX3_AD57
PCIX3_AD58
PCIX3_AD59
PCIX3_AD60
PCIX3_AD61
PCIX3_AD62
PCIX3_AD63

17

U123

M1

S_AD0

M2

S_AD1

M3

S_AD2

L1

S_AD3

L2

S_AD4

L3

S_AD5

K1

S_AD6

K2

S_AD7

J1

S_AD8

J2

S_AD9

J3

S_AD10

H1

S_AD11

H2

S_AD12

H3

S_AD13

G1

S_AD14

G2

S_AD15

C2

S_AD16

C3

S_AD17

A1

S_AD18

A2
B3
C4
A3
B4
A4
B5
A5
C6
B6
A6
C7

B7
AF3
AD4
AE3
AF2
AD3
AE1
AD2
AC3
AD1
AC2
AB3
AC1
AB2
AB1
AA3
AA2
AA1

Y3

Y2

Y1

W3

W2

W1

V3

V2

V1

U3

U2

U1

T3

T2

T1

S_AD19
S_AD20
S_AD21
S_AD22
S_AD23
S_AD24
S_AD25
S_AD26
S_AD27
S_AD28
S_AD29
S_AD30
S_AD31
S_AD32
S_AD33
S_AD34
S_AD35
S_AD36
S_AD37
S_AD38
S_AD39
S_AD40
S_AD41
S_AD42
S_AD43
S_AD44
S_AD45
S_AD46
S_AD47
S_AD48
S_AD49
S_AD50
S_AD51
S_AD52
S_AD53
S_AD54
S_AD55
S_AD56
S_AD57
S_AD58
S_AD59
S_AD60
S_AD61
S_AD62
S_AD63

SECONDARY PCI-X BUS

SERVERWORKS CIOB - X Ver 1.2

HETERO 2 OF 3

17

CIOB1_AVDD

CIOB1_AGND

17

S_CBE0
S_CBE1
S_CBE2
S_CBE3
S_CBE4
S_CBE5
S_CBE6
S_CBE7

S_REQ0
S_REQ1
S_REQ2
S_REQ3
S_REQ4
S_REQ5

S_GNT0
S_GNT1
S_GNT2
S_GNT3
S_GNT4
S_GNT5

S_TRDY
S_STOP
S_LOCK

S_IRDY

S_FRAME

S_DEVSEL

S_PAR
S_PERR
S_SERR

S_REQ64
S_ACK64
S_PAR64

S_PHPNC1
S_PHPNC2
S_PHPNC3

S_M66EN
S_PCICAP1
S_PCICAP2

S_PCIRST

SCLKO

SFBCLK

K3
G3
D3
C5
P2
R1
R2
R3

A7
C8
B8
A8
C9
B9

A9
C10
B10
C11
A10
B11

D1
E2
E1

D2
C1
E3

F1
F3
F2

N1
N2
P1

A11
C12
B12

C14
A13
B13

A12

AD6
AF5

RB273

1 2

0-5%

All Bits of Function # Used for Reg Access

Enable Secondary Hotplug Controller

PCIX3_CBE0
PCIX3_CBE1
PCIX3_CBE2
PCIX3_CBE3
PCIX3_CBE4
PCIX3_CBE5
PCIX3_CBE6
PCIX3_CBE7

PCIX3_REQ0
PCIX3_REQ1

PCIX3_HP_REQ

PCIX3_GNT0
PCIX3_GNT1
NC_PCIX3_GNT2
NC_PCIX3_GNT3
PCIX3_GNT4
PCIX3_HP_GNT

PCIX3_TRDY
PCIX3_STOP
PCIX3_LOCK

PCIX3_IRDY
PCIX3_FRAME
PCIX3_DEVSEL

PCIX3_PAR
PCIX3_PERR
PCIX3_SERR

PCIX3_REQ64
PCIX3_ACK64
PCIX3_PAR64

NC_PCIX3_SIL

PCIX3_SEG_RST

NC_PCIX3_SOD

PCIX3_M66EN

PCIX3_XCAP1
PCIX3_XCAP2

PCIX3_PCIRESET

R_CK_100M_CKINPBUF3

CK_100M_FBPBUF3

Jaguar 2.0 Change: RB228 needs to be terminated at CIOB not at buffer

SUB*_83009

LM_X05--83009 sub for p/n consolidation

APLL Enabled

IMB at 400MHz

Enable Primary Hotplug Controller Disable Primary Hotplug Controller

16

22uF 6.3V

1 2

C389

10V-10%

1uF

1 2

CB442

SUB*_83008
LM_X04--83008 sub for p/n consolidation

CA

PULLED UP

CIOB ID BIT0
CIOB ID BIT1
CIOB ID BIT2

18,20

18,20

18,20

18,20

18-20

18-20

18-20

18-20

17,18

20

17

17,55

18-20

18-20

18-20

18-20

18-20

18-20

18,20

18-20

18-20

18-20

18-20

18-20

55

55

55

55

55

RB228

21

22-5%

CK_100M_CKINPBUF3

L49

47uH 135MA

ROOMS COMPLETE

PULLED DOWN

APLL Disabled

IMB at 266MHz

Only Bit 0 of Function # Used for Reg Access

Disable Secondary Hotplug Controller

IMB Skew in Test ModeIMB Skew in Normal Mode

+3.3V

8

7

6

5

RNB49

1

2

16

2.7K

3

4

+2.5V

1 2

249 Ohm-1%

+2.5V

RB255

21

1 2

2.2-5%

RB251

11

11

11

11

11

11

11

11

11

11

11

11

11

11

11

11

RB262

2.2K-5%

1 2

A_IMB_DN_D0
A_IMB_DN_D1
A_IMB_DN_D2
A_IMB_DN_D3
A_IMB_DN_D4
A_IMB_DN_D5
A_IMB_DN_D6
A_IMB_DN_D7
A_IMB_DN_D8
A_IMB_DN_D9
A_IMB_DN_D10
A_IMB_DN_D11
A_IMB_DN_D12
A_IMB_DN_D13
A_IMB_DN_D14
A_IMB_DN_D15

11

11

11

17

18

20

55

A_IMB_DN_CLK
A_IMB_DN_CON
A_IMB_DN_PAR

CIOB1_AVDD

17

CIOB1_AGND

17

CIOB1_IMBCOMP0

CIOB1_IMBVREF

17,22

17

17

17,18

17,55

17

17,24

17

17

+2.5V

PCI1_BRDCM_GNT

PCI1_GNT4

PCI1_GNT6

PCIX3_GNT0

PCIX3_HP_GNT

PCIX3_GNT4

PCI1_ZION_GNT

PCI1_GNT2

PCI1_GNT3

AF16
AD15
AE15
AF15
AE14
AF14
AE13
AF13
AF12
AE12
AF11
AE11
AD11
AF10
AE10
AD10

AD12 AF19

AB23

AC10
AC12
AC16
AC18
AC20

AD13
AD14
AE25

+3.3V

21

RB316

2.2K-5%

+3.3V +3.3V +3.3V +3.3V +3.3V +3.3V +3.3V

21

RB303

1 2

2.2K-5%

R440

2.2K-5%

NP*

21

R449

1 2

2.2K-5%

NP*

RB298

NP*

2.2K-5%

RB302

1 2

2.2K-5%

CIOB ID FOR I2C

ID = 1 FOR I2C ADDR C2/3 AS OF 8/2

BITS ARE USED AS BINARY ENCODED -ID

R_A_IMB_UP_CLK

17

U123

IMBD_R0
IMBD_R1
IMBD_R2
IMBD_R3
IMBD_R4
IMBD_R5
IMBD_R6
IMBD_R7
IMBD_R8
IMBD_R9
IMBD_R10
IMBD_R11
IMBD_R12
IMBD_R13
IMBD_R14
IMBD_R15

IMBD_T0
IMBD_T1
IMBD_T2
IMBD_T3
IMBD_T4
IMBD_T5
IMBD_T6
IMBD_T7
IMBD_T8

IMBD_T9
IMBD_T10
IMBD_T11
IMBD_T12
IMBD_T13
IMBD_T14
IMBD_T15

AE22
AF22
AD21
AE21
AF21
AD20
AE20
AF20
AD19
AE19
AD18
AE18
AF18
AD17
AE17
AD16

IMBCLK_R IMBCLK_T

AF9 AF17

IMBCON_R IMBCON_T

AE9 AE16

IMBPAR_R IMBPAR_T

AF7
AD7

AD8
AE7
AE8

AD9

AF8

AA4

AVDD1
AVDD2

AGND1
AGND2
AGND3

IMBCOMP0

VREFIMB

VCC25_1

PCIRST

DPLLRST

CLKIN

ALERT

RSVD_A26

RSVD_AF26

TESTMODE

SDA
SCK

C13

AF1

AE5

AE4

AD5
AF4

A26
AF26
B1

VCC25_2

AC5
AC8

AE2

B2

B25

D5
D11
D14
D17
D20
E23

G4
M23
N24

P3
W23

VCC25_3
VCC25_4
VCC25_5
VCC25_6
VCC25_7
VCC25_8
VCC25_9
VCC25_10
VCC25_11
VCC25_12
VCC25_13
VCC25_14
VCC25_15
VCC25_16
VCC25_17
VCC25_18
VCC25_19
VCC25_20
VCC25_21
VCC25_22
VCC25_23
VCC25_24
VCC25_25
VCC25_26

VCC_AA23

VCC_AC22

POWER/GROUND IMB BUS

VCC_AB4
VCC_AC7

VCC_D7

VCC_D9
VCC_D12
VCC_D15
VCC_D19
VCC_D22

VCC_E4
VCC_G23

VCC_H4
VCC_J23

VCC_K4
VCC_L23

VCC_M4

VCC_N3
VCC_P24

VCC_R4
VCC_R23

VCC_U4
VCC_U23

VCC_W4

AA23
AB4
AC7
AC22
D7
D9
D12
D15
D19
D22
E4
G23
H4
J23
K4
L23
M4
N3
P24
R4
R23
U4
U23
W4

12-5-2003_10:50

+3.3V

21

RB312

NP*

RB314

1 2

RB259

1 2

21

R414

NP*

21

R425

2.2K-5%

2.2K-5%

NP*

2.2K-5%

RB272

LOOP_SNGL_A_IMB_UP_CLK

1 2

2.2K-5%

RB266

1 2

21

R419

NP*

2.2K-5%

2.2K-5%

RB307

RB310

1 2

21

2.2K-5%

2.2K-5%

NP*

1 2

NP*

R_A_IMB_UP_D0

R_A_IMB_UP_D1

R_A_IMB_UP_D2

R_A_IMB_UP_D3

R_A_IMB_UP_D4

R_A_IMB_UP_D5

R_A_IMB_UP_D6

R_A_IMB_UP_D7

R_A_IMB_UP_D8

R_A_IMB_UP_D9

R_A_IMB_UP_D10

R_A_IMB_UP_D11

R_A_IMB_UP_D12

R_A_IMB_UP_D13

R_A_IMB_UP_D14

R_A_IMB_UP_D15

39-5%

R447

NP*

R444

1 2

1 2

39-5%

LOOP_DBL_A_IMB_UP_CLK

R443

39-5%

RNB66

4 5

39 OHM-5%

RNB66

1 8

39 OHM-5%

RNB64

39 OHM-5%

RNB62

39 OHM-5%

RNB62

1 8

39 OHM-5%

RNB59

1 8

0-5%0-5%

39 OHM-5%

72

54

39 OHM-5%

39 OHM-5%

39 OHM-5%

39 OHM-5%

R446

21

1 2

R442

RNB66

3 6

RNB64

3 6

RNB62

3 6

RNB59

RNB59

3 6

A_IMB_UP_CLK

NP*

RNB66

39 OHM-5%

RNB64

39 OHM-5%

RNB64

1 8

39 OHM-5%

RNB62

39 OHM-5%

54

RNB59

39 OHM-5%

A_IMB_UP_D0

72

A_IMB_UP_D1
A_IMB_UP_D2
A_IMB_UP_D3

54

A_IMB_UP_D4
A_IMB_UP_D5
A_IMB_UP_D6
A_IMB_UP_D7
A_IMB_UP_D8
A_IMB_UP_D9

72

A_IMB_UP_D10
A_IMB_UP_D11
A_IMB_UP_D12

72

A_IMB_UP_D13
A_IMB_UP_D14
A_IMB_UP_D15

39 OHM-5%

R_A_IMB_UP_CLK
R_A_IMB_UP_CON

R_A_IMB_UP_PAR

17

RB295

R434

1 2

21

39-5%

A_IMB_UP_CON
A_IMB_UP_PAR

39-5%

PCI_RST_CIOB

PLLRST

GPE_CIOB1_ALERT

NC_CIOB1_A26
NC_CIOB1_AF26

SD_X06 -- added new reset line for ciob's

11,13-15,30,39,60

CK_33M_CIOB1

39

30,59

NP*

NP*

4

R1096

1 2

R1097

0-5%

1 2

0-5%

ENV_SEG0_25V_SDA

ENV_SEG0_25V_SCL

CIOB1_TESTMODE

+3.3V

R1092

1 2

Jaguar 2.0 Change: SW chips responding to bus when not addressed
Added pullups to 3.3V and series resistors 0 ohm to env_seg0_25v sda and scl lines

+3.3V

A1.2 CIOB INSTALL RB236

R1093

8.2K-5%

1 2

8.2K-5%

A1.2 CIOB DEPOP R1014
A2.0 CIOB INSTALL R1014

A2.0 CIOB DEPOP RB236

2.2K-5%

2.2K-5%

11

11,15,30,53

11,15,30,53

RB308

1 2

NP*

21

R448

2.2K-5%

2.2K-5%

11

11

11

11

11

11

11

11

11

11

11

11

11

11

11

11

11

11

+3.3V

21

R380

21

RB243

1

2

3

2.2K-5%

220

NP*

10V-10%

1uF

SUB*_83008

1 2

CB480

10V-10%

1uF

21

SUB*_83008

10V-10%

CB476

1uF

1 2

CB420

SUB*_83008

10V-10%

1uF

21

CB478

SUB*_83008

0.1uF 16V
CB422

1 2

0.1uF 16V
CB436

21

0.1uF 16V
CB425

21

0.1uF 16V
1 2

CB421

0.1uF 16V
CB426

21

.01uF 50V

CB481

1 2

.01uF 50V

CB439

1 2

50V-10%

1000pF

21

CB477

50V-10%

1000pF

1 2

A B

50V-10%

CB424

1000pF

21

CB444

.01uF 50V

CB423

21

50V-10%

1000pF

1 2

CB431

ROOM=CIOB_LEFT

PROPRIETARY NOTE: THIS ITEM IS THE PROPERTY OF DELL COMPUTER CORP. AUSTIN, TEXAS AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL COMPUTER CORP. EXCEPT
AS AUTHORIZED BY DELL COMPUTER CORP., AND THEN ONLY BY WAY OF LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE
OR IN PART AND MUST BE RETURNED TO DELL COMPUTER CORP. UPON REQUEST AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF THE
LOAN. NEITHER THIS ITEM OR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH
USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT THE PRIOR WRITTEN CONSENT OF DELL COMPUTER CORPORATION.

SERVERWORKS CIOB-X Ver 1.2

HETERO 3 OF 3

TITLE

DWG NO.

DATE

DC

COMPUTER
CORPORATION

AUSTIN,TEXAS

SCHEM,PLN,PE4600,2P

H3007

SHEET

12/5/2003

REV.

A02

17 OF 63

B D

CA

12-5-2003_10:50

ROOMS COMPLETE

1

ROOM=SLOT2

S2_SENSE_5V

18

NET_PHYSICAL_TYPE=PLANE

S2_EN_GATE

18

VCC +3.3V

SUB*_24044

1 2

.01-1%

R44

SUB*_24044

.01-1%

R68

21

18

S2_SENSE_3V

NET_PHYSICAL_TYPE=PLANE

8

7

5

QB7

SI4410DY SI4410DY

4

3

261

SI4410DY

5162738

Q1

4

S2_EN_GATE

18

SI4410DY

5162738

QB13

4

Q8

4

VCC

LM_X04--Sub for part consolidation

50V-20%

SUB*_78020

.01UF

1 2

C283

+3.3V

17,19,20

17,19,20

17,19,20

17,19,20

17,19,20

17,19,20

17,19,20

17,19,20

17,19,20

17,19,20

18,55

PCIX3_AD61
PCIX3_AD60
PCIX3_AD59
PCIX3_AD58
PCIX3_AD57
PCIX3_AD56
PCIX3_AD54
PCIX3_AD55
PCIX3_AD53
PCIX3_AD52

S2_QS_EN

SUB*_8174U

VCC

8

7

6

5

3

2

1

LM_X04--Sub for part consolidation

50V-20%

.01UF

C304

21

SUB*_78020

+3.3V

17,19,20

17,19,20

17,19,20

17,19,20

17,19,20

17,19,20

17,19,20

17,19,20

17,19,20

17,19,20

PCIX3_AD51
PCIX3_AD50
PCIX3_AD49
PCIX3_AD48
PCIX3_AD46
PCIX3_AD47
PCIX3_AD45
PCIX3_AD44
PCIX3_AD43
PCIX3_AD42

VCC

VCC

U90

24

VCC

2

A1

3

A2

4

A3

5

A4

6

A5

7

A6

8

A7

9

A8
A9 B9

11

A10

13

BIASV

ON GND

B1
B2
B3
B4
B5
B6
B7
B8

B10

23
22
21
20
19
18
17
16
1510
14

121

5C6800
QSOP24

U98

24

VCC

2

A1

3

A2

4

A3

5

A4

6

A5

7

A6

8

A7

9

A8

10 15

A9 B9

11

A10

13

BIASV

B1
B2
B3
B4
B5
B6
B7
B8

B10

23
22
21
20
19
18
17
16

14

S2_AD61
S2_AD60
S2_AD59
S2_AD58
S2_AD57
S2_AD56
S2_AD54
S2_AD55
S2_AD53
S2_AD52

S2_AD51
S2_AD50
S2_AD49
S2_AD48
S2_AD46
S2_AD47
S2_AD45
S2_AD44
S2_AD43
S2_AD42

19

19

19

19

19

19

19

19

19

19

19

19

19

19

19

19

19

19

19

19

VCC

LM_X04--Sub for part consolidation

50V-20%

.01UF

21

SUB*_78020

VCC

LM_X04--Sub for part consolidation

50V-20%

SUB*_78020

.01UF

1 2

C163

C183

+3.3V

+3.3V

17,20

17,20

17,20

17,20

17,20

17,20

17,20

17,20

17,20

17,20

18,55

17,20

17,20

17,20

17,20

17,19,20

17,19,20

17,19,20

17,19,20

17,19,20

17,19,20

PCIX3_AD27
PCIX3_AD26
PCIX3_AD25
PCIX3_AD24
PCIX3_CBE3
PCIX3_AD23
PCIX3_AD22
PCIX3_AD21
PCIX3_AD20
PCIX3_AD19

S2_QS_EN

SUB*_8174U

PCIX3_AD18
PCIX3_AD17
PCIX3_AD16
PCIX3_CBE2
PCIX3_FRAME
PCIX3_IRDY
PCIX3_TRDY
PCIX3_DEVSEL
PCIX3_STOP
PCIX3_LOCK

VCC

VCC

U42

24

VCC

2

A1

3

A2

4

A3

5

A4

6

A5

7

A6

8

A7

9

A8
A9 B9

11

A10

13

BIASV

ON GND

B1
B2
B3
B4
B5
B6
B7
B8

B10

23
22
21
20
19
18
17
16
1510
14

121

5C6800
QSOP24

U54

24

VCC

2

A1

3

A2

4

A3

5

A4

6

A5

7

A6

8

A7

9

A8

10 15

A9 B9

11

A10

B1
B2
B3
B4
B5
B6
B7
B8

B10

23
22
21
20
19
18
17
16

14

S2_AD27
S2_AD26
S2_AD25
S2_AD24
S2_CBE3
S2_AD23
S2_AD22
S2_AD21
S2_AD20
S2_AD19

S2_AD18
S2_AD17
S2_AD16
S2_CBE2
S2_FRAME
S2_IRDY
S2_TRDY
S2_DEVSEL
S2_STOP
S2_LOCK

19

19

19

19

19

19

19

19

19

19

19

19

19

19

19

19

19

19

19

19

1

2

LM_X04--Sub for part consolidation

+12V

50V-20%

.01UF

CB47

21

+3.3V

SUB*_78020

+12V

R241

18,55

18

4.7K

1 2

-12V

S2_PWR_FAULT
S2_EN_GATE

18

0.1uF 16V

S2_5V

S2_SENSE_3V

SUB*_63206

12.1K1% is sub p/n

C50

1 2

19

100-5%

RB58

21

1

M12VIN

2

FLT

3

3V5VG

4

VCC

5

12VIN

6

3VISEN

7

3VS

8

OCSET

UB6

HIP1011CB

SUB*_7372P

M12VO
M12VG

12VG

GND

12VO

5VISEN

5VS

PWRON

16

S2_N12V

15

S2_N12VG

14

S2_12VG
13
12

S2_12V
11

S2_SENSE_5V
10
9

S2_PWR_EN

RB143

1 2

S2_3.3V

4.7K

0.1uF 16V
1 2

CB62

18,19

18

18

18,19

18

55

19

VCC

VCC

LM_X04--Sub for part consolidation

50V-20%

SUB*_78020

.01UF

1 2

VCC

LM_X04--Sub for part consolidation

50V-20%

SUB*_78020

.01UF

1 2

+3.3V

C320

C134

+3.3V

18,55

17,19,20

17,19,20

17,19,20

17,19,20

17,19,20

17,19,20

17,19,20

17,19,20

17,19,20

17,19,20

18,55

40

40

40

40

17

17

17,20

17,20

17,20

17,20

18,55

S2_QS_EN

PCIX3_AD41
PCIX3_AD40
PCIX3_AD39
PCIX3_AD38
PCIX3_AD37
PCIX3_AD36
PCIX3_AD35
PCIX3_AD33
PCIX3_AD34
PCIX3_AD32

S2_QS_EN

PIRQ_11
PIRQ_12
PIRQ_13
PIRQ_14

PCIX3_GNT0
PCIX3_REQ0
PCIX3_AD30
PCIX3_AD31
PCIX3_AD29
PCIX3_AD28

S2_QS_EN

SUB*_8174U

SUB*_8174U

SUB*_8174U

VCC

VCC

1 12

ON GND

5C6800
QSOP24

U104

24

VCC

2

A1

3

A2

4

A3

5

A4

6

A5

7

A6

8

A7

9

A8
A9 B9

11

A10

13

BIASV

ON GND

B1
B2
B3
B4
B5
B6
B7
B8

B10

23
22
21
20
19
18
17
16
1510
14

121

5C6800
QSOP24

U31

24

VCC

2

A1

3

A2

4

A3

5

A4

6

A5

7

A6

8

A7

9

A8

10 15

A9 B9

11

A10

13

BIASV

1 12

ON GND

B1
B2
B3
B4
B5
B6
B7
B8

B10

23
22
21
20
19
18
17
16

14

5C6800
QSOP24

S2_AD41
S2_AD40
S2_AD39
S2_AD38
S2_AD37
S2_AD36
S2_AD35
S2_AD33
S2_AD34
S2_AD32

S2_PIRQA
S2_PIRQB
S2_PIRQC
S2_PIRQD
S2_GNT
S2_REQ
S2_AD30
S2_AD31
S2_AD29
S2_AD28

19

19

19

19

19

19

19

19

19

19

19

19

19

19

19

19

19

19

19

19

VCC

LM_X04--Sub for part consolidation

50V-20%

.01UF

21

SUB*_78020

VCC

LM_X04--Sub for part consolidation

50V-20%

.01UF

SUB*_78020

VCC VCC

C206

1 2

C229

+3.3V

+3.3V

18,55

17,19,20

17,19,20

17,20

17,20

17,20

17,20

17,20

17,20

17,20

17,20

18,55

17,20

17,20

17,20

17,20

17,20

17,20

17,20

17,20

17,20

17,20

18,55

S2_QS_EN

PCIX3_PERR
PCIX3_SERR
PCIX3_PAR
PCIX3_AD15
PCIX3_CBE1
PCIX3_AD14
PCIX3_AD13
PCIX3_AD12
PCIX3_AD11
PCIX3_AD10

S2_QS_EN

PCIX3_AD9
PCIX3_CBE0
PCIX3_AD8
PCIX3_AD7
PCIX3_AD6
PCIX3_AD5
PCIX3_AD4
PCIX3_AD3
PCIX3_AD2
PCIX3_AD1

S2_QS_EN

SUB*_8174U

SUB*_8174U

SUB*_8174U

VCC

VCC

13

BIASV

1 12

ON GND

5C6800
QSOP24

U63

24

VCC

2

A1

3

A2

4

A3

5

A4

6

A5

7

A6

8

A7

9

A8
A9 B9

11

A10

13

BIASV

ON GND

B1
B2
B3
B4
B5
B6
B7
B8

B10

23
22
21
20
19
18
17
16
1510
14

121

5C6800
QSOP24

U71

24

VCC

2

A1

3

A2

4

A3

5

A4

6

A5

7

A6

8

A7

9

A8

10 15

A9 B9

11

A10

13

BIASV

1 12

ON GND

B1
B2
B3
B4
B5
B6
B7
B8

B10

23
22
21
20
19
18
17
16

14

5C6800
QSOP24

S2_PERR
S2_SERR
S2_PAR
S2_AD15
S2_CBE1
S2_AD14
S2_AD13
S2_AD12
S2_AD11
S2_AD10

S2_AD9
S2_CBE0
S2_AD8
S2_AD7
S2_AD6
S2_AD5
S2_AD4
S2_AD3
S2_AD2
S2_AD1

19

19

19

19

19

19

19

19

19

19

19

19

19

19

19

19

19

19

19

19

2

3

18,55

18,19

18,19

18

S2_PWR_FAULT

S2_EN_GATE

S2_12V

S2_N12V

LM_X04--Sub for part consolidation

50V-20%

.01UF

C264

21

SUB*_78020

+3.3V

17,20

17,19,20

17,19,20

17,19,20

17,19,20

17,19,20

17,19,20

17,19,20

17,19,20

17,19,20

18,55

PCIX3_AD0
PCIX3_ACK64
PCIX3_REQ64
PCIX3_CBE7
PCIX3_CBE6
PCIX3_CBE5
PCIX3_CBE4
PCIX3_PAR64
PCIX3_AD62
PCIX3_AD63

S2_QS_EN

SUB*_8174U

U82

24

VCC

2

A1

3

A2

4

A3

5

A4

6

A5

7

A6

8

A7

9

A8
A9 B9

11

A10

13

BIASV

ON GND

5C6800
QSOP24

B1
B2
B3
B4
B5
B6
B7
B8

B10

23
22
21
20
19
18
17
16
1510
14

121

S2_AD0
S2_ACK64
S2_REQ64
S2_CBE7
S2_CBE6
S2_CBE5
S2_CBE4
S2_PAR64
S2_AD62
S2_AD63

19

19

19

19

19

19

19

19

19

19

3

50V-10%

18

18

S2_N12VG

S2_12VG

CB28

1 2

.033uF

50V-10%

21

CB44

.033uF

50V-10%

C36

1 2

.033uF

50V-10%

100pF

C16

21

PCI2

4 4

PCIX BUS 3

A B

PROPRIETARY NOTE: THIS ITEM IS THE PROPERTY OF DELL COMPUTER CORP. AUSTIN, TEXAS AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL COMPUTER CORP. EXCEPT
AS AUTHORIZED BY DELL COMPUTER CORP., AND THEN ONLY BY WAY OF LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE
OR IN PART AND MUST BE RETURNED TO DELL COMPUTER CORP. UPON REQUEST AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF THE
LOAN. NEITHER THIS ITEM OR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH
USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT THE PRIOR WRITTEN CONSENT OF DELL COMPUTER CORPORATION.

TITLE

DWG NO.

DATE

DC

COMPUTER
CORPORATION

AUSTIN,TEXAS

SCHEM,PLN,PE4600,2P

H3007

SHEET

REV.

A02

18 OF 6312/5/2003

B D

CA

12-5-2003_10:50

ROOMS COMPLETE

1

2

3

18,19

18,19

18,19

16

S2_N12V

S2_5V

S2_3.3V

19

18

18

19,55

19,55

CK_100M_SWSLOT2

18

18

18

18

18

18

18

18

18

18

18

18

18

19,55

18

18

18

18

18

18

18

19,55

18

18

18

18

18

18

18

18

18

18

18

18

18

18

18

18

18

18

18

18

18

18

18

18

18,19

18,19

18,19

Side B

S2_3.3V

S2_5V

S2_12V

Side A

PCI2

B1

S2_TCK

NC_S2_TDO

B2
B3
B4

p

B5

B6
S2_PIRQB
S2_PIRQD
S2_PRESA
NC_S2_RSVDB10
S2_PRESB

NC_S2_RSVDB14

B7

B8

B9

B10
B11

B14

B
D

IOV

B15
B16

IOV

B17

S2_REQ

S2_AD31
S2_AD29

B18
B19
B20
B21

IOV

B22
S2_AD27
S2_AD25

B23

B24

B25
S2_CBE3
S2_AD23

B26

B27

B28
S2_AD21
S2_AD19

B29

B30

B31
S2_AD17
S2_CBE2

B32

B33

B34
S2_IRDY

B35

B36
S2_DEVSEL
S2_XCAP
S2_LOCK
S2_PERR

B37

B38

B39

B40

B41
S2_SERR

B42

B43
S2_CBE1
S2_AD14

B44

B45

B46
S2_AD12
S2_AD10
S2_M66EN

B47

B48

B49

B50

B51
S2_AD8
S2_AD7

B52

B53

B54
S2_AD5
S2_AD3

B55

B56

B57
S2_AD1

S2_ACK64

B58

B59

B60

IOV

B61

B62

NC_S2_RSVDB63

B63

B64
S2_CBE6
S2_CBE4

B65

B66

IOV

B67
S2_AD63
S2_AD61

S2_AD59
S2_AD57

B68

B69

B70

B71

B72

IOV

B73
S2_AD55
S2_AD53

B74

B75

IOV

B76
S2_AD51
S2_AD49

S2_AD47
S2_AD45

B77

B78

B79

B80

B81

IOV

B82
S2_AD43
S2_AD41

B83

B84

IOV

B85
S2_AD39
S2_AD37

S2_AD35
S2_AD33

B86

B87

B88

B89

B90

IOV

B91
NC_S2_RSVDB92 NC_S2_RSVDA92
NC_S2_RSVDB93

B92

B93

IOV

A1

S2_TRST
A2
A3
A4

S2_TMS

S2_TDI
A5
A6

A

A7

C

S2_PIRQA

S2_PIRQC
A8
A9

NC_S2_RSVDA9
A10
A11

A14
A15

NC_S2_RSVDA11

NET_PHYSICAL_TYPE=15MIL

S2_3V3AUX

S2_PCIRST
A16
A17

S2_GNT
A18
A19
A20

ISO_PME_BUS3

S2_AD30
A21
A22
A23

S2_AD28

S2_AD26
A24
A25
A26

S2_AD24

S2_IDSEL
A27
A28
A29

S2_AD22

S2_AD20
A30
A31
A32

S2_AD18

S2_AD16
A33
A34

S2_FRAME
A35
A36

S2_TRDY
A37
A38

S2_STOP
A39
A40
A41

NC_S2_SDONE

NC_S2_SBO
A42
A43
A44

S2_PAR

S2_AD15
A45
A46
A47

S2_AD13

S2_AD11
A48
A49

S2_AD9
A50
A51
A52

S2_CBE0
A53
A54

p

A55

S2_AD6

S2_AD4
A56
A57
A58

S2_AD2

S2_AD0
A59
A60

S2_REQ64
A61
A62

A63
A64
A65

S2_CBE7

S2_CBE5
A66
A67
A68

S2_PAR64

S2_AD62
A69
A70
A71

S2_AD60

S2_AD58
A72
A73
A74

S2_AD56

S2_AD54
A75
A76
A77

S2_AD52

S2_AD50
A78
A79
A80

S2_AD48

S2_AD46
A81
A82
A83

S2_AD44

S2_AD42
A84
A85
A86

S2_AD40

S2_AD38
A87
A88
A89

S2_AD36

S2_AD34
A90
A91

S2_AD32
A92
A93
A94B94

NC_S2_RSVDA94

19

19

19

18

18

55

18

21,44

18

18

18

18

19

18,19

18

18

18

18

18

18

18

18

18

18

18

18

18

18

18

18

18

18

18

18

18

18

18

18

18

18

18

18

18

18

18

18

18

18

18

18

ROOM=SLOT2

+3.3V_AUX

LB11

1 2

FERRITE

1206

SUB*_83009

LM_X05--83009 sub for p/n consolidation

CB158

1 2

22uF 6.3V

18,19

S2_3.3V

NET_PHYSICAL_TYPE=PLANE

18,19

NET_PHYSICAL_TYPE=PLANE

18,19

S2_3.3V

NET_PHYSICAL_TYPE=PLANE

SUB*_78020

50V-20%

.01UF

50V-20%

C200

.01UF

21

SUB*_78020

RB1077

18,19

S2_AD22

21

S2_IDSEL

19

470

Jaguar 2.0 Change: PNP cards not configured, change R 2K to 470 ohm - PN30800

+3.3V

1 2

19,55

19,55

19,55

S2_PRESA

S2_PRESB

S2_M66EN

19,55

S2_XCAP

2.7K-5%
R232

50V-20%

.01UF

21

SUB*_78020

LM_X04--Sub for part consolidation

SUB*_78020

50V-20%

CB250

.01UF

.01uF 50V

.01uF 50V

2.7K-5%
RB36

21

21

CB6

1 2

CB5

21

2.7K-5%

50V-20%

CB10

.01UF

SUB*_78020

RB34

21

CB9

21

LM_X04--Sub for part consolidation

22uF 6.3V

1 2

CB208

SUB*_83009

S2_5V

SUB*_83009

22uF 6.3V

LM_X04--Sub for part consolidation

50V-20%

C161

.01UF

21

SUB*_78020

50V-20%

SUB*_78020

LM_X05--83009 sub for p/n consolidation

1 2

C252

CB273

1 2

.01UF

50V-20%

.01UF

SUB*_78020

SUB*_78020

50V-20%

.01UF

21

SUB*_78020

50V-20%

C239

.01UF

LM_X04--Sub for part consolidation

50V-20%

C109

.01UF

21

50V-20%

1 2

CB162

.01UF

50V-20%

1 2

C253

.01UF

SUB*_78020

SUB*_78020

C123

21

1 2

CB243

1 2

C291

SUB*_78020

50V-20%

.01UF

21

SUB*_78020

PCI 2.1 RECOMMENDED
RESISTORS

50V-20%

SUB*_78020

CB348

21

RB67

SUB*_78020

1 2

.01UF

50V-20%

.01UF

SUB*_78020

S2_TRST

S2_TCK

21

220

RB68

50V-20%

.01UF

C265

CB311

21

220

21

18,19

18,19

19

19

SUB*_78020

50V-20%

CB329

.01UF

CB341

21

50V-20%

.01UF

SUB*_78020

1 2

C120

NET_PHYSICAL_TYPE=60MIL

S2_12V

LM_X04--Sub for part consolidation

50V-20%

.01UF

50V-20%

.01UF

CB217

21

50V-20%

.01UF

SUB*_78020

LM_X04--Sub for part consolidation

NET_PHYSICAL_TYPE=60MIL

S2_N12V

19

19

18,19

S2_3.3V

21

R105

21

R115

2.7K-5%

S2_TDI

S2_TMS

C101

21

SUB*_78020

C88

21

SUB*_78020

2.7K-5%

17,18,20

17,18,20

17,18,20

17,18,20

17,18,20

17,18,20

17,18,20

17,18,20

PCIX3_LOCK

PCIX3_IRDY

PCIX3_PERR

PCIX3_TRDY

PCIX3_DEVSEL

PCIX3_SERR

PCIX3_FRAME

PCIX3_STOP

17,18,20

17,18,20

17,18,20

17,18,20

17,18,20

17,18,20

17,18,20

17,18,20

17,18,20

17,18,20

17,18,20

17,18,20

17,18,20

17,18,20

17,18,20

17,18,20

17,18,20

17,18,20

17,18,20

17,18,20

17,18,20

17,18,20

17,18,20

17,18,20

17,18,20

17,18,20

17,18,20

17,18,20

17,18,20

17,18,20

17,18,20

17,18,20

17,18,20

17,18,20

17,18,20

17,18,20

17,18,20

17,18,20

17,18,20

PCIX3_AD34
PCIX3_AD36
PCIX3_AD39
PCIX3_AD33
PCIX3_AD35
PCIX3_AD38
PCIX3_AD42
PCIX3_AD32
PCIX3_AD43
PCIX3_AD40
PCIX3_AD37
PCIX3_AD41
PCIX3_AD47
PCIX3_AD46
PCIX3_AD45
PCIX3_AD44
PCIX3_AD51
PCIX3_AD50
PCIX3_AD49
PCIX3_AD48
PCIX3_AD55
PCIX3_AD54
PCIX3_AD53
PCIX3_AD52
PCIX3_AD59
PCIX3_AD58
PCIX3_AD57
PCIX3_AD56
PCIX3_AD63
PCIX3_AD62
PCIX3_AD61
PCIX3_AD60
PCIX3_CBE4
PCIX3_CBE5
PCIX3_CBE6
PCIX3_CBE7
PCIX3_PAR64

PCIX3_REQ64

PCIX3_ACK64

ROOM=PCI3

RNB33

8.2K-5%

RNB33

7 2

8.2K-5%

RNB32

8.2K-5%

RNB32

5 4

8.2K-5%

RNB50

1 8

8.2K-5%

RNB44

1 8

8.2K-5%

RNB41

1 8

8.2K-5%

RNB39

1 8

8.2K-5%

RNB38

1 8

8.2K-5%

RNB37

1 8

8.2K-5%

RNB36

1 8

8.2K-5%

RNB35

1 8

8.2K-5%

RNB34

1 8

8.2K-5%

R265

1 2

8.2K-5%

RB186

8.2K-5%

36

18

RNB50

8.2K-5%

RNB44

8.2K-5%

RNB41

8.2K-5%

RNB39

8.2K-5%

RNB38

8.2K-5%

RNB37

8.2K-5%

RNB36

8.2K-5%

RNB35

8.2K-5%

RNB34

8.2K-5%

72

RNB50

3 6

8.2K-5%

72

RNB44

3 6

8.2K-5%

72

RNB41

3 6

8.2K-5%

72

RNB39

3 6

8.2K-5%

72

RNB38

3 6

8.2K-5%

72

RNB37

3 6

8.2K-5%

72

RNB36

3 6

8.2K-5%

72

RNB35

3 6

8.2K-5%

72

RNB34

3 6

8.2K-5%

21

8.2K-5%

7 2

8.2K-5%

8.2K-5%

5 4

8.2K-5%

RNB50

8.2K-5%

RNB44

8.2K-5%

RNB41

8.2K-5%

RNB39

8.2K-5%

RNB38

8.2K-5%

RNB37

8.2K-5%

RNB36

8.2K-5%

RNB35

8.2K-5%

RNB34

8.2K-5%

RB187

1 2

8.2K-5%

RNB32

36

RNB32

RNB33

18

RNB33

+3.3V

54

54

54

54

54

54

54

54

54

1

+3.3V

2

3

PCI 64-3.3V

SKT

SUB*_1956U

Green Conn

PCI2

4 4

PCIX BUS 3

COMPUTER
CORPORATION

AUSTIN,TEXAS

TITLE

SCHEM,PLN,PE4600,2P

PROPRIETARY NOTE: THIS ITEM IS THE PROPERTY OF DELL COMPUTER CORP. AUSTIN, TEXAS AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS ITEM MAY NOT BE TRANSFERRED FROM THE CUSTODY OF DELL COMPUTER CORP. EXCEPT
AS AUTHORIZED BY DELL COMPUTER CORP., AND THEN ONLY BY WAY OF LOAN FOR LIMITED PURPOSES. IT MUST NOT BE REPRODUCED IN WHOLE
OR IN PART AND MUST BE RETURNED TO DELL COMPUTER CORP. UPON REQUEST AND IN ALL EVENTS UPON COMPLETION OF THE PURPOSE OF THE
LOAN. NEITHER THIS ITEM OR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO PERSONS NOT HAVING A NEED FOR SUCH
USE OR DISCLOSURE CONSISTENT WITH THE PURPOSE OF THE LOAN WITHOUT THE PRIOR WRITTEN CONSENT OF DELL COMPUTER CORPORATION.

DWG NO.

DATE

H3007

12/5/2003

REV.

A02

SHEET

19 OF 63

A B

DC