5
4
3
2
1
MS-9166 Dual K8 1U System Date : 2005/05/16 Revision : 0C
001 COVER
002 Block Diagram
003 K8 CPU0 Vcore Power
004 K8 CPU1 Vcore Power
D D
005 CPU0 DDR POWER
006 CPU1 DDR POWER
007 1.2V Power
008 3.3V & 5V & -12 Power
009 Main Power
010 Clock Synthesizer
011 CPU0 DDR & HT2 TO CPU1
012 CPU0 HDT & MISC
013 CPU0 HT0(NC HT)& HT1 TO LH
014 CPU0 POWER & GND
015 CPU0 Register DDR DIMM1 & DIMM2
016 CPU0 Register DDR DIMM3 & DIMM4
017 CPU0 DDR Terminations
018 CPU0 DDR Decoupling(1)
019 CPU0 DDR Decoupling(2)
020 CPU1 DDR & HT2 TO CPU0
021 CPU1 HDT & MISC
022 CPU1 HT0 & HT1(NC HT)
023 CPU1 POWER & GND
C C
024 CPU1 Register DDR DIMM1 & 2
025 CPU1 Register DDR DIMM3 & 4
026 CPU1 DDR Terminations
027 CPU1 DDR Decoupling(1)
028 CPU1 DDR Decoupling(2)
029 HDT
030 HT-LE HT & PCI-E
031 HT-LE PCI-X
032 HT-LE Dual LAN
033 HT-LE POWER & Decoupling
034 HT-LE GND
035 Strapping
036 SCSI PCI-X & Power & GND
037 SCSI Differential Signal
038 SCSI Connector
039 SCSI Memory Signal
040 SB1 PCI
041 SB1 PCI-X
042 SB1 IDE & LPC
B B
043 SB1 POWER & GND
044 SMBUS Isolation
045 PCI-X & PCI-E SLOT
046 ATI RN50 PCI
047 ATI RN50 Memory
048 VGA Connector
049 SIO PC87417
050 BIOS Flash & ASR & ABR
051 ADM 1027
052 FAN CIRCUIT
053 USB & IDE Connector
054 COM Port KB Mouse
055 GAL POWER SEQ
056 FRONT PANEL
057 SO-DIMM CONN
058 SM_Hardware Monitor & VPD
059 Diagnotic LED & CPLD
060 Layout comp & Opt part
A A
061 System Decoupling
POWER DEFINITIONM
P0_VCORE, P1_VCORE
P0_VDDA_2.5
P1_VDDA_2.5
+1.2V_HT
P0_VDIMM_2.5V, P1_VDIMM_2.5V
P0_VTT_1.25V, P1_VTT_1.25V
+2.5V
+1.2V
+5VSB
+2.5VDUAL
+1.2VDUAL
LAN_2.5V
LAN_1.25V
VGA_2.5V
CPU Voltage
For CPU0
For CPU1
HT Voltage
DDR Dimm Voltage
DIMM Termination
Normal 2.5V
Normal 1.8V
Standby Voltage
Dual-Voltage +3.3VDUAL
Dual-Voltage
Dual-Voltage
Dual-Voltage (For G-LAN)
Dual-Voltage (For G-LAN)
For ATI VGA Voltage
For Battrey Voltage VBAT
Micro-Star Int'l Co., Ltd.
No.69, Li-De St, Jung-He City, Taipei Hsien, Taiwan. http://www.msi.com.tw
Title
Size Document Number Rev
5
4
3
2
Date: Sheet
CPVER
MS-9166
1
0C C
of
16 9 Friday, May 20, 2005
8
7
6
5
4
3
2
1
BLOCK DIAGRAM
D D
BLOCK DIAGRAM
16x16ncHyperTransport @ 2000MT/s
Sledgehammer DP
( H1 ) ( H0 )
128 bit
200 - 400 MHz
4 DDR DIMM
Registered
4 DDR DIMM
128 bit
200 - 400 MHz
Sledgehammer DP
HTLINK
Registered
HTLINK
16x16 ncHyperTransport @ 2000MT/s
C C
PCI-X Slot
64 bit
133 MHz
HT-LE
( SWC-HT2k )
PCI-X Bus
8 X PCI-E
8 X PCI-E
PCI-E Bus
2 Ports GbE
HTLINK
8x8 ncHyperTransport @ 1200MT/s
I2C Bus
ATI RN-50
8 MB RAM
VGA
LSI
5SC1020
B B
Single IDE Chan nel
USB Port 1/2/3/4
SATA Port 1/2
EIDE ATA/100
USB 2.0
SSTA
SB1
( HT-1000 )
LPC
PCI Bus 32 bit / 33 MHz
PCI-X Bus 64 bit /133 MHz
BMC Card
(MS-XXXX)
H8 2168
Flash ROM
A A
Keyboard
& Mouse
(OPT)
8
7
LPC SIO
NS/PC87417
6
Serial
(COM1,2)
FDD
5
I2C Bus
OR
ADM1027
Micro-Star Int'l Co., Ltd.
No.69, Li-De St, Jung-He City, Tai p e i H s i e n , T a i w a n . h t t p :/ /www.msi.c om.tw
Title
Size Document Number Rev
4
3
Date: Sheet
2
Block Diagram
MS-9166
0C A3
of
26 9 Friday, May 20, 2005
1
5
4
3
2
1
CPU0 Vcore Power
+12V
C670
.1u_16V
CHOK6 1.1uH_25A
C657
47p_50V
C698
47p_50V
CT33
270u_16V
CT35
270u_16V
CT23
270u_16V
270uF/16V x4
D D
CPU0POWER_GD 4
NOPOP
+5V
C829
X_1u_10V
C C
+5V
R922
10K
C875
1u_10V
R813 X_100K_1%
NOPOP
P0_COREFB 12
P0_COREFBJ 12
P0_VDIMM_2.5V
RN162 X_1K-8P4R
R890 X_1K
PWRSEQ_7_EN 55
P0_VID[4..0] 12
C856
5600p_50V
R839
10K
R824
0
7 8
5 6
3 4
1 2
NOPOP
NOPOP
P0_VID1
P0_VID2
P0_VID3
P0_VID4
P0_VID0
P0_VID4
P0_VID3
P0_VID2
P0_VID1
P0_VID0
R925 68K_1%
C848
X_22p
NOPOP
R821
1K
U91
28
EN
3
VID4
4
VID3
5
VID2
6
VID1
7
VID0
26
PGOOD
9
COMP
10
FB
12
VDIFF
11
IDROOP
20
GND
15
GND
1
GND
ISL6559CB
P0_VCORE
R808
R809
51_1%
51_1%
PWM1
ISEN1
PWM2
ISEN2
PWM3
ISEN3 FS/DIS
PWM4
ISEN4
VSEN
RGND
16
VCC
H0_PWM1
22
23
H0_PWM2
21
19
H0_PWM3
17
18 27
H0_PWM4
25
24
8
OFS
2
OVP
13
14
VDD_12_VRM_H0
C677
4.7u_35V-1206
+5V
R889 2.2K_1%
R841 2.2K_1%
R838 2.2K_1%
R899 2.2K_1%
R876
2.2K
Offset Adjustment
R807
0-0805
C831
1u_16V-0805
C669
4.7u_35V-1206
H0_PHASE1
H0_PHASE2
H0_PHASE3
H0_PHASE4
C884
2.2u_16V-0805
2.2u_16V-0805
NOPOP
NOPOP
C859
NOPOP
C837
2.2u_16V-0805
B B
+12V
R933
X_2.2-0805
C893
.22u_16V
H0_PWM1
+12V
R847
X_2.2-0805
C873
.22u_16V
H0_PWM2
+12V
R805
X_2.2-0805
C842
.22u_16V
H0_PWM3
+5V
R913
4.7-0805
U95
6
VCC
7
PVCC
4
GND
3
PWM
R930
MOSDVR-INTS-HIP6605-SOIC8
499K_1%
+5V
R874
4.7-0805
U92
6
VCC
7
PVCC
4
GND
3
PWM
MOSDVR-INTS-HIP6605-SOIC8
R875
499K_1%
+5V
R817
4.7-0805
U90
6
VCC
7
PVCC
4
GND
3
PWM
MOSDVR-INTS-HIP6605-SOIC8
R825
499K_1%
BOOT
PHASE
BOOT
PHASE
BOOT
PHASE
1
U_G
R923 0
2
8
5
L_G
1
U_G
R845 0
2
8
5
L_G
1
U_G
R804 0
2
8
5
L_G
R921 2.2-0805
C874
.1u_16V
R911
2.2-0805
C878
X_.01u
NOPOP
R812 2.2-0805
C847
.1u_16V
R815
2.2-0805
C830
X_.01u
NOPOP
R782 2.2-0805
C827
.1u_16V
R761
2.2-0805
C731
X_.01u
NOPOP
H0_PHASE1
H0_PHASE2
H0_PHASE3
VDD_12_VRM_H0
D S
Q106
G
IPD09N03L/TO252
D S
Q105
G
IPD06N03LA/TO252
VDD_12_VRM_H0
D S
Q90
G
IPD09N03L/TO252
D S
Q92
G
IPD06N03LA/TO252
VDD_12_VRM_H0
D S
Q76
IPD09N03L/TO252
G
D S
Q78
G
IPD06N03LA/TO252
C1424
BOT/1u_16V-0805
G
C1422
BOT/1u_16V-0805
CHOK9 0.8uH
G
C1413
BOT/1u_16V-0805
C1423
BOT/.1u_16V
CHOK10 0.8uH
D S
Q104
IPD06N03LA/TO252
C1421
BOT/.1u_16V
D S
Q91
IPD06N03LA/TO252
C1410
BOT/.1u_16V
CHOK8 0.8uH
D S
Q77
G
IPD06N03LA/TO252
P0_VCORE
P0_VCORE
2005/3/18 Schematic
Update
C828
.1u_16V
+12V
H0_PHASE4
VDD_12_VRM_H0
D S
Q70
IPD09N03L/TO252
G
D S
Q69
G
IPD06N03LA/TO252
C671
1u_16V-0805
C699
.1u_16V
CHOK7 0.8uH
D S
Q68
G
IPD06N03LA/TO252
+5V
+12V
R723
R724
X_2.2-0805
4.7-0805
NOPOP
C688
C687
2.2u_16V-0805
A A
.22u_16V
H0_PWM4
6
7
4
3
MOSDVR-INTS-HIP6605-SOIC8
R726
499K_1%
U71
VCC
PVCC
GND
PWM
BOOT
PHASE
1
U_G
2
8
5
L_G
R732 0
R734 2.2-0805
C689
.1u_16V
R746
2.2-0805
C703
X_.01u
NOPOP
Micro-Star Int'l Co., Ltd.
No.69, Li-De St, Jung-He City, Taipei Hsien, Taiwan. http://www.msi.com.tw
Title
Size Document Number Rev
5
4
3
2
Date: Sheet
K8 CPU0 Vcore Power
MS-9166
1
0C C
of
36 9 Friday, May 20, 2005
5
4
3
2
1
CPU1 Vcore Power
H1_PWM1
H1_PWM2
H1_PWM3
H1_PWM4
VDD_12_VRM_H1
C598
4.7u_35V-1206
+5V
R354 2.2K_1%
R352 2.2K_1%
R353 2.2K_1%
R356 2.2K_1%
R427
2.2K
Offset Adjustment
R350
0-0805
C320
1u_16V-0805
C362
4.7u_35V-1206
H1_PHASE1
H1_PHASE2
H1_PHASE3
H1_PHASE4
C600
2.2u_16V-0805
2.2u_16V-0805
2.2u_16V-0805
NOPOP
H1_PWM1
NOPOP
C573
H1_PWM2
NOPOP
C505
H1_PWM3
+12VB
C323
.1u_16V
CHOK1 1.1uH_25A
C106
47p_50V
C593
47p_50V
CT12
270u_16V
CT5
270u_16V
CT15
270u_16V
Sanyo OS-CON 270uF/16V( Ripple current = 4.4A) x 3
D D
P1_VDIMM_2.5V
RN40 X_1K-8P4R
7 8
5 6
3 4
1 2
R426 X_1K
P1_VID[4..0] 21
C374
5600p_50V
R440
10K
R424
0
R741
10K
Q67
2N7002
NOPOP
PWRSEQ_7_EN 55
+5V
R355
10K
CPU1POWER_GD
C324
1u_10V
NOPOP
H1_PRESENT 23
+5V
R441 X_100K_1%
NOPOP
C400
X_1u_10V
P1_COREFB 21
P1_COREFBJ 21
+5V
D S
G
C C
B B
NOPOP
P1_VID1
P1_VID2
P1_VID3
P1_VID4
P1_VID0
CPU1POWER_EN
P1_VID4
P1_VID3
P1_VID2
P1_VID1
P1_VID0
R357 68K_1%
C375
X_22p
NOPOP
R425
1K
1
2
3
U77
GND
NC7S08
28
3
4
5
6
7
26
9
10
12
11
20
15
1
P1_VCORE
VCC
U40
EN
VID4
VID3
VID2
VID1
VID0
PGOOD
COMP
FB
VDIFF
IDROOP
GND
GND
GND
ISL6559CB
+5V
5
4
R423
51_1%
R422
51_1%
CPU1POWER_EN
PWM1
ISEN1
PWM2
ISEN2
PWM3
ISEN3 FS/DIS
PWM4
ISEN4
VSEN
RGND
16
VCC
22
23
21
19
17
18 27
25
24
8
OFS
2
OVP
13
14
+12V
C599
.22u_16V
+12V
C572
.22u_16V
+12V
C506
.22u_16V
R625
X_2.2-0805
499K_1%
R577
X_2.2-0805
499K_1%
R504
X_2.2-0805
499K_1%
R653
R583
R536
+5V
R622
4.7-0805
U65
6
VCC
7
PVCC
4
GND
3
PWM
MOSDVR-INTS-HIP6605-SOIC8
+5V
R578
4.7-0805
U62
6
VCC
7
PVCC
4
GND
3
PWM
MOSDVR-INTS-HIP6605-SOIC8
+5V
R503
4.7-0805
U53
6
VCC
7
PVCC
4
GND
3
PWM
MOSDVR-INTS-HIP6605-SOIC8
BOOT
PHASE
BOOT
PHASE
BOOT
PHASE
R712 2.2-0805
1
U_G
R668 0
2
8
5
L_G
1
U_G
R609 0
2
8
5
L_G
1
U_G
R537 0
2
8
5
L_G
C624
.1u_16V
R620
2.2-0805
C588
X_.01u
NOPOP
R608 2.2-0805
C585
.1u_16V
R603
2.2-0805
C586
X_.01u
NOPOP
R549 2.2-0805
C526
.1u_16V
R502
2.2-0805
C424
X_.01u
NOPOP
H1_PHASE1
H1_PHASE2
H1_PHASE3
VDD_12_VRM_H1
D S
Q64
G
IPD09N03L/TO252
D S
Q59
G
IPD06N03LA/TO252
VDD_12_VRM_H1
D S
Q47
G
IPD09N03L/TO252
D S
Q48
G
IPD06N03LA/TO252
VDD_12_VRM_H1
D S
Q42
IPD09N03L/TO252
G
D S
Q41
G
IPD06N03LA/TO252
C647
1u_16V-0805
C565
1u_16V-0805
C544
1u_16V-0805
CHOK5 0.8uH
D S
Q54
G
IPD06N03LA/TO252
C567
.1u_16V
CHOK4 0.8uH
D S
Q49
G
IPD06N03LA/TO252
C553
.1u_16V
CHOK3 0.8uH
D S
G
C658
.1u_16V
Q38
IPD06N03LA/TO252
P1_VCORE
VDD_12_VRM_H1
VDD_12_VRM_H1
C643
.1u_16V
C661
.1u_16V
2005/3/18 Schematic
Update
P1_VCORE
+12V
U76
CPU0POWER_GD 3
A A
CPU1POWER_GD
1
2
3
GND
NC7S32
VCC
+5V
5
4
PWRSEQ_7_GD 55
NOPOP
C368
2.2u_16V-0805
H1_PWM4
+12V
R401
X_2.2-0805
C384
.22u_16V
+5V
R448
4.7-0805
R406
MOSDVR-INTS-HIP6605-SOIC8
499K_1%
6
VCC
7
PVCC
4
GND
3
PWM
BOOT
PHASE
1
U_G
2
8
5
L_G
R453 0
R467 2.2-0805 U44
C405
.1u_16V
R479
2.2-0805
NOPOP
C425
X_.01u
H1_PHASE4
VDD_12_VRM_H1
D S
Q29
IPD09N03L/TO252
G
D S
Q30
G
IPD06N03LA/TO252
C379
1u_16V-0805
C406
.1u_16V
CHOK2 0.8uH
D S
Q31
G
IPD06N03LA/TO252
Micro-Star Int'l Co., Ltd.
No.69, Li-De St, Jung-He City, Taipei Hsien, Taiwan. http://www.msi.com.tw
Title
Size Document Number Rev
5
4
3
2
Date: Sheet
K8 CPU1 Vcore Power
MS-9166
1
0C C
of
46 9 Friday, May 20, 2005
5
VCC_SWT_H0
D D
PWRSEQ_5_GD 55
R994 BOT/1K
+5V
R368
X_0
NOPOP NOPOP
R369
100K
C337
.01u_50V
PWRSEQ_5_EN
R384 47K
4.7u_6.3V-0805
PWRSEQ_5_EN 55
C C
P0_VDIMM_2.5V
+5V
R400
X_0
R407
0
B B
P0_VDIMM_2.5V
R364
10K_1%
R365
10K_1%
.1u_16V C347
+5V
C1121
X_1u
NOPOP
C345
X_.01u
NOPOP
R363
X_10K
C336
1u_10V
P0_VTT_1.25V
+2.5VDIMM_SWT_H0
+5V
C398
.1u_16V
PWRSEQ_5_EN
+5V
R411
X_0
NOPOP
R421
0
4
1 23 45 6
7 8
RN37
X_0_8P4R
NOPOP
L30 1.2uH_8A
E_CHKTC3052_1R2M080S
U42
28
VCC
1
AGND
15
PG1
8
EN1
11
ILIM1
12
SS1
9 10
FPWM1# VSEN1
14
VIN
16
PG2/REF2OUT
21
EN2
18
ILIM2/REF2
17
SS2
20
FPWM2#
13
DDR
ISL6539-TSSOP28PIN
R367
0
R366
X_0
P0_VDIMM_2.5V
+5V
BOOT1
HDRV1
SW1
LDRV1
PGND1
ISNS1
BOOT2
HDRV2
SW2
LDRV2
PGND2
ISNS2
VSEN2
R428 1
6
5
4
2
3
7
23
24
25
27
26
22
19
D49
BOT/1N5817
D48
C364
.1u_16V
R405
0
D51
BOT/1N5817
BOT/1N5817
PHASE_2V5_H0
3
Near U27,update 6/9
D50
BOT/1N5817
R362 2.2-0805
PHASE_2V5_H0
R451 0-0805
R399
R414 0
R437 2.2-0805
PHASE_1V25_H0
R442 0-0805
R432 10K_1%
+5V
D46
BOT/1N5817
Update 6/9
3K_1%
E_CHKTC3052_1R2M080S
L27 1.2uH_8A
C290 10u_6.3V_0805
PHASE_2V5_H0
R431
2.2-0805
C372
1000p
Connect to here
BOT/1N5817
D47
R379 1
C377
.1u_16V
IPD09N03AL/TO252
PHASE_1V25_H0
R439 2.2-0805 C338
C399
1000p
IPD09N03AL/TO252
G
G
Q35
FDB6670AL/TO263
+5V
Q27
G
G
Q28
VCC_SWT_H0
D S
Q25
FDB6670AL/TO263
Near Q25
D S
C357
4.7u_6.3V-0805
D S
Near Q23
Near Q26
D S
D31
1N5817
2
390u_6.3V_OS-CON
+
EC29
390u_6.3V_OS-CON
L29 0.8uH
D29
1N5817
+2.5VDIMM_SWT_H0
C403
1u_10V
E_CHKTC3052_1R2M080S
L31 1.2uH_8A
+
EC32
390u_6.3V_OS-CON
Update 6/9
C354
.01u_50V
Update 2003/06/24
+
EC33
390u_6.3V_OS-CON
C358
.01u_50V
5/5 update
+
EC24
NOPOP
P0_VDIMM_2.5V
C353
X_100p
P0_VTT_1.25V
C352
X_100p
NOPOP
C319
4.7u_6.3V-0805
R385
1.87K_1%
R371 X_1.82K_1%
R382
1K_1%
R402
0
R387 X_1K_1%
R383
X_2.55K
NOPOP
To support DDR400.
VDIMM=2.57V.
NOPOP NOPOP
1
C355
1u_10V
P0_VDDIO_SENSE 14
P0_VTT_SENSE 11
A A
Micro-Star Int'l Co., Ltd.
No.69, Li-De St, Jung-He City, Taipei Hsien, Taiwan. http://www.msi.com.tw
Title
Size Document Number Rev
5
4
3
2
Date: Sheet
CPU0 DDR Power
MS-9166
1
0C B
of
56 9 Friday, May 20, 2005
5
4
3
2
1
R893 1
+5V
R924
PWRSEQ_5_EN
.1u_16V C849
C903
4.7u_6.3V-0805
X_10K
C885
1u_10V
C898
X_.01u
NOPOP
C880 10u_6.3V_0805
P1_VTT_1.25V
R949
X_0
NOPOP
R935
0
+5V
C902
.1u_16V C841
+5V
28
1
15
8
11
12
9 10
14
16
21
18
17
20
13
ISL6539-TSSOP28PIN
R856
0
R857
X_0
NOPOP
4
D D
PWRSEQ_5_GD 55
R936 1K
+5V
PWRSEQ_5_EN 55
C C
P1_VDIMM_2.5V
R859
X_0
NOPOP
B B
A A
R858
0
P1_VDIMM_2.5V
R944
10K_1%
R945
10K_1%
+5V
5
R900 47K
R894
X_0
NOPOP
R895
100K
C899
.01u_50V
+5V
U93
VCC
AGND
PG1
EN1
ILIM1
SS1
FPWM1# VSEN1
VIN
PG2/REF2OUT
EN2
ILIM2/REF2
SS2
FPWM2#
DDR
BOOT1
HDRV1
SW1
LDRV1
PGND1
ISNS1
BOOT2
HDRV2
SW2
LDRV2
PGND2
ISNS2
VSEN2
D53
BOT/1N5817
R896
0
6
5
4
2
3
7
23
24
25
27
26
22
19
D57
BOT/1N5817
BOT/1N5817
Near U64,update 6/9
+5V
C852
.1u_16V
PHASE_2V5_H1
Near U64,update 6/9
BOT/1N5817
Update 6/9
R955 2.2-0805
R888 0-0805
R860 3K_1%
R937 0
PHASE_1V25_H1 PWRSEQ_5_EN
R823 0-0805
D56
CT4
100u_6.3V/MLCC
D52
BOT/1N5817
PHASE_2V5_H1
R912 2.2-0805
3
E_CHKTC3052_1R2M080S
CT3
100u_6.3V/MLCC
D55
FDB6670AL/TO263
R943 10K_1%
VCC_SWT_H1
+2.5VDIMM_SWT_H1
E_CHKTC3052_1R2M080S
L46 1.2uH_8A
G
PHASE_2V5_H1
R834
2.2-0805
1000p
Q96
G
D44 1N5817
C901
.1u_16V
PHASE_1V25_H1
R873 2.2-0805
C843
1000p
1 23 45 6
7 8
RN156
X_0_8P4R
NOPOP
1.2uH_8A
VCC_SWT_H1
EC78
270u_16V
D S
Sanyo OS-CON 270uF/16V( Ripple current = 4.4A) x 2
Q107
FDB6670AL/TO263
Update_0D
2003/07/16
Near Q66
Q94
D54
BOT/1N5817
Q95
G
G
EC64
3300u/6.3V
L41 0.8uH
+5V
D S
R958 1
IPD09N03AL/TO252
IPD09N03AL/TO252
P1_VDIMM_2.5V
L42
D S
D S
EC79
270u_16V
C869
4.7u_6.3V-0805
Update_0D
2003/07/16
Near Q69
D58
BOT/1N5817
2
C850
.01u_50V
+2.5VDIMM_SWT_H1
Near Q68
L43 1.2uH_8A
E_CHKTC3052_1R2M080S
C892
C894
1u_10V
4.7u_6.3V-0805
P1_VDIMM_2.5V
To support DDR400.
VDIMM=2.57V.
X_1.82K_1%
R837
NOPOP
C858
1u_10V
P1_VDDIO_SENSE 23
C851
X_100p
NOPOP
R836
1.87K_1%
R835
1K_1%
EC67
270u_16V
Sanyo OS-CON 270uF/16V( Ripple current = 4.4A) x 1
P1_VTT_1.25V
R946
0
R947 X_1K_1%
NOPOP
R948
X_2.55K
NOPOP
P1_VTT_SENSE 20
NOPOP
C908
.01u_50V
C900
X_100p
Micro-Star Int'l Co., Ltd.
No.69, Li-De St, Jung-He City, Taipei Hsien, Taiwan. http://www.msi.com.tw
Title
Size Document Number Rev
Date: Sheet
CPU1 DDR POWER
MS-9166
1
66 9 Friday, May 20, 2005
of
0C Custom
5
D D
2005/3/8 Delete
power enable
R348
22K
P1_VTT = 1.2V
10P/50V/NPO
1500p_50V
C309
C316
7
4
R323
2.2-0805
COMP
R331 47K
A C
5
UGATE
VCC
PHASE
LGATE FB
GND
U36
3
ISL6520A
C293
4.7u_6.3V-0805
D27
1N5817
BOOT
2
1
8
4 6
Vref = 0.8V
R315
2.2-0805
C331
.22u_16V
+5VDUAL
CHOCK1
CH-1.2U8A
D S
Q21
G
IPD09N03L/TO252
CHOCK2
CH-1.5u10A
D S
Q24
G
IPD06N03LA/TO252
+5VSB +2.5VDUAL +1.2VDUAL +5VSB
3
C308
1 2
1 2
10u_6.3V_0805
C295
10u_6.3V_0805
+
EC27
1000u_6.3V
+
EC25
1000u_6.3V
1.Add EC105 for 5VDUAL input voltage
2
1
2005/3/14 Schematic Update
NB:7.9A
R347
1.8K_1%
R329
3.6K
1 2
+
+
820u2.5VOS
TC4
EC17
270u_16V
+1.2VDUAL
R701
C C
11.8K_1%
1.087V
R688
9.09K_1%
+5V
R649
X_10K
PWRSEQ_3_GD 55
B B
PWRSEQ_3_EN 55
PWRSEQ_8_GD 55
PWRSEQ_8_EN 55
A A
C625
+5V
1u_10V
+5V
R669
X_10K
C630
+5V
1u_10V
5
R613
X_1K
R634
1K
R670
47K
+5V
C629
1u_16V-0805
R611 47K
C590 .01u_50V
R612 0
R591 100K
C631
.01u_50V
U64
28
VCC
1
AGND
15
PG1
8
EN1
11
ILIM1
12
SS1
9 10
FPWM1# VSEN1
14
VIN
16
PG2/REF2OUT
21
EN2
18
ILIM2/REF2
17
SS2
20
FPWM2#
13
DDR
ISL6539-TSSOP28PIN
Vref = 0.9V
R610
R671
0
0
+5V
R584
1
D33
1N5817
R615 0
6
BOOT1
5
HDRV1
4
SW1
2
LDRV1
3
PGND1
7
ISNS1
23
BOOT2
24
HDRV2
25
SW2
27
LDRV2
26
PGND2
22
ISNS2
19
VSEN2
4
C589 .1u_16V
R594 2.2-0805
PHASE_1V8
R616 0-0805
R614 1K_1%
R673 0
R755 2.2-0805
PHASE_1V2
R742 0-0805
R672 1K_1%
C649
X_102p
NOPOP
R665
4.7K
C632
.1u_16V
PHASE_1V8
Update 06/23/2003
For OC protection
C628
.1u_16V
PHASE_1V2
3
+
2
-
U68A
NS-LM358MX/SOIC8
4 8
C642
1u_10V
+5V
E_CHKTC3052_1R2M080S
L39 1.2uH_8A
IPD09N03L/TO252
IPD06N03LA/TO252
D36
1N5817
IPD09N03L/TO252
IPD06N03LA/TO252
1
Q46
Q43
R710 1
Q71
R700
10K
PWRSEQ_3_GD 55
C648
1u_10V
VCC_1V8-1V2
+
EC51
D34
1N5817
D S
D S
PHASE_1V2
390u_6.3V_OS-CON
PHASE_1V8
R595
2.2-0805
1000p
390u_6.3V_OS-CON
D38
1N5817
R760
2.2-0805
1000p
D S
G
D S
G
+5V
G
Q72
G
3
3.3uH_4A
C584
VCC_1V8-1V2
+
EC57
3.3uH_4A
C733
C592
1u_10V
C719
1u_10V
C591
.01u_50V
C644
.01u_50V
+1.2V
R593
10K_1%
R592
30K_1%
+1.2V_HT
R691
10K_1%
R690
30K_1%
CT13
100u_6.3V/MLCC
+
2
EC65
1000u_6.3V
+
EC48
1000u_6.3V
SB:1.7A
SB:0.6A
P1:2A
P2:1A
Micro-Star Int'l Co., Ltd.
No.69, Li-De St, Jung-He City, Taipei Hsien, Taiwan. http://www.msi.com.tw
Title
Size Document Number Rev
Date: Sheet
1.2V Power
MS-9166
1
0C C
of
76 9 Friday, May 20, 2005
L38
L40
5
+12V
R223
14 4
13
VCC COMP
7
4.7-0805
C209
1u_16V-0805
U25
OCSET
PVCC
BOOT
UGATE
PHASE
LGATE
PGND
GND
ISL6522CB-TR5190
2
10
9
8
12
11
D D
R163
10K
6
EN
C212 .1u
C C
C194 22p_50V
C203 .01u_50V R224 15K_1%
3
SS
1
RT
5
FB
4
+12V
D12
1N4148
C192 .1u_50V-0805
D20
1N5817
1N5817
Near U19,update 6/9
C214
102p_50V
R221 0-0805
R107 0-0805
D19
R253
1.5K
G
G
Q6
FDB6670AL/TO263
3
D S
Q12
FDB6670AL/TO263
D S
C232
1u_10V
D13
1N5817
Near Q4
390u_6.3V_OS-CON
C254
390u_6.3V_OS-CON
D17
1N5817
C286
390u_6.3V_OS-CON
E_CHKM5052_100109Y1
L7 3uH_20A
R172
2.2-0805
C185
102p_50V
2
E_CHKTC3052_1R2M080S
L21 1.2uH_8A
C271
R178
2K_1%
R184
634_1%
+
EC8
1000u_6.3V
470uF/6.3V x 2
+5V
+
EC11
1000u_6.3V
+3.3V
+
1 2
EC2
47u_16V
1
B B
+12V
C109
+
A A
47u_16V
R98
1.5K_1%
R90
13K_1%
U7 LM2575T-12
1 2
V IN OUTPUT
4
FB
5
ON/OFF
GND
3
L6
100uH_0.5A
D8 SS14
-12V
+
C89
470u_16V
0.2A
Micro-Star Int'l Co., Ltd.
No.69, Li-De St, Jung-He City, Taipei Hsien, Taiwan. http://www.msi.com.tw
Title
Size Document Number Rev
5
4
3
2
Date: Sheet
3.3V & -12V Power
MS-9166
1
0C B
of
86 9 Friday, May 20, 2005
5
+2.5V
2.5VSBREF
+12V
D D
PWRSEQ_3_EN 55
R826
4.7K
D S
Q86
G
2N7002
R897
1K
D S
Q102
G
2N7002
+12V +3.3V
5
+
6
-
7
U94B
NS-LM358MX/SOIC8
4 8
4
+12V
3
2
1
+2.5V Dual
+2.5V
EC75
+
1000u_6.3V
C904
.1u_16V
P1:0.135
P2:0.135
SB:0.08A
C907
47p_50V
D
Q103
NDS351AN/SOT23
G
S
C911
102p_50V
+5VSB
2.5VSBREF
C288
.1u_16V
R800
1K
+5VSB
3
+
2
-
U31A
NS-LM393MX/SOIC8
4 8
R314
+3.3VDUAL
C313
Q22
FDD6676/TO252
47p_50V
1+0.6 A
+2.5VDUAL
4.7K
D
G
S
+5VSB
1
C301
102p_50V
+5V +2.5VDUAL +2.5V +5V
3/7 update
R791
1K_1%
C C
B B
A A
Threshold voltage = 2.27V
PWRSEQ_6_EN 55
Threshold voltage = 2.27V
2.5VSBREF
G
5
100
+12V
D S
R783
1K_1%
R784
10K_1%
R833
4.7K
Q88
2N7002
R785
10K_1%
+5VSB
R811
100-0805
2
VR4
YREG431S/Vf=2.5V
3 1
3/7 update
C817
X_102p
NOPOP
C742
X_102p
NOPOP
G
R794
C814
.1u_16V
R795
4.7K
C816
C815
1u_10V
.1u_16V
+2.5VPLL 0.21A
R898
4.7K
D S
Q98
C872
1u_10V
2N7002
+5V +2.5VDUAL +2.5VPL L +5V
4.7K
3
+
2
-
U83A
NS-LM358MX/SOIC8
4 8
C813
1u_10V
5
+
7
6
-
U83B
NS-LM358MX/SOIC8
4 8
+12V +3.3V
3
+
2
-
U94A
NS-LM358MX/SOIC8
4 8
1
R766
X_10K
PWRSEQ_3_GD 55
C740
X_1u_10V
D S
G
G
C419
22u_10V-1206
+3.3VSB
Q36
2N7002
D S
Q9
2N7002
R457
191_1%
R458
324_1%
SB_PWROK1
SB_PWROK1
SB_PWROK1 55
EC72
1000u_6.3V
Q32
3 2
VIN VOUT
REF.=1.25V
SOT-223
RC1117S/SOT223
FAIRCHILD/RC1117S
+5V
C737
.1u_16V
4
VOUT
1
ADJ
C414
102p_50V
3
+2.5VPLL
D
Q89
G
PWRSEQ_6_GD 55
NDS351AN/SOT23
S
+
+5VSB
C387
.1u_16V
1
R771
10K
C739
1u_10V
4
2005/3/14 Schematic Update
+12V +3.3VSB +5VSB
R489
R470
4.7K
4.7K
D S
Q34
G
2N7002
+12V +5VSB +5VSB
R236
R254
4.7K
4.7K
D S
Q11
G
2N7002
C402
.1u_16V
2
Q33
G
P-CH
G
N-CH
Q10
G
P-CH
G
N-CH
SOT23SGD_T
P-SI2305DS_SOT23
SOT-23
D S
D S
Q26
IPD06N03LA/TO252
TO-252
+3.3V
SOT23SGD_T
P-SI2305DS_SOT23
SOT-23
D S
D S
Q13
IPD06N03LA/TO252
TO-252
+5V
EC21
+
1000u_6.3V
+3.3VDUAL
A C
D30
1N5817
3A
+
1000u_6.3V
A C
EC28
D21
1N5817
C418
1u_10V
+5VDUAL
8A
+
1000u_6.3V
EC15
C292
1u_10V
Micro-Star Int'l Co., Ltd.
No.69, Li-De St, Jung-He City, Taipei Hsien, Taiwan. http://www.msi.com.tw
Title
Size Document Number Rev
Date: Sheet
Main Power
MS-9166
1
96 9 Friday, May 20, 2005
of
0C Custom
5
Note:ICS Requirement:
CL= 18pF = Ext. 30pF
CL= 20pF = Ext. 33pF
14.318MHz
Y3
+3.3V
300 ohm/700mA/0805
C366
33p_50V_NPO
300 ohm/700mA/0805
L23
C349
10u_6.3V_0805
L32
C423
10u_6.3V_0805
.1u_16V
C367
R488 2.2
+3.3V
C350
.047u_16V_X7R
C365
33p_50V_NPO
D D
C C
B B
14_318MHz
+3.3V
FS2 FS1 FS0 CPU HTT PCI
MHz MHz MHz
0 0 0 Hi-Z Hi-Z Hi-Z
0 0 1 X X/3 X/6
0 1 0 180.0 60.2 30.0
0 1 1 220.0 36.5 73.12
1 0 0 100.0 66.6 33.3
1 0 1 133.3 66.6 33.3
1 1 0 166.6 66.6 33.3
1 1 1 200.0 66.6 33.3
ICS9DB108
-------------------------------ÂPCIE_DIV_L:
0 = SRC/2 1= SRC
PCI_BP_L:
0 = Bypass Mode, 1 = PLL Mode
PCIE_HBW_L:
0 = High 1 = Low
14MHZ_XTAL_X1
14MHZ_XTAL_X2
SB_VCC_SMB10CLK 15,16,24,25,44,45
SB_VCC_SMB10DATA 15,16,24,25,44,45
C1139
C1134
BOT/.047u_16V_X7R
BOT/.047u_16V_X7R
C1135
C1141
BOT/.1u_16V
BOT/.047u_16V_X7R
L37 80_3A-0805
C504
.1u_16V
C1130
EMI
NOPOP
5
+3.3V
C434
X_.1u_16V
SYN_SPREAD_EN SYN_PD_L
FS0_REF2
FS0_REF1
FS0_REF0
R474 10K
R429 10K
R418 10K
R409 10K
A A
4
XTALI
XTALO
SCLK
SDATA
PD_L
SPREAD_EN
IREF
VDD66
VDDPCI
VDDREF
GNDP66
GNDPCI
GNDREF
VDD48
VDDSRC
VDDCPU1
VDDCPU2
VDDCPU3
GND48
GNDSRC
GNDCPU1
GNDCPU2
GNDCPU3
VDDA
GNDA
ICS932S801AG
PCIEXCLKC0
PCIEXCLKT1
PCIEXCLKC1
PCIEXCLKT2
PCIEXCLKC2
PCIEXCLKT3
PCIEXCLKC3
PCIEXCLKT4
PCIEXCLKC4
PCIEXCLKT5
PCIEXCLKC5
PCIEXCLKT6
PCIEXCLKC6
R471 4.7K
R494 4.7K
R490 4.7K
U46
TSSOP48
1
2
SB_VCC_SMB10CLK
SB_VCC_SMB10DATA
SYN_PD_L
SYN_SPREAD_EN
R472 475_1%
SYN_VDD_PLL
C1147
C430
C1127
.047u_16V_X7R
C427
.047u_16V_X7R
4
BOT/.047u_16V_X7R
SYN_AVDD
SB_VCC_SMB10CLK
SB_VCC_SMB10DATA
BOT/.047u_16V_X7R
BOT/.047u_16V_X7R
R481 2.2
+3.3_CLK
C1154
BOT/.1u_16V
C1219
BOT/.1u_16V
C1223
BOT/.1u_16V
C1227
BOT/.1u_16V
SB_VCC_SMB10CLK
SB_VCC_SMB10DATA
C501
10u_6.3V_0805
+3.3V +3.3V
7
8
21
29
SYN_IREF
24
SYN_VCC3
9
15
48
14
20
44
3
27
33
37
41
6
28
32
36
40
22
23
U49
7 5
VDDPCIEX PCIEXCLKT0
8
GND
16
VDDPCIEX
15
GND
22
VDDPCIEX
21
GND
28
VDDA
27
GNDA
3
SCLK
2
SDATA
ICS9FG110
REFIN
PD#
IREF
VDD
HCLK0_P
HCLK0_L
HCLK1_P
HCLK1_L
HCLK2_P
HCLK2_L
HCLK3_P
HCLK3_L
SRCCLK_P
SCRCLK_L
PCICLK0_F0
PCICLK1
PCICLK2
PCICLK3
P66CLK0
P66CLK1
P66CLK2
P66CLK3
FS0_REF0
FS1_REF1
FS2
48MHz_0
48MHz_1
6
9
10
11
12
13
14
18
17
20
19
24
23
1
R497 4.7K
4
26
25
Address:OxDC
3
HCLKP0
43
HCLKN0
42
HCLKP1
39
HCLKN1
38
HCLKP2
35
HCLKN2
34
HCLKP3
31
HCLKN3
30
SRCCLKRP
26
SRCCLKRN
25
PCICLK0
16
REF_33CLK_R REF_33CLK
17
18
19
P66CLK0
10
11
12
13
FS0_REF0
47
FS0_REF1
46
FS0_REF2
45
48MHz_CLK0
4
48MHz_CLK1
5
R433 15_1%
R443 15_1%
R452 15_1%
R459 15_1%
R462 15_1%
R464 15_1%
R468 15_1%
R473 15_1%
R477 33
R484 33
R461 33
R465 33
R449 91
R403 33
R417 33
R436 47
Address:OxD2
R507 33
R512 33
R523 33
R529 33
R525 33
R533 33
R509 33
R515 33
REF_33CLK
R501 475_1%
+3.3_CLK
C1224
BOT/.1u_16V
PCI_VGA_CLK 46
PCI_IRQ_CLK1 41
3
+3.3V
NOPOP
NOPOP
R510 49.9_1%
R516 49.9_1%
C95 X_10P/16V/NPO
C94 X_10P/16V/NPO
R456 62
R526 49.9_1%
R534 49.9_1%
PCICLK_BUF 40
SB_CLK_P 40
SB_CLK_L 40
GC_CLK_P 30
GC_CLK_L 30
P0_CPUCLKIN 12
P0_CPUCLKINJ 12
P1_CPUCLKIN 21
P1_CPUCLKINJ 21
R485 49.9_1%
R478 49.9_1%
220
R430
PCIE1_CLK100P
PCIE1_CLK100N
PCIE3_CLK100P
PCIE3_CLK100N
R511 49.9_1%
R528 49.9_1%
R506 49.9_1%
R522 49.9_1%
PCICLK_BUF
PCI_VGA_CLK
PCI_IRQ_CLK1
2
SRCCLK_P
SRCCLK_N
C412 X_10P/16V/NPO
NOPOP
C404 X_10P/16V/NPO
GC_REFCLK_IN
NOPOP
C361 X_10P/16V/NPO
NOPOP
C371
10P/50V/NPO
PCIE3_L0_CLKP
PCIE3_L0_CLKN
PCIE2_L0_CLKP
PCIE2_L0_CLKN
1
2
3
4
2
SB_REFCLK_IN
SB_14MHz_CLK
C381
10P/50V/NPO
PCIE1_CLK100P 45
PCIE1_CLK100N 45
PCIE2_CLK100P 45
PCIE2_CLK100N 45
PCIE3_L0_CLKP 30
PCIE3_L0_CLKN 30
PCIE2_L0_CLKP 30
PCIE2_L0_CLKN 30
U16
REF
CLKOUT
CLK2
CLK4
CLK1
CLK3
GND
ICW-W163
1
SB_REFCLK_IN 42
GC_REFCLK_IN 31
SB_14MHz_CLK 42
SIO_CLK_48MHz 49
USB_CLK48MHz 41
03/03/2005
Add C1931,C1932,C1933,C1934
C1935,C1936,C1937,C1938,C1939
for EMI requirement
+3.3V
8
PCI_IRQ_CLK2
7
6
VDD
5
C144
.1u_16V
C142
X_.1u_16V
C141 X_10P/16V/NPO
C140 X_10P/16V/NPO
2005/3/8 BOM Update
Micro-Star Int'l Co., Ltd.
No.69, Li-De St, Jung-He City, Tai p e i H s i e n , T a i w a n . h t t p :/ /www.msi.c om.tw
Title
Size Document Number Rev
Date: Sheet
Clock Synthesizer
MS-9166
1
PCI_IRQ_CLK2 41
BMC_LPC_CLK 57
NOPOP
NOPOP
10 69 Friday, May 20, 2005
0C A3
of
5
HT0 is for SH0 & Golem connection
+1.2V_HT
AB10
VLDT_2(1)
AC11
VLDT_2(2)
AD10
VLDT_2(3)
AD8
VLDT_2(4)
AB14
VLDT_2(5)
AC15
VLDT_2(6)
AB16
VLDT_2(7)
TP45
TP46
AC16
AG11
AG12
AH10
AG10
AK11
AL10
AL11
AL12
AJ12
AH12
AC9
AJ10
AG9
AJ8
AH8
AJ6
AH6
AG5
AG6
AJ4
AH4
AG3
AG4
AJ11
AL9
AJ9
AK9
AL7
AL8
AL5
AL6
AJ5
AK5
AL3
AL4
AJ3
AK3
AG7
AG8
AJ7
AK7
VLDT_2(8)
VLDT_2(9)
L2_CADIN_H(15)
L2_CADIN_L(15)
L2_CADIN_H(14)
L2_CADIN_L(14)
L2_CADIN_H(13)
L2_CADIN_L(13)
L2_CADIN_H(12)
L2_CADIN_L(12)
L2_CADIN_H(11)
L2_CADIN_L(11)
L2_CADIN_H(10)
L2_CADIN_L(10)
L2_CADIN_H(9)
L2_CADIN_L(9)
L2_CADIN_H(8)
L2_CADIN_L(8)
L2_CADIN_H(7)
L2_CADIN_L(7)
L2_CADIN_H(6)
L2_CADIN_L(6)
L2_CADIN_H(5)
L2_CADIN_L(5)
L2_CADIN_H(4)
L2_CADIN_L(4)
L2_CADIN_H(3)
L2_CADIN_L(3)
L2_CADIN_H(2)
L2_CADIN_L(2)
L2_CADIN_H(1)
L2_CADIN_L(1)
L2_CADIN_H(0)
L2_CADIN_L(0)
L2_CLKIN_H(1)
L2_CLKIN_L(1)
L2_CLKIN_H(0)
L2_CLKIN_L(0)
L2_CTLIN_H(0)
L2_CTLIN_L(0)
L2_RSVD1
L2_RSVD2
D D
P1_TO_P0_CADOUT_H[15..0] 20
P1_TO_P0_CADOUT_L[15..0] 20
FROM CPU1
P1_TO_P0_CLKOUT_H1 20
C C
B B
A A
P1_TO_P0_CLKOUT_L1 20
P1_TO_P0_CLKOUT_H0 20
P1_TO_P0_CLKOUT_L0 20
P1_TO_P0_CTLOUT_H0 20
P1_TO_P0_CTLOUT_L0 20
5
P1_TO_P0_CADOUT_H15
P1_TO_P0_CADOUT_L15
P1_TO_P0_CADOUT_H14
P1_TO_P0_CADOUT_L14
P1_TO_P0_CADOUT_H13
P1_TO_P0_CADOUT_L13
P1_TO_P0_CADOUT_H12
P1_TO_P0_CADOUT_L12
P1_TO_P0_CADOUT_H11
P1_TO_P0_CADOUT_L11
P1_TO_P0_CADOUT_H10
P1_TO_P0_CADOUT_L10
P1_TO_P0_CADOUT_H9
P1_TO_P0_CADOUT_L9
P1_TO_P0_CADOUT_H8
P1_TO_P0_CADOUT_L8
P1_TO_P0_CADOUT_H7
P1_TO_P0_CADOUT_L7
P1_TO_P0_CADOUT_H6
P1_TO_P0_CADOUT_L6
P1_TO_P0_CADOUT_H5
P1_TO_P0_CADOUT_L5
P1_TO_P0_CADOUT_H4
P1_TO_P0_CADOUT_L4
P1_TO_P0_CADOUT_H3
P1_TO_P0_CADOUT_L3
P1_TO_P0_CADOUT_H2
P1_TO_P0_CADOUT_L2
P1_TO_P0_CADOUT_H1
P1_TO_P0_CADOUT_L1
P1_TO_P0_CADOUT_H0
P1_TO_P0_CADOUT_L0
CPU1F
SledgeHammer
R658, R659 change to 22ohm reduce ripple
voltage. 03/07.
L2_CADOUT_H(15)
L2_CADOUT_L(15)
L2_CADOUT_H(14)
L2_CADOUT_L(14)
L2_CADOUT_H(13)
L2_CADOUT_L(13)
L2_CADOUT_H(12)
L2_CADOUT_L(12)
L2_CADOUT_H(11)
L2_CADOUT_L(11)
L2_CADOUT_H(10)
L2_CADOUT_L(10)
L2_CADOUT_H(9)
L2_CADOUT_L(9)
L2_CADOUT_H(8)
L2_CADOUT_L(8)
L2_CADOUT_H(7)
L2_CADOUT_L(7)
L2_CADOUT_H(6)
L2_CADOUT_L(6)
L2_CADOUT_H(5)
L2_CADOUT_L(5)
L2_CADOUT_H(4)
L2_CADOUT_L(4)
L2_CADOUT_H(3)
L2_CADOUT_L(3)
L2_CADOUT_H(2)
L2_CADOUT_L(2)
L2_CADOUT_H(1)
L2_CADOUT_L(1)
L2_CADOUT_H(0)
L2_CADOUT_L(0)
L2_CLKOUT_H(1)
L2_CLKOUT_L(1)
L2_CLKOUT_H(0)
L2_CLKOUT_L(0)
L2_CTLOUT_H(0)
L2_CTLOUT_L(0)
L2_RSVD3
L2_RSVD4
4
AH14
AJ14
AG16
AG15
AH16
AJ16
AG18
AG17
AG20
AG19
AH20
AJ20
AG22
AG21
AH22
AJ22
AL14
AL13
AK15
AJ15
AL16
AL15
AK17
AJ17
AK19
AJ19
AL20
AL19
AK21
AJ21
AL22
AL21
AH18
AJ18
AL18
AL17
AK13
AJ13
AG13
AG14
4
P0_TO_P1_CADOUT_H15
P0_TO_P1_CADOUT_L15
P0_TO_P1_CADOUT_H14
P0_TO_P1_CADOUT_L14
P0_TO_P1_CADOUT_H13
P0_TO_P1_CADOUT_L13
P0_TO_P1_CADOUT_H12
P0_TO_P1_CADOUT_L12
P0_TO_P1_CADOUT_H11
P0_TO_P1_CADOUT_L11
P0_TO_P1_CADOUT_H10
P0_TO_P1_CADOUT_L10
P0_TO_P1_CADOUT_H9
P0_TO_P1_CADOUT_L9
P0_TO_P1_CADOUT_H8
P0_TO_P1_CADOUT_L8
P0_TO_P1_CADOUT_H7
P0_TO_P1_CADOUT_L7
P0_TO_P1_CADOUT_H6
P0_TO_P1_CADOUT_L6
P0_TO_P1_CADOUT_H5
P0_TO_P1_CADOUT_L5
P0_TO_P1_CADOUT_H4
P0_TO_P1_CADOUT_L4
P0_TO_P1_CADOUT_H3
P0_TO_P1_CADOUT_L3
P0_TO_P1_CADOUT_H2
P0_TO_P1_CADOUT_L2
P0_TO_P1_CADOUT_H1
P0_TO_P1_CADOUT_L1
P0_TO_P1_CADOUT_H0
P0_TO_P1_CADOUT_L0
TP41
TP40
P0_VDIMM_2.5V
3/7 update
H0_MEMRESET1_L
R749
22_1%
R745
22_1%
R1049 0
C720
.1u_16V
C715
.1u_16V
P0_VDIMM_2.5V
P0_TO_P1_CADOUT_H[15..0] 20
P0_TO_P1_CADOUT_L[15..0] 20
TO CPU1
P0_TO_P1_CLKOUT_H1 20
P0_TO_P1_CLKOUT_L1 20
P0_TO_P1_CLKOUT_H0 20
P0_TO_P1_CLKOUT_L0 20
P0_TO_P1_CTLOUT_H0 20
P0_TO_P1_CTLOUT_L0 20
C1306
BOT/.1u_16V
C1312
C711
102p_50V
BOT/.1u_16V
H0_MEMRESET_L 15,16
TO DIMM
3
P0_VTT_SENSE 5
R1013 BOT/42.2_1
R1012 BOT/42.2_1
P0_DDR_VREF0
VREF should be connected to both
VREF pins on the processor. 02/26.
H0_MD[127..64] 17
P0_DDR_VREF0
H0_MDQS[35..0] 17
3
P0_VTT_1.25V
P0_VTT_1.25V
R624
51_1%
H0_MD127
H0_MD126
H0_MD125
H0_MD124
H0_MD123
H0_MD122
H0_MD121
H0_MD120
H0_MD119
H0_MD118
H0_MD117
H0_MD116
H0_MD115
H0_MD114
H0_MD113
H0_MD112
H0_MD111
H0_MD110
H0_MD109
H0_MD108
H0_MD107
H0_MD106
H0_MD105
H0_MD104
H0_MD103
H0_MD102
H0_MD101
H0_MD100
H0_MD99
H0_MD98
H0_MD97
H0_MD96
H0_MD95
H0_MD94
H0_MD93
H0_MD92
H0_MD91
H0_MD90
H0_MD89
H0_MD88
H0_MD87
H0_MD86
H0_MD85
H0_MD84
H0_MD83
H0_MD82
H0_MD81
H0_MD80
H0_MD79
H0_MD78
H0_MD77
H0_MD76
H0_MD75
H0_MD74
H0_MD73
H0_MD72
H0_MD71
H0_MD70
H0_MD69
H0_MD68
H0_MD67
H0_MD66
H0_MD65
H0_MD64
H0_MDQS35
H0_MDQS34
H0_MDQS33
H0_MDQS32
H0_MDQS31
H0_MDQS30
H0_MDQS29
H0_MDQS28
H0_MDQS27
H0_MDQS26
H0_MDQS25
H0_MDQS24
H0_MDQS23
H0_MDQS22
H0_MDQS21
H0_MDQS20
H0_MDQS19
H0_MDQS18
H0_MDQS17
H0_MDQS16
H0_MDQS15
H0_MDQS14
H0_MDQS13
H0_MDQS12
H0_MDQS11
H0_MDQS10
H0_MDQS9
H0_MDQS8
H0_MDQS7
H0_MDQS6
H0_MDQS5
H0_MDQS4
H0_MDQS3
H0_MDQS2
H0_MDQS1
H0_MDQS0
AC19
AE19
AE18
AC18
AF18
AF19
AF17
AE16
AF22
AG24
AH25
AG26
AH27
AF23
AH24
AF25
AG27
AF26
AF28
AE29
AH29
AE27
AD26
AD27
AC26
AA26
AA28
AD28
AC27
AB29
AA27
AG25
AF27
AB27
AF24
AG28
AC28
AD29
AA31
AE31
J19
H19
F20
G19
F21
F22
AJ26
AJ29
Y27
Y28
V28
U26
Y26
W27
V27
U27
P28
N29
M26
L28
P27
P26
M27
L27
K29
K27
H28
G29
L26
J28
H27
H26
F27
F26
D29
D27
G27
F28
E27
C27
C26
E25
D24
F23
E26
F25
E24
G23
R27
W29
N27
J27
E29
F24
R28
V26
M28
J26
E28
D25
U31
AJ25
AJ30
M30
H30
C30
B25
T31
AL25
AL29
Y29
M29
H29
C29
C25
VTT1
VTT2
VTT3
VTT4
VTT5
VTT6
VTT7
VTT8
VTT9
VTT10
VTT_SENSE
MEMZN
MEMZP
MEMVREF0
MEMVREF1
MEMDATA(127)
MEMDATA(126)
MEMDATA(125)
MEMDATA(124)
MEMDATA(123)
MEMDATA(122)
MEMDATA(121)
MEMDATA(120)
MEMDATA(119)
MEMDATA(118)
MEMDATA(117)
MEMDATA(116)
MEMDATA(115)
MEMDATA(114)
MEMDATA(113)
MEMDATA(112)
MEMDATA(111)
MEMDATA(110)
MEMDATA(109)
MEMDATA(108)
MEMDATA(107)
MEMDATA(106)
MEMDATA(105)
MEMDATA(104)
MEMDATA(103)
MEMDATA(102)
MEMDATA(101)
MEMDATA(100)
MEMDATA(99)
MEMDATA(98)
MEMDATA(97)
MEMDATA(96)
MEMDATA(95)
MEMDATA(94)
MEMDATA(93)
MEMDATA(92)
MEMDATA(91)
MEMDATA(90)
MEMDATA(89)
MEMDATA(88)
MEMDATA(87)
MEMDATA(86)
MEMDATA(85)
MEMDATA(84)
MEMDATA(83)
MEMDATA(82)
MEMDATA(81)
MEMDATA(80)
MEMDATA(79)
MEMDATA(78)
MEMDATA(77)
MEMDATA(76)
MEMDATA(75)
MEMDATA(74)
MEMDATA(73)
MEMDATA(72)
MEMDATA(71)
MEMDATA(70)
MEMDATA(69)
MEMDATA(68)
MEMDATA(67)
MEMDATA(66)
MEMDATA(65)
MEMDATA(64)
MEMDQS(35)
MEMDQS(34)
MEMDQS(33)
MEMDQS(32)
MEMDQS(31)
MEMDQS(30)
MEMDQS(29)
MEMDQS(28)
MEMDQS(27)
MEMDQS(26)
MEMDQS(25)
MEMDQS(24)
MEMDQS(23)
MEMDQS(22)
MEMDQS(21)
MEMDQS(20)
MEMDQS(19)
MEMDQS(18)
MEMDQS(17)
MEMDQS(16)
MEMDQS(15)
MEMDQS(14)
MEMDQS(13)
MEMDQS(12)
MEMDQS(11)
MEMDQS(10)
MEMDQS(9)
MEMDQS(8)
MEMDQS(7)
MEMDQS(6)
MEMDQS(5)
MEMDQS(4)
MEMDQS(3)
MEMDQS(2)
MEMDQS(1)
MEMDQS(0)
CPU1B
MEMCLK_UP_H(3)
MEMCLK_UP_L(3)
MEMCLK_UP_H(2)
MEMCLK_UP_L(2)
MEMCLK_UP_H(1)
MEMCLK_UP_L(1)
MEMCLK_UP_H(0)
MEMCLK_UP_L(0)
MEMCLK_LO_H(3)
MEMCLK_LO_L(3)
MEMCLK_LO_H(2)
MEMCLK_LO_L(2)
MEMCLK_LO_H(1)
MEMCLK_LO_L(1)
MEMCLK_LO_H(0)
MEMCLK_LO_L(0)
MEMCHECK(15)
MEMCHECK(14)
MEMCHECK(13)
MEMCHECK(12)
MEMCHECK(11)
MEMCHECK(10)
SledgeHammer
2
MEMCKE_UP
MEMCKE_LO
RSVD_MA(15)
RSVD_MA(14)
MEMADD(13)
MEMADD(12)
MEMADD(11)
MEMADD(10)
MEMADD(9)
MEMADD(8)
MEMADD(7)
MEMADD(6)
MEMADD(5)
MEMADD(4)
MEMADD(3)
MEMADD(2)
MEMADD(1)
MEMADD(0)
MEMDATA(63)
MEMDATA(62)
MEMDATA(61)
MEMDATA(60)
MEMDATA(59)
MEMDATA(58)
MEMDATA(57)
MEMDATA(56)
MEMDATA(55)
MEMDATA(54)
MEMDATA(53)
MEMDATA(52)
MEMDATA(51)
MEMDATA(50)
MEMDATA(49)
MEMDATA(48)
MEMDATA(47)
MEMDATA(46)
MEMDATA(45)
MEMDATA(44)
MEMDATA(43)
MEMDATA(42)
MEMDATA(41)
MEMDATA(40)
MEMDATA(39)
MEMDATA(38)
MEMDATA(37)
MEMDATA(36)
MEMDATA(35)
MEMDATA(34)
MEMDATA(33)
MEMDATA(32)
MEMDATA(31)
MEMDATA(30)
MEMDATA(29)
MEMDATA(28)
MEMDATA(27)
MEMDATA(26)
MEMDATA(25)
MEMDATA(24)
MEMDATA(23)
MEMDATA(22)
MEMDATA(21)
MEMDATA(20)
MEMDATA(19)
MEMDATA(18)
MEMDATA(17)
MEMDATA(16)
MEMDATA(15)
MEMDATA(14)
MEMDATA(13)
MEMDATA(12)
MEMDATA(11)
MEMDATA(10)
MEMDATA(9)
MEMDATA(8)
MEMDATA(7)
MEMDATA(6)
MEMDATA(5)
MEMDATA(4)
MEMDATA(3)
MEMDATA(2)
MEMDATA(1)
MEMDATA(0)
MEMRESET_L
MEMBANK(1)
MEMBANK(0)
MEMRAS_L
MEMCAS_L
MEMWE_L
MEMCHECK(9)
MEMCHECK(8)
MEMCHECK(7)
MEMCHECK(6)
MEMCHECK(5)
MEMCHECK(4)
MEMCHECK(3)
MEMCHECK(2)
MEMCHECK(1)
MEMCHECK(0)
MEMCS_L(7)
MEMCS_L(6)
MEMCS_L(5)
MEMCS_L(4)
MEMCS_L(3)
MEMCS_L(2)
MEMCS_L(1)
MEMCS_L(0)
2
G20
G21
AE21
AE20
H0_MEMCLK_H3
L24
H0_MEMCLK_L3
L25
H0_MEMCLK_H2
R23
H0_MEMCLK_L2
T23
H23
J23
AD21
AD20
H0_MEMCLK_H1
Y23
H0_MEMCLK_L1
AA23
H0_MEMCLK_H0
U25
H0_MEMCLK_L0
U24
H0_MCKEUP
H24
H0_MCKELO
H25
V23
M23
H0_MAA13
AE23
H0_MAA12
J24
H0_MAA11
J25
H0_MAA10
V24
H0_MAA9
K23
H0_MAA8
L23
H0_MAA7
K25
H0_MAA6
M25
H0_MAA5
M24
H0_MAA4
N25
H0_MAA3
N23
H0_MAA2
P23
H0_MAA1
T25
H0_MAA0
V25
H0_MD63
AJ24
H0_MD62
AK25
H0_MD61
AK27
H0_MD60
AJ27
H0_MD59
AL24
H0_MD58
AK24
H0_MD57
AL26
H0_MD56
AL27
H0_MD55
AJ28
H0_MD54
AK30
H0_MD53
AJ31
H0_MD52
AG29
H0_MD51
AL28
H0_MD50
AK28
H0_MD49
AH31
H0_MD48
AG30
H0_MD47
AG31
H0_MD46
AF30
H0_MD45
AD31
H0_MD44
AC30
H0_MD43
AF29
H0_MD42
AF31
H0_MD41
AD30
H0_MD40
AC29
H0_MD39
AB31
H0_MD38
AA29
H0_MD37
Y31
H0_MD36
W31
H0_MD35
AC31
H0_MD34
AA30
H0_MD33
Y30
H0_MD32
V29
H0_MD31
P31
H0_MD30
M31
H0_MD29
L30
H0_MD28
L29
H0_MD27
P29
H0_MD26
N31
H0_MD25
L31
H0_MD24
K31
H0_MD23
J30
H0_MD22
J29
H0_MD21
G31
H0_MD20
F29
H0_MD19
J31
H0_MD18
H31
H0_MD17
F31
H0_MD16
F30
H0_MD15
D31
H0_MD14
C31
H0_MD13
B30
H0_MD12
C28
H0_MD11
E31
H0_MD10
E30
H0_MD9
A29
H0_MD8
B28
H0_MD7
B27
H0_MD6
A26
H0_MD5
C24
H0_MD4
A24
H0_MD3
A28
H0_MD2
A27
H0_MD1
A25
H0_MD0
B24
H0_MEMRESET1_L
G25
W25
W23
H0_-MSRASA
Y25
H0_-MSCASA
AA25
Y24
H0_MEMCHECK15
U28
H0_MEMCHECK14
T29
H0_MEMCHECK13
P24
H0_MEMCHECK12
P25
H0_MEMCHECK11
T27
H0_MEMCHECK10
R26
H0_MEMCHECK9
R25
H0_MEMCHECK8
R24
H0_MEMCHECK7
V30
H0_MEMCHECK6
U29
H0_MEMCHECK5
R30
H0_MEMCHECK4
P30
H0_MEMCHECK3
V31
H0_MEMCHECK2
U30
H0_MEMCHECK1
R29
H0_MEMCHECK0
R31
AD23
AE25
AD24
AD25
H0_-MCS3
AC24
H0_-MCS2
AC25
H0_-MCS1
AB25
H0_-MCS0
AA24
1
H0_MEMCLK_H3
R1010
H0_MEMCLK_H3 16
H0_MEMCLK_L3 16
H0_MEMCLK_H2 15
H0_MEMCLK_L2 15
H0_MEMCLK_H1 16
H0_MEMCLK_L1 16
H0_MEMCLK_H0 15
H0_MEMCLK_L0 15
H0_MCKEUP 17
H0_MCKELO 17
H0_MAA[13..0] 17
H0_MD[63..0] 17
H0_MEMBAKA1 17
H0_MEMBAKA0 17
H0_-MSRASA 17
H0_-MSCASA 17
H0_-MSWEA 17
H0_MEMCHECK15 17
H0_MEMCHECK14 17
H0_MEMCHECK13 17
H0_MEMCHECK12 17
H0_MEMCHECK11 17
H0_MEMCHECK10 17
H0_MEMCHECK9 17
H0_MEMCHECK8 17
H0_MEMCHECK7 17
H0_MEMCHECK6 17
H0_MEMCHECK5 17
H0_MEMCHECK4 17
H0_MEMCHECK3 17
H0_MEMCHECK2 17
H0_MEMCHECK1 17
H0_MEMCHECK0 17
H0_-MCS3 17
H0_-MCS2 17
H0_-MCS1 17
H0_-MCS0 17
BOT/120_1%/
H0_MEMCLK_L3
H0_MEMCLK_H2
R1008
BOT/120_1%/
H0_MEMCLK_L2
H0_MEMCLK_H1
R1009
BOT/120_1%/
H0_MEMCLK_L1
H0_MEMCLK_H0
R1011
BOT/120_1%/
H0_MEMCLK_L0
Micro-Star Int'l Co., Ltd.
No.69, Li-De St, Jung-He City, Taipei Hsien, Taiwan. http://www.msi.com.tw
Title
Size Document Number Rev
Date: Sheet
CPU0 DDR & HT
MS-9166
1
0C C
of
11 69 Friday, May 20, 2005
5
4
3
2
1
R667 should be pulled to VDDIO_RUN through
TP59
P0_R_CLKIN
P0_R_CLKINJ
P0_NC_G14
P0_NC_H14
P0_NC_T3
P0_NC_T4
TP54
TP52
TP39
TP66
TP65
TP53
TP64
TP61
TP57
TP58
a 680ohm 02/26.
C1
VDDA1
D2
VDDA2
C2
VDDA3
E1
L0_REF1
D1
L0_REF0
L7
COREFB_H
L6
COREFB_L
K7
CORESENSE_H
G16
CLKIN_H
H16
CLKIN_L
G14
NC_G14
H14
NC_H14
AE6
TMS
AE7
TCK
AD7
TRST_L
AF7
TDI
J7
DBREQ_L
AE10
NC_AE10
AE11
NC_AE11
AF11
NC_AF11
AE13
NC_AE13
AE12
NC_AE12
T3
NC_T3
T4
NC_T4
AF13
NC_AF13
L8
NC_L8
K8
NC_K8
AF15
NC_AF15
AE14
NC_AE14
G12
RESET_L
J6
LDTSTOP_L
F12
PWROK
AG1
NC
AH2
NC
H9
NC
AJ2
NC
AA6
NC
AC6
NC
N6
NC
RSVD_SMBUSC
RSVD_SMBUSD
SledgeHammer
CPU1C
THERMTRIP_L
THERMDA
THERMDC
VID(4)
VID(3)
VID(2)
VID(1)
VID(0)
NC_H13/BP(3)
NC_G6/BP(2)
NC_F7/BP(1)
NC_H12/BP(0)
FBCLKOUT_H
FBCLKOUT_L
DBRDY
NC_V5
NC_U5
NC_H7
NC_T7
NC_W6
NC_R6
NC_U6
TDO
AE15
AJ1
AH1
G9
F9
G10
H11
G11
H13
G6
F7
H12
G18
H18
AE8
G8
V5
U5
H7
T7
W6
R6
U6
AF9
AE9
P0_T7
P0_W6
P0_R6
P0_U6
VERY CLOSE TO CPU
OPTERON_RSTJ 55
CPU_LDTSTOPJ 55
P0_R_CLKIN
R1014
BOT/169_1%
P0_R_CLKINJ
P0_DBREQJ 29
CPU_PWROK 55
R904
X_84.5_1%
NOPOP
D D
C C
B B
A A
+1.2V_HT +2.5VPLL
P0_COREFB 3
P0_COREFBJ 3
P0_CPUCLKIN 10
P0_CPUCLKINJ 10
R905
X_120_1%
NOPOP
R906
X_120_1%
NOPOP
P0_VDIMM_2.5V
R907
84.5_1%
P0_VDIMM_2.5V
P0_SCANCLK1 29
P0_SCANCLK2 29
P0_SCANEN 29
P0_SSENA 29
P0_SSENB 29
R903
84.5_1%
L45 180nH_.45A-1210
P0_VDDA_2.5V
R880 42.2_1%
R879 42.2_1%
R909 0
R908 0
BOT/3900p_50V
C1412
C1411
BOT/3900p_50V
P0_TMS 29
P0_TCK 29
P0_TRSTJ 29
P0_TDI 29
P0_NC_AE14
P0_VDIMM_2.5V
R763
680
P0_P1_THERMTRIPJ 55,57
P0_THERMDA 56
P0_THERMDC 56
P0_VID4
P0_VID3
P0_VID2
P0_VID1
P0_VID0
P0_BP3 29
P0_BP2 29
P0_BP1 29
P0_BP0 29
R752
80.6_1%
P0_TDO 29
P0_DBRDY 29
P0_R6
P0_U6
P0_T7
P0_W6
RN217 nopop. (Opteron Ananlog pins does
not need pull down (pin U6, R6, W6, T7)
02/26.
RN161
X_510-8P4R
NOPOP
TP44
TP62
TP63
TP56
TP49
TP50
TP60
R792 560
R787 560
R786 560
R772 560
R776 560
P0_VDDA_2.5V
R934
549_1%
C906
4.7u_6.3V-0805
Will try 560ohm to instead of 0ohm
P0_VID4
P0_VID3
P0_VID2
P0_VID1
P0_VID0
C882
102p_50V
C1416
BOT/3900p_50V
P0_VID[4..0] 3,51
C1415
BOT/.22u_16V
VID[4:0] should have 560ohm series resistors placed on the signals. 02/26.
NC_H13, NC_G6 should have only one test point (no pullup or pulldown). 02/26.
R671 should be populated. 02/26.
STRAPPINGS
3/7 update
P0_NC_G14
P0_NC_AE14
P0_NC_AF13
P0_NC_H14
P0_SCANEN
P0_SCANCLK1
1 2
3 4
5 6
7 8
P0_SCANCLK2 P0_NC_AF13
P0_SSENA
P0_SSENB
P0_BP1
P0_BP0
P0_NC_T4
P0_NC_T3
R762 820_1%
R764
R765
R767 820_1%
R788 680
R793 680
R789 680
R777 680
R778 680
R881 680
R882 680
03/12 update
R886
49.9_1%
P0_VDIMM_2.5V
680
680
+1.2V_HT
R901 49.9_1%
R887 X_49.9_1%
R902
X_49.9
NOPOP
NOPOP
CT34
100u_6.3V/MLCC
Micro-Star Int'l Co., Ltd.
No.69, Li-De St, Jung-He City, Taipei Hsien, Taiwan. http://www.msi.com.tw
Title
Size Document Number Rev
5
4
3
2
Date: Sheet
CPU0 HDT & MISC
MS-9166
1
0C B
of
12 69 Friday, May 20, 2005
5
4
3
2
1
+1.2V_HT
K10
VLDT_1(1)
J11
VLDT_1(2)
H10
D D
L0_TO_P0_CADOUT_H[15..0] 30
L0_TO_P0_CADOUT_L[15..0] 30
C C
L0_TO_P0_CLKOUT_H1 30
L0_TO_P0_CLKOUT_L1 30
L0_TO_P0_CLKOUT_H0 30
L0_TO_P0_CLKOUT_L0 30
L0_TO_P0_CTLOUT_H 30
B B
L0_TO_P0_CTLOUT_L 30
L0_TO_P0_CADOUT_H15
L0_TO_P0_CADOUT_L15
L0_TO_P0_CADOUT_H14
L0_TO_P0_CADOUT_L14
L0_TO_P0_CADOUT_H13
L0_TO_P0_CADOUT_L13
L0_TO_P0_CADOUT_H12
L0_TO_P0_CADOUT_L12
L0_TO_P0_CADOUT_H11
L0_TO_P0_CADOUT_L11
L0_TO_P0_CADOUT_H10
L0_TO_P0_CADOUT_L10
L0_TO_P0_CADOUT_H9
L0_TO_P0_CADOUT_L9
L0_TO_P0_CADOUT_H8
L0_TO_P0_CADOUT_L8
L0_TO_P0_CADOUT_H7
L0_TO_P0_CADOUT_L7
L0_TO_P0_CADOUT_H6
L0_TO_P0_CADOUT_L6
L0_TO_P0_CADOUT_H5
L0_TO_P0_CADOUT_L5
L0_TO_P0_CADOUT_H4
L0_TO_P0_CADOUT_L4
L0_TO_P0_CADOUT_H3
L0_TO_P0_CADOUT_L3
L0_TO_P0_CADOUT_H2
L0_TO_P0_CADOUT_L2
L0_TO_P0_CADOUT_H1
L0_TO_P0_CADOUT_L1
L0_TO_P0_CADOUT_H0
L0_TO_P0_CADOUT_L0
TP43
TP42
K14
K16
E14
E13
C15
D15
E16
E15
C17
D17
C19
D19
E20
E19
C21
D21
E22
E21
C14
B14
A16
A15
C16
B16
A18
A17
A20
A19
C20
B20
A22
A21
C22
B22
E18
E17
C18
B18
A14
A13
C13
D13
H8
J15
J16
J9
VLDT_1(3)
VLDT_1(4)
VLDT_1(5)
VLDT_1(6)
VLDT_1(7)
VLDT_1(8)
VLDT_1(9)
L1_CADIN_H(15)
L1_CADIN_L(15)
L1_CADIN_H(14)
L1_CADIN_L(14)
L1_CADIN_H(13)
L1_CADIN_L(13)
L1_CADIN_H(12)
L1_CADIN_L(12)
L1_CADIN_H(11)
L1_CADIN_L(11)
L1_CADIN_H(10)
L1_CADIN_L(10)
L1_CADIN_H(9)
L1_CADIN_L(9)
L1_CADIN_H(8)
L1_CADIN_L(8)
L1_CADIN_H(7)
L1_CADIN_L(7)
L1_CADIN_H(6)
L1_CADIN_L(6)
L1_CADIN_H(5)
L1_CADIN_L(5)
L1_CADIN_H(4)
L1_CADIN_L(4)
L1_CADIN_H(3)
L1_CADIN_L(3)
L1_CADIN_H(2)
L1_CADIN_L(2)
L1_CADIN_H(1)
L1_CADIN_L(1)
L1_CADIN_H(0)
L1_CADIN_L(0)
L1_CLKIN_H(1)
L1_CLKIN_L(1)
L1_CLKIN_H(0)
L1_CLKIN_L(0)
L1_CTLIN_H(0)
L1_CTLIN_L(0)
L1_RSVD1
L1_RSVD2
SledgeHammer
CPU1E
L1_CADOUT_H(15)
L1_CADOUT_L(15)
L1_CADOUT_H(14)
L1_CADOUT_L(14)
L1_CADOUT_H(13)
L1_CADOUT_L(13)
L1_CADOUT_H(12)
L1_CADOUT_L(12)
L1_CADOUT_H(11)
L1_CADOUT_L(11)
L1_CADOUT_H(10)
L1_CADOUT_L(10)
L1_CADOUT_H(9)
L1_CADOUT_L(9)
L1_CADOUT_H(8)
L1_CADOUT_L(8)
L1_CADOUT_H(7)
L1_CADOUT_L(7)
L1_CADOUT_H(6)
L1_CADOUT_L(6)
L1_CADOUT_H(5)
L1_CADOUT_L(5)
L1_CADOUT_H(4)
L1_CADOUT_L(4)
L1_CADOUT_H(3)
L1_CADOUT_L(3)
L1_CADOUT_H(2)
L1_CADOUT_L(2)
L1_CADOUT_H(1)
L1_CADOUT_L(1)
L1_CADOUT_H(0)
L1_CADOUT_L(0)
L1_CLKOUT_H(1)
L1_CLKOUT_L(1)
L1_CLKOUT_H(0)
L1_CLKOUT_L(0)
L1_CTLOUT_H(0)
L1_CTLOUT_L(0)
L1_RSVD3
L1_RSVD4
P0_TO_L0_CADOUT_H15
D11
P0_TO_L0_CADOUT_L15
C11
P0_TO_L0_CADOUT_H14
E9
P0_TO_L0_CADOUT_L14
E10
P0_TO_L0_CADOUT_H13
D9
P0_TO_L0_CADOUT_L13
C9
P0_TO_L0_CADOUT_H12
E7
P0_TO_L0_CADOUT_L12
E8
P0_TO_L0_CADOUT_H11
E5
P0_TO_L0_CADOUT_L11
E6
P0_TO_L0_CADOUT_H10
D5
P0_TO_L0_CADOUT_L10
C5
P0_TO_L0_CADOUT_H9
E3
P0_TO_L0_CADOUT_L9
E4
P0_TO_L0_CADOUT_H8
D3
P0_TO_L0_CADOUT_L8
C3
P0_TO_L0_CADOUT_H7
A11
P0_TO_L0_CADOUT_L7
A12
P0_TO_L0_CADOUT_H6
B10
P0_TO_L0_CADOUT_L6
C10
P0_TO_L0_CADOUT_H5
A9
P0_TO_L0_CADOUT_L5
A10
P0_TO_L0_CADOUT_H4
B8
P0_TO_L0_CADOUT_L4
C8
P0_TO_L0_CADOUT_H3
B6
P0_TO_L0_CADOUT_L3
C6
P0_TO_L0_CADOUT_H2
A5
P0_TO_L0_CADOUT_L2
A6
P0_TO_L0_CADOUT_H1
B4
P0_TO_L0_CADOUT_L1
C4
P0_TO_L0_CADOUT_H0
A3
P0_TO_L0_CADOUT_L0
A4
D7
C7
A7
A8
B12
C12
E11
TP47
E12
TP48
P0_TO_L0_CADOUT_H[15..0] 30
P0_TO_L0_CADOUT_L[15..0] 30
P0_TO_L0_CLKOUT_H1 30
P0_TO_L0_CLKOUT_L1 30
P0_TO_L0_CLKOUT_H0 30
P0_TO_L0_CLKOUT_L0 30
P0_TO_L0_CTLOUT_H 30
P0_TO_L0_CTLOUT_L 30
+1.2V_HT
N7
VLDT_0(1)
R7
VLDT_0(2)
U7
VLDT_0(3)
W7
VLDT_0(4)
M8
VLDT_0(5)
P8
VLDT_0(6)
AA7
VLDT_0(7)
V8
VLDT_0(8)
Y8
VLDT_0(9)
R5
L0_CADIN_H(15)
T5
L0_CADIN_L(15)
P3
L0_CADIN_H(14)
P4
L0_CADIN_L(14)
N5
L0_CADIN_H(13)
P5
L0_CADIN_L(13)
M3
L0_CADIN_H(12)
M4
L0_CADIN_L(12)
K3
L0_CADIN_H(11)
K4
L0_CADIN_L(11)
J5
L0_CADIN_H(10)
K5
L0_CADIN_L(10)
H3
L0_CADIN_H(9)
H4
L0_CADIN_L(9)
G5
TO GOLEM FROM GOLEM
H5
R3
R2
N1
P1
N3
N2
L1
M1
J1
K1
J3
J2
G1
H1
G3
G2
L5
M5
L3
L2
R1
T1
L0_CADIN_H(8)
L0_CADIN_L(8)
L0_CADIN_H(7)
L0_CADIN_L(7)
L0_CADIN_H(6)
L0_CADIN_L(6)
L0_CADIN_H(5)
L0_CADIN_L(5)
L0_CADIN_H(4)
L0_CADIN_L(4)
L0_CADIN_H(3)
L0_CADIN_L(3)
L0_CADIN_H(2)
L0_CADIN_L(2)
L0_CADIN_H(1)
L0_CADIN_L(1)
L0_CADIN_H(0)
L0_CADIN_L(0)
L0_CLKIN_H(1)
L0_CLKIN_L(1)
L0_CLKIN_H(0)
L0_CLKIN_L(0)
L0_CTLIN_H(0)
L0_CTLIN_L(0)
SledgeHammer
CPU1A
L0_CADOUT_H(15)
L0_CADOUT_L(15)
L0_CADOUT_H(14)
L0_CADOUT_L(14)
L0_CADOUT_H(13)
L0_CADOUT_L(13)
L0_CADOUT_H(12)
L0_CADOUT_L(12)
L0_CADOUT_H(11)
L0_CADOUT_L(11)
L0_CADOUT_H(10)
L0_CADOUT_L(10)
L0_CADOUT_H(9)
L0_CADOUT_L(9)
L0_CADOUT_H(8)
L0_CADOUT_L(8)
L0_CADOUT_H(7)
L0_CADOUT_L(7)
L0_CADOUT_H(6)
L0_CADOUT_L(6)
L0_CADOUT_H(5)
L0_CADOUT_L(5)
L0_CADOUT_H(4)
L0_CADOUT_L(4)
L0_CADOUT_H(3)
L0_CADOUT_L(3)
L0_CADOUT_H(2)
L0_CADOUT_L(2)
L0_CADOUT_H(1)
L0_CADOUT_L(1)
L0_CADOUT_H(0)
L0_CADOUT_L(0)
L0_CLKOUT_H(1)
L0_CLKOUT_L(1)
L0_CLKOUT_H(0)
L0_CLKOUT_L(0)
L0_CTLOUT_H(0)
L0_CTLOUT_L(0)
V4
V3
Y5
W5
Y4
Y3
AB5
AA5
AD5
AC5
AD4
AD3
AF5
AE5
AF4
AF3
V1
U1
W2
W3
Y1
W1
AA2
AA3
AC2
AC3
AD1
AC1
AE2
AE3
AF1
AE1
AB4
AB3
AB1
AA1
U2
U3
A A
Micro-Star Int'l Co., Ltd.
No.69, Li-De St, Jung-He City, Taipei Hsien, Taiwan. http://www.msi.com.tw
Title
Size Document Number Rev
5
4
3
2
Date: Sheet
CPU0 HT0 & HT2
MS-9166
1
0C B
of
13 69 Friday, May 20, 2005
5
4
3
2
1
P0_VDIMM_2.5V
1 23 45 6
7 8
RN119
L19
W21
AA21
VDDIO1
VDDIO2
VDDIO3
VSS6
VSS7
VSS8
F17
P19
N30F1F2K2P2
C1328
BOT/.22u_16V
C1151
BOT/102p_50V
R796
1K
J21
M22
VDDIO4
VDDIO5
VSS9
VSS10
+1.2V_HT
+1.2V_HT
P22
T22
VDDIO6
VSS11
VDDIO7
VSS12
1K-8P4R
V22
Y22
AB22
AJ23
AA19
C23
E23
VDDIO8
VDDIO9
VDDIO10
VDDIO11
VDDIO12
VDDIO13
VDDIO14
VSS92
VSS13
VSS14
VSS15
VSS16
VSS17
VSS18
T13V2AB2
AF2
AK2B3AH3G4L4R4V13W4AC4F5D6H6M7
+5VSB
C1408
BOT/.22u_16V
C1329
BOT/102p_50V
CT51
BOT/100u_6.3V/MLCC
C865
C835
.22u_16V
.22u_16V
K26
T26
AE28
VDDIO15
VDDIO16
VDDIO17
VSS19
VSS20
VSS21
R877
X_10K
NOPOP
C1405
BOT/.22u_16V
C1406
BOT/102p_50V
D D
CPU1D
C C
+1.2V_HT
+1.2V_HT
B B
G26
VDDIO18
VSS93
N26
W26
VDDIO19
VSS22
C743
102p_50V
RN127
1K-8P4R
AE26
AG23
K20
D28
K28
VDDIO20
VDDIO21
VDDIO22
VDDIO23
VDDIO24
VSS23
VSS24
VSS25
VSS26
VSS27
AB7Y6AD6
H0_PRESENT 42
C1149
BOT/.22u_16V
C1409
BOT/102p_50V
CT31
100u_6.3V/MLCC
P0_VTT_1.25V
T28
AB28
AH28
VDDIO25
VDDIO26
VDDIO27
VSS28
VSS29
VSS30
J17
C1420
BOT/102p_50V
1 23 45 6
7 8
AH26
G28
N28
W28
VDDIO28
VDDIO29
VDDIO30
VDDIO31
VDDIO32
VSS94
VSS31
VSS32
VSS33
VSS34
AK6B7F14P7V7Y7M6
C1150
BOT/.22u_16V
C1407
BOT/102p_50V
C818
4.7u_35V-1206
AB26
AB20
L21
VDDIO33
VDDIO34
VDDIO35
VSS35
VSS36
VSS37
C1335
BOT/102p_50V
P0_VDDIO_SENSE 5
N21
R21
U21
H22
VDDIO36
VDDIO37
VDDIO38
VDDIO40
VSS95
VSS38
VSS39
VSS40
Y13N8R8U8W8
C1225
BOT/.22u_16V
C860
4.7u_6.3V-0805
D26
K22
A23
U23
AL23
AC21
VDDIO41
VDDIO42
VDDIO43
VDDIO44
VDDIO45
VSS41
VSS42
VSS43
VSS44
VSS45
AA8
AF8F8G17K9AB13M9P9
C1232
BOT/.22u_16V
C1324
BOT/102p_50V
VDDIO47
VSS46
AD22
VDDIO48
VSS96
VSS47
P0_VDIMM_2.5V
R623
AB23
AC23
AF20
VDDIOFB_L
VDDIOFB_H
VDDIO_SENSE
VSS48
VSS49
T9
C1414
BOT/102p_50V
51_1%
VSS50
AC22Y9AB9
VSS51
VSS52
AD9
P0_VCORE
VSS53
VSS54
D10
J10
VSS55
V6
AD12H2AA4
VDD117
VDD118
VSS97
VSS56
AD13
L10
C864
.22u_16V
X_68-8P4R
VDD1
VDD2
VSS57
VSS58
N10
R10
RN164
NOPOP
T18
V18
VDD3
VDD4
VSS59
VSS60
U10T6AA10
1 23 45 6
7 8
Y18
K12
F19
N19
R19
U19
W19
D20
AE4
M20
P20
T20
V20
Y20
AK20
B21
AH21
AK4B5AH5K6P6T8AB6
VDD5
VDD7
VDD8
VDD9
VDD10
VDD11
VDD12
VDD13
VDD14
VDD15
VDD16
VDD17
VDD18
VDD19
VDD20
VDD21
VDD22
VDD23
VDD24
VSS71
VSS99
VSS72
VSS82
VSS83
VSS84
VSS85
VSS86
VSS87
V11
N14
Y11
AA12
N16
AF12
F13
G15
F10
AD15
VSS61
VDD119
VSS62
VSS63
VSS64
VSS98
VSS65
VSS66
VSS67
VSS68
VSS69
AC10
VSS70
AK10
B11
L14
H15J8K11
M11
P11
T11
Screw holes connect to GND 5/5 update
CPU1G
1
1
2
2
3
3
4
4
5
5
6
6
7
7
8
8
9
9
10
10
11
11
12
12
13
13
14
14
15
15
16
16
SledgeHammer
P0_VCORE
P0_VCORE
4.7u_35V-1206
P0_VCORE
C887
.22u_16V
C838
C861
.22u_16V
LAYOUT: Place clolse to socket.
C819
4.7u_35V-1206
VDD25
VSS88
AF6M2F6D8G7
AB8
AK8B9K18L9N9R9T2U9W9
VDD26
VDD27
VDD28
VDD29
VDD30
VDD31
VDD32
VDD33
VDD34
VSS89
VSS101
VSS90
VSS73
VSS74
VSS75
VSS76
VSS77
VSS78
K13
U14
M13
AB11
AD11
AH11
G13
J12
N12
R12
17
17
18
18
19
19
20
20
21
21
22
22
23
23
24
24
25
25
26
26
27
27
28
28
29
29
30
30
31
31
32
32
C867
.22u_16V
C870
4.7u_35V-1206
VDD35
VSS79
VDD36
VSS80
U12
VDD37
VDD38
VDD39
VSS100
VSS81
VSS102
R14
W12
W14
C857
.22u_16V
C725
4.7u_35V-1206
VDD40
VSS103
AA14
VDD41
VSS104
AC14
VDD42
VSS105
AH15
AK14
AA9
VDD43
VSS106
B15
AB18
AH9
W13
VDD44
VDD45
VDD46
VSS107
VSS108
VSS109
K15
M15
B23
C909
.22u_16V
C895
4.7u_35V-1206
M10
VDD47
VDD48
VSS182
VSS110
P15
P10
T15
T10
VDD49
VDD50
VSS111
VSS112
V15
V10Y2Y10
VDD51
VSS113
Y15
AB15
AB12
VDD52
VDD53
VDD54
VSS114
VSS115
VSS116
D14
J14
C891
.22u_16V
C723
4.7u_35V-1206
AF10
VDD55
VSS117
H17
F11
VDD56
VSS183
G24
L11
L16
N11
VDD57
VDD58
VSS118
VSS119
R16
R11
U11
VDD59
VSS120
U16
W18
W11
VDD60
VDD61
VSS121
VSS122
AA16
AA11
AD2
D12
VDD62
VDD63
VDD64
VSS123
VSS124
VSS125
AC17
AF16
F16
C871
4.7u_35V-1206
M12
VDD65
VSS126
K17
P12
VDD66
VSS184
N24
T12
M17
V12
VDD67
VSS127
P17
Y12
VDD68
VDD69
VSS128
VSS129
T17
AC13
VDD70
VSS130
V17
AK12
VDD71
VSS131
Y17
B13
VDD72
VSS132
AB17
L13D4N13
VDD73
VSS133
AD17
VDD74
VSS134
D18
R13
VDD75
VDD76
VSS135
VSS185
J18
W24
P0_VCORE
P0_VCORE
P0_VCORE
U13
AA13
VDD77
VDD78
VSS136
VSS137
L18
N18
P0_VCORE
AH13
J13
M14
P14
T14J4V14
Y14
AD14
AF14
F15
L15
N15
R15
U15
W15N4AA15
D16
F18
M16
VDD79
VDD80
VDD81
VDD82
VDD83
VDD84
VDD85
VDD86
VDD87
VDD88
VDD89
VDD90
VDD91
VDD92
VDD93
VDD94
VDD95
VDD96
VDD97
VDD98
VDD99
VSS138
VSS139
VSS140
VSS141
VSS142
VSS143
VSS144
VSS186
VSS145
VSS146
VSS147
VSS148
VSS149
VSS150
VSS151
VSS152
VSS153
VSS187
VSS154
VSS155
R18
U18
W10
EC62
330u_2.5V
AA18
AE17
AK18
B19
G30
K19
M19
T19
V19
EC61
330u_2.5V
Y19
AB19
AH19
EC66
330u_2.5V
VSS156
J20
L20
W30
N20
R20
U20
EC58
330u_2.5V
LAYOUT: Place solder side of processor.
C826
22u_10V-1206
C1334
BOT/.22u_16V
22u_10V-1206
C1403
BOT/10u_10V-1206
C877
C1401
BOT/.22u_16V
C726
22u_10V-1206
LAYOUT: Place on back of CPU socket
C820
10u_10V-1206
P16
T16
V16
Y16
VDD100
VDD101
VDD102
VDD103
VSS157
VSS158
VSS159
VSS160
W20
AA20
AC20
AF21
EC73
330u_2.5V
C1337
BOT/.22u_16V
C876
22u_10V-1206
BOT/10u_10V-1206
AD16
VDD104
VSS161
K21
C1316
AK16U4B17
VDD105
VDD106
VSS162
VSS188
M21
AB24
L17
N17
R17
VDD107
VDD108
VDD109
VDD110
VSS163
VSS164
VSS165
VSS166
P21
T21
V21
Y21
EC59
330u_2.5V
C696
22u_10V-1206
U17
W17
VDD111
VSS167
AB21
D22
C1322
BOT/.22u_16V
AA17
AH17
VDD112
VDD113
VSS168
VSS169
G22
L22
22u_10V-1206
M18
P18
VDD114
VDD115
VDD116
VSS170
VSS171
VSS189
VSS172
N22
B26
R22
U22
EC76
330u_2.5V
C811
C1402
BOT/10u_10V-1206
VSS173
VSS174
W22
AA22
SledgeHammer
VSS175
VSS176
VSS177
VSS178
AE22
AK22
J22
EC60
330u_2.5V
C1323
BOT/.22u_16V
C697
22u_10V-1206
VSS179
AE24
VSS180
AK26
B29
VSS190
VSS181
VSS191
AK23
K24
C844
10u_10V-1206
VSS192
T24
VSS193
VSS194
AE30
AK29
D30
EC56
330u_2.5V
AG2E2P13
VSS203
VSS195
VSS196
VSS197
VSS198
K30
T30
AB30
C1317
BOT/.22u_16V
VSS91
VSS202
VSS199
VSS1
AH30
AH7V9L12
EC70
330u_2.5V
W16
D23
AH23
VSS5
VSS200
VSS201
VSS2
VSS3
VSS4
AC12
C825
10u_10V-1206
CT21
100u_6.3V/MLCC
A A
5
4
CT32
100u_6.3V/MLCC
CT36
100u_6.3V/MLCC
3
CT29
100u_6.3V/MLCC
P0_VCORE
P0_VCORE
C718
102p_50V
C744
102p_50V
C862
102p_50V
C812
102p_50V
2
C732
102p_50V
C883
102p_50V
C741
102p_50V
C810
102p_50V
C888
102p_50V
C863
102p_50V
Micro-Star Int'l Co., Ltd.
No.69, Li- De St, Jung-H e City, Taipe i Hsien, Taiw an. http://www.msi.com.tw
Title
Size Document Number Rev
Custom
Date: Sheet
CPU0 POWER & GND
MS-9166
1
14
0C
of
69 Friday, May 20, 2005
5
Registered DDR333 SDRAM Sockets
P0_VDIMM_2.5V
D D
5
H0_DR_MD0
H0_DR_MD1
H0_DR_MD2
H0_DR_MD3
H0_DR_MD4
H0_DR_MD5
H0_DR_MD6
H0_DR_MD7
H0_DR_MD8
H0_DR_MD9
H0_DR_MD10
H0_DR_MD11
H0_DR_MD12
H0_DR_MD13
H0_DR_MD14
H0_DR_MD15
H0_DR_MD16
H0_DR_MD17
H0_DR_MD18
H0_DR_MD19
H0_DR_MD20
H0_DR_MD21
H0_DR_MD22
H0_DR_MD23
H0_DR_MD24
H0_DR_MD25
H0_DR_MD26
H0_DR_MD27
H0_DR_MD28
H0_DR_MD29
H0_DR_MD30
H0_DR_MD31
H0_DR_MD32
H0_DR_MD33
H0_DR_MD34
H0_DR_MD35
H0_DR_MD36
H0_DR_MD37
H0_DR_MD38
H0_DR_MD39
H0_DR_MD40
H0_DR_MD41
H0_DR_MD42
H0_DR_MD43
H0_DR_MD44
H0_DR_MD45
H0_DR_MD46
H0_DR_MD47
H0_DR_MD48
H0_DR_MD49
H0_DR_MD50
H0_DR_MD51
H0_DR_MD52
H0_DR_MD53
H0_DR_MD54
H0_DR_MD55
H0_DR_MD56
H0_DR_MD57
H0_DR_MD58
H0_DR_MD59
H0_DR_MD60
H0_DR_MD61
H0_DR_MD62
H0_DR_MD63
H0_DR_-MSWEA
DIMM1-4_VREF
H0_DR_MD[63..0] 16,17
C C
B B
P0_VDIMM_2.5V
C645
.1u_16V
C636
.1u_16V
A A
738467085
VDD0
VDD1
2
DQ0
4
DQ1
6
DQ2
8
DQ3
94
DQ4
95
DQ5
98
DQ6
99
DQ7
12
DQ8
13
DQ9
19
DQ10
20
DQ11
105
DQ12
106
DQ13
109
DQ14
110
DQ15
23
DQ16
24
DQ17
28
DQ18
31
DQ19
114
DQ20
117
DQ21
121
DQ22
123
DQ23
33
DQ24
35
DQ25
39
DQ26
40
DQ27
126
DQ28
127
DQ29
131
DQ30
133
DQ31
53
DQ32
55
DQ33
57
DQ34
60
DQ35
146
DQ36
147
DQ37
150
DQ38
151
DQ39
61
DQ40
64
DQ41
68
DQ42
69
DQ43
153
DQ44
155
DQ45
161
DQ46
162
DQ47
72
DQ48
73
DQ49
79
DQ50
80
DQ51
165
DQ52
166
DQ53
170
DQ54
171
DQ55
83
DQ56
84
DQ57
87
DQ58
88
DQ59
174
DQ60
175
DQ61
178
DQ62
179
DQ63
90
WP(NC)
63
WE#
1
VREF
9
NC2
101
NC3
102
NC4
Channel A
108
120
148
168223054627796
VDD2
VDD3
VDD4
VDD5
VDD6
VDD7
VDD8
VDDQ0
VDDQ1
VDDQ2
VDDQ3
VSS0
VSS1
VSS2
VSS3
VSS4
VSS5
VSS6
VSS7
VSS8
3111826344250586674818993
VSS9
SLAVE ADDRESS = 1010000B
4
104
112
128
136
143
156
164
172
1801582
VDDQ10
VDDQ11
VDDQ12
PIN
VSS16
VSS17
VSS18
139
145
4
VDDQ13
VSS19
152
VDDQ14
VSS20
160
VDDID
VDDQ15
A10_AP
FETEN
CK0(DU)
CK0#(DU)
CK1(CK0)
CK1#(CK0#)
CK2(DU)
CK2#(DU)
NC(RESET#)
VSS21
176
VDDQ4
VDDQ5
VDDQ6
VDDQ7
VDDQ8
VDDQ9
184
DDR DIMM
SOCKET
VSS10
VSS11
VSS12
VSS13
VSS14
VSS15
100
116
124
132
CS0#
CS1#
CS2#
CS3#
DQS0
DQS1
DQS2
DQS3
DQS4
DQS5
DQS6
DQS7
DQS8
CKE0
CKE1
CAS#
RAS#
DM0
DM1
DM2
DM3
DM4
DM5
DM6
DM7
DM8
BA0
BA1
BA2
SCL
SDA
SA0
SA1
SA2
CB0
CB1
CB2
CB3
CB4
CB5
CB6
CB7
NC5
184
VDDSPD
A13
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A11
A12
DDR3
DDRDIMM_184
H0_DR_-MCS0
157
H0_DR_-MCS1
158
71
163
5
14
25
36
56
67
78
86
47
167
48
43
41
130
37
32
125
29
122
27
141
118
115
103
H0_DR_MEMBAKA0
59
H0_DR_MEMBAKA1
52
113
92
91
181
182
183
44
45
49
51
134
135
142
144
16
17
137
138
76
75
173
H0_DR_MEMRESET_L
10
H0_DR_MCKELO
21
H0_DR_MCKEUP
111
H0_DR_-MSCASA
65
H0_DR_-MSRASA
154
97
107
119
129
149
159
169
177
140
3
C603
.1u_16V
C602
.1u_16V
P0_VDIMM_2.5V
R678
100_1%
R679
100_1%
3
SB_VCC_SMB10CLK
SB_VCC_SMB10DATA
H0_DR_MD[127..64] 16,17
H0_DR_-MSWEA 17
C627
.1u_16V
C626
.1u_16V
H0_DR_-MSWEA
DIMM1-4_VREF
3/7 update
H0_DR_MD64
H0_DR_MD65
H0_DR_MD66
H0_DR_MD67
H0_DR_MD68
H0_DR_MD69
H0_DR_MD70
H0_DR_MD71
H0_DR_MD72
H0_DR_MD73
H0_DR_MD74
H0_DR_MD75
H0_DR_MD76
H0_DR_MD77
H0_DR_MD78
H0_DR_MD79
H0_DR_MD80
H0_DR_MD81
H0_DR_MD82
H0_DR_MD83
H0_DR_MD84
H0_DR_MD85
H0_DR_MD86
H0_DR_MD87
H0_DR_MD88
H0_DR_MD89
H0_DR_MD90
H0_DR_MD91
H0_DR_MD92
H0_DR_MD93
H0_DR_MD94
H0_DR_MD95
H0_DR_MD96
H0_DR_MD97
H0_DR_MD98
H0_DR_MD99
H0_DR_MD100
H0_DR_MD101
H0_DR_MD102
H0_DR_MD103
H0_DR_MD104
H0_DR_MD105
H0_DR_MD106
H0_DR_MD107
H0_DR_MD108
H0_DR_MD109
H0_DR_MD110
H0_DR_MD111
H0_DR_MD112
H0_DR_MD113
H0_DR_MD114
H0_DR_MD115
H0_DR_MD116
H0_DR_MD117
H0_DR_MD118
H0_DR_MD119
H0_DR_MD120
H0_DR_MD121
H0_DR_MD122
H0_DR_MD123
H0_DR_MD124
H0_DR_MD125
H0_DR_MD126
H0_DR_MD127
DIMM1-4_VREF
C635
102p_50V
P0_VDIMM_2.5V
2
4
6
8
94
95
98
99
12
13
19
20
105
106
109
110
23
24
28
31
114
117
121
123
33
35
39
40
126
127
131
133
53
55
57
60
146
147
150
151
61
64
68
69
153
155
161
162
72
73
79
80
165
166
170
171
83
84
87
88
174
175
178
179
90
63
1
9
101
102
SB_VCC_SMB10CLK 10,16,24,25,44,45
SB_VCC_SMB10DATA 10,16,24,25,44,45
H0_DR_MDQS0 16,17
H0_DR_MDQS1 16,17 H0_DR_MDQS21 16,17
H0_DR_MDQS2 16,17
H0_DR_MDQS3 16,17
H0_DR_MDQS4 16,17
H0_DR_MDQS5 16,17
H0_DR_MDQS6 16,17
H0_DR_MDQS7 16,17
H0_DR_MDQS8 16,17
H0_DR_MAA13
H0_DR_MAA0
H0_DR_MAA1
H0_DR_MAA2
H0_DR_MAA3
H0_DR_MAA4
H0_DR_MAA5
H0_DR_MAA6
H0_DR_MAA7
H0_DR_MAA8
H0_DR_MAA9
H0_DR_MAA10
H0_DR_MAA11
H0_DR_MAA12
SB_VCC_SMB10CLK
SB_VCC_SMB10DATA
H0_DR_MEMCHECK0 17
H0_DR_MEMCHECK1 17
H0_DR_MEMCHECK2 17
H0_DR_MEMCHECK3 17
H0_DR_MEMCHECK4 17
H0_DR_MEMCHECK5 17
H0_DR_MEMCHECK6 17
H0_DR_MEMCHECK7 17
H0_MEMCLK_H0 11
H0_MEMCLK_L0 11
P0_VDIMM_2.5V
H0_DR_MDQS9 16,17
H0_DR_MDQS10 16,17
H0_DR_MDQS11 16,17
H0_DR_MDQS12 16,17
H0_DR_MDQS13 16,17
H0_DR_MDQS14 16,17
H0_DR_MDQS15 16,17
H0_DR_MDQS16 16,17
H0_DR_MDQS17 16,17
2
Channel B
738467085
108
120
148
VDD0
VDD1
VDD2
VDD3
VDD4
DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQ8
DQ9
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
DQ16
DQ17
DQ18
DQ19
DQ20
DQ21
DQ22
DQ23
DQ24
DQ25
DQ26
DQ27
DQ28
DQ29
DQ30
DQ31
DQ32
DQ33
DQ34
DQ35
DQ36
DQ37
DQ38
DQ39
DQ40
DQ41
DQ42
DQ43
DQ44
DQ45
DQ46
DQ47
DQ48
DQ49
DQ50
DQ51
DQ52
DQ53
DQ54
DQ55
DQ56
DQ57
DQ58
DQ59
DQ60
DQ61
DQ62
DQ63
WP(NC)
WE#
VREF
NC2
NC3
NC4
VSS0
VSS1
3111826344250586674818993
VDD5
VSS2
VDD6
VSS3
VDD7
VSS4
168223054627796
104
112
128
136
VDD8
VDDQ0
VDDQ1
VDDQ2
VDDQ3
VDDQ4
VDDQ5
VDDQ6
VDDQ7
VDDQ8
184
DDR DIMM
SOCKET
VSS5
VSS6
VSS7
VSS8
VSS9
VSS10
VSS11
VSS12
VSS13
VSS14
100
116
124
143
VDDQ9
VSS15
132
156
VDDQ10
VSS16
139
SLAVE ADDRESS = 1010001B
DIMM1-4_VREF 16
2
1
DDR4
VDDID
VDDQ15
CS0#
CS1#
CS2#
CS3#
DQS0
DQS1
DQS2
DQS3
DQS4
DQS5
DQS6
DQS7
DQS8
A10_AP
FETEN
CK0(DU)
CK0#(DU)
CK1(CK0)
CK1#(CK0#)
CK2(DU)
CK2#(DU)
NC(RESET#)
CKE0
CKE1
CAS#
RAS#
VSS21
176
SDA
SA0
SA1
SA2
CB0
CB1
CB2
CB3
CB4
CB5
CB6
CB7
NC5
DM0
DM1
DM2
DM3
DM4
DM5
DM6
DM7
DM8
184
VDDSPD
A13
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A11
A12
BA0
BA1
BA2
SCL
DDRDIMM_184
H0_DR_-MCS0
157
H0_DR_-MCS1
158
71
163
5
14
25
36
56
67
78
86
47
H0_DR_MAA13
167
H0_DR_MAA0
48
H0_DR_MAA1
43
H0_DR_MAA2
41
H0_DR_MAA3
130
H0_DR_MAA4
37
H0_DR_MAA5
32
H0_DR_MAA6
125
H0_DR_MAA7
29
H0_DR_MAA8
122
H0_DR_MAA9
27
H0_DR_MAA10
141
H0_DR_MAA11
118
H0_DR_MAA12
115
103
H0_DR_MEMBAKA0
59
H0_DR_MEMBAKA1
52
113
92
91
181
182
183
44
45
49
51
134
135
142
144
16
17
137
138
76
75
173
H0_DR_MEMRESET_L
10
H0_DR_MCKELO
21
H0_DR_MCKEUP
111
H0_DR_-MSCASA
65
H0_DR_-MSRASA
154
97
107
119
129
149
159
169
177
140
H0_DR_MDQS18 16,17
H0_DR_MDQS19 16,17
H0_DR_MDQS20 16,17
H0_DR_MDQS22 16,17
H0_DR_MDQS23 16,17
H0_DR_MDQS24 16,17
H0_DR_MDQS25 16,17
H0_DR_MDQS26 16,17
SB_VCC_SMB10CLK
SB_VCC_SMB10DATA
P0_VDIMM_2.5V
H0_DR_MEMCHECK8 17
H0_DR_MEMCHECK9 17
H0_DR_MEMCHECK10 17
H0_DR_MEMCHECK11 17
H0_DR_MEMCHECK12 17
H0_DR_MEMCHECK13 17
H0_DR_MEMCHECK14 17
H0_DR_MEMCHECK15 17
H0_MEMCLK_H2 11
H0_MEMCLK_L2 11
H0_DR_MDQS27 16,17
H0_DR_MDQS28 16,17
H0_DR_MDQS29 16,17
H0_DR_MDQS30 16,17
H0_DR_MDQS31 16,17
H0_DR_MDQS32 16,17
H0_DR_MDQS33 16,17
H0_DR_MDQS34 16,17
H0_DR_MDQS35 16,17
164
172
VDDQ11
VDDQ12
VDDQ13
PIN
VSS17
VSS18
VSS19
145
152
1801582
VDDQ14
VSS20
160
Micro-Star Int'l Co., Ltd.
No.69, Li-De St, Jung-He City, Taipei Hsien, Taiwan. http:// www.msi.com.tw
Title
Size Document Number Rev
Date: Sheet of
CPU0 Register DDR DIMM 1 & 2
MS-9166
1
H0_DR_-MCS0 17
H0_DR_-MCS1 17
H0_DR_MAA[13..0] 17
H0_DR_MEMBAKA0 17
H0_DR_MEMBAKA1 17
H0_MEMRESET_L 11
H0_DR_MCKELO 17
H0_DR_MCKEUP 17
H0_DR_-MSCASA 17
H0_DR_-MSRASA 17
15 69 Friday, May 20, 2005
0C Custom
5
Registered DDR333 SDRAM Sockets
P0_VDIMM_2.5V
738467085
108
120
148
D D
H0_DR_-MSWEA
DIMM1-4_VREF
3/7 update
H0_DR_MD0
H0_DR_MD1
H0_DR_MD2
H0_DR_MD3
H0_DR_MD4
H0_DR_MD5
H0_DR_MD6
H0_DR_MD7
H0_DR_MD8
H0_DR_MD9
H0_DR_MD10
H0_DR_MD11
H0_DR_MD12
H0_DR_MD13
H0_DR_MD14
H0_DR_MD15
H0_DR_MD16
H0_DR_MD17
H0_DR_MD18
H0_DR_MD19
H0_DR_MD20
H0_DR_MD21
H0_DR_MD22
H0_DR_MD23
H0_DR_MD24
H0_DR_MD25
H0_DR_MD26
H0_DR_MD27
H0_DR_MD28
H0_DR_MD29
H0_DR_MD30
H0_DR_MD31
H0_DR_MD32
H0_DR_MD33
H0_DR_MD34
H0_DR_MD35
H0_DR_MD36
H0_DR_MD37
H0_DR_MD38
H0_DR_MD39
H0_DR_MD40
H0_DR_MD41
H0_DR_MD42
H0_DR_MD43
H0_DR_MD44
H0_DR_MD45
H0_DR_MD46
H0_DR_MD47
H0_DR_MD48
H0_DR_MD49
H0_DR_MD50
H0_DR_MD51
H0_DR_MD52
H0_DR_MD53
H0_DR_MD54
H0_DR_MD55
H0_DR_MD56
H0_DR_MD57
H0_DR_MD58
H0_DR_MD59
H0_DR_MD60
H0_DR_MD61
H0_DR_MD62
H0_DR_MD63
H0_DR_MD[63..0] 15,17
C C
B B
P0_VDIMM_2.5V
C540
.1u_16V
C541
.1u_16V
DIMM1-4_VREF 15
A A
VDD0
2
DQ0
4
DQ1
6
DQ2
8
DQ3
94
DQ4
95
DQ5
98
DQ6
99
DQ7
12
DQ8
13
DQ9
19
DQ10
20
DQ11
105
DQ12
106
DQ13
109
DQ14
110
DQ15
23
DQ16
24
DQ17
28
DQ18
31
DQ19
114
DQ20
117
DQ21
121
DQ22
123
DQ23
33
DQ24
35
DQ25
39
DQ26
40
DQ27
126
DQ28
127
DQ29
131
DQ30
133
DQ31
53
DQ32
55
DQ33
57
DQ34
60
DQ35
146
DQ36
147
DQ37
150
DQ38
151
DQ39
61
DQ40
64
DQ41
68
DQ42
69
DQ43
153
DQ44
155
DQ45
161
DQ46
162
DQ47
72
DQ48
73
DQ49
79
DQ50
80
DQ51
165
DQ52
166
DQ53
170
DQ54
171
DQ55
83
DQ56
84
DQ57
87
DQ58
88
DQ59
174
DQ60
175
DQ61
178
DQ62
179
DQ63
90
WP(NC)
63
WE#
1
VREF
9
NC2
101
NC3
102
NC4
SLAVE ADDRESS = 1010010B
5
168223054627796
VDD1
VDD2
VDD3
VDD4
VDD5
VDD6
VDD7
VDD8
VSS0
VSS1
VSS2
VSS3
VSS4
VSS5
3111826344250586674818993
4
Channel A
104
112
128
136
VDDQ0
VDDQ1
VDDQ2
VDDQ3
VDDQ4
VDDQ5
VDDQ6
VDDQ7
VDDQ8
VDDQ9
184 PIN
DDR DIMM
SOCKET
VSS6
VSS7
VSS8
VSS9
VSS10
VSS11
VSS12
VSS13
VSS14
VSS15
100
116
124
4
143
VDDQ10
VSS16
132
156
VDDQ11
VSS17
139
164
VDDQ12
VSS18
145
172
VDDQ13
VSS19
152
1801582
160
VDDQ14
VDDQ15
A10_AP
CK0(DU)
CK0#(DU)
CK1(CK0)
CK1#(CK0#)
CK2(DU)
CK2#(DU)
NC(RESET#)
VSS20
VSS21
176
VDDID
CS0#
CS1#
CS2#
CS3#
DQS0
DQS1
DQS2
DQS3
DQS4
DQS5
DQS6
DQS7
DQS8
FETEN
SDA
CKE0
CKE1
CAS#
RAS#
DM0
DM1
DM2
DM3
DM4
DM5
DM6
DM7
DM8
184
VDDSPD
A13
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A11
A12
BA0
BA1
BA2
SCL
SA0
SA1
SA2
CB0
CB1
CB2
CB3
CB4
CB5
CB6
CB7
NC5
SB_VCC_SMB10CLK 10,15,24,25,44,45
SB_VCC_SMB10DATA 10,15,24,25,44,45
DDR1
DDRDIMM_184
H0_DR_-MCS2
157
H0_DR_-MCS3
158
71
163
5
14
25
36
56
67
78
86
47
167
48
43
41
130
37
32
125
29
122
27
141
118
115
103
H0_DR_MEMBAKA0
59
H0_DR_MEMBAKA1
52
113
92
91
181
182
183
44
45
49
51
134
135
142
144
16
17
137
138
76
75
173
H0_DR_MEMRESET_L
10
H0_DR_MCKELO
21
H0_DR_MCKEUP
111
H0_DR_-MSCASA
65
H0_DR_-MSRASA
154
97
107
119
129
149
159
169
177
140
H0_DR_MDQS0 15,17
H0_DR_MDQS1 15,17
H0_DR_MDQS2 15,17
H0_DR_MDQS3 15,17
H0_DR_MDQS4 15,17
H0_DR_MDQS5 15,17
H0_DR_MDQS6 15,17
H0_DR_MDQS7 15,17
H0_DR_MDQS8 15,17
H0_DR_MAA13
H0_DR_MAA0
H0_DR_MAA1
H0_DR_MAA2
H0_DR_MAA3
H0_DR_MAA4
H0_DR_MAA5
H0_DR_MAA6
H0_DR_MAA7
H0_DR_MAA8
H0_DR_MAA9
H0_DR_MAA10
H0_DR_MAA11
H0_DR_MAA12
SB_VCC_SMB10CLK
SB_VCC_SMB10DATA
H0_DR_MEMCHECK0 17
H0_DR_MEMCHECK1 17
H0_DR_MEMCHECK2 17
H0_DR_MEMCHECK3 17
H0_DR_MEMCHECK4 17
H0_DR_MEMCHECK5 17
H0_DR_MEMCHECK6 17
H0_DR_MEMCHECK7 17
H0_MEMCLK_H1 11
H0_MEMCLK_L1 11
H0_DR_MDQS9 15,17
H0_DR_MDQS10 15,17
H0_DR_MDQS11 15,17
H0_DR_MDQS12 15,17
H0_DR_MDQS13 15,17
H0_DR_MDQS14 15,17
H0_DR_MDQS15 15,17
H0_DR_MDQS16 15,17
H0_DR_MDQS17 15,17
3
SB_VCC_SMB10CLK
SB_VCC_SMB10DATA
P0_VDIMM_2.5V
P0_VDIMM_2.5V
3
H0_DR_MD[127..64] 15,17
C575
.1u_16V
C576
.1u_16V
2
P0_VDIMM_2.5V
738467085
VDD0
VDD1
VDD2
H0_DR_MD64
H0_DR_MD65
H0_DR_MD66
H0_DR_MD67
H0_DR_MD68
H0_DR_MD69
H0_DR_MD70
H0_DR_MD71
H0_DR_MD72
H0_DR_MD73
H0_DR_MD74
H0_DR_MD75
H0_DR_MD76
H0_DR_MD77
H0_DR_MD78
H0_DR_MD79
H0_DR_MD80
H0_DR_MD81
H0_DR_MD82
H0_DR_MD83
H0_DR_MD84
H0_DR_MD85
H0_DR_MD86
H0_DR_MD87
H0_DR_MD88
H0_DR_MD89
H0_DR_MD90
H0_DR_MD91
H0_DR_MD92
H0_DR_MD93
H0_DR_MD94
H0_DR_MD95
H0_DR_MD96
H0_DR_MD97
H0_DR_MD98
H0_DR_MD99
H0_DR_MD100
H0_DR_MD101
H0_DR_MD102
H0_DR_MD103
H0_DR_MD104
H0_DR_MD105
H0_DR_MD106
H0_DR_MD107
H0_DR_MD108
H0_DR_MD109
H0_DR_MD110
H0_DR_MD111
H0_DR_MD112
H0_DR_MD113
H0_DR_MD114
H0_DR_MD115
H0_DR_MD116
H0_DR_MD117
H0_DR_MD118
H0_DR_MD119
H0_DR_MD120
H0_DR_MD121
H0_DR_MD122
H0_DR_MD123
H0_DR_MD124
H0_DR_MD125
H0_DR_MD126
H0_DR_MD127
H0_DR_-MSWEA 17
3/7 update
H0_DR_-MSWEA
DIMM1-4_VREF
105
106
109
110
114
117
121
123
126
127
131
133
146
147
150
151
153
155
161
162
165
166
170
171
174
175
178
179
101
102
2
DQ0
4
DQ1
6
DQ2
8
DQ3
94
DQ4
95
DQ5
98
DQ6
99
DQ7
12
DQ8
13
DQ9
19
DQ10
20
DQ11
DQ12
DQ13
DQ14
DQ15
23
DQ16
24
DQ17
28
DQ18
31
DQ19
DQ20
DQ21
DQ22
DQ23
33
DQ24
35
DQ25
39
DQ26
40
DQ27
DQ28
DQ29
DQ30
DQ31
53
DQ32
55
DQ33
57
DQ34
60
DQ35
DQ36
DQ37
DQ38
DQ39
61
DQ40
64
DQ41
68
DQ42
69
DQ43
DQ44
DQ45
DQ46
DQ47
72
DQ48
73
DQ49
79
DQ50
80
DQ51
DQ52
DQ53
DQ54
DQ55
83
DQ56
84
DQ57
87
DQ58
88
DQ59
DQ60
DQ61
DQ62
DQ63
90
WP(NC)
63
WE#
1
VREF
9
NC2
NC3
NC4
VDD3
VSS0
3111826344250586674818993
SLAVE ADDRESS = 1010011B
108
VDD4
VSS1
2
120
148
168223054627796
VDD5
VDD6
VDD7
VSS2
VSS3
VSS4
Channel B
104
112
128
VDD8
VDDQ0
VDDQ1
VDDQ2
VDDQ3
VDDQ4
VDDQ5
VDDQ6
VDDQ7
VDDQ8
184 PIN
DDR DIMM
SOCKET
VSS5
VSS6
VSS7
VSS8
VSS9
VSS10
VSS11
VSS12
VSS13
VSS14
100
116
DDR2
VDDID
VDDQ15
CS0#
CS1#
CS2#
CS3#
DQS0
DQS1
DQS2
DQS3
DQS4
DQS5
DQS6
DQS7
DQS8
A10_AP
FETEN
CK0(DU)
CK0#(DU)
CK1(CK0)
CK1#(CK0#)
CK2(DU)
CK2#(DU)
NC(RESET#)
CKE0
CKE1
CAS#
RAS#
VSS21
176
BA0
BA1
BA2
SCL
SDA
SA0
SA1
SA2
CB0
CB1
CB2
CB3
CB4
CB5
CB6
CB7
NC5
DM0
DM1
DM2
DM3
DM4
DM5
DM6
DM7
DM8
184
VDDSPD
A13
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A11
A12
DDRDIMM_184
157
158
71
163
5
14
25
36
56
67
78
86
47
167
48
43
41
130
37
32
125
29
122
27
141
118
115
103
59
52
113
92
91
181
182
183
44
45
49
51
134
135
142
144
16
17
137
138
76
75
173
10
21
111
65
154
97
107
119
129
149
159
169
177
140
136
VDDQ9
VSS15
124
143
VDDQ10
VSS16
132
156
139
164
VDDQ11
VSS17
145
172
VDDQ12
VSS18
152
1801582
VDDQ13
VDDQ14
VSS19
VSS20
160
Micro-Star Int'l Co., Ltd.
No.69, Li-De St, Jung-He City, Taipei Hsien, Taiwan. http://www.msi.com.tw
Title
Size Document Number Rev
Date: Sheet of
1
H0_DR_-MCS2
H0_DR_-MCS3
H0_DR_MAA13
H0_DR_MAA0
H0_DR_MAA1
H0_DR_MAA2
H0_DR_MAA3
H0_DR_MAA4
H0_DR_MAA5
H0_DR_MAA6
H0_DR_MAA7
H0_DR_MAA8
H0_DR_MAA9
H0_DR_MAA10
H0_DR_MAA11
H0_DR_MAA12
H0_DR_MEMBAKA0
H0_DR_MEMBAKA1
H0_DR_MEMRESET_L
H0_DR_MCKELO
H0_DR_MCKEUP
H0_DR_-MSCASA
H0_DR_-MSRASA
H0_DR_-MCS2 17
H0_DR_-MCS3 17
H0_DR_MDQS18 15,17
H0_DR_MDQS19 15,17
H0_DR_MDQS20 15,17
H0_DR_MDQS21 15,17
H0_DR_MDQS22 15,17
H0_DR_MDQS23 15,17
H0_DR_MDQS24 15,17
H0_DR_MDQS25 15,17
H0_DR_MDQS26 15,17
H0_DR_MEMBAKA0 17
SB_VCC_SMB10CLK
SB_VCC_SMB10DATA
H0_DR_MEMBAKA1 17
P0_VDIMM_2.5V
H0_DR_MEMCHECK8 17
H0_DR_MEMCHECK9 17
H0_DR_MEMCHECK10 17
H0_DR_MEMCHECK11 17
H0_DR_MEMCHECK12 17
H0_DR_MEMCHECK13 17
H0_DR_MEMCHECK14 17
H0_DR_MEMCHECK15 17
H0_MEMCLK_H3 11
H0_MEMCLK_L3 11
H0_DR_MCKELO 17
H0_DR_MCKEUP 17
H0_DR_-MSCASA 17
H0_DR_-MSRASA 17
H0_DR_MDQS27 15,17
H0_DR_MDQS28 15,17
H0_DR_MDQS29 15,17
H0_DR_MDQS30 15,17
H0_DR_MDQS31 15,17
H0_DR_MDQS32 15,17
H0_DR_MDQS33 15,17
H0_DR_MDQS34 15,17
H0_DR_MDQS35 15,17
H0_DR_MAA[13..0] 17
H0_MEMRESET_L 11
CPU0 Register DDR DIMM3 & 4
MS-9166
16 69 Friday, May 20, 2005
1
0C Custom
5
4
3
2
1
DDR Terminations
RN69 10-8P4R
H0_MD4
H0_MD0
H0_MD5
D D
C C
B B
A A
H0_MDQS9
H0_MDQS0
H0_MD6
H0_MD2
H0_MD7
H0_MD3
H0_MD8
H0_MD12
H0_MD9
H0_MD13
H0_MDQS1
H0_MDQS10
H0_MD14
H0_MD10
H0_MD11
H0_MCKELO
H0_MD20
H0_MD16
H0_MD17
H0_MD21
H0_MDQS2
H0_MDQS11
H0_MAA12
H0_MAA11
H0_MAA9
H0_MAA7
H0_MD18
H0_MD22
H0_MD23
H0_MD19
H0_MD24
H0_MD28
H0_MD29
H0_MD25
H0_MDQS3
H0_MDQS12
H0_MD30
H0_MD26
H0_MAA3
H0_MAA2
H0_MAA1
H0_MD27
H0_MD31
H0_MEMCHECK4
H0_MEMCHECK5
H0_MEMCHECK0
H0_MEMCHECK1
H0_MDQS8
H0_MDQS17
H0_MEMCHECK2
H0_MEMCHECK6
H0_MEMCHECK3
H0_MEMCHECK7
H0_MD32
H0_MD36
H0_MD37
H0_MD33
H0_MDQS4
H0_MDQS13
H0_MD34
H0_MD38
H0_MD39
H0_MD35
H0_MD44
H0_MD40
H0_MD45
H0_MD41
H0_MDQS14
H0_MDQS5
H0_MD42
H0_MD46
H0_MD43
H0_MD47
H0_-MCS1
H0_-MCS2
H0_-MCS3
H0_MAA13
H0_MD48
H0_MD52
H0_MD49
H0_MD53
H0_MDQS15
H0_MD54
H0_MDQS6
H0_MD55
H0_MD50
H0_MD51
H0_MD60
H0_MD61
H0_MD56
H0_MD57
H0_MDQS16
H0_MD62
H0_MDQS7
H0_MD63
H0_MD58
H0_MD59
1 2
3 4
5 6
7 8
RN70 10-8P4R
1 2
3 4
5 6
7 8
RN71 10-8P4R
1 2
3 4
5 6
7 8
RN72 10-8P4R
1 2
3 4
5 6
7 8
RN73 10-8P4R
1 2
3 4
5 6
7 8
R667 10
R685 10
R666 10
R686 10
RN79 10-8P4R
1 2
3 4
5 6
7 8
RN80 10-8P4R
1 2
3 4
5 6
7 8
RN81 10-8P4R
1 2
3 4
5 6
7 8
RN82 10-8P4R
1 2
3 4
5 6
7 8
RN83 10-8P4R
1 2
3 4
5 6
7 8
RN84 10-8P4R
1 2
3 4
5 6
7 8
RN85 10-8P4R
1 2
3 4
5 6
7 8
RN86 10-8P4R
1 2
3 4
5 6
7 8
RN87 10-8P4R
1 2
3 4
5 6
7 8
RN88 10-8P4R
1 2
3 4
5 6
7 8
RN89 10-8P4R
1 2
3 4
5 6
7 8
RN90 10-8P4R
1 2
3 4
5 6
7 8
RN91 10-8P4R
1 2
3 4
5 6
7 8
RN92 10-8P4R
1 2
3 4
5 6
7 8
RN93 10-8P4R
1 2
3 4
5 6
7 8
RN74 10-8P4R
1 2
3 4
5 6
7 8
RN75 10-8P4R
1 2
3 4
5 6
7 8
RN76 10-8P4R
1 2
3 4
5 6
7 8
RN77 10-8P4R
1 2
3 4
5 6
7 8
RN78 10-8P4R
1 2
3 4
5 6
7 8
5
H0_DR_MD4
H0_DR_MD0
H0_DR_MD5
H0_DR_MD1
H0_DR_MDQS9
H0_DR_MDQS0
H0_DR_MD6
H0_DR_MD2
H0_DR_MD7
H0_DR_MD3
H0_DR_MD8
H0_DR_MD12
H0_DR_MD9
H0_DR_MD13
H0_DR_MDQS1
H0_DR_MDQS10
H0_DR_MD14
H0_DR_MD15 H0_MD15
H0_DR_MD10
H0_DR_MD11
H0_DR_MCKEUP H0_MCKEUP
H0_DR_MCKELO
H0_DR_MD20
H0_DR_MD16
H0_DR_MD17
H0_DR_MD21
H0_DR_MDQS2
H0_DR_MDQS11
H0_DR_MAA12
H0_DR_MAA11
H0_DR_MAA9
H0_DR_MAA7
H0_DR_MD18
H0_DR_MD22
H0_DR_MD23
H0_DR_MD19
H0_DR_MD24
H0_DR_MD28
H0_DR_MD29
H0_DR_MD25
H0_DR_MDQS3
H0_DR_MDQS12
H0_DR_MD30
H0_DR_MD26
H0_DR_MAA3
H0_DR_MAA2
H0_DR_MAA1
H0_DR_MD27
H0_DR_MD31
H0_DR_MEMCHECK4
H0_DR_MEMCHECK5
H0_DR_MEMCHECK0
H0_DR_MEMCHECK1
H0_DR_MDQS8
H0_DR_MDQS17
H0_DR_MEMCHECK2
H0_DR_MEMCHECK6
H0_DR_MEMCHECK3
H0_DR_MEMCHECK7
H0_DR_MD32
H0_DR_MD36
H0_DR_MD37
H0_DR_MD33
H0_DR_MDQS4
H0_DR_MDQS13
H0_DR_MD34
H0_DR_MD38
H0_DR_MD39
H0_DR_MD35
H0_DR_MD44
H0_DR_MD40
H0_DR_MD45
H0_DR_MD41
H0_DR_MDQS14
H0_DR_MDQS5
H0_DR_MD42
H0_DR_MD46
H0_DR_MD43
H0_DR_MD47
H0_DR_-MCS1
H0_DR_-MCS2
H0_DR_-MCS3
H0_DR_MAA13
H0_DR_MD48
H0_DR_MD52
H0_DR_MD49
H0_DR_MD53
H0_DR_MDQS15
H0_DR_MD54
H0_DR_MDQS6
H0_DR_MD55
H0_DR_MD50
H0_DR_MD51
H0_DR_MD60
H0_DR_MD61
H0_DR_MD56
H0_DR_MD57
H0_DR_MDQS16
H0_DR_MD62
H0_DR_MDQS7
H0_DR_MD63
H0_DR_MD58
H0_DR_MD59
H0_DR_MEMCHECK4
H0_DR_MEMCHECK5
H0_DR_MEMCHECK0
H0_DR_MEMCHECK1
H0_DR_MEMCHECK2
H0_DR_MEMCHECK6
H0_DR_MEMCHECK3
H0_DR_MEMBAKA1
H0_DR_MEMCHECK7
H0_DR_MEMBAKA0
H0_DR_MD4
H0_DR_MD0
H0_DR_MD5
H0_DR_MD1
H0_DR_MDQS9
H0_DR_MDQS0
H0_DR_MD6
H0_DR_MD2
H0_DR_MD7
H0_DR_MD3
H0_DR_MD8
H0_DR_MD12
H0_DR_MD9
H0_DR_MD13
H0_DR_MDQS1
H0_DR_MDQS10
H0_DR_MD14
H0_DR_MD15
H0_DR_MD10
H0_DR_MCKEUP
H0_DR_MD11
H0_DR_MCKELO
H0_DR_MD20
H0_DR_MAA12
H0_DR_MD16
H0_DR_MD17
H0_DR_MD21
H0_DR_MDQS2
H0_DR_MAA11
H0_DR_MAA9
H0_DR_MDQS11
H0_DR_MD18
H0_DR_MD22
H0_DR_MAA8
H0_DR_MD23
H0_DR_MD19
H0_DR_MD24
H0_DR_MD28
H0_DR_MD29
H0_DR_MD25
H0_DR_MDQS3
H0_DR_MDQS12
H0_DR_MAA3
H0_DR_MD30
H0_DR_MD26
H0_DR_MD27
H0_DR_MAA2
H0_DR_MD31
H0_DR_MAA1
H0_DR_MDQS8
H0_DR_MAA0
H0_DR_MDQS17
H0_DR_MAA10
H0_DR_MD32
H0_DR_MD36
H0_DR_MD37
H0_DR_MD33
H0_DR_MDQS4
H0_DR_MDQS13
H0_DR_MD34
H0_DR_MD38
H0_DR_MD39
H0_DR_MD35
H0_DR_MD44
H0_DR_MD40
H0_DR_MD45
H0_DR_MD41
H0_DR_MDQS14
H0_DR_MDQS5
H0_DR_MD42
H0_DR_MD46
H0_DR_MD43
H0_DR_MD47
H0_DR_MD48
H0_DR_MD52
H0_DR_MD49
H0_DR_MD53
H0_DR_MAA13
H0_DR_MDQS15
H0_DR_MD54
H0_DR_MDQS6
H0_DR_MD55
H0_DR_MD50
H0_DR_MD51
H0_DR_MD60
H0_DR_MD61
H0_DR_MD56
H0_DR_MD57
H0_DR_MDQS16
H0_DR_MD62
H0_DR_MDQS7
H0_DR_MD63
H0_DR_MD58
H0_DR_MD59
4
RN43 47-8P4R
1 2
3 4
5 6
7 8
RN44 47-8P4R
1 2
3 4
5 6
7 8
RN45 47-8P4R
1 2
3 4
5 6
7 8
RN46 47-8P4R
1 2
3 4
5 6
7 8
RN47 47-8P4R
1 2
3 4
5 6
7 8
RN48 47-8P4R
1 2
3 4
5 6
7 8
RN49 47-8P4R
1 2
3 4
5 6
7 8
RN50 47-8P4R
1 2
3 4
5 6
7 8
RN51 47-8P4R
1 2
3 4
5 6
7 8
RN52 47-8P4R
1 2
3 4
5 6
7 8
RN53 47-8P4R
1 2
3 4
5 6
7 8
RN54 47-8P4R
1 2
3 4
5 6
7 8
RN55 47-8P4R
1 2
3 4
5 6
7 8
RN56 47-8P4R
1 2
3 4
5 6
7 8
RN41 47-8P4R
1 2
3 4
5 6
7 8
RN42 47-8P4R
1 2
3 4
5 6
7 8
RN57 47-8P4R
1 2
3 4
5 6
7 8
RN58 47-8P4R
1 2
3 4
5 6
7 8
RN59 47-8P4R
1 2
3 4
5 6
7 8
RN60 47-8P4R
1 2
3 4
5 6
7 8
RN61 47-8P4R
1 2
3 4
5 6
7 8
RN62 47-8P4R
1 2
3 4
5 6
7 8
RN63 47-8P4R
1 2
3 4
5 6
7 8
RN64 47-8P4R
1 2
3 4
5 6
7 8
RN65 47-8P4R
1 2
3 4
5 6
7 8
RN66 47-8P4R
1 2
3 4
5 6
7 8
P0_VTT_1.25V P0_VTT_1.25V
RN219 BOT/10-8P4R
H0_MD68
H0_MD64
H0_MD69
H0_MD65
H0_MDQS27
H0_MDQS18
H0_MD70
H0_MD66
H0_MD71
H0_MD67
H0_MD76
H0_MD73
H0_MD77
H0_MDQS28
H0_MD78
H0_MD79
H0_MD74
H0_MD75
H0_MD84
H0_MD80
H0_MD81
H0_MD85
H0_MDQS20
H0_MDQS29
H0_MD82
H0_MD86
H0_MAA8
H0_MAA5
H0_MAA6
H0_MAA4
H0_MD83
H0_MD87
H0_MD88
H0_MD92
H0_MD93
H0_MD89
H0_MDQS21
H0_MDQS30
H0_MD94
H0_MD90 H0_DR_MD90
H0_MD91
H0_MEMCHECK12
H0_MEMCHECK13
H0_MEMCHECK8
H0_MEMCHECK9
H0_MDQS35
H0_MDQS26
H0_MEMCHECK10
H0_MEMCHECK11
H0_MAA0
H0_MAA10
H0_MEMBAKA1
H0_MEMBAKA0
H0_MEMCHECK14
H0_MD100
H0_MD101
H0_MD97
H0_MDQS22
H0_MDQS31
H0_MD102
H0_MD103
H0_MD99
H0_MD108
H0_MD104
H0_MD109
H0_MD105
H0_-MSWEA
H0_-MSCASA
H0_-MSRASA
H0_-MCS0
H0_MDQS32
H0_MDQS23
H0_MD106
H0_MD110
H0_MD107
H0_MD111
H0_MD112
H0_MD113
H0_MD116
H0_MD117
H0_MDQS33
H0_MDQS24
H0_MD119
H0_MD114
H0_MD115 H0_DR_MD115
H0_MD125 H0_DR_MD125
H0_MD120 H0_DR_MD120
H0_MD121
H0_MDQS34
H0_MD126
H0_MDQS25
H0_MD127
H0_MD122
H0_MD123
7 8
5 6
3 4
1 2
RN218 BOT/10-8P4R
7 8
5 6
3 4
1 2
RN217 BOT/10-8P4R
7 8
5 6
3 4
1 2
RN216 BOT/10-8P4R
7 8
5 6
3 4
1 2
RN215 BOT/10-8P4R
7 8
5 6
3 4
1 2
RN214 BOT/10-8P4R
7 8
5 6
3 4
1 2
RN213 BOT/10-8P4R
7 8
5 6
3 4
1 2
RN212 BOT/10-8P4R
7 8
5 6
3 4
1 2
RN211 BOT/10-8P4R
7 8
5 6
3 4
1 2
RN210 BOT/10-8P4R
7 8
5 6
3 4
1 2
RN209 BOT/10-8P4R
7 8
5 6
3 4
1 2
RN208 BOT/10-8P4R
7 8
5 6
3 4
1 2
RN207 BOT/10-8P4R
7 8
5 6
3 4
1 2
RN206 BOT/10-8P4R
7 8
5 6
3 4
1 2
RN205 BOT/10-8P4R
7 8
5 6
3 4
1 2
RN204 BOT/10-8P4R
7 8
5 6
3 4
1 2
RN203 BOT/10-8P4R
7 8
5 6
3 4
1 2
RN202 BOT/10-8P4R
7 8
5 6
3 4
1 2
RN200 BOT/10-8P4R
7 8
5 6
3 4
1 2
RN201 BOT/10-8P4R
7 8
5 6
3 4
1 2
RN199 BOT/10-8P4R
7 8
5 6
3 4
1 2
RN198 BOT/10-8P4R
7 8
5 6
3 4
1 2
RN197 BOT/10-8P4R
7 8
5 6
3 4
1 2
RN196 BOT/10-8P4R
7 8
5 6
3 4
1 2
RN195 BOT/10-8P4R
7 8
5 6
3 4
1 2
RN194 BOT/10-8P4R
7 8
5 6
3 4
1 2
3
H0_DR_MD68
H0_DR_MD64
H0_DR_MD69
H0_DR_MD65 H0_MD1
H0_DR_MDQS27
H0_DR_MDQS18
H0_DR_MD70
H0_DR_MD66
H0_DR_MD71
H0_DR_MD67
H0_DR_MD72 H0_MD72
H0_DR_MD76
H0_DR_MD73
H0_DR_MD77
H0_DR_MDQS19 H0_MDQS19
H0_DR_MDQS28
H0_DR_MD78
H0_DR_MD79
H0_DR_MD74
H0_DR_MD75
H0_DR_MD84
H0_DR_MD80
H0_DR_MD81
H0_DR_MD85
H0_DR_MDQS20
H0_DR_MDQS29
H0_DR_MD82
H0_DR_MD86
H0_DR_MAA8
H0_DR_MAA5
H0_DR_MAA6
H0_DR_MAA4
H0_DR_MD83
H0_DR_MD87
H0_DR_MD88
H0_DR_MD92
H0_DR_MD93
H0_DR_MD89
H0_DR_MDQS21
H0_DR_MDQS30
H0_DR_MD94
H0_DR_MD91
H0_DR_MD95 H0_MD95
H0_DR_MEMCHECK12
H0_DR_MEMCHECK13
H0_DR_MEMCHECK8
H0_DR_MEMCHECK9
H0_DR_MDQS35
H0_DR_MDQS26
H0_DR_MEMCHECK10
H0_DR_MEMCHECK11
H0_DR_MAA0
H0_DR_MAA10
H0_DR_MEMBAKA1
H0_DR_MEMBAKA0
H0_DR_MEMCHECK14
H0_DR_MEMCHECK15 H0_MEMCHECK15
H0_DR_MD96 H0_MD96
H0_DR_MD100
H0_DR_MD101
H0_DR_MD97
H0_DR_MDQS22
H0_DR_MD98 H0_MD98
H0_DR_MDQS31
H0_DR_MD102
H0_DR_MD103
H0_DR_MD99
H0_DR_MD108
H0_DR_MD104
H0_DR_MD109
H0_DR_MD105
H0_DR_-MSWEA
H0_DR_-MSCASA
H0_DR_-MSRASA
H0_DR_-MCS0
H0_DR_MDQS32
H0_DR_MDQS23
H0_DR_MD106
H0_DR_MD110
H0_DR_MD107
H0_DR_MD111
H0_DR_MD112
H0_DR_MD113
H0_DR_MD116
H0_DR_MD117
H0_DR_MDQS33
H0_DR_MD118 H0_MD118
H0_DR_MDQS24
H0_DR_MD119
H0_DR_MD114
H0_DR_MD124 H0_MD124
H0_DR_MD121
H0_DR_MDQS34
H0_DR_MD126
H0_DR_MDQS25
H0_DR_MD127
H0_DR_MD122
H0_DR_MD123
H0_DR_MEMCHECK12
H0_DR_MEMCHECK13
H0_DR_MEMCHECK8
H0_DR_MEMCHECK9
H0_DR_MEMCHECK10
H0_DR_MEMCHECK11
H0_DR_MEMCHECK14
H0_DR_MEMCHECK15
H0_DR_MD68
H0_DR_MD64
H0_DR_MD69
H0_DR_MD65
H0_DR_MDQS27
H0_DR_MDQS18
H0_DR_MD70
H0_DR_MD66
H0_DR_MD71
H0_DR_MD67
H0_DR_MD72
H0_DR_MD76
H0_DR_MD73
H0_DR_MD77
H0_DR_MDQS19
H0_DR_MDQS28
H0_DR_MD78
H0_DR_MD79
H0_DR_MD74
H0_DR_MD75
H0_DR_MD84
H0_DR_MD80
H0_DR_MD81
H0_DR_MD85
H0_DR_MDQS20
H0_DR_MDQS29
H0_DR_MD82
H0_DR_MD86
H0_DR_MAA7
H0_DR_MD83
H0_DR_MD87
H0_DR_MAA5
H0_DR_MD88
H0_DR_MAA6
H0_DR_MD92
H0_DR_MD93
H0_DR_MD89
H0_DR_MDQS21
H0_DR_MDQS30
H0_DR_MAA4
H0_DR_MD94
H0_DR_MD90
H0_DR_MD91
H0_DR_MD95
H0_DR_MDQS26
H0_DR_MDQS35
H0_DR_MD96
H0_DR_MD100
H0_DR_MD101
H0_DR_MD97
H0_DR_MDQS22
H0_DR_MD98
H0_DR_MDQS31
H0_DR_MD102
H0_DR_MD103
H0_DR_MD99
H0_DR_MD108
H0_DR_MD104
H0_DR_-MSRASA
H0_DR_MD109
H0_DR_-MSWEA
H0_DR_MD105
H0_DR_-MSCASA
H0_DR_-MCS2
H0_DR_-MCS0
H0_DR_-MCS3
H0_DR_-MCS1
H0_DR_MDQS32
H0_DR_MDQS23
H0_DR_MD106
H0_DR_MD110
H0_DR_MD107
H0_DR_MD111
H0_DR_MD112
H0_DR_MD113
H0_DR_MD116
H0_DR_MD117
H0_DR_MDQS33
H0_DR_MD118
H0_DR_MDQS24
H0_DR_MD119
H0_DR_MD114
H0_DR_MD115
H0_DR_MD124
H0_DR_MD125
H0_DR_MD120
H0_DR_MD121
H0_DR_MDQS34
H0_DR_MD126
H0_DR_MDQS25
H0_DR_MD127
H0_DR_MD122
H0_DR_MD123
RN193 BOT/47-8P4R
7 8
5 6
3 4
1 2
RN192 BOT/47-8P4R
7 8
5 6
3 4
1 2
RN191 BOT/47-8P4R
7 8
5 6
3 4
1 2
RN190 BOT/47-8P4R
7 8
5 6
3 4
1 2
RN189 BOT/47-8P4R
7 8
5 6
3 4
1 2
RN188 BOT/47-8P4R
7 8
5 6
3 4
1 2
RN187 BOT/47-8P4R
7 8
5 6
3 4
1 2
RN186 BOT/47-8P4R
7 8
5 6
3 4
1 2
RN185 BOT/47-8P4R
7 8
5 6
3 4
1 2
RN184 BOT/47-8P4R
7 8
5 6
3 4
1 2
RN183 BOT/47-8P4R
7 8
5 6
3 4
1 2
RN182 BOT/47-8P4R
7 8
5 6
3 4
1 2
RN181 BOT/47-8P4R
7 8
5 6
3 4
1 2
RN180 BOT/47-8P4R
7 8
5 6
3 4
1 2
RN169 BOT/47-8P4R
7 8
5 6
3 4
1 2
RN168 BOT/47-8P4R
7 8
5 6
3 4
1 2
RN179 BOT/47-8P4R
7 8
5 6
3 4
1 2
RN178 BOT/47-8P4R
7 8
5 6
3 4
1 2
RN177 BOT/47-8P4R
7 8
5 6
3 4
1 2
RN176 BOT/47-8P4R
7 8
5 6
3 4
1 2
RN175 BOT/47-8P4R
7 8
5 6
3 4
1 2
RN174 BOT/47-8P4R
7 8
5 6
3 4
1 2
RN173 BOT/47-8P4R
7 8
5 6
3 4
1 2
RN172 BOT/47-8P4R
7 8
5 6
3 4
1 2
RN171 BOT/47-8P4R
7 8
5 6
3 4
1 2
RN170 BOT/47-8P4R
7 8
5 6
3 4
1 2
2
H0_MDQS[35..0] 11
H0_MD[127..0] 11
H0_MEMCHECK[15..0] 11
H0_MAA[13..0] 11
H0_-MCS[3..0] 11
H0_MCKELO 11
H0_MCKEUP 11
H0_MEMBAKA0 11
H0_MEMBAKA1 11
H0_-MSRASA 11
H0_-MSCASA 11
H0_-MSWEA 11
H0_DR_MDQS[35..0] 15,16
H0_DR_MD[127..0] 15,16
H0_DR_MEMCHECK[15..0] 15,16
H0_DR_MAA[13..0] 15,16
H0_DR_-MCS[3..0] 15,16
H0_DR_MCKELO 15,16
H0_DR_MCKEUP 15,16
H0_DR_MEMBAKA0 15,16
H0_DR_MEMBAKA1 15,16
H0_DR_-MSRASA 15,16
H0_DR_-MSCASA 15,16
H0_DR_-MSWEA 15,16
H0_MDQS[35..0]
H0_MD[127..0]
H0_MEMCHECK[15..0]
H0_MAA[13..0]
H0_-MCS[3..0]
H0_MCKELO
H0_MCKEUP
H0_MEMBAKA0
H0_MEMBAKA1
H0_-MSRASA
H0_-MSCASA
H0_-MSWEA
H0_DR_MDQS[35..0]
H0_DR_MD[127..0]
H0_DR_MEMCHECK[15..0]
H0_DR_MAA[13..0]
H0_DR_-MCS[3..0]
H0_DR_MCKELO
H0_DR_MCKEUP
H0_DR_MEMBAKA0
H0_DR_MEMBAKA1
H0_DR_-MSRASA
H0_DR_-MSCASA
H0_DR_-MSWEA
Micro-Star Int'l Co., Ltd.
No.69, Li-De St, Jung-He City, Taipei Hsien, Taiwan. http://www.msi.com.tw
Title
Size Document Number Rev
Date: Sheet
CPU0 DDR Terminations
MS-9166
1
17 69 Friday, May 20, 2005
0C C
of
5
LAYOUT:
Place alternating caps to GND and VDD_25_SUS in a single line
P0_VDIMM_2.5V
D D
along VTT island.
C441
C439
.1u_16V
.1u_16V
C443
.1u_16V
C445
.1u_16V
P0_VTT_1.25V
P0_VDIMM_2.5V
P0_VTT_1.25V
P0_VTT_1.25V
C472
.1u_16V
C495
.1u_16V
C457
.1u_16V
C497
.1u_16V
C474
.1u_16V
C609
.1u_16V
C459
.1u_16V
C440
.1u_16V
C437
.1u_16V
C476
.1u_16V
C444
.1u_16V
4
C447
.1u_16V
C461
.1u_16V
C446
.1u_16V
C464
.1u_16V
C478
.1u_16V
C448
.1u_16V
C449
.1u_16V
C496
.1u_16V
C450
.1u_16V
C466
.1u_16V
C494
.1u_16V
C452
.1u_16V
C451
.1u_16V
C492
.1u_16V
C601
.1u_16V
C468
.1u_16V
C490
.1u_16V
C454
.1u_16V
C453
.1u_16V
C488
.1u_16V
C456
.1u_16V
C470
.1u_16V
C486
.1u_16V
C458
.1u_16V
3
C455
.1u_16V
C484
.1u_16V
C460
.1u_16V
C684
4.7u_6.3V-0805
C482
.1u_16V
C462
.1u_16V
C480
.1u_16V
C438
.1u_16V
C498
.1u_16V
2
1
P0_VTT_1.25V
C C
C442
.1u_16V
C463
.1u_16V
C465
.1u_16V
C467
.1u_16V
C469
.1u_16V
C471
.1u_16V
C473
.1u_16V
C475
.1u_16V
C477
.1u_16V
C479
.1u_16V
C481
.1u_16V
C483
.1u_16V
C485
.1u_16V
C487
.1u_16V
C489
.1u_16V
C491
.1u_16V
C493
.1u_16V
AROUND VTT POWER RAIL BETWEEN DIMM AND CPU
P0_VDIMM_2.5V
P0_VTT_1.25V
P0_VDIMM_2.5V
B B
P0_VTT_1.25V
P0_VDIMM_2.5V
C716
.22u_16V
C1180
BOT/.1u_16V
C1216
BOT/.1u_16V
C1290
BOT/.22u_16V
C1182
BOT/.1u_16V
C1214
BOT/.1u_16V
C580
.22u_16V
C1178
BOT/.1u_16V
C1212
BOT/.1u_16V
P0_VTT_1.25V
P0_VTT_1.25V
P0_VTT_1.25V
A A
C1185
BOT/.1u_16V
C1217
BOT/.1u_16V
P0_VTT_1.25V
C1321
BOT/.1u_16V
5
C1183
BOT/.1u_16V
C1231
BOT/.1u_16V
C736
.1u_16V
C428
.1u_16V
C1181
BOT/.1u_16V
C1215
BOT/.1u_16V
C555
.1u_16V
C1176
BOT/.1u_16V
C1210
BOT/.1u_16V
C1179
BOT/.1u_16V
C1213
BOT/.1u_16V
4
C714
.22u_16V
C1174
BOT/.1u_16V
C1208
BOT/.1u_16V
C1177
BOT/.1u_16V
C1211
BOT/.1u_16V
C668
.22u_16V
C1172
BOT/.1u_16V
C1206
BOT/.1u_16V
C1175
BOT/.1u_16V
C1209
BOT/.1u_16V
BOT/.22u_16V
C1170
BOT/.1u_16V
C1204
BOT/.1u_16V
C1173
BOT/.1u_16V
C1207
BOT/.1u_16V
C1274
C1168
BOT/.1u_16V
C1202
BOT/.1u_16V
C1171
BOT/.1u_16V
C1205
BOT/.1u_16V
C1235
BOT/.22u_16V
C1166
BOT/.1u_16V
C1200
BOT/.1u_16V
C1169
BOT/.1u_16V
C1203
BOT/.1u_16V
3
C712
.22u_16V
C1164
BOT/.1u_16V
C1198
BOT/.1u_16V
C1167
BOT/.1u_16V
C1201
BOT/.1u_16V
C574
.22u_16V
C1162
BOT/.1u_16V
C1196
BOT/.1u_16V
C1165
BOT/.1u_16V
C1199
BOT/.1u_16V
C1160
BOT/.1u_16V
C1194
BOT/.1u_16V
C1163
BOT/.1u_16V
C1197
BOT/.1u_16V
C539
.22u_16V
C1158
BOT/.1u_16V
C1192
BOT/.1u_16V
C1161
BOT/.1u_16V
C1195
BOT/.1u_16V
C1156
BOT/.1u_16V
C1190
BOT/.1u_16V
C1159
BOT/.1u_16V
C1193
BOT/.1u_16V
2
C1157
BOT/.1u_16V
C1191
BOT/.1u_16V
C1186
BOT/.1u_16V
C1155
BOT/.1u_16V
C1189
BOT/.1u_16V
C1184
BOT/.1u_16V
C1187
BOT/.1u_16V
C1188
BOT/.1u_16V
Micro-Star Int'l Co., Ltd.
No.69, Li-De St, Jung-He City, Taipei Hsien, Taiwan. http://www.msi.com.tw
Title
Size Document Number Rev
Date: Sheet
CPU0 DDR Decoupling(1)
MS-9166
1
0C B
of
18 69 Friday, May 20, 2005
5
4
3
2
1
P0_VDIMM_2.5V
1200u_4V/Sanyo
EC40
EC37
D D
1200u_4V/Sanyo
P0_VDIMM_2.5V
BOT/100u_6.3V/MLCC/1210
P0_VDIMM_2.5V
C C
4.7u_6.3V-0805
EC38
1200u_4V/Sanyo
OS-CON CAP. ESR=12mohm Ripplecurrent=5.04A X 3
Put close to dimm socket
CT41
C667
BOT/100u_6.3V/MLCC/1210
C663
4.7u_6.3V-0805
CT47
EC54
3300u/6.3V
C604
4.7u_6.3V-0805
P0_VTT_1.25V
C1300
BOT/4.7u_6.3V-0805
CT46
BOT/100u_6.3V/MLCC/1210
C665
4.7u_6.3V-0805
4.7u_6.3V-0805
BOT/4.7u_6.3V-0805
CT42
BOT/100u_6.3V/MLCC/1210
C578
C664
4.7u_6.3V-0805
C1319
CT19
100u_6.3V/MLCC
C721
4.7u_6.3V-0805
C409
4.7u_6.3V-0805
CT55
BOT/100u_6.3V/MLCC/1210
These caps are at both ends of dimm
P0_VDIMM_2.5V
C558
.22u_16V
P0_VDIMM_2.5V
B B
C1246
BOT/.1u_16V
C577
.22u_16V
C1267
BOT/.1u_16V
C1263
BOT/.1u_16V
C1266
BOT/.22u_16V
C1247
BOT/.1u_16V
C606
.22u_16V
C1277
BOT/.1u_16V
C579
.22u_16V
C1262
BOT/.1u_16V
C605
.22u_16V
C1276
BOT/.1u_16V
C608
.22u_16V
C1268
BOT/.1u_16V
C660
4.7u_6.3V-0805
P0_VTT_1.25V
1200u_4V/Sanyo
P0_VTT_1.25V
P0_VTT_1.25V
C659
.22u_16V
C559
4.7u_6.3V-0805
EC39
CT53
BOT/100u_6.3V/MLCC/1210
C713
.22u_16V
C1302
BOT/4.7u_6.3V-0805
CT7
100u_6.3V/MLCC
CT26
100u_6.3V/MLCC
C738
.22u_16V
CT37
BOT/100u_6.3V/MLCC/1210
C1313
BOT/.22u_16V
CT18
100u_6.3V/MLCC
C1297
BOT/.22u_16V
P0_VTT_1.25V
CT54
BOT/100u_6.3V/MLCC/1210
CT22
100u_6.3V/MLCC
C527
.22u_16V
C1314
BOT/.01u_50V
C537
.22u_16V
C1301
BOT/.01u_50V
CT24
100u_6.3V/MLCC
CT14
100u_6.3V/MLCC
C523
.22u_16V
CT52
BOT/100u_6.3V/MLCC/1210
CT10
100u_6.3V/MLCC
C560
.22u_16V
C1304
BOT/.01u_50V
C533
.22u_16V
C1320
BOT/.01u_50V
CT20
100u_6.3V/MLCC
P0_VDIMM_2.5V
P0_VTT_1.25V
C1315
BOT/4.7u_6.3V-0805
P0_VTT_1.25V
A A
C1264
BOT/4.7u_6.3V-0805
C683
.22u_16V
C1265
BOT/.22u_16V
5
C503
4.7u_6.3V-0805
C1293
BOT/4.7u_6.3V-0805
These caps are along the path from
regulator to CPU
C1336
BOT/.22u_16V
C1280
BOT/.22u_16V
C1331
BOT/4.7u_6.3V-0805
C1283
BOT/4.7u_6.3V-0805
4
C499
.22u_16V
C436
.22u_16V
C522
4.7u_6.3V-0805
C666
4.7u_6.3V-0805
C662
.22u_16V
C1291
BOT/.22u_16V
3
C556
.22u_16V
C557
.22u_16V
C1318
BOT/.22u_16V
C1309
BOT/.22u_16V
2
C1303
BOT/.22u_16V
C1305
BOT/.22u_16V
C1307
BOT/.22u_16V
C1308
BOT/.22u_16V
Micro-Star Int'l Co., Ltd.
No.69, Li-De St, Jung-He City, Taipei Hsien, Taiwan. http://www.msi.com.tw
Title
Size Document Number Rev
Date: Sheet
CPU0 DDR Decoupling(2)
MS-9166
19 69 Friday, May 20, 2005
1
C607
.22u_16V
0C B
of
5
+1.2V_HT
AB10
VLDT_2(1)
AC11
VLDT_2(2)
AD10
VLDT_2(3)
AD8
VLDT_2(4)
AB14
VLDT_2(5)
TP27
TP26
3/7 update
AC15
VLDT_2(6)
AB16
VLDT_2(7)
AC16
VLDT_2(8)
AC9
VLDT_2(9)
AG11
L2_CADIN_H(15)
AG12
L2_CADIN_L(15)
AJ10
L2_CADIN_H(14)
AH10
L2_CADIN_L(14)
AG9
L2_CADIN_H(13)
AG10
L2_CADIN_L(13)
AJ8
L2_CADIN_H(12)
AH8
L2_CADIN_L(12)
AJ6
L2_CADIN_H(11)
AH6
L2_CADIN_L(11)
AG5
L2_CADIN_H(10)
AG6
L2_CADIN_L(10)
AJ4
L2_CADIN_H(9)
AH4
L2_CADIN_L(9)
AG3
L2_CADIN_H(8)
AG4
L2_CADIN_L(8)
AJ11
L2_CADIN_H(7)
AK11
L2_CADIN_L(7)
AL9
L2_CADIN_H(6)
AL10
L2_CADIN_L(6)
AJ9
L2_CADIN_H(5)
AK9
L2_CADIN_L(5)
AL7
L2_CADIN_H(4)
AL8
L2_CADIN_L(4)
AL5
L2_CADIN_H(3)
AL6
L2_CADIN_L(3)
AJ5
L2_CADIN_H(2)
AK5
L2_CADIN_L(2)
AL3
L2_CADIN_H(1)
AL4
L2_CADIN_L(1)
AJ3
L2_CADIN_H(0)
AK3
L2_CADIN_L(0)
AG7
L2_CLKIN_H(1)
AG8
L2_CLKIN_L(1)
AJ7
L2_CLKIN_H(0)
AK7
L2_CLKIN_L(0)
AL11
L2_CTLIN_H(0)
AL12
L2_CTLIN_L(0)
AJ12
L2_RSVD1
AH12
L2_RSVD2
P1_VDIMM_2.5V
R548
22_1%
R544
22_1%
D D
5
P0_TO_P1_CADOUT_H15
P0_TO_P1_CADOUT_L15
P0_TO_P1_CADOUT_H14
P0_TO_P1_CADOUT_L14
P0_TO_P1_CADOUT_H13
P0_TO_P1_CADOUT_L13
P0_TO_P1_CADOUT_H12
P0_TO_P1_CADOUT_L12
P0_TO_P1_CADOUT_H11
P0_TO_P1_CADOUT_L11
P0_TO_P1_CADOUT_H10
P0_TO_P1_CADOUT_L10
P0_TO_P1_CADOUT_H9
P0_TO_P1_CADOUT_L9
P0_TO_P1_CADOUT_H8
P0_TO_P1_CADOUT_L8
P0_TO_P1_CADOUT_H7
P0_TO_P1_CADOUT_L7
P0_TO_P1_CADOUT_H6
P0_TO_P1_CADOUT_L6
P0_TO_P1_CADOUT_H5
P0_TO_P1_CADOUT_L5
P0_TO_P1_CADOUT_H4
P0_TO_P1_CADOUT_L4
P0_TO_P1_CADOUT_H3
P0_TO_P1_CADOUT_L3
P0_TO_P1_CADOUT_H2
P0_TO_P1_CADOUT_L2
P0_TO_P1_CADOUT_H1
P0_TO_P1_CADOUT_L1
P0_TO_P1_CADOUT_H0
P0_TO_P1_CADOUT_L0
P0_TO_P1_CADOUT_H[15..0] 11
P0_TO_P1_CADOUT_L[15..0] 11
C C
B B
A A
P0_TO_P1_CLKOUT_H1 11
P0_TO_P1_CLKOUT_L1 11
P0_TO_P1_CLKOUT_H0 11
P0_TO_P1_CLKOUT_L0 11
P0_TO_P1_CTLOUT_H0 11
P0_TO_P1_CTLOUT_L0 11
R504, R497 change to 22ohm reduce ripple
voltage. 03/07.
SledgeHammer
C549
.1u_16V
C548
.1u_16V
CPU2F
L2_CADOUT_H(15)
L2_CADOUT_L(15)
L2_CADOUT_H(14)
L2_CADOUT_L(14)
L2_CADOUT_H(13)
L2_CADOUT_L(13)
L2_CADOUT_H(12)
L2_CADOUT_L(12)
L2_CADOUT_H(11)
L2_CADOUT_L(11)
L2_CADOUT_H(10)
L2_CADOUT_L(10)
L2_CADOUT_H(9)
L2_CADOUT_L(9)
L2_CADOUT_H(8)
L2_CADOUT_L(8)
L2_CADOUT_H(7)
L2_CADOUT_L(7)
L2_CADOUT_H(6)
L2_CADOUT_L(6)
L2_CADOUT_H(5)
L2_CADOUT_L(5)
L2_CADOUT_H(4)
L2_CADOUT_L(4)
L2_CADOUT_H(3)
L2_CADOUT_L(3)
L2_CADOUT_H(2)
L2_CADOUT_L(2)
L2_CADOUT_H(1)
L2_CADOUT_L(1)
L2_CADOUT_H(0)
L2_CADOUT_L(0)
L2_CLKOUT_H(1)
L2_CLKOUT_L(1)
L2_CLKOUT_H(0)
L2_CLKOUT_L(0)
L2_CTLOUT_H(0)
L2_CTLOUT_L(0)
L2_RSVD3
L2_RSVD4
C546
102p_50V
4
P1_TO_P0_CADOUT_H15
AH14
P1_TO_P0_CADOUT_L15
AJ14
P1_TO_P0_CADOUT_H14
AG16
P1_TO_P0_CADOUT_L14
AG15
P1_TO_P0_CADOUT_H13
AH16
P1_TO_P0_CADOUT_L13
AJ16
P1_TO_P0_CADOUT_H12
AG18
P1_TO_P0_CADOUT_L12
AG17
P1_TO_P0_CADOUT_H11
AG20
P1_TO_P0_CADOUT_L11
AG19
P1_TO_P0_CADOUT_H10
AH20
P1_TO_P0_CADOUT_L10
AJ20
P1_TO_P0_CADOUT_H9
AG22
P1_TO_P0_CADOUT_L9
AG21
P1_TO_P0_CADOUT_H8
AH22
P1_TO_P0_CADOUT_L8
AJ22
P1_TO_P0_CADOUT_H7
AL14
P1_TO_P0_CADOUT_L7
AL13
P1_TO_P0_CADOUT_H6
AK15
P1_TO_P0_CADOUT_L6
AJ15
P1_TO_P0_CADOUT_H5
AL16
P1_TO_P0_CADOUT_L5
AL15
P1_TO_P0_CADOUT_H4
AK17
P1_TO_P0_CADOUT_L4
AJ17
P1_TO_P0_CADOUT_H3
AK19
P1_TO_P0_CADOUT_L3
AJ19
P1_TO_P0_CADOUT_H2
AL20
P1_TO_P0_CADOUT_L2
AL19
P1_TO_P0_CADOUT_H1
AK21
P1_TO_P0_CADOUT_L1
AJ21
P1_TO_P0_CADOUT_H0
AL22
P1_TO_P0_CADOUT_L0
AL21
AH18
AJ18
AL18
AL17
AK13
AJ13
AG13
AG14
C1251
BOT/.1u_16V
C1250
BOT/.1u_16V
H1_MEMRESET1_L
4
TP28
TP29
P1_VREF0_DDR
R1050 0
P1_VDIMM_2.5V
P1_TO_P0_CADOUT_H[15..0] 11
P1_TO_P0_CADOUT_L[15..0] 11
TO CPU0 FROM CPU0
P1_TO_P0_CLKOUT_H1 11
P1_TO_P0_CLKOUT_L1 11
P1_TO_P0_CLKOUT_H0 11
P1_TO_P0_CLKOUT_L0 11
P1_TO_P0_CTLOUT_H0 11
P1_TO_P0_CTLOUT_L0 11
H1_MEMRESET_L 24,25
TO DIMM
3
P1_VTT_1.25V
AC19
VTT1
AE19
VTT2
J19
VTT3
H19
P1_VTT_1.25V
R563
51_1%
P1_VTT_SENSE 6 H1_MEMCLK_H2 25
P1_VREF0_DDR
H1_MDQS[35..0] 26
3
R532 42.2_1%
R531 42.2_1%
H1_MD[127..64] 26
H1_MD127
H1_MD126
H1_MD125
H1_MD124
H1_MD123
H1_MD122
H1_MD121
H1_MD120
H1_MD119
H1_MD118
H1_MD117
H1_MD116
H1_MD115
H1_MD114
H1_MD113
H1_MD112
H1_MD111
H1_MD110
H1_MD109
H1_MD108
H1_MD107
H1_MD106
H1_MD105
H1_MD104
H1_MD103
H1_MD102
H1_MD101
H1_MD100
H1_MD99
H1_MD98
H1_MD97
H1_MD96
H1_MD95
H1_MD94
H1_MD93
H1_MD92
H1_MD91
H1_MD90
H1_MD89
H1_MD88
H1_MD87
H1_MD86
H1_MD85
H1_MD84
H1_MD83
H1_MD82
H1_MD81
H1_MD80
H1_MD79
H1_MD78
H1_MD77
H1_MD76
H1_MD75
H1_MD74
H1_MD73
H1_MD72
H1_MD71
H1_MD70
H1_MD69
H1_MD68
H1_MD67
H1_MD66
H1_MD65
H1_MD64
H1_MDQS35
H1_MDQS34
H1_MDQS33
H1_MDQS32
H1_MDQS31
H1_MDQS30
H1_MDQS29
H1_MDQS28
H1_MDQS27
H1_MDQS26
H1_MDQS25
H1_MDQS24
H1_MDQS23
H1_MDQS22
H1_MDQS21
H1_MDQS20
H1_MDQS19
H1_MDQS18
H1_MDQS17
H1_MDQS16
H1_MDQS15
H1_MDQS14
H1_MDQS13
H1_MDQS12
H1_MDQS11
H1_MDQS10
H1_MDQS9
H1_MDQS8
H1_MDQS7
H1_MDQS6
H1_MDQS5
H1_MDQS4
H1_MDQS3
H1_MDQS2
H1_MDQS1
H1_MDQS0
AE18
AC18
AF18
AF19
AF17
AE16
AF22
AG24
AH25
AG26
AH27
AF23
AH24
AF25
AG27
AF26
AF28
AE29
AH29
AE27
AD26
AD27
AC26
AA26
AA28
AD28
AC27
AB29
AA27
AG25
AF27
AB27
AF24
AG28
AC28
AD29
AA31
AL25
AL29
AE31
F20
G19
F21
F22
AJ26
AJ29
Y27
Y28
V28
U26
Y26
W27
V27
U27
P28
N29
M26
L28
P27
P26
M27
L27
K29
K27
H28
G29
L26
H27
H26
F27
F26
D29
D27
G27
F28
E27
C27
C26
E25
D24
F23
E26
F25
E24
G23
R27
W29
N27
E29
F24
R28
V26
M28
E28
D25
U31
AJ25
AJ30
M30
H30
C30
B25
T31
Y29
M29
H29
C29
C25
J28
J27
J26
VTT4
VTT5
VTT6
VTT7
VTT8
VTT9
VTT10
VTT_SENSE
MEMZN
MEMZP
MEMVREF0
MEMVREF1
MEMDATA(127)
MEMDATA(126)
MEMDATA(125)
MEMDATA(124)
MEMDATA(123)
MEMDATA(122)
MEMDATA(121)
MEMDATA(120)
MEMDATA(119)
MEMDATA(118)
MEMDATA(117)
MEMDATA(116)
MEMDATA(115)
MEMDATA(114)
MEMDATA(113)
MEMDATA(112)
MEMDATA(111)
MEMDATA(110)
MEMDATA(109)
MEMDATA(108)
MEMDATA(107)
MEMDATA(106)
MEMDATA(105)
MEMDATA(104)
MEMDATA(103)
MEMDATA(102)
MEMDATA(101)
MEMDATA(100)
MEMDATA(99)
MEMDATA(98)
MEMDATA(97)
MEMDATA(96)
MEMDATA(95)
MEMDATA(94)
MEMDATA(93)
MEMDATA(92)
MEMDATA(91)
MEMDATA(90)
MEMDATA(89)
MEMDATA(88)
MEMDATA(87)
MEMDATA(86)
MEMDATA(85)
MEMDATA(84)
MEMDATA(83)
MEMDATA(82)
MEMDATA(81)
MEMDATA(80)
MEMDATA(79)
MEMDATA(78)
MEMDATA(77)
MEMDATA(76)
MEMDATA(75)
MEMDATA(74)
MEMDATA(73)
MEMDATA(72)
MEMDATA(71)
MEMDATA(70)
MEMDATA(69)
MEMDATA(68)
MEMDATA(67)
MEMDATA(66)
MEMDATA(65)
MEMDATA(64)
MEMDQS(35)
MEMDQS(34)
MEMDQS(33)
MEMDQS(32)
MEMDQS(31)
MEMDQS(30)
MEMDQS(29)
MEMDQS(28)
MEMDQS(27)
MEMDQS(26)
MEMDQS(25)
MEMDQS(24)
MEMDQS(23)
MEMDQS(22)
MEMDQS(21)
MEMDQS(20)
MEMDQS(19)
MEMDQS(18)
MEMDQS(17)
MEMDQS(16)
MEMDQS(15)
MEMDQS(14)
MEMDQS(13)
MEMDQS(12)
MEMDQS(11)
MEMDQS(10)
MEMDQS(9)
MEMDQS(8)
MEMDQS(7)
MEMDQS(6)
MEMDQS(5)
MEMDQS(4)
MEMDQS(3)
MEMDQS(2)
MEMDQS(1)
MEMDQS(0)
SledgeHammer
CPU2B
MEMCLK_UP_H(3)
MEMCLK_UP_L(3)
MEMCLK_UP_H(2)
MEMCLK_UP_L(2)
MEMCLK_UP_H(1)
MEMCLK_UP_L(1)
MEMCLK_UP_H(0)
MEMCLK_UP_L(0)
MEMCLK_LO_H(3)
MEMCLK_LO_L(3)
MEMCLK_LO_H(2)
MEMCLK_LO_L(2)
MEMCLK_LO_H(1)
MEMCLK_LO_L(1)
MEMCLK_LO_H(0)
MEMCLK_LO_L(0)
MEMCKE_UP
MEMCKE_LO
RSVD_MA(15)
RSVD_MA(14)
MEMADD(13)
MEMADD(12)
MEMADD(11)
MEMADD(10)
MEMADD(9)
MEMADD(8)
MEMADD(7)
MEMADD(6)
MEMADD(5)
MEMADD(4)
MEMADD(3)
MEMADD(2)
MEMADD(1)
MEMADD(0)
MEMDATA(63)
MEMDATA(62)
MEMDATA(61)
MEMDATA(60)
MEMDATA(59)
MEMDATA(58)
MEMDATA(57)
MEMDATA(56)
MEMDATA(55)
MEMDATA(54)
MEMDATA(53)
MEMDATA(52)
MEMDATA(51)
MEMDATA(50)
MEMDATA(49)
MEMDATA(48)
MEMDATA(47)
MEMDATA(46)
MEMDATA(45)
MEMDATA(44)
MEMDATA(43)
MEMDATA(42)
MEMDATA(41)
MEMDATA(40)
MEMDATA(39)
MEMDATA(38)
MEMDATA(37)
MEMDATA(36)
MEMDATA(35)
MEMDATA(34)
MEMDATA(33)
MEMDATA(32)
MEMDATA(31)
MEMDATA(30)
MEMDATA(29)
MEMDATA(28)
MEMDATA(27)
MEMDATA(26)
MEMDATA(25)
MEMDATA(24)
MEMDATA(23)
MEMDATA(22)
MEMDATA(21)
MEMDATA(20)
MEMDATA(19)
MEMDATA(18)
MEMDATA(17)
MEMDATA(16)
MEMDATA(15)
MEMDATA(14)
MEMDATA(13)
MEMDATA(12)
MEMDATA(11)
MEMDATA(10)
MEMDATA(9)
MEMDATA(8)
MEMDATA(7)
MEMDATA(6)
MEMDATA(5)
MEMDATA(4)
MEMDATA(3)
MEMDATA(2)
MEMDATA(1)
MEMDATA(0)
MEMRESET_L
MEMBANK(1)
MEMBANK(0)
MEMRAS_L
MEMCAS_L
MEMWE_L
MEMCHECK(15)
MEMCHECK(14)
MEMCHECK(13)
MEMCHECK(12)
MEMCHECK(11)
MEMCHECK(10)
MEMCHECK(9)
MEMCHECK(8)
MEMCHECK(7)
MEMCHECK(6)
MEMCHECK(5)
MEMCHECK(4)
MEMCHECK(3)
MEMCHECK(2)
MEMCHECK(1)
MEMCHECK(0)
MEMCS_L(7)
MEMCS_L(6)
MEMCS_L(5)
MEMCS_L(4)
MEMCS_L(3)
MEMCS_L(2)
MEMCS_L(1)
MEMCS_L(0)
2
2
G20
G21
AE21
AE20
H1_MEMCLK_H3
L24
H1_MEMCLK_L3
L25
H1_MEMCLK_H1
R23
H1_MEMCLK_L1
T23
H23
J23
AD21
AD20
H1_MEMCLK_H2
Y23
H1_MEMCLK_L2
AA23
H1_MEMCLK_H0
U25
H1_MEMCLK_L0
U24
H1_MCKEUP
H24
H1_MCKELO
H25
V23
M23
H1_MAA13
AE23
H1_MAA12
J24
H1_MAA11
J25
H1_MAA10
V24
H1_MAA9
K23
H1_MAA8
L23
H1_MAA7
K25
H1_MAA6
M25
H1_MAA5
M24
H1_MAA4
N25
H1_MAA3
N23
H1_MAA2
P23
H1_MAA1
T25
H1_MAA0
V25
H1_MD63
AJ24
H1_MD62
AK25
H1_MD61
AK27
H1_MD60
AJ27
H1_MD59
AL24
H1_MD58
AK24
H1_MD57
AL26
H1_MD56
AL27
H1_MD55
AJ28
H1_MD54
AK30
H1_MD53
AJ31
H1_MD52
AG29
H1_MD51
AL28
H1_MD50
AK28
H1_MD49
AH31
H1_MD48
AG30
H1_MD47
AG31
H1_MD46
AF30
H1_MD45
AD31
H1_MD44
AC30
H1_MD43
AF29
H1_MD42
AF31
H1_MD41
AD30
H1_MD40
AC29
H1_MD39
AB31
H1_MD38
AA29
H1_MD37
Y31
H1_MD36
W31
H1_MD35
AC31
H1_MD34
AA30
H1_MD33
Y30
H1_MD32
V29
H1_MD31
P31
H1_MD30
M31
H1_MD29
L30
H1_MD28
L29
H1_MD27
P29
H1_MD26
N31
H1_MD25
L31
H1_MD24
K31
H1_MD23
J30
H1_MD22
J29
H1_MD21
G31
H1_MD20
F29
H1_MD19
J31
H1_MD18
H31
H1_MD17
F31
H1_MD16
F30
H1_MD15
D31
H1_MD14
C31
H1_MD13
B30
H1_MD12
C28
H1_MD11
E31
H1_MD10
E30
H1_MD9
A29
H1_MD8
B28
H1_MD7
B27
H1_MD6
A26
H1_MD5
C24
H1_MD4
A24
H1_MD3
A28
H1_MD2
A27
H1_MD1
A25
H1_MD0
B24
H1_MEMRESET1_L
G25
W25
W23
H1_-MSRASA
Y25
H1_-MSCASA
AA25
Y24
H1_MEMCHECK15
U28
H1_MEMCHECK14
T29
H1_MEMCHECK13
P24
H1_MEMCHECK12
P25
H1_MEMCHECK11
T27
H1_MEMCHECK10
R26
H1_MEMCHECK9
R25
H1_MEMCHECK8
R24
H1_MEMCHECK7
V30
H1_MEMCHECK6
U29
H1_MEMCHECK5
R30
H1_MEMCHECK4
P30
H1_MEMCHECK3
V31
H1_MEMCHECK2
U30
H1_MEMCHECK1
R29
H1_MEMCHECK0
R31
AD23
AE25
AD24
AD25
H1_-MCS3
AC24
H1_-MCS2
AC25
H1_-MCS1
AB25
H1_-MCS0
AA24
H1_MEMCLK_H3 25
H1_MEMCLK_L3 25
H1_MEMCLK_H1 24
H1_MEMCLK_L1 24
H1_MEMCLK_L2 25
H1_MEMCLK_H0 24
H1_MEMCLK_L0 24
H1_MCKEUP 26
H1_MCKELO 26
H1_MAA[13..0] 26
H1_MD[63..0] 26
H1_MEMBAKA1 26
H1_MEMBAKA0 26
H1_-MSRASA 26
H1_-MSCASA 26
H1_-MSWEA 26
H1_MEMCHECK15 26
H1_MEMCHECK14 26
H1_MEMCHECK13 26
H1_MEMCHECK12 26
H1_MEMCHECK11 26
H1_MEMCHECK10 26
H1_MEMCHECK9 26
H1_MEMCHECK8 26
H1_MEMCHECK7 26
H1_MEMCHECK6 26
H1_MEMCHECK5 26
H1_MEMCHECK4 26
H1_MEMCHECK3 26
H1_MEMCHECK2 26
H1_MEMCHECK1 26
H1_MEMCHECK0 26
H1_-MCS3 26
H1_-MCS2 26
H1_-MCS1 26
H1_-MCS0 26
1
H1_MEMCLK_H0
H1_MEMCLK_L0
H1_MEMCLK_H1
H1_MEMCLK_L1
H1_MEMCLK_H2
H1_MEMCLK_L2
H1_MEMCLK_H3
H1_MEMCLK_L3
R1005
BOT/120_1%/
R1004
BOT/120_1%/
R1007
BOT/120_1%/
R1006
BOT/120_1%/
Micro-Star Int'l Co., Ltd.
No.69, Li-De St, Jung-He City, Taipei Hsien, Taiwan. http://www.msi.com.tw
Title
Size Document Number Rev
Date: Sheet
CPU1 DDR & HT1
MS-9166
1
of
20 69 Friday, May 20, 2005
0C C
5
4
3
2
1
1 2
3 4
5 6
7 8
P1_VDDA_2.5V
P1_VID[4..0] 4,51
R420
549_1%
2
C342
4.7u_6.3V-0805
STRAPPINGS
P1_NC_G14
P1_NC_AE14
P1_NC_AF13
P1_NC_H14
P1_SCANEN
P1_SCANCLK1
P1_SCANCLK2
P1_SSENA
P1_SSENB
P1_BP1
P1_BP0
P1_NC_T4
P1_NC_T3
R381
49.9_1%
C1140
BOT/102p_50V
3/7 update
R520 820
R513 680
R508 680
R521 820
R496 680
R495 680
R491 680
R498 680
R500 680
R493 680
R499 680
03/12 update
R391 49.9_1%
R392 X_49.9_1%
R380
X_49.9
NOPOP
P1_VDIMM_2.5V P1_VDIMM_2.5V
NOPOP
C363
3900p_50V
+1.2V_HT
C1142
BOT/.22u_16V
100u_6.3V/MLCC
Micro-Star Int'l Co., Ltd.
No.69, Li-De St, Jung-He City, Taipei Hsien, Taiwan. http://www.msi.com.tw
Title
Size Document Number Rev
Date: Sheet
CPU1 HDT & MISC
MS-9166
1
21 69 Friday, May 20, 2005
CT2
0C B
of
P1_R_CLKIN
R1003
BOT/169_1%
D D
C C
P1_R_CLKINJ
Modified 9/11
P0_TCK 29
R389 X_120_1%
R390
X_120_1%
NOPOP
NOPOP
P1_DBREQJ 29
R377
X_120_1%
NOPOP
B B
3/7 update
OPTERON_RSTJ 55
CPU_LDTSTOPJ 55
CPU_PWROK 55
A A
5
R397
X_120_1%
NOPOP
P1_VDIMM_2.5V
+1.2V_HT
P1_COREFB 4
P1_COREFBJ 4
R434
84.5_1%
P1_CPUCLKIN 10
P1_CPUCLKINJ 10
P1_VDIMM_2.5V
+2.5VPLL
FB11 180nH_.45A-1210
R396 42.2_1%
R398 42.2_1%
R395 0
R394 0
C1228
C1233
BOT/3900p_50V
P0_TMS 29
P0_TRSTJ 29
P1_TDI 29
P1_SCANCLK1 29
P1_SCANCLK2 29
P1_SCANEN 29
P1_SSENA 29
P1_SSENB 29
P1_NC_AF13
R435
84.5_1%
R527
X_84.5_1%
NOPOP
P1_VDDA_2.5V
BOT/3900p_50V
P1_R_CLKIN
P1_R_CLKINJ
P1_NC_G14
P1_NC_H14
P1_NC_T3
P1_NC_T4
P1_NC_AE14
4
TP22
TP19
TP30
TP10
TP11
TP24
TP12
TP18
TP15
TP13
TP20
G16
H16
G14
H14
AE6
AE7
AD7
AF7
AE10
AE11
AF11
AE13
AE12
AF13
AF15
AE14
G12
AG1
AH2
AA6
AC6
C1
D2
C2
E1
D1
L7
L6
K7
J7
T3
T4
L8
K8
J6
F12
H9
AJ2
N6
VDDA1
VDDA2
VDDA3
L0_REF1
L0_REF0
COREFB_H
COREFB_L
CORESENSE_H
CLKIN_H
CLKIN_L
NC_G14
NC_H14
TMS
TCK
TRST_L
TDI
DBREQ_L
NC_AE10
NC_AE11
NC_AF11
NC_AE13
NC_AE12
NC_T3
NC_T4
NC_AF13
NC_L8
NC_K8
NC_AF15
NC_AE14
RESET_L
LDTSTOP_L
PWROK
NC
NC
NC
NC
NC
NC
NC
SledgeHammer
CPU2C
THERMTRIP_L
THERMDA
THERMDC
VID(4)
VID(3)
VID(2)
VID(1)
VID(0)
NC_H13/BP(3)
NC_G6/BP(2)
NC_F7/BP(1)
NC_H12/BP(0)
FBCLKOUT_H
FBCLKOUT_L
TDO
DBRDY
NC_V5
NC_U5
NC_H7
NC_T7
NC_W6
NC_R6
NC_U6
RSVD_SMBUSC
RSVD_SMBUSD
AE15
AJ1
AH1
G9
F9
G10
H11
G11
H13
G6
F7
H12
G18
H18
AE8
G8
V5
U5
H7
T7
W6
R6
U6
AF9
AE9
P1_VDIMM_2.5V
X_R1
680
R376 560
R374 560
R375 560
R372 560
R373 560
TP31
TP21
R540 80.6_1%
TP14
TP16
TP17
P1_T7
P1_W6
P1_R6
P1_U6
P1_R6
P1_T7
P1_W6
P1_U6
TP23
RN78 nopop. (Opteron Ananlog pins does
TP25
not need pull down (pin U6, R6, W6, T7)
02/26.
3
P0_P1_THERMTRIPJ 55,57
P1_THERMDA 56
P1_THERMDC 56
P1_VID4
P1_VID3
P1_VID2
P1_VID1
P1_VID0
P1_BP3 29
P1_BP2 29
P1_BP1 29
P1_BP0 29
P1_TDO 29
P1_DBRDY 29
RN39
X_510-8P4R
NOPOP
3/7 update