8
7
6
5
4
3
2
1
D D
MS-9134
Version 0A
INTEL (R) Brookdale-G Chipset
Willamette/Northwood 478pin mPGA-B Processor Schematics
CPU:
Willamette/Northwood mPGA-478B Processor
System Brookdale-G Chipset:
INTEL GMCH (North Bridge) +
INTEL ICH4 (South Bridge)
C C
On Board Chipset:
BIOS -- FWH
LPC Super I/O -- W83627HF-AW
Clock Generation -- CY28349
LAN -- Intel 82551
LAN -- Intel 82540
PROMISE PDC20276*2
B B
Expansion Slots:
PCI2.2 SLOT * 1
A A
Title Page
Cover Sheet
Block Diagram
CLOCK GENERATOR SPEC
General SPEC 4
Clock ICS950218AF & ATA100 IDE CONNECTORS
mPGA478-B INTEL CPU Sockets
INTEL Brookdale-G GMCH -- North Bridge
INTEL ICH4 -- South Bridge
LPC I/O -- W83627HF-AW
DDR DIMM1&2 and DDR Terminator Resistor
VGA Connector
PCI SLOT 1
FWH & USB 18
FAN/1.5V/D-LED
W83302D ACPI CONTROLLER
VRM 9.0 INTERSIL HIP6302
FRONT PANEL ATX
MANUAL PARTS
IDE RAID/ATA 133
IDE3/IDE4 CONNECTOR
IDE2 RAID/ATA 133
IDE5/IDE6 CONNECTOR
LAN1 82540
LAN1 82540#2
LAN2 82551
LAN2 82551#2
BMC&SMBUS ISOLATION
RESET SPEC
1
2
3
5
6 - 7
8-10
11-12
13
14-15
16
17
19 KB/MS/COM/LPT/FDD
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
MSI
Title
Size Document Number Rev
8
7
6
5
4
3
Date: Sheet of
MICRO-STAR INT'L CO.,LTD.
Cover Sheet
星期五, 十月
2
11, 2002
MS-9134
0A
13 5
1
8
Power
Supply
CONN
7
6
Pentium4 Socket478 VRM9.1 CY_28349
5
4
Clock
3
2
1
Scalable Bus
DIMM 1:2
MCH: Memory
D D
IDE
1:2
Controller HUB
HUB Interface
ICH4: I/O
DOUBLE DATA
RATE SDRAM
PCI (33MHz)
Controller HUB
USB Port 1:2
SMBUS
BMC
C C
LPC Bus
Brookdale
Chipset
PCI1
INT#ABCD AD17 R/G#0
PCLK0
Winbond I/O
PS2 Mouse &
Monitor
B B
Keyboard
Parallel (1)
Serial (2)
FWH: Firmware HUB
Floppy Disk
Drive CONN
LAN1
82540
INT#E
AD19
R/G#2
PCLK12
LAN2
82540
INT#F
AD20
R/G#3
PCLK13
IDE
RAID
INT#G
AD21 Hardware
R/G#4
PCLK4
IDE 1
IDE 2
IDE
RAID
INT#H
AD22
R/G#5
PCLK5
IDE 3
IDE 4
POWER CONSUMPTION
CPU
PMCH
ICH2
CLOCK
CODEC
FWH
LAN
SIO
782D
SC2433
SC1205
SC1547 0
DIMM
CNR
AGP
PCI
USB
FAN
TTL
OTHER
NOTE1 --- MCH
A A
VCC_AGP
NOTE2 --- DIMM
S0 STATE --- 2.0A * 3 = 6.0A ---> VCC3
S1/S3 STATE --- 200mA * 3 = 600mA ---> VCC3_SB
VCC3_SB --> 600mA*3.3V/5V=396mA --> VCC5_SB
NOTE3 --- ICH2
VCCP VCC_AGP
69.0A NOTE4 0
2.4A NOTE1
0
0
0
0
0
0
0
0
0
00 0 0
0
0
0
0
0
= VCC1_5 (1.5A) VCC_AGP (0.37A) +
8
VCC1_8
VCC3_DIMM
0
0
0.2A
NOTE3 NOTE3 NOTE3
0
0
0
0
0
0
0
0
0
0
0
0
2.0A 0 0
0
0
0
0
0
0
NOTE2
0
0
0
0
0
0 0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1.8V
1.8V_LAN 36mA
VCC1_8SB
VCC3
VCC3+562ET
VCC3_SB
VCC3_SB
VCC1_8SB
VCC5_SB
7
VCC3 VCC5
0
0
0
0
0
0
0
0
0
6.0A 1.0A 8.0A 2.0A
0
0
VCC5_SB
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
NOTE2
0
?
0
0
0
0
0
0
S0 Power S3/S4/S5
300mA
45mA
410mA
230mA
25mA
=
=
= VCC3_SB VCC1_8SB +
S1
100mA
28mA
30mA
5mA
210mA
0.6mA
+12V
6
-12V
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
N/A
N/A
7mA
N/A
N/A
N/A
PCLK1~PCLK5=6.5"
PCLK6+PCLK11=PCLK6+PCLK12=9"
PCLK9+PCLK8 =PCLK9+PCLK10=9"
ICH_PCLK=SIO_PCLK=FWH_PCLK=9"
5
4
(10/5/10 mil)
(10/5/10 mil)
(10/5/10 mil)
(15/5/15 mil)
3
MICRO-STAR
Title
Block Diagram
Size Document Number Rev
Custom
MS-9134
星期五, 十月
Date: Sheet
2
11, 2002
of
23 5
1
0A
5
4
3
2
1
3
D D
DDR
DIMM0
MCH-G CPU
PCICLK0_33MHZ
CPUCLK_133MHZ
CPUCLK#_133MHZ
MCHCLK_133MHZ
MCHCLK#_133MHZ
MCH66_66MHZ
3
DIMM0=CLK1/1#,CLK0/0#,CLK2/2#
DIMM1=CLK4/4#,CLK3/3#,CLK5/5#
DOTCLK_48MHZ
DDR
DIMM1
PCI
C C
PCICLK4_33MHZ
RAID1
CLOCK
GENERATOR
PCICLK5_33MHZ
ICH66_66MHZ
ICH48_48MHZ
ICHPCLK_33MHZ
ICH14_14MHZ
RTC CRY
32.768KHZ
ICH4
RAID2
B B
PCICLK2_33MHZ
LAN1
SIO24_24MHZ
14.318MHZ
SIOPCLK_24MHZ FWHPCLK_33MHZ
SIO FWH
LAN2
PCICLK3_33MHZ
A A
Title
Size Document Number Rev
5
4
3
Date: Sheet of
MS-9134
<Doc> 0A
A
星期五, 十月
2
11, 2002
33 5
1
8
General SPEC
7
6
5
4
3
2
1
ICH4
Function Type GPIO Pin
GPIO 0
D D
GPIO 1
GPIO 2
GPIO 3
GPIO 4
GPIO 5
GPIO 6
GPIO 7
GPIO 8
GPIO 9
GPIO 10
GPIO 11
GPIO 12
GPIO 13
GPIO 14~15
C C
GPIO 16
GPIO 17
GPIO 18*
GPIO 19
GPIO 20
GPIO 21
GPIO 22
GPIO 23
GPIO 24
GPIO 25
GPIO 26
GPIO 27
GPIO 28
GPIO 29~31
B B
GPIO 32
GPIO 33
GPIO 34
GPIO 35
GPIO 36
GPIO 37
GPIO 38
GPIO 39
GPIO 40
GPIO 41
GPIO 42
GPIO 43
GPIO 44~47
* GPIO18 will toggle at 1Hz frequen c y.
A A
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
REQ#A (multifunction pin)
I
I
REQ#B (multifunction pin)
I
Pull up through 8.2K ohms (PIRQE#)
I
Pull up through 8.2K ohms (PIRQF#)
I
Pull up through 8.2K ohms (PIRQG#)
I
Pull up through 8.2K ohms (PIRQH#)
I
Pull up through 10K ohms (unused)
I
Pull up through 10K ohms (unused)
I
Pull Up to 3.3VSBY through 4.7K ohms (SIO_PME)
Not Implemented
I
Not Implemented
I
I
SMB_ALERT (multifuntion pin)
I
EXTSMI# with Pull up 10K ohms to VCC3_SB
I
Pull up through 10K ohms (unused)
I
Not Implemented
No Connected
O
O
No Connected
O
No Connected
O
No Connected
O
No Connected
O
No Connected
OD
No Connected
No Connected
O
No Connected
No Connected
Not Implemented
No Connected
No Connected
Not Implemented
O
No Connected
No Connected
Primary IDE ATA66/100 detection (PD_DET)
Secondary IDE ATA66/100 detection (S D_ DE T)
No Connected
No Connected
No Connected
No Connected
No Connected
No Connected
No Connected
No Connected
Not Implemented
FWH
GPIO Pin Type Function
I GPI 0
Connect to SD_DET
GPI 1
GPI 2
GPI 3
GPI 4
Connect to PD_DET
I
Pull down through 8.2K ohms (unused)
I
Pull down through 8.2K ohms (unused)
I
I Pull down through 8.2K ohms (unused)
PCI Config.
DEVICE ICH INT Pin IDSEL
PCI 1
LAN1
LAN2
IDE RAID1
IDE RAID2
MINIPCI1
INT
A# B# C# D#
INTC#
INTD#
INTE#
INTF#
INTG#
AD17
AD18
AD19
AD20
AD21
AD22
DIMM Config.
DEVICE ADDRESS CLOCK
DIMM 1 1010000B DCLK0/DCLK0#
DIMM 2 1010001B
DCLK1/DCLK1#
DCLK2/DCLK2#
DCLK3/DCLK3#
DCLK4/DCLK4#
DCLK5/DCLK5#
CLOCK
PCICLK0
PCICLK2
PCICLK3
PCICLK4
PCICLK5
PCICLK1
R&G
0
1
2
3
4
5
MSI
Title
Size Document Number Rev
星期五, 十月
8
7
6
5
4
3
Date: Sheet of
MICRO-STAR INT'L CO.,LTD.
General SPEC
MS-9134
2
11, 2002
0A
43 5
1
8
VCCP
CB1
0.1u
FB1 80_0805
CB195
0.1u
filtering from 10K~1M
FB2 80_0805
CB7
0.1u
4.7u-0805
R30 1K
VCC3
R35 220
CB275
Q1
3904
CB273
10u-0805
VDDA3V
VCC3
D D
* Put GND copper under Clock Gen.
connect to every GND pin
* 40 mils Trace on Layer 4
with GND copper around
it
* put close to every power pin
*
Trace Width 7mils.
*
Same Group spacing 15mils
*
Different Group spacing 30mils
*
Differentical mode spacing 7mils on itself
VCC3
C C
7
CLOCK GENERATOR BLOCK
VCC3V
CB274
0.1u
SMBCLK_VCC <14,21,33>
SMBDATA_VCC <14,21,33>
SMBCLK_VCC
SMBDATA_VCC
R39
X_1K
CB2
0.1u
CB3
0.1u
CB4
0.1u
CB5
0.1u
CB6
0.1u
C24
0.01u
C26
0.01u
C27
0.01u
39
36
46
43
29
9
5
18
13
24
21
2
47
34
33
26
25
19
U1
CPU_VDD
CPU_GND
MREF_VDD
MREF_GND
3V66_GND
PCI_VDD
PCI_GND
PCI_VDD
PCI_GND
48_VDD
48_GND
REF_VDD
REF_GND
CORE_VDD
CORE_GND
SCLK
SDATA
VTT_GD#
CY28349
6
CPUCLK0
CPUCLK0#
CPUCLK1
CPUCLK1#
CPUCLK2
CPUCLK2#
3V66_0 3V66_VDD
3V66_1
3V66_2
3V66_48/SEL66_48#
FS2/PCI0
FS3/PCI1
SEL48_24#/PCI2
FS4/PCI3
PCI4
PCI5
PCI6
PCI7
PCI8
PCI9
FS0/48MHz
FS1/24_48MHz
MUL0/REF0
MUL1/REF1
IREF
RESET#
PWR_DN#
5
*Trace < 0.5"
R2 27.4_1%
CPU0
41
40
38
37
45
44
31 32
30
28
27
6
7
8
10
11
12
14
15
16
17
22
23
48
1
3
X1
4
X2
35
20
42
R4 27.4_1%
CPU0#
R10 27.4_1%
CPU1
R12 27.4_1%
CPU1# MCHCLK#
R1210 33
R1211 33
SEL48_2
R589 33
FS2
R587 33
FS3
SEL48_1
FS4
FS0
FS1 SIO_24
MUL0 ICH_14
MUL1
X1
X2
PWR_DN# VCC3V
7 8
RN85
5 6
33
3 4
1 2
7 8
RN2
5 6
33
3 4
1 2
R26 33
R27 33
R25 33
X1 14M-32pf-HC49S-D
R28 475_1%
R590 1K
CB312
0.1u
4
CPUCLK
CPUCLK#
MCHCLK
MCH_66
ICH_66
DOT_CLK
PCICLK1
PCICLK0
PCICLK2
PCICLK3
PCICLK4
FWH_PCLK
SIO_PCLK
ICH_PCLK
PCICLK5
ICH_48
22p C23
22p C25
Iref = 2.32mA
VCC3 VCC3
CB314
0.1u
CPUCLK <6>
CPUCLK# <6>
MCHCLK <8>
MCHCLK# <8>
MCH_66 <8>
ICH_66 <12>
DOT_CLK <8>
PCICLK1 <13>
PCICLK0 <17>
PCICLK2 <29>
PCICLK3 <31>
PCICLK4 <25>
FWH_PCLK <18>
SIO_PCLK<24>
ICH_PCLK <11>
PCICLK5 <27>
ICH_48 <12>
SIO_24 <13>
ICH_14 <12>
8445
8442
8544
8547
8119
8132
4098
4480
5613
5614
5591
5613
8106
8105
8104
3060
7222
2641
5512
3
2
Shut Source Termination Resistors
CPUCLK
CPUCLK#
MCHCLK
MCHCLK#
Trace less 0.2"
49.9ohm for 50ohm M/B impedance
R1 49.9_1%
R3 49.9_1%
R5 49.9_1%
R7 49.9_1%
CLOCK STRAPPING RESISTORS
FS0 VCC3V
VCC3V
SIO_24
SEL48_1
FS3
FS2
FS4
SEL48_2
MUL0
MUL1
1 1 1 1 1
SMBCLK_VCC
SMBDATA_VCC
R740 10K
R22 1.5K
R18 8.2K
RN75
1 2
3 4
5 6
7 8
10K
R741 10K
R1265 X_10K
R742 10K
R871 X_10K
R1003 10K
R29 2.7K
R32 2.7K
BSEL0 <6,8>
VCC3V
VCC3V
VCC3V
FSB (MHz) FS4 FS3 FS2 FS1 FS0
100 MHz 1 1 1 0 1
133 MHz
VCC3
MUL0=0
MUL1=1
1
Pull-Down Capacitors
10p C775
10p C776
10p C777
10p C778
CN14
7
5
3
1
10p
CN11
2
4
6
8
10p
Ioh=6*Iref
Voh=0.71V
10p C1
10p C2
10p C3
10p C4
8
6
4
2
1
3
5
7
10p C16
10p C376
10p C20
10p C21
CPUCLK
CPUCLK#
MCHCLK
MCHCLK#
PCICLK4
PCICLK5
ICH_66
MCH_66
PCICLK1
PCICLK0
PCICLK2
PCICLK3
FWH_PCLK
SIO_PCLK
ICH_PCLK
ICH_14
SIO_24
ICH_48
DOT_CLK
used only for EMI issue
Trace less 0.2"
B B
PDD[0..15] <12>
A A
8
HD_RST# <21>
PD_DREQ <12>
PD_IOW# <12>
PD_IOR# <12>
PD_IORDY <12>
PD_DACK# <12>
IRQ14 <11>
PD_A1 <12>
PD_A0 <12>
PD_CS#1 <12>
PD_LED <23>
HD_RST#
PDD7
PDD6
PDD5
PDD4
PDD3
PDD2
PDD1
PDD0
VCC5
PRIMARY IDE BLOCK SECONDARY IDE BLOCK
IDE1
R47
4.7K
R43 33
7
C29
220p
R48
10K
VCC3
YJ220-CB-1
1
3 4
5 6
7 8
91110
13 14
17 18
19
21
23
25
27
29
31
33
35
37
2
PDD8
PDD9
PDD10
PDD11
PDD12
12
PDD13
PDD14
16 15
PDD15
22
24
26
28
30
32
34
36
38
40 39
R743
15K
6
ATA100 IDE CONNECTORS
SDD[0..15] <12>
PDD[0..15]
SD_DREQ <12>
SD_IOW# <12>
SD_IOR# <12>
SD_IORDY <12>
SD_DACK# <12>
IRQ15 <11>
SD_A1 <12>
SD_A0 <12>
SD_CS#1 <12>
PD_DET <18>
PD_A2 <12>
PD_CS#3 <12>
5
SD_LED <23>
4
VCC5
HD_RST#
SDD7
SDD6
SDD5
SDD4
SDD3
SDD2
SDD1
SDD0
R49
4.7K
R44 33
C31
220p
3
R50
10K
VCC3
1
3 4
5 6
7 8
91110
13 14
17 18
19
21
23
25
27
29
31
33
35
37
IDE2
YJ220-CW-1
2
SDD8
SDD9
SDD10
SDD11
SDD12
12
SDD13
SDD14
16 15
SDD15
22
24
26
28
30
32
34
36
38
40 39
R744
15K
MSI
Title
Size Document Number Rev
星期五, 十月
Date: Sheet of
2
* Trace Width : 5mils
* Trace Spacing : 7mils
* Length(longest)-Length(shortest)<0. 5 "
* Trace Length less than 5"
SDD[0..15]
SD_DET <18>
SD_A2 <12>
SD_CS#3 <12>
MICRO-STAR INT'L CO.,LTD.
Clock Gen & ATA100 IDE Connectors
11, 2002
MS-9134
53 5
1
0A
8
7
6
5
4
3
2
1
VCCPS+
HA#[31..3] <8>
P24
HA#25
A26#
D41#
R21
HA#24
A25#
D40#
N25
HA#23
A24#
D39#
N26
HA#22
A23#
D38#
M26
HA#21
A22#
D37#
N23
HA#20
A21#
D36#
M24
HA#19
A20#
D35#
P21
HA#18
A19#
D34#
N22
HA#17
A18#
D33#
M23
HA#16
A17#
D32#
H25
HA#15
A16#
D31#
K23
HA#14
A15#
D30#
J24
HA#13
A14#
D29#
HA#12
A13#
D28#
L22
HA#27
HA#30
HA#26
HA#29
HA#31
U24
A34#
D49#
U26
A33#
D48#
T23
A32#
D47#
T22
A31#
D46#
T25
A30#
D45#
T26
HA#28
A29#
D44#
R24
A28#
D43#
R25
A27#
D42#
D D
U3A
HINV#0
HINV#[3..0] <8>
FERR# <11>
STPCLK# <11>
HINIT# <11>
HDBSY# <8>
HDRDY# <8>
HTRDY# <8>
HADS# <8>
HLOCK# <8>
HBNR# <8>
HIT# <8>
HITM# <8>
C C
Trace 10 mils width
10 mils space, Max 8"
B B
HBPRI# <8>
HDEFER# <8>
CPU_TMPA <13>
VAGND <13>
TRMTRIP# <11>
PROCHOT# <12>
IGNNE# <11>
HSMI# <11>
A20M# <11>
SLP# <11>
CPU_GD <12>
CPURST# <8>
HD#[63..0] <8>
HINIT#
ITP_TDI
ITP_TDO
ITP_TMS
ITP_TRST#
ITP_TCK
PROCHOT#
BSEL0 <5,8>
CPU_GD
CPURST#
HINV#1
HINV#2
HINV#3
HD#63
HD#62
HD#61
HD#60
HD#59
HD#58
HD#57
HD#56
HD#55
HD#54
AC3
AA3
AB2
AF26
AB26
AD2
AD3
AE21
AF24
AF25
AD6
AD5
AB23
AB25
AA24
AA22
AA25
W25
W26
E21
G25
P26
V21
A22
Y21
Y24
Y23
Y26
V24
V6
B6
Y4
W5
H5
H2
J6
G1
G4
G2
F3
E3
D2
E2
C1
D5
F7
E6
D4
B3
C4
A2
C3
B2
B5
C6
A7
DBI0#
DBI1#
DBI2#
DBI3#
IERR#
MCERR#
FERR#
STPCLK#
BINIT#
INIT#
RSP#
DBSY#
DRDY#
TRDY#
ADS#
LOCK#
BNR#
HIT#
HITM#
BPRI#
DEFER#
TDI
TDO
TMS
TRST#
TCK
THERMDA
THERMDC
THERMTRIP#
GND/SKTOCC#
PROCHOT#
IGNNE#
SMI#
A20M#
SLP#
RESERVED0
RESERVED1
RESERVED2
RESERVED3
RESERVED4
RESERVED5
RESERVED6
BSEL0
BSEL1
PWRGOOD
RESET#
D63#
D62#
D61#
D60#
D59#
D58#
D57#
D56#
D55#
D54#
AB1Y1W2V3U4T5W1R6V2T4U3P6U1T2R3P4P3R2T1N5N4N2M1N1M4M3L2M6L3K1L6K4K2
A35#
D53#
D52#
D51#
D50#
V22
U21
V25
U23
M21
HA#11
A12#
D27#
H24
HA#10
A11#
D26#
G26
HA#9
A10#
D25#
L21
HA#8
A9#
D24#
D26
HA#7
A8#
D23#
F26
HA#6
A7#
D22#
E25
HA#5
A6#
D21#
F24
HA#4
A5#
D20#
F23
HA#3
A4#
D19#
G23
A3#
D18#
E24
D17#
H22
D16#
AE25A5A4
DBR#
VCC_SENSE
D15#
D14#
D13#
D25
J21
D23
C26
VCCPS-
VSS_SENSE
D12#
D11#
H21
AD26
ITP_CLK1
D10#
G22
AC26
ITP_CLK0
D9#
D8#
B25
C24
VCCPS+ <22>
VCCPS- <22>
VID2
VID4
VID3
AE1
AE2
AE3
VID4#
VID3#
VID2#
D7#
D6#
D5#
D4#
C23
B24
D22
C21
VID1
VID0
AE4
AE5
VID1#
D3#
A25
A23
VID0#
GTLREF3
GTLREF2
GTLREF1
GTLREF0
BPM5#
BPM4#
BPM3#
BPM2#
BPM1#
BPM0#
REQ4#
REQ3#
REQ2#
REQ1#
REQ0#
TESTHI12
TESTHI11
TESTHI10
TESTHI9
TESTHI8
TESTHI7
TESTHI6
TESTHI5
TESTHI4
TESTHI3
TESTHI2
TESTHI1
TESTHI0
BCLK1#
BCLK0#
RS2#
RS1#
RS0#
AP1#
AP0#
BR0#
COMP1
COMP0
DP3#
DP2#
DP1#
DP0#
ADSTB1#
ADSTB0#
DSTBP3#
DSTBP2#
DSTBP1#
DSTBP0#
DSTBN3#
DSTBN2#
DSTBN1#
DSTBN0#
LINT1/NMI
LINT0/INTR
D2#
D1#
D0#
B22
B21
VID[4..0] <13,22>
AA21
AA6
F20
F6
AB4
AA5
Y6
AC4
AB5
AC6
H3
J3
J4
K5
J1
AD25
R929 49.9_1%
A6
R930 49.9_1%
Y3
R931 49.9_1%
W4
R932 49.9_1%
U6
AB22
AA20
AC23
AC24
AC20
AC21
AA2
AD24
AF23
AF22
F4
G5
F1
V5
AC1
H6
P1
L24
L25
K26
K25
J26
R5
L5
W23
P23
J23
F21
W22
R22
K22
E22
E5
D1
SOCKET478
GTLREF
BPM#5
BPM#4
BPM#3
BPM#2
HREQ#4
HREQ#3
HREQ#2
HREQ#1
HREQ#0
R933 1K
HRS#2
HRS#1
HRS#0
HBR#0
R64 51.1_1%
R65 51.1_1%
HREQ#[4..0] <8>
VCCP
VCCP
CPUCLK# <5>
CPUCLK <5>
HRS#[2..0] <8>
HBR#0 <8>
* Short trace
HADSTB#1 <8>
HADSTB#0 <8>
HDSTBP#3 <8>
HDSTBP#2 <8>
HDSTBP#1 <8>
HDSTBP#0 <8>
HDSTBN#3 <8>
HDSTBN#2 <8>
HDSTBN#1 <8>
HDSTBN#0 <8>
NMI <33>
INTR <11>
CPU GTL REFERNCE VOLTAGE BLOCK CPU SIGNAL BLOCK
with in
1"~2"
VCCP
C35
1u-0805
R54
49.9_1%
R55
100_1%
GTLREF
2/3*Vccp
C34
220p
Every pin put one 220pF cap near it.
Trace Width 7mils, Space 10mils.
Keep the voltage divider within
1.5" of the GETREF pin.
CPU STRAPPING RESISTORS
BPM#5
BPM#4
BPM#3
BPM#2
ALL COMPONENTS CLOSE TO CPU
PROCHOT#
CPU_GD
HBR#0
CPURST#
HINIT#
ITP_TDI
ITP_TDO
ITP_TMS
ITP_TRST#
ITP_TCK
R85 51
R82 51
R88 51
R87 51
R78 X_62
R80 300
R81 150
R84 51
R86 X_300
R79 150
R76 75
R74 39
R83 680
R77 27
VCCP
VCCP
VCCP
HD#1
HD#5
HD#2
HD#4
HD#7
HD#9
HD#30
HD#31
HD#29
HD#28
HD#26
HD#27
HD#25
HD#24
HD#42
HD#41
HD#40
HD#39
HD#37
HD#38
HD#35
HD#34
6
HD#33
HD#47
HD#48
HD#50
HD#53
HD#51
HD#52
A A
8
7
HD#49
HD#45
HD#46
HD#44
HD#43
HD#36
HD#32
HD#23
HD#22
HD#20
HD#21
HD#18
HD#19
HD#16
HD#17
5
HD#14
HD#13
HD#11
HD#10
HD#6
HD#8
HD#12
HD#15
HD#3
HD#0
MSI
Title
Size Document Number Rev
星期五, 十月
4
3
Date: Sheet of
MICRO-STAR INT'L CO.,LTD.
mPGA478-B INTEL CPU SOCKET Part 1
2
11, 2002
MS-9134
63 5
1
0A
8
7
6
5
4
3
2
1
CPU VOLTAGE BLOCK
VCCP
D D
D10
A11
A13
A15
A17
A19
A21
A24
A26
A3
A9
AA1
AA11
AA13
AA15
AA17
AA19
AA23
AA26
AA4
AA7
AA9
AB10
C C
B B
AB12
AB14
AB16
AB18
AB20
AB21
AB24
AB3
AB6
AB8
AC11
AC13
AC15
AC17
AC19
AC2
AC22
AC25
AC5
AC7
AC9
AD1
AD10
AD12
AD14
U3B
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
A10
A12
A14
A16
A18
A20A8AA10
AA12
AA14
AA16
AA18
AA8
AB11
AB13
AB15
AB17
AB19
AB7
AB9
AC10
AC12
AC14
AC16
AC18
AC8
AD11
AD13
AD15
AD17
AD19
AD7
AD9
AE10
AE12
AE14
AE16
AE18
AE20
AE6
AE8
AF11
AF13
AF15
AF17
AF19
AF2
AF21
AF5
AF7
AF9
B11
B13
B15
B17
B19B7B9
C10
C12
C14
C16
C18
C20C8D11
D13
D15
D17
D19D7D9
E10
E12
E14
E16
E18
E20E8F11
F13
F15
F17
F19
AF4
F9
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
F25F5F8
G21G6G24
VSS
VSS
G3H1H23
VSS
VSS
H26H4J2
VSS
VSS
VSS
VSS
VSS
VSS
J22
J25J5K21
VSS
VSS
AD16
AD18
AD21
AD4
AD23
AD8
AE11
AE13
AE15
AE17
AE19
AE22
AE24
AE26
AE7
AE9
AF1
AF10
AF12
AF14
AF16
AF18
AF20
AF6
AF8
B10
B12
B14
B16
B18
B23
B20
B26B4B8
C11
C13
C15
C17C2C19
C22
C25C5C7C9D12
D14
D16
D18
D20
D21D3D24D6D8E1E11
E13
E15
E17
E19
E23
E7E9F10
F12
F14
F16
E4
E26
F18F2F22
VCC-VID
VSS
AF3
XX1
VCC-VIDPRG
HVSS
XX2
HVSS
AE23
XX3
VCC-IOPLL
HVSS
XX4
HVSS
AD20
XX5
VCCA
HVSS
XX6
HVSS
XX7
HVSS
XX8
HVSS
XX9
HVSS
HVSS
XX10
HVSS
HVSS
XX11
XX12
VSSA
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
HVSS
HVSS
HVSS
HVSS
SOCKET478
AD22
Y5
Y25
Y22
Y2
W6
W3
W24
W21
V4
V26
V23
V1
U5
U25
U22
U2
T6
T3
T24
T21
R4
R26
R23
R1
P5
P25
P22
P2
N6
N3
N24
N21
M5
M25
M22
M2
L4
L26
L23
L1
K6
K3
K24
XX16
XX15
XX14
XX13
VCC_VID <21>
C444
0.1u
Keep the 22uF cap within 0.6"
of the CPU pin.
Trace Width 12mils, Space 10mils.
C39
22u-1206
L23 4.7uH/100MA
L24 4.7uH/100MA
C40
22u-1206
VCCP
CPU DECOUPLING CAPACITORS
VCCP VCCP
CB12
10u-1206
CB19
10u-1206
CB26
10u-1206
CB33
10u-1206
CB40
10u-1206
CB47
A A
10u-1206
CB53
10u-1206
Place 14 pcs 1206 size cap
north side of processor
8
VCCP
CB20
10u-1206
CB34
10u-1206
CB41
10u-1206
CB21
10u-0805
CB28
10u-0805
CB42
10u-0805
CB49
10u-0805
CB55
10u-0805
CB18
10u-0805
CB22
10u-0805
CB43
10u-0805
CB56
10u-0805
CB59
10u-0805
CB15
10u-0805
CB29
10u-1206
CB14
10u-0805
CB50
10u-0805
CB25
10u-0805
PLACE CAPS WITHIN CPU CAVITY
7
6
VCCP VCCP
CB39
10u-0805
CB46
10u-0805
CB52
10u-0805
CB57
10u-0805
CB60
10u-0805
CB58
10u-0805
Place these caps on south
side of processor
5
CT88
VCCP
+
X_150U/SP-CAP
CT89
+
X_150U/SP-CAP
Within CPU Cavity Solder Side
4
MSI
Title
Size Document Number Rev
星期五, 十月
3
Date: Sheet of
MICRO-STAR INT'L CO.,LTD.
mPGA478-B INTEL CPU Part2
MS-9134
2
11, 2002
0A
73 5
1
5
4
3
2
1
Y28
T28
M28
K26
K22
K20
K18
AD28
VTTFSB
VTTFSB
VTTFSB
VTTFSB
VTTFSB
VTTFSB
CPURST#
HD_VREF1
HD_VREF2
HA_VREF
HCC_VREF
HY_SWNG
HX_SWNG
HI_SWING
HL_RCOMP
DDCA_DATA
DDCA_CLK
DREFCLK
VCCP
HD0#
HD1#
HD2#
HD3#
HD4#
HD5#
HD6#
HD7#
HD8#
HD9#
HD10#
HD11#
HD12#
HD13#
HD14#
HD15#
HD16#
HD17#
HD18#
HD19#
HD20#
HD21#
HD22#
HD23#
HD24#
HD25#
HD26#
HD27#
HD28#
HD29#
HD30#
HD31#
HD32#
HD33#
HD34#
HD35#
HD36#
HD37#
HD38#
HD39#
HD40#
HD41#
HD42#
HD43#
HD44#
HD45#
HD46#
HD47#
HD48#
HD49#
HD50#
HD51#
HD52#
HD53#
HD54#
HD55#
HD56#
HD57#
HD58#
HD59#
HD60#
HD61#
HD62#
HD63#
GCLKIN
RSTIN#
PWROK
HSYNC
VSYNC
REFSET
HI6
HI7
HI8
HI9
HI10
HD#0
T30
HD#1
R33
HD#2
R34
HD#3
N34
HD#4
R31
HD#5
L33
HD#6
L36
HD#7
P35
HD#8
J36
HD#9
K34
HD#10
K36
HD#11
M30
HD#12
M35
HD#13
L34
HD#14
K35
HD#15
H36
HD#16
G34
HD#17
G36
HD#18
J33
HD#19
D35
HD#20
F36
HD#21
F34
HD#22
E36
HD#23
H34
HD#24
F35
HD#25
D36
HD#26
H35
HD#27
E33
HD#28
E34
HD#29
B35
HD#30
G31
HD#31
C36
HD#32
D33
HD#33
D30
HD#34
D29
HD#35
E31
HD#36
D32
HD#37
C34
HD#38
B34
HD#39
D31
HD#40
G29
HD#41
C32
HD#42
B31
HD#43
B32
HD#44
B30
HD#45
B29
HD#46
E27
HD#47
C28
HD#48
B27
HD#49
D26
HD#50
D28
HD#51
B26
HD#52
G27
HD#53
H26
HD#54
B25
HD#55
C24
HD#56
B23
HD#57
B24
HD#58
E23
HD#59
C22
HD#60
G25
HD#61
B22
HD#62
D24
HD#63
G23
AE7
AJ31
D22
E7
H24
D27
AD30
P30
Y30
H28
HL6
AE4
HL7
AE5
HL8
AF3
HL9
AE2
HL10
AF2
HUB_MREF
HI_SWING
AD2
R98 68.1_1%
AC2
C7
D7
B7
C6
D14
R103 137_1%
B16
Brookdale_GMCH
HVREF
HSWNG
X_10p C294
HD#[63..0] <6>
MCH_66 <5>
PCIRST#1 <13,17,18,21,24>
CPURST# <6>
PWR_GD <12,21>
HL[10..0] <11>
Trace 10 mils &
7mils space <
0.5"
VDDQ
3VDDCDA <16>
3VDDCCL <16>
3V_HSYNC <16>
3V_VSYNC <16>
DOT_CLK <5>
BSEL0 <5,6>
VCC3
VDDQ
VCCA_SM
VDDQ
VCCA_DPLL
CB71 0.1u
R101
10K
D D
* Length must be matched
within +/-0.1"of th e Strobe
Signals
C C
B B
HA#[31..3] <6>
HREQ#[4..0] <6>
HRS#[2..0] <6>
HDBSY# <6>
HDRDY# <6>
HADSTB#0 <6>
HADSTB#1 <6>
HDSTBN#0 <6>
HDSTBP#0 <6>
HDSTBN#1 <6>
HDSTBP#1 <6>
HDSTBN#2 <6>
HDSTBP#2 <6>
HDSTBN#3 <6>
HDSTBP#3 <6>
HINV#[3..0] <6>
MCHCLK <5>
MCHCLK# <5>
HA#3
HA#4
HA#5
HA#6
HA#7
HA#8
HA#9
HA#10
HA#11
HA#12
HA#13
HA#14
HA#15
HA#16
HA#17
HA#18
HA#19
HA#20
HA#21
HA#22
HA#23
HA#24
HA#25
HA#26
HA#27
HA#28
HA#29
HA#30
HA#31
HBR#0 <6>
HBNR# <6>
HBPRI# <6>
HLOCK# <6>
HADS# <6>
HREQ#0
HREQ#1
HREQ#2
HREQ#3
HREQ#4
HIT# <6>
HITM# <6>
HDEFER# <6>
HTRDY# <6>
HRS#0
HRS#1
HRS#2
HINV#0
HINV#1
HINV#2
HINV#3
R94 24.9_1%
R95 24.9_1%
Trace 10 mils & 7mils space < 0.5"
HL[10..0] <11>
HL_STB <11>
HL_STB# <11>
CRT_B <16>
CRT_B# <16>
CRT_G <16>
CRT_G# <16>
CRT_R <16>
CRT_R# <16>
A A
HL0
HL1
HL2
HL3
HL4
HL5
U4A
W31
HA3#
AA33
HA4#
AB30
HA5#
VTTFSB
V34
HA6#
Y36
HA7#
AC33
HA8#
Y35
HA9#
AA36
HA10#
AC34
HA11#
AB34
HA12#
Y34
HA13#
AB36
HA14#
AC36
HA15#
AC31
HA16#
AF35
HA17#
AD36
HA18#
AD35
HA19#
AE34
HA20#
AD34
HA21#
AE36
HA22#
AF36
HA23#
AE33
HA24#
AF34
HA25#
AG34
HA26#
AG36
HA27#
AE31
HA28#
AH35
HA29#
AG33
HA30#
AG31
HA31#
U33
BREQ0#
T34
BNR#
M34
BPRI#
T35
HLOCK#
T36
ADS#
V36
HREQ0#
AA31
HREQ1#
W33
HREQ2#
AA34
HREQ3#
W35
HREQ4#
P36
HIT#
M36
HITM#
N36
DEFER#
V30
HTRDY#
R36
RS0#
U34
RS1#
P34
RS2#
U31
DBSY#
U36
DRDY#
AB35
HAD_STB0#
AF30
HAD_STB1#
N31
HD_STBN0#
L31
HD_STBP0#
G33
HD_STBN1#
J34
HD_STBP1#
C30
HD_STBN2#
E29
HD_STBP2#
D25
HD_STBN3#
E25
HD_STBP3#
N33
DINV_0#
C35
DINV_1#
B33
DINV_2#
C26 H30
DINV_3# HD_VREF0
K30
HCLKP
J31
HCLKN
V35
HY_RCOMP
B28
HX_RCOMP
AA7
HI0
AB8
HI1
AC7
HI2
AC5
HI3
AD8
HI4
AF4 AD3
HI5 HI_REF
AD4
HI_STBS
AC4
HI_STBF
G15
BLUE
H16
BLUE#
E15
GREEN
F16
GREEN#
C15
RED
D16
RED#
VTTFSB
HOST
HUB LINK
VGA
U4C
A3
VCC_AGP
POWER
A7
VCC_AGP
C1
VCC_AGP
D4
VCC_AGP
D6
VCC_AGP
G1
VCC_AGP
K6
VCC_AGP
L1
VCC_AGP
L9
VCC_AGP
P6
VCC_AGP
R1
VCC_AGP
R9
VCC_AGP
W9
VCC_AGP
V6
VCC_AGP
AD6
VCC_HI
AC9
VCC_HI
AC1
VCC_HI
AE3
VCC_HI
W19
VCC
Y19
VCC
AA19
VCC
W20
VCC
U21
VCC
W21
VCC
AA21
VCC
A9
VCC
B9
VCC
C9
VCC
D9
VCC
E9
VCC
B10
VCC
C10
VCC
D10
VCC
F10
VCC
H10
VCC
A11
VCC
B11
VCC
C11
VCC
D11
VCC
E11
VCC
G11
VCC
J11
VCC
B12
VCC
C12
VCC
D12
VCC
F12
VCC
H12
VCC
G13
VCC
J13
VCC
H14
VCC
J15
VCC
AA17
VCC
W18
VCC
W17
VCC
V19
VCC
U19
VCC
U17
VCC
Other
GND
GND
GND
GND
Y10
AH16
AH20
AH24
AH28
GND
GND
AF28
VCCA_FSB
VTT_DECAP
VTT_DECAP
VTT_DECAP
VTT_DECAP
VTT_DECAP
GND
GND
AB28
V28
VCCQ_SM
VCCQ_SM
GND
P28
AG2 AT20
VCCA_SM VCCQ_SM
AG1
VCCA_SM
A15
VCCA_DAC
B14
VCCA_DAC
A13
VCCA_DPLL
C14
VSSA_DAC
B15
VSSA_DAC
B6
VCC_GPIO
Y3
PSBSEL
R102
10K
Y2
RSVD
AA2
RSVD
AA4
RSVD
AA3
RSVD
AA5
RSVD
W7
RSVD
Y4
RSVD
Y8
RSVD
A37
RSVD
AB2
RSVD
AB3
RSVD
GND
GND
M10
T10
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VTTFSB
VTTFSB
VTTFSB
VTTFSB
VTTFSB
VTTFSB
VTTFSB
VTTFSB
VTTFSB
VTTFSB
VTTFSB
VTTFSB
VTTFSB
VTTFSB
VTTFSB
VTTFSB
GND
K24
K28
GND
AH8
AK8
AG9
AJ9
AL9
AM22
AJ23
AL37
AU9
AK10
AJ11
AL11
AU25
AM26
AU13
AM14
AJ27
AJ1
AL1
AJ15
AP15
AU29
AH2
AJ2
AK2
AL2
AM30
AH3
AJ3
AK3
AL3
AH4
AJ4
AK4
AL4
AU17
AJ5
AL5
AU5
AM18
AJ19
AK32
AU33
AH6
AK6
AP20
AG7
AJ7
AL7
AP7
B18
C18
D18
H18
B19
C19
D19
E19
G19
J19
B20
C20
D20
F20
H20
F18
A17
AT21
AU21
G37
L37
R37
AC37
A31
Place <0.1"
A2
NC
A36
NC
AH34
NC
AJ35
NC
AT1
NC
AT37
NC
AU1
NC
AU2
NC
AU36
NC
AU37
NC
B1
NC
B37
NC
Brookdale_GMCH
VCC_DDR
VCCA_FSB
VCCQ_SM
VCCP
CB66 0.1u
CB67 0.1u
CB68 0.1u
CB69 0.1u
CB70 0.1u
GMCH REFERENCE BLOCK
VCCA_FSB
VCCA_DPLL
VCCA_SM
VCCQ_SM
Place Cap. as Close as possible to
GMCH
Keep the voltage divider within 3" of the
GMCH pin.
HI_SWING
HUB_MREF
Place 0.01uF Cap. as Close as possible to
GMCH< 0.25"
Trace width 12 mils & 10mils space
MSI
L25 0.82uH_0603
C284
CB62
22u-1206
0.1u
L26
+
10uH_0805
C46
CB63
470u
0.1u
L27 1uH-0805
CT10
CB64
+
100u_16V
0.1u
L28 0.68uH-0805
C285
CB270
4.7u-0805
0.1u
R520
1
VCCP
HSWNG
C48
0.01u
VCCP
HVREF
C50
0.1u
, Trace width 12 mils & 10mils space
C51
C52
0.01u
0.1u
C54
C53
0.1u
0.01u
I=30mA
I=35mA
I=500mA
I=150mA
R89
301 1%
R90
150 1%
R91
49.9 1%
R92
100_1%
VDDQ
R991
R93
226_1%
R96
100_1%
R97
100_1%
1
C446
0.01u
VDDQ
VDDQ
VDDQ
VCC_DDR
Title
Size Document Number Rev
5
4
3
2
Date: Sheet of
MICRO-STAR INT'L CO.,LTD.
Brookdale-G GMCH-1 (HOST & HI & VGA)
星期五, 十月
11, 2002
MS-9134
1
83 5
0A
5
AH10
AH12
AH14
AH18
AGP
VCC_AGP
VCC_AGP
K10
K12
VCCSM
VCCSM
VCCSM
DDR
VCC_AGP
VCC_AGP
VCC_AGP
K14
K16
P10
AH22
VCCSM
VCC_AGP
V10
AB10
VCCSM
VCC_AGP
VDDQ
AN4
AP2
AT3
AP5
AN2
AP3
AR4
AT4
AT5
AR6
AT9
AR10
AT6
AP6
AT8
AP8
AP10
AT11
AT13
AT14
AT10
AR12
AR14
AP14
AT15
AP16
AT18
AT19
AR16
AT16
AP18
AR20
AR22
AP22
AP24
AT26
AT22
AT23
AT25
AR26
AP26
AT28
AR30
AP30
AT27
AR28
AT30
AT31
AR32
AT32
AR36
AP35
AP32
AT33
AP34
AT35
AN36
AM36
AK36
AJ36
AP36
AM35
AK35
AK34
AK24
AL23
V4
V2
W4
W5
U5
U4
U2
V3
T2
T3
T4
R2
R5
R7
T8
P3
P8
K4
K2
J2
M3
L5
L4
H4
G2
K3
J4
J5
J7
H3
K8
G4
R4
N4
M2
H2
U4B
SDQ0
SDQ1
SDQ2
SDQ3
SDQ4
SDQ5
SDQ6
SDQ7
SDQ8
SDQ9
SDQ10
SDQ11
SDQ12
SDQ13
SDQ14
SDQ15
SDQ16
SDQ17
SDQ18
SDQ19
SDQ20
SDQ21
SDQ22
SDQ23
SDQ24
SDQ25
SDQ26
SDQ27
SDQ28
SDQ29
SDQ30
SDQ31
SDQ32
SDQ33
SDQ34
SDQ35
SDQ36
SDQ37
SDQ38
SDQ39
SDQ40
SDQ41
SDQ42
SDQ43
SDQ44
SDQ45
SDQ46
SDQ47
SDQ48
SDQ49
SDQ50
SDQ51
SDQ52
SDQ53
SDQ54
SDQ55
SDQ56
SDQ57
SDQ58
SDQ59
SDQ60
SDQ61
SDQ62
SDQ63
SRCVEN_OUT#
SRCVEN_IN#
G_AD0
G_AD1
G_AD2
G_AD3
G_AD4
G_AD5
G_AD6
G_AD7
G_AD8
G_AD9
G_AD10
G_AD11
G_AD12
G_AD13
G_AD14
G_AD15
G_AD16
G_AD17
G_AD18
G_AD19
G_AD20
G_AD21
G_AD22
G_AD23
G_AD24
G_AD25
G_AD26
G_AD27
G_AD28
G_AD29
G_AD30
G_AD31
G_C/BE0#
G_C/BE1#
G_C/BE2#
G_C/BE3#
MDQ0
MDQ1
MDQ2
MDQ3
MDQ4
MDQ5
MDQ6
MDQ7
MDQ8
MDQ9
D D
C C
Trace lengh
must as short
as possible
for SRCVEN
Trace width 12
mil with 12 mil
space for
SM_VREF.
B B
A A
DDR_VREF
GAD13 <17>
GAD14 <17>
GAD15 <17>
GAD30 <17>
MDQ10
MDQ11
MDQ12
MDQ13
MDQ14
MDQ15
MDQ16
MDQ17
MDQ18
MDQ19
MDQ20
MDQ21
MDQ22
MDQ23
MDQ24
MDQ25
MDQ26
MDQ27
MDQ28
MDQ29
MDQ30
MDQ31
MDQ32
MDQ33
MDQ34
MDQ35
MDQ36
MDQ37
MDQ38
MDQ39
MDQ40
MDQ41
MDQ42
MDQ43
MDQ44
MDQ45
MDQ46
MDQ47
MDQ48
MDQ49
MDQ50
MDQ51
MDQ52
MDQ53
MDQ54
MDQ55
MDQ56
MDQ57
MDQ58
MDQ59
MDQ60
MDQ61
MDQ62
MDQ63
R118 X_0_Soder
C55 0.1u
GAD13
GAD14
GAD15
GAD30
5
AH26
SMA0
SMA1
SMA2
VCCSM
SMA3
SMA4
SMA5
SMA6
SMA7
SMA8
SMA9
SMA10
SMA11
SMA12
SMAB1
SMAB2
SMAB4
SMAB5
SDQS0
SDQS1
SDQS2
SDQS3
SDQS4
SDQS5
SDQS6
SDQS7
SDM0
SDM1
SDM2
SDM3
SDM4
SDM5
SDM6
SDM7
SCKE0
SCKE1
SCKE2
SCKE3
SCS0#
SCS1#
SCS2#
SCS3#
SCMDCL_K0
SCMDCLK_0#
SCMDCLK_1
SCMDCLK_1#
SCMDCLK_2
SCMDCLK_2#
SCMDCLK_3
SCMDCLK_3#
SCMDCLK_4
SCMDCLK_4#
SCMDCLK_5
SCMDCLK_5#
SBA_0
SBA_1
SRAS#
SCAS#
SWE#
SMX_RCOMP0
SMY_RCOMP SM_VREF
G_FRAME#
G_IRDY#
G_TRDY#
G_DEVSEL#
G_STOP#
G_PAR
G_REQ#
G_GNT#
SBA0
SBA1
SBA2
SBA3
SBA4
SBA5
SBA6
SBA7
SB_STB
SB_STB#
AD_STB0
AD_STB0#
AD_STB1
AD_STB1#
PIPE#
RBF#
WBF#
AGP_VREF
AGP_RCOMP
VCC_AGP
AD10
4
VCC_DDR
ST0
ST1
ST2
4
AL25
AN25
AP23
AK20
AL19
AL17
AP19
AP17
AN17
AK16
AK26
AL15
AN15
AP25
AN23
AN19
AK18
AR2
AT7
AT12
AT17
AR24
AT29
AT34
AL36
AP4
AR8
AP12
AR18
AT24
AP28
AR34
AL34
AP13
AN13
AK14
AL13
AL29
AP31
AK30
AN31
AL21
AK22
AN11
AP11
AM34
AL33
AP21
AN21
AP9
AN9
AP33
AN34
AN27
AP27
AK28
AN29
AP29
SMX
AF10
SMY
AJ34 AM2
GFRAME#
M4
GIRDY#
N7
GTRDY#
N5
GDEVSEL#
N2
GSTOP#
P2
GPAR
P4
GREQ#
D5
GGNT#
B5
C3
C2
D3
D2
E4
E2
F3
F2
SB_STB
F4
SB_STB#
E5
ST0
C4
ST1
B4
ST2
B3
GAD_STB0
V8
GAD_STB#0
U7
GAD_STB1
M8
GAD_STB#1
L7
H8
G7
G5
AGPREF
W2
R121 40.2_1%
L2
Brookdale_GMCH
DDRMAA0
DDRMAA1
DDRMAA2
DDRMAA3
DDRMAA4
DDRMAA5
DDRMAA6
DDRMAA7
DDRMAA8
DDRMAA9
DDRMAA10
DDRMAA11
DDRMAA12
MSDQS0
MSDQS1
MSDQS2
MSDQS3
MSDQS4
MSDQS5
MSDQS6
MSDQS7
MSDM0
MSDM1
MSDM2
MSDM3
MSDM4
MSDM5
MSDM6
MSDM7
MSCKE0
MSCKE1
MSCKE2
MSCKE3
GFRAME# <17>
GIRDY# <17>
GTRDY# <17>
GDEVSEL# <17>
GSTOP# <17>
GPAR <17>
GREQ# <17>
GGNT# <17>
SB_STB <17>
SB_STB# <17>
ST0 <17>
ST1 <17>
ST2 <17>
GAD_STB0 <17>
GAD_STB#0 <17>
GAD_STB1 <17>
GAD_STB#1 <17>
PIPE#
PIPE# <17>
RBF#
RBF# <17>
WBF#
WBF# <17>
DDRMAB1 <14,15>
DDRMAB2 <14,15>
DDRMAB4 <14,15>
DDRMAB5 <14,15>
MSCKE0 <14,15>
MSCKE1 <14,15>
MSCKE2 <14,15>
MSCKE3 <14,15>
MSCS0# <14,15>
MSCS1# <14,15>
MSCS2# <14,15>
MSCS3# <14,15>
DCLK0 <14>
DCLK0# <14>
DCLK1 <14>
DCLK1# <14>
DCLK2 <14>
DCLK2# <14>
DCLK3 <14>
DCLK3# <14>
DCLK4 <14>
DCLK4# <14>
DCLK5 <14>
DCLK5# <14>
MSBS0 <14,15>
MSBS1 <14,15>
MRAS# <14,15>
MCAS# <14,15>
MWE# <14,15>
3
DDRMAA[12..0] <14,15>
Trace width 12 mil
with 10 mil space.
Place 0.1uF <1" to GM CH
R119
60.4
C57
R33
0.1u
60.4
VDDQ
R1246
1K_1%
R1247
1K_1%
3
VCC_DDR
R120
60.4
C56
0.1u
R34
60.4
AGPREF: 10uA
AGPREF
CB329
0.1u
NEAR AGP SLOT
2
1
DDR SERIAL RESISTORS
RN3 10
DDRMD[63..0] <14,15>
Title
Size Document Number Rev
2
Date: Sheet of
DDRMD1
DDRMD5
DDRMD4
DDRMD0
DDRMD3
DDRMD7
DDRMD6
DDRMD2
DDRMD13
DDRMD12
DDRMD9
DDRMD8
DDRMD11
DDRMD10
DDRMD15
DDRMD14
DDRMD21
DDRMD17
DDRMD16
DDRMD20
DDRMD23
DDRMD19
DDRMD22
DDRMD18
DDRMD25
DDRMD29
DDRMD28
DDRMD24
DDRMD31
DDRMD27
DDRMD30
DDRMD26
DDRMD37
DDRMD33
DDRMD36
DDRMD32
DDRMD35
DDRMD39
DDRMD38
DDRMD34
DDRMD41
DDRMD45
DDRMD44
DDRMD40
DDRMD47
DDRMD43
DDRMD46
DDRMD42
DDRMD53
DDRMD52
DDRMD49
DDRMD48
DDRMD51
DDRMD50
DDRMD55
DDRMD54
DDRMD57
DDRMD61
DDRMD56
DDRMD60
DDRMD59
DDRMD63
DDRMD58
DDRMD62
MSDM0 SDM0
MSDM1
MSDM2
MSDM3
MSDM4
MSDM5
MSDM6
MSDM7
MSDQS0
MSDQS1
MSDQS2
MSDQS3
MSDQS4
MSDQS5
MSDQS6
MSDQS7
MSI
星期五, 十月
11, 2002
7 8
5 6
3 4
1 2
RN5 10
7 8
5 6
3 4
1 2
RN7 10
7 8
5 6
3 4
1 2
RN9 10
7 8
5 6
3 4
1 2
RN10 10
7 8
5 6
3 4
1 2
RN12 10
7 8
5 6
3 4
1 2
RN13 10
7 8
5 6
3 4
1 2
RN14 10
7 8
5 6
3 4
1 2
RN15 10
7 8
5 6
3 4
1 2
RN16 10
7 8
5 6
3 4
1 2
RN18 10
7 8
5 6
3 4
1 2
RN20 10
7 8
5 6
3 4
1 2
RN21 10
7 8
5 6
3 4
1 2
RN22 10
7 8
5 6
3 4
1 2
RN23 10
7 8
5 6
3 4
1 2
RN24 10
7 8
5 6
3 4
1 2
R609 10
R610 10
R611 10
R612 10
R613 10
R614 10
R615 10
R616 10
R110 10
R111 10
R112 10
R113 10
R114 10
R115 10
R116 10
R117 10
SDM1
SDM2
SDM3
SDM4
SDM5
SDM6
SDM7
SDQS[7..0] <14,15>
MICRO-STAR INT'L CO.,LTD.
Brookdale-G GMCH-2 (DDR & AGP)
MS-9134
1
MDQ1
MDQ5
MDQ4
MDQ0
MDQ3
MDQ7
MDQ6
MDQ2
MDQ13
MDQ12
MDQ9
MDQ8
MDQ11
MDQ10
MDQ15
MDQ14
MDQ21
MDQ17
MDQ16
MDQ20
MDQ23
MDQ19
MDQ22
MDQ18
MDQ25
MDQ29
MDQ28
MDQ24
MDQ31
MDQ27
MDQ30
MDQ26
MDQ37
MDQ33
MDQ36
MDQ32
MDQ35
MDQ39
MDQ38
MDQ34
MDQ41
MDQ45
MDQ44
MDQ40
MDQ47
MDQ43
MDQ46
MDQ42
MDQ53
MDQ52
MDQ49
MDQ48
MDQ51
MDQ50
MDQ55
MDQ54
MDQ57
MDQ61
MDQ56
MDQ60
MDQ59
MDQ63
MDQ58
MDQ62
SDM0 <14,15>
SDM1 <14,15>
SDM2 <14,15>
SDM3 <14,15>
SDM4 <14,15>
SDM5 <14,15>
SDM6 <14,15>
SDM7 <14,15>
SDQS0
SDQS1
SDQS2
SDQS3
SDQS4
SDQS5
SDQS6
SDQS7
93 5
0A
U18
V18
Y18
AA18
AL31
AR31
AU31
F32
H32
K32
M32
P32
T32
V32
Y32
AB32
AD32
AF32
AH32
AM4
AG5
AN5
AR5
AR19
AM32
A33
C33
AJ33
AN33
AR33
AB6
AF6
AM6
U20
V20
Y20
AA20
AM20
A21
B21
C21
D21
E21
G21
D34
W34
A35
E35
G35
L35
AN7
AR7
AU7
V21
Y21
AR21
F22
H22
XX3
XX4
XX5
XX6
GMCH DECOUPLING CAPACITOR
C17
D17
E17
G17
J17
V17
AH30
C31
AC3
AG3
AM3
AN3
AR3
AU3
AB4
AG4
Y17
AJ17
AR17
AR9
AM10
AR23
AU23
F24
AM24
VSS
VSS
A25
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
Brookdale_GMCH
N35
R35
U35
AA35
AC35
AE35
AG35
AL35
AN35
AR35
AU35
B36
W36
AF8
AM8
G9
J9
N9
U9
AA9
AE9
A23
C23
D23
J23
AH36
AT36
C37
E37
J37
U37
AA37
AE37
AG37
AJ37
C25
AN37
AR37
AR11
AU11
J25
AJ25
AR25
F26
AK12
AM12
B13
C13
D13
E13
A27
C27
J27
AJ13
AR13
F14
AL27
AR27
AU27
F28
AM28
E1
J1
N1
U1
AA1
AE1 AJ21
AN1
AR1
B2
D15
AR15
AU15
N37
C16
1000U/6.3V_SANYO
VSS
VSS
VSS
AM16
B17
VDDQ
C58
Pin A5
0.01u
CB75
Pin E1
0.1u
CB74
Pin J1
0.1u
CB77
Pin N1
0.1u
CB80
Pin U1
0.1u
Place decoupling cap
close to GMCH AGP
Interface < 0.1"
Place decoupling cap
close to GMCH
Hub-Link Interface<
0.1"
VDDQ
CB73
0.1u
C142
0.01u
Place decoupling cap
close to GMCH Core
Logic Interface <
0.1"
VDDQ
+
CT11
1000U/6.3V_SANYO
Place Bulk cap for Core Logic,
AGP & Hub Link Interface
VCC_DDR
+
+
CT16
Place Bulk cap between
GMCH & DIMM slot
+
CT14
CT15
470u/16V
1000U/6.3V_SANYO
Place decoupling cap
close to GMCH CPU
Interface < 250mil
in the Vtt corridor
VDDQ VDDQ
CB76
0.1u
CB79
0.1u
Pin AA1
Pin AE1
Place decoupling cap
close to GMCH DAC
Interface< 0.1"
VCC_DDR
CB81
0.1u
CB82
VCCP
CB84
0.1u
CB86
0.1u
CB89
0.1u
CB91
0.1u
CB93
0.1u
0.1u
CB83
0.1u
CB85
0.1u
CB87
0.1u
CB90
0.1u
CB92
0.1u
CB94
0.1u
Place decoupling cap
close to GMCH Memory
Interface < 0.1", with
18 mil trach width
VCCP
CB276
10u-1206
CB277
10u-1206
MSI
Title
Size Document Number Rev
Date: Sheet of
MICRO-STAR INT'L CO.,LTD.
Broodale GMCH(VSS)
星期五, 十月
11, 2002
C137
0.01u
CB88
0.1u
Pin AL37
Pin AU5
Pin AU9
Pin AU13
Pin AU17
Pin AU25
Pin AU29
Pin AU33
MS-9134
Pin B14
Pin A15
0A
10 35
U4D
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
A5
VSS
C5
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
F6
VSS
H6
VSS
M6
VSS
T6
VSS
Y6
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
J21
VSS
VSS
VSS
VSS
VSS
VSS
J35
VSS
VSS
VSS
VSS
VSS
B8
VSS
C8
VSS
D8
VSS
F8
VSS
VSS
VSS
VSS
VSS
VSS
HVSS
HVSS
HVSS
HVSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
A29
C29
J29
L29
N29
U29
R29
W29
AA29
AC29
AE29
AG29
AJ29
AR29
F30
AT2E3G3J3L3N3R3U3W3
ICH4 PCI / HUB LINK / CPU / LAN / INTERRUPT SIGNALS
VDDQ
VCC3 VCC1_5SB
VCC3_SB
SMI#
R122 33
100p C78
HSMI# <6>
ICH4 STRAPPING RESISTORS
EE_DOUT
R133 10K
7,24,25,27,29,31
VCC3_SB
AD[31..0]
C_BE#[3..0] 24,25,27,29,31
DEVSEL# <17,24,25,27,29,31>
FRAME# <17,24,25,27,29,31>
IRDY# <17,24,25,27,29,31>
TRDY# <17,24,25,27,29,31>
STOP# <17,24,25,27,29,31>
PAR <17,24,25,27,29,31>
PLOCK# <17>
SERR# <17,24,29,31>
PERR# <17,24,29,31>
PME# <17,24,29,31>
ICH_PCLK <5>
PCIRST# <21>
R1248 X_10K
R1249 10K
R948 33
LAN_RST#
LAN_RST#
AD0
AD1
AD2
AD3
AD4
AD5
AD6
AD7
AD8
AD9
AD10
AD11
AD12
AD13
AD14
AD15
AD16
AD17
AD18
AD19
AD20
AD21
AD22
AD23
AD24
AD25
AD26
AD27
AD28
AD29
AD30
AD31
C_BE#0
C_BE#1
C_BE#2
C_BE#3
PREQ#A
EE_DOUT
D10
D11
C12
H5
J3
H3
K1
G5
J4
H4
J5
K2
G2
L1
G4
L2
H2
L3
F5
F4
N1
E5
N2
E3
N3
E4
M5
E2
P1
E1
P2
D3
R1
D2
P4
J2
K4
M4
N4
M3
F1
L5
F2
F3
G1
M2
K5
L4
W2
B5
E8
P5
U5
Y5
A8
K12
K10
AD0
AD1
AD2
VCC1_5
AD3
AD4
AD5
AD6
AD7
AD8
AD9
AD10
AD11
AD12
AD13
AD14
AD15
AD16
AD17
AD18
AD19
AD20
AD21
AD22
AD23
AD24
AD25
AD26
AD27
AD28
AD29
AD30
AD31
C/BE0#
C/BE1#
C/BE2#
C/BE3#
DEVSEL#
FRAME#
IRDY#
TRDY#
STOP#
PAR
PLOCK#
SERR#
PERR#
PME#
GPIO0/REQA#
GPIO16/GNTA#
PCICLK
PCIRST#
LAN_RST#
EE_CS
EE_DIN
EE_DOUT
EE_SHCLK
GND1
GND2
GND3
A1
A16
A18
A20
K18
VCC1_5
VCC1_5
GND4
GND5
A22A4AA12
K22
VCC1_5
GND6
P10
VCC1_5
GND7
T18
VCC1_5
GND8
AA16
U19
VCC1_5
GND9
AA22
V14A5AC17
VCC1_5
GND10
GND11
AA3
AA9
VCC3_3
GND12
AB20
AB7
AC8B2H18H6J1
VCC3_3
VCC3_3
VCC3_3
GND13
GND14
GND15
AC1
AC10
AC14
VCC3_3
VCC3_3
GND16
GND17
AC18
J18K6M10
VCC3_3
GND18
AC23
AC5
VCC3_3
VCC3_3
GND19
GND20
B12
P12P6U1
VCC3_3
GND21
B16
B18
VCC3_3
VCC3_3
GND22
GND23
B20
V10
V16
VCC3_3
VCC3_3
GND24
GND25
B22B9C15
V18
VCC3_3
VCC3_3
GND26
GND27
C17
E12
GND28
C19
C21
E13
VCCSUS1_5
VCCSUS1_5
GND29
GND30
C23C6D1
E20
VCCSUS1_5
GND31
F14
G18R6T6
VCCSUS1_5
GND32
D12
VCCSUS1_5
VCCSUS1_5
GND33
GND34
D15
VCCSUS1_5
GND35
D17
U6
VCCSUS1_5
GND36
D19
E11
GND37
D21
D23D4D8
F10
VCCSUS3_3
GND38
F15
F16
F17
F18
K14V7V8
VCCSUS3_3
VCCSUS3_3
VCCSUS3_3
VCCSUS3_3
VCCSUS3_3
GPIO1/REQB#/REQ5#
GPIO17/GNTB#/GNT5#
GND41
GND42
GND43
GND39
GND40
E14
D22
E10
E16
V9
VCCSUS3_3
VCCSUS3_3
VCCSUS3_3
VCCSUS3_3
THRMTRIP#
HI_SWING
LAN_RSTSYNC
LAN_RXD0
LAN_RXD1
LAN_RXD2
LAN_TXD0
LAN_TXD1
LAN_TXD2
GND44
GND45
GND46
GND47
E17
E18
E19
A20M#
CPUSLP#
FERR#
IGNNE#
INIT#
INTR
NMI
SMI#
STPCLK#
RCIN#
A20GATE
HI10
HI11
HI_STB
HL_STB#
HLCOMP
HIREF
PIRQA#
PIRQB#
PIRQC#
PIRQD#
IRQ14
IRQ15
APICCLK
APICD0
APICD1
SERIRQ
REQ0#
REQ1#
REQ2#
REQ3#
REQ4#
GNT0#
GNT1#
GNT2#
GNT3#
GNT4#
LAN_CLK
INT-82801DB
U5A
HI0
HI1
HI2
HI3
HI4
HI5
HI6
HI7
HI8
HI9
NC
AB23
U21
AA21
W21
V22
AB22
V21
W23
V23
U22
Y22
U23
W20
L19
L20
M19
M21
P19
R19
T20
R20
P23
L22
N22
K21
P21
N20
R23
R22
M23
D5
C2
B4
A3
AC13
AA19
J19
H19
K20
J22
B1
A2
B3
C7
B6
A6
C1
E6
A7
B7
D6
C5
C11
B11
A10
A9
A11
B10
C10
A12
R187 0
SMI#
KB_RST#
A20GATE#
TRMTRIP#
HL0
HL1
HL2
HL3
HL4
HL5
HL6
HL7
HL8
HL9
HL10
R521 62
R130 68.1_1%
HI_ISWING
HUB_IREF
APICCLK
APIC_D0
APIC_D1
SERIRQ
PREQ#0
PREQ#1
PREQ#2
PREQ#3
PREQ#4
PREQ#5
PGNT#0
PGNT#1
PGNT#2
PGNT#3
PGNT#4
PGNT#5
A20M#
FERR#
A20M# <6>
SLP# <6>
FERR# <6>
IGNNE# <6>
FINIT# <18>
HINIT# <6>
INTR <6>
ICH_NMI <33>
STPCLK# <6>
KB_RST# <13>
A20GATE# <13>
TRMTRIP# <6>
HL[10..0] <8>
This resistor less than 0.5"
from ICH use 15 mils trace
HL_STB <8>
HL_STB# <8>
VDDQ
INTA# <17>
INTB# <17>
INTC# <17,29>
INTD# <17,31>
IRQ14 <5>
IRQ15 <5>
SERIRQ <13>
PREQ#0 <17>
PREQ#1 <17,29>
PREQ#2 <17,31>
PREQ#3 <17,25>
PREQ#4 <17,27>
PREQ#5 <17,24>
PGNT#0 <17>
PGNT#1 <29>
PGNT#2 <31>
PGNT#3 <25>
PGNT#4 <27>
PGNT#5 <24>
Reserved pull-down resistor for ICH4
reserved function straps.
ICH4 PULL-UP/DOWN RESIS TO RS
FERR#
TRMTRIP#
SERIRQ
KB_RST#
A20GATE#
PREQ#A
PREQ#5
APIC_D0
APIC_D1
APICCLK
R123 62
R124 62
R125 8.2K
R126 8.2K
R127 8.2K
R131 8.2K
R745 8.2K
R128 10K
R129 10K
VCCP
VCC3
ICH4 REFERENCE VOLTAGE
VDDQ
R135
HI_ISWING
C79
C80
0.01u
0.1u
HUB_IREF
C81
C82
0.01u
0.1u
Place Cap. as Close as possible to ICH4 < 0.25"
Trace width use 12 mils and 10mils space
226_1%
R136
100_1%
R137
100_1%
Pin A1 Pin H1
VCC3
Pin A4
CB102
CB103
0.1u
0.1u
ICH4 DECOUPLING CAPACITORS
Pin AC10
CB104
0.1u
Pin T1
CB105
0.1u
Pin AC18
CB106
0.1u
CB107
0.1u
Place one 0.1u close to ICH4 <100 mil
Pin K23 Pin C23 Pin A16 Pin AC1 Pin T23 Pin N23 Pin C22 Pin C22
C140
CB96
0.1u
CB95
0.1u
CB99
0.1u
0.01u
FOR Core Logic FOR Hub Interface FOR PLL
VDDQ VDDQ VDDQ
CB97
C83
0.1u
0.1u
VCC1_5SB
CB100
0.1u
CB101
0.1u
MSI
Title
Size Document Number Rev
Date: Sheet of
MICRO-STAR INT'L CO.,LTD.
ICH4 PCI & HI & LAN
星期五, 十月
11, 2002
MS-9134
11 35
0A