MSI MS-8605 Schematic 130

3

5

4

3

2

1

D D

CON1

TX2-4
TX2+4

DDCCLK3
DDCDATA3

TX1-4

C C

TX1+4

TXC-4
TXC+4

TX0+4
TX0-4

1
2
3
4
5
6
7
8

9
10
11
12

DATA2
DATA2
SHIELD24
DATA4
DATA4
DDCCLK
DDCDATA
NC
DATA1
DATA1
SHIELD13
DATA3

DVI-D

SHIELDCLK

DATA3

VCC5
GND5

HPDET

DATA0
DATA0

SHIELD05

DATA5
DATA5

CLK

CLK
Shell
Shell

13
14
15
16
17
18
19
20
21
22
23
24
25
26

C1

0.1uF

L5 BEAD

C2
10uF

5.0V

F1

750mA

C=1

A=2 3

R1 10K

Regular
Diode
SOT23

3.3V

C3

0.1uF

1

D2

1

3

2

3

2

Empty

1

Dual

2

3

Diode
SOT23

3.3V
21

B B

D1

MMBD4148DITR-ND

C=3

2n3904
SOT23

3

E=2

B=1

2N3904

HPDET4

C

Q1

B

E

2

1

CBE
terminal

R2
10K

A A

Title

Size Document Number Rev

5

4

3

2

Date: Sheet of

SiI164 Carrera ADD CARD

DVI Output Connector

B

SiI-SC-0034-D 1.3

1 4Tuesday, August 20, 2002

1

5

4

3

2

1

1.5V 3.3V 5.0V

5.0V

3.3V

D D

1.5V

ID0 ID1
ID2 ID3

ID4

C C

D10
D8

D6

IDCK-4 IDCK+ 4

D4
D2

D0

HSYNC4

MI2C_CLK3

B B

MI2C_DATA3

VREFCG4

B10
B11
B12
B13
B14
B15
B16
B17
B18
B19
B20
B21
B22
B23
B24
B25
B26
B27
B28
B29
B30
B31
B32
B33
B34
B35
B36
B37
B38
B39
B40
B41

B46
B47
B48
B49
B50
B51
B52
B53
B54
B55
B56
B57
B58
B59
B60
B61
B62
B63
B64
B65
B66

B1
B2
B3
B4
B5
B6
B7
B8
B9

CON2

NC

5.0V

5.0V
NC
GND
NC
NC
NC
VCC3.3
NC
NC
NC
GND
NC
ADD_ID0
VCC3.3
ADD_ID2
NC
GND
ADD_ID4
ADD_ID6
NC
GND

3.3VAUX
VCC3.3
DVOC_FLD/STL
DVOC_D10
VCC3.3
DVOC_D8
DVOC_D6
GND
DVOC_CLK
DVOC_D4
VDDQ1.5
DVOC_D2
DVOC_D0
GND
DVOC_HSYNC
NC
VDDQ1.5
M_I2CCLK

M_I2CDATA
VDDQ1.5
NC
GND
NC
DVOB_BLANK#
VDDQ1.5
DVOB_FLD/STL
DVOB_D10
GND
DVOB_D8
DVOB_D6
VDDQ1.5
DVOB_CLK
DVOB_D4
GND
DVOB_D2
DVOB_D0
VDDQ1.5
DVOB_VSYNC
VREFCG

12V

TYPEDET

GND

RST#

VCC3.3

GND

ADD_ID1

VCC3.3

ADD_ID3

GND
ADD_ID5
ADD_ID7

GND

VCC3.3

DVOBC_INTR#

DVOC_D11

VCC3.3
DVOC_D9
DVOC_D7

GND

DVOC_CLK#

DVOC_D5

VDDQ1.5
DVOC_D3
DVOC_D1

GND

DVOC_BLANK#

DVOC_VSYNC

VDDQ1.5

M_DVI_DATA

M_DVI_CLK

M_DDCDATA

GND

ADD_DETECT

M_DDCCLK

VDDQ1.5

DVOBC_CLKINT

DVOB_D11

GND
DVOB_D9
DVOB_D7

VDDQ1.5

DVOB_CLK#

DVOB_D5

GND
DVOB_D3
DVOB_D1

VDDQ1.5

DVOB_HSYNC

VREFGC

AGP/DVO

A A

3.3V

1.5V

A1
A2
A3

NC

A4

NC

A5
A6

NC

A7
A8

NC

A9
A10

NC

A11

NC

A12

NC

A13
A14

NC

A15
A16
A17
A18

NC

A19
A20
A21
A22

NC

A23
A24

NC

A25
A26
A27
A28
A29
A30
A31
A32
A33
A34
A35
A36
A37
A38
A39
A40
A41

A46
A47
A48

NC

A49
A50
A51
A52
A53
A54
A55
A56
A57
A58
A59
A60
A61
A62
A63
A64
A65
A66

D11
D9

D7

D5
D3

D1

R12 330

ID5
ID7ID6

R11 8.2K

R13 8.2K

ISEL/RST# 4

MSEN/SOUT 4

DE 4
VSYNC 4

Empty

Empty

VREFGC 4

MDDC_DATA 3

MDDC_CLK 3

1.5V

ADD ID Stuffing options
Recommended Default
ID = 41h , U2 = 24C32R3ID = 31h , U2=24C08

8.2k ohm

R3
R4

NOTE: Resistors not listed in table above should be left empty.

5

4

3

Silicon Image
ID 24C32
(default)

330 ohm

R5
R6
R7
R8
R9
R10

C28

0.1uF

D11
D10
D9
D8

D7
D6
IDCK­IDCK+

D5
D4
D3
D2

D1
D0
DE
HSYNC

VSYNC

ID0
ID1
ID2
ID3
ID4
ID5
ID6
ID7

Option, see note

8.2k ohm

R41
R42

2

C29

10uF

RP1 33

1 8
2 7
3 6
4 5

RP2 33

1 8
2 7
3 6
4 5

RP3 33

1 8
2 7
3 6
4 5

RP4 33

1 8
2 7
3 6
4 5

R47 33

R3

8.2K

330 ohm

R5
R6
R7
R10
R44

NOTE: ADD ID selects the type of EEPROM (U2).
Some early versions of i845 Chipset BIOS have
a bug than can corrupt 24C08 EEPROM, check
BIOS before using 24C08 EEPROM.

Title

Size Document Number Rev

Date: Sheet of

C31

C30

0.1uF

R_D11
R_D10
R_D9
R_D8

R_D7
R_D6
R_IDCK­R_IDCK+

R_D5
R_D4
R_D3
R_D2

R_D1
R_D0
R_DE
R_HSYNC

R_VSYNC

10uF

R_IDCK- 4
R_IDCK+ 4

R_DE 4
R_HSYNC 4

R_VSYNC 4

C32

0.1uF

1.5V

R41

R42

8.2K

8.2KR48.2K

Empty Empty

Empty

SiI164 Carrera ADD CARD

DVO/AGP

B

SiI-SC-0034-D 1.3

R43

8.2K

C33

10uF

R_D[11:0] 4

R5 330
R6 330

R7 330

R8 330
R9 330
R44 330
R10 330

1

Empty

2 4Tuesday, August 20, 2002

Level Shifter

5

4

3

2

1

Option A

R22

2.2K

3.3V

R23

R24

2.2K

2.2K

DDCDATA 1
DDCCLK 1
I2CDATA 4
I2CCLK 4

I2CDATA_P I2CCLK_P
I2CCLK_P

2.9V

1

Q2

G

S D

3

2

2.9V

2

2.9V

2

2.9V

2

2N7002

1

Q4

G

S D

2N7002

1

Q6

G

S D

2N7002

1

Q7

G

S D

2N7002

3

3

3

I2CDATA 4

I2CDATA_P

5V I2C for EEPROM

I2CCLK 4

5V I2C for EEPROM

I2CCLK_P

3

EEPROM

5.0V

R25
0

U2

1
2
3
4

Bypass
Caps

2

8

VCC

A0

7

WP

A1

6

SCL

A2

5

SDA

VSS

24C32 (default)

or 24C08

These capacitors should be placed between

AGP connector and DVO device

Title

Size Document Number Rev

Date: Sheet of

Empty

NOTE: Use correct ADD ID for EEPROM.
ADD ID is selected by resistor strapping options
on AGP connector interface.
ADD ID = 41h for 24C32 device (recommended)
ADD ID = 31h for 24C08 device

1.5V

C6

0.1uF

SiI164 Carrera ADD CARD

B

NOTE:

WP: Write Protected
GND: Normal Read and Write.

5.0V: Array Write Protected

C5

0.1uF

I2CDATA_P

C7

C8

0.1uF

0.1uF

Level Shifter & EPROM

SiI-SC-0034-D 1.3

1

3 4Tuesday, August 20, 2002

D D

R17

R16

R15

R14
1K

MDDC_DATA2
MDDC_CLK2
MI2C_DATA2
MI2C_CLK2

C C

Option B

5.0V

Use stable power supply

R45
715 1%

2.9V

R46
1K 1%

B B

C40
1uF

MDDC_DATA2

MDDC_CLK2

2

2

1K

2.9V

S D

2.9V

S D

1

G

1

G

1K

Q3

2N7002

Q5

2N7002

1K

U1

1

GND

2

SREF

3

S1

4

S2

5

S3

6

S4

7

S5

8

S6

9

S7

10

S8

11

S9

12

S10

D

231

SOT-23

G S

3

3

DDCDATA 1

DDCCLK 1

GREF
DREF

GTL2010

D10

24
23
22

D1

21

D2

20

D3

19

D4

18

D5

17

D6

16

D7

15

D8

14

D9

13

Level shifting options

A: Stuff U1

A A

B: stuff Q2, Q3, Q4, Q5, Q6 and Q7

All pull-up resistors are required
for both cases.

5

5.0V1.5V

R18

R19

R20

2.2K

2.2K

R21

2.2K

200K

MI2C_DATA2

MI2C_CLK2

4

5

4

3

2

1

Keep these traces short and traight

Route traces as 100
Ohm Differential
Impedance

2-Layer FR4 PCB: 15 mil width, 6 mil space

D D

C C

R_D[11:0]2

R_DE2

ISEL/RST# 2

R_IDCK-2

C38

0.1uF

R_IDCK+2

R_HSYNC2
R_VSYNC2

U4

1

VIN

2

VOUT

3 6

VOUT VOUT

4

ADJ

LM317L/SO

5

B B

A A

4-Layer FR4 PCB: 10 mil width, 10 mil space
Keep GND at least 30 mil from traces

R_D11
R_D10
R_D9
R_D8
R_D7
R_D6
R_D5
R_D4
R_D3
R_D2
R_D1
R_D0

I2CDATA3
I2CCLK3

8

NC

7

VOUT

5

NC

R39
240

1%

R40
390

1%

C39

10uF

36
37
38
39
40
41
42
43
44
45
46
47
50
51
52
53
54
55
58
59
60
61
62
63

2

13
14

15
56

57

4
5

34

PVCC5.0V

U3

24

D23
D22
D21
D20
D19
D18
D17
D16
D15
D14/SYNCO
D13/MAST
D12/DUAL
D11
D10
D9
D8
D7
D6
D5
D4
D3
D2
D1
D0

DE
ISEL/RST

DSEL/SDA
BSEL/SCL

IDCK­IDCK+

HSYNC
VSYNC

SCAN_EN

Sil 164

4

TX0-

252627

TX0+

TX1-

282930

TX1+

TX2-

192021

22

31

DK3

TXC-

TX2+

TXC+

DK2
DK1

EXT_SWING

EDGE/CHG/SIN

MSEN/SOUT

DKEN

VCC1
GND1
VCC2
GND2
VCC3

PGND1
PVCC1
PGND2
PVCC2

AGND0
AVCC1
AGND1
AVCC2
AGND2

VREF

C26

0.1uF

R26 510 1%

6
7
8

9
10

PD

11

DKEN

35

C25

470pF

C27

470pF

VCC1

GND1

VCC2

GND2

VCC3

PGND1

PVCC1

PGND2

PVCC2

AGND0

AVCC1

AGND1

AVCC2

AGND2

EMPTY

R34
80

2%

R37
80

2%

EMPTY

R33
1K

2%

R36
1K

2%

1.5V

1
64
12
16
33

17
18
48
49

23

32

3

R30 0

L1 BEAD

C16

C15

10uF

0.1uF

R35 0

3

L2 BEAD

TX0- 1
TX0+ 1

TX1- 1
TX1+ 1

TX2- 1
TX2+ 1

TXC- 1
TXC+ 1

AVCC1

1.5V

R28
5K

3.3V

3.3V

VREFGC 2

VREFCG 2

MSEN/SOUT 2

C10

0.1uF

C20

0.1uF

3.3V

R31

2.2K

Empty

3.3V

R27
33K

R29
0

Place these resistors as close

Empty

to the SiI164 as possible.
With SiI168 chip, this pin
will be used as GND.

C12

C11

1nF

10uF

GND1

L3 BEAD

C19

C21

10uF

1nF

PGND1 PGND2

C36

AGND0

2

0.1uF

Title

Size Document Number Rev

B

Date: Sheet of

R32
330

Empty

C13

C34

1nF

0.1uF

GND2

PVCC

C22

0.1uF

AVCC1

C17
1nF

AGND1

SiI164 Carrera ADD CARD

SiI 164 CHIP

HPDET 1

VCC3VCC1 VCC2

C24
10uF

1

C9
10uF

L4 BEAD

AVCC2

C18
1nF

AGND2

4 4Tuesday, August 20, 2002

C14
1nF

PVCC

C35

0.1uF

PVCC2PVCC1

C23
1nF

C37

0.1uF

SiI-SC-0034-D 1.3