MSI MS-7721 Schematics rev.3.2
1
Cover Sheet
02 FM2 DDR3 I/F
03 FM2 PCIE I/F
04 FM2 DISPLAY/MSIC
05 FM2 POWER/GND
06,07 DDR3 DIMM CH-A CH-B
08,09,10,11,12
HUDSON
MS-7721 Ver:3.2
CPU:
AMD FM2
System Chipset:
AMD - Hudson D2 A55 CO-LAY A75
Controller - ISL62773 3+2
On Board Chipset:
LPC Super I/O --F71889ED
LAN-Realtek 8111E
Azalia CODEC - Realtek ALC887
Main Memory:VRM
DDR III * 2 MAX:16 GB
Expansion Slots:
PCI Express X16 Slot * 1
PCI Express X1 Slot * 1
PCI Slot * 1
13 PCIE X16 SLOT & X1 SLOT
14 PCI SLOTs
15 SUPER I/O F71889ED
16 LAN RTL8111E/81105E
17 AUDIO ALC887/VT1708S
18 USB2.0 CONN
19 USB3.0 CONN
20 HDMI CONNECTOR
A A
21 VGA CONNECTOR & FAN
FUSION BLOCK DIAGRAM
DP 1
100MHZ
DP0
33MHZ
PCIE x16
33MHZ
100MHZ
10/100/Giga bit
ETHERNET
8105EL/8111EL
DVI CON
PCIE x16 GEN2
PCIE INTERFACE
PCIE x1 SLOT1,2
FM2
UMI
GEN2
DDRIII 1333~1866
DDRIII 1333~1866
CHA
CHB
UNBUFFERED
DDRIII DIMM1
UNBUFFERED
DDRIII DIMM2
22 LPT/COM/PS2
USB
23 ACPI UPI & SYS POWER
24,25 CPU power
26 CPU_VDD1_2/NB 1.1V/VDDA2.5V
27 DDR POWER
28 ATX & Front Panel
29 BOM OPTION
A CONNECTOR
VG
100MHZ
SPI ROM 32M
REAR
USB
FRONT
SPI Bus
USB 2.0
USB 2.0
HUDSON 2/3
A55/A75
AZALIA
SERIAL ATA 3.0
33MHZ
PCI SLOT
ALC887/892
SATA [6:1]
AD[31..0]
ATX CON
DDR3 DRAM POWER
FCH CORE POWER
CPU CORE POWER
NB CORE POWERACPI CONTROLLER
ISL6277
CPU_VDDR1_2
CPU VDDA Power
DUAL POWER
1
SUPER I/O F71889
KBD
MOUSE
SERIAL
PORT
MICRO-START INT'L CO.,LTD.
MICRO-START INT'L CO.,LTD.
Title
Title
Title
COVER SHEET
COVER SHEET
COVER SHEET
Size Document Number Rev
Size Document Number Rev
Size
Document Number Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet
Date: Sheet
MICRO-START INT'L CO.,LTD.
MS-7721 3.2
MS-7721 3.2
MS-7721 3.2
134Tuesday, December 04, 2012
134Tuesday, December 04, 2012
134Tuesday, December 04, 2012
of
of
of
5
4
3
2
1
FM2DDR3 I/F
MEM_MA_DQS_L[7..0]6
MEM_MA_DQS_H[7..0]6
MEM_MA_DM[7..0]6
D D
MEM_MA_ADD[15..0]6
MEM_MA_BANK06
MEM_MA_BANK16
MEM_MA_BANK26
C C
CLOCK assignment can be changed
MEM_MA_CLK_H06
MEM_MA_CLK_L06
MEM_MA_CLK_H36
MEM_MA_CLK_L36
MEM_MA_CKE06
MEM_MA_CKE16
B B
VCC_DDR
A A
R294
R294
1K1%
1K1%
MEM_MA1_ODT06
MEM_MA1_ODT16
MEM_MA1_CS_L06
MEM_MA1_CS_L16
MEM_MA_RAS_L6
MEM_MA_CAS_L6
MEM_MA_WE_L6
MEM_MA_RESET#6
APU_M_VREF
VCC_DDR
R564
R564
APU_M_VREF
C153
C153
C0.1u10X0402
C0.1u10X0402
MEM_MA_ADD0
MEM_MA_ADD1
MEM_MA_ADD2
MEM_MA_ADD3
MEM_MA_ADD4
MEM_MA_ADD5
MEM_MA_ADD6
MEM_MA_ADD7
MEM_MA_ADD8
MEM_MA_ADD9
MEM_MA_ADD10
MEM_MA_ADD11
MEM_MA_ADD12
MEM_MA_ADD13
MEM_MA_ADD14
MEM_MA_ADD15
MEM_MA_BANK0
MEM_MA_BANK1
MEM_MA_BANK2
MEM_MA_DM0
MEM_MA_DM1
MEM_MA_DM2
MEM_MA_DM3
MEM_MA_DM4
MEM_MA_DM5
MEM_MA_DM6
MEM_MA_DM7
MEM_MA_DQS_H0
MEM_MA_DQS_L0
MEM_MA_DQS_H1
MEM_MA_DQS_L1
MEM_MA_DQS_H2
MEM_MA_DQS_L2
MEM_MA_DQS_H3
MEM_MA_DQS_L3
MEM_MA_DQS_H4
MEM_MA_DQS_L4
MEM_MA_DQS_H5
MEM_MA_DQS_L5
MEM_MA_DQS_H6
MEM_MA_DQS_L6
MEM_MA_DQS_H7
MEM_MA_DQS_L7
MEM_MA_CLK_H0
MEM_MA_CLK_L0
MEM_MA_CLK_H3
MEM_MA_CLK_L3
MEM_MA_CKE0
MEM_MA_CKE1
MEM_MA1_ODT0
MEM_MA1_ODT1
MEM_MA1_CS_L0
MEM_MA1_CS_L1
MEM_MA_RAS_L
MEM_MA_CAS_L
MEM_MA_WE_L
MEM_MA_RESET#
MEM_MA_HOT#
APU_M_ZVDIO
39.2R1%
39.2R1%
Layout:
Place within 1.0'' of APU
VCC_DDR
R303 1KR303 1K
R3041KR304
M25
M24
W26
AF29
AE25
AG21
AF17
AE28
AE29
AG24
AG25
AF20
AF21
AE16
AD16
AA24
AC27
AA25
AC26
AB26
W23
AB25
W25
1K
V27
P27
R25
P26
R24
P24
P23
N26
N23
V24
N25
Y23
L27
L24
V25
L26
E17
H21
F25
G29
H17
G17
F21
E21
G26
G25
F30
E30
U27
U26
T23
U23
T25
T26
R27
R28
L23
K26
Y27
Y24
Y26
J25
U24
K22
J24
CPU1B
CPU1B
MA_ADD0
MA_ADD1
MA_ADD2
MA_ADD3
MA_ADD4
MA_ADD5
MA_ADD6
MA_ADD7
MA_ADD8
MA_ADD9
MA_ADD10
MA_ADD11
MA_ADD12
MA_ADD13
MA_ADD14
MA_ADD15
MA_BANK0
MA_BANK1
MA_BANK2
MA_DM0
MA_DM1
MA_DM2
MA_DM3
MA_DM4
MA_DM5
MA_DM6
MA_DM7
MA_DQS_H0
MA_DQS_L0
MA_DQS_H1
MA_DQS_L1
MA_DQS_H2
MA_DQS_L2
MA_DQS_H3
MA_DQS_L3
MA_DQS_H4
MA_DQS_L4
MA_DQS_H5
MA_DQS_L5
MA_DQS_H6
MA_DQS_L6
MA_DQS_H7
MA_DQS_L7
MA_CLK_H0
MA_CLK_L0
MA_CLK_H1
MA_CLK_L1
MA_CLK_H2
MA_CLK_L2
MA_CLK_H3
MA_CLK_L3
MA_CKE0
MA_CKE1
MA0_ODT0
MA0_ODT1
MA1_ODT0
MA1_ODT1
MA0_CS_L0
MA0_CS_L1
MA1_CS_L0
MA1_CS_L1
MA_RAS_L
MA_CAS_L
MA_WE_L
MA_RESET_L
MA_EVENT_L
M_VREF
M_ZVDDIO
N12-9040020-F02
N12-9040020-F02
MEM_MA_HOT#
MEM_MB_HOT#
MA_DATA0
MA_DATA1
MA_DATA2
MA_DATA3
MA_DATA4
MA_DATA5
MA_DATA6
MA_DATA7
MA_DATA8
MA_DATA9
MA_DATA10
MA_DATA11
MA_DATA12
MA_DATA13
MA_DATA14
MA_DATA15
MA_DATA16
MA_DATA17
MA_DATA18
MA_DATA19
MA_DATA20
MA_DATA21
MA_DATA22
MA_DATA23
MA_DATA24
MA_DATA25
MA_DATA26
MA_DATA27
MA_DATA28
MA_DATA29
MA_DATA30
MA_DATA31
MA_DATA32
MA_DATA33
MA_DATA34
MA_DATA35
MA_DATA36
MA_DATA37
MA_DATA38
MA_DATA39
MA_DATA40
MA_DATA41
MA_DATA42
MA_DATA43
MA_DATA44
MA_DATA45
MA_DATA46
MA_DATA47
MA_DATA48
MA_DATA49
MA_DATA50
MA_DATA51
MA_DATA52
MA_DATA53
MA_DATA54
MA_DATA55
MA_DATA56
MA_DATA57
MA_DATA58
MA_DATA59
MA_DATA60
MA_DATA61
MA_DATA62
MA_DATA63
MEM_MA_DATA0
F16
MEM_MA_DATA1
G16
MEM_MA_DATA2
H18
MEM_MA_DATA3
F19
MEM_MA_DATA4
F15
MEM_MA_DATA5
H15
MEM_MA_DATA6
E18
MEM_MA_DATA7
F18
MEM_MA_DATA8
G20
MEM_MA_DATA9
H20
MEM_MA_DATA10
E23
MEM_MA_DATA11
G23
MEM_MA_DATA12
G19
MEM_MA_DATA13
E20
MEM_MA_DATA14
F22
MEM_MA_DATA15
G22
MEM_MA_DATA16
F24
MEM_MA_DATA17
H24
MEM_MA_DATA18
E27
MEM_MA_DATA19
F27
MEM_MA_DATA20
H23
MEM_MA_DATA21
E24
MEM_MA_DATA22
E26
MEM_MA_DATA23
H26
MEM_MA_DATA24
G28
MEM_MA_DATA25
E29
MEM_MA_DATA26
H29
MEM_MA_DATA27
H30
MEM_MA_DATA28
H27
MEM_MA_DATA29
F28
MEM_MA_DATA30
F31
MEM_MA_DATA31
G31
MEM_MA_DATA32
AD30
MEM_MA_DATA33
AF30
MEM_MA_DATA34
AG27
MEM_MA_DATA35
AF27
MEM_MA_DATA36
AD31
MEM_MA_DATA37
AE31
MEM_MA_DATA38
AG28
MEM_MA_DATA39
AD28
MEM_MA_DATA40
AF26
MEM_MA_DATA41
AD25
MEM_MA_DATA42
AF23
MEM_MA_DATA43
AE23
MEM_MA_DATA44
AD27
MEM_MA_DATA45
AE26
MEM_MA_DATA46
AF24
MEM_MA_DATA47
AD24
MEM_MA_DATA48
AG22
MEM_MA_DATA49
AD21
MEM_MA_DATA50
AE19
MEM_MA_DATA51
AG19
MEM_MA_DATA52
AD22
MEM_MA_DATA53
AE22
MEM_MA_DATA54
AE20
MEM_MA_DATA55
AD19
MEM_MA_DATA56
AG18
MEM_MA_DATA57
AE17
MEM_MA_DATA58
AF15
MEM_MA_DATA59
AG15
MEM_MA_DATA60
AD18
MEM_MA_DATA61
AF18
MEM_MA_DATA62
AG16
MEM_MA_DATA63
AD15
MA_CLK_H/L[3]
MA_CLK_H/L[0] MB_CLK_H/L[0]CK0/CK0# CK0/CK0#
MA1_CS_L[1:0] MB1_CS_L[1:0] S1#:S0#S1#:S0#
MA1_ODT[1:0] MB1_ODT[1:0]ODT[1:0] ODT[1:0]
MEM_MA_DATA[63..0]
UDIMM A1 UDIMM B1
CK1/CK1# MB_CLK_H/L[3] CK1/CK1#
6
MEM_MB_ADD0
MEM_MB_ADD1
MEM_MB_DQS_L[7..0]7
MEM_MB_DQS_H[7..0]7
MEM_MB_DM[7..0]7
MEM_MB_ADD[15..0]7
MEM_MB_BANK07
MEM_MB_BANK17
MEM_MB_BANK27
MEM_MB_CLK_H07
MEM_MB_CLK_L07
MEM_MB_CLK_H37
MEM_MB_CLK_L37
MEM_MB_CKE07
MEM_MB_CKE17
MEM_MB1_ODT07
MEM_MB1_ODT17
MEM_MB1_CS_L07
MEM_MB1_CS_L17
MEM_MB_RAS_L7
MEM_MB_CAS_L7
MEM_MB_WE_L7
MEM_MB_RESET#7MEM_MA_HOT#6
MEM_MB_HOT#7
MEM_MB_ADD2
MEM_MB_ADD3
MEM_MB_ADD4
MEM_MB_ADD5
MEM_MB_ADD6
MEM_MB_ADD7
MEM_MB_ADD8
MEM_MB_ADD9
MEM_MB_ADD10
MEM_MB_ADD11
MEM_MB_ADD12
MEM_MB_ADD13
MEM_MB_ADD14
MEM_MB_ADD15
MEM_MB_BANK0
MEM_MB_BANK1
MEM_MB_BANK2
MEM_MB_DM0
MEM_MB_DM1
MEM_MB_DM2
MEM_MB_DM3
MEM_MB_DM4
MEM_MB_DM5
MEM_MB_DM6
MEM_MB_DM7
MEM_MB_DQS_H0
MEM_MB_DQS_L0
MEM_MB_DQS_H1
MEM_MB_DQS_L1
MEM_MB_DQS_H2
MEM_MB_DQS_L2
MEM_MB_DQS_H3
MEM_MB_DQS_L3
MEM_MB_DQS_H4
MEM_MB_DQS_L4
MEM_MB_DQS_H5
MEM_MB_DQS_L5
MEM_MB_DQS_H6
MEM_MB_DQS_L6
MEM_MB_DQS_H7
MEM_MB_DQS_L7
MEM_MB_CLK_H0
MEM_MB_CLK_L0
MEM_MB_CLK_H3
MEM_MB_CLK_L3
MEM_MB_CKE0
MEM_MB_CKE1
MEM_MB1_ODT0
MEM_MB1_ODT1
MEM_MB1_CS_L0
MEM_MB1_CS_L1
MEM_MB_RAS_L
MEM_MB_CAS_L
MEM_MB_WE_L
MEM_MB_RESET#
MEM_MB_HOT#
M30
M31
M28
M27
W31
AB28
W29
AL29
AH25
AK21
AJ17
AJ29
AH29
AK25
AL25
AJ20
AJ21
AL16
AL17
AA30
AC30
AA31
AC29
AB29
AB31
W28
AA27
AA28
V31
N28
P29
N29
N31
L30
L29
K28
K31
J31
V30
K29
D16
B20
A25
D29
A17
B17
B21
C21
D25
C25
B29
A29
U30
U29
T29
T28
R31
T31
P30
R30
J30
J28
Y29
Y30
J27
V28
CPU1C
CPU1C
MEMORY CHANNEL B
MEMORY CHANNEL B
MB_ADD0
MB_ADD1
MB_ADD2
MB_ADD3
MB_ADD4
MB_ADD5
MB_ADD6
MB_ADD7
MB_ADD8
MB_ADD9
MB_ADD10
MB_ADD11
MB_ADD12
MB_ADD13
MB_ADD14
MB_ADD15
MB_BANK0
MB_BANK1
MB_BANK2
MB_DM0
MB_DM1
MB_DM2
MB_DM3
MB_DM4
MB_DM5
MB_DM6
MB_DM7
MB_DQS_H0
MB_DQS_L0
MB_DQS_H1
MB_DQS_L1
MB_DQS_H2
MB_DQS_L2
MB_DQS_H3
MB_DQS_L3
MB_DQS_H4
MB_DQS_L4
MB_DQS_H5
MB_DQS_L5
MB_DQS_H6
MB_DQS_L6
MB_DQS_H7
MB_DQS_L7
MB_CLK_H0
MB_CLK_L0
MB_CLK_H1
MB_CLK_L1
MB_CLK_H2
MB_CLK_L2
MB_CLK_H3
MB_CLK_L3
MB_CKE0
MB_CKE1
MB0_ODT0
MB0_ODT1
MB1_ODT0
MB1_ODT1
MB0_CS_L0
MB0_CS_L1
MB1_CS_L0
MB1_CS_L1
MB_RAS_L
MB_CAS_L
MB_WE_L
MB_RESET_L
MB_EVENT_L
N12-9040020-F02
N12-9040020-F02
MB_DATA0
MB_DATA1
MB_DATA2
MB_DATA3
MB_DATA4
MB_DATA5
MB_DATA6
MB_DATA7
MB_DATA8
MB_DATA9
MB_DATA10
MB_DATA11
MB_DATA12
MB_DATA13
MB_DATA14
MB_DATA15
MB_DATA16
MB_DATA17
MB_DATA18
MB_DATA19
MB_DATA20
MB_DATA21
MB_DATA22
MB_DATA23
MB_DATA24
MB_DATA25
MB_DATA26
MB_DATA27
MB_DATA28
MB_DATA29
MB_DATA30
MB_DATA31
MB_DATA32
MB_DATA33
MB_DATA34
MB_DATA35
MB_DATA36
MB_DATA37
MB_DATA38
MB_DATA39
MB_DATA40
MB_DATA41
MB_DATA42
MB_DATA43
MB_DATA44
MB_DATA45
MB_DATA46
MB_DATA47
MB_DATA48
MB_DATA49
MB_DATA50
MB_DATA51
MB_DATA52
MB_DATA53
MB_DATA54
MB_DATA55
MB_DATA56
MB_DATA57
MB_DATA58
MB_DATA59
MB_DATA60
MB_DATA61
MB_DATA62
MB_DATA63
MEM_MB_DATA0
A16
MEM_MB_DATA1
C16
MEM_MB_DATA2
B18
MEM_MB_DATA3
A19
MEM_MB_DATA4
C15
MEM_MB_DATA5
B15
MEM_MB_DATA6
D17
MEM_MB_DATA7
C18
MEM_MB_DATA8
D20
MEM_MB_DATA9
A20
MEM_MB_DATA10
D22
MEM_MB_DATA11
D23
MEM_MB_DATA12
C19
MEM_MB_DATA13
D19
MEM_MB_DATA14
A22
MEM_MB_DATA15
C22
MEM_MB_DATA16
C24
MEM_MB_DATA17
B24
MEM_MB_DATA18
B26
MEM_MB_DATA19
C27
MEM_MB_DATA20
A23
MEM_MB_DATA21
B23
MEM_MB_DATA22
D26
MEM_MB_DATA23
A26
MEM_MB_DATA24
C28
MEM_MB_DATA25
D28
MEM_MB_DATA26
C31
MEM_MB_DATA27
D31
MEM_MB_DATA28
B27
MEM_MB_DATA29
A28
MEM_MB_DATA30
B30
MEM_MB_DATA31
C30
MEM_MB_DATA32
AJ30
MEM_MB_DATA33
AK30
MEM_MB_DATA34
AH28
MEM_MB_DATA35
AJ27
MEM_MB_DATA36
AG30
MEM_MB_DATA37
AH31
MEM_MB_DATA38
AK28
MEM_MB_DATA39
AL28
MEM_MB_DATA40
AJ26
MEM_MB_DATA41
AH26
MEM_MB_DATA42
AH23
MEM_MB_DATA43
AJ23
MEM_MB_DATA44
AK27
MEM_MB_DATA45
AL26
MEM_MB_DATA46
AJ24
MEM_MB_DATA47
AK24
MEM_MB_DATA48
AK22
MEM_MB_DATA49
AH22
MEM_MB_DATA50
AL19
MEM_MB_DATA51
AK19
MEM_MB_DATA52
AL23
MEM_MB_DATA53
AL22
MEM_MB_DATA54
AH20
MEM_MB_DATA55
AL20
MEM_MB_DATA56
AJ18
MEM_MB_DATA57
AH17
MEM_MB_DATA58
AJ15
MEM_MB_DATA59
AK15
MEM_MB_DATA60
AH19
MEM_MB_DATA61
AK18
MEM_MB_DATA62
AK16
MEM_MB_DATA63
AH16
MEM_MB_DATA[63..0]
7
R293
R293
1K1%
1K1%
C151
C151
C0.1u10X0402
C0.1u10X0402
5
C537
C537
C1000P16X
C1000P16X
Layout:
Place within 1.5'' of APU
MICRO-START INT'L CO.,LTD.
MICRO-START INT'L CO.,LTD.
Title
Title
Title
FM2 DDR3 I/F13Ci203iw
FM2 DDR3 I/F
FM2 DDR3 I/F
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet
4
3
2
Date: Sheet
MICRO-START INT'L CO.,LTD.
MS-7721 3.2
MS-7721 3.2
MS-7721 3.2
1
234Tuesday, December 04, 2012
234Tuesday, December 04, 2012
234Tuesday, December 04, 2012
of
of
of
5
D D
4
3
2
1
FM2 PCIE I/F
CPU1A
CPU1A
GFX_RX0P13
GFX_RX0N13
GFX_RX1P13
GFX_RX1N13
GFX_RX2P13
GFX_RX2N13
GFX_RX3P13
GFX_RX3N13
GFX_RX4P13
GFX_RX4N13
GFX_RX5P13
GFX_RX5N13
GFX_RX6P13
GFX_RX6N13
GFX_RX7P13
C C
B B
CPU_VDD1_2
GFX_RX7N13
GFX_RX8P13
GFX_RX8N13
GFX_RX9P13
GFX_RX9N13
GFX_RX10P13
GFX_RX10N13
GFX_RX11P13
GFX_RX11N13
GFX_RX12P13
GFX_RX12N13
GFX_RX13P13
GFX_RX13N13
GFX_RX14P13
GFX_RX14N13
GFX_RX15P13
GFX_RX15N13
PE_LAN_RXP16
PE_LAN_RXN16
APU_GPP_RX0P13
APU_GPP_RX0N13
connect to FCH
UMI_RX0P8
UMI_RX0N8
UMI_RX1P8
UMI_RX1N8
UMI_RX2P8
UMI_RX2N8
UMI_RX3P8
UMI_RX3N8
R324
R324
196R1%
196R1%
0603 change footprint 0402
Within 1500mil from APU
PE_LAN_RXP
PE_LAN_RXN
APU_P_ZVDDP
AD8
AD9
AC7
AC8
AB5
AB6
AB8
AB9
AA7
AA8
Y5
Y6
Y8
Y9
W7
W8
V5
V6
V8
V9
U7
U8
T5
T6
T8
T9
R7
R8
P5
P6
P8
P9
AF5
AF6
AF8
AF9
AE7
AE8
AD5
AD6
AJ8
AJ7
AH6
AH5
AH9
AH8
AG8
AG7
AJ2
N12-9040020-F02
N12-9040020-F02
P_GFX_RXP0
P_GFX_RXN0
P_GFX_RXP1
P_GFX_RXN1
P_GFX_RXP2
P_GFX_RXN2
P_GFX_RXP3
P_GFX_RXN3
P_GFX_RXP4
P_GFX_RXN4
P_GFX_RXP5
P_GFX_RXN5
P_GFX_RXP6
P_GFX_RXN6
P_GFX_RXP7
P_GFX_RXN7
P_GFX_RXP8
P_GFX_RXN8
P_GFX_RXP9
P_GFX_RXN9
P_GFX_RXP10
P_GFX_RXN10
P_GFX_RXP11
P_GFX_RXN11
P_GFX_RXP12
P_GFX_RXN12
P_GFX_RXP13
P_GFX_RXN13
P_GFX_RXP14
P_GFX_RXN14
P_GFX_RXP15
P_GFX_RXN15
P_GPP_RXP0
P_GPP_RXN0
P_GPP_RXP1
P_GPP_RXN1
P_GPP_RXP2
P_GPP_RXN2
P_GPP_RXP3
P_GPP_RXN3
P_UMI_RXP0
P_UMI_RXN0
P_UMI_RXP1
P_UMI_RXN1
P_UMI_RXP2
P_UMI_RXN2
P_UMI_RXP3
P_UMI_RXN3
P_ZVDDP
PCI EXPRESS
PCI EXPRESS
PP GRAPHICS
PP GRAPHICS
UMI G
UMI G
P_GFX_TXP0
P_GFX_TXN0
P_GFX_TXP1
P_GFX_TXN1
P_GFX_TXP2
P_GFX_TXN2
P_GFX_TXP3
P_GFX_TXN3
P_GFX_TXP4
P_GFX_TXN4
P_GFX_TXP5
P_GFX_TXN5
P_GFX_TXP6
P_GFX_TXN6
P_GFX_TXP7
P_GFX_TXN7
P_GFX_TXP8
P_GFX_TXN8
P_GFX_TXP9
P_GFX_TXN9
P_GFX_TXP10
P_GFX_TXN10
P_GFX_TXP11
P_GFX_TXN11
P_GFX_TXP12
P_GFX_TXN12
P_GFX_TXP13
P_GFX_TXN13
P_GFX_TXP14
P_GFX_TXN14
P_GFX_TXP15
P_GFX_TXN15
P_GPP_TXP0
P_GPP_TXN0
P_GPP_TXP1
P_GPP_TXN1
P_GPP_TXP2
P_GPP_TXN2
P_GPP_TXP3
P_GPP_TXN3
P_UMI_TXP0
P_UMI_TXN0
P_UMI_TXP1
P_UMI_TXN1
P_UMI_TXP2
P_UMI_TXN2
P_UMI_TXP3
P_UMI_TXN3
P_ZVSS
GFX_TX0P
AC2
GFX_TX0N
AC1
GFX_TX1P
AC4
GFX_TX1N
AC5
GFX_TX2P
AB2
GFX_TX2N
AB3
GFX_TX3P
AA2
GFX_TX3N
AA1
GFX_TX4P
AA4
GFX_TX4N
AA5
GFX_TX5P
Y2
GFX_TX5N
Y3
GFX_TX6P
W2
GFX_TX6N
W1
GFX_TX7P
W4
GFX_TX7N
W5
GFX_TX8P
V2
GFX_TX8N
V3
GFX_TX9P
U2
GFX_TX9N
U1
GFX_TX10P
U4
GFX_TX10N
U5
GFX_TX11P
T2
GFX_TX11N
T3
GFX_TX12P
R2
GFX_TX12N
R1
GFX_TX13P
R4
GFX_TX13N
R5
GFX_TX14P
P2
GFX_TX14N
P3
GFX_TX15P
N2
GFX_TX15N
N1
LAN_TXP
AF2
LAN_TXN
AF3
APU_GPP_TX0P_C
AE2
APU_GPP_TX0N_C
AE1
AE4
AE5
AD2
AD3
UMI_TX0P_APU
AJ5
UMI_TX0N_APU
AJ4
UMI_TX1P_APU
AH3
UMI_TX1N_APU
AH2
UMI_TX2P_APU
AG1
UMI_TX2N_APU
AG2
UMI_TX3P_APU
AG5
UMI_TX3N_APU
AG4
APU_P_ZVSS
AJ1
0603 change footprint 0402
Within 1500mil from APU
C239
C239
C238
C238
C219
C219
C220
C220
C248
C248
C247
C247
C234
C234
C233
C233
C221
C221
C222
C222
C244
C244
C243
C243
R323
R323
196R1%
196R1%
85ohm +/-10%
C0.1u10X0402
C0.1u10X0402
C0.1u10X0402
C0.1u10X0402
C0.1u10X0402
C0.1u10X0402
C0.1u10X0402
C0.1u10X0402
C0.1u10X0402
C0.1u10X0402
C0.1u10X0402
C0.1u10X0402
C0.1u10X0402
C0.1u10X0402
C0.1u10X0402
C0.1u10X0402
C0.1u10X0402
C0.1u10X0402
C0.1u10X0402
C0.1u10X0402
C0.1u10X0402
C0.1u10X0402
C0.1u10X0402
C0.1u10X0402
GFX_TX0P
13
GFX_TX0N
13
13
GFX_TX1P
13
GFX_TX1N
13
GFX_TX2P
GFX_TX2N
13
GFX_TX3P
13
GFX_TX3N
13
GFX_TX4P
13
GFX_TX4N
13
13
GFX_TX5P
GFX_TX5N
13
GFX_TX6P
13
GFX_TX6N
13
GFX_TX7P
13
13
GFX_TX7N
13
GFX_TX8P
13
GFX_TX8N
GFX_TX9P 13
GFX_TX9N
13
13
GFX_TX10P
13
GFX_TX10N
13
GFX_TX11P
13
GFX_TX11N
13
GFX_TX12P
GFX_TX12N
13
GFX_TX13P
13
GFX_TX13N
13
13
GFX_TX14P
13
GFX_TX14N
GFX_TX15P
13
GFX_TX15N
13
PE_LAN_TXP
PE_LAN_TXN
APU_GPP_TX0P
APU_GPP_TX0N
8
UMI_TX0P
8
UMI_TX0N
8
UMI_TX1P
8
UMI_TX1N
8
UMI_TX2P
8
UMI_TX2N
8
UMI_TX3P
8
UMI_TX3N
connect to FCH
16
16
13
13
the CAP need over 500mil from the cpu PIN
A A
MICRO-START INT'L CO.,LTD.
MICRO-START INT'L CO.,LTD.
Title
Title
Title
FM2 PCIE I/F
FM2 PCIE I/F
FM2 PCIE I/F
Document Number Rev
Size
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet
5
4
3
2
Date: Sheet
MICRO-START INT'L CO.,LTD.
MS-7721 3.2
MS-7721 3.2
MS-7721 3.2
1
334Tuesday, December 04, 2012
334Tuesday, December 04, 2012
334Tuesday, December 04, 2012
of
of
of
5
D D
For VGA
For dual DVI
C C
VCC_DDR
IB=(Vcc_DDR-Vbe)/10k
(1.5-0.95)/10k=0.055mA
R334
R334
IC=(3vsb-vce)/10k
10K
Q48
Q48
N-SST3904
N-SST3904
10K
B
CE
FCH_THERMTRIP#
(3.3-0.2)/10k=0.31mA
B B
APU_THERMTRIP#
DP1_TX0P10
DP1_TX0N10
DP1_TX1P10
DP1_TX1N10
DP1_TX2P10
DP1_TX2N10
DP1_TX3P10
DP1_TX3N10
DP2_TX0P_APU20
DP2_TX0N_APU20
DP2_TX1P_APU20
DP2_TX1N_APU20
DP2_TX2P_APU20
DP2_TX2N_APU20
DP2_TX3P_APU20
DP2_TX3N_APU20
DP2_TX4P_APU20
DP2_TX4N_APU20
DP2_TX5P_APU20
DP2_TX5N_APU20
DP2_TX6P_APU20
DP2_TX6N_APU20
APU_CLK8
APU_CLK#8
DISP_CLK8
DISP_CLK#8
APU_SVC24
APU_SVD24
APU_SVT24
APU_SIC15
APU_SID15
APU_RST#8
APU_PWRGD8,24
PROCHOT#8,15
9
C175
C175
C177
C177
C164
C164
C166
C166
C174
C174
C176
C176
C165
C165
C163
C163
APU_SIC
APU_SID
APU_RST#
APU_PWRGD
APU_THERMTRIP#
APU_ALERT#
C0.1u10X0402
C0.1u10X0402
C0.1u10X0402
C0.1u10X0402
C0.1u10X0402
C0.1u10X0402
C0.1u10X0402
C0.1u10X0402
C0.1u10X0402
C0.1u10X0402
C0.1u10X0402
C0.1u10X0402
C0.1u10X0402
C0.1u10X0402
C0.1u10X0402
C0.1u10X0402
TP3TP3
TP4TP4
4
CPU_TDI
CPU_TDO
CPU_TCK
CPU_TMS
CPU_TRST#
CPU_DBRDY
CPU_DBREQ#
DP1_TX0P_APU
DP1_TX0N_APU
DP1_TX1P_APU
DP1_TX1N_APU
DP1_TX2P_APU
DP1_TX2N_APU
DP1_TX3P_APU
DP1_TX3N_APU
DP2_TX0P_APU
DP2_TX0N_APU
DP2_TX1P_APU
DP2_TX1N_APU
DP2_TX2P_APU
DP2_TX2N_APU
DP2_TX3P_APU
DP2_TX3N_APU
DP2_TX4P_APU
DP2_TX4N_APU
DP2_TX5P_APU
DP2_TX5N_APU
DP2_TX6P_APU
DP2_TX6N_APU
APU_SVC
APU_SVD
APU_SVT
AL12
AK12
AG12
AF12
AK14
AL14
AF10
AF14
AE10
AH14
AJ14
N4
N5
M2
M3
L2
L1
L4
L5
K2
K3
J2
J1
J4
J5
H2
H3
L7
L8
K5
K6
K8
K9
J7
J8
N7
N8
M5
M6
M8
M9
C1
C2
D1
G11
E10
E11
F11
F10
G10
E9
CPU1D
CPU1D
ANALOG/DISPLAY/MISC
ANALOG/DISPLAY/MISC
DP0_TXP0
DP0_TXN0
DP0_TXP1
DP0_TXN1
DP0_TXP2
DP0_TXN2
DP0_TXP3
DP0_TXN3
DP1_TXP0
DP1_TXN0
DP1_TXP1
DP1_TXN1
DP1_TXP2
DP1_TXN2
DP1_TXP3
DP1_TXN3
DP2_TXP0
DP2_TXN0
DP2_TXP1
DP2_TXN1
DP2_TXP2
DP2_TXN2
DP2_TXP3
DP2_TXN3
DP2_TXP4
DP2_TXN4
DP2_TXP5
DP2_TXN5
DP2_TXP6
DP2_TXN6
CLKIN_H
CLKIN_L
DISP_CLKIN_H
DISP_CLKIN_L
SVC
SVD
SVT
SIC
SID
RESET_L
PWROK
PROCHOT_L
THERMTRIP_L
ALERT_L
TDI
TDO
TCK
TMS
TRST_L
DBRDY
DBREQ_L
N12-9040020-F02
N12-9040020-F02
3
DP_AUX_ZVSS
DP_BLON
DP_DIGON
DP0_AUXP
DP0_AUXN
DP1_AUXP
DP1_AUXN
DP2_AUXP
DP2_AUXN
DP3_AUXP
DP3_AUXN
DP4_AUXP
DP4_AUXN
DP5_AUXP
DP5_AUXN
DP0_HPD
DP1_HPD
DP2_HPD
DP3_HPD
DP4_HPD
DP5_HPD
TEST4
TEST5
TEST6
TEST9
TEST10
TEST14
TEST15
TEST16
TEST17
TEST18
TEST19
TEST20
TEST24
TEST25_H
TEST25_L
TEST28_H
TEST28_L
TEST30_H
TEST30_L
TEST31
TEST32_H
TEST32_L
TEST35
FM2R1
LDTSTOP_L
CORETYPE
RSVD1
RSVD2
RSVD3
RSVD4
RSVD5
RSVD6
RSVD7
RSVD8
G9
F8
G8
E8
DP1_AUXP
E1
DP1_AUXN
E2
DP1_AUXP
F1
DP1_AUXN
F2
DP2_AUXP
G1
DP2_AUXN
G2
E5
E6
F5
F6
G5
G6
E3
F3
G3
E7
F7
G7
T21
U21
AD14
P21
R21
F12
E12
F13
E13
APU_TEST18
G13
APU_TEST19
G14
APU_TEST20
F14
APU_TEST24
E14
APU_TEST25_H
AJ11
APU_TEST25_L
AH11
H10
J10
APU_TEST30_H
T22
APU_TEST30_L
U22
APU_TEST31
AG31
APU_TEST32_H
V22
APU_TEST32L
R22
APU_TEST35
AE14
APU_FM2R1
AC10
FCH_DMA_ACTIVE#
AG14
LDTSTOP_L
AD10
IDLEEXIT_L
G12
F9
AJ13
AH13
AD12
K23
K25
AB23
AC24
AG10
VDDP_SENSE
C3
NB_SENSE+
A3
A4
VCCP_SENSE+
B3
VDDR_SENSE
C4
R200RR20
B4
R260RR26
change to short pad
R267
R267
DP2_HPD
DP3_HPD
DP4_HPD
DP5_HPD
DP_AUX_ZVSS
DP_VARY_BL
DISPLAY PORT 0
DISPLAY PORT 0
DISPLAY PORT MISC.
DISPLAY PORT MISC.
DISPLAY PORT 2 DISPLAY PORT 1
DISPLAY PORT 2 DISPLAY PORT 1
TEST
TEST
SER. CLK
SER. CLK
DMAACTIVE_L
SC
SC
MI
MI
BP5/IDLEEXIT_L
VDDP_SENSE
JTAG CTRL
JTAG CTRL
VDDNB_SENSE
VDDIO_SENSE
SE RSVD
SE RSVD
VDD_SENSE
SEN
SEN
VDDR_SENSE
VSS_SENSE
Layout: Place within 1.5'' of APU
R265
R265
150R1%
150R1%
R296
R296
1.8K
1.8K
R292
R292
1.8K
1.8K
C0.1u16X0402
C0.1u16X0402
C154
C154
C0.1u16X0402
C0.1u16X0402
C150
C150
clock
data
100K
100K
0R
0R
R319
R319
R337
R337
TP54TP54
TP55TP55
R311
R311
TP36TP36
TP32TP32
R320
R320
R322
R322
TP16TP16
TP20TP20
VCCP_SENSENB_SENSE-
DP1_VGA_HPD
DP2_HPD
511R1%
511R1%
511R1%
511R1%
39.2R1%
39.2R1%
X_300R
X_300R
300R
300R
APU_FM2R1
FCH_DMA_ACTIVE#
LDTSTOP_L
NB_SENSE+
VDDIOFB+
VCCP_SENSE+
AUX_VGA_CH_P_C
AUX_VGA_CH_N_C
DP2_AUXP
DP2_AUXN
10
20
1
2
3
4
5
6
7
8
RN43
RN43
8P4R-100K
8P4R-100K
RN44
RN44
8P4R-1K
8P4R-1K
1
2
3
4
5
6
7
8
Test35 use HDMI need pull high vccddr 300R
VCC_DDR
24,26,27
8
8
24
27
24
VCCP_SENSENB_SENSE-
10
10
For DVI
20
20
For VGA
For DVI
CPU_VDD1_2
LDTSTOP_L
IDLEEXIT_L
24
24
2
For VGA
R3271KR327
R2621KR262
VCC_DDR
1K
1K
Komodo FM2 CPU
IDLEEXIT_L
VCC_DDR
Q29
Q29
IB=(Vcc_DDR-Vbe)/10k
(1.5-0.95)/10K=0.055mA
R241
R241
X_10K
X_10K
B
CE
X_N-SST3904
X_N-SST3904
IC=(Vcc3-Vce)/10k
(3.3-0.2)/10K=0.31mA
1
FCH_IDLEEXIT_L
9
VCC_DDR
IB=(Vcc_DDR-Vbe)/10k
(1.5-0.95)/10k=0.055mA
R340
R340
IC=(3vsb-vce)/10k
10K
10K
CE
FCH_TALERT#
IB=(VCC_DDR-Vbe)/1k
(1.5-0.95)/1k=0.55mA
R3411KR341
IC=(Vcc_DDR-Vce)/1k
1K
(1.5-0.2)/1k=1.3mA
PROCHOT#
CE
5
(3.3-0.2)/10k=0.31mA
10
BiB>ic
B=30
B
Q50
APU_ALERT#
A A
VR_HOT24
Q50
N-SST3904
N-SST3904
VCC_DDR
Q51
Q51
N-SST3904
N-SST3904
B
VCC3_SB
VCC_DDR
4
PULL UP
10K
10K
R229
R229
APU_FM2R1
R286 X_1KR286 X_1K
R287
R287
X_220R
X_220R
X_1K
X_1K
R280
R280
R281
R281
X_220R
X_220R
X_1K
X_1K
R275
R275
R271 X_220RR271 X_220R
APU_SVT
APU_SVC
APU_SVD
VCC_DDR
RN42
RN42
1
3
5
7
1K
R1061KR106
RN41
RN41
1
3
5
7
1K
R3261KR326
R3211KR321
1K
R553 330RR553 330R
R554 330RR554 330R
8P4R-1K
8P4R-1K
2
4
6
8
8P4R-1K
8P4R-1K
2
4
6
8
CPU_TDI
CPU_TCK
CPU_TMS
CPU_TRST#
CPU_DBREQ#
APU_SIC
APU_SID
APU_ALERT#
APU_THERMTRIP#
PROCHOT#
FCH_DMA_ACTIVE#
APU_PWRGD
APU_RST#
3
MICRO-START INT'L CO.,LTD.
MICRO-START INT'L CO.,LTD.
Title
Title
Title
FM2 DISPLAY/MSIC
FM2 DISPLAY/MSIC
FM2 DISPLAY/MSIC
Document Number Rev
Size
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet
2
Date: Sheet
MICRO-START INT'L CO.,LTD.
MS-7721 3.2
MS-7721 3.2
MS-7721 3.2
1
434Wednesday, December 05, 2012
434Wednesday, December 05, 2012
434Wednesday, December 05, 2012
of
of
of
5
4
3
2
1
VCC_DDR 5A
VDDA 0.9A
VCCP_NB 41A
CPU_VDD1_2 = VDDR 4A +VDDP 6A
VCCP 60A,90A,110A
D D
VDDA_25VDDA25
CP13CP13
C251
C251
C287
C287
C582
VCCP
C582
C3300p50X
C3300p50X
C572
C572
X_C22u6.3X8
X_C22u6.3X8
X_C22u6.3X8
X_C22u6.3X8
C547
C547
X_C22u6.3X8
X_C22u6.3X8
C542
C542
X_C22u6.3X8
X_C22u6.3X8
C560
C560
C22u6.3X8
C22u6.3X8
C564
C564
C22u6.3X8
C22u6.3X8
C571
C571
C574
C574
X_C22u6.3X8
X_C22u6.3X8
X_C22u6.3X8
X_C22u6.3X8
C568
C568
C552
C552
X_C22u6.3X8
X_C22u6.3X8
C557
C557
C22u6.3X8
C22u6.3X8
C553
C553
X_C22u6.3X8
X_C22u6.3X8
X_C22u6.3X8
X_C22u6.3X8
C561
C561
VCCP
C533 C0.01u16X0402C533 C0.01u16X0402
C534
C534
C536 C180P50NC536 C180P50N
C575
C575
C579
C579
C535
C535
C532
C532
C573 C0.22u16X6C573 C0.22u16X6
C0.01u16X0402
C0.01u16X0402
C180P50N
C180P50N
X_C180P50N
X_C180P50N
X_C180P50N
X_C180P50N
C0.22u16X6
C0.22u16X6
VCC_DDR
C169
C169
C202
C202
C182
C182
C171
C171
C167
C167
C195
C195
C199
C199
X_C0.22u16X6
X_C0.22u16X6
C0.22u16X6
C0.22u16X6
C0.22u16X6
C0.22u16X6
C180P50N
C180P50N
C180P50N
C180P50N
C10u6.3X8
C10u6.3X8
X_C4.7u6.3X8
X_C4.7u6.3X8
C0.22u16X6
C0.22u16X6
C4.7u6.3X6
C4.7u6.3X6
C C
BOTTOM SIDE
VCC_DDR
C544 C22u6.3X8C544 C22u6.3X8
C539 C22u6.3X8C539 C22u6.3X8
C549 X_C22u6.3X8C549 X_C22u6.3X8
C567 X_C22u6.3X8C567 X_C22u6.3X8
C0.22u16X6
C0.22u16X6
C577
C577
C570
C570
C10u6.3X8
C10u6.3X8
C4.7u6.3X8
C4.7u6.3X8
C556
C556
C4.7u6.3X8
C4.7u6.3X8
C559
C559
C563
C563
C4.7u6.3X8
C4.7u6.3X8
C578
C578
C4.7u6.3X8
VCCP
C4.7u6.3X8
C180P50N
C180P50N
C538
C538
C565
C565
C180P50N
C180P50N
C576
C576
C0.22u16X6
C0.22u16X6
C562
C562
C22u6.3X8
C22u6.3X8
C566
C566
C22u6.3X8
C22u6.3X8
C569 C22u6.3X8C569 C22u6.3X8
C545
C545
C22u6.3X8
C22u6.3X8
C558 C22u6.3X8C558 C22u6.3X8
C22u6.3X8
C22u6.3X8
C546
C546
C22u6.3X8
C22u6.3X8
C541
C541
C543
C543
C22u6.3X8
C22u6.3X8
C540
C540
C22u6.3X8
C22u6.3X8
C548 C22u6.3X8C548 C22u6.3X8
B B
A A
AB22
AB24
AB27
AB30
AC23
AC25
AC28
AC31
AA26
AA23
AA29
MEC1
MEC2
MEC3
MEC4
K27
U25
V29
M22
M23
M26
N24
N27
N30
P22
U31
W24
V23
V26
U28
P25
P28
P31
R23
R26
R29
W27
W30
Y22
Y25
Y28
K24
K30
Y31
M29
J29
T30
L28
L31
T24
L25
J26
T27
CPU1F
CPU1F
VDDIO_1
VDDIO_2
VDDIO_3
VDDIO_4
VDDIO_5
VDDIO_6
VDDIO_7
VDDIO_8
VDDIO_9
VDDIO_10
VDDIO_11
VDDIO_12
VDDIO_13
VDDIO_14
VDDIO_15
VDDIO_16
VDDIO_17
VDDIO_18
VDDIO_19
VDDIO_20
VDDIO_21
VDDIO_22
VDDIO_23
VDDIO_24
VDDIO_25
VDDIO_26
VDDIO_27
VDDIO_28
VDDIO_29
VDDIO_30
VDDIO_31
VDDIO_32
VDDIO_33
VDDIO_34
VDDIO_35
VDDIO_36
VDDIO_37
VDDIO_38
VDDIO_39
VDDIO_40
VDDIO_41
VDDIO_42
VDDIO_43
VDDIO_44
VDDIO_45
VDDIO_46
VDDIO_47
VDDIO_48
VDDIO_49
MEC1
MEC2
MEC3
MEC4
N12-9040020-F02
N12-9040020-F02
VCCP
VDDNB_CAP_1
VDDNB_CAP_2
C146
C146
C143
C143
C149
C149
C228
C228
C168
C168
C191
C191
VDDA_1
VDDA_2
VDDNB_1
VDDNB_2
VDDNB_3
VDDNB_4
VDDNB_5
VDDNB_6
VDDNB_7
VDDNB_8
VDDNB_9
VDDNB_10
VDDNB_11
VDDNB_12
VDDNB_13
VDDNB_14
VDDNB_15
VDDNB_16
VDDNB_17
VDDNB_18
VDDNB_19
VDDNB_20
VDDNB_21
VDDNB_22
VDDNB_23
VDDNB_24
VDDNB_25
VDDNB_26
VDDNB_27
VDDNB_28
VDDNB_29
VDDNB_30
VDDR_1
VDDR_2
VDDR_3
VDDR_4
VDDR_5
VDDR_6
VDDP_1
VDDP_2
VDDP_3
VDDP_4
VDDP_5
VDDP_6
VDDP_7
VDDP_8
VDDP_9
C0.01u16X0402
C0.01u16X0402
C180P50N
C180P50N
X_C22u6.3X8
X_C22u6.3X8
X_C22u6.3X8
X_C22u6.3X8
X_C22u6.3X8
X_C22u6.3X8
C22u6.3X8
C22u6.3X8
AE13
AD13
A7
A6
A5
A9
C6
A10
A11
A12
A13
A14
B5
B6
B7
B8
B9
B10
B11
B12
B13
B14
C5
C14
C13
C12
C11
C10
C9
C8
C7
A8
M14
N13
AL10
AK8
AK9
AL8
AL9
AK10
AK4
AK5
AL5
AL3
AL4
AL6
AK3
AK6
AK2
VDDA25VCC_DDR
VCCP_NB
BOTTOM SIDE
C551
C551
C555
C555
C554
C554
C550
C550
CPU_VDD1_2
CPU_VDD1_2
CPU_VDD1_2
C22u6.3X8
C22u6.3X8
C22u6.3X8
C22u6.3X8
X_C10u6.3X8
X_C10u6.3X8
X_C10u6.3X8
X_C10u6.3X8
C227
C227
C230
C230
C226
C226
C223
C223
C235
C235
C225
C225
C229
C229
C240
C240
C241
C241
C280
C280
C288
C288
C216
C216
C224
C224
C281
C281
C217
C217
C215
C215
C214 C180P50NC214 C180P50N
C252
C252
C253
C253
VCCP VCCP
CPU1E
CPU1E
VDD
VDD
VDD_1
VDD_2
VDD_3
VDD_4
VDD_5
VDD_6
VDD_7
VDD_8
VDD_9
VDD_10
VDD_11
VDD_12
VDD_13
VDD_14
VDD_15
VDD_16
VDD_17
VDD_18
VDD_19
VDD_20
VDD_21
VDD_22
VDD_23
VDD_24
VDD_25
VDD_26
VDD_27
VDD_28
VDD_29
VDD_30
VDD_31
VDD_32
VDD_33
VDD_34
VDD_35
VDD_36
VDD_37
VDD_38
VDD_39
VDD_40
VDD_41
VDD_42
VDD_43
VDD_44
VDD_45
VDD_46
VDD_47
VDD_48
VDD_49
VDD_50
N12-9040020-F02
N12-9040020-F02
C117
C117
C22u6.3X8
C22u6.3X8
C122
C122
X_C22u6.3X8
X_C22u6.3X8
C113
C113
C22u6.3X8
C22u6.3X8
C102
C102
C22u6.3X8
C22u6.3X8
C116
C116
X_C22u6.3X8
X_C22u6.3X8
X_C22u6.3X8
X_C22u6.3X8
C101
C101
C22u6.3X8
C22u6.3X8
C123
C123
C112
C112
X_C22u6.3X8
X_C22u6.3X8
C108
C108
X_C22u6.3X8
X_C22u6.3X8
X_C22u6.3X8
X_C22u6.3X8
C109
C109
X_C22u6.3X8
X_C22u6.3X8
C110
C110
X_C22u6.3X8
X_C22u6.3X8
C107
C107
C180P50N
C180P50N
C130
C130
C129
C129
C180P50N
C180P50N
C0.22u16X6
C0.22u16X6
C125
C125
C126
C126
C0.22u16X6
C0.22u16X6
C128 X_C0.01u16X0402C128 X_C0.01u16X0402
X_C0.01u16X0402
X_C0.01u16X0402
C142
C142
C132
C132
X_C0.01u16X0402
X_C0.01u16X0402
C0.22u16X6
C0.22u16X6
C0.22u16X6
C0.22u16X6
C0.22u16X6
C0.22u16X6
C0.22u16X6
C0.22u16X6
C22u6.3X8
C22u6.3X8
C22u6.3X8
C22u6.3X8
C10u6.3X8
C10u6.3X8
C10u6.3X8
C10u6.3X8
C10u6.3X8
C10u6.3X8
C10u6.3X8
C10u6.3X8
C4.7u6.3X8
C4.7u6.3X8
C180P50N
C180P50N
C180P50N
C180P50N
C180P50N
C180P50N
C180P50N
C180P50N
C180P50N
C180P50N
C0.01u16X0402
C0.01u16X0402
C0.01u16X0402
C0.01u16X0402
AA11
AB7
Y20
M10
P10
T20
W11
AA13
AA21
AA3
AA6
AB1
AB10
AB14
AB16
AB18
AB4
AC11
AC13
AC19
AC21
AD1
AE3
AF4
AF7
AG6
AH7
H12
H14
J11
J13
J15
J17
J19
J21
K10
K12
K14
U13
K16
AC17
Y18
K18
K20
L11
L15
VCCP_NB
H8
J9
K4
L3
VDD_51
VDD_52
VDD_53
VDD_54
VDD_55
VDD_56
VDD_57
VDD_58
VDD_59
VDD_60
VDD_61
VDD_62
VDD_63
VDD_64
VDD_65
VDD_66
VDD_67
VDD_68
VDD_69
VDD_70
VDD_71
VDD_72
VDD_73
VDD_74
VDD_75
VDD_76
VDD_77
VDD_78
VDD_79
VDD_80
VDD_81
VDD_82
VDD_83
VDD_84
VDD_85
VDD_86
VDD_87
VDD_88
VDD_89
VDD_90
VDD_91
VDD_92
VDD_93
VDD_94
VDD_95
VDD_96
VDD_97
VDD_98
VDD_99
L17
L21
M12
M16
M18
M20
N6
N11
N19
N3
P1
P12
P20
T1
P4
P7
R11
R13
R19
T10
T12
U11
V20
U3
U6
V1
V10
V12
V4
V7
W13
W19
J6
N21
U19
AE6
AC15
W21
Y1
Y10
Y12
Y14
AA15
AA17
AA19
Y16
AH1
AF1
K7
AK29
R10
R12
R20
U10
U12
U20
W10
W12
W20
W22
AA9
AA10
AA14
AA16
AA18
AA20
AA22
AB13
AB15
AB17
AB19
AB21
AC3
AC6
AC9
AC12
AC14
AC16
AC18
AC22
AD4
AD7
AD11
AK20
AK23
AF19
AK26
T4
T7
T11
T13
T19
U9
V11
V13
V19
V21
W3
W6
W9
Y4
Y7
Y11
Y13
Y15
Y17
Y19
Y21
CPU1H
CPU1H
VSS_115
VSS
VSS
VSS_116
VSS_117
VSS_118
VSS_119
VSS_120
VSS_121
VSS_122
VSS_123
VSS_124
VSS_125
VSS_126
VSS_127
VSS_128
VSS_129
VSS_130
VSS_131
VSS_132
VSS_133
VSS_134
VSS_135
VSS_136
VSS_137
VSS_138
VSS_139
VSS_140
VSS_141
VSS_142
VSS_143
VSS_144
VSS_145
VSS_146
VSS_147
VSS_148
VSS_149
VSS_150
VSS_151
VSS_152
VSS_153
VSS_154
VSS_155
VSS_156
VSS_157
VSS_158
VSS_159
VSS_160
VSS_161
VSS_162
VSS_163
VSS_164
VSS_165
VSS_166
VSS_167
VSS_168
VSS_169
VSS_170
VSS_171
VSS_172
VSS_173
N12-9040020-F02
N12-9040020-F02
VSS_174
VSS_175
VSS_176
VSS_177
VSS_178
VSS_179
VSS_180
VSS_181
VSS_182
VSS_183
VSS_184
VSS_185
VSS_186
VSS_187
VSS_188
VSS_189
VSS_190
VSS_191
VSS_192
VSS_193
VSS_194
VSS_195
VSS_196
VSS_197
VSS_198
VSS_199
VSS_200
VSS_201
VSS_202
VSS_203
VSS_204
VSS_205
VSS_206
VSS_207
VSS_208
VSS_209
VSS_210
VSS_211
VSS_212
VSS_213
VSS_214
VSS_215
VSS_216
VSS_217
VSS_218
VSS_219
VSS_220
VSS_221
VSS_222
VSS_223
VSS_224
VSS_225
VSS_226
VSS_227
VSS_228
VSS_229
VSS_230
VSS_231
VSS_232
AF16
AF13
AF11
AF22
AF25
AF28
AF31
AG3
AG9
AG11
AG13
AG17
AG20
AG23
AG26
AG29
AH4
AH10
AH12
AH15
AH18
AH21
AH24
AH27
AH30
AJ3
AJ6
AJ9
AJ10
AJ12
AJ16
AJ19
AD17
AD20
AD23
AD26
AD29
AK7
AJ31
AJ28
AJ25
AJ22
AE9
AE11
AE12
AE15
AE18
AE21
AE24
AE27
AE30
AK11
AK13
K1
G4
M1
H1
J22
AB11
N22
C17
C20
C23
C26
C29
D10
D11
D12
D13
D14
D15
D18
D21
D24
D27
D30
G15
G18
G21
G24
AL21
AL24
AL18
A18
A21
A24
A27
B16
B19
B22
B25
B28
D2
D3
D4
D5
D6
D7
D8
D9
E4
E15
E16
E19
E22
E25
E28
E31
F4
F17
F20
F23
F26
F29
R6
P11
CPU1G
CPU1G
VSS_1
VSS
VSS
VSS_2
VSS_3
VSS_4
VSS_5
VSS_6
VSS_7
VSS_8
VSS_9
VSS_10
VSS_11
VSS_12
VSS_13
VSS_14
VSS_15
VSS_16
VSS_17
VSS_18
VSS_19
VSS_20
VSS_21
VSS_22
VSS_23
VSS_24
VSS_25
VSS_26
VSS_27
VSS_28
VSS_29
VSS_30
VSS_31
VSS_32
VSS_33
VSS_34
VSS_35
VSS_36
VSS_37
VSS_38
VSS_39
VSS_40
VSS_41
VSS_42
VSS_43
VSS_44
VSS_45
VSS_46
VSS_47
VSS_48
VSS_49
VSS_50
VSS_51
VSS_52
VSS_53
VSS_54
VSS_55
VSS_56
VSS_57
N12-9040020-F02
N12-9040020-F02
VSS_58
VSS_59
VSS_60
VSS_61
VSS_62
VSS_63
VSS_64
VSS_65
VSS_66
VSS_67
VSS_68
VSS_69
VSS_70
VSS_71
VSS_72
VSS_73
VSS_74
VSS_75
VSS_76
VSS_77
VSS_78
VSS_79
VSS_80
VSS_81
VSS_82
VSS_83
VSS_84
VSS_85
VSS_86
VSS_87
VSS_88
VSS_89
VSS_90
VSS_91
VSS_92
VSS_93
VSS_94
VSS_95
VSS_96
VSS_97
VSS_98
VSS_99
VSS_100
VSS_101
VSS_102
VSS_103
VSS_104
VSS_105
VSS_106
VSS_107
VSS_108
VSS_109
VSS_110
VSS_111
VSS_112
VSS_113
VSS_114
P13
P19
R3
M4
R9
G27
G30
H4
H5
H6
H7
H9
H11
H13
H16
H19
H22
H25
H28
H31
M7
M11
M15
M17
M21
N9
N10
N12
N20
J12
J14
J16
J18
J20
J23
K11
K13
K15
K17
K21
J3
L6
L9
L10
L12
L14
L16
L18
L20
L22
AL7
AL27
A15
AK17
AL11
AL15
AL13
MICRO-START INT'L CO.,LTD.
MICRO-START INT'L CO.,LTD.
Title
Title
Title
FM2 POWER&DECOUPLING
FM2 POWER&DECOUPLING
FM2 POWER&DECOUPLING
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet
5
4
3
2
Date: Sheet
MICRO-START INT'L CO.,LTD.
MS-7721 3.2
MS-7721 3.2
MS-7721 3.2
1
534Tuesday, December 04, 2012
534Tuesday, December 04, 2012
534Tuesday, December 04, 2012
of
of
of
5
VCC_DDR
51
DIMM1
MEM_MA_DATA[63..0]2
D D
C C
B B
A A
MEM_MA_DATA0
MEM_MA_DATA1
MEM_MA_DATA2
MEM_MA_DATA3
MEM_MA_DATA4
MEM_MA_DATA5
MEM_MA_DATA6
MEM_MA_DATA7
MEM_MA_DATA8
MEM_MA_DATA9
MEM_MA_DATA10
MEM_MA_DATA11
MEM_MA_DATA12
MEM_MA_DATA13
MEM_MA_DATA14
MEM_MA_DATA15
MEM_MA_DATA16
MEM_MA_DATA17
MEM_MA_DATA18
MEM_MA_DATA19
MEM_MA_DATA20
MEM_MA_DATA21
MEM_MA_DATA22
MEM_MA_DATA23
MEM_MA_DATA24
MEM_MA_DATA25
MEM_MA_DATA26
MEM_MA_DATA27
MEM_MA_DATA28
MEM_MA_DATA29
MEM_MA_DATA30
MEM_MA_DATA31
MEM_MA_DATA32
MEM_MA_DATA33
MEM_MA_DATA34
MEM_MA_DATA35
MEM_MA_DATA36
MEM_MA_DATA37
MEM_MA_DATA38
MEM_MA_DATA39
MEM_MA_DATA40
MEM_MA_DATA41
MEM_MA_DATA42
MEM_MA_DATA43
MEM_MA_DATA44
MEM_MA_DATA45
MEM_MA_DATA46
MEM_MA_DATA47
MEM_MA_DATA48
MEM_MA_DATA49
MEM_MA_DATA50
MEM_MA_DATA51
MEM_MA_DATA52
MEM_MA_DATA53
MEM_MA_DATA54
MEM_MA_DATA55
MEM_MA_DATA56
MEM_MA_DATA57
MEM_MA_DATA58
MEM_MA_DATA59
MEM_MA_DATA60
MEM_MA_DATA61
MEM_MA_DATA62
MEM_MA_DATA63
DIMM1
3
DQ0
4
DQ1
9
DQ2
10
DQ3
122
DQ4
123
DQ5
128
DQ6
129
DQ7
12
DQ8
13
DQ9
18
DQ10
19
DQ11
131
DQ12
132
DQ13
137
DQ14
138
DQ15
21
DQ16
22
DQ17
27
DQ18
28
DQ19
140
DQ20
141
DQ21
146
DQ22
147
DQ23
30
DQ24
31
DQ25
36
DQ26
37
DQ27
149
DQ28
150
DQ29
155
DQ30
156
DQ31
81
DQ32
82
DQ33
87
DQ34
88
DQ35
200
DQ36
201
DQ37
206
DQ38
207
DQ39
90
DQ40
91
DQ41
96
DQ42
97
DQ43
209
DQ44
210
DQ45
215
DQ46
216
DQ47
99
DQ48
100
DQ49
105
DQ50
106
DQ51
218
DQ52
219
DQ53
224
DQ54
225
DQ55
108
DQ56
109
DQ57
114
DQ58
115
DQ59
227
DQ60
228
DQ61
233
DQ62
234
DQ63
2
VSS
5
VSS
8
VSS
11
VSS
14
VSS
17
VSS
20
VSS
23
VSS
26
VSS
29
VSS
32
VSS
35
VSS
38
VSS
41
VSS
44
VSS
47
VSS
80
VSS
83
VSS
86
VSS
89
VSS
92
VSS
95
VSS
98
VSS
101
VSS
104
VSS
VSS
107
110
F5
F5
1 2
F-MICROSMD110
F-MICROSMD110
54
57
60
62
65
66
69
D
D
D
D
D
D
D
VD
VD
VD
VD
VD
VD
VD
VSS
VSS
VSS
VSS
VSS
VSS
VSS
113
116
119
121
124
127
130
VCC3_SPDVCC3 VCC3_SPD
72
75
78
170
173
176
179
D
D
D
D
VD
VD
VD
VD
VSS
VSS
VSS
VSS
136
139
142
182
D
D
D
D
VD
VD
VD
VD
DDR3
DDR3
VSS
VSS
VSS
VSS
145
148
151
154
D
VD
VSS
133
4
C194
C194
C0.1u10X0402
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
MEC3
MEM_MA_HOT#
188
181
61
180
59
58
178
56
177
175
70
55
174
196
172
171
39
40
45
46
158
159
164
165
7
6
16
15
25
24
34
33
85
84
94
93
103
102
112
111
43
42
125
126
134
135
143
144
152
153
203
204
212
213
221
222
230
231
161
162
195
77
50
169
193
76
71
190
52
73
192
74
168
184
185
63
64
1
67
118
238
237
117
C0.1u10X0402
MEM_MA_ADD0
MEM_MA_ADD1
MEM_MA_ADD2
MEM_MA_ADD3
MEM_MA_ADD4
MEM_MA_ADD5
MEM_MA_ADD6
MEM_MA_ADD7
MEM_MA_ADD8
MEM_MA_ADD9
MEM_MA_ADD10
MEM_MA_ADD11
MEM_MA_ADD12
MEM_MA_ADD13
MEM_MA_ADD14
MEM_MA_ADD15
MEM_MA_DQS_H0
MEM_MA_DQS_L0
MEM_MA_DQS_H1
MEM_MA_DQS_L1
MEM_MA_DQS_H2
MEM_MA_DQS_L2
MEM_MA_DQS_H3
MEM_MA_DQS_L3
MEM_MA_DQS_H4
MEM_MA_DQS_L4
MEM_MA_DQS_H5
MEM_MA_DQS_L5
MEM_MA_DQS_H6
MEM_MA_DQS_L6
MEM_MA_DQS_H7
MEM_MA_DQS_L7
MEM_MA_DM0
MEM_MA_DM1
MEM_MA_DM2
MEM_MA_DM3
MEM_MA_DM4
MEM_MA_DM5
MEM_MA_DM6
MEM_MA_DM7
MEM_MA1_ODT0
MEM_MA1_ODT1
MEM_MA_CKE0
MEM_MA_CKE1
MEM_MA1_CS_L0
MEM_MA1_CS_L1
MEM_MA_BANK0
MEM_MA_BANK1
MEM_MA_BANK2
MEM_MA_WE_L
MEM_MA_RAS_L
MEM_MA_CAS_L
MEM_MA_RESET#
MEM_MA_CLK_H0
MEM_MA_CLK_L0
MEM_MA_CLK_H3
MEM_MA_CLK_L3
MEM_VREF_DQ
MEM_VREF_CA
MEM_SCLK
MEM_SDATA
VCC3_SPD
MEM_MA_HOT# 2
MEM_SCLK7
MEM_SDATA7
VCC3_SPD
VTT_DDR
167
53
68
48
49
187
198
79
120
240
183
157
236
186
189
191
194
197
D
D
D
D
D
D
VD
VD
VD
VD
VD
VD
DSPD
VD
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
160
163
166
199
202
205
208
ST4
VTT
VTT
EE1
EE2
EE3
EE4
SVD
R
AR_IN
FR
FR
FR
FR
RR_OUT
NC/TE
NC/P
NC/E
A10/AP
A11
A12
A13
A14
A15
CB0
CB1
CB2
CB3
CB4
CB5
CB6
CB7
DQS0
DQS0#
DQS1
DQS1#
DQS2
DQS2#
DQS3
DQS3#
DQS4
DQS4#
DQS5
DQS5#
DQS6
DQS6#
DQS7
DQS7#
DQS8
DQS8#
DM0/DQS9
NC/DQS9#
DM1/DQS10
NC/DQS10#
DM2/DQS11
NC/DQS11#
DM3/DQS12
NC/DQS12#
DM4/DQS13
NC/DQS13#
DM5/DQS14
NC/DQS14#
DM6/DQS15
NC/DQS15#
DM7/DQS16
NC/DQS16#
DM8/DQS17
NC/DQS17#
ODT0
ODT1
CKE0
CKE1
CS0#
CS1#
BA0
BA1
BA2
WE#
RAS#
CAS#
RESET#
CK0
CK0#
CK1(NU)
CK1#(NU)
VREFDQ
VREFCA
SCL
SDA
SA1
1
2
VSS
VSS
VSS
VSS
VSS
211
214
217
220
223
SA0
VSS
VSS
VSS
VSS
VSS
MEC
MEC
DDRIII-240P_BLACK-RH-24
229
232
235
239
DDRIII-240P_BLACK-RH-24
MEC1
MEC2
MEC3
226
3
MEM_MA_ADD[15..0]
MEM_MA_DM[7..0]
MEM_MA1_ODT0
MEM_MA1_ODT1
MEM_MA_CKE0
MEM_MA_CKE1
MEM_MA1_CS_L0
MEM_MA1_CS_L1
MEM_MA_BANK0
MEM_MA_BANK1
MEM_MA_BANK2 2
MEM_MA_WE_L 2
MEM_MA_RAS_L 2
MEM_MA_CAS_L 2
MEM_MA_RESET# 2
MEM_MA_CLK_H0 2
MEM_MA_CLK_L0 2
MEM_MA_CLK_H3 2
MEM_MA_CLK_L3 2
MEM_VREF_DQ
MEM_VREF_CA
MEM_SCLK
MEM_SDATA
2
2
VTT_DDRVCC_DDR
C260
C260
C304
C0.1u10X0402
C0.1u10X0402
MEM_VREF_DQVCC_DDR
C47
C47
C0.1u10X0402
C0.1u10X0402
C52
C52
C0.1u10X0402
C0.1u10X0402
C304
C0.1u10X0402
C0.1u10X0402
C48
C48
X_C1000P16X
X_C1000P16X
C303
C303
C292
C41
R3021KR302
1K
R3051KR305
1K
C41
C10u6.3X8
C10u6.3X8
C193
C193
C0.1u10X0402
C0.1u10X0402
C192
C192
C0.1u10X0402
C0.1u10X0402
MEM_VREF_CA
C196
C196
X_C1000P16X
X_C1000P16X
C12
C12
C10u6.3X8
C10u6.3X8
VCC_DDR
2
C292
C1u16X6
C1u16X6
R1301KR130
1K
R1311KR131
1K
C1u16X6
C1u16X6
C296
C296
C0.1u10X0402
C0.1u10X0402
1
follow circuit checklist suggest value
2
2
2
2
2
2
2
2
SA0SA1
DDR-III DIMM Config.
CLOCKADDRESS
P/N_DDR1_A
P/N_DDR1_B
R356 0RR356 0R
R351 0RR351 0R
SCLK0 9
SDATA0 9
DEVICE
DIMM 1
DIMM 2
DIMM 3
DIMM 4
10
11
N/A
N/A
MICRO-START INT'L CO.,LTD.
MICRO-START INT'L CO.,LTD.
MEM_MA_DQS_H[7..0]2
MEM_MA_DQS_L[7..0]2
5
4
3
2
Title
Title
Title
DDR CH-A
DDR CH-A
DDR CH-A
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet of
Date: Sheet of
Date: Sheet
MICRO-START INT'L CO.,LTD.
MS-7721 3.2
MS-7721 3.2
MS-7721 3.2
1
of
634Tuesday, December 04, 2012
634Tuesday, December 04, 2012
634Tuesday, December 04, 2012
5
VCC_DDR
MEM_MB_DQS_H[7..0]2
MEM_MB_DQS_L[7..0]2
MEM_MB_DATA[63..0]2 MEM_MB_ADD[15..0]
D D
C C
B B
A A
MEM_MB_DATA0
MEM_MB_DATA1
MEM_MB_DATA2
MEM_MB_DATA3
MEM_MB_DATA4
MEM_MB_DATA5
MEM_MB_DATA6
MEM_MB_DATA7
MEM_MB_DATA8
MEM_MB_DATA9
MEM_MB_DATA10
MEM_MB_DATA11
MEM_MB_DATA12
MEM_MB_DATA13
MEM_MB_DATA14
MEM_MB_DATA15
MEM_MB_DATA16
MEM_MB_DATA17
MEM_MB_DATA18
MEM_MB_DATA19
MEM_MB_DATA20
MEM_MB_DATA21
MEM_MB_DATA22
MEM_MB_DATA23
MEM_MB_DATA24
MEM_MB_DATA25
MEM_MB_DATA26
MEM_MB_DATA27
MEM_MB_DATA28
MEM_MB_DATA29
MEM_MB_DATA30
MEM_MB_DATA31
MEM_MB_DATA32
MEM_MB_DATA33
MEM_MB_DATA34
MEM_MB_DATA35
MEM_MB_DATA36
MEM_MB_DATA37
MEM_MB_DATA38
MEM_MB_DATA39
MEM_MB_DATA40
MEM_MB_DATA41
MEM_MB_DATA42
MEM_MB_DATA43
MEM_MB_DATA44
MEM_MB_DATA45
MEM_MB_DATA46
MEM_MB_DATA47
MEM_MB_DATA48
MEM_MB_DATA49
MEM_MB_DATA50
MEM_MB_DATA51
MEM_MB_DATA52
MEM_MB_DATA53
MEM_MB_DATA54
MEM_MB_DATA55
MEM_MB_DATA56
MEM_MB_DATA57
MEM_MB_DATA58
MEM_MB_DATA59
MEM_MB_DATA60
MEM_MB_DATA61
MEM_MB_DATA62
MEM_MB_DATA63
51
DIMM2
DIMM2
3
DQ0
4
DQ1
9
DQ2
10
DQ3
122
DQ4
123
DQ5
128
DQ6
129
DQ7
12
DQ8
13
DQ9
18
DQ10
19
DQ11
131
DQ12
132
DQ13
137
DQ14
138
DQ15
21
DQ16
22
DQ17
27
DQ18
28
DQ19
140
DQ20
141
DQ21
146
DQ22
147
DQ23
30
DQ24
31
DQ25
36
DQ26
37
DQ27
149
DQ28
150
DQ29
155
DQ30
156
DQ31
81
DQ32
82
DQ33
87
DQ34
88
DQ35
200
DQ36
201
DQ37
206
DQ38
207
DQ39
90
DQ40
91
DQ41
96
DQ42
97
DQ43
209
DQ44
210
DQ45
215
DQ46
216
DQ47
99
DQ48
100
DQ49
105
DQ50
106
DQ51
218
DQ52
219
DQ53
224
DQ54
225
DQ55
108
DQ56
109
DQ57
114
DQ58
115
DQ59
227
DQ60
228
DQ61
233
DQ62
234
DQ63
2
VSS
5
VSS
8
VSS
11
VSS
14
VSS
17
VSS
20
VSS
23
VSS
26
VSS
29
VSS
32
VSS
35
VSS
38
VSS
41
VSS
44
VSS
47
VSS
80
VSS
83
VSS
86
VSS
89
VSS
92
VSS
95
VSS
98
VSS
101
VSS
104
VSS
VSS
107
110
VDD:4.7A 1.8V
54
57
60
62
65
66
69
72
75
78
170
173
176
179
182
183
D
D
D
D
D
D
D
D
D
VD
VD
VD
VSS
VSS
VSS
113
116
D
VD
VD
VD
VD
VD
VD
VD
VSS
VSS
VSS
VSS
VSS
VSS
VSS
119
121
124
127
130
133
136
139
D
D
D
D
D
D
VD
VD
VD
VD
VD
VD
DDR3
DDR3
VSS
VSS
VSS
VSS
VSS
VSS
142
145
148
151
154
186
D
D
VD
VD
VSS
VSS
157
160
4
VCC3_SPD
VTT_DDR
167
53
68
48
49
187
AR_IN
NC/P
VSS
226
RR_OUT
NC/E
VSS
ST4
NC/TE
VSS
229
79
EE1
SVD
R
FR
DM0/DQS9
NC/DQS9#
DM1/DQS10
NC/DQS10#
DM2/DQS11
NC/DQS11#
DM3/DQS12
NC/DQS12#
DM4/DQS13
NC/DQS13#
DM5/DQS14
NC/DQS14#
DM6/DQS15
NC/DQS15#
DM7/DQS16
NC/DQS16#
DM8/DQS17
NC/DQS17#
VSS
VSS
232
235
239
198
EE2
EE3
FR
FR
A10/AP
DQS0
DQS0#
DQS1
DQS1#
DQS2
DQS2#
DQS3
DQS3#
DQS4
DQS4#
DQS5
DQS5#
DQS6
DQS6#
DQS7
DQS7#
DQS8
DQS8#
ODT0
ODT1
CKE0
CKE1
CS0#
CS1#
RAS#
CAS#
RESET#
CK0#
CK1(NU)
CK1#(NU)
VREFDQ
VREFCA
1
VSS
MEC
MEC1
MEC2
120
240
236
189
191
194
197
D
D
D
D
VTT
VD
VD
VSS
VSS
163
166
VTT
VD
VD
DSPD
VD
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
199
202
205
208
211
214
217
220
223
MEM_MB_HOT#
MEM_MB_ADD0
188
EE4
A0
MEM_MB_ADD1
181
FR
A1
MEM_MB_ADD2
61
A2
MEM_MB_ADD3
180
A3
MEM_MB_ADD4
59
A4
MEM_MB_ADD5
58
A5
MEM_MB_ADD6
178
A6
MEM_MB_ADD7
56
A7
MEM_MB_ADD8
177
A8
MEM_MB_ADD9
175
A9
MEM_MB_ADD10
70
MEM_MB_ADD11
55
A11
MEM_MB_ADD12
174
A12
MEM_MB_ADD13
196
A13
MEM_MB_ADD14
172
A14
MEM_MB_ADD15
171
A15
39
CB0
40
CB1
45
CB2
46
CB3
158
CB4
159
CB5
164
CB6
165
CB7
MEM_MB_DQS_H0
7
MEM_MB_DQS_L0
6
MEM_MB_DQS_H1
16
MEM_MB_DQS_L1
15
MEM_MB_DQS_H2
25
MEM_MB_DQS_L2
24
MEM_MB_DQS_H3
34
MEM_MB_DQS_L3
33
MEM_MB_DQS_H4
85
MEM_MB_DQS_L4
84
MEM_MB_DQS_H5
94
MEM_MB_DQS_L5
93
MEM_MB_DQS_H6
103
MEM_MB_DQS_L6
102
MEM_MB_DQS_H7
112
MEM_MB_DQS_L7
111
43
42
MEM_MB_DM0
125
126
MEM_MB_DM1
134
135
MEM_MB_DM2
143
144
MEM_MB_DM3
152
153
MEM_MB_DM4
203
204
MEM_MB_DM5
212
213
MEM_MB_DM6
221
222
MEM_MB_DM7
230
231
161
162
MEM_MB1_ODT0
195
MEM_MB1_ODT1
77
MEM_MB_CKE0
50
MEM_MB_CKE1
169
MEM_MB1_CS_L0
193
MEM_MB1_CS_L1
76
MEM_MB_BANK0
71
BA0
MEM_MB_BANK1
190
BA1
MEM_MB_BANK2
52
BA2
MEM_MB_WE_L
73
WE#
MEM_MB_RAS_L
192
MEM_MB_CAS_L
74
MEM_MB_RESET#
168
MEM_MB_CLK_H0
184
CK0
MEM_MB_CLK_L0
185
MEM_MB_CLK_H3
63
MEM_MB_CLK_L3
64
MEM_VREF_DQ
1
MEM_VREF_CA
67
MEM_SCLK
118
SCL
MEM_SDATA
238
SDA
237
SA1
2
3
117
SA0
MEC
MEC
DDRIII-240P_BLACK-RH-24
DDRIII-240P_BLACK-RH-24
MEC3
VCC3_SPD
MEM_MB_HOT#
MEM_MB1_ODT0
MEM_MB1_ODT1
MEM_MB_CKE0
MEM_MB_CKE1
MEM_MB1_CS_L0
MEM_MB1_CS_L1
MEM_MB_BANK0
MEM_MB_BANK1
MEM_MB_BANK2
MEM_MB_WE_L
MEM_MB_RAS_L 2
MEM_MB_CAS_L 2
MEM_MB_RESET# 2
MEM_MB_CLK_H0 2
MEM_MB_CLK_L0 2
MEM_MB_CLK_H3 2
MEM_MB_CLK_L3 2
MEM_VREF_DQ
MEM_VREF_CA
MEM_SCLK 6
MEM_SDATA 6
2
MEM_MB_DM[7..0]
2
2
2
2
2
2
2
2
2
2
3
VCC_DDR
C157
C209
C209
C1u16X6
C1u16X6
C157
C0.1u10X0402
C0.1u10X0402
C152
C152
2
C1u16X6
C1u16X6
2
C162
C162
C0.1u10X0402
C0.1u10X0402
C156
C156
C0.1u10X0402
C0.1u10X0402
2
C213
C213
C0.1u10X0402
C0.1u10X0402
C211
C211
C0.1u10X0402
C0.1u10X0402
C207
C207
C0.1u10X0402
C0.1u10X0402
1
MICRO-START INT'L CO.,LTD.
MICRO-START INT'L CO.,LTD.
Title
Title
Title
DDR CH-B
DDR CH-B
DDR CH-B
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet of
Date: Sheet of
5
4
3
2
Date: Sheet
MICRO-START INT'L CO.,LTD.
MS-7721 3.2
MS-7721 3.2
MS-7721 3.2
1
of
734Tuesday, December 04, 2012
734Tuesday, December 04, 2012
734Tuesday, December 04, 2012
5
To PCIEX16,X1,LAN
X_C150p25N
X_C150p25N
X_C150p25N
X_C150p25N
PCIE_RST#
A_RST#
impedance 85ohm+/-15%
length need 1.0 to 12 inch
C464
C464
C463
C463
A_RST# for LPC device;
PCIE_RST# for APU PCIE device;
D D
C C
To SIO
AC capacitor need
over 500mil
form the hudson
100MHz
B B
Layout:Place x'tal within 1.5 inch of FCH
FCH_32K_X1
Y3
Y3
32.768KHZ12.5P
FCH_32K_X2
A A
PLACE THESE COMPONENTS CLOSE TO
U600, AND USE GROUND GUARD FOR
32K_X1 AND 32K_X2
32.768KHZ12.5P
12
4
3
20MR
20MR
R474
R474
C434
C434
C18P50N6
C18P50N6
5
C450
C450
C18P50N6
C18P50N6
48MHz
SIO_48M_CLK15
4
33R
33R
33R
33R
C0.1u10X0402
C0.1u10X0402
C0.1u10X0402
C0.1u10X0402
C0.1u10X0402
C0.1u10X0402
C0.1u10X0402
C0.1u10X0402
C0.1u10X0402
C0.1u10X0402
C0.1u10X0402
C0.1u10X0402
C0.1u10X0402
C0.1u10X0402
C0.1u10X0402
C0.1u10X0402
2K1%
2K1%
R417
R417
590R1%
590R1%
2K1%
2K1%
22R
22R
PCIE_RST#_R
A_RST#_R
UMI_RX0P_FCH
UMI_RX0N_FCH
UMI_RX1P_FCH
UMI_RX1N_FCH
UMI_RX2P_FCH
UMI_RX2N_FCH
UMI_RX3P_FCH
UMI_RX3N_FCH
CLK_CALRN
FCH_25M_X1
R411
R411
1MR
1MR
FCH_25M_X2
PCIE_CALRP
PCIE_CALRN
FCH_48M
AE2
AD5
AE30
AE32
AD33
AD31
AD28
AD29
AC30
AC32
AB33
AB31
AB28
AB29
AF29
AF31
W30
W32
AB26
AB27
AA24
AA23
AA27
AA26
W27
W26
W24
W23
Y33
Y31
Y28
Y29
V33
V31
V27
V26
F27
G30
G28
R26
T26
H33
H31
T24
T23
K29
H27
H28
K26
F33
F31
E33
E31
M23
M24
M27
M26
N25
N26
R23
R24
N27
R27
C31
C33
J30
J27
J26
PCIE_RST#
A_RST#
UMI_TX0P
UMI_TX0N
UMI_TX1P
UMI_TX1N
UMI_TX2P
UMI_TX2N
UMI_TX3P
UMI_TX3N
UMI_RX0P
UMI_RX0N
UMI_RX1P
UMI_RX1N
UMI_RX2P
UMI_RX2N
UMI_RX3P
UMI_RX3N
PCIE_CALRP
PCIE_CALRN
GPP_TX0P
GPP_TX0N
GPP_TX1P
GPP_TX1N
GPP_TX2P
GPP_TX2N
GPP_TX3P
GPP_TX3N
GPP_RX0P
GPP_RX0N
GPP_RX1P
GPP_RX1N
GPP_RX2P
GPP_RX2N
GPP_RX3P
GPP_RX3N
CLK_CALRN
PCIE_RCLKP
PCIE_RCLKN
DISP_CLKP
DISP_CLKN
DISP2_CLKP
DISP2_CLKN
APU_CLKP
APU_CLKN
SLT_GFX_CLKP
SLT_GFX_CLKN
GPP_CLK0P
GPP_CLK0N
GPP_CLK1P
GPP_CLK1N
GPP_CLK2P
GPP_CLK2N
GPP_CLK3P
GPP_CLK3N
GPP_CLK4P
GPP_CLK4N
GPP_CLK5P
GPP_CLK5N
GPP_CLK6P
GPP_CLK6N
GPP_CLK7P
GPP_CLK7N
GPP_CLK8P
GPP_CLK8N
14M_25M_48M_OSC
25M_X1
25M_X2
R485
VCC1P1
C490
C490
R485
R483
R483
C359
C359
C361
C361
C350
C350
C355
C355
C347
C347
C351
C351
C353
C353
C352
C352
R406
R406
R391
R391
R567
R567
X_C10p50N
X_C10p50N
Y2
Y2
25MHZ18P
25MHZ18P
1 2
PCIE_RST#13,16
A_RST#15
UMI_RX0P3
UMI_RX0N3
UMI_RX1P3
UMI_RX1N3
UMI_RX2P3
UMI_RX2N3
UMI_RX3P3
UMI_RX3N3
UMI_TX0P3
UMI_TX0N3
UMI_TX1P3
UMI_TX1N3
UMI_TX2P3
UMI_TX2N3
UMI_TX3P3
UMI_TX3N3
VCC1P1
DISP_CLK4
DISP_CLK#4
APU_CLK4
APU_CLK#4
PE16_GXF_CLK013
PE16_GXF_CLK0#13
PE0_GPP_CLK13
PE0_GPP_CLK#13
PE_LAN_CLK16
PE_LAN_CLK#16
C382
C382
C22P50N
C22P50N
C22P50N
C22P50N
C381
C381
Layout:Place x'tal within 1.5 inch of FCH
4
HUDSON-2
HUDSON-2
<DEVICE_NAME>
<DEVICE_NAME>
3
U33E
U33E
Part 1 of 5
Part 1 of 5
PCI CLKS
PCI CLKS
I EXPRESS INTERFACES
I EXPRESS INTERFACES
PC
PC
PCI INTERFACE
PCI INTERFACE
OCK GENERATOR
OCK GENERATOR
CL
CL
3
LPC
LPC
APU
APU
S5 PLUS
S5 PLUS
PCICLK0
PCICLK1/GPO36
PCICLK2/GPO37
PCICLK3/GPO38
PCICLK4/14M_OSC/GPO39
PCIRST#
AD0/GPIO0
AD1/GPIO1
AD2/GPIO2
AD3/GPIO3
AD4/GPIO4
AD5/GPIO5
AD6/GPIO6
AD7/GPIO7
AD8/GPIO8
AD9/GPIO9
AD10/GPIO10
AD11/GPIO11
AD12/GPIO12
AD13/GPIO13
AD14/GPIO14
AD15/GPIO15
AD16/GPIO16
AD17/GPIO17
AD18/GPIO18
AD19/GPIO19
AD20/GPIO20
AD21/GPIO21
AD22/GPIO22
AD23/GPIO23
AD24/GPIO24
AD25/GPIO25
AD26/GPIO26
AD27/GPIO27
AD28/GPIO28
AD29/GPIO29
AD30/GPIO30
AD31/GPIO31
CBE0#
CBE1#
CBE2#
CBE3#
FRAME#
DEVSEL#
IRDY#
TRDY#
STOP#
PERR#
SERR#
REQ0#
REQ1#/GPIO40
REQ2#/CLK_REQ8#/GPIO41
REQ3#/CLK_REQ5#/GPIO42
GNT0#
GNT1#/GPO44
GNT2#/SD_LED/GPO45
GNT3#/CLK_REQ7#/GPIO46
CLKRUN#
LOCK#
INTE#/GPIO32
INTF#/GPIO33
INTG#/GPIO34
INTH#/GPIO35
LPCCLK0
LPCCLK1
LFRAME#
LDRQ0#
LDRQ1#/CLK_REQ6#/GPIO49
SERIRQ/GPIO48
DMA_ACTIVE#
PROCHOT#
APU_PG
LDT_STP#
APU_RST#
32K_X1
32K_X2
S5_CORE_EN
RTCCLK
INTRUDER_ALERT#
VDDBT_RTC_G
PAR
LAD0
LAD1
LAD2
LAD3
PCI_CLK0_R PCICLK0_SLOT
AF3
PCI_CLK1_R
AF1
AF5
PCI_CLK3_R
AG2
PCI_CLK4_R
AF6
PCIRST#
AB5
AD0
AJ3
AD1
AL5
AD2
AG4
AD3
AL6
AD4
AH3
AD5
AJ5
AD6
AL1
AD7
AN5
AD8
AN6
AD9
AJ1
AD10
AL8
AD11
AL3
AD12
AM7
AD13
AJ6
AD14
AK7
AD15
AN8
AD16
AG9
AD17
AM11
AD18
AJ10
AD19
AL12
AD20
AK11
AD21
AN12
AD22
AG12
AD23
AE12
AD24
AC12
AD25
AE13
AD26
AF13
AD27
AH13
AD28
AH14
AD29
AD15
AD30
AC15
AD31
AE16
C_BE#0
AN3
C_BE#1
AJ8
C_BE#2
AN10
C_BE#3
AD12
FRAME#
AG10
DEVSEL#
AK9
IRDY#
AL10
TRDY#
AF10
PAR
AE10
STOP#
AH1
PERR#
AM9
SERR#
AH8
PREQ0#
AG15
AG13
AF15
AM17
PGNT0#
AD16
AD13
AD21
AK17
AD19
LOCK#
AH9
PCI_INTE#
AF18
PCI_INTF#
AE18
PCI_INTG#
AC16
PCI_INTH#
AD18
LPCCLK0_TPM_R
B25
LPC_CLK1_R
D25
LPC_AD0
D27
LPC_AD1
C28
LPC_AD2
A26
LPC_AD3
A29
LPC_FRAME#
A31
LPC_DRQ#0
B27
AE27
SERIRQ
AE19
G25
E28
E26
LDTSTOP_L
G26
APU_RST#
F26
FCH_32K_X1
G2
FCH_32K_X2
G4
H7
RTC_CLK
F1
F3
VBAT_FCH
E6
C458
C458
2
R486
R486
22R
22R
R469
R469
22R
22R
R465
R465
22R
22R
22R
22R
R468
R468
R479
R479
33R
33R
14
FRAME#
14
DEVSEL#
14
IRDY#
14
TRDY#
14
PAR
STOP#
14
PERR#
14
SERR#
14
14
PREQ0#
PGNT0#
14
LOCK#
14
PCI_INTE#
14
14
PCI_INTF#
14
PCI_INTG#
14
PCI_INTH#
R430
R430
22R
22R
22R
22R
R427
R427
S5+ Mode Not Implemented:
Leave unconnected.
RTC_CLK
CP5CP5
C613
C613
0402
0402
C1u6.3X6
C1u6.3X6
C0.1u10X
C0.1u10X
2
PCIRST_SLOT#
AD[31..0]
14
C_BE#[3..0]
LPCCLK0_TPM
LPC_CLK1
LPC_AD[3..0]
LPC_FRAME#
LPC_DRQ#0
15
SERIRQ
15
FCH_DMA_ACTIVE#
PROCHOT# 4,15
APU_PWRGD
4
LDTSTOP_L
APU_RST#
4
11
R492
R492
JBAT1
JBAT1
1
2
H1X2M_BLACK-RH
H1X2M_BLACK-RH
C465
C465
C461
C461
14
11,15
11,15
15
4,24
510R/6
510R/6
C531
C531
C1u6.3X6
C1u6.3X6
1
X_C10p50N
X_C10p50N
11
11
11
LPC_AD[3..0]
14
14
LPCCLK0_TPM
LPC_CLK1
15
PCI_CLK1
PCI_CLK3
PCI_CLK4
C486
C486
C462
C462
C487
C487
C488
C488
C489
C489
X_C10p50N
X_C10p50N
X_C150p25N
X_C150p25N
X_C10p50N
X_C10p50N
X_C10p50N
X_C10p50N
X_C10p50N
X_C10p50N
PCICLK0_SLOT
PCI_CLK1
PCI_CLK3
PCI_CLK4
X_C150p25N
X_C150p25N
PCIRST_SLOT#
33MHz
VCC3_SB
X_20K1%
LDTSTOP_L
R444
R444
X_20K1%
FOR CHIPSET AUTOMATION
4
VBAT
R571
Y
D44
D44
1 2
BAT-2P-RH-1
BAT-2P-RH-1
BAT1
BAT1
1K/6
1K/6
R571
Z
S-BAT54C
S-BAT54C
X
Title
Title
Title
HUDSON PCIE/PCI/APU/LPC/CLK
HUDSON PCIE/PCI/APU/LPC/CLK
HUDSON PCIE/PCI/APU/LPC/CLK
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
MS-7721 3.2
MS-7721 3.2
Date: Sheet
Date: Sheet
Date: Sheet
MS-7721 3.2
0R
R230RR23
MICRO-START INT'L CO.,LTD.
MICRO-START INT'L CO.,LTD.
MICRO-START INT'L CO.,LTD.
VCC3_SB
1
834Tuesday, December 04, 2012
834Tuesday, December 04, 2012
834Tuesday, December 04, 2012
of
of
of
5
4
3
2
1
HUDSON ACPI/USB/AZ/GPIO
U33A
HUDSON-2
HUDSON-2
Part 4 of 5
Part 4 of 5
U33A
HD AUDIO
HD AUDIO
EMBEDDED CTRL
EMBEDDED CTRL
SB MISCUSB 1.1
SB MISCUSB 1.1
U
U
ACPI / WAKE UP EVENTS
ACPI / WAKE UP EVENTS
SB 2.0
SB 2.0
U
U
GPIO
GPIO
USB OC
USB OC
SB 3.0
SB 3.0
U
U
EC_PWM0/EC_TIMER0/GPIO197
EC_PWM1/EC_TIMER1/GPIO198
EC_PWM2/EC_TIMER2/WOL_EN/GPIO199
EC_PWM3/EC_TIMER3/GPIO200
USBCLK/14M_25M_48M_OSC
USB_RCOMP
USB_FSD1P/GPIO186
USB_FSD1N
USB_FSD0P/GPIO185
USB_FSD0N
USB_HSD13P
USB_HSD13N
USB_HSD12P
USB_HSD12N
USB_HSD11P
USB_HSD11N
USB_HSD10P
USB_HSD10N
USB_HSD9P
USB_HSD9N
USB_HSD8P
USB_HSD8N
USB_HSD7P
USB_HSD7N
USB_HSD6P
USB_HSD6N
USB_HSD5P
USB_HSD5N
USB_HSD4P
USB_HSD4N
USB_HSD3P
USB_HSD3N
USB_HSD2P
USB_HSD2N
USB_HSD1P
USB_HSD1N
USB_HSD0P
USB_HSD0N
USBSS_CALRP
USBSS_CALRN
USB_SS_TX3P
USB_SS_TX3N
USB_SS_RX3P
USB_SS_RX3N
USB_SS_TX2P
USB_SS_TX2N
USB_SS_RX2P
USB_SS_RX2N
USB_SS_TX1P
USB_SS_TX1N
USB_SS_RX1P
USB_SS_RX1N
USB_SS_TX0P
USB_SS_TX0N
USB_SS_RX0P
USB_SS_RX0N
SCL2/GPIO193
SDA2/GPIO194
SCL3_LV/GPIO195
SDA3_LV/GPIO196
KSI_0/GPIO201
KSI_1/GPIO202
KSI_2/GPIO203
KSI_3/GPIO204
KSI_4/GPIO205
KSI_5/GPIO206
KSI_6/GPIO207
KSI_7/GPIO208
G8
B9
H1
H3
H6
H5
H10
G10
K10
J12
G12
F12
K12
K13
B11
D11
E10
F10
C10
A10
H9
G9
A8
C8
F8
E8
C6
A6
C5
A5
C1
C3
E1
E3
C16
A16
A14
C14
C12
A12
D15
B15
E14
F14
F15
G15
H13
G13
J16
H16
J15
K15
H19
G19
G22
G21
E22
H22
J22
H21
K21
K22
F22
F24
E24
B23
C24
F18
USB_RCOMP
USBSS_CALRP
USBSS_CALRN
SCLK2
R442
R442
SDATA2
R441
R441
SCLK3
R450 10KR450 10K
SDATA3
R448
R448
R460
R460
R263
R263
R264
R264
10K
10K
10K
10K
10K
10K
11.8K1%
11.8K1%
USB13+
USB13-
USB12+
USB12-
USB11+
USB11-
USB10+
USB10-
USB7+
USB7-
USB6+
USB6-
USB5+
USB5-
USB4+
USB4- 18
USB3+
USB3-
USB2+
USB2-
USB1+
USB1-
USB0+
USB0-
X_1K
X_1K
X_1K
X_1K
USB_SSTX3+
USB_SSTX3-
USB_SSRX3+
USB_SSRX3-
USB_SSTX2+
USB_SSTX2-
USB_SSRX2+
USB_SSRX2-
USB_SSTX1+
USB_SSTX1-
USB_SSRX1+
USB_SSRX1-
USB_SSTX0+
USB_SSTX0-
USB_SSRX0+
USB_SSRX0-
19
19
19
19
USB 3.0 For D3
19
19
19
19
18
18
18
18
18
18
18
18
18
18
18
18
18
18
18
FCH_VDD_11SSUSB_S
19
19
19
19
19
19
19
19
19
19
19
19
19
19
FCH_GPIO199
USB 3.0 For D3
19
19
11
D30
D30
S-RB751V-40_SOD323-RH
FP_RST#15,28
D D
S-RB751V-40_SOD323-RH
VRM_PWRGD24,26
VCC3_SB
X_10K
X_10K
X_10K
X_10K
X_10K
X_10K
2.2K
2.2K
2.2K
2.2K
FCH_THERMTRIP#
PE_WAKE#
PCI_PME#
SCLK1
SDATA1
R456
R456
R508
R508
R514
R514
R512
R512
R511
R511
S5 POWER DOMAIN
ROUTE TO LAN,PCIE,PCI
VCC3
10K
10K
R393
R393
R451
R451
10K
10K
R394
R394
2.2K
C C
2.2K
2.2K
2.2K
R410
R410
S0 POWER DOMAIN
ROUTE TO DIMMs,CLK Gen,SIO
C13
C13
X_C10p50N
X_C10p50N
X_C10p50N
X_C10p50N
C15
C15
FCH_IDLEEXIT_L
WD_PWRGD
AZ_SDIN0
AZ_BITCLK
FOR EMI
B B
A A
D
D
G
G
S
S
SCLK0
SDATA0
FCH_PWRGD
Q18
Q18
N-2N7002
N-2N7002
15,23
SLP_S3#15,23,24
SLP_S5#15,23,27
PWRBTN#15
FCH_PWRGD15,23
Make provision for a 2.2-KΩ 5% pull-up resistor
to +3.3V_S5, do not install by default, or provide
test-point access for lab use
A20GATE15
KBRST#15
PCI_PME#14,15
Not Implemented: Used as GEVENT23# or left unconnected.
FP_RST#15,28
PE_WAKE#13,16
FCH_THERMTRIP#4
SIO_RSMRST#15
SPKR28
SCLK06
SDATA06
SCLK113
SDATA113
SPI_HOLD#_R10
FCH_IDLEEXIT_L4
SPKR
SCLK0
SDATA0
SCLK1
SDATA1
PCI_PME#
PE_WAKE#
WD_PWRGD
C442
C442
X_C2.2u10Y6
X_C2.2u10Y6
SPI_HOLD#_R
FCH_IDLEEXIT_L
VCC3_SB
10K
10K
R517
R517
R480
R480
R482
R482
R484
R484
22R
22R
22R
22R
22R
22R
22R
22R
USB_OC
AZ_BITCLK_R
AZ_SDOUT_R
AZ_SYNC_R
AZ_RST_R
R452
R452
AZ_BITCLK17
AZ_SDOUT17
AZ_SDIN017
AZ_SDIN0
AZ_SYNC17
AZ_RST#17
SLP_S5#
PWRBTN#
FCH_PWRGD
PCIE_RST2#/GEVENT4#
AB6
RI#/GEVENT22#
R2
SPI_CS3#/GBE_STAT1/GEVENT21#
W7
SLP_S3#
T3
SLP_S5#
W2
PWR_BTN#
J4
PWR_GOOD
N7
TEST0
T9
TEST1/TMS
T10
TEST2
V9
GA20IN/GEVENT0#
AE22
KBRST#/GEVENT1#
AG19
PME#/GEVENT3#
R9
LPC_SMI#/GEVENT23#
C26
LPC_PD#/GEVENT5#
T5
SYS_RESET#/GEVENT19#
U4
WAKE#/GEVENT8#
K1
IR_RX1/GEVENT20#
V7
THRMTRIP#/SMBALERT#/GEVENT2#
R10
WD_PWRGD
AF19
RSMRST#
U2
CLK_REQ4#/SATA_IS0#/GPIO64
AG24
CLK_REQ3#/SATA_IS1#/GPIO63
AE24
SMARTVOLT1/SATA_IS2#/GPIO50
AE26
CLK_REQ0#/SATA_IS3#/GPIO60
AF22
SATA_IS4#/FANOUT3/GPIO55
AH17
SATA_IS5#/FANIN3/GPIO59
AG18
SPKR/GPIO66
AF24
SCL0/GPIO43
AD26
SDA0/GPIO47
AD25
SCL1/GPIO227
T7
SDA1/GPIO228
R7
CLK_REQ2#/FANIN4/GPIO62
AG25
CLK_REQ1#/FANOUT4/GPIO61
AG22
IR_LED#/LLB#/GPIO184
J2
SMARTVOLT2/SHUTDOWN#/GPIO51
AG26
DDR3_RST#/GEVENT7#/VGA_PD
V8
GBE_LED0/GPIO183
W8
SPI_HOLD#/GBE_LED1/GEVENT9#
Y6
GBE_LED2/GEVENT10#
V10
GBE_STAT0/GEVENT11#
AA8
CLK_REQG#/GPIO65/OSCIN/IDLEEXIT#
AF25
BLINK/USB_OC7#/GEVENT18#
M7
USB_OC6#/IR_TX1/GEVENT6#
R8
USB_OC5#/IR_TX0/GEVENT17#
T1
USB_OC4#/IR_RX0/GEVENT16#
P6
USB_OC3#/AC_PRES/TDO/GEVENT15#
F5
USB_OC2#/TCK/GEVENT14#
P5
USB_OC1#/TDI/GEVENT13#
J7
USB_OC0#/SPI_TPM_CS#/TRST#/GEVENT12#
T8
AZ_BITCLK
AB3
AZ_SDOUT
AB1
AZ_SDIN0/GPIO167
AA2
AZ_SDIN1/GPIO168
Y5
AZ_SDIN2/GPIO169
Y3
AZ_SDIN3/GPIO170
Y1
AZ_SYNC
AD6
AZ_RST#
AE4
PS2_DAT/SDA4/GPIO187
K19
PS2_CLK/CEC/SCL4/GPIO188
J19
SPI_CS2#/GBE_STAT2/GPIO166
J21
PS2KB_DAT/GPIO189
D21
PS2KB_CLK/GPIO190
C20
PS2M_DAT/GPIO191
D23
PS2M_CLK/GPIO192
C22
KSO_0/GPIO209
F21
KSO_1/GPIO210
E20
KSO_2/GPIO211
F20
KSO_3/GPIO212
A22
KSO_4/GPIO213
E18
KSO_5/GPIO214
A20
KSO_6/GPIO215
J18
KSO_7/GPIO216
H18
KSO_8/GPIO217
G18
KSO_9/GPIO218
B21
KSO_10/GPIO219
K18
KSO_11/GPIO220
D19
KSO_12/GPIO221
A18
KSO_13/GPIO222
C18
KSO_14/XDB0/GPIO223
B19
KSO_15/XDB1/GPIO224
B17
KSO_16/XDB2/GPIO225
A24
KSO_17/XDB3/GPIO226
D17
MICRO-START INT'L CO.,LTD.
MICRO-START INT'L CO.,LTD.
Title
Title
Title
HUDSON ACPI/USB/AZ/GPIO
HUDSON ACPI/USB/AZ/GPIO
HUDSON ACPI/USB/AZ/GPIO
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet
5
4
3
2
Date: Sheet
MICRO-START INT'L CO.,LTD.
MS-7721 3.2
MS-7721 3.2
MS-7721 3.2
1
934Tuesday, December 04, 2012
934Tuesday, December 04, 2012
934Tuesday, December 04, 2012
of
of
of
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