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5
CONTENT SHEET
4
3
2
1
Cover Sheet, Block diagram
Intel LGA775 CPU - Signals/ Power/ GND
D D
Intel Eaglelake - FSB, PCIE, DMI, VGA, MSIC
Intel Eaglelake - Memory DDR3
Intel Eaglelake - Power / GND
ICH9/10 - PCI, USB, DMI, PCIE
ICH9/10 - Host, DMI, SATA, Audio, SPI, RTC, MSIC
ICH9/10 - Power, GND
DDR3 Chanel-A / Chanel-B
Clock Gen ICS9LPRS113
C C
Super I/O Fintek F71889ED
SATA / FAN Control
LAN Realtek RTL8111E(PCIE)
Audio Codec RTL887 CO-LAY 892
1-2
3-5
6
7
8-9
10
11
12
13-14
15
16
17
18
19
MS-7716
CPU:
System Chipset:
On Board Device:
Main Memory:
Intel Pentium 4, Pentium D, Core2 Duo, Wolfdale, Kentsfield
and Yorkfield processors in LGA775 Package.
Intel Eaglelake - G/P (G, P4North Bridge)
Intel ICH10 (South Bridge)
CLOCK Gen -- ICS 9LPRS113A
LPC Super I/O -- Fintek F71889ED
LAN -- Realtek 8111E (PCIE)
HD Audio Codec -- RTL887 co-lay 892
1394 Controller -- VIA6315N
Dual-channel DDR-III * 2
ATX
Version: 1.0
PCIE x16, x1*3 20
PCI Slot 1 & 2
1394 Controller - VIA6315N
USB Connectors
B B
System Power/ACPI Controller UPI
21
22
23
24
Expansion Slots:
PCI EXPRESS X16 SLOT *1
PCI EXPRESS X1 SLOT * 3
PCI SLOT * 2
DDR3 / NB-Core Switching Power
VRD 11.1 - ( 3Phases)
ATX Power-Con. / F_Panel
Manual & Option Parts
Power Delivery
GPIO Setting & PCI Routing
A A
Reset & PWROK map
Revision History
5
25
PWM:
ISL6333A
26
27
28
29
30
31
32
MICRO-STAR INT'L CO.,LTD
MICRO-STAR INT'L CO.,LTD
MICRO-STAR INT'L CO.,LTD
MS-7716
MS-7716
MSI
MSI
MSI
Size Document Description Rev
Size Document Description Rev
Size Document Description Rev
Custom
Custom
Custom
Date:
Thursday, September 09, 2010
Date:
Thursday, September 09, 2010
Date:
4
3
2
Thursday, September 09, 2010
MS-7716
COVER SHEET
COVER SHEET
COVER SHEET
1
132
132
132
Sheet of
Sheet of
Sheet of
1.0
1.0
1.0
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5
4
3
2
1
Block Diagram
Board Stack-up
(1080 Prepreg Considerations)
D D
VRD 11
ISL6333
3-Phase PWM
Intel LGA775 Processor
FSB 800/1066/1333
FSB
DDR3 800/1066
Solder Mask
PREPREG 2.7mils
CORE 50mils
1.9mils Cu plus plating
1 oz. (1.2mils)
Cu Power
Plane
PCI_E X16
Connector
Analog
C C
Video Out
PCI EXPRESS X16
RGB
Eaglelake
G/P
GMCH
DMI
DDRIII
HD Audio Link
PCI_E x4
PCI_E x1
PCI_E x4
(3 PCI_E x1 option)
PCI_E x1
2 DDR III
DIMM
Modules
HD Audio Codec
ALC 887
co-lay ALC892
LAN
PCI-E RTL8111E
Solder Mask
PREPREG 2.7mils
1.9mils Cu plus plating
Single End 50ohm Top/Bottom : 4mils
USB2.0 - 90ohm : 15/4.5/7.5/4.5/15
SATA - 95ohm : 15/4/8/4/15
LAN - 100ohm : 15/4/8/4/15
PCIE - 95ohm : 15/4/8/4/15
IEEE1394 - 110ohm : 15/4/9/4/15
IDE : 15/4/8/4/15
1 oz. (1.2mils)
Cu GND
Plane
ICH9/10
J1394_2
SATA-II 0~5
B B
USB Port 0~11
PCI_E to PATA
SATA2
USB2.0
PCI_E x1
SPI
LPC Bus
PCI
LPC SIO
Fintek
F71889
1394
VIA6315N
J
1394_1
PCI Slot 2
SATA-II
A A
IDE
Keyboard
Floopy
Serial
SPI
Flash ROM
5
4
Mouse
MICRO-STAR INT'L CO.,LTD
MICRO-STAR INT'L CO.,LTD
MICRO-STAR INT'L CO.,LTD
MS-7716
MS-7716
MSI
MSI
MSI
Size Document Description Rev
Size Document Description Rev
Size Document Description Rev
Custom
Custom
Custom
Date:
Thursday, September 09, 2010
Date:
Thursday, September 09, 2010
Date:
3
2
Thursday, September 09, 2010
MS-7716
BLOCK DIAGRAM
BLOCK DIAGRAM
BLOCK DIAGRAM
1
232
232
232
Sheet of
Sheet of
Sheet of
1.0
1.0
1.0
![](/html/c6/c6ff/c6ff8025bcec294af73631b19fefb7c04a4e8410910c874f6da27db71e61c099/bg3.png)
5
4
3
2
1
VCC_SENSE
CPU SIGNAL BLOCK
H_DBI#0
H_DBI#1
H_DBI#2
H_DBI#3
H_TDI
H_TDO
H_TMS
H_TRST#
H_TCK
PECI
VTIN1
GNDHM
H_TRMTRIP#
H_PROCHOT#
PM_SLP_N
R102
R102
X_51R0402-LF
X_51R0402-LF
H_D#63
H_D#62
H_D#61
H_D#60
H_D#59
H_D#58
H_D#57
H_D#56
H_D#55
H_D#54
H_A#[3..35]6
D6
VID7VI
AM5
AN6
AJ3
AK3
AM7
VID6
ITP_CLK1
ITP_CLK0
RSVD/VID7
VSS_MB_REGULATION
VCC_MB_REGULATION
D14#
D13#
D12#D8D11#
D10#
D9#
D8#
D7#A7D6#B7D5#B6D4#A5D3#C6D2#A4D1#C5D0#
B12
B10
A11
A10
C11
H_D#7
H_D#8
H_D#9
H_D#10
H_D#11
H_D#12
H_D#13
G11
D19
C20
AB2
AB3
AD3
AD1
AF1
AC1
AG1
AE1
AL1
AK1
AE8
AL2
AH2
AE6
D16
A20
AA2
G29
H30
G30
G23
B22
A22
A19
B19
B21
C21
B18
A17
B16
C18
A8
R3
M3
P3
H4
B2
C1
E3
D2
C3
C2
D4
E4
G8
G7
G5
M2
N2
P2
K3
L2
N5
C9
Y1
V2
N1
CPU1A
CPU1A
DBI0#
DBI1#
DBI2#
DBI3#
IERR#
MCERR#
FERR#/PBE#
STPCLK#
BINIT#
INIT#
RSP#
DBSY#
DRDY#
TRDY#
ADS#
LOCK#
BNR#
HIT#
HITM#
BPRI#
DEFER#
TDI
TDO
TMS
TRST#
TCK
PECI
THERMDA
THERMDC
THERMTRIP#
GND/SKTOCC#
PROCHOT#
IGNNE#
SMI#
A20M#
TESTI_13
RSVD#AH2
RESERVED0
RESERVED1
RESERVED2
RESERVED4
RESERVED5
BOOTSELECT
LL_ID0
LL_ID1
BSEL0
BSEL1
BSEL2
PWRGOOD
RESET#
D63#
D62#
D61#
D60#
D59#
D58#
D57#
D56#
D55#
D54#
B15
H_D#53
#35
H_A
AJ6
A35#
D53#
D52#
C14
H_D#52
#33
#34
H_A
H_A
AJ5
AH5
A34#
D51#
A14
C15
H_D#51
H_D#50
#32
H_A
AH4
A33#
A32#
D50#
D49#
D17
H_D#49
#31
#30
H_A
H_A
AG5
AG4
A31#
D48#
2
D20
G2
H_D#48
H_D#47
#29
H_A
AG6
A30#
A29#
D47#
D46#
D22
H_D#46
#28
#27
H_A
H_A
AF4
AF5
A28#
D45#
1
E22
G2
H_D#45
H_D#44
#26
H_A
AB4
A27#
A26#
D44#
D43#
F21
H_D#43
#24
#25
H_A
H_A
AC5
AB5
A25#
D42#
F20
E21
H_D#42
H_D#41
#23
H_A
AA5
A24#
A23#
D41#
D40#
E19
H_D#40
#22
#21
H_A
H_A
AD6
AA4
A22#
D39#
F18
E18
H_D#39
H_D#38
#18
#20
#19
H_A
H_A
H_A
A21#
A20#Y4A19#Y6A18#W6A17#
D38#
D37#
D36#
7
F17
G1
H_D#37
H_D#35
H_D#36
#17
#16
#15
#14
H_A
H_A
H_A
H_A
AB6
A16#W5A15#V4A14#V5A13#U4A12#U5A11#T4A10#
D35#
D34#
D33#
D32#
8
6
E16
E15
G1
G1
H_D#31
H_D#32
H_D#33
H_D#34
D31#
5
G1
#12
#13
H_A
H_A
D30#
F15
G14
H_D#29
H_D#30
#11
H_A
D29#
D28#
F14
H_D#28
#10
H_A
H_A#9
U6
D27#
3
E13
G1
H_D#26
H_D#27
H_A#8
H_A#5
H_A#6
H_A#7
H_A#3
H_A#4
L5
A9#T5A8#R4A7#M4A6#L4A5#M5A4#P6A3#
D26#
D25#
D24#
D23#
D22#
D21#
F12
F11
E10
D13
D10
H_D#20
H_D#21
H_D#22
H_D#23
H_D#24
H_D#25
AC2
AN3
AN4
DBR#
VSS_SENSE
VCC_SENSE
D20#D7D19#E9D18#F9D17#F8D16#G9D15#
D11
H_D#14
H_D#15
H_D#16
H_D#17
H_D#18
H_D#19
AN5
C12
D D
H_DBI#[0..3]6
H_IERR#4
H_FERR#10
H_STPCLK#10
H_INIT#10
H_DBSY#6
H_DRDY#6
H_TRDY#6
H_ADS#6
C C
B B
A A
H_LOCK#6
H_BNR#6
H_HIT#6
H_HITM#6
H_BPRI#6
H_DEFER#6
PECI10,16
VTIN116
GNDHM16
H_TRMTRIP#10
H_PROCHOT#4
H_IGNNE#10
ICH_H_SMI#10
H_A20M#10
PM_SLP_N6
H_BPM#1 BPM#1
Kentsfield
CPU_BSEL015,16
CPU_BSEL115,16
CPU_BSEL215,16
H_PWRGD4,10
H_CPURST#4,6,26
H_D#[0..63]6
R103R103
C52
C52
X_C10u16X51206-RH
X_C10u16X51206-RH
D0
D5
VID2VID3VID1VID4VI
VI
AL4
AK4
AL6
AM3
AL5
AM2
VID5
VID4
VID3
VID2
VID1
VID0
VID_SELECT
GTLREF_SEL
FC5/CPU_GTLREF2
RSVD/CPU_GTLREF3
FORCEPH
LINT1/NMI
LINT0/INTR
B4
H_D#0
H_D#1
H_D#2
H_D#3
H_D#4
H_D#5
H_D#6
VSS_SENSE
VID[0..7]
AN7
H1
GTLREF0
H2
GTLREF1
H29
E24
GTLREF2
F2
G10
AG3
BPM5#
AF2
BPM4#
AG2
BPM3#
AD2
BPM2#
AJ1
BPM1#
AJ2
BPM0#
J6
REQ4#
K6
REQ3#
M6
REQ2#
J5
REQ1#
K4
REQ0#
W2
TESTHI12
P1
TESTHI11
H5
TESTHI10
G4
TESTHI9
G3
TESTHI8
F24
TESTHI7
G24
TESTHI6
G26
TESTHI5
G27
TESTHI4
G25
TESTHI3
F25
TESTHI2
W3
TESTHI1
F26
TESTHI0
AK6
G6
RSVD#G6
G28
BCLK1#
F28
BCLK0#
A3
RS2#
F5
RS1#
B3
RS0#
U3
AP1#
U2
AP0#
F3
BR0#
T2
COMP5
J2
COMP4
R1
COMP3
G2
COMP2
T1
COMP1
A13
COMP0
J17
DP3#
H16
DP2#
H15
DP1#
J16
DP0#
AD5
ADSTB1#
R6
ADSTB0#
C17
DSTBP3#
G19
DSTBP2#
E12
DSTBP1#
B9
DSTBP0#
A16
DSTBN3#
G20
DSTBN2#
G12
DSTBN1#
C8
DSTBN0#
L1
K1
ZIF-SOCKET775-RH,ZIF-SOCKET775_TH-1
ZIF-SOCKET775-RH,ZIF-SOCKET775_TH-1
26
VTT_OUT_RIGHT
R83
R83
680R0402-RH
680R0402-RH
CPU_GTLREF0
CPU_GTLREF1
GTLREF_SEL
R163
R163
CPU_GTLREF1
CPU_GTLREF0
H_BPM#5
H_BPM#4
H_BPM#3
H_BPM#2
H_BPM#1
H_BPM#0
H_REQ#4
H_REQ#3
H_REQ#2
H_REQ#1
H_REQ#0
H_TESTHI12
DPSLP#
H_TESTHI10
H_TESTHI9
H_TESTHI8
H_TESTHI2_7
H_TESTHI1
H_TESTHI0
FORCEPH
RSVD_G6
CK_H_CPU_DN
CK_H_CPU_DP
H_RS#2
H_RS#1
H_RS#0
TEST-U3
TEST-U2
H_COMP5
H_COMP4
H_COMP3
H_COMP2
H_COMP1
H_COMP0
TEST-J17
TEST-H16
TEST-H15
TEST-J16
VCC_SENSE
VSS_SENSE
X_0R0402
X_0R0402
R106R106
R94R94
R170
R170
R168
R168
R87
R87
R125
R125
X_TPT3X_TP
T3
X_TPT2X_TP
T2
R128R128
T6
X_TPT6X_TP
X_TPT7X_TP
T7
X_TPT9X_TP
T9
X_TPT8X_TP
T8
H_ADSTB#1
H_ADSTB#0
H_DSTBP#3
H_DSTBP#2
H_DSTBP#1 6
H_DSTBP#0
H_DSTBN#3
H_DSTBN#2
H_DSTBN#1
H_DSTBN#0 6
H_NMI
H_INTR
26
26
CPU_GTLREF0
CPU_GTLREF1
X_TPT5X_TP
T5
CPU_MCH_GTLREF
CPU_GTLREF1
CPU_GTLREF0
H_BPM#0
H_REQ#[0..4]
H_TESTHI12
DPSLP#
51R0402-LF
51R0402-LF
51R0402-LF
51R0402-LF
X_130R1%0402
X_130R1%0402
X_51R0402-LF
X_51R0402-LF
CK_H_CPU_DN
CK_H_CPU_DP
H_RS#[0..2]
H_COMP5_R
6
6
6
6
6
6
6
6
10
10
4
4
4
4
5
6
5
10
H_BPM#2
H_BPM#3
Kentsfield
V_FSB_VTT
VTT_OUT_RIGHT
VTT_OUT_LEFT
15
15
6
6
V_FSB_VTT
H_BR#0
H_COMP5_R
VTT_OUT_RIGHT
4,6
6,10
4,5,24,26
PULL HIGHT PULL DOWN
VID0
VID4
VID2
VID5
VID1
VID6
VID3
VID7
H_BPM#0
H_BPM#1
H_BPM#5
H_BPM#3
H_TRST#
H_BPM#4
H_TDO
H_TCK
H_TDI
H_BPM#2
H_TMS
H_TESTHI12
H_TESTHI10
H_TESTHI9
DPSLP#
H_TESTHI8
H_TESTHI1
PM_SLP_N
BPM#1
RN3
RN3
RN4
RN4
RN5
RN5
RN7
RN7
RN8
RN8
R115
R115
R95
R95
R107
R107
R122
R122
R100
R100
1
3
5
7
1
3
5
7
1
3
5
7
1
3
5
7
1
3
5
7
1
3
5
7
2
4
6
8
2
4
6
8
8P4R-1KR
8P4R-1KR
2
4
6
8
8P4R-51R0402
8P4R-51R0402
2
4
6
8
8P4R-51R0402
8P4R-51R0402
2
4
6
8
8P4R-51R0402
8P4R-51R0402
8P4R-51R0402
8P4R-51R0402
2
4
6
8
X_51R0402-LF
X_51R0402-LF
51R0402-LF
51R0402-LF
51R0402-LF
51R0402-LF
X_51R0402-LF
X_51R0402-LF
X_51R0402-LF
X_51R0402-LF
8P4R-1KR
8P4R-1KR
RN2
RN2
PM_SLP_N/H_TESTHI1
Demo schmatic is NC
H_COMP5
R113
R113
X_49.9R1%0402
R123
R123
R117
R117
R127
R127
R114
R114
R148
R148
X_49.9R1%0402
X_49.9R1%0402
X_49.9R1%0402
49.9R1%0402
49.9R1%0402
49.9R1%0402
49.9R1%0402
49.9R1%0402
49.9R1%0402
49.9R1%0402
49.9R1%0402
H_COMP4
H_COMP3
H_COMP2
H_COMP1
H_COMP0
VTT_OUT_RIGHT
C80
C80
C0.1u16Y0402
C0.1u16Y0402
VTT_OUT_RIGHT
VTT_OUT_LEFT
C78
C78
X_C0.1u16Y0402
X_C0.1u16Y0402
C86
C86
C0.1u16Y0402
C0.1u16Y0402
VTT_OUT_LEFT
C96
C96
C0.1u16Y0402
C0.1u16Y0402
4
MICRO-STAR INT'L CO.,LTD
MICRO-STAR INT'L CO.,LTD
MICRO-STAR INT'L CO.,LTD
MS-7716
MS-7716
MSI
MSI
MSI
5
4
3
2
Document Description Rev
Document Description Rev
Document Description Rev
Size
Size
Size
Custom
Custom
Custom
Date:
Thursday, September 09, 2010
Date:
Thursday, September 09, 2010
Date:
Thursday, September 09, 2010
MS-7716
LGA775 - Signal
LGA775 - Signal
LGA775 - Signal
1
Sheet of
Sheet of
Sheet of
33
33
33
1.0
1.0
1.0
2
2
2
![](/html/c6/c6ff/c6ff8025bcec294af73631b19fefb7c04a4e8410910c874f6da27db71e61c099/bg4.png)
5
VCCP
AH11
AG9
AG8
AG30
AG29
AG28
AG27
AG26
AG25
AG22
AG21
AG19
AG18
AG15
AG14
AG12
AG11
AF9
AF8
AF22
AF21
CPU1B
AF19
AF18
AF15
AF14
AF12
AF11
AE23
AE22
AE21
AE19
AE18
AE15
AE14
AE12
AE11
AD30
AD29
AD28
AD27
AD26
AD25
AD24
AD23
AC30
AC29
AC28
AC27
AC26
AC25
AC24
AC23
AE9
AD8
AC8
AB8
AA8
VCCP
CPU1B
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCCU8VCCV8VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCCW8VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
Y8
Y30
Y23
Y24
Y25
Y26
Y27
Y28
Y29
W30
W29
W28
W27
W26
W25
W24
W23
U30
D D
C C
VCCP
AH12
VCC
VCC
U29
AH14
VCC
VCC
U28
AH15
VCC
VCC
U27
AH18
VCC
VCC
U26
AH19
VCC
VCC
U25
AH21
VCC
VCC
U24
4
AH22
VCC
U23
AH25
VCC
VCCT8VCC
AH26
VCC
VCC
T30
AH27
VCC
VCC
T29
AH28
VCC
VCC
T28
AH29
VCC
VCC
T27
AH30
VCC
VCC
T26
AH8
T25
VCC
VCC
AH9
T24
VCC
VCC
AJ11
T23
VCC
AJ12
VCC
AJ14
VCC
AJ15
VCC
VCCN8VCCP8VCCR8VCC
AJ18
N30
VCC
VCC
AJ19
N29
VCC
VCC
AJ21
N28
VCC
VCC
AJ22
N27
VCC
VCC
AJ25
N26
VCC
VCC
AJ26
N25
VCC
VCC
3
AJ8
AJ9
AK11
AK12
AK14
AK15
AK18
AK19
AK21
AK22
AK25
AK26
AK8
AK9
AL11
AL12
AL14
AL15
AL18
AL19
AL21
AL22
AL25
AL26
AL29
AL30
AL8
AL9
AM11
AM12
AM14
AM15
AM18
AM19
AM21
AM22
AM25
AM26
AM29
AM30
AM8
AM9
AN11
AN12
AN14
AN15
AN18
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VTT_OUT_RIGHT
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCCJ8VCCJ9VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCCK8VCCL8VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCCM8VCC
VCC
J10
J11
J12
J13
J14
J15
J18
J19
J20
J21
J22
J23
J24
J25
J26
J27
J28
J29
J30
K23
K24
K25
K26
K27
K28
K29
N23
N24
M27
M28
M29
M30
K30
M23
M24
M25
M26
AN9
AN8
AN30
AN29
AN26
AN19
AN21
AN22
VCC
VCC
VCC
VCC
VCCA
VSSA
VCCPLL
VCC-IOPLL
VTTPWRGD
VTT_OUT_LEFT
VTT_SEL
RSVD#F29
VCC
VCC
1122334
AN25
2
H_VCCA
A23
H_VSSA
B23
H_VCCPLL
D23
H_VCCA
C23
A25
VTT
A26
VTT
A27
VTT
A28
VTT
A29
VTT
A30
VTT
B25
VTT
B26
VTT
B27
VTT
B28
VTT
B29
VTT
B30
VTT
C25
VTT
C26
VTT
C27
VTT
C28
VTT
C29
VTT
C30
VTT
D25
VTT
D26
VTT
D27
VTT
D28
VTT
D29
VTT
D30
VTT
VTT_PWG
AM6
VTT_OUT_RIGHT
AA1
VTT_OUT_LEFT
J1
VTT_SEL
F27
F29
ZIF-SOCKET775-RH,ZIF-SOCKET775_TH-1
ZIF-SOCKET775-RH,ZIF-SOCKET775_TH-1
4
C188
C188
V_FSB_VTT
C172
C172
X_C10u10Y0805
X_C10u10Y0805
V_FSB_VTT
C10u10Y0805
C10u10Y0805
CAPS FOR FSB GENERIC
R150R150
VTT_PWG 24
VTT_SEL 24
1
EMI
*GTLREF VOLTAGE SHOULD BE
0.635 * VTT = 0.735V (At VTT=1.2V)
UPI VOLTAGE CONSOLE UPI VOLTAGE CONSOLE
R98
VTT_OUT_RIGHT
B B
R98
57.6R1%0402-RH
57.6R1%0402-RH
C76
C76
X_C10u6.3X51206-RH
X_C10u6.3X51206-RH
6262_GTL0
6262_GTL0 6262_GTL2VTT_OUT_LEFT
R119 10R0402R119 10R0402
C84
C84
R109
R109
C1u16Y
C1u16Y
100R1%0402
100R1%0402
6262_GTL0
0.635 * VTT = 0.7V (At VTT=1.1V)
CPU_GTLREF0 3
C95
C95
C220p50N0402
C220p50N0402
26
DEMO BOARD CHANGE
(GTLREF0+3/GTLREF1+2)
VTT_OUT_RIGHT
R108 49.9R1%0402R108 49.9R1%0402
R97
R97
X_57.6R1%0402-RH
X_57.6R1%0402-RH
R104
R104
100R1%0402
100R1%0402
R118 10R0402R118 10R0402
C83
C83
C1u16Y
C1u16Y
6262_GTL2
C94
C94
C220p50N0402
C220p50N0402
CPU_GTLREF1 3
6262_GTL2 26
VTT_PWRGOOD
A A
VTT_OUT_RIGHT3,5,24,26
VTT_OUT_LEFT3
5
4
3
VTT_OUT_RIGHT
VTT_OUT_LEFT
PLACE AT CPU END OF ROUTE
*PLACE COMPONENTS AS CLOSE AS POSSIBLE TO PROCESSOR SOCKET
*TRACE WIDTH TO CAPS MUST BE NO SMALLER THAN 12MILS
V_FSB_VTT V_1P5_ICH
R85 130R1%0402R85 130R1%0402
R93 62R0402R93 62R0402
R111 62R0402R111 62R0402
R120 X_100R0402R120 X_100R0402
R101 62R0402R101 62R0402
L5 X_10u100mA_0805-RHL5 X_10u100mA_0805-RH
21
CP2
CP2
X_COPPER
X_COPPER
H_PROCHOT#
H_IERR#
H_CPURST#
H_PWRGD
H_BR#0
2
C161
C161
C156
C156
C10u10Y0805
C10u10Y0805
C1u16Y
C1u16Y
H_PROCHOT# 3
H_IERR# 3
H_CPURST# 3,6,26
H_PWRGD 3,10
H_BR#0 3,6
H_VCCA
C164
C164
X_C10u10Y0805
X_C10u10Y0805
H_VSSA
MSI
MSI
MSI
CP5
CP5
H_VCCPLL
X_COPPER
X_COPPER
C198
C198
X_C1u16Y
X_C1u16Y
MICRO-STAR INT'L CO.,LTD
MICRO-STAR INT'L CO.,LTD
MICRO-STAR INT'L CO.,LTD
MS-7716
MS-7716
Size Document Description Rev
Size Document Description Rev
Size Document Description Rev
Custom
Custom
Custom
Date:
Thursday, September 09, 2010
Date:
Thursday, September 09, 2010
Date:
Thursday, September 09, 2010
MS-7716
LGA775 - Power
LGA775 - Power
LGA775 - Power
VTT_PWG SPEC :
High > 0.9V
Low < 0.3V
Trise < 150ns
Sheet of
Sheet of
Sheet of
1
C201
C201
C0.01u25X0402
C0.01u25X0402
432
432
432
C192
C192
C10u10Y0805
C10u10Y0805
1.0
1.0
1.0
![](/html/c6/c6ff/c6ff8025bcec294af73631b19fefb7c04a4e8410910c874f6da27db71e61c099/bg5.png)
5
CPU1C
CPU1C
D D
C C
B B
AA23
AA24
AA25
AA26
AA27
AA28
AA29
AA30
AB23
AB24
AB25
AB26
AB27
AB28
AB29
AB30
AE10
AE13
AE16
AE17
AE20
AE24
AE25
AE26
AE27
AE28
AE29
AE30
AF10
AF13
AF16
AF17
AF20
AF23
AF24
AF25
AF26
AF27
AF28
AF29
AF30
AC3
AC6
AC7
AD4
AD7
AE2
AE5
AE7
AF3
AF6
AF7
A12
A15
A18
A2
A21
A6
A9
AA3
AA6
AA7
AB1
AB7
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSSY7VSSY5VSSY2VSSW7VSSW4VSSV7VSSV6VSS
VSS
AG10
VSS
AG13
VSS
AG16
VSS
AG17
VSS
AG20
VSS
AG23
V30
VSS
AG24
VSSV3VSS
VSS
AG7
V29
AH1
VSS
V28
VSS
VSS
AH10
V27
AH13
VSS
VSS
V26
VSS
VSS
AH16
V25
VSS
VSS
AH17
V24
VSS
VSS
AH20
V23
VSS
VSS
AH23
U7
VSS
VSST7VSST6VSST3VSSR7VSSR5VSS
VSS
VSS
VSS
VSS
AH3
AH6
AH7
AH24
AJ10
VSS
AJ13
VSS
R30
AJ16
VSS
R29
AJ17
VSS
VSS
R28
AJ20
VSS
VSS
R27
AJ23
VSS
VSS
R26
AJ24
VSS
VSS
R25
VSS
VSS
AJ27
R24
VSS
VSS
AJ28
R23
VSS
VSSR2VSSP7VSSP4VSS
VSS
VSS
AJ29
AJ30
4
P30
P29
P28
P27
P26
P25
P24
P23
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSSN7VSSN6VSSN3VSSM7VSSM1VSSL7VSSL6VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
AJ4
AJ7
AK2
AK10
AK13
AK16
AK17
AK20
AK23
AK24
AK27
VSS
AK28
VSS
AK29
VSS
AK30
L30
L29
L28
L27
VSSL3VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
AK5
AK7
AL10
AL13
AL16
AL17
AL20
AL23
L26
AL24
VSS
VSS
L25
AL27
VSS
VSS
L24
AL28
VSS
VSS
K2
L23
K5
VSS
VSSK7VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
AL7
AM1
AM10
AM13
AM16
AM17
AM20
AM23
VSS
AM24
VSS
AM27
VSSH3VSSH6VSSH7VSSH8VSSH9VSSJ4VSSJ7VSS
VSS
AM28
H28
AM4
VSS
VSS
H27
AN1
VSS
VSS
H26
VSS
VSS
AN10
3
H25
VSS
VSS
AN13
H24
VSS
VSS
AN16
H23
VSS
VSS
AN17
H22
AN2
VSS
VSS
H21
VSS
VSS
AN20
H20
VSS
VSS
AN23
H19
VSS
VSS
AN24
H18
VSS
VSS
AN27
H17
VSS
VSS
AN28
H14
VSS
VSSB1VSS
F7
H10
H11
H12
H13
VSS
VSS
VSS
VSS
VSS
Y3
COMP6
AE3
COMP7
B13
AE4
RSVD#AE4
D1
RSVD#D1
D14
RSVD#D14
E5
RSVD#E5
E6
RSVD#E6
E7
RSVD#E7
E23
RSVD#E23
F23
RSVD#F23
AL3
RSVD
J3
RSVD#J3
N4
RSVD#N4
P5
RSVD#P5
AC4
RSVD#AC4
F6
IMPSEL#
V1
MSID1
W1
MSID0
U1
FC28
G1
FC27
E29
FC26
A24
FC23
F4
VSS
F22
VSS
F19
VSS
F16
VSS
F13
VSS
F10
VSS
E8
VSS
E28
VSS
E27
VSS
E26
VSS
E25
VSS
E20
VSS
E2
VSS
E17
VSS
E14
VSS
E11
VSS
D9
VSS
D6
VSS
D5
VSS
D3
VSS
D24
VSS
D21
VSS
D18
VSS
D15
VSS
D12
VSS
C7
VSS
C4
VSS
C24
VSS
C22
VSS
C19
VSS
C16
VSS
C13
VSS
C10
VSS
B8
VSS
B5
VSS
VSS
VSS
ZIF-SOCKET775-RH,ZIF-SOCKET775_TH-1
ZIF-SOCKET775-RH,ZIF-SOCKET775_TH-1
B24
VSS
B11
B14
RSVD/COMP8
VSS
B17
B20
H_COMP7
H_COMP8
T12
T12
T11
T11
T10
T10
T1
R129
R129
R112
R112
R105
R105
T13
T13
R96
R96
R92
R92
R146
R146
R110R110
R126R126
R149
R149
X_TP
X_TP
X_TP
X_TP
X_TP
X_TP
X_TPT1X_TP
X_TP
X_TP
2
R494 0R0402R494 0R0402
R495 X_0R0402R495 X_0R0402
X_49.9R1%0402
X_49.9R1%0402
X_49.9R1%0402
X_49.9R1%0402
24.9R1%0402
24.9R1%0402
51R0402
51R0402
X_51R0402
X_51R0402
X_51R0402
X_51R0402
H_TESTHI12
H_BPM#0
X_1KR0402
X_1KR0402
PSI#_N
PSI#
VTT_OUT_RIGHT
H_TESTHI12
H_BPM#0
Kentsfield
26
26
3
3
1
3,4,24,26
A A
MICRO-STAR INT'L CO.,LTD
MICRO-STAR INT'L CO.,LTD
MICRO-STAR INT'L CO.,LTD
MS-7716
MS-7716
MSI
MSI
MSI
5
4
3
2
Document Description Rev
Document Description Rev
Document Description Rev
Size
Size
Size
Custom
Custom
Custom
Date:
Thursday, September 09, 2010
Date:
Thursday, September 09, 2010
Date:
Thursday, September 09, 2010
MS-7716
LGA775 - GND
LGA775 - GND
LGA775 - GND
1
53
53
53
Sheet of
Sheet of
Sheet of
1.0
1.0
1.0
2
2
2
![](/html/c6/c6ff/c6ff8025bcec294af73631b19fefb7c04a4e8410910c874f6da27db71e61c099/bg6.png)
5
?
?
EAGLELAKE_DDR2
EAGLELAKE_DDR2
NB1A
NB1A
H_A#3
H_A#[3..35]3
D D
H_REQ#[0..4]3
C C
B B
HXSWING SHOULD BE 1/4*VTT
V_FSB_VTT
R166
R166
300R1%0402
300R1%0402
R167
R167
100R1%0402
100R1%0402
A A
H_DBI#[0..3]3
H_RS#[0..2]3
R172
R172
16.5R1%0402-RH
16.5R1%0402-RH
V_FSB_VTT
R169
R169
49.9R1%0402
49.9R1%0402
C196
C196
C0.1u10X0402
C0.1u10X0402
H_ADSTB#03
H_ADSTB#13
H_DSTBP#03
H_DSTBN#03
H_DSTBP#13
H_DSTBN#13
H_DSTBP#23
H_DSTBN#23
H_DSTBP#33
H_DSTBN#33
H_ADS#3
H_TRDY#3
H_DRDY#3
H_DEFER#3
H_HITM#3
H_LOCK#3
H_BR#03,4
H_BNR#3
H_BPRI#3
H_DBSY#3
H_CPURST#3,4,26
HXRCOMP
HXSWING
H_HIT#3
5
H_A#4
H_A#5
H_A#6
H_A#7
H_A#8
H_A#9
H_A#10
H_A#11
H_A#12
H_A#13
H_A#14
H_A#15
H_A#16
H_A#17
H_A#18
H_A#19
H_A#20
H_A#21
H_A#22
H_A#23
H_A#24
H_A#25
H_A#26
H_A#27
H_A#28
H_A#29
H_A#30
H_A#31
H_A#32
H_A#33
H_A#34
H_A#35
H_REQ#0
H_REQ#1
H_REQ#2
H_REQ#3
H_REQ#4
H_DBI#0
H_DBI#1
H_DBI#2
H_DBI#3
H_RS#0
H_RS#1
H_RS#2
L36
FSB_AB_3
L37
FSB_AB_4
J38
FSB_AB_5
F40
FSB_AB_6
H39
FSB_AB_7
L38
FSB_AB_8
L43
FSB_AB_9
N39
FSB_AB_10
N35
FSB_AB_11
N37
FSB_AB_12
J41
FSB_AB_13
N40
FSB_AB_14
M45
FSB_AB_15
R35
FSB_AB_16
T36
FSB_AB_17
R36
FSB_AB_18
R34
FSB_AB_19
R37
FSB_AB_20
R39
FSB_AB_21
U38
FSB_AB_22
T37
FSB_AB_23
U34
FSB_AB_24
U40
FSB_AB_25
T34
FSB_AB_26
Y36
FSB_AB_27
U35
FSB_AB_28
AA35
FSB_AB_29
U37
FSB_AB_30
Y37
FSB_AB_31
Y34
FSB_AB_32
Y38
FSB_AB_33
AA37
FSB_AB_34
AA36
FSB_AB_35
G38
FSB_REQB_0
K35
FSB_REQB_1
J39
FSB_REQB_2
C43
FSB_REQB_3
G39
FSB_REQB_4
J40
FSB_ADSTBB_0
T39
FSB_ADSTBB_1
C39
FSB_DSTBPB_0
B39
FSB_DSTBNB_0
K31
FSB_DSTBPB_1
J31
FSB_DSTBNB_1
J25
FSB_DSTBPB_2
K25
FSB_DSTBNB_2
C32
FSB_DSTBPB_3
D32
FSB_DSTBNB_3
B40
FSB_DINVB_0
F33
FSB_DINVB_1
F26
FSB_DINVB_2
D30
FSB_DINVB_3
J42
FSB_ADSB
L40
FSB_TRDYB
J43
FSB_DRDYB
G44
FSB_DEFERB
K44
FSB_HITMB
H45
FSB_HITB
H40
FSB_LOCKB
L42
FSB_BREQ0B
J44
FSB_BNRB
H37
FSB_BPRIB
H42
FSB_DBSYB
G43
FSB_RSB_0
L44
FSB_RSB_1
G42
FSB_RSB_2
D27
FSB_CPURSTB
N25
RSVD_05
ELK_CRB
ELK_CRB
*GTLREF VOLTAGE SHOULD BE
0.67*VTT=0.8V (At VTT=1.2V)
V_FSB_VTT
SYM_REV = 1.5
SYM_REV = 1.5
FSB
FSB
1 OF 7
1 OF 7
UPI VOLTAGE CONSOLE
CPU_MCH_GTLREF
R165
R165
57.6R1%0402-RH
57.6R1%0402-RH
R171
R171
MCH_GTLREF
49.9R1%0402
49.9R1%0402
C203
C203
C202
R164
R164
100R1%0402
100R1%0402
C202
C1u16Y
C1u16Y
C220p50N0402
C220p50N0402
PIN H L Description
EXP_SLR
EXP_EN
MCH_TCEN
FSB_DB_0
FSB_DB_1
FSB_DB_2
FSB_DB_3
FSB_DB_4
FSB_DB_5
FSB_DB_6
FSB_DB_7
FSB_DB_8
FSB_DB_9
FSB_DB_10
FSB_DB_11
FSB_DB_12
FSB_DB_13
FSB_DB_14
FSB_DB_15
FSB_DB_16
FSB_DB_17
FSB_DB_18
FSB_DB_19
FSB_DB_20
FSB_DB_21
FSB_DB_22
FSB_DB_23
FSB_DB_24
FSB_DB_25
FSB_DB_26
FSB_DB_27
FSB_DB_28
FSB_DB_29
FSB_DB_30
FSB_DB_31
FSB_DB_32
FSB_DB_33
FSB_DB_34
FSB_DB_35
FSB_DB_36
FSB_DB_37
FSB_DB_38
FSB_DB_39
FSB_DB_40
FSB_DB_41
FSB_DB_42
FSB_DB_43
FSB_DB_44
FSB_DB_45
FSB_DB_46
FSB_DB_47
FSB_DB_48
FSB_DB_49
FSB_DB_50
FSB_DB_51
FSB_DB_52
FSB_DB_53
FSB_DB_54
FSB_DB_55
FSB_DB_56
FSB_DB_57
FSB_DB_58
FSB_DB_59
FSB_DB_60
FSB_DB_61
FSB_DB_62
FSB_DB_63
FSB_SWING
FSB_RCOMP
FSB_DVREF
FSB_ACCVREF
HPL_CLKINP
HPL_CLKINN
CPU_MCH_GTLREF
Normal
Concurrent
Enable
?
?
H_D#0
F44
H_D#1
C44
H_D#2
D44
H_D#3
C41
H_D#4
E43
H_D#5
B43
H_D#6
D40
H_D#7
B42
H_D#8
B38
H_D#9
F38
H_D#10
A38
H_D#11
B37
H_D#12
D38
H_D#13
C37
H_D#14
D37
H_D#15
B36
H_D#16
E37
H_D#17
J35
H_D#18
H35
H_D#19
F37
H_D#20
G37
H_D#21
J33
H_D#22
L33
H_D#23
G33
H_D#24
L31
H_D#25
M31
H_D#26
M30
H_D#27
J30
H_D#28
G31
H_D#29
K30
H_D#30
M29
H_D#31
G30
H_D#32
J29
H_D#33
F29
H_D#34
H29
H_D#35
L25
H_D#36
K26
H_D#37
L29
H_D#38
J26
H_D#39
M26
H_D#40
H26
H_D#41
F25
H_D#42
F24
H_D#43
G25
H_D#44
H24
H_D#45
L24
H_D#46
J24
H_D#47
N24
H_D#48
C28
H_D#49
B31
H_D#50
F35
H_D#51
C35
H_D#52
B35
H_D#53
D35
H_D#54
D31
H_D#55
A34
H_D#56
B32
H_D#57
F31
H_D#58
D28
H_D#59
A29
H_D#60
C30
H_D#61
B30
H_D#62
E27
H_D#63
B28
HXSWING
B24
HXRCOMP
A23
MCH_GTLREF
C22
B23
CK_H_MCH_DP
P29
CK_H_MCH_DN
P30
3
Reverse
Non-concurrent
Disable
4
CK_H_MCH_DP
CK_H_MCH_DN
CL_VREF_MCH = 0.349V
Close to GMCH
V_1P1_CORE
R236
R236
1KR1%0402
1KR1%0402
R233
R233
464R1%0402
464R1%0402
PCI_E Lane Reversal
PCI_E/SDVO co-existence
TLS confidentiality
4
H_D#[0..63]
3
EXP16_PRSNT#20
15
15
CL_VREF_MCH
C258
C258
C0.1u16Y0402
C0.1u16Y0402
3
EXP_A_RXP_020
EXP_A_RXN_020
EXP_A_RXP_120
EXP_A_RXN_120
EXP_A_RXP_220
EXP_A_RXN_220
EXP_A_RXP_320
EXP_A_RXN_320
EXP_A_RXP_420
EXP_A_RXN_420
EXP_A_RXP_520
EXP_A_RXN_520
EXP_A_RXP_620
EXP_A_RXN_620
EXP_A_RXP_720
EXP_A_RXN_720
EXP_A_RXP_820
EXP_A_RXN_820
EXP_A_RXP_920
EXP_A_RXN_920
EXP_A_RXP_1020
EXP_A_RXN_1020
EXP_A_RXP_1120
EXP_A_RXN_1120
EXP_A_RXP_1220
EXP_A_RXN_1220
EXP_A_RXP_1320
EXP_A_RXN_1320
EXP_A_RXP_1420
EXP_A_RXN_1420
EXP_A_RXP_1520
EXP_A_RXN_1520
DMI_ITP_MRP_011
DMI_ITN_MRN_011
DMI_ITP_MRP_111
DMI_ITN_MRN_111
DMI_ITP_MRP_211
DMI_ITN_MRN_211
DMI_ITP_MRP_311
DMI_ITN_MRN_311
CK_MCH_DP15
CK_MCH_DN15
SDVO_CTRL_DATA20
SDVO_CTRL_CLK20
V_FSB_VTT
135
RN31
RN31
8P4R-470R0402
8P4R-470R0402
MCH_BSEL016
MCH_BSEL116
MCH_BSEL216
EXP16_PRSNT# EXP_EN
T14X_TP T14X_TP
ITPM_ENB
Itegrated TPM Enable:
0=Enable iTPM
1=Disable iTPM
DualX8_Enable
0=2X8 PCIe Ports Enable
1=1X16 PCIe Port Enable
Primary _PEG_Presence
Primary PCIe port Detect:
0=PCIe Card is in Primary Slot
1=PCIe Card is not in Primary Slot
246
R193
R193
R200
R200
R189R189
R176
R176
R180
R180
CLINK_DATA10
CLINK_CLK10
CLINK_RST10
CLINK_PWOK10
CHIP_PWGD
7
1
8
3
5
7
X_1KR1%0402
X_1KR1%0402
X_1KR0402
X_1KR0402
X_1KR0402
X_1KR0402
X_1KR0402
X_1KR0402
CK_MCH_DP
CK_MCH_DN
SDVO_CTRL_DATA
SDVO_CTRL_CLK
RN32
RN32
8P4R-10KR0402
8P4R-10KR0402
2
4
6
8
T15X_TP T15X_TP
T16X_TP T16X_TP
EXP_SLR
MCH_RFU_G15
MCH_TCEN
T19X_TP T19X_TP
T18X_TP T18X_TP
T20X_TP T20X_TP
T17X_TP T17X_TP
CLINK_DATA
CLINK_CLK
CL_VREF_MCH
CLINK_RST
CLINK_PWOK
3
EXP_A_RXP_0
EXP_A_RXN_0
EXP_A_RXP_1
EXP_A_RXN_1
EXP_A_RXP_2
EXP_A_RXN_2
EXP_A_RXP_3
EXP_A_RXN_3
EXP_A_RXP_4
EXP_A_RXN_4
EXP_A_RXP_5
EXP_A_RXN_5
EXP_A_RXP_6
EXP_A_RXN_6
EXP_A_RXP_7
EXP_A_RXN_7
EXP_A_RXP_8
EXP_A_RXN_8
EXP_A_RXP_9
EXP_A_RXN_9
EXP_A_RXP_10
EXP_A_RXN_10
EXP_A_RXP_11
EXP_A_RXN_11
EXP_A_RXP_12
EXP_A_RXN_12
EXP_A_RXP_13
EXP_A_RXN_13
EXP_A_RXP_14
EXP_A_RXN_14
EXP_A_RXP_15
EXP_A_RXN_15
DMI_ITP_MRP_0
DMI_ITN_MRN_0
DMI_ITP_MRP_1
DMI_ITN_MRN_1
DMI_ITP_MRP_2
DMI_ITN_MRN_2
DMI_ITP_MRP_3
DMI_ITN_MRN_3
MCH_BS0
F17
MCH_BS1
G16
MCH_BS2
P15
M20
N17
K16
F15
G15
H17
L17
M17
J17
G20
J16
M16
J15
J20
F20
AY4
AY2
AN13
AW2
AN8
R217R217
AR7
AN10
AN11
AN9
AN17
B45
AW44
AN16
AD42
W30
U32
R42
BE44
BE2
BD45
BD1
A44
AK15
B14
F6
G7
H6
G4
J6
J7
L6
L7
N9
N10
N7
N6
R7
R6
R9
R10
U10
U9
U6
U7
AA9
AA10
R4
P4
AA7
AA6
AB10
AB9
AB3
AA2
AD10
AD11
AD7
AD8
AE9
AE10
AE6
AE7
AF9
AF8
D9
E9
J13
G13
AB13
AD13
ELK_CRB
ELK_CRB
NB1E
NB1E
BSEL0
BSEL1
BSEL2
ALLZTEST
XORTEST
RSVD_36
EXP_SLR
RSVD_17
EXP_SM
ITPM_ENB
RSVD_10
CEN
BSCANTEST
RSVD_12
RSVD_13
RSVD_14
RSVD_15
DUALX8_ENABLE
CL_DATA
CL_CLK
CL_VREF
CL_RSTB
CL_PWROK
JTAG_TDI
JTAG_TDO
JTAG_TCK
JTAG_TMS
NC_01
NC_02
NC_03
NC_04
NC_05
NC_06
NC_07
NC_08
NC_09
NC_10
NC_11
NC_12
NC_13
NC_18
NC_19
ELK_CRB
ELK_CRB
EAGLELAKE_DDR2
EAGLELAKE_DDR2
NB1B
NB1B
PEG_RXP_0
PEG_RXN_0
PEG_RXP_1
PEG_RXN_1
PEG_RXP_2
PEG_RXN_2
PEG_RXP_3
PEG_RXN_3
PEG_RXP_4
PEG_RXN_4
PEG_RXP_5
PEG_RXN_5
PEG_RXP_6
PEG_RXN_6
PEG_RXP_7
PEG_RXN_7
PEG_RXP_8
PEG_RXN_8
PEG_RXP_9
PEG_RXN_9
PEG_RXP_10
PEG_RXN_10
PEG_RXP_11
PEG_RXN_11
PEG_RXP_12
PEG_RXN_12
PEG_RXP_13
PEG_RXN_13
PEG_RXP_14
PEG_RXN_14
PEG_RXP_15
PEG_RXN_15
DMI_RXP_0
DMI_RXN_0
DMI_RXP_1
DMI_RXN_1
DMI_RXP_2
DMI_RXN_2
DMI_RXP_3
DMI_RXN_3
EXP_CLKP
EXP_CLKN
SDVO_CTRLDATA
SDVO_CTRLCLK
RSVD_23
RSVD_22
EAGLELAKE_DDR2
EAGLELAKE_DDR2
SYM_REV = 1.5
SYM_REV = 1.5
5 OF 7
5 OF 7
SYM_REV = 1.5
SYM_REV = 1.5
?
?
VGA
VGA
MISC
MISC
?
?
PCIE
PCIE
DMI
DMI
2 OF 7
2 OF 7
CRT_HSYNC
CRT_VSYNC
CRT_RED
CRT_GREEN
CRT_BLUE
CRT_IRTN
CRT_DDC_DATA
CRT_DDC_CLK
DAC_IREF
DPL_REFCLKINP
DPL_REFCLKINN
DPL_REFSSCLKINP
DPL_REFSSCLKINN
ICH_SYNCB
HDA_BCLK
HDA_RSTB
HDA_SDI
HDA_SDO
HDA_SYNC
DDPC_CTRLCLK
DDPC_CTRLDATA
DPRSTPB
RSVD_18
RSVD_19
RSVD_20
RSVD_21
RSVD_25
RSVD_26
RSVD_27
RSVD_28
RSVD_29
RSVD_30
RSVD_31
RSVD_32
RSVD_33
RSVD_34
RSVD_35
PEG_TXP_0
PEG_TXN_0
PEG_TXP_1
PEG_TXN_1
PEG_TXP_2
PEG_TXN_2
PEG_TXP_3
PEG_TXN_3
PEG_TXP_4
PEG_TXN_4
PEG_TXP_5
PEG_TXN_5
PEG_TXP_6
PEG_TXN_6
PEG_TXP_7
PEG_TXN_7
PEG_TXP_8
PEG_TXN_8
PEG_TXP_9
PEG_TXN_9
PEG_TXP_10
PEG_TXN_10
PEG_TXP_11
PEG_TXN_11
PEG_TXP_12
PEG_TXN_12
PEG_TXP_13
PEG_TXN_13
PEG_TXP_14
PEG_TXN_14
PEG_TXP_15
PEG_TXN_15
DMI_TXP_0
DMI_TXN_0
DMI_TXP_1
DMI_TXN_1
DMI_TXP_2
DMI_TXN_2
DMI_TXP_3
DMI_TXN_3
EXP_RCOMPO
EXP_COMPI
EXP_ICOMPO
EXP_RBIAS
RSTINB
PWROK
SLPB
?
?
2
C11
B11
A10
B9
C9
D8
B8
C7
B7
B6
B3
B4
D2
C2
H2
G2
J2
K2
K1
L2
P2
M2
T2
R1
U2
V2
W4
V3
AA4
Y4
AC1
AB2
AC2
AD2
AD4
AE4
AE2
AF2
AF4
AG4
Y7
Y8
Y6
AG1
HSYNC
D14
VSYNC
C14
B18
D18
C18
F13
MCH_DDC_DATA
L15
MCH_DDC_CLK
M15
DACREFSET
B15
CK_DOT96_MCH_DP
E15
CK_DOT96_MCH_DN
D15
CK_SS_MCH_DP
G8
CK_SS_MCH_DN
G9
AN6
CHIP_PWGD
AR4
K15
MCH_AZA_BCLK
AU4
MCH_AZA_RSTB
AV4
MCH_AZA_SDI
AU2
MCH_AZA_SDO
AV1
MCH_AZA_SYNC
AU3
J11
F11
P43
R121R121
P42
A45
B2
BE1
BE45
R15
R14
T15
T14
AB15
R32
R31
U31
U30
L11
L13
2
EXP_A_TXP_0
EXP_A_TXN_0
EXP_A_TXP_1
EXP_A_TXN_1
EXP_A_TXP_2
EXP_A_TXN_2
EXP_A_TXP_3
EXP_A_TXN_3
EXP_A_TXP_4
EXP_A_TXN_4
EXP_A_TXP_5
EXP_A_TXN_5
EXP_A_TXP_6
EXP_A_TXN_6
EXP_A_TXP_7
EXP_A_TXN_7
EXP_A_TXP_8
EXP_A_TXN_8
EXP_A_TXP_9
EXP_A_TXN_9
EXP_A_TXP_10
EXP_A_TXN_10
EXP_A_TXP_11
EXP_A_TXN_11
EXP_A_TXP_12
EXP_A_TXN_12
EXP_A_TXP_13
EXP_A_TXN_13
EXP_A_TXP_14
EXP_A_TXN_14
EXP_A_TXP_15
EXP_A_TXN_15
DMI_MTP_IRP_0
DMI_MTN_IRN_0
DMI_MTP_IRP_1
DMI_MTN_IRN_1
DMI_MTP_IRP_2
DMI_MTN_IRN_2
DMI_MTP_IRP_3
DMI_MTN_IRN_3
GRCOMP
R209 49.9R1%0402R209 49.9R1%0402
EXP_RBIAS
R229
R229
R231
R231
DEMO BOARD CHANGE
R202
R202
0R0402
0R0402
0R0402
0R0402
R199
R199
VCC3 VCC3
2.2KR0402
2.2KR0402
R130
R130
R188
R188
0R0402
0R0402
PLTRST#
CHIP_PWGD
ICH_SYNC#
H_COMP5_R
PM_SLP_N
R201
R201
X_10KR0402
X_10KR0402
EXP_A_TXP_0
EXP_A_TXN_0
EXP_A_TXP_1
EXP_A_TXN_1
EXP_A_TXP_2
EXP_A_TXN_2
EXP_A_TXP_3
EXP_A_TXN_3
EXP_A_TXP_4
EXP_A_TXN_4
EXP_A_TXP_5
EXP_A_TXN_5
EXP_A_TXP_6
EXP_A_TXN_6
EXP_A_TXP_7
EXP_A_TXN_7
EXP_A_TXP_8 20
EXP_A_TXN_8
EXP_A_TXP_9
EXP_A_TXN_9
EXP_A_TXP_10
EXP_A_TXN_10
EXP_A_TXP_11
EXP_A_TXN_11
EXP_A_TXP_12
EXP_A_TXN_12
EXP_A_TXP_13
EXP_A_TXN_13
EXP_A_TXP_14
EXP_A_TXN_14
EXP_A_TXP_15
EXP_A_TXN_15
DMI_MTP_IRP_0
DMI_MTN_IRN_0
DMI_MTP_IRP_1
DMI_MTN_IRN_1
DMI_MTP_IRP_2
DMI_MTN_IRN_2
DMI_MTP_IRP_3
DMI_MTN_IRN_3
X_750R1%0402
X_750R1%0402
750R1%0402
750R1%0402
2.2KR0402
2.2KR0402
R131
R131
R218R218
R220R220
R219R219
R227R227
R226R226
H_COMP5_R 3,10
PM_SLP_N
VCC3
20
20
20
20
20
20
20
20
20
20
20
20
20
20
20
20
20
20
20
20
20
20
20
20
20
20
20
20
20
20
20
V_1P1_CORE
V_1P1_CORE
SMBDATA10,13,15,20,24,26
CPU_MCH_GTLREF
10,16
10,24
10
11
11
11
11
11
11
11
OverVoltage
11
VCC5
CK_DOT96_MCH_DP
CK_DOT96_MCH_DN
CK_SS_MCH_DP
CK_SS_MCH_DN
3
MSI
MSI
MSI
1
JNB
JNB
OPT
OPT
X_JNB
X_JNB
0x62:RH=5.1K,RL=15K
VCC5
R516
R516
X_10R1%0402
X_10R1%0402
C351
C351
X_C0.1u16Y0402
X_C0.1u16Y0402
1
U6
U6
3
GND
4
SDA
8
OUT1
R515
R515
X_10KR1%0402
X_10KR1%0402
Size
Size
Size
Custom
Custom
Custom
7
C
OUT2
VC
6
OUT3
S_SEL
5
SCL
BU
2
X_UP6262BMA8_SOT23-8-RH
X_UP6262BMA8_SOT23-8-RH
R514
R514
X_8.2KR1%0402
X_8.2KR1%0402
V_1P1_CORE
R198 10KR0402R198 10KR0402
R194
R194
10KR0402
10KR0402
V_1P1_CORE
10KR0402
10KR0402
R243
R243
10KR0402
10KR0402
R238
R238
MICRO-STAR INT'L CO.,LTD
MICRO-STAR INT'L CO.,LTD
MICRO-STAR INT'L CO.,LTD
MS-7716
MS-7716
MS-7716
Document Description Rev
Document Description Rev
Document Description Rev
Intel Eaglelake - FSB, PCIE, DMI, VGA, MSIC
Intel Eaglelake - FSB, PCIE, DMI, VGA, MSIC
Intel Eaglelake - FSB, PCIE, DMI, VGA, MSIC
Thursday, September 09, 2010
Thursday, September 09, 2010
Thursday, September 09, 2010
1
SMBCLK
10,13,15,20,24,26
Sheet ofDate:
632
Sheet ofDate:
632
Sheet ofDate:
632
1.0
1.0
1.0
![](/html/c6/c6ff/c6ff8025bcec294af73631b19fefb7c04a4e8410910c874f6da27db71e61c099/bg7.png)
5
EAGLELAKE_DDR2
EAGLELAKE_DDR2
NB1C
TP_MAA_A0
TP_WE_A#
CAS_A#
RAS_A#
SBS_A0
SBS_A1
SBS_A2
SCS_A#0
SCKE_A0
SCKE_A1
ODT_A0
ODT_A1
P_DDR0_A
N_DDR0_A
TP_P_DDR1_A
TP_N_DDR1_A
P_DDR2_A
N_DDR2_A
TP_P_DDR4_A
TP_N_DDR4_A
DDR3_RST#13,14
DDR3_SCS_A#113
DDR3_MAA_A013
DDR3_WE_A#13
T24T24
MAA_A1
MAA_A2
MAA_A3
MAA_A4
MAA_A5
MAA_A6
MAA_A7
MAA_A8
MAA_A9
MAA_A10
MAA_A11
MAA_A12
MAA_A13
MAA_A14
DDR3_RST#
DDR3_PWROK
DDR3_SCS_A#1
R228X_0R0402 R228X_0R0402
DDR3_MAA_A0
DDR3_WE_A#
C217
C217
CAS_A#13
RAS_A#13
SBS_A013
SBS_A113
SBS_A213
SCS_A#013
T26T26
SCKE_A013
SCKE_A113
ODT_A013
ODT_A113
P_DDR0_A13
N_DDR0_A13
T29T29
T30T30
P_DDR2_A13
N_DDR2_A13
T27T27
T28T28
VCC_DDR
MAA_A[1..14]
T25T25
R204
R204
10KR0402
10KR0402
TP_SCS_A#1
MAA_A[1..14]13
D D
C C
DRAMPWROK10
C1u6.3X50402-1
C1u6.3X50402-1
B B
DDR3 PWROK
A A
R518
R518
SLP_S4#10,15,16,24,25
5
1KR0402
1KR0402
DDR3_PWROK_BSLP_S4#
B
BC41
BC35
BB32
BC32
BD32
BB31
AY31
BA31
BD31
BD30
AW43
BC30
BB30
AM42
BD28
AW42
AU42
AV42
AV45
AY44
BC28
AU43
AR40
AU44
AM43
BB27
BD27
BA27
AY26
AR42
AM44
AR44
AL40
AY37
BA37
AW29
AY29
AU37
AV37
AU33
AT33
AT30
AR30
AW38
AY38
BC24
AR6
AR43
BB40
AT44
AV40
5VSB
R519
R519
1KR0402
1KR0402
CE
Q55
Q55
N-SST3904_SOT23
N-SST3904_SOT23
NB1C
DDR_A_MA_0
DDR_A_MA_1
DDR_A_MA_2
DDR_A_MA_3
DDR_A_MA_4
DDR_A_MA_5
DDR_A_MA_6
DDR_A_MA_7
DDR_A_MA_8
DDR_A_MA_9
DDR_A_MA_10
DDR_A_MA_11
DDR_A_MA_12
DDR_A_MA_13
DDR_A_MA_14
DDR_A_WEB
DDR_A_CASB
DDR_A_RASB
DDR_A_BS_0
DDR_A_BS_1
DDR_A_BS_2
DDR_A_CSB_0
DDR_A_CSB_1
DDR_A_CSB_2
DDR_A_CSB_3
DDR_A_CKE_0
DDR_A_CKE_1
DDR_A_CKE_2
DDR_A_CKE_3
DDR_A_ODT_0
DDR_A_ODT_1
DDR_A_ODT_2
DDR_A_ODT_3
DDR_A_CK_0
DDR_A_CKB_0
DDR_A_CK_1
DDR_A_CKB_1
DDR_A_CK_2
DDR_A_CKB_2
DDR_A_CK_3
DDR_A_CKB_3
DDR_A_CK_4
DDR_A_CKB_4
DDR_A_CK_5
DDR_A_CKB_5
DDR3_DRAMRSTB
DDR3_DRAM_PWROK
DDR3_A_CSB1
DDR3_A_MA0
DDR3_A_WEB
DDR3_B_ODT3
DDR_A
DDR_A
ELK_CRB
ELK_CRB
VCC_DDR
B
SYM_REV = 1.5
SYM_REV = 1.5
3 OF 7
3 OF 7
R239
R239
10KR0402
10KR0402
CE
Q56
Q56
N-SST3904_SOT23
N-SST3904_SOT23
?
?
4
DDR_A_DQS_0
DDR_A_DQSB_0
DDR_A_DQS_1
DDR_A_DQSB_1
DDR_A_DQS_2
DDR_A_DQSB_2
DDR_A_DQS_3
DDR_A_DQSB_3
DDR_A_DQS_4
DDR_A_DQSB_4
DDR_A_DQS_5
DDR_A_DQSB_5
DDR_A_DQS_6
DDR_A_DQSB_6
DDR_A_DQS_7
DDR_A_DQSB_7
DDR_A_DM_0
DDR_A_DM_1
DDR_A_DM_2
DDR_A_DM_3
DDR_A_DM_4
DDR_A_DM_5
DDR_A_DM_6
DDR_A_DM_7
DDR_A_DQ_0
DDR_A_DQ_1
DDR_A_DQ_2
DDR_A_DQ_3
DDR_A_DQ_4
DDR_A_DQ_5
DDR_A_DQ_6
DDR_A_DQ_7
DDR_A_DQ_8
DDR_A_DQ_9
DDR_A_DQ_10
DDR_A_DQ_11
DDR_A_DQ_12
DDR_A_DQ_13
DDR_A_DQ_14
DDR_A_DQ_15
DDR_A_DQ_16
DDR_A_DQ_17
DDR_A_DQ_18
DDR_A_DQ_19
DDR_A_DQ_20
DDR_A_DQ_21
DDR_A_DQ_22
DDR_A_DQ_23
DDR_A_DQ_24
DDR_A_DQ_25
DDR_A_DQ_26
DDR_A_DQ_27
DDR_A_DQ_28
DDR_A_DQ_29
DDR_A_DQ_30
DDR_A_DQ_31
DDR_A_DQ_32
DDR_A_DQ_33
DDR_A_DQ_34
DDR_A_DQ_35
DDR_A_DQ_36
DDR_A_DQ_37
DDR_A_DQ_38
DDR_A_DQ_39
DDR_A_DQ_40
DDR_A_DQ_41
DDR_A_DQ_42
DDR_A_DQ_43
DDR_A_DQ_44
DDR_A_DQ_45
DDR_A_DQ_46
DDR_A_DQ_47
DDR_A_DQ_48
DDR_A_DQ_49
DDR_A_DQ_50
DDR_A_DQ_51
DDR_A_DQ_52
DDR_A_DQ_53
DDR_A_DQ_54
DDR_A_DQ_55
DDR_A_DQ_56
DDR_A_DQ_57
DDR_A_DQ_58
DDR_A_DQ_59
DDR_A_DQ_60
DDR_A_DQ_61
DDR_A_DQ_62
DDR_A_DQ_63
DDR3_PWROKDDR3_PWROK#
C426
C426
C1u16Y
C1u16Y
4
BC5
BD4
BB9
BC9
BD15
BB15
AR22
AT22
AH43
AH42
AD43
AE42
Y43
Y42
T44
T43
BC3
BD9
BD14
AV22
AK42
AE45
AA45
T42
BC2
BD3
BD7
BB7
BB2
BA3
BE6
BD6
BB8
AY8
BD11
BB11
BC7
BE8
BD10
AY11
BB14
BC14
BC16
BB16
BC11
BE12
BA15
BD16
AW21
AY22
?
?
AV24
AY24
AU21
AT21
AR24
AU24
AL41
AK43
AG42
AG44
AL42
AK44
AH44
AG41
AF43
AF42
AC44
AC42
AF40
AF44
AD44
AC41
AB43
AA42
W42
W41
AB42
AB44
Y44
Y40
V42
U45
R40
P44
V44
V43
R41
R44
DQS_A0
DQS_A#0
DQS_A1
DQS_A#1
DQS_A2
DQS_A#2
DQS_A3
DQS_A#3
DQS_A4
DQS_A#4
DQS_A5
DQS_A#5
DQS_A6
DQS_A#6
DQS_A7
DQS_A#7
DQM_A0
DQM_A1
DQM_A2
DQM_A3
DQM_A4
DQM_A5
DQM_A6
DQM_A7
DATA_A0
DATA_A1
DATA_A2
DATA_A3
DATA_A4
DATA_A5
DATA_A6
DATA_A7
DATA_A8
DATA_A9
DATA_A10
DATA_A11
DATA_A12
DATA_A13
DATA_A14
DATA_A15
DATA_A16
DATA_A17
DATA_A18
DATA_A19
DATA_A20
DATA_A21
DATA_A22
DATA_A23
DATA_A24
DATA_A25
DATA_A26
DATA_A27
DATA_A28
DATA_A29
DATA_A30
DATA_A31
DATA_A32
DATA_A33
DATA_A34
DATA_A35
DATA_A36
DATA_A37
DATA_A38
DATA_A39
DATA_A40
DATA_A41
DATA_A42
DATA_A43
DATA_A44
DATA_A45
DATA_A46
DATA_A47
DATA_A48
DATA_A49
DATA_A50
DATA_A51
DATA_A52
DATA_A53
DATA_A54
DATA_A55
DATA_A56
DATA_A57
DATA_A58
DATA_A59
DATA_A60
DATA_A61
DATA_A62
DATA_A63
DQS_A0
DQS_A#0
DQS_A1
DQS_A#1
DQS_A2
DQS_A#2
DQS_A3
DQS_A#3
DQS_A4
DQS_A#4
DQS_A5
DQS_A#5
DQS_A6
DQS_A#6
DQS_A7
DQS_A#7
DQM_A[0..7]
DATA_A[0..63]
13
13
13
13
13
13
13
13
13
13
13
13
13
13
13
13
3
DQM_A[0..7]
DATA_A[0..63]
VCC_DDR
C136
C136
3
MAA_B[0..14]14
13
13
VCC_DDR
R155 80.6R1%0402R155 80.6R1%0402
R158 80.6R1%0402R158 80.6R1%0402
R160 249R1%0402R160 249R1%0402
R159 80.6R1%0402R159 80.6R1%0402
0402
0402
C0.1u16Y
C0.1u16Y
R156
R156
1KR1%0402
1KR1%0402
R157
R157
1KR1%0402
1KR1%0402
C139
C139
50402-1
50402-1
C1u6.3X
C1u6.3X
WE_B#14
CAS_B#14
RAS_B#14
SBS_B014
SBS_B114
SBS_B214
SCS_B#014
SCS_B#114
SCKE_B014
SCKE_B114
ODT_B014
ODT_B114
P_DDR0_B14
N_DDR0_B14
P_DDR2_B14
N_DDR2_B14
MAA_B[0..14]
T32T32
T33T33
T34T34
T35T35
WE_B#
CAS_B#
RAS_B#
SBS_B0
SBS_B1
SBS_B2
SCS_B#0
SCS_B#1
SCKE_B0
SCKE_B1
ODT_B0
ODT_B1
P_DDR0_B
N_DDR0_B
TP_P_DDR1_B
TP_N_DDR1_B
P_DDR2_B
N_DDR2_B
TP_P_DDR5_B
TP_N_DDR5_B
C178
C178
C0.1u16Y0402
C0.1u16Y0402
MAA_B0
MAA_B1
MAA_B2
MAA_B3
MAA_B4
MAA_B5
MAA_B6
MAA_B7
MAA_B8
MAA_B9
MAA_B10
MAA_B11
MAA_B12
MAA_B13
MAA_B14
MCH_VREF_A
SRCOMP0
SRCOMP1
SRCOMP2
SRCOMP3
BD24
BB23
BB24
BD23
BB22
BD22
BC22
BC20
BB20
BD20
BC26
BD19
BB19
BE38
BA19
BD36
BC37
BD35
BD26
BB26
BD18
BB35
BD39
BB37
BD40
BC18
AY20
BE17
BB18
BD37
BC39
BB38
BD42
AY33
AW33
AV31
AW31
AW35
AY35
AT31
AU31
AP31
AP30
AW37
AV35
BB44
AY42
BA43
BC43
BC44
AN29
AN30
AJ33
AK33
2
NB1D
NB1D
DDR_B_MA_0
DDR_B_MA_1
DDR_B_MA_2
DDR_B_MA_3
DDR_B_MA_4
DDR_B_MA_5
DDR_B_MA_6
DDR_B_MA_7
DDR_B_MA_8
DDR_B_MA_9
DDR_B_MA_10
DDR_B_MA_11
DDR_B_MA_12
DDR_B_MA_13
DDR_B_MA_14
DDR_B_WEB
DDR_B_CASB
DDR_B_RASB
DDR_B_BS_0
DDR_B_BS_1
DDR_B_BS_2
DDR_B_CSB_0
DDR_B_CSB_1
DDR_B_CSB_2
DDR_B_CSB_3
DDR_B_CKE_0
DDR_B_CKE_1
DDR_B_CKE_2
DDR_B_CKE_3
DDR_B_ODT_0
DDR_B_ODT_1
DDR_B_ODT_2
DDR_B_ODT_3
DDR_B_CK_0
DDR_B_CKB_0
DDR_B_CK_1
DDR_B_CKB_1
DDR_B_CK_2
DDR_B_CKB_2
DDR_B_CK_3
DDR_B_CKB_3
DDR_B_CK_4
DDR_B_CKB_4
DDR_B_CK_5
DDR_B_CKB_5
DDR_VREF
DDR_RPD
DDR_RPU
DDR_SPD
DDR_SPU
RSVD_01
RSVD_02
RSVD_03
RSVD_04
ELK_CRB
ELK_CRB
2
EAGLELAKE_DDR2
EAGLELAKE_DDR2
SYM_REV = 1.5
SYM_REV = 1.5
4 OF 7
4 OF 7
DDR_B
DDR_B
<$LOCATION>
<$LOCATION>
DDR_B_DQS_0
DDR_B_DQSB_0
DDR_B_DQS_1
DDR_B_DQSB_1
DDR_B_DQS_2
DDR_B_DQSB_2
DDR_B_DQS_3
DDR_B_DQSB_3
DDR_B_DQS_4
DDR_B_DQSB_4
DDR_B_DQS_5
DDR_B_DQSB_5
DDR_B_DQS_6
DDR_B_DQSB_6
DDR_B_DQS_7
DDR_B_DQSB_7
DDR_B_DM_0
DDR_B_DM_1
DDR_B_DM_2
DDR_B_DM_3
DDR_B_DM_4
DDR_B_DM_5
DDR_B_DM_6
DDR_B_DM_7
DDR_B_DQ_0
DDR_B_DQ_1
DDR_B_DQ_2
DDR_B_DQ_3
DDR_B_DQ_4
DDR_B_DQ_5
DDR_B_DQ_6
DDR_B_DQ_7
DDR_B_DQ_8
DDR_B_DQ_9
DDR_B_DQ_10
DDR_B_DQ_11
DDR_B_DQ_12
DDR_B_DQ_13
DDR_B_DQ_14
DDR_B_DQ_15
DDR_B_DQ_16
DDR_B_DQ_17
DDR_B_DQ_18
DDR_B_DQ_19
DDR_B_DQ_20
DDR_B_DQ_21
DDR_B_DQ_22
DDR_B_DQ_23
DDR_B_DQ_24
DDR_B_DQ_25
DDR_B_DQ_26
DDR_B_DQ_27
DDR_B_DQ_28
DDR_B_DQ_29
DDR_B_DQ_30
DDR_B_DQ_31
DDR_B_DQ_32
DDR_B_DQ_33
DDR_B_DQ_34
DDR_B_DQ_35
DDR_B_DQ_36
DDR_B_DQ_37
DDR_B_DQ_38
DDR_B_DQ_39
DDR_B_DQ_40
DDR_B_DQ_41
DDR_B_DQ_42
DDR_B_DQ_43
DDR_B_DQ_44
DDR_B_DQ_45
DDR_B_DQ_46
DDR_B_DQ_47
DDR_B_DQ_48
DDR_B_DQ_49
DDR_B_DQ_50
DDR_B_DQ_51
DDR_B_DQ_52
DDR_B_DQ_53
DDR_B_DQ_54
DDR_B_DQ_55
DDR_B_DQ_56
DDR_B_DQ_57
DDR_B_DQ_58
DDR_B_DQ_59
DDR_B_DQ_60
DDR_B_DQ_61
DDR_B_DQ_62
DDR_B_DQ_63
MSI
MSI
MSI
1
DQS_B0
AW8
DQS_B#0
AW9
DQS_B1
AT15
DQS_B#1
AU15
DQS_B2
AR20
DQS_B#2
AR17
DQS_B3
AU26
DQS_B#3
AT26
DQS_B4
AR38
DQS_B#4
AR37
DQS_B5
AK34
DQS_B#5
AL34
DQS_B6
AF37
DQS_B#6
AF36
DQS_B7
AB35
DQS_B#7
AD35
DQM_B0
AY6
DQM_B1
AR15
DQM_B2
AU17
DQM_B3
AV25
DQM_B4
AU39
DQM_B5
AL37
DQM_B6
AJ35
DQM_B7
AD37
DATA_B0
AV7
DATA_B1
AW4
DATA_B2
BA9
DATA_B3
AU11
DATA_B4
AU7
DATA_B5
AU8
DATA_B6
AW7
DATA_B7
AY9
DATA_B8
AY13
DATA_B9
AP15
DATA_B10
AW15
DATA_B11
AT16
DATA_B12
AU13
DATA_B13
AW13
DATA_B14
AP16
DATA_B15
AU16
DATA_B16
AY17
DATA_B17
AV17
DATA_B18
AR21
DATA_B19
AV20
DATA_B20
AP17
DATA_B21
AW16
DATA_B22
AT20
DATA_B23
AN20
DATA_B24
?
?
AT25
DATA_B25
AV26
DATA_B26
AU29
DATA_B27
AV29
DATA_B28
AW25
DATA_B29
AR25
DATA_B30
AP26
DATA_B31
AR29
DATA_B32
AR36
DATA_B33
AU38
DATA_B34
AN35
DATA_B35
AN37
DATA_B36
AV39
DATA_B37
AW39
DATA_B38
AU40
DATA_B39
AU41
DATA_B40
AL35
DATA_B41
AL36
DATA_B42
AK36
DATA_B43
AJ34
DATA_B44
AN39
DATA_B45
AN40
DATA_B46
AK37
DATA_B47
AL39
DATA_B48
AJ38
DATA_B49
AJ37
DATA_B50
AF38
DATA_B51
AE37
DATA_B52
AK40
DATA_B53
AJ40
DATA_B54
AF34
DATA_B55
AE35
DATA_B56
AD40
DATA_B57
AD38
DATA_B58
AB40
DATA_B59
AA39
DATA_B60
AE36
DATA_B61
AE39
DATA_B62
AB37
DATA_B63
AB38
MICRO-STAR INT'L CO.,LTD
MICRO-STAR INT'L CO.,LTD
MICRO-STAR INT'L CO.,LTD
Document Description Rev
Document Description Rev
Document Description Rev
Size
Size
Size
Custom
Custom
Custom
Intel Eaglelake - Memory DDR3
Intel Eaglelake - Memory DDR3
Intel Eaglelake - Memory DDR3
Date:
Thursday, September 09, 2010
Date:
Thursday, September 09, 2010
Date:
Thursday, September 09, 2010
DQM_B[0..7]
DATA_B[0..63]
MS-7716
MS-7716
MS-7716
1
14
DQS_B0
14
DQS_B#0
14
DQS_B1
14
DQS_B#1
14
DQS_B2
DQS_B#2
14
DQS_B3
14
DQS_B#3
14
DQS_B4
14
14
DQS_B#4
DQS_B5
14
DQS_B#5
14
DQS_B6
14
DQS_B#6
14
DQS_B7
14
14
DQS_B#7
DQM_B[0..7]
DATA_B[0..63]
Sheet of
Sheet of
Sheet of
73
73
73
14
14
1.0
1.0
1.0
2
2
2
![](/html/c6/c6ff/c6ff8025bcec294af73631b19fefb7c04a4e8410910c874f6da27db71e61c099/bg8.png)
5
NB POWER
L14
L14
R197
CP9
CP9
L8
L8
2 1
CP4
CP4
X_COPPER
X_COPPER
L16
L16
2 1
CP12
CP12
X_COPPER
X_COPPER
L11
L11
X_10u100mA_0805-RH
X_10u100mA_0805-RH
2 1
CP8
CP8
X_COPPER
X_COPPER
R197
VCCA_GPLL
1R1%0402
1R1%0402
R196
R196
X_1R1%0402
X_1R1%0402
C223
C223
X_C10u10Y0805
X_C10u10Y0805
VCCA_MPLL
R175
R175
R174
R174
X_1R1%0402
X_1R1%0402
1R1%0402
1R1%0402
R251
R251
X_1R1%0402
X_1R1%0402
R252
R252
X_C2.2u6.3Y
X_C2.2u6.3Y
R182
R182
V_1P5_ICH
R232
R232
X_0R0402
X_0R0402
VCC_DDR
2 1
CP10
CP10
CP11
CP11
X_1R1%0402
X_1R1%0402
C270
C270
C215
C215
C10u10Y0805
C10u10Y0805
0603
0R0402
0R0402
V_1P1_CORE
R242
R242
0R0402
0R0402
L15X_10u100mA_0805-RH L15X_10u100mA_0805-RH
X_COPPER
X_COPPER
X_COPPER
X_COPPER
X_10u100mA_0805-RH
X_10u100mA_0805-RH
X_10u100mA_0805-RH
X_10u100mA_0805-RH
C348
C348
C10u10Y0805
C10u10Y0805
C10u10Y0805
C10u10Y0805
C387
C387
X_C10u10Y0805
X_C10u10Y0805
C593
C593
C598
C598
X_C10u10Y0805
X_C10u10Y0805
X_C10u10Y0805
X_C10u10Y0805
C594
C594
C591
C591
X_C10u10Y0805
X_C10u10Y0805
X_C10u10Y0805
X_C10u10Y0805
C592
C592
C358
C358
X_C10u10Y0805
X_C10u10Y0805
2 1
X_COPPER
X_COPPER
X_10u100mA_0805-RH
X_10u100mA_0805-RH
V_1P1_CORE
D D
V_1P1_CORE
L7
L7
X_10u100mA_0805-RH
X_10u100mA_0805-RH
V_1P1_CORE
R187
R187
40.2R1%0402
40.2R1%0402
0.1u50mA
0.1u50mA
2 1
C10u10Y0805
C10u10Y0805
R190
R190
39.2R1%0402
39.2R1%0402
C0.22u6.3Y0402-RH
C0.22u6.3Y0402-RH
C0.1u6.3Y0402-RH
C0.1u6.3Y0402-RH
V_1P1_CORE
2 1
CP3
CP3
X_COPPER
X_COPPER
L10
L10
X_10u100mA_0805-RH
X_10u100mA_0805-RH
2 1
CP7
CP7
X_COPPER
X_COPPER
X_10u100mA_0805-RH
X_10u100mA_0805-RH
L13
L13
C220
C220
C0.1u16Y0402
C0.1u16Y0402
C213
C213
C290 C0.1u16Y0402C290 C0.1u16Y0402
C0.22u16Y0402
C0.22u16Y0402
C255
C255
C0.22u16Y0402
C0.22u16Y0402
C249
C249
C254
C254
C0.22u16Y0402
C0.22u16Y0402
X_C0.1u16Y0402
X_C0.1u16Y0402
C199
C199
C207
C207
C0.1u16Y0402
C0.1u16Y0402
C230
C230
C0.1u16Y0402
C0.1u16Y0402
V_1P1_CORE V_1P1_CORE
V_1P1_CORE V_1P1_CORE
C C
VCC3
B B
V_FSB_VTT V_FSB_VTT
C190
C190
C194
C194
A A
VCCA_HPLL VCCA_GPLLD
C195
C195
C205
VCCA_DPLLA VCCA_DPLLBVCCA_DPLLA
C211
C211
C10u10Y0805
C10u10Y0805
V_1P1_HPL
C206
C206
C10u10Y0805
C10u10Y0805
C10u10Y0805
C10u10Y0805
C1u6.3Y0402-RH
C1u6.3Y0402-RH
C0.22u16Y0402
C0.22u16Y0402
V_1P1_CORE
5
C205
C0.1u16Y0402
C0.1u16Y0402
C210
C210
C0.1u16Y0402
C0.1u16Y0402
C209
C209
C0.1u16Y0402
C0.1u16Y0402
V_1P1_CORE
C0.1u16Y0402
C0.1u16Y0402
C269
C269
C247 C0.1u16Y0402C247 C0.1u16Y0402
C1u16Y0402
C1u16Y0402
C253
C253
C0.1u16Y0402
C0.1u16Y0402
C248
C248
C252
C252
C0.22u16Y0402
C0.22u16Y0402
X_C0.1u16Y0402
X_C0.1u16Y0402
C204
C204
C208
C208
X_C0.1u16Y0402
X_C0.1u16Y0402
C280
C280
X_C0.1u16Y0402
X_C0.1u16Y0402
X_C2.2u6.3Y
X_C2.2u6.3Y
L9
L9
2 1
CP6
CP6
X_COPPER
X_COPPER
VCCA_EXP
C221
C221
C0.1u16Y0402
C0.1u16Y0402
C169
C169
C189
C189
C185
C185
C222
C222
C0.1u16Y0402
C0.1u16Y0402
C200
C200
X_C10u10Y0805
X_C10u10Y0805
C266
C266
C0.1u16Y0402
C0.1u16Y0402
C214
C214
C0.1u16Y0402
C0.1u16Y0402
R179
R179
0R0402
0R0402
V_3P3_DAC_FILTERED
VCC3
R241
R241
X_0R0402
X_0R0402
R246
R246
1R1%0402
1R1%0402
C279
C279
C10u10Y0805
C10u10Y0805
V_1P1_CORE
R234 0R0402R234 0R0402
demo board
4
V_FSB_VTT
A25
B25
B26
C24
C26
D22
D23
D24
E23
F21
F22
G21
G22
H21
H22
J21
J22
K21
K22
L21
L22
M21
M22
N20
N21
N22
P20
P21
P22
P24
R20
R21
R23
R24
R22
VCCDQ_CRT
B20
VCCA_GPLL
B16
VCCA_MPLL
A21
VCCA_HPLL
B22
VCCA_GPLLD
B12
V_1P1_HPL
U33
VCCA_DPLLA
D20
VCCA_DPLLB
C20
D19
B19
E19
VCCA_EXP
A17
C267
C267
X_C4.7u10Y0805
X_C4.7u10Y0805
R245
R245
X_1R1%0402
X_1R1%0402
4
AG2
AR2
B17
R230
R230
0R0402
0R0402
AK32
AL31
AL32
AM31
AM30
C268
C268
C1u16Y
C1u16Y
ELK_CRB
ELK_CRB
Separate when AMT is
supported
V_1P1_CORE
EAGLELAKE_DDR2
EAGLELAKE_DDR2
NB1F
NB1F
VTT_FSB_01
VTT_FSB_02
VTT_FSB_03
VTT_FSB_04
VTT_FSB_05
VTT_FSB_06
VTT_FSB_07
VTT_FSB_08
VTT_FSB_09
VTT_FSB_10
VTT_FSB_11
VTT_FSB_12
VTT_FSB_13
VTT_FSB_14
VTT_FSB_15
VTT_FSB_16
VTT_FSB_17
VTT_FSB_18
VTT_FSB_19
VTT_FSB_20
VTT_FSB_21
VTT_FSB_22
VTT_FSB_23
VTT_FSB_24
VTT_FSB_25
VTT_FSB_26
VTT_FSB_27
VTT_FSB_28
VTT_FSB_29
VTT_FSB_30
VTT_FSB_31
VTT_FSB_32
VTT_FSB_34
VTT_FSB_35
VTT_FSB_36
VCCDQ_CRT
VCCAPLL_EXP
VCCA_MPLL
VCCA_HPLL
VCCDPLL_EXP
VCCD_HPLL
VCCA_DPLLA
VCCA_DPLLB
VCCA_DAC_01
VCCA_DAC_02
VCC3_3_1
VCC_EXP
VCCAVRM_EXP
VCC_HDA
VSS_369
VCC_SMCLK_04
VCC_SMCLK_03
VCC_SMCLK_02
VCC_SMCLK_01
VCCCML_DDR
?
?
V_1P1_CORE
AA19
AA21
CC_01
V
AA27
AA25
AA23
CC_05
CC_04
CC_02
CC_03
V
V
V
V
SYM_REV = 1.5
SYM_REV = 1.5
CC_CL_02
CC_CL_01
V
V
AJ15
AK14
AB20
AA30
AA29
CC_07
CC_06
V
V
CC_CL_04
CC_CL_03
V
V
AM25
AM26
AM29
AB29
AB24
AB26
AB22
CC_10
CC_11
CC_09
V
V
V
VCC_08
6 OF 7
6 OF 7
CC_CL_08
CC_CL_07
CC_CL_06
V
V
V
VCC_CL_05
AM20
AM21
AM22
AM24
?
?
AB30
AC16
CC_13
CC_14
V
VCC_12
V
CC_CL_11
CC_CL_10
V
V
VCC_CL_09
AM16
AM17
AC19
AC17
CC_16
CC_15
V
V
CC_CL_13
CC_CL_12
V
V
AL30
AM15
AC21
AC23
AC25
CC_17
CC_18
V
V
CC_CL_15
CC_CL_14
V
V
AJ32
AF32
AK31
AD16
AC29
AC27
CC_21
CC_20
V
V
VCC_19
CC_CL_18
CC_CL_17
V
V
VCC_CL_16
AE32
AE33
AD33
3
AD17
AD20
CC_22
CC_24
V
VCC_23
V
CC_CL_21
CC_CL_19
V
VCC_CL_20
V
AB33
AD32
3
AD22
AD24
CC_25
CC_26
V
V
CC_CL_23
CC_CL_22
V
V
AA33
AB32
AE16
AD29
AD26
CC_28
CC_27
V
V
CC_CL_24
CC_CL_25
V
V
Y32
Y33
AA32
AF20
AF19
AF17
AE27
AE29
AF16
AE25
AE23
AE21
AE17
AE19
CC_39
CC_38
CC_35
CC_36
CC_37
CC_33
CC_32
CC_31
CC_29
VCC_30
V
V
CC_CL_28
CC_CL_26
V
VCC_CL_27
V
AP1
AP2
V
V
V
V
V
VCC_34
V
V
POWER
POWER
CC_CL_36
CC_CL_35
CC_CL_34
CC_CL_33
CC_CL_32
CC_CL_30
CC_CL_29
V
V
V
V
V
VCC_CL_31
V
V
AM2
AM3
AM4
AL23
AL24
AL25
AL26
AL27
AL29
AF23
AF21
AF22
CC_40
CC_42
V
VCC_41
V
CC_CL_39
CC_CL_37
V
VCC_CL_38
V
AL20
AL21
AL22
AF26
AF25
AF24
CC_44
CC_43
VCC_45
V
V
CC_CL_41
CC_CL_40
VCC_CL_42
V
V
AL16
AL17
AL19
AF29
AF27
CC_48
CC_46
CC_47
V
V
V
CC_CL_45
CC_CL_44
CC_CL_43
V
V
V
AL14
AL15
AG17
AG16
CC_50
V
VCC_49
CC_CL_47
V
VCC_CL_46
AL11
AL12
AG24
AG20
AG22
CC_51
V
VCC_52
CC_CL_48
V
VCC_CL_49
AL8
AL9
AL10
AG29
AG26
CC_55
CC_54
CC_53
V
V
V
CC_CL_52
CC_CL_51
CC_CL_50
V
V
V
AL6
AL7
AJ17
AJ16
CC_57
V
VCC_56
CC_CL_54
V
VCC_CL_53
AL4
AL5
AJ21
AJ19
AJ23
CC_59
CC_58
V
V
CC_CL_56
CC_CL_55
V
V
AL1
AL2
AK30
R25
AJ25
CC_62
CC_61
V
V
VCC_60
CC_CL_59
CC_CL_58
V
V
VCC_CL_57
AK27
AK29
R29
R27
R26
CC_64
CC_63
V
V
CC_CL_61
CC_CL_60
V
V
AK24
AK25
AK26
2
T21
CC_66
CC_65
V
V
CC_CL_63
CC_CL_62
VCC_CL_64
V
V
AK22
AK23
2
T24
CC_69
V
CC_CL_66
CC_CL_65
V
V
AK20
AK21
T26
T27
T25
CC_70
VCC_71
V
CC_CL_67
VCC_CL_68
V
AK16
AK17
AK19
U21
T29
CC_74
CC_73
CC_72
V
V
V
CC_CL_71
CC_CL_70
CC_CL_69
V
V
V
AJ30
AJ31
U23
U22
CC_76
CC_75
V
V
CC_CL_73
CC_CL_72
V
V
AG30
AG31
U25
U24
CC_77
VCC_78
V
CC_CL_74
VCC_CL_75
V
AF31
AE31
U27
U26
CC_80
CC_79
V
V
CC_CL_77
CC_CL_76
V
V
AC31
AD31
W21
U29
W19
CC_81
V
VCC_82
CC_CL_78
VCC_CL_79
V
Y31
AA31
AB31
W25
W23
CC_85
CC_84
CC_83
V
V
V
CC_CL_80
CC_CL_82
CC_CL_81
V
V
V
AJ27
AJ29
W27
W29
CC_86
CC_87
V
V
CC_CL_84
CC_CL_83
V
V
Y29
Y30
Y22
Y20
CC_88
VCC_89
V
CC_CL_85
V
W31
MSI
MSI
MSI
Y24
Y26
CC_90
V
CC_91
V
VCC_EXP_1
VCC_EXP_2
VCC_EXP_3
VCC_EXP_4
VCC_EXP_5
VCC_EXP_06
VCC_EXP_07
VCC_EXP_08
VCC_EXP_09
VCC_EXP_10
VCC_EXP_11
VCC_EXP_12
VCC_EXP_13
VCC_EXP_14
VCC_EXP_15
VCC_EXP_16
VCC_EXP_17
VCC_EXP_18
VCC_EXP_19
VCC_EXP_20
VCC_EXP_21
VCC_EXP_22
VCC_EXP_23
VCC_EXP_24
VCC_EXP_25
VCC_EXP_26
VCC_EXP_27
VCC_EXP_28
VCC_EXP_29
VCC_EXP_30
VCC_EXP_31
VCC_EXP_32
VCC_EXP_33
VCC_EXP_34
VCC_EXP_35
VCC_EXP_36
VCC_EXP_37
VCC_EXP_38
VCC_SM_01
VCC_SM_02
VCC_SM_03
VCC_SM_04
VCC_SM_05
VCC_SM_06
VCC_SM_07
VCC_SM_08
VCC_SM_09
VCC_SM_10
VCC_SM_11
VCC_SM_12
VCC_SM_13
VCC_SM_14
VCC_SM_15
1
T22
T23
CC_96
CC_97
V
V
AC4
VCC_98
AF3
VCC_99
F9
VCC_100
H4
VCC_101
L3
VCC_102
P3
VCC_103
V4
VCC_104
AJ1
AJ2
AK2
AK3
AK4
AK13
AK12
AK11
AK10
AK9
AK8
AK7
AK6
AJ14
AJ13
AJ12
AJ11
AJ10
AJ9
AJ8
AJ7
AJ6
AG15
AF15
AF14
AE15
AE14
AD15
AD14
AC15
AB14
AA15
AA14
Y15
Y14
W15
U15
U14
VCC_DDR
AP44
AT45
AV44
AY40
BA41
BB39
BD21
BD25
BD29
BD34
BD38
BE23
BE27
BE31
BE36
MICRO-STAR INT'L CO.,LTD
MICRO-STAR INT'L CO.,LTD
MICRO-STAR INT'L CO.,LTD
MS-7716
MS-7716
Size
Size
Size
Custom
Custom
Custom
Date:
Thursday, September 09, 2010
Date:
Thursday, September 09, 2010
Date:
Thursday, September 09, 2010
MS-7716
Document Description Rev
Document Description Rev
Document Description Rev
Intel Eaglelake - Power / GND
Intel Eaglelake - Power / GND
Intel Eaglelake - Power / GND
1
V_1P1_CORE
Sheet of
Sheet of
Sheet of
83
83
83
1.0
1.0
1.0
2
2
2
![](/html/c6/c6ff/c6ff8025bcec294af73631b19fefb7c04a4e8410910c874f6da27db71e61c099/bg9.png)
5
EAGLELAKE_DDR2
EAGLELAKE_DDR2
45
43
6
A3
A43
B44
BD
C1
NB1G
NB1G
A12
VSS_001
A15
VSS_002
A19
VSS_003
A27
VSS_004
A31
VSS_005
A36
VSS_006
AA11
AA12
AA13
AA16
AA17
AA20
AA22
AA24
AA26
AA34
AA38
AA40
AA44
AB11
AB12
AB16
AB17
AB19
AB21
AB23
AB25
AB27
AB34
AB36
AB39
AC20
AC22
AC24
AC26
AC45
AC5
AD12
AD19
AD21
AD23
AD25
AD27
AD3
AD34
AD36
AD39
AD6
AD9
AE11
AE12
AE13
AE20
AE22
AE24
AE26
AE34
AE38
AE40
AE44
AF10
AF11
AF12
AF13
AF33
AF35
AF39
AG19
AG21
AG23
AG25
AG27
AG45
AG5
AH2
AH3
AH4
AJ20
AJ22
AJ24
AJ26
A40
A8
AA1
AA8
AB4
AB6
AB7
AB8
AE1
AE8
AF6
AF7
VSS_007
VSS_008
VSS_009
VSS_010
VSS_011
VSS_012
VSS_013
VSS_014
VSS_015
VSS_016
VSS_017
VSS_018
VSS_019
VSS_020
VSS_021
VSS_022
VSS_023
VSS_024
VSS_025
VSS_026
VSS_027
VSS_028
VSS_029
VSS_030
VSS_031
VSS_032
VSS_033
VSS_034
VSS_035
VSS_036
VSS_037
VSS_038
VSS_039
VSS_040
VSS_041
VSS_042
VSS_043
VSS_044
VSS_045
VSS_046
VSS_047
VSS_048
VSS_049
VSS_050
VSS_051
VSS_052
VSS_053
VSS_054
VSS_055
VSS_056
VSS_057
VSS_058
VSS_059
VSS_060
VSS_061
VSS_062
VSS_063
VSS_064
VSS_065
VSS_066
VSS_067
VSS_068
VSS_069
VSS_070
VSS_071
VSS_072
VSS_073
VSS_074
VSS_075
VSS_076
VSS_077
VSS_078
VSS_079
VSS_080
VSS_081
VSS_082
VSS_083
VSS_084
VSS_085
VSS_086
VSS_087
VSS_088
VSS_089
VSS_090
VSS_091
VSS_092
VSS_093
ELK_CRB
ELK_CRB
D D
C C
B B
A A
VSS_371
VSS_372
VSS_094
VSS_095
AJ36
AJ39
VSS_096
AJ44
AJ45
VSS_097
VSS_368
VSS_366
VSS_367A6VSS_365
SYM_REV = 1.5
SYM_REV = 1.5
VSS_098
VSS_099
VSS_100
AL38
AK35
AK38
AK39
5
C4
VSS_364C1VSS_363
VSS_101
VSS_102
AL44
AL45
1
BC
F1
VSS_361
VSS_362
VSS_103
VSS_104
VSS_105
21
22
AN
AN
44
2
?
?
BC
BD
BD
BE3
VSS_360
VSS_359
VSS_358
7OF 7
7OF 7
VSS_106
VSS_107
VSS_108
24
25
26
33
AN
AN
AN
AN
BE43
Y9
VSS_357
VSS_356
VSS_355
VSS_109
VSS_110
VSS_111
36
38
AN
AN
Y35
Y39
VSS_353
VSS_354
VSS_112
VSS_113
7
AN
AP20
Y27
Y3
VSS_351
VSS_352
VSS_114
VSS_115
AP21
AP22
Y23
Y25
VSS_349
VSS_350
VSS_116
VSS_117
AP24
AP25
Y21
VSS_348
VSS_118
AP29
Y19
Y2
VSS_346
VSS_347
VSS_119
VSS_120
10
AP45
AR
Y16
Y17
VSS_344
VSS_345
VSS_121
VSS_122
11
13
AR
AR
Y12
Y13
VSS_343
VSS_123
16
26
AR
AR
4
Y10
Y11
VSS_341
VSS_342
VSS_124
VSS_125
3
31
AR
AR
5
W4
W5
VSS_339
VSS_340
VSS_126
VSS_127
33
35
AR
AR
VSS_338
VSS_128
0
2
4
6
4
W2
W2
W2
W2
W4
VSS_333
VSS_334
VSS_335
VSS_336
VSS_337
GND
GND
VSS_129
VSS_130
VSS_131
VSS_132
VSS_133
8
9
39
AT1
AR
AR
AT11
AR
7
W2
W1
VSS_332
VSS_331
VSS_134
VSS_135
AT13
AT17
6
W1
W1
VSS_330
VSS_136
AT2
AT24
4
U8
U4
VSS_329
VSS_328
VSS_327
VSS_139
VSS_138
VSS_137
AT35
AT29
9
6
U3
U3
VSS_326
VSS_325
VSS_141
VSS_140
22
20
AU
AU
9
U20
U1
VSS_324
VSS_323
VSS_143
VSS_142
30
AU
AU25
7
6
U1
U1
VSS_322
VSS_144
5
35
AU
AU
3
2
U1
U1
VSS_321
VSS_320
VSS_146
VSS_145
9
6
AU
AU
1
U1
U1
VSS_319
VSS_318
VSS_148
VSS_147
AV13
AV11
T8
T9
VSS_315
VSS_316
VSS_317
VSS_151
VSS_150
VSS_149
AV16
AV15
T6
T7
VSS_313
VSS_314
VSS_153
VSS_152
AV2
AV21
0
T4
T4
VSS_311
VSS_312
VSS_155
VSS_154
AV33
AV30
5
8
T3
T3
VSS_309
VSS_310
VSS_157
VSS_156
AV6
AV38
2
3
T3
T3
VSS_307
VSS_308
VSS_159
VSS_158
AV9
AV8
3
0
1
T3
T3
VSS_305
VSS_306
VSS_161
VSS_160
AW17
AW11
0
T2
T3
VSS_303
VSS_304
VSS_163
VSS_162
AW22
AW20
9
T17
T1
VSS_301
VSS_302
VSS_165
VSS_164
AW26
AW24
3
6
T1
T1
VSS_300
VSS_166
AW3
AW30
1
2
T1
T1
VSS_297
VSS_298
VSS_299
VSS_169
VSS_168
VSS_167
AY1
AY15
0
R8
T1
VSS_296
VSS_170
AY21
AY16
5
R4
R5
VSS_294
VSS_295
VSS_172
VSS_171
AY30
AY25
0
R3
R38
VSS_291
VSS_292
VSS_293
VSS_175
VSS_174
VSS_173
B10
AY45
9
R1
R2
VSS_289
VSS_290
VSS_177
VSS_176
B27
B21
7
R16
R1
VSS_287
VSS_288
VSS_179
VSS_178
B34
B29
1
2
R1
R1
VSS_285
VSS_286
VSS_181
VSS_180
BA5
BA23
P26
P31
VSS_283
VSS_284
VSS_182
VSS_183
BB21
BB25
P17
P25
VSS_281
VSS_282
VSS_279
VSS_278
VSS_277
VSS_276
VSS_275
VSS_274
VSS_273
VSS_272
VSS_271
VSS_270
VSS_269
VSS_268
VSS_267
VSS_266
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2
1
MICRO-STAR INT'L CO.,LTD
MICRO-STAR INT'L CO.,LTD
MICRO-STAR INT'L CO.,LTD
MS-7716
MS-7716
MSI
MSI
MSI
Size Document Description Rev
Size Document Description Rev
Size Document Description Rev
Custom
Custom
Custom
Thursday, September 09, 2010
Thursday, September 09, 2010
5
4
3
2
Thursday, September 09, 2010
MS-7716
Intel Eaglelake - Power / GND
Intel Eaglelake - Power / GND
Intel Eaglelake - Power / GND
1
Sheet ofDate:
932
Sheet ofDate:
932
Sheet ofDate:
932
1.0
1.0
1.0