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MS-7696
Schematics rev1.0
34 pgs1.46 Mb0

MSI MS-7696 Schematics rev1.0

1
Cover Sheet BLOCK DIAGRAM Clock Distribution VRM Intersil 6328 3+1 PHASE AMD FM1
DDR3 DIMM
FCH--PCIE/PCI/APU/LPC/CLK FCH--ACPI/GPIO/USB/AZ FCH--SATA/SPI
FCH--POWER FCH--STRAPS
PCI Slot & PCIE x1 Slot PCIE X16 SLOT
A A
USB2.0 USB3.0 DVI & VGA CONNECTORS HDMI CONNECTOR LAN - Realtek 8111E Audio Codec - ALC892/887 SIO - F71869A/COM/LPT/FAN SYSTEM POWER ATX/Front Panel
1 2 3 4,5 6,7,8,9 10,11,12 13 14 15 16 17 18 19 20 21 22 23 24
25 26,27,28 29,30,31
32
MS-7696 Ver:1.0
CPU:
AMD FM1
System Chipset:
AMD - Hudson D3
On Board Chipset:
LPC Super I/O --F71869A LAN-Realtek 8111E Azalia CODEC - Realtek ALC892/887
Main Memory:
DDR III * 4 (max 32G)
Expansion Slots:
PCI Express X16 Slot * 2 PCI Express X1 Slot * 1 PCI Slot * 1
VRM
Controller - Intersil ISL6328 3+1 Phase
33History
MICRO-START INT'L CO.,LTD.
MICRO-START INT'L CO.,LTD.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet
1
Date: Sheet
MICRO-START INT'L CO.,LTD.
MS-7696 1.0
MS-7696 1.0
MS-7696 1.0
137Tuesday, May 17, 2011
137Tuesday, May 17, 2011
137Tuesday, May 17, 2011
of
of
of
5
4
3
2
1
FUSION BLOCK DIAGRAM
D D
DVI CON
HDMI CON
C C
TMDS SWITCH
VGA CONNECTOR
B B
22
DP 1
2323
DP0
FM1
DDRIII 1333~1600
DDRIII 1333~1600
PCIE x16
6~9
PCIE INTERFACE
UMI
AZALIA
PCIE x4
PCIE GFX x4
USB
RGB
HUDSON 2/3
USB 2.0
22
CHA
CHB
PCIE GFX x16
PCIE x1 SLOT
ALC887/892
19
19
18
UNBUFFERED DDRIII DIMM1 2
UNBUFFERED DDRIII DIMM3 4
10/100/Giga bit ETHERNET 8105EL/8111EL
28
10
11
24
20
USB
USB 3.0
21
PCI
PCI Slot
18
CPU CORE POWER NB CORE POWERACPI CONTROLLER Intersil ISL6328 Intersil ISL6612A
SPI ROM 32M
16~20
15
SPI Bus
SERIAL ATA 3.0
4,5
i-SATAx6
15
26
CPU VDDP Power CPU VDDR Power CPU VDDA Power FCH CORE POWER
A A
DDR3 DRAM POWER
ATX CON
5
30
31
32
4
SUPER I/O F71869A
KBD MOUSE
SERIAL PORT
27 27
3
SERIAL PORT
25
MICRO-START INT'L CO.,LTD.
MICRO-START INT'L CO.,LTD.
Title
Title
27
2
Title
BLOCK Diagram
BLOCK Diagram
BLOCK Diagram
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet
Date: Sheet
MICRO-START INT'L CO.,LTD.
MS-7696 1.0
MS-7696 1.0
MS-7696 1.0
237Tuesday, May 17, 2011
237Tuesday, May 17, 2011
237Tuesday, May 17, 2011
of
of
1
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5
D D
C C
4
3
2
1
CH A CH B
INTERNAL CLOCK MODE
DIMM1
DIMM2
DIMM3
DIMM4
AMD
B B
MEM_MA_CLK_H0/L0
MEM_MA_CLK_H3/L3
MEM_MA_CLK_H2/L2
MEM_MA_CLK_H1/L1
AMD
FM1 APU
MEM_MB_CLK_H0/L0
MEM_MB_CLK_H3/L3
MEM_MB_CLK_H1/L1
MEM_MB_CLK_H2/L2
APU_CLKP/N
DISP_CLKP/N
100MHZ
100MHZ
FCH_APU_CLKP/N
FCH_DISP_CLKP/N
HUDSON-2/3
(NO SPREAD)
14M_25M_48M_OSC
GPP_CLK2P/N
SLT_GFX_CLKP/N
GPP_CLK0P/N
GPP_CLK1P/N
A A
32K_X1
RTC CLOCK
32.768K Hz
32K_X2
25M_X2
25M_X1
25MHZ
5
4
PCICLK0
PCICLK0
48MHZ
33MHZ
33MHZ
100MHZ
SIO F71869A
PCI SLOT
LAN-Realtek 8111E (FM1, 1 LANE)
PCIE GFX SLOT (FM1, 16 LANES)
PCIE GPP SLOT1 (HUDSON-2/3, 4 LANE)
PCIE GPP SLOT2 (FM1, 1 LANE)
3
2
PCIE LAN RTL8111E
25M Hz
MICRO-START INT'L CO.,LTD.
MICRO-START INT'L CO.,LTD.
Title
Title
Title
Clock Distribution
Clock Distribution
Clock Distribution
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
C
C
C
Date: Sheet of
Date: Sheet of
Date: Sheet of
MICRO-START INT'L CO.,LTD.
MS-7696 1.0
MS-7696 1.0
MS-7696 1.0
1
337Tuesday, May 17, 2011
337Tuesday, May 17, 2011
337Tuesday, May 17, 2011
5
VCORE_EN32
C4
C4
C1500p50X0402
C1500p50X0402
R7 1.74KR1%0402R7 1.74KR1%0402
R14
R14
47.5R1%0402
47.5R1%0402
R27 71.5KR1%0402R27 71.5KR1%0402
R34
1.74KR1%0402
1.74KR1%0402
R230 0R0402R230 0R0402
C28
C28
R53
R53
20KR1%0402
20KR1%0402
VCC5
R64
R64 10KR0402
10KR0402
VRM_PWROK
R11 560R1%0402R11 560R1%0402
C10
C10
6.34KR0402
6.34KR0402
C680p50X
C680p50X
R16 0R0402R16 0R0402
6262_VCCP
C19
C19
220p0402
220p0402
6262_VCCNB
R42
R42 X_110KR1%0402
X_110KR1%0402
C30
C30
3900p16X0402
3900p16X0402
R54
R54
R55
R55
20KR1%0402
20KR1%0402
VRM_PWROK
C8 C150p0402C8 C150p0402
R12
R12
R28
R28
10.7KR1%/4
10.7KR1%/4
C0.1u16X0402
C0.1u16X0402
C18 0.033u0402C18 0.033u0402
C20
C20
D D
VRM_PWRGD30,32
APU_SVD8 APU_SVC8
VCCP
R15
R15 100R0402
100R0402
COREFB+8
C C
COREFB-8
NBCOREFB+8
B B
A A
APU_PWRGD8,13
R17 49.9R1%0402R17 49.9R1%0402
R22 0R0402R22 0R0402
VCCP_NB
R31
R31 100R0402
100R0402
R38 49.9R1%0402R38 49.9R1%0402
X_C0.1u16Y0402
X_C0.1u16Y0402
APU_PWRGD
5
R23
R23 100R0402
100R0402
C25
C25
V6328 V6328 V6328
R121 0R0402R121 0R0402
C12
C12 X_C0.1u16Y0402
X_C0.1u16Y0402
C13
C13 X_C0.1u16Y0402
X_C0.1u16Y0402
C14
C14 X_C0.1u16Y0402
X_C0.1u16Y0402
0R0402
0R0402
C17
C17
R32 100R0402R32 100R0402
V6328 VCC5
X_C0.1u16X0402
X_C0.1u16X0402
R45 X_100R0402R45 X_100R0402 R48 X_100R0402R48 X_100R0402 R50 X_100R0402R50 X_100R0402
86.6KR1%0402
86.6KR1%0402
C1
1u/16X5/4C11u/16X5/4
C5
C5
C0.01U16X0402
C0.01U16X0402
C11
C11
C6800p25X0402
C6800p25X0402
100p0402
100p0402
R44
R44
45.3KR1%0402
45.3KR1%0402
C35
C35
JPWR2
JPWR2
2
1
4
VCC5
R1
2.2R1%0805R12.2R1%0805
C2
C1u25X0805-RHC2C1u25X0805-RH
U1 ISL6328CRU1 ISL6328CR
25
EN
35
PWROK
34
VDDPWRGD
6
SVD
5
SVC
17
COMP
16
FB
15
FB_PSI
14
VSEN
13
RGND
1
COMP_NB
2
FB_NB
3
VSEN_NB
8
APD
19
APA
18
FS
9
OFS
4
DRPCTRL
10
OCP
BOTTOM PAD CONNECT TO GND Through 8 VIAs
12V
12V
12V
12V
GND GND
GND GND
PWR-2X2M_natural-RH
PWR-2X2M_natural-RH
5
4
7
VCC
BOOT_NB UGATE_NB PHASE_NB
LGATE_NB
ISEN_NB+
GND
49
4
3
V6328
PVCC
GVOT
BOOT1 UGATE1 PHASE1
LGATE1
BOOT2 UGATE2 PHASE2
LGATE2
PWM3 PWM4
ISEN1+
ISEN1-
ISEN2+
ISEN2-
ISEN3+
ISEN3-
ISEN4+
ISEN4-
ISEN_NB-
TCOMP1 TCOMP2
15KR1%0402
15KR1%0402
+12VIN VCC5
R3
C3
C3
C7 C0.1u25XC7 C0.1u25X
UGATE1 PHASE1 LGATE1
C9 C0.1u25XC9 C0.1u25X
UGATE2 PHASE2 LGATE2
PWM3
R24 374R1%0402R24 374R1%0402 R26
R26
8.2KR1%0402-RH
8.2KR1%0402-RH
R29 374R1%0402R29 374R1%0402 R33
R33
8.2KR1%0402-RH
8.2KR1%0402-RH
R35 374R1%0402R35 374R1%0402R34 R37
R37
8.2KR1%0402-RH
8.2KR1%0402-RH
C29 C0.1u25XC29 C0.1u25X
UGATE_NB PHASE_NB LGATE_NB
R46 374R1%0402R46 374R1%0402 R49
R49
8.2KR1%0402-RH
8.2KR1%0402-RH
R52 1.5KR1%0402R52 1.5KR1%0402
C34
C34
4.7p16X0402
4.7p16X0402
R3 X_2.2R1%0805
X_2.2R1%0805
C6
C6 C1u25X0805-RH
C1u25X0805-RH
R25 X_0R0402R25 X_0R0402 C15 C0.1u16X0402C15 C0.1u16X0402
R30 X_0R0402R30 X_0R0402 C21 C0.1u16X0402C21 C0.1u16X0402 R36 X_0R0402R36 X_0R0402 C23 C0.1u16X0402C23 C0.1u16X0402
R47 X_0R0402R47 X_0R0402 C31 C0.1u16X0402C31 C0.1u16X0402
R2
R2
2.2R1%0805
2.2R1%0805
42 29
2.2u16Y0805
2.2u16Y0805
R6
R6
31
2.2R1%0805
2.2R1%0805
32 33 30
R13
R13
27
2.2R1%0805
2.2R1%0805
26 24 28
37 36
ISEN1+
20
ISEN1-
21
IPHASE1
ISEN2+ ISEN2
22
ISEN2-
23
IPHASE2 ISEN3+ ISEN3
44
ISEN3-
43
IPHASE3
46 45
R43
R43
40
2.2R1%0805
2.2R1%0805
39 38 41
ISEN_NB+ ISEN_NB
48
ISEN_NB-
47
IPHASE_NB
11 12
R56
R56
Close PHASE1 Output Choke Vcore side
CHOKE1
CHOKE1
CH-1.2u15A3.0m-RH
CH-1.2u15A3.0m-RH
1 2
C36
C36 10u16X_1206
10u16X_1206
270u16V
270u16V
EC1
EC1
12
+
+
270u16V
270u16V
EC2
EC2
12
+
+
270u16V
270u16V
EC3
EC3
3
UGATE1 5 PHASE1 5 LGATE1 5
UGATE2 5 PHASE2 5 LGATE2 5
PWM3 5
ISEN1
R51 2.8KR1%0402R51 2.8KR1%0402
R57
R57 13KR1%0402
13KR1%0402
3
UGATE_NB 5 PHASE_NB 5 LGATE_NB 5
VIN+12VIN
12
+
+
270u16V
270u16V
EC4
EC4
C16
C16 C0.1u16X0402
C0.1u16X0402
C22
C22 C0.1u16X0402
C0.1u16X0402
C24
C24 C0.1u16X0402
C0.1u16X0402
C32
C32 C0.1u16X0402
C0.1u16X0402
RT1
RT1
10KRT1%6
10KRT1%6
12
+
+
ISEN1 IPHASE1
ISEN2 IPHASE2
ISEN3 IPHASE3
ISEN_NB IPHASE_NB
ISEN1 5 IPHASE1 5
ISEN2 5 IPHASE2 5
ISEN3 5 IPHASE3 5
ISEN_NB 5 IPHASE_NB 5
2
SDATA010,14
R59 0R0402R59 0R0402
2
6262_VCCP_R6262_VCCP
C33
C33
C0.1u16X0402
C0.1u16X0402
R60
R60 X_1KR0402
X_1KR0402
1
VCC5
1
U3
U3
3
GND
VCC
4
SDA
8
OUT1
BUS_SEL
2
7
OUT2
6
OUT3
5
SCL
UP6262M8_SOT23-8-RH
UP6262M8_SOT23-8-RH
R61
R61 10KR0402
10KR0402
6262_VCCNB_R
R58 0R0402R58 0R0402
VCC5
6262_VCCNB
DDR_FB_C 31
SCLK0 10,14
BUS_SEL=100%VCC
I2C address:0X20
MICRO-START INT'L CO.,LTD.
MICRO-START INT'L CO.,LTD.
Title
Title
Title
Intersil ISL6328 3+1 Phase
Intersil ISL6328 3+1 Phase
Intersil ISL6328 3+1 Phase
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet
Date: Sheet
MICRO-START INT'L CO.,LTD.
MS-7696 1.0
MS-7696 1.0
MS-7696 1.0
1
437Tuesday, May 17, 2011
437Tuesday, May 17, 2011
437Tuesday, May 17, 2011
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of
of
5
4
3
2
1
VIN
C37
R68
R68
2.2R1%0805
2.2R1%0805
C40
C40
C1000p50X0402
C1000p50X0402
IPHASE14
ISEN14
C43
C43 C10u25X51206-HF-1
C10u25X51206-HF-1
R76
R76
2.2R1%0805
2.2R1%0805
C45
C45
IPHASE24
C1000p50X0402
C1000p50X0402
ISEN24
C37 C10u25X51206-HF-1
C10u25X51206-HF-1
CH-0.47u45A0.86m-RH
CH-0.47u45A0.86m-RH
CP1CP1
IPHASE1
ISEN1
CH-0.47u45A0.86m-RH
CH-0.47u45A0.86m-RH
CP5CP5
IPHASE2 ISEN2
G
G
R81
R81 10K_1% 0603
10K_1% 0603
G
G
L1
L1
1 2
L3
L3
1 2
VIN
Q77
Q77
D
D
S
S
Q45
Q45
D
D
S
S
VCCP
CP2CP2
C84
C84
C10u6.3X50805
C10u6.3X50805
UGATE_NB4
PHASE_NB4 LGATE_NB4
UGATE_NB
PHASE_NB LGATE_NB
R69 1R69 1
R70 10K_1% 0603R70 10K_1% 0603
R71 0_0805R71 0_0805
colse to choke
VCCP
CP6CP6
C86
C86
C10u6.3X50805
C10u6.3X50805
colse to choke
Q86
Q86
D
D
G
G
S
S
N-P0903BD
N-P0903BD
N-P0603BD
N-P0603BD
X_N-P0903BD
X_N-P0903BD
Q76
Q76
D
D
G
G
S
S
N-P0603BD
N-P0603BD
C67
C67
C1000p50X0402
C1000p50X0402
IPHASE34 ISEN34
C50
C50 C10u25X51206-HF-1
C10u25X51206-HF-1
R83
R83
2.2R1%0805
2.2R1%0805
CH-0.47u45A0.86m-RH
CH-0.47u45A0.86m-RH
CP7CP7
IPHASE3 ISEN3
L4
L4
1 2
CP8CP8
VCCP
C62
C62 C10u6.3X50805
C10u6.3X50805
colse to choke
VIN
Q87
Q87
D
D
G
G
S
S
N-P0903BD
N-P0903BD
Q88
Q88
D
D
G
G
S
S
N-P0603BD
N-P0603BD
VCCP
+
+
EC5 CD820u2.5SO-RH-3
EC5 CD820u2.5SO-RH-3
1 2
+
+
EC6 CD820u2.5SO-RH-3
EC6 CD820u2.5SO-RH-3
1 2
+
+
EC7 CD820u2.5SO-RH-3
EC7 CD820u2.5SO-RH-3
1 2
+
+
EC8 CD820u2.5SO-RH-3
EC8 CD820u2.5SO-RH-3
1 2
+
+
EC9 CD820u2.5SO-RH-3
EC9 CD820u2.5SO-RH-3
1 2
+
+
EC10 CD820u2.5SO-RH-3
EC10 CD820u2.5SO-RH-3
1 2
+
+
EC11 CD820u2.5SO-RH-3
EC11 CD820u2.5SO-RH-3
1 2
+
+
EC12 CD820u2.5SO-RH-3
EC12 CD820u2.5SO-RH-3
1 2
+
+
EC13 C470u2.5pSO-RH
EC13 C470u2.5pSO-RH
1 2
Q89
Q89
D
D
G
G
S
S
C38
C38 C10u25X51206-HF-1
C10u25X51206-HF-1
N-P0603BD
N-P0603BD
IPHASE_NB4 ISEN_NB4
R72
R72
CP3CP3
2.2R1%0805
2.2R1%0805
C42
C42
C1000p50X0402
C1000p50X0402
IPHASE_NB ISEN_NB
VCCP_NB
+
+
EC14 CD820u2.5SO-RH-3
EC14 CD820u2.5SO-RH-3
1 2
+
+
EC15 CD820u2.5SO-RH-3
EC15 CD820u2.5SO-RH-3
1 2
+
+
EC16 CD820u2.5SO-RH-3
EC16 CD820u2.5SO-RH-3
1 2
+
+
EC17 C470u2.5pSO-RH
EC17 C470u2.5pSO-RH
1 2
+
+
EC18 C470u2.5pSO-RH
EC18 C470u2.5pSO-RH
1 2
L2
L2
CH-0.47u45A0.86m-RH
CH-0.47u45A0.86m-RH
1 2
CP4CP4
VCCP_NB
C41
C41 C10u6.3X50805
C10u6.3X50805
colse to choke
Q28
Q25
Q25
D
D
G
G
S
UGATE14
D D
PHASE14 LGATE14
UGATE1
PHASE1 LGATE1
R65 1R65 1
R66 10K_1% 0603R66 10K_1% 0603
R67 0_0805R67 0_0805
S
Q26
Q26
D
D
G
G
S
S
Q28
D
D
G
G
S
S
N-P0903BD
N-P0903BD
N-P0603BD
N-P0603BD
X_N-P0903BD
X_N-P0903BD
Q27
Q27
D
D
G
G
S
S
N-P0603BD
N-P0603BD
VIN
Q43
N-P0903BD
N-P0903BD
N-P0603BD
N-P0603BD
UGATE3
PHASE3
LGATE3
Q43
D
D
G
G
S
S
X_N-P0903BD
X_N-P0903BD
Q30
Q30
D
D
G
G
S
S
N-P0603BD
N-P0603BD
R82 0_0805R82 0_0805
R80 1R80 1
Q39
Q39
D
D
G
C0.1u25X
C0.1u25X
8 7 6 5
G
S
S
Q29
Q29
D
D
G
G
S
S
+12VIN
2.2R1%0805
2.2R1%0805
PWM34
UGATE2
PHASE2 LGATE2
R77
R77
C49
C49
PWM3
R78
R78
UGATE24
PHASE24 LGATE24
C C
B B
C1u16X5
C1u16X5
0R0805
0R0805
C51
C51
1 2 3
R73 1R73 1
R74 10K_1% 0603R74 10K_1% 0603
R75 0_0805R75 0_0805
C1u16X5
C1u16X5
C46
C46
R79 2.2_1%R79 2.2_1%
U4
U4
UGATE
PHASE
BOOT
PVCC
PWM
VCC
GND4LGATE
ISL6612ACBZT_SOIC8-RH
ISL6612ACBZT_SOIC8-RH
A A
MICRO-START INT'L CO.,LTD.
MICRO-START INT'L CO.,LTD.
Title
Title
Title
APU Power
APU Power
APU Power
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet
5
4
3
2
Date: Sheet
MICRO-START INT'L CO.,LTD.
MS-7696 1.0
MS-7696 1.0
MS-7696 1.0
1
537Tuesday, May 17, 2011
537Tuesday, May 17, 2011
537Tuesday, May 17, 2011
of
of
of
5
D D
4
3
2
1
FM1 PCIE I/F
mach@CRB PCIE AC Capacitors:75nF to 200nF Layout: PLACE CAPS WITH APU < 1 INCH
CPU1H
CPU1H
PCI EXPRESS
PCI EXPRESS
P_GFX_RXP0
PE_LAN_RXP PE_LAN_RXN
APU_P_ZVDDP
AF8 AF9 AE7 AE8 AD5 AD6 AD8 AD9 AC7 AC8 AB5 AB6 AB8 AB9 AA7 AA8
AH5 AH6 AH8 AH9 AG7 AG8 AF5 AF6
AL5 AL4 AK3 AK2
W7 W8
AJ2 AJ1 AJ4 AJ5
U7 U8
Y5 Y6 Y8 Y9
V5 V6 V8 V9
T5 T6 T8 T9
J7
P_GFX_RXN0 P_GFX_RXP1 P_GFX_RXN1 P_GFX_RXP2 P_GFX_RXN2 P_GFX_RXP3 P_GFX_RXN3 P_GFX_RXP4 P_GFX_RXN4 P_GFX_RXP5 P_GFX_RXN5 P_GFX_RXP6 P_GFX_RXN6 P_GFX_RXP7 P_GFX_RXN7 P_GFX_RXP8 P_GFX_RXN8 P_GFX_RXP9 P_GFX_RXN9 P_GFX_RXP10 P_GFX_RXN10 P_GFX_RXP11 P_GFX_RXN11 P_GFX_RXP12 P_GFX_RXN12 P_GFX_RXP13 P_GFX_RXN13 P_GFX_RXP14 P_GFX_RXN14 P_GFX_RXP15 P_GFX_RXN15
P_GPP_RXP0 P_GPP_RXN0 P_GPP_RXP1 P_GPP_RXN1 P_GPP_RXP2 P_GPP_RXN2 P_GPP_RXP3 P_GPP_RXN3
P_UMI_RXP0 P_UMI_RXN0 P_UMI_RXP1 P_UMI_RXN1 P_UMI_RXP2 P_UMI_RXN2 P_UMI_RXP3 P_UMI_RXN3
P_ZVDDP
GPP GRAPHICS
GPP GRAPHICS
UMI_LINK
UMI_LINK
GFX_RX0P19 GFX_RX0N19 GFX_RX1P19 GFX_RX1N19 GFX_RX2P19 GFX_RX2N19 GFX_RX3P19 GFX_RX3N19 GFX_RX4P19 GFX_RX4N19 GFX_RX5P19 GFX_RX5N19 GFX_RX6P19 GFX_RX6N19 GFX_RX7P19
C C
B B
VCC_VDDP_B
GFX_RX7N19 GFX_RX8P19 GFX_RX8N19 GFX_RX9P19 GFX_RX9N19 GFX_RX10P19 GFX_RX10N19 GFX_RX11P19 GFX_RX11N19 GFX_RX12P19 GFX_RX12N19 GFX_RX13P19 GFX_RX13N19 GFX_RX14P19 GFX_RX14N19 GFX_RX15P19 GFX_RX15N19
PE_LAN_RXP24 PE_LAN_RXN24 GPP_RXP18 GPP_RXN18
UMI_RX0P13 UMI_RX0N13 UMI_RX1P13 UMI_RX1N13 UMI_RX2P13 UMI_RX2N13 UMI_RX3P13 UMI_RX3N13
R91 196R1%R91 196R1% R92 196R1%R92 196R1%
P_GFX_TXP0 P_GFX_TXN0 P_GFX_TXP1 P_GFX_TXN1 P_GFX_TXP2 P_GFX_TXN2 P_GFX_TXP3 P_GFX_TXN3 P_GFX_TXP4 P_GFX_TXN4 P_GFX_TXP5 P_GFX_TXN5 P_GFX_TXP6 P_GFX_TXN6 P_GFX_TXP7 P_GFX_TXN7 P_GFX_TXP8 P_GFX_TXN8 P_GFX_TXP9
P_GFX_TXN9 P_GFX_TXP10 P_GFX_TXN10 P_GFX_TXP11 P_GFX_TXN11 P_GFX_TXP12 P_GFX_TXN12 P_GFX_TXP13 P_GFX_TXN13 P_GFX_TXP14 P_GFX_TXN14 P_GFX_TXP15 P_GFX_TXN15
P_GPP_TXP0
P_GPP_TXN0
P_GPP_TXP1
P_GPP_TXN1
P_GPP_TXP2
P_GPP_TXN2
P_GPP_TXP3
P_GPP_TXN3
P_UMI_TXP0 P_UMI_TXN0 P_UMI_TXP1 P_UMI_TXN1 P_UMI_TXP2 P_UMI_TXN2 P_UMI_TXP3 P_UMI_TXN3
P_ZVSS
<APU>
<APU>
ROUTE ALL PCIE AS 85OHM +/-10%
GFX_TX0P
AE2
GFX_TX0N
AE1
GFX_TX1P
AE4
GFX_TX1N
AE5
GFX_TX2P
AD2
GFX_TX2N
AD3
GFX_TX3P
AC2
GFX_TX3N
AC1
GFX_TX4P
AC4
GFX_TX4N
AC5
GFX_TX5P
AB2
GFX_TX5N
AB3
GFX_TX6P
AA2
GFX_TX6N
AA1
GFX_TX7P
AA4
GFX_TX7N
AA5
GFX_TX8P
Y2
GFX_TX8N
Y3
GFX_TX9P
W2
GFX_TX9N
W1
GFX_TX10P
W4
GFX_TX10N
W5
GFX_TX11P
V2
GFX_TX11N
V3
GFX_TX12P
U2
GFX_TX12N
U1
GFX_TX13P
U4
GFX_TX13N
U5
GFX_TX14P
T2
GFX_TX14N
T3
GFX_TX15P
R2
GFX_TX15N
R1 AH2
AH3 AG2 AG1 AG4 AG5 AF2 AF3
UMI_TX0P_APU
AK8
UMI_TX0N_APU
AK9
UMI_TX1P_APU
AL7
UMI_TX1N_APU
AL8
UMI_TX2P_APU
AK5
UMI_TX2N_APU
AK6
UMI_TX3P_APU
AJ7
UMI_TX3N_APU
AJ8
APU_P_ZVSS
J6
LAN_TXP LAN_TXN GPP_TXP GPP_TXN
C107 C0.1U10X0402C107 C0.1U10X0402 C108 C0.1U10X0402C108 C0.1U10X0402 C109 C0.1U10X0402C109 C0.1U10X0402 C110 C0.1U10X0402C110 C0.1U10X0402
C111 C0.1U10X0402C111 C0.1U10X0402 C112 C0.1U10X0402C112 C0.1U10X0402 C113 C0.1U10X0402C113 C0.1U10X0402 C114 C0.1U10X0402C114 C0.1U10X0402 C115 C0.1U10X0402C115 C0.1U10X0402 C116 C0.1U10X0402C116 C0.1U10X0402 C117 C0.1U10X0402C117 C0.1U10X0402 C118 C0.1U10X0402C118 C0.1U10X0402
GFX_TX0P 19 GFX_TX0N 19 GFX_TX1P 19 GFX_TX1N 19 GFX_TX2P 19 GFX_TX2N 19 GFX_TX3P 19 GFX_TX3N 19 GFX_TX4P 19 GFX_TX4N 19 GFX_TX5P 19 GFX_TX5N 19 GFX_TX6P 19 GFX_TX6N 19 GFX_TX7P 19 GFX_TX7N 19 GFX_TX8P 19 GFX_TX8N 19 GFX_TX9P 19 GFX_TX9N 19 GFX_TX10P 19 GFX_TX10N 19 GFX_TX11P 19 GFX_TX11N 19 GFX_TX12P 19 GFX_TX12N 19 GFX_TX13P 19 GFX_TX13N 19 GFX_TX14P 19 GFX_TX14N 19 GFX_TX15P 19 GFX_TX15N 19
PE_LAN_TXP 24 PE_LAN_TXN 24 PE_GPP_TXP 18 PE_GPP_TXN 18
UMI_TX0P 13 UMI_TX0N 13 UMI_TX1P 13 UMI_TX1N 13 UMI_TX2P 13 UMI_TX2N 13 UMI_TX3P 13 UMI_TX3N 13
A A
MICRO-START INT'L CO.,LTD.
MICRO-START INT'L CO.,LTD.
Title
Title
Title
FM1 PCIE I/F
FM1 PCIE I/F
FM1 PCIE I/F
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet
5
4
3
2
Date: Sheet
MICRO-START INT'L CO.,LTD.
MS-7696 1.0
MS-7696 1.0
MS-7696 1.0
1
637Tuesday, May 17, 2011
637Tuesday, May 17, 2011
637Tuesday, May 17, 2011
of
of
of
5
4
3
2
1
FM1DDR3 I/F
MEM_MA_DQS_L[7..0]10 MEM_MA_DQS_H[7..0]10
MEM_MA_DM[7..0]10
D D
MEM_MA_ADD[15..0]10
MEM_MA_BANK010 MEM_MA_BANK110 MEM_MA_BANK210
C C
mach@CLOCK assignment can be changed
MEM_MA_CLK_H010 MEM_MA_CLK_L010 MEM_MA_CLK_H110 MEM_MA_CLK_L110 MEM_MA_CLK_H210 MEM_MA_CLK_L210 MEM_MA_CLK_H310 MEM_MA_CLK_L310
MEM_MA_CKE010 MEM_MA_CKE110
MEM_MA0_ODT010
B B
MEM_MA0_ODT110 MEM_MA1_ODT010 MEM_MA1_ODT110
MEM_MA0_CS_L010 MEM_MA0_CS_L110 MEM_MA1_CS_L010 MEM_MA1_CS_L110
MEM_MA_RAS_L10 MEM_MA_CAS_L10 MEM_MA_WE_L10
MEM_MA_RESET#10
APU_M_VREF
VCC_DDR
R93 39.2R1%0402R93 39.2R1%0402
MEM_MA_ADD0 MEM_MA_ADD1 MEM_MA_ADD2 MEM_MA_ADD3 MEM_MA_ADD4 MEM_MA_ADD5 MEM_MA_ADD6 MEM_MA_ADD7 MEM_MA_ADD8 MEM_MA_ADD9 MEM_MA_ADD10 MEM_MA_ADD11 MEM_MA_ADD12 MEM_MA_ADD13 MEM_MA_ADD14 MEM_MA_ADD15
MEM_MA_BANK0 MEM_MA_BANK1 MEM_MA_BANK2
MEM_MA_DM0 MEM_MA_DM1 MEM_MA_DM2 MEM_MA_DM3 MEM_MA_DM4 MEM_MA_DM5 MEM_MA_DM6 MEM_MA_DM7
MEM_MA_DQS_H0 MEM_MA_DQS_L0 MEM_MA_DQS_H1 MEM_MA_DQS_L1 MEM_MA_DQS_H2 MEM_MA_DQS_L2 MEM_MA_DQS_H3 MEM_MA_DQS_L3 MEM_MA_DQS_H4 MEM_MA_DQS_L4 MEM_MA_DQS_H5 MEM_MA_DQS_L5 MEM_MA_DQS_H6 MEM_MA_DQS_L6 MEM_MA_DQS_H7 MEM_MA_DQS_L7
MEM_MA_CLK_H0 MEM_MA_CLK_L0 MEM_MA_CLK_H1 MEM_MA_CLK_L1 MEM_MA_CLK_H2 MEM_MA_CLK_L2 MEM_MA_CLK_H3 MEM_MA_CLK_L3
MEM_MA_CKE0 MEM_MA_CKE1
MEM_MA0_ODT0 MEM_MA0_ODT1 MEM_MA1_ODT0 MEM_MA1_ODT1
MEM_MA0_CS_L0 MEM_MA0_CS_L1 MEM_MA1_CS_L0 MEM_MA1_CS_L1
MEM_MA_RAS_L MEM_MA_CAS_L MEM_MA_WE_L
MEM_MA_RESET# MEM_MA_HOT#
mach@0603???trace width??? Layout: Place within 1.5'' of APU
APU_M_ZVDIO
M25
M24
W26
AF29 AE25 AG21 AF17
G29 G13
G17
G26
G25 AE28 AE29 AG24 AG25 AF20 AF21 AE16 AD16
AA24 AC27 AA25 AC26
AB26
W23 AB25
W25
MA_ADD0
V27
MA_ADD1
P27
MA_ADD2
R25
MA_ADD3
P26
MA_ADD4
R24
MA_ADD5
P24
MA_ADD6
P23
MA_ADD7
N26
MA_ADD8
N23
MA_ADD9 MA_ADD10
V24
MA_ADD11
N25
MA_ADD12 MA_ADD13
Y23
MA_ADD14
L27
MA_ADD15
L24
MA_BANK0 MA_BANK1
V25
MA_BANK2
L26
MA_DM0
H12
MA_DM1
E17
MA_DM2
H21
MA_DM3
F25
MA_DM4 MA_DM5 MA_DM6 MA_DM7 MA_DM8
MA_DQS_H0 MA_DQS_L0
F13
MA_DQS_H1
H17
MA_DQS_L1 MA_DQS_H2
F21
MA_DQS_L2
E21
MA_DQS_H3 MA_DQS_L3 MA_DQS_H4 MA_DQS_L4 MA_DQS_H5 MA_DQS_L5 MA_DQS_H6 MA_DQS_L6 MA_DQS_H7 MA_DQS_L7 MA_DQS_H8
F30
MA_DQS_L8
E30
MA_CLK_H0
U27
MA_CLK_L0
U26
MA_CLK_H1
T23
MA_CLK_L1
U23
MA_CLK_H2
T25
MA_CLK_L2
T26
MA_CLK_H3
R27
MA_CLK_L3
R28
MA_CKE0
L23
MA_CKE1
K26
MA0_ODT0 MA0_ODT1 MA1_ODT0 MA1_ODT1
MA0_CS_L0
Y27
MA0_CS_L1 MA1_CS_L0 MA1_CS_L1
MA_RAS_L MA_CAS_L
Y24
MA_WE_L
Y26
MA_RESET_L
J25
MA_EVENT_L
U24
M_VREF
K22
M_ZVDDIO
J24
VCC_DDR
R95 1KR0402R95 1KR0402
A A
R96 1KR0402R96 1KR0402
MEM_MA_HOT# MEM_MB_HOT#
CPU1A
CPU1A
MEMORY CHANNEL A
MEMORY CHANNEL A
MEM_MA_DATA[63..0] 10
E12 F12 H14 E15 G11 H11 E14 G14
F16 G16 H18 F19 F15 H15 E18 F18
G20 H20 E23 G23 G19 E20 F22 G22
F24 H24 E27 F27 H23 E24 E26 H26
AD30 AF30 AG27 AF27 AD31 AE31 AG28 AD28
AF26 AD25 AF23 AE23 AD27 AE26 AF24 AD24
AG22 AD21 AE19 AG19 AD22 AE22 AE20 AD19
AG18 AE17 AF15 AG15 AD18 AF18 AG16 AD15
F28 E29 G31 H30 H27 G28 F31 H29
R94
R94
1KR1%0402
1KR1%0402
R97
R97
1KR1%0402
1KR1%0402
MEM_MA_DATA0 MEM_MA_DATA1 MEM_MA_DATA2 MEM_MA_DATA3 MEM_MA_DATA4 MEM_MA_DATA5 MEM_MA_DATA6 MEM_MA_DATA7
MEM_MA_DATA8 MEM_MA_DATA9 MEM_MA_DATA10 MEM_MA_DATA11 MEM_MA_DATA12 MEM_MA_DATA13 MEM_MA_DATA14 MEM_MA_DATA15
MEM_MA_DATA16 MEM_MA_DATA17 MEM_MA_DATA18 MEM_MA_DATA19 MEM_MA_DATA20 MEM_MA_DATA21 MEM_MA_DATA22 MEM_MA_DATA23
MEM_MA_DATA24 MEM_MA_DATA25 MEM_MA_DATA26 MEM_MA_DATA27 MEM_MA_DATA28 MEM_MA_DATA29 MEM_MA_DATA30 MEM_MA_DATA31
MEM_MA_DATA32 MEM_MA_DATA33 MEM_MA_DATA34 MEM_MA_DATA35 MEM_MA_DATA36 MEM_MA_DATA37 MEM_MA_DATA38 MEM_MA_DATA39
MEM_MA_DATA40 MEM_MA_DATA41 MEM_MA_DATA42 MEM_MA_DATA43 MEM_MA_DATA44 MEM_MA_DATA45 MEM_MA_DATA46 MEM_MA_DATA47
MEM_MA_DATA48 MEM_MA_DATA49 MEM_MA_DATA50 MEM_MA_DATA51 MEM_MA_DATA52 MEM_MA_DATA53 MEM_MA_DATA54 MEM_MA_DATA55
MEM_MA_DATA56 MEM_MA_DATA57 MEM_MA_DATA58 MEM_MA_DATA59 MEM_MA_DATA60 MEM_MA_DATA61 MEM_MA_DATA62 MEM_MA_DATA63
VCC_DDR
C119
C119
C0.1u16X0402-RH
C0.1u16X0402-RH
C120
C120
MEM_MB_DQS_L[7..0]11 MEM_MB_DQS_H[7..0]11
MEM_MB_DM[7..0]11
APU_M_VREF
C121
C121
MEM_MB_ADD[15..0]11
MEM_MB_BANK011 MEM_MB_BANK111 MEM_MB_BANK211
MEM_MB_CLK_H011 MEM_MB_CLK_L011 MEM_MB_CLK_H111 MEM_MB_CLK_L111 MEM_MB_CLK_H211 MEM_MB_CLK_L211 MEM_MB_CLK_H311 MEM_MB_CLK_L311
MEM_MB_CKE011 MEM_MB_CKE111
MEM_MB0_ODT011 MEM_MB0_ODT111 MEM_MB1_ODT011 MEM_MB1_ODT111
MEM_MB0_CS_L011 MEM_MB0_CS_L111 MEM_MB1_CS_L011 MEM_MB1_CS_L111
MEM_MB_RAS_L11 MEM_MB_CAS_L11 MEM_MB_WE_L11
MEM_MB_RESET#11MEM_MA_HOT#10
MEM_MB_HOT#11
Layout: Place within 1.5'' of APU
MEM_MB_ADD0 MEM_MB_ADD1 MEM_MB_ADD2 MEM_MB_ADD3 MEM_MB_ADD4 MEM_MB_ADD5 MEM_MB_ADD6 MEM_MB_ADD7 MEM_MB_ADD8 MEM_MB_ADD9 MEM_MB_ADD10 MEM_MB_ADD11 MEM_MB_ADD12 MEM_MB_ADD13 MEM_MB_ADD14 MEM_MB_ADD15
MEM_MB_BANK0 MEM_MB_BANK1 MEM_MB_BANK2
MEM_MB_DM0 MEM_MB_DM1 MEM_MB_DM2 MEM_MB_DM3 MEM_MB_DM4 MEM_MB_DM5 MEM_MB_DM6 MEM_MB_DM7
MEM_MB_DQS_H0 MEM_MB_DQS_L0 MEM_MB_DQS_H1 MEM_MB_DQS_L1 MEM_MB_DQS_H2 MEM_MB_DQS_L2 MEM_MB_DQS_H3 MEM_MB_DQS_L3 MEM_MB_DQS_H4 MEM_MB_DQS_L4 MEM_MB_DQS_H5 MEM_MB_DQS_L5 MEM_MB_DQS_H6 MEM_MB_DQS_L6 MEM_MB_DQS_H7 MEM_MB_DQS_L7
MEM_MB_CLK_H0 MEM_MB_CLK_L0 MEM_MB_CLK_H1 MEM_MB_CLK_L1 MEM_MB_CLK_H2 MEM_MB_CLK_L2 MEM_MB_CLK_H3 MEM_MB_CLK_L3
MEM_MB_CKE0 MEM_MB_CKE1
MEM_MB0_ODT0 MEM_MB0_ODT1 MEM_MB1_ODT0 MEM_MB1_ODT1
MEM_MB0_CS_L0 MEM_MB0_CS_L1 MEM_MB1_CS_L0 MEM_MB1_CS_L1
MEM_MB_RAS_L MEM_MB_CAS_L MEM_MB_WE_L
MEM_MB_RESET# MEM_MB_HOT#
M30 M31 M28 M27
W31
AB28
W29
AL29 AH25 AK21
AJ17
AJ29 AH29 AK25 AL25
AJ20
AJ21 AL16 AL17
AA30 AC30 AA31 AC29
AB29 AB31
W28 AA27 AA28
MB_ADD0
V31
MB_ADD1
N28
MB_ADD2
P29
MB_ADD3
N29
MB_ADD4
N31
MB_ADD5 MB_ADD6 MB_ADD7 MB_ADD8 MB_ADD9
L30
MB_ADD10 MB_ADD11
L29
MB_ADD12
K28
MB_ADD13 MB_ADD14
K31
MB_ADD15
J31
MB_BANK0 MB_BANK1
V30
MB_BANK2
K29
MB_DM0
B12
MB_DM1
D16
MB_DM2
B20
MB_DM3
A25
MB_DM4 MB_DM5 MB_DM6 MB_DM7 MB_DM8
D29
MB_DQS_H0
D13
MB_DQS_L0
C13
MB_DQS_H1
A17
MB_DQS_L1
B17
MB_DQS_H2
B21
MB_DQS_L2
C21
MB_DQS_H3
D25
MB_DQS_L3
C25
MB_DQS_H4 MB_DQS_L4 MB_DQS_H5 MB_DQS_L5 MB_DQS_H6 MB_DQS_L6 MB_DQS_H7 MB_DQS_L7 MB_DQS_H8
B29
MB_DQS_L8
A29
MB_CLK_H0
U30
MB_CLK_L0
U29
MB_CLK_H1
T29
MB_CLK_L1
T28
MB_CLK_H2
R31
MB_CLK_L2
T31
MB_CLK_H3
P30
MB_CLK_L3
R30
MB_CKE0
J30
MB_CKE1
J28
MB0_ODT0 MB0_ODT1 MB1_ODT0 MB1_ODT1
MB0_CS_L0
Y29
MB0_CS_L1 MB1_CS_L0
Y30
MB1_CS_L1
MB_RAS_L MB_CAS_L MB_WE_L
MB_RESET_L
J27
MB_EVENT_L
V28
MA_DATA0 MA_DATA1 MA_DATA2 MA_DATA3 MA_DATA4 MA_DATA5 MA_DATA6 MA_DATA7
MA_DATA8
MA_DATA9 MA_DATA10 MA_DATA11 MA_DATA12 MA_DATA13 MA_DATA14 MA_DATA15
MA_DATA16 MA_DATA17 MA_DATA18 MA_DATA19 MA_DATA20 MA_DATA21 MA_DATA22 MA_DATA23
MA_DATA24 MA_DATA25 MA_DATA26 MA_DATA27 MA_DATA28 MA_DATA29 MA_DATA30 MA_DATA31
MA_DATA32 MA_DATA33 MA_DATA34 MA_DATA35 MA_DATA36 MA_DATA37 MA_DATA38 MA_DATA39
MA_DATA40 MA_DATA41 MA_DATA42 MA_DATA43 MA_DATA44 MA_DATA45 MA_DATA46 MA_DATA47
<APU>
<APU>
MA_DATA48 MA_DATA49 MA_DATA50 MA_DATA51 MA_DATA52 MA_DATA53 MA_DATA54 MA_DATA55
MA_DATA56 MA_DATA57 MA_DATA58 MA_DATA59 MA_DATA60 MA_DATA61 MA_DATA62 MA_DATA63
MA_CHECK0 MA_CHECK1 MA_CHECK2 MA_CHECK3 MA_CHECK4 MA_CHECK5 MA_CHECK6 MA_CHECK7
?
?
CPU1B
CPU1B
MEMORY CHANNEL B
MEMORY CHANNEL B
MEM_MB_DATA[63..0] 11
D11 C12 A14 B14 B11 A11 A13 D14
A16 C16 B18 A19 C15 B15 D17 C18
D20 A20 D22 D23 C19 D19 A22 C22
C24 B24 B26 C27 A23 B23 D26 A26
AJ30 AK30 AH28 AJ27 AG30 AH31 AK28 AL28
AJ26 AH26 AH23 AJ23 AK27 AL26 AJ24 AK24
AK22 AH22 AL19 AK19 AL23 AL22 AH20 AL20
AJ18 AH17 AJ15 AK15 AH19 AK18 AK16 AH16
A28 D28 C30 D31 B27 C28 B30 C31
MEM_MB_DATA0 MEM_MB_DATA1 MEM_MB_DATA2 MEM_MB_DATA3 MEM_MB_DATA4 MEM_MB_DATA5 MEM_MB_DATA6 MEM_MB_DATA7
MEM_MB_DATA8 MEM_MB_DATA9 MEM_MB_DATA10 MEM_MB_DATA11 MEM_MB_DATA12 MEM_MB_DATA13 MEM_MB_DATA14 MEM_MB_DATA15
MEM_MB_DATA16 MEM_MB_DATA17 MEM_MB_DATA18 MEM_MB_DATA19 MEM_MB_DATA20 MEM_MB_DATA21 MEM_MB_DATA22 MEM_MB_DATA23
MEM_MB_DATA24 MEM_MB_DATA25 MEM_MB_DATA26 MEM_MB_DATA27 MEM_MB_DATA28 MEM_MB_DATA29 MEM_MB_DATA30 MEM_MB_DATA31
MEM_MB_DATA32 MEM_MB_DATA33 MEM_MB_DATA34 MEM_MB_DATA35 MEM_MB_DATA36 MEM_MB_DATA37 MEM_MB_DATA38 MEM_MB_DATA39
MEM_MB_DATA40 MEM_MB_DATA41 MEM_MB_DATA42 MEM_MB_DATA43 MEM_MB_DATA44 MEM_MB_DATA45 MEM_MB_DATA46 MEM_MB_DATA47
MEM_MB_DATA48 MEM_MB_DATA49 MEM_MB_DATA50 MEM_MB_DATA51 MEM_MB_DATA52 MEM_MB_DATA53 MEM_MB_DATA54 MEM_MB_DATA55
MEM_MB_DATA56 MEM_MB_DATA57 MEM_MB_DATA58 MEM_MB_DATA59 MEM_MB_DATA60 MEM_MB_DATA61 MEM_MB_DATA62 MEM_MB_DATA63
MB_DATA0 MB_DATA1 MB_DATA2 MB_DATA3 MB_DATA4 MB_DATA5 MB_DATA6 MB_DATA7
MB_DATA8
MB_DATA9 MB_DATA10 MB_DATA11 MB_DATA12 MB_DATA13 MB_DATA14 MB_DATA15
MB_DATA16 MB_DATA17 MB_DATA18 MB_DATA19 MB_DATA20 MB_DATA21 MB_DATA22 MB_DATA23
MB_DATA24 MB_DATA25 MB_DATA26 MB_DATA27 MB_DATA28 MB_DATA29 MB_DATA30 MB_DATA31
MB_DATA32 MB_DATA33 MB_DATA34 MB_DATA35 MB_DATA36 MB_DATA37 MB_DATA38 MB_DATA39
MB_DATA40 MB_DATA41 MB_DATA42 MB_DATA43 MB_DATA44 MB_DATA45 MB_DATA46 MB_DATA47
<APU>
<APU>
MB_DATA48 MB_DATA49 MB_DATA50 MB_DATA51 MB_DATA52 MB_DATA53 MB_DATA54 MB_DATA55
MB_DATA56 MB_DATA57 MB_DATA58 MB_DATA59 MB_DATA60 MB_DATA61 MB_DATA62 MB_DATA63
MB_CHECK0 MB_CHECK1 MB_CHECK2 MB_CHECK3 MB_CHECK4 MB_CHECK5 MB_CHECK6 MB_CHECK7
?
?
MICRO-START INT'L CO.,LTD.
MICRO-START INT'L CO.,LTD.
Title
Title
C0.1u16X0402-RH
C0.1u16X0402-RH
5
4
C1000P50X0402
C1000P50X0402
3
2
Title
FM1 DDR3 I/F
FM1 DDR3 I/F
FM1 DDR3 I/F
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet
Date: Sheet
MICRO-START INT'L CO.,LTD.
MS-7696 1.0
MS-7696 1.0
MS-7696 1.0
1
737Tuesday, May 17, 2011
737Tuesday, May 17, 2011
737Tuesday, May 17, 2011
of
of
of
5
APU_PROCHOT#13
APU_CLK13 APU_CLK#13
DISP_CLK13 DISP_CLK#13
APU_SIC14,26 APU_SID14,26
APU_RST#13
APU_PWRGD4,13
C122 C0.1U10X0402C122 C0.1U10X0402 C123 C0.1U10X0402C123 C0.1U10X0402
C132 C0.1U16X0402C132 C0.1U16X0402 C124 C0.1U16X0402C124 C0.1U16X0402
C125 C0.1U16X0402C125 C0.1U16X0402 C126 C0.1U16X0402C126 C0.1U16X0402
C127 C0.1U16X0402C127 C0.1U16X0402 C128 C0.1U16X0402C128 C0.1U16X0402
APU_SVC4 APU_SVD4
APU_SIC APU_SID
APU_RST# APU_PWRGD
DP0_TX0P15 DP0_TX0N15
DP0_TX1P15
FM1 DISPLAY I/F
D D
C C
DP0_TX1N15 DP0_TX2P15
DP0_TX2N15 DP0_TX3P15
DP0_TX3N15 DP1_TX0P23
DP1_TX0N23 DP1_TX1P23
DP1_TX1N23 DP1_TX2P23
DP1_TX2N23 DP1_TX3P23
DP1_TX3N23
VCC_DDR
R110
R110
B
10KR0402
APU_THERMTRIP#
N-SST3904_SOT23
N-SST3904_SOT23
APU_ALERT#
B B
N-SST3904_SOT23
N-SST3904_SOT23
Q17
Q17
Q18
Q18
VCC_DDR
B
CE
R122
R122
CE
10KR0402
10KR0402
10KR0402
FCH_THERMTRIP# 14
FCH_TALERT# 15
NBCOREFB+4
VDDIOFB+31 COREFB+4
COREFB-4
PULL UP
VCC_DDR
R128 1KR0402R128 1KR0402 R129 1KR0402R129 1KR0402
R132 300R0402R132 300R0402 R133 300R0402R133 300R0402
R135 300R0402R135 300R0402 R136 1KR0402R136 1KR0402 R138 1KR0402R138 1KR0402
R144 1KR0402R144 1KR0402
VCC_DDR
A A
R150 1KR0402R150 1KR0402
R151 X_220R0402R151 X_220R0402
R152 1KR0402R152 1KR0402
R153 X_220R0402R153 X_220R0402
APU_SIC APU_SID
APU_RST#
APU_PWRGD
APU_PROCHOT# APU_ALERT# APU_THERMTRIP#
FCH_DMA_ACTIVE#
APU_SVC
APU_SVD
VCC3_SB
R156 10KR0402R156 10KR0402
APU_FM1R1
5
VCC_DDR
R130 10KR5%/4R130 10KR5%/4 R131 10KR5%/4R131 10KR5%/4
R134 10KR5%/4R134 10KR5%/4 R137 10KR5%/4R137 10KR5%/4
R145 10KR5%/4R145 10KR5%/4 R149 10KR5%/4R149 10KR5%/4
R154 10KR5%/4R154 10KR5%/4 R155 10KR5%/4R155 10KR5%/4
APU_SVC APU_SVD
APU_PROCHOT# APU_THERMTRIP# APU_ALERT#
TP15TP15
COREFB+
TP16TP16
COREFB-
4
DP0_TX0P_APU DP0_TX0N_APU
DP0_TX1P_APU DP0_TX1N_APU
DP0_TX2P_APU DP0_TX2N_APU
DP0_TX3P_APU DP0_TX3N_APU
DP1_TX0P DP1_TX0N
DP1_TX1P DP1_TX1N
DP1_TX2P DP1_TX2N
DP1_TX3P DP1_TX3N
CPU_TDI CPU_TDO CPU_TCK CPU_TMS CPU_TRST# CPU_DBRDY CPU_DBREQ#
VDDP_SENSE
VDDR_SENSE
Q19
Q19
2 5
Q20
Q20
2 5
Q21
Q21
2 5
Q22
Q22
2 5
4
ANALOG/DISPLAY/MISC
ANALOG/DISPLAY/MISC
DP0_TXP0
M2
DP0_TXN0
M3
DP0_TXP1
L2
DP0_TXN1
L1
DP0_TXP2
L4
DP0_TXN2
L5
DP0_TXP3
K2
DP0_TXN3
K3
DP1_TXP0
R4
DP1_TXN0
R5
DP1_TXP1
P2
DP1_TXN1
P3
DP1_TXP2
N2
DP1_TXN2
N1
DP1_TXP3
N4
DP1_TXN3
N5
CLKIN_H
AL12
CLKIN_L
AK12
DISP_CLKIN_H
AH12
DISP_CLKIN_L
AG12
SVC
A8
SVD
B8
SIC
AF10
SID
AG10
RESET_L
AJ13
PWROK
AG11
PROCHOT_L
AL14
THERMTRIP_L
AK14
ALERT_L
AD10
TDI
E9
TDO
G10
TCK
E8
TMS
D8
TRST_L
F10
DBRDY
D7
DBREQ_L
F8
RSVD_1
E11
RSVD_2
H9
RSVD_3
K23
RSVD_4
K25
RSVD_5
AF13
VDDP_SENSE
B5
VDDNB_SENSE
A6
VDDIO_SENSE
B6
VDD_SENSE
C7
VDDR_SENSE
A5
VSS_SENSE
C6
CPU_TMS
6 1
APU_RST#
3 4
NN-CMKT3904_SOT363-6-RH
NN-CMKT3904_SOT363-6-RH
CPU_DBREQ#
6 1 3
CPU_DBRDY
4
NN-CMKT3904_SOT363-6-RH
NN-CMKT3904_SOT363-6-RH
6
CPU_TDO
1
CPU_TDI
3 4
NN-CMKT3904_SOT363-6-RH
NN-CMKT3904_SOT363-6-RH
CPU_TRST#
6 1
CPU_TCK
3 4
NN-CMKT3904_SOT363-6-RH
NN-CMKT3904_SOT363-6-RH
CPU1C
CPU1C
DISPLAY PORT 0
DISPLAY PORT 0
DISPLAY PORT MISC.
DISPLAY PORT MISC.
DISPLAY PORT 1
DISPLAY PORT 1
CLK
CLK
CTRL S ER.
CTRL S ER.
TEST
TEST
JTAG
JTAG
SENSE RSVD
SENSE RSVD
?
?
IMC_TMS 26,27 IMC_CRST# 26,27
IMC_DBREQ# 26,27 IMC_DBRDY 26,27
IMC_TDI 26,27
IMC_TDO 26,27
IMC_TRST# 26,27 IMC_TCK 26,27
DP_AUX_ZVSS
DP_BLON
DP_DIGON
DP_VARY_BL
DP0_AUXP DP0_AUXN
DP1_AUXP DP1_AUXN
DP2_AUXP DP2_AUXN
DP3_AUXP DP3_AUXN
DP4_AUXP DP4_AUXN
DP5_AUXP DP5_AUXN
DP0_HPD DP1_HPD DP2_HPD DP3_HPD DP4_HPD DP5_HPD
THERMDA THERMDC
TEST2 TEST3 TEST6
TEST9 TEST10 TEST12 TEST14 TEST15 TEST16 TEST17 TEST18 TEST19 TEST20 TEST21 TEST22 TEST23 TEST24
TEST25_H TEST25_L TEST28_H TEST28_L TEST30_H <APU>
<APU>
TEST30_L
TEST31
TEST32_H TEST32_L
TEST35
FM1R1
DMAACTIVE_L
DP_AUX_ZVSS
J9
APU_BLON
G9
APU_DIGON
G7
APU_BLPWM
H8 K6
K8 L7
L8 R7
R8 P8
P9 N7
N8 M8
M9 K9
K5
DP2_HPD
P5
DP3_HPD
P6
DP4_HPD
M5
DP5_HPD
M6 AH14
AG14 AB23 AC24 AG13
APU_TEST9
D10 C10
APU_TEST12
F6
APU_TEST14
D9
APU_TEST15
C9
APU_TEST16
B9
APU_TEST17
A9
APU_TEST18
E4
APU_TEST19
F5
APU_TEST20
D4
APU_TEST21
D5
APU_TEST22
E5
APU_TEST23
F7
APU_TEST24
E6
APU_TEST25_H
AE11
APU_TEST25_L
AD11
APU_TEST28_H
G5
APU_TEST28_L
G6
APU_TEST30_H
AD14
APU_TEST30_L
AE14
APU_TEST31
AG31
APU_TEST32_H
AE13
APU_TEST32L
AD13
APU_TEST35
A7
APU_FM1R1
AC12
FCH_DMA_ACTIVE#
AF11
3
Layout: Place within 1.5'' of APU
R98 150R1%0402R98 150R1%0402
TP1TP1 TP2TP2 TP3TP3
DP0_AUXP 15 DP0_AUXN 15
DP1_AUXP 23 DP1_AUXN 23
R99 100KR0402R99 100KR0402 R100 100KR0402R100 100KR0402 R101 100KR0402R101 100KR0402 R102 100KR0402R102 100KR0402
R103 0R0402R103 0R0402
R104 1KR0402R104 1KR0402 TP6TP6 TP7TP7 TP8TP8 TP9TP9
R105 1KR0402R105 1KR0402
R106 1KR0402R106 1KR0402
R107 1KR0402R107 1KR0402
R108 1KR0402R108 1KR0402
R109 1KR0402R109 1KR0402 TP10TP10
R111 1KR0402R111 1KR0402
R114 511R1%0402R114 511R1%0402
R112 511R1%0402R112 511R1%0402 TP12TP12 TP11TP11
R116 X_39.2R1%0402R116 X_39.2R1%0402
R117 X_39.2R1%0402R117 X_39.2R1%0402
R118 39.2R1%0402R118 39.2R1%0402 TP13TP13 TP14TP14
R119 X_300R0402R119 X_300R0402
R120 300R0402R120 300R0402
APU_FM1R1 32
FCH_DMA_ACTIVE# 13
3
TP4TP4 TP5TP5
DP0_VGA_HPD 15
DP1_HPD 23
CPU_VDDP
VCC_DDR
VCC_DDR
CPU_TRST#
VCC_DDR
VCC_DDR
R139 X_0R0402R139 X_0R0402 R141 X_10KR0402R141 X_10KR0402 R143 X_10KR0402R143 X_10KR0402 R146 X_10KR0402R146 X_10KR0402
2
APU_TEST18 APU_TEST19 APU_TEST21 APU_TEST22 APU_TEST12 APU_TEST24 APU_TEST20
R123 1KR0402R123 1KR0402 R124 1KR0402R124 1KR0402 R125 1KR0402R125 1KR0402 R126 1KR0402R126 1KR0402 R127 300R0402R127 300R0402
CPU_TDI CPU_TCK CPU_TMS CPU_TRST# CPU_DBREQ#
HDT+ Connector
J2
J2
1
CPU_VDDIO
3
GND
5
GND
7
GND CPU_TRST_L9CPU_PWROK_BUF CPU_DBRDY311CPU_RST_L_BUF CPU_DBRDY213CPU_DBRDY0 CPU_DBRDY115CPU_DBREQ_L
17
GND CPU_VDDIO19CPU_PLLTEST1
X_H2X10SM-1.27PITCH_BLUE-RH
X_H2X10SM-1.27PITCH_BLUE-RH
2
CPU_TCK CPU_TMS
CPU_TDI
CPU_TDO
CPU_PLLTEST0
1
SCAN Connector
TP18TP18 TP19TP19 TP20TP20 TP24TP24 TP25TP25 TP26TP26 TP27TP27
2 4 6 8 10 12 14 16 18 20
CPU_TCK CPU_TMS CPU_TDI CPU_TDO
APU_PWROK_BUF
APU_LDT_RST_BUF
CPU_DBREQ#
R147 X_15R0402R147 X_15R0402 R148 X_15R0402R148 X_15R0402
Title
Title
Title
FM1 DISPLAY/MSIC
FM1 DISPLAY/MSIC
FM1 DISPLAY/MSIC
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet
Date: Sheet
R140 X_0R0402R140 X_0R0402 R142 X_0R0402R142 X_0R0402
CPU_DBRDY
APU_TEST19 APU_TEST18
MICRO-START INT'L CO.,LTD.
MICRO-START INT'L CO.,LTD.
MICRO-START INT'L CO.,LTD.
MS-7696 1.0
MS-7696 1.0
MS-7696 1.0
APU_PWRGD
APU_RST#
08 37Tuesday, May 17, 2011
08 37Tuesday, May 17, 2011
1
08 37Tuesday, May 17, 2011
of
of
of
5
VDDA_25VDDA25
FB1
FB1
30L3A-40_0805-RH
C151
C151
C193
C193
C10u6.3X5
C10u6.3X5
30L3A-40_0805-RH
C3300p50X0402
C3300p50X0402
C152
C152
C0.22U16X
C0.22U16X
C153
C153
C0.22U16X
C0.22U16X
C154
C154
C180P50N0402
C180P50N0402
C155
C155
C180P50N0402
C180P50N0402
C192
C192
C191
C191
C4.7u6.3X5
C4.7u6.3X5
C0.22U16X
D D
VCC_DDR
C147
C147
C148
C148
C22u6.3X50805
C22u6.3X50805
C22u6.3X50805
C22u6.3X50805
C0.22U16X
BOTTOM SIDE
C149
C149
C150
C150
C4.7u6.3X5
C4.7u6.3X5
C4.7u6.3X5
C4.7u6.3X5
VCC_DDR
C C
B B
C158
C158
C22u6.3X50805
C22u6.3X50805
BOTTOM SIDE
VCCP
C167
C167
C22u6.3X50805
C22u6.3X50805
C159
C159
C168
C168
C22u6.3X50805
C22u6.3X50805
C22u6.3X50805
C22u6.3X50805
C160
C160
C169
C169
C10u6.3X50805
C10u6.3X50805
C22u6.3X50805
C22u6.3X50805
C161
C161
C170
C170
C4.7u6.3X5
C4.7u6.3X5
C22u6.3X50805
C22u6.3X50805
C162
C162
C0.22U16X
C0.22U16X
C171
C171
C22u6.3X50805
C22u6.3X50805
C163
C163
C0.22U16X
C0.22U16X
C172
C172
C22u6.3X50805
C22u6.3X50805
C164
C164
C0.22U16X
C0.22U16X
C173
C173
C22u6.3X50805
C22u6.3X50805
C165
C165
C180P50N0402
C180P50N0402
C174
C174
C22u6.3X50805
C22u6.3X50805
C166
C166
C180P50N0402
C180P50N0402
C175
C175
C22u6.3X50805
C22u6.3X50805
C176
C176
C22u6.3X50805
C22u6.3X50805
VCCP VCCP
C194
C194
C47u6.3X1206
C47u6.3X1206
C195
C195
C47u6.3X1206
C47u6.3X1206
C196
C196
C47u6.3X1206
C47u6.3X1206
C197
C47u6.3X1206
C47u6.3X1206
C198
C198
C47u6.3X1206
C47u6.3X1206
C199
C199
C47u6.3X1206
C47u6.3X1206
C204
C204
C0.22U16X
C0.22U16X
C205
C205
C0.22U16X
C0.22U16X
C197
VCCP VCCP
C221
C221
C220
C220
C219
A A
C219
0.01u/16X7/4
0.01u/16X7/4
0.01u/16X7/4
0.01u/16X7/4
C226
C226
C227
C227
0.01u/16X7/4
0.01u/16X7/4
C228
C228
C229
C229
C230
C230
VCCP
C200
C200
4
CPU1E
CPU1E
POWER
POWER
AA23 AA26 AA29 AB22 AB24 AB27 AB30 AC23 AC25 AC28 AC31
K24 K27 K30
M23 M26 M29 N24 N27 N30 P22 P25 P28 P31 R23 R26 R29
U25 U28 U31 V22 V23 V26 V29 W24 W27 W30 Y22 Y25 Y28 Y31
M22
VDDIO
J26
VDDIO
J29
VDDIO VDDIO VDDIO VDDIO
L25
VDDIO
L28
VDDIO
L31
VDDIO VDDIO VDDIO VDDIO VDDIO VDDIO VDDIO VDDIO VDDIO VDDIO VDDIO VDDIO VDDIO VDDIO
T22
VDDIO
T24
VDDIO
T27
VDDIO
T30
VDDIO VDDIO VDDIO VDDIO VDDIO VDDIO VDDIO VDDIO VDDIO VDDIO VDDIO VDDIO VDDIO VDDIO VDDIO VDDIO VDDIO VDDIO VDDIO VDDIO VDDIO VDDIO VDDIO VDDIO VDDIO VDDIO
VDDA
AD12
VDDA
AE12
VDDNB
A3
VDDNB
A4
VDDNB
B3
VDDNB
B4
VDDNB
C1
VDDNB
C2
VDDNB
C3
VDDNB
C4
VDDNB
C5
VDDNB
D1
VDDNB
D2
VDDNB
D3
VDDNB
E1
VDDNB
E2
VDDNB
E3
VDDNB
F1
VDDNB
F2
VDDNB
F3
VDDNB
F4 M14 N13
AH10 AJ10 AK10 AL10
AH11 AJ11 AK11 AL11
J1 J2 J3 J4
H1 H2 H3 H4
<APU>
<APU>
C156 C22u6.3X50805C156 C22u6.3X50805 C157 C22u6.3X50805C157 C22u6.3X50805
VDDNB_CAP_1 VDDNB_CAP_2
VDDP_A_1 VDDP_A_2 VDDP_A_3 VDDP_A_4
VDDR VDDR VDDR VDDR
VDDP_B_1 VDDP_B_2 VDDP_B_3 VDDP_B_4
VDDR VDDR VDDR VDDR
?
?
VDDP and VDDR support two separate power planes with single regulator
CPU_VDDP VCC_VDDP_B
C178
C178
C4.7u6.3X5
C4.7u6.3X5
C179
C179
C180
C180
C10u6.3X5
C10u6.3X5
C10u6.3X5
C10u6.3X5
CPU_VDDR
VDDA25VCC_DDR
VCCP_NB
CPU_VDDP
CPU_VDDR
VCC_VDDP_B
CPU_VDDR_B
C181
C181
C0.22U16X
C0.22U16X
3
VCCP VCCP
VDD
VDD
VDD
M12
VDD
P12
VDD
H10
VDD
H6
VDD
U19
VDD
J11
VDD
J13
VDD
J15
VDD
J17
VDD
J19
VDD
J21
VDD
J5
VDD
K10
VDD
K12
VDD
K14
VDD
K16
VDD
K18
VDD
K20
VDD
K4
VDD
L11
VDD
W19
VDD
L15
VDD
L17
VDD
N19
VDD
L21
VDD
L3
VDD
L6
VDD
M1
VDD
M10
VDD
W13
VDD
M16
VDD
M18
VDD
M20
VDD
U21
VDD
M4
VDD
M7
VDD
N11
VDD
N21
VDD
P1
VDD
P10
VDD
P20
VDD
R11
VDD
R21
VDD
R3
VDD
R6
VDD
T1
VDD
T10
VDD
T12
VDD
T20
VDD
T4
VDD
T7
C185
C182
C182
C1000P50X0402
C1000P50X0402
C183
C183
C1000P50X0402
C1000P50X0402
C184
C184
C180P50N0402
C180P50N0402
C185
C10u6.3X5
C10u6.3X5
CPU_VDDR_B
C186
C186
2
CPU1F
CPU1F
VSS
VSS
VSS_1
CPU1D
CPU1D
VDD
U11
VDD
U13
VDD
V1
VDD
V10
VDD
V12
VDD
V20
VDD
W11
VDD
W21
VDD
W3
VDD
W6
VDD
Y1
VDD
Y10
VDD
Y12
VDD
Y14
VDD
Y16
VDD
Y18
VDD
Y20
VDD
Y4
VDD
Y7
VDD
AA11
VDD
AA13
VDD
AA15
VDD
AA17
VDD
AA19
VDD
AA21
VDD
AB1
VDD
AB10
VDD
R13
VDD
AB14
VDD
AB16
VDD
AB18
VDD
R19
VDD
AC11
VDD
AC13
VDD
AC15
VDD
AC17
VDD
AC19
VDD
AC21
VDD
AC3
VDD
AC6
VDD
AD1
VDD
AD4
VDD
AD7
VDD
AF1
VDD
AG3
VDD
AG6
VDD
AH1
VDD
AH4
VDD
AH7
VDD
AK4
VDD
AK7
?
?
<APU>
<APU>
A10
VSS_2
A12
VSS_3
A15
VSS_4
A18
VSS_5
A21
VSS_6
A24
VSS_7
A27
VSS_8
AL9
VSS_9
B10
VSS_10
B13
VSS_11
B16
VSS_12
B19
VSS_13
B22
VSS_14
B25
VSS_15
B28
VSS_16
B7
VSS_17
C11
VSS_18
C14
VSS_19
C17
VSS_20
C20
VSS_21
C23
VSS_22
C26
VSS_23
C29
VSS_24
C8
VSS_25
D12
VSS_26
D15
VSS_27
D18
VSS_28
D21
VSS_29
D24
VSS_30
D27
VSS_31
D30
VSS_32
D6
VSS_33
E10
VSS_34
E13
VSS_35
E16
VSS_36
E19
VSS_37
E22
VSS_38
E25
VSS_39
E28
VSS_40
E31
VSS_41
E7
VSS_42
F11
VSS_43
F14
VSS_44
F17
VSS_45
F20
VSS_46
F23
VSS_47
F26
VSS_48
F29
VSS_49
F9
VSS_50
G1
VSS_51
G12
VSS_52
G15
VSS_53
G18
VSS_54
G2
VSS_55
G21
VSS_56
G24
VSS_57
G27
VSS_58
G3
VSS_59
G30
VSS_60
G4
VSS_61
G8
VSS_62
H13
VSS_63
H16
VSS_64
H19
VSS_65
H22
VSS_66
H25
VSS_67
H28
VSS_68
H31
VSS_69
H5
VSS_70
H7
VSS_71
J10
VSS_72
J12
VSS_73
J14
VSS_74
J16
VSS_75
J18
VSS_76
J20
VSS_77
J22
VSS_78
J23
VSS_79
J8
VSS_80
K1
VSS_81
K11
VSS_82
V13
VSS_83
K15
VSS_84
K17
VSS_85
V19
VSS_86
K21
VSS_87
K7
VSS_88
L10
VSS_89
L12
VSS_90
L14
VSS_91
L16
VSS_92
L18
VSS_93
L20
VSS_94
L22
VSS_95
L9
VSS_96
M11
VSS_97
M13
VSS_98
M15
VSS_99
M17
VSS_100
M21
VSS_101
N10
VSS_102
N12
VSS_103
N20
VSS_104
N22
VSS_105
N3
VSS_106
N6
VSS_107
N9
VSS_108
P11
VSS_109
P21
VSS_110
P4
VSS_111
P7
VSS_112
R10
VSS_113
R12
<APU>
VSS_114 VSS_115 VSS_116
?
?
<APU>
R20 R22 R9
W10 W12 W20 W22
AA10 AA14 AA16 AA18 AA22
AB11 AB13 AB15 AB17 AB19 AB21
AC10 AC14 AC16 AC18 AC20 AC22
AD17 AD20 AD23 AD26 AD29 AE10 AE15 AE18 AE21 AE24 AE27
U10 U12 U20 U22
AA3 AA6 AA9
AB4 AB7
AC9
1
CPU1G
CPU1G
VSS
VSS
VSS
T11
VSS
T21
VSS VSS VSS VSS VSS
U3
VSS
U6
VSS
U9
VSS
V11
VSS
V21
VSS
V4
VSS
V7
VSS VSS VSS VSS VSS
W9
VSS
Y11
VSS
Y13
VSS
Y15
VSS
Y17
VSS
Y19
VSS
Y21
VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS
VSS
AE3
VSS
AE30
VSS
AE6
VSS
AE9
VSS
AF12
VSS
AF14
VSS
AF16
VSS
AF19
VSS
AF22
VSS
AF25
VSS
AF28
VSS
AF31
VSS
AF4
VSS
AF7
VSS
AG17
VSS
AG20
VSS
AG23
VSS
AG26
VSS
AG29
VSS
AG9
VSS
AH13
VSS
AH15
VSS
AH18
VSS
AH21
VSS
AH24
VSS
AH27
VSS
AH30
VSS
AJ12
VSS
AJ14
VSS
AJ16
VSS
AJ19
VSS
AJ22
VSS
AJ25
VSS
AJ28
VSS
AJ3
VSS
AJ31
VSS
AJ6
VSS
AJ9
VSS
AK13
VSS
AK17
VSS
AK20
VSS
AK23
VSS
AK26
VSS
AK29
VSS
AL13
VSS
AL15
VSS
AL18
VSS
AL21
VSS
AL24
VSS
AL27
VSS
AL3
VSS
AL6
VSS
M19
VSS
P13
VSS
P19
<APU>
VSS VSS
?
?
<APU>
T13 T19
VCCP_NB
C140
C140
C145
C145
C188
C187
C187
C188
C189
C189
C190
C190
C0.22U16X
C0.22U16X
VCCP_NB
C0.22U16X
C0.22U16X
C4.7u6.3X5
C4.7u6.3X5
C1000P50X0402
C1000P50X0402
C1000P50X0402
C1000P50X0402
C180P50N0402
C180P50N0402
C141 C47u6.3X1206C141 C47u6.3X1206 C47 C47u6.3X1206C47 C47u6.3X1206
C0.22U16X
C0.22U16X
C146
C146
C180P50N0402
C180P50N0402
C52 C47u6.3X1206C52 C47u6.3X1206 C54 C47u6.3X1206C54 C47u6.3X1206 C56 C47u6.3X1206C56 C47u6.3X1206 C58 C47u6.3X1206C58 C47u6.3X1206
C207
C207
C206
C177
C177
C206
C10u6.3X5
C10u6.3X5
C22u6.3X50805
C22u6.3X50805
C208
C208
C209
C209
C210
C210
C211
C211
C0.22U16X
C0.22U16X
C0.22U16X
C4.7u6.3X5
C4.7u6.3X5
C0.22U16X
C180P50N0402
C180P50N0402
C212
C212
C4.7u6.3X5
C4.7u6.3X5
C213
C213
C214
C214
C10u6.3X5
C10u6.3X5
C4.7u6.3X5
C4.7u6.3X5
C215
C215
C0.22U16X
C0.22U16X
C216
C216
C0.22U16X
C0.22U16X
C217
C217
C180P50N0402
C180P50N0402
C60 C47u6.3X1206C60 C47u6.3X1206 C63 C47u6.3X1206C63 C47u6.3X1206 C65 C47u6.3X1206C65 C47u6.3X1206 C68 C47u6.3X1206C68 C47u6.3X1206 C70 C47u6.3X1206C70 C47u6.3X1206 C72 C47u6.3X1206C72 C47u6.3X1206
MICRO-START INT'L CO.,LTD.
MICRO-START INT'L CO.,LTD.
C180P50N0402
C180P50N0402
C180P50N0402
C180P50N0402
C180P50N0402
C180P50N0402
C180P50N0402
C180P50N0402
C180P50N0402
5
C180P50N0402
C47u6.3X1206
C47u6.3X1206
C22u6.3X50805
C22u6.3X50805
4
3
2
Title
Title
Title
FM1 POWER&DECOUPLING
FM1 POWER&DECOUPLING
FM1 POWER&DECOUPLING
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet
Date: Sheet
MICRO-START INT'L CO.,LTD.
MS-7696 1.0
MS-7696 1.0
MS-7696 1.0
1
09 37Tuesday, May 17, 2011
09 37Tuesday, May 17, 2011
09 37Tuesday, May 17, 2011
of
of
of
5
VCC_DDR VCC3
MEM_MA_DQS_H[7..0]7 MEM_MA_DQS_L[7..0]7
MEM_MA_DATA[63..0]7
D D
C C
B B
A A
MEM_SCLK11 MEM_SDATA11
MEM_SCLK MEM_SDATA
MEM_MA_DATA0 MEM_MA_DATA1 MEM_MA_DATA2 MEM_MA_DATA3 MEM_MA_DATA4 MEM_MA_DATA5 MEM_MA_DATA6 MEM_MA_DATA7 MEM_MA_DATA8 MEM_MA_DATA9 MEM_MA_DATA10 MEM_MA_DATA11 MEM_MA_DATA12 MEM_MA_DATA13 MEM_MA_DATA14 MEM_MA_DATA15 MEM_MA_DATA16 MEM_MA_DATA17 MEM_MA_DATA18 MEM_MA_DATA19 MEM_MA_DATA20 MEM_MA_DATA21 MEM_MA_DATA22 MEM_MA_DATA23 MEM_MA_DATA24 MEM_MA_DATA25 MEM_MA_DATA26 MEM_MA_DATA27 MEM_MA_DATA28 MEM_MA_DATA29 MEM_MA_DATA30 MEM_MA_DATA31 MEM_MA_DATA32 MEM_MA_DATA33 MEM_MA_DATA34 MEM_MA_DATA35 MEM_MA_DATA36 MEM_MA_DATA37 MEM_MA_DATA38 MEM_MA_DATA39 MEM_MA_DATA40 MEM_MA_DATA41 MEM_MA_DATA42 MEM_MA_DATA43 MEM_MA_DATA44 MEM_MA_DATA45 MEM_MA_DATA46 MEM_MA_DATA47 MEM_MA_DATA48 MEM_MA_DATA49 MEM_MA_DATA50 MEM_MA_DATA51 MEM_MA_DATA52 MEM_MA_DATA53 MEM_MA_DATA54 MEM_MA_DATA55 MEM_MA_DATA56 MEM_MA_DATA57 MEM_MA_DATA58 MEM_MA_DATA59 MEM_MA_DATA60 MEM_MA_DATA61 MEM_MA_DATA62 MEM_MA_DATA63
R157R157 R158R158
5
122 123 128 129
131 132 137 138
140 141 146 147
149 150 155 156
200 201 206 207
209 210 215 216
100 105 106 218 219 224 225 108 109 114 115 227 228 233 234
101 104
DIMM1
DIMM1
3 4 9
10
12 13 18 19
21 22 27 28
30 31 36 37
81 82 87 88
90 91 96 97
99
2 5
8 11 14 17 20 23 26 29 32 35 38 41 44 47 80 83 86 89 92 95 98
VDD51VDD
DQ0 DQ1 DQ2 DQ3 DQ4 DQ5 DQ6 DQ7 DQ8 DQ9 DQ10 DQ11 DQ12 DQ13 DQ14 DQ15 DQ16 DQ17 DQ18 DQ19 DQ20 DQ21 DQ22 DQ23 DQ24 DQ25 DQ26 DQ27 DQ28 DQ29 DQ30 DQ31 DQ32 DQ33 DQ34 DQ35 DQ36 DQ37 DQ38 DQ39 DQ40 DQ41 DQ42 DQ43 DQ44 DQ45 DQ46 DQ47 DQ48 DQ49 DQ50 DQ51 DQ52 DQ53 DQ54 DQ55 DQ56 DQ57 DQ58 DQ59 DQ60 DQ61 DQ62 DQ63
VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS
VSS
VSS
107
110
SCLK0 4,14 SDATA0 4,14
54
VDD57VDD60VDD62VDD65VDD66VDD69VDD72VDD75VDD78VDD
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
113
116
119
121
124
127
130
133
136
DIMM1(CHANNEL-A A0) SM ADDRESS=A0
170
173
176
VDD
DDR3
DDR3
VSS
VSS
VSS
VSS
139
142
145
148
179
182
VDD
VDD
VDD
VSS
VSS
VSS
151
154
4
VTT_DDR
48
167
53
68
79
120
240
183
157
236
186
189
191
194
197
VTT
VDD
VDD
VDD
VDD
VSS
VSS
VSS
VSS
160
163
166
VTT
VDD
VDD
VDDSPD
VSS
VSS
VSS
VSS
VSS
199
202
205
208
211
4
RSVD
FREE1
NC/TEST4
NC/PAR_IN
NC/ERR_OUT
DM0/DQS9 NC/DQS9#
DM1/DQS10
NC/DQS10#
DM2/DQS11
NC/DQS11#
DM3/DQS12
NC/DQS12#
DM4/DQS13
NC/DQS13#
DM5/DQS14
NC/DQS14#
DM6/DQS15
NC/DQS15#
DM7/DQS16
NC/DQS16#
DM8/DQS17
NC/DQS17#
CK1#(NU)
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
214
217
220
223
226
229
232
235
239
187
198
A0
FREE249FREE3
FREE4
A1 A2 A3 A4 A5 A6 A7 A8 A9
A10/AP
A11 A12 A13 A14 A15
CB0 CB1 CB2 CB3 CB4 CB5 CB6 CB7
DQS0
DQS0#
DQS1
DQS1#
DQS2
DQS2#
DQS3
DQS3#
DQS4
DQS4#
DQS5
DQS5#
DQS6
DQS6#
DQS7
DQS7#
DQS8
DQS8#
ODT0 ODT1 CKE0 CKE1
CS0# CS1#
BA0 BA1 BA2
WE# RAS# CAS#
RESET#
CK0
CK0#
CK1(NU)
VREFDQ VREFCA
SCL SDA
SA1 SA0
VSS
MEC1
MEC2
MEC3
DDRIII-240P_Blue-RH
DDRIII-240P_Blue-RH
MEC1
MEC2
MEC3
MEM_MA_HOT#
MEM_MA_ADD0
188
MEM_MA_ADD1
181
MEM_MA_ADD2
61
MEM_MA_ADD3
180
MEM_MA_ADD4
59
MEM_MA_ADD5
58
MEM_MA_ADD6
178
MEM_MA_ADD7
56
MEM_MA_ADD8
177
MEM_MA_ADD9
175
MEM_MA_ADD10
70
MEM_MA_ADD11
55
MEM_MA_ADD12
174
MEM_MA_ADD13
196
MEM_MA_ADD14
172
MEM_MA_ADD15
171 39
40 45 46 158 159 164 165
MEM_MA_DQS_H0
7
MEM_MA_DQS_L0
6
MEM_MA_DQS_H1
16
MEM_MA_DQS_L1
15
MEM_MA_DQS_H2
25
MEM_MA_DQS_L2
24
MEM_MA_DQS_H3
34
MEM_MA_DQS_L3
33
MEM_MA_DQS_H4
85
MEM_MA_DQS_L4
84
MEM_MA_DQS_H5
94
MEM_MA_DQS_L5
93
MEM_MA_DQS_H6
103
MEM_MA_DQS_L6
102
MEM_MA_DQS_H7
112
MEM_MA_DQS_L7
111 43 42
MEM_MA_DM0
125 126
MEM_MA_DM1
134 135
MEM_MA_DM2
143 144
MEM_MA_DM3
152 153
MEM_MA_DM4
203 204
MEM_MA_DM5
212 213
MEM_MA_DM6
221 222
MEM_MA_DM7
230 231 161 162
MEM_MA0_ODT0
195
MEM_MA0_ODT1
77
MEM_MA_CKE0
50
MEM_MA_CKE1
169
MEM_MA0_CS_L0
193
MEM_MA0_CS_L1
76
MEM_MA_BANK0
71
MEM_MA_BANK1
190
MEM_MA_BANK2
52
MEM_MA_WE_L
73
MEM_MA_RAS_L
192
MEM_MA_CAS_L
74
MEM_MA_RESET#
168
MEM_MA_CLK_H1
184
MEM_MA_CLK_L1
185
MEM_MA_CLK_H2
63
MEM_MA_CLK_L2
64
MEM_VREF_DQ MEM_VREF_DQ
1
MEM_VREF_CA
67
MEM_SCLK
118
MEM_SDATA
238 237 117
MEM_MA_HOT# 7
MEM_VREF_DQ
C231
C1000P50X0402
C231
C1000P50X0402
3
VCC_DDR VCC3
54
DIMM2
DIMM2
3
VDD51VDD
VDD57VDD60VDD62VDD65VDD66VDD69VDD72VDD75VDD78VDD
DQ0
4
DQ1
9
DQ2
10
DQ3
122
DQ4
123
DQ5
128
DQ6
129
DQ7
12
DQ8
13
DQ9
18
DQ10
19
DQ11
131
DQ12
132
DQ13
137
DQ14
138
DQ15
21
DQ16
22
DQ17
27
DQ18
28
DQ19
140
DQ20
141
DQ21
146
DQ22
147
DQ23
30
DQ24
31
DQ25
36
DQ26
37
DQ27
149
DQ28
150
DQ29
155
DQ30
156
DQ31
81
DQ32
82
DQ33
87
DQ34
88
DQ35
200
DQ36
201
DQ37
206
DQ38
207
DQ39
90
DQ40
91
DQ41
96
DQ42
97
DQ43
209
DQ44
210
DQ45
215
DQ46
216
DQ47
99
DQ48
100
DQ49
105
DQ50
106
DQ51
218
DQ52
219
DQ53
224
DQ54
225
DQ55
108
DQ56
109
DQ57
114
DQ58
115
DQ59
227
DQ60
228
DQ61
233
DQ62
234
DQ63
2
VSS
5
VSS
8
VSS
11
VSS
14
VSS
17
VSS
20
VSS
23
VSS
26
VSS
29
VSS
32
VSS
35
VSS
38
VSS
41
VSS
44
VSS
47
VSS
80
VSS
83
VSS
86
VSS
89
VSS
92
VSS
95
VSS
98
VSS
101
VSS
104
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
107
110
113
116
119
121
124
MEM_VREF_CA
C234
C234
MEM_MA_DATA0 MEM_MA_DATA1 MEM_MA_DATA2 MEM_MA_DATA3 MEM_MA_DATA4 MEM_MA_DATA5 MEM_MA_DATA6 MEM_MA_DATA7 MEM_MA_DATA8 MEM_MA_DATA9 MEM_MA_DATA10 MEM_MA_DATA11 MEM_MA_DATA12 MEM_MA_DATA13 MEM_MA_DATA14 MEM_MA_DATA15 MEM_MA_DATA16 MEM_MA_DATA17 MEM_MA_DATA18 MEM_MA_DATA19 MEM_MA_DATA20 MEM_MA_DATA21 MEM_MA_DATA22 MEM_MA_DATA23 MEM_MA_DATA24 MEM_MA_DATA25 MEM_MA_DATA26 MEM_MA_DATA27 MEM_MA_DATA28 MEM_MA_DATA29 MEM_MA_DATA30 MEM_MA_DATA31 MEM_MA_DATA32 MEM_MA_DATA33 MEM_MA_DATA34 MEM_MA_DATA35 MEM_MA_DATA36 MEM_MA_DATA37 MEM_MA_DATA38 MEM_MA_DATA39 MEM_MA_DATA40 MEM_MA_DATA41 MEM_MA_DATA42 MEM_MA_DATA43 MEM_MA_DATA44 MEM_MA_DATA45 MEM_MA_DATA46 MEM_MA_DATA47 MEM_MA_DATA48 MEM_MA_DATA49 MEM_MA_DATA50 MEM_MA_DATA51 MEM_MA_DATA52 MEM_MA_DATA53 MEM_MA_DATA54 MEM_MA_DATA55 MEM_MA_DATA56 MEM_MA_DATA57 MEM_MA_DATA58 MEM_MA_DATA59 MEM_MA_DATA60 MEM_MA_DATA61 MEM_MA_DATA62 MEM_MA_DATA63
C0.1u16X0402-RH
C0.1u16X0402-RH
MEM_MA_ADD[15..0] 7
MEM_MA_DM[7..0] 7
MEM_MA0_ODT0 7 MEM_MA0_ODT1 7 MEM_MA_CKE0 7 MEM_MA_CKE1 7 MEM_MA0_CS_L0 7 MEM_MA0_CS_L1 7 MEM_MA_BANK0 7 MEM_MA_BANK1 7 MEM_MA_BANK2 7
MEM_MA_WE_L 7 MEM_MA_RAS_L 7 MEM_MA_CAS_L 7 MEM_MA_RESET# 7
MEM_MA_CLK_H1 7 MEM_MA_CLK_L1 7 MEM_MA_CLK_H2 7 MEM_MA_CLK_L2 7
MEM_VREF_DQ MEM_VREF_DQ MEM_VREF_CA
C232
X_C1000P50X0402
C232
X_C1000P50X0402
C233
C1000P50X0402
C233
C1000P50X0402
3
2
170
173
176
179
182
183
VDD
VDD
VDD
VDD
VDD
DDR3
DDR3
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
127
130
133
136
139
142
145
148
151
154
157
DIMM2(CHANNEL-A A1) SM ADDRESS=A4
2
1
VTT_DDR
48
167
53
68
79
120
240
236
186
189
191
194
197
VTT
VDD
VDD
VDD
VSS
VSS
VSS
160
163
166
VTT
VDD
VDD
VDDSPD
VSS
VSS
VSS
VSS
VSS
199
202
205
208
211
RSVD
FREE1
NC/TEST4
NC/PAR_IN
NC/ERR_OUT
DM0/DQS9 NC/DQS9#
DM1/DQS10
NC/DQS10#
DM2/DQS11
NC/DQS11#
DM3/DQS12
NC/DQS12#
DM4/DQS13
NC/DQS13#
DM5/DQS14
NC/DQS14#
DM6/DQS15
NC/DQS15#
DM7/DQS16
NC/DQS16#
DM8/DQS17
NC/DQS17#
CK1#(NU)
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
214
217
220
223
226
229
232
235
239
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
Date: Sheet
MEM_MA_HOT#
187
198
MEM_MA_ADD0
188
A0
MEM_MA_ADD1
181
FREE249FREE3
FREE4
A1
MEM_MA_ADD2
61
A2
MEM_MA_ADD3
180
A3
MEM_MA_ADD4
59
A4
MEM_MA_ADD5
58
A5
MEM_MA_ADD6
178
A6
MEM_MA_ADD7
56
A7
MEM_MA_ADD8
177
A8
MEM_MA_ADD9
175
A9
MEM_MA_ADD10
70
A10/AP
DQS0
DQS0#
DQS1
DQS1#
DQS2
DQS2#
DQS3
DQS3#
DQS4
DQS4#
DQS5
DQS5#
DQS6
DQS6#
DQS7
DQS7#
DQS8
DQS8#
ODT0 ODT1 CKE0 CKE1
RAS# CAS#
RESET#
CK1(NU)
VREFDQ VREFCA
VSS
MEC1
MEC1
MEC2
Custom
Custom
Custom
CS0# CS1#
CK0#
MEM_MA_ADD11
55
A11
MEM_MA_ADD12
174
A12
MEM_MA_ADD13
196
A13
MEM_MA_ADD14
172
A14
MEM_MA_ADD15
171
A15
39
CB0
40
CB1
45
CB2
46
CB3
158
CB4
159
CB5
164
CB6
165
CB7
MEM_MA_DQS_H0
7
MEM_MA_DQS_L0
6
MEM_MA_DQS_H1
16
MEM_MA_DQS_L1
15
MEM_MA_DQS_H2
25
MEM_MA_DQS_L2
24
MEM_MA_DQS_H3
34
MEM_MA_DQS_L3
33
MEM_MA_DQS_H4
85
MEM_MA_DQS_L4
84
MEM_MA_DQS_H5
94
MEM_MA_DQS_L5
93
MEM_MA_DQS_H6
103
MEM_MA_DQS_L6
102
MEM_MA_DQS_H7
112
MEM_MA_DQS_L7
111 43 42
MEM_MA_DM0
125 126
MEM_MA_DM1
134 135
MEM_MA_DM2
143 144
MEM_MA_DM3
152 153
MEM_MA_DM4
203 204
MEM_MA_DM5
212 213
MEM_MA_DM6
221 222
MEM_MA_DM7
230 231 161 162
MEM_MA1_ODT0
195
MEM_MA1_ODT1
77
MEM_MA_CKE0
50
MEM_MA_CKE1
169
MEM_MA1_CS_L0
193
MEM_MA1_CS_L1
76
MEM_MA_BANK0
71
BA0
MEM_MA_BANK1
190
BA1
MEM_MA_BANK2
52
BA2
MEM_MA_WE_L
73
WE#
MEM_MA_RAS_L
192
MEM_MA_CAS_L
74
MEM_MA_RESET#
168
MEM_MA_CLK_H0
184
CK0
MEM_MA_CLK_L0
185
MEM_MA_CLK_H3
63
MEM_MA_CLK_L3
64 1
MEM_VREF_CA
67
MEM_SCLK
118
SCL
MEM_SDATA
238
SDA
237
SA1
117
SA0
MEC2
MEC3
DDRIII-240P_Black-RH
DDRIII-240P_Black-RH
MEC3
MICRO-START INT'L CO.,LTD.
MICRO-START INT'L CO.,LTD.
MICRO-START INT'L CO.,LTD.
DDR CH-A
DDR CH-A
DDR CH-A
FUSION 1.0
FUSION 1.0
FUSION 1.0
VCC3
MEM_MA1_ODT0 7 MEM_MA1_ODT1 7 MEM_MA_CKE0 7 MEM_MA_CKE1 7 MEM_MA1_CS_L0 7 MEM_MA1_CS_L1 7 MEM_MA_BANK0 7 MEM_MA_BANK1 7 MEM_MA_BANK2 7
MEM_MA_WE_L 7 MEM_MA_RAS_L 7 MEM_MA_CAS_L 7
MEM_MA_CLK_H0 7 MEM_MA_CLK_L0 7 MEM_MA_CLK_H3 7 MEM_MA_CLK_L3 7
1
MEM_VREF_CA
10 37Tuesday, May 17, 2011
10 37Tuesday, May 17, 2011
10 37Tuesday, May 17, 2011
of
of
of
5
VCC_DDR VCC3
MEM_MB_DQS_H[7..0]7 MEM_MB_DQS_L[7..0]7
MEM_MB_DATA[63..0]7 MEM_MB_ADD[15..0] 7
D D
C C
B B
A A
MEM_MB_DATA0 MEM_MB_DATA1 MEM_MB_DATA2 MEM_MB_DATA3 MEM_MB_DATA4 MEM_MB_DATA5 MEM_MB_DATA6 MEM_MB_DATA7 MEM_MB_DATA8 MEM_MB_DATA9 MEM_MB_DATA10 MEM_MB_DATA11 MEM_MB_DATA12 MEM_MB_DATA13 MEM_MB_DATA14 MEM_MB_DATA15 MEM_MB_DATA16 MEM_MB_DATA17 MEM_MB_DATA18 MEM_MB_DATA19 MEM_MB_DATA20 MEM_MB_DATA21 MEM_MB_DATA22 MEM_MB_DATA23 MEM_MB_DATA24 MEM_MB_DATA25 MEM_MB_DATA26 MEM_MB_DATA27 MEM_MB_DATA28 MEM_MB_DATA29 MEM_MB_DATA30 MEM_MB_DATA31 MEM_MB_DATA32 MEM_MB_DATA33 MEM_MB_DATA34 MEM_MB_DATA35 MEM_MB_DATA36 MEM_MB_DATA37 MEM_MB_DATA38 MEM_MB_DATA39 MEM_MB_DATA40 MEM_MB_DATA41 MEM_MB_DATA42 MEM_MB_DATA43 MEM_MB_DATA44 MEM_MB_DATA45 MEM_MB_DATA46 MEM_MB_DATA47 MEM_MB_DATA48 MEM_MB_DATA49 MEM_MB_DATA50 MEM_MB_DATA51 MEM_MB_DATA52 MEM_MB_DATA53 MEM_MB_DATA54 MEM_MB_DATA55 MEM_MB_DATA56 MEM_MB_DATA57 MEM_MB_DATA58 MEM_MB_DATA59 MEM_MB_DATA60 MEM_MB_DATA61 MEM_MB_DATA62 MEM_MB_DATA63
5
122 123 128 129
131 132 137 138
140 141 146 147
149 150 155 156
200 201 206 207
209 210 215 216
100 105 106 218 219 224 225 108 109 114 115 227 228 233 234
101 104
54
DIMM3
DIMM3
3
VDD51VDD
VDD57VDD60VDD62VDD65VDD66VDD69VDD72VDD75VDD78VDD
DQ0
4
DQ1
9
DQ2
10
DQ3 DQ4 DQ5 DQ6 DQ7
12
DQ8
13
DQ9
18
DQ10
19
DQ11 DQ12 DQ13 DQ14 DQ15
21
DQ16
22
DQ17
27
DQ18
28
DQ19 DQ20 DQ21 DQ22 DQ23
30
DQ24
31
DQ25
36
DQ26
37
DQ27 DQ28 DQ29 DQ30 DQ31
81
DQ32
82
DQ33
87
DQ34
88
DQ35 DQ36 DQ37 DQ38 DQ39
90
DQ40
91
DQ41
96
DQ42
97
DQ43 DQ44 DQ45 DQ46 DQ47
99
DQ48 DQ49 DQ50 DQ51 DQ52 DQ53 DQ54 DQ55 DQ56 DQ57 DQ58 DQ59 DQ60 DQ61 DQ62 DQ63
2
VSS
5
VSS
8
VSS
11
VSS
14
VSS
17
VSS
20
VSS
23
VSS
26
VSS
29
VSS
32
VSS
35
VSS
38
VSS
41
VSS
44
VSS
47
VSS
80
VSS
83
VSS
86
VSS
89
VSS
92
VSS
95
VSS
98
VSS VSS VSS
VSS
VSS
VSS
VSS
VSS
107
110
113
116
119
121
170
173
DDR3
DDR3
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
124
127
130
133
136
139
142
145
DIMM3(CHANNEL-B B0) SM ADDRESS=A2
176
179
182
183
186
VDD
VDD
VDD
VDD
VDD
VDD
VSS
VSS
VSS
VSS
VSS
VSS
148
151
154
157
160
4
VTT_DDR
48
187
198
167
53
68
79
120
240
236
189
191
194
197
VTT
VDD
VDD
VSS
VSS
163
166
VTT
VDD
VDD
VDDSPD
VSS
VSS
VSS
VSS
VSS
199
202
205
208
211
4
RSVD
FREE1
FREE249FREE3
NC/TEST4
NC/PAR_IN
NC/ERR_OUT
A10/AP
DQS0
DQS0#
DQS1
DQS1#
DQS2
DQS2#
DQS3
DQS3#
DQS4
DQS4#
DQS5
DQS5#
DQS6
DQS6#
DQS7
DQS7#
DQS8
DQS8#
DM0/DQS9 NC/DQS9#
DM1/DQS10
NC/DQS10#
DM2/DQS11
NC/DQS11#
DM3/DQS12
NC/DQS12#
DM4/DQS13
NC/DQS13#
DM5/DQS14
NC/DQS14#
DM6/DQS15
NC/DQS15#
DM7/DQS16
NC/DQS16#
DM8/DQS17
NC/DQS17#
ODT0 ODT1 CKE0 CKE1 CS0# CS1#
RAS# CAS#
RESET#
CK0#
CK1(NU)
CK1#(NU)
VREFDQ VREFCA
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
MEC1
214
217
220
223
226
229
232
235
239
MEC1
MEC2
MEM_MB_HOT#
MEM_MB_ADD0
188
A0
MEM_MB_ADD1
181
FREE4
A1
MEM_MB_ADD2
61
A2
MEM_MB_ADD3
180
A3
MEM_MB_ADD4
59
A4
MEM_MB_ADD5
58
A5
MEM_MB_ADD6
178
A6
MEM_MB_ADD7
56
A7
MEM_MB_ADD8
177
A8
MEM_MB_ADD9
175
A9
MEM_MB_ADD10
70
MEM_MB_ADD11
55
A11
MEM_MB_ADD12
174
A12
MEM_MB_ADD13
196
A13
MEM_MB_ADD14
172
A14
MEM_MB_ADD15
171
A15
39
CB0
40
CB1
45
CB2
46
CB3
158
CB4
159
CB5
164
CB6
165
CB7
MEM_MB_DQS_H0
7
MEM_MB_DQS_L0
6
MEM_MB_DQS_H1
16
MEM_MB_DQS_L1
15
MEM_MB_DQS_H2
25
MEM_MB_DQS_L2
24
MEM_MB_DQS_H3
34
MEM_MB_DQS_L3
33
MEM_MB_DQS_H4
85
MEM_MB_DQS_L4
84
MEM_MB_DQS_H5
94
MEM_MB_DQS_L5
93
MEM_MB_DQS_H6
103
MEM_MB_DQS_L6
102
MEM_MB_DQS_H7
112
MEM_MB_DQS_L7
111 43 42
MEM_MB_DM0
125 126
MEM_MB_DM1
134 135
MEM_MB_DM2
143 144
MEM_MB_DM3
152 153
MEM_MB_DM4
203 204
MEM_MB_DM5
212 213
MEM_MB_DM6
221 222
MEM_MB_DM7
230 231 161 162
MEM_MB0_ODT0
195
MEM_MB0_ODT1
77
MEM_MB_CKE0
50
MEM_MB_CKE1
169
MEM_MB0_CS_L0
193
MEM_MB0_CS_L1
76
MEM_MB_BANK0
71
BA0
MEM_MB_BANK1
190
BA1
MEM_MB_BANK2
52
BA2
MEM_MB_WE_L
73
WE#
MEM_MB_RAS_L
192
MEM_MB_CAS_L
74
MEM_MB_RESET#
168
MEM_MB_CLK_H1
184
CK0
MEM_MB_CLK_L1
185
MEM_MB_CLK_H2
63
MEM_MB_CLK_L2
64
MEM_VREF_DQ
1
MEM_VREF_CA
67
MEM_SCLK MEM_SDATA
118
SCL
MEM_SDATA
238
SDA
237
SA1
117
SA0
MEC2
MEC3
DDRIII-240P_Blue-RH
DDRIII-240P_Blue-RH
MEC3
VCC3
MEM_VREF_DQ
C235
C1000P50X0402
C235
C1000P50X0402
MEM_MB_HOT# 7
MEM_MB0_ODT0 7 MEM_MB0_ODT1 7 MEM_MB_CKE0 7 MEM_MB_CKE1 7 MEM_MB0_CS_L0 7 MEM_MB0_CS_L1 7 MEM_MB_BANK0 7 MEM_MB_BANK1 7 MEM_MB_BANK2 7
MEM_MB_WE_L 7 MEM_MB_RAS_L 7 MEM_MB_CAS_L 7 MEM_MB_RESET# 7
MEM_MB_CLK_L1 7 MEM_MB_CLK_H2 7 MEM_MB_CLK_L2 7
MEM_VREF_DQ
MEM_VREF_CA
MEM_SCLK 10 MEM_SDATA 10
C236
C0.1u16X0402-RH
C236
C0.1u16X0402-RH
3
MEM_MB_DM[7..0] 7
C237
C1000P50X0402
C237
C1000P50X0402
3
MEM_VREF_CA
C238
C238
MEM_MB_DATA0 MEM_MB_DATA1 MEM_MB_DATA2 MEM_MB_DATA3 MEM_MB_DATA4 MEM_MB_DATA5 MEM_MB_DATA6 MEM_MB_DATA7 MEM_MB_DATA8 MEM_MB_DATA9 MEM_MB_DATA10 MEM_MB_DATA11 MEM_MB_DATA12 MEM_MB_DATA13 MEM_MB_DATA14 MEM_MB_DATA15 MEM_MB_DATA16 MEM_MB_DATA17 MEM_MB_DATA18 MEM_MB_DATA19 MEM_MB_DATA20 MEM_MB_DATA21 MEM_MB_DATA22 MEM_MB_DATA23 MEM_MB_DATA24 MEM_MB_DATA25 MEM_MB_DATA26 MEM_MB_DATA27 MEM_MB_DATA28 MEM_MB_DATA29 MEM_MB_DATA30 MEM_MB_DATA31 MEM_MB_DATA32 MEM_MB_DATA33 MEM_MB_DATA34 MEM_MB_DATA35 MEM_MB_DATA36 MEM_MB_DATA37 MEM_MB_DATA38 MEM_MB_DATA39 MEM_MB_DATA40 MEM_MB_DATA41 MEM_MB_DATA42 MEM_MB_DATA43 MEM_MB_DATA44 MEM_MB_DATA45 MEM_MB_DATA46 MEM_MB_DATA47 MEM_MB_DATA48 MEM_MB_DATA49 MEM_MB_DATA50 MEM_MB_DATA51 MEM_MB_DATA52 MEM_MB_DATA53 MEM_MB_DATA54 MEM_MB_DATA55 MEM_MB_DATA56 MEM_MB_DATA57 MEM_MB_DATA58 MEM_MB_DATA59 MEM_MB_DATA60 MEM_MB_DATA61 MEM_MB_DATA62 MEM_MB_DATA63
C0.1u16X0402-RH
C0.1u16X0402-RH
VCC_DDR VCC3
54
DIMM4
DIMM4
3
VDD51VDD
VDD57VDD60VDD62VDD65VDD66VDD69VDD72VDD75VDD78VDD
DQ0
4
DQ1
9
DQ2
10
DQ3
122
DQ4
123
DQ5
128
DQ6
129
DQ7
12
DQ8
13
DQ9
18
DQ10
19
DQ11
131
DQ12
132
DQ13
137
DQ14
138
DQ15
21
DQ16
22
DQ17
27
DQ18
28
DQ19
140
DQ20
141
DQ21
146
DQ22
147
DQ23
30
DQ24
31
DQ25
36
DQ26
37
DQ27
149
DQ28
150
DQ29
155
DQ30
156
DQ31
81
DQ32
82
DQ33
87
DQ34
88
DQ35
200
DQ36
201
DQ37
206
DQ38
207
DQ39
90
DQ40
91
DQ41
96
DQ42
97
DQ43
209
DQ44
210
DQ45
215
DQ46
216
DQ47
99
DQ48
100
DQ49
105
DQ50
106
DQ51
218
DQ52
219
DQ53
224
DQ54
225
DQ55
108
DQ56
109
DQ57
114
DQ58
115
DQ59
227
DQ60
228
DQ61
233
DQ62
234
DQ63
2
VSS
5
VSS
8
VSS
11
VSS
14
VSS
17
VSS
20
VSS
23
VSS
26
VSS
29
VSS
32
VSS
35
VSS
38
VSS
41
VSS
44
VSS
47
VSS
80
VSS
83
VSS
86
VSS
89
VSS
92
VSS
95
VSS
98
VSS
101
VSS
104
VSS
VSS
VSS
VSS
VSS
VSS
107
110
113
116
119
121
170
VSS
VSS
VSS
VSS
VSS
VSS
VSS
124
127
130
133
136
139
142
DIMM4(CHANNEL-B B1) SM ADDRESS=A6
2
173
176
179
182
183
186
VDD
VDD
VDD
VDD
VDD
VDD
DDR3
DDR3
VSS
VSS
VSS
VSS
VSS
VSS
VSS
145
148
151
154
157
160
2
1
VTT_DDR
48
187
198
167
53
68
79
120
240
236
189
191
194
197
VTT
VDD
VDD
VSS
VSS
163
166
VTT
VDD
VDD
VDDSPD
VSS
VSS
VSS
VSS
VSS
199
202
205
208
211
RSVD
FREE1
FREE249FREE3
NC/TEST4
NC/PAR_IN
NC/ERR_OUT
A10/AP
DQS0
DQS0#
DQS1
DQS1#
DQS2
DQS2#
DQS3
DQS3#
DQS4
DQS4#
DQS5
DQS5#
DQS6
DQS6#
DQS7
DQS7#
DQS8
DQS8#
DM0/DQS9
NC/DQS9#
DM1/DQS10
NC/DQS10#
DM2/DQS11
NC/DQS11#
DM3/DQS12
NC/DQS12#
DM4/DQS13
NC/DQS13#
DM5/DQS14
NC/DQS14#
DM6/DQS15
NC/DQS15#
DM7/DQS16
NC/DQS16#
DM8/DQS17
NC/DQS17#
ODT0 ODT1 CKE0 CKE1 CS0# CS1#
RAS# CAS#
RESET#
CK0#
CK1(NU)
CK1#(NU)
VREFDQ
VREFCA
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
MEC1
214
217
220
223
226
229
232
235
239
MEC1
MEC2
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
Date: Sheet
MEM_MB_HOT#
MEM_MB_ADD0
188
A0
MEM_MB_ADD1
181
FREE4
A1
MEM_MB_ADD2
61
A2
MEM_MB_ADD3
180
A3
MEM_MB_ADD4
59
A4
MEM_MB_ADD5
58
A5
MEM_MB_ADD6
178
A6
MEM_MB_ADD7
56
A7
MEM_MB_ADD8
177
A8
MEM_MB_ADD9
175
A9
MEM_MB_ADD10
70
MEM_MB_ADD11
55
A11
MEM_MB_ADD12
174
A12
MEM_MB_ADD13
196
A13
MEM_MB_ADD14
172
A14
MEM_MB_ADD15
171
A15
39
CB0
40
CB1
45
CB2
46
CB3
158
CB4
159
CB5
164
CB6
165
CB7
MEM_MB_DQS_H0
7
MEM_MB_DQS_L0
6
MEM_MB_DQS_H1
16
MEM_MB_DQS_L1
15
MEM_MB_DQS_H2
25
MEM_MB_DQS_L2
24
MEM_MB_DQS_H3
34
MEM_MB_DQS_L3
33
MEM_MB_DQS_H4
85
MEM_MB_DQS_L4
84
MEM_MB_DQS_H5
94
MEM_MB_DQS_L5
93
MEM_MB_DQS_H6
103
MEM_MB_DQS_L6
102
MEM_MB_DQS_H7
112
MEM_MB_DQS_L7
111 43 42
MEM_MB_DM0
125 126
MEM_MB_DM1
134 135
MEM_MB_DM2
143 144
MEM_MB_DM3
152 153
MEM_MB_DM4
203 204
MEM_MB_DM5
212 213
MEM_MB_DM6
221 222
MEM_MB_DM7
230 231 161 162
MEM_MB1_ODT0
195
MEM_MB1_ODT1
77
MEM_MB_CKE0
50
MEM_MB_CKE1
169
MEM_MB1_CS_L0
193
MEM_MB1_CS_L1
76
MEM_MB_BANK0
71
BA0
MEM_MB_BANK1
190
BA1
MEM_MB_BANK2
52
BA2
MEM_MB_WE_L
73
WE#
MEM_MB_RAS_L
192
MEM_MB_CAS_L
74
MEM_MB_RESET#
168
MEM_MB_CLK_H0
184
CK0
MEM_MB_CLK_L0
185
MEM_MB_CLK_H3
63
MEM_MB_CLK_L3
64
MEM_VREF_DQ
1
MEM_VREF_CA
67
MEM_SCLK
118
SCL
238
SDA
237
SA1
117
SA0
MEC2
MEC3
DDRIII-240P_Black-RH
DDRIII-240P_Black-RH
MEC3
DDR CH-B
DDR CH-B
DDR CH-B
Custom
Custom
Custom
MS-7696 1.0
MS-7696 1.0
MS-7696 1.0
MEM_MB1_ODT0 7 MEM_MB1_ODT1 7 MEM_MB_CKE0 7 MEM_MB_CKE1 7 MEM_MB1_CS_L0 7 MEM_MB1_CS_L1 7 MEM_MB_BANK0 7 MEM_MB_BANK1 7 MEM_MB_BANK2 7
MEM_MB_WE_L 7 MEM_MB_RAS_L 7 MEM_MB_CAS_L 7
MEM_MB_CLK_H0 7 MEM_MB_CLK_L0 7MEM_MB_CLK_H1 7 MEM_MB_CLK_H3 7 MEM_MB_CLK_L3 7
VCC3
MICRO-START INT'L CO.,LTD.
MICRO-START INT'L CO.,LTD.
MICRO-START INT'L CO.,LTD.
1
MEM_VREF_DQ MEM_VREF_CA
11 37Tuesday, May 17, 2011
11 37Tuesday, May 17, 2011
11 37Tuesday, May 17, 2011
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