MSI MS-7576 Schematics

MSI

D D

MS-7576 Ver:0A

CPU:

AMD AM3 Socket 941

Title Page

Cover Sheet 1

GPIO Configuration

2Block Diagram 3

Clock Distribution 4

System Chipset:

AMD/ATI RS780/RS780D/RS780C AMD/ATI SB700/SB750/SB710

On Board Chipset:

FINTEK Super I/O -- F71889 LAN -- RTL8111DL HD Codec -- ALC888S VC 1394 -- VT6135N

C C

BIOS -- SPI ROM 8M

Main Memory:

DDR III X 4 (Max 8GB)

Expansion Slots:

PCI-E X 16 *1 PCI-E X 8 *1 PCI-E X 1 *2 PCI 2.2 Slot X 2

Clock Generator:

Controller--RTM880N-793

B B

PWM:

L6740+L6743

Power Deliver Chart L6740/L6743 4+1 Phase Clock-Gen RTM880N-793 AMD AM3 941 FIRST LOGICAL DDR DIMM SECOND LOGICAL DDR DIMM DDR VTT POWER AMD/ATI RS780/RS780D/RS780C AMD/ATI SB700/SB750/SB710 PCI EXPRESS X16 & X 1 SLOT PCI Slot 1,2 USB connectors VGA CONN HDMI / DVI CONNECTOR LAN - Realtek 8111DL Azalia Codec-ALC888S LPC-F718829/ FDD / COM IDE Conn / FAN

1394/VT6135N

ACPI by UPI ATX/Front Panel/KB/EMI

VCC_DDR & VCC1_1 NB&CPU_VDDR

PCI EXPRESS X8 OR X1 SLOT AUTO PHASE SWITCH BOM - Option Parts POWER OK MAP

5 6 7

8, 9,10

11 12

13 14, 15,16,17,18 19, 20,21,22,23

RESET MAP

A A

History

MICRO-START INT'L CO.,LTD.

Title

Size Document Number Rev

Custom

Date: Sheet

MICRO-START INT'L CO.,LTD.

Cover Sheet

MS-7576 0A

142Wednesday, October 08, 2008

Project RS-780 BLOCK DIAGRAM

DDRIII 1066,1333

D D

AMD

AM3 SOCKET

8,9,10

OUT

DVI CON HDMI CON

D-SUB

PCIE GFX x16

C C

4X1 PCIE INTERFACE

TMDS

RGB

PCIE x16

ATI NB - RS780/RS780D

HyperTransport LINK0 CPU I/F 1 16X PCIE VIDEO I/F 6 1X PCIE I/F

16x16 2.6GHZ(HT3)HyperTransport LINK

128bit

DDRIII 1066,1333

128bit

UNBUFFERED DDRIII DIMM1

DDRII FIRST LOGICAL DIMM DDRII SECOND LOGICAL DIMM

UNBUFFERED DDRIII DIMM1

14,15,16,17,18

Realtek 8111DL

PCIE x1 SLOT1

2429

A-LINK

4X PCIE

USB-4USB-5

LANLAN 1394 1394

USB-11 REAR

B B

26 26 26 26 26

USB-10 REAR LANLAN

USB-1USB-2USB-3

USB-7USB-8USB-9 Front FrontFrontFront

USB-0 FrontFrontREARREARREARREAR

USB-6

USB 2.0

ATI SB700

AZALIA

USB2.0 (12)

26262626

SATA2 (4 PORTS) AC97 2.3

SERIAL ATA 2.0

HD AUDIO 1.0

HD AUDIO HDR

AZALIA CODEC

SATA#0 SATA#1

SATA#2 SATA#3

20 20 20

SATA#4 SATA#5

20 20

ACPI 1.1

PCI BUS

SPI I/F PCI/PCI BRIDGE

SPI Bus

SPI ROM 8M

ACPI CONTROLLER

uPI

CPU CORE POWER NB CORE POWER

PCI SLOT 1

PCI SLOT 2

19,20,21,22,23

LPC BUS

CPU VLDT Power

RS780 CORE POWER PCIE & SB POWER DUAL POWER

A A

DDR2 DRAM POWER

ITE SIO

Fintek 71889

TPM Pin Header

ATX CON

FLOPPY

KBD MOUSE

SERIAL PORT

Title

BLOCK Diagram

Size Document Number Rev

Custom

Date: Sheet

MICRO-START INT'L CO.,LTD.

MS-7576 0A

242Friday, September 26, 2008

SB700/750 GPIO Config

GPIO Name Type Function description Pin Page

PCICLK5/GPIO41

INTE#/GPIO33 PCI_INTA#

INTF#/GPIO33

INTG#/GPIO33

INTH#/GPIO33

D D

LDRQ1#/GNT5#/GPIO68

BMREQ#/REQ5#/GPIO68

RI#/EXTEVNT0#

SLP_S2/GPM9#

KBRST#/GEVENT1#

LPC_PME#/GEVENT3#

LPC_SMI#/EXTEVNT1#

S3_STATE/GEVENT5#

SYS_RESET#/GPM7#

WAKE#/GEVENT8#

BLINK/GPM6# Unused

SATA_ISO#/GPIO10 SB_GPIO10

SMARTVOLT/SATA_IS2/GPIO4 SB_GPIO4

CLK_REQ1#/SATA_IS4#/GPIO3 SB_GPIO39

CLK_REQ2#/SATA_IS5#/GPIO40

SPKR/GPIO2

SDA0/GPOC1# SDATA

C C

SCL1/GPOC2# SCLK1

SDA1/GPOC3# SDATA1

DDC1_SCL/GPIO9

DDC1_SDA/GPIO8 SPI_WP#

LLB3/GPIO66 LC_SENSE

SHUTDOWN#/GPIO5 SB_GPIO5

DDR3_RST#/GEVENT7#

SB_OC6#/IR_TX1/GEVENT6#

USB_OC4#IO_RX0/GPM4# OC4#

USB_OC2#/GPM2#

USB_OC1#/GPM1#

USB_OC0#/GPM0#

AZ_SDIN0/GPIO42

AZ_SDIN1/GPIO43

AZ_SDIN2/GPIO44

AZ_SDIN3/GPIO46

3.3V PCI_CLK5

PREQ#3REQ3#/GPIO70

PREQ#4REQ4#/GPIO71

UnusedGNT3#/GPIO72

PCI_INTB#

PCI_INTC#

PCI_INTD#

Unused

PREQ#5

RI#

Unused

A20GATEGA20IN/GEVENT0#

KBRST#

LPC_PME#

LPC_SMI3

Unused

FP_RST#

WAKE#

SMBALERT#MBALERT#THRMTRIP#/GEVENT2#

SB_GPIO6CLK_REQ3#/SATA_IS1#/GPIO6

SB_GPIO0CLK_REQ0#SATA_IS3#/GPIO0

SB_GPIO40

SPKR

SCLKSCL0/GPOC0#

Unused

OC6#

OC5#USB_OC5#IR_TX0/GPM5#

OC3#USB_OC3#/IR_RX1/GPM3#

OC2#

OC1#

OC0#

SDATA_IN_R

Unused

AE18

AD18

AA19

AE6

AB6

AC6

AD3

AC4

AE2

AE3

AB8

AD7

Y15

W15

K24

W18

V17

W20

W21

AA18

W18

AA20

Y18

Y19

SB700/750 GPIO Config

GPIO Name Type Function description Pin Page

AZ_DOCK_RST#/GPM8#

PS2_DAT/EC_GPIO0

PS2_CLK/EC_GPIO1

SPI_CS2#/EC_GPIO2

IDE_RST#/F_RST#/EC_GPO3 F25

PS2KB_DAT/EC_GPIO4

PS2KB_CLK/EC_GPIO5

PS2M_DAT/EC_GPIO6

PS2M_CLK/EC_GPIO7

USBCLK/14M_25M_48M_OSC

KSO_16/EC_GPIO8

KSO_17/EC_GPIO9

EC_PWM0/EC_GPIO10

SCL2/EC_GPIO11

SDA2/EC_GPIO12

SCL3_LV/EC_GPIO13

SDA3_LV/EC_GPIO14

EC_PWM1/EC_GPIO15

EC_PWM2/EC_GPIO16

EC_PWM3/EC_GPIO17

KSI_0/EC_GPIO18

KSI_1/EC_GPIO19

KSI_2/EC_GPIO20

KSI_3/EC_GPIO21

KSI_4/EC_GPIO22

KSI_5/EC_GPIO23

KSI_6/EC_GPIO24

KSI_7/EC_GPIO25

KSO_0/EC_GPIO26

KSO_1/EC_GPIO27

KSO_2/EC_GPIO28

KSO_3/EC_GPIO29

KSO_4/EC_GPIO30

KSO_5/EC_GPIO31

KSO_6/EC_GPIO32

KSO_7/EC_GPIO33

KSO_8/EC_GPIO34

KSO_9/EC_GPIO35

KSO_10/EC_GPIO36

KSO_11/EC_GPIO37

KSO_12/EC_GPIO38

KSO_13/EC_GPIO39

KSO_14/EC_GPIO40

KSO_15/EC_GPIO41

SATA_ACT#/GPIO67

IDE_D0/GPIO15

IDE_D1/GPIO16

IDE_D2/GPIO17

IDE_D3/GPIO18

3.3V L5

Unused 20

Unused

USB_48M_CLK

Unused

SB_GP16

Unused

SATA_LED#

Unused

H19

H20

H21

D22

E24

E25

D23

A18

B18

F21

D21

F19

E20

E21

E19

D19

E18

G20

G21

D25

D24

C25

C24

B25

C23

B24

B23

A23

C22

A22

B22

B21

A21

D20

C20

A20

B20

B19

A19

D18

C18

W11

AD24

AD23

AE22

AC22

21UnusedGNT4#/GPIO73 AE5

SB700/750 GPIO Config

GPIO Name Type Function description Pin Page

IDE_D4/GPIO19 AD21

IDE_D5/GPIO20

IDE_D6/GPIO21

IDE_D7/GPIO22

IDE_D8/GPIO23

IDE_D9/GPIO24

IDE_D10/GPIO25

IDE_D11/GPIO26

IDE_D12/GPIO27

IDE_D13/GPIO28

IDE_D14/GPIO29

IDE_D15/GPIO30

SPI_DI/GPIO12

SPI_DO/GPIO11

SPI_CLK/GPIO47

SPI_HOLD#/GPIO31

SPI_CS#/GPIO32

LAN_RST#/GPIO14

ROM_RST#/GPIO14

FANOUT0/GPIO3

FANOUT1/GPIO48

FANOUT2/GPIO49

FANIN0/GPIO50

FANIN1/GPIO51

FANIN2/GPIO52

TEMPIN0/GPIO61

TEMPIN1/GPIO62

TEMPIN2/GPIO63

TEMPIN3/TALERT#/GPIO64

VIN0/GPIO53

VIN1/GPIO54

VIN2/GPIO55

VIN3/GPIO56

VIN4/GPIO57

VIN5/GPIO58

VIN6/GPIO59

VIN7/GPIO60

3.3V

Unused

SPI_DATAIN

SPI_DATAOUT

SPI_CLK

SPI_HOLD_L

SPI_CS#

CPU_PRESENT#

Unused

COM_GPIO

Unused

TALERT3

Unused

AE20

AB20

AD19

AE19

AC20

AD20

AE21

AB22

AD22

AE23

AC23

U15

F71882 GPIO Config

GPIO Name Type Function description Pin Page

VIDO5/GP27 AD21

B B

VIDO4/GP26

VIDO1/GP21/VGP0

PME#/GP54

KRST#/GP62

GA20/JP7

KDAT/GP61

KCLK/GP60

MDAT/GP57

MCLK/GP56

SUSC#/GP53

PSON#/GP42

PANSWH#/GP43

PWRON#/GP44

PCIRST3#/GP11

PCIRST2#/GP12

FAN_CTL3/GP36

FAN_TAC3/GP36

FAN_CTL2/GP51

FAN_TAC2/GP52

FAN_CTL1

FAN_TAC1

VID2/GP32

VID3/GP33

A A

VID3/GP33

VID4/GP34

VID5/GP35

3.3V

Unused

SPI_DATAIN

SPI_DATAOUT

SPI_CLK

SPI_HOLD_L

SPI_CS#

CPU_PRESENT#

Unused

COM_GPIO

Unused

AE20

AB20

AD19

AE19

AC20

AD20

AE21

AB22

AD22

AE23

AC23

U15

PCI Config.

DEVICE MCP1 INT Pin REQ#/GNT#

PCI Slot 1

PCI Slot 2

PCI_INTE# PCI_INTF# PCI_INTG# PCI_INTH# PCI_INTF# PCI_INTG# PCI_INTH# PCI_INTE#

PREQ#0 PGNT#0

PREQ#1 PGNT#1

IDSEL

AD21

AD22

CLOCK

PCICLK0

PCICLK1

MICRO-START INT'L CO.,LTD.

Title

Size Document Number Rev

Custom

Date: Sheet

Date: Sheet of

MICRO-START INT'L CO.,LTD.

GPIO Configuration

MS-7576 0A

342Friday, September 26, 2008

DIMM3 DIMM4

D D

DIMM1 DIMM2

2 PAIR MEM CLK

CPU AM3 SOCKET

C C

PCIE GPP SLOT 1 - 1 LANE

B B

1 PAIR CPU CLK

200MHZ

PCIE GPP CLK

100MHZ

HT REFCLK

100MHz DIFF RS780

EXTERNAL CLK GEN.

NB-OSCIN

14.318MHZ

NB ALINK PCIE CLK

100MHZ

SB ALINK PCIE CLK

100MHZ

NB GFX PCIE CLK

100MHZ

NB GPP PCIE CLK

100MHZ

PCIE GFX CLK

100MHZ

PCIE GFX CLK

100MHZ

PCIE GPP CLK

100MHZ

PCIE GPP CLK

100MHZ

USB CLK

48MHZ

(RX780)

AMD/ATI NB RS780

RS780D

PCIE GFX SLOT 1 - 16 LANES

PCIE GFX SLOT 1 - 8 LANES

PCIE GPP SLOT 1 - 1 LANE

PCIE GBE

25MHZ OSC INPUT

25MHz LAN

CPU_HT_CLK

NB_HT_CLK

25M_48M_66M_OSC

AMD/ATI SB

SB700

NB_DISP_CLK

GPP_CLK3

PCIE_RCLK/ NB_LNK_CLK

SLT_GFX_CLK

GPP_CLK0

GPP_CLK1

GPP_CLK2

USB_CLK

PCI CLK0

33MHZ

PCI CLK1

33MHZ

PCI CLK2

33MHZ

PCI CLK3

33MHZ

PCI CLK4

33MHZ

PCI CLK5

33MHZ

LPC_CLK0

33MHZ

LPC CLK1

33MHZ

SB_BITCLK

48MHZ

PCI SLOT 0 33MHz

PCI SLOT 1 33MHz

TPM 33MHz

PCI SLOT 3 33MHz

SUPER IO F71882 33MHz

HD AUDIO ALC 888GR

25MHz

SIO CLK

48MHZ

25MHz SATA

32.768KHz

14.31818MHz

A A

External clock mode

Internal clock mode

MICRO-START INT'L CO.,LTD.

Title

Clock Distribution

Size Document Number Rev

Custom

Date: Sheet

MICRO-START INT'L CO.,LTD.

MS-7576

442Saturday, September 27, 2008

Power Deliver Chart

2.5V Shunt Regulator

VRM SW REGUALTOR

D D

ATX P/S WITH 1A STBY CURRENT

5VSB

+/-5%

3.3V +/-5%

12V +/-5%

-12V +/-5%

CPU PW 12V +/-5%

5VDIMM Linear REGULATOR

1.8V VDD SW REGULATOR

1.8V VCC Linear REGULATOR

VDDA25 (S0, S1)

VCCP (S0, S1) / VCC_NB (S0, S1)

0.9V VTT_DDR REGULATOR

1.1V VCC Linear REGULATOR

1.2V VCC Linear REGULATOR

VCC_DDR (S0, S1, S3) VTT_DDR (S0, S1, S3)

DDRII DIMMX4

VDD MEM

12A

VTT_DDR

NB_VCC1P1 (S0, S1)

VCC_1V2 (S0, S1)

+1.8V_S0 (S0, S1)

C C

AMD AM2r2 CPU

VDDA 2.5V 0.2A VDDCORE

0.8-1.55V

DDR2 MEM I/F VDD MEM 1.8V VTT MEM 0.9V

VLDT 1.2V

NB RS780

VDDHT/RX 1.1V VDDHTTX 1.2V VDDPCIE 1.1V NB CORE VDDC

1.1V VDDA18PCIE 1.8V

PLLs 1.8V VDD18/VDD18_MEM

1.8V VDD_MEM 1.8V/1.5V

AVDD 3.3V

110A

10A 2A

0.5A

1.2A

0.5A 2A 7A

0.9A

0.1A

0.01A

0.5A

0.135A

SB700

VCC3_SB Linear REGULATOR

VCC3_SB (S0, S1, S3, S5)

1.2V_SB Linear REGULATOR

+1.2VSB (S0, S1) VCC3_SB (S0, S1, S3, S5)

VCC3 (S0, S1)

+5VA Linear

B B

5VDUAL Linear REGULATOR

REGULATOR

+5VA (S0, S1)

VCC3_SB (S0, S1, S3, S5)

X4 PCI-E

ATA I/O

ATA PLL

PCI-E PVDD

SB CORE

CLOCK

1.2V S5 PW

3.3V S5 PW

USB CORE I/O

3.3V I/O

AUDIO CODEC

3.3V CORE

5V ANALOG

+3.3VDUAL (S3)

+3.3V (S0, S1)

+5V (S0, S1)

0.8A

0.5A

0.01A 80mA

0.6A

0.22A

0.01A

0.2A

0.45A

0.1A

SUPER I/O

0.01A

0.1A

5.0A

7.6A

0.5A

0.1A

X1 PCIE per

3.3V 12V

3.3Vaux

PCI Slot (per slot)

A A

3.3V 12V

3.3VDual

-12V

0.375A

3.0A

0.5A

0.1A

X16 PCIE per

3.0A

3.3V

5.5A

12V

0.1A

3.3VDual

USB X6 FR

VDD 5VDual

3.0A

USB X6 RL 2XPS/2

VDD 5VDual

3.0A

5VDual

0.5A

ENTHENET

3.3V (S3)

3.3V (S0, S1)

0.1A

0.5A

IEEE-1394 x1

3.3V (S0, S1)

12V (S0, S1) 1.1A

0.1A

MICRO-START INT'L CO.,LTD.

Title

Size Document Number Rev

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MICRO-START INT'L CO.,LTD.

Power Deliver Chart

MS-7576 0A

542Friday, September 26, 2008

Item

Disable threshold

VRMST_PWROK

X_C100p50N0402C4X_C100p50N0402

GND

R17

1KR0402

VID3 VID2

CPUVDD_EN

VCC5_SB

VRM_VDD_RUN_FIXEN

VRM_VDD_RUN_OSC

R118

82KR1%0402-RH

CORE_COMP

VRM_VDD_RUN_DROOP

NB_COMP

VRM_VDD_RUN_NB_DROOP

NB_FB

C49

X_C150p50N0402

L6740L Average Over Current/LI

OC_AVG_LI_P

CD270u16SO-RH-2

EC17

EC7

GND

DISBL# Input

SVC/VID3

SVD/VID2

PWROK

PWRGOOD

FIXEN/OVP

OSC

OC_PHASE

VRM_VDD_RUN

COMP

DROOP

VSEN

FBG

NB_OS

NB_COMP

NB_DROOP

NB_FB

NB_VSEN

NB_FBG

NC2222OC_AVG/LI

NC24

GND

VRM_VDD_RUN_NB_DROOP

NB Load Indicator by Droop NB pin

Place close L6740L

VRM_VDD_RUN_DROOP

CORE Load Indicator by Droop pin

CPU_VDD_RUN_LTB_GAIN

LTB Tecnology (TM) Network

R149

X_100R1%0402

R144

47.5KR1%0402

CD270u16SO-RH-2

EC9

VID035VID1

COREFB+

CP1CP1

Enable threshold

Input current

CPU_CORE_TYPE8

VID526VID4

NB_ENDRV

ST L6740L - AMD (4+1) SVID CONTROLLER

Place close L6740L

C53

C100p50N0402

GND

VCC5_SB

R28

4.7KR0402

3.6KR1%0402

3.6KR1%0402 R44

R44

NTC (Place

NB_VSEN8 NB_GND8

close to Lcore

L1_PWM1)

PWR_GOOD34,38

RT1

X_10KRT1%

UP6262_ FB

R135

49.9R1%0402

UP6262 NB_FB

VDD_12V2_RUN

C100p50N0402C3C100p50N0402

R65 X_0R0402R65 X_0R0402

R72 X_0R0402R72 X_0R0402

COREFB+ COREFB-

VCCP_NB

R18

10.0KR1%0402

0R0402

2.2KR0402

R140

0R0402

VCCP

R121

100R1%0402

R38 4.7KR0402R38 4.7KR0402 R4 4.7KR0402R4 4.7KR0402

R63

0R0402

R62

2.2KR1%0402

R84

R113

R126

100R1%0402

R74 820R0402R74 820R0402

GND

LDT_PWRGD8,19

D D

VCC5_SB

R35

10KR0402

N-MMBT3904_NL_SOT23

R29

VCORE_EN#34

10KR0402

CORE Compensation Network

NB Compensation Network

NB_VSEN8

C C

CORE_COMP38

COREFB+8 COREFB-8

CORE Remote Sense Connections

Sense under the socket close to regulation point

NB Remote Sense Connections

Sense under the socket close to regulation point

VCC3

GND

R117

100R1%0402

R16

4.7KR0402

C11

C0.1u16Y0402

R73 X_130R1%0402R73 X_130R1%0402

R86

R108

R75

4.99KR1%0402

C23

C0.01u25X0402

R60

100R1%0402

CORE_COMP COREFB+ COREFB-

R127

100R1%0402

NB_VSEN NB_GND

Q2Q2

652 1 3 4

GND

VID38 VID28

VRMST_PWROK

C50 C100p50NC50 C100p50N R136 2KR1%0402R136 2KR1%0402

R14668KR0402R14668KR0402 R166 33KR0402R166 33KR0402

R69

C17 C3300p50X0402C17 C3300p50X0402

11.5KR1%0402

11.5KR1%0402 C10p50X0402-RH

C10p50X0402-RH

C22 X_C0.01u16X0402C22 X_C0.01u16X0402

49.9R1%0402

49.9R1%0402 0R0402

0R0402

R128 0R0402R128 0R0402

C25

C0.01u16X0402

C27

C470p16X0402

NB_GND

VCC3

R45

4.7KR0402

VCC_DDR

R43

1KR0402

R150 3KR1%0402R150 3KR1%0402

C18

C34 C0.1u10X0402C34 C0.1u10X0402

CPU_VDD_RUN_LTB

R141

0R0402

R87

0R0402

C38 C0.1u10X0402C38 C0.1u10X0402

VRM_VDD_RUN_NB_OS

R100

X_0R0402

NB_VSEN_R

R91 0R0402R91 0R0402

R96 X_0RR96 X_0R

47KR1%0402-RH

R137

OC_AVG_LI_P31,38

B B

PWRCONN4P_CREAM-RH-1

GND

VDD_12V2_RUN VDD_12V2_RUN_CORE

PWR1

CHOKE2

12V

123

GND GND

1 2

12V

CH-1.1u27A1.7m-RH

CD270u16SO-RH-2

EC4

EC12

UP6262 : VCCP & VCCP_NB OV

VCC5

R164 2.2R/0603R164 2.2R/0603

C61

C0.1u16Y0402

GND

OUT2

VCC

SDA07,11,12,21,24,29,34,37,38

SDA

UP6262_ FB

R98 0R0402R98 0R0402

UP6262_ FB_R

A A

R147

R147 X_1KR0402

X_1KR0402

OUT3

OUT1

BUS_SEL

6 5

SCL

UP6262M8_SOT23-8-RH

R138

R138 10KR0402

10KR0402

0R0402

UP6262 NB_FB_R

SCL0 7,11,12,21,24,29,34,37,38

VCC5

R145

UP6262 NB_FB

BUS_SEL=100%VCC

I2C address:0X60

R643=10K;R644=OPEN

NB_PWM

NB_ISEN

L6740

PWM1 PWM2 PWM3 PWM4

ENDRV

LTB9LTB_GAIN11EP

VID0 VID1 VID4 VID5

CS1+ CS1CS2+ CS2CS3+ CS3CS4+ CS4-

VCC

GND

PSI_L

VCC_DDR

R54 X_27R0402R54 X_27R0402

VID0 8 VID1 8 VID4 8 VID5 8

CPU_VDD_RUN_PWMDRV1CPU_VDD_RUN_PWMDRV1CPU_VDD_RUN_PWMDRV1CPU_VDD_RUN_PWMDRV1

CPU_VDD_RUN_PWMDRV2CPU_VDD_RUN_PWMDRV2CPU_VDD_RUN_PWMDRV2CPU_VDD_RUN_PWMDRV2

CPU_VDD_RUN_PWMDRV3CPU_VDD_RUN_PWMDRV3CPU_VDD_RUN_PWMDRV3

CPU_VDD_RUN_PWMDRV4CPU_VDD_RUN_PWMDRV4CPU_VDD_RUN_PWMDRV4CPU_VDD_RUN_PWMDRV4

CPU_VDD_RUN_CS1+

3KR1%0402

R153

CPU_VDD_RUN_CS2+

R155

CPU_VDD_RUN_CS3+

R157 3KR1%0402R157 3KR1%0402

CPU_VDD_RUN_CS4+

19 20

R159

Place close L6740L

R160

7.5KR1%0402

R15

0R0402

C12

C1u16X0805

CPU_VDD_RUN_LTB

CPU_VDD_RUN_LTB_GAIN

OC_AVG_LI_P

Symbol

Min

0.9

VDISBL

1.9

VENBL

IDISBL

R39 X_300R0402R39 X_300R0402

C68 C0.22u10Y0402C68 C0.22u10Y0402

C70 C0.22u10Y0402C70 C0.22u10Y0402

3KR1%0402

C72 C0.22u10Y0402C72 C0.22u10Y0402

C74 C0.22u10Y0402C74 C0.22u10Y0402

3KR1%0402

CPU_VDD_RUN_CS4-CPU_VDD_RUN_CS4-

NB_PWM

CPU_VDD_ISEN_NB

NB OCP Change while use Dr-MOS

ENDRV_L6740 38

R32

10R1%0805

C0.1u16XC7C0.1u16X

PSI_L

R61

R61 300R0402

300R0402

Typ

1.2

2.4 2.9

2.00.5

VID1

GND

CPU_VDD_RUN_CS1-CPU_VDD_RUN_CS1-CPU_VDD_RUN_CS1-CPU_VDD_RUN_CS1-

GND

CPU_VDD_RUN_CS2-CPU_VDD_RUN_CS2-CPU_VDD_RUN_CS2-CPU_VDD_RUN_CS2-CPU_VDD_RUN_CS2-CPU_VDD_RUN_CS2-CPU_VDD_RUN_CS2-CPU_VDD_RUN_CS2-

GND

CPU_VDD_RUN_CS3-CPU_VDD_RUN_CS3-CPU_VDD_RUN_CS3-CPU_VDD_RUN_CS3-CPU_VDD_RUN_CS3-

GND

VDD_12V2_RUN

VCC3

Max

1.5

5.0

R151

X_3.3KR1%0402

R143

5.1KR0402

VCC5_SB

Units

μA

VDD_12V2_RUN_CORE

VCC5_SB

VDD_12V2_RUN_CORE

Test Conditions

DISBL# = 1 V

D29

S-BAT54C_SOT23

CPU_VDD_PVCC_4

C243

C2.2u16Y0805

GND

EN_PHASE438

CPU_VDD_PVCC_3

GND

EN_PHASE238

GND

D14

S-BAT54C_SOT23

CORE_PRE_OVP

CPU_VDD_RUN_PWMDRV4

CORE_PRE_OVP

C198

C2.2u16Y0805

CPU_VDD_RUN_PWMDRV3

EN_PHASE338

CORE_PRE_OVP

CPU_VDD_PVCC_2

C168

C2.2u16Y0805

EN_PHASE2

CPU_VDD_PVCC_1

C121

C2.2u16Y0805

GND

EN_PHASE138

NB_CORE_PRE_OVP

CPU_VDD_PVCC_NB

C81

C2.2u16Y0805

GND

NB_PWM

CPU_VDD_RUN_PWMDRV2

CORE_PRE_OVP

CPU_VDD_RUN_PWMDRV1

GND

R301

2.2R0805

EN_PHASE4

R264

2.2R0805

EN_PHASE1

EN_PHASE3

GND

R237

2.2R0805

R208

2.2R0805

R170

2.2R0805

R175 2.2R0805R175 2.2R0805

GND

C82

C10p50N0402

2 4 3

6 7

R300 4.7RR300 4.7R

CPU_VDD_BOOT4_RC

CPU_VDD_ISEN_4

D30 X_1N4148W-F_SOD123-RHD30 X_1N4148W-F_SOD123-RH

U22

CPU_VDD_BOOT4

PWM

BOOT

CPU_VDD_RUN_PWMUGATE4

VCC

UGATE

CPU_VDD_ISEN_4

PHASE

CPU_VDD_RUN_PWMLGATE4

GND6LGATE

L6743_SO8-RH

R265 4.7RR265 4.7R

CPU_VDD_BOOT3_RC

CPU_VDD_ISEN_3

D26 X_1N4148W-F_SOD123-RHD26 X_1N4148W-F_SOD123-RH

U19

CPU_VDD_BOOT3

PWM

BOOT

CPU_VDD_RUN_PWMUGATE3CPU_VDD_RUN_PWMUGATE3CPU_VDD_RUN_PWMUGATE3

VCC

UGATE

CPU_VDD_ISEN_3

PHASE

CPU_VDD_RUN_PWMLGATE3

GND6LGATE

L6743_SO8-RH

R244 4.7RR244 4.7R

CPU_VDD_BOOT2_RC CPU_VDD_BOOT2

CPU_VDD_ISEN_2

D24

X_1N4148W-F_SOD123-RH

U17

CPU_VDD_BOOT2

PWM

BOOT

CPU_VDD_RUN_PWMUGATE2

VCC

UGATE

CPU_VDD_ISEN_2

PHASE

GND6LGATE

CPU_VDD_RUN_PWMLGATE2

L6743_SO8-RH

R216 4.7RR216 4.7R

CPU_VDD_ISEN_1

CPU_VDD_BOOT1_RC CPU_VDD_BOOT1

D22 X_1N4148W-F_SOD123-RHD22 X_1N4148W-F_SOD123-RH

U14

CPU_VDD_BOOT1

PWM

BOOT

CPU_VDD_RUN_PWMUGATE1

VCC

UGATE

PHASE

GND6LGATE

CPU_VDD_ISEN_NB CPU_VDD_BOOTNB_RC CPU_VDD_BOOTNB

VCC PVCC

GND

PWM

ST/L6741_SOIC8-RHU9ST/L6741_SOIC8-RH

7 5

CPU_VDD_RUN_PWMLGATE1

L6743_SO8-RH

R177 4.7RR177 4.7R

D12 X_1N4148W-F_SOD123-RHD12 X_1N4148W-F_SOD123-RH

CPU_VDD_RUN_PWMUGATENB

UGATE

CPU_VDD_BOOTNBCPU_VDD_BOOTNB

BOOT

PHASE

LGATE

CPU_VDD_RUN_PWMLGATENB

CPU_VDD_ISEN_1

CPU_VDD_RUN

Notes: Truth table for the DISBL# pin.

DISBL# Input

“L”

Shutdown (GL, GH = “L”)

“Open”

“H”

Enable (GL, GH = “Active”)

CPUVDD_EN

VDD_12V2_RUN_CORE

C247

C0.22u25X-RH

CPU_VDD_BOOT4

Q54

Q51

N-048090_TO252

R162 1R1%R162 1R1%

R165 0RR165 0R

R174 0RR174 0R

R269

X_10KR

VDD_12V2_RUN_CORE

R257

X_10KR

VDD_12V2_RUN_CORE

R224

X_10KR

VDD_12V2_RUN_CORE

R191

X_10KR

VDD_12V2_RUN_CORE

R148

X_10KR

N-048060_TO252

Q52

Q50

N-048090_TO252

Q49

N-048060_TO252

Q41

N-048090_TO252

Q40

N-048060_TO252

Q36

N-048090_TO252

Q32

N-048060_TO252

Q25

N-048090_TO252

Q26

N-048060_TO252

GND

Q53

N-048060_TO252

GND

Q45

N-048090_TO252

Q48

N-048060_TO252

GND

Q38

N-048090_TO252

Q39

N-048060_TO252

GND

Q29

N-048090_TO252

Q33

N-048060_TO252

GND

Q24

N-048060_TO252

R287 1KR1%0805R287 1KR1%0805

C206

C0.22u25X-RH

C182

C0.22u25X-RH

R240 1KR1%0805R240 1KR1%0805

C136

C0.22u25X-RH

C86

C0.22u25X-RH

CPU_VDD_ISEN_NB

R290 0RR290 0R

R291 0RR291 0R

CPU_VDD_BOOT3

R261 1KR1%0805R261 1KR1%0805

R262 0RR262 0R

R263 0RR263 0R

R233 0RR233 0R

R234 0RR234 0R

R214 1KR1%0805R214 1KR1%0805

R204 0RR204 0R

R205 0RR205 0R

Driver Chip Status

Shutdown (GL, GH = “L”)

Fit the NB Core OVP L6740L PreOVP Reset

R11

C1500p50X0402C1C1500p50X0402

3.3KR1%0402

R10

3.3KR1%0402

C200

C203

C1u16Y

C10u16Y1206

GND

C172

C175

C1u16Y

C10u16Y1206

GND

C139

C147

C1u16Y

C10u16Y1206

GND

C97

C103

C1u16Y

C10u16Y1206

GND

C57

C52

C1u16Y

GND

C10u16Y1206

NB_PWM

R34

200R0402

2N3904

CHOKE8

CH-0.25u40A0.65m-RH

1 2

C225

CP45CP45

C2200p50X

R158

39.2KR1%0402

C73 C0.01u25X0402C73 C0.01u25X0402

CPU_VDD_RUN_SNUB4

R285

2.2R0805

GND

CPU_VDD_RUN_CS4+

CHOKE7

CH-0.25u40A0.65m-RH

1 2

C191

C2200p50X

CP43CP43

R156

39.2KR1%0402

C71 C0.01u25X0402C71 C0.01u25X0402

CPU_VDD_RUN_SNUB3

R260

2.2R0805

GND

CPU_VDD_RUN_CS3+

CHOKE6

CH-0.25u40A0.65m-RH

CH-0.25u40A0.65m-RH 1 2

C155

C2200p50X

CP40CP40

R154

39.2KR1%0402

CPU_VDD_RUN_SNUB2

C69

C0.01u25X0402

R229

2.2R0805

GND

CPU_VDD_RUN_CS2+

CHOKE4

CH-0.25u40A0.65m-RH

CH-0.25u40A0.65m-RH 1 2

C99

C2200p50X

CP38CP38

R152

39.2KR1%0402

C67

C0.01u25X0402

CPU_VDD_RUN_SNUB1

R197

2.2R0805

GND

CPU_VDD_RUN_CS1+

CPU_VDDNB_RUN

CHOKE1

CH-1.1u27A2.5m-RH

CH-1.1u27A2.5m-RH 1 2

C41

C2200p50X0402

CPU_VDD_RUN_SNUBNB

R110

2.2R0805

GND

VCCP

EC10

CD820u2.5SO-RH-1+EC10

CD820u2.5SO-RH-1

EC11

CD820u2.5SO-RH-1+EC11

CD820u2.5SO-RH-1

CP46CP46

GND

CPU_VDD_RUN_CS4-

EC26

CD820u2.5SO-RH-1+EC26

CD820u2.5SO-RH-1

EC25

CD820u2.5SO-RH-1+EC25

CD820u2.5SO-RH-1

R232

47.5R1%

CP44CP44

47.5R1%

GND

CPU_VDD_RUN_CS3-CPU_VDD_RUN_CS2-

CP42CP42

CP39CP39

GND

EC21

CD820u2.5SO-RH-1+EC21

CD820u2.5SO-RH-1

EC20

CD820u2.5SO-RH-1+EC20

CD820u2.5SO-RH-1

GND

EC14

CD820u2.5SO-RH-1+EC14

CD820u2.5SO-RH-1

EC15

CD820u2.5SO-RH-1+EC15

CD820u2.5SO-RH-1

CPU_VDD_RUN_CS1-

VCCP_NB

EC2

CD820u2.5SO-RH-1+EC2

CD820u2.5SO-RH-1

EC1

CD820u2.5SO-RH-1+EC1

CD820u2.5SO-RH-1

R77

47.5R1%

GND GND

MSI

MICRO-STAR INt'L CO., LTD.

Title

L6740+L6743 4+1 PHASE

Size Document Number Rev

MS-7576

Date: Sheet

Date: Sheet of

642Friday, November 14, 2008

VCC3

D D

C C

RS740 RX780

B B

RS780 (Single-ended)

NB_OSC_14M16

R535

90.9R1%0402

CLK_VDD

CP31CP31

1 2

L35

X_30L3A-15_0805-RH

C545

10u/10v/Y5/8

VCC3

L29

X_30L3A-15_0805-RH

CLK_VDD

VCC3

1 2

L34

L34 X_30L3A-15_0805-RH

X_30L3A-15_0805-RH

C528 C22p50N0402C528 C22p50N0402

C529 C22p50N0402C529 C22p50N0402 R561

CLK_VDD

FP_RST#21,31,34,36

SCL06,11,12,21,24,29,34,37,38

SDA06,11,12,21,24,29,34,37,38

CLK_VDD

SCL0 SDA0

OSC_14M_NB

C520

0.1u/16v/X5/4

CP22CP22

CP30CP30

C539

1u/6.3v/Y5/4

14.318MHZ16P_D-RH

1 2

R527 X_4.7K/4R527 X_4.7K/4 R530 0R/4R530 0R/4

R559 X_R/2R559 X_R/2 R569 X_R/2R569 X_R/2

R525 1K/4R525 1K/4

CLK_VDDA

10u/10v/Y5/8

VDD48

R553

R553 10MR1%0402

10MR1%0402

CLK_VDD

C521

0.1u/16v/X5/4

C484

C507

0.1u/16v/X5/4

TXC1 TXC2

RST#_CLK SCL0_C

SDA0_C PD#

3.3V 33R serial

R540

1.8V 82.5R/130R

1.1V 158R/90.9R

R532 158R/4/1%_BR532 158R/4/1%_B

R540

X_10K/4

C519

C519 X_10p/50v/N/4

X_10p/50v/N/4

R549

X_8.2K/4

R546

8.2K/4

R547

R547 X_8.2K/4

X_8.2K/4

SEL_HTT66 SEL_SATA

SEL_OC_MODE

R541

8.2K/4

42479_rs780_scl_nda_1.01.doc

Reserved for EMI 0906

HTT CLOCK

REF0/SEL_HTT66

A A

REF/SEL_SATA

REF2

100.00 DIFFERENTIAL

66.66 SINGLE END

PIN40,41 SRC6T/C and SATAT_LPRS select

100MHz differential spreading SRC clock

100MHz non-spreading differential SATA clock

atched input to select pin functionality

ATIG/SRC PCIE Gen2 Mode with limited overclocking ability ATIG/SRC PCIE Gen1 Mode with higher

overclocking ability

EXT CLK FREQUENCY SELECT TABLE(MHZ)

0 0 0 0 0 1

0 1 0 0 1 1 1 0 0 1 0 1 1 1 1

C506

0.1u/16v/X5/4

U42

VDDA

GNDA

VDDREF

GNDREF

VDDSATA

GNDSATA

VDD48

GND48

VDDCPU

GNDCPU

VDDHTT

GNDHTT

VDDATIG

VDDSRC

VDDSB

GNDATIG

GNDSRC

GNDSB

*RESTORE#

SMBCLK

SMBDAT

*PD#

**SEL_HTT66/REF0

*SEL_SATA/REF1

REF2

RTM880N-793-VB-GR_QFN64-RH

FS2

C490

TGND

C490

0.1u/16v/X5/4

CPU_CLK

CPU_CLK#

49 46 45

NBGFX_SRCCLK

NBGFX_SRCCLK#

GFX_CLKP

GFX_CLKN

35 32 31

PE8_GXF_CLK_R

PE8_GXF_CLK#_R

NBLINKCLK

NBLINKCLK#

SBSRCCLK

SBSRCCLK#

GPPCLK2 PE8_GXF_CLK

21 20

GPPCLK0

GPPCLK0#

1394CLK2

1394CLK2#

LANCLK1

LANCLK1#

GPPCLK1

GPPCLK1#

DOC1#

DOC0#

6 41 40

HTREFCLK

HTREFCLK#

SIO_CLK_R

USBCLK_EXT_R

C522

C522 X_10p/50v/N/4

X_10p/50v/N/4

USB

48.00

X/6X/3

48.00

30.0060.00

48.00

C491

C546

0.1u/16v/X5/4

SEL_SATA 25M_48M_66M_OSC

CPUFS1

Hi-Z X

180.00

220.00

100.00

133.33

200.00

C491

0.1u/16v/X5/4

CPUK8_0T CPUK8_0C CPUK8_1T CPUK8_1C

ATIG0T ATIG0C ATIG1T ATIG1C ATIG2T ATIG2C ATIG3T ATIG3C

SB_SRC0T

SB_SRC0C

SB_SRC1T

SB_SRC1C

SRC0T SRC0C SRC1T SRC1C SRC2T SRC2C SRC3T SRC3C SRC4T SRC4C

**DOC_1/SRC5T **DOC_0/SRC5C

SRC6T/SATAT SRC6C/SATAC

HTT0T/66M

HTT0C/66M

48Mz_0

*SEL_DOC/48Mz_1

R536 X_0R0402R536 X_0R0402

HTTFS0 PCI

SRCCLK

[2:1]

Hi-Z Hi-Z100.00 Reserved

100.00

36.56 73.12

100.00

66.66 33.33

100.00

66.66 33.33

100.00

66.66 33.33 Normal HAMMER operation

C538

0.1u/16v/X5/4

R523 X_0R0402R523 X_0R0402 R528 X_0R0402R528 X_0R0402

R545 0R0402R545 0R0402 R548 0R0402R548 0R0402

22R0402

R558

R558 R557

R557

22R0402

C10p50N0402

25M_48M_66M_OSC 19

COMMENT

Reserved Reserved Reserved Reserved Reserved

C541

0.1u/16v/X5/4

CPU_CLK 8 CPU_CLK# 8

NBGFX_SRCCLK 16 NBGFX_SRCCLK# 16

GFX_CLKP 24 GFX_CLKN 24

PE8_GXF_CLK 37 PE8_GXF_CLK# 37

NBLINKCLK 16 NBLINKCLK# 16 SBSRCCLK 19 SBSRCCLK# 19

PE8_GXF_CLK#GPPCLK2#

GPPCLK0 24 GPPCLK0# 24 1394CLK2 33 1394CLK2# 33

LANCLK1 29 LANCLK1# 29 GPPCLK1 24 GPPCLK1# 24

HTREFCLK 16

HTREFCLK# 16

USBCLK_EXT

C549

EMI EMI

SIO_CLK 31

C550

C10p50N0402

SRC5T

DOC

CLK_VDD

R556

R556 10K/4

10K/4

USBCLK_EXT_R

R568

R568 X_10K/4

X_10K/4

VCCA_1V2

3VDUAL

R513 X_4.7K/4R513 X_4.7K/4 R512 X_4.7K/4R512 X_4.7K/4

C508

X_0.1u/25v/Y5/4

Q86Q86

3 4

CPU FrequencyDOC1 DOC2 0 0

The OC switchs are both turned on as default

200MHz DEFAULT

250MHz,{CR07[7:5], CR08[7:0]}

300MHz,{CR14[2:0], CR13[7:0]}

350MHz,{CR1C[2:0], CR15[7:0]}

VCC3 VCC3

R561 10K/4

10K/4

OCSWITCH1

DOC0# DOC1#

OFF OFF

SW-DIPP2-RH

Reserve only

VCC3

USBCLK_EXT

R575 X_0R0402R575 X_0R0402 R571 X_0R0402R571 X_0R0402

USBCLK_EXT USB_CLK

1 2 3 4

PD#

R562

R562 10K/4

10K/4

U45

XIN/CLKIN XOUT FS GND

X_PCS3P73U00A

R567 0R0402R567 0R0402

Title

Document Number

VDD

SSEXTR

ModOUT

Micro Star Restricted Secret

Clock-Gen RTM880N-793

MICRO-STAR INT'L CO.,LTD.

No. 69, Li-De St, Jung-He City,

No. 69, Li-De St, Jung-He City, Taipei Hsien, Taiwan

Taipei Hsien, Taiwan

Taipei Hsien, Taiwan http://www.msi.com.tw

http://www.msi.com.tw

VCC3 VCC3

C572

R576 X_10K/4R576 X_10K/4 R590 X_0R0402R590 X_0R0402 R582 X_0R0402R582 X_0R0402

X_22R0402

R572

MS-7576

Last Revision Date:

Last Revision Date: Sheet

Sheet

C572

VCC3

X_0.1u/16v/X5/4

USB_CLK 21

Friday, November 14, 2008

742

C566

Rev

VID56 VID46 VID36 VID26

VID16

VID06

CPU_HOT

CPU_HOT 19

CPU1D

C10

VDDA_1

D10

VDDA_2

MISC.

A8 B8

C9 D8 C7

AL3

AL6 AK6

CPU_SA0

AK4

ALERT_L

AL4

AL10 AJ10

AH10

AL9

G2 G1

F3 E12 F12

AH11

AJ11

A10 B10 F10

E9 AJ7

C5 AH9

E5 AJ5 AH7 AJ6

C18 C20

F2 G24 G25 H25 L25 L26

VCC3 +1.8V_S03VDUAL VCC_DDR

135

246

CPU_TRST_L CPU_TDI CPU_TMS CPU_TCK CPU_TMS CPU_DBREQ_L CPU_TDO CPU_DBRDY LDT_RST#

X_H2X13[25]SM-2PITCH_BLACK

HDT1

3 4

5 7 8

109

11 12 13 14 15 16 17 18 19 20 21 22 23 24

MISC.

CLKIN_H CLKIN_L

PWROK LDTSTOP_L RESET_L

CPU_PRESENT_L

SIC SID SA0 ALERT_L

TDI TRST_L TCK TMS

DBREQ_L VDD_FB_H

VDD_FB_L M_VDDIO_PWRGD VDDR_SENSE M_VREF

M_ZN M_ZP

TEST25_H TEST25_L TEST19 TEST18 TEST13 TEST9

TEST17 TEST16 TEST15 TEST14 TEST12

TEST7 TEST6 TEST3 TEST2

RSVD1 RSVD2 RSVD3 RSVD4 RSVD5

INT. MISC.

RSVD6 RSVD7 RSVD8

ZIF-SOCKET941-RH

R314X_10K/4 R314X_10K/4

R319X_10K/4 R319X_10K/4

R311X_10K/4 R311X_10K/4

CORE_TYPE

THERMTRIP_L

PROCHOT_L

VDDIO_FB_H

VDDIO_FB_L VDDNB_FB_H VDDNB_FB_L

R323X_10K/4 R323X_10K/4

R302X_10K/4 R302X_10K/4

R303X_10K/4 R303X_10K/4

R309X_10K/4 R309X_10K/4

R316X_10K/4 R316X_10K/4

X_8P4R-1KR0402

D31

D31 X_RB751V-40_SOD323

X_RB751V-40_SOD323

IMC_CRST_L

VID5

VID4 SVC/VID3 SVD/VID2

PVIEN/VID1

VID0

THERMDC THERMDA

TDO

DBRDY

PSI_L

HTREF1 HTREF0

TEST29_H

TEST29_L

TEST24 TEST23 TEST22 TEST21 TEST20

TEST28_H

TEST28_L

TEST27 TEST26 TEST10

TEST8

RSVD9 RSVD10 RSVD11 RSVD12 RSVD13 RSVD14 RSVD15 RSVD16

RN4

CPU_TDI CPU_TRST_L CPU_TCK CPU_DBREQ_L

CPU_CORE_TYPE

G5 D2

D1 C1 E3 E2 E1

AG9 AG8 AK7 AL7

AK10

B6 AK11

AL11 G4 G3

F1 V8

C11 D11

AK8 AH8 AJ9 AL8 AJ8

J10 H9

CPU_TEST27

AK9

CPU_TEST26

AK5 G7 D4

L30 L31 AD25 AE24 AE25 AJ18 AJ20 AK3

VID5 VID4 VID3 VID2 VID1 VID0

THERMDC_CPU THERMDA_CPU

CPU_HOT

CPU_TDO

CPU_DBRDY

CPU_PSI_L HTREF1

HTREF0

CPU_TEST29_H CPU_TEST29_L

CPU_TEST24 CPU_TEST23

CPU_TEST22

CPU_TEST21 CPU_TEST20

135

R280

R280 300R/4

300R/4

246

VCC_DDR

R200

R200 1KR0402

1KR0402

NB_VSEN 6 NB_GND 6

TP13TP13 TP10TP10

TP12TP12

R283 X_300R/4R283 X_300R/4 R276 300R/4R276 300R/4

CPU_CORE_TYPE 6

THERMDC_CPU 31 THERMDA_CPU 31

VCC_DDR

R212

80.6R/6/1%

VCC_DDR

300R/4

R289

CPU_DBREQ_L

CPU_PRESENT_L CPU_TEST25_H

CPU_TEST25_L

M_VDDIO_PWRGD

TP5TP5

C219

1000p/50v/X7/4

R284

300R0402

C128

C128 X_C0.1u25Y

X_C0.1u25Y

R282 1K/4/5%R282 1K/4/5% R203 510R/0402R203 510R/0402

R206 510R/0402R206 510R/0402

R207 1K/4/5%R207 1K/4/5%

Title

Document Number

VCC_DDR

R272

300R/4

CPU_THRIP_L#

MICRO-STAR INT'L CO.,LTD.

No. 69, Li-De St, Jung-He City,

No. 69, Li-De St, Jung-He City, Taipei Hsien, Taiwan

Taipei Hsien, Taiwan

Taipei Hsien, Taiwan http://www.msi.com.tw

http://www.msi.com.tw

VCC_DDR

R293

R293 300R/4

300R/4

R278 44.2R/6/1%R278 44.2R/6/1% R279 44.2R/6/1%R279 44.2R/6/1%

C220

1000p/50v/X7/4

VCC_DDR

R201

R201 15R/6/1%

15R/6/1%

R202

R202 15R/6/1%

15R/6/1%

VCC_DDR

1 3 5 7

VCC_DDR

Micro Star Restricted Secret

K9 M2 HT I/F,CTRL&DEBUG

MS-7576

R288

4.7K/4

Q55

Q55 2N3904_SOT23

2N3904_SOT23

R298

4.7K/4

Q56

Q56 2N3904_SOT23

2N3904_SOT23

VCCA_1V2

CPU_M_VREF

C125

0.1u/25v/Y5/4

RN2

2 4 6 8

8P4R/300R/6

Last Revision Date:

Last Revision Date: Sheet

Sheet

CPU_THRIP# 21

TALERT# 20,31

TP1TP1

C126

C126 1000p/50v/X7/6

1000p/50v/X7/6

LDT_RST# LDT_STOP# LDT_PWRGD

Friday, November 14, 2008

842

Rev

CPU1A

L0_CLKIN_H1 L0_CLKIN_L1 L0_CLKIN_H0 L0_CLKIN_L0

L0_CTLIN_H1 L0_CTLIN_L1 L0_CTLIN_H0 L0_CTLIN_L0

L0_CADIN_H15 L0_CADIN_L15 L0_CADIN_H14 L0_CADIN_L14 L0_CADIN_H13 L0_CADIN_L13 L0_CADIN_H12 L0_CADIN_L12 L0_CADIN_H11 L0_CADIN_L11 L0_CADIN_H10 L0_CADIN_L10 L0_CADIN_H9 L0_CADIN_L9 L0_CADIN_H8 L0_CADIN_L8

L0_CADIN_H7 L0_CADIN_L7 L0_CADIN_H6 L0_CADIN_L6 L0_CADIN_H5 L0_CADIN_L5 L0_CADIN_H4 L0_CADIN_L4 L0_CADIN_H3 L0_CADIN_L3 L0_CADIN_H2 L0_CADIN_L2 L0_CADIN_H1 L0_CADIN_L1 L0_CADIN_H0 L0_CADIN_L0

HT_CADIN_H[15..0] HT_CADIN_L[15..0] HT_CADOUT_H[15..0] HT_CADOUT_L[15..0]

C221

4.7u/16v/Y5/1206

L0_CLKOUT_H1 L0_CLKOUT_H0

L0_CTLOUT_H1 L0_CTLOUT_H0

L0_CADOUT_H15 L0_CADOUT_L15 L0_CADOUT_H14 L0_CADOUT_L14 L0_CADOUT_H13 L0_CADOUT_L13 L0_CADOUT_H12 L0_CADOUT_L12 L0_CADOUT_H11 L0_CADOUT_L11 L0_CADOUT_H10 L0_CADOUT_L10

L0_CADOUT_H9 L0_CADOUT_L9 L0_CADOUT_H8 L0_CADOUT_L8

L0_CADOUT_H7 L0_CADOUT_L7 L0_CADOUT_H6 L0_CADOUT_L6 L0_CADOUT_H5 L0_CADOUT_L5 L0_CADOUT_H4

HT LINK

L0_CADOUT_L4 L0_CADOUT_H3 L0_CADOUT_L3 L0_CADOUT_H2 L0_CADOUT_L2 L0_CADOUT_H1 L0_CADOUT_L1 L0_CADOUT_H0 L0_CADOUT_L0

112233445566778

C250

C223

X_4.7u/16v/Y5/1206

L0_CLKOUT_L1 L0_CLKOUT_L0

L0_CTLOUT_L1 L0_CTLOUT_L0

AD5 AD4 AD1 AC1

Y6 W6 W2 W3

Y5 Y4 AB6 AA6 AB5 AB4 AD6 AC6 AF6 AE6 AF5 AF4 AH6 AG6 AH5 AH4

Y1 W1 AA2 AA3 AB1 AA1 AC2 AC3 AE2 AE3 AF1 AE1 AG2 AG3 AH1 AG1

C232

0.22u/16v/X7/6

80/2A/B8L280/2A/B8

C230

C258

X_0.22u/16v/X7/6

HT_CLKOUT_H1 14 HT_CLKOUT_L1 14 HT_CLKOUT_H0 14 HT_CLKOUT_L0 14

HT_CTLOUT_H1 14 HT_CTLOUT_L1 14 HT_CTLOUT_H0 14 HT_CTLOUT_L0 14

HT_CADOUT_H15 HT_CADOUT_L15 HT_CADOUT_H14 HT_CADOUT_L14 HT_CADOUT_H13 HT_CADOUT_L13 HT_CADOUT_H12 HT_CADOUT_L12 HT_CADOUT_H11 HT_CADOUT_L11 HT_CADOUT_H10 HT_CADOUT_L10 HT_CADOUT_H9 HT_CADOUT_L9 HT_CADOUT_H8 HT_CADOUT_L8

HT_CADOUT_H7 HT_CADOUT_L7 HT_CADOUT_H6 HT_CADOUT_L6 HT_CADOUT_H5 HT_CADOUT_L5 HT_CADOUT_H4 HT_CADOUT_L4 HT_CADOUT_H3 HT_CADOUT_L3 HT_CADOUT_H2 HT_CADOUT_L2 HT_CADOUT_H1 HT_CADOUT_L1 HT_CADOUT_H0 HT_CADOUT_L0

VDDA25VDDA_25

X_0.22u/16v/X7/6

4.7u/16v/Y5/1206

R211

169R/6/1%

LDT_PWRGD6,19

R273

39.2R/6/1%

CPU_STRAP_HI_E11 CPU_STRAP_LO_F11

R281

39.2R/6/1%

THERM_SIC_RTHERM_SIC THERM_SID_R

C114

CPUCLKIN CPUCLKIN#

LDT_STOP#16,19

LDT_RST#16,19

C127

X_1000p/50v/X7/6

THERM_SIC THERM_SID

VCC_DDR

COREFB+6

COREFB-6

R213 300R/4R213 300R/4 R210 300R/4R210 300R/4

THERM_SIC_R 31 THERM_SID_R 31

C104

0.22u/16v/X7/6

LDT_PWRGD LDT_STOP#

LDT_RST#

TP14TP14

R270 0R0402R270 0R0402 R275 X_1KR0402R275 X_1KR0402

CPU_TDI CPU_TRST_L CPU_TCK CPU_TMS

CPU_DBREQ_L COREFB+

COREFB-

TP2TP2

M_VDDIO_PWRGD

TP7TP7

CPU_VDDR_SENSE

CPU_TEST25_H CPU_TEST25_L

TP3TP3 TP6TP6 TP9TP9 TP4TP4 TP11TP11

TP8TP8

C110

3300p/50v/X7/4

CPU_PRESENT_L

CPU_M_VREF

CPU_TEST19 CPU_TEST18

CPU_TEST17 CPU_TEST16 CPU_TEST15 CPU_TEST14 CPU_TEST12

CPU_RSVD3

VDDA25

R744 X_0R0402R744 X_0R0402

THERM_SID

R742 X_0R0402R742 X_0R0402

C124

CPU_CLK7

CPU_CLK#7

C124

3900p/50vX7/6

C130

3900p/50vX7/6

VCC_DDR

R271 1K/4/5%R271 1K/4/5% R277 X_1K/4/5%R277 X_1K/4/5%

VCC_DDR

HT_CADIN_H[15..0]14

HT_CADIN_L[15..0]14

HT_CADOUT_H[15..0]14

HT_CADOUT_L[15..0]14

VCCA_1V2 VCCA_1V2

D D

C C

C235

0.22u/16v/X7/6

HT_CLKIN_H114

HT_CLKIN_L114

HT_CLKIN_H014

HT_CLKIN_L014

HT_CTLIN_H114

HT_CTLIN_L114

HT_CTLIN_H014

HT_CTLIN_L014

HT_CADIN_H15 HT_CADIN_L15 HT_CADIN_H14 HT_CADIN_L14 HT_CADIN_H13 HT_CADIN_L13 HT_CADIN_H12 HT_CADIN_L12 HT_CADIN_H11 HT_CADIN_L11 HT_CADIN_H10 HT_CADIN_L10 HT_CADIN_H9 HT_CADIN_L9 HT_CADIN_H8 HT_CADIN_L8

HT_CADIN_H7 HT_CADIN_L7 HT_CADIN_H6 HT_CADIN_L6 HT_CADIN_H5 HT_CADIN_L5 HT_CADIN_H4 HT_CADIN_L4 HT_CADIN_H3 HT_CADIN_L3 HT_CADIN_H2 HT_CADIN_L2 HT_CADIN_H1 HT_CADIN_L1 HT_CADIN_H0 HT_CADIN_L0

C257

C260

X_0.22u/16v/X7/6

0.22u/16v/X7/6

C261

X_0.22u/16v/X7/6

N6 P6 N3 N2

V4 V5 U1 V1

U6 V6 T4 T5 R6 T6 P4

P5 M4 M5

L6 M6 K4 K5

J6 K6

U3 U2 R1

T1 R3 R2 N1 P1

L1 M1

J1 K1

ZIF-SOCKET941-RH

CPU output pin:TDO,DBRDY ;OTHERS :INPUT

B B

A A

IMC_TDI21

IMC_DBRDY21

IMC_DBRDY CPU_DBRDY

Q58

IMC_TCK

Q58

Q57

X_NN-CMKT3904_SOT363-6-RH

IMC_TDO21

IMC_TCK21 IMC_TMS21

CPU_TDOIMC_TDI

+1.8V_S0 +1.8V_S0

RN5

X_8P4R-10KR0402

CPU_TDIIMC_TDO

CPU_TCK

IMC_DBREQ_L21

LDT_RST# CPU_TRST_L IMC_TRST_L

X_NN-CMKT3904_SOT363-6-RH

IMC_DBREQ_L

IMC_TMS CPU_TMS

Q61

Q60

IMC_CRST_L

RN6

X_8P4R-10KR0402

CPU_DBREQ_L

IMC_CRST_L 21 IMC_TRST_L 21

RN9

X_8P4R-10KR0402

RN8

X_8P4R-10KR0402

IMC_TCK IMC_CRST_L IMC_TMS IMC_TDO IMC_DBREQ_L IMC_DBRDY IMC_TDI IMC_TRST_L

CPU_DBREQ_L CPU_DBRDY CPU_TCK CPU_TMS CPU_TDI CPU_TRST_L CPU_TDO

VCC_DDR

VCC3

R308

R308 X_4.7K/4

X_4.7K/4

135

246

MEM_MA_DQS_L[7..0]11,12 MEM_MA_DQS_H[7..0]11,12

MEM_MA_DM[7..0]11,12 MEM_MA_ADD[15..0]11,12 MEM_MA_DATA[63..0]11,12 MEM_MB_DATA[63..0]11,12

D D

MEM_MA1_CLK_H112 MEM_MA1_CLK_L112 MEM_MA0_CLK_H011 MEM_MA0_CLK_L011 MEM_MA1_CLK_H012 MEM_MA1_CLK_L012 MEM_MA0_CLK_H111 MEM_MA0_CLK_L111

MEM_MA0_CS_L111 MEM_MA0_CS_L011

MEM_MA0_ODT111 MEM_MA0_ODT011

MEM_MA1_CS_L112 MEM_MA1_CS_L012

MEM_MA1_ODT112

C C

B B

MEM_MA1_ODT012 MEM_MA_RESET#11,12 MEM_MB_RESET#11,12 MEM_MA_CAS_L11,12

MEM_MA_WE_L11,12 MEM_MA_RAS_L11,12

MEM_MA_BANK211,12 MEM_MA_BANK111,12 MEM_MA_BANK011,12

MEM_MA_CKE111,12 MEM_MA_CKE011,12

MEM_MA1_CLK_H1 MEM_MA1_CLK_L1 MEM_MA0_CLK_H0 MEM_MA0_CLK_L0 MEM_MA1_CLK_H0 MEM_MA1_CLK_L0 MEM_MA0_CLK_H1 MEM_MA0_CLK_L1

MEM_MA0_CS_L1 MEM_MA0_CS_L0

MEM_MA0_ODT1 MEM_MB0_ODT1 MEM_MA0_ODT0

MEM_MA1_CS_L1 MEM_MA1_CS_L0

MEM_MA1_ODT1 MEM_MA1_ODT0

MEM_MA_CAS_L MEM_MA_WE_L MEM_MA_RAS_L

MEM_MA_BANK2 MEM_MA_BANK1 MEM_MA_BANK0

MEM_MA_CKE1 MEM_MA_CKE0

MEM_MA_ADD15 MEM_MA_ADD14 MEM_MA_ADD13 MEM_MA_ADD12 MEM_MA_ADD11 MEM_MA_ADD10 MEM_MA_ADD9 MEM_MA_ADD8 MEM_MA_ADD7 MEM_MA_ADD6 MEM_MA_ADD5 MEM_MA_ADD4 MEM_MA_ADD3 MEM_MA_ADD2 MEM_MA_ADD1 MEM_MA_ADD0

MEM_MA_DQS_H7 MEM_MA_DQS_L7 MEM_MA_DQS_H6 MEM_MA_DQS_L6 MEM_MA_DQS_H5 MEM_MA_DQS_L5 MEM_MA_DQS_H4 MEM_MA_DQS_L4 MEM_MA_DQS_H3 MEM_MA_DQS_L3 MEM_MA_DQS_H2 MEM_MA_DQS_L2 MEM_MA_DQS_H1 MEM_MA_DQS_L1 MEM_MA_DQS_H0 MEM_MA_DQS_L0

MEM_MA_DM7 MEM_MA_DM6 MEM_MA_DM5 MEM_MA_DM4 MEM_MA_DM3 MEM_MA_DM2 MEM_MA_DM1 MEM_MA_DM0

MEM_MA_DQS_L[7..0] MEM_MA_DQS_H[7..0] MEM_MA_DM[7..0] MEM_MA_ADD[15..0] MEM_MA_DATA[63..0] MEM_MB_DATA[63..0]

CPU1B

AG21

MA_CLK_H7

AG20

MA_CLK_L7

AE20

MA_CLK_H6

AE19

MA_CLK_L6

U27

MA_CLK_H5

U26

MA_CLK_L5

V27

MA_CLK_H4

W27

MA_CLK_L4

W26

MA_CLK_H3

W25

MA_CLK_L3

U24

MA_CLK_H2

V24

MA_CLK_L2

G19

MA_CLK_H1

H19

MA_CLK_L1

G20

MA_CLK_H0

G21

MA_CLK_L0

AC25

MA0_CS_L1

AA24

MA0_CS_L0

AE28

MA0_ODT1

AC28

MA0_ODT0

AD27

MA1_CS_L1

AA25

MA1_CS_L0

AE27

MA1_ODT1

AC27

MA1_ODT0

E20

MA_RESET_L

AB25

MA_CAS_L

AB27

MA_WE_L

AA26

MA_RAS_L

N25

MA_BANK2

Y27

MA_BANK1

AA27

MA_BANK0

L27

MA_CKE1

M25

MA_CKE0

M27

MA_ADD15

N24

MA_ADD14

AC26

MA_ADD13

N26

MA_ADD12

P25

MA_ADD11

Y25

MA_ADD10

N27

MA_ADD9

R24

MA_ADD8

P27

MA_ADD7

R25

MA_ADD6

R26

MA_ADD5

R27

MA_ADD4

T25

MA_ADD3

U25

MA_ADD2

T27

MA_ADD1

W24

MA_ADD0

AD15

MA_DQS_H7

AE15

MA_DQS_L7

AG18

MA_DQS_H6

AG19

MA_DQS_L6

AG24

MA_DQS_H5

AG25

MA_DQS_L5

AG27

MA_DQS_H4

AG28

MA_DQS_L4

D29

MA_DQS_H3

C29

MA_DQS_L3

C25

MA_DQS_H2

D25

MA_DQS_L2

E19

MA_DQS_H1

F19

MA_DQS_L1

F15

MA_DQS_H0

G15

MA_DQS_L0

AF15

MA_DM7

AF19

MA_DM6

AJ25

MA_DM5

AH29

MA_DM4

B29

MA_DM3

E24

MA_DM2

E18

MA_DM1

H15

MA_DM0

ZIF-SOCKET941-RH

MA_DATA63 MA_DATA62 MA_DATA61 MA_DATA60 MA_DATA59 MA_DATA58 MA_DATA57 MA_DATA56 MA_DATA55 MA_DATA54 MA_DATA53 MA_DATA52 MA_DATA51 MA_DATA50 MA_DATA49 MA_DATA48 MA_DATA47 MA_DATA46 MA_DATA45 MA_DATA44 MA_DATA43 MA_DATA42 MA_DATA41 MA_DATA40 MA_DATA39 MA_DATA38 MA_DATA37 MA_DATA36 MA_DATA35 MA_DATA34 MA_DATA33 MA_DATA32 MA_DATA31 MA_DATA30 MA_DATA29 MA_DATA28 MA_DATA27 MA_DATA26 MA_DATA25 MA_DATA24 MA_DATA23 MA_DATA22 MA_DATA21 MA_DATA20 MA_DATA19 MA_DATA18 MA_DATA17 MA_DATA16 MA_DATA15 MA_DATA14 MA_DATA13 MA_DATA12

MEM CHA

MA_DATA11 MA_DATA10

MA_DATA9 MA_DATA8 MA_DATA7 MA_DATA6 MA_DATA5 MA_DATA4 MA_DATA3 MA_DATA2 MA_DATA1 MA_DATA0

MA_DQS_H8

MA_DQS_L8

MA_DM8

MA_CHECK7 MA_CHECK6 MA_CHECK5 MA_CHECK4 MA_CHECK3 MA_CHECK2 MA_CHECK1 MA_CHECK0

MA_EVENT_L

MEM_MB_DQS_L[7..0]11,12 MEM_MB_DQS_H[7..0]11,12

MEM_MB_DM[7..0]11,12

MEM_MB_ADD[15..0]11,12

MEM_MA_DATA63

AE14

MEM_MA_DATA62

AG14

MEM_MA_DATA61

AG16

MEM_MA_DATA60

AD17

MEM_MA_DATA59

AD13

MEM_MA_DATA58

AE13

MEM_MA_DATA57

AG15

MEM_MA_DATA56

AE16

MEM_MA_DATA55

AG17

MEM_MA_DATA54

AE18

MEM_MA_DATA53

AD21

MEM_MA_DATA52

AG22

MEM_MA_DATA51

AE17

MEM_MA_DATA50

AF17

MEM_MA_DATA49

AF21

MEM_MA_DATA48

AE21

MEM_MA_DATA47

AF23

MEM_MA_DATA46

AE23

MEM_MA_DATA45

AJ26

MEM_MA_DATA44

AG26

MEM_MA_DATA43

AE22

MEM_MA_DATA42

AG23

MEM_MA_DATA41

AH25

MEM_MA_DATA40

AF25

MEM_MA_DATA39

AJ28

MEM_MA_DATA38

AJ29

MEM_MA_DATA37

AF29

MEM_MA_DATA36

AE26

MEM_MA_DATA35

AJ27

MEM_MA_DATA34

AH27

MEM_MA_DATA33

AG29

MEM_MA_DATA32

AF27

MEM_MA_DATA31

E29

MEM_MA_DATA30

E28

MEM_MA_DATA29

D27

MEM_MA_DATA28

C27

MEM_MA_DATA27

G26

MEM_MA_DATA26

F27

MEM_MA_DATA25

C28

MEM_MA_DATA24

E27

MEM_MA_DATA23

F25

MEM_MA_DATA22

E25

MEM_MA_DATA21

E23

MEM_MA_DATA20

D23

MEM_MA_DATA19

E26

MEM_MA_DATA18

C26

MEM_MA_DATA17

G23

MEM_MA_DATA16

F23

MEM_MA_DATA15

E22

MEM_MA_DATA14

E21

MEM_MA_DATA13

F17

MEM_MA_DATA12

G17

MEM_MA_DATA11

G22

MEM_MA_DATA10

F21

MEM_MA_DATA9

G18

MEM_MA_DATA8

E17

MEM_MA_DATA7

G16

MEM_MA_DATA6

E15

MEM_MA_DATA5

G13

MEM_MA_DATA4

H13

MEM_MA_DATA3

H17

MEM_MA_DATA2

E16

MEM_MA_DATA1

E14

MEM_MA_DATA0

G14 J28

J27 J25 K25

J26 G28 G27 L24 K27 H29 H27

MEM_MA_EVENT_L MEM_MB_EVENT_L

W30

VCC_DDR VCC_DDR

R266

300R0402

MEM_MA_EVENT_L 11,12 MEM_MB_EVENT_L 11,12

MEM_MB1_CLK_H112 MEM_MB1_CLK_L112 MEM_MB0_CLK_H011 MEM_MB0_CLK_L011 MEM_MB1_CLK_H012 MEM_MB1_CLK_L012 MEM_MB0_CLK_H111 MEM_MB0_CLK_L111

MEM_MB0_CS_L111 MEM_MB0_CS_L011

MEM_MB0_ODT111 MEM_MB0_ODT011

MEM_MB1_CS_L112 MEM_MB1_CS_L012

MEM_MB1_ODT112 MEM_MB1_ODT012

MEM_MB_CAS_L11,12 MEM_MB_WE_L11,12 MEM_MB_RAS_L11,12

MEM_MB_BANK211,12 MEM_MB_BANK111,12 MEM_MB_BANK011,12

MEM_MB_CKE111,12 MEM_MB_CKE011,12

MEM_MB_DQS_L[7..0] MEM_MB_DQS_H[7..0] MEM_MB_DM[7..0] MEM_MB_ADD[15..0]

MEM_MB1_CLK_H1 MEM_MB1_CLK_L1 MEM_MB0_CLK_H0 MEM_MB0_CLK_L0 MEM_MB1_CLK_H0 MEM_MB1_CLK_L0 MEM_MB0_CLK_H1 MEM_MB0_CLK_L1

MEM_MB0_CS_L1 MEM_MB0_CS_L0

MEM_MB0_ODT0 MEM_MB1_CS_L1

MEM_MB1_CS_L0 MEM_MB1_ODT1

MEM_MB1_ODT0 MEM_MB_RESET#MEM_MA_RESET# MEM_MB_CAS_L

MEM_MB_WE_L MEM_MB_RAS_L

MEM_MB_BANK2 MEM_MB_BANK1 MEM_MB_BANK0

MEM_MB_CKE1 MEM_MB_CKE0

MEM_MB_ADD15 MEM_MB_ADD14 MEM_MB_ADD13 MEM_MB_ADD12 MEM_MB_ADD11 MEM_MB_ADD10 MEM_MB_ADD9 MEM_MB_ADD8 MEM_MB_ADD7 MEM_MB_ADD6 MEM_MB_ADD5 MEM_MB_ADD4 MEM_MB_ADD3 MEM_MB_ADD2 MEM_MB_ADD1 MEM_MB_ADD0

MEM_MB_DQS_H7 MEM_MB_DQS_L7 MEM_MB_DQS_H6 MEM_MB_DQS_L6 MEM_MB_DQS_H5 MEM_MB_DQS_L5 MEM_MB_DQS_H4 MEM_MB_DQS_L4 MEM_MB_DQS_H3 MEM_MB_DQS_L3 MEM_MB_DQS_H2 MEM_MB_DQS_L2 MEM_MB_DQS_H1 MEM_MB_DQS_L1 MEM_MB_DQS_H0 MEM_MB_DQS_L0

MEM_MB_DM7 MEM_MB_DM6 MEM_MB_DM5 MEM_MB_DM4 MEM_MB_DM3 MEM_MB_DM2 MEM_MB_DM1 MEM_MB_DM0

AJ19

AK19 AL19 AL18

W29

W28

W31

AE30 AC31

AF31 AD29

AE29 AB31

AG31

AD31

AC29 AC30 AB29

AA31 AA28

AE31

AA29

AA30 AK13

AJ13 AK17

AJ17 AK23 AL23 AL28 AL29

AJ14 AH17

AJ23 AK29

U31 U30

Y31 Y30 V31

A18 A19 C19 D19

B19

N31

M31 M29

N28 N29

N30 P29

P31 R29 R28 R31 R30 T31 T29 U29 U28

D31 C31 C24 C23 D17 C17 C14 C13

C30 A23 B17 B13

CPU1C

MB_CLK_H7 MB_CLK_L7 MB_CLK_H6 MB_CLK_L6 MB_CLK_H5 MB_CLK_L5 MB_CLK_H4 MB_CLK_L4 MB_CLK_H3 MB_CLK_L3 MB_CLK_H2 MB_CLK_L2 MB_CLK_H1 MB_CLK_L1 MB_CLK_H0 MB_CLK_L0

MB0_CS_L1 MB0_CS_L0

MB0_ODT1 MB0_ODT0

MB1_CS_L1 MB1_CS_L0

MB1_ODT1 MB1_ODT0

MB_RESET_L MB_CAS_L

MB_WE_L MB_RAS_L

MB_BANK2 MB_BANK1 MB_BANK0

MB_CKE1 MB_CKE0

MB_ADD15 MB_ADD14 MB_ADD13 MB_ADD12 MB_ADD11 MB_ADD10 MB_ADD9 MB_ADD8 MB_ADD7 MB_ADD6 MB_ADD5 MB_ADD4 MB_ADD3 MB_ADD2 MB_ADD1 MB_ADD0

MB_DQS_H7 MB_DQS_L7 MB_DQS_H6 MB_DQS_L6 MB_DQS_H5 MB_DQS_L5 MB_DQS_H4 MB_DQS_L4 MB_DQS_H3 MB_DQS_L3 MB_DQS_H2 MB_DQS_L2 MB_DQS_H1 MB_DQS_L1 MB_DQS_H0 MB_DQS_L0

MB_DM7 MB_DM6 MB_DM5 MB_DM4 MB_DM3 MB_DM2 MB_DM1 MB_DM0

ZIF-SOCKET941-RH

MB_DATA63 MB_DATA62 MB_DATA61 MB_DATA60 MB_DATA59 MB_DATA58 MB_DATA57 MB_DATA56 MB_DATA55 MB_DATA54 MB_DATA53 MB_DATA52 MB_DATA51 MB_DATA50 MB_DATA49 MB_DATA48 MB_DATA47 MB_DATA46 MB_DATA45 MB_DATA44 MB_DATA43 MB_DATA42 MB_DATA41 MB_DATA40 MB_DATA39 MB_DATA38 MB_DATA37 MB_DATA36 MB_DATA35 MB_DATA34 MB_DATA33 MB_DATA32 MB_DATA31 MB_DATA30 MB_DATA29 MB_DATA28 MB_DATA27 MB_DATA26 MB_DATA25 MB_DATA24 MB_DATA23 MB_DATA22 MB_DATA21 MB_DATA20 MB_DATA19 MB_DATA18 MB_DATA17 MB_DATA16 MB_DATA15 MB_DATA14 MB_DATA13 MB_DATA12 MB_DATA11

MEM CHB

MB_DATA10

MB_DATA9 MB_DATA8 MB_DATA7 MB_DATA6 MB_DATA5 MB_DATA4 MB_DATA3 MB_DATA2 MB_DATA1 MB_DATA0

MB_DQS_H8 MB_DQS_L8

MB_DM8

MB_CHECK7 MB_CHECK6 MB_CHECK5 MB_CHECK4 MB_CHECK3 MB_CHECK2 MB_CHECK1 MB_CHECK0

MB_EVENT_L

AH13 AL13 AL15 AJ15 AF13 AG13 AL14 AK15 AL16 AL17 AK21 AL21 AH15 AJ16 AH19 AL20 AJ22 AL22 AL24 AK25 AJ21 AH21 AH23 AJ24 AL27 AK27 AH31 AG30 AL25 AL26 AJ30 AJ31 E31 E30 B27 A27 F29 F31 A29 A28 A25 A24 C22 D21 A26 B25 B23 A22 B21 A20 C16 D15 C21 A21 A17 A16 B15 A14 E13 F13 C15 A15 A13 D13

J31 J30

J29 K29

K31 G30 G29 L29 L28 H31 G31

V29

MEM_MB_DATA63 MEM_MB_DATA62 MEM_MB_DATA61 MEM_MB_DATA60 MEM_MB_DATA59 MEM_MB_DATA58 MEM_MB_DATA57 MEM_MB_DATA56 MEM_MB_DATA55 MEM_MB_DATA54 MEM_MB_DATA53 MEM_MB_DATA52 MEM_MB_DATA51 MEM_MB_DATA50 MEM_MB_DATA49 MEM_MB_DATA48 MEM_MB_DATA47 MEM_MB_DATA46 MEM_MB_DATA45 MEM_MB_DATA44 MEM_MB_DATA43 MEM_MB_DATA42 MEM_MB_DATA41 MEM_MB_DATA40 MEM_MB_DATA39 MEM_MB_DATA38 MEM_MB_DATA37 MEM_MB_DATA36 MEM_MB_DATA35 MEM_MB_DATA34 MEM_MB_DATA33 MEM_MB_DATA32 MEM_MB_DATA31 MEM_MB_DATA30 MEM_MB_DATA29 MEM_MB_DATA28 MEM_MB_DATA27 MEM_MB_DATA26 MEM_MB_DATA25 MEM_MB_DATA24 MEM_MB_DATA23 MEM_MB_DATA22 MEM_MB_DATA21 MEM_MB_DATA20

MEM_MB_DATA19 MEM_MB_DATA18 MEM_MB_DATA17 MEM_MB_DATA16 MEM_MB_DATA15 MEM_MB_DATA14 MEM_MB_DATA13 MEM_MB_DATA12 MEM_MB_DATA11 MEM_MB_DATA10

MEM_MB_DATA9

MEM_MB_DATA8

MEM_MB_DATA7

MEM_MB_DATA6

MEM_MB_DATA5

MEM_MB_DATA4

MEM_MB_DATA3

MEM_MB_DATA2

MEM_MB_DATA1

MEM_MB_DATA0

R267

R267 300R0402

300R0402

A A

Micro Star Restricted Secret

Title

K9 M2 DDR MEMORY I/F

Document Number

MICRO-STAR INT'L CO.,LTD.

No. 69, Li-De St, Jung-He City,

No. 69, Li-De St, Jung-He City, Taipei Hsien, Taiwan

Taipei Hsien, Taiwan

Taipei Hsien, Taiwan http://www.msi.com.tw

http://www.msi.com.tw

MS-7576

Last Revision Date:

Friday, November 14, 2008

Sheet

942

Rev

VCCP

H11

CPU_VDDR

C286

X_1000p/50v/X7/6

CPU_VDDR_B

C129

4.7u/10v/Y5/8

H23 J12

J14 J16 J18 J20 J22 J24

K11 K13 K15 K17 K19 K21 K23

L10 L12 L14 L16 L18 L20 L22

M11 M13 M15 M17 M19 M21 M23

N10 N12 N14 N16 N18 N20 N22

P11 P13 P15 P17 P19 P21 P23

R10 R12 R14 R16 R18 R20 R22

T11 T13

X_0.22u/16v/X7/6

X_4.7u/10v/Y5/8

D D

C C

B B

A A

CPU1E

VDD_1

VDD_2

VDD_3

VDD_4

VDD_5

VDD_6

VDD_7

VDD_8

VDD_9

VDD_10

VDD_11

VDD_12 VDD_13 VDD_14

VDD_15 VDD_16 VDD_17 VDD_18 VDD_19 VDD_20 VDD_21 VDD_22

VDD_23

VDD_24 VDD_25 VDD_26 VDD_27 VDD_28 VDD_29 VDD_30 VDD_31

VDD_32

VDD_33

VDD_34 VDD_35 VDD_36 VDD_37 VDD_38 VDD_39 VDD_40 VDD_41

VDD_42

VDD_43

VDD_44

VDD_45 VDD_46 VDD_47 VDD_48 VDD_49 VDD_50 VDD_51 VDD_52

VDD_53 VDD_54 VDD_55 VDD_56 VDD_57 VDD_58 VDD_59 VDD_60

VDD_61

VDD_62 VDD_63 VDD_64 VDD_65 VDD_66 VDD_67 VDD_68 VDD_69

VDD_70

VDD_71

VDD_72 VDD_73 VDD_74 VDD_75 VDD_76 VDD_77 VDD_78 VDD_79

VDD_80

VDD_81

VDD_82

VDD_83 VDD_84 VDD_85

ZIF-SOCKET941-RH

C245

C273

X_1000p/50v/X7/6

C122

X_180p/50v/N/4

C241

4.7u/10v/Y5/8

C108

X_180p/50v/N/4

X_4.7u/10v/Y5/8

VSS_1

VSS_2

VSS_3

A11

VSS_4

VSS_5

VSS_6

B11

VSS_7

B14

VSS_8

B16

VSS_9

B18

VSS_10

B20

VSS_11

B22

VSS_12

B24

VSS_13

B26

VSS_14

B28

VSS_15

B30

VSS_16

VSS_17

D14

VSS_18

D16

VSS_19

D18

VSS_20

D20

VSS_21

D22

VSS_22

D24

VSS_23

D26

VSS_24

D28

VSS_25

D30

VSS_26

E11

VSS_27

VSS_28

F14

VSS_29

F16

VSS_30

F18

VSS_31

F20

VSS_32

F22

VSS_33

F24

VSS_34

F26

VSS_35

F28

VSS_36

F30

VSS_37

VSS_38

G11

VSS_39

VSS_40

H10

VSS_41

H12

VSS_42

H14

VSS_43

H16

VSS_44

H18

VSS_45

H24

VSS_46

H26

VSS_47

H28

VSS_48

H30

VSS_49

VSS_50

VSS_51

POWER/GND1

VSS_52

VSS_53

J11

VSS_54

J13

VSS_55

J15

VSS_56

J17

VSS_57

J19

VSS_58

J21

VSS_59

J23

VSS_60

VSS_61

VSS_62

VSS_63

K10

VSS_64

K12

VSS_65

K14

VSS_66

K16

VSS_67

K18

VSS_68

K20

VSS_69

K22

VSS_70

K24

VSS_71

K26

VSS_72

K28

VSS_73

K30

VSS_74

VSS_75

VSS_76

L11

VSS_77

L13

VSS_78

L15

VSS_79

L17

VSS_80

L19

VSS_81

L21

VSS_82

L23

VSS_83

VSS_84

M10

VSS_85

C280

C234

X_180p/50v/N/4

180p/50v/N/4

C116

C100

X_180p/50v/N/4

C228

X_1000p/50v/X7/6

VCCP

C231

C238

X_1000p/50v/X7/6

T15 T17 T19 T21 T23

U8 U10 U12 U14 U16 U18 U20 U22

V9 V11 V13 V15 V17 V19 V21 V23

W10 W12 W14 W16 W18 W20 W22

Y9 Y11 Y13 Y15 Y17 Y19 Y21 Y23 AA8

AA10 AA12 AA14 AA16 AA18 AA20 AA22

AB7 AB9

AB11 AB13 AB15 AB17 AB19 AB21 AB23

AC4 AC5

AC8 AC10 AC12 AC14 AC16 AC18 AC20 AC22

AD2

AD3

AD7

AD9 AD11 AD23 AE10 AE12

AF7 AF9

AF11

AG4

AG5

AG7

AH2

AH3

CPU1F

VDD_86 VDD_87 VDD_88 VDD_89 VDD_90 VDD_91 VDD_92 VDD_93 VDD_94 VDD_95 VDD_96 VDD_97 VDD_98 VDD_99 VDD_100 VDD_101 VDD_102 VDD_103 VDD_104 VDD_105 VDD_106 VDD_107 VDD_108 VDD_109 VDD_110 VDD_111 VDD_112 VDD_113 VDD_114 VDD_115 VDD_116 VDD_117 VDD_118 VDD_119 VDD_120 VDD_121 VDD_122 VDD_123 VDD_124 VDD_125 VDD_126 VDD_127 VDD_128 VDD_129 VDD_130 VDD_131 VDD_132 VDD_133 VDD_134 VDD_135 VDD_136 VDD_137 VDD_138 VDD_139 VDD_140 VDD_141 VDD_142 VDD_143 VDD_144 VDD_145 VDD_146 VDD_147 VDD_148 VDD_149 VDD_150 VDD_151 VDD_152 VDD_153 VDD_154 VDD_155 VDD_156 VDD_157 VDD_158 VDD_159 VDD_160 VDD_161 VDD_162 VDD_163 VDD_164 VDD_165 VDD_166 VDD_167 VDD_168 VDD_169 VDD_170

ZIF-SOCKET941-RH

M12

VSS_86

M14

VSS_87

M16

VSS_88

M18

VSS_89

M20

VSS_90

M22

VSS_91

VSS_92

VSS_93

VSS_94

VSS_95

N11

VSS_96

N13

VSS_97

N15

VSS_98

N17

VSS_99

N19

VSS_100

N21

VSS_101

N23

VSS_102

VSS_103

VSS_104

VSS_105

P10

VSS_106

P12

VSS_107

P14

VSS_108

P16

VSS_109

P18

VSS_110

P20

VSS_111

P22

VSS_112

VSS_113

VSS_114

R11

VSS_115

R13

VSS_116

R15

VSS_117

R17

VSS_118

R19

VSS_119

R21

VSS_120

R23

VSS_121

VSS_122

T10

VSS_123

T12

VSS_124

T14

VSS_125

T16

VSS_126

T18

VSS_127

T20

VSS_128

T22

VSS_129

VSS_130

VSS_131

VSS_132

VSS_133

U11

VSS_134

U13

VSS_135

POWER/GND2

U15

VSS_136

U17

VSS_137

U19

VSS_138

U21

VSS_139

U23

VSS_140

VSS_141

VSS_142

V10

VSS_143

V12

VSS_144

V14

VSS_145

V16

VSS_146

V18

VSS_147

V20

VSS_148

V22

VSS_149

VSS_150

VSS_151

W11

VSS_152

W13

VSS_153

W15

VSS_154

W17

VSS_155

W19

VSS_156

W21

VSS_157

W23

VSS_158

VSS_159

Y10

VSS_160

Y12

VSS_161

Y14

VSS_162

Y16

VSS_163

Y18

VSS_164

Y20

VSS_165

Y22

VSS_166

AA4

VSS_167

AA5

VSS_168

AA7

VSS_169

AA9

VSS_170

FOR EMI

R286 0R0805R286 0R0805

VCCPVCC_DDR

BOTTOM

C753

X_2.2u/6.3v/X5/6_B

R173 0R0805R173 0R0805

C778

X_2.2u/6.3v/X5/6_B

VCCP_NB

CPU1G

VDDNB_1

VDDNB_2

VDDNB_3

VDDNB_4

VDDNB_5

VDDNB_6

VDDNB_7

VDDNB_8

VDDNB_9

E10

VDDNB_10

VDDNB_11

F11

VDDNB_12

G10

VDDNB_13

G12

VDDNB_14

POWER/GND3

C141

X_0.22u/16v/X7/6

C144

X_22u/6.3v/X5/1206

POWER/GND3

C118

NP/RSVD

H20

NP/VSS1

AE7

NP/VSS2

ZIF-SOCKET941-RH

VCCP_NB

C146

X_0.22u/16v/X7/6

VCCP_NB

C145

22u/6.3v/X5/1206

CPU_VDDR_BCPU_VDDR

VCCPVCCP_NBCPU_VDDR

C123

X_2.2u/6.3v/X5/6

AA11

VSS_171

AA13

VSS_172

AA15

VSS_173

AA17

VSS_174

AA19

VSS_175

AA21

VSS_176

AA23

VSS_177

AB2

VSS_178

AB3

VSS_179

AB8

VSS_180

AB10

VSS_181

AB12

VSS_182

AB14

VSS_183

AB16

VSS_184

AB18

VSS_185

AB20

VSS_186

AB22

VSS_187

AC7

VSS_188

AC9

VSS_189

AC11

VSS_190

AC13

VSS_191

AC15

VSS_192

AC17

VSS_193

AC19

VSS_194

AC21

VSS_195

AC23

VSS_196

AD8

VSS_197

AD10

VSS_198

AD12

VSS_199

AD14

VSS_200

AD16

VSS_201

AD20

VSS_202

AD22

VSS_203

AD24

VSS_204

AE4

VSS_205

AE5

VSS_206

AE11

VSS_207

AF2

VSS_208

AF3

VSS_209

AF8

VSS_210

AF10

VSS_211

AF12

VSS_212

AF14

VSS_213

AF16

VSS_214

VCCP

C138

C751

X_0.22u/16v/X7/6

0.01u/50v/X7/6_B

22u/6.3v/X5/1206_B

C83

C88

X_10u/10v/X5/1206

C775

0.22u/16v/X7/6_B

VCCP

C766

10u/10v/X5/1206_B

VCC_DDR

X_0.1u/25v/Y5/4

C164

0.22u/16v/X7/6

C195

C777

X_0.22u/16v/X7/6_B

X_22u/6.3v/X5/1206_B

100P/50V/NPO/4

CPU_VDDR_B

VCC_DDR

X_0.22u/16v/X7/6_B

C760

10u/10v/X5/1206_B

C170

X_2.2u/6.3v/X5/6_B

For EMI

C161

X_0.1u/25v/Y5/4

VCCA_1V2

BOTTOM

C774

C757

X_10u/10v/X5/1206_B

22u/6.3v/X5/1206_B

C773

10u/10v/X5/1206_B

C160

M24 M26 M28 M30

AB24 AB26 AB28 AB30 AC24 AD26 AD28 AD30 AF30

C752

0.01u/50v/X7/6_B

C755

C754

X_4.7u/10v/Y5/8

C762

4.7u/10v/Y5/8_B

0.1u/25v/Y5/4

CPU1H

AJ1

VLDT_A_1

AJ2

VLDT_A_2

AJ3

VLDT_A_3

AJ4

VLDT_A_4

A12

VDDR_1

B12

VDDR_2

C12

VDDR_3

D12

VDDR_4

VDDIO_1 VDDIO_2 VDDIO_3 VDDIO_4

P24

VDDIO_5

P26

VDDIO_6

P28

VDDIO_7

P30

VDDIO_8

T24

VDDIO_9

T26

VDDIO_10

T28

VDDIO_11

T30

VDDIO_12

V25

VDDIO_13

V26

VDDIO_14

V28

VDDIO_15

V30

VDDIO_16

Y24

VDDIO_17

Y26

VDDIO_18

Y28

VDDIO_19

Y29

VDDIO_20 VDDIO_21 VDDIO_22 VDDIO_23 VDDIO_24 VDDIO_25 VDDIO_26 VDDIO_27 VDDIO_28 VDDIO_29

ZIF-SOCKET941-RH

180p/50v/N/4_B

C764

10u/10v/X5/1206_B

C183

4.7u/10v/Y5/8

BOTTOM

C222

0.1u/25v/Y5/4

C772

C761

10u/10v/X5/1206_B

BOTTOM

X_10u/10v/X5/1206_B

C758

C189

0.22u/16v/X7/6

C768

C768 X_4.7u/10v/Y5/8_B

X_4.7u/10v/Y5/8_B

C209

X_0.1u/25v/Y5/4

VLDT_B_1

VLDT_B_2

VLDT_B_3

VLDT_B_4

AG12

VDDR_5

AH12

VDDR_6

AJ12

VDDR_7

AK12

VDDR_8

AL12

VDDR_9

AF18

VSS_215

AF20

VSS_216

AF22

VSS_217

AF24

VSS_218

AF26

VSS_219

AF28

VSS_220

AG10

VSS_221

AG11

VSS_222

AH14

VSS_223

AH16

VSS_224

AH18

VSS_225

AH20

VSS_226

AH22

VSS_227

AH24

VSS_228

AH26

VSS_229

AH28

VSS_230

POWER/GND4

VSS_231 VSS_232 VSS_233 VSS_234 VSS_235 VSS_236 VSS_237 VSS_238 VSS_239 VSS_240 VSS_241 VSS_242

C769

10u/10v/X5/1206_B

C771

X_10u/10v/X5/1206_B

C767

X_0.22u/16v/X7/6

EC18

560u/4V/8*9/O

C205

AH30 AK2 AK14 AK16 AK18 AK20 AK22 AK24 AK26 AK28 AK30 AL5

C759

C226

X_0.01u/50v/X7/6

C158

X_0.1u/25v/Y5/4

VLDT_RUN_B

CPU_VDDR

C770

10u/10v/X5/1206_B

C776

X_10u/10v/X5/1206_B

C765

C201

180p/50v/N/4

VCC_DDR

C156

4.7u/10v/Y5/8

10u/10v/X5/1206_B

C177

C202

0.1u/25v/Y5/4

C149

C152

0.01u/50v/Y5/6

C756

C157

C187

0.1u/25v/Y5/4

C149

C151

X_0.01u/50v/Y5/6

C186

C294

X_0.1u/25v/Y5/4

Micro Star Restricted Secret

Title

K9 M2 PWR & GND

Document Number

MICRO-STAR INT'L CO.,LTD.

No. 69, Li-De St, Jung-He City,

No. 69, Li-De St, Jung-He City, Taipei Hsien, Taiwan

Taipei Hsien, Taiwan

Taipei Hsien, Taiwan http://www.msi.com.tw

http://www.msi.com.tw

VCC_DDR

C90

C167

C307

C310

X_0.1u/25v/Y5/4

MS-7576

EMI 102808

Last Revision Date:

Friday, November 14, 2008

Sheet

10 42

Rev

DIMM1

DQ0 DQ1 DQ2 DQ3 DQ4 DQ5 DQ6 DQ7 DQ8 DQ9 DQ10 DQ11 DQ12 DQ13 DQ14 DQ15 DQ16 DQ17 DQ18 DQ19 DQ20 DQ21 DQ22 DQ23 DQ24 DQ25 DQ26 DQ27 DQ28 DQ29 DQ30 DQ31 DQ32 DQ33 DQ34 DQ35 DQ36 DQ37 DQ38 DQ39 DQ40 DQ41 DQ42 DQ43 DQ44 DQ45 DQ46 DQ47 DQ48 DQ49 DQ50 DQ51 DQ52 DQ53 DQ54 DQ55 DQ56 DQ57 DQ58 DQ59 DQ60 DQ61 DQ62 DQ63

VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS

VCC_DDR

MEM_MA_DQS_H[7..0] MEM_MA_DQS_L[7..0] MEM_MA_DM[7..0] MEM_MA_ADD[15..0] MEM_MA_DATA[63..0]

VDD51VDD

VDD57VDD60VDD62VDD65VDD66VDD69VDD72VDD75VDD78VDD

VSS

107

110

113

116

119

VCC3

C363

C0.1u16Y0402

VTT_DDR VTT_DDR

MEM_MA_EVENT_L

236

167

187

VSS

220

NC/PAR_IN

NC/ERR_OUT

VSS

223

226

229

RSVD

FREE1

NC/TEST4

DM1/DQS10

NC/DQS10#

DM2/DQS11

NC/DQS11#

DM3/DQS12

NC/DQS12#

DM4/DQS13

NC/DQS13#

DM5/DQS14

NC/DQS14#

DM6/DQS15

NC/DQS15#

DM7/DQS16

NC/DQS16#

DM8/DQS17

NC/DQS17#

VSS

232

235

198

FREE249FREE3

A10/AP

DQS0

DQS0#

DQS1

DQS1#

DQS2

DQS2#

DQS3

DQS3#

DQS4

DQS4#

DQS5

DQS5#

DQS6

DQS6#

DQS7

DQS7#

DQS8

DQS8#

DM0/DQS9

NC/DQS9#

ODT0 ODT1 CKE0 CKE1

RAS# CAS#

RESET#

CK1(NU)

CK1#(NU)

VREFDQ VREFCA

VSS

MEC1

239

MEC1

MEC2

FREE4

CS0# CS1#

WE#

CK0#

MEC2

A11 A12 A13 A14 A15

CB0 CB1 CB2 CB3 CB4 CB5 CB6 CB7

CK0

SCL SDA SA1 SA0

A0 A1 A2 A3 A4 A5 A6 A7 A8 A9

BA0 BA1 BA2

MEC3

DDRIII-240P_BLUE-RH

MEC3

120

170

173

176

179

182

183

186

VDD

DDR3

VSS

121

124

127

130

133

136

VSS

139

142

145

148

151

154

157

160

240

189

191

194

197

VTT

VDD

VDDSPD

VSS

163

VSS

166

199

202

205

208

211

214

217

MEM_MA_DQS_H[7..0]9,12 MEM_MA_DQS_L[7..0]9,12

MEM_MA_DM[7..0]9,12 MEM_MA_ADD[15..0]9,12 MEM_MA_DATA[63..0]9,12

D D

MEM_MA_DATA0 MEM_MA_ADD0 MEM_MA_DATA1 MEM_MA_DATA2 MEM_MA_DATA3 MEM_MA_DATA4 MEM_MA_DATA5 MEM_MA_DATA6 MEM_MA_DATA7 MEM_MA_DATA8 MEM_MA_DATA9 MEM_MA_DATA10 MEM_MA_DATA11 MEM_MA_DATA12 MEM_MA_DATA13 MEM_MA_DATA14 MEM_MA_DATA15 MEM_MA_DATA16 MEM_MA_DATA17 MEM_MA_DATA18 MEM_MA_DATA19 MEM_MA_DATA20 MEM_MA_DATA21 MEM_MA_DATA22 MEM_MA_DATA23 MEM_MA_DATA24 MEM_MA_DATA25 MEM_MA_DATA26 MEM_MA_DATA27 MEM_MA_DATA28 MEM_MA_DATA29 MEM_MA_DATA30 MEM_MA_DATA31 MEM_MA_DATA32 MEM_MA_DATA33 MEM_MA_DATA34

C C

MEM_MA_DATA35 MEM_MA_DATA36 MEM_MA_DATA37 MEM_MA_DATA38 MEM_MA_DATA39 MEM_MA_DATA40 MEM_MA_DATA41 MEM_MA_DATA42 MEM_MA_DATA43 MEM_MA_DATA44 MEM_MA_DATA45 MEM_MA_DATA46 MEM_MA_DATA47 MEM_MA_DATA48 MEM_MA_DATA49 MEM_MA_DATA50 MEM_MA_DATA51 MEM_MA_DATA52 MEM_MA_DATA53 MEM_MA_DATA54 MEM_MA_DATA55 MEM_MA_DATA56 MEM_MA_DATA57 MEM_MA_DATA58 MEM_MA_DATA59 MEM_MA_DATA60 MEM_MA_DATA61 MEM_MA_DATA62 MEM_MA_DATA63

B B

3 4 9

10 122 123 128 129

19 131 132 137 138

28 140 141 146 147

37 149 150 155 156

88 200 201 206 207

97 209 210 215 216

99 100 105 106 218 219 224 225 108 109 114 115 227 228 233 234

2 5

8 11 14 17 20 23 26 29 32 35 38 41 44 47 80 83 86 89 92 95 98

101 104

188 181 61 180 59 58 178 56 177 175 70 55 174 196 172 171

39 40 45 46 158 159 164 165

7 6 16 15 25 24 34 33 85 84 94 93 103 102 112 111 43 42

125 126 134 135 143 144 152 153 203 204 212 213 221 222 230 231 161 162

195 77 50 169 193 76 71 190 52

73 192 74 168

184 185 63 64

1 67 118 238 237 117

MEM_MA_EVENT_L 9,12

MEM_MA_ADD1 MEM_MA_ADD2 MEM_MA_ADD3 MEM_MA_ADD4 MEM_MA_ADD5 MEM_MA_ADD6 MEM_MA_ADD7 MEM_MA_ADD8 MEM_MA_ADD9 MEM_MA_ADD10 MEM_MA_ADD11 MEM_MA_ADD12 MEM_MA_ADD13 MEM_MA_ADD14 MEM_MA_ADD15

MEM_MA_DQS_H0 MEM_MA_DQS_L0 MEM_MA_DQS_H1 MEM_MA_DQS_L1 MEM_MA_DQS_H2 MEM_MA_DQS_L2 MEM_MA_DQS_H3 MEM_MA_DQS_L3 MEM_MA_DQS_H4 MEM_MA_DQS_L4 MEM_MA_DQS_H5 MEM_MA_DQS_L5 MEM_MA_DQS_H6 MEM_MA_DQS_L6 MEM_MA_DQS_H7 MEM_MA_DQS_L7

MEM_MA_DM0 MEM_MA_DM1 MEM_MA_DM2 MEM_MA_DM3 MEM_MA_DM4 MEM_MA_DM5 MEM_MA_DM6 MEM_MA_DM7

MEM_MA0_ODT0 MEM_MA0_ODT1 MEM_MA_CKE0 MEM_MA_CKE1 MEM_MA0_CS_L0 MEM_MA0_CS_L1 MEM_MA_BANK0 MEM_MA_BANK1 MEM_MA_BANK2

MEM_MA_WE_L MEM_MA_RAS_L MEM_MA_CAS_L MEM_MA_RESET#

MEM_MA0_CLK_H0 MEM_MA0_CLK_L0 MEM_MA0_CLK_H1 MEM_MA0_CLK_L1

VDDR_VREF_DQ

VDDR_VREF_CA SCL0 SDA0

MEM_MA0_ODT0 9

MEM_MA0_ODT1 9 MEM_MA_CKE0 9,12 MEM_MA_CKE1 9,12 MEM_MA0_CS_L0 9 MEM_MA0_CS_L1 9 MEM_MA_BANK0 9,12 MEM_MA_BANK1 9,12 MEM_MA_BANK2 9,12

MEM_MA_WE_L 9,12 MEM_MA_RAS_L 9,12 MEM_MA_CAS_L 9,12 MEM_MA_RESET# 9,12

MEM_MA0_CLK_H0 9 MEM_MA0_CLK_L0 9 MEM_MA0_CLK_H1 9 MEM_MA0_CLK_L1 9

SCL0 6,7,12,21,24,29,34,37,38

SDA0 6,7,12,21,24,29,34,37,38

R163

R163 15R1%

15R1%

R169

R169 15R1%

15R1%

SCL0

VCC_DDR

R268

R268 15R1%

15R1%

R274

R274 15R1%

15R1%

SDA0

VCC_DDR

C62

VDDR_VREF_DQ

C76

0.1u/25v/Y5/4

VDDR_VREF_CA

C63

X_C0.1u16Y0402

VCC3

VDDR_VREF_DQ

X_0.1u/25v/Y5/4

VDDR_VREF_CA

C210

X_0.1u/25v/Y5/4

C216

0.1u/25v/Y5/4

VDDR_VREF_CAVDDR_VREF_DQ

C215

X_C0.1u16Y0402

D37

D37 X_1PS226_SOT23

X_1PS226_SOT23

D36

D36 X_1PS226_SOT23

X_1PS226_SOT23

C77

C77 1nf/25v/X7R/4

1nf/25v/X7R/4

C218

C218 1nf/25v/X7R/4

1nf/25v/X7R/4

MEM_MB_DATA0 MEM_MB_DATA1 MEM_MB_DATA2 MEM_MB_DATA3 MEM_MB_DATA4 MEM_MB_DATA5 MEM_MB_DATA6 MEM_MB_DATA7 MEM_MB_DATA8 MEM_MB_DATA9 MEM_MB_DATA10 MEM_MB_DATA11 MEM_MB_DATA12 MEM_MB_DATA13 MEM_MB_DATA14 MEM_MB_DATA15 MEM_MB_DATA16 MEM_MB_DATA17 MEM_MB_DATA18 MEM_MB_DATA19 MEM_MB_DATA20 MEM_MB_DATA21 MEM_MB_DATA22 MEM_MB_DATA23 MEM_MB_DATA24 MEM_MB_DATA25 MEM_MB_DATA26 MEM_MB_DATA27 MEM_MB_DATA28 MEM_MB_DATA29 MEM_MB_DATA30 MEM_MB_DATA31 MEM_MB_DATA32 MEM_MB_DATA33 MEM_MB_DATA34 MEM_MB_DATA35 MEM_MB_DATA36 MEM_MB_DATA37 MEM_MB_DATA38 MEM_MB_DATA39 MEM_MB_DATA40 MEM_MB_DATA41 MEM_MB_DATA42 MEM_MB_DATA43 MEM_MB_DATA44 MEM_MB_DATA45 MEM_MB_DATA46 MEM_MB_DATA47 MEM_MB_DATA48 MEM_MB_DATA49 MEM_MB_DATA50 MEM_MB_DATA51 MEM_MB_DATA52 MEM_MB_DATA53 MEM_MB_DATA54 MEM_MB_DATA55 MEM_MB_DATA56 MEM_MB_DATA57 MEM_MB_DATA58 MEM_MB_DATA59 MEM_MB_DATA60 MEM_MB_DATA61 MEM_MB_DATA62 MEM_MB_DATA63

DIMM2

VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS

VCC_DDR

MEM_MB_DQS_H[7..0] MEM_MB_DQS_L[7..0] MEM_MB_DM[7..0] MEM_MB_ADD[15..0] MEM_MB_DATA[63..0]

VDD51VDD

VDD57VDD60VDD62VDD65VDD66VDD69VDD72VDD75VDD78VDD

VSS

107

110

113

116

119

121

VCC3

C686

C0.1u16Y0402

MEM_MB_EVENT_L

236

167

187

NC/PAR_IN

VSS

223

226

RSVD

FREE1

NC/TEST4

NC/ERR_OUT

DM0/DQS9

NC/DQS9# DM1/DQS10 NC/DQS10# DM2/DQS11 NC/DQS11# DM3/DQS12 NC/DQS12# DM4/DQS13 NC/DQS13# DM5/DQS14 NC/DQS14# DM6/DQS15 NC/DQS15# DM7/DQS16 NC/DQS16# DM8/DQS17 NC/DQS17#

VSS

229

232

235

239

198

FREE249FREE3

A10/AP

DQS0

DQS0#

DQS1

DQS1#

DQS2

DQS2#

DQS3

DQS3#

DQS4

DQS4#

DQS5

DQS5#

DQS6

DQS6#

DQS7

DQS7#

DQS8

DQS8#

ODT0 ODT1 CKE0 CKE1 CS0# CS1#

RAS# CAS#

RESET#

CK0#

CK1(NU)

CK1#(NU)

VREFDQ VREFCA

VSS

MEC1

MEC2

FREE4

A11 A12 A13 A14 A15

CB0 CB1 CB2 CB3 CB4 CB5 CB6 CB7

BA0 BA1 BA2

WE#

CK0

SCL

SDA

SA1 SA0

MEC2

MEC3

A0 A1 A2 A3 A4 A5 A6 A7 A8 A9

MEC3

DDRIII-240P_BLUE-RH

120

170

173

176

179

182

183

186

VDD

DDR3

VSS

124

127

130

133

136

VSS

139

142

145

148

151

154

157

160

240

189

191

194

197

VTT

VDD

VDDSPD

VSS

163

VSS

166

199

202

205

208

211

214

217

220

MEM_MB_ADD0

188

MEM_MB_ADD1

181

MEM_MB_ADD2

MEM_MB_ADD3

180

MEM_MB_ADD4

MEM_MB_ADD5

MEM_MB_ADD6

178

MEM_MB_ADD7

MEM_MB_ADD8

177

MEM_MB_ADD9

175

MEM_MB_ADD10

MEM_MB_ADD11

MEM_MB_ADD12

174

MEM_MB_ADD13

196

MEM_MB_ADD14

172

MEM_MB_ADD15

171 39

40 45 46 158 159 164 165

MEM_MB_DQS_H0

MEM_MB_DQS_L0

MEM_MB_DQS_H1

MEM_MB_DQS_L1

MEM_MB_DQS_H2

MEM_MB_DQS_L2

MEM_MB_DQS_H3

MEM_MB_DQS_L3

MEM_MB_DQS_H4

MEM_MB_DQS_L4

MEM_MB_DQS_H5

MEM_MB_DQS_L5

MEM_MB_DQS_H6

103

MEM_MB_DQS_L6

102

MEM_MB_DQS_H7

112

MEM_MB_DQS_L7

111 43 42

125 126 134 135 143 144 152 153 203 204 212 213 221 222 230 231 161 162

MEM_MB0_ODT0

195

MEM_MB0_ODT1

MEM_MB_CKE0

MEM_MB_CKE1

169

MEM_MB0_CS_L0

193

MEM_MB0_CS_L1

MEM_MB_BANK0

MEM_MB_BANK1

190

MEM_MB_BANK2

MEM_MB_WE_L

MEM_MB_RAS_L

192

MEM_MB_CAS_L

MEM_MB_RESET#

168

MEM_MB0_CLK_H0

184

MEM_MB0_CLK_L0

185

MEM_MB0_CLK_H1

MEM_MB0_CLK_L1

64 1

67 118 238 237 117

MEM_MB_EVENT_L 9,12

MEM_MB_DM0 MEM_MB_DM1 MEM_MB_DM2 MEM_MB_DM3 MEM_MB_DM4 MEM_MB_DM5 MEM_MB_DM6 MEM_MB_DM7

VDDR_VREF_DQ VDDR_VREF_CA SCL0 SDA0

MEM_MB_DQS_H[7..0]9,12 MEM_MB_DQS_L[7..0]9,12

MEM_MB_DM[7..0]9,12

MEM_MB_ADD[15..0]9,12

MEM_MB_DATA[63..0]9,12

3 4 9

10 122 123 128 129

19 131 132 137 138

28 140 141 146 147

37 149 150 155 156

88 200 201 206 207

97 209 210 215 216

99 100 105 106 218 219 224 225 108 109 114 115 227 228 233 234

2 5

8 11 14 17 20 23 26 29 32 35 38 41 44 47 80 83 86 89 92 95 98

101 104

MEM_MB0_ODT0 9

MEM_MB0_ODT1 9 MEM_MB_CKE0 9,12 MEM_MB_CKE1 9,12 MEM_MB0_CS_L0 9 MEM_MB0_CS_L1 9 MEM_MB_BANK0 9,12 MEM_MB_BANK1 9,12 MEM_MB_BANK2 9,12

MEM_MB_WE_L 9,12 MEM_MB_RAS_L 9,12 MEM_MB_CAS_L 9,12 MEM_MB_RESET# 9,12

MEM_MB0_CLK_H0 9 MEM_MB0_CLK_L0 9 MEM_MB0_CLK_H1 9 MEM_MB0_CLK_L1 9

SCL0 6,7,12,21,24,29,34,37,38 SDA0 6,7,12,21,24,29,34,37,38

VCC3

ADDRESS A0

ADDRESS A2

SMBus Addressing

A A

Device

DIMMA0

DIMMB0

DIMMA1

DIMMB1

SMBus 0

8-bit Address (hex)

Micro Star Restricted Secret

Title

FIRST LOGICAL DDR DIMM

Document Number

MICRO-STAR INT'L CO.,LTD.

No. 69, Li-De St, Jung-He City,

No. 69, Li-De St, Jung-He City, Taipei Hsien, Taiwan

Taipei Hsien, Taiwan

Taipei Hsien, Taiwan http://www.msi.com.tw

http://www.msi.com.tw

MS-7576

Last Revision Date:

Friday, November 14, 2008

Sheet

11 42

Rev

MEM_MA_DQS_H[7..0]9,11 MEM_MA_DQS_L[7..0]9,11

MEM_MA_DM[7..0]9,11 MEM_MA_ADD[15..0]9,11

MEM_MA_DATA[63..0]9,11

MEM_MA_DQS_H[7..0] MEM_MA_DQS_L[7..0] MEM_MA_DM[7..0] MEM_MA_ADD[15..0] MEM_MA_DATA[63..0]

VCC3

MEM_MB_DQS_L[7..0]9,11 MEM_MB_DQS_H[7..0]9,11

MEM_MB_DM[7..0]9,11

MEM_MB_ADD[15..0]9,11

MEM_MB_DATA[63..0]9,11

MEM_MB_DQS_L[7..0] MEM_MB_DQS_H[7..0] MEM_MB_DM[7..0] MEM_MB_ADD[15..0] MEM_MB_DATA[63..0]

VCC3

D D

MEM_MA_DATA0 MEM_MA_DATA1 MEM_MA_DATA2 MEM_MA_DATA3 MEM_MA_DATA4 MEM_MA_DATA5 MEM_MA_DATA6 MEM_MA_DATA7 MEM_MA_DATA8 MEM_MA_DATA9 MEM_MA_DATA10 MEM_MA_DATA11 MEM_MA_DATA12 MEM_MA_DATA13 MEM_MA_DATA14 MEM_MA_DATA15 MEM_MA_DATA16 MEM_MA_DATA17 MEM_MA_DATA18 MEM_MA_DATA19 MEM_MA_DATA20 MEM_MA_DATA21 MEM_MA_DATA22 MEM_MA_DATA23 MEM_MA_DATA24 MEM_MA_DATA25 MEM_MA_DATA26 MEM_MA_DATA27

C C

MEM_MA_DATA28 MEM_MA_DATA29 MEM_MA_DATA30 MEM_MA_DATA31 MEM_MA_DATA32 MEM_MA_DATA33 MEM_MA_DATA34 MEM_MA_DATA35 MEM_MA_DATA36 MEM_MA_DATA37 MEM_MA_DATA38 MEM_MA_DATA39 MEM_MA_DATA40 MEM_MA_DATA41 MEM_MA_DATA42 MEM_MA_DATA43 MEM_MA_DATA44 MEM_MA_DATA45 MEM_MA_DATA46 MEM_MA_DATA47 MEM_MA_DATA48 MEM_MA_DATA49 MEM_MA_DATA50 MEM_MA_DATA51 MEM_MA_DATA52 MEM_MA_DATA53 MEM_MA_DATA54 MEM_MA_DATA55 MEM_MA_DATA56 MEM_MA_DATA57 MEM_MA_DATA58 MEM_MA_DATA59 MEM_MA_DATA60 MEM_MA_DATA61 MEM_MA_DATA62 MEM_MA_DATA63

B B

A A

VCC_DDR

DIMM3

VDD51VDD

VDD57VDD60VDD62VDD65VDD66VDD69VDD72VDD75VDD78VDD

DQ0

DQ1

DQ2

DQ3

122

DQ4

123

DQ5

128

DQ6

129

DQ7

DQ8

DQ9

DQ10

DQ11

131

DQ12

132

DQ13

137

DQ14

138

DQ15

DQ16

DQ17

DQ18

DQ19

140

DQ20

141

DQ21

146

DQ22

147

DQ23

DQ24

DQ25

DQ26

DQ27

149

DQ28

150

DQ29

155

DQ30

156

DQ31

DQ32

DQ33

DQ34

DQ35

200

DQ36

201

DQ37

206

DQ38

207

DQ39

DQ40

DQ41

DQ42

DQ43

209

DQ44

210

DQ45

215

DQ46

216

DQ47

DQ48

100

DQ49

105

DQ50

106

DQ51

218

DQ52

219

DQ53

224

DQ54

225

DQ55

108

DQ56

109

DQ57

114

DQ58

115

DQ59

227

DQ60

228

DQ61

233

DQ62

234

DQ63

VSS

101

VSS

104

VSS

107

110

113

116

119

170

173

176

179

182

183

VDD

DDR3

VSS

121

124

127

130

133

136

139

142

145

148

151

154

157

VTT_DDR

186

189

191

194

197

236

VDD

VDDSPD

VSS

160

163

166

199

202

205

208

C292

C0.1u16Y0402

MEM_MA_EVENT_L

120

240

187

198

167

VTT

NC/PAR_IN

VSS

211

214

217

220

223

NC/TEST4

NC/ERR_OUT

VSS

226

229

RSVD

FREE1

DM1/DQS10 NC/DQS10# DM2/DQS11 NC/DQS11# DM3/DQS12 NC/DQS12# DM4/DQS13 NC/DQS13# DM5/DQS14 NC/DQS14# DM6/DQS15 NC/DQS15# DM7/DQS16 NC/DQS16# DM8/DQS17 NC/DQS17#

VSS

232

235

FREE249FREE3

FREE4

A10/AP

DQS0

DQS0#

DQS1

DQS1#

DQS2

DQS2#

DQS3

DQS3#

DQS4

DQS4#

DQS5

DQS5#

DQS6

DQS6#

DQS7

DQS7#

DQS8

DQS8#

DM0/DQS9 NC/DQS9#

ODT0 ODT1 CKE0 CKE1

CS0# CS1#

WE# RAS# CAS#

RESET#

CK0#

CK1(NU)

CK1#(NU)

VREFDQ

VREFCA

VSS

MEC1

MEC2

239

MEC1

MEC2

A0 A1 A2 A3 A4 A5 A6 A7 A8 A9

A11 A12 A13 A14 A15

CB0 CB1 CB2 CB3 CB4 CB5 CB6 CB7

BA0 BA1 BA2

CK0

SCL SDA SA1 SA0

MEC3

ZIF-DDRIII240P-RH

MEC3

188 181 61 180 59 58 178 56 177 175 70 55 174 196 172 171

39 40 45 46 158 159 164 165

7 6 16 15 25 24 34 33 85 84 94 93 103 102 112 111 43 42

125 126 134 135 143 144 152 153 203 204 212 213 221 222 230 231 161 162

195 77 50 169 193 76 71 190 52

73 192 74 168

184 185 63 64

1 67 118 238 237 117

MEM_MA_EVENT_L 9,11

MEM_MA_ADD0 MEM_MA_ADD1 MEM_MA_ADD2 MEM_MA_ADD3 MEM_MA_ADD4 MEM_MA_ADD5 MEM_MA_ADD6 MEM_MA_ADD7 MEM_MA_ADD8 MEM_MA_ADD9 MEM_MA_ADD10 MEM_MA_ADD11 MEM_MA_ADD12 MEM_MA_ADD13 MEM_MA_ADD14 MEM_MA_ADD15

MEM_MA_DM0 MEM_MA_DM1 MEM_MA_DM2 MEM_MA_DM3 MEM_MA_DM4 MEM_MA_DM5 MEM_MA_DM6 MEM_MA_DM7

MEM_MA1_ODT0 MEM_MA1_ODT1 MEM_MA_CKE0 MEM_MA_CKE1 MEM_MA1_CS_L0 MEM_MA1_CS_L1 MEM_MA_BANK0 MEM_MA_BANK1 MEM_MA_BANK2

MEM_MA_WE_L MEM_MA_RAS_L MEM_MA_CAS_L MEM_MA_RESET#

MEM_MA1_CLK_H0 MEM_MA1_CLK_L0 MEM_MA1_CLK_H1 MEM_MA1_CLK_L1

VDDR_VREF_DQ

VDDR_VREF_CA SCL0 SDA0

MEM_MA1_ODT0 9

MEM_MA1_ODT1 9 MEM_MA_CKE0 9,11 MEM_MA_CKE1 9,11 MEM_MA1_CS_L0 9 MEM_MA1_CS_L1 9 MEM_MA_BANK0 9,11 MEM_MA_BANK1 9,11 MEM_MA_BANK2 9,11

MEM_MA_WE_L 9,11 MEM_MA_RAS_L 9,11 MEM_MA_CAS_L 9,11 MEM_MA_RESET# 9,11

MEM_MA1_CLK_H0 9 MEM_MA1_CLK_L0 9 MEM_MA1_CLK_H1 9 MEM_MA1_CLK_L1 9

SCL0 6,7,11,21,24,29,34,37,38 SDA0 6,7,11,21,24,29,34,37,38

VCC3 VCC3

C75

X_C0.1u16Y0402

VDDR_VREF_CAVDDR_VREF_DQ

C208

X_C0.1u16Y0402

MEM_MB_DATA63

VCC_DDR

DIMM4

VDD51VDD

VDD57VDD60VDD62VDD65VDD66VDD69VDD72VDD75VDD78VDD

DQ0

DQ1

DQ2

DQ3

122

DQ4

123

DQ5

128

DQ6

129

DQ7

DQ8

DQ9

DQ10

DQ11

131

DQ12

132

DQ13

137

DQ14

138

DQ15

DQ16

DQ17

DQ18

DQ19

140

DQ20

141

DQ21

146

DQ22

147

DQ23

DQ24

DQ25

DQ26

DQ27

149

DQ28

150

DQ29

155

DQ30

156

DQ31

DQ32

DQ33

DQ34

DQ35

200

DQ36

201

DQ37

206

DQ38

207

DQ39

DQ40

DQ41

DQ42

DQ43

209

DQ44

210

DQ45

215

DQ46

216

DQ47

DQ48

100

DQ49

105

DQ50

106

DQ51

218

DQ52

219

DQ53

224

DQ54

225

DQ55

108

DQ56

109

DQ57

114

DQ58

115

DQ59

227

DQ60

228

DQ61

233

DQ62

234

DQ63

VSS

101

VSS

104

VSS

107

110

113

116

119

170

173

176

179

182

183

186

189

191

194

197

VDD

DDR3

VSS

121

124

127

130

133

136

139

142

145

148

151

154

157

160

163

166

199

202

205

236

VSS

208

VTT_DDR

120

VDDSPD

VSS

211

214

C431

C0.1u16Y0402

MEM_MB_EVENT_L

240

187

198

167

VTT

NC/PAR_IN

VSS

217

220

223

NC/TEST4

NC/ERR_OUT

VSS

226

229

RSVD

FREE1

DM1/DQS10 NC/DQS10# DM2/DQS11 NC/DQS11# DM3/DQS12 NC/DQS12# DM4/DQS13 NC/DQS13# DM5/DQS14 NC/DQS14# DM6/DQS15 NC/DQS15# DM7/DQS16 NC/DQS16# DM8/DQS17 NC/DQS17#

VSS

232

235

FREE249FREE3

A10/AP

DQS0

DQS0#

DQS1

DQS1#

DQS2

DQS2#

DQS3

DQS3#

DQS4

DQS4#

DQS5

DQS5#

DQS6

DQS6#

DQS7

DQS7#

DQS8

DQS8#

DM0/DQS9 NC/DQS9#

ODT0 ODT1 CKE0 CKE1

CS0# CS1#

RAS# CAS#

RESET#

CK0#

CK1(NU)

CK1#(NU)

VREFDQ

VREFCA

VSS

MEC1

239

MEC1

MEC2

FREE4

A1 A2 A3 A4 A5 A6 A7 A8 A9

A11 A12 A13 A14 A15

CB0 CB1 CB2 CB3 CB4 CB5 CB6 CB7

BA0 BA1 BA2

WE#

CK0

SCL

SDA

SA1 SA0

MEC2

MEC3

ZIF-DDRIII240P-RH

MEC3

188 181 61 180 59 58 178 56 177 175 70 55 174 196 172 171

39 40 45 46 158 159 164 165

7 6 16 15 25 24 34 33 85 84 94 93 103 102 112 111 43 42

125 126 134 135 143 144 152 153 203 204 212 213 221 222 230 231 161 162

195 77 50 169 193 76 71 190 52

73 192 74 168

184 185 63 64

1 67 118 238 237 117

MEM_MB_EVENT_L 9,11

MEM_MB_ADD0 MEM_MB_ADD1 MEM_MB_ADD2 MEM_MB_ADD3 MEM_MB_ADD4 MEM_MB_ADD5 MEM_MB_ADD6 MEM_MB_ADD7 MEM_MB_ADD8 MEM_MB_ADD9 MEM_MB_ADD10 MEM_MB_ADD11 MEM_MB_ADD12 MEM_MB_ADD13 MEM_MB_ADD14 MEM_MB_ADD15

MEM_MB_DQS_H0 MEM_MB_DQS_L0 MEM_MB_DQS_H1 MEM_MB_DQS_L1 MEM_MB_DQS_H2 MEM_MB_DQS_L2 MEM_MB_DQS_H3 MEM_MB_DQS_L3 MEM_MB_DQS_H4 MEM_MB_DQS_L4 MEM_MB_DQS_H5 MEM_MB_DQS_L5 MEM_MB_DQS_H6 MEM_MB_DQS_L6 MEM_MB_DQS_H7 MEM_MB_DQS_L7

MEM_MB_DM0 MEM_MB_DM1 MEM_MB_DM2 MEM_MB_DM3 MEM_MB_DM4 MEM_MB_DM5 MEM_MB_DM6 MEM_MB_DM7

MEM_MB1_ODT0 MEM_MB1_ODT1 MEM_MB_CKE0 MEM_MB_CKE1 MEM_MB1_CS_L0 MEM_MB1_CS_L1 MEM_MB_BANK0 MEM_MB_BANK1 MEM_MB_BANK2

MEM_MB_WE_L MEM_MB_RAS_L MEM_MB_CAS_L MEM_MB_RESET#

MEM_MB1_CLK_H0 MEM_MB1_CLK_L0 MEM_MB1_CLK_H1 MEM_MB1_CLK_L1

VDDR_VREF_DQ VDDR_VREF_CA

SCL0 SDA0

MEM_MB1_ODT0 9

MEM_MB1_ODT1 9 MEM_MB_CKE0 9,11 MEM_MB_CKE1 9,11 MEM_MB1_CS_L0 9 MEM_MB1_CS_L1 9 MEM_MB_BANK0 9,11 MEM_MB_BANK1 9,11 MEM_MB_BANK2 9,11

MEM_MB_WE_L 9,11 MEM_MB_RAS_L 9,11 MEM_MB_CAS_L 9,11 MEM_MB_RESET# 9,11

MEM_MB1_CLK_H0 9 MEM_MB1_CLK_L0 9 MEM_MB1_CLK_H1 9 MEM_MB1_CLK_L1 9

ADDRESS A6ADDRESS A4

Micro Star Restricted Secret

Title

SECOND LOGICAL DDR DIMM

Document Number

MICRO-STAR INT'L CO.,LTD.

No. 69, Li-De St, Jung-He City,

No. 69, Li-De St, Jung-He City, Taipei Hsien, Taiwan

Taipei Hsien, Taiwan

Taipei Hsien, Taiwan http://www.msi.com.tw

http://www.msi.com.tw

MS-7576

Last Revision Date:

Friday, November 14, 2008

Sheet

12 42

Rev

3VDUAL

D D

VCC5_SB

R322

X_0R/6

DDR VTT Power

R327

0R/6

U25

VREF2

ENABLE

VCNTL

BOOT_SEL

W83310DG_SOP8-RH

GND

VREF1

VOUT

GND

VCC_DDR

VIN

2 3 4 9

1.25V/2.9A

C C

To CPU Copper trace width > 250mils , Fill island behind DIMM > 400mils .

VCC_DDR

R321

1.5A

VTT_DDR

R342

X_1KR1%0402

1KR1%0402

R318

1KR1%0402

VTT_DDR

EC31

EC31 560u/4V/8*9/O

560u/4V/8*9/O

Layout: Spread out on VTT pour

VTT_DDR

C290

C301

0.1u/25v/Y5/4

B B

C290

0.1u/25v/Y5/4

VTT_DDR

C270

0.1u/25v/Y5/4

C304 0.1u/25v/Y5/4C304 0.1u/25v/Y5/4

VCC_DDR

C212

0.1u/25v/Y5/4

A A

0.1u/25v/Y5/4

C193

0.1u/25v/Y5/4

C184

0.1u/25v/Y5/4

C197

EMI

20071029

X_0.1u/25v/Y5/4

C237

C163

X_0.1u/25v/Y5/4

Micro Star Restricted Secret

Title

DDR VTT POWER

Document Number

MICRO-STAR INT'L CO.,LTD.

No. 69, Li-De St, Jung-He City,

No. 69, Li-De St, Jung-He City, Taipei Hsien, Taiwan

Taipei Hsien, Taiwan

Taipei Hsien, Taiwan http://www.msi.com.tw

http://www.msi.com.tw

MS-7576

Last Revision Date:

Friday, November 14, 2008

Sheet

13 42

Rev

+ 29 hidden pages

MSI MS-7576 Schematics

Specifications and Main Features

Frequently Asked Questions

User Manual