MSI MS-7571 Schematics

.

1

1Cover Sheet
Block Diagram/Clock Map/Power Map
Intel LGA775 CPU
Intel G41- MCH
DDR II System Memory
DDR II VTT Decoupling
Intel ICH7 - PCI & DMI & CPU & IRQ
Intel ICH7 - LPC & ATA & USB & GPIO
Intel ICH7 - POWER
Clock -SLG8xP518T
19 SIO-ITE 8720F
20 LAN MARVELL 88E8071
21 Audio Codec ALC888S-VC

A A

PCI EXPRESS X16&X1 Slot
PCI Slot 1 & 2
24 VIA_1394-VT6315N
SATA&TMP&COM PORT

2-4
5-7

8-11

12-13

14
15
16
17
18
19
20
21
22
23
24
25

MS-7571

CPU:

Intel Prescott ( L2=2MB ) - 3.4G & Above
Intel Cendar Mill (65nm) - 3.73G & Above
Intel Smithfield (90nm Dual core)
Intel Conroe (65W Dual core)
Intel Pentium 4, Pentium D, Core2 Duo, Wolfdale, Kentsfield
and Yorkfield processors in LGA775 Package.

System Chipset:

Intel G41 (North Bridge)
Intel ICH7 (South Bridge)

On Board Chipset:

BIOS -- SPI
HD -- ALC888S-VC
LPC Super I/O -- iTE8720
LAN-- MARVELL 88E8071
CLOCK -- SLG8xP518T
1394 -- VT6315N

Version 0A

USB Connectors
ATX Connetcor & Front Panel
uPI ACPI
GMCH Vcore
VGA Connector
PWM Controller:
DVI Connector 32
MANUAL PARTS
Change history
Bios request form
PWROK & Reset map

26
27
28
29
30
31

33
34
35

36&37

Main Memory:

DDR II *2 (Max 4GB)

Expansion Slots:

PCI EXPRESS X1 SLOT
PCI EXPRESS X16 SLOT
PCI2.3 SLOT * 2

PWM Controller:

INTERSIL-6333CRZ 3 PHASES

1

MICRO-STAR INT'L CO.,LTD

MICRO-STAR INT'L CO.,LTD

MICRO-STAR INT'L CO.,LTD

MS-7571

MS-7571

Cover Sheet

Cover Sheet

Cover Sheet

MS-7571

MSI

MSI

MSI

Size Document Description Rev

Size Document Description Rev

Size Document Description Rev

Custom

Custom

Custom

Date:

Friday, September 05, 2008

Date:

Friday, September 05, 2008

Date:

Friday, September 05, 2008

Sheet of

Sheet of

Sheet of

138

138

138

0A

0A

0A

.

VRM 11
INTERSIL­6333CRZ
3-Phase PWM

Analog
Video
Out

DVI OUT

Block Diagram

Intel LGA775 Processor

FSB 800/1066/1333

FSB

RGB

DDR2 667/800

EagleG41
GMCH

DDRII

1

2DDR II
DIMM
Modules

SATA

USB

Switch

HD Audio

PCI EXPRESS X16

ICH7

DMI

PCI

PCIE X1

LPC Bus

PCI Slot 1

PCI Slot 2

PCIE X1 SLOT

PCI EXPRESS
X16
Connector

A A

SATA 0~3

USB Port 0~7

ALC888

PCIE

LPC SIO

MARVELL0/88E8071

PCIE

iTE
8720F

VIA 1394

SPI

TPM

Keyboard

Floopy Parallel Serial-1

Serial-1

Mouse

SPI 8M
FLASH ROM

MICRO-STAR INT'L CO.,LTD

MICRO-STAR INT'L CO.,LTD

MICRO-STAR INT'L CO.,LTD

MS-7571

MS-7571

MSI

MSI

MSI

Size Document Description Rev

Size Document Description Rev

Size Document Description Rev

Custom

Custom

Custom

Date:

Friday, September 05, 2008

Date:

Friday, September 05, 2008

Date:

1

Friday, September 05, 2008

MS-7571

BLOCK DIAGRAM

BLOCK DIAGRAM

BLOCK DIAGRAM

238

238

238

Sheet of

Sheet of

Sheet of

0A

0A

0A

.

5

4

3

2

1

CLOCK MAP

D D

HCLK

LGA775

MCHCLK

DOT96M

G41

DDRCLKA

CH A

CH B

DDRCLKB

PCIECLK

PCIECLK

C C

SLG8xP518T

SATACLK

ICHCLK

USB48MHz

ICH7

ICH14.318MHz

SIO48MHz

33MHz

Fintek SIO

HDCLK 24M

﹛ALC888

B B

TPMCLK_33M

TPM

PCIELAN_100M

RTL8111DL

PCIEX16 100MHz

PCIEX1 100MHz

A A

PCICLK[0..1]

33MHz

5

4

PCIE X 16

PCIE X 1

PCI1

PCI2

3

MICRO-STAR INT'L CO.,LTD

MICRO-STAR INT'L CO.,LTD

MICRO-STAR INT'L CO.,LTD

MS-7571

MS-7571

MSI

MSI

MSI

Size Document Description Rev

Size Document Description Rev

Size Document Description Rev

Custom

Custom

Custom

CLOCK MAP

CLOCK MAP

CLOCK MAP

Date:

Friday, September 05, 2008

Date:

Friday, September 05, 2008

Date:

2

Friday, September 05, 2008

MS-7571

1

338

338

338

Sheet of

Sheet of

Sheet of

0A

0A

0A

.

5

4

3

2

1

CPU
SMF,CDM,Pressler,
Conroe,Allendale

0.8375V - 1.6000V Core

1.2V FSB Vtt

D D

Bearlake G41

1.2V FSB_VTT - 1.0 A

1.1V Core - 18.1A

1.1V DMI/PCI Exp. - TBD A

1.8V VCC_DDR

(S0,S1)

3.3V VCCA_DAC

3.3V VCC33

- 85A

- 5.3A

- 3.2A

- 250 mA1.8V VCC_SMCLK

-65.8 mA

- 15.8mA

- TBD A1.1V Vcc CL

ICH7

-1.31A1.05V Core

C C

V5REF - 6 mA

1.2V FSB_VTT

1.5V_A USB/SATA

- 14 mA

- 0.97A

1.5V_B PCI Exp. - 0.74A

- TBD uAVCCRTC (G3)

- 12 mA3.3V CL

1.5V GbE LAN

3.3V 10/100 LAN

- TBD mA

- 1TBD mA

- 10 mAV5REF _SUS

VCCSUS3_3 - 0.7A

B B

VCC3_3 - 0.58A

HD Audio ALC888

3.3V AUDIO
5V AUDIO

- 40mA

- 200mA

CLK GEN SLG8xP518T

3.3V

- 560mA

6333-CRZ

VCCP

0.8375V-1.6000V
3-Phase Switch

VRM 11.1

85A

uP7711

VTT_DDR

0.9V

Linear

1.2A

uP6103 Regulator

VCC_DDR

1.8V

PWM

9.4A +6.44A +1.71A
+1.31A + 5A +1.2A

GMCH 1.1V Regulator

V_1P1_CORE

1.25V

Switch 18.1A

GMCH 1.2V Regulator

V_FSB_VTT

ICH I/O Regulator

V_1P5_ICH

1.5V Linear

ICH Core Regulator

3.3V Stabd-by Regulator

Linear1.2V 6.44A

1.71A

V_1P05_ICH

Linear1.05V 1.31 A

VCC3_SB

3.3V Linear

1.5A

5VDUAL

5V
5VSB

Switch
Switch

5A

500mA

uP7501 Regulator

5VDIMM

5V

Switch 15A
Switch 500mA

5VSB

DDRII x2 & TERMINATOR

0.9V VTT_DDR

1.8V VCC_DDR

1.8V VCC_DDR

(S0,S1)
(S3)

PCI Express x16 slot

+12V

+3.3Vaux
+3.3Vaux

(wake)
(no wake)

+3.3V

PCI slot x2

+3.3Vaux
+3.3Vaux

+3.3V

+5V

+12V

(wake)
(no wake)

USB x8

+5V (S0,S1)
+5V (S3)

PS2

(S0,S1)

+5V
+5V (S3)

- 1.2A

-5A

-400mA

- 5.5 A

- 375mA

- 20mA

- 3.0A

- 375mA

- 20mA

- 7.6A

- 5A

- 0.4A

- 4.0A

- 20mA

- 345mA

- 2.0mA

MARVELL/88E8071

3.3V_SB I/O & LED

1.8V ANALOG

A A

5

- 620mA

- 660mA

5VAUD

5V
500mA

3V

Battery

+12V

ATX
2x2

4

+3.3V+5V +12V+5VSB

ATX POWER

3

MICRO-STAR INt'L CO., LTD.

MICRO-STAR INt'L CO., LTD.

MICRO-STAR INt'L CO., LTD.

Title

Title

Title

POWER MAP

POWER MAP

POWER MAP

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Date: Sheet of

2

Date: Sheet

MS-7571

MS-7571

MS-7571

438Monday, September 08, 2008

438Monday, September 08, 2008

438Monday, September 08, 2008

1

0A

0A

0A

of

.

5

H_A#[3..35]8

D D

H_A#31

H_A#30

H_A#32

H_A#33

H_A#34

H_A#35

AJ6

AJ5

AH5

AH4

AG5

B15

AG4

A35#

A34#

A33#

A32#

A31#

A30#

D53#

D52#

D51#

D50#

D49#

D48#

D47#

A14

C14

C15

D17

D20

G22

H_D#52

H_D#51

H_D#50

H_D#49

H_D#48

H_D#47

CPU1A

CPU1A

R79R79

CPU_BSEL018
CPU_BSEL118
CPU_BSEL218

H_DBI#0
H_DBI#1
H_DBI#2
H_DBI#3

H_TDI
H_TDO
H_TMS
H_TRST#
H_TCK
PECI

H_TRMTRIP#

H_IGNNE#
ICH_H_SMI#
H_A20M#

R128 X_0R0402R128 X_0R0402

T1T1

H_DBI#[0..3]8

H_IERR#6

H_FERR#15

H_STPCLK#15

H_INIT#15

H_DBSY#8

H_DRDY#8

H_TRDY#8

H_ADS#8

C C

H_BPM#1

Kentsfield

B B

H_D#[0..63]8

A A

H_LOCK#8

H_BNR#8

H_HIT#8
H_HITM#8
H_BPRI#8

H_DEFER#8

PECI19
THERMDA19
THERMDC19
H_TRMTRIP#15

H_PROCHOT#6

H_IGNNE#15

ICH_H_SMI#15

H_A20M#15

PM_SLP_N8
H_CPUSLP#15

H_PWRGD6,15

H_CPURST#6,8

CPU_BSEL0
CPU_BSEL1
CPU_BSEL2

H_D#63
H_D#62
H_D#61
H_D#60
H_D#59
H_D#58
H_D#57
H_D#56
H_D#55
H_D#54

G11
D19
C20

AB2
AB3

AD3

AD1
AF1
AC1
AG1
AE1

AL1
AK1

AE8
AL2

AH2
AE6
D16

A20

AA2
G29

H30
G30

G23

B22
A22
A19
B19
B21
C21
B18
A17
B16
C18

A8

R3
M3

P3
H4

B2
C1
E3

D2
C3
C2
D4
E4
G8
G7

G5

M2

N2
P2
K3

L2

N5
C9

Y1
V2

N1

DBI0#
DBI1#
DBI2#
DBI3#

IERR#
MCERR#
FERR#/PBE#
STPCLK#
BINIT#
INIT#
RSP#

DBSY#
DRDY#
TRDY#

ADS#
LOCK#
BNR#
HIT#
HITM#
BPRI#
DEFER#

TDI
TDO
TMS
TRST#
TCK
PECI
THERMDA
THERMDC
THERMTRIP#
GND/SKTOCC#
PROCHOT#
IGNNE#
SMI#
A20M#
TESTI_13

RSVD#AH2
RESERVED0
RESERVED1
RESERVED2
RESERVED4
RESERVED5

BOOTSELECT
LL_ID0
LL_ID1

BSEL0
BSEL1
BSEL2

PWRGOOD
RESET#

D63#
D62#
D61#
D60#
D59#
D58#
D57#
D56#
D55#
D54#

H_D#53

4

CPU SIGNAL BLOCK PULL HIGHT PULL DOWN

H_A#8

H_A#10

H_A#5

H_A#6

H_A#7

H_A#3

H_A#29

AG6

D22

H_D#46

H_A#28

AF4

A29#

D46#

E22

H_D#45

H_A#27

A28#

D45#

H_D#44

AF5

G21

H_A#26

A27#

D44#

H_D#43

AB4

F21

H_A#25

A26#

D43#

H_D#42

AC5

E21

H_A#24

A25#

D42#

H_D#41

AB5

F20

H_A#23

A24#

D41#

H_D#40

AA5

E19

H_A#22

AD6

A23#

D40#

E18

H_D#39

H_A#21

A22#

D39#

H_D#38

AA4

F18

H_A#20

A21#

D38#

F17

H_D#37

H_A#18

H_A#17

H_A#19

H_A#16

AB6

A20#Y4A19#Y6A18#W6A17#

D37#

D36#

D35#

D34#

E16

G17

G18

H_D#33

H_D#34

H_D#35

H_D#36

H_A#15

H_A#11

H_A#12

H_A#13

H_A#14

A16#W5A15#V4A14#V5A13#U4A12#U5A11#T4A10#

D33#

D32#

D31#

D30#

D29#

D28#

F15

F14

E15

G16

G15

G14

H_D#28

H_D#29

H_D#30

H_D#31

H_D#32

H_A#9

U6

A9#T5A8#R4A7#M4A6#L4A5#M5A4#P6A3#

D27#

D26#

D25#

D24#

F12

F11

E13

D13

G13

H_D#23

H_D#24

H_D#25

H_D#26

H_D#27

H_A#4

D23#

D22#

E10

D10

H_D#21

H_D#22

AC2

L5

DBR#

D21#

D20#D7D19#E9D18#F9D17#F8D16#G9D15#

H_D#17

H_D#18

H_D#19

H_D#20

AN5

AN4

AN3

VSS_SENSE

VCC_SENSE

VCC_MB_REGULATION

D14#

D11

C12

H_D#13

H_D#14

H_D#15

H_D#16

VID7

AN6

AJ3

AK3

ITP_CLK1

ITP_CLK0

VSS_MB_REGULATION

D13#

D12#D8D11#

D10#

D9#

B12

B10

A11

C11

H_D#8

H_D#9

H_D#10

H_D#11

H_D#12

3

C34 X_C10u16Y1206C34 X_C10u16Y1206

VID2

VID3

VID1

VID4

VID5

VID6

AM5

AL4

AK4

AL6

AM3

AL5

AM7

VID6

VID5

VID4

VID3

VID2

RSVD/VID7

FC5/CPU_GTLREF2

RSVD/CPU_GTLREF3

D8#

D7#A7D6#B7D5#B6D4#A5D3#C6D2#A4D1#C5D0#

A10

H_D#2

H_D#3

H_D#4

H_D#5

H_D#6

H_D#7

VCC_SENSE

VSS_SENSE

VID[0..7] 31

VID0

AM2

VID1

VID0

VID_SELECT

GTLREF0
GTLREF1

GTLREF_SEL

GTLREF2

TESTHI12
TESTHI11
TESTHI10

TESTHI9
TESTHI8
TESTHI7
TESTHI6
TESTHI5
TESTHI4
TESTHI3
TESTHI2
TESTHI1
TESTHI0

FORCEPH

RSVD#G6

BCLK1#
BCLK0#

COMP5
COMP4
COMP3
COMP2
COMP1
COMP0

ADSTB1#
ADSTB0#
DSTBP3#
DSTBP2#
DSTBP1#
DSTBP0#
DSTBN3#
DSTBN2#
DSTBN1#
DSTBN0#

LINT1/NMI

LINT0/INTR

ZIF-SOCKET775-RH-1,ZIF-SOCKET775_TH-2

ZIF-SOCKET775-RH-1,ZIF-SOCKET775_TH-2

B4

H_D#0

H_D#1

BPM5#
BPM4#
BPM3#
BPM2#
BPM1#
BPM0#

REQ4#
REQ3#
REQ2#
REQ1#
REQ0#

RS2#
RS1#
RS0#

AP1#
AP0#
BR0#

DP3#
DP2#
DP1#
DP0#

VTT_OUT_RIGHT

AN7

CPU_GTLREF0

H1

CPU_GTLREF1

H2
H29
E24

CPU_GTLREF1

F2

CPU_GTLREF0

G10

H_BPM#5

AG3

H_BPM#4

AF2

H_BPM#3

AG2

H_BPM#2

AD2

H_BPM#1

AJ1

H_BPM#0

AJ2

H_REQ#4

J6

H_REQ#3

K6

H_REQ#2

M6

H_REQ#1

J5

H_REQ#0

K4

H_TESTHI12

W2

DPSLP#

P1

H_TESTHI10

H5
G4

H_TESTHI8

G3
F24
G24
G26
G27
G25
F25
W3
F26

FORCEPHH_PROCHOT#

AK6

RSVD_G6

G6
G28

F28

H_RS#2

A3

H_RS#1

F5

H_RS#0

B3

TEST-U3

U3

TEST-U2

U2
F3

H_COMP5

T2

H_COMP4

J2

H_COMP3

R1

H_COMP2

G2

H_COMP1

T1

H_COMP0

A13

TEST-J17

J17

TEST-H16

H16

TEST-H15

H15

TEST-J16

J16
AD5

R6
C17
G19
E12
B9
A16
G20
G12
C8
L1
K1

R53

R53

680R0402

680R0402

R172 X_0R0402R172 X_0R0402

H_TESTHI1
H_TESTHI0

VCC_SENSE 31

VSS_SENSE 31

T5T5

R141R141
R139R139

Kentsfield

R167 51R0402R167 51R0402
R168 51R0402R168 51R0402

R95 X_130R1%0402R95 X_130R1%0402
R131 X_51R0402R131 X_51R0402

T3T3
T2T2

R150 0R0402R150 0R0402
R132 49.9R1%0402R132 49.9R1%0402
R119 49.9R1%0402R119 49.9R1%0402
R146 49.9R1%0402R146 49.9R1%0402
R112 49.9R1%0402R112 49.9R1%0402
R180 49.9R1%0402R180 49.9R1%0402

T6T6
T4T4
T9T9
T8T8

H_ADSTB#1 8
H_ADSTB#0 8
H_DSTBP#3 8
H_DSTBP#2 8
H_DSTBP#1 8
H_DSTBP#0 8
H_DSTBN#3 8
H_DSTBN#2 8
H_DSTBN#1 8
H_DSTBN#0 8
H_NMI 15
H_INTR 15

2

CPU_GTLREF0 6
CPU_GTLREF1 6

CPU_MCH_GTLREF 8
CPU_GTLREF1 6
CPU_GTLREF0 6

H_BPM#0 7
H_REQ#[0..4] 8

H_TESTHI12 7
DPSLP# 16

H_BPM#2H_TESTHI9
H_BPM#3

V_FSB_VTTH_TESTHI2_7

CK_H_CPU# 18
CK_H_CPU 18

H_RS#[0..2] 8

V_FSB_VTT

VTT_OUT_RIGHT
VTT_OUT_LEFT

H_BR#0 6,8
H_COMP5_R 8,16

VTT_OUT_LEFT

C75

C75
C0.1u16Y0402

C0.1u16Y0402

8P4R-680R0402-RH

8P4R-680R0402-RH

VID2
VID0
VID5
VID4

8P4R-680R0402-RH

8P4R-680R0402-RH

VID7
VID3
VID6
VID1

H_BPM#1
H_BPM#0
H_BPM#5
H_BPM#3

H_TRST#
H_BPM#4
H_TDO
H_TCK

H_TDI
H_BPM#2
H_TMS

H_TESTHI12
H_TESTHI1
H_TESTHI10

DPSLP#
PM_SLP_N
H_COMP5

1

RN3

RN3

1

2

3

4

5

6

7

8

RN2

RN2

1

2

3

4

5

6

7

8

RN4

RN4
8P4R-51R0402

8P4R-51R0402

1

2

3

4

5

6

7

8

RN5

RN5
8P4R-51R0402

8P4R-51R0402

1

2

3

4

5

6

7

8

RN7

RN7
8P4R-51R0402

8P4R-51R0402

1

2

3

4

5

6

7

8

RN8 8P4R-51R0402RN8 8P4R-51R0402

1

2

3

4

5

6

7

8

R120 X_51R0402R120 X_51R0402
R134 X_51R0402R134 X_51R0402
R111 49.9R1%0402R111 49.9R1%0402

VTT_OUT_RIGHT

C69

C69
C0.1u16Y0402

C0.1u16Y0402

VTT_OUT_RIGHT

VTT_OUT_LEFT

C78

C78
C0.1u16Y0402

C0.1u16Y0402

MICRO-STAR INT'L CO.,LTD

MICRO-STAR INT'L CO.,LTD

MICRO-STAR INT'L CO.,LTD

MS-7571

MS-7571

MSI

MSI

MSI

Size Document Description Rev

Size Document Description Rev

Size Document Description Rev

Custom

Custom

Custom

Date:

Tuesday, September 02, 2008

Date:

Tuesday, September 02, 2008

Date:

5

4

3

2

Tuesday, September 02, 2008

MS-7571

LGA775 - Signal

LGA775 - Signal

LGA775 - Signal

1

Sheet of

Sheet of

Sheet of

538

538

538

0A

0A

0A

.

5

VCCP

AG30

AG29

AG28

AG27

AG26

AG25

AG22

AG21

AG19

AG18

AG15

AG14

AG12

AG11

AF9

AF8

AF22

AF21

CPU1B

AF19
AF18
AF15
AF14
AF12
AF11

AE9
AE23
AE22
AE21
AE19
AE18
AE15
AE14
AE12
AE11

AD8
AD30
AD29
AD28
AD27
AD26
AD25
AD24
AD23

AC8
AC30
AC29
AC28
AC27
AC26
AC25
AC24
AC23

AB8

AA8

VCCP

CPU1B

VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCCW8VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

Y8

Y30

Y29

Y28

Y27

Y26

Y25

Y24

Y23

W30

W29

W28

W27

W26

W25

W24

W23

VCCP

D D

C C

AG8

VCC

AG9

VCC

VCCU8VCCV8VCC

AH11

VCC

VCC

U30

AH12

VCC

VCC

U29

AH14

VCC

VCC

U28

AH15

VCC

VCC

U27

4

AH18

U26

VCC

VCC

AH19

VCC

VCC

U25

AH21

VCC

VCC

U24

AH22

VCC

U23

AH25

VCC

VCCT8VCC

AH26

VCC

VCC

T30

AH27

VCC

VCC

T29

AH28

VCC

VCC

T28

AH29

VCC

VCC

T27

AH30

VCC

VCC

T26

AH8

T25

VCC

VCC

AH9

T24

VCC

VCC

3

AJ11

AJ12

AJ14

AJ15

AJ18

AJ19

AJ21

AJ22

AJ25

AJ26

AJ8

AJ9

AK11

AK12

AK14

AK15

AK18

AK19

AK21

AK22

AK25

AK26

AK8

AK9

AL11

AL12

AL14

AL15

AL18

AL19

AL21

AL22

AL25

AL26

AL29

AL30

AL8

AL9

AM11

AM12

AM14

AM15

AM18

AM19

AM21

AM22

AM25

AM26

AM29

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCCJ8VCCJ9VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCCK8VCCL8VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCCM8VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCCN8VCCP8VCCR8VCC

J13

J14

J15

J18

J19

J20

J21

J22

J23

J24

J25

J26

J27

J28

J29

T23

N30

N23

N24

N25

N26

N27

N28

N29

M24

M25

M26

M27

M28

M29

M30

K27

K28

K29

K30

M23

K26

K25

K24

K23

J30

VCC

VCC

2

AM30

AM8

AM9

AN11

AN12

AN14

AN15

AN18

AN19

AN21

AN22

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCCA
VSSA

VCCPLL

VCC-IOPLL

VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT

VTTPWRGD

VTT_OUT_RIGHT

VTT_OUT_LEFT

VTT_SEL

RSVD#F29

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

J10

J11

J12

AN8

AN9

AN25

AN26

AN29

AN30

H_VCCA

A23

H_VSSA

B23

H_VCCPLL

D23

H_VCCA

C23

A25
A26
A27
A28
A29
A30
B25
B26
B27
B28
B29
B30
C25
C26
C27
C28
C29
C30
D25
D26
D27
D28
D29
D30

VTT_PWG

AM6
AA1

J1

VTT_SEL

F27
F29

ZIF-SOCKET775-RH-1,ZIF-SOCKET775_TH-2

ZIF-SOCKET775-RH-1,ZIF-SOCKET775_TH-2

H_VCCPLL 10

V_FSB_VTT

C188 C10u10Y0805C188 C10u10Y0805

CAPS FOR FSB GENERIC

VTT_OUT_RIGHT
VTT_OUT_LEFT

T12T12

1

C196 C10u10Y0805C196 C10u10Y0805

V_FSB_VTT

C189 C10u10Y0805C189 C10u10Y0805

*GTLREF VOLTAGE SHOULD BE 0.635 * VTT = 0.762V (At VTT=1.2V)

CPU_GTL_REF0

R142

B B

VTT_OUT_RIGHT VTT_OUT_RIGHT

GTL_REF0

R140

R140
100R1%0402

100R1%0402

R142

10R1%0402

10R1%0402

C83

C83
C1u16Y

C1u16Y

CPU_GTLREF0 5 CPU_GTLREF1 5

C98

C98
C220p16X0402

C220p16X0402

R122 49.9R1%0402R122 49.9R1%0402R121 57.6R1%0402-RHR121 57.6R1%0402-RH

GTL_REF1

R143

R143
100R1%0402

100R1%0402

*GTLREF VOLTAGE SHOULD BE 0.667 * VTT = 0.8V (At VTT=1.2V)

R82

R82
X_10KR0402

X_10KR0402

R84

R84
X_10KR0402

X_10KR0402

5VSB5VSB

C66

X_C0.1u16Y0402

C66

X_C0.1u16Y0402

Address:60h

U4

U4

1

VDD

VOUT1

2

BUS_SEL

VOUT2

3

GND

VOUT3

SDA4SCL

X_UP6262M8_SOT23-8-RH

X_UP6262M8_SOT23-8-RH

PLACE AT CPU END OF ROUTE

VTT_OUT_RIGHT

A A

VTT_OUT_LEFT

R78 130R1%0402R78 130R1%0402
R89 62R0402R89 62R0402

R109 62R0402R109 62R0402
R126 X_100R0402R126 X_100R0402
R138 62R0402R138 62R0402

5

H_PROCHOT#
H_IERR#

H_CPURST#
H_PWRGD
H_BR#0

H_PROCHOT# 5
H_IERR# 5

H_CPURST# 5,8
H_PWRGD 5,15
H_BR#0 5,8

4

CPU_GTL_REF1

R145

R145

10R1%0402

10R1%0402

C88

C88
C1u16Y

C1u16Y

8
7
6
5

C99

C99
C220p16X0402

C220p16X0402

CPU_GTL_REF1
DIMM_MEM_REF
CPU_GTL_REF0

SMBCLK_ISO 12,16,18,20,22,23,28
SMBDATA_ISO 12,16,18,20,22,23,28

3

DIMM_MEM_REF 12,13

*PLACE COMPONENTS AS CLOSE AS POSSIBLE TO PROCESSOR SOCKET
*TRACE WIDTH TO CAPS MUST BE NO SMALLER THAN 12MILS

V_FSB_VTT V_1P5_CORE

L10 X_10u100mA_0805-RHL10 X_10u100mA_0805-RH

21

CP5CP5

C157

C157
C1u16Y

C1u16Y

C146

C146
C10u10Y0805

C10u10Y0805

C151

C151
X_C10u10Y0805

X_C10u10Y0805

H_VCCA

C159

C159
C0.01u25X0402

C0.01u25X0402

H_VSSA

CP6CP6

VTT_PWRGOOD

VTT_OUT_RIGHT

R42

R42
680R0402

680R0402

VTT_PWG

VID_GD#28,31

R66 1KR0402R66 1KR0402

CE

B

Q4

Q4
N-MMBT3904_NL_SOT23

N-MMBT3904_NL_SOT23

C41

C41
X_C1u16Y

X_C1u16Y

2

MSI

MSI

MSI

VTT_PWG SPEC :
High > 0.9V
Low < 0.3V
Trise < 150ns

MICRO-STAR INT'L CO.,LTD

MICRO-STAR INT'L CO.,LTD

MICRO-STAR INT'L CO.,LTD

Size Document Description Rev

Size Document Description Rev

Size Document Description Rev

Custom

Custom

Custom

LGA775 - Power

LGA775 - Power

LGA775 - Power

Date:

Thursday, September 04, 2008

Date:

Thursday, September 04, 2008

Date:

Thursday, September 04, 2008

H_VCCPLL

C170

C170
C1u16Y

C1u16Y

MS-7571

MS-7571

MS-7571

1

C161

C161
C0.01u25X0402

C0.01u25X0402

Sheet of

Sheet of

Sheet of

638

638

638

C166

C166
C10u10Y0805

C10u10Y0805

0A

0A

0A

.

5

CPU1C

CPU1C

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

1122334

VSSY7VSSY5VSSY2VSSW7VSSW4VSSV7VSSV6VSS

4

A12
A15
A18

A2

AA23
AA24
AA25
AA26
AA27
AA28
AA29

AA30

AB23
AB24
AB25
AB26
AB27
AB28
AB29
AB30

AC3
AC6
AC7
AD4

AD7
AE10
AE13
AE16
AE17

AE2
AE20
AE24
AE25
AE26
AE27
AE28
AE29
AE30

AE5

AE7
AF10
AF13
AF16
AF17
AF20
AF23
AF24
AF25
AF26
AF27
AF28
AF29

AF3
AF30

AF6

AF7

A21

AA3
AA6

AA7
AB1

AB7

A6
A9

D D

C C

B B

VSS

AG10

VSS

AG13

VSS

AG16

VSS

AG17

VSS

AG20

VSS

AG23

V30

VSS

AG24

VSSV3VSS

VSS

AG7

V29

AH1

VSS

V28

VSS

VSS

AH10

V27

VSS

VSS

AH13

V26

VSS

VSS

AH16

V25

VSS

VSS

AH17

V24

VSS

VSS

AH20

V23

VSS

VSS

AH23

U7

VSS

VSST7VSST6VSST3VSSR7VSSR5VSS

VSS

VSS

VSS

VSS

AH3

AH6

AH7

AH24

R30

R29

R28

R27

R26

R25

R24

R23

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSSR2VSSP7VSSP4VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

AJ10

AJ13

AJ16

AJ17

AJ20

AJ23

AJ24

AJ27

AJ28

AJ29

AJ30

4

P30

P29

P28

P27

P26

P25

P24

P23

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSSN7VSSN6VSSN3VSSM7VSSM1VSSL7VSSL6VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

AJ4

AJ7

AK2

AK10

AK13

AK16

AK17

AK20

AK23

AK24

AK27

VSS

AK28

VSS

AK29

VSS

AK30

AK5

VSS

AK7

VSS

VSS

AL10

L30

VSS

AL13

VSSL3VSS

VSS

AL16

L29

VSS

AL17

L28

VSS

VSS

AL20

L27

VSS

VSS

AL23

L26

VSS

VSS

AL24

L25

VSS

VSS

AL27

L24

VSS

VSS

AL28

L23

AL7

VSS

VSS

VSSK7VSS

VSS

AM1

K2

K5

VSS

VSS

VSS

VSS

VSS

VSS

AM10

AM13

AM16

AM17

AM20

AM23

3

F7

H10

H11

H12

H13

H14

H17

H18

H19

H20

H21

H22

H23

H24

H25

H26

H27

H28

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSSH3VSSH6VSSH7VSSH8VSSH9VSSJ4VSSJ7VSS

H_COMP6

Y3

COMP6
COMP7

RSVD/COMP8

RSVD#AE4

RSVD#D1

RSVD#D14

RSVD#E5
RSVD#E6

RSVD#E7
RSVD#E23
RSVD#F23

RSVD

RSVD#J3
RSVD#N4
RSVD#P5

RSVD#AC4

IMPSEL#

MSID1
MSID0

FC28
FC27
FC26
FC23

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSSB1VSS

VSS

VSS

VSS

VSS

ZIF-SOCKET775-RH-1,ZIF-SOCKET775_TH-2

ZIF-SOCKET775-RH-1,ZIF-SOCKET775_TH-2

B11

B14

B17

B20

AN1

AN2

AM4

AN10

AN13

AN16

AN17

AN20

AN23

AN24

AM24

AM27

AM28

AN27

AN28

B24

AE3
B13

AE4
D1
D14
E5
E6
E7
E23
F23
AL3
J3
N4
P5
AC4

F6
V1
W1

U1
G1
E29
A24

F4
F22
F19
F16
F13
F10
E8
E28
E27
E26
E25
E20
E2
E17
E14
E11
D9
D6
D5
D3
D24
D21
D18
D15
D12
C7
C4
C24
C22
C19
C16
C13
C10
B8
B5

H_COMP7
H_COMP8

IMPSEL
MSID1
MSID0

FC28
FC27

T11T11
T10T10
T7T7

2

R103 49.9R1%0402R103 49.9R1%0402
R87 49.9R1%0402R87 49.9R1%0402
R183 24.9R1%0402R183 24.9R1%0402

30.1ohm

Can cut

R110 X_0R0402R110 X_0R0402

R135 51R0402R135 51R0402
R106 51R0402R106 51R0402
R107 51R0402R107 51R0402

R117 0R0402R117 0R0402
R144 0R0402R144 0R0402
R170 X_0R0402R170 X_0R0402
R171 X_1KR0402R171 X_1KR0402

H_TESTHI12
H_BPM#0

VTT_OUT_RIGHT

H_TESTHI12 5
H_BPM#0 5

Kentsfield

05 Per FMB

05 Value FMB

1

MSID1 MSID0

0

0

0

1

MLCC

VCCP

C119

C119

X_C10U6.3Y1206

X_C10U6.3Y1206

A A

VCCP

C116

C116

C10U6.3Y1206

C10U6.3Y1206

(Place into CPU Socket Cavity)

C95

C120

C120

C10U6.3Y1206

C10U6.3Y1206

C97

C97

C10U6.3Y1206

C10U6.3Y1206

5

C95

X_C10U6.3Y1206

X_C10U6.3Y1206

C118

C118

X_C10U6.3Y1206

X_C10U6.3Y1206

C117

C117

C10U6.3Y1206

C10U6.3Y1206

C92

C92

C10U6.3Y1206

C10U6.3Y1206

C121

C121

C10U6.3Y1206

C10U6.3Y1206

C94

C94

X_C10U6.3Y1206

X_C10U6.3Y1206

C93

C93

C10U6.3Y1206

C10U6.3Y1206

C96

C96

C10U6.3Y1206

C10U6.3Y1206

4

VCCP

C106

C106

C10U6.3Y1206

C10U6.3Y1206

C104

C104

C10U6.3Y1206

C10U6.3Y1206

C102

C102

X_C10U6.3Y1206

X_C10U6.3Y1206

C103

C103

C10U6.3Y1206

C10U6.3Y1206

3

C101

C101

X_C10U6.3Y1206

X_C10U6.3Y1206

C105

C105

C10U6.3Y1206

C10U6.3Y1206

MICRO-STAR INT'L CO.,LTD

MICRO-STAR INT'L CO.,LTD

MICRO-STAR INT'L CO.,LTD

MS-7571

MS-7571

MSI

MSI

MSI

Size Document Description Rev

Size Document Description Rev

Size Document Description Rev

Custom

Custom

Custom

LGA775 - GND

LGA775 - GND

LGA775 - GND

Date:

Tuesday, September 02, 2008

Date:

Tuesday, September 02, 2008

Date:

2

Tuesday, September 02, 2008

MS-7571

1

Sheet of

Sheet of

Sheet of

738

738

738

0A

0A

0A

.

5

EAGLELAKE_DDR2

NB1A

NB1A

H_A#3

L36

H_A#4
H_A#5
H_A#6
H_A#7
H_A#8
H_A#9
H_A#10
H_A#11
H_A#12

H_ADS#5

H_TRDY#5

H_HITM#5

H_HIT#5

H_LOCK#5

H_BR#05,6
H_BNR#5

H_BPRI#5

R227 49.9R1%0402R227 49.9R1%0402

C238

C238

C0.1u25Y0402

C0.1u25Y0402

R230

R230

16.5R1%/2

16.5R1%/2

V_FSB_VTT

C242

C242

X_C0.1u25Y0402

X_C0.1u25Y0402

H_A#13
H_A#14
H_A#15
H_A#16
H_A#17
H_A#18
H_A#19
H_A#20
H_A#21
H_A#22
H_A#23
H_A#24
H_A#25
H_A#26
H_A#27
H_A#28
H_A#29
H_A#30
H_A#31
H_A#32
H_A#33
H_A#34
H_A#35

H_REQ#0
H_REQ#1
H_REQ#2
H_REQ#3
H_REQ#4

H_DBI#0
H_DBI#1
H_DBI#2
H_DBI#3

H_RS#0
H_RS#1
H_RS#2

D D

H_REQ#[0..4]5

H_ADSTB#05

C C

B B

A A

H_ADSTB#15

H_DSTBP#05
H_DSTBN#05
H_DSTBP#15
H_DSTBN#15
H_DSTBP#25
H_DSTBN#25
H_DSTBP#35
H_DSTBN#35

H_DBI#[0..3]5

H_DRDY#5

H_DEFER#5

H_DBSY#5

H_RS#[0..2]5

H_CPURST#5,6

V_FSB_VTT V_FSB_VTT

HXSWING S/B 1/4*VTT +/- 2%

R223

R223

300R1%0402

300R1%0402

R224

R224
100R1%0402

100R1%0402

C240

C240

C0.1u25Y0402

C0.1u25Y0402

FSB_AB_3

L37

FSB_AB_4

J38

FSB_AB_5

F40

FSB_AB_6

H39

FSB_AB_7

L38

FSB_AB_8

L43

FSB_AB_9

N39

FSB_AB_10

N35

FSB_AB_11

N37

FSB_AB_12

J41

FSB_AB_13

N40

FSB_AB_14

M45

FSB_AB_15

R35

FSB_AB_16

T36

FSB_AB_17

R36

FSB_AB_18

R34

FSB_AB_19

R37

FSB_AB_20

R39

FSB_AB_21

U38

FSB_AB_22

T37

FSB_AB_23

U34

FSB_AB_24

U40

FSB_AB_25

T34

FSB_AB_26

Y36

FSB_AB_27

U35

FSB_AB_28

AA35

FSB_AB_29

U37

FSB_AB_30

Y37

FSB_AB_31

Y34

FSB_AB_32

Y38

FSB_AB_33

AA37

FSB_AB_34

AA36

FSB_AB_35

G38

FSB_REQB_0

K35

FSB_REQB_1

J39

FSB_REQB_2

C43

FSB_REQB_3

G39

FSB_REQB_4

J40

FSB_ADSTBB_0

T39

FSB_ADSTBB_1

C39

FSB_DSTBPB_0

B39

FSB_DSTBNB_0

K31

FSB_DSTBPB_1

J31

FSB_DSTBNB_1

J25

FSB_DSTBPB_2

K25

FSB_DSTBNB_2

C32

FSB_DSTBPB_3

D32

FSB_DSTBNB_3

B40

FSB_DINVB_0

F33

FSB_DINVB_1

F26

FSB_DINVB_2

D30

FSB_DINVB_3

J42

FSB_ADSB

L40

FSB_TRDYB

J43

FSB_DRDYB

G44

FSB_DEFERB

K44

FSB_HITMB

H45

FSB_HITB

H40

FSB_LOCKB

L42

FSB_BREQ0B

J44

FSB_BNRB

H37

FSB_BPRIB

H42

FSB_DBSYB

G43

FSB_RSB_0

L44

FSB_RSB_1

G42

FSB_RSB_2

D27

FSB_CPURSTB

N25

RSVD_05

ELK_CRB

ELK_CRB

GTLREF VOLTAGE SHOULD BE 0.635VTT=0.762V

HXSWING MCH_GTLREF

HXRCOMP

C245

C245

X_C2.7P/25N/2

X_C2.7P/25N/2

C241

C241

X_C0.1u25Y0402

X_C0.1u25Y0402

5

EAGLELAKE_DDR2

SYM_REV = 1.5

SYM_REV = 1.5

1 OF 7

1 OF 7

R222

R222

57.6R1%0402-RH

57.6R1%0402-RH

R225

R225
100R1%0402

100R1%0402

FSB

FSB

FSB_DB_0
FSB_DB_1
FSB_DB_2
FSB_DB_3
FSB_DB_4
FSB_DB_5
FSB_DB_6
FSB_DB_7
FSB_DB_8

FSB_DB_9
FSB_DB_10
FSB_DB_11
FSB_DB_12
FSB_DB_13
FSB_DB_14
FSB_DB_15
FSB_DB_16
FSB_DB_17
FSB_DB_18
FSB_DB_19
FSB_DB_20
FSB_DB_21
FSB_DB_22
FSB_DB_23
FSB_DB_24
FSB_DB_25
FSB_DB_26
FSB_DB_27
FSB_DB_28
FSB_DB_29
FSB_DB_30
FSB_DB_31
FSB_DB_32
FSB_DB_33
FSB_DB_34
FSB_DB_35
FSB_DB_36
FSB_DB_37
FSB_DB_38
FSB_DB_39
FSB_DB_40
FSB_DB_41
FSB_DB_42
FSB_DB_43
FSB_DB_44
FSB_DB_45
FSB_DB_46
FSB_DB_47
FSB_DB_48
FSB_DB_49
FSB_DB_50
FSB_DB_51
FSB_DB_52
FSB_DB_53
FSB_DB_54
FSB_DB_55
FSB_DB_56
FSB_DB_57
FSB_DB_58
FSB_DB_59
FSB_DB_60
FSB_DB_61
FSB_DB_62
FSB_DB_63

FSB_SWING

FSB_RCOMP

FSB_DVREF

FSB_ACCVREF

HPL_CLKINP
HPL_CLKINN

R226 49.9R1%0402R226 49.9R1%0402

C239

C239
C1u16Y

C1u16Y

V_1P1_CORE

R281

R281

1KR0402

1KR0402

R278

R278

464R1%0402

464R1%0402

F44
C44
D44
C41
E43
B43
D40
B42
B38
F38
A38
B37
D38
C37
D37
B36
E37
J35
H35
F37
G37
J33
L33
G33
L31
M31
M30
J30
G31
K30
M29
G30
J29
F29
H29
L25
K26
L29
J26
M26
H26
F25
F24
G25
H24
L24
J24
N24
C28
B31
F35
C35
B35
D35
D31
A34
B32
F31
D28
A29
C30
B30
E27
B28

B24
A23

C22
B23

P29
P30

4

H_D#0
H_D#1
H_D#2
H_D#3
H_D#4
H_D#5
H_D#6
H_D#7
H_D#8
H_D#9
H_D#10
H_D#11
H_D#12
H_D#13
H_D#14
H_D#15
H_D#16
H_D#17
H_D#18
H_D#19
H_D#20
H_D#21
H_D#22
H_D#23
H_D#24
H_D#25
H_D#26
H_D#27
H_D#28
H_D#29
H_D#30
H_D#31
H_D#32
H_D#33
H_D#34
H_D#35
H_D#36
H_D#37
H_D#38
H_D#39
H_D#40
H_D#41
H_D#42
H_D#43
H_D#44
H_D#45
H_D#46
H_D#47
H_D#48
H_D#49
H_D#50
H_D#51
H_D#52
H_D#53
H_D#54
H_D#55
H_D#56
H_D#57
H_D#58
H_D#59
H_D#60
H_D#61
H_D#62
H_D#63

HXSWING
HXRCOMP

MCH_GTLREF

CPU_MCH_GTLREF 5

C243

C243

C220p16X0402

C220p16X0402

CL_VREF_MCH

C316

C316

C0.1u25Y0402

C0.1u25Y0402

4

H_D#[0..63] 5H_A#[3..35]5

CPU_BSEL0
CPU_BSEL1
CPU_BSEL2

DEMO BOARD CHANGE

EXP16_PRSNT#22

VCC3

R254 X_4.7KR0402R254 X_4.7KR0402

PLTRST#15,19,25

ITPM_ENB
Itegrated TPM Enable:
0=Enable iTPM
1=Disable iTPM

DualX8_Enable
0=2X8 PCIe Ports Enable

PIN H L

EXP_SLR
EXP_EN
MCH_TCEN

1=1X16 PCIe Port Enable

Normal
Concurrent
Enable

Reverse
Non-concurrent
Disable

Primary _PEG_Presence
Primary PCIe port Detect:
0=PCIe Card is in Primary Slot
1=PCIe Card is not in Primary Slot

EXP_A_RXP_0
EXP_A_RXN_0
EXP_A_RXP_1
EXP_A_RXN_1
EXP_A_RXP_2
EXP_A_RXN_2
EXP_A_RXP_3
EXP_A_RXN_3
EXP_A_RXP_4
EXP_A_RXN_4 DMI_MCH_IT_MR_0_DP
EXP_A_RXP_5
EXP_A_RXN_5
EXP_A_RXP_6
EXP_A_RXN_6
EXP_A_RXP_7
EXP_A_RXN_7
EXP_A_RXP_8
EXP_A_RXN_8
EXP_A_RXP_9
EXP_A_RXN_9
EXP_A_RXP_10
EXP_A_RXN_10
EXP_A_RXP_11
EXP_A_RXN_11
EXP_A_RXP_12
EXP_A_RXN_12
EXP_A_RXP_13
EXP_A_RXN_13
EXP_A_RXP_14
EXP_A_RXN_14
EXP_A_RXP_15
EXP_A_RXN_15

DMI_MCH_IT_MR_0_DP
DMI_MCH_IT_MR_0_DN
DMI_MCH_IT_MR_1_DP
DMI_MCH_IT_MR_1_DN
DMI_MCH_IT_MR_2_DP
DMI_MCH_IT_MR_2_DN
DMI_MCH_IT_MR_3_DP
DMI_MCH_IT_MR_3_DN

CK_PE_100M_MCH#
SDVOCTRLDATA
SDVOCTRLCLK

CK_H_MCHp 18
CK_H_MCHn 18

SDVOCTRLDATA
SDVOCTRLCLK

DMI_MCH_IT_MR_0_DP15

DMI_MCH_IT_MR_0_DN15

DMI_MCH_IT_MR_1_DP15

DMI_MCH_IT_MR_1_DN15

DMI_MCH_IT_MR_2_DP15

DMI_MCH_IT_MR_2_DN15

DMI_MCH_IT_MR_3_DP15

DMI_MCH_IT_MR_3_DN15

EXP_A_RXP_022
EXP_A_RXN_022
EXP_A_RXP_122
EXP_A_RXN_122
EXP_A_RXP_222
EXP_A_RXN_222
EXP_A_RXP_332
EXP_A_RXN_332
EXP_A_RXP_422
EXP_A_RXN_422
EXP_A_RXP_522
EXP_A_RXN_522
EXP_A_RXP_622
EXP_A_RXN_622
EXP_A_RXP_722
EXP_A_RXN_722
EXP_A_RXP_822
EXP_A_RXN_822
EXP_A_RXP_922
EXP_A_RXN_922

EXP_A_RXP_1022

EXP_A_RXN_1022

EXP_A_RXP_1122

EXP_A_RXN_1122

EXP_A_RXP_1222

EXP_A_RXN_1222

EXP_A_RXP_1322

EXP_A_RXN_1322

EXP_A_RXP_1422

EXP_A_RXN_1422

EXP_A_RXP_1522

EXP_A_RXN_1522

CK_PE_100M_MCH18

CK_PE_100M_MCH#18
SDVOCTRLDATA22,32
SDVOCTRLCLK22,32

R274 X_2.2KR0402R274 X_2.2KR0402
R273 X_2.2KR0402R273 X_2.2KR0402

3

RN32

RN32
8P4R-10KR0402

8P4R-10KR0402

1
3
5
7

R271 X_1KR0402R271 X_1KR0402
R260 X_1KR0402R260 X_1KR0402

R270 0R0402R270 0R0402
R268 1KR0402R268 1KR0402
R269 X_1KR0402R269 X_1KR0402

CL_VREF_MCH
CHIP_PWGD

Description

PCI_E Lane Reversal
PCI_E/SDVO co-existence
TLS confidentiality

F6
G7
H6
G4
J6
J7
L6
L7
N9

N10

N7
N6
R7
R6

R9
R10
U10

U9

U6

U7
AA9

AA10

R4

P4
AA7
AA6

AB10

AB9
AB3
AA2

AD10
AD11

AD7
AD8

AE9

AE10

AE6
AE7
AF9
AF8

D9

E9

J13

G13

AB13
AD13

VCC3

3

2

MCH_BS0

4

MCH_BS1

6

MCH_BS2

8

T22X_TP T22X_TP
T23X_TP T23X_TP

EXP_SLR
EXP_EN

ITPM_EN

MCH_TCEN

T20X_TP T20X_TP
T24X_TP T24X_TP
T26X_TP T26X_TP
T25X_TP T25X_TP
T21X_TP T21X_TP

T15X_TP T15X_TP
T14X_TP T14X_TP

R288 0R0402R288 0R0402
R289 0R0402R289 0R0402

R266 X_0R0402R266 X_0R0402

EAGLELAKE_DDR2

EAGLELAKE_DDR2

NB1B

NB1B

PEG_RXP_0
PEG_RXN_0
PEG_RXP_1
PEG_RXN_1
PEG_RXP_2
PEG_RXN_2
PEG_RXP_3
PEG_RXN_3
PEG_RXP_4
PEG_RXN_4
PEG_RXP_5
PEG_RXN_5
PEG_RXP_6
PEG_RXN_6
PEG_RXP_7
PEG_RXN_7
PEG_RXP_8
PEG_RXN_8
PEG_RXP_9
PEG_RXN_9
PEG_RXP_10
PEG_RXN_10
PEG_RXP_11
PEG_RXN_11
PEG_RXP_12
PEG_RXN_12
PEG_RXP_13
PEG_RXN_13
PEG_RXP_14
PEG_RXN_14
PEG_RXP_15
PEG_RXN_15

DMI_RXP_0
DMI_RXN_0
DMI_RXP_1
DMI_RXN_1
DMI_RXP_2
DMI_RXN_2
DMI_RXP_3
DMI_RXN_3

EXP_CLKP
EXP_CLKN
SDVO_CTRLDATA
SDVO_CTRLCLK
RSVD_23
RSVD_22

F17

BSEL0

G16

BSEL1

P15

BSEL2

M20

ALLZTEST

N17

XORTEST

K16

RSVD_36

F15

EXP_SLR

G15

RSVD_17

H17

EXP_SM

L17

ITPM_ENB

M17

RSVD_10

J17

CEN

G20

BSCANTEST

J16

RSVD_12

M16

RSVD_13

J15

RSVD_14

J20

RSVD_15

F20

DUALX8_ENABLE

AY4

CL_DATA

AY2

CL_CLK

AN13

CL_VREF

AW2

CL_RSTB

AN8

CL_PWROK

AR7

JTAG_TDI

AN10

JTAG_TDO

AN11

JTAG_TCK

AN9

JTAG_TMS

AN17

NC_01

B45

NC_02

AW44

NC_03

AN16

NC_04

AD42

NC_05

W30

NC_06

U32

NC_07

R42

NC_08

BE44

NC_09

BE2

NC_10

BD45

NC_11

BD1

NC_12

A44

NC_13

AK15

NC_18

B14

NC_19

?

?

SYM_REV = 1.5

SYM_REV = 1.5

PCIE

PCIE

DMI

DMI

NB1E

NB1E

ELK_CRB

ELK_CRB

EAGLELAKE_DDR2

EAGLELAKE_DDR2

SYM_REV = 1.5

SYM_REV = 1.5

PEG_TXP_0
PEG_TXN_0
PEG_TXP_1
PEG_TXN_1
PEG_TXP_2
PEG_TXN_2
PEG_TXP_3
PEG_TXN_3
PEG_TXP_4
PEG_TXN_4
PEG_TXP_5
PEG_TXN_5
PEG_TXP_6
PEG_TXN_6
PEG_TXP_7
PEG_TXN_7
PEG_TXP_8
PEG_TXN_8
PEG_TXP_9

PEG_TXN_9
PEG_TXP_10
PEG_TXN_10
PEG_TXP_11
PEG_TXN_11
PEG_TXP_12
PEG_TXN_12
PEG_TXP_13
PEG_TXN_13
PEG_TXP_14
PEG_TXN_14
PEG_TXP_15
PEG_TXN_15

DMI_TXP_0
DMI_TXN_0
DMI_TXP_1
DMI_TXN_1
DMI_TXP_2
DMI_TXN_2
DMI_TXP_3
DMI_TXN_3

EXP_RCOMPO

EXP_COMPI

EXP_ICOMPO

EXP_RBIAS

2 OF 7

2 OF 7

?

?

MISC

MISC

5 OF 7

5 OF 7

?

?

VGA

VGA

DPL_REFSSCLKINP

DPL_REFSSCLKINN

C11
B11
A10
B9
C9
D8
B8
C7
B7
B6
B3
B4
D2
C2
H2
G2
J2
K2
K1
L2
P2
M2
T2
R1
U2
V2
W4
V3
AA4
Y4
AC1
AB2

AC2
AD2
AD4
AE4
AE2
AF2
AF4
AG4

GRCOMPCK_PE_100M_MCH

Y7
Y8
Y6
AG1

2

CRT_HSYNC
CRT_VSYNC

CRT_RED

CRT_GREEN

CRT_BLUE

CRT_IRTN

CRT_DDC_DATA

CRT_DDC_CLK

DAC_IREF

DPL_REFCLKINP
DPL_REFCLKINN

RSTINB

PWROK

ICH_SYNCB

HDA_BCLK
HDA_RSTB

HDA_SDI

HDA_SDO

HDA_SYNC

DDPC_CTRLCLK

DDPC_CTRLDATA

DPRSTPB

SLPB

RSVD_18
RSVD_19
RSVD_20
RSVD_21
RSVD_25
RSVD_26
RSVD_27
RSVD_28
RSVD_29
RSVD_30
RSVD_31
RSVD_32
RSVD_33
RSVD_34
RSVD_35

EXP_A_TXP_0
EXP_A_TXN_0
EXP_A_TXP_1
EXP_A_TXN_1
EXP_A_TXP_2
EXP_A_TXN_2
EXP_A_TXP_3
EXP_A_TXN_3
EXP_A_TXP_4
EXP_A_TXN_4
EXP_A_TXP_5
EXP_A_TXN_5
EXP_A_TXP_6
EXP_A_TXN_6
EXP_A_TXP_7
EXP_A_TXN_7
EXP_A_TXP_8
EXP_A_TXN_8
EXP_A_TXP_9
EXP_A_TXN_9
EXP_A_TXP_10
EXP_A_TXN_10
EXP_A_TXP_11
EXP_A_TXN_11
EXP_A_TXP_12
EXP_A_TXN_12
EXP_A_TXP_13
EXP_A_TXN_13
EXP_A_TXP_14
EXP_A_TXN_14
EXP_A_TXP_15
EXP_A_TXN_15

R554 49.9R1%0402R554 49.9R1%0402

R285 X_750R1%0402R285 X_750R1%0402
R276 750R1%0402R276 750R1%0402

2

D14
C14

B18
D18
C18
F13

L15
M15

B15
E15

D15
G8
G9

AN6
AR4
K15

AU4
AV4
AU2
AV1
AU3

J11
F11
P43
P42

A45
B2
BE1
BE45
R15
R14
T15
T14
AB15
R32
R31
U31

?

?

U30
L11
L13

HSYNC

VSYNC

DACREFSET

R262 1.02KR1%0402R262 1.02KR1%0402

CHIP_PWGD

R296 0R0402R296 0R0402

R299 X_1KR0402R299 X_1KR0402

T29 X_TPT29 X_TP
T27 X_TPT27 X_TP

H_COMP5_R

R207 0R0402R207 0R0402

PM_SLP_N

R272 X_10KR0402R272 X_10KR0402

EXP_A_TXP_0 32
EXP_A_TXN_0 32
EXP_A_TXP_1 32
EXP_A_TXN_1 32
EXP_A_TXP_2 32
EXP_A_TXN_2 32
EXP_A_TXP_3 32
EXP_A_TXN_3 32
EXP_A_TXP_4 22
EXP_A_TXN_4 22
EXP_A_TXP_5 22
EXP_A_TXN_5 22
EXP_A_TXP_6 22
EXP_A_TXN_6 22
EXP_A_TXP_7 22
EXP_A_TXN_7 22
EXP_A_TXP_8 22
EXP_A_TXN_8 22
EXP_A_TXP_9 22
EXP_A_TXN_9 22
EXP_A_TXP_10 22
EXP_A_TXN_10 22
EXP_A_TXP_11 22
EXP_A_TXN_11 22
EXP_A_TXP_12 22
EXP_A_TXN_12 22
EXP_A_TXP_13 22
EXP_A_TXN_13 22
EXP_A_TXP_14 22
EXP_A_TXN_14 22
EXP_A_TXP_15 22
EXP_A_TXN_15 22

DMI_ICH_MT_IR_0_DP 15
DMI_ICH_MT_IR_0_DN 15
DMI_ICH_MT_IR_1_DP 15
DMI_ICH_MT_IR_1_DN 15
DMI_ICH_MT_IR_2_DP 15
DMI_ICH_MT_IR_2_DN 15
DMI_ICH_MT_IR_3_DP 15
DMI_ICH_MT_IR_3_DN 15

V_1P1_CORE

V_1P1_CORE

1

HSYNC 30

VSYNC 30
VGA_RED 30
VGA_GREEN 30
VGA_BLUE 30

MCH_DDC_DATA 30
MCH_DDC_CLK 30

CK_96M_DREF 18
CK_96M_DREF# 18
DPL_REFSSCLKIN 18
DPL_REFSSCLKIN# 18

PLTRST# 15,19,25
CHIP_PWGD 16,28,32
ICH_SYNC# 16

VCC3

246

R277

R277

0R0402

0R0402

DEMO BOARD CHANGE

T28 X_TPT28 X_TP

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Date: Sheet of

Date: Sheet

8

135

7

H_COMP5_R 5,16
PM_SLP_N 5

VCC3

V_1P1_CORE

MSI

RN33

RN33

8P4R-0R0402-2

8P4R-0R0402-2

Close to MCH A.S.A.P

R282 X_5.1KR1%0402R282 X_5.1KR1%0402
R283 X_5.1KR1%0402R283 X_5.1KR1%0402
R284 X_5.1KR1%0402R284 X_5.1KR1%0402
R293 X_5.1KR1%0402R293 X_5.1KR1%0402

MICRO-STAR INt'L CO., LTD.

MICRO-STAR INt'L CO., LTD.

MICRO-STAR INt'L CO., LTD.

Intel Bearlake G41 - CPU Signals

Intel Bearlake G41 - CPU Signals

Intel Bearlake G41 - CPU Signals

MS-7571

MS-7571

MS-7571

DMI_MCH_IT_MR_1_DP
DMI_MCH_IT_MR_2_DP
DMI_MCH_IT_MR_3_DP

1

of

838Thursday, September 04, 2008

838Thursday, September 04, 2008

838Thursday, September 04, 2008

0A

0A

0A

.

5

EAGLELAKE_DDR2

EAGLELAKE_DDR2

NB1C

NB1C

BC41

DDR_A_MA_0

BC35

DDR_A_MA_1

BB32

DDR_A_MA_2

BC32

DDR_A_MA_3

BD32

DDR_A_MA_4

BB31

DDR_A_MA_5

AY31

DDR_A_MA_6

BA31

DDR_A_MA_7

BD31

DDR_A_MA_8

BD30

DDR_A_MA_9

AW43

DDR_A_MA_10

BC30

DDR_A_MA_11

BB30

DDR_A_MA_12

AM42

DDR_A_MA_13

BD28

DDR_A_MA_14

AW42

DDR_A_WEB

AU42

DDR_A_CASB

AV42

DDR_A_RASB

AV45

DDR_A_BS_0

AY44

DDR_A_BS_1

BC28

DDR_A_BS_2

AU43

DDR_A_CSB_0

AR40

DDR_A_CSB_1

AU44

DDR_A_CSB_2

AM43

DDR_A_CSB_3

BB27

DDR_A_CKE_0

BD27

DDR_A_CKE_1

BA27

DDR_A_CKE_2

AY26

DDR_A_CKE_3

AR42

DDR_A_ODT_0

AM44

DDR_A_ODT_1

AR44

DDR_A_ODT_2

AL40

DDR_A_ODT_3

AY37

DDR_A_CK_0

BA37

DDR_A_CKB_0

AW29

DDR_A_CK_1

AY29

DDR_A_CKB_1

AU37

DDR_A_CK_2

AV37

DDR_A_CKB_2

AU33

DDR_A_CK_3

AT33

DDR_A_CKB_3

AT30

DDR_A_CK_4

AR30

DDR_A_CKB_4

AW38

DDR_A_CK_5

AY38

DDR_A_CKB_5

BC24

DDR3_DRAMRSTB

AR6

DDR3_DRAM_PWROK

AR43

DDR3_A_CSB1

BB40

DDR3_A_MA0

AT44

DDR3_A_WEB

AV40

DDR3_B_ODT3

ELK_CRB

ELK_CRB

DDR_A

DDR_A

SYM_REV = 1.5

SYM_REV = 1.5

T13X_TP T13X_TP

MAA_A[0..14]

WE_A#
CAS_A#
RAS_A#

SBS_A0
SBS_A1
SBS_A2

SCS_A#0
SCS_A#1

SCKE_A0
SCKE_A1

ODT_A0
ODT_A1

P_DDR0_A
N_DDR0_A
P_DDR1_A
N_DDR1_A
P_DDR2_A
N_DDR2_A

DDR3_RST#

MAA_A[0..14]12,14

D D

WE_A#12,14
CAS_A#12,14
RAS_A#12,14

SBS_A012,14
SBS_A112,14
SBS_A212,14

SCS_A#012,14
SCS_A#112,14

SCKE_A012,14
SCKE_A112,14

ODT_A012,14
ODT_A112,14

C C

B B

A A

P_DDR0_A12
N_DDR0_A12
P_DDR1_A12
N_DDR1_A12
P_DDR2_A12
N_DDR2_A12

DDR3_PWROK

MAA_A0
MAA_A1
MAA_A2
MAA_A3
MAA_A4
MAA_A5
MAA_A6
MAA_A7
MAA_A8
MAA_A9
MAA_A10
MAA_A11
MAA_A12
MAA_A13
MAA_A14

?

?

3 OF 7

3 OF 7

4

DDR_A_DQS_0

DDR_A_DQSB_0

DDR_A_DQS_1

DDR_A_DQSB_1

DDR_A_DQS_2

DDR_A_DQSB_2

DDR_A_DQS_3

DDR_A_DQSB_3

DDR_A_DQS_4

DDR_A_DQSB_4

DDR_A_DQS_5

DDR_A_DQSB_5

DDR_A_DQS_6

DDR_A_DQSB_6

DDR_A_DQS_7

DDR_A_DQSB_7

DDR_A_DM_0
DDR_A_DM_1
DDR_A_DM_2
DDR_A_DM_3
DDR_A_DM_4
DDR_A_DM_5
DDR_A_DM_6
DDR_A_DM_7

DDR_A_DQ_0
DDR_A_DQ_1
DDR_A_DQ_2
DDR_A_DQ_3
DDR_A_DQ_4
DDR_A_DQ_5
DDR_A_DQ_6
DDR_A_DQ_7
DDR_A_DQ_8

DDR_A_DQ_9
DDR_A_DQ_10
DDR_A_DQ_11
DDR_A_DQ_12
DDR_A_DQ_13
DDR_A_DQ_14
DDR_A_DQ_15
DDR_A_DQ_16
DDR_A_DQ_17
DDR_A_DQ_18
DDR_A_DQ_19
DDR_A_DQ_20
DDR_A_DQ_21
DDR_A_DQ_22
DDR_A_DQ_23
DDR_A_DQ_24
DDR_A_DQ_25
DDR_A_DQ_26
DDR_A_DQ_27
DDR_A_DQ_28
DDR_A_DQ_29
DDR_A_DQ_30
DDR_A_DQ_31
DDR_A_DQ_32
DDR_A_DQ_33
DDR_A_DQ_34
DDR_A_DQ_35
DDR_A_DQ_36
DDR_A_DQ_37
DDR_A_DQ_38
DDR_A_DQ_39
DDR_A_DQ_40
DDR_A_DQ_41
DDR_A_DQ_42
DDR_A_DQ_43
DDR_A_DQ_44
DDR_A_DQ_45
DDR_A_DQ_46
DDR_A_DQ_47
DDR_A_DQ_48
DDR_A_DQ_49
DDR_A_DQ_50
DDR_A_DQ_51
DDR_A_DQ_52
DDR_A_DQ_53
DDR_A_DQ_54
DDR_A_DQ_55
DDR_A_DQ_56
DDR_A_DQ_57
DDR_A_DQ_58
DDR_A_DQ_59
DDR_A_DQ_60
DDR_A_DQ_61
DDR_A_DQ_62
DDR_A_DQ_63

BC5
BD4
BB9
BC9
BD15
BB15
AR22
AT22
AH43
AH42
AD43
AE42
Y43
Y42
T44
T43

BC3
BD9
BD14
AV22
AK42
AE45
AA45
T42

BC2
BD3
BD7
BB7
BB2
BA3
BE6
BD6
BB8
AY8
BD11
BB11
BC7
BE8
BD10
AY11
BB14
BC14
BC16
BB16
BC11
BE12
BA15
BD16
AW21
AY22

?

?

AV24
AY24
AU21
AT21
AR24
AU24
AL41
AK43
AG42
AG44
AL42
AK44
AH44
AG41
AF43
AF42
AC44
AC42
AF40
AF44
AD44
AC41
AB43
AA42
W42
W41
AB42
AB44
Y44
Y40
V42
U45
R40
P44
V44
V43
R41
R44

DQS_A0
DQS_A#0
DQS_A1
DQS_A#1
DQS_A2
DQS_A#2
DQS_A3
DQS_A#3
DQS_A4
DQS_A#4
DQS_A5
DQS_A#5
DQS_A6
DQS_A#6
DQS_A7
DQS_A#7

DQM_A0
DQM_A1
DQM_A2
DQM_A3
DQM_A4
DQM_A5
DQM_A6
DQM_A7

DATA_A0
DATA_A1
DATA_A2
DATA_A3
DATA_A4
DATA_A5
DATA_A6
DATA_A7
DATA_A8
DATA_A9
DATA_A10
DATA_A11
DATA_A12
DATA_A13
DATA_A14
DATA_A15
DATA_A16
DATA_A17
DATA_A18
DATA_A19
DATA_A20
DATA_A21
DATA_A22
DATA_A23
DATA_A24
DATA_A25
DATA_A26
DATA_A27
DATA_A28
DATA_A29
DATA_A30
DATA_A31
DATA_A32
DATA_A33
DATA_A34
DATA_A35
DATA_A36
DATA_A37
DATA_A38
DATA_A39
DATA_A40
DATA_A41
DATA_A42
DATA_A43
DATA_A44
DATA_A45
DATA_A46
DATA_A47
DATA_A48
DATA_A49
DATA_A50
DATA_A51
DATA_A52
DATA_A53
DATA_A54
DATA_A55
DATA_A56
DATA_A57
DATA_A58
DATA_A59
DATA_A60
DATA_A61
DATA_A62
DATA_A63

DQS_A0 12
DQS_A#0 12
DQS_A1 12
DQS_A#1 12
DQS_A2 12
DQS_A#2 12
DQS_A3 12
DQS_A#3 12
DQS_A4 12
DQS_A#4 12
DQS_A5 12
DQS_A#5 12
DQS_A6 12
DQS_A#6 12
DQS_A7 12
DQS_A#7 12

DQM_A[0..7]

DATA_A[0..63]

3

MAA_B[0..14]13,14

DQM_A[0..7] 12

DATA_A[0..63] 12

C214

C214

C0.1u25Y0402

C0.1u25Y0402

C209

C209

C0.1u25Y0402

C0.1u25Y0402

VCC_DDR

C278

C278
C1u16Y

C1u16Y

Intel review CHANGE

MAA_B[0..14]

WE_B#13,14
CAS_B#13,14
RAS_B#13,14

SBS_B013,14
SBS_B113,14
SBS_B213,14

SCS_B#013,14
SCS_B#113,14

SCKE_B013,14
SCKE_B113,14

ODT_B013,14
ODT_B113,14

P_DDR0_B13
N_DDR0_B13
P_DDR1_B13
N_DDR1_B13
P_DDR2_B13
N_DDR2_B13

R209 80.6R1%0402R209 80.6R1%0402
R212 80.6R1%0402R212 80.6R1%0402
R216 249R1%0402R216 249R1%0402
R215 80.6R1%0402R215 80.6R1%0402

C223

C223

C0.1u25Y0402

C0.1u25Y0402

SPD=249OHM
SPU=80.6OHM
RPD=80.6OHM
RPU=80.6OHM

WE_B#
CAS_B#
RAS_B#

SBS_B0
SBS_B1
SBS_B2

SCS_B#0
SCS_B#1

SCKE_B0
SCKE_B1

ODT_B0
ODT_B1

P_DDR0_B
N_DDR0_B
P_DDR1_B
N_DDR1_B
P_DDR2_B
N_DDR2_B

VCC_DDR

1KR1%0402

1KR1%0402

1KR1%0402

1KR1%0402

R211

R211

R210

R210

MAA_B0
MAA_B1
MAA_B2
MAA_B3
MAA_B4
MAA_B5
MAA_B6
MAA_B7
MAA_B8
MAA_B9
MAA_B10
MAA_B11
MAA_B12
MAA_B13
MAA_B14

MCH_VREF_A

SRCOMP0
SRCOMP1
SRCOMP2
SRCOMP3

BD24
BB23
BB24
BD23
BB22
BD22
BC22
BC20
BB20
BD20
BC26
BD19
BB19
BE38
BA19

BD36
BC37
BD35

BD26
BB26
BD18

BB35
BD39
BB37
BD40

BC18
AY20
BE17
BB18

BD37
BC39
BB38
BD42

AY33

AW33

AV31
AW31
AW35

AY35

AT31

AU31

AP31

AP30
AW37

AV35

BB44

AY42

BA43

BC43

BC44

AN29

AN30

AJ33

AK33

2

NB1D

NB1D

DDR_B_MA_0
DDR_B_MA_1
DDR_B_MA_2
DDR_B_MA_3
DDR_B_MA_4
DDR_B_MA_5
DDR_B_MA_6
DDR_B_MA_7
DDR_B_MA_8
DDR_B_MA_9
DDR_B_MA_10
DDR_B_MA_11
DDR_B_MA_12
DDR_B_MA_13
DDR_B_MA_14

DDR_B_WEB
DDR_B_CASB
DDR_B_RASB

DDR_B_BS_0
DDR_B_BS_1
DDR_B_BS_2

DDR_B_CSB_0
DDR_B_CSB_1
DDR_B_CSB_2
DDR_B_CSB_3

DDR_B_CKE_0
DDR_B_CKE_1
DDR_B_CKE_2
DDR_B_CKE_3

DDR_B_ODT_0
DDR_B_ODT_1
DDR_B_ODT_2
DDR_B_ODT_3

DDR_B_CK_0
DDR_B_CKB_0
DDR_B_CK_1
DDR_B_CKB_1
DDR_B_CK_2
DDR_B_CKB_2
DDR_B_CK_3
DDR_B_CKB_3
DDR_B_CK_4
DDR_B_CKB_4
DDR_B_CK_5
DDR_B_CKB_5

DDR_VREF

DDR_RPD
DDR_RPU
DDR_SPD
DDR_SPU

RSVD_01
RSVD_02
RSVD_03
RSVD_04

ELK_CRB

ELK_CRB

EAGLELAKE_DDR2

EAGLELAKE_DDR2

SYM_REV = 1.5

SYM_REV = 1.5

DDR_B

DDR_B

?

?

4 OF 7

4 OF 7

DDR_B_DQS_0

DDR_B_DQSB_0

DDR_B_DQS_1

DDR_B_DQSB_1

DDR_B_DQS_2

DDR_B_DQSB_2

DDR_B_DQS_3

DDR_B_DQSB_3

DDR_B_DQS_4

DDR_B_DQSB_4

DDR_B_DQS_5

DDR_B_DQSB_5

DDR_B_DQS_6

DDR_B_DQSB_6

DDR_B_DQS_7

DDR_B_DQSB_7

DDR_B_DM_0
DDR_B_DM_1
DDR_B_DM_2
DDR_B_DM_3
DDR_B_DM_4
DDR_B_DM_5
DDR_B_DM_6
DDR_B_DM_7

DDR_B_DQ_0
DDR_B_DQ_1
DDR_B_DQ_2
DDR_B_DQ_3
DDR_B_DQ_4
DDR_B_DQ_5
DDR_B_DQ_6
DDR_B_DQ_7
DDR_B_DQ_8

DDR_B_DQ_9
DDR_B_DQ_10
DDR_B_DQ_11
DDR_B_DQ_12
DDR_B_DQ_13
DDR_B_DQ_14
DDR_B_DQ_15
DDR_B_DQ_16
DDR_B_DQ_17
DDR_B_DQ_18
DDR_B_DQ_19
DDR_B_DQ_20
DDR_B_DQ_21
DDR_B_DQ_22
DDR_B_DQ_23
DDR_B_DQ_24
DDR_B_DQ_25
DDR_B_DQ_26
DDR_B_DQ_27
DDR_B_DQ_28
DDR_B_DQ_29
DDR_B_DQ_30
DDR_B_DQ_31
DDR_B_DQ_32
DDR_B_DQ_33
DDR_B_DQ_34
DDR_B_DQ_35
DDR_B_DQ_36
DDR_B_DQ_37
DDR_B_DQ_38
DDR_B_DQ_39
DDR_B_DQ_40
DDR_B_DQ_41
DDR_B_DQ_42
DDR_B_DQ_43
DDR_B_DQ_44
DDR_B_DQ_45
DDR_B_DQ_46
DDR_B_DQ_47
DDR_B_DQ_48
DDR_B_DQ_49
DDR_B_DQ_50
DDR_B_DQ_51
DDR_B_DQ_52
DDR_B_DQ_53
DDR_B_DQ_54
DDR_B_DQ_55
DDR_B_DQ_56
DDR_B_DQ_57
DDR_B_DQ_58
DDR_B_DQ_59
DDR_B_DQ_60
DDR_B_DQ_61
DDR_B_DQ_62
DDR_B_DQ_63

AW8
AW9
AT15
AU15
AR20
AR17
AU26
AT26
AR38
AR37
AK34
AL34
AF37
AF36
AB35
AD35

AY6
AR15
AU17
AV25
AU39
AL37
AJ35
AD37

AV7
AW4
BA9
AU11
AU7
AU8
AW7
AY9
AY13
AP15
AW15
AT16
AU13
AW13
AP16
AU16
AY17
AV17
AR21
AV20
AP17
AW16
AT20
AN20

?

?

AT25
AV26
AU29
AV29
AW25
AR25
AP26
AR29
AR36
AU38
AN35
AN37
AV39
AW39
AU40
AU41
AL35
AL36
AK36
AJ34
AN39
AN40
AK37
AL39
AJ38
AJ37
AF38
AE37
AK40
AJ40
AF34
AE35
AD40
AD38
AB40
AA39
AE36
AE39
AB37
AB38

DQS_B0
DQS_B#0
DQS_B1
DQS_B#1
DQS_B2
DQS_B#2
DQS_B3
DQS_B#3
DQS_B4
DQS_B#4
DQS_B5
DQS_B#5
DQS_B6
DQS_B#6
DQS_B7
DQS_B#7

DQM_B0
DQM_B1
DQM_B2
DQM_B3
DQM_B4
DQM_B5
DQM_B6
DQM_B7

DATA_B0
DATA_B1
DATA_B2
DATA_B3
DATA_B4
DATA_B5
DATA_B6
DATA_B7
DATA_B8
DATA_B9
DATA_B10
DATA_B11
DATA_B12
DATA_B13
DATA_B14
DATA_B15
DATA_B16
DATA_B17
DATA_B18
DATA_B19
DATA_B20
DATA_B21
DATA_B22
DATA_B23
DATA_B24
DATA_B25
DATA_B26
DATA_B27
DATA_B28
DATA_B29
DATA_B30
DATA_B31
DATA_B32
DATA_B33
DATA_B34
DATA_B35
DATA_B36
DATA_B37
DATA_B38
DATA_B39
DATA_B40
DATA_B41
DATA_B42
DATA_B43
DATA_B44
DATA_B45
DATA_B46
DATA_B47
DATA_B48
DATA_B49
DATA_B50
DATA_B51
DATA_B52
DATA_B53
DATA_B54
DATA_B55
DATA_B56
DATA_B57
DATA_B58
DATA_B59
DATA_B60
DATA_B61
DATA_B62
DATA_B63

1

DQM_B[0..7]

DATA_B[0..63]

DQS_B0 13
DQS_B#0 13
DQS_B1 13
DQS_B#1 13
DQS_B2 13
DQS_B#2 13
DQS_B3 13
DQS_B#3 13
DQS_B4 13
DQS_B#4 13
DQS_B5 13
DQS_B#5 13
DQS_B6 13
DQS_B#6 13
DQS_B7 13
DQS_B#7 13

DQM_B[0..7] 13

DATA_B[0..63] 13

MSI

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet

Date: Sheet of

5

4

3

2

Date: Sheet of

MICRO-STAR INt'L CO., LTD.

MICRO-STAR INt'L CO., LTD.

MICRO-STAR INt'L CO., LTD.

Intel Bearlake G41 Memory

Intel Bearlake G41 Memory

Intel Bearlake G41 Memory

MS-7571

MS-7571

MS-7571

1

of

938Tuesday, September 02, 2008

938Tuesday, September 02, 2008

938Tuesday, September 02, 2008

0A

0A

0A

.

21

C286

C286

C10u10Y0805

C10u10Y0805

5

21

VCCA_GPLL

C293

C293

C0.1u25Y0402

C0.1u25Y0402

21

21

21

21

21

21

21

5

VCCA_MPLL

C262

C262

C260

C260

C10u10Y0805

C10u10Y0805

C0.1u25Y0402

C0.1u25Y0402

VCCA_HPLL

C250

C250

C0.1u25Y0402

C0.1u25Y0402

VCCA_GPLLD

C309

C309

C0.1u25Y0402

C0.1u25Y0402

V_1P1_HPL

C253

C253

C0.1u25Y0402

C0.1u25Y0402

C280

C280

H_VCCPLL6

VCC3

C616 C0.1u25Y0402C616 C0.1u25Y0402
C631 C0.1u25Y0402C631 C0.1u25Y0402
C609 C0.1u25Y0402C609 C0.1u25Y0402
C620 C0.1u25Y0402C620 C0.1u25Y0402
C628 C0.1u25Y0402C628 C0.1u25Y0402
C622 C0.1u25Y0402C622 C0.1u25Y0402
C625 C0.1u25Y0402C625 C0.1u25Y0402
C619 C0.1u25Y0402C619 C0.1u25Y0402
C615 C10u10Y0805C615 C10u10Y0805
C617 C10u10Y0805C617 C10u10Y0805
C624 X_1u/6.3V/4C624 X_1u/6.3V/4
C629 X_1u/6.3V/4C629 X_1u/6.3V/4

V_1P1_CORE
V_1P5_CORE

R302 X_18RR302 X_18R

VCC_DDR

V_1P1_CORE

VCC3

C0.1u25Y0402

C0.1u25Y0402

R286 0R0402R286 0R0402
R287 X_0R0402R287 X_0R0402
R294 0R0402R294 0R0402

R308

R308
X_15R

X_15R

CP24CP24

C607

C607

add width

C0.1u25Y0402

C0.1u25Y0402

C265

C265
C1u16Y

C1u16Y

VCCA_DPLLA

C269

C269

C0.1u25Y0402

C0.1u25Y0402

VCCA_DPLLB

C263

C263

C0.1u25Y0402

C0.1u25Y0402

DAC_FILTERED

C0.01u25X0402

C0.01u25X0402

C281

C281

C0.1u25Y0402

C0.1u25Y0402

VCCA_EXP

C287

C287

C0.1u25Y0402

C0.1u25Y0402

V_1P1_COREV_FSB_VTT V_1P1_CORE V_FSB_VTT VCC_DDR VCC_DDR

I = 71.6mA

V_1P1_CORE

I = 225mA

V_1P1_CORE

D D

I = 67.9mA

V_1P1_CORE

I = 71.6mA

V_1P1_CORE

I = 71.6mA

C C

V_1P1_CORE

I = 90.6mA

V_1P1_CORE

I = 90.6mA

V_1P1_CORE

B B

I = 0.36mA

A A

L18 X_10u100mA_0805-RHL18 X_10u100mA_0805-RH
CP13CP13

C292

C292

X_C10u10Y0805

X_C10u10Y0805

L13 X_10u100mA_0805-RHL13 X_10u100mA_0805-RH
CP9CP9

C258

C258

X_C0.22U16X

X_C0.22U16X

L11 X_10u100mA_0805-RHL11 X_10u100mA_0805-RH
CP7CP7

C251

C251

C10u10Y0805

C10u10Y0805

L19 X_10u100mA_0805-RHL19 X_10u100mA_0805-RH
CP14CP14

C311

C311

C10u10Y0805

C10u10Y0805

L12 X_10u100mA_0805-RHL12 X_10u100mA_0805-RH
CP8CP8

C259

C259

C10u10Y0805

C10u10Y0805

L15 X_10u100mA_0805-RHL15 X_10u100mA_0805-RH
CP11CP11

C267

C267

X_C10u10Y0805

X_C10u10Y0805

L14 X_10u100mA_0805-RHL14 X_10u100mA_0805-RH
CP10CP10

C261

C261

C10u10Y0805

C10u10Y0805

L16 X_10u100mA_0805-RHL16 X_10u100mA_0805-RH
CP12CP12

VCC3

VCC3

R256

R256

40.2/6/1

40.2/6/1
L17 0.1U50mL17 0.1U50m

R257

R257

39.2/6/1

39.2/6/1

C218 1u/6.3V/4C218 1u/6.3V/4
C228 1u/6.3V/4C228 1u/6.3V/4
C227 1u/6.3V/4C227 1u/6.3V/4
C182 1u/6.3V/4C182 1u/6.3V/4
C233 1u/6.3V/4C233 1u/6.3V/4
C236 C10u10Y0805C236 C10u10Y0805
C174 X_C10u10Y0805C174 X_C10u10Y0805
C230 C0.1u25Y0402C230 C0.1u25Y0402
C232 C0.1u25Y0402C232 C0.1u25Y0402
C150 X_1u/6.3V/4C150 X_1u/6.3V/4
C183 C0.1u25Y0402C183 C0.1u25Y0402
C226 C0.1u25Y0402C226 C0.1u25Y0402

C277

C277

C10u10Y0805

C10u10Y0805

4

V_FSB_VTT

VCCDQ_CRT

VCCA_GPLL
VCCA_MPLL
VCCA_HPLL
VCCA_GPLLD
V_1P1_HPL

VCCA_DPLLA
VCCA_DPLLB

DAC_FILTERED

VCCA_EXP

C334

C334

C0.1u25Y0402

C0.1u25Y0402

C324

C324

C317

C317

C4.7u10Y0805

C4.7u10Y0805

C612

C612
C1u16Y

C1u16Y

C618 X_C0.1u16XC618 X_C0.1u16X
C611 X_C0.1u16XC611 X_C0.1u16X
C613 X_C10u10Y0805C613 X_C10u10Y0805
C614 X_C10u10Y0805C614 X_C10u10Y0805
C623 X_C10u10Y0805C623 X_C10u10Y0805
C627 X_C1u6.3X-RHC627 X_C1u6.3X-RH
C608 X_C1u6.3X-RHC608 X_C1u6.3X-RH

Bottom side

4

AK32
AL31
AL32
AM31
AM30

A25
B25

B26
C24
C26
D22
D23
D24

E23

F21

F22
G21
G22
H21
H22

J21

J22

K21

K22

L21

L22
M21
M22
N20
N21
N22

P20

P21

P22

P24
R20
R21

R23
R24
R22

B20

B16

A21

B22

B12
U33

D20
C20

D19

B19

E19

A17

AG2
AR2

B17

V_1P1_CORE

EAGLELAKE_DDR2

EAGLELAKE_DDR2

NB1F

NB1F

VTT_FSB_01
VTT_FSB_02
VTT_FSB_03
VTT_FSB_04
VTT_FSB_05
VTT_FSB_06
VTT_FSB_07
VTT_FSB_08
VTT_FSB_09
VTT_FSB_10
VTT_FSB_11
VTT_FSB_12
VTT_FSB_13
VTT_FSB_14
VTT_FSB_15
VTT_FSB_16
VTT_FSB_17
VTT_FSB_18
VTT_FSB_19
VTT_FSB_20
VTT_FSB_21
VTT_FSB_22
VTT_FSB_23
VTT_FSB_24
VTT_FSB_25
VTT_FSB_26
VTT_FSB_27
VTT_FSB_28
VTT_FSB_29
VTT_FSB_30
VTT_FSB_31
VTT_FSB_32

VTT_FSB_34
VTT_FSB_35
VTT_FSB_36

VCCDQ_CRT

VCCAPLL_EXP
VCCA_MPLL
VCCA_HPLL
VCCDPLL_EXP
VCCD_HPLL

VCCA_DPLLA
VCCA_DPLLB

VCCA_DAC_01
VCCA_DAC_02

VCC3_3_1
VCC_EXP

VCCAVRM_EXP
VCC_HDA

VSS_369

VCC_SMCLK_04
VCC_SMCLK_03
VCC_SMCLK_02
VCC_SMCLK_01
VCCCML_DDR

ELK_CRB

ELK_CRB

V_1P1_CORE

?

?

AA27

AA29

AA25

AA21

AA23

AA19

SYM_REV = 1.5

SYM_REV = 1.5

VCC_05

VCC_04

VCC_02

VCC_03

VCC_01

6 OF 7

6 OF 7

VCC_CL_02

VCC_CL_01

AJ15

AK14

AM29

C626 X_C0.1u16XC626 X_C0.1u16X
C630 X_C10u10Y0805C630 X_C10u10Y0805
C621 X_C1u6.3X-RHC621 X_C1u6.3X-RH

Bottom side

AB20

AA30

VCC_08

VCC_07

VCC_06

VCC_CL_05

VCC_CL_04

VCC_CL_03

AM25

AM26

AB24

AB22

VCC_10

VCC_09

VCC_CL_07

VCC_CL_06

AM22

AM24

AB30

AB29

AB26

VCC_12

VCC_11

VCC_CL_09

VCC_CL_08

AM17

AM20

AM21

AC17

AC16

VCC_15

VCC_13

VCC_14

VCC_CL_12

VCC_CL_11

VCC_CL_10

AM15

AM16

AC21

AC23

AC19

VCC_17

VCC_16

?

?

VCC_CL_14

VCC_CL_13

AJ32

AL30

AK31

AC27

AC25

VCC_20

VCC_18

VCC_19

VCC_CL_17

VCC_CL_16

VCC_CL_15

AF32

AE33

AD16

AC29

VCC_22

VCC_21

VCC_CL_19

VCC_CL_18

AE32

AD33

3

AG20

AG17

AG16

AF29

AF26

AF27

AF25

AF24

AF23

AF20

AF21

AF22

AF19

AF17

AE27

AE29

AF16

AE25

AE23

AE21

AE17

AE19

AE16

AD29

AD26

AD22

AD24

AD17

AD20

VCC_50

VCC_49

VCC_48

VCC_46

VCC_47

VCC_45

VCC_44

VCC_43

VCC_40

VCC_41

VCC_42

VCC_39

VCC_38

VCC_35

VCC_36

VCC_37

VCC_34

VCC_33

VCC_32

VCC_30

VCC_31

VCC_29

VCC_28

VCC_27

VCC_25

VCC_26

VCC_23

VCC_24

POWER

POWER

VCC_CL_24

VCC_CL_23

VCC_CL_22

VCC_CL_21

VCC_CL_20

AD32

VCC_CL_28

VCC_CL_27

VCC_CL_26

VCC_CL_25

VCC_CL_31

VCC_CL_30

VCC_CL_29

Y32

Y33

AP1

AP2

AM2

AM3

AM4

AA32

AA33

AB32

AB33

AL29

C249 X_C0.1u25Y0402C249 X_C0.1u25Y0402
C229 X_C0.1u25Y0402C229 X_C0.1u25Y0402
C237 X_C0.1u25Y0402C237 X_C0.1u25Y0402
C235 X_C10u10Y0805C235 X_C10u10Y0805 C606 X_C10u10Y0805C606 X_C10u10Y0805
C221 X_1u/6.3V/4C221 X_1u/6.3V/4

3

VCC_CL_34

VCC_CL_33

VCC_CL_32

AL26

AL27

VCC_CL_36

VCC_CL_35

AL23

AL24

AL25

VCC_CL_39

VCC_CL_38

VCC_CL_37

AL21

AL22

AL20

VCC_CL_42

VCC_CL_41

VCC_CL_40

AL17

AL19

VCC_CL_44

VCC_CL_43

AL14

AL15

AL16

VCC_CL_47

VCC_CL_46

VCC_CL_45

AL11

AL12

AL10

AG24

AG22

VCC_53

VCC_51

VCC_52

VCC_CL_48

VCC_CL_50

VCC_CL_49

AL8

AL9

AG26

VCC_54

VCC_CL_51

AL7

AJ21

AJ19

AJ17

AJ16

AG29

AJ25

AJ23

VCC_59

VCC_58

VCC_57

VCC_56

VCC_55

VCC_60

VCC_CL_57

VCC_CL_56

VCC_CL_55

VCC_CL_54

VCC_CL_53

VCC_CL_52

AL1

AL2

AL4

AL5

AL6

AK29

AK30

C610 X_C0.1u25Y0402C610 X_C0.1u25Y0402

Bottom side

R27

R26

R25

VCC_63

VCC_62

VCC_61

VCC_CL_60

VCC_CL_59

VCC_CL_58

AK25

AK26

AK27

T21

R29

VCC_66

VCC_65

VCC_64

VCC_CL_63

VCC_CL_62

VCC_CL_61

AK23

AK24

T24

VCC_CL_65

VCC_CL_64

AK20

AK21

AK22

2

T26

T25

VCC_71

VCC_70

VCC_69

VCC_CL_68

VCC_CL_67

VCC_CL_66

AK17

AK19

2

U21

T29

T27

VCC_73

VCC_72

VCC_CL_70

VCC_CL_69

AJ30

AJ31

AK16

U23

U22

VCC_76

VCC_75

VCC_74

VCC_CL_73

VCC_CL_72

VCC_CL_71

AG30

AG31

U26

U25

U24

VCC_78

VCC_77

VCC_CL_75

VCC_CL_74

AF31

AE31

AD31

BSEL

2

0
0

U29

U27

VCC_81

VCC_80

VCC_79

VCC_CL_78

VCC_CL_77

VCC_CL_76

AB31

AC31

0

1

0

0

1

W25

W23

W21

W19

VCC_85

VCC_84

VCC_83

VCC_82

VCC_CL_80

VCC_CL_79

VCC_CL_82

VCC_CL_81

Y31

AJ27

AJ29

AA31

PSB FREQUENCY
200 MHZ (800)1
133 MHZ (533)

Y20

W27

W29

VCC_86

VCC_87

VCC_CL_84

VCC_CL_83

Y29

Y30

W31

TABLE

Y22

Y24

VCC_89

VCC_90

VCC_88

VCC_CL_85

1

Y26

T22

T23

VCC_91

VCC_96

VCC_97

AC4

VCC_98

AF3

VCC_99

F9

VCC_100

H4

VCC_101

L3

VCC_102

P3

VCC_103

V4

VCC_104

AJ1

VCC_EXP_1

AJ2

VCC_EXP_2

AK2

VCC_EXP_3

AK3

VCC_EXP_4

AK4

VCC_EXP_5

AK13

VCC_EXP_06

AK12

VCC_EXP_07

AK11

VCC_EXP_08

AK10

VCC_EXP_09

AK9

VCC_EXP_10

AK8

VCC_EXP_11

AK7

VCC_EXP_12

AK6

VCC_EXP_13

AJ14

VCC_EXP_14

AJ13

VCC_EXP_15

AJ12

VCC_EXP_16

AJ11

VCC_EXP_17

AJ10

VCC_EXP_18

AJ9

VCC_EXP_19

AJ8

VCC_EXP_20

AJ7

VCC_EXP_21

AJ6

VCC_EXP_22

AG15

VCC_EXP_23

AF15

VCC_EXP_24

AF14

VCC_EXP_25

AE15

VCC_EXP_26

AE14

VCC_EXP_27

AD15

VCC_EXP_28

AD14

VCC_EXP_29

AC15

VCC_EXP_30

AB14

VCC_EXP_31

AA15

VCC_EXP_32

AA14

VCC_EXP_33

Y15

VCC_EXP_34

Y14

VCC_EXP_35

W15

VCC_EXP_36

U15

VCC_EXP_37

U14

VCC_EXP_38

AP44

VCC_SM_01

AT45

VCC_SM_02

AV44

VCC_SM_03

AY40

VCC_SM_04

BA41

VCC_SM_05

BB39

VCC_SM_06

BD21

VCC_SM_07

BD25

VCC_SM_08

BD29

VCC_SM_09

BD34

VCC_SM_10

BD38

VCC_SM_11

BE23

VCC_SM_12

BE27

VCC_SM_13

BE31

VCC_SM_14

BE36

VCC_SM_15

VCCA_HPLL ---- >50mA ; Min Vout -- 1.121V
VCCA_MPLL ---- >130mA ; Min Vout -- 1.128V
VCCA_DPLLA --- >80mA ; Min Vout -- 1.132V
VCCA_DPLLB --- >80mA ; Min Vout -- 1.131V
VCCA_DAC ----- 70mA ; Min Vout -- 3.14V
VCCD_CRT ----- 20mA ; Min Vout -- 1.425V
VCCDQ_CRT ---- 0.5mA ; Min Vout -- 1.425V
VCCA_EXPPLL -- 50mA ; Min Vout -- 1.129V
VCC_SMCLK ---- 250mA

MICRO-STAR INt'L CO., LTD.

MICRO-STAR INt'L CO., LTD.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet

Date: Sheet of

Date: Sheet of

MICRO-STAR INt'L CO., LTD.

Intel Bearlake G41 POWER

Intel Bearlake G41 POWER

Intel Bearlake G41 POWER

V_1P1_CORE

VCC_DDR

PCIE Stitch CAP

V_1P1_CORE

MS-7571

MS-7571

MS-7571

1

C314 C0.1u25Y0402C314 C0.1u25Y0402
C320 C0.1u25Y0402C320 C0.1u25Y0402
C391 C0.1u25Y0402C391 C0.1u25Y0402
C369 C0.1u25Y0402C369 C0.1u25Y0402
C336 C0.1u25Y0402C336 C0.1u25Y0402
C367 C0.1u25Y0402C367 C0.1u25Y0402
C372 C0.1u25Y0402C372 C0.1u25Y0402
C364 C0.1u25Y0402C364 C0.1u25Y0402
C333 C0.1u25Y0402C333 C0.1u25Y0402
C321 C0.1u25Y0402C321 C0.1u25Y0402

0A

0A

0A

of

10 38Tuesday, September 02, 2008

10 38Tuesday, September 02, 2008

10 38Tuesday, September 02, 2008

.

5

EAGLELAKE_DDR2

EAGLELAKE_DDR2

?

SYM_REV = 1.5

SYM_REV = 1.5

NB1G

NB1G

A12

VSS_001

A15

VSS_002

A19

VSS_003

AA11
AA12
AA13
AA16
AA17
AA20
AA22
AA24
AA26
AA34
AA38
AA40
AA44

AB11
AB12
AB16
AB17
AB19
AB21
AB23
AB25
AB27
AB34
AB36
AB39

AC20
AC22
AC24
AC26
AC45

AD12
AD19
AD21
AD23
AD25
AD27

AD34
AD36
AD39

AE11
AE12
AE13
AE20
AE22
AE24
AE26
AE34
AE38
AE40
AE44

AF10
AF11
AF12
AF13
AF33
AF35
AF39

AG19
AG21
AG23
AG25
AG27
AG45

AJ20
AJ22
AJ24
AJ26

A27

VSS_004

A31

VSS_005

A36

VSS_006

A40

VSS_007

A8

VSS_008

AA1

VSS_009
VSS_010
VSS_011
VSS_012
VSS_013
VSS_014
VSS_015
VSS_016
VSS_017
VSS_018
VSS_019
VSS_020
VSS_021
VSS_022

AA8

VSS_023
VSS_024
VSS_025
VSS_026
VSS_027
VSS_028
VSS_029
VSS_030
VSS_031
VSS_032
VSS_033
VSS_034
VSS_035

AB4

VSS_036

AB6

VSS_037

AB7

VSS_038

AB8

VSS_039
VSS_040
VSS_041
VSS_042
VSS_043
VSS_044

AC5

VSS_045
VSS_046
VSS_047
VSS_048
VSS_049
VSS_050
VSS_051

AD3

VSS_052
VSS_053
VSS_054
VSS_055

AD6

VSS_056

AD9

VSS_057

AE1

VSS_058
VSS_059
VSS_060
VSS_061
VSS_062
VSS_063
VSS_064
VSS_065
VSS_066
VSS_067
VSS_068
VSS_069

AE8

VSS_070
VSS_071
VSS_072
VSS_073
VSS_074
VSS_075
VSS_076
VSS_077

AF6

VSS_078

AF7

VSS_079
VSS_080
VSS_081
VSS_082
VSS_083
VSS_084
VSS_085

AG5

VSS_086

AH2

VSS_087

AH3

VSS_088

AH4

VSS_089
VSS_090
VSS_091
VSS_092
VSS_093

ELK_CRB

ELK_CRB

5

D D

C C

B B

A A

BD43

C16

VSS_371

VSS_372

7OF 7

7OF 7

VSS_094

VSS_095

AJ36

AJ39

AJ44

A3

VSS_368

VSS_096

VSS_097

VSS_098

AJ45

AK35

?

A43

B44

VSS_366

VSS_367A6VSS_365

VSS_364C1VSS_363

VSS_099

VSS_100

VSS_101

VSS_102

AL38

AL44

AK38

AK39

C45

F1

VSS_362

VSS_103

VSS_104

AL45

AN21

BC1

BC45

VSS_361

VSS_360

VSS_105

VSS_106

AN22

AN24

BD2

BD44

VSS_359

VSS_358

VSS_107

VSS_108

AN25

AN26

BE3

BE43

VSS_357

VSS_356

VSS_109

VSS_110

AN33

AN36

Y39

Y9

VSS_354

VSS_355

VSS_111

VSS_112

AN7

AN38

Y3

Y35

VSS_353

VSS_113

AP20

AP21

Y25

Y27

VSS_350

VSS_351

VSS_352

VSS_114

VSS_115

VSS_116

AP22

AP24

Y21

Y23

VSS_348

VSS_349

VSS_117

VSS_118

AP25

AP29

Y19

Y2

VSS_346

VSS_347

VSS_119

VSS_120

AP45

AR10

Y16

Y17

VSS_344

VSS_345

VSS_121

VSS_122

AR11

AR13

Y12

Y13

VSS_342

VSS_343

VSS_123

VSS_124

AR16

AR26

4

Y10

Y11

VSS_340

VSS_341

VSS_125

VSS_126

AR3

AR31

4

W45

W5

VSS_338

VSS_339

VSS_127

VSS_128

AR33

AR35

W44

VSS_337

VSS_129

AR39

W2

W20

W22

W24

W26

W17

VSS_332

VSS_333

VSS_334

VSS_335

VSS_336

VSS_331

GND

GND

VSS_130

VSS_131

VSS_132

VSS_133

VSS_134

VSS_135

AT1

AR8

AR9

AT11

AT13

AT17

W16

W1

VSS_330

VSS_329

VSS_137

VSS_136

AT2

AT24

U8

U44

VSS_328

VSS_327

VSS_139

VSS_138

AT35

AT29

U39

U36

VSS_326

VSS_325

VSS_141

VSS_140

AU22

AU20

U20

U19

VSS_324

VSS_323

VSS_143

VSS_142

AU30

AU25

U17

U16

VSS_322

VSS_144

AU5

AU35

U13

U12

VSS_321

VSS_320

VSS_319

VSS_147

VSS_146

VSS_145

AU9

AU6

U1

U11

VSS_317

VSS_318

VSS_149

VSS_148

AV13

AV11

T8

T9

VSS_315

VSS_316

VSS_151

VSS_150

AV16

AV15

T6

T7

VSS_313

VSS_314

VSS_153

VSS_152

AV2

AV21

T4

T40

VSS_311

VSS_312

VSS_155

VSS_154

AV33

AV30

T35

T38

VSS_309

VSS_310

VSS_157

VSS_156

AV6

AV38

T32

T33

VSS_308

VSS_158

AV9

AV8

3

T30

T31

VSS_306

VSS_307

VSS_160

VSS_159

AW17

AW11

3

T20

T3

VSS_303

VSS_304

VSS_305

VSS_163

VSS_162

VSS_161

AW22

AW20

T17

T19

VSS_301

VSS_302

VSS_165

VSS_164

AW26

AW24

T13

T16

VSS_300

VSS_166

AW3

AW30

T11

T12

VSS_297

VSS_298

VSS_299

VSS_169

VSS_168

VSS_167

AY1

AY15

R8

T10

VSS_295

VSS_296

VSS_171

VSS_170

AY21

AY16

R45

R5

VSS_293

VSS_294

VSS_173

VSS_172

AY30

AY25

R30

R38

VSS_291

VSS_292

VSS_175

VSS_174

B10

AY45

R19

R2

VSS_289

VSS_290

VSS_177

VSS_176

B27

B21

R16

R17

VSS_287

VSS_288

VSS_179

VSS_178

B34

B29

R11

R12

VSS_285

VSS_286

VSS_181

VSS_180

BA5

BA23

P26

P31

VSS_284

VSS_182

BB21

BB25

P17

P25

VSS_282

VSS_283

VSS_183

VSS_184

BB6

BB28

P16

VSS_280

VSS_281

VSS_279
VSS_278
VSS_277
VSS_276
VSS_275
VSS_274
VSS_273
VSS_272
VSS_271
VSS_270
VSS_269
VSS_268
VSS_267
VSS_266
VSS_265
VSS_264
VSS_263
VSS_262
VSS_261
VSS_260
VSS_259
VSS_258
VSS_257
VSS_256
VSS_255
VSS_254
VSS_253
VSS_252
VSS_251
VSS_250
VSS_249
VSS_248
VSS_247
VSS_246
VSS_245
VSS_244
VSS_243
VSS_242
VSS_241
VSS_240
VSS_239
VSS_238
VSS_237
VSS_236
VSS_235
VSS_234
VSS_233
VSS_232
VSS_231
VSS_230
VSS_229
VSS_228
VSS_227
VSS_226
VSS_225
VSS_224
VSS_223
VSS_222
VSS_221
VSS_220
VSS_219
VSS_218
VSS_217
VSS_216
VSS_215
VSS_214
VSS_213
VSS_212
VSS_211
VSS_210
VSS_209
VSS_208
VSS_207
VSS_206
VSS_205
VSS_204
VSS_203
VSS_202
VSS_201
VSS_200
VSS_199

VSS_197
VSS_196
VSS_195
VSS_194
VSS_193
VSS_192
VSS_191
VSS_190
VSS_189

VSS_187
VSS_186

VSS_185

2

N8
N38
N36
N33
N30
N29
N26
N16
N13
N11
M44
M25
M24
M1
L9
L8
L4
L39
L35
L30
L26
L20
L16
L10
K45
K33
K29
K24
K20
K17
K13
K11
J9
J8
J5
J4
J37
J3
H9
H8
H7
H44
H38
H33
H31
H30
H25
H20
H16
H15
H13
H11
H1
G35
G3
G29
G26
G24
G17
G11
F8
F45
F42
F4
F30
F2
F16
E5
E41
E31
E3
D7
D6
D39
D26
D25
D21
D16
D11
C5
C3

BE40
BE34
BE29
BE25
BE21
BE19
BE15
BE10
BD8

BD17
BD12

AD30

VSS

AC30

VSS

AF30

VSS

AE30

VSS

MICRO-STAR INt'L CO., LTD.

MICRO-STAR INt'L CO., LTD.

MICRO-STAR INt'L CO., LTD.

MSI

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Date: Sheet of

2

Date: Sheet

Intel Bearlake G41 GND

Intel Bearlake G41 GND

Intel Bearlake G41 GND

MS-7571

MS-7571

MS-7571

1

0A

0A

0A

of

11 38Tuesday, September 02, 2008

11 38Tuesday, September 02, 2008

11 38Tuesday, September 02, 2008

1

.

8

7

6

5

4

3

2

1

172

187

VDDQ5

VSS

166

169

184

VDDQ6

VDDQ7

VSS

VSS

198

5

178

201

VSS

189

67

VDDQ8

VSS

204

207

VCC3VCC_DDR

VDDQ9

VSS

VSS

210

238

VDDSPD

VSS

VSS

213

216

CB042CB143CB248CB349CB4

DM1/DQS10
NC/DQS10#
DM2/DQS11
NC/DQS11#
DM3/DQS12
NC/DQS12#
DM4/DQS13
NC/DQS13#
DM5/DQS14
NC/DQS14#
DM6/DQS15
NC/DQS15#
DM7/DQS16
NC/DQS16#
DM8/DQS17
NC/DQS17#

CK1#(CK0#)

VSS

VSS

VSS

VSS

219

222

225

228

161

162

167

168

CB5

CB6

CB7

7

DQS0

6

DQS0#

16

DQS1

15

DQS1#

28

DQS2

27

DQS2#

37

DQS3

36

DQS3#

84

DQS4

83

DQS4#

93

DQS5

92

DQS5#

105

DQS6

104

DQS6#

114

DQS7

113

DQS7#

46

DQS8

45

DQS8#

X3

X3

188

A0

183

A1

63

A2

182

A3

61

A4

60

A5

180

A6

58

A7

179

A8

177

A9

70

A10_AP

57

A11

176

A12

196

A13

174

A14

173

A15

54

A16/BA2

190

BA1

71

BA0

73

WE#

74

CAS#

192

RAS#

125

DM0/DQS9

126

NC/DQS9#

134
135
146
147
155
156
202
203
211
212
223
224
232
233
164
165

195

ODT0

77

ODT1

52

CKE0

171

CKE1

193

CS0#

76

CS1#

185

CK0(DU)

186

CK0#(DU)

137

CK1(CK0)

138
220

CK2(DU)

221

CK2#(DU)

120

SCL

119

SDA

X1

X1

1

VREF

X2

X2

239

SA0

240

SA1

101

SA2

VSS

VSS

VSS

DDRII-240_GREEN-RH

DDRII-240_GREEN-RH

231

234

237

ADDRESS A0

ADDRESS: 000
0XA0

DQS_A0
DQS_A#0
DQS_A1
DQS_A#1
DQS_A2
DQS_A#2
DQS_A3
DQS_A#3
DQS_A4
DQS_A#4
DQS_A5
DQS_A#5
DQS_A6
DQS_A#6
DQS_A7
DQS_A#7

MAA_A0
MAA_A1
MAA_A2
MAA_A3
MAA_A4
MAA_A5
MAA_A6
MAA_A7
MAA_A8
MAA_A9
MAA_A10
MAA_A11
MAA_A12
MAA_A13
MAA_A14

SBS_A1
SBS_A0

WE_A#
CAS_A#
RAS_A#

DQM_A0
DQM_A1
DQM_A2
DQM_A3
DQM_A4
DQM_A5
DQM_A6
DQM_A7

ODT_A0
ODT_A1

SCKE_A0
SCKE_A1

SCS_A#0
SCS_A#1

P_DDR0_A
N_DDR0_A
P_DDR1_A
N_DDR1_A
P_DDR2_A
N_DDR2_A

SMBCLK_ISO
SMBDATA_ISO

4

DQS_A0 9
DQS_A#0 9
DQS_A1 9
DQS_A#1 9
DQS_A2 9
DQS_A#2 9
DQS_A3 9
DQS_A#3 9
DQS_A4 9
DQS_A#4 9
DQS_A5 9
DQS_A#5 9
DQS_A6 9
DQS_A#6 9
DQS_A7 9
DQS_A#7 9

MAA_A[0..14] 9,14

SBS_A2 9,14
SBS_A1 9,14
SBS_A0 9,14

WE_A# 9,14
CAS_A# 9,14
RAS_A# 9,14

DQM_A[0..7] 9

ODT_A0 9,14
ODT_A1 9,14

SCKE_A0 9,14
SCKE_A1 9,14

SCS_A#0 9,14
SCS_A#1 9,14

P_DDR0_A 9
N_DDR0_A 9
P_DDR1_A 9
N_DDR1_A 9
P_DDR2_A 9
N_DDR2_A 9

C325

C325

C0.1u16Y0402

C0.1u16Y0402

PLACE CLOSE TO DIMM PIN

SMBCLK_ISO
SMBDATA_ISO

VCC_DDR

R279

R279

1KR1%0402

1KR1%0402

R291

R291

1KR1%0402

1KR1%0402

C64 C0.1u16Y0402C64 C0.1u16Y0402

C318

C318

X_C0.1u16Y0402

X_C0.1u16Y0402

VCC3

0.5VCC_DDR=0.9V(at VCC_DDR=1.8)

DIMM_MEM_REF 6,13

MSI

MSI

MSI

3

SMBCLK_ISO 6,16,18,20,22,23,28
SMBDATA_ISO 6,16,18,20,22,23,28

MICRO-STAR INT'L CO.,LTD

MICRO-STAR INT'L CO.,LTD

MICRO-STAR INT'L CO.,LTD

MS-7571

MS-7571

Size Document Description Rev

Size Document Description Rev

Size Document Description Rev

Custom

Custom

Custom

DDR II DIMM A

DDR II DIMM A

DDR II DIMM A

Date:

Thursday, September 04, 2008

Date:

Thursday, September 04, 2008

Date:

Thursday, September 04, 2008

2

MS-7571

Sheet of

Sheet of

Sheet of

12 38

12 38

12 38

1

0A

0A

0A

DDRII DIMM_A1_Channel A

191

194

181

175

68

NC

VDD051VDD156VDD262VDD372VDD478VDD5

VSS

VSS

VSS

VSS

VSS

112

115

118

121

124

75

170

197

VDD6

VDD7

VDD8

VDD3

VSS

VSS

127

130

VDDQ0

VDDQ153VDDQ259VDDQ364VDDQ4

VDDQ469VDDQ7

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

133

136

139

142

145

148

151

154

157

160

163

55

102

DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQ8
DQ9
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
DQ16
DQ17
DQ18
DQ19
DQ20
DQ21
DQ22
DQ23
DQ24
DQ25
DQ26
DQ27
DQ28
DQ29
DQ30
DQ31
DQ32
DQ33
DQ34
DQ35
DQ36
DQ37
DQ38
DQ39
DQ40
DQ41
DQ42
DQ43
DQ44
DQ45
DQ46
DQ47
DQ48
DQ49
DQ50
DQ51
DQ52
DQ53
DQ54
DQ55
DQ56
DQ57
DQ58
DQ59
DQ60
DQ61
DQ62
DQ63

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

19

RC118RC0

NC#19

NC/TEST

VSS

VSS

VSS

VSS

100

103

106

109

6

DIMM1

122
123
128
129

131
132
140
141

143
144
149
150

152
153
158
159

199
200
205
206

208
209
214
215

107
108
217
218
226
227
110
111
116
117
229
230
235
236

DIMM1

3
4
9

10

12
13
21
22

24
25
30
31

33
34
39
40

80
81
86
87

89
90
95
96

98
99

2
5

8
11
14
17
20
23
26
29
32
35
38
41
44
47
50
65
66
79
82
85
88
91
94
97

DATA_A[0..63]9

D D

C C

B B

A A

8

DATA_A0
DATA_A1
DATA_A2
DATA_A3
DATA_A4
DATA_A5
DATA_A6
DATA_A7
DATA_A8
DATA_A9
DATA_A10
DATA_A11
DATA_A12
DATA_A13
DATA_A14
DATA_A15
DATA_A16
DATA_A17
DATA_A18
DATA_A19
DATA_A20
DATA_A21
DATA_A22
DATA_A23
DATA_A24
DATA_A25
DATA_A26
DATA_A27
DATA_A28
DATA_A29
DATA_A30
DATA_A31
DATA_A32
DATA_A33
DATA_A34
DATA_A35
DATA_A36
DATA_A37 SBS_A2
DATA_A38
DATA_A39
DATA_A40
DATA_A41
DATA_A42
DATA_A43
DATA_A44
DATA_A45
DATA_A46
DATA_A47
DATA_A48
DATA_A49
DATA_A50
DATA_A51
DATA_A52
DATA_A53
DATA_A54
DATA_A55
DATA_A56
DATA_A57
DATA_A58
DATA_A59
DATA_A60
DATA_A61
DATA_A62
DATA_A63

7