MSI MS-7552 Schematics
5
4
3
2
1
MSI
D D
MS-7552 Ver:0A
CPU:
AMD M2 Athlon 64/Athlon 64 FX AM2R2
Title Page
Cover Sheet 1
GPIO Configuration
2Block Diagram
3
Clock Distribution 4
System Chipset:
AMD/ATI RS780
AMD/ATI SB700
On Board Chipset:
FINTEK Super I/O -- F71882
LAN -- RTL8111C
HD Codec -- ALC888
1394 -- JMCRO381
C C
BIOS -- SPI ROM 8M
Main Memory:
DDR II X 4 (Max 8GB)
Expansion Slots:
PCI-E X 16 *1
PCI-E X 1 *1
PCI 2.2 Slot X 2
Clock Generator:
Controller--ICS9LPRS477CKL
B B
PWM:
ISL6323+UPI6262
Power Deliver Chart
ISL6323 3+1 Phase
Clock-Gen ICS9LPRS477
AMD AMr2 940
FIRST LOGICAL DDR DIMM
SECOND LOGICAL DDR DIMM
DDR Terminatior
AMD/ATI RS780
AMD/ATI SB700
PCI EXPRESS X16 & X 1 SLOT
PCI Slot 1,2
USB connectors
VGA CONN
HDMI / DVI CONNECTOR
LAN - Realtek 8111C
Azalia Codec-ALC888
LPC-F71882 / FDD / COM
IDE Conn / FAN
1394/JMCRO381
ACPI by UPI
ATX/Front Panel/KB/EMI
VCC_DDR & VCC1_1 NB
BOM - Option Parts
POWER OK MAP
RESET MAP
History
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14, 15,16,17,18
19, 20,21,22,23
24
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32
33
34
35
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A A
Micro Star Restricted Secret
Micro Star Restricted Secret
Micro Star Restricted Secret
Title
Title
Title
Document Number
Document Number
Document Number
MICRO-STAR INT'L CO.,LTD.
MICRO-STAR INT'L CO.,LTD.
MICRO-STAR INT'L CO.,LTD.
No. 69, Li-De St, Jung-He City,
No. 69, Li-De St, Jung-He City,
No. 69, Li-De St, Jung-He City,
Taipei Hsien, Taiwan
Taipei Hsien, Taiwan
Taipei Hsien, Taiwan
http://www.msi.com.tw
http://www.msi.com.tw
5
4
3
2
http://www.msi.com.tw
Cover Sheet
Cover Sheet
Cover Sheet
1
MS-7552
MS-7552
MS-7552
Last Revision Date:
Last Revision Date:
Last Revision Date:
Wednesday, June 18, 2008
Wednesday, June 18, 2008
Wednesday, June 18, 2008
Sheet
Sheet
Sheet
Rev
Rev
Rev
0A
0A
0A
of
of
of
139
139
139
5
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2
1
Project RS-780 BLOCK DIAGRAM
DDRII 400,533,667,800
D D
AMD
AM2/AM2g2
AM2 SOCKET
8,9,10
OUT
DVI CON
HDMI CON
D-SUB
PCIE GFX x16
C C
4X1 PCIE INTERFACE
TMDS
28
RGB
27
PCIE x16
24
ATI NB - RS780
HyperTransport LINK0 CPU I/F
1 16X PCIE VIDEO I/F
1 4X PCIE I/F WITH SB
2 1X PCIE I/F
16x16 2.6GHZ(HT3)HyperTransport LINK
IN
128bit
DDRII 400,533,667,800
128bit
UNBUFFERED
DDRII DIMM1
UNBUFFERED
DDRII DIMM2
DDRII FIRST LOGICAL DIMM DDRII SECOND LOGICAL DIMM
11
11
UNBUFFERED
DDRII DIMM3
UNBUFFERED
DDRII DIMM4
12
12
14,15,16,17,18
Realtek
8111C(B)/8101E
PCIE x1 SLOT1
2429
A-LINK
4X PCIE
USB-4USB-5
LANLAN 1394 1394
26
26 26 26 26 26
USB-1USB-2USB-3
USB-0
FrontFrontREARREARREARREAR
USB 2.0
ATI SB
AZALIA
HD AUDIO HDR
AZALIA CODEC
SB700/SB750
USB-11
REAR
B B
USB-10
REAR
LANLAN
26
26
USB-7USB-8USB-9
Front FrontFrontFront
USB-6
26262626
SATA2 (4 PORTS)
AC97 2.3
HD AUDIO 1.0
SERIAL ATA 2.0
SATA#0 SATA#1
20
USB2.0 (12)
30
30
SATA#2 SATA#3
20 20 20
SATA#2 SATA#3
20 20
ACPI 1.1
PCI BUS
SPI I/F
PCI/PCI BRIDGE
SPI Bus
SPI ROM 8M
20
ACPI CONTROLLER
uPI
CPU CORE POWER
NB CORE POWER
ISL6323CR
6
PCI SLOT 1
25
PCI SLOT 2
25
PCI SLOT 3
25
34
19,20,21,22,23
LPC BUS
CPU VLDT Power
RS780 CORE POWER
PCIE & SB POWER
DUAL POWER
A A
DDR2 DRAM POWER
34
ITE SIO
Fintek 71882
31
TPM Pin Header
31
33
ATX CON
35
FLOPPY
31
5
4
KBD
MOUSE
31
SERIAL
PORT
31
3
2
Title
Title
Title
BLOCK Diagram
BLOCK Diagram
BLOCK Diagram
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet
Date: Sheet
MICRO-START INT'L CO.,LTD.
MICRO-START INT'L CO.,LTD.
MICRO-START INT'L CO.,LTD.
MS-7552 0A
MS-7552 0A
MS-7552 0A
1
239Wednesday, June 18, 2008
239Wednesday, June 18, 2008
239Wednesday, June 18, 2008
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5
SB700/750 GPIO Config
GPIO Name Type Function description Pin Page
PCICLK5/GPIO41
INTE#/GPIO33 PCI_INTA#
INTF#/GPIO33
INTG#/GPIO33
INTH#/GPIO33
D D
LDRQ1#/GNT5#/GPIO68
BMREQ#/REQ5#/GPIO68
RI#/EXTEVNT0#
SLP_S2/GPM9#
KBRST#/GEVENT1#
LPC_PME#/GEVENT3#
LPC_SMI#/EXTEVNT1#
S3_STATE/GEVENT5#
SYS_RESET#/GPM7#
WAKE#/GEVENT8#
BLINK/GPM6# Unused
SATA_ISO#/GPIO10 SB_GPIO10
SMARTVOLT/SATA_IS2/GPIO4 SB_GPIO4
CLK_REQ1#/SATA_IS4#/GPIO3 SB_GPIO39
CLK_REQ2#/SATA_IS5#/GPIO40
SPKR/GPIO2
SDA0/GPOC1# SDATA
C C
SCL1/GPOC2# SCLK1
SDA1/GPOC3# SDATA1
DDC1_SCL/GPIO9
DDC1_SDA/GPIO8 SPI_WP#
LLB3/GPIO66 LC_SENSE
SHUTDOWN#/GPIO5 SB_GPIO5
DDR3_RST#/GEVENT7#
SB_OC6#/IR_TX1/GEVENT6#
USB_OC4#IO_RX0/GPM4# OC4#
USB_OC2#/GPM2#
USB_OC1#/GPM1#
USB_OC0#/GPM0#
AZ_SDIN0/GPIO42
AZ_SDIN1/GPIO43
AZ_SDIN2/GPIO44
AZ_SDIN3/GPIO46
3.3V PCI_CLK5
PREQ#3REQ3#/GPIO70
PREQ#4REQ4#/GPIO71
UnusedGNT3#/GPIO72
PCI_INTB#
PCI_INTC#
PCI_INTD#
Unused
PREQ#5
RI#
Unused
A20GATEGA20IN/GEVENT0#
KBRST#
LPC_PME#
LPC_SMI3
Unused
FP_RST#
WAKE#
SMBALERT#MBALERT#THRMTRIP#/GEVENT2#
SB_GPIO6CLK_REQ3#/SATA_IS1#/GPIO6
SB_GPIO0CLK_REQ0#SATA_IS3#/GPIO0
SB_GPIO40
SPKR
SCLKSCL0/GPOC0#
Unused
Unused
OC6#
OC5#USB_OC5#IR_TX0/GPM5#
OC3#USB_OC3#/IR_RX1/GPM3#
OC2#
OC1#
OC0#
SDATA_IN_R
Unused
Unused
Unused
AE18
AD18
AA19
T3
AE6
AB6
AC6
AD3
AC4
AE2
AE3
AB8
AD7
E2
H7
Y15
W15
K4
K24
F1
J2
H6
F2
J6
W18
V17
W20
W21
AA18
W18
K1
K2
AA20
Y18
C1
Y19
G5
B9
B8
A8
A9
E5
F8
E4
J7
J8
L8
M3
4
SB700/750 GPIO Config
GPIO Name Type Function description Pin Page
19
19
19
19
19
19
19
19
19
19
19
19
19
19
19
19
19
19
19
19
19
19
19
19
19
19
19
19
19
19
19
19
19
19
19
19
21
21
21
21
21
21
21
21
21
21
21
21
21
AZ_DOCK_RST#/GPM8#
PS2_DAT/EC_GPIO0
PS2_CLK/EC_GPIO1
SPI_CS2#/EC_GPIO2
IDE_RST#/F_RST#/EC_GPO3 F25
PS2KB_DAT/EC_GPIO4
PS2KB_CLK/EC_GPIO5
PS2M_DAT/EC_GPIO6
PS2M_CLK/EC_GPIO7
USBCLK/14M_25M_48M_OSC
KSO_16/EC_GPIO8
KSO_17/EC_GPIO9
EC_PWM0/EC_GPIO10
SCL2/EC_GPIO11
SDA2/EC_GPIO12
SCL3_LV/EC_GPIO13
SDA3_LV/EC_GPIO14
EC_PWM1/EC_GPIO15
EC_PWM2/EC_GPIO16
EC_PWM3/EC_GPIO17
KSI_0/EC_GPIO18
KSI_1/EC_GPIO19
KSI_2/EC_GPIO20
KSI_3/EC_GPIO21
KSI_4/EC_GPIO22
KSI_5/EC_GPIO23
KSI_6/EC_GPIO24
KSI_7/EC_GPIO25
KSO_0/EC_GPIO26
KSO_1/EC_GPIO27
KSO_2/EC_GPIO28
KSO_3/EC_GPIO29
KSO_4/EC_GPIO30
KSO_5/EC_GPIO31
KSO_6/EC_GPIO32
KSO_7/EC_GPIO33
KSO_8/EC_GPIO34
KSO_9/EC_GPIO35
KSO_10/EC_GPIO36
KSO_11/EC_GPIO37
KSO_12/EC_GPIO38
KSO_13/EC_GPIO39
KSO_14/EC_GPIO40
KSO_15/EC_GPIO41
SATA_ACT#/GPIO67
IDE_D0/GPIO15
IDE_D1/GPIO16
IDE_D2/GPIO17
IDE_D3/GPIO18
3.3V L5
3
Unused 20
Unused
Unused
Unused
Unused
Unused
Unused
Unused
Unused
USB_48M_CLK
Unused
Unused
Unused
Unused
Unused
Unused
Unused
Unused
SB_GP16
Unused
Unused
Unused
Unused
Unused
Unused
Unused
Unused
Unused
Unused
Unused
Unused
Unused
Unused
Unused
Unused
Unused
Unused
Unused
Unused
Unused
Unused
Unused
Unused
Unused
SATA_LED#
Unused
Unused
Unused
Unused
H19
H20
H21
D22
E24
E25
D23
C8
A18
B18
F21
D21
F19
E20
E21
E19
D19
E18
G20
G21
D25
D24
C25
C24
B25
C23
B24
B23
A23
C22
A22
B22
B21
A21
D20
C20
A20
B20
B19
A19
D18
C18
W11
AD24
AD23
AE22
AC22
21
21
21
21
21UnusedGNT4#/GPIO73 AE5
21
21
21
21
21
21
21
21
21
21
21
21
21
21
21
21
21
21
21
21
21
21
21
21
21
21
21
21
21
21
21
21
21
21
21
21
21
21
21
21
21
21
21
21
2
SB700/750 GPIO Config
GPIO Name Type Function description Pin Page
IDE_D4/GPIO19 AD21
IDE_D5/GPIO20
IDE_D6/GPIO21
IDE_D7/GPIO22
IDE_D8/GPIO23
IDE_D9/GPIO24
IDE_D10/GPIO25
IDE_D11/GPIO26
IDE_D12/GPIO27
IDE_D13/GPIO28
IDE_D14/GPIO29
IDE_D15/GPIO30
SPI_DI/GPIO12
SPI_DO/GPIO11
SPI_CLK/GPIO47
SPI_HOLD#/GPIO31
SPI_CS#/GPIO32
LAN_RST#/GPIO14
ROM_RST#/GPIO14
FANOUT0/GPIO3
FANOUT1/GPIO48
FANOUT2/GPIO49
FANIN0/GPIO50
FANIN1/GPIO51
FANIN2/GPIO52
TEMPIN0/GPIO61
TEMPIN1/GPIO62
TEMPIN2/GPIO63
TEMPIN3/TALERT#/GPIO64
VIN0/GPIO53
VIN1/GPIO54
VIN2/GPIO55
VIN3/GPIO56
VIN4/GPIO57
VIN5/GPIO58
VIN6/GPIO59
VIN7/GPIO60
3.3V
Unused
Unused
Unused
Unused
Unused
Unused
Unused
Unused
Unused
Unused
Unused
Unused
SPI_DATAIN
SPI_DATAOUT
SPI_CLK
SPI_HOLD_L
SPI_CS#
CPU_PRESENT#
Unused
Unused
COM_GPIO
Unused
Unused
Unused
Unused
Unused
Unused
Unused
TALERT3
Unused
Unused
Unused
Unused
Unused
Unused
Unused
Unused
AE20
AB20
AD19
AE19
AC20
AD20
AE21
AB22
AD22
AE23
AC23
G6
D2
D1
F4
F3
U15
1
J1
M8
M5
M7
P5
P8
E8
B6
A6
A5
B5
A4
B4
C4
D4
D5
D6
A7
B7
F71882 GPIO Config
GPIO Name Type Function description Pin Page
VIDO5/GP27 AD21
B B
VIDO4/GP26
VIDO1/GP21/VGP0
PME#/GP54
KRST#/GP62
GA20/JP7
KDAT/GP61
KCLK/GP60
MDAT/GP57
MCLK/GP56
SUSC#/GP53
PSON#/GP42
PANSWH#/GP43
PWRON#/GP44
PCIRST3#/GP11
PCIRST2#/GP12
FAN_CTL3/GP36
FAN_TAC3/GP36
FAN_CTL2/GP51
FAN_TAC2/GP52
FAN_CTL1
FAN_TAC1
VID2/GP32
VID3/GP33
A A
VID3/GP33
VID4/GP34
VID5/GP35
3.3V
Unused
Unused
Unused
Unused
Unused
Unused
Unused
Unused
Unused
Unused
Unused
Unused
SPI_DATAIN
SPI_DATAOUT
SPI_CLK
SPI_HOLD_L
SPI_CS#
CPU_PRESENT#
Unused
Unused
COM_GPIO
Unused
Unused
Unused
Unused
Unused
Unused
AE20
AB20
AD19
AE19
AC20
AD20
AE21
AB22
AD22
AE23
AC23
G6
D2
D1
F4
F3
U15
20
J1
M8
M5
M7
P5
P8
E8
B6
A6
PCI Config.
DEVICE MCP1 INT Pin REQ#/GNT#
PCI Slot 1
PCI Slot 2
PCI Slot 3
PCI_INTE#
PCI_INTF#
PCI_INTG#
PCI_INTH#
PCI_INTF#
PCI_INTG#
PCI_INTH#
PCI_INTE#
PCI_INTG#
PCI_INTH#
PCI_INTE#
PCI_INTF#
PREQ#0
PGNT#0
PREQ#1
PGNT#1
PREQ#2
PGNT#2
IDSEL
AD21
AD22
CLOCK
PCICLK0
PCICLK1
PCICLK3AD23
MICRO-START INT'L CO.,LTD.
MICRO-START INT'L CO.,LTD.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet
5
4
3
2
Date: Sheet of
MICRO-START INT'L CO.,LTD.
GPIO Configuration
GPIO Configuration
GPIO Configuration
MS-7552 0A
MS-7552 0A
MS-7552 0A
1
340Wednesday, June 18, 2008
340Wednesday, June 18, 2008
340Wednesday, June 18, 2008
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of
5
4
3
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1
DIMM3 DIMM4
D D
DIMM1 DIMM2
3 PAIR MEM CLK
3 PAIR MEM CLK
3 PAIR MEM CLK
3 PAIR MEM CLK
AM2/AM2g2 CPU
AM2 SOCKET
C C
B B
1 PAIR CPU CLK
200MHZ
HT REFCLK
100MHz DIFF RS780
EXTERNAL
CLK GEN.
NB-OSCIN
14.318MHZ
NB ALINK PCIE CLK
100MHZ
SB ALINK PCIE CLK
100MHZ
NB GFX PCIE CLK
100MHZ
NB GPP PCIE CLK
100MHZ
PCIE GFX CLK
100MHZ
PCIE GPP CLK
100MHZ
PCIE GPP CLK
100MHZ
USB CLK
48MHZ
(RX780)
AMD/ATI NB
RS780
PCIE GFX SLOT 1 - 16 LANES
PCIE GPP SLOT 1 - 1 LANE
PCIE GBE
25MHZ
OSC
INPUT
25MHz
LAN
CPU_HT_CLK
NB_HT_CLK
25M_48M_66M_OSC
AMD/ATI SB
SB700
NB_DISP_CLK
GPP_CLK3
PCIE_RCLK/
NB_LNK_CLK
SLT_GFX_CLK
GPP_CLK0
GPP_CLK1
GPP_CLK2
USB_CLK
PCI CLK0
33MHZ
PCI CLK1
33MHZ
PCI CLK2
33MHZ
PCI CLK3
33MHZ
PCI CLK4
33MHZ
PCI CLK5
33MHZ
LPC_CLK0
33MHZ
LPC CLK1
33MHZ
SB_BITCLK
48MHZ
PCI SLOT 0 33MHz
PCI SLOT 1 33MHz
TPM 33MHz
PCI SLOT 3 33MHz
SUPER IO F71882
33MHz
HD AUDIO
ALC 888GR
25MHz
SIO CLK
48MHZ
25MHz SATA
32.768KHz
14.31818MHz
A A
5
External clock mode
Internal clock mode
4
MICRO-START INT'L CO.,LTD.
MICRO-START INT'L CO.,LTD.
Title
Title
Title
Clock Distribution
Clock Distribution
Clock Distribution
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet
3
2
Date: Sheet
MICRO-START INT'L CO.,LTD.
MS-7552
MS-7552
MS-7552
1
439Wednesday, June 18, 2008
439Wednesday, June 18, 2008
439Wednesday, June 18, 2008
0A
0A
0A
of
of
of
5
Power Deliver Chart
4
3
2
1
2.5V Shunt
Regulator
VRM SW
REGUALTOR
D D
ATX P/S WITH 1A STBY CURRENT
5V
5VSB
+/-5%
+/-5%
3.3V
+/-5%
12V
+/-5%
-12V
+/-5%
CPU
PW
12V
+/-5%
5VDIMM Linear
REGULATOR
1.8V VDD SW
REGULATOR
1.8V VCC Linear
REGULATOR
VDDA25 (S0, S1)
VCCP (S0, S1) / VCC_NB (S0, S1)
0.9V VTT_DDR
REGULATOR
1.1V VCC Linear
REGULATOR
1.2V VCC Linear
REGULATOR
VCC_DDR (S0, S1, S3)
VTT_DDR (S0, S1, S3)
DDRII DIMMX4
VDD MEM
12A
VTT_DDR
2A
NB_VCC1P1 (S0, S1)
VCC_1V2 (S0, S1)
+1.8V_S0 (S0, S1)
C C
AMD AM2r2 CPU
VDDA 2.5V 0.2A
VDDCORE
0.8-1.55V
DDR2 MEM I/F
VDD MEM 1.8V
VTT MEM 0.9V
VLDT 1.2V
NB RS780
VDDHT/RX 1.1V
VDDHTTX 1.2V
VDDPCIE 1.1V
NB CORE VDDC
1.1V
VDDA18PCIE 1.8V
PLLs 1.8V
VDD18/VDD18_MEM
1.8V
VDD_MEM 1.8V/1.5V
AVDD 3.3V
110A
10A
2A
0.5A
1.2A
0.5A
2A
7A
0.9A
0.1A
0.01A
0.5A
0.135A
SB700
VCC3_SB Linear
REGULATOR
VCC3_SB (S0, S1, S3, S5)
1.2V_SB Linear
REGULATOR
+1.2VSB (S0, S1)
VCC3_SB (S0, S1, S3, S5)
VCC3 (S0, S1)
+5VA Linear
B B
5VDUAL Linear
REGULATOR
REGULATOR
+5VA (S0, S1)
VCC3_SB (S0, S1, S3, S5)
X4 PCI-E
ATA I/O
ATA PLL
PCI-E PVDD
SB CORE
CLOCK
1.2V S5 PW
3.3V S5 PW
USB CORE I/O
3.3V I/O
AUDIO CODEC
3.3V CORE
5V ANALOG
+3.3VDUAL (S3)
+3.3V (S0, S1)
+5V (S0, S1)
0.8A
0.5A
0.01A
80mA
0.6A
0.22A
0.01A
0.2A
0.45A
0.1A
0.1A
SUPER I/O
0.01A
0.01A
0.1A
5.0A
7.6A
0.5A
0.1A
X1 PCIE per
3.3V
12V
3.3Vaux
PCI Slot (per slot)
A A
5
5V
3.3V
12V
3.3VDual
-12V
0.375A
3.0A
0.5A
0.1A
4
X16 PCIE per
3.0A
3.3V
5.5A
12V
0.1A
3.3VDual
USB X6 FR
VDD
5VDual
3.0A
USB X6 RL 2XPS/2
VDD
5VDual
3.0A
3
5VDual
0.5A
ENTHENET
3.3V (S3)
3.3V (S0, S1)
0.1A
0.5A
IEEE-1394 x1
3.3V (S0, S1)
12V (S0, S1) 1.1A
0.1A
MICRO-START INT'L CO.,LTD.
MICRO-START INT'L CO.,LTD.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
C
C
C
Date: Sheet
Date: Sheet
2
Date: Sheet
MICRO-START INT'L CO.,LTD.
Power Deliver Chart
Power Deliver Chart
Power Deliver Chart
MS-7552 0A
MS-7552 0A
MS-7552 0A
1
539Wednesday, June 18, 2008
539Wednesday, June 18, 2008
539Wednesday, June 18, 2008
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5
+12VIN
VCC5_SB
R13
R13
10KR0402
10KR0402
R60 0R0402R60 0R0402
R61 0R0402R61 0R0402
VCCP
COREFB+
+12VIN
CPU_CORE_TYPE10
VCORE_EN#34
100R0402
100R0402
100R0402
100R0402
R33 49.9R1%0402R33 49.9R1%0402
R23
R23
0R0402
0R0402
+12VIN
C34
C34
X_C0.01u25X0402
X_C0.01u25X0402
1 2
C43
C43
CH-1.1u27A2.5m-RH
CH-1.1u27A2.5m-RH
X_C0.01u25X0402
X_C0.01u25X0402
5
R66
R66
R56
R56
100R0402
100R0402
CHOKE2
CHOKE2
6262_VCCP
R37
R37
X_4.7KR0402
X_4.7KR0402
PWR_GOOD34
PWROK_PWM8
VCCP_NB
C0.1u16Y0402
C0.1u16Y0402
R24
R24
CD270u16SO-RH
CD270u16SO-RH
D D
NB_VSEN10
C C
B B
A A
NB_GND10
R21
R21
100R0402
100R0402
COREFB+8
COREFB-8
R26 1KR1%0402R26 1KR1%0402
VCORE_EN#
R20
R20
10KR0402
10KR0402
VCC5
VID58
VID48
VID38
VID28
R49 1KR1%0402R49 1KR1%0402
VID18
VID08
R73
R73
X_470R1%0402
X_470R1%0402
UPI6262_NB
C40
C40
X_C0.1u16Y0402
X_C0.1u16Y0402
VCCP
R1
R1
R22
R22
X_470R1%0402
X_470R1%0402
X_100R0402
X_100R0402
R2
R2
C8
C8
C17
C17
X_C0.1u16Y0402
X_C0.1u16Y0402
5
GND GND
GND GND
12V
12V
12V
12V
+
+
12
EC11
EC11
CD270u16SO-RH
CD270u16SO-RH
R35 X_300R0402R35 X_300R0402
3VDUAL
R48
R48
X_4.7KR0402
X_4.7KR0402
CE
Q8
Q8
B
R38 300R0402R38 300R0402
1
2
+
+
12
3
4
JPWR2
JPWR2
PWRCONN4P_CREAM-RH-1
PWRCONN4P_CREAM-RH-1
VCC_DDR
X_N-MMBT3904_NL_SOT23
X_N-MMBT3904_NL_SOT23
R80
R80
10KR0402
10KR0402
R65
R65
360R1%0402
360R1%0402
C3 X_C1000p50X0402C3 X_C1000p50X0402
EC6
EC6
CD270u16SO-RH
CD270u16SO-RH
G
X_N-2N7002_SOT23
X_N-2N7002_SOT23
CE
B
C59
C59
X_C680p50X0402-RH
X_C680p50X0402-RH
X_C0.1u16Y0402
X_C0.1u16Y0402
ISEN_NB_A
R64
R64
X_0R0402
X_0R0402
C35
C35
X_C0.1u16Y0402
X_C0.1u16Y0402
560R1%0402-RH
560R1%0402-RH
C20
C20
X_C0.1u16Y0402
X_C0.1u16Y0402
R31 56KR1%0402R31 56KR1%0402
VCC5
R32 69.8KR1%0402-RHR32 69.8KR1%0402-RH
+
+
12
EC20
EC20
CD270u16SO-RH
CD270u16SO-RH
R42
R42
X_27R0402
X_27R0402
DS
Q9
Q9
R25
R25
10.7KR1%0402
10.7KR1%0402
Q4
Q4
N-MMBT3904_NL_SOT23
N-MMBT3904_NL_SOT23
R82 1.2KR1%0402R82 1.2KR1%0402
C56 C10p50N0402-RHC56 C10p50N0402-RH
C53
C53
R63 0R0402R63 0R0402
R54 49.9R1%0402R54 49.9R1%0402
R16 1.2KR1%0402R16 1.2KR1%0402
C1
C1
C33p50N0402
C33p50N0402
R19
R19
1.1KR1%0402
1.1KR1%0402
C16 C0.01u25X0402C16 C0.01u25X0402
R15
R15
4.99KR1%0402
4.99KR1%0402
VCC5
R17
R17
X_10KR0402
X_10KR0402
+
+
12
+
+
12
EC7
EC7
CD270u16SO-RH
CD270u16SO-RH
VID1
R34
R34
X_27R0402
X_27R0402
DS
Q3
Q3
VCORE_EN#
G
X_N-2N7002_SOT23
X_N-2N7002_SOT23
4
C55
C55
C0.01u25X0402
C0.01u25X0402
6262_VCCNB
C15 C0.01u25X0402C15 C0.01u25X0402
C19
C19
C0.1u16Y0402
C0.1u16Y0402
R41
R41
X_10KR1%0402
X_10KR1%0402
R40
R40
120KR1%0402
120KR1%0402
C80
C80
input CAP
EC14
EC14
C0.1u16Y0402
C0.1u16Y0402
LOW FOR SVID
6262_VCCNB
UPI6262_NB
4
3
ISL6323CR CKT for Hybride
VCC5
R44
R44
2.2R1%0805
VIN
0R0402
0R0402
10
VCC
GND
49
VCC5
2.2R1%0805
PVCC_NB
BOOT_NB
UGATE_NB
PHASE_NB
LGATE_NB
SDA07,11,12,21,24,34
6262_VCCNB_R
C14
C14
C0.1u16Y0402
C0.1u16Y0402
7X7 QFN
U3 ISL6323CRU3 ISL6323CR
24
EN
37
VDDPWRGD
34
PWROK
9
VID5
8
VID4
7
VID3/SVC
6
VID2/SVD
5
VID1/SEL
4
VID0/VFIXEN
48
COMP_NB
1
FB_NB
2
VSEN_NB
3
RGND_NB
18
COMP
17
FB
15
RCOMP
13
VSEN
12
RGND
19
APA
16
RESET
14
OFS
11
FS
BOTTOM PAD
CONNECT TO GND
Through 8 VIAs
R52
R52
R71 X_0R0402R71 X_0R0402
C29
C29
C4.7u10Y0805
C4.7u10Y0805
29
PVCC1_2
31
BOOT1
32
UGATE1
33
PHASE1
30
LGATE1
20
ISEN1+
21
ISEN1-
27
BOOT2
26
UGATE2
25
PHASE2
28
LGATE2
22
ISEN2+
23
ISEN2-
35
PWM3
44
ISEN3+
43
ISEN3-
36
PWM4
46
ISEN4+
45
ISEN4-
42
40
39
38
41
47
ISEN_NB
PHASE_NB_A
R70 2.2R/0603R70 2.2R/0603
C50
C50
C0.1u16Y0402
C0.1u16Y0402
R68
R68
X_1KR0402
X_1KR0402
+12VIN
R51
R51
2.2R1%0805
2.2R1%0805
C32
C32
C1u25X0805-RH
C1u25X0805-RH
R58 2.2R1%0805R58 2.2R1%0805
U_G1
PHASE1
L_G1
ISEN1+
ISEN1ÂIPHASE1
R45 2.2R1%0805R45 2.2R1%0805
U_G2
PHASE2
L_G2
ISEN2+
ISEN2ÂIPHASE2
PWM3
ISEN3+
ISEN3ÂIPHASE3
R72 X_0R0805R72 X_0R0805
R81 0R0805R81 0R0805
R91 2.2R1%0805R91 2.2R1%0805
C60 C1u25X0805-RHC60 C1u25X0805-RH
R84 2.2R1%0805R84 2.2R1%0805
UGATE_NB
PHASE_NB
LGATE_NB
R85
R85
6.8KR1%0402-RH
6.8KR1%0402-RH
1
U4
U4
3
GND
4
SDA
8
OUT1
2
C44 C0.1u25XC44 C0.1u25X
R30 255R1%0402-RHR30 255R1%0402-RH
R29
R29
6.8KR1%0402-RH
6.8KR1%0402-RH
C24 C0.1u25XC24 C0.1u25X
R28 255R1%0402-RHR28 255R1%0402-RH
R27
R27
6.8KR1%0402-RH
6.8KR1%0402-RH
R78 255R1%0402-RHR78 255R1%0402-RH
R77
R77
6.8KR1%0402-RH
6.8KR1%0402-RH
VCC5
VCC5
C64 C0.1u25XC64 C0.1u25X
R79 X_6.2KR1%0402R79 X_6.2KR1%0402
C68 C0.1u16X0402C68 C0.1u16X0402
6262_VCCP_R
7
OUT2
VCC
6
OUT3
5
SCL
BUS_SEL
UP6262M8_SOT23-8-RH
UP6262M8_SOT23-8-RH
R69
R69
10KR0402
10KR0402
ISEN1
C6
C6
C0.1u16X0402
C0.1u16X0402
ISEN2
C4
C4
C0.1u16X0402
C0.1u16X0402
ISEN3
C62
C62
C0.1u16X0402
C0.1u16X0402
+12VIN
ISEN_NB_A
R18 0R0402R18 0R0402
SCL0 7,11,12,21,24,34
VCC5
3
C7
C7
C0.1u16Y0402
C0.1u16Y0402
C5
C5
C0.1u16Y0402
C0.1u16Y0402
C63
C63
C0.1u16Y0402
C0.1u16Y0402
C65
C65
C0.1u16X0402
C0.1u16X0402
+12VIN
R240
R240
2.2R1%0805
2.2R1%0805
C269 C1u16X5C269 C1u16X5
PWM3
6262_VCCP
I2C address:0X60
R643=10K;R644=OPEN
U_G1
PHASE1
L_G1
U_G2
PHASE2
L_G2
U16
U16
6
VCC
UGATE
7
BOOT
PVCC
PHASE
4
GND
3
PWM
LGATE
ISL6612ACBZT_SOIC8-RH
ISL6612ACBZT_SOIC8-RH
UGATE_NB
PHASE_NB
LGATE_NB
BUS_SEL=100%VCC
1
2
R232
R232
2.2R1%0805
2.2R1%0805
8
5
R199 1R0805R199 1R0805
R176 0R0805R176 0R0805
R163 1R0805R163 1R0805
R113 0R0805R113 0R0805
U_G3
R234 1R0805R234 1R0805
C255 C0.1u25XC255 C0.1u25X
PHASE3
L_G3
R214 0R0805R214 0R0805
R93 1R0805R93 1R0805
R10 0R0805R10 0R0805
75N02Q775N02
2
4809
4809
R193
R193
10KR0402
10KR0402
75N02
75N02
4809
4809
R157
R157
10KR0402
10KR0402
75N02
75N02
R87
R87
10KR0402
10KR0402
2
VIN
G
G
VIN
G
G
R229
R229
10KR0402
10KR0402
G
G
DS
DS
DS
DS
4809
4809
75N02
75N02
VIN
1
output CAP
NB-output CAP
VCCP
CP44
CP44
CP36
CP36
X_COPPER
X_COPPER
MS-7552
MS-7552
MS-7552
1
VCCP
VCCP_NB
VCCP_NB
EC8
EC8
+
+
1 2
CD820u2.5SO-RH
CD820u2.5SO-RH
EC9
EC9
+
+
1 2
CD820u2.5SO-RH
CD820u2.5SO-RH
EC17
EC17
+
+
1 2
CD820u2.5SO-RH
CD820u2.5SO-RH
EC16
EC16
+
+
1 2
CD820u2.5SO-RH
CD820u2.5SO-RH
EC15
EC15
+
+
1 2
CD820u2.5SO-RH
CD820u2.5SO-RH
EC24
EC24
+
+
1 2
CD820u2.5SO-RH
CD820u2.5SO-RH
EC18
EC18
+
+
1 2
CD820u2.5SO-RH
CD820u2.5SO-RH
EC26
EC26
+
+
1 2
CD820u2.5SO-RH
CD820u2.5SO-RH
EC4
EC4
+
+
1 2
CD820u2.5SO-RH
CD820u2.5SO-RH
EC5
EC5
+
+
1 2
CD820u2.5SO-RH
CD820u2.5SO-RH
639Wednesday, June 18, 2008
639Wednesday, June 18, 2008
639Wednesday, June 18, 2008
0A
0A
0A
of
of
of
C197
C197
C193
C193
C10u16Y1206
C10u16Y1206
C1u16X5
C1u16X5
4809
4809
DS
Q31
Q31
Q39
Q39
G
CHOKE5 CH-0.5u40A-RH-1CHOKE5 CH-0.5u40A-RH-1
DS
1 2
R180
R180
Q30
Q30
Q29
Q29
G
4809
4809
Q28
Q28
G
Q19
Q19
G
VIN
DS
G
DS
G
DS
Q12
Q12
4809
4809
DS
Q7
75N02
75N02
G
Q42
Q42
Q40
Q40
DS
DS
4809
4809
75N02
75N02
Q24
Q24
Q20
Q20
75N02
75N02
DS
C150
C150
C1000p50X0402
C1000p50X0402
C139
C139
C1u16X5
C1u16X5
C1000p50X0402
C1000p50X0402
DS
G
DS
G
C73
C73
C1u16X5
C1u16X5
Q10
Q10
C30
C30
C1000p50X0402
C1000p50X0402
2.2R1%0805
2.2R1%0805
X_COPPER
X_COPPER
IPHASE1
ISEN1
C120
C120
C10u16Y1206
C10u16Y1206
CHOKE3 CH-0.5U40A-RH-1CHOKE3 CH-0.5U40A-RH-1
1 2
R137
R137
2.2R1%0805
2.2R1%0805
X_COPPER
X_COPPER
C91
C91
IPHASE2
ISEN2
C228
C228
C1u16X5
C1u16X5
Q44
Q44
Q41
Q41
R216
R216
2.2R1%0805
2.2R1%0805
75N02
75N02
C214
C214
C1000p50X0402
C1000p50X0402
IPHASE3
ISEN3
C75
C75
C10u16Y1206
C10u16Y1206
R50
R50
2.2R1%0805
2.2R1%0805
PHASE_NB_A
ISEN_NB_A
CP40
CP40
CP38
CP38
C272
C272
C10u16Y1206
C10u16Y1206
CHOKE7 CH-0.5U40A-RH-1CHOKE7 CH-0.5U40A-RH-1
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
Date: Sheet
VCCP
CP41
CP41
X_COPPER
X_COPPER
VCCP
CP39
CP39
X_COPPER
X_COPPER
1 2
CP43
CP43
X_COPPER
X_COPPER
CHOKE1 CH-0.5U40A-RH-1CHOKE1 CH-0.5U40A-RH-1
MSI
X_COPPER
X_COPPER
1 2
CP35
CP35
X_COPPER
X_COPPER
MICRO-STAR INt'L CO., LTD.
MICRO-STAR INt'L CO., LTD.
MICRO-STAR INt'L CO., LTD.
Intersil 6323CR 3 Phase
Intersil 6323CR 3 Phase
Intersil 6323CR 3 Phase
VCC3
D D
5
CP5CP5
1 2
L19
L19
X_30L3A-15_0805-RH
X_30L3A-15_0805-RH
C362
C362
10u/10v/Y5/8
10u/10v/Y5/8
CLK_VDD
C316
C316
0.1u/16v/X5/4
0.1u/16v/X5/4
C341
C341
0.1u/16v/X5/4
0.1u/16v/X5/4
4
C353
C353
X_0.1u/16v/X5/4
X_0.1u/16v/X5/4
C359
C359
0.1u/16v/X5/4
0.1u/16v/X5/4
C361
C361
X_0.1u/16v/X5/4
X_0.1u/16v/X5/4
3
C338
C338
X_0.1u/16v/X5/4
X_0.1u/16v/X5/4
C321
C321
X_0.1u/16v/X5/4
X_0.1u/16v/X5/4
C315
C315
X_0.1u/16v/X5/4
X_0.1u/16v/X5/4
2
1
VCC3
CLK_VDD
VCC3
C C
CLK_VDD
FP_RST#21,31,34,36
SCL06,11,12,21,24,34
SDA06,11,12,21,24,34
CLK_VDD
B B
RS740
RX780
RS780
(Single-ended)
NB_OSC_14M16
OSC_14M_NB
3.3V 33R serial
1.8V 82.5R/130R
1.1V 158R/90.9R
R249
R249
75R1%0402
75R1%0402
CP7CP7
12
L22
L22
X_30L3A-15_0805-RH
X_30L3A-15_0805-RH
CP4CP4
1 2
L18
L18
X_30L3A-15_0805-RH
X_30L3A-15_0805-RH
1u/6.3v/Y5/4
1u/6.3v/Y5/4
14.318MHZ16P_D-RH
C310 C22p50N0402C310 C22p50N0402
C317 C22p50N0402C317 C22p50N0402
R253 150R/4/1%_BR253 150R/4/1%_B
C308
C308
X_10p/50v/N/4
X_10p/50v/N/4
14.318MHZ16P_D-RH
Y1
Y1
1 2
R259 X_4.7K/4R259 X_4.7K/4
R252 0R/4R252 0R/4
SCL0
R274 X_R/2R274 X_R/2
SDA0
R276 X_R/2R276 X_R/2
R260 1K/4R260 1K/4
R256
R256
X_10K/4
X_10K/4
C320
X_8.2K/4
X_8.2K/4
CLK_VDDA
X_10u/10v/Y5/8
X_10u/10v/Y5/8
VDD48
R263
R263
X_10MR1%0402
X_10MR1%0402
CLK_VDD
R254
R254
R250
R250
8.2K/4
8.2K/4
U19A
C335
C335
R255
R255
X_8.2K/4
X_8.2K/4
SEL_HTT66
SEL_SATA
SEL_OC_MODE
R251
R251
8.2K/4
8.2K/4
C334
C334
0.1u/16v/X5/4
0.1u/16v/X5/4
TXC1
TXC2
RST#_CLK
SCL0_C
SDA0_C
PD#
U19A
44
VDDA
43
GNDA
60
VDDREF
61
GNDREF
39
VDDSATA
42
GNDSATA
64
VDD48
3
GND48
48
VDDCPU
47
GNDCPU
56
VDDHTT
53
GNDHTT
34
VDDATIG
11
VDDSRC1
16
VDDSRC2
25
VDDSB_SRC
28
GNDATIG
33
GNDATIG
10
GNDSRC
17
GNDSRC
24
GNDSB_SRC
62
X1
63
X2
52
RESTORE#
4
SMBCLK
5
SMBDAT
51
PD#
59
REF0/SEL_HTT66
58
REF1/SEL_SATA
57
REF2
ICS9LPRS477CKLFT_MLF64-RH_1
ICS9LPRS477CKLFT_MLF64-RH_1
I11-RS4771C-I02
42479_rs780_scl_nda_1.01.doc
CPUKG0T_LPRS
CPUKG0C_LPRS
CPUKG1T_LPRS
CPUKG1C_LPRS
ATIG0T_LPRS
ATIG0C_LPRS
ATIG1T_LPRS
ATIG1C_LPRS
ATIG2T_LPRS
ATIG2C_LPRS
ATIG3T_LPRS
ATIG3C_LPRS
SB_SRC0T_LPRS
SB_SRC0C_LPRS
SB_SRC1T_LPRS
SB_SRC1C_LPRS
SRC0T_LPRS
SRC0C_LPRS
SRC1T_LPRS
SRC1C_LPRS
SRC2T_LPRS
SRC2C_LPRS
SRC3T_LPRS
SRC3C_LPRS
SRC4T_LPRS
SRC4C_LPRS
DOC_1/SRC5T_LPRS
DOC_0/SRC5C_LPRS
SRC6T/SATAT_LPRS
SRC6C/SATAC_LPRS
HTT0T/66M_LPRS
HTT0C/66M_LPRS
48MHz_0
48MHz_1
CPU_CLK_R
50
CPU_CLK#_R
49
46
45
NBGFX_SRCCLK_R
38
NBGFX_SRCCLK#_R
37
GFX_CLKP_R
36
GFX_CLKN_R
35
32
31
30
29
NBLINKCLK_R
27
NBLINKCLK#_R
26
SBSRCCLK_R
23
SBSRCCLK#_R
22
21
20
GPPCLK0_R
19
GPPCLK0#_R
18
1394CLK2_R
15
1394CLK2#_R
14
LANCLK1_R
13
LANCLK1#_R
12
9
8
7
6
41
40
HTREFCLK_R
55
HTREFCLK#_R
54
SIO_CLK_R
2
USBCLK_EXT_R
1
Reserved for EMI 0906
R261 X_R/2R261 X_R/2
R262 X_R/2R262 X_R/2
R277 X_R/2R277 X_R/2
R279 X_R/2R279 X_R/2
R284
R284
R287
R287
R302 X_R/2R302 X_R/2C320
R301 X_R/2R301 X_R/2
R299 X_R/2R299 X_R/2
R298 X_R/2R298 X_R/2
R297 X_R/2R297 X_R/2
R296 X_R/2R296 X_R/2
R294 X_R/2R294 X_R/2
R290 X_R/2R290 X_R/2
R285 X_R/2R285 X_R/2
R282 X_R/2R282 X_R/2
R257 X_R/2R257 X_R/2
R258 X_R/2R258 X_R/2
R272 X_R/2R272 X_R/2
R270 X_R/2R270 X_R/2
X_R/2
X_R/2
X_R/2
X_R/2
C336
C336
10p/50v/N/4
10p/50v/N/4
EMI EMI
CPU_CLK 8
CPU_CLK# 8
NBGFX_SRCCLK 16
NBGFX_SRCCLK# 16
GFX_CLKP 24
GFX_CLKN 24
NBLINKCLK 16
NBLINKCLK# 16
SBSRCCLK 19
SBSRCCLK# 19
GPPCLK0 24
GPPCLK0# 24
1394CLK2 33
1394CLK2# 33
LANCLK1 29
LANCLK1# 29
HTREFCLK 16
HTREFCLK# 16
SIO_CLK 31
USBCLK_EXT 21
C340
C340
C10p50N0402
C10p50N0402
CLK_VDD
R267
R267
DOC
10K/4
10K/4
USBCLK_EXT_R
R269
SRC5T
R269
X_10K/4
X_10K/4
65
U19B
U19B
THERMPAD
ICS9LPRS477CKLFT_MLF64-RH_1
ICS9LPRS477CKLFT_MLF64-RH_1
I11-RS4771C-I02
Reserved for EMI 0906
HTT CLOCK
REF0/SEL_HTT66
A A
REF/SEL_SATA
0
100.00 DIFFERENTIAL
1
66.66 SINGLE END
PIN40,41 SRC6T/C and SATAT_LPRS select
0
100MHz differential spreading SRC clock
1
100MHz non-spreading differential SATA clock
atched input to select pin functionality
REF2
0
1
ATIG/SRC PCIE Gen2 Mode with limited
overclocking ability
ATIG/SRC PCIE Gen1 Mode with higher
overclocking ability
5
FS2
0 0 0
0 0 1
0 1 0
0 1 1
1 0 0
1 0 1
1 1 1
4
CPUFS1
Hi-Z
X
180.00
220.00
100.00
133.33
200.00
SRCCLK
HTTFS0 PCI
[2:1]
Hi-Z Hi-Z100.00 Reserved
100.00
100.00
100.00
36.56 73.12
100.00
66.66 33.33
100.00
66.66 33.33
100.00
66.66 33.33 Normal HAMMER operation
USB
48.00
48.00
X/6X/3
30.0060.00
48.00
48.00
48.00
48.00
48.00
COMMENT
Reserved
Reserved
Title
Title
Reserved
Reserved
Reserved
3
2
Title
Document Number
Document Number
Document Number
Micro Star Restricted Secret
Micro Star Restricted Secret
Micro Star Restricted Secret
Clock-Gen ICS9LPRS477
Clock-Gen ICS9LPRS477
Clock-Gen ICS9LPRS477
MICRO-STAR INT'L CO.,LTD.
MICRO-STAR INT'L CO.,LTD.
MICRO-STAR INT'L CO.,LTD.
No. 69, Li-De St, Jung-He City,
No. 69, Li-De St, Jung-He City,
No. 69, Li-De St, Jung-He City,
Taipei Hsien, Taiwan
Taipei Hsien, Taiwan
Taipei Hsien, Taiwan
http://www.msi.com.tw
http://www.msi.com.tw
http://www.msi.com.tw
MS-7552
MS-7552
MS-7552
Last Revision Date:
Last Revision Date:
Last Revision Date:
Wednesday, June 18, 2008
Wednesday, June 18, 2008
Wednesday, June 18, 2008
Sheet
Sheet
Sheet
739
739
739
1
Rev
Rev
Rev
0A
0A
0A
of
of
of
EXT CLK FREQUENCY SELECT TABLE(MHZ)
5
4
3
2
1
HT_CADIN_H[15..0]14
HT_CADIN_L[15..0]14
HT_CADOUT_H[15..0]14
D D
HT_CADOUT_L[15..0]14
VCCA_1V2 VCCA_1V2
C298
C300
C300
X_0.22u/16v/X7/6
X_0.22u/16v/X7/6
N6
P6
N3
N2
V4
V5
U1
V1
U6
V6
T4
T5
R6
T6
P4
P5
M4
M5
L6
M6
K4
K5
J6
K6
U3
U2
R1
T1
R3
R2
N1
P1
L1
M1
L3
L2
J1
K1
J3
J2
5
C298
X_0.22u/16v/X7/6
X_0.22u/16v/X7/6
CPU1A
CPU1A
L0_CLKIN_H(1)
L0_CLKIN_L(1)
L0_CLKIN_H(0)
L0_CLKIN_L(0)
L0_CTLIN_H(1)
L0_CTLIN_L(1)
L0_CTLIN_H(0)
L0_CTLIN_L(0)
L0_CADIN_H(15)
L0_CADIN_L(15)
L0_CADIN_H(14)
L0_CADIN_L(14)
L0_CADIN_H(13)
L0_CADIN_L(13)
L0_CADIN_H(12)
L0_CADIN_L(12)
L0_CADIN_H(11)
L0_CADIN_L(11)
L0_CADIN_H(10)
L0_CADIN_L(10)
L0_CADIN_H(9)
L0_CADIN_L(9)
L0_CADIN_H(8)
L0_CADIN_L(8)
L0_CADIN_H(7)
L0_CADIN_L(7)
L0_CADIN_H(6)
L0_CADIN_L(6)
L0_CADIN_H(5)
L0_CADIN_L(5)
L0_CADIN_H(4)
L0_CADIN_L(4)
L0_CADIN_H(3)
L0_CADIN_L(3)
L0_CADIN_H(2)
L0_CADIN_L(2)
L0_CADIN_H(1)
L0_CADIN_L(1)
L0_CADIN_H(0)
L0_CADIN_L(0)
ZIF-SOCK940-RH-1
ZIF-SOCK940-RH-1
C290
C290
C296
C296
0.22u/16v/X7/6
0.22u/16v/X7/6
0.22u/16v/X7/6
0.22u/16v/X7/6
HT_CLKIN_H114
HT_CLKIN_L114
HT_CLKIN_H014
HT_CLKIN_L014
C C
B B
A A
HT_CTLIN_H114
HT_CTLIN_L114
HT_CTLIN_H014
HT_CTLIN_L014
HT_CADIN_H15
HT_CADIN_L15
HT_CADIN_H14
HT_CADIN_L14
HT_CADIN_H13
HT_CADIN_L13
HT_CADIN_H12
HT_CADIN_L12
HT_CADIN_H11
HT_CADIN_L11
HT_CADIN_H10
HT_CADIN_L10
HT_CADIN_H9
HT_CADIN_L9
HT_CADIN_H8
HT_CADIN_L8
HT_CADIN_H7
HT_CADIN_L7
HT_CADIN_H6
HT_CADIN_L6
HT_CADIN_H5
HT_CADIN_L5
HT_CADIN_H4
HT_CADIN_L4
HT_CADIN_H3
HT_CADIN_L3
HT_CADIN_H2
HT_CADIN_L2
HT_CADIN_H1
HT_CADIN_L1
HT_CADIN_H0
HT_CADIN_L0
HT_CADIN_H[15..0]
HT_CADIN_L[15..0]
HT_CADOUT_H[15..0]
HT_CADOUT_L[15..0]
C273
C273
C240
C240
4.7u/16v/Y5/1206
4.7u/16v/Y5/1206
X_4.7u/16v/Y5/1206
X_4.7u/16v/Y5/1206
L0_CLKOUT_H(1)
L0_CLKOUT_L(1)
L0_CLKOUT_H(0)
L0_CLKOUT_L(0)
L0_CTLOUT_H(1)
L0_CTLOUT_L(1)
L0_CTLOUT_H(0)
L0_CTLOUT_L(0)
L0_CADOUT_H(15)
L0_CADOUT_L(15)
L0_CADOUT_H(14)
L0_CADOUT_L(14)
L0_CADOUT_H(13)
L0_CADOUT_L(13)
L0_CADOUT_H(12)
L0_CADOUT_L(12)
L0_CADOUT_H(11)
L0_CADOUT_L(11)
L0_CADOUT_H(10)
L0_CADOUT_L(10)
L0_CADOUT_H(9)
L0_CADOUT_L(9)
L0_CADOUT_H(8)
L0_CADOUT_L(8)
L0_CADOUT_H(7)
L0_CADOUT_L(7)
L0_CADOUT_H(6)
L0_CADOUT_L(6)
L0_CADOUT_H(5)
L0_CADOUT_L(5)
L0_CADOUT_H(4)
L0_CADOUT_L(4)
L0_CADOUT_H(3)
L0_CADOUT_L(3)
L0_CADOUT_H(2)
L0_CADOUT_L(2)
L0_CADOUT_H(1)
L0_CADOUT_L(1)
L0_CADOUT_H(0)
L0_CADOUT_L(0)
C297
C297
C251
C251
X_4.7u/16v/Y5/1206
X_4.7u/16v/Y5/1206
0.22u/16v/X7/6
0.22u/16v/X7/6
AD5
AD4
AD1
AC1
Y6
W6
W2
W3
Y5
Y4
AB6
AA6
AB5
AB4
AD6
AC6
AF6
AE6
AF5
AF4
AH6
AG6
AH5
AH4
Y1
W1
AA2
AA3
AB1
AA1
AC2
AC3
AE2
AE3
AF1
AE1
AG2
AG3
AH1
AG1
L2
80/2A/B8L280/2A/B8
C295
C295
X_0.22u/16v/X7/6
X_0.22u/16v/X7/6
HT_CLKOUT_H1 14
HT_CLKOUT_L1 14
HT_CLKOUT_H0 14
HT_CLKOUT_L0 14
HT_CTLOUT_H1 14
HT_CTLOUT_L1 14
HT_CTLOUT_H0 14
HT_CTLOUT_L0 14
HT_CADOUT_H15
HT_CADOUT_L15
HT_CADOUT_H14
HT_CADOUT_L14
HT_CADOUT_H13
HT_CADOUT_L13
HT_CADOUT_H12
HT_CADOUT_L12
HT_CADOUT_H11
HT_CADOUT_L11
HT_CADOUT_H10
HT_CADOUT_L10
HT_CADOUT_H9
HT_CADOUT_L9
HT_CADOUT_H8
HT_CADOUT_L8
HT_CADOUT_H7
HT_CADOUT_L7
HT_CADOUT_H6
HT_CADOUT_L6
HT_CADOUT_H5
HT_CADOUT_L5
HT_CADOUT_H4
HT_CADOUT_L4
HT_CADOUT_H3
HT_CADOUT_L3
HT_CADOUT_H2
HT_CADOUT_L2
HT_CADOUT_H1
HT_CADOUT_L1
HT_CADOUT_H0
HT_CADOUT_L0
4
C294
C294
VDDA25VDDA_25
X_0.22u/16v/X7/6
X_0.22u/16v/X7/6
LDT_PWRGD
C107
CPU_CLK7
CPU_CLK#7
C107
3900p/50vX7/6
3900p/50vX7/6
C106
C106
3900p/50vX7/6
3900p/50vX7/6
VCC_DDR
R219 1K/4/5%R219 1K/4/5%
R228 1K/4/5%R228 1K/4/5%
VCC_DDR VCC3
R131
R131
4.7K/4
4.7K/4
B
Q22
Q22
2N3904_SOT23
2N3904_SOT23
CE
169R/6/1%
169R/6/1%
VCC_DDR
R67
R67
10K/4
10K/4
4.7u/16v/Y5/1206
4.7u/16v/Y5/1206
R152
R152
LDT_PWRGD19
LDT_STOP#16,19
R221
R221
39.2R/6/1%
39.2R/6/1%
CPU_STRAP_HI_E11
CPU_STRAP_LO_F11
R222
R222
39.2R/6/1%
39.2R/6/1%
THERMDC_CPU31
THERMDA_CPU31
C94
C94
CPUCLKIN
CPUCLKIN#
LDT_RST#16,19
C112
C112
X_1000p/50v/X7/6
X_1000p/50v/X7/6
THERM_SIC
THERM_SID
TP20TP20
TP14TP14
TP11TP11
TP19TP19
COREFB+6
COREFB-6
PWROK_PWM 6
3
C96
C96
0.22u/16v/X7/6
0.22u/16v/X7/6
LDT_PWRGD
LDT_STOP#
LDT_RST#
TP16TP16
CPU_TDI
CPU_TRST_L
CPU_TCK
CPU_TMS
COREFB+
COREFB-
TP6TP6
CPU_VTT_SENSE
CPU_TEST25_H
CPU_TEST25_L
R151 300R/4R151 300R/4
R150 300R/4R150 300R/4
TP3TP3
TP7TP7
TP9TP9
TP4TP4
TP12TP12
VDDA25
C100
C100
3300p/50v/X7/4
3300p/50v/X7/4
CPU_PRESENT_L
CPU_DBREQ_L
CPU_M_VREF
CPU_PRESENT_L
CPU_TEST25_H
CPU_TEST25_L
VID56
VID46
VID36
VID26
VID16
VID06
CPU_HOT
CPU1D
CPU1D
C10
VDDA1
D10
VDDA2
A8
CLKIN_H
B8
CLKIN_L
C9
PWROK
D8
LDTSTOP_L
C7
RESET_L
AL3
CPU_PRESENT_L
AL6
SIC
AK6
SID
AL10
TDI
AJ10
TRST_L
AH10
TCK
AL9
TMS
A5
DBREQ_L
G2
VDD_FB_H
G1
VDD_FB_L
E12
VTT_SENSE
F12
M_VREF
AH11
M_ZN
AJ11
M_ZP
A10
TEST25_H
B10
TEST25_L
F10
TEST19
E9
TEST18
AJ7
TEST13
F6
TEST9
D6
TEST17
E7
TEST16
F8
TEST15
C5
TEST14
AH9
TEST12
E5
TEST7
AJ5
TEST6
AG9
TEST5
AG8
TEST4
AH7
TEST3
AJ6
TEST2
ZIF-SOCK940-RH-1
ZIF-SOCK940-RH-1
R230 1K/4/5%R230 1K/4/5%
R144 510R/0402R144 510R/0402
R146 510R/0402R146 510R/0402
CPU_HOT 19
VID(5)
VID(4)
VID(3)
VID(2)
VID(1)
VID(0)
THERMTRIP_L
PROCHOT_L
TDO
DBRDY
VDDIO_FB_H
VDDIO_FB_L
PSI_L
HTREF1
HTREF0
TEST29_H
TEST29_L
TEST24
TEST23
TEST22
TEST21
TEST20
TEST28_H
TEST28_L
TEST27
TEST26
TEST10
TEST8
2
D2
D1
C1
E3
E2
E1
AK7
AL7
AK10
B6
AK11
AL11
F1
V8
V7
C11
D11
AK8
AH8
AJ9
AL8
AJ8
J10
H9
AK9
AK5
G7
D4
VCC_DDR
place near the PWM IC
VID5
VID4
VID3
VID2
VID1
VID0
CPU_THRIP_L#
CPU_HOT
CPU_TDO
CPU_DBRDY
CPU_PSI_L
HTREF1
HTREF0
CPU_TEST22
CPU_TEST21
TP18TP18
R224 300R/4R224 300R/4
CPU_DBREQ_L
TP17TP17
TP2TP2
TP8TP8
R149
R149
80.6R/6/1%
80.6R/6/1%
VCC_DDR
C113
C113
X_C0.1u25Y
X_C0.1u25Y
VCC_DDR
R140
R140
1K/4/5%
1K/4/5%
VCC_DDR
VCC_DDR
C238
C238
1000p/50v/X7/4
1000p/50v/X7/4
TP15TP15
TP10TP10
TP13TP13
R231
R231
R227
R227
300R/4
300R/4
300R0402
300R0402
Micro Star Restricted Secret
Micro Star Restricted Secret
Micro Star Restricted Secret
Title
Title
Title
K9 M2 HT I/F,CTRL&DEBUG
K9 M2 HT I/F,CTRL&DEBUG
K9 M2 HT I/F,CTRL&DEBUG
Document Number
Document Number
Document Number
MICRO-STAR INT'L CO.,LTD.
MICRO-STAR INT'L CO.,LTD.
MICRO-STAR INT'L CO.,LTD.
No. 69, Li-De St, Jung-He City,
No. 69, Li-De St, Jung-He City,
No. 69, Li-De St, Jung-He City,
Taipei Hsien, Taiwan
Taipei Hsien, Taiwan
Taipei Hsien, Taiwan
http://www.msi.com.tw
http://www.msi.com.tw
http://www.msi.com.tw
R139
R139
1K/4/5%
1K/4/5%
VCC_DDR
R220
R220
300R/4
300R/4
VCC_DDR
R237
R237
4.7K/4
4.7K/4
R233
R233
300R/4
300R/4
B
CE
R225 44.2R/6/1%R225 44.2R/6/1%
R226 44.2R/6/1%R226 44.2R/6/1%
C239
C239
1000p/50v/X7/4
1000p/50v/X7/4
VCC_DDR
R143
R143
15R/6/1%
15R/6/1%
R142
R142
15R/6/1%
15R/6/1%
0.1u/25v/Y5/4
0.1u/25v/Y5/4
VCC_DDR
RN9
RN9
1
3
5
7
8P4R/300R/6
8P4R/300R/6
MS-7552
MS-7552
MS-7552
R235
R235
4.7K/4
4.7K/4
B
Q43
Q43
2N3904_SOT23
2N3904_SOT23
CE
Q45
Q45
2N3904_SOT23
2N3904_SOT23
CPU_M_VREF
C114
C114
2
4
6
8
Last Revision Date:
Last Revision Date:
Last Revision Date:
Wednesday, June 18, 2008
Wednesday, June 18, 2008
Wednesday, June 18, 2008
Sheet
Sheet
Sheet
1
CPU_THRIP# 21
TALERT# 20,31
VCCA_1V2
TP1TP1
C111
C111
1000p/50v/X7/6
1000p/50v/X7/6
CPU_DBREQ_L
LDT_RST#
LDT_STOP#
LDT_PWRGD
Rev
Rev
Rev
0A
0A
0A
of
of
of
839
839
839
5
MEM_MA_DQS_L[7..0]11,12
MEM_MA_DQS_H[7..0]11,12
MEM_MA_DM[7..0]11,12
MEM_MA_ADD[15..0]11,12,13
MEM_MA_DATA[63..0]11,12 MEM_MB_DATA[63..0]11,12
D D
MEM_MA0_CLK_H211,13
MEM_MA0_CLK_L211,13
MEM_MA0_CLK_H111,13
MEM_MA0_CLK_L111,13
MEM_MA0_CLK_H011,13
MEM_MA0_CLK_L011,13
MEM_MA0_CS_L111,13
MEM_MA0_CS_L011,13
MEM_MA0_ODT011,13
MEM_MA1_CLK_H212,13
MEM_MA1_CLK_L212,13
MEM_MA1_CLK_H112,13
MEM_MA1_CLK_L112,13
MEM_MA1_CLK_H012,13
MEM_MA1_CLK_L012,13
MEM_MA1_CS_L112,13
MEM_MA1_CS_L012,13
MEM_MA1_ODT012,13
C C
B B
A A
MEM_MA_CAS_L11,12,13
MEM_MA_WE_L11,12,13
MEM_MA_RAS_L11,12,13
MEM_MA_BANK211,12,13
MEM_MA_BANK111,12,13
MEM_MA_BANK011,12,13
MEM_MA_CKE112,13
MEM_MA_CKE011,13
5
MEM_MA0_CLK_H2
MEM_MA0_CLK_L2
MEM_MA0_CLK_H1
MEM_MA0_CLK_L1
MEM_MA0_CLK_H0
MEM_MA0_CLK_L0
MEM_MA0_CS_L1
MEM_MA0_CS_L0
MEM_MA0_ODT0
MEM_MA1_CLK_H2
MEM_MA1_CLK_L2
MEM_MA1_CLK_H1
MEM_MA1_CLK_L1
MEM_MA1_CLK_H0
MEM_MA1_CLK_L0
MEM_MA1_CS_L1
MEM_MA1_CS_L0
MEM_MA1_ODT0
MEM_MA_CAS_L
MEM_MA_WE_L
MEM_MA_RAS_L
MEM_MA_BANK2
MEM_MA_BANK1
MEM_MA_BANK0
MEM_MA_CKE1
MEM_MA_CKE0
MEM_MA_ADD15
MEM_MA_ADD14
MEM_MA_ADD13
MEM_MA_ADD12
MEM_MA_ADD11
MEM_MA_ADD10
MEM_MA_ADD9
MEM_MA_ADD8
MEM_MA_ADD7
MEM_MA_ADD6
MEM_MA_ADD5
MEM_MA_ADD4
MEM_MA_ADD3
MEM_MA_ADD2
MEM_MA_ADD1
MEM_MA_ADD0
MEM_MA_DQS_H7
MEM_MA_DQS_L7
MEM_MA_DQS_H6
MEM_MA_DQS_L6
MEM_MA_DQS_H5
MEM_MA_DQS_L5
MEM_MA_DQS_H4
MEM_MA_DQS_L4
MEM_MA_DQS_H3
MEM_MA_DQS_L3
MEM_MA_DQS_H2
MEM_MA_DQS_L2
MEM_MA_DQS_H1
MEM_MA_DQS_L1
MEM_MA_DQS_H0
MEM_MA_DQS_L0
MEM_MA_DM7
MEM_MA_DM6
MEM_MA_DM5
MEM_MA_DM4
MEM_MA_DM3
MEM_MA_DM2
MEM_MA_DM1
MEM_MA_DM0
MEM_MA_DQS_L[7..0]
MEM_MA_DQS_H[7..0]
MEM_MA_DM[7..0]
MEM_MA_ADD[15..0]
MEM_MA_DATA[63..0] MEM_MB_DATA[63..0]
CPU1B
CPU1B
AG21
MA0_CLK_H(2)
AG20
MA0_CLK_L(2)
G19
MA0_CLK_H(1)
H19
MA0_CLK_L(1)
U27
MA0_CLK_H(0)
U26
MA0_CLK_L(0)
AC25
MA0_CS_L(1)
AA24
MA0_CS_L(0)
AC28
MA0_ODT(0)
AE20
MA1_CLK_H(2)
AE19
MA1_CLK_L(2)
G20
MA1_CLK_H(1)
G21
MA1_CLK_L(1)
V27
MA1_CLK_H(0)
W27
MA1_CLK_L(0)
AD27
MA1_CS_L(1)
AA25
MA1_CS_L(0)
AC27
MA1_ODT(0)
AB25
MA_CAS_L
AB27
MA_WE_L
AA26
MA_RAS_L
N25
MA_BANK(2)
Y27
MA_BANK(1)
AA27
MA_BANK(0)
L27
MA_CKE(1)
M25
MA_CKE(0)
M27
MA_ADD(15)
N24
MA_ADD(14)
AC26
MA_ADD(13)
N26
MA_ADD(12)
P25
MA_ADD(11)
Y25
MA_ADD(10)
N27
MA_ADD(9)
R24
MA_ADD(8)
P27
MA_ADD(7)
R25
MA_ADD(6)
R26
MA_ADD(5)
R27
MA_ADD(4)
T25
MA_ADD(3)
U25
MA_ADD(2)
T27
MA_ADD(1)
W24
MA_ADD(0)
AD15
MA_DQS_H(7)
AE15
MA_DQS_L(7)
AG18
MA_DQS_H(6)
AG19
MA_DQS_L(6)
AG24
MA_DQS_H(5)
AG25
MA_DQS_L(5)
AG27
MA_DQS_H(4)
AG28
MA_DQS_L(4)
D29
MA_DQS_H(3)
C29
MA_DQS_L(3)
C25
MA_DQS_H(2)
D25
MA_DQS_L(2)
E19
MA_DQS_H(1)
F19
MA_DQS_L(1)
F15
MA_DQS_H(0)
G15
MA_DQS_L(0)
AF15
MA_DM(7)
AF19
MA_DM(6)
AJ25
MA_DM(5)
AH29
MA_DM(4)
B29
MA_DM(3)
E24
MA_DM(2)
E18
MA_DM(1)
H15
MA_DM(0)
ZIF-SOCK940-RH-1
ZIF-SOCK940-RH-1
4
MA_DATA(63)
MA_DATA(62)
MA_DATA(61)
MA_DATA(60)
MA_DATA(59)
MA_DATA(58)
MA_DATA(57)
MA_DATA(56)
MA_DATA(55)
MA_DATA(54)
MA_DATA(53)
MA_DATA(52)
MA_DATA(51)
MA_DATA(50)
MA_DATA(49)
MA_DATA(48)
MA_DATA(47)
MA_DATA(46)
MA_DATA(45)
MA_DATA(44)
MA_DATA(43)
MA_DATA(42)
MA_DATA(41)
MA_DATA(40)
MA_DATA(39)
MA_DATA(38)
MA_DATA(37)
MA_DATA(36)
MA_DATA(35)
MA_DATA(34)
MA_DATA(33)
MA_DATA(32)
MA_DATA(31)
MA_DATA(30)
MA_DATA(29)
MA_DATA(28)
MA_DATA(27)
MA_DATA(26)
MA_DATA(25)
MA_DATA(24)
MA_DATA(23)
MA_DATA(22)
MA_DATA(21)
MA_DATA(20)
MA_DATA(19)
MA_DATA(18)
MA_DATA(17)
MA_DATA(16)
MA_DATA(15)
MA_DATA(14)
MA_DATA(13)
MA_DATA(12)
MA_DATA(11)
MA_DATA(10)
MA_DATA(9)
MA_DATA(8)
MA_DATA(7)
MA_DATA(6)
MA_DATA(5)
MA_DATA(4)
MA_DATA(3)
MA_DATA(2)
MA_DATA(1)
MA_DATA(0)
MA_DQS_H(8)
MA_DQS_L(8)
MA_CHECK(7)
MA_CHECK(6)
MA_CHECK(5)
MA_CHECK(4)
MA_CHECK(3)
MA_CHECK(2)
MA_CHECK(1)
MA_CHECK(0)
4
MA_DM(8)
AE14
AG14
AG16
AD17
AD13
AE13
AG15
AE16
AG17
AE18
AD21
AG22
AE17
AF17
AF21
AE21
AF23
AE23
AJ26
AG26
AE22
AG23
AH25
AF25
AJ28
AJ29
AF29
AE26
AJ27
AH27
AG29
AF27
E29
E28
D27
C27
G26
F27
C28
E27
F25
E25
E23
D23
E26
C26
G23
F23
E22
E21
F17
G17
G22
F21
G18
E17
G16
E15
G13
H13
H17
E16
E14
G14
J28
J27
J25
K25
J26
G28
G27
L24
K27
H29
H27
MEM_MA_DATA63
MEM_MA_DATA62
MEM_MA_DATA61
MEM_MA_DATA60
MEM_MA_DATA59
MEM_MA_DATA58
MEM_MA_DATA57
MEM_MA_DATA56
MEM_MA_DATA55
MEM_MA_DATA54
MEM_MA_DATA53
MEM_MA_DATA52
MEM_MA_DATA51
MEM_MA_DATA50
MEM_MA_DATA49
MEM_MA_DATA48
MEM_MA_DATA47
MEM_MA_DATA46
MEM_MA_DATA45
MEM_MA_DATA44
MEM_MA_DATA43
MEM_MA_DATA42
MEM_MA_DATA41
MEM_MA_DATA40
MEM_MA_DATA39
MEM_MA_DATA38
MEM_MA_DATA37
MEM_MA_DATA36
MEM_MA_DATA35
MEM_MA_DATA34
MEM_MA_DATA33
MEM_MA_DATA32
MEM_MA_DATA31
MEM_MA_DATA30
MEM_MA_DATA29
MEM_MA_DATA28
MEM_MA_DATA27
MEM_MA_DATA26
MEM_MA_DATA25
MEM_MA_DATA24
MEM_MA_DATA23
MEM_MA_DATA22
MEM_MA_DATA21
MEM_MA_DATA20
MEM_MA_DATA19
MEM_MA_DATA18
MEM_MA_DATA17
MEM_MA_DATA16
MEM_MA_DATA15
MEM_MA_DATA14
MEM_MA_DATA13
MEM_MA_DATA12
MEM_MA_DATA11
MEM_MA_DATA10
MEM_MA_DATA9
MEM_MA_DATA8
MEM_MA_DATA7
MEM_MA_DATA6
MEM_MA_DATA5
MEM_MA_DATA4
MEM_MA_DATA3
MEM_MA_DATA2
MEM_MA_DATA1
MEM_MA_DATA0
3
MEM_MB_DQS_L[7..0]11,12
MEM_MB_DQS_H[7..0]11,12
MEM_MB_DM[7..0]11,12
MEM_MB_ADD[15..0]11,12,13
MEM_MB0_CLK_H211,13
MEM_MB0_CLK_L211,13
MEM_MB0_CLK_H111,13
MEM_MB0_CLK_L111,13
MEM_MB0_CLK_H011,13
MEM_MB0_CLK_L011,13
MEM_MB0_CS_L111,13
MEM_MB0_CS_L011,13
MEM_MB0_ODT011,13
MEM_MB1_CLK_H212,13
MEM_MB1_CLK_L212,13
MEM_MB1_CLK_H112,13
MEM_MB1_CLK_L112,13
MEM_MB1_CLK_H012,13
MEM_MB1_CLK_L012,13
MEM_MB1_CS_L112,13
MEM_MB1_CS_L012,13
MEM_MB1_ODT012,13
MEM_MB_CAS_L11,12,13
MEM_MB_WE_L11,12,13
MEM_MB_RAS_L11,12,13
MEM_MB_BANK211,12,13
MEM_MB_BANK111,12,13
MEM_MB_BANK011,12,13
MEM_MB_CKE112,13
MEM_MB_CKE011,13
3
MEM_MB_DQS_L[7..0]
MEM_MB_DQS_H[7..0]
MEM_MB_DM[7..0]
MEM_MB_ADD[15..0]
MEM_MB0_CLK_H2
MEM_MB0_CLK_L2
MEM_MB0_CLK_H1
MEM_MB0_CLK_L1
MEM_MB0_CLK_H0
MEM_MB0_CLK_L0
MEM_MB0_CS_L1
MEM_MB0_CS_L0
MEM_MB0_ODT0
MEM_MB1_CLK_H2
MEM_MB1_CLK_L2
MEM_MB1_CLK_H1
MEM_MB1_CLK_L1
MEM_MB1_CLK_H0
MEM_MB1_CLK_L0
MEM_MB1_CS_L1
MEM_MB1_CS_L0
MEM_MB1_ODT0
MEM_MB_CAS_L
MEM_MB_WE_L
MEM_MB_RAS_L
MEM_MB_BANK2
MEM_MB_BANK1
MEM_MB_BANK0
MEM_MB_CKE1
MEM_MB_CKE0
MEM_MB_ADD15
MEM_MB_ADD14
MEM_MB_ADD13
MEM_MB_ADD12
MEM_MB_ADD11
MEM_MB_ADD10
MEM_MB_ADD9
MEM_MB_ADD8
MEM_MB_ADD7
MEM_MB_ADD6
MEM_MB_ADD5
MEM_MB_ADD4
MEM_MB_ADD3
MEM_MB_ADD2
MEM_MB_ADD1
MEM_MB_ADD0
MEM_MB_DQS_H7
MEM_MB_DQS_L7
MEM_MB_DQS_H6
MEM_MB_DQS_L6
MEM_MB_DQS_H5
MEM_MB_DQS_L5
MEM_MB_DQS_H4
MEM_MB_DQS_L4
MEM_MB_DQS_H3
MEM_MB_DQS_L3
MEM_MB_DQS_H2
MEM_MB_DQS_L2
MEM_MB_DQS_H1
MEM_MB_DQS_L1
MEM_MB_DQS_H0
MEM_MB_DQS_L0
MEM_MB_DM7
MEM_MB_DM6
MEM_MB_DM5
MEM_MB_DM4
MEM_MB_DM3
MEM_MB_DM2
MEM_MB_DM1
MEM_MB_DM0
2
CPU1C
CPU1C
AJ19
MB0_CLK_H(2)
AK19
MB0_CLK_L(2)
A18
MB0_CLK_H(1)
A19
MB0_CLK_L(1)
U31
MB0_CLK_H(0)
U30
MB0_CLK_L(0)
AE30
MB0_CS_L(1)
AC31
MB0_CS_L(0)
AD29
MB0_ODT(0)
AL19
MB1_CLK_H(2)
AL18
MB1_CLK_L(2)
C19
MB1_CLK_H(1)
D19
MB1_CLK_L(1)
W29
MB1_CLK_H(0)
W28
MB1_CLK_L(0)
AE29
MB1_CS_L(1)
AB31
MB1_CS_L(0)
AD31
MB1_ODT(0)
AC29
MB_CAS_L
AC30
MB_WE_L
AB29
MB_RAS_L
N31
MB_BANK(2)
AA31
MB_BANK(1)
AA28
MB_BANK(0)
M31
MB_CKE(1)
M29
MB_CKE(0)
N28
MB_ADD(15)
N29
MB_ADD(14)
AE31
MB_ADD(13)
N30
MB_ADD(12)
P29
MB_ADD(11)
AA29
MB_ADD(10)
P31
MB_ADD(9)
R29
MB_ADD(8)
R28
MB_ADD(7)
R31
MB_ADD(6)
R30
MB_ADD(5)
T31
MB_ADD(4)
T29
MB_ADD(3)
U29
MB_ADD(2)
U28
MB_ADD(1)
AA30
MB_ADD(0)
AK13
MB_DQS_H(7)
AJ13
MB_DQS_L(7)
AK17
MB_DQS_H(6)
AJ17
MB_DQS_L(6)
AK23
MB_DQS_H(5)
AL23
MB_DQS_L(5)
AL28
MB_DQS_H(4)
AL29
MB_DQS_L(4)
D31
MB_DQS_H(3)
C31
MB_DQS_L(3)
C24
MB_DQS_H(2)
C23
MB_DQS_L(2)
D17
MB_DQS_H(1)
C17
MB_DQS_L(1)
C14
MB_DQS_H(0)
C13
MB_DQS_L(0)
AJ14
MB_DM(7)
AH17
MB_DM(6)
AJ23
MB_DM(5)
AK29
MB_DM(4)
C30
MB_DM(3)
A23
MB_DM(2)
B17
MB_DM(1)
B13
MB_DM(0)
ZIF-SOCK940-RH-1
ZIF-SOCK940-RH-1
2
MB_DATA(63)
MB_DATA(62)
MB_DATA(61)
MB_DATA(60)
MB_DATA(59)
MB_DATA(58)
MB_DATA(57)
MB_DATA(56)
MB_DATA(55)
MB_DATA(54)
MB_DATA(53)
MB_DATA(52)
MB_DATA(51)
MB_DATA(50)
MB_DATA(49)
MB_DATA(48)
MB_DATA(47)
MB_DATA(46)
MB_DATA(45)
MB_DATA(44)
MB_DATA(43)
MB_DATA(42)
MB_DATA(41)
MB_DATA(40)
MB_DATA(39)
MB_DATA(38)
MB_DATA(37)
MB_DATA(36)
MB_DATA(35)
MB_DATA(34)
MB_DATA(33)
MB_DATA(32)
MB_DATA(31)
MB_DATA(30)
MB_DATA(29)
MB_DATA(28)
MB_DATA(27)
MB_DATA(26)
MB_DATA(25)
MB_DATA(24)
MB_DATA(23)
MB_DATA(22)
MB_DATA(21)
MB_DATA(20)
MB_DATA(19)
MB_DATA(18)
MB_DATA(17)
MB_DATA(16)
MB_DATA(15)
MB_DATA(14)
MB_DATA(13)
MB_DATA(12)
MB_DATA(11)
MB_DATA(10)
MB_DATA(9)
MB_DATA(8)
MB_DATA(7)
MB_DATA(6)
MB_DATA(5)
MB_DATA(4)
MB_DATA(3)
MB_DATA(2)
MB_DATA(1)
MB_DATA(0)
MB_DQS_H(8)
MB_DQS_L(8)
MB_DM(8)
MB_CHECK(7)
MB_CHECK(6)
MB_CHECK(5)
MB_CHECK(4)
MB_CHECK(3)
MB_CHECK(2)
MB_CHECK(1)
MB_CHECK(0)
AH13
AL13
AL15
AJ15
AF13
AG13
AL14
AK15
AL16
AL17
AK21
AL21
AH15
AJ16
AH19
AL20
AJ22
AL22
AL24
AK25
AJ21
AH21
AH23
AJ24
AL27
AK27
AH31
AG30
AL25
AL26
AJ30
AJ31
E31
E30
B27
A27
F29
F31
A29
A28
A25
A24
C22
D21
A26
B25
B23
A22
B21
A20
C16
D15
C21
A21
A17
A16
B15
A14
E13
F13
C15
A15
A13
D13
J31
J30
J29
K29
K31
G30
G29
L29
L28
H31
G31
Title
Title
Title
Document Number
Document Number
Document Number
MICRO-STAR INT'L CO.,LTD.
MICRO-STAR INT'L CO.,LTD.
MICRO-STAR INT'L CO.,LTD.
No. 69, Li-De St, Jung-He City,
No. 69, Li-De St, Jung-He City,
No. 69, Li-De St, Jung-He City,
Taipei Hsien, Taiwan
Taipei Hsien, Taiwan
Taipei Hsien, Taiwan
http://www.msi.com.tw
http://www.msi.com.tw
http://www.msi.com.tw
MEM_MB_DATA63
MEM_MB_DATA62
MEM_MB_DATA61
MEM_MB_DATA60
MEM_MB_DATA59
MEM_MB_DATA58
MEM_MB_DATA57
MEM_MB_DATA56
MEM_MB_DATA55
MEM_MB_DATA54
MEM_MB_DATA53
MEM_MB_DATA52
MEM_MB_DATA51
MEM_MB_DATA50
MEM_MB_DATA49
MEM_MB_DATA48
MEM_MB_DATA47
MEM_MB_DATA46
MEM_MB_DATA45
MEM_MB_DATA44
MEM_MB_DATA43
MEM_MB_DATA42
MEM_MB_DATA41
MEM_MB_DATA40
MEM_MB_DATA39
MEM_MB_DATA38
MEM_MB_DATA37
MEM_MB_DATA36
MEM_MB_DATA35
MEM_MB_DATA34
MEM_MB_DATA33
MEM_MB_DATA32
MEM_MB_DATA31
MEM_MB_DATA30
MEM_MB_DATA29
MEM_MB_DATA28
MEM_MB_DATA27
MEM_MB_DATA26
MEM_MB_DATA25
MEM_MB_DATA24
MEM_MB_DATA23
MEM_MB_DATA22
MEM_MB_DATA21
MEM_MB_DATA20
MEM_MB_DATA19
MEM_MB_DATA18
MEM_MB_DATA17
MEM_MB_DATA16
MEM_MB_DATA15
MEM_MB_DATA14
MEM_MB_DATA13
MEM_MB_DATA12
MEM_MB_DATA11
MEM_MB_DATA10
MEM_MB_DATA9
MEM_MB_DATA8
MEM_MB_DATA7
MEM_MB_DATA6
MEM_MB_DATA5
MEM_MB_DATA4
MEM_MB_DATA3
MEM_MB_DATA2
MEM_MB_DATA1
MEM_MB_DATA0
Micro Star Restricted Secret
Micro Star Restricted Secret
Micro Star Restricted Secret
K9 M2 DDR MEMORY I/F
K9 M2 DDR MEMORY I/F
K9 M2 DDR MEMORY I/F
MS-7552
MS-7552
MS-7552
1
1
Last Revision Date:
Last Revision Date:
Last Revision Date:
Wednesday, June 18, 2008
Wednesday, June 18, 2008
Wednesday, June 18, 2008
Sheet
Sheet
Sheet
939
939
939
Rev
Rev
Rev
0A
0A
0A
of
of
of
5
VCCP_NB
VCCP
D D
VCCP_NB
C C
B B
A4
A6
AA8
AA10
AA12
AA14
AA16
AA18
AB7
AB9
AB11
AC4
AC5
AC8
AC10
AD2
AD3
AD7
AD9
AE10
AF7
AF9
AG4
AG5
AG7
AH2
AH3
B3
B5
B7
C2
C4
C6
C8
D3
D5
D7
D9
E4
E6
E8
E10
F5
F7
F9
F11
G6
G8
G10
G12
H7
H11
H23
J8
J12
J14
J16
J18
J20
J22
J24
K7
K9
K11
K13
K15
K17
K19
K21
K23
L4
L5
L8
L10
L12
Y17
Y19
ZIF-SOCK940-RH-1
ZIF-SOCK940-RH-1
CPU1F
CPU1F
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
A3
VSS
A7
VSS
A9
VSS
A11
VSS
AA4
VSS
AA5
VSS
AA7
VSS
AA9
VSS
AA11
VSS
AA13
VSS
AA15
VSS
AA17
VSS
AA19
VSS
AA21
VSS
AA23
VSS
AB2
VSS
AB3
VSS
AB8
VSS
AB10
VSS
AB12
VSS
AB14
VSS
AB16
VSS
AB18
VSS
AB20
VSS
AB22
VSS
AC7
VSS
AC9
VSS
AC11
VSS
AC13
VSS
AC15
VSS
AC17
VSS
AC19
VSS
AC21
VSS
AC23
VSS
AD8
VSS
AD10
VSS
AD12
VSS
AD14
VSS
AD16
VSS
AD20
VSS
AD22
VSS
AD24
VSS
AE4
VSS
AE5
VSS
AE9
VSS
AE11
VSS
AF2
VSS
AF3
VSS
AF8
VSS
AF10
VSS
AF12
VSS
AF14
VSS
AF16
VSS
AF18
VSS
AF20
VSS
AF22
VSS
AF24
VSS
AF26
VSS
AF28
VSS
AG10
VSS
AG11
VSS
AH14
VSS
AH16
VSS
AH18
VSS
AH20
VSS
AH22
VSS
AH24
VSS
AH26
VSS
AH28
VSS
AH30
VSS
AK2
VSS
AK14
VSS
AK16
VSS
AK18
VSS
Y14
VSS
Y16
VSS
VCCP
CPU1G
CPU1G
L14
VDD
L16
VDD
L18
VDD
M2
VDD
M3
VDD
M7
VDD
M9
VDD
M11
VDD
M13
VDD
M15
VDD
M17
VDD
M19
VDD
N8
VDD
N10
VDD
N12
VDD
N14
VDD
N16
VDD
N18
VDD
P7
VDD
P9
VDD
P11
VDD
P13
VDD
P15
VDD
P17
VDD
P19
VDD
R4
VDD
R5
VDD
R8
VDD
R10
VDD
R12
VDD
R14
VDD
R16
VDD
R18
VDD
R20
VDD
T2
VDD
T3
VDD
T7
VDD
T9
VDD
T11
VDD
T13
VDD
T15
VDD
T17
VDD
T19
VDD
T21
VDD
U8
VDD
U10
VDD
U12
VDD
U14
VDD
U16
VDD
U18
VDD
U20
VDD
V9
VDD
V11
VDD
V13
VDD
V15
VDD
V17
VDD
V19
VDD
V21
VDD
W4
VDD
W5
VDD
W8
VDD
W10
VDD
W12
VDD
W14
VDD
W16
VDD
W18
VDD
W20
VDD
Y2
VDD
Y3
VDD
Y7
VDD
Y9
VDD
Y11
VDD
Y13
VDD
Y15
VDD
Y21
VDD
ZIF-SOCK940-RH-1
ZIF-SOCK940-RH-1
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
N12-9400050-L06
VTT_DDR
C256
C254
C254
C274
C274
C67
C67
4.7u/10v/Y5/8
X_0.22u/16v/X7/6
X_0.22u/16v/X7/6
C110
C110
0.22u/16v/X7/6
0.22u/16v/X7/6
4.7u/10v/Y5/8
X_4.7u/10v/Y5/8
X_4.7u/10v/Y5/8
X_0.22u/16v/X7/6
X_0.22u/16v/X7/6
A A
VTT_DDR
C115
C115
X_0.22u/16v/X7/6
X_0.22u/16v/X7/6
X_4.7u/10v/Y5/8
X_4.7u/10v/Y5/8
C102
C102
4.7u/10v/Y5/8
4.7u/10v/Y5/8
5
C92
C92
X_180p/50v/N/4
X_180p/50v/N/4
C81
C81
X_180p/50v/N/4
X_180p/50v/N/4
C70
C70
180p/50v/N/4
180p/50v/N/4
C66
C66
X_180p/50v/N/4
X_180p/50v/N/4
C264
C264
X_1000p/50v/X7/6
X_1000p/50v/X7/6
C85
C85
X_1000p/50v/X7/6
X_1000p/50v/X7/6
C266
C266
C314
C314
C256
X_1000p/50v/X7/6
X_1000p/50v/X7/6
C291
C291
X_1000p/50v/X7/6
X_1000p/50v/X7/6
AK20
AK22
AK24
AK26
AK28
AK30
AL5
B4
B9
B11
B14
B16
B18
B20
B22
B24
B26
B28
B30
C3
D14
D16
D18
D20
D22
D24
D26
D28
D30
E11
F4
F14
F16
F18
F20
F22
F24
F26
F28
F30
G9
G11
H8
H10
H12
H14
H16
H18
H22
H24
H26
H28
H30
J4
J5
J7
J9
J11
J13
J15
J17
J19
J21
J23
K2
K3
K8
K10
K12
K14
K16
K18
K20
K22
Y18
4
VCCP
C249
C249
0.22u/16v/X7/6
0.22u/16v/X7/6
VCC_DDR VCC3
C276
C276
X_0.01u/16v/X7/4
X_0.01u/16v/X7/4
4
AA20
AA22
AB13
AB15
AB17
AB19
AB21
AB23
AC12
AC14
AC16
AC18
AC20
AC22
AD11
AD23
AE12
AF11
L20
L22
M21
M23
N20
N22
P21
P23
R22
T23
U22
V23
W22
Y23
1
2
3
4
5
6
7
8
ZIF-SOCK940-RH-1
ZIF-SOCK940-RH-1
3
VTT_DDR
VCC_DDR
0.22u/16v/X7/6_B
0.22u/16v/X7/6_B
VCCP
C715
C715
VCCA_1V2
VCCP
C719
C719
C695
C695
X_22u/6.3v/X5/1206_B
X_22u/6.3v/X5/1206_B
CPU1H
CPU1H
N17
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
1
2
3
4
5
6
7
8
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
N19
N21
N23
P2
P3
P8
P10
P12
P14
P16
P18
P20
P22
R7
R9
R11
R13
R15
R17
R19
R21
R23
T8
T10
T12
T14
T16
T18
T20
T22
U4
U5
U7
U9
U11
U13
U15
U17
U19
U21
U23
V2
V3
V10
V12
V14
V16
V18
V20
V22
W9
W11
W13
W15
W17
W19
W21
W23
Y8
Y10
Y12
W7
Y20
Y22
10u/10v/X5/1206_B
10u/10v/X5/1206_B
BOTTOM
+
+
C696
C696
4.7u/10v/Y5/8_B
4.7u/10v/Y5/8_B
C705
C705
X_4.7u/10v/Y5/8_B
X_4.7u/10v/Y5/8_B
12
AJ4
AJ3
AJ2
AJ1
D12
C12
B12
A12
AB24
AB26
AB28
AB30
AC24
AD26
AD28
AD30
AF30
M24
M26
M28
M30
P24
P26
P28
P30
T24
T26
T28
T30
V25
V26
V28
V30
Y24
Y26
Y28
Y29
X_0.1u/25v/Y5/4
X_0.1u/25v/Y5/4
BOTTOM
C723
C723
X_0.22u/16v/X7/6_B
X_0.22u/16v/X7/6_B
C708
C708
X_10u/10v/X5/1206_B
X_10u/10v/X5/1206_B
EC25
EC25
560u/4V/8*9/O
560u/4V/8*9/O
3
CPU1I
CPU1I
VLDT_A1
VLDT_A2
VLDT_A3
VLDT_A4
VTT
VTT
VTT
VTT
VDDIO
VDDIO
VDDIO
VDDIO
VDDIO
VDDIO
VDDIO
VDDIO
VDDIO
VDDIO
VDDIO
VDDIO
VDDIO
VDDIO
VDDIO
VDDIO
VDDIO
VDDIO
VDDIO
VDDIO
VDDIO
VDDIO
VDDIO
VDDIO
VDDIO
VDDIO
VDDIO
VDDIO
VDDIO
ZIF-SOCK940-RH-1
ZIF-SOCK940-RH-1
For EMI
C221
C221
X_0.1u/25v/Y5/4
X_0.1u/25v/Y5/4
C712
C712
X_0.22u/16v/X7/6_B
X_0.22u/16v/X7/6_B
C692
C692
22u/6.3v/X5/1206_B
22u/6.3v/X5/1206_B
VCC_DDRVCC_DDR
10u/10v/X5/1206_B
10u/10v/X5/1206_B
H6
VLDT_B1
H5
VLDT_B2
H2
VLDT_B3
H1
VLDT_B4
AK12
VTT
AJ12
VTT
AH12
VTT
AG12
VTT
AL12
VTT
K24
VSS
K26
VSS
K28
VSS
K30
VSS
L7
VSS
L9
VSS
L11
VSS
L13
VSS
L15
VSS
L17
VSS
L19
VSS
L21
VSS
L23
VSS
M8
VSS
M10
VSS
M12
VSS
M14
VSS
M16
VSS
M18
VSS
M20
VSS
M22
VSS
N4
VSS
N5
VSS
N7
VSS
N9
VSS
N11
VSS
N13
VSS
N15
VSS
C257
C257
C689
C689
0.01u/50v/X7/6_B
0.01u/50v/X7/6_B
C697
C697
10u/10v/X5/1206_B
10u/10v/X5/1206_B
C711
C711
10u/10v/X5/1206_B
10u/10v/X5/1206_B
VCC_DDR
X_0.1u/25v/Y5/4
X_0.1u/25v/Y5/4
180p/50v/N/4_B
180p/50v/N/4_B
C688
C688
X_4.7u/10v/Y5/8
X_4.7u/10v/Y5/8
VLDT_RUN_B
VTT_DDR
C156
C156
0.1u/25v/Y5/4
0.1u/25v/Y5/4
C690
C690
BOTTOM
C701
C701
X_10u/10v/X5/1206_B
X_10u/10v/X5/1206_B
C208
C208
4.7u/10v/Y5/8
4.7u/10v/Y5/8
4.7u/10v/Y5/8
4.7u/10v/Y5/8
C125
C125
X_0.22u/16v/X7/6
X_0.22u/16v/X7/6
C151
C151
VCCPVCC_DDR
BOTTOM
C691
C691
X_2.2u/6.3v/X5/6_B
X_2.2u/6.3v/X5/6_B
C694
C694
X_10u/10v/X5/1206_B
X_10u/10v/X5/1206_B
C233
C233
C159
C159
0.22u/16v/X7/6
0.22u/16v/X7/6
C143
C143
0.01u/50v/Y5/6
0.01u/50v/Y5/6
VCCP_NB
VCCP_NB
22u/6.3v/X5/1206
22u/6.3v/X5/1206
VCCP_NB
0.1u/25v/Y5/4
0.1u/25v/Y5/4
10u/10v/X5/1206_B
10u/10v/X5/1206_B
X_0.22u/16v/X7/6
X_0.22u/16v/X7/6
C140
C140
X_0.01u/50v/Y5/6
X_0.01u/50v/Y5/6
C124
C124
X_0.22u/16v/X7/6
X_0.22u/16v/X7/6
C122
C122
X_22u/6.3v/X5/1206
X_22u/6.3v/X5/1206
C687
C687
22u/6.3v/X5/1206_B
22u/6.3v/X5/1206_B
C252
C252
X_0.1u/25v/Y5/4
X_0.1u/25v/Y5/4
C722
C722
X_2.2u/6.3v/X5/6_B
X_2.2u/6.3v/X5/6_B
C704
C704
10u/10v/X5/1206_B
10u/10v/X5/1206_B
C155
C155
C237
C237
X_0.01u/50v/X7/6
X_0.01u/50v/X7/6
2
C137
C137
C135
C135
X_0.01u/50v/Y5/6
X_0.01u/50v/Y5/6
C103
C103
X_0.22u/16v/X7/6
X_0.22u/16v/X7/6
C123
C123
X_10u/10v/X5/1206
X_10u/10v/X5/1206
C253
C253
VCCPVCCP_NB
C698
C698
10u/10v/X5/1206_B
10u/10v/X5/1206_B
C716
C716
X_10u/10v/X5/1206_B
X_10u/10v/X5/1206_B
2
C126
C126
0.01u/50v/X7/6_B
0.01u/50v/X7/6_B
C74
C74
C213
C213
X_0.1u/25v/Y5/4
X_0.1u/25v/Y5/4
C121
C121
X_2.2u/6.3v/X5/6
X_2.2u/6.3v/X5/6
C693
C693
C225
C225
180p/50v/N/4
180p/50v/N/4
C71
C71
X_10u/10v/X5/1206
X_10u/10v/X5/1206
VCC_DDR
CPU1E
CPU1E
L25
L26
L31
L30
W26
W25
AE27
U24
V24
AE28
Y31
Y30
AG31
V31
W31
AF31
ZIF-SOCK940-RH-1
ZIF-SOCK940-RH-1
C244
C244
0.1u/25v/Y5/4
0.1u/25v/Y5/4
RSVD1
RSVD2
RSVD3
RSVD4
RSVD5
RSVD6
RSVD7
RSVD8
RSVD9
RSVD10
RSVD11
RSVD12
RSVD13
RSVD14
RSVD15
RSVD16
C218
C218
0.1u/25v/Y5/4
0.1u/25v/Y5/4
C217
C217
0.1u/25v/Y5/4
0.1u/25v/Y5/4
C216
C216
0.1u/25v/Y5/4
0.1u/25v/Y5/4
RSVD17
RSVD18
RSVD19
RSVD20
RSVD21
RSVD22
RSVD23
RSVD24
RSVD25
RSVD26
RSVD27
RSVD28
RSVD29
RSVD30
RSVD31
RSVD32
RSVD33
RSVD34
RSVD35
RSVD36
RSVD37
RSVD38
1
E20
B19
ALERT_L
AL4
CPU_SA0
AK4
AK3
F2
F3
G4
G3
CPU_CORE_TYPE
G5
R104 300R0402R104 300R0402
AD25
AE24
AE25
AJ18
AJ20
C18
C20
G24
G25
H25
V29
W30
Micro Star Restricted Secret
Micro Star Restricted Secret
Micro Star Restricted Secret
Title
Title
Title
K9 M2 PWR & GND
K9 M2 PWR & GND
K9 M2 PWR & GND
Document Number
Document Number
Document Number
MICRO-STAR INT'L CO.,LTD.
MICRO-STAR INT'L CO.,LTD.
MICRO-STAR INT'L CO.,LTD.
No. 69, Li-De St, Jung-He City,
No. 69, Li-De St, Jung-He City,
No. 69, Li-De St, Jung-He City,
Taipei Hsien, Taiwan
Taipei Hsien, Taiwan
Taipei Hsien, Taiwan
http://www.msi.com.tw
http://www.msi.com.tw
http://www.msi.com.tw
1
VCC_DDR
R223
R223
X_1KR0402
X_1KR0402
R218 0R0402R218 0R0402
TP5TP5
NB_VSEN 6
NB_GND 6
CPU_CORE_TYPE 6
MS-7552
MS-7552
MS-7552
VCC_DDR
Last Revision Date:
Last Revision Date:
Last Revision Date:
Wednesday, June 18, 2008
Wednesday, June 18, 2008
Wednesday, June 18, 2008
Sheet
Sheet
Sheet
10 39
10 39
10 39
Rev
Rev
Rev
0A
0A
0A
of
of
of
5
MEM_MA_DQS_H[7..0]9,12
MEM_MA_DQS_L[7..0]9,12
MEM_MA_DM[7..0]9,12
MEM_MA_ADD[15..0]9,12,13
MEM_MA_DATA[63..0]9,12
D D
MEM_MA_DATA0
MEM_MA_DATA1
MEM_MA_DATA2
MEM_MA_DATA3
MEM_MA_DATA4
MEM_MA_DATA5
MEM_MA_DATA6
MEM_MA_DATA7
MEM_MA_DATA8
MEM_MA_DATA9
MEM_MA_DATA10
MEM_MA_DATA11
MEM_MA_DATA12
MEM_MA_DATA13
MEM_MA_DATA14
MEM_MA_DATA15
MEM_MA_DATA16
MEM_MA_DATA17
MEM_MA_DATA18
MEM_MA_DATA19
MEM_MA_DATA20
MEM_MA_DATA21
MEM_MA_DATA22
MEM_MA_DATA23
C C
B B
A A
MEM_MA_DATA24
MEM_MA_DATA25
MEM_MA_DATA26
MEM_MA_DATA27
MEM_MA_DATA28
MEM_MA_DATA29
MEM_MA_DATA30
MEM_MA_DATA31
MEM_MA_DATA32
MEM_MA_DATA33
MEM_MA_DATA34
MEM_MA_DATA35
MEM_MA_DATA36
MEM_MA_DATA37
MEM_MA_DATA38
MEM_MA_DATA39
MEM_MA_DATA40
MEM_MA_DATA41
MEM_MA_DATA42
MEM_MA_DATA43
MEM_MA_DATA44
MEM_MA_DATA45
MEM_MA_DATA46
MEM_MA_DATA47
MEM_MA_DATA48
MEM_MA_DATA49
MEM_MA_DATA50
MEM_MA_DATA51
MEM_MA_DATA52
MEM_MA_DATA53
MEM_MA_DATA54
MEM_MA_DATA55
MEM_MA_DATA56
MEM_MA_DATA57
MEM_MA_DATA58
MEM_MA_DATA59
MEM_MA_DATA60
MEM_MA_DATA61
MEM_MA_DATA62
MEM_MA_DATA63
MEM_MA_DQS_H[7..0]
MEM_MA_DQS_L[7..0]
MEM_MA_DM[7..0]
MEM_MA_ADD[15..0]
MEM_MA_DATA[63..0]
DIMM1
DIMM1
55
3
DQ0
4
DQ1
9
DQ2
10
DQ3
122
DQ4
123
DQ5
128
DQ6
129
DQ7
12
DQ8
13
DQ9
21
DQ10
22
DQ11
131
DQ12
132
DQ13
140
DQ14
141
DQ15
24
DQ16
25
DQ17
30
DQ18
31
DQ19
143
DQ20
144
DQ21
149
DQ22
150
DQ23
33
DQ24
34
DQ25
39
DQ26
40
DQ27
152
DQ28
153
DQ29
158
DQ30
159
DQ31
80
DQ32
81
DQ33
86
DQ34
87
DQ35
199
DQ36
200
DQ37
205
DQ38
206
DQ39
89
DQ40
90
DQ41
95
DQ42
96
DQ43
208
DQ44
209
DQ45
214
DQ46
215
DQ47
98
DQ48
99
DQ49
107
DQ50
108
DQ51
217
DQ52
218
DQ53
226
DQ54
227
DQ55
110
DQ56
111
DQ57
116
DQ58
117
DQ59
229
DQ60
230
DQ61
235
DQ62
236
DQ63
2
VSS
5
VSS
8
VSS
11
VSS
14
VSS
17
VSS
20
VSS
23
VSS
26
VSS
29
VSS
32
VSS
35
VSS
38
VSS
41
VSS
44
VSS
47
VSS
50
VSS
65
VSS
66
VSS
79
VSS
82
VSS
85
VSS
88
VSS
91
VSS
94
VSS
97
VSS
VSS
100
RC118RC0
VSS
103
VCC_DDR
19
102
NC1
NC/TEST
VSS
VSS
106
109
68
NC2
VDD51VDD56VDD62VDD72VDD78VDD
VSS
VSS
VSS
112
115
118
VCC3
170
197
172
187
184
189
67
VDDQ53VDDQ59VDDQ64VDDQ
VSS
VSS
VSS
151
154
157
160
VDDQ
VDDQ
VDDQ69VDDQ
VSS
VSS
VSS
VSS
163
166
169
198
VDDQ
VSS
178
VDDQ
VDDQ
VSS
VSS
VSS
201
204
207
191
194
181
175
75
VDD
VDD
VDD
VDD
VDDQ
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
121
124
VSS
127
130
133
136
139
142
145
148
VSS
210
238
VDDSPD
VSS
213
216
CB042CB143CB248CB349CB4
VSS
VSS
VSS
VSS
219
222
225
4
C303
C303
X_C0.1u16Y0402
X_C0.1u16Y0402
161
162
167
168
CB5
CB6
DQS0
DQS0#
DQS1
DQS1#
DQS2
DQS2#
DQS3
DQS3#
DQS4
DQS4#
DQS5
DQS5#
DQS6
DQS6#
DQS7
DQS7#
DQS8
DQS8#
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10_AP
A11
A12
A13
A14
A15
A16/BA2
BA1
BA0
WE#
CAS#
RAS#
DM0/DQS9
NC/DQS9#
DM1/DQS10
NC/DQS10#
DM2/DQS11
NC/DQS11#
DM3/DQS12
NC/DQS12#
DM4/DQS13
NC/DQS13#
DM5/DQS14
NC/DQS14#
DM6/DQS15
NC/DQS15#
DM7/DQS16
NC/DQS16#
DM8/DQS17
NC/DQS17#
ODT0
ODT1
CKE0
CKE1
CS0#
CS1#
CK0(DU)
CK0#(DU)
CK1(CK0)
CK1#(CK0#)
CK2(DU)
CK2#(DU)
SCL
SDA
VREF
SA0
SA1
SA2
VSS
VSS
VSS
VSS
DDRII-240_ORANG-RH
DDRII-240_ORANG-RH
228
231
234
237
3
MEM_MB_DQS_H[7..0]9,12
MEM_MB_DQS_L[7..0]9,12
MEM_MB_DM[7..0]9,12
MEM_MB_ADD[15..0]9,12,13
MEM_MB_DATA[63..0]9,12
DIMM2
DIMM2
19
55
MEM_MB_DATA0
MEM_MB_DATA1
CB7
MEM_MA_DQS_H0
7
MEM_MA_DQS_L0
6
MEM_MA_DQS_H1
16
MEM_MA_DQS_L1
15
MEM_MA_DQS_H2
28
MEM_MA_DQS_L2
27
MEM_MA_DQS_H3
37
MEM_MA_DQS_L3
36
MEM_MA_DQS_H4
84
MEM_MA_DQS_L4
83
MEM_MA_DQS_H5
93
MEM_MA_DQS_L5
92
MEM_MA_DQS_H6
105
MEM_MA_DQS_L6
104
MEM_MA_DQS_H7
114
MEM_MA_DQS_L7
113
46
45
MEM_MA_ADD0
188
MEM_MA_ADD1
183
MEM_MA_ADD2
63
MEM_MA_ADD3
182
MEM_MA_ADD4
61
MEM_MA_ADD5
60
MEM_MA_ADD6
180
MEM_MA_ADD7
58
MEM_MA_ADD8
179
MEM_MA_ADD9
177
MEM_MA_ADD10
70
MEM_MA_ADD11
57
MEM_MA_ADD12
176
MEM_MA_ADD13
196
MEM_MA_ADD14
174
MEM_MA_ADD15
173
MEM_MA_BANK2
X1
X2
X3
54
190
71
73
74
192
125
126
134
135
146
147
155
156
202
203
211
212
223
224
232
233
164
165
195
77
52
171
MEM_MA0_CS_L0
193
MEM_MA0_CS_L1
76
MEM_MA0_CLK_H0
185
MEM_MA0_CLK_L0
186
MEM_MA0_CLK_H1
137
MEM_MA0_CLK_L1
138
MEM_MA0_CLK_H2
220
MEM_MA0_CLK_L2
221
120
119
1
X1
239
240
101
X2
X3
MEM_MA_BANK1
MEM_MA_BANK0
MEM_MA_WE_L
MEM_MA_CAS_L
MEM_MA_RAS_L
MEM_MA0_ODT0
MEM_MA_CKE0
SCL0
SDA0
MEM_MA_BANK2 9,12,13
MEM_MA_BANK1 9,12,13
MEM_MA_BANK0 9,12,13
MEM_MA_WE_L 9,12,13
MEM_MA_CAS_L 9,12,13
MEM_MA_RAS_L 9,12,13
MEM_MA_DM0
MEM_MA_DM1
MEM_MA_DM2
MEM_MA_DM3
MEM_MA_DM4
MEM_MA_DM5
MEM_MA_DM6
MEM_MA_DM7
MEM_MA0_ODT0 9,13
MEM_MA_CKE0 9,13
MEM_MA0_CS_L0 9,13
MEM_MA0_CS_L1 9,13
MEM_MA0_CLK_H0 9,13
MEM_MA0_CLK_L0 9,13
MEM_MA0_CLK_H1 9,13
MEM_MA0_CLK_L1 9,13
MEM_MA0_CLK_H2 9,13
MEM_MA0_CLK_L2 9,13
SCL0 6,7,12,21,24,34
SDA0 6,7,12,21,24,34
VDDR_VREF VDDR_VREF
VDDR_VREF
C51
C51
C0.1u16Y0402
C0.1u16Y0402
R75
R75
15R1%
15R1%
R74
R74
15R1%
15R1%
SCL0
SDA0
VCC_DDR
VDDR_VREF
X_0.1u/25v/Y5/4
X_0.1u/25v/Y5/4
VCC3
Y
D21
D21
X_1PS226_SOT23
X_1PS226_SOT23
Z
X
VCC3
Y
D20
D20
X_1PS226_SOT23
X_1PS226_SOT23
Z
X
VDDR_VREF
C45
C45
C54
C54
0.1u/25v/Y5/4
0.1u/25v/Y5/4
MEM_MB_DATA2
MEM_MB_DATA3
MEM_MB_DATA4
MEM_MB_DATA5
MEM_MB_DATA6
MEM_MB_DATA7
MEM_MB_DATA8
MEM_MB_DATA9
MEM_MB_DATA10
MEM_MB_DATA11
MEM_MB_DATA12
MEM_MB_DATA13
MEM_MB_DATA14
MEM_MB_DATA15
MEM_MB_DATA16
MEM_MB_DATA17
MEM_MB_DATA18
MEM_MB_DATA19
MEM_MB_DATA20
MEM_MB_DATA21
MEM_MB_DATA22
MEM_MB_DATA23
MEM_MB_DATA24
MEM_MB_DATA25
MEM_MB_DATA26
MEM_MB_DATA27
MEM_MB_DATA28
MEM_MB_DATA29
MEM_MB_DATA30
MEM_MB_DATA31
MEM_MB_DATA32
MEM_MB_DATA33
MEM_MB_DATA34
MEM_MB_DATA35
MEM_MB_DATA36
MEM_MB_DATA37
MEM_MB_DATA38
MEM_MB_DATA39
MEM_MB_DATA40
MEM_MB_DATA41
MEM_MB_DATA42
MEM_MB_DATA43
MEM_MB_DATA44
MEM_MB_DATA45
MEM_MB_DATA46
MEM_MB_DATA47
MEM_MB_DATA48
MEM_MB_DATA49
MEM_MB_DATA50
MEM_MB_DATA51
MEM_MB_DATA52
MEM_MB_DATA53
MEM_MB_DATA54
MEM_MB_DATA55
MEM_MB_DATA56
MEM_MB_DATA57
MEM_MB_DATA58
MEM_MB_DATA59
MEM_MB_DATA60
MEM_MB_DATA61
MEM_MB_DATA62
MEM_MB_DATA63
102
3
NC1
RC118RC0
DQ0
4
DQ1
9
NC/TEST
DQ2
10
DQ3
122
DQ4
123
DQ5
128
DQ6
129
DQ7
12
DQ8
13
DQ9
21
DQ10
22
DQ11
131
DQ12
132
DQ13
140
DQ14
141
DQ15
24
DQ16
25
DQ17
30
DQ18
31
DQ19
143
DQ20
144
DQ21
149
DQ22
150
DQ23
33
DQ24
34
DQ25
39
DQ26
40
DQ27
152
DQ28
153
DQ29
158
DQ30
159
DQ31
80
DQ32
81
DQ33
86
DQ34
87
DQ35
199
DQ36
200
DQ37
205
DQ38
206
DQ39
89
DQ40
90
DQ41
95
DQ42
96
DQ43
208
DQ44
209
DQ45
214
DQ46
215
DQ47
98
DQ48
99
DQ49
107
DQ50
108
DQ51
217
DQ52
218
DQ53
226
DQ54
227
DQ55
110
DQ56
111
DQ57
116
DQ58
117
DQ59
229
DQ60
230
DQ61
235
DQ62
236
DQ63
2
VSS
5
VSS
8
VSS
11
VSS
14
VSS
17
VSS
20
VSS
23
VSS
26
VSS
29
VSS
32
VSS
35
VSS
38
VSS
41
VSS
44
VSS
47
VSS
50
VSS
65
VSS
66
VSS
79
VSS
82
VSS
85
VSS
88
VSS
91
VSS
94
VSS
97
VSS
VSS
VSS
VSS
VSS
100
103
106
109
MEM_MB_DQS_H[7..0]
MEM_MB_DQS_L[7..0]
MEM_MB_DM[7..0]
MEM_MB_ADD[15..0]
MEM_MB_DATA[63..0]
VCC_DDR
68
75
NC2
VDD51VDD56VDD62VDD72VDD78VDD
VDD
VSS
VSS
VSS
VSS
VSS
VSS
VSS
112
115
118
121
124
127
130
2
VCC3
172
187
184
VDDQ
VDDQ
VDDQ
VDDQ69VDDQ
VSS
VSS
VSS
VSS
163
166
169
198
238
189
67
178
CB042CB143CB248CB349CB4
VDDQ
VDDQ
VDDSPD
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
201
VSS
204
207
210
213
216
219
222
225
228
170
197
191
194
181
175
VDD
VDD
VDD
VDDQ
VDDQ53VDDQ59VDDQ64VDDQ
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
133
136
VSS
139
142
145
148
151
154
157
160
C637
C637
C0.1u16Y0402
C0.1u16Y0402
161
162
167
168
CB5
CB6
CB7
DQS0
DQS0#
DQS1
DQS1#
DQS2
DQS2#
DQS3
DQS3#
DQS4
DQS4#
DQS5
DQS5#
DQS6
DQS6#
DQS7
DQS7#
DQS8
DQS8#
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10_AP
A11
A12
A13
A14
A15
A16/BA2
BA1
BA0
WE#
CAS#
RAS#
DM0/DQS9
NC/DQS9#
DM1/DQS10
NC/DQS10#
DM2/DQS11
NC/DQS11#
DM3/DQS12
NC/DQS12#
DM4/DQS13
NC/DQS13#
DM5/DQS14
NC/DQS14#
DM6/DQS15
NC/DQS15#
DM7/DQS16
NC/DQS16#
DM8/DQS17
NC/DQS17#
ODT0
ODT1
CKE0
CKE1
CS0#
CS1#
CK0(DU)
CK0#(DU)
CK1(CK0)
CK1#(CK0#)
CK2(DU)
CK2#(DU)
SCL
SDA
VREF
X1
SA0
SA1
SA2
X2
X3
VSS
VSS
VSS
VSS
DDRII-240_ORANGE-RH
DDRII-240_ORANGE-RH
231
234
237
7
6
16
15
28
27
37
36
84
83
93
92
105
104
114
113
46
45
188
183
63
182
61
60
180
58
179
177
70
57
176
196
174
173
MEM_MB_BANK2
54
MEM_MB_BANK1
190
MEM_MB_BANK0
71
MEM_MB_WE_L
73
MEM_MB_CAS_L
74
MEM_MB_RAS_L
192
125
126
134
135
146
147
155
156
202
203
211
212
223
224
232
233
164
165
195
77
52
171
MEM_MB0_CS_L0
193
MEM_MB0_CS_L1
76
MEM_MB0_CLK_H0
185
MEM_MB0_CLK_L0
186
MEM_MB0_CLK_H1
137
MEM_MB0_CLK_L1
138
MEM_MB0_CLK_H2
220
MEM_MB0_CLK_L2
221
120
119
1
X1
239
240
101
X2
X3
MEM_MB_DQS_H0
MEM_MB_DQS_L0
MEM_MB_DQS_H1
MEM_MB_DQS_L1
MEM_MB_DQS_H2
MEM_MB_DQS_L2
MEM_MB_DQS_H3
MEM_MB_DQS_L3
MEM_MB_DQS_H4
MEM_MB_DQS_L4
MEM_MB_DQS_H5
MEM_MB_DQS_L5
MEM_MB_DQS_H6
MEM_MB_DQS_L6
MEM_MB_DQS_H7
MEM_MB_DQS_L7
MEM_MB_ADD0
MEM_MB_ADD1
MEM_MB_ADD2
MEM_MB_ADD3
MEM_MB_ADD4
MEM_MB_ADD5
MEM_MB_ADD6
MEM_MB_ADD7
MEM_MB_ADD8
MEM_MB_ADD9
MEM_MB_ADD10
MEM_MB_ADD11
MEM_MB_ADD12
MEM_MB_ADD13
MEM_MB_ADD14
MEM_MB_ADD15
MEM_MB_DM0
MEM_MB_DM1
MEM_MB_DM2
MEM_MB_DM3
MEM_MB_DM4
MEM_MB_DM5
MEM_MB_DM6
MEM_MB_DM7
MEM_MB0_ODT0
MEM_MB_CKE0
MEM_MB_CKE0
SCL0
SDA0
VCC3
1
MEM_MB_BANK2 9,12,13
MEM_MB_BANK1 9,12,13
MEM_MB_BANK0 9,12,13
MEM_MB_WE_L 9,12,13
MEM_MB_CAS_L 9,12,13
MEM_MB_RAS_L 9,12,13
MEM_MB0_ODT0 9,13
MEM_MB_CKE0 9,13
MEM_MB0_CS_L0 9,13
MEM_MB0_CS_L1 9,13
MEM_MB0_CLK_H0 9,13
MEM_MB0_CLK_L0 9,13
MEM_MB0_CLK_H1 9,13
MEM_MB0_CLK_L1 9,13
MEM_MB0_CLK_H2 9,13
MEM_MB0_CLK_L2 9,13
SCL0 6,7,12,21,24,34
SDA0 6,7,12,21,24,34
VDDR_VREF
C57
C57
C0.1u16Y0402
C0.1u16Y0402
Micro Star Restricted Secret
Micro Star Restricted Secret
ADDRESS A0
5
4
3
ADDRESS A2
2
Micro Star Restricted Secret
Title
Title
Title
FIRST LOGICAL DDR DIMM
FIRST LOGICAL DDR DIMM
FIRST LOGICAL DDR DIMM
Document Number
Document Number
Document Number
MICRO-STAR INT'L CO.,LTD.
MICRO-STAR INT'L CO.,LTD.
MICRO-STAR INT'L CO.,LTD.
No. 69, Li-De St, Jung-He City,
No. 69, Li-De St, Jung-He City,
No. 69, Li-De St, Jung-He City,
Taipei Hsien, Taiwan
Taipei Hsien, Taiwan
Taipei Hsien, Taiwan
http://www.msi.com.tw
http://www.msi.com.tw
http://www.msi.com.tw
1
MS-7552
MS-7552
MS-7552
Last Revision Date:
Last Revision Date:
Last Revision Date:
Wednesday, June 18, 2008
Wednesday, June 18, 2008
Wednesday, June 18, 2008
Sheet
Sheet
Sheet
11 40
11 40
11 40
Rev
Rev
Rev
0A
0A
0A
of
of
of
5
MEM_MA_DQS_H[7..0]9,11
MEM_MA_DQS_L[7..0]9,11
MEM_MA_DM[7..0]9,11
MEM_MA_ADD[15..0]9,11,13
MEM_MA_DATA[63..0]9,11
MEM_MA_DQS_H[7..0]
MEM_MA_DQS_L[7..0]
MEM_MA_DM[7..0]
MEM_MA_ADD[15..0]
MEM_MA_DATA[63..0]
VCC3
4
3
MEM_MB_DQS_L[7..0]9,11
MEM_MB_DQS_H[7..0]9,11
MEM_MB_DM[7..0]9,11
MEM_MB_ADD[15..0]9,11,13
MEM_MB_DATA[63..0]9,11
MEM_MB_DQS_L[7..0]
MEM_MB_DQS_H[7..0]
MEM_MB_DM[7..0]
MEM_MB_ADD[15..0]
MEM_MB_DATA[63..0]
2
VCC3
1
D D
DIMM3
DIMM3
MEM_MA_DATA0
MEM_MA_DATA1
MEM_MA_DATA2
MEM_MA_DATA3
MEM_MA_DATA4
MEM_MA_DATA5
MEM_MA_DATA6
MEM_MA_DATA7
MEM_MA_DATA8
MEM_MA_DATA9
MEM_MA_DATA10
MEM_MA_DATA11
MEM_MA_DATA12
MEM_MA_DATA13
MEM_MA_DATA14
MEM_MA_DATA15
MEM_MA_DATA16
MEM_MA_DATA17
MEM_MA_DATA18
MEM_MA_DATA19
MEM_MA_DATA20
MEM_MA_DATA21
MEM_MA_DATA22
MEM_MA_DATA23
C C
MEM_MA_DATA24
MEM_MA_DATA25
MEM_MA_DATA26
MEM_MA_DATA27
MEM_MA_DATA28
MEM_MA_DATA29
MEM_MA_DATA30
MEM_MA_DATA31
MEM_MA_DATA32
MEM_MA_DATA33
MEM_MA_DATA34
MEM_MA_DATA35
MEM_MA_DATA36
MEM_MA_DATA37
MEM_MA_DATA38
MEM_MA_DATA39
MEM_MA_DATA40
MEM_MA_DATA41
MEM_MA_DATA42
MEM_MA_DATA43
MEM_MA_DATA44
MEM_MA_DATA45
MEM_MA_DATA46
MEM_MA_DATA47
MEM_MA_DATA48
MEM_MA_DATA49
MEM_MA_DATA50
MEM_MA_DATA51
MEM_MA_DATA52
MEM_MA_DATA53
MEM_MA_DATA54
MEM_MA_DATA55
MEM_MA_DATA56
MEM_MA_DATA57
B B
MEM_MA_DATA58
MEM_MA_DATA59
MEM_MA_DATA60
MEM_MA_DATA61
MEM_MA_DATA62
MEM_MA_DATA63
A A
10
122
123
128
129
12
13
21
22
131
132
140
141
24
25
30
31
143
144
149
150
33
34
39
40
152
153
158
159
80
81
86
87
199
200
205
206
89
90
95
96
208
209
214
215
98
99
107
108
217
218
226
227
110
111
116
117
229
230
235
236
11
14
17
20
23
26
29
32
35
38
41
44
47
50
65
66
79
82
85
88
91
94
97
VCC_DDR
68
19
55
102
3
4
9
2
5
8
DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQ8
DQ9
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
DQ16
DQ17
DQ18
DQ19
DQ20
DQ21
DQ22
DQ23
DQ24
DQ25
DQ26
DQ27
DQ28
DQ29
DQ30
DQ31
DQ32
DQ33
DQ34
DQ35
DQ36
DQ37
DQ38
DQ39
DQ40
DQ41
DQ42
DQ43
DQ44
DQ45
DQ46
DQ47
DQ48
DQ49
DQ50
DQ51
DQ52
DQ53
DQ54
DQ55
DQ56
DQ57
DQ58
DQ59
DQ60
DQ61
DQ62
DQ63
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
NC2
NC1
RC118RC0
VDD51VDD56VDD62VDD72VDD78VDD
NC/TEST
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
100
103
106
109
112
115
118
121
124
127
170
197
172
187
184
189
67
VSS
154
VSS
VSS
157
160
VDDQ
VDDQ
VDDQ
VDDQ69VDDQ
VSS
VSS
VSS
VSS
163
166
169
198
178
VDDQ
VDDQ
VSS
VSS
VSS
201
204
207
191
194
181
175
75
VDD
VDD
VDD
VDD
VDDQ
VDDQ53VDDQ59VDDQ64VDDQ
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
130
133
136
139
142
145
148
151
C168
C168
C0.1u16Y0402
C0.1u16Y0402
DIMM4
161
162
167
CB042CB143CB248CB349CB4
VSS
VSS
219
222
225
A16/BA2
DM0/DQS9
NC/DQS9#
DM1/DQS10
NC/DQS10#
DM2/DQS11
NC/DQS11#
DM3/DQS12
NC/DQS12#
DM4/DQS13
NC/DQS13#
DM5/DQS14
NC/DQS14#
DM6/DQS15
NC/DQS15#
DM7/DQS16
NC/DQS16#
DM8/DQS17
NC/DQS17#
CK0(DU)
CK0#(DU)
CK1(CK0)
CK1#(CK0#)
CK2(DU)
CK2#(DU)
VSS
VSS
VSS
228
231
234
CB5
DQS0#
DQS1#
DQS2#
DQS3#
DQS4#
DQS5#
DQS6#
DQS7#
DQS8#
A10_AP
VSS
168
CB6
CB7
7
DQS0
6
16
DQS1
15
28
DQS2
27
37
DQS3
36
84
DQS4
83
93
DQS5
92
105
DQS6
104
114
DQS7
113
46
DQS8
45
188
A0
183
A1
63
A2
182
A3
61
A4
60
A5
180
A6
58
A7
179
A8
177
A9
70
57
A11
176
A12
196
A13
174
A14
173
A15
54
190
BA1
71
BA0
73
WE#
74
CAS#
192
RAS#
125
126
134
135
146
147
155
156
202
203
211
212
223
224
232
233
164
165
195
ODT0
77
ODT1
52
CKE0
171
CKE1
193
CS0#
76
CS1#
185
186
137
138
220
221
120
SCL
119
SDA
1
VREF
X1
X1
239
SA0
240
SA1
101
SA2
X2
X2
X3
X3
VSS
DDRII-240_GREEN-RH
DDRII-240_GREEN-RH
237
MEM_MA_DQS_H0
MEM_MA_DQS_L0
MEM_MA_DQS_H1
MEM_MA_DQS_L1
MEM_MA_DQS_H2
MEM_MA_DQS_L2
MEM_MA_DQS_H3
MEM_MA_DQS_L3
MEM_MA_DQS_H4
MEM_MA_DQS_L4
MEM_MA_DQS_H5
MEM_MA_DQS_L5
MEM_MA_DQS_H6
MEM_MA_DQS_L6
MEM_MA_DQS_H7
MEM_MA_DQS_L7
MEM_MA_ADD0
MEM_MA_ADD1
MEM_MA_ADD2
MEM_MA_ADD3
MEM_MA_ADD4
MEM_MA_ADD5
MEM_MA_ADD6
MEM_MA_ADD7
MEM_MA_ADD8
MEM_MA_ADD9
MEM_MA_ADD10
MEM_MA_ADD11
MEM_MA_ADD12
MEM_MA_ADD13
MEM_MA_ADD14
MEM_MA_ADD15
MEM_MA_BANK2
MEM_MA_BANK1
MEM_MA_BANK0
MEM_MA_WE_L
MEM_MA_CAS_L
MEM_MA_RAS_L
MEM_MA_DM0
MEM_MA_DM1
MEM_MA_DM2
MEM_MA_DM3
MEM_MA_DM4
MEM_MA_DM5
MEM_MA_DM6
MEM_MA_DM7
MEM_MA1_ODT0
MEM_MA_CKE1
MEM_MA1_CS_L0
MEM_MA1_CS_L1
MEM_MA1_CLK_H0
MEM_MA1_CLK_L0
MEM_MA1_CLK_H1
MEM_MA1_CLK_L1
MEM_MA1_CLK_H2
MEM_MA1_CLK_L2
SCL0
SDA0
MEM_MB_DATA0
MEM_MB_DATA1
MEM_MB_DATA2
MEM_MB_DATA3
MEM_MB_DATA4
MEM_MB_DATA5
MEM_MB_DATA6
MEM_MB_DATA7
MEM_MB_DATA8
MEM_MB_DATA9
MEM_MB_DATA10
MEM_MB_DATA11
MEM_MB_DATA12
MEM_MB_DATA13
MEM_MB_DATA14
MEM_MB_DATA15
MEM_MB_DATA16
MEM_MB_DATA17
MEM_MB_DATA18
MEM_MB_DATA19
MEM_MB_DATA20
MEM_MB_DATA21
MEM_MB_DATA22
MEM_MB_DATA23
MEM_MB_DATA24
MEM_MB_DATA25
MEM_MB_DATA26
MEM_MB_DATA27
MEM_MB_DATA28
MEM_MB_DATA29
MEM_MB_DATA30
MEM_MB_DATA31
MEM_MB_DATA32
MEM_MB_DATA33
MEM_MB_DATA34
MEM_MB_DATA35
MEM_MB_DATA36
MEM_MA_BANK2 9,11,13
MEM_MA_BANK1 9,11,13
MEM_MA_BANK0 9,11,13
MEM_MA_WE_L 9,11,13
MEM_MA_CAS_L 9,11,13
MEM_MA_RAS_L 9,11,13
MEM_MA1_ODT0 9,13
MEM_MA_CKE1 9,13
MEM_MA1_CS_L0 9,13
MEM_MA1_CS_L1 9,13
MEM_MA1_CLK_H0 9,13
MEM_MA1_CLK_L0 9,13
MEM_MA1_CLK_H1 9,13
MEM_MA1_CLK_L1 9,13
MEM_MA1_CLK_H2 9,13
MEM_MA1_CLK_L2 9,13
SCL0 6,7,11,21,24,34
SDA0 6,7,11,21,24,34
VDDR_VREF VDDR_VREF
C52
VCC3 VCC3
C52
C0.1u16Y0402
C0.1u16Y0402
MEM_MB_DATA37
MEM_MB_DATA38
MEM_MB_DATA39
MEM_MB_DATA40
MEM_MB_DATA41
MEM_MB_DATA42
MEM_MB_DATA43
MEM_MB_DATA44
MEM_MB_DATA45
MEM_MB_DATA46
MEM_MB_DATA47
MEM_MB_DATA48
MEM_MB_DATA49
MEM_MB_DATA50
MEM_MB_DATA51
MEM_MB_DATA52
MEM_MB_DATA53
MEM_MB_DATA54
MEM_MB_DATA55
MEM_MB_DATA56
MEM_MB_DATA57
MEM_MB_DATA58
MEM_MB_DATA59
MEM_MB_DATA60
MEM_MB_DATA61
MEM_MB_DATA62
MEM_MB_DATA63
238
VDDSPD
VSS
VSS
VSS
210
213
216
DIMM4
10
122
123
128
129
12
13
21
22
131
132
140
141
24
25
30
31
143
144
149
150
33
34
39
40
152
153
158
159
80
81
86
87
199
200
205
206
89
90
95
96
208
209
214
215
98
99
107
108
217
218
226
227
110
111
116
117
229
230
235
236
11
14
17
20
23
26
29
32
35
38
41
44
47
50
65
66
79
82
85
88
91
94
97
VCC_DDR
68
19
55
102
3
DQ0
4
DQ1
9
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQ8
DQ9
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
DQ16
DQ17
DQ18
DQ19
DQ20
DQ21
DQ22
DQ23
DQ24
DQ25
DQ26
DQ27
DQ28
DQ29
DQ30
DQ31
DQ32
DQ33
DQ34
DQ35
DQ36
DQ37
DQ38
DQ39
DQ40
DQ41
DQ42
DQ43
DQ44
DQ45
DQ46
DQ47
DQ48
DQ49
DQ50
DQ51
DQ52
DQ53
DQ54
DQ55
DQ56
DQ57
DQ58
DQ59
DQ60
DQ61
DQ62
DQ63
2
VSS
5
VSS
8
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
NC2
NC1
RC118RC0
VDD51VDD56VDD62VDD72VDD78VDD
NC/TEST
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
100
103
106
109
112
115
118
121
124
170
197
172
187
184
189
67
VSS
154
VSS
VSS
157
160
163
178
VDDQ
VDDQ
VDDQ
VDDQ69VDDQ
VSS
VSS
VSS
VSS
VSS
166
169
198
201
VDDQ
VDDQ
VSS
VSS
204
207
191
194
181
175
75
VDD
VDD
VDD
VDD
VDDQ
VDDQ53VDDQ59VDDQ64VDDQ
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
127
130
133
136
139
142
145
148
151
C657
C657
C0.1u16Y0402
C0.1u16Y0402
161
162
167
CB042CB143CB248CB349CB4
VSS
VSS
219
222
225
DM0/DQS9
NC/DQS9#
DM1/DQS10
NC/DQS10#
DM2/DQS11
NC/DQS11#
DM3/DQS12
NC/DQS12#
DM4/DQS13
NC/DQS13#
DM5/DQS14
NC/DQS14#
DM6/DQS15
NC/DQS15#
DM7/DQS16
NC/DQS16#
DM8/DQS17
NC/DQS17#
CK0#(DU)
CK1(CK0)
CK1#(CK0#)
CK2#(DU)
VSS
VSS
VSS
228
231
CB5
DQS0#
DQS1#
DQS2#
DQS3#
DQS4#
DQS5#
DQS6#
DQS7#
DQS8#
A10_AP
A16/BA2
CK0(DU)
CK2(DU)
VSS
234
168
CB6
CB7
7
DQS0
6
16
DQS1
15
28
DQS2
27
37
DQS3
36
84
DQS4
83
93
DQS5
92
105
DQS6
104
114
DQS7
113
46
DQS8
45
188
A0
183
A1
63
A2
182
A3
61
A4
60
A5
180
A6
58
A7
179
A8
177
A9
70
57
A11
176
A12
196
A13
174
A14
173
A15
MEM_MB_BANK2
54
MEM_MB_BANK1
190
BA1
MEM_MB_BANK0
71
BA0
MEM_MB_WE_L
73
WE#
MEM_MB_CAS_L
74
CAS#
MEM_MB_RAS_L
192
RAS#
125
126
134
135
146
147
155
156
202
203
211
212
223
224
232
233
164
165
195
ODT0
77
ODT1
52
CKE0
171
CKE1
193
CS0#
76
CS1#
185
186
137
138
220
221
120
SCL
119
SDA
1
VREF
X1
X1
239
SA0
240
SA1
101
SA2
X2
X2
X3
X3
VSS
DDRII-240_ORANGE-RH
DDRII-240_ORANGE-RH
237
MEM_MB_DQS_H0
MEM_MB_DQS_L0
MEM_MB_DQS_H1
MEM_MB_DQS_L1
MEM_MB_DQS_H2
MEM_MB_DQS_L2
MEM_MB_DQS_H3
MEM_MB_DQS_L3
MEM_MB_DQS_H4
MEM_MB_DQS_L4
MEM_MB_DQS_H5
MEM_MB_DQS_L5
MEM_MB_DQS_H6
MEM_MB_DQS_L6
MEM_MB_DQS_H7
MEM_MB_DQS_L7
MEM_MB_ADD0
MEM_MB_ADD1
MEM_MB_ADD2
MEM_MB_ADD3
MEM_MB_ADD4
MEM_MB_ADD5
MEM_MB_ADD6
MEM_MB_ADD7
MEM_MB_ADD8
MEM_MB_ADD9
MEM_MB_ADD10
MEM_MB_ADD11
MEM_MB_ADD12
MEM_MB_ADD13
MEM_MB_ADD14
MEM_MB_ADD15
MEM_MB_DM0
MEM_MB_DM1
MEM_MB_DM2
MEM_MB_DM3
MEM_MB_DM4
MEM_MB_DM5
MEM_MB_DM6
MEM_MB_DM7
MEM_MB1_ODT0
MEM_MB_CKE1
MEM_MB1_CS_L0
MEM_MB1_CS_L1
MEM_MB1_CLK_H0
MEM_MB1_CLK_L0
MEM_MB1_CLK_H1
MEM_MB1_CLK_L1
MEM_MB1_CLK_H2
MEM_MB1_CLK_L2
SCL0
SDA0
MEM_MB_BANK2 9,11,13
MEM_MB_BANK1 9,11,13
MEM_MB_BANK0 9,11,13
MEM_MB_WE_L 9,11,13
MEM_MB_CAS_L 9,11,13
MEM_MB_RAS_L 9,11,13
MEM_MB1_ODT0 9,13
MEM_MB_CKE1 9,13
MEM_MB1_CS_L0 9,13
MEM_MB1_CS_L1 9,13
MEM_MB1_CLK_H0 9,13
MEM_MB1_CLK_L0 9,13
MEM_MB1_CLK_H1 9,13
MEM_MB1_CLK_L1 9,13
MEM_MB1_CLK_H2 9,13
MEM_MB1_CLK_L2 9,13
C49
C49
C0.1u16Y0402
C0.1u16Y0402
238
VDDSPD
VSS
VSS
VSS
210
213
216
Micro Star Restricted Secret
Micro Star Restricted Secret
Micro Star Restricted Secret
Title
Title
Title
SECOND LOGICAL DDR DIMM
SECOND LOGICAL DDR DIMM
SECOND LOGICAL DDR DIMM
Document Number
Document Number
ADDRESS A6ADDRESS A4
5
4
3
2
Document Number
MICRO-STAR INT'L CO.,LTD.
MICRO-STAR INT'L CO.,LTD.
MICRO-STAR INT'L CO.,LTD.
No. 69, Li-De St, Jung-He City,
No. 69, Li-De St, Jung-He City,
No. 69, Li-De St, Jung-He City,
Taipei Hsien, Taiwan
Taipei Hsien, Taiwan
Taipei Hsien, Taiwan
http://www.msi.com.tw
http://www.msi.com.tw
http://www.msi.com.tw
MS-7552
MS-7552
MS-7552
1
Last Revision Date:
Last Revision Date:
Last Revision Date:
Wednesday, June 18, 2008
Wednesday, June 18, 2008
Wednesday, June 18, 2008
Sheet
Sheet
Sheet
12 40
12 40
12 40
Rev
Rev
Rev
0A
0A
0A
of
of
of
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