MSI MS-7541 Schematics
5
CONTENT SHEET
4
3
2
1
Cover Sheet, Block diagram
Intel LGA775 CPU - Signals/ Power/ GND
D D
Intel Eaglelake - FSB, PCIE, DMI
Intel Eaglelake - VGA, MSIC
Intel Eaglelake - Memory DDR3
Intel Eaglelake - Power / GND
ICH10 - PCI, USB, DMI, PCIE
ICH10 - Host, DMI, SATA, Audio, SPI, RTC, MSIC 12
ICH10 - Power, GND
DDR3 Chanel-A / Chanel-B
C C
Clock Gen - IDTCV184
Super I/O Fintek F71882
VGA
SATA / e-SATA / FAN Control
LAN Intel82567 (OPT1-vPro)
LAN Realtek RTL8111C(PCIE)
Audio Codec ALC888S
PCIE x16, x1
B B
DVI transfer & switch
PCI Slot 1 & 2
1-2
3-5
6
7
8
9-10
11
13
14-15
16
17
18
19
20
21
22
23
24
25
MS-7541
CPU:
System Chipset:
On Board Device:
Main Memory:
Expansion Slots:
Intel Pentium 4, Pentium D, Core2 Duo, Wolfdale,
Yorkfield processors in LGA775 Package.
Intel Eaglelake - G/P (G, P3North Bridge)
Intel ICH10 (South Bridge)
CLOCK Gen -- IDTCV184
LPC Super I/O -- Fintek F71882F
LAN -- LAN Intel 82567
LAN -- Realtek 8111C (PCIE)
HD Audio Codec -- ALC888S
PCIE to DVI Interface
Dual-channel DDR-III * 4
PCI EXPRESS X16 SLOT *1
PCI EXPRESS X4 share to DVI
PCI EXPRESS X1 SLOT * 1
PCI SLOT * 2
UATX
Version: 0A
Rear/Fount USB Connector
System Power/ACPI Controller UPI
DDR3 / NB-Core Switching Power
VRD11 - ISL6334 4Phase
ATX Power-Con. / F_Panel
A A
Manual & Option Parts
Power Delivery Reset & PWROK map
Revision History
5
26-27
33-35
4
28
29
30
31
32
36
PWM:
ISL6334 4Phase
3
MICRO-STAR INT'L CO.,LTD
MICRO-STAR INT'L CO.,LTD
MICRO-STAR INT'L CO.,LTD
MS-7541-2008-03011J
MS-7541-2008-03011J
MSI
MSI
MSI
Size Document Description Rev
Size Document Description Rev
Size Document Description Rev
Custom
Custom
Custom
Date:
Thursday, March 13, 2008
Date:
Thursday, March 13, 2008
Date:
2
Thursday, March 13, 2008
MS-7541-2008-03011J
COVER SHEET
COVER SHEET
COVER SHEET
1
Sheet of
Sheet of
Sheet of
137
137
137
0A
0A
0A
5
4
3
2
1
Block Diagram
Board Stack-up
(1080 Prepreg Considerations)
D D
VRD 11
ISL6334
4-Phase PWM
PCI_E X16
Connector
DVI
Connector
PCI EXPRESS X16
PCI EXPRESS X4
Intel LGA775 Processor
FSB 800/1066/1333
FSB
Eaglelake
GMCH
DDRII
DDR3 800/1066/1333
4 DDR III
DIMM
Modules
Solder Mask
Solder Mask
PREPREG 2.7mils
CORE 50mils
PREPREG 2.7mils
1.9mils Cu plus plating
1 oz. (1.2mils)
Cu Power
Plane
1 oz. (1.2mils)
Cu GND
Plane
1.9mils Cu plus plating
C C
Analog
Video Out
PCI_E x1
SATA-II 1~6
B B
USB Port 1~12
RGB
PCI_E x1
SATA2
USB2.0
PCI_E x1
DMI
ICH10
SPI
LPC Bus
HD Audio Link
GLCI/LCI
PCI_E x1
PCI
LPC SIO
Fintek
F71882
HD Audio Codec
ALC888S
LAN
LAN Intel 82567
LAN
PCI-E RTL8111C
PCI Slot 1
PCI Slot 2
Single End 50ohm Top/Bottom : 4mils
USB2.0 - 90ohm : 15/4.5/7.5/4.5/15
SATA - 95ohm : 15/4/8/4/15
LAN - 100ohm : 15/4/8/4/15
PCIE - 95ohm : 15/4/8/4/15
A A
SPI
Flash ROM
5
SPI
Debug Port
4
Keyboard
Mouse
Floppy
3
Serial
LPT
MICRO-STAR INT'L CO.,LTD
MICRO-STAR INT'L CO.,LTD
MICRO-STAR INT'L CO.,LTD
MS-7541-2008-03011J
MS-7541-2008-03011J
MSI
MSI
MSI
Size Document Description Rev
Size Document Description Rev
Size Document Description Rev
Custom
Custom
Custom
Date:
Thursday, March 13, 2008
Date:
Thursday, March 13, 2008
Date:
2
Thursday, March 13, 2008
MS-7541-2008-03011J
BLOCK DIAGRAM
BLOCK DIAGRAM
BLOCK DIAGRAM
1
Sheet of
Sheet of
Sheet of
237
237
237
0A
0A
0A
5
H_DBI#0
H_DBI#1
H_DBI#2
H_DBI#3
H_TDI
H_TDO
H_TMS
H_TRST#
H_TCK
R882 X_0R/2R882 X_0R/2
PM_SLP_N
H_TEST_C9VTT_OUT_LEFT
R783 51R/2R783 51R/2
H_D#63
H_D#62
H_D#61
H_D#60
H_D#59
H_D#58
H_D#57
H_D#56
H_D#55
H_D#54
H_A#[3..35][6]
H_A#31
H_A#28
H_A#29
H_A#30
H_A#27
H_A#26
H_A#32
H_A#35
H_A#33
H_A#34
AJ6
AJ5
AH5
AH4
AG5
AG4
AG6
AF4
G11
D19
C20
AB2
AB3
AD3
AD1
AF1
AC1
AG1
AE1
AL1
AK1
AE8
AL2
AH2
AE6
D16
A20
AA2
G29
H30
G30
G23
B22
A22
A19
B19
B21
C21
B18
A17
B16
C18
A8
R3
M3
P3
H4
B2
C1
E3
D2
C3
C2
D4
E4
G8
G7
G5
M2
N2
P2
K3
L2
N5
C9
Y1
V2
N1
U34A
U34A
DBI0#
DBI1#
DBI2#
DBI3#
IERR#
MCERR#
FERR#/PBE#
STPCLK#
BINIT#
INIT#
RSP#
DBSY#
DRDY#
TRDY#
ADS#
LOCK#
BNR#
HIT#
HITM#
BPRI#
DEFER#
TDI
TDO
TMS
TRST#
TCK
PECI
THERMDA
THERMDC
THERMTRIP#
GND/SKTOCC#
PROCHOT#
IGNNE#
SMI#
A20M#
TESTI_13
RSVD#AH2
RESERVED0
RESERVED1
RESERVED2
RESERVED4
RESERVED5
BOOTSELECT
LL_ID0
LL_ID1
BSEL0
BSEL1
BSEL2
PWRGOOD
RESET#
D63#
D62#
D61#
D60#
D59#
D58#
D57#
D56#
D55#
D54#
B15
H_D#53
A35#
D53#
D52#
C14
H_D#52
A34#
D51#
C15
H_D#51
A33#
D50#
A14
D17
H_D#50
H_D#49
A32#
A31#
D49#
D48#
D20
H_D#48
A30#
D47#
D22
G22
H_D#47
H_D#46
A29#
A28#
D46#
D45#
E22
H_D#45
AF5
A27#
D44#
G21
H_D#44
H_D#43
D D
H_DBI#[0..3][6]
H_IERR#[4]
H_FERR#[12]
H_STPCLK#[12]
H_INIT#[12]
H_DBSY#[6]
H_DRDY#[6]
C C
H_TRMTRIP#[12]
CPU_SKTOCC#[12]
H_PROCHOT#[4,30]
B B
A A
reserve
H_TRDY#[6]
H_ADS#[6]
H_LOCK#[6]
H_BNR#[6]
H_HIT#[6]
H_HITM#[6]
H_BPRI#[6]
H_DEFER#[6]
PECI
PECI[12,17]
VTIN1
VTIN1[17]
GNDHM
GNDHM[17]
H_TRMTRIP#
CPU_SKTOCC#
H_PROCHOT#
H_IGNNE#[12]
ICH_H_SMI#[12]
H_A20M#[12]
PM_SLP_N[7]
R483 51R0402R483 51R0402
CPU_BSEL0[7,16]
CPU_BSEL1[7,16]
CPU_BSEL2[7,16]
H_PWRGD[4,12]
H_CPURST#[4,6,30]
H_D#[0..63][6]
5
4
CPU SIGNAL BLOCK
H_A#24
H_A#25
H_A#22
H_A#21
H_A#23
H_A#18
H_A#17
H_A#20
H_A#19
H_A#16
H_A#15
H_A#12
H_A#13
H_A#14
AB4
AC5
AB5
AA5
AD6
AA4
AB6
A26#
A25#
A24#
A23#
A22#
A21#
A20#Y4A19#Y6A18#W6A17#
A16#W5A15#V4A14#V5A13#U4A12#U5A11#T4A10#
D43#
D42#
D41#
D40#
D39#
D38#
D37#
D36#
D35#
D34#
D33#
D32#
D31#
D30#
F21
F20
F18
E21
H_D#42
H_D#41
E19
E18
H_D#40
H_D#39
F17
H_D#38
H_D#37
4
G17
G18
H_D#35
H_D#36
E16
E15
H_D#33
H_D#34
G16
G15
H_D#31
H_D#32
F15
G14
H_D#29
H_D#30
H_A#11
D29#
D28#
F14
H_D#28
H_A#10
H_A#9
U6
D27#
E13
G13
H_D#26
H_D#27
H_A#8
H_A#5
H_A#6
H_A#7
H_A#3
H_A#4
L5
A9#T5A8#R4A7#M4A6#L4A5#M5A4#P6A3#
D26#
D25#
D24#
D23#
D22#
D21#
F12
F11
E10
D13
D10
H_D#20
H_D#21
H_D#22
H_D#23
H_D#24
H_D#25
T88
T88
T87
T87
X_TP
X_TP
X_TP
X_TP
AC2
AN4
AN3
DBR#
VSS_SENSE
VCC_SENSE
D20#D7D19#E9D18#F9D17#F8D16#G9D15#
D11
H_D#14
H_D#15
H_D#16
H_D#17
H_D#18
H_D#19
VID5
VID7
VID6
AJ3
AK3
AM7
AM5
AN6
AN5
VID6
ITP_CLK1
ITP_CLK0
RSVD/VID7
VSS_MB_REGULATION
VCC_MB_REGULATION
D14#
D13#
D12#D8D11#
D10#
D9#
D8#
D7#A7D6#B7D5#B6D4#A5D3#C6D2#A4D1#C5D0#
B12
B10
A11
A10
C12
C11
H_D#6
H_D#7
H_D#8
H_D#9
H_D#10
H_D#11
H_D#12
H_D#13
3
C712
C712
X_10u/16V/12
X_10u/16V/12
VID2
VID3
VID1
VID4
VID0
AL4
AK4
AL6
AM3
AL5
AM2
VID5
VID4
VID3
VID2
VID1
VID0
VID_SELECT
GTLREF0
GTLREF1
GTLREF_SEL
GTLREF2
FC5/CPU_GTLREF2
RSVD/CPU_GTLREF3
TESTHI12
TESTHI11
TESTHI10
FORCEPH
RSVD#G6
ADSTB1#
ADSTB0#
DSTBP3#
DSTBP2#
DSTBP1#
DSTBP0#
DSTBN3#
DSTBN2#
DSTBN1#
DSTBN0#
LINT1/NMI
LINT0/INTR
B4
H_D#0
H_D#1
H_D#2
H_D#3
H_D#4
H_D#5
3
VCC_SENSE
VSS_SENSE
VID[0..7] [30]
AN7
CPU_GTLREF0
H1
CPU_GTLREF1
H2
GTLREF_SEL
H29
R622 X_0/4R622 X_0/4
E24
CPU_GTLREF2
F2
CPU_GTLREF3
G10
H_BPM#5
AG3
BPM5#
BPM4#
BPM3#
BPM2#
BPM1#
BPM0#
REQ4#
REQ3#
REQ2#
REQ1#
REQ0#
TESTHI9
TESTHI8
TESTHI7
TESTHI6
TESTHI5
TESTHI4
TESTHI3
TESTHI2
TESTHI1
TESTHI0
BCLK1#
BCLK0#
RS2#
RS1#
RS0#
AP1#
AP0#
BR0#
COMP5
COMP4
COMP3
COMP2
COMP1
COMP0
DP3#
DP2#
DP1#
DP0#
ZIF-SOCK775-15U-IN_TH
ZIF-SOCK775-15U-IN_TH
AF2
AG2
AD2
AJ1
AJ2
J6
K6
M6
J5
K4
W2
P1
H5
G4
G3
F24
G24
G26
G27
G25
F25
W3
F26
AK6
G6
G28
F28
A3
F5
B3
U3
U2
F3
T2
J2
R1
G2
T1
A13
J17
H16
H15
J16
AD5
R6
C17
G19
E12
B9
A16
G20
G12
C8
L1
K1
H_BPM#4
H_BPM#3
H_BPM#2
H_BPM#1
H_BPM#0
H_REQ#4
H_REQ#3
H_REQ#2
H_REQ#1
H_REQ#0
H_TESTHI12
DPSLP#
H_TESTHI10
H_TESTHI9
H_TESTHI8
FORCEPH
RSVD_G6
CK_H_CPU_DN
CK_H_CPU_DP
H_RS#2
H_RS#1
H_RS#0
TEST-U3
TEST-U2
H_COMP5
H_COMP4
H_COMP3
H_COMP2
H_COMP1
H_COMP0
TEST-J17
TEST-H16
TEST-H15
TEST-J16
VTT_OUT_RIGHT
R621
R621
680R/2
680R/2
H_TESTHI2_7
H_TESTHI1
H_TESTHI0
VCC_SENSE [30]
VSS_SENSE [30]
CPU_MCH_GTLREF
R474 X_0R0402R474 X_0R0402
R473 X_0R0402R473 X_0R0402
R470 X_0R0402R470 X_0R0402
R506 X_0R0402R506 X_0R0402
R624 51R/2R624 51R/2
R626 51R/2R626 51R/2
R627 X_130R1%/2R627 X_130R1%/2
R628 X_51R/2R628 X_51R/2
X_TP
X_TP
T53
T53
T54 X_TPT54 X_TP
R633 0/4R633 0/4
R634 49.9R1%0402R634 49.9R1%0402
R635 49.9R1%0402R635 49.9R1%0402
T56 X_TPT56 X_TP
X_TP
X_TP
T57
T57
X_TP
X_TP
T58
T58
X_TP
X_TP
T59
T59
H_ADSTB#1 [6]
H_ADSTB#0 [6]
H_DSTBP#3 [6]
H_DSTBP#2 [6]
H_DSTBP#1 [6]
H_DSTBP#0 [6]
H_DSTBN#3 [6]
H_DSTBN#2 [6]
H_DSTBN#1 [6]
H_DSTBN#0 [6]
H_NMI [12]
H_INTR [12]
CPU_GTLREF0 [4]
CPU_GTLREF1 [4]
X_TP
X_TP
T52
T52
CPU_MCH_GTLREF [6]
CPU_GTLREF2 [4]
CPU_GTLREF3 [4]
H_TESTHI8
H_TESTHI9
H_TEST_C9
TP_CPU_G1 [5]
H_REQ#[0..4] [6]
H_TESTHI12 [5]
DPSLP# [12]
V_FSB_VTT
VTT_OUT_LEFT
VTT_OUT_LEFT
H_FORCE# [30]
CK_H_CPU_DN [16]
CK_H_CPU_DP [16]
H_RS#[0..2] [6]
2
reserve
V_FSB_VTT
H_BR#0 [4,6]
H_COMP5_R [7,12]
2
1
PULL HIGHT PULL DOWN
RN71 8P4R-680RRN71 8P4R-680R
VID2
VID0
VID5
VID4
VID7
VID3
VID6
VID1
H_TDO
H_BPM#0
H_BPM#1
H_BPM#5
H_BPM#3
H_TRST#
H_BPM#4
H_TCK
H_TDI
H_BPM#2
H_TMS
H_TESTHI12
H_TESTHI10
H_TESTHI1
PM_SLP_N
DPSLP#
H_TESTHI9
H_TESTHI8
H_COMP1
H_COMP5
H_COMP4
H_COMP3
1
2
3
4
5
6
7
8
RN72 8P4R-680RRN72 8P4R-680R
1
2
3
4
5
6
7
8
R642 X_51R/2R642 X_51R/2
1
3
5
7
RN73 8P4R-51R/2RN73 8P4R-51R/2
1
3
5
7
RN74 8P4R-51R/2RN74 8P4R-51R/2
1
3
5
7
RN75 8P4R-51R/2RN75 8P4R-51R/2
RN76 8P4R-51R/2RN76 8P4R-51R/2
1
3
5
7
R623 51R/2R623 51R/2
R625 X_51R/2R625 X_51R/2
R502 X_51R0402R502 X_51R0402
R476 51R0402R476 51R0402
R500 51R0402R500 51R0402
R629 49.9R1%0402R629 49.9R1%0402
R630 49.9R1%0402R630 49.9R1%0402
R631 49.9R1%0402R631 49.9R1%0402
R632 49.9R1%0402R632 49.9R1%0402
2
4
6
8
2
4
6
8
2
4
6
8
2
4
6
8
VTT_OUT_RIGHT
VTT_OUT_RIGHT
C713
C713
0.1u/16V/4
0.1u/16V/4
VTT_OUT_LEFT
VTT_OUT_LEFT
Thermal TRIP
VTT_OUT_RIGHT
R785
R785
X_10K/4
X_10K/4
B
Q71
Q71
X_2N3904
X_2N3904
CE
MSI
MSI
MSI
H_PROCHOT#
THRM#[17]
R788 X_0/4R788 X_0/4
R789 0/4R789 0/4
MICRO-STAR INT'L CO.,LTD
MICRO-STAR INT'L CO.,LTD
MICRO-STAR INT'L CO.,LTD
MS-7541-2008-03011J
MS-7541-2008-03011J
Size Document Description Rev
Size Document Description Rev
Size Document Description Rev
Custom
Custom
Custom
Date:
Thursday, March 13, 2008
Date:
Thursday, March 13, 2008
Date:
Thursday, March 13, 2008
MS-7541-2008-03011J
LGA775 - Signal
LGA775 - Signal
LGA775 - Signal
1
C714
C714
0.1u/16V/4
0.1u/16V/4
VTT_OUT_RIGHT [4,5,12,13]
C715
C715
0.1u/16V/4
0.1u/16V/4
VTT_OUT_LEFT [4,5]
C716
C716
0.1u/16V/4
0.1u/16V/4
VCC3
R786
R786
10K/4/1
10K/4/1
ICH_THERM# [12]
Sheet of
Sheet of
Sheet of
337
337
337
0A
0A
0A
5
VCCP
AH11
AG9
AG8
AG30
AG29
AG28
AG27
AG26
AG25
AG22
AG21
AG19
AG18
AG15
AG14
AG12
AG11
AF9
AF8
AF22
AF21
U34B
AF19
AF18
AF15
AF14
AF12
AF11
AE9
AE23
AE22
AE21
AE19
AE18
AE15
AE14
AE12
AE11
AD8
AD30
AD29
AD28
AD27
AD26
AD25
AD24
AD23
AC8
AC30
AC29
AC28
AC27
AC26
AC25
AC24
AC23
AB8
AA8
VCCP
U34B
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCCU8VCCV8VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCCW8VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
Y8
Y30
Y23
Y24
Y25
Y26
Y27
Y28
Y29
W30
W29
W28
W27
W26
W25
W24
W23
U30
D D
C C
VCCP
AH12
VCC
VCC
U29
AH14
VCC
VCC
U28
AH15
VCC
VCC
U27
AH18
VCC
VCC
U26
AH19
VCC
VCC
U25
AH21
VCC
VCC
U24
4
AH22
VCC
U23
AH25
VCC
VCCT8VCC
AH26
VCC
VCC
T30
AH27
VCC
VCC
T29
AH28
VCC
VCC
T28
AH29
VCC
VCC
T27
AH30
VCC
VCC
T26
AH8
T25
VCC
VCC
AH9
T24
VCC
VCC
AJ11
T23
VCC
AJ12
VCC
AJ14
VCC
AJ15
VCC
VCCN8VCCP8VCCR8VCC
AJ18
N30
VCC
VCC
AJ19
N29
VCC
VCC
AJ21
N28
VCC
VCC
AJ22
N27
VCC
VCC
AJ25
N26
VCC
VCC
AJ26
N25
VCC
VCC
3
AJ8
AJ9
AK11
AK12
AK14
AK15
AK18
AK19
AK21
AK22
AK25
AK26
AK8
AK9
AL11
AL12
AL14
AL15
AL18
AL19
AL21
AL22
AL25
AL26
AL29
AL30
AL8
AL9
AM11
AM12
AM14
AM15
AM18
AM19
AM21
AM22
AM25
AM26
AM29
AM30
AM8
AM9
AN11
AN12
AN14
AN15
AN18
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VTT_OUT_RIGHT
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCCJ8VCCJ9VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCCK8VCCL8VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCCM8VCC
VCC
J10
J11
J12
J13
J14
J15
J18
J19
J20
J21
J22
J23
J24
J25
J26
J27
J28
J29
J30
K23
K24
K25
K26
K27
K28
K29
N23
N24
M27
M28
M29
M30
K30
M23
M24
M25
M26
AN9
AN8
AN30
AN29
AN26
AN19
AN21
AN22
VCC
VCC
VCC
VCC
VCCA
VSSA
VCCPLL
VCC-IOPLL
VTTPWRGD
VTT_OUT_LEFT
VTT_SEL
RSVD#F29
VCC
VCC
1122334
AN25
2
A23
B23
D23
C23
A25
VTT
A26
VTT
A27
VTT
A28
VTT
A29
VTT
A30
VTT
B25
VTT
B26
VTT
B27
VTT
B28
VTT
B29
VTT
B30
VTT
C25
VTT
C26
VTT
C27
VTT
C28
VTT
C29
VTT
C30
VTT
D25
VTT
D26
VTT
D27
VTT
D28
VTT
D29
VTT
D30
VTT
AM6
AA1
J1
F27
F29
ZIF-SOCK775-15U-IN_TH
ZIF-SOCK775-15U-IN_TH
4
H_VCCPLL
VTT_PWG
VTT_OUT_RIGHT
VTT_OUT_LEFT
VTT_SEL
H_VCCPLL [9]
V_FSB_VTT
C717
C717
10u/10V/8
10u/10V/8
10u/10V/8
10u/10V/8
R886 0R/2R886 0R/2
VTT_OUT_RIGHT [3,5,12,13]
VTT_SEL [28]
V_FSB_VTT
C718
C718
CAPS FOR FSB GENERIC
V_FSB_VTT
C719
C719
C10U6.3X5R6
C10U6.3X5R6
1
*GTLREF VOLTAGE SHOULD BE
0.635 * VTT = 0.76V (At VTT=1.2V)
0.635 * VTT = 0.7V (At VTT=1.1V)
R636
R636
57.6R1%0402-RH
B B
VTT_OUT_RIGHT
VTT_OUT_RIGHT
A A
VTT_OUT_LEFT[3,5]
57.6R1%0402-RH
C728
C728
X_C10U6.3X5R6
X_C10U6.3X5R6
R792
R792
57.6R1%0402-RH
57.6R1%0402-RH
6262_GTL0 6262_GTL1VTT_OUT_LEFT
R640
R640
100R1%/2
100R1%/2
R794
R794
100R1%/2
100R1%/2
PLACE AT CPU END OF ROUTE
VTT_OUT_RIGHT
VTT_OUT_LEFT
5
R637 10R/2R637 10R/2
C720
C720
1u/16V/6
1u/16V/6
R793 10R/2R793 10R/2
C858
C858
1u/16V/6
1u/16V/6
R645 X_130R1%/2R645 X_130R1%/2
R647 62R/2R647 62R/2
R648 62R/2R648 62R/2
R649 X_100R/2R649 X_100R/2
R650 62R/2R650 62R/2
C721
C721
C220P50N2
C220P50N2
C859
C859
C220P50N2
C220P50N2
H_PROCHOT#
H_IERR#
H_CPURST#
H_PWRGD
H_BR#0
CPU_GTLREF0 [3]
R883
R883
X_0R/2
X_0R/2
CPU_GTLREF3 [3]
H_PROCHOT# [3,30]
H_IERR# [3]
H_CPURST# [3,6,30]
H_PWRGD [3,12]
H_BR#0 [3,6]
DEMO BOARD CHANGE
(GTLREF0+3/GTLREF1+2)
R638
R638
57.6R1%0402-RH
57.6R1%0402-RH
R790
R790
57.6R1%0402-RH
VTT_OUT_RIGHT
4
57.6R1%0402-RH
C855
C855
X_C10U6.3X5R6
X_C10U6.3X5R6
R641
R641
100R1%/2
100R1%/2
R796
R796
100R1%/2
100R1%/2
R639 10R/2R639 10R/2
C722
C722
1u/16V/6
1u/16V/6
R791 10R/2R791 10R/2
C856
C856
1u/16V/6
1u/16V/6
C723
C723
C220P50N2
C220P50N2
C857
C857
C220P50N2
C220P50N2
R884
R884
X_0R/2
X_0R/2
3
CPU_GTLREF1 [3]
CPU_GTLREF2 [3]
VTT_OUT_RIGHT
V_FSB_VTT
R798
R798
X_10KR0402
X_10KR0402
R801
R801
10KR0402
10KR0402
C861
C861
C1u6.3Y0402-RH
C1u6.3Y0402-RH
VTT_PWRGOOD
VTT_PG SPEC :
High > 0.9V
Low < 0.3V
Trise < 150ns
V_1P5_ICH
H_VCCPLL
C727
C727
CP37
CP37
C1U16Y3
X_COPPER
X_COPPER
VTT_OUT_RIGHT VTT_OUT_RIGHT
5VSB
R799
R799
4.7KR0402
4.7KR0402
VID_GD#
CE
B
Q74
N-MMBT3904_NL_SOT23
Q74
N-MMBT3904_NL_SOT23
X_680R0402-RH
X_680R0402-RH
R800
R800
X_10KR0402
X_10KR0402
VID_GD#
R797
R797
VID_GD
CE
B
Q75
Q75
X_N-MMBT3904_NL_SOT23
X_N-MMBT3904_NL_SOT23
VID_GD# [30]
R803
R803
X_0R0402
X_0R0402
C1U16Y3
CPU
VTT_PWG VRM_PGD
R871
R871
0R0402
0R0402
C729
C729
0.01u/16V/4
0.01u/16V/4
R452
R452
1KR/2
1KR/2
C730
C730
10u/10V/8
10u/10V/8
VRM_PGD [12,30]
PWM
MICRO-STAR INT'L CO.,LTD
MICRO-STAR INT'L CO.,LTD
MICRO-STAR INT'L CO.,LTD
MS-7541-2008-03011J
MS-7541-2008-03011J
MSI
MSI
MSI
Size Document Description Rev
Size Document Description Rev
Size Document Description Rev
Custom
Custom
Custom
Date:
Thursday, March 13, 2008
Date:
Thursday, March 13, 2008
Date:
2
Thursday, March 13, 2008
MS-7541-2008-03011J
LGA775 - Power
LGA775 - Power
LGA775 - Power
1
Sheet of
Sheet of
Sheet of
437
437
437
0A
0A
0A
5
U34C
U34C
D D
C C
B B
AA23
AA24
AA25
AA26
AA27
AA28
AA29
AA30
AB23
AB24
AB25
AB26
AB27
AB28
AB29
AB30
AE10
AE13
AE16
AE17
AE20
AE24
AE25
AE26
AE27
AE28
AE29
AE30
AF10
AF13
AF16
AF17
AF20
AF23
AF24
AF25
AF26
AF27
AF28
AF29
AF30
AC3
AC6
AC7
AD4
AD7
AE2
AE5
AE7
AF3
AF6
AF7
A12
A15
A18
A2
A21
A6
A9
AA3
AA6
AA7
AB1
AB7
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSSY7VSSY5VSSY2VSSW7VSSW4VSSV7VSSV6VSS
VSS
AG10
VSS
AG13
VSS
AG16
VSS
AG17
VSS
AG20
VSS
AG23
V30
VSS
AG24
VSSV3VSS
VSS
AG7
V29
AH1
VSS
V28
VSS
VSS
AH10
V27
AH13
VSS
VSS
V26
VSS
VSS
AH16
V25
VSS
VSS
AH17
V24
VSS
VSS
AH20
V23
VSS
VSS
AH23
U7
VSS
VSST7VSST6VSST3VSSR7VSSR5VSS
VSS
VSS
VSS
VSS
AH3
AH6
AH7
AH24
AJ10
VSS
AJ13
VSS
R30
AJ16
VSS
R29
AJ17
VSS
VSS
R28
AJ20
VSS
VSS
R27
AJ23
VSS
VSS
R26
AJ24
VSS
VSS
R25
VSS
VSS
AJ27
R24
VSS
VSS
AJ28
R23
VSS
VSSR2VSSP7VSSP4VSS
VSS
VSS
AJ29
AJ30
4
P30
P29
P28
P27
P26
P25
P24
P23
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSSN7VSSN6VSSN3VSSM7VSSM1VSSL7VSSL6VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
AJ4
AJ7
AK2
AK10
AK13
AK16
AK17
AK20
AK23
AK24
AK27
VSS
AK28
VSS
AK29
VSS
AK30
L30
L29
L28
L27
VSSL3VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
AK5
AK7
AL10
AL13
AL16
AL17
AL20
AL23
L26
AL24
VSS
VSS
L25
AL27
VSS
VSS
L24
AL28
VSS
VSS
K2
L23
K5
VSS
VSSK7VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
AL7
AM1
AM10
AM13
AM16
AM17
AM20
AM23
VSS
AM24
VSS
AM27
VSSH3VSSH6VSSH7VSSH8VSSH9VSSJ4VSSJ7VSS
VSS
AM28
H28
AM4
VSS
VSS
H27
AN1
VSS
VSS
H26
VSS
VSS
AN10
3
H25
VSS
VSS
AN13
H24
VSS
VSS
AN16
H23
VSS
VSS
AN17
H22
AN2
VSS
VSS
H21
VSS
VSS
AN20
H20
VSS
VSS
AN23
H19
VSS
VSS
AN24
H18
VSS
VSS
AN27
H17
VSS
VSS
AN28
H14
VSS
VSSB1VSS
H12
H13
VSS
VSS
VSS
B11
B14
H11
VSS
RSVD/COMP8
VSS
B17
F7
H10
VSS
VSS
COMP6
COMP7
RSVD#AE4
RSVD#D1
RSVD#D14
RSVD#E5
RSVD#E6
RSVD#E7
RSVD#E23
RSVD#F23
RSVD
RSVD#J3
RSVD#N4
RSVD#P5
RSVD#AC4
IMPSEL#
MSID1
MSID0
FC28
FC27
FC26
FC23
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
ZIF-SOCK775-15U-IN_TH
ZIF-SOCK775-15U-IN_TH
B20
B24
Y3
AE3
B13
AE4
D1
D14
E5
E6
E7
E23
F23
AL3
J3
N4
P5
AC4
F6
V1
W1
U1
G1
E29
A24
F4
F22
F19
F16
F13
F10
E8
E28
E27
E26
E25
E20
E2
E17
E14
E11
D9
D6
D5
D3
D24
D21
D18
D15
D12
C7
C4
C24
C22
C19
C16
C13
C10
B8
B5
H_COMP6H_COMP6H_COMP6H_COMP6
H_COMP7
H_COMP8
T60
T60
T61
T61
T62
T62
T63
T63
R655 51R/2R655 51R/2
R656 X_51R/2R656 X_51R/2
R657 X_51R/2R657 X_51R/2
T64
T64
2
R652 X_49.9R1%0402R652 X_49.9R1%0402
R653 X_49.9R1%0402R653 X_49.9R1%0402
R654 24.9R1%/2R654 24.9R1%/2
X_TP
X_TP
X_TP
X_TP
X_TP
X_TP
X_TP
X_TP
H_TESTHI12
R508 51R0402R508 51R0402
X_TP
X_TP
R658 X_1KR/2R658 X_1KR/2
PSI# [30]
VTT_OUT_RIGHT [3,4,12,13]
H_TESTHI12 [3]
VTT_OUT_LEFT [3,4]
TP_CPU_G1 [3]
1
Kentsfield
A A
MICRO-STAR INT'L CO.,LTD
MICRO-STAR INT'L CO.,LTD
MICRO-STAR INT'L CO.,LTD
MS-7541-2008-03011J
MS-7541-2008-03011J
MSI
MSI
MSI
Size Document Description Rev
Size Document Description Rev
Size Document Description Rev
Custom
Custom
Custom
Date:
Thursday, March 13, 2008
Date:
Thursday, March 13, 2008
Date:
5
4
3
2
Thursday, March 13, 2008
MS-7541-2008-03011J
LGA775 - GND
LGA775 - GND
LGA775 - GND
1
Sheet of
Sheet of
Sheet of
537
537
537
0A
0A
0A
5
?
?
EAGLELAKE_DDR2
NB1A
NB1A
H_A#3
H_A#[3..35][3]
D D
C C
B B
A A
H_REQ#[0..4][3]
H_ADSTB#0[3]
H_ADSTB#1[3]
H_DSTBP#0[3]
H_DSTBN#0[3]
H_DSTBP#1[3]
H_DSTBN#1[3]
H_DSTBP#2[3]
H_DSTBN#2[3]
H_DSTBP#3[3]
H_DSTBN#3[3]
H_DBI#[0..3][3]
H_ADS#[3]
H_TRDY#[3]
H_DRDY#[3]
H_DEFER#[3]
H_HITM#[3]
H_HIT#[3]
H_LOCK#[3]
H_BR#0[3,4]
H_BNR#[3]
H_BPRI#[3]
H_DBSY#[3]
H_RS#[0..2][3]
H_CPURST#[3,4,30]
H_A#4
H_A#5
H_A#6
H_A#7
H_A#8
H_A#9
H_A#10
H_A#11
H_A#12
H_A#13
H_A#14
H_A#15
H_A#16
H_A#17
H_A#18
H_A#19
H_A#20
H_A#21
H_A#22
H_A#23
H_A#24
H_A#25
H_A#26
H_A#27
H_A#28
H_A#29
H_A#30
H_A#31
H_A#32
H_A#33
H_A#34
H_A#35
H_REQ#0
H_REQ#1
H_REQ#2
H_REQ#3
H_REQ#4
H_DBI#0
H_DBI#1
H_DBI#2
H_DBI#3
H_RS#0
H_RS#1
H_RS#2
M45
AA35
AA37
AA36
G38
G39
G44
G43
G42
L36
L37
J38
F40
H39
L38
L43
N39
N35
N37
J41
N40
R35
T36
R36
R34
R37
R39
U38
T37
U34
U40
T34
Y36
U35
U37
Y37
Y34
Y38
K35
J39
C43
J40
T39
C39
B39
K31
J31
J25
K25
C32
D32
B40
F33
F26
D30
J42
L40
J43
K44
H45
H40
L42
J44
H37
H42
L44
D27
N25
FSB_AB_3
FSB_AB_4
FSB_AB_5
FSB_AB_6
FSB_AB_7
FSB_AB_8
FSB_AB_9
FSB_AB_10
FSB_AB_11
FSB_AB_12
FSB_AB_13
FSB_AB_14
FSB_AB_15
FSB_AB_16
FSB_AB_17
FSB_AB_18
FSB_AB_19
FSB_AB_20
FSB_AB_21
FSB_AB_22
FSB_AB_23
FSB_AB_24
FSB_AB_25
FSB_AB_26
FSB_AB_27
FSB_AB_28
FSB_AB_29
FSB_AB_30
FSB_AB_31
FSB_AB_32
FSB_AB_33
FSB_AB_34
FSB_AB_35
FSB_REQB_0
FSB_REQB_1
FSB_REQB_2
FSB_REQB_3
FSB_REQB_4
FSB_ADSTBB_0
FSB_ADSTBB_1
FSB_DSTBPB_0
FSB_DSTBNB_0
FSB_DSTBPB_1
FSB_DSTBNB_1
FSB_DSTBPB_2
FSB_DSTBNB_2
FSB_DSTBPB_3
FSB_DSTBNB_3
FSB_DINVB_0
FSB_DINVB_1
FSB_DINVB_2
FSB_DINVB_3
FSB_ADSB
FSB_TRDYB
FSB_DRDYB
FSB_DEFERB
FSB_HITMB
FSB_HITB
FSB_LOCKB
FSB_BREQ0B
FSB_BNRB
FSB_BPRIB
FSB_DBSYB
FSB_RSB_0
FSB_RSB_1
FSB_RSB_2
FSB_CPURSTB
RSVD_05
ELK_CRB
ELK_CRB
EAGLELAKE_DDR2
SYM_REV = 1.5
SYM_REV = 1.5
1 OF 7
1 OF 7
FSB
FSB
FSB_ACCVREF
FSB_DB_0
FSB_DB_1
FSB_DB_2
FSB_DB_3
FSB_DB_4
FSB_DB_5
FSB_DB_6
FSB_DB_7
FSB_DB_8
FSB_DB_9
FSB_DB_10
FSB_DB_11
FSB_DB_12
FSB_DB_13
FSB_DB_14
FSB_DB_15
FSB_DB_16
FSB_DB_17
FSB_DB_18
FSB_DB_19
FSB_DB_20
FSB_DB_21
FSB_DB_22
FSB_DB_23
FSB_DB_24
FSB_DB_25
FSB_DB_26
FSB_DB_27
FSB_DB_28
FSB_DB_29
FSB_DB_30
FSB_DB_31
FSB_DB_32
FSB_DB_33
FSB_DB_34
FSB_DB_35
FSB_DB_36
FSB_DB_37
FSB_DB_38
FSB_DB_39
FSB_DB_40
FSB_DB_41
FSB_DB_42
FSB_DB_43
FSB_DB_44
FSB_DB_45
FSB_DB_46
FSB_DB_47
FSB_DB_48
FSB_DB_49
FSB_DB_50
FSB_DB_51
FSB_DB_52
FSB_DB_53
FSB_DB_54
FSB_DB_55
FSB_DB_56
FSB_DB_57
FSB_DB_58
FSB_DB_59
FSB_DB_60
FSB_DB_61
FSB_DB_62
FSB_DB_63
FSB_SWING
FSB_RCOMP
FSB_DVREF
HPL_CLKINP
HPL_CLKINN
?
?
4
F44
C44
D44
C41
E43
B43
D40
B42
B38
F38
A38
B37
D38
C37
D37
B36
E37
J35
H35
F37
G37
J33
L33
G33
L31
M31
M30
J30
G31
K30
M29
G30
J29
F29
H29
L25
K26
L29
J26
M26
H26
F25
F24
G25
H24
L24
J24
N24
C28
B31
F35
C35
B35
D35
D31
A34
B32
F31
D28
A29
C30
B30
E27
B28
B24
A23
C22
B23
P29
P30
H_D#0
H_D#1
H_D#2
H_D#3
H_D#4
H_D#5
H_D#6
H_D#7
H_D#8
H_D#9
H_D#10
H_D#11
H_D#12
H_D#13
H_D#14
H_D#15
H_D#16
H_D#17
H_D#18
H_D#19
H_D#20
H_D#21
H_D#22
H_D#23
H_D#24
H_D#25
H_D#26
H_D#27
H_D#28
H_D#29
H_D#30
H_D#31
H_D#32
H_D#33
H_D#34
H_D#35
H_D#36
H_D#37
H_D#38
H_D#39
H_D#40
H_D#41
H_D#42
H_D#43
H_D#44
H_D#45
H_D#46
H_D#47
H_D#48
H_D#49
H_D#50
H_D#51
H_D#52
H_D#53
H_D#54
H_D#55
H_D#56
H_D#57
H_D#58
H_D#59
H_D#60
H_D#61
H_D#62
H_D#63
HXSWING
HXRCOMP
MCH_GTLREF
CK_H_MCH_DP
CK_H_MCH_DN
H_D#[0..63] [3]
R677
R677
16.5R1%/2
16.5R1%/2
CK_H_MCH_DP [16]
CK_H_MCH_DN [16]
3
EXP_A_RXP_0[23]
EXP_A_RXN_0[23]
EXP_A_RXP_1[23]
EXP_A_RXN_1[23]
EXP_A_RXP_2[23]
EXP_A_RXN_2[23]
EXP_A_RXP_3[24]
EXP_A_RXN_3[24]
EXP_A_RXP_4[23]
EXP_A_RXN_4[23]
EXP_A_RXP_5[23]
EXP_A_RXN_5[23]
EXP_A_RXP_6[23]
EXP_A_RXN_6[23]
EXP_A_RXP_7[23]
EXP_A_RXN_7[23]
EXP_A_RXP_8[23]
EXP_A_RXN_8[23]
EXP_A_RXP_9[23]
EXP_A_RXN_9[23]
EXP_A_RXP_10[23]
EXP_A_RXN_10[23]
EXP_A_RXP_11[23]
EXP_A_RXN_11[23]
EXP_A_RXP_12[23]
EXP_A_RXN_12[23]
EXP_A_RXP_13[23]
EXP_A_RXN_13[23]
EXP_A_RXP_14[23]
EXP_A_RXN_14[23]
EXP_A_RXP_15[23]
EXP_A_RXN_15[23]
DMI_ITP_MRP_0[11]
DMI_ITN_MRN_0[11]
DMI_ITP_MRP_1[11]
DMI_ITN_MRN_1[11]
DMI_ITP_MRP_2[11]
DMI_ITN_MRN_2[11]
DMI_ITP_MRP_3[11]
DMI_ITN_MRN_3[11]
CK_MCH_DP[16]
CK_MCH_DN[16]
SDVO_CTRL_DATA[23,24]
SDVO_CTRL_CLK[23,24]
HXSWING 10 mil with,7 msil Space"
HXSWING S/B 1/4*VTT +/- 2%
V_FSB_VTT
R684
R684
301R1%0402
301R1%0402
R687
R687
100R1%/2
100R1%/2
V_FSB_VTT
V_FSB_VTT
R686
R686
HXSWING
49.9R1%/2
49.9R1%/2
C736
C736
0.1uf/10V/X7R/4
0.1uf/10V/X7R/4
*GTLREF VOLTAGE SHOULD BE
0.635*VTT
CPU_MCH_GTLREF
R679
R679
57.6R1%0402-RH
57.6R1%0402-RH
R683
R683
100R1%/2
100R1%/2
R681
R681
49.9R1%/2
49.9R1%/2
C733
C733
1u/16V/6
1u/16V/6
MCH_GTLREF
CPU_MCH_GTLREF [3]
C734
C734
C220P50N2
C220P50N2
EXP_A_RXP_0
EXP_A_RXN_0
EXP_A_RXP_1
EXP_A_RXN_1
EXP_A_RXP_2
EXP_A_RXN_2
EXP_A_RXP_3
EXP_A_RXN_3
EXP_A_RXP_4
EXP_A_RXN_4
EXP_A_RXP_5
EXP_A_RXN_5
EXP_A_RXP_6
EXP_A_RXN_6
EXP_A_RXP_7
EXP_A_RXN_7
EXP_A_RXP_8
EXP_A_RXN_8
EXP_A_RXP_9
EXP_A_RXN_9
EXP_A_RXP_10
EXP_A_RXN_10
EXP_A_RXP_11
EXP_A_RXN_11
EXP_A_RXP_12
EXP_A_RXN_12
EXP_A_RXP_13
EXP_A_RXN_13
EXP_A_RXP_14
EXP_A_RXN_14
EXP_A_RXP_15
EXP_A_RXN_15
DMI_ITP_MRP_0
DMI_ITN_MRN_0
DMI_ITP_MRP_1
DMI_ITN_MRN_1
DMI_ITP_MRP_2
DMI_ITN_MRN_2
DMI_ITP_MRP_3
DMI_ITN_MRN_3
CK_MCH_DP
CK_MCH_DN
SDVO_CTRL_DATA
SDVO_CTRL_CLK
AA9
AA10
AA7
AA6
AB10
AB9
AB3
AA2
AD10
AD11
AD7
AD8
AE9
AE10
AE6
AE7
G13
AB13
AD13
F6
G7
H6
G4
J6
J7
L6
L7
N9
N10
N7
N6
R7
R6
R9
R10
U10
U9
U6
U7
R4
P4
AF9
AF8
D9
E9
J13
ELK_CRB
ELK_CRB
EAGLELAKE_DDR2
EAGLELAKE_DDR2
NB1B
NB1B
PEG_RXP_0
PEG_RXN_0
PEG_RXP_1
PEG_RXN_1
PEG_RXP_2
PEG_RXN_2
PEG_RXP_3
PEG_RXN_3
PEG_RXP_4
PEG_RXN_4
PEG_RXP_5
PEG_RXN_5
PEG_RXP_6
PEG_RXN_6
PEG_RXP_7
PEG_RXN_7
PEG_RXP_8
PEG_RXN_8
PEG_RXP_9
PEG_RXN_9
PEG_RXP_10
PEG_RXN_10
PEG_RXP_11
PEG_RXN_11
PEG_RXP_12
PEG_RXN_12
PEG_RXP_13
PEG_RXN_13
PEG_RXP_14
PEG_RXN_14
PEG_RXP_15
PEG_RXN_15
DMI_RXP_0
DMI_RXN_0
DMI_RXP_1
DMI_RXN_1
DMI_RXP_2
DMI_RXN_2
DMI_RXP_3
DMI_RXN_3
EXP_CLKP
EXP_CLKN
SDVO_CTRLDATA
SDVO_CTRLCLK
RSVD_23
RSVD_22
V_1P125_CORE
2
?
?
SYM_REV = 1.5
SYM_REV = 1.5
PCIE
PCIE
DMI
DMI
2 OF 7
2 OF 7
C732 0.1uf/10V/X7R/4C732 0.1uf/10V/X7R/4
PEG_TXP_0
PEG_TXN_0
PEG_TXP_1
PEG_TXN_1
PEG_TXP_2
PEG_TXN_2
PEG_TXP_3
PEG_TXN_3
PEG_TXP_4
PEG_TXN_4
PEG_TXP_5
PEG_TXN_5
PEG_TXP_6
PEG_TXN_6
PEG_TXP_7
PEG_TXN_7
PEG_TXP_8
PEG_TXN_8
PEG_TXP_9
PEG_TXN_9
PEG_TXP_10
PEG_TXN_10
PEG_TXP_11
PEG_TXN_11
PEG_TXP_12
PEG_TXN_12
PEG_TXP_13
PEG_TXN_13
PEG_TXP_14
PEG_TXN_14
PEG_TXP_15
PEG_TXN_15
DMI_TXP_0
DMI_TXN_0
DMI_TXP_1
DMI_TXN_1
DMI_TXP_2
DMI_TXN_2
DMI_TXP_3
DMI_TXN_3
EXP_RCOMPO
EXP_COMPI
EXP_ICOMPO
EXP_RBIAS
1
GRCOMP
EXP_A_TXP_0
EXP_A_TXN_0
EXP_A_TXP_1
EXP_A_TXN_1
EXP_A_TXP_2
EXP_A_TXN_2
EXP_A_TXP_3
EXP_A_TXN_3
EXP_A_TXP_4
EXP_A_TXN_4
EXP_A_TXP_5
EXP_A_TXN_5
EXP_A_TXP_6
EXP_A_TXN_6
EXP_A_TXP_7
EXP_A_TXN_7
EXP_A_TXP_8
EXP_A_TXN_8
EXP_A_TXP_9
EXP_A_TXN_9
EXP_A_TXP_10
EXP_A_TXN_10
EXP_A_TXP_11
EXP_A_TXN_11
EXP_A_TXP_12
EXP_A_TXN_12
EXP_A_TXP_13
EXP_A_TXN_13
EXP_A_TXP_14
EXP_A_TXN_14
EXP_A_TXP_15
EXP_A_TXN_15
DMI_MTP_IRP_0
DMI_MTN_IRN_0
DMI_MTP_IRP_1
DMI_MTN_IRN_1
DMI_MTP_IRP_2
DMI_MTN_IRN_2
DMI_MTP_IRP_3
DMI_MTN_IRN_3
R662 49.9R1%/2R662 49.9R1%/2
R663 X_750R1%0402R663 X_750R1%0402
R664 750R1%0402R664 750R1%0402
EXP_A_TXP_0 [24]
EXP_A_TXN_0 [24]
EXP_A_TXP_1 [24]
EXP_A_TXN_1 [24]
EXP_A_TXP_2 [24]
EXP_A_TXN_2 [24]
EXP_A_TXP_3 [24]
EXP_A_TXN_3 [24]
EXP_A_TXP_4 [23]
EXP_A_TXN_4 [23]
EXP_A_TXP_5 [23]
EXP_A_TXN_5 [23]
EXP_A_TXP_6 [23]
EXP_A_TXN_6 [23]
EXP_A_TXP_7 [23]
EXP_A_TXN_7 [23]
EXP_A_TXP_8 [23]
EXP_A_TXN_8 [23]
EXP_A_TXP_9 [23]
EXP_A_TXN_9 [23]
EXP_A_TXP_10 [23]
EXP_A_TXN_10 [23]
EXP_A_TXP_11 [23]
EXP_A_TXN_11 [23]
EXP_A_TXP_12 [23]
EXP_A_TXN_12 [23]
EXP_A_TXP_13 [23]
EXP_A_TXN_13 [23]
EXP_A_TXP_14 [23]
EXP_A_TXN_14 [23]
EXP_A_TXP_15 [23]
EXP_A_TXN_15 [23]
DMI_MTP_IRP_0 [11]
DMI_MTN_IRN_0 [11]
DMI_MTP_IRP_1 [11]
DMI_MTN_IRN_1 [11]
DMI_MTP_IRP_2 [11]
DMI_MTN_IRN_2 [11]
DMI_MTP_IRP_3 [11]
DMI_MTN_IRN_3 [11]
V_1P125_CORE
V_1P125_CORE
C11
B11
A10
B9
C9
D8
B8
C7
B7
B6
B3
B4
D2
C2
H2
G2
J2
K2
K1
L2
P2
M2
T2
R1
U2
V2
W4
V3
AA4
Y4
AC1
AB2
AC2
AD2
AD4
AE4
AE2
AF2
AF4
AG4
Y7
Y8
Y6
AG1
?
?
MICRO-STAR INT'L CO.,LTD
MICRO-STAR INT'L CO.,LTD
MICRO-STAR INT'L CO.,LTD
MS-7541-2008-03011J
MS-7541-2008-03011J
MSI
MSI
MSI
Size Document Description Rev
Size Document Description Rev
Size Document Description Rev
Custom
Custom
Custom
Intel Eaglelake - FSB, PCIE, DMI, VGA, MSIC
Intel Eaglelake - FSB, PCIE, DMI, VGA, MSIC
Intel Eaglelake - FSB, PCIE, DMI, VGA, MSIC
Date:
Thursday, March 13, 2008
Date:
Thursday, March 13, 2008
Date:
5
4
3
2
Thursday, March 13, 2008
MS-7541-2008-03011J
Sheet of
Sheet of
Sheet of
1
0A
0A
0A
637
637
637
5
RN78
RN78
10K/4/8P4R
10K/4/8P4R
1
2
MCH_BS1
3
MCH_BSEL1[3,16]
MCH_BSEL0[3,16]
MCH_BSEL2[3,16]
D D
DEMO BOARD CHANGE
EXP16_PRSNT#[23]
C C
CL_VREF_MCH = 0.35V
Close to GMCH
V_1P125_CL_MCH
R680
R680
1K/4
1K/4
R685
R685
464R1%0402
464R1%0402
NB PIN:L17
TPM Enable:
B B
0=Enable iTPM
1=Disable iTPM
EXP16_PRSNT# EXP_EN
T67X_TP T67X_TP
CLINK_DATA[12]
CLINK_CLK[12]
CLINK_RST[12]
CLINK_PWOK[12]
CL_VREF_MCH
C735
C735
0.1u/16V/4
0.1u/16V/4
5
7
4
MCH_BS0
6
MCH_BS2
8
R667 X_1KR/2R667 X_1KR/2
R668 X_1KR/2R668 X_1KR/2
R669 0/4R669 0/4
R670 X_1KR/2R670 X_1KR/2
R671 X_1KR/2R671 X_1KR/2
T68X_TP T68X_TP
T69X_TP T69X_TP
T70X_TP T70X_TP
T71X_TP T71X_TP
T72X_TP T72X_TP
CLINK_DATA
CLINK_CLK
CL_VREF_MCH
CLINK_RST
CLINK_PWOK
T65X_TP T65X_TP
T66X_TP T66X_TP
EXP_SLR
ITPM_EN
MCH_TCEN
T74X_TP T74X_TP
4
MCH_BS0
MCH_BS1
MCH_BS2
G16
M20
G15
M17
G20
M16
AY4
AY2
AN13
AW2
AN8
AR7
AN10
AN11
AN9
AN17
AW44
AN16
AD42
W30
BE44
BE2
BD45
BD1
AK15
F17
P15
N17
K16
F15
H17
L17
J17
J16
J15
J20
F20
B45
U32
R42
A44
B14
NB1E
NB1E
BSEL0
BSEL1
BSEL2
ALLZTEST
XORTEST
RSVD_36
EXP_SLR
RSVD_17
EXP_SM
ITPM_ENB
RSVD_10
CEN
BSCANTEST
RSVD_12
RSVD_13
RSVD_14
RSVD_15
DUALX8_ENABLE
CL_DATA
CL_CLK
CL_VREF
CL_RSTB
CL_PWROK
JTAG_TDI
JTAG_TDO
JTAG_TCK
JTAG_TMS
NC_01
NC_02
NC_03
NC_04
NC_05
NC_06
NC_07
NC_08
NC_09
NC_10
NC_11
NC_12
NC_13
NC_18
NC_19
ELK_CRB
ELK_CRB
?
?
EAGLELAKE_DDR2
EAGLELAKE_DDR2
SYM_REV = 1.5
SYM_REV = 1.5
MISC
MISC
5 OF 7
5 OF 7
CRT_DDC_DATA
VGA
VGA
CRT_DDC_CLK
DPL_REFCLKINP
DPL_REFCLKINN
DPL_REFSSCLKINP
DPL_REFSSCLKINN
DDPC_CTRLCLK
DDPC_CTRLDATA
CRT_HSYNC
CRT_VSYNC
CRT_RED
CRT_GREEN
CRT_BLUE
CRT_IRTN
DAC_IREF
RSTINB
PWROK
ICH_SYNCB
HDA_BCLK
HDA_RSTB
HDA_SDI
HDA_SDO
HDA_SYNC
DPRSTPB
SLPB
RSVD_18
RSVD_19
RSVD_20
RSVD_21
RSVD_25
RSVD_26
RSVD_27
RSVD_28
RSVD_29
RSVD_30
RSVD_31
RSVD_32
RSVD_33
RSVD_34
RSVD_35
?
?
D14
C14
B18
D18
C18
F13
L15
M15
DACREFSET
B15
E15
D15
G8
G9
AN6
CHIP_PWGD
AR4
K15
MCH_AZA_BCLK
AU4
MCH_AZA_RSTB
AV4
MCH_AZA_SDI
AU2
MCH_AZA_SDO
AV1
MCH_AZA_SYNC
AU3
J11
F11
P43
P42
A45
B2
BE1
BE45
R15
R14
T15
T14
AB15
R32
R31
U31
U30
L11
L13
3
HSYNC
R665 X_0/4R665 X_0/4
R666 X_0/4R666 X_0/4
VSYNC
R672 1.02KR1%0402R672 1.02KR1%0402
R676 X_10KR/2R676 X_10KR/2
R675 X_10KR0402R675 X_10KR0402
H_COMP5_R
PM_SLP_N
R682 0/4R682 0/4
T73 X_TPT73 X_TP
R688 X_10KR/2R688 X_10KR/2
HSYNC [18]
VSYNC [18]
VGA_RED [18]
VGA_GREEN [18]
VGA_BLUE [18]
MCH_DDC_DATA [18]
MCH_DDC_CLK [18]
CK_DPL_REFCLK_DP [16]
V_1P125_CORE
CK_DPL_REFCLK_DN [16]
DDCP_CTRLCLK [23]
DDCP_CTRLDATA [23]
H_COMP5_R [3,12]
PM_SLP_N [3]
VCC3
2
Non-graphic stuff
1.R673,R674,R665,R666 stuff
2.R672,R252,R254,R255 stuff 0ohm
R674
R674
X_10KR/2
X_10KR/2
V_1P125_CORE
CK_DOT96_MCH_DP [16]
CK_DOT96_MCH_DN [16]
R673 X_10KR/2R673 X_10KR/2
PLTRST# [12,17]
CHIP_PWGD [12,24,28]
ICH_SYNC# [12]
RN85 8P4R-0R/6RN85 8P4R-0R/6
1
2
3
4
5
6
7
8
R698 0/4R698 0/4
V_1P5_ICH VCC3
R573
R573
R571
R571
X_3.3KR/2
X_3.3KR/2
X_3.3KR/2
X_3.3KR/2
R574
R574
X_3.3KR/2
X_3.3KR/2
R576
R576
X_10KR0402
X_10KR0402
1
ACSDOUT [12,22]
ACSYNC [12,22]
A A
MICRO-STAR INT'L CO.,LTD
MICRO-STAR INT'L CO.,LTD
MICRO-STAR INT'L CO.,LTD
MS-7541-2008-03011J
MS-7541-2008-03011J
MSI
MSI
MSI
Size Document Description Rev
Size Document Description Rev
Size Document Description Rev
Custom
Custom
Custom
Intel Eaglelake - FSB, PCIE, DMI, VGA, MSIC
Intel Eaglelake - FSB, PCIE, DMI, VGA, MSIC
Intel Eaglelake - FSB, PCIE, DMI, VGA, MSIC
Date:
Thursday, March 13, 2008
Date:
Thursday, March 13, 2008
Date:
5
4
3
2
Thursday, March 13, 2008
MS-7541-2008-03011J
Sheet of
Sheet of
Sheet of
1
0A
0A
0A
737
737
737
5
EAGLELAKE_DDR2
EAGLELAKE_DDR2
NB1C
MAA_A[1..14][14]
D D
CAS_A#[14]
RAS_A#[14]
SBS_A0[14]
SBS_A1[14]
SBS_A2[14]
SCS_A#0[14]
SCS_A#2[14]
SCS_A#3[14]
SCKE_A0[14]
SCKE_A1[14]
SCKE_A2[14]
SCKE_A3[14]
ODT_A0[14]
ODT_A1[14]
ODT_A2[14]
ODT_A3[14]
P_DDR0_A[14]
C C
B B
N_DDR0_A[14]
P_DDR2_A[14]
N_DDR2_A[14]
P_DDR3_A[14]
N_DDR3_A[14]
P_DDR5_A[14]
N_DDR5_A[14]
DDR3_SCS_A#1[14]
DDR3_MAA_A0[14]
DDR3_WE_A#[14]
DDR3_ODT_B3[15]
MAA_A[1..14]
CAS_A#
RAS_A#
SBS_A0
SBS_A1
SBS_A2
SCS_A#0
SCS_A#2
SCS_A#3
SCKE_A0
SCKE_A1
SCKE_A2
SCKE_A3
ODT_A0
ODT_A1
ODT_A2
ODT_A3
P_DDR0_A
N_DDR0_A
P_DDR2_A
N_DDR2_A
P_DDR3_A
N_DDR3_A
P_DDR5_A
N_DDR5_A
DDR3_RST#[14,15]
DDR3_RST#
DDR3_PWROK
DDR3_SCS_A#1
DDR3_MAA_A0
DDR3_WE_A#
DDR3_ODT_B3
T76T76
T77T77
T79T79
T80T80
T83T83
T84T84
MAA_A1
MAA_A2
MAA_A3
MAA_A4
MAA_A5
MAA_A6
MAA_A7
MAA_A8
MAA_A9
MAA_A10
MAA_A11
MAA_A12
MAA_A13
MAA_A14
TP_WE_A#
TP_SCS_A#1
TP_P_DDR1_A
TP_N_DDR1_A
TP_P_DDR4_A
TP_N_DDR4_A
TP_MAA_A0
T75T75
BC41
DDR_A_MA_0
BC35
DDR_A_MA_1
BB32
DDR_A_MA_2
BC32
DDR_A_MA_3
BD32
DDR_A_MA_4
BB31
DDR_A_MA_5
AY31
DDR_A_MA_6
BA31
DDR_A_MA_7
BD31
DDR_A_MA_8
BD30
DDR_A_MA_9
AW43
DDR_A_MA_10
BC30
DDR_A_MA_11
BB30
DDR_A_MA_12
AM42
DDR_A_MA_13
BD28
DDR_A_MA_14
AW42
DDR_A_WEB
AU42
DDR_A_CASB
AV42
DDR_A_RASB
AV45
DDR_A_BS_0
AY44
DDR_A_BS_1
BC28
DDR_A_BS_2
AU43
DDR_A_CSB_0
AR40
DDR_A_CSB_1
AU44
DDR_A_CSB_2
AM43
DDR_A_CSB_3
BB27
DDR_A_CKE_0
BD27
DDR_A_CKE_1
BA27
DDR_A_CKE_2
AY26
DDR_A_CKE_3
AR42
DDR_A_ODT_0
AM44
DDR_A_ODT_1
AR44
DDR_A_ODT_2
AL40
DDR_A_ODT_3
AY37
DDR_A_CK_0
BA37
DDR_A_CKB_0
AW29
DDR_A_CK_1
AY29
DDR_A_CKB_1
AU37
DDR_A_CK_2
AV37
DDR_A_CKB_2
AU33
DDR_A_CK_3
AT33
DDR_A_CKB_3
AT30
DDR_A_CK_4
AR30
DDR_A_CKB_4
AW38
DDR_A_CK_5
AY38
DDR_A_CKB_5
BC24
DDR3_DRAMRSTB
AR6
DDR3_DRAM_PWROK
AR43
DDR3_A_CSB1
BB40
DDR3_A_MA0
AT44
DDR3_A_WEB
AV40
DDR3_B_ODT3
ELK_CRB
ELK_CRB
NB1C
DDR_A
DDR_A
5VSB
SYM_REV = 1.5
SYM_REV = 1.5
3 OF 7
3 OF 7
?
?
4
DDR_A_DQS_0
DDR_A_DQSB_0
DDR_A_DQS_1
DDR_A_DQSB_1
DDR_A_DQS_2
DDR_A_DQSB_2
DDR_A_DQS_3
DDR_A_DQSB_3
DDR_A_DQS_4
DDR_A_DQSB_4
DDR_A_DQS_5
DDR_A_DQSB_5
DDR_A_DQS_6
DDR_A_DQSB_6
DDR_A_DQS_7
DDR_A_DQSB_7
DDR_A_DM_0
DDR_A_DM_1
DDR_A_DM_2
DDR_A_DM_3
DDR_A_DM_4
DDR_A_DM_5
DDR_A_DM_6
DDR_A_DM_7
DDR_A_DQ_0
DDR_A_DQ_1
DDR_A_DQ_2
DDR_A_DQ_3
DDR_A_DQ_4
DDR_A_DQ_5
DDR_A_DQ_6
DDR_A_DQ_7
DDR_A_DQ_8
DDR_A_DQ_9
DDR_A_DQ_10
DDR_A_DQ_11
DDR_A_DQ_12
DDR_A_DQ_13
DDR_A_DQ_14
DDR_A_DQ_15
DDR_A_DQ_16
DDR_A_DQ_17
DDR_A_DQ_18
DDR_A_DQ_19
DDR_A_DQ_20
DDR_A_DQ_21
DDR_A_DQ_22
DDR_A_DQ_23
DDR_A_DQ_24
DDR_A_DQ_25
DDR_A_DQ_26
DDR_A_DQ_27
DDR_A_DQ_28
DDR_A_DQ_29
DDR_A_DQ_30
DDR_A_DQ_31
DDR_A_DQ_32
DDR_A_DQ_33
DDR_A_DQ_34
DDR_A_DQ_35
DDR_A_DQ_36
DDR_A_DQ_37
DDR_A_DQ_38
DDR_A_DQ_39
DDR_A_DQ_40
DDR_A_DQ_41
DDR_A_DQ_42
DDR_A_DQ_43
DDR_A_DQ_44
DDR_A_DQ_45
DDR_A_DQ_46
DDR_A_DQ_47
DDR_A_DQ_48
DDR_A_DQ_49
DDR_A_DQ_50
DDR_A_DQ_51
DDR_A_DQ_52
DDR_A_DQ_53
DDR_A_DQ_54
DDR_A_DQ_55
DDR_A_DQ_56
DDR_A_DQ_57
DDR_A_DQ_58
DDR_A_DQ_59
DDR_A_DQ_60
DDR_A_DQ_61
DDR_A_DQ_62
DDR_A_DQ_63
VCC_DDR
BC5
BD4
BB9
BC9
BD15
BB15
AR22
AT22
AH43
AH42
AD43
AE42
Y43
Y42
T44
T43
BC3
BD9
BD14
AV22
AK42
AE45
AA45
T42
BC2
BD3
BD7
BB7
BB2
BA3
BE6
BD6
BB8
AY8
BD11
BB11
BC7
BE8
BD10
AY11
BB14
BC14
BC16
BB16
BC11
BE12
BA15
BD16
AW21
AY22
?
?
AV24
AY24
AU21
AT21
AR24
AU24
AL41
AK43
AG42
AG44
AL42
AK44
AH44
AG41
AF43
AF42
AC44
AC42
AF40
AF44
AD44
AC41
AB43
AA42
W42
W41
AB42
AB44
Y44
Y40
V42
U45
R40
P44
V44
V43
R41
R44
DQS_A0
DQS_A#0
DQS_A1
DQS_A#1
DQS_A2
DQS_A#2
DQS_A3
DQS_A#3
DQS_A4
DQS_A#4
DQS_A5
DQS_A#5
DQS_A6
DQS_A#6
DQS_A7
DQS_A#7
DQM_A0
DQM_A1
DQM_A2
DQM_A3
DQM_A4
DQM_A5
DQM_A6
DQM_A7
DATA_A0
DATA_A1
DATA_A2
DATA_A3
DATA_A4
DATA_A5
DATA_A6
DATA_A7
DATA_A8
DATA_A9
DATA_A10
DATA_A11
DATA_A12
DATA_A13
DATA_A14
DATA_A15
DATA_A16
DATA_A17
DATA_A18
DATA_A19
DATA_A20
DATA_A21
DATA_A22
DATA_A23
DATA_A24
DATA_A25
DATA_A26
DATA_A27
DATA_A28
DATA_A29
DATA_A30
DATA_A31
DATA_A32
DATA_A33
DATA_A34
DATA_A35
DATA_A36
DATA_A37
DATA_A38
DATA_A39
DATA_A40
DATA_A41
DATA_A42
DATA_A43
DATA_A44
DATA_A45
DATA_A46
DATA_A47
DATA_A48
DATA_A49
DATA_A50
DATA_A51
DATA_A52
DATA_A53
DATA_A54
DATA_A55
DATA_A56
DATA_A57
DATA_A58
DATA_A59
DATA_A60
DATA_A61
DATA_A62
DATA_A63
DQS_A0 [14]
DQS_A#0 [14]
DQS_A1 [14]
DQS_A#1 [14]
DQS_A2 [14]
DQS_A#2 [14]
DQS_A3 [14]
DQS_A#3 [14]
DQS_A4 [14]
DQS_A#4 [14]
DQS_A5 [14]
DQS_A#5 [14]
DQS_A6 [14]
DQS_A#6 [14]
DQS_A7 [14]
DQS_A#7 [14]
DQM_A[0..7]
DATA_A[0..63]
3
DQM_A[0..7] [14]
DATA_A[0..63] [14]
MAA_B[0..14][15]
VCC_DDR
C739
C739
0.1u/16V/4
0.1u/16V/4
WE_B#[15]
CAS_B#[15]
RAS_B#[15]
SBS_B0[15]
SBS_B1[15]
SBS_B2[15]
SCS_B#0[15]
SCS_B#1[15]
SCS_B#2[15]
SCS_B#3[15]
SCKE_B0[15]
SCKE_B1[15]
SCKE_B2[15]
SCKE_B3[15]
ODT_B0[15]
ODT_B1[15]
ODT_B2[15]
P_DDR0_B[15]
N_DDR0_B[15]
P_DDR2_B[15]
N_DDR2_B[15]
P_DDR3_B[15]
N_DDR3_B[15]
P_DDR4_B[15]
N_DDR4_B[15]
VCC_DDR
MAA_B[0..14]
C740
C740
C1u6.3X50402-1
C1u6.3X50402-1
WE_B#
CAS_B#
RAS_B#
SBS_B0
SBS_B1
SBS_B2
SCS_B#0
SCS_B#1
SCS_B#2
SCS_B#3
SCKE_B0
SCKE_B1
SCKE_B2
SCKE_B3
ODT_B0
ODT_B1
ODT_B2
T78T78
P_DDR0_B
N_DDR0_B
T81T81
T82T82
P_DDR2_B
N_DDR2_B
P_DDR3_B
N_DDR3_B
P_DDR4_B
N_DDR4_B
T85T85
T86T86
R691 80.6R1%0402R691 80.6R1%0402
R692 80.6R1%0402R692 80.6R1%0402
R693 249R1%0402R693 249R1%0402
R694 80.6R1%0402R694 80.6R1%0402
SPD=249OHM
SPU=80.6OHM
RPD=80.6OHM
RPU=80.6OHM
MAA_B0
MAA_B1
MAA_B2
MAA_B3
MAA_B4
MAA_B5
MAA_B6
MAA_B7
MAA_B8
MAA_B9
MAA_B10
MAA_B11
MAA_B12
MAA_B13
MAA_B14
TP_ODT_B3
TP_P_DDR1_B
TP_N_DDR1_B
TP_P_DDR5_B
TP_N_DDR5_B
MCH_VREF_A
SRCOMP0
SRCOMP1
SRCOMP2
SRCOMP3
BD24
BB23
BB24
BD23
BB22
BD22
BC22
BC20
BB20
BD20
BC26
BD19
BB19
BE38
BA19
BD36
BC37
BD35
BD26
BB26
BD18
BB35
BD39
BB37
BD40
BC18
AY20
BE17
BB18
BD37
BC39
BB38
BD42
AY33
AW33
AV31
AW31
AW35
AY35
AT31
AU31
AP31
AP30
AW37
AV35
BB44
AY42
BA43
BC43
BC44
AN29
AN30
AJ33
AK33
2
NB1D
NB1D
DDR_B_MA_0
DDR_B_MA_1
DDR_B_MA_2
DDR_B_MA_3
DDR_B_MA_4
DDR_B_MA_5
DDR_B_MA_6
DDR_B_MA_7
DDR_B_MA_8
DDR_B_MA_9
DDR_B_MA_10
DDR_B_MA_11
DDR_B_MA_12
DDR_B_MA_13
DDR_B_MA_14
DDR_B_WEB
DDR_B_CASB
DDR_B_RASB
DDR_B_BS_0
DDR_B_BS_1
DDR_B_BS_2
DDR_B_CSB_0
DDR_B_CSB_1
DDR_B_CSB_2
DDR_B_CSB_3
DDR_B_CKE_0
DDR_B_CKE_1
DDR_B_CKE_2
DDR_B_CKE_3
DDR_B_ODT_0
DDR_B_ODT_1
DDR_B_ODT_2
DDR_B_ODT_3
DDR_B_CK_0
DDR_B_CKB_0
DDR_B_CK_1
DDR_B_CKB_1
DDR_B_CK_2
DDR_B_CKB_2
DDR_B_CK_3
DDR_B_CKB_3
DDR_B_CK_4
DDR_B_CKB_4
DDR_B_CK_5
DDR_B_CKB_5
DDR_VREF
DDR_RPD
DDR_RPU
DDR_SPD
DDR_SPU
RSVD_01
RSVD_02
RSVD_03
RSVD_04
ELK_CRB
ELK_CRB
EAGLELAKE_DDR2
EAGLELAKE_DDR2
SYM_REV = 1.5
SYM_REV = 1.5
4 OF 7
4 OF 7
DDR_B
DDR_B
?
?
DDR_B_DQS_0
DDR_B_DQSB_0
DDR_B_DQS_1
DDR_B_DQSB_1
DDR_B_DQS_2
DDR_B_DQSB_2
DDR_B_DQS_3
DDR_B_DQSB_3
DDR_B_DQS_4
DDR_B_DQSB_4
DDR_B_DQS_5
DDR_B_DQSB_5
DDR_B_DQS_6
DDR_B_DQSB_6
DDR_B_DQS_7
DDR_B_DQSB_7
DDR_B_DM_0
DDR_B_DM_1
DDR_B_DM_2
DDR_B_DM_3
DDR_B_DM_4
DDR_B_DM_5
DDR_B_DM_6
DDR_B_DM_7
DDR_B_DQ_0
DDR_B_DQ_1
DDR_B_DQ_2
DDR_B_DQ_3
DDR_B_DQ_4
DDR_B_DQ_5
DDR_B_DQ_6
DDR_B_DQ_7
DDR_B_DQ_8
DDR_B_DQ_9
DDR_B_DQ_10
DDR_B_DQ_11
DDR_B_DQ_12
DDR_B_DQ_13
DDR_B_DQ_14
DDR_B_DQ_15
DDR_B_DQ_16
DDR_B_DQ_17
DDR_B_DQ_18
DDR_B_DQ_19
DDR_B_DQ_20
DDR_B_DQ_21
DDR_B_DQ_22
DDR_B_DQ_23
DDR_B_DQ_24
DDR_B_DQ_25
DDR_B_DQ_26
DDR_B_DQ_27
DDR_B_DQ_28
DDR_B_DQ_29
DDR_B_DQ_30
DDR_B_DQ_31
DDR_B_DQ_32
DDR_B_DQ_33
DDR_B_DQ_34
DDR_B_DQ_35
DDR_B_DQ_36
DDR_B_DQ_37
DDR_B_DQ_38
DDR_B_DQ_39
DDR_B_DQ_40
DDR_B_DQ_41
DDR_B_DQ_42
DDR_B_DQ_43
DDR_B_DQ_44
DDR_B_DQ_45
DDR_B_DQ_46
DDR_B_DQ_47
DDR_B_DQ_48
DDR_B_DQ_49
DDR_B_DQ_50
DDR_B_DQ_51
DDR_B_DQ_52
DDR_B_DQ_53
DDR_B_DQ_54
DDR_B_DQ_55
DDR_B_DQ_56
DDR_B_DQ_57
DDR_B_DQ_58
DDR_B_DQ_59
DDR_B_DQ_60
DDR_B_DQ_61
DDR_B_DQ_62
DDR_B_DQ_63
AW8
AW9
AT15
AU15
AR20
AR17
AU26
AT26
AR38
AR37
AK34
AL34
AF37
AF36
AB35
AD35
AY6
AR15
AU17
AV25
AU39
AL37
AJ35
AD37
AV7
AW4
BA9
AU11
AU7
AU8
AW7
AY9
AY13
AP15
AW15
AT16
AU13
AW13
AP16
AU16
AY17
AV17
AR21
AV20
AP17
AW16
AT20
AN20
?
?
AT25
AV26
AU29
AV29
AW25
AR25
AP26
AR29
AR36
AU38
AN35
AN37
AV39
AW39
AU40
AU41
AL35
AL36
AK36
AJ34
AN39
AN40
AK37
AL39
AJ38
AJ37
AF38
AE37
AK40
AJ40
AF34
AE35
AD40
AD38
AB40
AA39
AE36
AE39
AB37
AB38
DQS_B0
DQS_B#0
DQS_B1
DQS_B#1
DQS_B2
DQS_B#2
DQS_B3
DQS_B#3
DQS_B4
DQS_B#4
DQS_B5
DQS_B#5
DQS_B6
DQS_B#6
DQS_B7
DQS_B#7
DQM_B0
DQM_B1
DQM_B2
DQM_B3
DQM_B4
DQM_B5
DQM_B6
DQM_B7
DATA_B0
DATA_B1
DATA_B2
DATA_B3
DATA_B4
DATA_B5
DATA_B6
DATA_B7
DATA_B8
DATA_B9
DATA_B10
DATA_B11
DATA_B12
DATA_B13
DATA_B14
DATA_B15
DATA_B16
DATA_B17
DATA_B18
DATA_B19
DATA_B20
DATA_B21
DATA_B22
DATA_B23
DATA_B24
DATA_B25
DATA_B26
DATA_B27
DATA_B28
DATA_B29
DATA_B30
DATA_B31
DATA_B32
DATA_B33
DATA_B34
DATA_B35
DATA_B36
DATA_B37
DATA_B38
DATA_B39
DATA_B40
DATA_B41
DATA_B42
DATA_B43
DATA_B44
DATA_B45
DATA_B46
DATA_B47
DATA_B48
DATA_B49
DATA_B50
DATA_B51
DATA_B52
DATA_B53
DATA_B54
DATA_B55
DATA_B56
DATA_B57
DATA_B58
DATA_B59
DATA_B60
DATA_B61
DATA_B62
DATA_B63
1
DQM_B[0..7]
DATA_B[0..63]
DQS_B0 [15]
DQS_B#0 [15]
DQS_B1 [15]
DQS_B#1 [15]
DQS_B2 [15]
DQS_B#2 [15]
DQS_B3 [15]
DQS_B#3 [15]
DQS_B4 [15]
DQS_B#4 [15]
DQS_B5 [15]
DQS_B#5 [15]
DQS_B6 [15]
DQS_B#6 [15]
DQS_B7 [15]
DQS_B#7 [15]
DQM_B[0..7] [15]
DATA_B[0..63] [15]
R695
B
R695
1KR/2
1KR/2
DDR3_PWROK#
CE
Q66
Q66
2N3904
2N3904
4
A A
SLP_S4#[12,29]
5
DDR3 PWROK
DDR3_PWROK_BSLP_S4#
R699 1KR/2R699 1KR/2
B
R696
R696
10K/4/1
10K/4/1
DDR3_PWROK
CE
Q67
Q67
2N3904
2N3904
C741
C741
C1u6.3X50402-1
C1u6.3X50402-1
R689
R689
1K/4
1K/4
MCH_VREF_A
C737
C737
R690
R690
C738
0.1u/16V/4
0.1u/16V/4
3
1K/4
1K/4
C738
0.1u/16V/4
0.1u/16V/4
MSI
MSI
MSI
2
MICRO-STAR INT'L CO.,LTD
MICRO-STAR INT'L CO.,LTD
MICRO-STAR INT'L CO.,LTD
MS-7541-2008-03011J
MS-7541-2008-03011J
Size Document Description Rev
Size Document Description Rev
Size Document Description Rev
Custom
Custom
Custom
Date:
Thursday, March 13, 2008
Date:
Thursday, March 13, 2008
Date:
Thursday, March 13, 2008
MS-7541-2008-03011J
Intel Eaglelake - Memory DDR2
Intel Eaglelake - Memory DDR2
Intel Eaglelake - Memory DDR2
1
Sheet of
Sheet of
Sheet of
837
837
837
0A
0A
0A
5
stuff for onbroad graphic
VCC3
R8920RR892
0R
C742
C742
2.2u/6
2.2u/6
0.1u/16V/4
0.1u/16V/4
L36
R704
R704
40.2R1%0402
40.2R1%0402
R705
R705
39.2R1%0402
39.2R1%0402
C248 X_1u/6.3V/4C248 X_1u/6.3V/4
C226 X_1u/6.3V/4C226 X_1u/6.3V/4
C261 1u/6.3V/4C261 1u/6.3V/4
C272 X_1u/6.3V/4C272 X_1u/6.3V/4
C255 X_1u/6.3V/4C255 X_1u/6.3V/4
C249 X_1u/6.3V/4C249 X_1u/6.3V/4
C252 X_1u/6.3V/4C252 X_1u/6.3V/4
C318 0.1u/16V/4C318 0.1u/16V/4
C302 X_0.1u/16V/Y/4C302 X_0.1u/16V/Y/4
C371 0.1u/16V/4C371 0.1u/16V/4
C976 0.1u/16V/Y/4C976 0.1u/16V/Y/4
C883 0.1u/16V/4C883 0.1u/16V/4
C307 0.1u/16V/Y/4C307 0.1u/16V/Y/4
C311 0.1u/16V/4C311 0.1u/16V/4
C323 0.1u/16V/4C323 0.1u/16V/4
L36
X_0u100mA_0805-RH
X_0u100mA_0805-RH
21
CP39
CP39
X_COPPER
X_COPPER
R891
R891
X_0R
X_0R
CP40
CP40
X_COPPER
X_COPPER
L37
L37
X_10u100mA_0805-RH
X_10u100mA_0805-RH
CP41
CP41
X_COPPER
X_COPPER
VCC3
L29
L29
L0.1U_50mA
L0.1U_50mA
2 1
C10U10Y5
C10U10Y5
V_FSB_VTT
D D
V_1P125_CORE
V_1P125_CL_MCH
V_1P125_CORE
C C
B B
V_FSB_VTT
V_1P125_CORE V_1P125_CORE
A A
DAC_FILTERED
C743
C743
R701
R701
X_0/4
X_0/4
stuff for no onbroad graphic
VCCA_GPLL
R897 1R1%R897 1R1%
C744
C744
C745
X_C10U10Y5
X_C10U10Y5
R896 1R1%R896 1R1%
R895 1R1%R895 1R1%
21
C757
C757
5
VCCA_DPLLA VCCA_DPLLBVCCA_DPLLA
C751
C751
X_C10U10Y5
X_C10U10Y5
C241 10u/10V/8C241 10u/10V/8
C260 X_1u/6.3V/4C260 X_1u/6.3V/4
C286 1u/6.3V/4C286 1u/6.3V/4
C245 X_0.1u/16V/Y/4C245 X_0.1u/16V/Y/4
C237 X_0.1u/16V/Y/4C237 X_0.1u/16V/Y/4
C288 X_0.1u/16V/Y/4C288 X_0.1u/16V/Y/4
C745
0.1u/16V/4
0.1u/16V/4
VCCA_MPLL
C746
C746
10u/10V/8
10u/10V/8
C752
C752
0.1u/16V/4
0.1u/16V/4
VCCA_EXP
C758
C758
0.1u/16V/4
0.1u/16V/4
C382 0.1u/16V/4C382 0.1u/16V/4
C977 0.1u/16V/4C977 0.1u/16V/4
C975 0.1u/16V/4C975 0.1u/16V/4 C767 X_10u/10V/8C767 X_10u/10V/8
C884 0.1u/16V/4C884 0.1u/16V/4
C416 0.1u/16V/4C416 0.1u/16V/4
V_1P125_CL_MCH
V_1P125_CORE
V_1P125_CL_MCH
V_1P125_CORE
V_1P125_CORE
L35
L35
X_10u100mA_0805-RH
X_10u100mA_0805-RH
CP47
CP47
X_COPPER
X_COPPER
L38
L38
X_10u100mA_0805-RH
X_10u100mA_0805-RH
CP42
CP42
X_COPPER
X_COPPER
H_VCCPLL[4]
C300 10u/10V/8C300 10u/10V/8
C562 10u/10V/8C562 10u/10V/8
C763 X_10u/10V/8C763 X_10u/10V/8
C765 X_10u/10V/8C765 X_10u/10V/8
C762 X_10u/10V/8C762 X_10u/10V/8
CP43
CP43
X_COPPER
X_COPPER
V_1P1_HPL
R893 1R1%R893 1R1%
21
CP38
CP38
X_COPPER
X_COPPER
21
stuff for onbroad graphic
H_VCCPLL
stuff for no onbroad graphic
VCC_DDR
add width
VCC_DDR
C262 1u/6.3V/4C262 1u/6.3V/4
C289 X_0.1u/16V/Y/4C289 X_0.1u/16V/Y/4
C247 X_0.1u/16V/Y/4C247 X_0.1u/16V/Y/4
V_1P125_CL_MCH
C764 X_10u/10V/8C764 X_10u/10V/8
C766 10u/10V/8C766 10u/10V/8
C755
C755
C10U10Y5
C10U10Y5
C749
C749
2.2u/6
2.2u/6
C747
C747
2.2u/6
2.2u/6
C753
C753
C10U10Y5
C10U10Y5
R702 0/4R702 0/4
V_1P5_ICH
R706
R706
0/4
0/4
CP44
CP44
X_COPPER
X_COPPER
4
NB POWER
C756
C756
0.1u/16V/4
0.1u/16V/4
VCCA_GPLLD
C750
C750
0.1u/16V/4
0.1u/16V/4
VCCA_HPLL
C748
C748
0.1u/16V/4
0.1u/16V/4
C754
C754
0.1u/16V/4
0.1u/16V/4
R703
R703
X_0/4
X_0/4
V_1P125_CORE
VCC3
R707
R707
R708
R708
0/4
0/4
X_0/4
X_0/4
C770
C770
0.1u/16V/4
0.1u/16V/4
V_1P125_CL_MCH
4
VCCDQ_CRT
DAC_FILTERED
VCCA_EXP
C759
C759
4.7u/10V/8
4.7u/10V/8
R709
R709
X_0/4
X_0/4
C771
C771
1u/16V/6
1u/16V/6
R710
R710
0/4
0/4
C773
C773
0.1u/16V/4
0.1u/16V/4
V_FSB_VTT
VCCA_GPLL
VCCA_MPLL
VCCA_HPLL
VCCA_GPLLD
V_1P1_HPL
VCCA_DPLLA
VCCA_DPLLB
AK32
AM31
AM30
ELK_CRB
ELK_CRB
AL31
AL32
A25
B25
B26
C24
C26
D22
D23
D24
E23
F21
F22
G21
G22
H21
H22
J21
J22
K21
K22
L21
L22
M21
M22
N20
N21
N22
P20
P21
P22
P24
R20
R21
R23
R24
R22
B20
B16
A21
B22
B12
U33
D20
C20
D19
B19
E19
A17
AG2
AR2
B17
V_1P125_CORE
EAGLELAKE_DDR2
EAGLELAKE_DDR2
NB1F
NB1F
VTT_FSB_01
VTT_FSB_02
VTT_FSB_03
VTT_FSB_04
VTT_FSB_05
VTT_FSB_06
VTT_FSB_07
VTT_FSB_08
VTT_FSB_09
VTT_FSB_10
VTT_FSB_11
VTT_FSB_12
VTT_FSB_13
VTT_FSB_14
VTT_FSB_15
VTT_FSB_16
VTT_FSB_17
VTT_FSB_18
VTT_FSB_19
VTT_FSB_20
VTT_FSB_21
VTT_FSB_22
VTT_FSB_23
VTT_FSB_24
VTT_FSB_25
VTT_FSB_26
VTT_FSB_27
VTT_FSB_28
VTT_FSB_29
VTT_FSB_30
VTT_FSB_31
VTT_FSB_32
VTT_FSB_34
VTT_FSB_35
VTT_FSB_36
VCCDQ_CRT
VCCAPLL_EXP
VCCA_MPLL
VCCA_HPLL
VCCDPLL_EXP
VCCD_HPLL
VCCA_DPLLA
VCCA_DPLLB
VCCA_DAC_01
VCCA_DAC_02
VCC3_3_1
VCC_EXP
VCCAVRM_EXP
VCC_HDA
VSS_369
VCC_SMCLK_04
VCC_SMCLK_03
VCC_SMCLK_02
VCC_SMCLK_01
VCCCML_DDR
?
?
V_1P125_CL_MCH
AB22
AB20
AA30
AA27
AA29
AA25
AA21
AA23
AA19
VCC_09
VCC_08
VCC_07
VCC_05
VCC_06
VCC_04
VCC_02
VCC_03
VCC_01
SYM_REV = 1.5
SYM_REV = 1.5
6 OF 7
6 OF 7
VCC_CL_06
VCC_CL_05
VCC_CL_04
VCC_CL_03
VCC_CL_02
VCC_CL_01
AJ15
AK14
AM24
AM25
AM26
AM29
Separate when AMT is
supported
AB29
AB24
AB26
VCC_10
VCC_11
VCC_CL_08
VCC_CL_07
AM20
AM21
AM22
?
?
AB30
AC16
VCC_13
VCC_12
VCC_14
VCC_CL_11
VCC_CL_10
VCC_CL_09
AM16
AM17
AC19
AC17
VCC_16
VCC_15
VCC_CL_13
VCC_CL_12
AL30
AM15
3
AC21
AC23
AC25
VCC_17
VCC_18
VCC_CL_15
VCC_CL_14
AJ32
AF32
AK31
3
AC29
AC27
VCC_21
VCC_20
VCC_19
VCC_CL_18
VCC_CL_17
VCC_CL_16
AE32
AE33
AD16
AD17
VCC_22
VCC_23
VCC_CL_20
VCC_CL_19
AD32
AD33
AD22
AD24
AD20
VCC_25
VCC_24
VCC_CL_22
VCC_CL_21
AA33
AB32
AB33
AD29
AD26
VCC_28
VCC_27
VCC_26
VCC_CL_24
VCC_CL_23
VCC_CL_25
Y33
AA32
AF17
AE27
AE29
AF16
AE25
AE23
AE21
AE17
AE19
AE16
VCC_38
VCC_35
VCC_36
VCC_37
VCC_34
VCC_33
VCC_32
VCC_30
VCC_31
VCC_29
POWER
POWER
VCC_CL_28
VCC_CL_27
VCC_CL_26
Y32
AP2
AP1
AM4
VCC_CL_31
VCC_CL_30
VCC_CL_29
AM2
AM3
VCC_CL_33
VCC_CL_32
AL26
AL27
AL29
VCC_CL_35
VCC_CL_34
AL25
AF20
AF19
VCC_40
VCC_39
VCC_CL_37
VCC_CL_36
AL23
AL24
AF23
AF21
AF22
VCC_41
VCC_42
VCC_CL_39
VCC_CL_38
AL20
AL21
AL22
AF25
AF24
VCC_45
VCC_44
VCC_43
VCC_CL_42
VCC_CL_41
VCC_CL_40
AL17
AL19
AF26
AF27
VCC_46
VCC_47
VCC_CL_44
VCC_CL_43
AL15
AL16
AG16
AF29
VCC_49
VCC_48
VCC_CL_46
VCC_CL_45
AL12
AL14
AG20
AG17
VCC_51
VCC_50
VCC_CL_48
VCC_CL_47
AL10
AL11
AG24
AG22
VCC_53
VCC_52
VCC_CL_50
VCC_CL_49
AL8
AL9
AJ16
AG29
AG26
VCC_55
VCC_54
VCC_CL_52
VCC_CL_51
AL5
AL6
AL7
AJ19
AJ17
VCC_58
VCC_57
VCC_56
VCC_CL_55
VCC_CL_54
VCC_CL_53
AL2
AL4
2
AJ21
AJ23
VCC_59
VCC_60
VCC_CL_57
VCC_CL_56
AL1
AK30
2
R26
R25
AJ25
VCC_62
VCC_61
VCC_CL_59
VCC_CL_58
AK26
AK27
AK29
R29
R27
VCC_65
VCC_64
VCC_63
VCC_CL_62
VCC_CL_61
VCC_CL_60
AK24
AK25
T21
VCC_66
VCC_CL_64
VCC_CL_63
AK22
AK23
T25
T24
VCC_69
VCC_CL_66
VCC_CL_65
AK19
AK20
AK21
T26
T27
VCC_71
VCC_72
VCC_70
VCC_CL_69
VCC_CL_68
VCC_CL_67
AK16
AK17
U21
T29
VCC_74
VCC_73
VCC_CL_71
VCC_CL_70
AJ30
AJ31
U24
U23
U22
VCC_76
VCC_75
VCC_CL_73
VCC_CL_72
AF31
AG30
AG31
U26
U25
VCC_79
VCC_78
VCC_77
VCC_CL_76
VCC_CL_75
VCC_CL_74
AE31
AD31
U29
W19
U27
VCC_81
VCC_80
VCC_CL_78
VCC_CL_77
AA31
AB31
AC31
1
Y26
Y22
Y24
Y20
W27
W29
W25
W23
W21
VCC_84
VCC_83
VCC_82
VCC_CL_80
VCC_CL_79
VCC_CL_81
Y31
AJ29
MSI
MSI
MSI
VCC_86
VCC_85
VCC_CL_83
VCC_CL_82
Y29
Y30
AJ27
VCC_88
VCC_87
VCC_CL_84
VCC_CL_85
W31
T22
T23
VCC_91
VCC_89
VCC_90
VCC_96
VCC_97
AC4
VCC_98
AF3
VCC_99
F9
VCC_100
H4
VCC_101
L3
VCC_102
P3
VCC_103
V4
VCC_104
AJ1
VCC_EXP_1
AJ2
VCC_EXP_2
AK2
VCC_EXP_3
AK3
VCC_EXP_4
AK4
VCC_EXP_5
AK13
VCC_EXP_06
AK12
VCC_EXP_07
AK11
VCC_EXP_08
AK10
VCC_EXP_09
AK9
VCC_EXP_10
AK8
VCC_EXP_11
AK7
VCC_EXP_12
AK6
VCC_EXP_13
AJ14
VCC_EXP_14
AJ13
VCC_EXP_15
AJ12
VCC_EXP_16
AJ11
VCC_EXP_17
AJ10
VCC_EXP_18
AJ9
VCC_EXP_19
AJ8
VCC_EXP_20
AJ7
VCC_EXP_21
AJ6
VCC_EXP_22
AG15
VCC_EXP_23
AF15
VCC_EXP_24
AF14
VCC_EXP_25
AE15
VCC_EXP_26
AE14
VCC_EXP_27
AD15
VCC_EXP_28
AD14
VCC_EXP_29
AC15
VCC_EXP_30
AB14
VCC_EXP_31
AA15
VCC_EXP_32
AA14
VCC_EXP_33
Y15
VCC_EXP_34
Y14
VCC_EXP_35
W15
VCC_EXP_36
U15
VCC_EXP_37
U14
VCC_EXP_38
AP44
VCC_SM_01
AT45
VCC_SM_02
AV44
VCC_SM_03
AY40
VCC_SM_04
BA41
VCC_SM_05
BB39
VCC_SM_06
BD21
VCC_SM_07
BD25
VCC_SM_08
BD29
VCC_SM_09
BD34
VCC_SM_10
BD38
VCC_SM_11
BE23
VCC_SM_12
BE27
VCC_SM_13
BE31
VCC_SM_14
BE36
VCC_SM_15
V_1P125_CORE
MICRO-STAR INT'L CO.,LTD
MICRO-STAR INT'L CO.,LTD
MICRO-STAR INT'L CO.,LTD
MS-7541-2008-03011J
MS-7541-2008-03011J
Size Document Description Rev
Size Document Description Rev
Size Document Description Rev
Custom
Custom
Custom
Date:
Thursday, March 13, 2008
Date:
Thursday, March 13, 2008
Date:
Thursday, March 13, 2008
MS-7541-2008-03011J
Intel Eaglelake - Power / GND
Intel Eaglelake - Power / GND
Intel Eaglelake - Power / GND
1
VCC_DDR
FOR PCIE X16
C319 0.1u/16V/4C319 0.1u/16V/4
C305 0.1u/16V/Y/4C305 0.1u/16V/Y/4
C377 0.1u/16V/4C377 0.1u/16V/4
C979 0.1u/16V/Y/4C979 0.1u/16V/Y/4
C973 0.1u/16V/4C973 0.1u/16V/4
C313 0.1u/16V/Y/4C313 0.1u/16V/Y/4
C312 0.1u/16V/4C312 0.1u/16V/4
C324 0.1u/16V/4C324 0.1u/16V/4
Sheet of
Sheet of
Sheet of
V_1P125_CORE
937
937
937
0A
0A
0A
5
EAGLELAKE_DDR2
EAGLELAKE_DDR2
<$LOCATION>
C45
VSS_364C1VSS_363
VSS_101
VSS_102
AL44
AL45
BC1
F1
VSS_361
VSS_362
VSS_103
VSS_104
VSS_105
AN21
AN22
<$LOCATION>
BC45
BD2
BD44
VSS_360
VSS_359
VSS_358
7OF 7
7OF 7
VSS_106
VSS_107
VSS_108
AN24
AN25
AN26
BE3
BE43
VSS_357
VSS_356
VSS_109
VSS_110
AN33
AN36
Y39
Y9
VSS_354
VSS_355
VSS_111
VSS_112
AN7
AN38
Y3
Y35
VSS_352
VSS_353
VSS_113
VSS_114
AP20
AP21
Y25
Y27
VSS_350
VSS_351
VSS_115
VSS_116
AP22
AP24
Y21
Y23
VSS_348
VSS_349
VSS_117
VSS_118
AP25
AP29
A3
A43
B44
BD43
C16
NB1G
NB1G
A12
VSS_001
A15
VSS_002
A19
VSS_003
A27
VSS_004
A31
VSS_005
AA11
AA12
AA13
AA16
AA17
AA20
AA22
AA24
AA26
AA34
AA38
AA40
AA44
AB11
AB12
AB16
AB17
AB19
AB21
AB23
AB25
AB27
AB34
AB36
AB39
AC20
AC22
AC24
AC26
AC45
AD12
AD19
AD21
AD23
AD25
AD27
AD34
AD36
AD39
AE11
AE12
AE13
AE20
AE22
AE24
AE26
AE34
AE38
AE40
AE44
AF10
AF11
AF12
AF13
AF33
AF35
AF39
AG19
AG21
AG23
AG25
AG27
AG45
AJ20
AJ22
AJ24
AJ26
A36
A40
A8
AA1
AA8
AB4
AB6
AB7
AB8
AC5
AD3
AD6
AD9
AE1
AE8
AF6
AF7
AG5
AH2
AH3
AH4
VSS_006
VSS_007
VSS_008
VSS_009
VSS_010
VSS_011
VSS_012
VSS_013
VSS_014
VSS_015
VSS_016
VSS_017
VSS_018
VSS_019
VSS_020
VSS_021
VSS_022
VSS_023
VSS_024
VSS_025
VSS_026
VSS_027
VSS_028
VSS_029
VSS_030
VSS_031
VSS_032
VSS_033
VSS_034
VSS_035
VSS_036
VSS_037
VSS_038
VSS_039
VSS_040
VSS_041
VSS_042
VSS_043
VSS_044
VSS_045
VSS_046
VSS_047
VSS_048
VSS_049
VSS_050
VSS_051
VSS_052
VSS_053
VSS_054
VSS_055
VSS_056
VSS_057
VSS_058
VSS_059
VSS_060
VSS_061
VSS_062
VSS_063
VSS_064
VSS_065
VSS_066
VSS_067
VSS_068
VSS_069
VSS_070
VSS_071
VSS_072
VSS_073
VSS_074
VSS_075
VSS_076
VSS_077
VSS_078
VSS_079
VSS_080
VSS_081
VSS_082
VSS_083
VSS_084
VSS_085
VSS_086
VSS_087
VSS_088
VSS_089
VSS_090
VSS_091
VSS_092
VSS_093
ELK_CRB
ELK_CRB
D D
C C
B B
A A
VSS_371
VSS_372
VSS_094
VSS_095
AJ36
AJ39
VSS_096
VSS_097
AJ44
AJ45
VSS_368
VSS_366
VSS_367A6VSS_365
SYM_REV = 1.5
SYM_REV = 1.5
VSS_098
VSS_099
VSS_100
AL38
AK35
AK38
AK39
Y19
Y2
VSS_346
VSS_347
VSS_119
VSS_120
AP45
AR10
Y16
Y17
VSS_344
VSS_345
VSS_121
VSS_122
AR11
AR13
Y12
Y13
VSS_343
VSS_123
AR16
AR26
4
Y10
Y11
VSS_341
VSS_342
VSS_124
VSS_125
AR3
AR31
W45
W5
VSS_339
VSS_340
VSS_126
VSS_127
AR33
AR35
VSS_338
VSS_128
W20
W22
W24
W26
W44
VSS_333
VSS_334
VSS_335
VSS_336
VSS_337
GND
GND
VSS_129
VSS_130
VSS_131
VSS_132
VSS_133
AT1
AR8
AR9
AT11
AR39
W2
W17
VSS_332
VSS_331
VSS_134
VSS_135
AT13
AT17
W16
W1
VSS_330
VSS_136
AT2
AT24
U8
U44
VSS_329
VSS_328
VSS_138
VSS_137
AT35
AT29
U39
U36
VSS_327
VSS_326
VSS_325
VSS_141
VSS_140
VSS_139
AU22
AU20
U20
U19
VSS_324
VSS_323
VSS_143
VSS_142
AU30
AU25
U17
U16
VSS_322
VSS_144
AU5
AU35
U13
U12
VSS_321
VSS_320
VSS_146
VSS_145
AU9
AU6
U1
U11
VSS_319
VSS_318
VSS_148
VSS_147
AV13
AV11
T8
T9
VSS_315
VSS_316
VSS_317
VSS_151
VSS_150
VSS_149
AV16
AV15
T6
T7
VSS_313
VSS_314
VSS_153
VSS_152
AV2
AV21
T4
T40
VSS_311
VSS_312
VSS_155
VSS_154
AV33
AV30
T35
T38
VSS_309
VSS_310
VSS_157
VSS_156
AV6
AV38
T32
T33
VSS_308
VSS_158
AV9
AV8
3
T30
T31
VSS_306
VSS_307
VSS_160
VSS_159
AW17
AW11
T20
T3
VSS_303
VSS_304
VSS_305
VSS_163
VSS_162
VSS_161
AW22
AW20
T17
T19
VSS_301
VSS_302
VSS_165
VSS_164
AW26
AW24
T13
T16
VSS_300
VSS_166
AW3
AW30
T11
T12
VSS_297
VSS_298
VSS_299
VSS_169
VSS_168
VSS_167
AY1
AY15
R8
T10
VSS_296
VSS_170
AY21
AY16
R45
R5
VSS_293
VSS_294
VSS_295
VSS_173
VSS_172
VSS_171
AY30
AY25
R30
R38
VSS_291
VSS_292
VSS_175
VSS_174
B10
AY45
R19
R2
VSS_289
VSS_290
VSS_177
VSS_176
B27
B21
R16
R17
VSS_287
VSS_288
VSS_179
VSS_178
B34
B29
P31
R11
R12
VSS_285
VSS_286
VSS_181
VSS_180
BA5
BB21
BA23
P25
P26
VSS_282
VSS_283
VSS_284
VSS_182
VSS_183
VSS_184
BB25
BB28
P16
P17
VSS_280
VSS_281
VSS_279
VSS_278
VSS_277
VSS_276
VSS_275
VSS_274
VSS_273
VSS_272
VSS_271
VSS_270
VSS_269
VSS_268
VSS_267
VSS_266
VSS_265
VSS_264
VSS_263
VSS_262
VSS_261
VSS_260
VSS_259
VSS_258
VSS_257
VSS_256
VSS_255
VSS_254
VSS_253
VSS_252
VSS_251
VSS_250
VSS_249
VSS_248
VSS_247
VSS_246
VSS_245
VSS_244
VSS_243
VSS_242
VSS_241
VSS_240
VSS_239
VSS_238
VSS_237
VSS_236
VSS_235
VSS_234
VSS_233
VSS_232
VSS_231
VSS_230
VSS_229
VSS_228
VSS_227
VSS_226
VSS_225
VSS_224
VSS_223
VSS_222
VSS_221
VSS_220
VSS_219
VSS_218
VSS_217
VSS_216
VSS_215
VSS_214
VSS_213
VSS_212
VSS_211
VSS_210
VSS_209
VSS_208
VSS_207
VSS_206
VSS_205
VSS_204
VSS_203
VSS_202
VSS_201
VSS_200
VSS_199
VSS_197
VSS_196
VSS_195
VSS_194
VSS_193
VSS_192
VSS_191
VSS_190
VSS_189
VSS_187
VSS_186
VSS_185
BB6
2
N8
N38
N36
N33
N30
N29
N26
N16
N13
N11
M44
M25
M24
M1
L9
L8
L4
L39
L35
L30
L26
L20
L16
L10
K45
K33
K29
K24
K20
K17
K13
K11
J9
J8
J5
J4
J37
J3
H9
H8
H7
H44
H38
H33
H31
H30
H25
H20
H16
H15
H13
H11
H1
G35
G3
G29
G26
G24
G17
G11
F8
F45
F42
F4
F30
F2
F16
E5
E41
E31
E3
D7
D6
D39
D26
D25
D21
D16
D11
C5
C3
BE40
BE34
BE29
BE25
BE21
BE19
BE15
BE10
BD8
BD17
BD12
AD30
VSS
AC30
VSS
AF30
VSS
AE30
VSS
1
MICRO-STAR INT'L CO.,LTD
MICRO-STAR INT'L CO.,LTD
MICRO-STAR INT'L CO.,LTD
MS-7541-2008-03011J
MS-7541-2008-03011J
MSI
MSI
MSI
Size Document Description Rev
Size Document Description Rev
Size Document Description Rev
Custom
Custom
Custom
Date:
Thursday, March 13, 2008
Date:
Thursday, March 13, 2008
Date:
5
4
3
2
Thursday, March 13, 2008
MS-7541-2008-03011J
COVER SHEET
COVER SHEET
COVER SHEET
1
Sheet of
Sheet of
Sheet of
10 37
10 37
10 37
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