MSI MS-7538 Schematics
1
4-6
7-15
16-17DDR II DIMM 1 & 2 & 3 & 4
19
20
21
22
23
24
25DDR & NB_CORE POWER
26
1
2
MS-7538
Version 0A
3
CPU:
Intel Prescott ( L2=2MB)
Intel Cendar Mill (65nm)
Intel Smithfield (90nm Dual core)
Intel Presler (65nm Dual core)
Intel Conroe (65nm Dual core)
Intel Kentsfield
Intel Yorkfield
Intel Wolfdale
System Chipset:
nVidia - MCP7A
On Board Chipset:
BIOS -- SPI FLASH 8MB
Azalia CODEC(ALC 888S)
LPC Super I/O -- ITE8720
LAN-BROADCOM B5071FKB
COVER SHEET
BLOCK DIAGRAM
GPIO & JUMPER SETTING
Intel LGA775-CPU
nVidia - MCP7A
LAN BROADCOM B5071KFB
USB CONNECTORS
SIO-ITE 8720
SATA
FAN
Azalia CODEC(ALC888S)
UPI ACPI Controller
A A
PCI EXPRESS X16 & X 1 SLOT 27
PCI Slot 1 & 2 28
ATX & Front Panel 29
VGA & HDMI & DVI CONNECTOR 30
VRM11 Intersil 6312 3Phase
Auto BOM manual
CLOCK DISTRIBUTION CHART
POWER DELIVERY CHART
POWER SEQUENCE
31
32
33
34
35
Main Memory:
DDR II * 4 (Max 8GB)
Expansion Slots:
PCI Express X16 SLOT * 1
PCI Express X1 SLOT * 1
PCI 2.3 SLOT * 2
Intersil PWM:
Controller:
Intersil 6312 3 Phase
1
MICRO-START INT'L CO.,LTD.
MICRO-START INT'L CO.,LTD.
Title
Title
Title
COVER SHEET
COVER SHEET
COVER SHEET
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet
Date: Sheet
MICRO-START INT'L CO.,LTD.
MS-7538 0A
MS-7538 0A
MS-7538 0A
of
of
of
135Wednesday, May 21, 2008
135Wednesday, May 21, 2008
135Wednesday, May 21, 2008
5
4
3
2
1
Project Block Diagram
LGA775 CONROE
D D
HDMI CON
DVI CON
VGA CON
PCIE GFX x16
C C
Gbit ETHERNET
PHY B5071
PCIE x1 SLOT1
USB-5
REAR
USB-11
HDR
B B
USB-4
REAR
USB-10
HDR
20 20
USB-3
REAR
USB-9
HDR
USB-2
REAR
USB-8
HDR
20 20 20 20
USB-1
REAR
USB-7
HDR
USB-0
REAR
2020202020
USB-6
HDR
PCI BUS
HDMI
30
DVI
30
30
27
19
CRT
PCIE x16
RGMII
PCIE*1
27
USB 2.0
20
LGA775 SMITHFIELD
LGA775 PENTIUM D, EE
LGA775 PRESCOTT
4X DATA
2X ADDRESS
4,5,6
AGTL+
533/800/1066/1333MHz
NV MCP7A
AGTL+ P4 CPU I/F
DUAL DDR2/3 CHANNEL
INTEGRATED GRAPHICS
TVOUT/TMDS/SDVO
1 X16/2 X8 PCIE VIDEO I/F
1 X4 PCIE I/F FOR SB
4 X1 PCIE I/F
USB2.0 (12)
SATA2 (6 PORTS)
AC97 2.3
HD AUDIO 1.0
ATA 66/100/133
ACPI 1.1
LPC I/F
SPI I/F
INTERNAL RTC
PCI/PCI BRIDGE
7~15
533/667/800
A & B CHANNEL
AZALIA
SERIAL ATA 2.0
SPI
UNBUFFERED
DDR2 DIMM
240-PIN DDR II DIMM
UNBUFFERED
DDR2 DIMM
240-PIN DDR II DIMM
HD AUDIO HDR
AZALIA CODEC
SATA#0 SATA#1
2222
FLASH
BIOS
11
16,17
16,17
24
24
SATA#2
22 22
UNBUFFERED
DDR2 DIMM
16,17
240-PIN DDR II DIMM
UNBUFFERED
DDR2 DIMM
16,17
240-PIN DDR II DIMM
SATA#3
SATA#422SATA#5
22
CPU CORE POWER
V_FSB_VTT POWER
MCP7A CORE POWER
PCIE POWER
31
25,26
PCI SLOT 1
ACPI CONTROLLER
28
PCI SLOT 0
28
LPC BUS
ITE LPC SIO 8720
20
26
DDR2 DRAM POWER
A A
ATX CON & DUAL POWER
5
25
KBD
MOUSE
20
29
MICRO-START INT'L CO.,LTD.
MICRO-START INT'L CO.,LTD.
Title
Title
Title
Block Diagram
Block Diagram
Block Diagram
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet
4
3
2
Date: Sheet
MICRO-START INT'L CO.,LTD.
MS-7538 0A
MS-7538 0A
MS-7538 0A
235Wednesday, May 21, 2008
235Wednesday, May 21, 2008
235Wednesday, May 21, 2008
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5
4
3
2
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MCP7A GPIO Config.
GPIO Pin
PEB_CLKREQ#/GPIO_49
PEC_CLKREQ#/GPIO_50
D D
TV_DAC_VSYNC/GPIO_45
TV_DAC_HSYNC/GPIO_44
PCI_PERR#/GPIO_43/RS232_DCD#
PCI_REQ2#/GPIO_40/RS232_DSR#
PCI_REQ3#/GPIO_38/RS232_CTS#
PCI_REQ4#/GPIO_52/RS232_SIN#
PCI_GNT2#/GPIO_41/RS232_DTR#
PCI_GNT3#/GPIO_39/RS232_RTS#
PCI_GNT4#/GPIO_53/RS232_SOUT#
PCI_PME#/GPIO_30
TV_DAC_VSYNC/GPIO_45
LPC_DRQ1#/GPIO_19
HDA_SDATA_IN1/GPIO_2/PS2_KB_CLK
HDA_SDATA_IN2/GPIO_3/PS2_KB_DATA
HDA_DOCK_EN#/GPIO_4/PS2_MS_CLK
C C
HDA_DOCK_RST#/GPIO_5/PS2_MS_DATA
MII0_RXER/GPIO_36
MII0_COL/GPIO20/MSMB_DATA
MII0_CRS/GPIO21/MSMB_CLK
MII0_INTR/GPIO_35
MII0_PWRDWN/GPIO_37
USB_OC0#/GPIO_25
USB_OC1#/GPIO_26
USB_OC2#/GPIO_27/MGPIO
USB_OC3#/GPIO_28/MGPIO
EXT_SMI#/GPIO_32
SUS_CLK/GPIO_34
SPI_DI/GPIO_8
SPI_DO/GPIO_9
SPI_CS0/GPIO_10
B B
SPI_CLK/GPIO_11
FANCTL0/GPIO_61
FANRPM0/GPIO_60
FANCTL1/GPIO_62
FANRPM1/GPIO_63
GPIO_6/FERR#/IGPU_GPIO_6
GPIO_7/NFERR#/IGPU_GPIO_7
HPLUG_DET2/GPIO_22
DDC_CLK2/GPIO_23
DDC_DATA2/GPIO_24
Type DEVICEPrimary State
I/O(3.3V)
I/O(3.3V)
O(3.3V)
O(3.3V)
I(3.3V)
O(3.3V)
O(3.3V)
I(3.3V)
I(3.3V)
I(3.3V)
O(S5_3.3V)
O(S5_3.3V)
O(3.3V)
I/O(3.3V)
I/O(S5_3.3V)
I/O(S5_3.3V)
I/O(S5_3.3V)
I(S5_3.3V)
I(S5_3.3V)
O(S5_3.3V)
O(S5_3.3V)
O(S5_3.3V)
I(S5_3.3V)
I(S5_3.3V)
I(S5_3.3V)
I(S5_3.3V)
I/O(S5_3.3V)
I(S5_3.3V)
O(S5_3.3V)
I(S5_3.3V)
O(S5_3.3V)
O(S5_3.3V)
O(S5_3.3V)
O(3.3V)
I(3.3V)
O(3.3V)
I(3.3V)
O(S5_3.3V)
I/O(S5_3.3V)
I/O(3.3V)
I/O(3.3V_OD)
I/O(3.3V_OD)
Unused
Unused
Unused
Unused
PERR#
PREQ#2
PREQ#3
PREQ#4
Unused
Unused
Unused
PCI_PME#
Unused
Unused
OBR1
OBR2
USB_EN
Unused
RGMII_RX_ER
RGMII_COL
RGMII_CRS
RGMII_INTR#
RGMII_PREDN
OC#0
OC#1
OC#2
OC#3
LPC_SMI#
Unused
SPI_DI
SPI_DO
SPI_CS0#
SPI_CLK
AUDIO_FRONT_IO
Unused
DEPOP_GPIO
Unused
TMDS_DET1
TMDS_DET2
Pull-down
Pull-up VCC3
Pull-up VCC3
PCI Config.
MCP1 INT Pin
PCI_INTX#
PCI Slot 1
PCI Slot 2
PCI_INTY#
PCI_INTZ#
PCI_INTW#
PCI_INTY#
PCI_INTZ#
PCI_INTW#
PCI_INTX#
REQ#/GNT#
PREQ#0
PGNT#0
PREQ#1
PGNT#1
IDSEL
AD21
AD22
CLOCK
PCICLK0
PCICLK1
A A
MICRO-START INT'L CO.,LTD.
MICRO-START INT'L CO.,LTD.
Title
Title
Title
GPIO Configuration
GPIO Configuration
GPIO Configuration
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet
5
4
3
2
Date: Sheet
MICRO-START INT'L CO.,LTD.
MS-7538 0A
MS-7538 0A
MS-7538 0A
335Wednesday, May 21, 2008
335Wednesday, May 21, 2008
335Wednesday, May 21, 2008
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8
D D
H_PWRGD5,7
H_CPURST#5,7
H_DBI#0
H_DBI#1
H_DBI#2
H_DBI#3
CPU_GTLREF1
H_TDI
H_TDO
H_TMS
H_TRST#
H_TCK
R95 51R0402R95 51R0402
H_BPM#1
CPU_GTLREF1
T1T1
T2T2
H_D#63
H_D#62
H_D#61
H_D#60
H_D#59
H_D#58
H_D#57
H_D#56
H_D#55
H_D#54
H_DBI#[0..3]7
CPU_GTLREF15
H_IERR#5
H_FERR#5,7
H_STPCLK#7
H_INIT#7
H_DBSY#7
H_DRDY#7
H_TRDY#7
H_ADS#7
H_LOCK#7
H_BNR#7
H_HIT#7
C C
VTT_OUT_LEFT
B B
H_D#[0..63]7
H_HITM#7
H_BPRI#7
H_DEFER#7
THERMDA_CPU21
VTIN_GND21
TRMTRIP#5,7
H_PROCHOT#5,7
H_IGNNE#7
H_SMI#7
H_A20M#7
CPU_GTLREF15
CPU_BSEL07
CPU_BSEL17
CPU_BSEL27
G11
D19
C20
AB2
AB3
AD3
AD1
AF1
AC1
AG1
AE1
AL1
AK1
AE8
AL2
AH2
AE6
G10
D16
A20
AA2
G29
H30
G30
G23
B22
A22
A19
B19
B21
C21
B18
A17
B16
C18
H_A#[3..35]7
A8
F2
R3
M3
P3
H4
B2
C1
E3
D2
C3
C2
D4
E4
G8
G7
M2
N2
P2
K3
L2
N5
C9
Y1
V2
N1
7
U2007A
U2007A
DBI0#
DBI1#
DBI2#
DBI3#
EDRDY#
IERR#
MCERR#
FERR#/PBE#
STPCLK#
BINIT#
INIT#
RSP#
DBSY#
DRDY#
TRDY#
ADS#
LOCK#
BNR#
HIT#
HITM#
BPRI#
DEFER#
TDI
TDO
TMS
TRST#
TCK
THERMDA
THERMDC
THERMTRIP#
GND/SKTOCC#
PROCHOT#
IGNNE#
SMI#
A20M#
TESTI_13
RSVD#AH2
RESERVED0
RESERVED1
RESERVED2
RESERVED3
RESERVED4
RESERVED5
BOOTSELECT
LL_ID0
LL_ID1
BSEL0
BSEL1
BSEL2
PWRGOOD
RESET#
D63#
D62#
D61#
D60#
D59#
D58#
D57#
D56#
D55#
D54#
B15
H_D#53
D53#
D52#
C14
H_D#52
D51#
A14
C15
H_D#51
H_D#50
D50#
D49#
D17
H_D#49
CPU SIGNAL BLOCK
H_A#28
H_A#27
H_A#31
H_A#32
H_A#35
H_A#29
H_A#30
H_A#33
H_A#34
AJ6
AJ5
AH5
AH4
AG5
AG4
AG6
AF4
AF5
A35#
A34#
A33#
A32#
A31#
A30#
A29#
A28#
A27#
D48#
D47#
D46#
D45#
D44#
D43#
D42#
D41#
D40#
F21
F20
E22
E21
D22
H_D#46
H_D#45
G21
H_D#43
H_D#44
H_D#42
H_D#41
E19
H_D#40
D20
G22
H_D#47
H_D#48
H_A#25
H_A#26
AB4
AC5
A26#
D39#
F18
E18
H_D#38
H_D#39
H_A#24
AB5
A25#
A24#
D38#
D37#
F17
H_D#37
H_A#22
H_A#23
AA5
AD6
A23#
D36#
G17
G18
H_D#36
H_D#35
H_A#20
H_A#21
AA4
A22#
A21#
D35#
D34#
E16
H_D#34
H_D#33
E15
6
H_A#18
H_A#17
H_A#19
AB6
A20#Y4A19#Y6A18#W6A17#
D33#
D32#
D31#
D30#
F15
G16
G15
H_D#31
H_D#32
H_D#30
H_A#11
H_A#16
H_A#15
H_A#12
H_A#13
H_A#14
A16#W5A15#V4A14#V5A13#U4A12#U5A11#T4A10#
D29#
D28#
D27#
D26#
D25#
D24#
F14
F12
E13
D13
G14
G13
H_D#29
H_D#25
H_D#24
H_D#28
H_D#26
H_D#27
H_A#6
H_A#8
H_A#10
H_A#7
H_A#9
U6
A9#T5A8#R4A7#M4A6#L4A5#M5A4#P6A3#
D23#
D22#
D21#
D20#D7D19#E9D18#F9D17#F8D16#G9D15#
F11
E10
D10
H_D#20
H_D#23
H_D#19
H_D#21
H_D#22
H_A#4
H_A#5
H_D#17
H_D#18
H_A#3
L5
D11
H_D#15
H_D#16
AC2
DBR#
D14#
B12
C12
H_D#14
H_D#13
AN4
AN3
VSS_SENSE
VCC_SENSE
D13#
D12#D8D11#
C11
H_D#12
H_D#11
5
VID7
VID6
AM7
AN5
B10
H_D#10
AM5
AJ3
AK3
AN6
VID6#
ITP_CLK1
ITP_CLK0
RSVD#AM7
VSS_MB_REGULATION
VCC_MB_REGULATION
D10#
D9#
D8#
D7#A7D6#B7D5#B6D4#A5D3#C6D2#A4D1#C5D0#
A11
A10
H_D#5
H_D#6
H_D#8
H_D#3
H_D#9
H_D#7
H_D#4
VCC_VRM_SENSE
VSS_VRM_SENSE
VID[0..7] 31
VID2
VID3
VID1
VID4
VID0
VID5
AL4
AK4
AL6
AM3
AL5
AM2
VID5#
VID4#
VID3#
VID2#
VID1#
VID0#
VID_SELECT
GTLREF_SEL
H_D#2
H_D#1
AN7
CPU_GTLREF0
H1
GTLREF0
GTLREF1
GTLREF2
BPM5#
BPM4#
BPM3#
BPM2#
BPM1#
BPM0#
PCREQ#
REQ4#
REQ3#
REQ2#
REQ1#
REQ0#
TESTHI12
TESTHI11
TESTHI10
TESTHI9
TESTHI8
TESTHI7
TESTHI6
TESTHI5
TESTHI4
TESTHI3
TESTHI2
TESTHI1
TESTHI0
FORCEPH
RSVD#G6
BCLK1#
BCLK0#
RS2#
RS1#
RS0#
AP1#
AP0#
BR0#
COMP5
COMP4
COMP3
COMP2
COMP1
COMP0
DP3#
DP2#
DP1#
DP0#
ADSTB1#
ADSTB0#
DSTBP3#
DSTBP2#
DSTBP1#
DSTBP0#
DSTBN3#
DSTBN2#
DSTBN1#
DSTBN0#
LINT1/NMI
LINT0/INTR
ZIF-SOCKET775-RH-1,ZIF-SOCKET775_TH-2
ZIF-SOCKET775-RH-1,ZIF-SOCKET775_TH-2
B4
H_D#0
H2
H29
E24
AG3
AF2
AG2
AD2
AJ1
AJ2
G5
J6
K6
M6
J5
K4
W2
P1
H5
G4
G3
F24
G24
G26
G27
G25
F25
W3
F26
AK6
G6
G28
F28
A3
F5
B3
U3
U2
F3
T2
J2
R1
G2
T1
A13
J17
H16
H15
J16
AD5
R6
C17
G19
E12
B9
A16
G20
G12
C8
L1
K1
CPU_GTLREF0
GTLREF_SEL
H_BPM#5
H_BPM#4
H_BPM#3
H_BPM#2
H_BPM#1
H_BPM#0
PECI
H_REQ#4
H_REQ#3
H_REQ#2
H_REQ#1
H_REQ#0
H_TESTHI12
H_TESTHI11
H_TESTHI10
H_BPM#2
H_BPM#3
H_TESTHI2_7
H_TESTHI1
H_TESTHI0
FORCEPH
RSVD_G6
H_RS#2
H_RS#1
H_RS#0
TEST-U3
TEST-U2
H_COMP5
H_COMP4
H_COMP3
H_COMP2
H_COMP1
H_COMP0
TEST-J17
TEST-H16
TEST-H15
TEST-J16
4
VTT_OUT_RIGHT
T3T3
T4T4
R98 49.9R1%0402R98 49.9R1%0402
R110 49.9R1%0402R110 49.9R1%0402
R139 49.9R1%0402R139 49.9R1%0402
T6T6
T9T9
T5T5
T7T7
VCC_VRM_SENSE 31
VSS_VRM_SENSE 31
R30
R30
680R0402-RH
680R0402-RH
VID_SEL 31
CPU_GTLREF0 5
CPU_GTLREF0 5
T8T8
H_BPM#0 6
PECI 7,21
H_REQ#[0..4] 7
H_TESTHI12 6
R143 51R0402R143 51R0402
R141 51R0402R141 51R0402
R37 X_130R1%0402R37 X_130R1%0402
R92 X_51R0402R92 X_51R0402
CK_H_CPU# 7
CK_H_CPU 7
H_RS#[0..2] 7
H_BR#0 5,7
H_ADSTB#1 7
H_ADSTB#0 7
H_DSTBP#3 7
H_DSTBP#2 7
H_DSTBP#1 7
H_DSTBP#0 7
H_DSTBN#3 7
H_DSTBN#2 7
H_DSTBN#1 7
H_DSTBN#0 7
H_NMI 5,7
H_INTR 5,7
V_FSB_VTT
3
VTT_OUT_RIGHT
VTT_OUT_LEFT
C80
C80
C0.1u16X0402-2
C0.1u16X0402-2
VTT_OUT_LEFT
2
RN1
RN1
8P4R-680R
8P4R-680R
VID2
1
VID0
VID5
VID4
VID7
VID3
VID6
VID1
H_BPM#0
H_BPM#1
H_BPM#5
H_BPM#3
H_TRST#
H_BPM#4
H_TDO
H_TCK
H_TDI
H_BPM#2
H_TMS
H_TESTHI10
H_TESTHI11
H_TESTHI1
H_TESTHI12
H_COMP7
H_COMP76
H_COMP5
H_COMP1
H_COMP3
2
3
4
5
6
7
8
1
2
3
4
5
6
7
8
RN3
RN3
8P4R-680R
8P4R-680R
RN4
RN4
1
2
3
4
5
6
7
8
8P4R-51R0402
8P4R-51R0402
RN5
RN5
1
2
3
4
5
6
7
8
8P4R-51R0402
8P4R-51R0402
RN6
RN6
1
2
3
4
5
6
7
8
8P4R-51R0402
8P4R-51R0402
RN7
RN7
1
2
3
4
5
6
7
8
8P4R-51R0402
8P4R-51R0402
R82 49.9R1%0402R82 49.9R1%0402
RN8
RN8
1
2
3
4
5
6
7
8
8P4R-49.9R1%
8P4R-49.9R1%
1
VTT_OUT_RIGHT
C53
C53
C0.1u16X0402-2
C0.1u16X0402-2
VTT_OUT_RIGHT
VTT_OUT_LEFT
C65
C65
X_C0.1u16X0402-2
X_C0.1u16X0402-2
VTT_OUT_RIGHT
VTT_OUT_LEFT
C51
C51
X_C0.1u16X0402-2
X_C0.1u16X0402-2
A A
MICRO-START INT'L CO.,LTD.
MICRO-START INT'L CO.,LTD.
Title
Title
Title
CPU LGA775 - SIGNALS
CPU LGA775 - SIGNALS
CPU LGA775 - SIGNALS
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet
8
7
6
5
4
3
Date: Sheet
2
MICRO-START INT'L CO.,LTD.
MS-7538 0A
MS-7538 0A
MS-7538 0A
of
of
of
435Wednesday, May 21, 2008
435Wednesday, May 21, 2008
435Wednesday, May 21, 2008
1
8
7
6
5
4
3
2
1
VCCP
AJ8
U2007B
U2007B
AF21
AF22
AF9
AF8
AG11
AG12
AG14
AG15
AG18
AG19
AG21
AG22
AG25
AG26
AG27
AG28
AG29
AG30
AG8
AG9
AH11
AH12
AH14
AH15
AH18
AH19
AH21
AH22
AH25
AH26
AH27
AH28
AH29
AH30
AH8
AH9
AJ11
AJ12
AJ14
AJ15
AJ18
AJ19
AJ21
AJ22
AJ25
AJ26
AJ9
AK11
AK12
AK14
AK15
AK18
AK19
VCCP
AF19
VCC#AF19
D D
C C
AF18
AF15
AF14
AF12
AF11
AE9
AE23
AE22
AE21
AE19
AE18
AE15
AE14
AE12
AE11
AD8
AD30
AD29
AD28
AD27
AD26
AD25
AD24
AD23
AC8
AC30
AC29
AC28
AC27
AC26
AC25
AC24
AC23
AB8
AA8
VCC#AF18
VCC#AF15
VCC#AF14
VCC#AF12
VCC#AF11
VCC#AE9
VCC#AE23
VCC#AE22
VCC#AE21
VCC#AE19
VCC#AE18
VCC#AE15
VCC#AE14
VCC#AE12
VCC#AE11
VCC#AD8
VCC#AD30
VCC#AD29
VCC#AD28
VCC#AD27
VCC#AD26
VCC#AD25
VCC#AD24
VCC#AD23
VCC#AC8
VCC#AC30
VCC#AC29
VCC#AC28
VCC#AC27
VCC#AC26
VCC#AC25
VCC#AC24
VCC#AC23
VCC#AB8
VCC#AA8
VCCP
VCC#AF22
VCC#AF21
VCC#Y30
VCC#Y8
Y8
Y29
Y30
VCC#AF9
VCC#AF8
VCC#AG11
VCC#Y27
VCC#Y28
VCC#Y29
Y27
Y28
VCC#AG15
VCC#AG14
VCC#AG12
VCC#Y24
VCC#Y25
VCC#Y26
Y24
Y25
Y26
VCC#AG21
VCC#AG19
VCC#AG18
VCC#W30
VCC#W8W8VCC#Y23
Y23
W30
VCC#AG26
VCC#AG25
VCC#AG22
VCC#W27
VCC#W28
VCC#W29
W27
W28
W29
VCC#AG29
VCC#AG28
VCC#AG27
VCC#W24
VCC#W25
VCC#W26
W24
W25
W26
VCC#AG9
VCC#AG8
VCC#AG30
VCC#U8
VCC#V8
VCC#W23
V8
U8
W23
VCC#AH14
VCC#AH12
VCC#AH11
VCC#U28
VCC#U29
VCC#U30
U28
U29
U30
VCC#AH19
VCC#AH18
VCC#AH15
VCC#U25
VCC#U26
VCC#U27
U25
U26
U27
VCC#AH25
VCC#AH22
VCC#AH21
VCC#T8
VCC#U23
VCC#U24
T8
U23
U24
VCC#AH27
VCC#AH26
VCC#AH28
VCC#T28
VCC#T29
VCC#T30
T28
T29
T30
VCC#AH29
VCC#AH30
VCC#T26
VCC#T27
T25
T26
T27
VCC#AH8
VCC#AH9
VCC#AJ11
VCC#T23
VCC#T24
VCC#T25
T23
T24
VCC#AJ12
VCC#R8
P8
R8
VCC#AJ14
VCC#AJ15
VCC#N8
VCC#P8
N8
VCC#AJ18
VCC#AJ19
VCC#N29
VCC#N30
N28
N29
N30
VCC#AJ21
VCC#AJ22
VCC#AJ25
VCC#N26
VCC#N27
VCC#N28
N26
N27
VCC#AJ8
VCC#AJ26
VCC#N24
VCC#N25
N24
N25
VCC#AJ9
VCC#AK11
VCC#M8
VCC#N23
M8
N23
VCC#AK12
VCC#AK14
VCC#AK15
VCC#M28
VCC#M29
VCC#M30
M28
M29
M30
VCC#AK18
VCC#AK19
VCC#M26
VCC#M27
M26
M27
AK21
AK22
AK25
VCC#AK21
VCC#AK22
VCC#AK25
VCC#M24
VCC#M25
M23
M24
M25
AK26
AK8
AK9
VCC#AK8
VCC#AK9
VCC#AK26
VCC#K30
VCC#K8
VCC#L8L8VCC#M23
K8
K30
AL11
AL12
AL14
VCC#AL11
VCC#AL12
VCC#K28
VCC#K29
K27
K28
K29
AL15
AL18
AL19
VCC#AL14
VCC#AL15
VCC#AL18
VCC#K25
VCC#K26
VCC#K27
K24
K25
K26
AL21
AL22
AL25
VCC#AL19
VCC#AL21
VCC#AL22
VCC#K24
K23
AL26
AL29
AL30
VCC#AL25
VCC#AL26
VCC#AL29
VCC#J29
VCC#J30
VCC#J8J8VCC#J9J9VCC#K23
J28
J29
J30
AL8
AL9
AM11
VCC#AL8
VCC#AL9
VCC#AL30
VCC#J26
VCC#J27
VCC#J28
J25
J26
J27
AM12
AM14
AM15
VCC#AM11
VCC#AM12
VCC#AM14
VCC#AM15
VCC#J22
VCC#J23
VCC#J24
VCC#J25
J22
J23
J24
AM18
AM19
AM21
VCC#AM18
VCC#AM19
VCC#AM21
VCC#J19
VCC#J20
VCC#J21
J19
J20
J21
AM22
AM25
AM26
VCC#AM22
VCC#AM25
VCC#AM26
VCC#J14
VCC#J15
VCC#J18
J14
J15
J18
AM8
AM29
AM30
VCC#AM8
VCC#AM29
VCC#AM30
VCC#J11
VCC#J12
VCC#J13
J11
J12
J13
AM9
AN11
AN12
VCC#AM9
VCC#AN11
VCC#AN9
VCC#J10
J10
AN8
AN9
AN14
AN15
AN18
AN19
AN21
AN22
A23
VCCA
B23
VSSA
VCC#AN21
VCC#AN22
VCCPLL
VCC-IOPLL
VTT#A25
VTT#A26
VTT#A27
VTT#A28
VTT#A29
VTT#A30
VTT#B25
VTT#B26
VTT#B27
VTT#B28
VTT#B29
VTT#B30
VTT#C25
VTT#C26
VTT#C27
VTT#C28
VTT#C29
VTT#C30
VTT#D25
VTT#D26
VTT#D27
VTT#D28
VTT#D29
VTT#D30
VTTPWRGD
VTT_SEL
RSVD#F29
1122334
D23
C23
A25
A26
A27
A28
A29
A30
B25
B26
B27
B28
B29
B30
C25
C26
C27
C28
C29
C30
D25
D26
D27
D28
D29
D30
AM6
AA1
J1
F27
F29
4
VCC#AN12
VCC#AN14
VCC#AN15
VCC#AN18
VCC#AN19
VTT_OUT_RIGHT
VTT_OUT_LEFT
VCC#AN25
VCC#AN26
VCC#AN29
VCC#AN30
VCC#AN8
AN25
AN26
AN29
AN30
ZIF-SOCKET775-RH-1,ZIF-SOCKET775_TH-2
ZIF-SOCKET775-RH-1,ZIF-SOCKET775_TH-2
H_VCCA
H_VSSA
H_VCCPLL
H_VCCA
VTT_PG
VTT_OUT_RIGHT
VTT_OUT_LEFT
VTT_SEL
V_FSB_VTT
C147
C137
C137
C10u6.3X50805
C10u6.3X50805
C147
X_C10u6.3X50805
X_C10u6.3X50805
CAPS FOR FSB GENERIC
VTT_OUT_RIGHT
VTT_OUT_LEFT
VTT_SEL 26
V_FSB_VTT
C148
C148
C10u6.3X50805
C10u6.3X50805
*PLACE COMPONENTS AS CLOSE AS POSSIBLE TO PROCESSOR SOCKET
VTT_OUT_RIGHT
B B
R111 124R1%0402R111 124R1%0402
R108
R108
210R1%0402
210R1%0402
R10710R0402 R10710R0402
C83
C83
C1u6.3Y0402-RH
C1u6.3Y0402-RH
C84
C84
X_C0.1u16X0402-2
X_C0.1u16X0402-2
CPU_GTLREF0 4
C85
C85
C220p50N0402
C220p50N0402
*TRACE WIDTH TO CAPS MUST BE NO SMALLER THAN 12MILS
V_FSB_VTT
L9 X_10u100mA_0805-RHL9 X_10u100mA_0805-RH
CP4 X_COPPERCP4 X_COPPER
C131
C131
C1u6.3Y0402-RH
C1u6.3Y0402-RH
C135
C135
C10u6.3X50805
C10u6.3X50805
C125
C125
X_C10u6.3X50805
X_C10u6.3X50805
H_VSSA
VTT_OUT_RIGHT
R94 124R1%0402R94 124R1%0402
R97
R97
210R1%0402
210R1%0402
VTT_OUT_LEFT
VCC5_SB
R59
R59
1KR0402
A A
8
1KR0402
VID_GD#26,31
R55 4.7KR0402R55 4.7KR0402
7
R10010R0402 R10010R0402
C71
C71
C1u6.3Y0402-RH
C1u6.3Y0402-RH
X_C0.1u16X0402-2
X_C0.1u16X0402-2
R54 680R0402-RHR54 680R0402-RH
Q8
Q8
C
C
B
B
E
E
N-MMBT3904
N-MMBT3904
CPU_GTLREF1 4
C75
C75
VTT_PG
6
C78
C78
C220p50N0402
C220p50N0402
C33
C33
C1u16Y
C1u16Y
VTT_OUT_RIGHT
V_FSB_VTT
VTT_OUT_LEFT
VTT_OUT_RIGHT
5
4
R118 X_130R1%0402R118 X_130R1%0402
R79 62R0402R79 62R0402
R137 200R1%0402R137 200R1%0402
R87 200R1%0402R87 200R1%0402
R116 62R0402R116 62R0402
R93 62R0402R93 62R0402
R86 62R0402R86 62R0402
R99 X_150R1%0402R99 X_150R1%0402
R96 X_150R1%0402R96 X_150R1%0402
3
H_PROCHOT#
H_IERR#
H_CPURST#
H_PWRGD
H_BR#0
+1.5V
CP3 X_COPPERCP3 X_COPPER
H_PROCHOT# 4,7
H_IERR# 4
H_CPURST# 4,7
H_PWRGD 4,7
H_BR#0 4,7
TRMTRIP# 4,7
H_FERR# 4,7
H_INTR 4,7
H_NMI 4,7
MICRO-START INT'L CO.,LTD.
MICRO-START INT'L CO.,LTD.
Title
Title
Title
CPU LGA775 - POWER
CPU LGA775 - POWER
CPU LGA775 - POWER
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet
Date: Sheet
2
MICRO-START INT'L CO.,LTD.
MS-7538 0A
MS-7538 0A
MS-7538 0A
H_VCCPLLH_VCCA
C126
C126
X_C1u6.3Y0402-RH
X_C1u6.3Y0402-RH
C0.01u16X0402
C0.01u16X0402
C123
C123
C10u6.3X50805
C10u6.3X50805
535Wednesday, May 21, 2008
535Wednesday, May 21, 2008
535Wednesday, May 21, 2008
1
C129
C129
of
of
of
8
H_COMP74
VTT_OUT_RIGHT
D D
R134 X_1KR0402R134 X_1KR0402
C C
B B
R78 49.9R1%0402R78 49.9R1%0402
U2007C
U2007C
A12
VSS#A12
A15
VSS#A15
A18
VSS#A18
A2
VSS#A2
A21
VSS#A21
A24
VSS#A24
A6
VSS#A6
A9
VSS#A9
AA23
VSS#AA23
AA24
VSS#AA24
AA25
VSS#AA25
AA26
VSS#AA26
AA27
VSS#AA27
AA28
VSS#AA28
AA29
VSS#AA29
AA3
VSS#AA3
AA30
VSS#AA30
AA6
VSS#AA6
AA7
VSS#AA7
AB1
VSS#AB1
AB23
VSS#AB23
AB24
VSS#AB24
AB25
VSS#AB25
AB26
VSS#AB26
AB27
VSS#AB27
AB28
VSS#AB28
AB29
VSS#AB29
AB30
VSS#AB30
AB7
VSS#AB7
AC3
VSS#AC3
AC6
VSS#AC6
AC7
VSS#AC7
AD4
VSS#AD4
AD7
VSS#AD7
AE10
VSS#AE10
AE13
VSS#AE13
AE16
VSS#AE16
AE17
VSS#AE17
AE2
VSS#AE2
AE20
VSS#AE20
AE24
VSS#AE24
AE25
VSS#AE25
AE26
VSS#AE26
AE27
VSS#AE27
AE28
VSS#AE28
H_COMP7
H_COMP6
AE3
COMP6Y3COMP7
VSS#AE29
VSS#AE30
VSS#AE5
AE5
AE29
AE30
7
D1
D14
AE4
RSVD#D1
RSVD#D14
RSVD#AE4
VSS#AE7
VSS#AF10
VSS#AF13
AE7
AF10
AF13
51R0402
51R0402
E23
RSVD#E5E5RSVD#E6E6RSVD#E7
RSVD#E23
VSS#AF16
VSS#AF17
VSS#AF20
AF16
AF17
AF20
R106
R106
E7
F23
VSS#AF23
VSS#AF24
AF23
AF24
AF25
R138
R138
24.9R1%0402
24.9R1%0402
H_COMP8
B13
F6
IMPSEL#
RSVD#F23
RSVD#B13
VSS#AF25
VSS#AF26
VSS#AF27
AF26
AF27
AF28
R85
R85
51R0402
51R0402
N4
J3
RSVD#J3
VSS#AF28
VSS#AF29
VSS#AF3
AF3
AF29
AF30
P5
RSVD#P5
RSVD#N4
VSS#AF30
VSS#AF6
VSS#AF7
AF6
AF7
AG10
R81
R81
51R0402
51R0402
AC4
W1
MSID[1]V1MSID[0]
RSVD#AC4
VSS#AG10
VSS#AG13
VSS#AG16
AG13
AG16
AG17
VSS#Y7Y7VSS#Y5Y5VSS#Y2
VSS#AG17
VSS#AG20
VSS#AG23
AG20
AG23
AG24
6
Y2
W4
VSS#W7W7VSS#W4
VSS#AG24
VSS#AG7
VSS#AH1
VSS#AH10
AH1
AG7
AH10
V6
V30
VSS#V7V7VSS#V6
VSS#AH13
VSS#AH16
AH13
AH16
AH17
V3
V29
V28
VSS#V3
VSS#V30
VSS#V29
VSS#AH17
VSS#AH20
VSS#AH23
AH20
AH23
AH24
V27
V26
V25
VSS#V28
VSS#V27
VSS#V26
VSS#V25
VSS#AH24
VSS#AH3
VSS#AH6
VSS#AH7
AH3
AH6
AH7
V24
V23
VSS#V24
VSS#V23
VSS#AJ10
VSS#AJ13
AJ10
AJ13
AJ16
CP2 X_CP003CP2 X_CP003
T3
U1
VSS#T7T7VSS#T6T6VSS#T3
VSS#U7U7VSS#U1
VSS#AJ16
VSS#AJ17
VSS#AJ20
VSS#AJ23
VSS#AJ24
AJ17
AJ20
AJ23
AJ24
AJ27
5
R5
R30
R29
VSS#R7R7VSS#R5
VSS#R30
VSS#AJ27
VSS#AJ28
VSS#AJ29
AJ28
AJ29
AJ30
H_TESTHI12 4
R28
R27
R26
VSS#R29
VSS#R28
VSS#R27
VSS#AJ30
VSS#AJ4
VSS#AJ7
AJ4
AJ7
AK10
R25
R24
R23
VSS#R26
VSS#R25
VSS#R24
VSS#AK10
VSS#AK13
VSS#AK16
AK13
AK16
AK17
P4
R2
VSS#P7P7VSS#P4
VSS#R2
VSS#R23
VSS#AK17
VSS#AK2
VSS#AK20
AK2
AK20
AK23
P30
P29
P28
VSS#P30
VSS#P29
VSS#P28
VSS#AK23
VSS#AK24
VSS#AK27
VSS#AK28
AK24
AK27
AK28
P27
P26
P25
VSS#P27
VSS#P26
VSS#AK29
VSS#AK30
AK5
AK29
AK30
P24
P23
VSS#P25
VSS#P24
VSS#P23
VSS#AK5
VSS#AK7
VSS#AL10
AK7
AL10
4
N3
VSS#N7N7VSS#N6N6VSS#N3
VSS#M7M7VSS#M1
VSS#AL13
VSS#AL16
VSS#AL17
VSS#AL20
AL13
AL16
AL17
AL20
L6
M1
VSS#L7L7VSS#L6
VSS#AL23
VSS#AL24
AL23
AL24
AL27
L3
L30
L29
VSS#L3
VSS#L30
VSS#AL27
VSS#AL28
VSS#AL3
AL3
AL7
AL28
L28
L27
VSS#L29
VSS#L28
VSS#L27
VSS#AL7
VSS#AM1
VSS#AM10
AM1
AM10
L26
L25
VSS#L26
VSS#L25
VSS#AM13
VSS#AM16
AM13
AM16
L24
L23
VSS#L24
VSS#L23
VSS#AM17
VSS#AM20
AM17
AM20
K2
K5
VSS#K2
VSS#K7K7VSS#K5
VSS#AM23
VSS#AM24
VSS#AM27
AM23
AM24
AM27
3
H3
H6
H7
H8
H9
J7
VSS#J4J4VSS#J7
VSS#H7
VSS#H8
VSS#H9
VSS#AM28
VSS#AM4
VSS#AN1
VSS#AN10
AN1
AM4
AN10
AM28
VSS#H3
VSS#H6
VSS#AN13
VSS#AN16
AN13
AN16
AN17
H26
H27
H28
VSS#H27
VSS#H28
VSS#AN17
VSS#AN2
VSS#AN20
AN2
AN20
AN23
H25
VSS#H25
VSS#H26
VSS#AN23
VSS#AN24
AN24
H22
H23
H24
VSS#H22
VSS#H23
VSS#H24
VSS#AN27
VSS#AN28
AN27
AN28
H18
H19
H20
H21
VSS#H19
VSS#H20
VSS#H21
VSS#B1B1VSS#B11
VSS#B14
B11
B14
2
H17
H14
VSS#H14
H13
VSS#H13
VSS#H17
VSS#H18
H12
VSS#H12
H11
VSS#H11
H10
VSS#H10
G1
VSS#G1
F7
VSS#F7
F4
VSS#F4
F22
VSS#F22
F19
VSS#F19
F16
VSS#F16
F13
VSS#F13
F10
VSS#F10
E8
VSS#E8
E29
VSS#E29
E28
VSS#E28
E27
VSS#E27
E26
VSS#E26
E25
VSS#E25
E20
VSS#E20
E2
VSS#E2
E17
VSS#E17
E14
VSS#E14
E11
VSS#E11
D9
VSS#D9
D6
VSS#D6
D5
VSS#D5
D3
VSS#D3
D24
VSS#D24
D21
VSS#D21
D18
VSS#D18
D15
VSS#D15
D12
VSS#D12
C7
VSS#C7
C4
VSS#C4
C24
VSS#C24
C22
VSS#C22
C19
VSS#C19
C16
VSS#C16
C13
VSS#C13
C10
VSS#C10
B8
VSS#B8
B5
VSS#B5
B24
VSS#B24
B20
VSS#B20
B17
VSS#B17
ZIF-SOCKET775-RH-1,ZIF-SOCKET775_TH-2
ZIF-SOCKET775-RH-1,ZIF-SOCKET775_TH-2
1
H_BPM#0 4
R145 X_1KR0402R145 X_1KR0402
R53 X_0R0402R53 X_0R0402
A A
MICRO-START INT'L CO.,LTD.
MICRO-START INT'L CO.,LTD.
Title
Title
Title
CPU LGA775 - GND
CPU LGA775 - GND
CPU LGA775 - GND
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet
8
7
6
5
4
3
Date: Sheet
2
MICRO-START INT'L CO.,LTD.
MS-7538 0A
MS-7538 0A
MS-7538 0A
of
of
of
635Wednesday, May 21, 2008
635Wednesday, May 21, 2008
635Wednesday, May 21, 2008
1
8
H_DBI#[0..3]4
H_DSTBP#04
H_DSTBN#04
H_DSTBP#14
H_DSTBN#14
H_DSTBP#24
D D
C C
B B
V_FSB_VTT
A A
H_DSTBN#24
H_DSTBP#34
H_DSTBN#34
H_A#[3..35]4
H_ADSTB#04
H_ADSTB#14
H_REQ#[0..4]4
H_ADS#4
H_BNR#4
H_BR#04,5
H_BPRI#4
H_DBSY#4
H_DEFER#4
H_DRDY#4
H_HIT#4
H_HITM#4
H_LOCK#4
H_TRDY#4
H_RS#[0..2]4
H_FERR#4,5
H_A20M#4
H_IGNNE#4
H_INIT#4
H_SMI#4
H_INTR4,5
H_NMI4,5
H_STPCLK#4
H_PWRGD4,5
R153 49.9R1%0402R153 49.9R1%0402
R158 49.9R1%0402R158 49.9R1%0402
7
H_DBI#[0..3]
H_DBI#0
H_DBI#1
H_DBI#2
H_DBI#3
H_A#3
H_A#4
H_A#5
H_A#6
H_A#7
H_A#8
H_A#9
H_A#10
H_A#11
H_A#12
H_A#13
H_A#14
H_A#15
H_A#16
H_A#17
H_A#18
H_A#19
H_A#20
H_A#21
H_A#22
H_A#23
H_A#24
H_A#25
H_A#26
H_A#27
H_A#28
H_A#29
H_A#30
H_A#31
H_A#32
H_A#33
H_A#34
H_A#35
H_REQ#0
H_REQ#1
H_REQ#2
H_REQ#3
H_REQ#4
H_RS#0
H_RS#1
H_RS#2
H_FERR#
H_A20M#
H_IGNNE#
H_INIT#
H_SMI#
H_INTR
H_NMI
H_STPCLK#
CPU_COMP_V
CPU_COMP_G
AB35
AE37
AC33
AC35
AC34
AE35
AE34
AG39
AE33
AG38
AG37
AF35
AG35
AG34
AJ34
AG33
AJ38
AJ37
AJ35
AL37
AJ36
AL39
AL38
AJ33
AL35
AL34
AN37
AL33
AN38
AN35
AN36
AR39
AN34
AE36
AK35
AC38
AA33
AE38
AC37
AC39
AD42
AD43
AE40
AA41
AD39
AA40
AD41
AB42
AD40
AC43
AE41
AC41
AB41
AC42
AH40
AF41
AH39
AH42
AH41
AF42
AG41
AG42
AH43
AM33
AN33
AN32
AM32
AM43
AM42
W39
W37
M39
M41
T40
U40
V41
V35
N37
L36
N35
J41
CPU_DSTBP0*
CPU_DSTBN0*
CPU_DBI0*
CPU_DSTBP1*
CPU_DSTBN1*
CPU_DBI1*
CPU_DSTBP2*
CPU_DSTBN2*
CPU_DBI2*
CPU_DSTBP3*
CPU_DSTBN3*
CPU_DBI3*
CPU_A3*
CPU_A4*
CPU_A5*
CPU_A6*
CPU_A7*
CPU_A8*
CPU_A9*
CPU_A10*
CPU_A11*
CPU_A12*
CPU_A13*
CPU_A14*
CPU_A15*
CPU_A16*
CPU_A17*
CPU_A18*
CPU_A19*
CPU_A20*
CPU_A21*
CPU_A22*
CPU_A23*
CPU_A24*
CPU_A25*
CPU_A26*
CPU_A27*
CPU_A28*
CPU_A29*
CPU_A30*
CPU_A31*
CPU_A32*
CPU_A33*
CPU_A34*
CPU_A35*
CPU_ADSTB0*
CPU_ADSTB1*
CPU_REQ0*
CPU_REQ1*
CPU_REQ2*
CPU_REQ3*
CPU_REQ4*
CPU_ADS*
CPU_BNR*
CPU_BR0*
CPU_BPRI*
CPU_DBSY*
CPU_DEFER*
CPU_DRDY*
CPU_HIT*
CPU_HITM*
CPU_LOCK*
CPU_TRDY*
CPU_RS0*
CPU_RS1*
CPU_RS2*
CPU_FERR*
CPU_A20M*
CPU_IGNNE*
CPU_INIT*
CPU_SMI*
CPU_INTR
CPU_NMI
CPU_STPCLK*
CPU_PWRGD
CPU_SLP*
CPU_DPSLP*
CPU_DPRSTP*
CPU_DPWR*
CPU_COMP_VCC
CPU_COMP_GND
U2014A
U2014A
NVIDIA-MCP7A-B01-RH
NVIDIA-MCP7A-B01-RH
6
BCLK_OUT_CPU_P
BCLK_OUT_CPU_N
BCLK_OUT_ITP_P
BCLK_OUT_ITP_N
BCLK_OUT_NB_P
BCLK_OUT_NB_N
CPU_PROCHOT*
CPU_THERMTRIP*
V1P1_PLL_CPU
V1P1_PLL_FSB
BCLK_VML_COMP_VDD
BCLK_VML_COMP_GND
CPU_D0*
CPU_D1*
CPU_D2*
CPU_D3*
CPU_D4*
CPU_D5*
CPU_D6*
CPU_D7*
CPU_D8*
CPU_D9*
CPU_D10*
CPU_D11*
CPU_D12*
CPU_D13*
CPU_D14*
CPU_D15*
CPU_D16*
CPU_D17*
CPU_D18*
CPU_D19*
CPU_D20*
CPU_D21*
CPU_D22*
CPU_D23*
CPU_D24*
CPU_D25*
CPU_D26*
CPU_D27*
CPU_D28*
CPU_D29*
CPU_D30*
CPU_D31*
CPU_D32*
CPU_D33*
CPU_D34*
CPU_D35*
CPU_D36*
CPU_D37*
CPU_D38*
CPU_D39*
CPU_D40*
CPU_D41*
CPU_D42*
CPU_D43*
CPU_D44*
CPU_D45*
CPU_D46*
CPU_D47*
CPU_D48*
CPU_D49*
CPU_D50*
CPU_D51*
CPU_D52*
CPU_D53*
CPU_D54*
CPU_D55*
CPU_D56*
CPU_D57*
CPU_D58*
CPU_D59*
CPU_D60*
CPU_D61*
CPU_D62*
CPU_D63*
CPU_RESET*
BCLK_IN_N
BCLK_IN_P
CPU_BSEL0
CPU_BSEL1
CPU_BSEL2
CPU_PECI
Y41
Y43
Y40
W42
Y42
Y39
V42
W41
T41
T43
T42
T39
U41
R41
P42
R42
AA38
AA35
AA36
AA37
AA34
W33
W34
W35
W38
U33
U34
U35
U36
U37
R33
U38
R35
R34
P35
N34
R38
R37
N33
R39
N36
N38
L37
L38
L39
J37
J38
J39
H40
L42
P41
M40
N40
N41
K42
M42
M43
L41
H42
H41
J40
K41
H43
H39
H38
G42
G41
AL43
AL42
AL41
AK42
AK41
AJ40
F41
D42
F42
E41
AJ41
AG43
AH28
AG28
AM39
AM40
H_D#0
H_D#1
H_D#2
H_D#3
H_D#4
H_D#5
H_D#6
H_D#7
H_D#8
H_D#9
H_D#10
H_D#11
H_D#12
H_D#13
H_D#14
H_D#15
H_D#16
H_D#17
H_D#18
H_D#19
H_D#20
H_D#21
H_D#22
H_D#23
H_D#24
H_D#25
H_D#26
H_D#27
H_D#28
H_D#29
H_D#30
H_D#31
H_D#32
H_D#33
H_D#34
H_D#35
H_D#36
H_D#37
H_D#38
H_D#39
H_D#40
H_D#41
H_D#42
H_D#43
H_D#44
H_D#45
H_D#46
H_D#47
H_D#48
H_D#49
H_D#50
H_D#51
H_D#52
H_D#53
H_D#54
H_D#55
H_D#56
H_D#57
H_D#58
H_D#59
H_D#60
H_D#61
H_D#62
H_D#63
CPUCLK
CPUCLK#
BCLK_OUT
BCLK_OUT#
BCLK_IN#
BCLK_IN
CPU_BSEL0
CPU_BSEL1
CPU_BSEL2
H_PROCHOT#_R
TRMTRIP#
VCC1_1_PLL
COMP_BCLK_V
COMP_BCLK_G
5
H_CPURST# 4,5
R161 0R0402R161 0R0402
R167 0R0402R167 0R0402
R164 0R0402R164 0R0402
R163 0R0402R163 0R0402
R171 X_22R0402R171 X_22R0402
TRMTRIP# 4,5
R152 49.9R1%0402R152 49.9R1%0402
R159 49.9R1%0402R159 49.9R1%0402
H_D#[0..63] 4
match with cpuclk under 20mil
PECI 4,21
VCC1_1_PLL
C550
C550
C1u6.3X50402-1
C1u6.3X50402-1
bottom
R117 0R0402R117 0R0402
V_FSB_VTT
4
3
CPU_BSEL14
CPU_BSEL04
CPU_BSEL24
RN21
RN21
7
8
5
6
3
4
1
2
8P4R-470R0402
8P4R-470R0402
2
V_FSB_VTT
1
BSEL[2..0] FSB CLK (MHz)
R160
R160
X_49.9R1%0402
X_49.9R1%0402
H_PROCHOT# 4,5
R166
R166
X_49.9R1%0402
X_49.9R1%0402
000
001
010
100
TBD
C175
C175
X_C15p50N0402
X_C15p50N0402
266MHz
133MHz
200MHz
333MHz
Reserved
CK_H_CPU 4
CK_H_CPU# 4
C172
C172
X_C15p50N0402
X_C15p50N0402
MICRO-START INT'L CO.,LTD.
MICRO-START INT'L CO.,LTD.
Title
Title
Title
MCP7A-CPU
MCP7A-CPU
MCP7A-CPU
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet
8
7
6
5
4
3
Date: Sheet
2
MICRO-START INT'L CO.,LTD.
MS-7538 0A
MS-7538 0A
MS-7538 0A
of
of
of
735Wednesday, May 21, 2008
735Wednesday, May 21, 2008
735Wednesday, May 21, 2008
1
8
7
6
5
4
3
2
1
DATA 1
DATA 0
D D
MEM_0_DQS[0..7]17
MEM_0_DQS#[0..7]17
MEM_0_DQM[0..7]17
C C
MEM_0_ADD[0..14]17,18
MEM_0_BA[0..2]17,18
MEM_0A_CS#[0..1]17,18
B B
A A
MEM_0A_CKE[0..1]17,18
MEM_0A_ODT[0..1]17,18
MEM_0A_CLK017
MEM_0A_CLK#017
MEM_0A_CLK117
MEM_0A_CLK#117
MEM_0A_CLK217
MEM_0A_CLK#217
MEM_0B_CS#[0..1]17,18
MEM_0B_CKE[0..1]17,18
MEM_0B_ODT[0..1]17,18
MEM_0B_CLK017
MEM_0B_CLK#017
MEM_0B_CLK117
MEM_0B_CLK#117
MEM_0B_CLK217
MEM_0B_CLK#217
DIMM 1
DIMM 2
DIMM 3
DIMM 4
MEM_0_DQS0
MEM_0_DQS#0
MEM_0_DQS1
MEM_0_DQS#1
MEM_0_DQS2
MEM_0_DQS#2
MEM_0_DQS3
MEM_0_DQS#3
MEM_0_DQS4
MEM_0_DQS#4
MEM_0_DQS5
MEM_0_DQS#5
MEM_0_DQS6
MEM_0_DQS#6
MEM_0_DQS7
MEM_0_DQS#7
MEM_0_DQM0
MEM_0_DQM1
MEM_0_DQM2
MEM_0_DQM3
MEM_0_DQM4
MEM_0_DQM5
MEM_0_DQM6
MEM_0_DQM7
MEM_0_ADD0
MEM_0_ADD1
MEM_0_ADD2
MEM_0_ADD3
MEM_0_ADD4
MEM_0_ADD5
MEM_0_ADD6
MEM_0_ADD7
MEM_0_ADD8
MEM_0_ADD9
MEM_0_ADD10
MEM_0_ADD11
MEM_0_ADD12
MEM_0_ADD13
MEM_0_ADD14
MEM_0_BA0
MEM_0_BA1
MEM_0_BA2
MEM_0A_CS#0
MEM_0A_CS#1
MEM_0A_CKE0
MEM_0A_CKE1
MEM_0A_ODT0
MEM_0A_ODT1
MEM_0A_CLK0
MEM_0A_CLK#0
MEM_0A_CLK1
MEM_0A_CLK#1
MEM_0A_CLK2
MEM_0A_CLK#2
MEM_0B_CS#0
MEM_0B_CS#1
MEM_0B_CKE0
MEM_0B_CKE1
MEM_0B_ODT0
MEM_0B_ODT1
MEM_0B_CLK0
MEM_0B_CLK#0
MEM_0B_CLK1
MEM_0B_CLK#1
MEM_0B_CLK2
MEM_0B_CLK#2
ADDR 1 / CNTL 1A
ADDR 1 / CNTL 1B
ADDR 0 / CNTL 0A
ADDR 0 / CNTL 0B
U2014B
U2014B
AU39
MDQS0_0_P
AT39
MDQS0_0_N
AT35
MDQS0_1_P
AU35
MDQS0_1_N
AU30
MDQS0_2_P
AU29
MDQS0_2_N
AV25
MDQS0_3_P
AW25
MDQS0_3_N
AP13
MDQS0_4_P
AR13
MDQS0_4_N
AW7
MDQS0_5_P
AW8
MDQS0_5_N
AR8
MDQS0_6_P
AR9
MDQS0_6_N
AL10
MDQS0_7_P
AL11
MDQS0_7_N
AR34
MDQM0_0
AV35
MDQM0_1
AW29
MDQM0_2
AN27
MDQM0_3
AN13
MDQM0_4
AR10
MDQM0_5
AU5
MDQM0_6
AN5
MDQM0_7
AR19
MA0_0
AT19
MA0_1
AU19
MA0_2
AV19
MA0_3
AN21
MA0_4
AR21
MA0_5
AP21
MA0_6
AU21
MA0_7
AR22
MA0_8
AV21
MA0_9
AN19
MA0_10
AW21
MA0_11
AN23
MA0_12
AU15
MA0_13
AR23
MA0_14
AW17
MBA0_0
AP19
MBA0_1
AP23
MBA0_2
AR18
MCS0A_0*
AT15
MCS0A_1*
AT23
MCKE0A_0
AU23
MCKE0A_1
AV15
MODT0A_0
AP15
MODT0A_1
BB20
MCLK0A_0_P
BC20
MCLK0A_0_N
BA24
MCLK0A_1_P
AY24
MCLK0A_1_N
AW33
MCLK0A_2_P
AV33
MCLK0A_2_N
AU17
MCS0B_0*
AR15
MCS0B_1*
AV23
MCKE0B_0
AN25
MCKE0B_1
AN17
MODT0B_0
AN15
MODT0B_1
BA21
MCLK0B_0_P
BB21
MCLK0B_0_N
BB24
MCLK0B_1_P
BC24
MCLK0B_1_N
AU33
MCLK0B_2_P
AU34
MCLK0B_2_N
NVIDIA-MCP7A-B01-RH
NVIDIA-MCP7A-B01-RH
Channel 0
MDQ0_0
MDQ0_1
MDQ0_2
MDQ0_3
MDQ0_4
MDQ0_5
MDQ0_6
MDQ0_7
MDQ0_8
MDQ0_9
MDQ0_10
MDQ0_11
MDQ0_12
MDQ0_13
MDQ0_14
MDQ0_15
MDQ0_16
MDQ0_17
MDQ0_18
MDQ0_19
MDQ0_20
MDQ0_21
MDQ0_22
MDQ0_23
MDQ0_24
MDQ0_25
MDQ0_26
MDQ0_27
MDQ0_28
MDQ0_29
MDQ0_30
MDQ0_31
MDQ0_32
MDQ0_33
MDQ0_34
MDQ0_35
MDQ0_36
MDQ0_37
MDQ0_38
MDQ0_39
MDQ0_40
MDQ0_41
MDQ0_42
MDQ0_43
MDQ0_44
MDQ0_45
MDQ0_46
MDQ0_47
MDQ0_48
MDQ0_49
MDQ0_50
MDQ0_51
MDQ0_52
MDQ0_53
MDQ0_54
MDQ0_55
MDQ0_56
MDQ0_57
MDQ0_58
MDQ0_59
MDQ0_60
MDQ0_61
MDQ0_62
MDQ0_63
MRAS0*
MCAS0*
MWE0*
MRESET0*
MEM_COMP_1P8V
MEM_COMP_GND
MEM_0_DATA0
AP35
MEM_0_DATA1
AR35
MEM_0_DATA2
AW38
MEM_0_DATA3
AV38
MEM_0_DATA4
AR38
MEM_0_DATA5
AR37
MEM_0_DATA6
AV39
MEM_0_DATA7
AW39
MEM_0_DATA8
AU37
MEM_0_DATA9
AT37
MEM_0_DATA10
AV31
MEM_0_DATA11
AT31
MEM_0_DATA12
AW37
MEM_0_DATA13
AV37
MEM_0_DATA14
AR33
MEM_0_DATA15
AU31
MEM_0_DATA16
AN31
MEM_0_DATA17
AV29
MEM_0_DATA18
AN29
MEM_0_DATA19
AV27
MEM_0_DATA20
AR31
MEM_0_DATA21
AP31
MEM_0_DATA22
AR29
MEM_0_DATA23
AP29
MEM_0_DATA24
AR27
MEM_0_DATA25
AP27
MEM_0_DATA26
AR25
MEM_0_DATA27
AP25
MEM_0_DATA28
AU27
MEM_0_DATA29
AT27
MEM_0_DATA30
AU25
MEM_0_DATA31
AR26
MEM_0_DATA32
AU13
MEM_0_DATA33
AR14
MEM_0_DATA34
AT11
MEM_0_DATA35
AR11
MEM_0_DATA36
AW13
MEM_0_DATA37
AV13
MEM_0_DATA38
AV11
MEM_0_DATA39
AU11
MEM_0_DATA40
AV9
MEM_0_DATA41
AU9
MEM_0_DATA42
AY5
MEM_0_DATA43
AW6
MEM_0_DATA44
AP11
MEM_0_DATA45
AW9
MEM_0_DATA46
AU8
MEM_0_DATA47
AU7
MEM_0_DATA48
AV5
MEM_0_DATA49
AU6
MEM_0_DATA50
AR5
MEM_0_DATA51
AN10
MEM_0_DATA52
AW5
MEM_0_DATA53
AV6
MEM_0_DATA54
AR7
MEM_0_DATA55
AR6
MEM_0_DATA56
AN7
MEM_0_DATA57
AN6
MEM_0_DATA58
AL7
MEM_0_DATA59
AL6
MEM_0_DATA60
AN9
MEM_0_DATA61
AP9
MEM_0_DATA62
AL9
MEM_0_DATA63
AL8
MEM_0_RAS#
AV17
MEM_0_CAS#
AP17
MEM_0_WE#
AR17
AY32
M_DRV0_1P8V
AN41
M_DRV1_GND
AM41
MEM_0_DATA[0..63] 17
MEM_0_RAS# 17,18
MEM_0_CAS# 17,18
MEM_0_WE# 17,18
R155 40.2R1%0402R155 40.2R1%0402
R146 X_40.2R1%0402R146 X_40.2R1%0402
R154 X_40.2R1%0402R154 X_40.2R1%0402
R149 40.2R1%0402R149 40.2R1%0402
R155, R149: For B01 Chipset
R146, R154: For A01 Chipset
VCC_DDR
VCC_DDR
Channel 1
U2014C
MEM_1_DQS[0..7]16
MEM_1_DQS#[0..7]16
MEM_1_DQM[0..7]16
MEM_1_ADD[0..14]16,18
MEM_1_BA[0..2]16,18
MEM_1A_CS#[0..1]16,18
MEM_1A_CKE[0..1]16,18
MEM_1A_ODT[0..1]16,18
MEM_1A_CLK016
MEM_1A_CLK#016
MEM_1A_CLK116
MEM_1A_CLK#116
MEM_1A_CLK216
MEM_1A_CLK#216
MEM_1B_CS#[0..1]16,18
MEM_1B_CKE[0..1]16,18
MEM_1B_ODT[0..1]16,18
MEM_1B_CLK016
MEM_1B_CLK#016
MEM_1B_CLK116
MEM_1B_CLK#116
MEM_1B_CLK216
MEM_1B_CLK#216
MEM_1_DQS0
MEM_1_DQS#0
MEM_1_DQS1
MEM_1_DQS#1
MEM_1_DQS2
MEM_1_DQS#2
MEM_1_DQS3
MEM_1_DQS#3
MEM_1_DQS4
MEM_1_DQS#4
MEM_1_DQS5
MEM_1_DQS#5
MEM_1_DQS6
MEM_1_DQS#6
MEM_1_DQS7
MEM_1_DQS#7
MEM_1_DQM0
MEM_1_DQM1
MEM_1_DQM2
MEM_1_DQM3
MEM_1_DQM4
MEM_1_DQM5
MEM_1_DQM6
MEM_1_DQM7
MEM_1_ADD0
MEM_1_ADD1
MEM_1_ADD2
MEM_1_ADD3
MEM_1_ADD4
MEM_1_ADD5
MEM_1_ADD6
MEM_1_ADD7
MEM_1_ADD8
MEM_1_ADD9
MEM_1_ADD10
MEM_1_ADD11
MEM_1_ADD12
MEM_1_ADD13
MEM_1_ADD14
MEM_1_BA0
MEM_1_BA1
MEM_1_BA2
MEM_1A_CS#0
MEM_1A_CS#1
MEM_1A_CKE0
MEM_1A_CKE1
MEM_1A_ODT0
MEM_1A_ODT1
MEM_1A_CLK0
MEM_1A_CLK#0
MEM_1A_CLK1
MEM_1A_CLK#1
MEM_1A_CLK2
MEM_1A_CLK#2
MEM_1B_CS#0
MEM_1B_CS#1
MEM_1B_CKE0
MEM_1B_CKE1
MEM_1B_ODT0
MEM_1B_ODT1
MEM_1B_CLK0
MEM_1B_CLK#0
MEM_1B_CLK1
MEM_1B_CLK#1
MEM_1B_CLK2
MEM_1B_CLK#2
AT42
AT43
BA43
AY42
BB37
BA37
BB33
BA33
BA10
AY11
AR42
AY43
BB38
BB34
BA11
BA18
BB25
BA25
BB26
BA26
BA27
AY27
BA28
AY28
BB28
BA17
BC28
AW28
BA14
BA29
BB17
BB18
BB29
BB16
BB14
BB30
AY31
AY15
BB13
BA19
AY19
BB22
BA22
BA42
BB42
BC16
BA13
BA30
BA31
AY16
BC13
BA20
AY20
AY23
BA23
BA41
BB41
BB6
BA6
AY2
AY1
AT2
AT1
AY7
BA2
AT5
MDQS1_0_P
MDQS1_0_N
MDQS1_1_P
MDQS1_1_N
MDQS1_2_P
MDQS1_2_N
MDQS1_3_P
MDQS1_3_N
MDQS1_4_P
MDQS1_4_N
MDQS1_5_P
MDQS1_5_N
MDQS1_6_P
MDQS1_6_N
MDQS1_7_P
MDQS1_7_N
MDQM1_0
MDQM1_1
MDQM1_2
MDQM1_3
MDQM1_4
MDQM1_5
MDQM1_6
MDQM1_7
MA1_0
MA1_1
MA1_2
MA1_3
MA1_4
MA1_5
MA1_6
MA1_7
MA1_8
MA1_9
MA1_10
MA1_11
MA1_12
MA1_13
MA1_14
MBA1_0
MBA1_1
MBA1_2
MCS1A_0*
MCS1A_1*
MCKE1A_0
MCKE1A_1
MODT1A_0
MODT1A_1
MCLK1A_0_P
MCLK1A_0_N
MCLK1A_1_P
MCLK1A_1_N
MCLK1A_2_P
MCLK1A_2_N
MCS1B_0*
MCS1B_1*
MCKE1B_0
MCKE1B_1
MODT1B_0
MODT1B_1
MCLK1B_0_P
MCLK1B_0_N
MCLK1B_1_P
MCLK1B_1_N
MCLK1B_2_P
MCLK1B_2_N
U2014C
NVIDIA-MCP7A-B01-RH
NVIDIA-MCP7A-B01-RH
MDQ1_0
MDQ1_1
MDQ1_2
MDQ1_3
MDQ1_4
MDQ1_5
MDQ1_6
MDQ1_7
MDQ1_8
MDQ1_9
MDQ1_10
MDQ1_11
MDQ1_12
MDQ1_13
MDQ1_14
MDQ1_15
MDQ1_16
MDQ1_17
MDQ1_18
MDQ1_19
MDQ1_20
MDQ1_21
MDQ1_22
MDQ1_23
MDQ1_24
MDQ1_25
MDQ1_26
MDQ1_27
MDQ1_28
MDQ1_29
MDQ1_30
MDQ1_31
MDQ1_32
MDQ1_33
MDQ1_34
MDQ1_35
MDQ1_36
MDQ1_37
MDQ1_38
MDQ1_39
MDQ1_40
MDQ1_41
MDQ1_42
MDQ1_43
MDQ1_44
MDQ1_45
MDQ1_46
MDQ1_47
MDQ1_48
MDQ1_49
MDQ1_50
MDQ1_51
MDQ1_52
MDQ1_53
MDQ1_54
MDQ1_55
MDQ1_56
MDQ1_57
MDQ1_58
MDQ1_59
MDQ1_60
MDQ1_61
MDQ1_62
MDQ1_63
MRAS1*
MCAS1*
MWE1*
V1P1_PLL_MCLK
V1P1_DLLDLCELL_AVDD
AP42
AR41
AU41
AU40
AN40
AP41
AT41
AT40
AW41
AW42
BC40
BA40
AV41
AV42
AW40
BB40
AY39
BA38
BB36
BA36
AY40
BA39
AW36
BC36
AY35
BA34
BB32
BA32
AY36
BA35
AW32
BC32
BA12
AY12
BB9
BB8
AW12
BB12
BB10
BA9
AY8
BA7
BC4
BB4
BC8
BA8
BA5
BB5
BB2
BA3
AW3
AW4
BC3
BB3
AY3
AY4
AU3
AU2
AR3
AR4
AV3
AV2
AT3
AT4
AW16
BA15
BA16
AH27
30mA
AG27
MEM_1_DATA0
MEM_1_DATA1
MEM_1_DATA2
MEM_1_DATA3
MEM_1_DATA4
MEM_1_DATA5
MEM_1_DATA6
MEM_1_DATA7
MEM_1_DATA8
MEM_1_DATA9
MEM_1_DATA10
MEM_1_DATA11
MEM_1_DATA12
MEM_1_DATA13
MEM_1_DATA14
MEM_1_DATA15
MEM_1_DATA16
MEM_1_DATA17
MEM_1_DATA18
MEM_1_DATA19
MEM_1_DATA20
MEM_1_DATA21
MEM_1_DATA22
MEM_1_DATA23
MEM_1_DATA24
MEM_1_DATA25
MEM_1_DATA26
MEM_1_DATA27
MEM_1_DATA28
MEM_1_DATA29
MEM_1_DATA30
MEM_1_DATA31
MEM_1_DATA32
MEM_1_DATA33
MEM_1_DATA34
MEM_1_DATA35
MEM_1_DATA36
MEM_1_DATA37
MEM_1_DATA38
MEM_1_DATA39
MEM_1_DATA40
MEM_1_DATA41
MEM_1_DATA42
MEM_1_DATA43
MEM_1_DATA44
MEM_1_DATA45
MEM_1_DATA46
MEM_1_DATA47
MEM_1_DATA48
MEM_1_DATA49
MEM_1_DATA50
MEM_1_DATA51
MEM_1_DATA52
MEM_1_DATA53
MEM_1_DATA54
MEM_1_DATA55
MEM_1_DATA56
MEM_1_DATA57
MEM_1_DATA58
MEM_1_DATA59
MEM_1_DATA60
MEM_1_DATA61
MEM_1_DATA62
MEM_1_DATA63
MEM_1_RAS#
MEM_1_CAS#
MEM_1_WE#
60mA
VCC1_1_PLL
MEM_1_DATA[0..63] 16
MEM_1_RAS# 16,18
MEM_1_CAS# 16,18
MEM_1_WE# 16,18
C546
C546
C0.1u16X0402-2
C0.1u16X0402-2
bottom
FB3
FB3
X_30L500mA-200-RH
X_30L500mA-200-RH
CP23
CP23
X_COPPER
X_COPPER
VCC1_1VCC1_1_PLL
MICRO-START INT'L CO.,LTD.
MICRO-START INT'L CO.,LTD.
注意
8
7
6
5
4
3
Title
Title
Title
MCP7A-MEM
MCP7A-MEM
MCP7A-MEM
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet
Date: Sheet
2
MICRO-START INT'L CO.,LTD.
MS-7538 0A
MS-7538 0A
MS-7538 0A
of
of
of
835Wednesday, May 21, 2008
835Wednesday, May 21, 2008
835Wednesday, May 21, 2008
1
8
D D
C C
B B
R257 0R0402R257 0R0402
VCC3_SB
53
U18
U18
VCC
VCC
4
Y
PCIE_RST#27
X_SN74LVC1G08DBVR_SOT23-5-RH
X_SN74LVC1G08DBVR_SOT23-5-RH
Y
GND
GND
VCC1_1
A A
8
7
GPP_TX1P27
GPP_TX1N27
6
GPP_TX1P
GPP_TX1N
GPP_RX1P27
GPP_RX1N27
CK_PE_100M_4PORT27
CK_PE_100M_4PORT#27
CK_PE_100M_4PORT
CK_PE_100M_4PORT#
PE_X1_PRSNT#27
PE_RESET_GATE#11
WAKE#11,27
PE_RESET_GATE#
WAKE#
A
A
1
B
B
2
ATX_PWR_OK 11,21,29
CP25 X_COPPERCP25 X_COPPER R230 X_2.37KR1%0402R230 X_2.37KR1%0402
FB6
FB6
X_30L500mA-200-RH
X_30L500mA-200-RH
7
VCC1_1_PEPLL
C576
C576
C1u6.3X50402-1
C1u6.3X50402-1
VCC1_1_PLL2
6
G11
F11
J11
J10
G13
F13
J13
H13
L14
K14
N14
M14
C10
B10
L18
M18
M19
M15
L16
M16
M17
K11
F17
A11
T16
T27
C544
C544
C1u6.3X50402-1
C1u6.3X50402-1
U2014E
U2014E
D8
PE1_TX0_P
B8
PE1_TX1_P
A7
PE1_TX2_P
B6
PE1_TX3_P
C8
PE1_TX0_N
A8
PE1_TX1_N
B7
PE1_TX2_N
C6
PE1_TX3_N
K9
PE1_RX0_P
H9
PE1_RX1_P
F9
PE1_RX2_P
H7
PE1_RX3_P
J9
PE1_RX0_N
G9
PE1_RX1_N
E9
PE1_RX2_N
G7
PE1_RX3_N
PE1_REFCLK_P
PE1_REFCLK_N
PE2_REFCLK_P
PE2_REFCLK_N
PE3_REFCLK_P
PE3_REFCLK_N
PE4_REFCLK_P
PE4_REFCLK_N
PE5_REFCLK_P
PE5_REFCLK_N
PE6_REFCLK_P
PE6_REFCLK_N
D9
PEB_PRSNT*
PEC_PRSNT*
PED_PRSNT*
PEE_PRSNT#/GPIO_46
PEF_PRSNT#/GPIO_47
PEG_PRSNT#/GPIO_48
D5
PEB_CLKREQ#/GPIO_49
E8
PEC_CLKREQ#/GPIO_50
PED_CLKREQ#/GPIO_51
PEE_CLKREQ#/GPIO_16
PEF_CLKREQ#/GPIO_17
PEG_CLKREQ#/GPIO_18
PEX_RST0*
PE_WAKE*
PEX_CLK_COMP
V1P1_PLL_PEX
V1P1_PLL_XREF_XS
NVIDIA-MCP7A-B01-RH
NVIDIA-MCP7A-B01-RH
5
5
4
PE0_TX15_P
PE0_TX14_P
PE0_TX13_P
PE0_TX12_P
PE0_TX11_P
PE0_TX10_P
PE0_TX9_P
PE0_TX8_P
PE0_TX7_P
PE0_TX6_P
PE0_TX5_P
PE0_TX4_P
PE0_TX3_P
PE0_TX2_P
PE0_TX1_P
PE0_TX0_P
PE0_TX15_N
PE0_TX14_N
PE0_TX13_N
PE0_TX12_N
PE0_TX11_N
PE0_TX10_N
PE0_TX9_N
PE0_TX8_N
PE0_TX7_N
PE0_TX6_N
PE0_TX5_N
PE0_TX4_N
PE0_TX3_N
PE0_TX2_N
PE0_TX1_N
PE0_TX0_N
PE0_RX15_P
PE0_RX14_P
PE0_RX13_P
PE0_RX12_P
PE0_RX11_P
PE0_RX10_P
PE0_RX9_P
PE0_RX8_P
PE0_RX7_P
PE0_RX6_P
PE0_RX5_P
PE0_RX4_P
PE0_RX3_P
PE0_RX2_P
PE0_RX1_P
PE0_RX0_P
PE0_RX15_N
PE0_RX14_N
PE0_RX13_N
PE0_RX12_N
PE0_RX11_N
PE0_RX10_N
PE0_RX9_N
PE0_RX8_N
PE0_RX7_N
PE0_RX6_N
PE0_RX5_N
PE0_RX4_N
PE0_RX3_N
PE0_RX2_N
PE0_RX1_N
PE0_RX0_N
PE0_REFCLK_P
PE0_REFCLK_N
PE0_PRSNT_16*
4
M2
M4
L4
K2
J2
H1
H3
G3
F3
E2
D2
C1
B3
A4
C4
C5
M1
M3
L3
K3
J3
J1
H2
H4
F4
F2
E1
D1
B2
A3
B4
D4
N5
N7
N9
N11
L7
L9
L11
J5
J7
G5
C3
E4
E5
E6
D7
F7
N4
N6
P9
N10
L6
L8
L10
J4
J6
H5
D3
E3
F5
F6
C7
E7
E11
D11
C9
GFX_TXC_15P
GFX_TXC_14P
GFX_TXC_13P
GFX_TXC_12P
GFX_TXC_11P
GFX_TXC_10P
GFX_TXC_9P
GFX_TXC_8P
GFX_TXC_7P
GFX_TXC_6P
GFX_TXC_5P
GFX_TXC_4P
GFX_TXC_3P
GFX_TXC_2P
GFX_TXC_1P
GFX_TXC_0P
GFX_TXC_15N
GFX_TXC_14N
GFX_TXC_13N
GFX_TXC_12N
GFX_TXC_11N
GFX_TXC_10N
GFX_TXC_9N
GFX_TXC_8N
GFX_TXC_7N
GFX_TXC_6N
GFX_TXC_5N
GFX_TXC_4N
GFX_TXC_3N
GFX_TXC_2N
GFX_TXC_1N
GFX_TXC_0N
3
GFX_TXC_15P 27
GFX_TXC_14P 27
GFX_TXC_13P 27
GFX_TXC_12P 27
GFX_TXC_11P 27
GFX_TXC_10P 27
GFX_TXC_9P 27
GFX_TXC_8P 27
GFX_TXC_7P 27
GFX_TXC_6P 27
GFX_TXC_5P 27
GFX_TXC_4P 27
GFX_TXC_3P 27
GFX_TXC_2P 27
GFX_TXC_1P 27
GFX_TXC_0P 27
GFX_TXC_15N 27
GFX_TXC_14N 27
GFX_TXC_13N 27
GFX_TXC_12N 27
GFX_TXC_11N 27
GFX_TXC_10N 27
GFX_TXC_9N 27
GFX_TXC_8N 27
GFX_TXC_7N 27
GFX_TXC_6N 27
GFX_TXC_5N 27
GFX_TXC_4N 27
GFX_TXC_3N 27
GFX_TXC_2N 27
GFX_TXC_1N 27
GFX_TXC_0N 27
GFX_RX15P 27
GFX_RX14P 27
GFX_RX13P 27
GFX_RX12P 27
GFX_RX11P 27
GFX_RX10P 27
GFX_RX9P 27
GFX_RX8P 27
GFX_RX7P 27
GFX_RX6P 27
GFX_RX5P 27
GFX_RX4P 27
GFX_RX3P 27
GFX_RX2P 27
GFX_RX1P 27
GFX_RX0P 27
GFX_RX15N 27
GFX_RX14N 27
GFX_RX13N 27
GFX_RX12N 27
GFX_RX11N 27
GFX_RX10N 27
GFX_RX9N 27
GFX_RX8N 27
GFX_RX7N 27
GFX_RX6N 27
GFX_RX5N 27
GFX_RX4N 27
GFX_RX3N 27
GFX_RX2N 27
GFX_RX1N 27
GFX_RX0N 27
CK_PE_100M_16PORT 27
CK_PE_100M_16PORT# 27
PE_X16_PRSNTX16# 27
3
2
MICRO-START INT'L CO.,LTD.
MICRO-START INT'L CO.,LTD.
Title
Title
Title
MCP7A-PCIE
MCP7A-PCIE
MCP7A-PCIE
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
B
B
B
Date: Sheet
Date: Sheet
Date: Sheet
MICRO-START INT'L CO.,LTD.
MS-7538 0A
MS-7538 0A
MS-7538 0A
2
1
935Wednesday, May 21, 2008
935Wednesday, May 21, 2008
935Wednesday, May 21, 2008
of
of
of
1
8
7
6
5
4
3
2
1
D D
C C
C_BE#[3..0]28
B B
PCIRST_SLOT#28
AD[31..0]28
PCIRST_SLOT#
AD[31..0]
C_BE#[3..0]
FRAME#28
IRDY#28
TRDY#28
STOP#28
DEVSEL#28
PAR28
PERR#28
SERR#28
PCI_PME#11,28
R267 33R0402R267 33R0402
C308 X_C22p50N0402-1C308 X_C22p50N0402-1
AD0
AD1
AD2
AD3
AD4
AD5
AD6
AD7
AD8
AD9
AD10
AD11
AD12
AD13
AD14
AD15
AD16
AD17
AD18
AD19
AD20
AD21
AD22
AD23
AD24
AD25
AD26
AD27
AD28
AD29
AD30
AD31
C_BE#0
C_BE#1
C_BE#2
C_BE#3
FRAME#
IRDY#
TRDY#
STOP#
DEVSEL#
PAR
PERR#
SERR#
PCI_PME#
PCIRST_SLOT#
U2014F
U2014F
AC3
PCI_AD0
AE10
PCI_AD1
AC4
PCI_AD2
AE11
PCI_AD3
AB3
PCI_AD4
AC6
PCI_AD5
AB2
PCI_AD6
AC7
PCI_AD7
AC8
PCI_AD8
AA2
PCI_AD9
AC9
PCI_AD10
AC10
PCI_AD11
AC11
PCI_AD12
AA1
PCI_AD13
AA5
PCI_AD14
Y5
PCI_AD15
W3
PCI_AD16
W6
PCI_AD17
W4
PCI_AD18
W7
PCI_AD19
V3
PCI_AD20
W8
PCI_AD21
V2
PCI_AD22
W9
PCI_AD23
U3
PCI_AD24
W11
PCI_AD25
U2
PCI_AD26
U5
PCI_AD27
U1
PCI_AD28
U6
PCI_AD29
T5
PCI_AD30
U7
PCI_AD31
AA3
PCI_CBE0*
AA6
PCI_CBE1*
AA11
PCI_CBE2*
W10
PCI_CBE3*
Y4
PCI_FRAME*
AA10
PCI_IRDY*
Y3
PCI_TRDY*
Y2
PCI_STOP*
AA9
PCI_DEVSEL*
Y1
PCI_PAR
AB9
PCI_PERR#/GPIO_43/RS232_DCD*
AA7
PCI_SERR*
T1
PCI_PME#/GPIO_30
AD11
PCI_CLKRUN#/GPIO_42
R10
PCI_RESET0*
R11
PCI_RESET1*
NVIDIA-MCP7A-B01-RH
NVIDIA-MCP7A-B01-RH
PCI_REQ0*
PCI_REQ1#/FANRPM2
PCI_REQ2#/GPIO_40/RS232_DSR*
PCI_REQ3#/GPIO_38/RS232_CTS*
PCI_REQ4#/GPIO_52/RS232_SIN*
PCI_GNT0*
PCI_GNT1#/FANCTL2
PCI_GNT2#/GPIO_41/RS232_DTR*
PCI_GNT3#/GPIO_39/RS232_RTS*
PCI_GNT4#/GPIO_53/RS232_SOUT*
PCI_CLK0
PCI_CLK1
PCI_CLK2
PCI_CLKIN
PCI_INTW*
PCI_INTX*
PCI_INTY*
PCI_INTZ*
LPC_AD0
LPC_AD1
LPC_AD2
LPC_AD3
LPC_DRQ0*
LPC_DRQ1#/GPIO_19
LPC_FRAME*
LPC_SERIRQ
LPC_RESET0*
LPC_PWRDWN#/GPIO_54/EXT_NMI*
LPC_CLK0
T2
V9
T3
U9
T4
R3
U10
R4
U11
P3
PREQ#0 28
PREQ#1 28
PREQ#2 28
PREQ#3 28
PREQ#4 28
PGNT#0 28
PGNT#1 28
Medion: Double Master PCI.
PCICLK0
R6
PCICLK1
R7
R8
R9
P2
N3
N2
N1
LPCAD0
AD3
LPCAD1
AD2
LPCAD2
AD1
LPCAD3
AD5
LPC_DRQ#0
AE1
AE2
LPCFRAME# LPC_FRAME#
AD4
SERIRQ
AE6
AE5
AE12
AE9
R249 33R0402R249 33R0402
R242 33R0402R242 33R0402
R261 22R0402R261 22R0402
PCI_INTW# 28
PCI_INTX# 28
PCI_INTY# 28
PCI_INTZ# 28
LPCAD3
LPCAD2
LPCAD1
LPCAD0
R266 22R0402R266 22R0402
R247 33R0402R247 33R0402
R258 33R0402R258 33R0402
PCI_CLK0
PCI_CLK1
PCI_CLKINPCICLK2
1
3
5
7
PCI_CLK0 28
PCI_CLK1 28
PCI_CLKIN = PCICLK+3000mil
RN32
RN32
LPC_AD3
2
4
6
8
8P4R-22R0402
8P4R-22R0402
LPC_SIO_CLKLPC_CLK0
LPC_AD2
LPC_AD1
LPC_AD0
LPC_DRQ#0 21
LPC_FRAME# 21
SERIRQ 21
SIO_RST# 21
LPC_AD3 21
LPC_AD2 21
LPC_AD1 21
LPC_AD0 21
LPC_SIO_CLK 21
LPC_AD[0..3]
PCI_CLK0
PCI_CLK1
PCICLK2
PCI_CLKIN
LPC_SIO_CLK
FOR EMI
LPCFRAME#
LPC_AD[0..3] 21
C278 C22p50N0402-1C278 C22p50N0402-1
C270 C22p50N0402-1C270 C22p50N0402-1
C283 C22p50N0402-1C283 C22p50N0402-1
C286 X_C22p50N0402-1C286 X_C22p50N0402-1
C287 X_C22p50N0402-1C287 X_C22p50N0402-1
R279
R279
8.2KR0402
8.2KR0402
STRAP
HDA_SDOUT
LPC_FRAME
00 = LPC BIOS
01 = PCI BIOS
10 = SPI BIOS
11 = RESERVED
A A
MICRO-START INT'L CO.,LTD.
MICRO-START INT'L CO.,LTD.
Title
Title
Title
MCP7A-PCI/LPC
MCP7A-PCI/LPC
MCP7A-PCI/LPC
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
B
B
B
Date: Sheet
Date: Sheet
8
7
6
5
4
3
Date: Sheet
MICRO-START INT'L CO.,LTD.
MS-7538 0A
MS-7538 0A
MS-7538 0A
2
10 35Wednesday, May 21, 2008
10 35Wednesday, May 21, 2008
10 35Wednesday, May 21, 2008
of
of
of
1
8
7
6
5
4
3
2
1
VCC3_SB
MCP7A STRAP PIN
C248
U16
VCC3
HDA_SYNC
(SIO CLK)
0 = 14.318MHZ
R264
R264
1 = 24MHZ *
10KR0402
10KR0402
VCC3_SB
AZSYNC
MII_TXD0
0 = MII
1 = RGMII *
R186
R186
10KR0402
10KR0402
RGMII_TXD_0
VCC3
D D
Follow DA-03650-001_v06
VCC3_SB
R193 X_10KR0402R193 X_10KR0402
R194 X_10KR0402R194 X_10KR0402
R231 X_10KR0402R231 X_10KR0402
R226 X_10KR0402R226 X_10KR0402
R222 X_10KR0402R222 X_10KR0402
C C
R218 X_10KR0402R218 X_10KR0402
R254 X_10KR0402R254 X_10KR0402
R268 X_10KR0402R268 X_10KR0402
R219 X_15KR0402R219 X_15KR0402
R221 X_15KR0402R221 X_15KR0402
R380
R380
X_8.2KR0402
X_8.2KR0402
R269 X_0R0402R269 X_0R0402
R250 X_0R0402R250 X_0R0402
Only for MCP7A A01 Bring-Up Update #2
LID
LLB
SB_PWRON#
FP_RST#
LPC_SMI#
SIO_PME#
PE_RESET_GATE#
WAKE#
JTAG_TDI
JTAG_TMS
PCI_PME#
SLP_S5#
SLP_S3#
I2C EEPROM for HDCP.
U19
U19
1
2
3
B B
M33-24C16B3-A26
VCC3_SB
X
Y
R345
R345
1KR0402
1KR0402
12
VBAT1
VBAT1
BAT2P_BLACK-RH-1
BAT2P_BLACK-RH-1
A A
Reserve for EMI
VCC3
C320
C320
X_C0.1u16X0402-2
X_C0.1u16X0402-2
8
8
A0
VCC
7
A1
WP
6
A2
SCL
5
GND4SDA
AT24C16BN-SH-T-RH
AT24C16BN-SH-T-RH
AP Note
DA-03105-001-v03
VBAT
D19
D19
S-BAT54C_SOT23
S-BAT54C_SOT23
R359 49.9KR1%0402R359 49.9KR1%0402
Z
C444
C444
X_C0.1u16X0402-2
X_C0.1u16X0402-2
C284
C284
X_C0.1u16X0402-2
X_C0.1u16X0402-2
SPKR
R229
R229
1KR0402
1KR0402
R284
R284
8.2KR0402
8.2KR0402
AZ_SDOUT
PE_RESET_GATE# 9
WAKE# 9,27
PCI_PME# 10,28
VCC3VCC3
C311
C311
SCLK
SDATA
C0.1u16X0402-2
C0.1u16X0402-2
R360 0R0402R360 0R0402
C446
C446
C1u6.3Y0402-RH
C1u6.3Y0402-RH
SPKR
0 = USER *
1 = SAFE MODE
00 = LPC BIOS
01 = PCI BIOS
10 = SPI BIOS
11 = RESERVED
注意
R288
R288
10KR0402
10KR0402
STRAP
HDA_SDOUT
LPC_FRAME
VCC3
VCC3_SB
J3
J3
1
2
3
X_N31-1030151+N33-1020271-RH
X_N31-1030151+N33-1020271-RH
RTC_RST*
C450
C450
X_C0.1u16X0402-2
X_C0.1u16X0402-2
CMOS CLEAR JUMPER
JBAT1 Clear CMOS
1 - 2
2 - 3 Clear CMOS
7
Normal
注意
USB_EN20
RGMII_TXD219
RGMII_TXD319
RGMII_TXD119
RGMII_TXD019
VCC3_SB
RN34
RN34
1
2
3
4
5
6
7
8
8P4R-2.7KR0402
8P4R-2.7KR0402
G
G
CLR_CMOS1
CLR_CMOS1
2 3
C310 X_C10p50N0402C310 X_C10p50N0402
C290 X_C10p50N0402C290 X_C10p50N0402
VCC3_SB
R220
R220
10KR0402
10KR0402
RN29
RN29
1
3
5
7
8P4R-0R0402
8P4R-0R0402
R179
R179
1.47KR1%0402
1.47KR1%0402
MII_VREF MII_VREF
R180
R180
1.47KR1%0402
1.47KR1%0402
SMB_MEM_DATA
SMB_MEM_CLK
SDATA
SCLK
AZ_BITCLK
AZRST#
VCC3_SB
R200 49.9R1%0402R200 49.9R1%0402
USB_EN USB_EN
RGMII_TXD_2
2
RGMII_TXD_3
4
RGMII_TXD_1
6
RGMII_TXD_0
8
C211
C211
C0.1u16X0402-2
C0.1u16X0402-2
V1P1_DUAL
FB5
FB5
30L500mA-200-RH
30L500mA-200-RH
SMB_MEM_DATA16,17
SMB_MEM_CLK16,17
AZ_SDATA_OUT24
SDATA_IN24
AZ_BITCLK24
AZ_RESET#24
RGMII_TXCLK19
RGMII_RXD019
RGMII_RXD119
RGMII_RXD219
RGMII_RXD319
RGMII_RXCLK_N19
RGMII_TXCTRL19
RGMII_RXCTRL19
RGMII_MDC19
RGMII_MDIO19
RGMII_PWRDWN19
VCC3_SB
C554
C554
C1u6.3X50402-1
C1u6.3X50402-1
SDATA23,26,27,28
SCLK23,26,27,28
R283 22R0402R283 22R0402
需要麼
R263 22R0402R263 22R0402
AZ_SYNC24
R285 22R0402R285 22R0402
R265 22R0402R265 22R0402
SPKR29
R185 0R0402R185 0R0402
C214 X_C10p50N0402C214 X_C10p50N0402
R181 0R0402R181 0R0402
R209 10KR0402R209 10KR0402
RGMII_RST#19
R183 49.9R1%0402R183 49.9R1%0402
R184 49.9R1%0402R184 49.9R1%0402
V1_1_DUAL_MACPLL
C555
C555
C1u6.3X50402-1
C1u6.3X50402-1
SMB_MEM_DATA
SMB_MEM_CLK
SDATA
SCLK
Place crysral within 1000mil of MCP7A.
Y3
Y3
1 2
25MHZ18P_D-4
25MHZ18P_D-4
C251
C251
C27p50N
C27p50N
14
R215
R215
100/4
100/4
SW-TACTB1_BLACK-RH-1
SW-TACTB1_BLACK-RH-1
C238
C238
C18p50N
C18p50N
6
Place crysral within 1000mil of MCP7A.
32.768KMZ12.5p_D-RH
32.768KMZ12.5p_D-RH
C253
C253
C27p50N
C27p50N
Y2
Y2
12
4
3
VBAT
C240
C240
C18p50N
C18p50N
R188 49.9KR1%0402R188 49.9KR1%0402
Close to U8
VBAT
5
AZ_SDOUT
OBR1
OBR2
?
AZSYNC
AZBITCLK
AZRST#
HDA_COMP
SPKR
RGMII_TXD_0
RGMII_TXD_1
RGMII_TXD_2
RGMII_TXD_3
RGMII_TX_CLK
RGMII_TX_CTRL
MII_COMP_3P3V
MII_COMP_GND
5mA
XTALIN
XTALOUT
INTRUDER#
RTC_RST*
XTALIN_RTC
XTALOUT_RTC
3mA
C230
C230
C1u6.3Y0402-RH
C1u6.3Y0402-RH
U2014H
U2014H
F15
HDA_SDATA_OUT
G15
HDA_SDATA_IN0
J14
GPIO_2/HDA_SDATA_IN1/PS2_KB_CLK
J15
GPIO_3/HDA_SDATA_IN2/PS2_KB_DATA
L15
HDA_SYNC
E15
HDA_BITCLK
K15
HDA_RESET*
A15
HDA_PULLDN_COMP
C13
SPKR
K17
GPIO_4/HDA_DOCK_EN#/PS2_MS_CLK
L17
GPIO_5/HDA_DOCK_RST#/PS2_MS_DATA
B24
MII_TXD0
C24
MII_TXD1
C25
MII_TXD2
D25
MII_TXD3
D24
MII_TXCLK
C23
MII_RXD0
B23
MII_RXD1
E24
MII_RXD2
A24
MII_RXD3
A23
MII_RXCLK
C26
MII_TXEN
C22
MII_RXDV
F23
MII_RXER/GPIO_36
B26
MII_COL/GPIO_20/MSMB_DATA
B22
MII_CRS/GPIO_21/MSMB_CLK
D21
MII_MDC
C21
MII_MDIO
J22
MII_INTR/GPIO_35
G23
MII_PWRDWN/GPIO_37
J23
MII_RESET*
E28
MII_VREF
C27
MII_COMP_VDD
B27
MII_COMP_GND
T23
V1P1_DUAL_MACPLL
K19
SMB_DATA0
L19
SMB_CLK0
F21
SMB_DATA1/MSMB_DATA
G21
SMB_CLK1/MSMB_CLK
M23
SMB_ALERT#/GPIO_64
A16
XTALIN
B16
XTALOUT
B20
INTRUDER*
C20
RTC_RST*
A19
XTALIN_RTC
B19
XTALOUT_RTC
A20
V3P3_VBAT
OBR function
JOBR1
JOBR1
H1X2M_BLACK-RH
H1X2M_BLACK-RH
1
2
JOBR2
JOBR2
H1X2M_BLACK-RH
H1X2M_BLACK-RH
1
2
4
JTAG_TDI
JTAG_TDO
JTAG_TCK
JTAG_TMS
JTAG_TRST*
GPIO_8/SPI_DI
GPIO_9/SPI_DO
GPIO_10/SPI_CS0
GPIO_11/SPI_CLK
A20GATE
EXT_SMI#/GPIO_32
PWRBTN*
RSTBTN*
SIO_PME*
KBRDRSTIN*
BUF_25MHZ
BUF_SIO_CLK
SUS_CLK/GPIO_34
SLP_RMGT*
SLP_S5*
SLP_S3*
PWRGD_SB
PS_PWRGD
CPU_VLD
CPUVDD_EN
CPU_DPRSLPVR
FANCTL0/GPIO_61
FANRPM0/GPIO_60
FANCTL1/GPIO_62
FANRPM1/GPIO_63
GPIO_1/PWRDN_OK/SPI_CS1
GPIO_6/FERR#/IGPU_GPIO6
GPIO_7/NFERR#/IGPU_GPIO7
GPIO_12/SUS_STAT#/ACCLMTR_EXT_TRIG
GPIO_13/MCP_VID0
GPIO_14/MCP_VID1
GPIO_15/MCP_VID2
THERM_DIODE_P
THERM_DIODE_N
TEST_MODE_EN
PKG_TEST
NVIDIA-MCP7A-B01-RH
NVIDIA-MCP7A-B01-RH
OBR1
OBR2
OBR1
C268 X_C0.1u16X0402-2C268 X_C0.1u16X0402-2
OBR2
C276 X_C0.1u16X0402-2C276 X_C0.1u16X0402-2
E19
F19
G19
J19
J18
C15
B14
C14
D13
K13
C18
C16
D16
C19
L13
M25
LID*
M24
LLB*
E23
AE7
B18
J17
H17
G17
D20
E20
C17
D17
M22
A12
B12
C12
D12
L24
E16
B15
L26
L20
M20
M21
B11
C11
K22
L22
R244 4.7KR0402R244 4.7KR0402
R251 4.7KR0402R251 4.7KR0402
3
JTAG_TDI
T10T10
JTAG_TCK
JTAG_TMS
JTAG_TRST#
SPI_DI
SPI_DO
SPI_CS0#
SPI_CLK
LPC_SMI#
SB_PWRON#
FP_RST#
SIO_PME#
LID
LLB
R248 33R0402R248 33R0402
SLP_S5#
SLP_S3#
R196 100KR0402R196 100KR0402
VCORE_EN
TMDS_DET1
TMDS_DET2
R190 1KR0402R190 1KR0402
VCC3_SB
R224
R224
10KR0402
10KR0402
R217
R217
15KR0402
15KR0402
C280
C280
X_C22p50N0402-1
X_C22p50N0402-1
SPI_CS0#
SPI_DI
WP_SIO0#
SB_OC_TURBO# 23
A20GATE 21
LPC_SMI# 21
SB_PWRON# 21
FP_RST# 23,29
SIO_PME# 21
KBRST# 21
SIO_24MCLK 21
SLP_S5# 23,25,26
SLP_S3# 21,26,29
RSMRST# 21
ATX_PWR_OK 9,21,29
VRM_GD 31
VCORE_EN 26
Fixed SPI interface too slow issue
Title
Title
Title
MCP7A-HDA/MII/SIO
MCP7A-HDA/MII/SIO
MCP7A-HDA/MII/SIO
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
MS-7538 0A
MS-7538 0A
Date: Sheet
Date: Sheet
Date: Sheet
MS-7538 0A
2
U16
1
CS
VCC
2
DO
HOLD
3
WP
CLK
4
GND
DIO
W25X80VSSIG-RH
W25X80VSSIG-RH
VCC3_SB
JSPI1
JSPI1
1 2
SPI_DI
3 4
SPI_CS0#
5
7 8
SPI_HOLD0#
9
H2X5[1]M-2PITCH_BLACK-RH
H2X5[1]M-2PITCH_BLACK-RH
SPI_HOLD0#
1
SPI_CLK
3
SPI_DO
5
WP_SIO0#
7
8P4R-10KR0402
8P4R-10KR0402
D
D
S
S
G
G
Q32
Q32
X_N-2N7002
X_N-2N7002
VCC5_SB
SLP_S3#
R443
R443
X_4.7KR0402
X_4.7KR0402
G
G
Only for version A01
RSMRST#
R195 4.7KR0402R195 4.7KR0402
C233
C233
C0.1u16X0402-2
C0.1u16X0402-2
HDMI / DVI Detect
TMDS_DET1
R206 X_10KR0402R206 X_10KR0402
R201 10KR0402R201 10KR0402
TMDS_DET2
R210 10KR0402R210 10KR0402
R207 X_10KR0402R207 X_10KR0402
TMDS_DET1 TMDS_DET2
HDMI
DVI
N/A
MICRO-START INT'L CO.,LTD.
MICRO-START INT'L CO.,LTD.
MICRO-START INT'L CO.,LTD.
0
1
00
8
7
6
5
RN31
RN31
Q33
Q33
X_N-2N7002
X_N-2N7002
D
D
S
S
G
G
R442
R442
X_4.7KR0402
X_4.7KR0402
D
D
Q59
Q59
X_N-2N7002
X_N-2N7002
S
S
1
SPI_HOLD0#
SPI_CLK
SPI_DO
6
VCC3_SB
2
4
6
8
VCC3_SB
VCC3_SB
VCC3_SB
1
0
11 35Wednesday, May 21, 2008
11 35Wednesday, May 21, 2008
11 35Wednesday, May 21, 2008
C248
C0.1u16X0402-2
C0.1u16X0402-2
SPI_DO
SPI_CLK
of
of
of
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