MSI MS-7534 Schematics
CONTENT SHEET
1
Cover Sheet, Block diagram
Intel LGA775 CPU
NVIDIA MCP7A
DDR2 DIMM 1 , 2
DDR2 DIMM 3 , 4
DDR2 Terminations
NVIDIA MCP7A
DVI-I Connector
PCI Slot 1 & 2
LPC-Super I/O F71882FG
ATX/Front Panel/FAN
PCI-Express Slot 22
Front USB CONNECTORS
A A
Rear USB CONNECTORS
LAN-RTL8211BL
Azalia Codec - ALC888S
1394-JMB381
ACPI Controller UPI
uP6103/VTT/REGULATOR
VRM11-ISL6333
MANUAL PARTS
1-2
3-5
6-7
8
9
10
11-17
18
19
20
21
23
24
25
26
27
28
29
30
31
MS-7534
CPU:
System Chipset:
On Board Device:
Main Memory:
Expansion Slots:
Intersil PWM:
Intel Conroe / Kentsfield / Yorkfield Wolfdale
family processors in LGA775 Package.
NVIDIA MCP7A
BIOS -- SPI Flash 8M
Azalia Codec -- ALC888S
HW Monitor -- F71882FG
LAN -- Realtek RTL8211BL-GR
CLOCK Gen -- Integated in MCP7A
1394 Controller -- JMB381
Dual-channel DDR-II * 4 (Max 8GB)
PCI EXPRESS X16 SLOT *1
PCI EXPRESS X1 SLOT * 1
PCI SLOT * 2
Controller: ISL6333 3-Phases
Micro ATX
Version: 0A
MICRO-STAR INT'L CO.,LTD
MICRO-STAR INT'L CO.,LTD
MICRO-STAR INT'L CO.,LTD
MS-7534
MS-7534
MSI
MSI
MSI
Size Document Description Rev
Size Document Description Rev
Size Document Description Rev
Custom
Custom
Custom
Date:
Friday, March 07, 2008
Date:
Friday, March 07, 2008
Date:
1
Friday, March 07, 2008
MS-7534
COVER SHEET
COVER SHEET
COVER SHEET
Sheet of
Sheet of
Sheet of
137
137
137
0A
0A
0A
Block Diagram
1
VRD 11
ISL6312CRZ
3_Phase PWM
PCI_E X16
Connector
HDMI
Connector
DVI-I
Connector
A A
SATA-II 1~4
USB Port 0~10
PCI EXPRESS X16
HDMI
RGB
TVRGB
SATA2
USB2.0
Intel LGA775 Processor
FSB 533/800/1066/1333
FSB
NVIDIA
MCP7A
DDR2 533/667/800
DDRII
PCI EXPRESS X1
PCI EXPRESS X1
PCI
2 DDR II
DIMM
Modules
PCI_E X1
Connector
JMB 381
PCI Slot 1
1394
PCI Slot 2
Board Stack-up
(1080 Prepreg Considerations)
Solder Mask
PREPREG 2.7mils
CORE 50mils
Solder Mask
PREPREG 2.7mils
Single End 50ohm Top/Bottom : 4mils
USB2.0 - 100ohm : 20/4/8/4/20
HDMI - 100ohm : 20/4/8/4/20
SATA - 100ohm : 20/4/8/4/20
LAN - 100ohm : 20/4/8/4/20
PCIE - 100ohm : 20/4/8/4/20
IEEE1394 - 110ohm : 15/4/9/4/15
IDE : 15/4/8/4/15
1.9mils Cu plus plating
1.9mils Cu plus plating
1 oz. (1.2mils)
Cu Power
Plane
1 oz. (1.2mils)
Cu GND
Plane
HDA Codec
ALC888S
SPI
Flash ROM
HD Audio Link
SPI
LPC
LPC SIO
VINTEK
F71882FG
MII/RGMII
LAN (PHY)
RTL8211BL
1
MICRO-STAR INT'L CO.,LTD
MICRO-STAR INT'L CO.,LTD
MICRO-STAR INT'L CO.,LTD
MS-7534
MS-7534
MSI
MSI
MSI
Size Document Description Rev
Size Document Description Rev
Size Document Description Rev
Custom
Custom
Custom
Date:
Friday, March 07, 2008
Date:
Friday, March 07, 2008
Date:
Friday, March 07, 2008
MS-7534
BLOCK DIAGRAM
BLOCK DIAGRAM
BLOCK DIAGRAM
Sheet of
Sheet of
Sheet of
237
237
237
0A
0A
0A
8
D D
H_TDI
H_TDO
H_TMS
H_TRST#
H_TCK
R130 51R0402R130 51R0402
R131 X_0R0402R131 X_0R0402
H_PWRGD4,6
H_CPURST#4,6,30
H_DBI#0
H_DBI#1
H_DBI#2
H_DBI#3
CPU_GTLREF2
THERMDA
THERMDC
H_TESTHI13
C9_RESERVED
CPU_GTLREF3
H_D#63
H_D#62
H_D#61
H_D#60
H_D#59
H_D#58
H_D#57
H_D#56
H_D#55
H_D#54
H_DBI#[0..3]6
CPU_GTLREF24
H_IERR#4
H_FERR#4,6
H_STPCLK#6
H_INIT#6
H_DBSY#6
H_DRDY#6
H_TRDY#6
H_ADS#6
H_LOCK#6
H_BNR#6
H_HIT#6
C C
H_TESTHI13 is not as H_SLP#.
MCP73 has no CPU_SLP# pin.
B B
H_D#[0..63]6
H_HITM#6
H_BPRI#6
H_DEFER#6
THERMDA20
THERMDC20
TRMTRIP#4,6
H_PROCHOT#4,6,20
H_IGNNE#6
H_SMI#6
H_A20M#6
CPU_GTLREF34
CPU_BSEL06
CPU_BSEL16
CPU_BSEL26
G11
D19
C20
AB2
AB3
AD3
AD1
AF1
AC1
AG1
AE1
AL1
AK1
AE8
AL2
AH2
AE6
G10
D16
A20
AA2
G29
H30
G30
G23
B22
A22
A19
B19
B21
C21
B18
A17
B16
C18
H_A#[3..35]6
A8
F2
R3
M3
P3
H4
B2
C1
E3
D2
C3
C2
D4
E4
G8
G7
M2
N2
P2
K3
L2
N5
C9
Y1
V2
N1
7
FP_RST#13,21
U4A
U4A
DBI0#
DBI1#
DBI2#
DBI3#
EDRDY#
IERR#
MCERR#
FERR#/PBE#
STPCLK#
BINIT#
INIT#
RSP#
DBSY#
DRDY#
TRDY#
ADS#
LOCK#
BNR#
HIT#
HITM#
BPRI#
DEFER#
TDI
TDO
TMS
TRST#
TCK
THERMDA
THERMDC
THERMTRIP#
GND/SKTOCC#
PROCHOT#
IGNNE#
SMI#
A20M#
TESTI_13
RSVD#AH2
RESERVED0
RESERVED1
RESERVED2
RESERVED3
RESERVED4
RESERVED5
BOOTSELECT
LL_ID0
LL_ID1
BSEL0
BSEL1
BSEL2
PWRGOOD
RESET#
D63#
D62#
D61#
D60#
D59#
D58#
D57#
D56#
D55#
D54#
H_D#53
D53#
B15
D52#
C14
C15
H_D#51
H_D#52
D51#
D50#
A14
H_D#50
CPU SIGNAL BLOCK
H_A#31
H_A#32
H_A#35
H_A#29
H_A#30
H_A#33
H_A#34
AJ6
AJ5
AH5
AH4
AG5
AG4
AG6
A35#
A34#
A33#
A32#
A31#
A30#
A29#
D49#
D48#
D47#
D46#
D45#
D44#
D43#
D42#
F21
E22
D20
G22
H_D#47
H_D#48
D22
H_D#46
H_D#45
G21
H_D#43
H_D#44
E21
H_D#42
D17
H_D#49
R127 X_0R0402R127 X_0R0402
H_A#28
H_A#27
H_A#24
H_A#25
H_A#26
AF4
AF5
AB4
AC5
AB5
A28#
A27#
A26#
A25#
D41#
D40#
D39#
D38#
F20
F18
F17
E19
E18
H_D#38
H_D#37
H_D#39
H_D#41
H_D#40
H_A#23
AA5
A24#
A23#
D37#
D36#
G17
H_D#36
H_A#22
H_A#21
AD6
AA4
A22#
D35#
E16
G18
H_D#34
H_D#35
6
H_A#20
H_A#19
A21#
A20#Y4A19#Y6A18#W6A17#
D34#
D33#
D32#
E15
G16
H_D#32
H_D#33
H_A#18
H_A#16
H_A#17
H_A#15
AB6
A16#W5A15#V4A14#V5A13#U4A12#U5A11#T4A10#
D31#
D30#
D29#
D28#
F15
F14
G15
G14
H_D#29
H_D#31
H_D#28
H_D#30
H_A#13
H_A#14
D27#
E13
G13
H_D#26
H_D#27
H_A#12
D26#
D25#
D13
H_D#25
H_A#11
F12
H_D#24
H_A#8
H_A#10
H_A#7
H_A#9
U6
A9#T5A8#R4A7#M4A6#L4A5#M5A4#P6A3#
D24#
D23#
D22#
D21#
F11
E10
D10
H_D#20
H_D#23
H_D#21
H_D#22
H_A#3
H_A#4
H_A#5
H_A#6
L5
D20#D7D19#E9D18#F9D17#F8D16#G9D15#
D11
H_D#14
H_D#15
H_D#17
H_D#18
H_D#19
H_D#16
AC2
DBR#
D14#
C12
B12
H_D#13
5
AN5
AN4
AN3
VSS_SENSE
VCC_SENSE
D13#
D12#D8D11#
B10
C11
H_D#12
H_D#10
H_D#11
VID7
VID6
VID5
AM7
AM5
AL4
AJ3
AK3
AN6
VID6#
VID5#
ITP_CLK1
ITP_CLK0
RSVD#AM7
GTLREF_SEL
VSS_MB_REGULATION
VCC_MB_REGULATION
D10#
D9#
D8#
D7#A7D6#B7D5#B6D4#A5D3#C6D2#A4D1#C5D0#
A11
A10
H_D#2
H_D#5
H_D#6
H_D#8
H_D#3
H_D#9
H_D#7
H_D#4
4
VCC_VRM_SENSE
VSS_VRM_SENSE
VID[0..7] 30
VID2
VID3
VID1
VID4
VID0
AK4
AL6
AM3
AL5
AM2
VID4#
VID3#
VID2#
VID1#
VID0#
VID_SELECT
GTLREF0
GTLREF1
GTLREF2
BPM5#
BPM4#
BPM3#
BPM2#
BPM1#
BPM0#
PCREQ#
REQ4#
REQ3#
REQ2#
REQ1#
REQ0#
TESTHI12
TESTHI11
TESTHI10
TESTHI9
TESTHI8
TESTHI7
TESTHI6
TESTHI5
TESTHI4
TESTHI3
TESTHI2
TESTHI1
TESTHI0
FORCEPH
RSVD#G6
BCLK1#
BCLK0#
RS2#
RS1#
RS0#
AP1#
AP0#
BR0#
COMP5
COMP4
COMP3
COMP2
COMP1
COMP0
DP3#
DP2#
DP1#
DP0#
ADSTB1#
ADSTB0#
DSTBP3#
DSTBP2#
DSTBP1#
DSTBP0#
DSTBN3#
DSTBN2#
DSTBN1#
DSTBN0#
LINT1/NMI
LINT0/INTR
ZIF-SOCKET775-RH-1,ZIF-SOCKET775_TH-2
ZIF-SOCKET775-RH-1,ZIF-SOCKET775_TH-2
B4
H_D#0
H_D#1
AN7
H1
H2
H29
E24
AG3
AF2
AG2
AD2
AJ1
AJ2
G5
J6
K6
M6
J5
K4
W2
P1
H5
G4
G3
F24
G24
G26
G27
G25
F25
W3
F26
AK6
G6
G28
F28
A3
F5
B3
U3
U2
F3
T2
J2
R1
G2
T1
A13
J17
H16
H15
J16
AD5
R6
C17
G19
E12
B9
A16
G20
G12
C8
L1
K1
R87
R87
X_51R0402
X_51R0402
CPU_GTLREF0
CPU_GTLREF1
GTLREF_SEL
P_GTLREF
H_BPM#5
H_BPM#4
H_BPM#3
H_BPM#2
H_BPM#1
H_BPM#0
PECI_CPU
H_REQ#4
H_REQ#3
H_REQ#2
H_REQ#1
H_REQ#0
H_TESTHI12
H_TESTHI11
H_TESTHI10
H_TESTHI9
H_TESTHI8
H_TESTHI2_7
H_TESTHI1
H_TESTHI0
FORCEPH
RSVD_G6
H_RS#2
H_RS#1
H_RS#0
TEST-U3
TEST-U2
H_COMP5
H_COMP4
H_COMP3
H_COMP2
H_COMP1
H_COMP0
TEST-J17
TEST-H16
TEST-H15
TEST-J16
3
VCC_VRM_SENSE 30
VSS_VRM_SENSE 30
VTT_OUT_RIGHT
R80
R80
680R0402
680R0402
CPU_GTLREF0 4
CPU_GTLREF1 4
T4T4
H_BPM#0 5
H_REQ#[0..4] 6
H_TESTHI12 5
R189 51R0402R189 51R0402
R191 51R0402R191 51R0402
R97 X_130R1%0402R97 X_130R1%0402
R148 X_51R0402R148 X_51R0402
CK_H_CPU# 6
CK_H_CPU 6
H_RS#[0..2] 6
T1T1
T2T2
H_BR#0 4,6
R155 49.9R1%0402R155 49.9R1%0402
R175 49.9R1%0402R175 49.9R1%0402
R193 49.9R1%0402R193 49.9R1%0402
T6T6
T7T7 C35
T5T5
T3T3
H_ADSTB#1 6
H_ADSTB#0 6
H_DSTBP#3 6
H_DSTBP#2 6
H_DSTBP#1 6
H_DSTBP#0 6
H_DSTBN#3 6
H_DSTBN#2 6
H_DSTBN#1 6
H_DSTBN#0 6
H_NMI 4,6
H_INTR 4,6
R129 0R0402R129 0R0402
R128 22R0402R128 22R0402
V_FSB_VTT
VTT_OUT_RIGHT
VTT_OUT_LEFT
C83
C83
C0.1u16X0402
C0.1u16X0402
PECI 20
CPU_MCP_PECI 6
VTT_OUT_LEFT
C220p50N0402
C220p50N0402
2
RN2
RN2
8P4R-680R
8P4R-680R
VID2
1
3
5
7
1
3
5
7
RN1
RN1
8P4R-680R
8P4R-680R
RN3
RN3
1
3
5
7
RN4
RN4
1
3
5
7
RN5
RN5
1
3
5
7
RN7
RN7
1
3
5
7
R151 51R0402R151 51R0402
R136 51R0402R136 51R0402
RN6
RN6
1
3
5
7
8P4R-49.9R1%
8P4R-49.9R1%
88.7R1%
88.7R1%
R7335.7R1% R7335.7R1%
2
4
6
8
2
4
6
8
2
4
6
8
8P4R-51R0402
8P4R-51R0402
2
4
6
8
8P4R-51R0402
8P4R-51R0402
2
4
6
8
8P4R-51R0402
8P4R-51R0402
2
4
6
8
8P4R-51R0402
8P4R-51R0402
2
4
6
8
R74
R74
C51
C51
C1u6.3Y0402
C1u6.3Y0402
VID5
VID0
VID4
VID7
VID3
VID6
VID1
H_BPM#0
H_BPM#1
H_BPM#5
H_BPM#3
H_TRST#
H_BPM#4
H_TDO
H_TCK
H_TDI
H_BPM#2
H_TMS
H_TESTHI10
H_TESTHI11
H_TESTHI1
H_TESTHI13
H_TESTHI12
H_COMP7
H_COMP75
H_COMP5
H_COMP1
H_COMP3
C35
C34
C34
C0.1u16X0402
C0.1u16X0402
1
VTT_OUT_RIGHT
C57
C57
C0.1u16X0402
C0.1u16X0402
VTT_OUT_RIGHT
VTT_OUT_LEFT
C77
C77
X_C0.1u16X0402
X_C0.1u16X0402
VTT_OUT_RIGHT
VTT_OUT_LEFT
VTT_OUT_RIGHTVTT_OUT_LEFT
PGTLREFP_GTLREF
C67
C67
X_C0.1u16X0402
X_C0.1u16X0402
R93
R93
100R1%0402
100R1%0402
R86
R86
82.5R1%0402
82.5R1%0402
A A
VTT_OUT_LEFT
VTT_OUT_LEFT
VTT_OUT_LEFT
8
7
H_BPM#1
H_BPM#2
H_BPM#3
R106 X_0R0402R106 X_0R0402
R107 51R0402R107 51R0402
R121 X_0R0402R121 X_0R0402
R122 51R0402R122 51R0402
R114 X_0R0402R114 X_0R0402
R115 51R0402R115 51R0402
6
C9_RESERVED
H_TESTHI9
H_TESTHI8
MICRO-STAR INT'L CO.,LTD
MICRO-STAR INT'L CO.,LTD
MICRO-STAR INT'L CO.,LTD
MS-7534
MS-7534
MSI
MSI
MSI
Size Document Description Rev
Size Document Description Rev
Size Document Description Rev
Custom
Custom
Custom
Date:
Friday, March 07, 2008
Date:
Friday, March 07, 2008
Date:
5
4
3
Friday, March 07, 2008
2
MS-7534
LGA775 - SIGNALS
LGA775 - SIGNALS
LGA775 - SIGNALS
Sheet of
Sheet of
Sheet of
337
337
337
1
0A
0A
0A
8
VCCP
AF9
AF8
AG15
AG14
AG12
AG11
AF22
AF21
U4B
AF19
AF18
AF15
AF14
AF12
AF11
AE9
AE23
AE22
AE21
AE19
AE18
AE15
AE14
AE12
AE11
AD8
AD30
AD29
AD28
AD27
AD26
AD25
AD24
AD23
AC8
AC30
AC29
AC28
AC27
AC26
AC25
AC24
AC23
AB8
AA8
U4B
VCCP
VCC#AF19
VCC#AF18
VCC#AF15
VCC#AF14
VCC#AF12
VCC#AF11
VCC#AE9
VCC#AE23
VCC#AE22
VCC#AE21
VCC#AE19
VCC#AE18
VCC#AE15
VCC#AE14
VCC#AE12
VCC#AE11
VCC#AD8
VCC#AD30
VCC#AD29
VCC#AD28
VCC#AD27
VCC#AD26
VCC#AD25
VCC#AD24
VCC#AD23
VCC#AC8
VCC#AC30
VCC#AC29
VCC#AC28
VCC#AC27
VCC#AC26
VCC#AC25
VCC#AC24
VCC#AC23
VCC#AB8
VCC#AA8
VCC#AF22
VCC#AF21
VCC#Y30
VCC#Y8
Y8
Y29
Y30
VCC#AF9
VCC#AF8
VCC#AG11
VCC#Y27
VCC#Y28
VCC#Y29
Y27
Y28
VCC#AG15
VCC#AG14
VCC#AG12
VCC#Y24
VCC#Y25
VCC#Y26
Y24
Y25
Y26
VCCP
D D
C C
AG21
AG19
AG18
VCC#AG21
VCC#AG19
VCC#AG18
VCC#W30
VCC#W8W8VCC#Y23
Y23
W30
AG26
AG25
AG22
VCC#AG26
VCC#AG25
VCC#AG22
VCC#W27
VCC#W28
VCC#W29
W27
W28
W29
7
AG29
AG28
AG27
VCC#AG29
VCC#AG28
VCC#AG27
VCC#W24
VCC#W25
VCC#W26
W24
W25
W26
AG30
AG9
AG8
VCC#AG9
VCC#AG8
VCC#AG30
VCC#U8
VCC#V8
VCC#W23
V8
U8
W23
AH14
AH12
AH11
VCC#AH14
VCC#AH12
VCC#AH11
VCC#U28
VCC#U29
VCC#U30
U28
U29
U30
AH19
AH18
AH15
VCC#AH19
VCC#AH18
VCC#AH15
VCC#U25
VCC#U26
VCC#U27
U25
U26
U27
AH25
AH22
AH21
VCC#AH25
VCC#AH22
VCC#AH21
VCC#T8
VCC#U23
VCC#U24
T8
U23
U24
AH27
AH26
AH28
VCC#AH27
VCC#AH26
VCC#AH28
VCC#T28
VCC#T29
VCC#T30
T28
T29
T30
AH8
AH29
AH30
VCC#AH8
VCC#AH29
VCC#AH30
VCC#T25
VCC#T26
VCC#T27
T25
T26
T27
6
AH9
AJ11
VCC#AH9
VCC#AJ11
VCC#T23
VCC#T24
T23
T24
AJ12
AJ14
VCC#AJ12
VCC#R8
P8
R8
AJ15
AJ18
VCC#AJ14
VCC#AJ15
VCC#N8
VCC#P8
N8
N30
AJ19
AJ21
VCC#AJ18
VCC#AJ19
VCC#AJ21
VCC#N28
VCC#N29
VCC#N30
N28
N29
AJ22
AJ25
VCC#AJ22
VCC#AJ25
VCC#N26
VCC#N27
N26
N27
AJ8
AJ26
VCC#AJ8
VCC#AJ26
VCC#N24
VCC#N25
N24
N25
AJ9
AK11
VCC#AJ9
VCC#AK11
VCC#M8
VCC#N23
M8
N23
AK12
AK14
AK15
VCC#AK12
VCC#AK14
VCC#M29
VCC#M30
M28
M29
M30
AK18
AK19
AK21
VCC#AK15
VCC#AK18
VCC#AK19
VCC#M26
VCC#M27
VCC#M28
M25
M26
M27
AK22
AK25
AK26
VCC#AK21
VCC#AK22
VCC#AK25
VCC#M23
VCC#M24
VCC#M25
L8
M23
M24
5
AL11
AK8
AK9
VCC#AK8
VCC#AK9
VCC#AK26
VCC#K30
VCC#K8
VCC#L8
K8
K29
K30
AL12
AL14
AL15
VCC#AL11
VCC#AL12
VCC#AL14
VCC#K27
VCC#K28
VCC#K29
K26
K27
K28
AL18
AL19
AL21
VCC#AL15
VCC#AL18
VCC#AL19
VCC#K24
VCC#K25
VCC#K26
K23
K24
K25
AL22
AL25
AL26
VCC#AL21
VCC#AL22
VCC#AL25
VCC#J8J8VCC#J9J9VCC#K23
J30
AL29
AL30
AL8
VCC#AL26
VCC#AL29
VCC#AL30
VCC#J28
VCC#J29
VCC#J30
J27
J28
J29
AL9
AM11
VCC#AL8
VCC#AL9
VCC#AM11
VCC#J25
VCC#J26
VCC#J27
J25
J26
AM12
AM14
AM15
VCC#AM12
VCC#AM14
VCC#AM15
VCC#J22
VCC#J23
VCC#J24
J22
J23
J24
AM18
AM19
AM21
VCC#AM18
VCC#AM19
VCC#AM21
VCC#J19
VCC#J20
VCC#J21
J19
J20
J21
4
AM22
AM25
AM26
VCC#AM22
VCC#AM25
VCC#AM26
VCC#J14
VCC#J15
VCC#J18
J14
J15
J18
AM8
AM29
AM30
VCC#AM8
VCC#AM29
VCC#AM30
VCC#J11
VCC#J12
VCC#J13
J11
J12
J13
AM9
AN11
AN12
VCC#AM9
VCC#AN11
VCC#AN9
VCC#J10
J10
AN8
AN9
AN14
AN15
AN18
AN19
AN21
AN22
A23
VCCA
B23
VSSA
VCC#AN21
VCC#AN22
VCCPLL
VCC-IOPLL
VTT#A25
VTT#A26
VTT#A27
VTT#A28
VTT#A29
VTT#A30
VTT#B25
VTT#B26
VTT#B27
VTT#B28
VTT#B29
VTT#B30
VTT#C25
VTT#C26
VTT#C27
VTT#C28
VTT#C29
VTT#C30
VTT#D25
VTT#D26
VTT#D27
VTT#D28
VTT#D29
VTT#D30
VTTPWRGD
VTT_SEL
RSVD#F29
1122334
D23
C23
A25
A26
A27
A28
A29
A30
B25
B26
B27
B28
B29
B30
C25
C26
C27
C28
C29
C30
D25
D26
D27
D28
D29
D30
AM6
AA1
J1
F27
F29
4
VCC#AN12
VCC#AN14
VCC#AN15
VCC#AN18
VCC#AN19
VTT_OUT_RIGHT
VTT_OUT_LEFT
VCC#AN25
VCC#AN26
VCC#AN29
VCC#AN30
VCC#AN8
AN25
AN26
AN29
AN30
ZIF-SOCKET775-RH-1,ZIF-SOCKET775_TH-2
ZIF-SOCKET775-RH-1,ZIF-SOCKET775_TH-2
3
H_VCCA
H_VSSA
H_VCCPLL
H_VCCA
VTT_PG
VTT_OUT_RIGHT
VTT_OUT_LEFT
VTT_SEL
V_FSB_VTT
C158
C158
X_C10u6.3X50805
X_C10u6.3X50805
C10u6.3X50805
C10u6.3X50805
CAPS FOR FSB GENERIC
VTT_PG 28
VTT_OUT_RIGHT
VTT_OUT_LEFT
VTT_SEL 28
C128
C128
2
V_FSB_VTT
C133
C133
C10u6.3X50805
C10u6.3X50805
1
R163
R163
R156
R156
CPU_GTL0
X_953R1%0402
X_953R1%0402
CPU_GTL1
X_953R1%0402
X_953R1%0402
R178
R178
210R1%0402
210R1%0402
R169
R169
210R1%0402
210R1%0402
R162
R162
G
R158
R158
G
C1u6.3Y0402
C1u6.3Y0402
C1u6.3Y0402
C1u6.3Y0402
VTT_OUT_RIGHT
B B
VTT_OUT_RIGHT
VTT_OUT_RIGHT
A A
VTT_OUT_RIGHT
R161 124R1%0402R161 124R1%0402
210R1%0402
210R1%0402
CPU_GTLSEL020
R157 124R1%0402R157 124R1%0402
210R1%0402
210R1%0402
CPU_GTLSEL120
R181 124R1%0402R181 124R1%0402
R166 124R1%0402R166 124R1%0402
8
R165 10R0402R165 10R0402
C88
C88
C1u6.3Y0402
C1u6.3Y0402
DS
Q24
Q24
X_N-2N7002_SOT23
X_N-2N7002_SOT23
R164 10R0402R164 10R0402
C82
C82
C1u6.3Y0402
C1u6.3Y0402
DS
Q23
Q23
X_N-2N7002_SOT23
X_N-2N7002_SOT23
R17610R0402 R17610R0402
C110
C110
R17410R0402 R17410R0402
C99
C99
7
X_C0.1u16X0402
X_C0.1u16X0402
X_C0.1u16X0402
X_C0.1u16X0402
C109
C109
X_C0.1u16X0402
X_C0.1u16X0402
C104
C104
X_C0.1u16X0402
X_C0.1u16X0402
C97
C97
C89
C89
C98
C98
C220p50N0402
C220p50N0402
C94
C94
C220p50N0402
C220p50N0402
CPU_GTLREF2 3
C107
C107
C220p50N0402
C220p50N0402
CPU_GTLREF3 3
C106
C106
C220p50N0402
C220p50N0402
CPU_GTLREF0 3
CPU_GTLREF1 3
6
PLACE AT CPU END OF ROUTE
*GTLREF VOLTAGE SHOULD BE
0.635*VTT = 0.762V
CPU CPU_GTLREF1_SEL GTL VOLTAGE
KENTSFIELD FSB
OVERCLOCKING
ALL OTHER CPUS
0 0.685 VTT
1 0.630 VTT
5
*PLACE COMPONENTS AS CLOSE AS POSSIBLE TO PROCESSOR SOCKET
*TRACE WIDTH TO CAPS MUST BE NO SMALLER THAN 12MILS
V_FSB_VTT
L6 X_10u100mA_0805L6 X_10u100mA_0805
CP1 X_COPPERCP1 X_COPPER
VTT_OUT_RIGHT
V_FSB_VTT
VTT_OUT_LEFT
VTT_OUT_RIGHT
4
C131
C131
C1u6.3Y0402
C1u6.3Y0402
3
C127
C127
C10u6.3X50805
C10u6.3X50805
R180 X_130R1%0402R180 X_130R1%0402
R124 62R0402R124 62R0402
R194 200R1%0402R194 200R1%0402
R145 200R1%0402R145 200R1%0402
R177 62R0402R177 62R0402
R147 62R0402R147 62R0402
R143 62R0402R143 62R0402
R153 X_150R1%0402R153 X_150R1%0402
R150 X_150R1%0402R150 X_150R1%0402
C125
C125
X_C10u6.3X50805
X_C10u6.3X50805
H_PROCHOT#
H_IERR#
H_CPURST#
H_PWRGD
H_BR#0
VCC1_5
C126
C126
X_C1u6.3Y0402
X_C1u6.3Y0402
MS-7534
MS-7534
MS-7534
H_VCCPLLH_VCCA
C0.01u16X0402
C0.01u16X0402
CP2 X_COPPERCP2 X_COPPER
H_VSSA
H_PROCHOT# 3,6,20
H_IERR# 3
H_CPURST# 3,6,30
H_PWRGD 3,6
H_BR#0 3,6
TRMTRIP# 3,6
H_FERR# 3,6
H_INTR 3,6
H_NMI 3,6
MICRO-STAR INT'L CO.,LTD
MICRO-STAR INT'L CO.,LTD
MICRO-STAR INT'L CO.,LTD
MSI
MSI
MSI
Size Document Description Rev
Size Document Description Rev
Size Document Description Rev
Custom
Custom
Custom
Date:
Friday, March 07, 2008
Date:
Friday, March 07, 2008
Date:
Friday, March 07, 2008
2
LGA775 - POWER
LGA775 - POWER
LGA775 - POWER
C123
C123
C10u6.3X50805
C10u6.3X50805
Sheet of
Sheet of
Sheet of
437
437
437
1
C145
C145
0A
0A
0A
8
7
6
5
4
3
2
1
H_COMP73
VTT_OUT_RIGHT
D D
R190 X_1KR0402R190 X_1KR0402
C C
B B
R134 49.9R1%0402R134 49.9R1%0402
H_COMP630
H_COMP6
U4C
U4C
A12
VSS#A12
A15
VSS#A15
A18
VSS#A18
A2
VSS#A2
A21
VSS#A21
A24
VSS#A24
A6
VSS#A6
A9
VSS#A9
AA23
VSS#AA23
AA24
VSS#AA24
AA25
VSS#AA25
AA26
VSS#AA26
AA27
VSS#AA27
AA28
VSS#AA28
AA29
VSS#AA29
AA3
VSS#AA3
AA30
VSS#AA30
AA6
VSS#AA6
AA7
VSS#AA7
AB1
VSS#AB1
AB23
VSS#AB23
AB24
VSS#AB24
AB25
VSS#AB25
AB26
VSS#AB26
AB27
VSS#AB27
AB28
VSS#AB28
AB29
VSS#AB29
AB30
VSS#AB30
AB7
VSS#AB7
AC3
VSS#AC3
AC6
VSS#AC6
AC7
VSS#AC7
AD4
VSS#AD4
AD7
VSS#AD7
AE10
VSS#AE10
AE13
VSS#AE13
AE16
VSS#AE16
AE17
VSS#AE17
AE2
VSS#AE2
AE20
VSS#AE20
AE24
VSS#AE24
AE25
VSS#AE25
AE26
VSS#AE26
AE27
VSS#AE27
AE28
VSS#AE28
VSS#AE29
AE29
AE30
H_COMP7
D1
AE4
AE3
COMP6Y3COMP7
RSVD#AE4
VSS#AE30
VSS#AE5
VSS#AE7
AE5
AE7
AF10
51R0402
51R0402
E23
D14
RSVD#D1
RSVD#E23
RSVD#D14
VSS#AF10
VSS#AF13
VSS#AF16
AF13
AF16
AF17
R159
R159
E7
RSVD#E5E5RSVD#E6E6RSVD#E7
VSS#AF17
VSS#AF20
VSS#AF23
VSS#AF24
AF20
AF23
AF24
H_COMP8
F23
B13
F6
IMPSEL#
RSVD#F23
RSVD#B13
VSS#AF25
VSS#AF26
VSS#AF27
AF25
AF26
AF27
R192
R192
24.9R1%0402
24.9R1%0402
R139
R139
51R0402
51R0402
N4
J3
RSVD#J3
RSVD#N4
VSS#AF28
VSS#AF29
VSS#AF3
VSS#AF30
AF3
AF28
AF29
AF30
P5
RSVD#P5
VSS#AF6
VSS#AF7
AF6
AF7
AG10
R133
R133
51R0402
51R0402
AC4
W1
MSID[1]V1MSID[0]
RSVD#AC4
VSS#AG10
VSS#AG13
VSS#AG16
VSS#AG17
AG13
AG16
AG17
VSS#Y7Y7VSS#Y5Y5VSS#Y2
VSS#AG20
VSS#AG23
VSS#AG24
AG20
AG23
AG24
Y2
W4
VSS#W7W7VSS#W4
VSS#AG7
VSS#AH1
AH1
AG7
AH10
V6
V30
VSS#V7V7VSS#V6
VSS#AH10
VSS#AH13
VSS#AH16
AH13
AH16
AH17
V3
V29
V28
VSS#V3
VSS#V30
VSS#V29
VSS#AH17
VSS#AH20
VSS#AH23
AH20
AH23
AH24
V27
VSS#V28
VSS#V27
VSS#AH24
VSS#AH3
AH3
V26
V25
V24
VSS#V26
VSS#V25
VSS#AH6
VSS#AH7
AH6
AH7
AJ10
V23
VSS#U7U7VSS#U1
VSS#V24
VSS#V23
VSS#AJ10
VSS#AJ13
VSS#AJ16
AJ13
AJ16
U1
AJ17
R135 0R0402R135 0R0402
R140 X_0R0402R140 X_0R0402
T3
R5
R30
VSS#T7T7VSS#T6T6VSS#T3
VSS#R7R7VSS#R5
VSS#R30
VSS#AJ17
VSS#AJ20
VSS#AJ23
VSS#AJ24
VSS#AJ27
VSS#AJ28
VSS#AJ29
AJ20
AJ23
AJ24
AJ27
AJ28
AJ29
R29
VSS#R29
VSS#AJ30
AJ30
Support Kenstfield CPU
H_TESTHI12 3
P4
R2
P30
P29
P28
P27
P26
VSS#P30
VSS#AK23
VSS#AK24
AK23
AK24
AK27
VSS#P29
VSS#P28
VSS#P27
VSS#P26
VSS#AK27
VSS#AK28
VSS#AK29
VSS#AK30
AK28
AK29
AK30
P25
VSS#P25
VSS#AK5
AK5
R28
R27
R26
VSS#R28
VSS#R27
VSS#AJ4
VSS#AJ7
AJ4
AJ7
AK10
R25
R24
R23
VSS#R26
VSS#R25
VSS#R24
VSS#AK10
VSS#AK13
VSS#AK16
AK13
AK16
AK17
VSS#P7P7VSS#P4
VSS#R2
VSS#R23
VSS#AK17
VSS#AK2
VSS#AK20
AK2
AK20
P24
P23
VSS#P24
VSS#P23
VSS#AK7
VSS#AL10
AK7
AL10
N3
VSS#N7N7VSS#N6N6VSS#N3
VSS#M7M7VSS#M1
VSS#AL13
VSS#AL16
VSS#AL17
VSS#AL20
AL13
AL16
AL17
AL20
L6
M1
VSS#L7L7VSS#L6
VSS#AL23
VSS#AL24
AL23
AL24
AL27
L3
L30
L29
VSS#L3
VSS#L30
VSS#AL27
VSS#AL28
VSS#AL3
AL3
AL7
AL28
L28
L27
VSS#L29
VSS#L28
VSS#L27
VSS#AL7
VSS#AM1
VSS#AM10
AM1
AM10
L26
L25
VSS#L26
VSS#L25
VSS#AM13
VSS#AM16
AM13
AM16
L24
L23
VSS#L24
VSS#L23
VSS#AM17
VSS#AM20
AM17
AM20
K2
K5
VSS#K7K7VSS#K5
VSS#AM23
VSS#AM24
AM23
AM24
AM27
J7
VSS#K2
VSS#AM27
VSS#AM28
AM4
AM28
H9
VSS#J4J4VSS#J7
VSS#AM4
H7
H8
VSS#H8
VSS#H9
VSS#AN1
AN1
AN10
H3
H6
VSS#H3
VSS#H6
VSS#H7
VSS#AN10
VSS#AN13
VSS#AN16
AN13
AN16
AN17
H26
H27
H28
VSS#H27
VSS#H28
VSS#AN17
VSS#AN2
VSS#AN20
AN2
AN20
AN23
H23
H24
H25
VSS#H23
VSS#H24
VSS#H25
VSS#H26
VSS#AN23
VSS#AN24
VSS#AN27
VSS#AN28
AN24
AN27
AN28
H17
H18
H19
H20
H21
H22
H14
VSS#H14
H13
VSS#H13
VSS#H17
VSS#H18
VSS#H19
VSS#H20
VSS#H21
VSS#H22
VSS#B1B1VSS#B11
B11
VSS#B14
B14
H12
VSS#H12
H11
VSS#H11
H10
VSS#H10
G1
VSS#G1
F7
VSS#F7
F4
VSS#F4
F22
VSS#F22
F19
VSS#F19
F16
VSS#F16
F13
VSS#F13
F10
VSS#F10
E8
VSS#E8
E29
VSS#E29
E28
VSS#E28
E27
VSS#E27
E26
VSS#E26
E25
VSS#E25
E20
VSS#E20
E2
VSS#E2
E17
VSS#E17
E14
VSS#E14
E11
VSS#E11
D9
VSS#D9
D6
VSS#D6
D5
VSS#D5
D3
VSS#D3
D24
VSS#D24
D21
VSS#D21
D18
VSS#D18
D15
VSS#D15
D12
VSS#D12
C7
VSS#C7
C4
VSS#C4
C24
VSS#C24
C22
VSS#C22
C19
VSS#C19
C16
VSS#C16
C13
VSS#C13
C10
VSS#C10
B8
VSS#B8
B5
VSS#B5
B24
VSS#B24
B20
VSS#B20
B17
VSS#B17
ZIF-SOCKET775-RH-1,ZIF-SOCKET775_TH-2
ZIF-SOCKET775-RH-1,ZIF-SOCKET775_TH-2
Support Kenstfield CPU
R104 51R0402R104 51R0402
R103 X_0R0402R103 X_0R0402
R100 X_0R0402R100 X_0R0402
R184 X_1KR0402R184 X_1KR0402
VTT_OUT_LEFT
H_BPM#0 3
R94 X_0R0402R94 X_0R0402
CPU DECOUPLING CAPACITORS
VCCP VCCPVCCP
A A
EC15
EC15
C22u6.3X1206
C22u6.3X1206
EC16
EC16
C22u6.3X1206
C22u6.3X1206
EC22
EC22
X_C22u6.3X1206
X_C22u6.3X1206
EC21
EC21
X_C22u6.3X1206
X_C22u6.3X1206
EC24
EC24
C22u6.3X1206
C22u6.3X1206
EC12
EC12
C22u6.3X1206
C22u6.3X1206
EC25
EC25
C22u6.3X1206
C22u6.3X1206
EC11
EC11
C22u6.3X1206
C22u6.3X1206
EC13
EC13
C22u6.3X1206
C22u6.3X1206
VCCP
EC20
EC20
X_C22u6.3X1206
X_C22u6.3X1206
EC23
EC23
X_C22u6.3X1206
X_C22u6.3X1206
EC14
EC14
C22u6.3X1206
C22u6.3X1206
Place these caps within socket cavity
MICRO-STAR INT'L CO.,LTD
MICRO-STAR INT'L CO.,LTD
MICRO-STAR INT'L CO.,LTD
MS-7534
MS-7534
MSI
MSI
MSI
Size Document Description Rev
Size Document Description Rev
Size Document Description Rev
Custom
Custom
Custom
Date:
Friday, March 07, 2008
Date:
Friday, March 07, 2008
Date:
8
7
6
5
4
3
Friday, March 07, 2008
2
MS-7534
LGA775 - GND
LGA775 - GND
LGA775 - GND
537
537
537
Sheet of
Sheet of
Sheet of
1
0A
0A
0A
8
H_DBI#[0..3]3
H_DSTBP#03
H_DSTBN#03
H_DSTBP#13
H_DSTBN#13
H_DSTBP#23
D D
C C
B B
V_FSB_VTT
A A
H_DSTBN#23
H_DSTBP#33
H_DSTBN#33
H_A#[3..35]3
H_ADSTB#03
H_ADSTB#13
H_REQ#[0..4]3
H_ADS#3
H_BNR#3
H_BR#03,4
H_BPRI#3
H_DBSY#3
H_DEFER#3
H_DRDY#3
H_HIT#3
H_HITM#3
H_LOCK#3
H_TRDY#3
H_RS#[0..2]3
H_FERR#3,4
H_A20M#3
H_IGNNE#3
H_INIT#3
H_SMI#3
H_INTR3,4
H_NMI3,4
H_STPCLK#3
H_PWRGD3,4
R204 49.9R1%0402R204 49.9R1%0402
R215 49.9R1%0402R215 49.9R1%0402
7
H_DBI#[0..3]
H_DBI#0
H_DBI#1
H_DBI#2
H_DBI#3
H_A#3
H_A#4
H_A#5
H_A#6
H_A#7
H_A#8
H_A#9
H_A#10
H_A#11
H_A#12
H_A#13
H_A#14
H_A#15
H_A#16
H_A#17
H_A#18
H_A#19
H_A#20
H_A#21
H_A#22
H_A#23
H_A#24
H_A#25
H_A#26
H_A#27
H_A#28
H_A#29
H_A#30
H_A#31
H_A#32
H_A#33
H_A#34
H_A#35
H_REQ#0
H_REQ#1
H_REQ#2
H_REQ#3
H_REQ#4
H_RS#0
H_RS#1
H_RS#2
H_FERR#
H_A20M#
H_IGNNE#
H_INIT#
H_SMI#
H_INTR
H_NMI
H_STPCLK#
CPU_COMP_V
CPU_COMP_G
AB35
AE37
AC33
AC35
AC34
AE35
AE34
AG39
AE33
AG38
AG37
AF35
AG35
AG34
AJ34
AG33
AJ38
AJ37
AJ35
AL37
AJ36
AL39
AL38
AJ33
AL35
AL34
AN37
AL33
AN38
AN35
AN36
AR39
AN34
AE36
AK35
AC38
AA33
AE38
AC37
AC39
AD42
AD43
AE40
AA41
AD39
AA40
AD41
AB42
AD40
AC43
AE41
AC41
AB41
AC42
AH40
AF41
AH39
AH42
AH41
AF42
AG41
AG42
AH43
AM33
AN33
AN32
AM32
AM43
AM42
W39
W37
M39
M41
T40
U40
V41
V35
N37
L36
N35
J41
U11A
U11A
CPU_DSTBP0*
CPU_DSTBN0*
CPU_DBI0*
CPU_DSTBP1*
CPU_DSTBN1*
CPU_DBI1*
CPU_DSTBP2*
CPU_DSTBN2*
CPU_DBI2*
CPU_DSTBP3*
CPU_DSTBN3*
CPU_DBI3*
CPU_A3*
CPU_A4*
CPU_A5*
CPU_A6*
CPU_A7*
CPU_A8*
CPU_A9*
CPU_A10*
CPU_A11*
CPU_A12*
CPU_A13*
CPU_A14*
CPU_A15*
CPU_A16*
CPU_A17*
CPU_A18*
CPU_A19*
CPU_A20*
CPU_A21*
CPU_A22*
CPU_A23*
CPU_A24*
CPU_A25*
CPU_A26*
CPU_A27*
CPU_A28*
CPU_A29*
CPU_A30*
CPU_A31*
CPU_A32*
CPU_A33*
CPU_A34*
CPU_A35*
CPU_ADSTB0*
CPU_ADSTB1*
CPU_REQ0*
CPU_REQ1*
CPU_REQ2*
CPU_REQ3*
CPU_REQ4*
CPU_ADS*
CPU_BNR*
CPU_BR0*
CPU_BPRI*
CPU_DBSY*
CPU_DEFER*
CPU_DRDY*
CPU_HIT*
CPU_HITM*
CPU_LOCK*
CPU_TRDY*
CPU_RS0*
CPU_RS1*
CPU_RS2*
CPU_FERR*
CPU_A20M*
CPU_IGNNE*
CPU_INIT*
CPU_SMI*
CPU_INTR
CPU_NMI
CPU_STPCLK*
CPU_PWRGD
CPU_SLP*
CPU_DPSLP*
CPU_DPRSTP*
CPU_DPWR*
CPU_COMP_VCC
CPU_COMP_GND
NVIDIA-MCP7A-A01
NVIDIA-MCP7A-A01
6
BCLK_OUT_CPU_P
BCLK_OUT_CPU_N
BCLK_OUT_ITP_P
BCLK_OUT_ITP_N
BCLK_OUT_NB_P
BCLK_OUT_NB_N
CPU_PROCHOT*
CPU_THERMTRIP*
V1P1_PLL_CPU
V1P1_PLL_FSB
BCLK_VML_COMP_VDD
BCLK_VML_COMP_GND
CPU_D0*
CPU_D1*
CPU_D2*
CPU_D3*
CPU_D4*
CPU_D5*
CPU_D6*
CPU_D7*
CPU_D8*
CPU_D9*
CPU_D10*
CPU_D11*
CPU_D12*
CPU_D13*
CPU_D14*
CPU_D15*
CPU_D16*
CPU_D17*
CPU_D18*
CPU_D19*
CPU_D20*
CPU_D21*
CPU_D22*
CPU_D23*
CPU_D24*
CPU_D25*
CPU_D26*
CPU_D27*
CPU_D28*
CPU_D29*
CPU_D30*
CPU_D31*
CPU_D32*
CPU_D33*
CPU_D34*
CPU_D35*
CPU_D36*
CPU_D37*
CPU_D38*
CPU_D39*
CPU_D40*
CPU_D41*
CPU_D42*
CPU_D43*
CPU_D44*
CPU_D45*
CPU_D46*
CPU_D47*
CPU_D48*
CPU_D49*
CPU_D50*
CPU_D51*
CPU_D52*
CPU_D53*
CPU_D54*
CPU_D55*
CPU_D56*
CPU_D57*
CPU_D58*
CPU_D59*
CPU_D60*
CPU_D61*
CPU_D62*
CPU_D63*
CPU_RESET*
BCLK_IN_N
BCLK_IN_P
CPU_BSEL0
CPU_BSEL1
CPU_BSEL2
CPU_PECI
Y41
Y43
Y40
W42
Y42
Y39
V42
W41
T41
T43
T42
T39
U41
R41
P42
R42
AA38
AA35
AA36
AA37
AA34
W33
W34
W35
W38
U33
U34
U35
U36
U37
R33
U38
R35
R34
P35
N34
R38
R37
N33
R39
N36
N38
L37
L38
L39
J37
J38
J39
H40
L42
P41
M40
N40
N41
K42
M42
M43
L41
H42
H41
J40
K41
H43
H39
H38
G42
G41
AL43
AL42
AL41
AK42
AK41
AJ40
F41
D42
F42
E41
AJ41
AG43
AH28
AG28
AM39
AM40
H_D#0
H_D#1
H_D#2
H_D#3
H_D#4
H_D#5
H_D#6
H_D#7
H_D#8
H_D#9
H_D#10
H_D#11
H_D#12
H_D#13
H_D#14
H_D#15
H_D#16
H_D#17
H_D#18
H_D#19
H_D#20
H_D#21
H_D#22
H_D#23
H_D#24
H_D#25
H_D#26
H_D#27
H_D#28
H_D#29
H_D#30
H_D#31
H_D#32
H_D#33
H_D#34
H_D#35
H_D#36
H_D#37
H_D#38
H_D#39
H_D#40
H_D#41
H_D#42
H_D#43
H_D#44
H_D#45
H_D#46
H_D#47
H_D#48
H_D#49
H_D#50
H_D#51
H_D#52
H_D#53
H_D#54
H_D#55
H_D#56
H_D#57
H_D#58
H_D#59
H_D#60
H_D#61
H_D#62
H_D#63
CPUCLK
CPUCLK#
BCLK_OUT
BCLK_OUT#
BCLK_IN#
BCLK_IN
CPU_BSEL0
CPU_BSEL1
CPU_BSEL2
H_PROCHOT#_R
TRMTRIP#
VCC1_1_PLL
COMP_BCLK_V
COMP_BCLK_G
5
R219 0R0402R219 0R0402
R218 0R0402R218 0R0402
H_D#[0..63] 3
H_CPURST# 3,4,30
R202 0R0402R202 0R0402
R209 0R0402R209 0R0402
CPU_MCP_PECI 3
TRMTRIP# 3,4
VCC1_1_PLL
bottom
R203 49.9R1%0402R203 49.9R1%0402
R216 49.9R1%0402R216 49.9R1%0402
VTT_OUT_RIGHT
R182
R182
X_130R1%0402
X_130R1%0402
4
R179 0R0402R179 0R0402
3
H_PROCHOT# 3,4,20
if CPU processor hot cause system shutdown, remove OR.
C501
C501
C1u6.3X50402
C1u6.3X50402
Check this pin for CPU function.
V_FSB_VTT
V_FSB_VTT
RN16
RN16
7
8
5
CPU_BSEL13
CPU_BSEL03
CPU_BSEL23
6
3
4
1
2
8P4R-470R0402
8P4R-470R0402
BSEL[2..0] FSB CLK (MHz)
000
001
010
100
TBD
C159
C159
X_C15p50N0402
X_C15p50N0402
266MHz
133MHz
200MHz
333MHz
Reserved
CK_H_CPU 3
CK_H_CPU# 3
C152
C152
X_C15p50N0402
X_C15p50N0402
2
1
MICRO-STAR INT'L CO.,LTD
MICRO-STAR INT'L CO.,LTD
MICRO-STAR INT'L CO.,LTD
MS-7534
MS-7534
MSI
MSI
MSI
Size Document Description Rev
Size Document Description Rev
Size Document Description Rev
Custom
Custom
Custom
Date:
Friday, March 07, 2008
Date:
Friday, March 07, 2008
Date:
8
7
6
5
4
3
Friday, March 07, 2008
2
MS-7534
MCP7A-CPU
MCP7A-CPU
MCP7A-CPU
Sheet of
Sheet of
Sheet of
637
637
637
1
0A
0A
0A
8
7
6
5
4
3
2
1
DATA 1
DATA 0
D D
MEM_0_DQS[0..7]9
MEM_0_DQS#[0..7]9
MEM_0_DQM[0..7]9
C C
MEM_0_ADD[0..14]9,10
MEM_0_BA[0..2]9,10
MEM_0A_CS#[0..1]9,10
B B
A A
MEM_0A_CKE[0..1]9,10
MEM_0A_ODT[0..1]9,10
MEM_0A_CLK09
MEM_0A_CLK#09
MEM_0A_CLK19
MEM_0A_CLK#19
MEM_0A_CLK29
MEM_0A_CLK#29
MEM_0B_CS#[0..1]9,10
MEM_0B_CKE[0..1]9,10
MEM_0B_ODT[0..1]9,10
MEM_0B_CLK09
MEM_0B_CLK#09
MEM_0B_CLK19
MEM_0B_CLK#19
MEM_0B_CLK29
MEM_0B_CLK#29
DIMM 1
DIMM 2
DIMM 3
DIMM 4
MEM_0_DQS0
MEM_0_DQS#0
MEM_0_DQS1
MEM_0_DQS#1
MEM_0_DQS2
MEM_0_DQS#2
MEM_0_DQS3
MEM_0_DQS#3
MEM_0_DQS4
MEM_0_DQS#4
MEM_0_DQS5
MEM_0_DQS#5
MEM_0_DQS6
MEM_0_DQS#6
MEM_0_DQS7
MEM_0_DQS#7
MEM_0_DQM0
MEM_0_DQM1
MEM_0_DQM2
MEM_0_DQM3
MEM_0_DQM4
MEM_0_DQM5
MEM_0_DQM6
MEM_0_DQM7
MEM_0_ADD0
MEM_0_ADD1
MEM_0_ADD2
MEM_0_ADD3
MEM_0_ADD4
MEM_0_ADD5
MEM_0_ADD6
MEM_0_ADD7
MEM_0_ADD8
MEM_0_ADD9
MEM_0_ADD10
MEM_0_ADD11
MEM_0_ADD12
MEM_0_ADD13
MEM_0_ADD14
MEM_0_BA0
MEM_0_BA1
MEM_0_BA2
MEM_0A_CS#0
MEM_0A_CS#1
MEM_0A_CKE0
MEM_0A_CKE1
MEM_0A_ODT0
MEM_0A_ODT1
MEM_0A_CLK0
MEM_0A_CLK#0
MEM_0A_CLK1
MEM_0A_CLK#1
MEM_0A_CLK2
MEM_0A_CLK#2
MEM_0B_CS#0
MEM_0B_CS#1
MEM_0B_CKE0
MEM_0B_CKE1
MEM_0B_ODT0
MEM_0B_ODT1
MEM_0B_CLK0
MEM_0B_CLK#0
MEM_0B_CLK1
MEM_0B_CLK#1
MEM_0B_CLK2
MEM_0B_CLK#2
ADDR 1 / CNTL 1A
ADDR 1 / CNTL 1B
ADDR 0 / CNTL 0A
ADDR 0 / CNTL 0B
U11B
U11B
AU39
MDQS0_0_P
AT39
MDQS0_0_N
AT35
MDQS0_1_P
AU35
MDQS0_1_N
AU30
MDQS0_2_P
AU29
MDQS0_2_N
AV25
MDQS0_3_P
AW25
MDQS0_3_N
AP13
MDQS0_4_P
AR13
MDQS0_4_N
AW7
MDQS0_5_P
AW8
MDQS0_5_N
AR8
MDQS0_6_P
AR9
MDQS0_6_N
AL10
MDQS0_7_P
AL11
MDQS0_7_N
AR34
MDQM0_0
AV35
MDQM0_1
AW29
MDQM0_2
AN27
MDQM0_3
AN13
MDQM0_4
AR10
MDQM0_5
AU5
MDQM0_6
AN5
MDQM0_7
AR19
MA0_0
AT19
MA0_1
AU19
MA0_2
AV19
MA0_3
AN21
MA0_4
AR21
MA0_5
AP21
MA0_6
AU21
MA0_7
AR22
MA0_8
AV21
MA0_9
AN19
MA0_10
AW21
MA0_11
AN23
MA0_12
AU15
MA0_13
AR23
MA0_14
AW17
MBA0_0
AP19
MBA0_1
AP23
MBA0_2
AR18
MCS0A_0*
AT15
MCS0A_1*
AT23
MCKE0A_0
AU23
MCKE0A_1
AV15
MODT0A_0
AP15
MODT0A_1
BB20
MCLK0A_0_P
BC20
MCLK0A_0_N
BA24
MCLK0A_1_P
AY24
MCLK0A_1_N
AW33
MCLK0A_2_P
AV33
MCLK0A_2_N
AU17
MCS0B_0*
AR15
MCS0B_1*
AV23
MCKE0B_0
AN25
MCKE0B_1
AN17
MODT0B_0
AN15
MODT0B_1
BA21
MCLK0B_0_P
BB21
MCLK0B_0_N
BB24
MCLK0B_1_P
BC24
MCLK0B_1_N
AU33
MCLK0B_2_P
AU34
MCLK0B_2_N
NVIDIA-MCP7A-A01
NVIDIA-MCP7A-A01
Channel 0
MDQ0_0
MDQ0_1
MDQ0_2
MDQ0_3
MDQ0_4
MDQ0_5
MDQ0_6
MDQ0_7
MDQ0_8
MDQ0_9
MDQ0_10
MDQ0_11
MDQ0_12
MDQ0_13
MDQ0_14
MDQ0_15
MDQ0_16
MDQ0_17
MDQ0_18
MDQ0_19
MDQ0_20
MDQ0_21
MDQ0_22
MDQ0_23
MDQ0_24
MDQ0_25
MDQ0_26
MDQ0_27
MDQ0_28
MDQ0_29
MDQ0_30
MDQ0_31
MDQ0_32
MDQ0_33
MDQ0_34
MDQ0_35
MDQ0_36
MDQ0_37
MDQ0_38
MDQ0_39
MDQ0_40
MDQ0_41
MDQ0_42
MDQ0_43
MDQ0_44
MDQ0_45
MDQ0_46
MDQ0_47
MDQ0_48
MDQ0_49
MDQ0_50
MDQ0_51
MDQ0_52
MDQ0_53
MDQ0_54
MDQ0_55
MDQ0_56
MDQ0_57
MDQ0_58
MDQ0_59
MDQ0_60
MDQ0_61
MDQ0_62
MDQ0_63
MRAS0*
MCAS0*
MWE0*
MRESET0*
MEM_COMP_1P8V
MEM_COMP_GND
MEM_0_DATA0
AP35
MEM_0_DATA1
AR35
MEM_0_DATA2
AW38
MEM_0_DATA3
AV38
MEM_0_DATA4
AR38
MEM_0_DATA5
AR37
MEM_0_DATA6
AV39
MEM_0_DATA7
AW39
MEM_0_DATA8
AU37
MEM_0_DATA9
AT37
MEM_0_DATA10
AV31
MEM_0_DATA11
AT31
MEM_0_DATA12
AW37
MEM_0_DATA13
AV37
MEM_0_DATA14
AR33
MEM_0_DATA15
AU31
MEM_0_DATA16
AN31
MEM_0_DATA17
AV29
MEM_0_DATA18
AN29
MEM_0_DATA19
AV27
MEM_0_DATA20
AR31
MEM_0_DATA21
AP31
MEM_0_DATA22
AR29
MEM_0_DATA23
AP29
MEM_0_DATA24
AR27
MEM_0_DATA25
AP27
MEM_0_DATA26
AR25
MEM_0_DATA27
AP25
MEM_0_DATA28
AU27
MEM_0_DATA29
AT27
MEM_0_DATA30
AU25
MEM_0_DATA31
AR26
MEM_0_DATA32
AU13
MEM_0_DATA33
AR14
MEM_0_DATA34
AT11
MEM_0_DATA35
AR11
MEM_0_DATA36
AW13
MEM_0_DATA37
AV13
MEM_0_DATA38
AV11
MEM_0_DATA39
AU11
MEM_0_DATA40
AV9
MEM_0_DATA41
AU9
MEM_0_DATA42
AY5
MEM_0_DATA43
AW6
MEM_0_DATA44
AP11
MEM_0_DATA45
AW9
MEM_0_DATA46
AU8
MEM_0_DATA47
AU7
MEM_0_DATA48
AV5
MEM_0_DATA49
AU6
MEM_0_DATA50
AR5
MEM_0_DATA51
AN10
MEM_0_DATA52
AW5
MEM_0_DATA53
AV6
MEM_0_DATA54
AR7
MEM_0_DATA55
AR6
MEM_0_DATA56
AN7
MEM_0_DATA57
AN6
MEM_0_DATA58
AL7
MEM_0_DATA59
AL6
MEM_0_DATA60
AN9
MEM_0_DATA61
AP9
MEM_0_DATA62
AL9
MEM_0_DATA63
AL8
MEM_0_RAS#
AV17
MEM_0_CAS#
AP17
MEM_0_WE#
AR17
AY32
M_DRV0_1P8V
AN41
M_DRV1_GND
AM41
MEM_0_DATA[0..63] 9
MEM_0_RAS# 9,10
MEM_0_CAS# 9,10
MEM_0_WE# 9,10
R198 X_40.2R1%0402R198 X_40.2R1%0402
R206 40.2R1%0402R206 40.2R1%0402
R199 40.2R1%0402R199 40.2R1%0402
R205 X_40.2R1%0402R205 X_40.2R1%0402
VCC_DDR
VCC_DDR
Channel 1
U11C
MEM_1_DQS[0..7]8
MEM_1_DQS#[0..7]8
MEM_1_DQM[0..7]8
MEM_1_ADD[0..14]8,10
MEM_1_BA[0..2]8,10
MEM_1A_CS#[0..1]8,10
MEM_1A_CKE[0..1]8,10
MEM_1A_ODT[0..1]8,10
MEM_1A_CLK08
MEM_1A_CLK#08
MEM_1A_CLK18
MEM_1A_CLK#18
MEM_1A_CLK28
MEM_1A_CLK#28
MEM_1B_CS#[0..1]8,10
MEM_1B_CKE[0..1]8,10
MEM_1B_ODT[0..1]8,10
MEM_1B_CLK08
MEM_1B_CLK#08
MEM_1B_CLK18
MEM_1B_CLK#18
MEM_1B_CLK28
MEM_1B_CLK#28
MEM_1_DQS0
MEM_1_DQS#0
MEM_1_DQS1
MEM_1_DQS#1
MEM_1_DQS2
MEM_1_DQS#2
MEM_1_DQS3
MEM_1_DQS#3
MEM_1_DQS4
MEM_1_DQS#4
MEM_1_DQS5
MEM_1_DQS#5
MEM_1_DQS6
MEM_1_DQS#6
MEM_1_DQS7
MEM_1_DQS#7
MEM_1_DQM0
MEM_1_DQM1
MEM_1_DQM2
MEM_1_DQM3
MEM_1_DQM4
MEM_1_DQM5
MEM_1_DQM6
MEM_1_DQM7
MEM_1_ADD0
MEM_1_ADD1
MEM_1_ADD2
MEM_1_ADD3
MEM_1_ADD4
MEM_1_ADD5
MEM_1_ADD6
MEM_1_ADD7
MEM_1_ADD8
MEM_1_ADD9
MEM_1_ADD10
MEM_1_ADD11
MEM_1_ADD12
MEM_1_ADD13
MEM_1_ADD14
MEM_1_BA0
MEM_1_BA1
MEM_1_BA2
MEM_1A_CS#0
MEM_1A_CS#1
MEM_1A_CKE0
MEM_1A_CKE1
MEM_1A_ODT0
MEM_1A_ODT1
MEM_1A_CLK0
MEM_1A_CLK#0
MEM_1A_CLK1
MEM_1A_CLK#1
MEM_1A_CLK2
MEM_1A_CLK#2
MEM_1B_CS#0
MEM_1B_CS#1
MEM_1B_CKE0
MEM_1B_CKE1
MEM_1B_ODT0
MEM_1B_ODT1
MEM_1B_CLK0
MEM_1B_CLK#0
MEM_1B_CLK1
MEM_1B_CLK#1
MEM_1B_CLK2
MEM_1B_CLK#2
AT42
AT43
BA43
AY42
BB37
BA37
BB33
BA33
BA10
AY11
AR42
AY43
BB38
BB34
BA11
BA18
BB25
BA25
BB26
BA26
BA27
AY27
BA28
AY28
BB28
BA17
BC28
AW28
BA14
BA29
BB17
BB18
BB29
BB16
BB14
BB30
AY31
AY15
BB13
BA19
AY19
BB22
BA22
BA42
BB42
BC16
BA13
BA30
BA31
AY16
BC13
BA20
AY20
AY23
BA23
BA41
BB41
BB6
BA6
AY2
AY1
AT2
AT1
AY7
BA2
AT5
U11C
MDQS1_0_P
MDQS1_0_N
MDQS1_1_P
MDQS1_1_N
MDQS1_2_P
MDQS1_2_N
MDQS1_3_P
MDQS1_3_N
MDQS1_4_P
MDQS1_4_N
MDQS1_5_P
MDQS1_5_N
MDQS1_6_P
MDQS1_6_N
MDQS1_7_P
MDQS1_7_N
MDQM1_0
MDQM1_1
MDQM1_2
MDQM1_3
MDQM1_4
MDQM1_5
MDQM1_6
MDQM1_7
MA1_0
MA1_1
MA1_2
MA1_3
MA1_4
MA1_5
MA1_6
MA1_7
MA1_8
MA1_9
MA1_10
MA1_11
MA1_12
MA1_13
MA1_14
MBA1_0
MBA1_1
MBA1_2
MCS1A_0*
MCS1A_1*
MCKE1A_0
MCKE1A_1
MODT1A_0
MODT1A_1
MCLK1A_0_P
MCLK1A_0_N
MCLK1A_1_P
MCLK1A_1_N
MCLK1A_2_P
MCLK1A_2_N
MCS1B_0*
MCS1B_1*
MCKE1B_0
MCKE1B_1
MODT1B_0
MODT1B_1
MCLK1B_0_P
MCLK1B_0_N
MCLK1B_1_P
MCLK1B_1_N
MCLK1B_2_P
MCLK1B_2_N
NVIDIA-MCP7A-A01
NVIDIA-MCP7A-A01
MDQ1_0
MDQ1_1
MDQ1_2
MDQ1_3
MDQ1_4
MDQ1_5
MDQ1_6
MDQ1_7
MDQ1_8
MDQ1_9
MDQ1_10
MDQ1_11
MDQ1_12
MDQ1_13
MDQ1_14
MDQ1_15
MDQ1_16
MDQ1_17
MDQ1_18
MDQ1_19
MDQ1_20
MDQ1_21
MDQ1_22
MDQ1_23
MDQ1_24
MDQ1_25
MDQ1_26
MDQ1_27
MDQ1_28
MDQ1_29
MDQ1_30
MDQ1_31
MDQ1_32
MDQ1_33
MDQ1_34
MDQ1_35
MDQ1_36
MDQ1_37
MDQ1_38
MDQ1_39
MDQ1_40
MDQ1_41
MDQ1_42
MDQ1_43
MDQ1_44
MDQ1_45
MDQ1_46
MDQ1_47
MDQ1_48
MDQ1_49
MDQ1_50
MDQ1_51
MDQ1_52
MDQ1_53
MDQ1_54
MDQ1_55
MDQ1_56
MDQ1_57
MDQ1_58
MDQ1_59
MDQ1_60
MDQ1_61
MDQ1_62
MDQ1_63
MRAS1*
MCAS1*
MWE1*
V1P1_PLL_MCLK
V1P1_DLLDLCELL_AVDD
AP42
AR41
AU41
AU40
AN40
AP41
AT41
AT40
AW41
AW42
BC40
BA40
AV41
AV42
AW40
BB40
AY39
BA38
BB36
BA36
AY40
BA39
AW36
BC36
AY35
BA34
BB32
BA32
AY36
BA35
AW32
BC32
BA12
AY12
BB9
BB8
AW12
BB12
BB10
BA9
AY8
BA7
BC4
BB4
BC8
BA8
BA5
BB5
BB2
BA3
AW3
AW4
BC3
BB3
AY3
AY4
AU3
AU2
AR3
AR4
AV3
AV2
AT3
AT4
AW16
BA15
BA16
AH27
150mA
AG27
MEM_1_DATA0
MEM_1_DATA1
MEM_1_DATA2
MEM_1_DATA3
MEM_1_DATA4
MEM_1_DATA5
MEM_1_DATA6
MEM_1_DATA7
MEM_1_DATA8
MEM_1_DATA9
MEM_1_DATA10
MEM_1_DATA11
MEM_1_DATA12
MEM_1_DATA13
MEM_1_DATA14
MEM_1_DATA15
MEM_1_DATA16
MEM_1_DATA17
MEM_1_DATA18
MEM_1_DATA19
MEM_1_DATA20
MEM_1_DATA21
MEM_1_DATA22
MEM_1_DATA23
MEM_1_DATA24
MEM_1_DATA25
MEM_1_DATA26
MEM_1_DATA27
MEM_1_DATA28
MEM_1_DATA29
MEM_1_DATA30
MEM_1_DATA31
MEM_1_DATA32
MEM_1_DATA33
MEM_1_DATA34
MEM_1_DATA35
MEM_1_DATA36
MEM_1_DATA37
MEM_1_DATA38
MEM_1_DATA39
MEM_1_DATA40
MEM_1_DATA41
MEM_1_DATA42
MEM_1_DATA43
MEM_1_DATA44
MEM_1_DATA45
MEM_1_DATA46
MEM_1_DATA47
MEM_1_DATA48
MEM_1_DATA49
MEM_1_DATA50
MEM_1_DATA51
MEM_1_DATA52
MEM_1_DATA53
MEM_1_DATA54
MEM_1_DATA55
MEM_1_DATA56
MEM_1_DATA57
MEM_1_DATA58
MEM_1_DATA59
MEM_1_DATA60
MEM_1_DATA61
MEM_1_DATA62
MEM_1_DATA63
MEM_1_RAS#
MEM_1_CAS#
MEM_1_WE#
20mA
VCC1_1_PLL
MEM_1_DATA[0..63] 8
MEM_1_RAS# 8,10
MEM_1_CAS# 8,10
MEM_1_WE# 8,10
VCC1_1_PLL
C497
C497
bottom
C0.1u16X0402
C0.1u16X0402
CP25
CP25
X_COPPER
X_COPPER
VCC1_1
FB9
FB9
X_30L500mA-200
X_30L500mA-200
MICRO-STAR INT'L CO.,LTD
MICRO-STAR INT'L CO.,LTD
MICRO-STAR INT'L CO.,LTD
MS-7534
MS-7534
MSI
MSI
MSI
Size Document Description Rev
Size Document Description Rev
Size Document Description Rev
Custom
Custom
Custom
Date:
Friday, March 07, 2008
Date:
Friday, March 07, 2008
Date:
8
7
6
5
4
3
Friday, March 07, 2008
2
MS-7534
MCP7A-MEM
MCP7A-MEM
MCP7A-MEM
Sheet of
Sheet of
Sheet of
737
737
737
1
0A
0A
0A
8
DIMM1
DIMM1
MEM_1_DATA0
D D
C C
B B
MEM_1_DATA1
MEM_1_DATA2
MEM_1_DATA3
MEM_1_DATA4
MEM_1_DATA5
MEM_1_DATA6
MEM_1_DATA7
MEM_1_DATA8
MEM_1_DATA9
MEM_1_DATA10
MEM_1_DATA11
MEM_1_DATA12
MEM_1_DATA13
MEM_1_DATA14
MEM_1_DATA15
MEM_1_DATA16
MEM_1_DATA17
MEM_1_DATA18
MEM_1_DATA19
MEM_1_DATA20
MEM_1_DATA21
MEM_1_DATA22
MEM_1_DATA23
MEM_1_DATA24
MEM_1_DATA25
MEM_1_DATA26
MEM_1_DATA27
MEM_1_DATA28
MEM_1_DATA29
MEM_1_DATA30
MEM_1_DATA31
MEM_1_DATA32
MEM_1_DATA33
MEM_1_DATA34
MEM_1_DATA35
MEM_1_DATA36
MEM_1_DATA37
MEM_1_DATA38
MEM_1_DATA39
MEM_1_DATA40
MEM_1_DATA41
MEM_1_DATA42
MEM_1_DATA43
MEM_1_DATA44
MEM_1_DATA45
MEM_1_DATA46
MEM_1_DATA47
MEM_1_DATA48
MEM_1_DATA49
MEM_1_DATA50
MEM_1_DATA51
MEM_1_DATA52
MEM_1_DATA53
MEM_1_DATA54
MEM_1_DATA55
MEM_1_DATA56
MEM_1_DATA57
MEM_1_DATA58
MEM_1_DATA59
MEM_1_DATA60
MEM_1_DATA61
MEM_1_DATA62
MEM_1_DATA63
3
4
9
10
122
123
128
129
12
13
21
22
131
132
140
141
24
25
30
31
143
144
149
150
33
34
39
40
152
153
158
159
80
81
86
87
199
200
205
206
89
90
95
96
208
209
214
215
98
99
107
108
217
218
226
227
110
111
116
117
229
230
235
236
2
5
8
11
14
17
20
23
26
29
32
35
38
41
44
47
50
65
66
79
82
85
88
91
94
97
DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQ8
DQ9
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
DQ16
DQ17
DQ18
DQ19
DQ20
DQ21
DQ22
DQ23
DQ24
DQ25
DQ26
DQ27
DQ28
DQ29
DQ30
DQ31
DQ32
DQ33
DQ34
DQ35
DQ36
DQ37
DQ38
DQ39
DQ40
DQ41
DQ42
DQ43
DQ44
DQ45
DQ46
DQ47
DQ48
DQ49
DQ50
DQ51
DQ52
DQ53
DQ54
DQ55
DQ56
DQ57
DQ58
DQ59
DQ60
DQ61
DQ62
DQ63
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
7
DIMM1 / 1A
VCC_DDR
68
19
55
102
NC2
NC1
RC118RC0
VDD51VDD56VDD62VDD72VDD78VDD
NC/TEST
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
100
103
106
109
112
115
118
121
124
127
170
191
75
VDD
VSS
VSS
VSS
VSS
130
133
136
197
194
181
175
VDD
VDD
VDD
VDDQ
VDDQ53VDDQ59VDDQ64VDDQ
VDDQ69VDDQ
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
139
142
145
148
151
154
157
160
163
6
5
4
3
2
1
DIMM2 / 1B
VCC_DDR
VCC3
DIMM2
172
187
184
189
67
178
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VSS
VSS
VSS
VSS
VSS
VSS
166
169
198
201
204
207
161
162
167
CB042CB143CB248CB349CB4
VSS
VSS
219
222
DM0/DQS9
NC/DQS9#
DM1/DQS10
NC/DQS10#
DM2/DQS11
NC/DQS11#
DM3/DQS12
NC/DQS12#
DM4/DQS13
NC/DQS13#
DM5/DQS14
NC/DQS14#
DM6/DQS15
NC/DQS15#
DM7/DQS16
NC/DQS16#
DM8/DQS17
NC/DQS17#
CK1#(CK0#)
VSS
VSS
225
228
231
168
CB5
CB6
CB7
DQS0
DQS0#
DQS1
DQS1#
DQS2
DQS2#
DQS3
DQS3#
DQS4
DQS4#
DQS5
DQS5#
DQS6
DQS6#
DQS7
DQS7#
DQS8
DQS8#
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10_AP
A11
A12
A13
A14
A15
A16/BA2
BA1
BA0
WE#
CAS#
RAS#
ODT0
ODT1
CKE0
CKE1
CS0#
CS1#
CK0(DU)
CK0#(DU)
CK1(CK0)
CK2(DU)
CK2#(DU)
SCL
SDA
VREF
X1
SA0
SA1
SA2
X2
X3
VSS
VSS
VSS
DDRII-240_ORANGE
DDRII-240_ORANGE
234
237
7
6
16
15
28
27
37
36
84
83
93
92
105
104
114
113
46
45
188
183
63
182
61
60
180
58
179
177
70
57
176
196
174
173
54
190
71
73
74
192
125
126
134
135
146
147
155
156
202
203
211
212
223
224
232
233
164
165
195
77
52
171
193
76
185
186
137
138
220
221
120
119
1
X1
239
240
101
X2
X3
MEM_1_DQS0
MEM_1_DQS#0
MEM_1_DQS1
MEM_1_DQS#1
MEM_1_DQS2
MEM_1_DQS#2
MEM_1_DQS3
MEM_1_DQS#3
MEM_1_DQS4
MEM_1_DQS#4
MEM_1_DQS5
MEM_1_DQS#5
MEM_1_DQS6
MEM_1_DQS#6
MEM_1_DQS7
MEM_1_DQS#7
MEM_1_ADD0
MEM_1_ADD1
MEM_1_ADD2
MEM_1_ADD3
MEM_1_ADD4
MEM_1_ADD5
MEM_1_ADD6
MEM_1_ADD7
MEM_1_ADD8
MEM_1_ADD9
MEM_1_ADD10
MEM_1_ADD11
MEM_1_ADD12
MEM_1_ADD13
MEM_1_ADD14
MEM_1_BA2
MEM_1_BA1
MEM_1_BA0
MEM_1_WE#
MEM_1_CAS#
MEM_1_RAS#
MEM_1_DQM0
MEM_1_DQM1
MEM_1_DQM2
MEM_1_DQM3
MEM_1_DQM4
MEM_1_DQM5
MEM_1_DQM6
MEM_1_DQM7
MEM_1A_ODT0
MEM_1A_ODT1
MEM_1A_CKE0
MEM_1A_CKE1
MEM_1A_CS#0
MEM_1A_CS#1
MEM_1A_CLK0
MEM_1A_CLK#0
MEM_1A_CLK2
MEM_1A_CLK#2
MEM_1A_CLK1
MEM_1A_CLK#1
DIMM_VREF_B
VCC3
MEM_1_DQS[0..7] 7MEM_1_DATA[0..63]7
MEM_1_DQS#[0..7] 7
MEM_1_BA[0..2] 7,10
MEM_1_WE# 7,10
MEM_1_CAS# 7,10
MEM_1_RAS# 7,10
MEM_1_DQM[0..7] 7
MEM_1A_ODT[0..1] 7,10
MEM_1A_CKE[0..1] 7,10
MEM_1A_CS#[0..1] 7,10
MEM_1A_CLK0 7
MEM_1A_CLK#0 7
MEM_1A_CLK2 7
MEM_1A_CLK#2 7
MEM_1A_CLK1 7
MEM_1A_CLK#1 7
SMB_MEM_CLK 9,13
SMB_MEM_DATA 9,13
C63
C63
C0.1u16X0402
C0.1u16X0402
PLACE CLOSE TO DIMM PIN
238
VDDSPD
VSS
VSS
VSS
210
213
216
MEM_1_DATA[0..63]7
MEM_1_ADD[0..14] 7,10
R118 121R1%0402R118 121R1%0402
R125
R125
121R1%0402
121R1%0402
VCC_DDR
MEM_1_DATA0
MEM_1_DATA1
MEM_1_DATA2
MEM_1_DATA3
MEM_1_DATA4
MEM_1_DATA5
MEM_1_DATA6
MEM_1_DATA7
MEM_1_DATA8
MEM_1_DATA9
MEM_1_DATA10
MEM_1_DATA11
MEM_1_DATA12
MEM_1_DATA13
MEM_1_DATA14
MEM_1_DATA15
MEM_1_DATA16
MEM_1_DATA17
MEM_1_DATA18
MEM_1_DATA19
MEM_1_DATA20
MEM_1_DATA21
MEM_1_DATA22
MEM_1_DATA23
MEM_1_DATA24
MEM_1_DATA25
MEM_1_DATA26
MEM_1_DATA27
MEM_1_DATA28
MEM_1_DATA29
MEM_1_DATA30
MEM_1_DATA31
MEM_1_DATA32
MEM_1_DATA33
MEM_1_DATA34
MEM_1_DATA35
MEM_1_DATA36
MEM_1_DATA37
MEM_1_DATA38
MEM_1_DATA39
MEM_1_DATA40
MEM_1_DATA41
MEM_1_DATA42
MEM_1_DATA43
MEM_1_DATA44
MEM_1_DATA45
MEM_1_DATA46
MEM_1_DATA47
MEM_1_DATA48
MEM_1_DATA49
MEM_1_DATA50
MEM_1_DATA51
MEM_1_DATA52
MEM_1_DATA53
MEM_1_DATA54
MEM_1_DATA55
MEM_1_DATA56
MEM_1_DATA57
MEM_1_DATA58
MEM_1_DATA59
MEM_1_DATA60
MEM_1_DATA61
MEM_1_DATA62
MEM_1_DATA63
DIMM2
10
122
123
128
129
12
13
21
22
131
132
140
141
24
25
30
31
143
144
149
150
33
34
39
40
152
153
158
159
80
81
86
87
199
200
205
206
89
90
95
96
208
209
214
215
98
99
107
108
217
218
226
227
110
111
116
117
229
230
235
236
11
14
17
20
23
26
29
32
35
38
41
44
47
50
65
66
79
82
85
88
91
94
97
3
4
9
2
5
8
DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQ8
DQ9
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
DQ16
DQ17
DQ18
DQ19
DQ20
DQ21
DQ22
DQ23
DQ24
DQ25
DQ26
DQ27
DQ28
DQ29
DQ30
DQ31
DQ32
DQ33
DQ34
DQ35
DQ36
DQ37
DQ38
DQ39
DQ40
DQ41
DQ42
DQ43
DQ44
DQ45
DQ46
DQ47
DQ48
DQ49
DQ50
DQ51
DQ52
DQ53
DQ54
DQ55
DQ56
DQ57
DQ58
DQ59
DQ60
DQ61
DQ62
DQ63
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
68
19
55
102
NC2
NC1
RC118RC0
VDD51VDD56VDD62VDD72VDD78VDD
NC/TEST
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
100
103
106
109
112
115
118
121
124
170
191
75
VDD
VSS
VSS
VSS
VSS
127
130
133
136
197
194
181
175
VDD
VDD
VDD
VDDQ
VDDQ53VDDQ59VDDQ64VDDQ
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
139
142
145
148
151
154
157
160
172
187
184
VDDQ
VDDQ
VDDQ
VDDQ69VDDQ
VSS
VSS
VSS
VSS
163
166
169
198
VCC3
189
67
178
VDDQ
VDDQ
VSS
VSS
VSS
201
204
207
161
162
167
CB042CB143CB248CB349CB4
VSS
VSS
219
222
225
DM0/DQS9
NC/DQS9#
DM1/DQS10
NC/DQS10#
DM2/DQS11
NC/DQS11#
DM3/DQS12
NC/DQS12#
DM4/DQS13
NC/DQS13#
DM5/DQS14
NC/DQS14#
DM6/DQS15
NC/DQS15#
DM7/DQS16
NC/DQS16#
DM8/DQS17
NC/DQS17#
CK0#(DU)
CK1(CK0)
CK1#(CK0#)
CK2#(DU)
VSS
VSS
VSS
228
231
168
CB5
CB6
CB7
DQS0
DQS0#
DQS1
DQS1#
DQS2
DQS2#
DQS3
DQS3#
DQS4
DQS4#
DQS5
DQS5#
DQS6
DQS6#
DQS7
DQS7#
DQS8
DQS8#
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10_AP
A11
A12
A13
A14
A15
A16/BA2
BA1
BA0
WE#
CAS#
RAS#
ODT0
ODT1
CKE0
CKE1
CS0#
CS1#
CK0(DU)
CK2(DU)
SCL
SDA
VREF
X1
SA0
SA1
SA2
X2
X3
VSS
VSS
DDRII-240_GREEN
DDRII-240_GREEN
234
237
7
6
16
15
28
27
37
36
84
83
93
92
105
104
114
113
46
45
188
183
63
182
61
60
180
58
179
177
70
57
176
196
174
173
54
190
71
73
74
192
125
126
134
135
146
147
155
156
202
203
211
212
223
224
232
233
164
165
195
77
52
171
193
76
185
186
137
138
220
221
120
119
1
X1
239
240
101
X2
X3
MEM_1_DQS0
MEM_1_DQS#0
MEM_1_DQS1
MEM_1_DQS#1
MEM_1_DQS2
MEM_1_DQS#2
MEM_1_DQS3
MEM_1_DQS#3
MEM_1_DQS4
MEM_1_DQS#4
MEM_1_DQS5
MEM_1_DQS#5
MEM_1_DQS6
MEM_1_DQS#6
MEM_1_DQS7
MEM_1_DQS#7
MEM_1_ADD0
MEM_1_ADD1
MEM_1_ADD2
MEM_1_ADD3
MEM_1_ADD4
MEM_1_ADD5
MEM_1_ADD6
MEM_1_ADD7
MEM_1_ADD8
MEM_1_ADD9
MEM_1_ADD10
MEM_1_ADD11
MEM_1_ADD12
MEM_1_ADD13
MEM_1_ADD14
MEM_1_BA2
MEM_1_BA1
MEM_1_BA0
MEM_1_WE#
MEM_1_CAS#
MEM_1_RAS#
MEM_1_DQM0
MEM_1_DQM1
MEM_1_DQM2
MEM_1_DQM3
MEM_1_DQM4
MEM_1_DQM5
MEM_1_DQM6
MEM_1_DQM7
MEM_1B_ODT0
MEM_1B_ODT1
MEM_1B_CKE0
MEM_1B_CKE1
MEM_1B_CS#0
MEM_1B_CS#1
MEM_1B_CLK0
MEM_1B_CLK#0
MEM_1B_CLK2
MEM_1B_CLK#2
MEM_1B_CLK1
MEM_1B_CLK#1
SMB_MEM_CLK
SMB_MEM_DATA
DIMM_VREF_B
VCC3
MEM_1B_ODT[0..1] 7,10
MEM_1B_CKE[0..1] 7,10
MEM_1B_CS#[0..1] 7,10
MEM_1B_CLK0 7
MEM_1B_CLK#0 7
MEM_1B_CLK2 7
MEM_1B_CLK#2 7
MEM_1B_CLK1 7
MEM_1B_CLK#1 7
C68
C68
C0.1u16X0402
C0.1u16X0402
PLACE CLOSE TO DIMM PIN
238
VDDSPD
VSS
VSS
VSS
210
213
216
A A
ADDRESS: 001, 0xA2
8
7
6
5
4
ADDRESS: 011, 0xA6
3
MICRO-STAR INT'L CO.,LTD
MICRO-STAR INT'L CO.,LTD
MICRO-STAR INT'L CO.,LTD
MS-7534
MS-7534
MSI
MSI
MSI
Size Document Description Rev
Size Document Description Rev
Size Document Description Rev
Custom
Custom
Custom
Date:
Friday, March 07, 2008
Date:
Friday, March 07, 2008
Date:
Friday, March 07, 2008
2
MS-7534
DDR II DIMM 1 & 2
DDR II DIMM 1 & 2
DDR II DIMM 1 & 2
837
837
837
Sheet of
Sheet of
Sheet of
1
0A
0A
0A
DIMM3 / 0A
VCC_DDR
DIMM3
MEM_0_DATA[0..63]7
MEM_0_DATA0
MEM_0_DATA1
MEM_0_DATA2
MEM_0_DATA3
MEM_0_DATA4
MEM_0_DATA5
MEM_0_DATA6
MEM_0_DATA7
MEM_0_DATA8
MEM_0_DATA9
MEM_0_DATA10
MEM_0_DATA11
MEM_0_DATA12
MEM_0_DATA13
MEM_0_DATA14
MEM_0_DATA15
MEM_0_DATA16
MEM_0_DATA17
MEM_0_DATA18
MEM_0_DATA19
MEM_0_DATA20
MEM_0_DATA21
MEM_0_DATA22
MEM_0_DATA23
MEM_0_DATA24
MEM_0_DATA25
MEM_0_DATA26
MEM_0_DATA27
MEM_0_DATA28
MEM_0_DATA29
MEM_0_DATA30
MEM_0_DATA31
MEM_0_DATA32
MEM_0_DATA33
MEM_0_DATA34
MEM_0_DATA35
MEM_0_DATA36
MEM_0_DATA37
MEM_0_DATA38
MEM_0_DATA39
MEM_0_DATA40
MEM_0_DATA41
MEM_0_DATA42
MEM_0_DATA43
MEM_0_DATA44
MEM_0_DATA45
MEM_0_DATA46
MEM_0_DATA47
MEM_0_DATA48
MEM_0_DATA49
MEM_0_DATA50
MEM_0_DATA51
MEM_0_DATA52
MEM_0_DATA53
MEM_0_DATA54
MEM_0_DATA55
MEM_0_DATA56
MEM_0_DATA57
MEM_0_DATA58
MEM_0_DATA59
MEM_0_DATA60
MEM_0_DATA61
MEM_0_DATA62
MEM_0_DATA63
DIMM3
10
122
123
128
129
12
13
21
22
131
132
140
141
24
25
30
31
143
144
149
150
33
34
39
40
152
153
158
159
80
81
86
87
199
200
205
206
89
90
95
96
208
209
214
215
98
99
107
108
217
218
226
227
110
111
116
117
229
230
235
236
11
14
17
20
23
26
29
32
35
38
41
44
47
50
65
66
79
82
85
88
91
94
97
3
4
9
2
5
8
DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQ8
DQ9
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
DQ16
DQ17
DQ18
DQ19
DQ20
DQ21
DQ22
DQ23
DQ24
DQ25
DQ26
DQ27
DQ28
DQ29
DQ30
DQ31
DQ32
DQ33
DQ34
DQ35
DQ36
DQ37
DQ38
DQ39
DQ40
DQ41
DQ42
DQ43
DQ44
DQ45
DQ46
DQ47
DQ48
DQ49
DQ50
DQ51
DQ52
DQ53
DQ54
DQ55
DQ56
DQ57
DQ58
DQ59
DQ60
DQ61
DQ62
DQ63
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
68
19
55
102
NC2
NC1
RC118RC0
VDD51VDD56VDD62VDD72VDD78VDD
NC/TEST
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
100
103
106
109
112
115
118
121
124
170
191
194
75
VDD
VSS
VSS
VSS
VSS
127
130
133
136
139
197
181
175
VDD
VDD
VDD
VDDQ
VDDQ53VDDQ59VDDQ64VDDQ
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
142
145
148
151
154
157
160
163
ADDRESS: 000, 0xA0
172
187
184
178
VDDQ
VDDQ
VDDQ
VDDQ69VDDQ
VSS
VSS
VSS
VSS
VSS
166
169
198
201
Y
D16
D16
Z
1PS226_SOT23
1PS226_SOT23
X
VCC3
DIMM4
DIMM4
19
189
67
VDDQ
VDDQ
VSS
VSS
204
207
161
162
167
CB042CB143CB248CB349CB4
VSS
VSS
VSS
219
222
225
Y
D17
D17
Z
1PS226_SOT23
1PS226_SOT23
X
CB5
DQS0#
DQS1#
DQS2#
DQS3#
DQS4#
DQS5#
DQS6#
DQS7#
DQS8#
A10_AP
A16/BA2
DM0/DQS9
NC/DQS9#
DM1/DQS10
NC/DQS10#
DM2/DQS11
NC/DQS11#
DM3/DQS12
NC/DQS12#
DM4/DQS13
NC/DQS13#
DM5/DQS14
NC/DQS14#
DM6/DQS15
NC/DQS15#
DM7/DQS16
NC/DQS16#
DM8/DQS17
NC/DQS17#
CK0(DU)
CK0#(DU)
CK1(CK0)
CK1#(CK0#)
CK2(DU)
CK2#(DU)
VSS
VSS
VSS
228
231
234
168
CB6
CB7
7
DQS0
6
16
DQS1
15
28
DQS2
27
37
DQS3
36
84
DQS4
83
93
DQS5
92
105
DQS6
104
114
DQS7
113
46
DQS8
45
188
A0
183
A1
63
A2
182
A3
61
A4
60
A5
180
A6
58
A7
179
A8
177
A9
70
57
A11
176
A12
196
A13
174
A14
173
A15
54
190
BA1
71
BA0
73
WE#
74
CAS#
192
RAS#
125
126
134
135
146
147
155
156
202
203
211
212
223
224
232
233
164
165
195
ODT0
77
ODT1
52
CKE0
171
CKE1
193
CS0#
76
CS1#
185
186
137
138
220
221
120
SCL
119
SDA
1
VREF
X1
X1
239
SA0
240
SA1
101
SA2
X2
X2
X3
X3
VSS
DDRII-240_ORANGE
DDRII-240_ORANGE
237
MEM_0_DQS0
MEM_0_DQS#0
MEM_0_DQS1
MEM_0_DQS#1
MEM_0_DQS2
MEM_0_DQS#2
MEM_0_DQS3
MEM_0_DQS#3
MEM_0_DQS4
MEM_0_DQS#4
MEM_0_DQS5
MEM_0_DQS#5
MEM_0_DQS6
MEM_0_DQS#6
MEM_0_DQS7
MEM_0_DQS#7
MEM_0_ADD0
MEM_0_ADD1
MEM_0_ADD2
MEM_0_ADD3
MEM_0_ADD4
MEM_0_ADD5
MEM_0_ADD6
MEM_0_ADD7
MEM_0_ADD8
MEM_0_ADD9
MEM_0_ADD10
MEM_0_ADD11
MEM_0_ADD12
MEM_0_ADD13
MEM_0_ADD14
MEM_0_BA2
MEM_0_BA1
MEM_0_BA0
MEM_0_WE#
MEM_0_CAS#
MEM_0_RAS#
MEM_0_DQM0
MEM_0_DQM1
MEM_0_DQM2
MEM_0_DQM3
MEM_0_DQM4
MEM_0_DQM5
MEM_0_DQM6
MEM_0_DQM7
MEM_0A_ODT0
MEM_0A_ODT1
MEM_0A_CKE0
MEM_0A_CKE1
MEM_0A_CS#0
MEM_0A_CS#1
MEM_0A_CLK0
MEM_0A_CLK#0
MEM_0A_CLK2
MEM_0A_CLK#2
MEM_0A_CLK1
MEM_0A_CLK#1
DIMM_VREF_A DIMM_VREF_A
DIMM_VREF_ASMB_MEM_CLKSMB_MEM_DATA
238
VDDSPD
VSS
VSS
VSS
210
213
216
3VDUAL3VDUAL
MEM_0_DQS[0..7] 7
MEM_0_DQS#[0..7] 7
MEM_0_ADD[0..14] 7,10
MEM_0_BA[0..2] 7,10
MEM_0_WE# 7,10
MEM_0_CAS# 7,10
MEM_0_RAS# 7,10
MEM_0_DQM[0..7] 7
MEM_0A_ODT[0..1] 7,10
MEM_0A_CKE[0..1] 7,10
MEM_0A_CS#[0..1] 7,10
MEM_0A_CLK0 7
MEM_0A_CLK#0 7
MEM_0A_CLK2 7
MEM_0A_CLK#2 7
MEM_0A_CLK1 7
MEM_0A_CLK#1 7
SMB_MEM_CLK 8,13
SMB_MEM_DATA 8,13
C69
C69
C0.1u16X0402
C0.1u16X0402
PLACE CLOSE TO DIMM PIN PLACE CLOSE TO DIMM PIN
VCC_DDR
R119
R119
121R1%0402
121R1%0402
R126
R126
121R1%0402
121R1%0402
MEM_0_DATA0
MEM_0_DATA1
MEM_0_DATA2
MEM_0_DATA3
MEM_0_DATA4
MEM_0_DATA5
MEM_0_DATA6
MEM_0_DATA7
MEM_0_DATA8
MEM_0_DATA9
MEM_0_DATA10
MEM_0_DATA11
MEM_0_DATA12
MEM_0_DATA13
MEM_0_DATA14
MEM_0_DATA15
MEM_0_DATA16
MEM_0_DATA17
MEM_0_DATA18
MEM_0_DATA19
MEM_0_DATA20
MEM_0_DATA21
MEM_0_DATA22
MEM_0_DATA23
MEM_0_DATA24
MEM_0_DATA25
MEM_0_DATA26
MEM_0_DATA27
MEM_0_DATA28
MEM_0_DATA29
MEM_0_DATA30
MEM_0_DATA31
MEM_0_DATA32
MEM_0_DATA33
MEM_0_DATA34
MEM_0_DATA35
MEM_0_DATA36
MEM_0_DATA37
MEM_0_DATA38
MEM_0_DATA39
MEM_0_DATA40
MEM_0_DATA41
MEM_0_DATA42
MEM_0_DATA43
MEM_0_DATA44
MEM_0_DATA45
MEM_0_DATA46
MEM_0_DATA47
MEM_0_DATA48
MEM_0_DATA49
MEM_0_DATA50
MEM_0_DATA51
MEM_0_DATA52
MEM_0_DATA53
MEM_0_DATA54
MEM_0_DATA55
MEM_0_DATA56
MEM_0_DATA57
MEM_0_DATA58
MEM_0_DATA59
MEM_0_DATA60
MEM_0_DATA61
MEM_0_DATA62
MEM_0_DATA63
55
102
3
NC1
RC118RC0
DQ0
4
DQ1
9
DQ2
10
DQ3
122
DQ4
123
DQ5
128
DQ6
129
DQ7
12
DQ8
13
DQ9
21
DQ10
22
DQ11
131
DQ12
132
DQ13
140
DQ14
141
DQ15
24
DQ16
25
DQ17
30
DQ18
31
DQ19
143
DQ20
144
DQ21
149
DQ22
150
DQ23
33
DQ24
34
DQ25
39
DQ26
40
DQ27
152
DQ28
153
DQ29
158
DQ30
159
DQ31
80
DQ32
81
DQ33
86
DQ34
87
DQ35
199
DQ36
200
DQ37
205
DQ38
206
DQ39
89
DQ40
90
DQ41
95
DQ42
96
DQ43
208
DQ44
209
DQ45
214
DQ46
215
DQ47
98
DQ48
99
DQ49
107
DQ50
108
DQ51
217
DQ52
218
DQ53
226
DQ54
227
DQ55
110
DQ56
111
DQ57
116
DQ58
117
DQ59
229
DQ60
230
DQ61
235
DQ62
236
DQ63
2
VSS
5
VSS
8
VSS
11
VSS
14
VSS
17
VSS
20
VSS
23
VSS
26
VSS
29
VSS
32
VSS
35
VSS
38
VSS
41
VSS
44
VSS
47
VSS
50
VSS
65
VSS
66
VSS
79
VSS
82
VSS
85
VSS
88
VSS
91
VSS
94
VSS
97
VSS
VSS
VSS
VSS
100
103
106
109
ADDRESS: 010, 0xA4
VCC_DDR
68
NC2
NC/TEST
VSS
VSS
VSS
112
115
118
DIMM4 / 0B
191
75
VDD51VDD56VDD62VDD72VDD78VDD
VDD
VSS
VSS
VSS
VSS
VSS
VSS
121
124
127
130
133
136
VCC3
170
197
172
187
184
189
67
VSS
154
VSS
VSS
157
160
163
178
VDDQ
VDDQ
VDDQ
VDDQ69VDDQ
VSS
VSS
VSS
VSS
VSS
166
169
198
201
VDDQ
VDDQ
VSS
VSS
204
207
194
181
175
VDD
VDD
VDD
VDDQ
VDDQ53VDDQ59VDDQ64VDDQ
VSS
VSS
VSS
VSS
VSS
VSS
139
142
145
148
151
161
162
167
CB042CB143CB248CB349CB4
VSS
VSS
219
222
225
A10_AP
A16/BA2
DM0/DQS9
NC/DQS9#
DM1/DQS10
NC/DQS10#
DM2/DQS11
NC/DQS11#
DM3/DQS12
NC/DQS12#
DM4/DQS13
NC/DQS13#
DM5/DQS14
NC/DQS14#
DM6/DQS15
NC/DQS15#
DM7/DQS16
NC/DQS16#
DM8/DQS17
NC/DQS17#
CK0(DU)
CK0#(DU)
CK1(CK0)
CK1#(CK0#)
CK2(DU)
CK2#(DU)
VSS
VSS
VSS
228
231
234
168
CB5
CB6
CB7
MEM_0_DQS0
7
DQS0
MEM_0_DQS#0
6
DQS0#
DQS1#
DQS2#
DQS3#
DQS4#
DQS5#
DQS6#
DQS7#
DQS8#
VSS
MEM_0_DQS1
16
DQS1
MEM_0_DQS#1
15
MEM_0_DQS2
28
DQS2
MEM_0_DQS#2
27
MEM_0_DQS3
37
DQS3
MEM_0_DQS#3
36
MEM_0_DQS4
84
DQS4
MEM_0_DQS#4
83
MEM_0_DQS5
93
DQS5
MEM_0_DQS#5
92
MEM_0_DQS6
105
DQS6
MEM_0_DQS#6
104
MEM_0_DQS7
114
DQS7
MEM_0_DQS#7
113
46
DQS8
45
MEM_0_ADD0
188
A0
MEM_0_ADD1
183
A1
MEM_0_ADD2
63
A2
MEM_0_ADD3
182
A3
MEM_0_ADD4
61
A4
MEM_0_ADD5
60
A5
MEM_0_ADD6
180
A6
MEM_0_ADD7
58
A7
MEM_0_ADD8
179
A8
MEM_0_ADD9
177
A9
MEM_0_ADD10
70
MEM_0_ADD11
57
A11
MEM_0_ADD12
176
A12
MEM_0_ADD13
196
A13
MEM_0_ADD14
174
A14
173
A15
MEM_0_BA2
54
MEM_0_BA1
190
BA1
MEM_0_BA0
71
BA0
MEM_0_WE#
73
WE#
MEM_0_CAS#
74
CAS#
MEM_0_RAS#
192
RAS#
MEM_0_DQM0
125
126
MEM_0_DQM1
134
135
MEM_0_DQM2
146
147
MEM_0_DQM3
155
156
MEM_0_DQM4
202
203
MEM_0_DQM5
211
212
MEM_0_DQM6
223
224
MEM_0_DQM7
232
233
164
165
MEM_0B_ODT0
195
ODT0
MEM_0B_ODT1
77
ODT1
MEM_0B_CKE0
52
CKE0
MEM_0B_CKE1
171
CKE1
MEM_0B_CS#0
193
CS0#
MEM_0B_CS#1
76
CS1#
MEM_0B_CLK0
185
MEM_0B_CLK#0
186
MEM_0B_CLK2
137
MEM_0B_CLK#2
138
MEM_0B_CLK1
220
MEM_0B_CLK#1
221
SMB_MEM_CLK
120
SCL
SMB_MEM_DATA
119
SDA
1
VREF
X1
X1
239
SA0
240
SA1
SA2
X2
X3
VSS
DDRII-240_GREEN
DDRII-240_GREEN
237
MSI
MSI
MSI
VCC3
101
X2
X3
Size Document Description Rev
Size Document Description Rev
Size Document Description Rev
Custom
Custom
Custom
Date:
Friday, March 07, 2008
Date:
Friday, March 07, 2008
Date:
Friday, March 07, 2008
MEM_0B_ODT[0..1] 7,10
MEM_0B_CKE[0..1] 7,10
MEM_0B_CS#[0..1] 7,10
MEM_0B_CLK0 7
MEM_0B_CLK#0 7
MEM_0B_CLK2 7
MEM_0B_CLK#2 7
MEM_0B_CLK1 7
MEM_0B_CLK#1 7
C64
C64
C0.1u16X0402
C0.1u16X0402
MICRO-STAR INT'L CO.,LTD
MICRO-STAR INT'L CO.,LTD
MICRO-STAR INT'L CO.,LTD
MS-7534
MS-7534
MS-7534
DDR II DIMM 3 & 4
DDR II DIMM 3 & 4
DDR II DIMM 3 & 4
937
937
937
Sheet of
Sheet of
Sheet of
0A
0A
0A
238
VDDSPD
VSS
VSS
VSS
210
213
216
8
7
6
5
4
3
2
1
CHANNEL 0 VTT_DDR DECOULPING CAPS
VTT_DDR
C186
C186
X_C10u10Y0805
X_C10u10Y0805
C234
C234
X_C10u10Y0805
D D
VTT_DDR
C C
X_C10u10Y0805
C153
C153
C0.1u16Y0402
C0.1u16Y0402
C124
C124
C0.1u16Y0402
C0.1u16Y0402
C130
C130
C0.1u16Y0402
C0.1u16Y0402
C183
C183
C0.1u16Y0402
C0.1u16Y0402
C206
C206
X_C0.1u16Y0402
X_C0.1u16Y0402
C196
C196
C0.1u16Y0402
C0.1u16Y0402
C149
C149
X_C0.1u16Y0402
X_C0.1u16Y0402
C216
C216
X_C0.1u16Y0402
X_C0.1u16Y0402
C231
C231
X_C0.1u16Y0402
X_C0.1u16Y0402
C166
C166
C0.1u16Y0402
C0.1u16Y0402
C172
C172
X_C0.1u16Y0402
X_C0.1u16Y0402
MEM_0_ADD[0..14]7,9
MEM_0_BA[0..2]7,9
MEM_0_RAS#7,9
MEM_0_CAS#7,9
MEM_0_WE#7,9
MEM_0A_CS#[0..1]7,9
MEM_0A_CKE[0..1]7,9
MEM_0A_ODT[0..1]7,9
MEM_0B_CS#[0..1]7,9
MEM_0B_CKE[0..1]7,9
MEM_0B_ODT[0..1]7,9
CHECK CAP
VCC_DDR
C144
C144
C0.1u16Y0402
C0.1u16Y0402
C151
C151
C0.1u16Y0402
C0.1u16Y0402
C223
C223
C0.1u16Y0402
C0.1u16Y0402
C187
C187
C0.1u16Y0402
C0.1u16Y0402
C211
C211
C0.1u16Y0402
B B
C0.1u16Y0402
VTT_DDR
CHANNEL 0 ----- 0A , 0B
MEM_0A_CKE1
MEM_0B_CKE1
MEM_0B_CKE0
MEM_0A_CKE0
MEM_0_BA2
MEM_0_ADD14
MEM_0_ADD12
MEM_0_ADD11
MEM_0_ADD9
MEM_0_ADD7
MEM_0_ADD5
MEM_0_ADD8
MEM_0_ADD6
MEM_0_ADD4
MEM_0_ADD3
MEM_0_ADD2
MEM_0_ADD1
MEM_0_ADD10
MEM_0_BA0
MEM_0_ADD0
MEM_0_BA1
MEM_0A_CS#0
MEM_0_RAS#
MEM_0_WE#
MEM_0B_CS#0
MEM_0_CAS#
MEM_0A_ODT0
MEM_0B_ODT0
MEM_0B_CS#1
MEM_0_ADD13
MEM_0A_CS#1
MEM_0B_ODT1
MEM_0A_ODT1
1
3
5
7
1
3
5
7
1
3
5
7
1
3
5
7
R220 47R0402R220 47R0402
1
3
5
7
1
3
5
7
1
3
5
7
1
3
5
7
2
RN10
RN10
4
8P4R-47R0402
8P4R-47R0402
6
8
2
RN12
RN12
4
8P4R-47R0402
8P4R-47R0402
6
8
2
RN14
RN14
4
8P4R-47R0402
8P4R-47R0402
6
8
2
RN17
RN17
4
8P4R-47R0402
8P4R-47R0402
6
8
2
RN20
RN20
4
8P4R-47R0402
8P4R-47R0402
6
8
2
RN22
RN22
4
8P4R-47R0402
8P4R-47R0402
6
8
2
RN25
RN25
4
8P4R-47R0402
8P4R-47R0402
6
8
2
RN27
RN27
4
8P4R-47R0402
8P4R-47R0402
6
8
VTT_DDR
CHECK CAP
CHANNEL 1 VTT_DDR DECOULPING CAPS
VTT_DDR
C129
C129
C10u10Y0805
C10u10Y0805
C236
C236
X_C10u10Y0805
VTT_DDR
X_C10u10Y0805
C138
C138
X_C0.1u16Y0402
X_C0.1u16Y0402
C160
C160
C0.1u16Y0402
C0.1u16Y0402
C185
C185
C0.1u16Y0402
C0.1u16Y0402
C175
C175
X_C0.1u16Y0402
X_C0.1u16Y0402
C233
C233
C0.1u16Y0402
C0.1u16Y0402
C139
C139
X_C0.1u16Y0402
X_C0.1u16Y0402
C197
C197
C0.1u16Y0402
C0.1u16Y0402
C230
C230
X_C0.1u16Y0402
X_C0.1u16Y0402
C136
C136
X_C0.1u16Y0402
X_C0.1u16Y0402
C143
C143
C0.1u16Y0402
C0.1u16Y0402
MEM_1_ADD[0..14]7,8
MEM_1_BA[0..2]7,8
MEM_1_RAS#7,8
MEM_1_CAS#7,8
MEM_1_WE#7,8
MEM_1A_CS#[0..1]7,8
MEM_1A_CKE[0..1]7,8
MEM_1A_ODT[0..1]7,8
MEM_1B_CS#[0..1]7,8
MEM_1B_CKE[0..1]7,8
MEM_1B_ODT[0..1]7,8
CHECK CAP
VCC_DDR
VTT_DDR
C147
C147
C0.1u16Y0402
C0.1u16Y0402
C154
C154
C0.1u16Y0402
C0.1u16Y0402
C219
C219
C0.1u16Y0402
C0.1u16Y0402
C207
C207
C0.1u16Y0402
C0.1u16Y0402
C167
C167
C0.1u16Y0402
C0.1u16Y0402
VTT_DDR
C213
C213
C0.1u16Y0402
C0.1u16Y0402
CHANNEL 1 ----- 1A , 1B
MEM_1B_CKE1
MEM_1A_CKE1
MEM_1B_CKE0
MEM_1A_CKE0
MEM_1_ADD14
MEM_1_BA2
MEM_1_ADD12
MEM_1_ADD11
MEM_1_ADD9
MEM_1_ADD7
MEM_1_ADD8
MEM_1_ADD5
MEM_1_ADD6
MEM_1_ADD4
MEM_1_ADD3
MEM_1_ADD2
MEM_1_ADD1
MEM_1_ADD0
MEM_1_BA1
MEM_1_ADD10
MEM_1_BA0
MEM_1_RAS#
MEM_1B_CS#0
MEM_1A_CS#0
MEM_1_WE#
MEM_1B_ODT0
MEM_1_CAS#
MEM_1A_ODT0
MEM_1_ADD13
MEM_1B_CS#1
MEM_1A_CS#1
MEM_1A_ODT1
MEM_1B_ODT1
1
2
RN11
3
5
7
1
3
5
7
1
3
5
7
1
3
5
7
R221 47R0402R221 47R0402
1
3
5
7
1
3
5
7
1
3
5
7
1
3
5
7
RN11
4
8P4R-47R0402
8P4R-47R0402
6
8
2
RN13
RN13
4
8P4R-47R0402
8P4R-47R0402
6
8
2
RN15
RN15
4
8P4R-47R0402
8P4R-47R0402
6
8
2
RN18
RN18
4
8P4R-47R0402
8P4R-47R0402
6
8
2
RN21
RN21
4
8P4R-47R0402
8P4R-47R0402
6
8
2
RN23
RN23
4
8P4R-47R0402
8P4R-47R0402
6
8
2
RN24
RN24
4
8P4R-47R0402
8P4R-47R0402
6
8
2
RN26
RN26
4
8P4R-47R0402
8P4R-47R0402
6
8
VTT_DDR
VCC_DDR
C180
C180
X_C10u10Y0805
X_C10u10Y0805
C146
C146
X_C10u10Y0805
X_C10u10Y0805
C112
C112
C10u10Y0805
C10u10Y0805
A A
公板上
兩根再
8
VCC_DDR VCC_DDR
C204
C204
X_C0.1u16Y0402
X_C0.1u16Y0402
C224
C224
C0.1u16Y0402
C0.1u16Y0402
C137
C137
C0.1u16Y0402
C0.1u16Y0402
C177
C177
C0.1u16Y0402
C0.1u16Y0402
C205
C205
C0.1u16Y0402
C0.1u16Y0402
C226
C226
C1u6.3Y0402
C1u6.3Y0402
C225
C225
C1u6.3Y0402
C1u6.3Y0402
0.1u X5, 1uX3, 10uX3
X2
7
C121
C121
C0.1u16Y0402
C0.1u16Y0402
C182
C182
C0.1u16Y0402
C0.1u16Y0402
C242
C242
C0.1u16Y0402
C0.1u16Y0402
C105
C105
C1u6.3Y0402
C1u6.3Y0402
bottom
6
5
VCC_DDR VCC_DDR
C194
C194
X_C0.1u16Y0402
X_C0.1u16Y0402
C192
C192
C0.1u16Y0402
C0.1u16Y0402
C181
C181
C0.1u16Y0402
C0.1u16Y0402
C92
C92
C0.1u16Y0402
C0.1u16Y0402
C220
C220
C0.1u16Y0402
C0.1u16Y0402
C141
C141
C1u6.3Y0402
C1u6.3Y0402
C113
C113
C1u6.3Y0402
C1u6.3Y0402
4
C165
C165
C0.1u16Y0402
C0.1u16Y0402
C132
C132
C0.1u16Y0402
C0.1u16Y0402
C140
C140
C0.1u16Y0402
C0.1u16Y0402
C200
C200
C0.1u16Y0402
C0.1u16Y0402
C203
C203
C0.1u16Y0402
C0.1u16Y0402
C119
C119
C1u6.3Y0402
C1u6.3Y0402
bottom
MICRO-STAR INT'L CO.,LTD
MICRO-STAR INT'L CO.,LTD
MICRO-STAR INT'L CO.,LTD
MS-7534
MS-7534
MSI
MSI
MSI
Size Document Description Rev
Size Document Description Rev
Size Document Description Rev
B
B
B
Date:
Date:
3
Date:
DDR II VTT Termination & Decoupling
DDR II VTT Termination & Decoupling
DDR II VTT Termination & Decoupling
Friday, March 07, 2008
Friday, March 07, 2008
Friday, March 07, 2008
2
MS-7534
10 37
10 37
10 37
Sheet of
Sheet of
Sheet of
1
0A
0A
0A
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