MSI MS-7517 Schematics
1
Cover Sheet, Block diagram
Intel LGA775 CPU - Signals
Intel LGA775 CPU - Power
Intel LGA775 CPU- GND
Intel G31 - CPU
Intel G31 - Memory
Intel G31 - SDVO DMI
Intel G31 - GND
ICH7
Clock Generator ICS9LPR502
LPC I/O - SIO-W83627DHG
HD Audio ALC883/888 15
LAN -- Realtek RTL8111b
DIMM1
A A
DIMM 2 & DDR2 Termination
DVI&HDMI&LVDS
miniPCIE &mini PCI
USB Connectors &GAL850a
FAN&SATA&IDE
VRD11 Intersil 6326 3Phase
MAIN DC-DC POWER
PANEL
Manual Parts
DDR&GMCH POWER
GIPO/POWER/PWROK/RESET MAP
Revision History
1-2
10-12
13
14
16-17
18
19
20-24
25
26
27
28MS7 ACPI Controller
29
30
31
32
33
33-37
38
3
4
5
6
7
8
9
MS-7517 0A
CPU
Pentium D Presler (9 series)
Pentium 4 Cedar Mill (6 series) X 800 2MB V V V
Celeron D
Generation
Conroe(TBD series) V 2 x 4MB X V V
PD Extreme Edition V
P4 Extreme Edition X 1066 2MB V V V
Prescott (5 series) X 533/800 1MB V
Cedar Mill (TBD series) X TBD 512KB X V X
Prescott (3 series) X 533 256KB X X X
DUAL CORE EIST
V 800
V 800Smithfield (8 series) 2 x 1MB X V >=830
FSB
1066/800Core 2 Dual
800 2 x 1MB
Version 0A
L2 Cache
2 x 2MBVXVV
HT
EM64T
"1" in last
code
VT
V
V
V
V
V
X
X
"2" in last
code
X
X
X
X
System Chipset:
Intel Bearlake G31- GMCH (North Bridge)
Intel ICH7
On Board Chipset:
BIOS -- FWH 4Mb
AC97 AUDIO -- ALC888
LPC Super I/O -- W83627DHG
LAN -- Realtek RTL8111B
CLOCK -- ICS9LPR502
Main Memory:
2 CHANNEL DDR II * 1 (Max 4GB)
Expansion Slots:
miniPCIE x1
mini PCI SLOT * 1
Intersil PWM:
Controller:
1
VRD11 Intersil 6326 4Phase
MICRO-STAR INT'L CO.,LTD
MSI
Size Document Description Rev
Custom
COVER SHEET
Monday, January 07, 2008
MS-7404
Sheet ofDate:
136
0A
19--20V DC in
DC-DC
Power
Translator
1
Block Diagram
VRD 11
4-Phase PWM
Intel LGA775 Processor
FSB 533/800/1066
FSB
DDR2 /667/800
VGA
RGB
DVI-D
CH7307
SDVO to
S-Video
HDTV
For R.F.
or
DVB-T/Capture
A A
Mini PCI-E
Internal Header
Internal Header
/Card Reader
For FP KB/MS
Port 0--3 on back plate
S-Video
Mini
PCI-E x 1
SATA-II 1~2
USB Port 7
USB Port 6
USB Port 5
USB Port 4
USB Port 0-3
IDE
For DVD-ROM
LPT
Removable HDD
COM2
COM1
FAN
DC-IN
SDVO-C
SDVO-B
PCI_E x1
USB Port 7
SATA2
USB2.0
PATA
FAN
MS
KB
LPC
Flash ROM
USB1
USB0
Bearlake
-G31
DMI
ICH7
USB3
USB2
CL
LPC Bus
LPC
Debug Port
(Option)
HD Audio Link
PCI-E x 1
W83627DHG
VGA
2 DDR II
Tilt DIMM
Modules
DDRII
PCI
SIO
HM
PS2/KB Switch
PS2/MS
LIN-out
LIN-in
1
HD Audio Codec
ALC888
Touch
Pad
DVI
MIC
COM1
COM2
Gb
LAN
For POS
W/ +5V, +12V
selection
LAN1
Realtek
RTL8111B
S-Video
Slot 1
Mini PCI
CLR-CMOS
RESET
Right Angle
Slim SATA
Conn.
SATA Power Conn.
MICRO-STAR INT'L CO.,LTD
MSI
Size Document Description Rev
Custom
Date:
BLOCK DIAGRAM
Monday, January 07, 2008
MS-7517
236
Sheet of
0A
8
D D
H_DBI#[0..3]6
CPU_GTLREF2
CPU_GTLREF24
H_IERR#4
H_FERR#4,10
H_STPCLK#10
H_INIT#10
H_DBSY#6
H_DRDY#6
H_TRDY#6
THERMDA_CPU14
THERMDC_CPU14
TRMTRIP#4,10
H_PROCHOT#4
H_IGNNE#10
ICH_H_SMI#10
H_A20M#10
R8 51/4
CPU_GTLREF34
CPUPWRGD4,10
H_CPURST#4,6
H_D#[0..63]
H_ADS#6
H_LOCK#6
H_BNR#6
H_HIT#6
H_HITM#6
H_BPRI#6
H_DEFER#6
THERMDA_CPU
THERMDC_CPU
TRMTRIP#
H_PROCHOT#
H_IGNNE#
ICH_H_SMI#
H_A20M#
CPU_GTLREF3
CPU_BSEL013
CPU_BSEL113
CPU_BSEL213
CPUPWRGD
H_CPURST#
C C
VTT_OUT_LEFT H_TESTHI13
B B
H_D#[0..63]6
A A
H_DBI#0
H_DBI#1
H_DBI#2
H_DBI#3
H_IERR#
H_FERR#
H_STPCLK#
H_INIT#
H_DBSY#
H_DRDY#
H_TRDY#
H_ADS#
H_LOCK#
H_BNR#
H_HIT#
H_HITM#
H_BPRI#
H_DEFER#
H_TDI
H_TDO
H_TMS
H_TRST#
H_TCK
H_D#63
H_D#62
H_D#61
H_D#60
H_D#59
H_D#58
H_D#57
H_D#56
H_D#55
H_D#54
H_A#[3..35]6
A8
G11
D19
C20
F2
AB2
AB3
R3
M3
AD3
P3
H4
B2
C1
E3
D2
C3
C2
D4
E4
G8
G7
AD1
AF1
AC1
AG1
AE1
AL1
AK1
M2
AE8
AL2
N2
P2
K3
AH2
N5
AE6
C9
G10
D16
A20
Y1
V2
AA2
G29
H30
G30
N1
G23
B22
A22
A19
B19
B21
C21
B18
A17
B16
C18
7
L2
U1A
DBI0#
DBI1#
DBI2#
DBI3#
EDRDY#
IERR#
MCERR#
FERR#/PBE#
STPCLK#
BINIT#
INIT#
RSP#
DBSY#
DRDY#
TRDY#
ADS#
LOCK#
BNR#
HIT#
HITM#
BPRI#
DEFER#
TDI
TDO
TMS
TRST#
TCK
THERMDA
THERMDC
THERMTRIP#
GND/SKTOCC#
PROCHOT#
IGNNE#
SMI#
A20M#
TESTI_13
RSVD
RESERVED0
RESERVED1
RESERVED2
RESERVED3
RESERVED4
RESERVED5
BOOTSELECT
LL_ID0
LL_ID1
BSEL0
BSEL1
BSEL2
PWRGOOD
RESET#
D63#
D62#
D61#
D60#
D59#
D58#
D57#
D56#
D55#
D54#
B15
H_D#53
H_A#[3..35]
D53#
D52#
C14
C15
H_D#52
H_D#51
H_A#35
H_A#34
H_A#33
H_A#32
AJ6
AJ5
AH5
AH4
A35#
A34#
A33#
D51#
D50#
D49#
D48#
D47#
D46#
A14
D17
D20
G22
D22
E22
H_D#49
H_D#48
H_D#46
H_D#50
H_D#45
H_D#47
6
CPU SIGNAL BLOCK
H_A#23
H_A#26
H_A#31
H_A#30
H_A#22
H_A#29
H_A#28
H_A#25
H_A#27
H_A#20
H_A#21
H_A#24
AG5
AG4
AG6
AF4
AF5
AB4
AC5
AB5
AA5
AD6
AA4Y4Y6W6AB6W5V4V5U4U5T4U6T5R4M4L4M5P6L5
A32#
A31#
A30#
A29#
A28#
A27#
A26#
A25#
A24#
A23#
A22#
A21#
D45#
D44#
D43#
D42#
D41#
D40#
D39#
D38#
D37#
D36#
D35#
G21
F21
H_D#44
H_D#43
D34#
E21
F20
E19
E18
F18
F17
G17
G18
E16
H_D#42
H_D#33
H_D#36
H_D#34
H_D#40
H_D#38
H_D#41
H_D#37
H_D#35
H_D#39
5
VID6
VID7
VID4
AN4
AN5
AN6
VSS_SENSE
VSS_MB_REGULATION
VCC_MB_REGULATION
D11#
D10#
D9#
D8#
B10
A11
A10A7B7B6A5C6A4C5B4
H_D#11
H_D#10
H_D#8
H_D#9
VID5
AJ3
AK3
AM5
AL4
AK4
AM7
RSVD
VID6#
VID5#
VID4#
VID_SELECT
ITP_CLK1
ITP_CLK0
GTLREF_SEL
CS_GTLREF
D7#
D6#
D5#
D4#
D3#
D2#
D1#
H_D#7
H_D#4
H_D#6
H_D#3
H_D#5
H_D#1
H_D#2
H_A#6
H_A#8
H_A#5
H_A#3
H_A#7
H_A#4
H_A#9
H_A#10
H_A#14
H_A#13
H_A#19
H_A#12
H_A#18
H_A#16
H_A#17
H_A#11
H_A#15
AC2
A8#
A7#
A6#
A5#
D21#
D20#
D19#
D18#
E10D7E9F9F8G9D11
H_D#19
H_D#18
H_D#21
H_D#20
AN3
A4#
A3#
DBR#
VCC_SENSE
D17#
D16#
D15#
D14#
D13#
D12#
C12
B12D8C11
H_D#12
H_D#15
H_D#13
H_D#16
H_D#14
H_D#17
A20#
A19#
D33#
D32#
E15
G16
G15
H_D#31
H_D#32
A9#
A18#
A17#
A16#
A15#
A14#
A13#
A12#
A11#
A10#
D31#
D30#
D29#
D28#
D27#
D26#
D25#
D24#
D23#
D22#
F15
G14
F14
G13
E13
D13
F12
F11
D10
H_D#24
H_D#22
H_D#30
H_D#25
H_D#29
H_D#26
H_D#28
H_D#23
H_D#27
VID2
VID3
VID1
VID0
AL6
AM3
AL5
AM2
VID3#
VID2#
VID1#
VID0#
GTLREF0
GTLREF1
BPM5#
BPM4#
BPM3#
BPM2#
BPM1#
BPM0#
PCREQ#
REQ4#
REQ3#
REQ2#
REQ1#
REQ0#
TESTHI12
TESTHI11
TESTHI10
TESTHI9
TESTHI8
TESTHI7
TESTHI6
TESTHI5
TESTHI4
TESTHI3
TESTHI2
TESTHI1
TESTHI0
FORCEPH
RSVD
BCLK1#
BCLK0#
RS2#
RS1#
RS0#
AP1#
AP0#
BR0#
COMP5
COMP4
COMP3
COMP2
COMP1
COMP0
DP3#
DP2#
DP1#
DP0#
ADSTB1#
ADSTB0#
DSTBP3#
DSTBP2#
DSTBP1#
DSTBP0#
DSTBN3#
DSTBN2#
DSTBN1#
DSTBN0#
LINT1/NMI
LINT0/INTR
D0#
ZIF-SOCK775-15u
H_D#0
4
EC1
X_10U/10V/1206/X5R
VID[0..7] 27
VTT_OUT_RIGHT
AN7
CPU_GTLREF0
H1
CPU_GTLREF1
H2
GTLREF_SEL
H29
MCH_GTLREF_CPU
E24
H_BPM#5
AG3
H_BPM#4
AF2
H_BPM#3
AG2
H_BPM#2
AD2
H_BPM#1
AJ1
H_BPM#0
AJ2
G5
H_REQ#4
J6
H_REQ#3
K6
H_REQ#2
M6
H_REQ#1
J5
H_REQ#0
K4
H_TESTHI12
W2
H_TESTHI11
P1
H_TESTHI10
H5
H_TESTHI9
G4
H_TESTHI8
G3
F24
G24
G26
G27
G25
H_TESTHI2_7
F25
H_TESTHI1
W3
H_TESTHI0
F26
RSVD_AK6
AK6
RSVD_G6
G6
G28
F28
H_RS#2
A3
H_RS#1
F5
H_RS#0
B3
U3
U2
F3
H_COMP5
T2
H_COMP4
J2
H_COMP3
R1
H_COMP2
G2
H_COMP1
T1
H_COMP0
A13
J17
H16
H15
J16
H_ADSTB#1
AD5
H_ADSTB#0
R6
H_DSTBP#3
C17
H_DSTBP#2
G19
H_DSTBP#1
E12
H_DSTBP#0
B9
H_DSTBN#3
A16
H_DSTBN#2
G20
H_DSTBN#1
G12
H_DSTBN#0
C8
H_NMI
L1
H_INTR
K1
R1
1K/4
VCC_VRM_SENSE
VSS_VRM_SENSE
VRD_VIDSEL 27
H_REQ#[0..4]
RN3
8P4R-51R0402
1 2
3 4
5 6
7 8
R2 51/4
R3 51/4
R4 51/4
R5 51/4
R6 X_62/4
R7 X_62/4
H_RS#[0..2]
TP2
TP3
R9 49.9/4/1
R10 49.9/4/1
R11 49.9/4/1
R12 49.9/4/1
R13 49.9/4/1
R14 49.9/4/1
TP4
TP5
TP6
TP7
H_ADSTB#1 6
H_ADSTB#0 6
H_DSTBP#3 6
H_DSTBP#2 6
H_DSTBP#1 6
H_DSTBP#0 6
H_DSTBN#3 6
H_DSTBN#2 6
H_DSTBN#1 6
H_DSTBN#0 6
H_NMI 10
H_INTR 10
680/6/8P4R
VID6
1
VID4
3
VID5
5
VID0
7
VID7
1
VID2
3
VID1
5
VID3
7
CPU_GTLREF0 4
CPU_GTLREF1 4
MCH_GTLREF_CPU 6
PECI 14
H_REQ#[0..4] 6
VTT_OUT_LEFT
V_FSB_VTT
CK_H_CPU# 13
CK_H_CPU 13
H_RS#[0..2] 6
H_BR#0
3
VCC_VRM_SENSE 27
VSS_VRM_SENSE 27
RN1
2
4
6
8
2
4
6
8
RN2 680/6/8P4R
TP1
VTT_OUT_RIGHT 4,5
H_BR#0 4,6
VTT_OUT_LEFT 4,5
C3
X_0.1u/16V/Y/4
VTT_OUT_RIGHT
C1
0.1u/16V/Y/4
2
VTT_OUT_RIGHT 4,5
C2
0.1u/16V/Y/4
0 0 133 MHZ (533)
VTT_OUT_RIGHT
C4 0.1u/16V/Y/4
C5 0.1u/16V/Y/4
Prescott / Cedar Mill
LL_ID[1:0] = 00
GTLREF_SEL = 0
VTT_SEL = 1
BSEL
TABLE
02
10FSB FREQUENCY
267 MHZ (1067)000
01 200 MHZ (800)
1
RN4
8P4R-51R0402
1 2
3 4
5 6
7 8
RN5
8P4R-51R0402
1 2
3 4
5 6
7 8
R15 X_51/4
R16 51/4
R17 51/4
PLACE TERMINATION NEAR CPU
1
H_BPM#3
H_BPM#5
H_BPM#1
H_BPM#0
H_TMS
H_BPM#2
H_TDI
H_BPM#4
H_TDO
H_TRST#
H_TCK
MICRO-STAR INT'L CO.,LTD
MSI
Size Document Description Rev
Custom
8
7
6
5
4
3
Date:
2
Intel LGA775 - Signals
Monday, January 07, 2008
MS-7404
Sheet of
336
1
0A
8
VCCP
7
6
5
4
3
2
1
VCCP
D D
C C
VTT_OUT_RIGHT
B B
VTT_OUT_RIGHT
VTT_OUT_RIGHT3,5
VTT_OUT_LEFT3,5
A A
AF19
AF18
AF15
AF14
AF12
AF11
AE9
AE23
AE22
AE21
AE19
AE18
AE15
AE14
AE12
AE11
AD8
AD30
AD29
AD28
AD27
AD26
AD25
AD24
AD23
AC8
AC30
AC29
AC28
AC27
AC26
AC25
AC24
AC23
AB8
AA8
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCCP
R18
110/6/1
R22
200/6/1
R26
110/6/1
R31
210/6/1
VTT_OUT_RIGHT
VTT_OUT_LEFT
8
VCC
VCC
Y8
VCC
VCC
Y29
Y30
R20
10R0402
C9
0.1u/16V/Y/4
10R0402
C17
0.1u/16V/Y/4
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
W28
W29
W30W8Y23
Y24
Y25
Y26
Y27
Y28
CPU_GTLREF0
GTLREF VOLTAGE SHOULD BE
0.63*VTT = 0.756V
R28
CPU_GTLREF1
PLACE AT CPU END OF ROUTE
R33 130R1%0402
R34 62/4
R35 100R/4
R36 62/4
R37 62/4
PLACE AT ICH END OF ROUTE
V_FSB_VTT
R38 62/4
R39 62/4
VCC
VCC
VCC
VCC
VCC
VCC
W26
W27
C18
C220P50N0402
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
W23
W24
W25
CPU_GTLREF0 3
C10
C220P50N0402
7
VCC
VCC
VCC
VCC
U29
U30U8V8
H_CPURST#
CPUPWRGD
H_BR#0
H_IERR#
TRMTRIP#
H_FERR#
VCC
VCC
AF21
U1B
AH28
AH29
AH30
AH8
AH9
AJ11
AJ12
AJ14
AJ15
AJ18
AJ19
AJ21
AJ22
AJ25
AJ26
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
U26
U27
U28
VTT_OUT_RIGHT
T24
T25
T26
T27
T28
T29
T30T8U23
U24
U25
R19
110/6/1
R23
200/6/1
N30N8P8R8T23
R21
10R0402
C11
0.1u/16V/Y/4
N25
N26
N27
N28
N29
Reserved for Kentsfield (Q-core)
VTT_OUT_RIGHT
R27
110/6/1
R29
10R0402
R32
C19
200/6/1
0.1u/16V/Y/4
H_PROCHOT#
H_PROCHOT# 3
H_CPURST# 3,6
CPUPWRGD 3,10
H_BR#0 3,6
H_IERR# 3
TRMTRIP# 3,10
H_FERR# 3,10
6
AJ8
AJ9
AK11
AK12
AK14
AK15
AK18
AK19
AK21
AK22
AK25
AK26
AK8
AK9
AL11
AL12
AL14
AL15
AL18
AL19
AL21
AL22
AL25
AL26
AL29
AL30
AL8
AL9
AM11
AM12
AM14
AM15
AM18
AM19
AM21
AM22
AM25
AM26
AM29
AM30
AM8
AM9
AN11
AN12
AN14
AN15
AN18
AN19
AN21
AN22
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
H_VCCA
A23
VCCA
H_VSSA
B23
VSSA
H_VCCPLL
D23
VCCPLL
H_VCCA
C23
VCC-IOPLL
A25
VTT
A26
VTT
A27
VTT
A28
VTT
A29
VTT
A30
VTT
B25
VTT
B26
VTT
B27
VTT
B28
VTT
B29
VTT
B30
VTT
C25
VTT
C26
VTT
C27
VTT
C28
VTT
C29
VTT
C30
VTT
D25
VTT
D26
VTT
D27
VTT
D28
VTT
D29
VTT
D30
VTT
VTT_PWG
AM6
VTTPWRGD
VTT_OUT_RIGHT
VTT_OUT_LEFT
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
M26
M27
M28
M29
M30M8N23
N24
K26
K27
K28
K29
K30K8L8
M23
M24
M25
J26
J27
J28
J29
J30J8J9
K23
K24
K25
J14
J15
J18
J19
J20
J21
J22
J23
J24
J25
AN25
AN26
AN29
AN30
AN8
AN9
J10
J11
J12
J13
VTT_SEL
HS1
123
RSVD
HS2
HS3
HS4
4
VTT_OUT_RIGHT
AA1
VTT_OUT_LEFT
J1
F27
F29
ZIF-SOCK775-15u
PLACE COMPONENTS AS CLOSE AS POSSIBLE TO PROCESSOR SOCKET
CPU_GTLREF2 3
C12
C220P50N0402
CPU_GTLREF3 3
C20
C220P50N0402
TRACE WIDTH TO CAPS MUST BE SMALLER THAN 12MILS
V_FSB_VTT
L1
V_FSB_VTT
5
10U125m_0805-1
L2
10U125m_0805-1
V_1P5_CORE
L3 10U125m_0805-1
C22
10u/10V/8
4
C13
X_1u/16V/6
C14
10U/10V/1206
C23
1u
C15
10U/10V/1206
H_VCCPLL
C24
0.01u/25V/4
H_VCCA
H_VSSA
3
AH27
AH26
AH25
AH22
AH21
AH19
AH18
AH15
AH14
AH12
AH11
AG9
AG8
AG30
AG29
AG28
AG27
AG26
AG25
AG22
AG21
AG19
AG18
AG15
AG14
AG12
AG11
AF9
AF8
AF22
VCCA ------ 120mA
VCCIOPLL -- 100mA
V_FSB_VTT
VTT_SEL 26
VID_GD#26,27CPU_GTLREF1 3
VCC3 VCC5
V_FSB_VTT
C6 10u/10V/8
C7 10u/10V/8
C8 10u/10V/8
CAPS FOR FSB GENERIC
R25
1K/4
R30 1K/4
2N3904S
R24 680/6
Q1
VTT_OUT_RIGHT
VCC5_SB
VID_GD#
C21
0.1u/16V/Y/4
MICRO-STAR INT'L CO.,LTD
MSI
Size Document Description Rev
Custom
Date:
2
Intel LGA775 - Power
Monday, January 07, 2008
MS-7404
VTT_PWG SPEC :
High > 0.9V
Low < 0.3V
Trise < 150ns
VTT_PWG
C16
X_1u/16V/6
Sheet of
436
1
0A
8
D D
C C
B B
VTT_OUT_RIGHT3,4
7
TP8
TP9
TP10
R40
R41
51/4
R46
R45
49.9/4/1
49.9/4/1
H_COMP7
H_COMP6
Y3
AE3
AE4D1D14
U1C
RSVD
COMP6
COMP7
A12
VSS
A15
VSS
A18
VSS
A2
VSS
A21
VSS
A24
VSS
A6
VSS
A9
VSS
AA23
VSS
AA24
VSS
AA25
VSS
AA26
VSS
AA27
VSS
AA28
VSS
AA29
VSS
AA3
VSS
AA30
VSS
AA6
VSS
AA7
VSS
AB1
VSS
AB23
VSS
AB24
VSS
AB25
VSS
AB26
VSS
AB27
VSS
AB28
VSS
AB29
VSS
AB30
VSS
AB7
VSS
AC3
VSS
AC6
VSS
AC7
VSS
AD4
VSS
AD7
VSS
AE10
VSS
AE13
VSS
AE16
VSS
AE17
VSS
AE2
VSS
AE20
VSS
AE24
VSS
AE25
VSS
AE26
VSS
AE27
VSS
AE28
VSS
VSS
VSS
VSS
VSS
AE29
AE30
AE5
AE7
24.9/4/1
E23E5E6E7F23F6B13J3N4P5V1W1AC4Y7Y5Y2W7W4V7V6V30V3V29
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
IMPSEL#
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
AF10
AF13
AF16
AF17
AF20
AF23
AF24
AF25
AF26
AF27
6
R42
R43
X_51/4
51/4
V28
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
RSVD
RSVD
RSVD
RSVD
RSVD
MSID[1]
MSID[0]
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
AF28
AF29
AF3
VSS
AF30
AF6
AF7
AG10
AG13
AG16
AG17
AG20
AG23
AG24
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
AG7
AH1
AH10
AH13
AH16
AH17
AH20
AH23
AH24
V27
V26
V25
VSS
VSS
VSS
VSS
AH3
AH6
AH7
V24
V23U7U1T7T6T3R7R5R30
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
AJ10
AJ13
AJ16
AJ17
AJ20
5
R44
VTT_OUT_LEFT
4
2005 Mainstream/Value
2005 Performance
FMB platform 2
FMB platform 1
MSID1 0 0 0
MSID0 0 NC NC
VTT_OUT_LEFT 3,4
3
2006 65W FMB
platform 3
2
1
X_51/4
H17
H18
H19
H20
H21
H22
H23
H24
H25
H26
H27
R29
R28
R27
R26
R25
R24
R23R2P7P4P30
P29
P28
P27
P26
P25
P24
VSS
P23N7N6N3M7M1L7L6L30L3L29
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
AJ23
AJ24
AJ27
AJ28
AJ29
AJ30
AJ4
AJ7
AK10
AK13
AK16
AK17
AK2
AK20
AK23
VSS
AK24
AK27
AK28
AK29
AK30
AK5
AK7
AL10
AL13
L28
L27
L26
L25
L24
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
AL16
AL17
AL20
AL23
AL24
L23K7K5
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
AL27
AL28
AL3
VSS
AL7
AM1
AM10
AM13
AM16
AM17
AM20
AM23
AM24
H28H3H6H7H8H9J4J7K2
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
AM27
AM28
AM4
AN1
VSS
AN10
AN13
AN16
AN17
AN2
AN20
AN23
AN24
AN27
AN28B1B11
VSS
VSS
B14
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
ZIF-SOCK775-15u
H14
H13
H12
H11
H10
G1
F7
F4
F22
F19
F16
F13
F10
E8
E29
E28
E27
E26
E25
E20
E2
E17
E14
E11
D9
D6
D5
D3
D24
D21
D18
D15
D12
C7
C4
C24
C22
C19
C16
C13
C10
B8
B5
B24
B20
B17
VTT_OUT_LEFT
changed 0620
CPU_TP_G1
Demo SCH is 47ohm
TP11
1
CPU_GND_E29
R47
47R/4
A A
MICRO-STAR INT'L CO.,LTD
MSI
Size Document Description Rev
Custom
8
7
6
5
4
3
Date:
2
Intel LGA775 - GND
Monday, January 07, 2008
MS-7404
Sheet of
536
1
0A
V_FSB_VTT
P29
P27
P26
P24
P23
N29
N26
N24
N23
M29
M24
M23
L24
L23
K24
K23
J24
J23
H24
H23
G26
G24
G23
F26
F24
F23
E29
E27
E26
E23
D29
D28
D27
C30
C29
C27
B30
B29
B28
B27
A30
A28
R27
R26
R24
R23
AG19
VTT_41
VCC_40
AB22
VTT_42
VCC_41
AB20
VTT_43
VCC_42
AA25
VTT_44
VCC_43
AA23
AA21
VTT_45
VTT_46
VCC_44
VCC_45
AA19
AA13
MCH_GTLREF_CPU3
AG18
VCC_84
VCC_85
VCC_46
VCC_47
VCC_48
AA3
Y24
U2A
H_A#3
H_A#[3..35]3
H_ADSTB#03
H_ADSTB#13
H_REQ#[0..4]3
H_ADS#3
H_TRDY#3
H_DRDY#3
H_DEFER#3
H_HITM#3
H_HIT#3
H_LOCK#3
H_BR#03,4
H_BNR#3
H_BPRI#3
H_DBSY#3
H_RS#[0..2]3
CK_H_MCH13
CK_H_MCH#13
PWRGD8,11,26
H_CPURST#3,4
PLTRST#8,10,26
ICH_SYNC#11
R49
16.9/6/1
R48 0R0402
HXRCOMP
HXSCOMP
HXSCOMPB
HXSWING
MCH_GTLREF
V_FSB_VTT
J42
HA3#
H_A#4
L39
HA4#
H_A#5
J40
VTT_1
VTT_2
VTT_3
VTT_4
VTT_5
VTT_6
VTT_7
VTT_8
HA5#
H_A#6
L37
HA6#
H_A#7
L36
HA7#
H_A#8
K42
HA8#
H_A#9
N32
HA9#
H_A#10
N34
HA10#
H_A#11
M38
HA11#
H_A#12
N37
HA12#
H_A#13
M36
HA13#
H_A#14
R34
HA14#
H_A#15
N35
HA15#
H_A#16
N38
HA16#
H_A#17
U37
HA17#
H_A#18
N39
HA18#
H_A#19
R37
HA19#
H_A#20
P42
HA20#
H_A#21
R39
HA21#
H_A#22
V36
HA22#
H_A#23
R38
HA23#
H_A#24
U36
HA24#
H_A#25
U33
HA25#
H_A#26
R35
HA26#
H_A#27
V33
HA27#
H_A#28
V35
HA28#
H_A#29
Y34
HA29#
H_A#30
V42
HA30#
H_A#31
V38
HA31#
H_A#32
Y36
HA32#
H_A#33
Y38
HA33#
H_A#34
Y39
HA34#
H_A#35
AA37
HA35#
M34
HADSTB0#
U34
HADSTB1#
H_REQ#0
F40
HREQ0#
H_REQ#1
L35
HREQ1#
H_REQ#2
L38
HREQ2#
H_REQ#3
G43
HREQ3#
H_REQ#4
J37
HREQ4#
W40
HADS#
Y40
HTRDY#
W41
HDRDY#
T43
HDEFER#
Y43
HITM#
U42
HHIT#
V41
HLOCK#
AA42
HBREQ0#
W42
HBNR#
G39
HBPRI#
U40
HDBSY#
H_RS#0
U41
HRS0#
H_RS#1
AA41
HRS1#
H_RS#2
U39
HRS2#
R32
HCLKP
U32
HCLKN
AM17
PWROK
C31
HCPURST#
AM18
RSTIN#
J13
ICH_SYNC#
D23
HRCOMP
C25
HSCOMP
D25
HSCOMP#
B25
HSWING
D24
HDVREF
B24
HAVREF
V_1P25_CORE
V_FSB_VTT V_FSB_VTT V_FSB_VTT
R50 49.9/4/1
V_FSB_VTT
R55 49.9/4/1
HXSCOMP
C28
2.2p/50V/4
HXSCOMPB
C32
2.2p/50V/4
VTT_9
VTT_10
VTT_11
VTT_12
VTT_13
VTT_14
VTT_15
VTT_16
VTT_17
VTT_18
VTT_19
VTT_20
VTT_21
VTT_22
VTT_23
VTT_24
VTT_25
VTT_26
VTT_27
VTT_28
VTT_29
VTT_30
VTT_31
VTT_32
VTT_33
VTT_34
VTT_35
VTT_36
VTT_37
VTT_38
VTT_39
VTT_40
VCC_1
VCC_2
VCC_3
VCC_4
VCC_5
VCC_6
VCC_7
VCC_8
VCC_9
VCC_10
VCC_11
VCC_12
VCC_13
VCC_14
VCC_15
VCC_16
VCC_17
VCC_18
VCC_19
VCC_20
VCC_21
VCC_22
VCC_23
VCC_24
VCC_25
VCC_26
VCC_27
VCC_28
VCC_29
VCC_30
VCC_31
VCC_32
VCC_80
VCC_34
VCC_35
VCC_36
VCC_37
VCC_38
AJ12
AJ11
AJ10
AJ9
AJ8
AJ7
AJ6
AJ5
AJ4
AJ3
AJ2
AH4
AH2
AH1
AG13
AG12
AG11
AG10
AG9
AG8
AG7
AG6
AG5
AG4
AG3
AG2
AF13
AF12
AF11
AD24
AD22
AD20
AC25
AC23
AC21
AC19
AC13
VCC_39
AC6
AB24
HXSWING S/B 1/4*VTT +/- 2%
R51
300/4/1
R56
R53 49.9/4/1
100/4/1
C29
0.1u/16V/Y/4
HXSWING
V_1P25_CORE
AG17
AG15
AG14
AF26
AF25
AF24
AF22
AF20
AF18
AF17
AF15
AF14
AE27
AE26
AE25
AE23
AE21
AE19
VCC_86
VCC_87
VCC_88
VCC_89
VCC_90
VCC_91
VCC_93
VCC_94
VCC_95
VCC_96
VCC_97
VCC_98
VCC_99
VCC_100
VCC_101
VCC_102
VCC_103
VCC_104
VCC_49
VCC_50
VCC_51
VCC_52
VCC_53
VCC_54
VCC_55
VCC_56
VCC_57
VCC_58
VCC_59
VCC_60
VCC_61
VCC_62
VCC_63
VCC_64
VCC_65
Y22
Y20
Y13Y6V13
V12
V10V9U13
U10U9U6U3N12
GTLREF VOLTAGE SHOULD BE 0.63*VTT=0.756V
124 OHM OVER 210 RESISTORS
V_FSB_VTTV_FSB_VTT
VCC_66
N11N9N8N6N3L6J6J3J2G2F11F9D4
R52
124/6/1
R57
210/6/1
AE17
AD27
AD26
AD18
AD17
VCC_105
VCC_106
VCC_107
VCC_108
VCC_67
VCC_68
VCC_69
VCC_70
R54 51/4
C30
0.1u/16V/Y/4
AD15
AD14
AC27
AC26
AC17
VCC_109
VCC_110
VCC_111
VCC_112
VCC_113
VCC_71
VCC_72
VCC_73
VCC_74
VCC_75
C13C9P20
CRB use 51/4
MCH_GTLREF
C31
X_2200p/50V/4
AC15
AC14
AB27
AB26
AB18
AB17
AA27
AA26
H_D#0
R40
HD0
H_D#1
P41
HD1
H_D#2
R41
HD2
H_D#3
N40
VCC_116
VCC_117
VCC_78
VCC_79
Y11
AG25
VCC_118
VCC_119
VCC_120
VCC_81
VCC_82
VCC_83
AG21
AG20
HD3
VCC_121
VCC_122
HD4
HD5
HD6
HD7
HD8
HD9
HD10
HD11
HD12
HD13
HD14
HD15
HD16
HD17
HD18
HD19
HD20
HD21
HD22
HD23
HD24
HD25
HD26
HD27
HD28
HD29
HD30
HD31
HD32
HD33
HD34
HD35
HD36
HD37
HD38
HD39
HD40
HD41
HD42
HD43
HD44
HD45
HD46
HD47
HD48
HD49
HD50
HD51
HD52
HD53
HD54
HD55
HD56
HD57
HD58
HD59
HD60
HD61
HD62
HD63
HDINV#0
HDINV#1
HDINV#2
HDINV#3
HDSTBP0#
HDSTBN0#
HDSTBP1#
HDSTBN1#
HDSTBP2#
HDSTBN2#
HDSTBP3#
HDSTBN3#
INTEL-NR88BOBVBVA
H_D#4
R42
H_D#5
M39
H_D#6
N41
H_D#7
N42
H_D#8
L41
H_D#9
J39
H_D#10
L42
H_D#11
J41
H_D#12
K41
H_D#13
G40
H_D#14
F41
H_D#15
F42
H_D#16
C42
H_D#17
D41
H_D#18
F38
H_D#19
G37
H_D#20
E42
H_D#21
E39
H_D#22
E37
H_D#23
C39
H_D#24
B39
H_D#25
G33
H_D#26
A37
H_D#27
F33
H_D#28
E35
H_D#29
K32
H_D#30
H32
H_D#31
B34
H_D#32
J31
H_D#33
F32
H_D#34
M31
H_D#35
E31
H_D#36
K31
H_D#37
G31
H_D#38
K29
H_D#39
F31
H_D#40
J29
H_D#41
F29
H_D#42
L27
H_D#43
K27
H_D#44
H26
H_D#45
L26
H_D#46
J26
H_D#47
M26
H_D#48
C33
H_D#49
C35
H_D#50
E41
H_D#51
B41
H_D#52
D42
H_D#53
C40
H_D#54
D35
H_D#55
B40
H_D#56
C38
H_D#57
D37
H_D#58
B33
H_D#59
D33
H_D#60
C34
H_D#61
B35
H_D#62
A32
H_D#63
D32
H_DBI#0
M40
H_DBI#1
J33
H_DBI#2
G29
H_DBI#3
E33
L40
M43
G35
H33
G27
H27
B38
D38
H_DSTBP#0 3
H_DSTBN#0 3
H_DSTBP#1 3
H_DSTBN#1 3
H_DSTBP#2 3
H_DSTBN#2 3
H_DSTBP#3 3
H_DSTBN#3 3
VCC_114
VCC_115
VCC_76
VCC_77
V_FSB_VTT
C25
0.1u/16V/Y/4
H_D#[0..63] 3
H_DBI#[0..3] 3
V_FSB_VTT
C26
0.1u/16V/Y/4
C27
0.1u/16V/Y/4
MICRO-STAR INT'L CO.,LTD
MSI
Size Document Description Rev
Custom
Monday, January 07, 2008
Date:
MS-7404
Intel Bearlake CPU
636
Sheet of
0A
VCC_DDR
MAA_A[14..0]17,18
DQS_A[7..0]17
DQS_A#[7..0]17
Swap For layout
07/04/09
C34
SCS_A#017,18
SCS_A#117,18
ODT_A[1..0]17,18
SBS_A[2..0]17,18
CK_DDRA_P117
CK_DDRA_N117
CK_DDRA_P017
CK_DDRA_N017
CK_DDRA_P217
CK_DDRA_N217
R58 20/4/1
R59 20/4/1
R60 20/4/1
R62 20/4/1
0.1u/16V/Y/4
DQM_B[7..0]17
SCKE_B117,18
DATA_B[63..0]17
DATA_B20
DATA_B10
DATA_B12
DATA_B11
DATA_B2
DATA_B1
DATA_B9
DATA_B3
DATA_B6
DATA_B5
DATA_B4
DATA_B7
DATA_B8
DATA_B0
AN7
AN8
AW5
AW7
AN5
AN6
AN9
AU7
AT11
AU11
AP13
AR13
U2B
SCS_A#0
AW35
SCS_A#1
TP14
TP16
RAS_A#
RAS_A#17,18
CAS_A#
CAS_A#17,18
WE_A#
WE_A#17,18
MAA_A1
MAA_A2
MAA_A3
MAA_A4
MAA_A5
MAA_A6
MAA_A7
MAA_A8
MAA_A9
MAA_A10
MAA_A11
MAA_A12
MAA_A13
MAA_A14
ODT_A0
ODT_A1
TP18
SBS_A0
SBS_A1
SBS_A2
DQS_A0
DQS_A#0
DQS_A1
DQS_A#1
DQS_A2
DQS_A#2
DQS_A3
DQS_A#3
DQS_A4
DQS_A#4
DQS_A5
DQS_A#5
DQS_A6
DQS_A#6
DQS_A7
DQS_A#7
SCS_A0#
BA35
SCS_A1#
BA34
SCS_A2#
BB38
BB33
AY35
BB34
BA31
BB25
BA26
BA25
AY25
BA23
AY24
AY23
BB23
BA22
AY33
BB22
AW21
AY38
BA21
AY37
BA38
BB35
BA39
BA33
AW32
BB21
AT20
AU18
AR41
AR40
AL41
AL40
AG42
AG41
AC42
AC41
AU31
AR31
AP27
AN27
AV33
AW33
AP29
AP31
AM26
AM27
AT33
AU33
SRCOMP0
SRCOMP1
SRCOMP2
BB40 AM8
SRCOMP3
BA40
DATA_A[63..0]17
SDQ_B0
SDQ_B1
SDQ_B2
SCS_A3#
SRAS_A#
SCAS_A#
SWE_A#
SMA_A0
SMA_A1
SMA_A2
SMA_A3
SMA_A4
SMA_A5
SMA_A6
SMA_A7
SMA_A8
SMA_A9
SMA_A10
SMA_A11
SMA_A12
SMA_A13
SMA_A14
SODT_A0
SODT_A1
SODT_A2
SODT_A3
SBS_A0
SBS_A1
SBS_A2
AU4
SDQS_A0
AR3
SDQS_A0#
BB3
SDQS_A1
BA4
SDQS_A1#
BB9
SDQS_A2
BA9
SDQS_A2#
SDQS_A3
SDQS_A3#
SDQS_A4
SDQS_A4#
SDQS_A5
SDQS_A5#
SDQS_A6
SDQS_A6#
SDQS_A7
SDQS_A7#
SCLK_A0
SCLK_A0#
SCLK_A1
SCLK_A1#
SCLK_A2
SCLK_A2#
SCLK_A3
SCLK_A3#
SCLK_A4
SCLK_A4#
SCLK_A5
SCLK_A5#
AN2
SRCOMP0
AN3
SRCOMP1
SRCOMP2 SMRCOMPVOL
SRCOMP3
SDQ_A0
SDQ_A1
SDQ_A2
AR5
AR4
INTEL-NR88BOBVBVA
AV3
DATA_A1
DATA_A2
DATA_A0
AR11
SDQ_B3
SDQ_B4
SDQ_B5
SDQ_B6
SDQ_B7
SDQ_B8
SDQ_B9
SDQ_B10
SDQ_B11
SDQ_A3
SDQ_A4
SDQ_A5
SDQ_A6
SDQ_A7
SDQ_A8
SDQ_A9
SDQ_A10
SDQ_A11
AV2
AP3
AP2
AU1
AV4
AY2
AY3
BB5
AY6
AW2
DATA_A10
DATA_A11
DATA_A12
DATA_A3
DATA_A9
DATA_A8
DATA_A7
DATA_A6
DATA_A4
DATA_A5
DATA_B22
DATA_B14
DATA_B15
DATA_B17
DATA_B16
DATA_B18
DATA_B13
AU9
AV12
AU12
AU15
AV13
AU17
AT17
AU13
SDQ_B12
SDQ_B13
SDQ_B14
SDQ_B15
SDQ_B16
SDQ_B17
SDQ_B18
SDQ_B19
SDQ_B20
SDQ_A12
SDQ_A13
SDQ_A14
SDQ_A15
SDQ_A16
SDQ_A17
SDQ_A18
SDQ_A19
SDQ_A20
AW3
BA5
BB4
AY7
BC7
AW11
AY11
BB6
DATA_A14
DATA_A15
DATA_A13
DATA_A16
DATA_A19
DATA_A17
DATA_A18
DATA_A20
DATA_B30
DATA_B23
DATA_B21
DATA_B28
DATA_B26
DATA_B25
DATA_B24
DATA_B29
AM13
AV15
AW17
AV24
AT23
AT26
AP26
AU23
AW23
AR24
SDQ_B21
SDQ_B22
SDQ_B23
SDQ_B24
SDQ_B25
SDQ_B26
SDQ_B27
SDQ_B28
SDQ_B29
SDQ_B30
SDQ_A21
SDQ_A22
SDQ_A23
SDQ_A24
SDQ_A25
SDQ_A26
SDQ_A27
SDQ_A28
SDQ_A29
BA6
DATA_A21
SDQ_A30
BA10
BB10
AT18
AR18
AU21
AT21
AP17
AN17
AP20
DATA_A22
DATA_A23
DATA_A29
DATA_A27
DATA_A25
DATA_A24
DATA_A26
DATA_A28
DATA_A30
DATA_B27
DATA_B19
DATA_B40
DATA_B32
DATA_B39
DATA_B41
DATA_B36
DATA_B31
DATA_B38
DATA_B44
DATA_B42
DATA_B35
DATA_B34
DATA_B33
AN26
AW37
AV38
SDQ_B31
SDQ_B32
SDQ_B33
SDQ_A31
SDQ_A32
SDQ_A33
AV20
AV42
AU40
DATA_A32
DATA_A33
DATA_A31
DATA_B43
DATA_B37
AN36
AN37
AU35
AR35
AN35
AR37
AM35
AM38
AJ34
AL38
AR39
SDQ_B34
SDQ_B35
SDQ_B36
SDQ_B37
SDQ_B38
SDQ_B39
SDQ_B40
SDQ_B41
SDQ_B42
SDQ_B43
SDQ_A34
SDQ_A35
SDQ_A36
SDQ_A37
SDQ_A38
SDQ_A39
SDQ_A40
SDQ_A41
SDQ_A42
AP42
DATA_A34
SDQ_A43
AN39
AV40
AV41
AR42
AP41
AN41
AM39
AK42
AK41
AN40
DATA_A35
DATA_A37
DATA_A38
DATA_A36
DATA_A40
DATA_A43
DATA_A44
DATA_A42
DATA_A41
DATA_A39
SCKE_B017,18
DATA_B48
DATA_B46
DATA_B55
DATA_B52
DATA_B49
DATA_B57
DATA_B53
DATA_B58
DATA_B50
DATA_B45
DATA_B47
DATA_B51
DATA_B54
DATA_B56
AM34
AL37
AL32
AG38
AJ38
AF35
AF33
AJ37
AJ35
AG33
AF34
AD36
AC33
AA34
SDQ_B44
SDQ_B45
SDQ_B46
SDQ_B47
SDQ_B48
SDQ_B49
SDQ_B50
SDQ_B51
SDQ_B52
SDQ_B53
SDQ_B54
SDQ_B55
SDQ_B56
SDQ_B57
SDQ_A44
SDQ_A45
SDQ_A46
SDQ_A47
SDQ_A48
SDQ_A49
SDQ_A50
SDQ_A51
SDQ_A52
SDQ_A53
SDQ_A54
SDQ_A55
SDQ_A56
AN42
AL42
AL39
AJ40
DATA_A45
DATA_A46
DATA_A47
DATA_A48
SDQ_A57
AH43
AF39
AE40
AJ42
AJ41
AF41
AF42
AD40
AD43
AB41
DATA_A52
DATA_A55
DATA_A51
DATA_A49
DATA_A54
DATA_A50
DATA_A53
DATA_A56
DATA_A57
DATA_A58
SCKE_A017,18
SCKE_A117,18
DQM_A[7..0]17
TP13
TP12
DQM_B0
DQM_B1
DQM_B3
DQM_B4
DQM_B6
DQM_B2
DQM_B5
DQM_B7
SCKE_B1
SCKE_B0
DATA_B61
DATA_B63
DATA_B60
DATA_B62
DATA_B59
AA36
AD34
AF38
AC34
AA33
AY12
AW12
BB11
BA11
AR7
AW9
AW13
AP23
AU37
AM37
AG39
AD38
SDM_B0
SDM_B1
SDM_B2
SDM_B3
SDM_B4
SDM_B5
SDM_B6
SCKE_B0
SCKE_B1
SCKE_B2
SDQ_B58
SDQ_B59
SDQ_B60
SDQ_B61
SDQ_B62
SDQ_B63
SDQ_A58
SDQ_A59
SDQ_A60
SDQ_A61
SDQ_A62
SDQ_A63
SCKE_A0
SCKE_A1
SCKE_A2
AA40
AE42
AE41
AC39
AB42
BC20
AY20
AY21
BA19
DATA_A63
DATA_A62
DATA_A60
DATA_A59
DATA_A61
SCKE_A1
SCKE_A0
TP22
TP23
SDM_B7
SCKE_B3
SDQS_B0#
SDQS_B1#
SDQS_B2#
SDQS_B3#
SDQS_B4#
SDQS_B5#
SDQS_B6#
SDQS_B7#
SMRCOMPVOH
SDM_A0
SDM_A1
SDM_A2
SDM_A3
SDM_A4
SDM_A5
SDM_A6
SDM_A7
SCKE_A3
AR2
BA2
AY9
AN18
AU43
AM43
AG40
AC40
DQM_A1
DQM_A2
DQM_A0
DQM_A3
DQM_A4
DQM_A5
DQM_A6
DQM_A7
SCS_B0#
SCS_B1#
SCS_B2#
SCS_B3#
SRAS_B#
SCAS_B#
SWE_B#
SMA_B0
SMA_B1
SMA_B2
SMA_B3
SMA_B4
SMA_B5
SMA_B6
SMA_B7
SMA_B8
SMA_B9
SMA_B10
SMA_B11
SMA_B12
SMA_B13
SMA_B14
SODT_B0
SODT_B1
SODT_B2
SODT_B3
SBS_B0
SBS_B1
SBS_B2
SDQS_B0
SDQS_B1
SDQS_B2
SDQS_B3
SDQS_B4
SDQS_B5
SDQS_B6
SDQS_B7
SCLK_B0
SCLK_B0#
SCLK_B1
SCLK_B1#
SCLK_B2
SCLK_B2#
SCLK_B3
SCLK_B3#
SCLK_B4
SCLK_B4#
SCLK_B5
SCLK_B5#
SVREF
BB27
BB30
AY27
AY31
AW26
AW29
BA27
BB17
AY17
BA17
BC16
AW15
BA15
BB15
BA14
AY15
BB14
AW18
BB13
BA13
AY29
AY13
BA29
BA30
BB29
BB31
AY19
BA18
BC12
AV6
AU5
AR12
AP12
AP15
AR15
AT24
AU26
AW39
AU39
AL35
AL34
AG35
AG36
AC36
AC37
AV31
AW31
AU27
AT27
AV32
AT32
AU29
AR29
AV29
AW27
AN33
AP32
AM6
AM10
SCS_B#0
SCS_B#1
RAS_B#
CAS_B#
WE_B#
MAA_B0MAA_A0
MAA_B1
MAA_B2
MAA_B3
MAA_B4
MAA_B5
MAA_B6
MAA_B7
MAA_B8
MAA_B9
MAA_B10
MAA_B11
MAA_B12
MAA_B13
MAA_B14
ODT_B0
ODT_B1
SBS_B0
SBS_B1
SBS_B2
DQS_B0
DQS_B#0
DQS_B1
DQS_B#1
DQS_B2
DQS_B#2
DQS_B3
DQS_B#3
DQS_B4
DQS_B#4
DQS_B5
DQS_B#5
DQS_B6
DQS_B#6
DQS_B7
DQS_B#7
MCH_VREF_A
VCC_DDR
X_0.1u/16V/Y/4
SCS_B#0 17,18
SCS_B#1 17,18
TP17
RAS_B# 17,18
CAS_B# 17,18
WE_B# 17,18
TP19
TP21TP20
CK_DDRB_P1 17
CK_DDRB_N1 17
CK_DDRB_P0 17
CK_DDRB_N0 17
CK_DDRB_P2 17
CK_DDRB_N2 17
DDR_RCOMPVOL
DDR_RCOMPVOH
R65 1KR1%
C36
TP15
MAA_B[14..0] 17,18
ODT_B[1..0] 17,18
SBS_B[2..0] 17,18
Swap For layout
07/04/09
3.01K/4/1
R66
1KR1%
C33 0.1u/16V/Y/4
R61 1KR1%
R63
R64 1KR1%
C35 0.1u/16V/Y/4
MCH_VREF_A
PLACE 0.1UF CAP CLOSE TO MCH
DQS_B[7..0] 17
DQS_B#[7..0] 17
DDR_RCOMPVOH = 0.2 * VCC_DDR
VCC_DDR
DDR_RCOMPVOH = 0.8 * VCC_DDR
C37
0.1u/16V/Y/4
MICRO-STAR INT'L CO.,LTD
MSI
Size Document Description Rev
Custom
Date:
Intel Bearlake Memory
Monday, January 07, 2008
MS-7404
Sheet of
736
0A
V_1P25_CORE
ARDEN
changed 0613
EXP_SLP
High ATX/Normal
Low BTX/Lane reversal
V_1P25_CORE
V_1P25_CORE
V_1P25_CORE
V_1P5_CORE
VCCD_CRT
VCCDQ_CRT
L5 10U100m_0805
L9 10U100m_0805
SDVO_TVCLKIN20
SDVO_TVCLKIN#20
TP37
TP38
SDVOC_INT+19
SDVOC_INT-19
DMI_ITP_MRP_010
DMI_ITN_MRN_010
DMI_ITP_MRP_110
DMI_ITN_MRN_110
DMI_ITP_MRP_210
DMI_ITN_MRN_210
DMI_ITP_MRP_310
DMI_ITN_MRN_310
CK_PE_100M_MCH13
CK_PE_100M_MCH#13
SDVO_CTRL_DATA19,20
SDVO_CTRL_CLK19,20
R68 1KR1%
R69 X_1KR1%
R70 1KR1%
C84
X_0.22u/16V/6
SDVO_CTRL_DATA
SDVO_CTRL_CLK
H_BSL013
H_BSL113
H_BSL213
R71 0R0402
V_3P3_DAC_FILTERED
R74 0R0402
R76 0R0402
C77
0.1u/16V/Y/4
C79
0.1u/16V/Y/4
VCCA_MPLL
C85
X_10u/10V/8
VCCA_DPLLB
C101
X_10u/10V/8
DMI_ITP_MRP_0
DMI_ITN_MRN_0
DMI_ITP_MRP_1
DMI_ITN_MRN_1
DMI_ITP_MRP_2
DMI_ITN_MRN_2
DMI_ITP_MRP_3
DMI_ITN_MRN_3
CK_PE_100M_MCH
CK_PE_100M_MCH#
H_BSL0
H_BSL1
H_BSL2
EXP_SLR
EXP_EN
VCC_CL_PLL
VCCA_HPLLVCCA_HPLL
VCCA_MPLL
VCCA_DPLLA
VCCA_DPLLB
VCCA_GPLL
VCCD_CRT
VCCDQ_CRT
VCC3
C78
4.7u/10V/8
C80
22000p/25V/4
C86
0.1u/16V/Y/4
C102
0.1u/16V/Y/4
V_1P25_CORE
AL26
AL24
AL23
AL21
AL20
AL18
AL17
AL15
AK30
AK29
AK27
AJ31
AG31
AF31
AD32
AC32
AA32
AJ30
AJ29
AJ27
AG30
VCC_CL_13
VCC_CL_14
VCC_EXP_14
VCC_EXP_15
AE4
AE3
AE2
VCCA_DPLLA
C87
X_10u/10V/8
VCCA_HPLL
C103
X_10u/10V/8
AG29
VCC_CL_15
VCC_CL_16
VCC_CL_17
VCC_CL_18
VCC_CL_19
VCC_CL_20
VCC_CL_21
VCC_EXP_16
VCCSM_1
VCCSM_2
VCCSM_3
VCCSM_4
VCCSM_5
BC39
BC34
BC30
BC26
BC22
BC18
C88
0.1u/16V/Y/4
C104
0.1u/16V/Y/4
U2C
F15
EXP_RXP0
G15
EXP_RXN0
K15
EXP_RXP1
J15
F12
E12
J12
H12
J11
H11
E7
E5
C2
D2
G6
G5
M8
M9
M4
M5
M6
R9
R10
R4
R6
R7
W2
V1
Y8
Y9
AA7
AA6
AB3
AA4
B12
B13
G17
E17
G20
J20
J18
T1
G18
E18
J17
Y32
C23
A24
A22
C22
B15
C17
B16
A16
C21
B21
D16
B17
C76
0.1u/16V/Y/4
V_1P25_CORE
V_1P25_CORE V_1P25_CORE
V_1P25_CORE
EXP_RXN1
EXP_RXP2
EXP_RXN2
EXP_RXP3
EXP_RXN3
EXP_RXP4
EXP_RXN4
F7
EXP_RXP5
EXP_RXN5
EXP_RXP6
F6
EXP_RXN6
EXP_RXP7
EXP_RXN7
EXP_RXP8
EXP_RXN8
L9
EXP_RXP9
L8
EXP_RXN9
EXP_RXP10
EXP_RXN10
EXP_RXP11
L4
EXP_RXN11
EXP_RXP12
EXP_RXN12
EXP_RXP13
EXP_RXN13
T4
EXP_RXP14
EXP_RXN14
EXP_RXP15
EXP_RXN15
DMI_RXP0
DMI_RXN0
DMI_RXP1
DMI_RXN1
DMI_RXP2
DMI_RXN2
DMI_RXP3
DMI_RXN3
GCLKP
GCLKN
SDV0_CTRLDATA
SDVO_CTRLCLK
BSEL0
BSEL1
BSEL2
RESERVED
EXP_SLR
EXP_EN
VCC_CL_PLL
VCCA_HPLL
VCCA_MPLL
VCCA_DPLLA
VCCA_DPLLB
VCCA_EXPPLL
VCCA_DAC_17
VCCA_DAC_18
VCCA_EXP_19
VCCD_CRT_20
VCCDQ_CRT_21
VSS_1
VCC33
VCC_CL_1
VCC_CL_2
VCC_CL_3
VCC_CL_4
VCC_CL_5
VCC_CL_6
VCC_EXP_1
VCC_EXP_2
VCC_EXP_3
VCC_EXP_4
VCC_EXP_5
VCC_EXP_6
VCC_EXP_7
AD11
AD10
AD9
AD8
AD7
AD6
AD5
AD4
INTEL-NR88BOBVBVA
L6 10U100m_0805
L10 10U100m_0805
VCC_CL_7
VCC_CL_8
VCC_CL_9
VCC_CL_10
VCC_CL_11
VCC_CL_12
VCC_EXP_8
VCC_EXP_9
VCC_EXP_10
VCC_EXP_11
VCC_EXP_12
VCC_EXP_13
AD2
AD1
AC4
AC3
AC2
VCC_DDR
AG27
AG26
VCC_CL_22
VCC_CL_23
VCCSM_6
VCCSM_7
BC14
BB39
AF30
AF29
AF27
AD30
VCC_CL_24
VCC_CL_25
VCC_CL_26
VCC_CL_27
VCCSM_8
VCCSM_9
VCCSM_10
VCCSM_11
BB37
BB32
BB28
BB26
V_1P25_CORE
AD29
AC30
AC29
AL12
AL11
VCC_CL_28
VCC_CL_29
VCC_CL_30
VCC_CL_31
VCC_CL_32
VCCSM_12
VCCSM_13
VCCSM_14
VCCSM_15
VCCSM_16
BB24
BB20
BB18
BB16
BB12
L7 10U100m_0805
C99
Place close to GMCH
VCC_DDR
AL10
AL9
AL8
AL7
AL5
AL4
AL3
AL2
AK26
AK24
AK23
AK21
AK20
AK18
AK17
AK15
AK3
AK2
AK1
AJ13
AD31
AC31
AA31
Y31
AJ26
AJ24
AJ23
AJ21
AJ20
AJ18
AJ17
AJ15
AJ14
AA30
AA29
Y30
Y29
V30
V29
U29
U27
AL13
AK14
AL29
AL27
VCC_CL_33
VCC_CL_34
VCC_CL_35
VCC_CL_36
VCC_CL_37
VCC_CL_39
VCC_CL_40
VCC_CL_41
VCC_CL_42
VCC_CL_43
VCC_CL_44
VCC_CL_45
VCC_CL_46
VCC_CL_47
VCC_CL_48
VCC_CL_49
VCC_CL_50
VCC_CL_51
VCC_CL_52
VCC_CL_53
VCC_CL_54
VCC_CL_55
VCC_CL_56
VCC_CL_57
VCC_CL_58
VCC_CL_59
VCC_CL_60
VCC_CL_61
VCC_CL_62
VCC_CL_63
VCC_CL_64
VCC_CL_65
VCC_CL_66
VCC_CL_67
VCC_CL_68
VCC_CL_69
VCC_CL_70
VCC_CL_71
VCC_CL_72
VCC_CL_73
VCC_CL_74
VCC_CL_75
VCC_CL_76
VCC_CL_77
VCC_CL_78
VCC_CL_79
EXP_TXP10
EXP_TXN10
EXP_TXP11
EXP_TXN11
EXP_TXP12
EXP_TXN12
EXP_TXP13
EXP_TXN13
EXP_TXP14
EXP_TXN14
EXP_TXP15
EXP_TXN15
EXP_COMPO
EXP_COMPI
DDC_DATA
DREFCLKP
DREFCLKN
CL_PWROK
RESERVED
TEST0
TEST1
VCCSM_17
VCCSM_18
VCCSM_19
VCCSM_20
VCCSM_21
VCCSM_22 VCC_CL_38
VCC_SMCLK_5
VCC_SMCLK_4
VCC_SMCLK_3
VCC_SMCLK_2
VCC_SMCLK_1
RESERVED_2
RESERVED_4
RESERVED_5
RESERVED_6
RESERVED_7
RESERVED_8
RESERVED_9
RESERVED_10
RESERVED_3
RESERVED_11
RESERVED_12
RESERVED_13
RESERVED_14
RESERVED_15
RESERVED_16
RESERVED_17
RESERVED_18
RESERVED_19
RESERVED_20
RESERVED_21
RESERVED_22
AY32
AW24
AW20
AV26
AV18 AL6
C81
1u/16V/6
RESERVED_1
BA43
BB42
AY42
BA42
BB41
AN21
BB2
AW42
AN32
AM31
AG32
AF32
AM21
BB19
AL31
AJ32
AA10
C83 10u/10V/8
VCCA_GPLL
AA9
T6
T5
C90
0.1u/16V/Y/4
C94 0.1u/16V/Y/4
C95 0.1u/16V/Y/4
C96 0.1u/16V/Y/4
C97 0.1u/16V/Y/4
C98 0.1u/16V/Y/4
C100 0.1u/16V/Y/4
C105 0.1u/16V/Y/4
C106 0.1u/16V/Y/4
H18
V_CKDDR
L4 10U125m_0805-1 R86 5.1KR0402
R88 1/6/1
R89 1/6/1
R90 1/6/1
R91 1/6/1
C89
X_10u/10V/8
DMI_MTP_IRP_0C
DMI_MTN_IRN_0C
DMI_MTP_IRP_1C
DMI_MTN_IRN_1C
DMI_MTP_IRP_2C
DMI_MTN_IRN_2C
10u/10V/8
DMI_MTP_IRP_3C
DMI_MTN_IRN_3C
AA11
Y12
U30
T7
VCC_DDR
VCC3
U31
R29
R30
U12
U11
R12
L8 0.1U50m
RESERVED_23
R13
RESERVED_24
RESERVED_25
AP21
RESERVED_26
V31
F13
C91
10u/10V/8
RESERVED_28
RESERVED_27
BC43
BC1
A43
AA39
T8
T10
T9
V_1P25_CORE
V_3P3_DAC_FILTERED
DMI_MTP_IRP_0 10
DMI_MTN_IRN_0 10
DMI_MTP_IRP_1 10
DMI_MTN_IRN_1 10
DMI_MTP_IRP_2 10
DMI_MTN_IRN_2 10
DMI_MTP_IRP_3 10
DMI_MTN_IRN_3 10
TEST2
EXP_TXP0
EXP_TXN0
EXP_TXP1
EXP_TXN1
EXP_TXP2
EXP_TXN2
EXP_TXP3
EXP_TXN3
EXP_TXP4
EXP_TXN4
EXP_TXP5
EXP_TXN5
EXP_TXP6
EXP_TXN6
EXP_TXP7
EXP_TXN7
EXP_TXP8
EXP_TXN8
EXP_TXP9
EXP_TXN9
DMI_TXP0
DMI_TXN0
DMI_TXP1
DMI_TXN1
DMI_TXP2
DMI_TXN2
DMI_TXP3
DMI_TXN3
HSYNC
VSYNC
GREEN
BLUE
RED#
GREEN#
BLUE#
DDC_CLK
REFSET
CL_RST#
CL_VERF
CL_CLK
CL_DATA
ALLZTEST
XORTEST
RED
C92
0.1u/16V/Y/4
D11
D12
B11
A10
C10
D9
B9
B7
D7
D6
B5
B6
B3
B4
F2
E2
F4
G4
J4
K3
L2
K1
N2
M2
P3
N4
R2
P1
U2
T2
V3
U4
V7
V6
W4
Y4
AC8
AC9
Y2
AA2
AC11
AC12
C15
D15
B18
C19
B20
C18
D19
D20
L13
M13
C14
D13
A20
AM15
AA12
AM5
AD13
AD12
K20
F20
A14
SDVOB_RP
C59 0.1U1402
SDVOB_RN
C60 0.1U1402
SDVOB_GP
C57 0.1U1402
SDVOB_GN
C58 0.1U1402
SDVOB_BP
C55 0.1U1402
SDVOB_BN
C56 0.1U1402
SDVOB_CP
C53 0.1U1402
SDVOB_CN
C54 0.1U1402
SDVOC_RP
C51 0.1U1402
SDVOC_RN
C52 0.1U1402
SDVOC_GP
C49 0.1U1402
SDVOC_GN
C50 0.1U1402
SDVOC_BP
C46 0.1U1402
SDVOC_BN
C48 0.1U1402
SDVOC_CP
C44 0.1U1402
SDVOC_CN
C45 0.1U1402
Close to MCH
DMI_MTP_IRP_0C
DMI_MTN_IRN_0C
DMI_MTP_IRP_1C
DMI_MTN_IRN_1C
DMI_MTP_IRP_2C
DMI_MTN_IRN_2C
DMI_MTP_IRP_3C
DMI_MTN_IRN_3C
GRCOMP
HSYNC
VSYNC
VGA_RED
VGA_GREEN
VGA_BLUE
MCH_DDC_DATA
MCH_DDC_CLK
CK_96M_DREF
CK_96M_DREF#
DACREFSET
MCH_CLPWROK
CL_VREF_MCH
T2
T3
T4
R79 5.1KR0402
R80 X_5.1KR0402
R81 5.1KR0402
R82 X_5.1KR0402
R83 5.1KR0402
R85 X_5.1KR0402
R87 X_5.1KR0402
C93
0.01u/25V/4
MSI
R67 24.9/4/1
HSYNC 21
VSYNC 21
VGA_RED 21
VGA_GREEN 21
VGA_BLUE 21
MCH_DDC_DATA 21
MCH_DDC_CLK 21
CK_96M_DREF 13
CK_96M_DREF# 13
R72 1.3K/4/1
R73 0R0402
R75 1.65KR1%0402
R77
1KR1%
DMI_ITP_MRP_0
DMI_ITN_MRN_0
DMI_ITP_MRP_1
DMI_ITN_MRN_1
DMI_ITP_MRP_2
DMI_ITN_MRN_2
DMI_ITP_MRP_3
DMI_ITN_MRN_3
Size Document Description Rev
Custom
Monday, January 07, 2008
Date:
C38 2.2u/6.3V/6
C39 2.2u/6.3V/6
SDVOB_R+ 20
C40 2.2u/6.3V/6
SDVOB_R- 20
SDVOB_G+ 20
C41 2.2u/6.3V/6
SDVOB_G- 20
SDVOB_B+ 20
C42 2.2u/6.3V/6
SDVOB_B- 20
SDVOB_C+ 20
C43 2.2u/6.3V/6
SDVOB_C- 20
SDVOC_R+ 19
SDVOC_R- 19
SDVOC_G+ 19
SDVOC_G- 19
MCH MEMORY DECOUPLING
SDVOC_B+ 19
SDVOC_B- 19
SDVOC_C+ 19
SDVOC_C- 19
V_1P25_CORE
C47 0.1u/16V/Y/4
MCH CL DECOUPLING
V_1P25_CORE
C728
X_22U_0805
C729
22U_0805
C730
22U_0805
C731
10u/10V/8
C62
X_10u/10V/8
C63
10u/10V/8
C64
10u/10V/8
C65
X_10u/10V/8
C66
X_10u/10V/8
C67
V_1P25_CORE
PWRGD 6,11,26
PLTRST# 6,10,26
X_10u/10V/8
C68
X_10u/10V/8
C69
X_10u/10V/8
C70
10u/10V/8
C732 1u/16V/6
1 2
C733 1u/16V/6
1 2
C734 1u/16V/6
1 2
C735 1u/16V/6
1 2
C736 1u/16V/6
1 2
C737 X_1u/16V/6
1 2
C738 X_1u/16V/6
1 2
C739 X_1u/16V/6
1 2
MCH CORE DECOUPLING
V_1P25_CORE
R78
1.24K/4/1
CL_VREF_MCH
R84
487/4/1
CL_VREF_MCH = 0.349V (FOR NOW)
BSEL
2
0
0
0
0
1
0
0
0
1
1
0
TABLE
PSB FREQUENCY
266 MHz (1066)
133 MHZ (533)
200 MHZ (800)
MICRO-STAR INT'L CO.,LTD
MS-7404
Intel Bearlake SDVO,DMI
Sheet of
ADD
ADD
ADD
C82
0.01u/25V/4
0A
836
V_1P25_CORE
BC37
BC32
BC28
BC24
BC10
BC5
BB7
AY41
AY4
AW43
AW41
AW1
AV37
AV35
AV27
AV23
AV21
AV17
AV11
AV9
AV7
AU42
AU38
AU32
AU24
AU20
AU6
AU2
AT31
AT29
AT15
AT13
AT12
AR38
AR33
AR32
AR27
AR26
AR23
AR21
AR20
AR17
AR9
AR6
AP43
AP24
AP18
AP1
AN38
AN31
AN29
AN24
AN23
AN20
AN15
AN13
AN12
AN11
AN4
AM42
AM40
AM36
AM33
AM29
AM24
AM23
AM20
AM11
AM9
AM7
AM4
AM2
AM1
AL36
AL33
AK43
U2D
VSS_1
VSS_2
VSS_3
VSS_4
VSS_5
VSS_6
VSS_7
VSS_8
VSS_9
VSS_10
VSS_11
VSS_12
VSS_13
VSS_14
VSS_15
VSS_16
VSS_17
VSS_18
VSS_19
VSS_20
VSS_21
VSS_22
VSS_23
VSS_24
VSS_25
VSS_26
VSS_27
VSS_28
VSS_29
VSS_30
VSS_31
VSS_32
VSS_33
VSS_34
VSS_35
VSS_36
VSS_37
VSS_38
VSS_39
VSS_40
VSS_41
VSS_42
VSS_43
VSS_44
VSS_45
VSS_46
VSS_47
VSS_48
VSS_49
VSS_50
VSS_51
VSS_52
VSS_53
VSS_54
VSS_55
VSS_56
VSS_57
VSS_58
VSS_59
VSS_60
VSS_61
VSS_62
VSS_63
VSS_64
VSS_65
VSS_66
VSS_67
VSS_68
VSS_69
VSS_70
VSS_71
VSS_72
VSS_73
VSS_74
VSS_75
VSS_76
AA17
VCC_123
VSS_77
AJ39
AA15
VCC_124
VSS_78
AJ36
AA14
VCC_125
VSS_79
AJ33
Y27
VCC_126
VSS_80
AH42
Y26
VCC_127
VSS_81
AG37
Y18
VCC_128
VSS_82
AG34
Y17
AF43
Y15
VCC_129
VCC_130
VSS_83
VSS_84
AF37
Y14
VCC_131
VSS_85
AF36
W27
VCC_132
VSS_86
AF10
W26
VCC_133
VSS_87
AF9
W25
VCC_134
VSS_88
AF8
W23
VCC_135
VSS_89
AF7
W21
VCC_136
VSS_90
AF6
W19
VCC_137
VSS_91
M27
W18
VCC_138
VSS_92
M21
W17
VCC_139
VSS_93
M17
V27
VCC_140
VSS_94
M15
V26
VCC_141
VSS_95
M10M7M1
V25
VCC_142
VSS_96
V24
VCC_143
VSS_97
V23
VCC_144
VSS_98
L33
V22
VCC_145
VSS_99
L32
V21
V20
VCC_146
VSS_100
L31
L29
V19
V18
VCC_147
VCC_148
VSS_101
VSS_102
L21
L20
V17
V15
V14
VCC_149
VCC_150
VCC_151
VSS_103
VSS_104
VSS_105
L11L7L5L3K43
U26
U25
VCC_152
VCC_153
VSS_106
VSS_107
U24
VCC_154
VCC_155
VSS_108
VSS_109
K26
U23
U22
VCC_156
VCC_157
VSS_110
VSS_111
K21
K18
U21
U20
VCC_158
VCC_159
VSS_112
VSS_113
K13
K12K2J38
U19
U18
VCC_160
VSS_114
U17
U15
VCC_161
VCC_162
VSS_115
VSS_116
J35
J32
U14
R20
VCC_163
VCC_164
VSS_117
VSS_118
J27
J21J9J7J5H31
R18
R17
VCC_165
VCC_166
VSS_119
VSS_120
R15
R14
VCC_167
VCC_168
VSS_121
VSS_122
P15
P14
VCC_169
VCC_170
VCC_171
VSS_123
VSS_124
VSS_125
H29
H21
AG24
AG23
VCC_172
VSS_126
H20
H17
AG22
VCC_173
VCC_174
VSS_127
VSS_128
H15
H13
L17
RESERVED_29
VSS_129
VSS_130
VSS_131
G42
G38
M20
N17
N18
N15
RESERVED_30
RESERVED_31
RESERVED_32
RESERVED_33
VSS_132
VSS_133
VSS_134
VSS_135
G32
G21
G13
G12
T11
L15
L18
M18
F17
RESERVED_34
RESERVED_35
RESERVED_36
RESERVED_37
VSS_136
VSS_137
VSS_138
VSS_139
G11G9G7G1F37
T12
K17
N20
BC42
NC_1
RESERVED_38
VSS_140
VSS_141
VSS_142
VSS_143
F35
F27
F21
F18F3E43
BC2
BB43
NC_2
NC_3
VSS_144
VSS_145
BB1
B43
NC_4
NC_5
VSS_146
VSS_147
E32
E24
B42B2A42
NC_6
NC_7
VSS_148
VSS_149
E21
NC_8
NC_9
VSS_150
VSS_151
E20
E15
VSS_152
E13
E11E9E3
L12
M11
VCC
VSS_153
VSS_154
VSS
VSS_155
VSS_156
D40
D31
A3A5A41C1C43E1R21
VSS_293
VSS_292
VSS_291
VSS_290
VSS_157
VSS_158
VSS_159
VSS_160
VSS_161
D21
D17D3C26
W20
VSS_289
VSS_288
VSS_287
VSS_162
VSS_163
VSS_164
C11C6C5C4B37
W22
W24
VSS_286
VSS_285
VSS_165
VSS_166
B32
AA18
VSS_284
VSS_283
VSS_167
VSS_168
B31
AC18
AE18
VSS_282
VSS_281
VSS_169
VSS_170
B26
B23
AE20
AE22
VSS_280
VSS_171
B22
B19
AE24
AF19
VSS_279
VSS_278
VSS_172
VSS_173
B14
B10
AF21
AF23
VSS_277
VSS_276
VSS_174
VSS_175
A39
A34
AY40
BA1
VSS_275
VSS_274
VSS_176
VSS_177
A26
A18
BC3
BC41
VSS_273
VSS_272
VSS_178
VSS_179
A12A7AF5
M33
M35
VSS_271
VSS_270
VSS_180
VSS_181
AF3
M42N5N7
M37
VSS_269
VSS_268
VSS_182
VSS_183
AF2
AF1
VSS_267
VSS_266
VSS_184
VSS_185
AD42
AD39
N10
VSS_265
VSS_186
AD37
N13
VSS_264
VSS_263
N21
VSS_262
N27
VSS_261
N31
VSS_260
N33
VSS_259
N36
VSS_258
P2
VSS_257
P17
VSS_256
P18
VSS_255
P21
VSS_254
P30
VSS_253
P43
VSS_252
R3
VSS_251
R5
VSS_250
R8
VSS_249
R11
VSS_248
R31
VSS_247
R33
VSS_246
R36
VSS_245
T1
VSS_244
T42
VSS_243
U5
VSS_242
U7
VSS_241
U8
VSS_240
U35
VSS_239
U38
VSS_238
V2
VSS_237
V5
VSS_236
V8
VSS_235
V11
VSS_234
V32
VSS_233
V34
VSS_232
V37
VSS_231
V39
VSS_230
V43
VSS_229
W3
VSS_228
Y1
VSS_227
Y5
VSS_226
Y7
VSS_225
Y10
VSS_224
Y19
VSS_223
Y21
VSS_222
Y23
VSS_221
Y25
VSS_220
Y33
VSS_219
Y35
VSS_218
Y37
VSS_217
Y42
VSS_216
AA5
VSS_215
AA8
VSS_214
AA20
VSS_213
AA22
VSS_212
AA24
VSS_211
AA35
VSS_210
AA38
VSS_209
AB1
VSS_208
AB2
VSS_207
AB19
VSS_206
AB21
VSS_205
AB23
VSS_204
AB25
VSS_203
AB43
VSS_202
AC5
VSS_201
AC7
VSS_200
AC10
VSS_199
AC20
VSS_198
AC22
VSS_197
AC24
VSS_196
AC35
VSS_195
AC38
VSS_194
AD19
VSS_193
AD21
VSS_192
AD23
VSS_191
AD25
VSS_190
AD33
VSS_189
AD35
VSS_188
VSS_187
INTEL-NR88BOBVBVA
MICRO-STAR INT'L CO.,LTD
MSI
Size Document Description Rev
Custom
Monday, January 07, 2008
Date:
MS-7404
Intel Bearlake GND
936
Sheet of
0A
8
D D
C C
PCIRST_ICH7#23
PREQ#[0..5]23
PGNT#023
B B
Stuff if TEKOA not
present or for
Non-share SPI.
VCC3_SB
A A
8
RN6
7 8
5 6
3 4
1 2
8P4R-10KR0402
ICH_PCLK13
PGNT#0
7
AD0
AD[31..0]23
C_BE#[3..0]23
R107 33R/2
100p/50V/4C117
PREQ#0
PREQ#1
PREQ#2
PREQ#3
PREQ#4
PREQ#5
PIRQ#A23
PIRQ#B23
PIRQ#C23
PIRQ#D23
PIRQ#E23
PIRQ#F23
PIRQ#G23
PIRQ#H23
SERIRQ14
IDE_IRQ25
7
E18
AD1
C18
AD2
A16
AD3
F18
AD4
E16
AD5
A18
AD6
E17
AD7
A17
AD8
A15
AD9
C14
AD10
E14
AD11
D14
AD12
B12
AD13
C13
AD14
G15
AD15
G13
AD16
E12
AD17
C11
AD18
D11
AD19
A11
AD20
A10
AD21
F11
AD22
F10
AD23
E9
AD24
D9
AD25
B9
AD26
A8
AD27
A6
AD28
C7
AD29
B6
AD30
E6
AD31
D6
C_BE#0
B15
C_BE#1
C12
C_BE#2
D12
C_BE#3
C15
A12
DEVSEL#23
F16
FRAME#23
A7
IRDY#23
F14
TRDY#23
F15
STOP#23
E10
PAR23
E11
LOCK#23
B10
SERR#23
C9
PERR#23
B19
PCI_PME#23
A9
B18
D7
C16
C17
E13
A13
C8
E7
D16
D17
F13
A14
D8
A3
B4
C5
B5
G8
F7
F8
G7
AH21
AH16
P5
P2
P6
R2
P1
AD0
AD1
AD2
AD3
AD4
AD5
AD6
AD7
AD8
AD9
AD10
AD11
AD12
AD13
AD14
AD15
AD16
AD17
AD18
AD19
AD20
AD21
AD22
AD23
AD24
AD25
AD26
AD27
AD28
AD29
AD30
AD31
C/BE0#
C/BE1#
C/BE2#
C/BE3#
DEVSEL#
FRAME#
IRDY#
TRDY#
STOP#
PAR
PLOCK#
SERR#
PERR#
PME#
PCICLK
PCIRST#
REQ0#
REQ1#
REQ2#
REQ3#
GPIO22/REQ4#
GPIO1/REQ5#
GNT0#
GNT1#
GNT2#
GNT3#
GPIO48/GNT4#
GPIO17/GNT5#
PIRQA#
PIRQB#
PIRQC#
PIRQD#
GPIO2/PIRQE#
GPIO3/PIRQF#
GPIO4/PIRQG#
GPIO5/PIRQH#
SERIRQ
IDEIRQ
SPI_MOSI
SPI_MISO
SPI_CS#
SPI_CLK
SPI_ARB
VSS_0
VSS_1
VSS_2
A4
A23B1B8
6
VSS_3
VSS_4
VSS_5
VSS_6
VSS_7
B11
B14
B17
B20
6
PCI INTERFACE INTERRUPT
ICH 7
PART 1/3
SPI
VSS_8
VSS_9
VSS_10
VSS_11
VSS_12
VSS_13
VSS_14
VSS_15
VSS_16
B26
B28C2C6
D10
D13
D18
D21
D24E1E2E8E15F3F4F5F12
5
A20M#
CPUSLP#
FERR#
IGNNE#
INIT#
INIT3_3V#
INTR
SMI#
STPCLK#
RCIN#
A20GATE
VSS_30
VSS_31
VSS_32
G18
GPO49/CPUPWRGD
VSS_33
VSS_34
VSS_35
VSS_36
G21
G24
G25
G26H3H4
THRMTRIP#
PLTRST#
PERN_1
PERP_1
PETN_1
PETP_1
PERN_2
PERP_2
PETN_2
PETP_2
PERN_3
PERP_3
PETN_3
PETP_3
PERN_4
PERP_4
PETN_4
PETP_4
PERN_5
PERP_5
PETN_5
PETP_5
PERN_6
PERP_6
PETN_6
PETP_6
DMI_0RXN
DMI_0RXP
DMI_0TXN
DMI_0TXP
DMI_1RXN
DMI_1RXP
DMI_1TXN
DMI_1TXP
DMI_2RXN
DMI_2RXP
DMI_2TXN
DMI_2TXP
DMI_3RXN
DMI_3RXP
DMI_3TXN
DMI_3TXP
DMI_CLKN
DMI_CLKP
DMI_ZCOMP
DMI_IRCOMP
LAN_CLK
LAN_RSTSYNC
LAN_RXD0
LAN_RXD1
LAN_RXD2
LAN_TXD0
LAN_TXD1
LAN_TXD2
EE_DIN
EE_DOUT
EE_SHCLK
VSS_37
VSS_38
VSS_39
VSS_40
H5
EE_CS
CPULAN PCI EXPRESSDIRECT MEDIA
VSS_17
VSS_18
VSS_19
VSS_20
VSS_21
VSS_22
VSS_23
VSS_24
VSS_25
VSS_26
VSS_27
VSS_28
VSS_29
F27
F28G1G2G5G6G9G14
5
4
U3A
AH28
AG27
AG26
AG22
AF22
AG21
AF25
AH24
NMI
AF23
AH22
AG23
AE22
AF26
AG24
C26
F26
F25
PE_TXN1_C
E28
PE_TXP1_C
E27
H26
H25
HSO_N2_C HSO_N2
G28
HSO_P2_C HSO_P2
G27
K26
K25
J28
J27
M26
M25
L28
L27
P26
P25
N28
N27
T25
T24
R28
R27
DMI_MTN_IRN_0
V26
DMI_MTP_IRP_0
V25
DMI_ITN_MRN_0C
U28
DMI_ITP_MRP_0C
U27
DMI_MTN_IRN_1
Y26
DMI_MTP_IRP_1
Y25
DMI_ITN_MRN_1C
W28
DMI_ITP_MRP_1C
W27
DMI_MTN_IRN_2
AB26
DMI_MTP_IRP_2
AB25
DMI_ITN_MRN_2C
AA28
DMI_ITP_MRP_2C
AA27
DMI_MTN_IRN_3
AD25
DMI_MTP_IRP_3
AD24
DMI_ITN_MRN_3C
AC28
DMI_ITP_MRP_3C
AC27
AE28
AE27
C25
D25
V3
U3
U5
V4
T5
U7
V6
V7
W1
W3
Y2
Y1
ICH7R
4
KBRST#
R95 33R/2
C109 0.1u/16V/Y/4
C110 0.1u/16V/Y/4
C111 0.1u/16V/Y/4
C112 0.1u/16V/Y/4
T25
T26
T27
T28
R113 24.9/4/1
T13
H_FERR# 3,4
H_IGNNE# 3
H_INIT# 3
FWH_INIT# 14
H_INTR 3
H_NMI 3
H_STPCLK# 3
KBRST# 14
A20GATE 14
TRMTRIP# 3,4
CPUPWRGD 3,4
HSI_N2
HSI_P2
C115 0.1u/16V/Y/4
C116 0.1u/16V/Y/4
C118 0.1u/16V/Y/4
C119 0.1u/16V/Y/4
C120 0.1u/16V/Y/4
C121 0.1u/16V/Y/4
C122 0.1u/16V/Y/4
C123 0.1u/16V/Y/4
CK_PE_100M_ICH# 13
CK_PE_100M_ICH 13
V_DMI 12
EMI
3
20p/50V/4
PLTRST# 6,8,26
PCIE_ICH_RXN1 23
PCIE_ICH_RXP1 23
PCIE_ICH_TXN1 23
PCIE_ICH_TXP1 23
HSI_N2 16
HSI_P2 16
HSO_N2 16
HSO_P2 16
DMI_MTN_IRN_0 8
DMI_MTP_IRP_0 8
DMI_ITN_MRN_0 8
DMI_ITP_MRP_0 8
DMI_MTN_IRN_1 8
DMI_MTP_IRP_1 8
DMI_ITN_MRN_1 8
DMI_ITP_MRP_1 8
DMI_MTN_IRN_2 8
DMI_MTP_IRP_2 8
DMI_ITN_MRN_2 8
DMI_ITP_MRP_2 8
DMI_MTN_IRN_3 8
DMI_MTP_IRP_3 8
DMI_ITN_MRN_3 8
DMI_ITP_MRP_3 8
VCC3_SB
C125 X_0.1u/16V/Y/4
C126 X_0.1u/16V/Y/4
C127 X_0.1u/16V/Y/4
C128 X_0.1u/16V/Y/4
C129 X_0.1u/16V/Y/4
C130 X_0.1u/16V/Y/4
3
H_A20M# 3
20p/50V/4
C107
C108
ICH_H_SMI# 3
2
SERIRQ
R92 10K/4
KBRST#
R93 10K/4
A20GATE
R94 10K/4
R96 X_5.1KR0402
R97 X_5.1KR0402
R98 X_5.1KR0402
R99 X_5.1KR0402
R100 X_5.1KR0402
R101 X_5.1KR0402
R102 X_5.1KR0402
R103 X_5.1KR0402
R104 X_5.1KR0402
R105 X_5.1KR0402
R106 X_5.1KR0402
R108 X_5.1KR0402
R109 X_5.1KR0402
R110 X_5.1KR0402
R111 X_5.1KR0402
R112 X_5.1KR0402
DMI_MTN_IRN_0
DMI_MTP_IRP_0
DMI_MTN_IRN_1
DMI_MTP_IRP_1
DMI_MTN_IRN_2
DMI_MTP_IRP_2
DMI_MTN_IRN_3
DMI_MTP_IRP_3
DMI_ITN_MRN_0C
DMI_ITP_MRP_0C
DMI_ITN_MRN_1C
DMI_ITP_MRP_1C
DMI_ITN_MRN_2C
DMI_ITP_MRP_2C
DMI_ITN_MRN_3C
DMI_ITP_MRP_3C
MICRO-STAR INT'L CO.,LTD
MSI
Size Document Description Rev
Custom
Date:
2
ICH7 - PCI, DMI, CPU, IRQ
Monday, January 07, 2008
MS-7404
1
VCC3
Sheet of
1
10 36
0A
8
D D
C C
B B
A A
T24
AC_SDIN1
Changed 0607 arden
AC_RST#15
AC_SYNC15
AC_SDOUT15
AC_BITCLK15
AC_SDIN015
X_10P/4
OC#124
OC#224
VCC3_SB
PWRGD6,8,26
X_10K/4
R588
4.7K/4
8
C140
ARDEN
SB_PWRBTIN#14
C142
SMB_CLK13,14,17,23,26
SMB_DATA13,14,17,23,26
R127
SMB_CLK13,14,17,23,26
SMB_DATA13,14,17,23,26
LPC_AD[3..0]14
ICH_14M13
USB_48M13
LPC_DRQ#014
LPC_FRAME#14
RN11 33/4/8P4R
X_C10P50N2
C141
C0.1U16X0402
R884 1K/4
RSMRST#26
SLP_S4#26
C149
100p/50V/4
C139
LAN_WAKE#16,23
78
56
34
12
USB0-24
USB0+24
USB1-24
USB1+24
USB2-24
USB2+24
USB3-24
USB3+24
USB4-24
USB4+24
USB5-24
USB5+24
USB6-24
USB6+24
USB7-24
USB7+24
C0.1U16X0402
R123 20/4/1
R124 33R/2
R125 33R/2
VRM_GOOD13,26
FP_RST#26,29
SLP_S3#14,26
SLP_S4#
RI#14
THERM#14
ICH_SYNC#6
SPKR29
BATTLOW#
7
LPC_AD0
LPC_AD1
LPC_AD2
LPC_AD3
GPI23
ACSDOUT
ACSYNC
Changed 0607 arden
SMBCLK_ICH
SMBDATA_ICH
SMB_ALERT#
SM_LINK0
SM_LINK1
LINK_ALERT#
RSMRST#
LAN_RST#
SLP_S3#
R764 X_0R603
R765 0R603
INTRUDER#
LAN_WAKE#
RI#
THERM#
ICH_SYNC#
R135 2.2K/4
R136 2.2K/4
C150
100p/50V/4
7
6
AA6
LAD0
AB5
LAD1
AC4
LAD2
Y6
LAD3
AC3
LDRQ_0#
AA5
LDRQ_1#/GPI023
AB3
LFRAME#
ACBITCLK
U1
ACZ_BCLK
ACRST#
R5
ACZ_RST#
T2
ACZ_SDIN_0
AC_SDIN1
T3
ACZ_SDIN_1
T1
ACZ_SDIN_2
T4
ACZ_SDOUT
R6
ACZ_SYNC
F1
USBP_0N
F2
USBP_0P
G4
USBP_1N
G3
USBP_1P
H1
USBP_2N
H2
USBP_2P
J4
USBP_3N
J3
USBP_3P
K1
USBP_4N
K2
USBP_4P
L4
USBP_5N
L5
USBP_5P
M1
USBP_6N
M2
USBP_6P
N4
USBP_7N
N3
USBP_7P
D3
OC_0#
C4
OC_1#
D5
OC_2#
D4
OC_3#
E5
OC_4#
C3
GPIO29/OC_5#
A2
GPIO30/OC_6#
B3
GPIO31/OC_7#
USB_BIAS
D1
USBRBIAS
D2
USBRBIAS#
C22
SMBCLK
B22
SMBDATA
B23
GPIO11/SMBALERT#
B25
SMLINK_0
A25
SMLINK_1
A26
LINKALERT#
Y4
RSMRST#
C19
LAN_RST#
C23
PWRBTN#
AA4
PWROK
AD22
VRMPWRGD
A22
SYS_RESET#
B24
SLP_S3#
D23
SLP_S4#
F22
SLP_S5#
A27
SUS_STAT#
T22
C20
SUSCLK
Y5
INTRUDER#
F20
WAKE#
A28
RI#
AF20
THRM#
AH20
MCH_SYNC#
A19
SPKR
C21
BATLOW#/TP_0
AF24
DPRSTP#/TP_1
AH25
DPSLP#/TP_2
T14
F21
TP_3
AC1
CLK14
B2
CLK48
VSS_41
VSS_42
VSS_43
VSS_44
VSS_45
VSS_46
VSS_47
H24
H27
H28J1J2J5J24
VSS_48
J25
VCC3
U3B
ICH7R
Following are the GPIOs that need to be terminated properly if not used:
GPIO[39:36,23:21,19,7:0]: default as inputs and should be pulled up to Vcc3_3 if unused.
GPIO[31:29,15:8]: default as inputs and should be pulled up to VccSus3_3 if unused.
MISCPOWER MGNTSM BUSUSBAC-LINKLPC
VSS_49
VSS_50
VSS_51
VSS_52
VSS_53
VSS_54
J26
K24
K27
K28
L13
L15
6
ICH 7
PART 2/3
VSS_55
VSS_56
VSS_57
VSS_58
VSS_59
VSS_60
VSS_61
VSS_62
L24
L25
L26M3M4M5M12
M13
5
AF16
DDACK#
AE15
DDREQ
AF15
DIOR#
AH15
DIOW#
AG16
IORDY
AH17
DA0
AE17
DA1
AF17
DA2
AE16
DCS1#
AD16
DCS3#
AB15
DD_0
AE14
DD_1
AG13
DD_2
AF13
DD_3
AD14
DD_4
AC13
DD_5
AD12
DD_6
AC12
DD_7
AE12
SATA_0RXN
SATA_0RXP
SATA_0TXN
SATA_0TXP
SATA_1RXN
SATA_1RXP
SATA_1TXN
SATA_1TXP
SATA_2RXN
SATA_2RXP
SATA_2TXN
SATA_2TXP
SATA_3RXN
SATA_3RXP
SATA_3TXN
SATA_3TXP
SATA_CLKN
SATA_CLKP
SATARBIASN
SATARBIASP
SATALED#
GPIO21/SATA_0GP
GPIO19/SATA_1GP
GPIO36/SATA_2GP
GPIO37/SATA_3GP
BMBUSY#/GPIO0
GPIO16/DPRSLPVR
GPIO18/STPPCI#
GPIO20/STPCPU#
EL_RSVD/GPIO26
EL_STATE0/GPIO27
EL_STATE1/GPIO28
GPIO32/CLKRUN#
GPIO33/AZ_DOCK_EN#
GPIO34/AZ_DOCK_RST#
GPIO35/SATACLKREQ#
VCCRTC
INTVRMEN
RTCRST#
VSS_78
VSS_79
VSS_80
VSS_81
VSS_82
VSS_83
VSS_84
VSS_85
N16
N17
N18
N24
N25
N26
P3
DD_10
DD_11
DD_12
DD_13
DD_14
DD_15
GPIO6
GPIO7
GPIO8
GPIO9
GPIO10
GPIO12
GPIO13
GPIO14
GPIO15
GPIO24
GPIO25
GPIO38
GPIO39
RTCX1
RTCX2
DD_8
AF12
DD_9
AB13
AC14
AF14
AH13
AH14
AC15
AF3
AE3
AG2
AH2
AE5
AD5
AG4
AH4
AF7
AE7
AG6
AH6
AD9
AE9
AG8
AH8
AF1
AE1
AH10
AG10
AF18
AF19
AH18
AH19
AE19
AB18
AC21
AC18
E21
E20
A20
F19
E19
R4
E22
AC22
AC20
AF21
R3
D20
A21
B21
E23
AG18
AC19
U2
AD21
AD20
AE20
W5
W4
AA3
AB1
AB2
P-ATAS-ATA
GPIORTC
VSS_63
VSS_64
VSS_65
VSS_66
VSS_67
VSS_68
VSS_69
VSS_70
VSS_71
VSS_72
VSS_73
VSS_74
VSS_75
VSS_76
M28N1N2N5N6
VSS_77
N11
N12
N13
N14
N15
5
M14
M15
M16
M17
M24
M27
4
SATA_BIAS
SATA_BIAS
SATALED#
R130 1K/4
INTVRMEN
RTC_RST#
4
PD_DACK# 25
PD_DREQ 25
PD_IOR# 25
PD_IOW# 25
PD_IORDY 25
PD_A0 25
PD_A1 25
PD_A2 25
PD_CS#1 25
PD_CS#3 25
PDD0
PDD1
PDD2
PDD3
PDD4
PDD5
PDD6
PDD7
PDD8
PDD9
PDD10
PDD11
PDD12
PDD13
PDD14
PDD15
CK_ICHSATA# 13
CK_ICHSATA 13
R126 24.9/4/1
RN13
SIO_SMI#
ATADET0
DEFAULT_OSD
SIO_PME#
WLAN_PWRON
GPIO10
GPIO12
GPI13
GPI14
GPI15
GPI38
GPI39
R133 _330KR0402-1
RTCX1
RTCX2
PDD[0..15] 25
SATA_RX#0 25
SATA_RX0 25
SATA_TX#0 25
SATA_TX0 2 5
SATA_RX#1 25
SATA_RX1 25
SATA_TX#1 25
SATA_TX1 2 5
SATALED# 29
12
34
56
78
8P4R-10KR0402
ATADET0 14,25
SIO_PME# 14
WLAN_PWRON 23
R128 1K/4
MS_SEL 29
GP_FWH_WP# 14
3
VCC3
0.1U1402C146
VBAT
VBAT
GPIO25
Select ICH7 DMI Mode
High DC Mode
Low AC Mode
changed 0B 1207
arden
3
C131
C132
C133
C134
C135
C136
C137
C138
BATTERY
VBAT
D3
Z
R131 20K402
C144
1u/16V/6
RTCX1
RTCX2
C0.1U16X0402
C0.1U16X0402
C0.1U16X0402
C0.1U16X0402
C0.1U16X0402
C0.1U16X0402
C0.1U16X0402
C0.1U16X0402
Y
S-BAT54C_SOT23
X
2
RN7 8P4R-10KR0402
SM_LINK0
SM_LINK1
SMB_ALERT#
GPI15
RI#
LINK_ALERT#
FP_RST#
SIO_PME#
BATTLOW#
WLAN_PWRON
GPIO10
GPI13
GPIO12
GPI14
SIO_SMI#
DEFAULT_OSD
GPI38
GPI39
GPI23
THERM#
INTRUDER#
LPC_DRQ#0
AC_BITCLK
SATALED#
ICH_SYNC#
BAT1
BAT1_X1
7 8
5 6
3 4
1 2
RN8 8P4R-10KR0402
7 8
5 6
3 4
1 2
RN9 8P4R-10KR0402
7 8
5 6
3 4
1 2
RN10 8P4R-10KR0402
7 8
5 6
3 4
1 2
7 8
5 6
3 4
1 2
R115 10K/4
R116 4.7K/4
R117 1M/4
R118 10K/4
R119 20K/4/1
R120 10K/4
R121 1K/4
LAN_WAKE#
C143
0.1u/16V/Y/4
C145
1u/16V/6
R134
10M
VCC3_SB
VBAT_DZ
VCC3
VCC3
R129 1K/4
18p/50V/6C147
Y1
32.768KHZ12.5P_D
18p/50V/6C148
MICRO-STAR INT'L CO.,LTD
MSI
Size Document Description Rev
Custom
Date:
2
MS-7404
ICH7 - LPC, ATA, USB, GPIO
Monday, January 07, 2008
1
VCC3_SB
RN12
8P4R-10KR0402
R122 4.7K/4
RTC_RST#LAN_RST#
R132 100R/4
SW_CMOS1
3
3
2
2
14
1 4
SW_DTSA
SW_PBUT1
Sheet of
1
VCC3
VCC3
VBAT
VCC3
VCC3
VCC3
VCC3_SB
11 36
0A
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