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5
4
3
2
1
MSI
MS-7508Ver:0A
D D
C C
B B
CPU:
AMD AM2 and AM2R2
System Chipset:
NVDIA MCP78U/S
On Board Chipset:
Winbond Super I/O -- FINTEK71882
LAN -- RTL8211BL
HD Codec --ALC888
JIMCRO 1394
BIOS -- SPI ROM
Main Memory:
DDR 2*4(Max4GB)
Expansion Slots:
PCI 2.3 Slot *2
PWM:
ST6740+ST6741
Title Page
Cover Sheet 1
Block Diagram
AMD M2 940
System Memory
DDR2 Terminations
MCP78
SIO-FINTECK 71882
AUDIO-ALC888
REALTECK 8211BL
PCLE X16 X1 SLOT
PCI SLOT 1-2
JIMCRO 1394
USB connectors
PWM - ISL6566CR
ACPI
CHIPSET CORE AND VCC_DDR
IDE/SATA/FAN
ATX Connector / Front Panel / KB / CON
VGA Connector
DVI AND HDMI
MANUAL PARTS
Reverse
History
POWER SEQUENCE
POWER MAP
POWER OK MAP
RESET MAP
GPIO/PCI Config.
2
3,4,5
6
7
8
8-14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
8
A A
MSIK
MSIK
MSIK
Title
Title
NOTE:
all the 0ohm resistor default not stuff ,change footprint as R0402_6 or R0603_10 ,for costdown request
5
4
3
2
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
MS-7508 0A
MS-7508 0A
MS-7508 0A
Custom
Custom
Custom
Date: Sheet
Date: Sheet
Date: Sheet
1
of
of
of
135Tuesday, October 16, 2007
135Tuesday, October 16, 2007
135Tuesday, October 16, 2007
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5
4
3
2
1
DMMI2
DMMI1
D D
DMMI4
DMMI3
AM2
HT3
C C
DVI/HDMI
VGA
PHY LAN RTL8211BL
MCP78
SPI 8M ROOM
ALC888
B B
4 USB
6 SATA
JMICRO381 1394
FINTECK 71882TPM PIN HEAD
PCIEX16
PCIEX1
PCI_SLOT1
PCI_SLOT2
IDE
JCOM1
A A
5
4
LPT
KB/MOUSE
SPI
MSIK
MSIK
MSIK
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
MS-7508 0A
MS-7508 0A
MS-7508 0A
Custom
Custom
Custom
Date: Sheet
Date: Sheet
3
2
Date: Sheet
235Tuesday, October 16, 2007
235Tuesday, October 16, 2007
235Tuesday, October 16, 2007
of
of
1
of
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5
4
3
2
1
HT_CADIN_H[15..0]9
HT_CADIN_L[15..0]9
HT_CADOUT_H[15..0]9
HT_CADOUT_L[15..0]9
D D
1.2V_HT
LDT_PWRGD9,22
LDT_STOP#9
LDT_RST#9
HT_CTLIN_H1
HT_CTLIN_L1
N6
P6
N3
N2
V4
V5
U1
V1
U6
V6
T4
T5
R6
T6
P4
P5
M4
M5
L6
M6
K4
K5
J6
K6
U3
U2
R1
T1
R3
R2
N1
P1
L1
M1
L3
L2
J1
K1
J3
J2
R10 51R1%0402R10 51R1%0402
R7 51R1%0402R7 51R1%0402
HT_CLKIN_H19
HT_CLKIN_L19
HT_CLKIN_H09
HT_CLKIN_L09
HT_CTLIN_H19
HT_CTLIN_L19
HT_CTLIN_H09
HT_CTLIN_L09
HT_CADIN_H15
HT_CADIN_L15
HT_CADIN_H14
C C
B B
A A
HT_CADIN_L14
HT_CADIN_H13
HT_CADIN_L13
HT_CADIN_H12
HT_CADIN_L12
HT_CADIN_H11
HT_CADIN_L11
HT_CADIN_H10
HT_CADIN_L10
HT_CADIN_H9
HT_CADIN_L9
HT_CADIN_H8
HT_CADIN_L8
HT_CADIN_H7
HT_CADIN_L7
HT_CADIN_H6
HT_CADIN_L6
HT_CADIN_H5
HT_CADIN_L5
HT_CADIN_H4
HT_CADIN_L4
HT_CADIN_H3
HT_CADIN_H2
HT_CADIN_L2
HT_CADIN_H1
HT_CADIN_L1
HT_CADIN_H0
HT_CADIN_L0
HT_CADIN_H[15..0]
HT_CADIN_L[15..0]
HT_CADOUT_H[15..0]
HT_CADOUT_L[15..0]
U1A
U1A
L0_CLKIN_H(1)
L0_CLKIN_L(1)
L0_CLKIN_H(0)
L0_CLKIN_L(0)
L0_CTLIN_H(1)
L0_CTLIN_L(1)
L0_CTLIN_H(0)
L0_CTLIN_L(0)
L0_CADIN_H(15)
L0_CADIN_L(15)
L0_CADIN_H(14)
L0_CADIN_L(14)
L0_CADIN_H(13)
L0_CADIN_L(13)
L0_CADIN_H(12)
L0_CADIN_L(12)
L0_CADIN_H(11)
L0_CADIN_L(11)
L0_CADIN_H(10)
L0_CADIN_L(10)
L0_CADIN_H(9)
L0_CADIN_L(9)
L0_CADIN_H(8)
L0_CADIN_L(8)
L0_CADIN_H(7)
L0_CADIN_L(7)
L0_CADIN_H(6)
L0_CADIN_L(6)
L0_CADIN_H(5)
L0_CADIN_L(5)
L0_CADIN_H(4)
L0_CADIN_L(4)
L0_CADIN_H(3)
L0_CADIN_L(3)
L0_CADIN_H(2)
L0_CADIN_L(2)
L0_CADIN_H(1)
L0_CADIN_L(1)
L0_CADIN_H(0)
L0_CADIN_L(0)
ZIF-SOCK940-RH-1
ZIF-SOCK940-RH-1
1
LDT_PWRGD
3
LDT_STOP#
5
LDT_RST#
7
L0_CLKOUT_H(1)
L0_CLKOUT_L(1)
L0_CLKOUT_H(0)
L0_CLKOUT_L(0)
L0_CTLOUT_H(1)
L0_CTLOUT_L(1)
L0_CTLOUT_H(0)
L0_CTLOUT_L(0)
L0_CADOUT_H(15)
L0_CADOUT_L(15)
L0_CADOUT_H(14)
L0_CADOUT_L(14)
L0_CADOUT_H(13)
L0_CADOUT_L(13)
L0_CADOUT_H(12)
L0_CADOUT_L(12)
L0_CADOUT_H(11)
L0_CADOUT_L(11)
L0_CADOUT_H(10)
L0_CADOUT_L(10)
L0_CADOUT_H(9)
L0_CADOUT_L(9)
L0_CADOUT_H(8)
L0_CADOUT_L(8)
L0_CADOUT_H(7)
L0_CADOUT_L(7)
L0_CADOUT_H(6)
L0_CADOUT_L(6)
L0_CADOUT_H(5)
L0_CADOUT_L(5)
L0_CADOUT_H(4)
L0_CADOUT_L(4)
L0_CADOUT_H(3)
L0_CADOUT_L(3)
L0_CADOUT_H(2)
L0_CADOUT_L(2)
L0_CADOUT_H(1)
L0_CADOUT_L(1)
L0_CADOUT_H(0)
L0_CADOUT_L(0)
VCC_DDR
RN1
RN1
2
4
6
8
8P4R-300R-RH
8P4R-300R-RH
AD5
AD4
AD1
AC1
Y6
W6
W2
W3
Y5
Y4
AB6
AA6
AB5
AB4
AD6
AC6
AF6
AE6
AF5
AF4
AH6
AG6
AH5
AH4
Y1
W1
AA2
AA3
AB1
AA1
AC2
AC3
AE2
AE3
AF1
AE1
AG2
AG3
AH1
AG1
HT_CLKOUT_H1 9
HT_CLKOUT_L1 9
HT_CLKOUT_H0 9
HT_CLKOUT_L0 9
HT_CTLOUT_H1 9
HT_CTLOUT_L1 9
HT_CTLOUT_H0 9
HT_CTLOUT_L0 9
HT_CADOUT_H15
HT_CADOUT_L15
HT_CADOUT_H14
HT_CADOUT_L14
HT_CADOUT_H13
HT_CADOUT_L13
HT_CADOUT_H12
HT_CADOUT_L12
HT_CADOUT_H11
HT_CADOUT_L11
HT_CADOUT_H10
HT_CADOUT_L10
HT_CADOUT_H9
HT_CADOUT_L9
HT_CADOUT_H8
HT_CADOUT_L8
HT_CADOUT_H7
HT_CADOUT_L7
HT_CADOUT_H6
HT_CADOUT_L6
HT_CADOUT_H5
HT_CADOUT_L5
HT_CADOUT_H4
HT_CADOUT_L4
HT_CADOUT_H3
HT_CADOUT_L3HT_CADIN_L3
HT_CADOUT_H2
HT_CADOUT_L2
HT_CADOUT_H1
HT_CADOUT_L1
HT_CADOUT_H0
HT_CADOUT_L0
VDDA25
C2
C2
C1
C0.22u16X
C0.22u16X
C4.7u10Y0805C1C4.7u10Y0805
place the component near the cpu no far 500mil
CPU_CLK9
CPU_CLK#9
VCC_DDR
THERM_SIC15
THERM_SID15
VCC_DDR
VCC5
U2
U2
C25
C25
C10u10Y0805
C10u10Y0805
VIN3VOUT
C26
C26
C1u16Y
C1u16Y
C16 C3900p16X0402-RHC16 C3900p16X0402-RH
C19
C19
C3900p16X0402-RH
C3900p16X0402-RH
R8
R489
R489
X_C220p25N0402
X_C220p25N0402
THERM_SIC
THERM_SID
1KR0402R81KR0402
390R0402
390R0402
R11
R11
39.2R1%0402
39.2R1%0402
CPU_STRAP_HI_E11
CPU_STRAP_LO_F11
R14
R14
39.2R1%0402
39.2R1%0402
2
ADJ
LT1087S_SOT89
LT1087S_SOT89
1
R1
R1
169R1%0402
169R1%0402
C17
C17
X_C220p25N0402
X_C220p25N0402
COREFB+22,27
COREFB-22
CPU_M_VREF
THERMDC_CPU15
THERMDA_CPU15
R25
R25
100R1%0402
100R1%0402
R26
R26
100R1%0402
100R1%0402
C20
C20
TP4TP4
TP6TP6
TP7TP7
TP8TP8
TP9TP9
TP11TP11
12
CPUCLKIN
CPUCLKIN#
R15 300R0402R15 300R0402
R16 300R0402R16 300R0402
TP13TP13
TP15TP15
TP17TP17
TP19TP19
TP20TP20
VDDA_25
+
+
EC1
EC1
CD100u16EL5-RH
CD100u16EL5-RH
C3
C3
C3300p16X0402
C3300p16X0402
LDT_STOP#
LDT_RST#
C18
C18
CPU_PRESENT_L
X_C220p25N0402
X_C220p25N0402
CPU_TDI
CPU_TRST_L
CPU_TCK
CPU_TMS
CPU_DBREQ_L
COREFB+
COREFBÂCPU_VTT_SENSE
CPU_TEST25_H
CPU_TEST25_L
C27
C27
C10u10Y0805
C10u10Y0805
U1D
U1D
C10
VDDA1
D10
VDDA2
A8
CLKIN_H
B8
CLKIN_L
C9
PWROK
D8
LDTSTOP_L
C7
RESET_L
AL3
CPU_PRESENT_L
AL6
SIC
AK6
SID
AL10
TDI
AJ10
TRST_L
AH10
TCK
AL9
TMS
A5
DBREQ_L
G2
VDD_FB_H
G1
VDD_FB_L
E12
VTT_SENSE
F12
M_VREF
AH11
M_ZN
AJ11
M_ZP
A10
TEST25_H
B10
TEST25_L
F10
TEST19
E9
TEST18
AJ7
TEST13
F6
TEST9
D6
TEST17
E7
TEST16
F8
TEST15
C5
TEST14
AH9
TEST12
E5
TEST7
AJ5
TEST6
AG9
TEST5
AG8
TEST4
AH7
TEST3
AJ6
TEST2
ZIF-SOCK940-RH-1
ZIF-SOCK940-RH-1
VID(5)
VID(4)
VID(3)
VID(2)
VID(1)
VID(0)
THERMTRIP_L
PROCHOT_L
TDO
DBRDY
VDDIO_FB_H
VDDIO_FB_L
PSI_L
HTREF1
HTREF0
TEST29_H
TEST29_L
TEST24
TEST23
TEST22
TEST21
TEST20
TEST28_H
TEST28_L
TEST27
TEST26
TEST10
TEST8
L1
L1
80L3A-100_0805
80L3A-100_0805
VID1
D2
D1
C1
E3
E2
E1
AK7
AL7
AK10
B6
AK11
AL11
F1
V8
V7
C11
D11
AK8
AH8
AJ9
AL8
AJ8
J10
H9
AK9
AK5
G7
D4
VCC_DDR
VDDA25VDDA_25
R239 X_300R0402R239 X_300R0402
VID5LDT_PWRGD
VID4
VID3
VID2
VID1
VID0
CPU_THRIP#
CPU_PROCHOT#
CPU_TDO
CPU_DBRDY
CPU_VDDIOFB_H
CPU_VDDIOFB_L
CPU_PSI_L
HTREF1
HTREF0
TEST29_H
TEST29_L
TP27TP27
R19 300R0402R19 300R0402
R22
R22
15R1%
15R1%
R24
R24
15R1%
15R1%
C23
C23
C0.1U16X0402
C0.1U16X0402
TP5TP5
TP10TP10
R17
R17
80.6R1%
80.6R1%
VCC_DDR
VCC_DDR
place near the VRM part
R3
1KR0402R31KR0402
VCC_DDR
TP32TP32
TP12TP12
C21
C21
X_C1000p10X0402
X_C1000p10X0402
TP14TP14
TP16TP16
TP18TP18
TP21TP21
CPU_M_VREF
C24
C24
X_C1000p16X0402
X_C1000p16X0402
R4
1KR0402R41KR0402
R18
R18
300R0402
300R0402
CPU_PRESENT_L
CPU_TEST25_H
CPU_TEST25_L
VID5 22
VID4 27
VID3 27
VID2 27
VID1 5,27
VID0 27
CPU_THRIP# 9
CPU_PROCHOT# 9
R12 44.2R1%0402-RHR12 44.2R1%0402-RH
R13 44.2R1%0402-RHR13 44.2R1%0402-RH
C22
C22
X_C1000p10X0402
X_C1000p10X0402
R20 1KR0402R20 1KR0402
R21 510R0402R21 510R0402
R23 510R0402R23 510R0402
1.2V_HT
VCC_DDR
MSIK
MSIK
MSIK
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
MS-7508 0A
MS-7508 0A
MS-7508 0A
Custom
Custom
Custom
Date: Sheet
Date: Sheet of
5
4
3
2
Date: Sheet of
1
of
335Tuesday, October 16, 2007
335Tuesday, October 16, 2007
335Tuesday, October 16, 2007
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5
4
3
2
1
MEM_MA_DQS_L[7..0]6,7
MEM_MA_DQS_H[7..0]6,7
MEM_MA_DM[7..0]6,7
D D
U1B
U1B
MEM_MA0_CLK_H26,8
MEM_MA0_CLK_L26,8
MEM_MA0_CLK_H16,8
MEM_MA0_CLK_L16,8
MEM_MA0_CLK_H06,8
MEM_MA0_CLK_L06,8
MEM_MA0_CS_L16,8
MEM_MA0_CS_L06,8
MEM_MA0_ODT06,8
MEM_MA1_CLK_H27,8
MEM_MA1_CLK_L27,8
MEM_MA1_CLK_H17,8
MEM_MA1_CLK_L17,8
MEM_MA1_CLK_H07,8
MEM_MA1_CLK_L07,8
MEM_MA1_CS_L17,8
MEM_MA1_CS_L07,8
MEM_MA1_ODT07,8
C C
MEM_MA_CAS_L6,7,8
MEM_MA_WE_L6,7,8
MEM_MA_RAS_L6,7,8
MEM_MA_BANK26,7,8
MEM_MA_BANK16,7,8
MEM_MA_BANK06,7,8
MEM_MA_CKE17,8
MEM_MA_CKE06,8
MEM_MA_ADD[15..0]6,7,8
B B
MEM_MA0_CLK_H2
MEM_MA0_CLK_L2
MEM_MA0_CLK_H1
MEM_MA0_CLK_L1
MEM_MA0_CLK_H0
MEM_MA0_CLK_L0
MEM_MA0_CS_L1
MEM_MA0_CS_L0
MEM_MA0_ODT0
MEM_MA1_CLK_H2
MEM_MA1_CLK_L2
MEM_MA1_CLK_H1
MEM_MA1_CLK_L1
MEM_MA1_CLK_H0
MEM_MA1_CLK_L0
MEM_MA1_CS_L1
MEM_MA1_CS_L0
MEM_MA1_ODT0
MEM_MA_CAS_L
MEM_MA_WE_L
MEM_MA_RAS_L
MEM_MA_BANK2
MEM_MA_BANK1
MEM_MA_BANK0
MEM_MA_CKE1
MEM_MA_CKE0
MEM_MA_ADD15
MEM_MA_ADD14
MEM_MA_ADD13
MEM_MA_ADD12
MEM_MA_ADD11
MEM_MA_ADD10
MEM_MA_ADD9
MEM_MA_ADD8
MEM_MA_ADD7
MEM_MA_ADD6
MEM_MA_ADD5
MEM_MA_ADD4
MEM_MA_ADD3
MEM_MA_ADD2
MEM_MA_ADD1
MEM_MA_ADD0
MEM_MA_DQS_H7
MEM_MA_DQS_L7
MEM_MA_DQS_H6
MEM_MA_DQS_L6
MEM_MA_DQS_H5
MEM_MA_DQS_L5
MEM_MA_DQS_H4
MEM_MA_DQS_L4
MEM_MA_DQS_H3
MEM_MA_DQS_L3
MEM_MA_DQS_H2
MEM_MA_DQS_L2
MEM_MA_DQS_H1
MEM_MA_DQS_L1
MEM_MA_DQS_H0
MEM_MA_DQS_L0
MEM_MA_DM7
MEM_MA_DM6
MEM_MA_DM5
MEM_MA_DM4
MEM_MA_DM3
MEM_MA_DM2
MEM_MA_DM1
MEM_MA_DM0
AG21
AG20
AC25
AA24
AC28
AE20
AE19
W27
AD27
AA25
AC27
AB25
AB27
AA26
AA27
M25
M27
AC26
W24
AD15
AE15
AG18
AG19
AG24
AG25
AG27
AG28
G15
AF15
AF19
AJ25
AH29
G19
H19
U27
U26
G20
G21
V27
N25
Y27
L27
N24
N26
P25
Y25
N27
R24
P27
R25
R26
R27
T25
U25
T27
D29
C29
C25
D25
E19
F19
F15
B29
E24
E18
H15
MA0_CLK_H(2)
MA0_CLK_L(2)
MA0_CLK_H(1)
MA0_CLK_L(1)
MA0_CLK_H(0)
MA0_CLK_L(0)
MA0_CS_L(1)
MA0_CS_L(0)
MA0_ODT(0)
MA1_CLK_H(2)
MA1_CLK_L(2)
MA1_CLK_H(1)
MA1_CLK_L(1)
MA1_CLK_H(0)
MA1_CLK_L(0)
MA1_CS_L(1)
MA1_CS_L(0)
MA1_ODT(0)
MA_CAS_L
MA_WE_L
MA_RAS_L
MA_BANK(2)
MA_BANK(1)
MA_BANK(0)
MA_CKE(1)
MA_CKE(0)
MA_ADD(15)
MA_ADD(14)
MA_ADD(13)
MA_ADD(12)
MA_ADD(11)
MA_ADD(10)
MA_ADD(9)
MA_ADD(8)
MA_ADD(7)
MA_ADD(6)
MA_ADD(5)
MA_ADD(4)
MA_ADD(3)
MA_ADD(2)
MA_ADD(1)
MA_ADD(0)
MA_DQS_H(7)
MA_DQS_L(7)
MA_DQS_H(6)
MA_DQS_L(6)
MA_DQS_H(5)
MA_DQS_L(5)
MA_DQS_H(4)
MA_DQS_L(4)
MA_DQS_H(3)
MA_DQS_L(3)
MA_DQS_H(2)
MA_DQS_L(2)
MA_DQS_H(1)
MA_DQS_L(1)
MA_DQS_H(0)
MA_DQS_L(0)
MA_DM(7)
MA_DM(6)
MA_DM(5)
MA_DM(4)
MA_DM(3)
MA_DM(2)
MA_DM(1)
MA_DM(0)
ZIF-SOCK940-RH-1
ZIF-SOCK940-RH-1
MA_DATA(63)
MA_DATA(62)
MA_DATA(61)
MA_DATA(60)
MA_DATA(59)
MA_DATA(58)
MA_DATA(57)
MA_DATA(56)
MA_DATA(55)
MA_DATA(54)
MA_DATA(53)
MA_DATA(52)
MA_DATA(51)
MA_DATA(50)
MA_DATA(49)
MA_DATA(48)
MA_DATA(47)
MA_DATA(46)
MA_DATA(45)
MA_DATA(44)
MA_DATA(43)
MA_DATA(42)
MA_DATA(41)
MA_DATA(40)
MA_DATA(39)
MA_DATA(38)
MA_DATA(37)
MA_DATA(36)
MA_DATA(35)
MA_DATA(34)
MA_DATA(33)
MA_DATA(32)
MA_DATA(31)
MA_DATA(30)
MA_DATA(29)
MA_DATA(28)
MA_DATA(27)
MA_DATA(26)
MA_DATA(25)
MA_DATA(24)
MA_DATA(23)
MA_DATA(22)
MA_DATA(21)
MA_DATA(20)
MA_DATA(19)
MA_DATA(18)
MA_DATA(17)
MA_DATA(16)
MA_DATA(15)
MA_DATA(14)
MA_DATA(13)
MA_DATA(12)
MA_DATA(11)
MA_DATA(10)
MA_DATA(9)
MA_DATA(8)
MA_DATA(7)
MA_DATA(6)
MA_DATA(5)
MA_DATA(4)
MA_DATA(3)
MA_DATA(2)
MA_DATA(1)
MA_DATA(0)
MA_DQS_H(8)
MA_DQS_L(8)
MA_DM(8)
MA_CHECK(7)
MA_CHECK(6)
MA_CHECK(5)
MA_CHECK(4)
MA_CHECK(3)
MA_CHECK(2)
MA_CHECK(1)
MA_CHECK(0)
AE14
AG14
AG16
AD17
AD13
AE13
AG15
AE16
AG17
AE18
AD21
AG22
AE17
AF17
AF21
AE21
AF23
AE23
AJ26
AG26
AE22
AG23
AH25
AF25
AJ28
AJ29
AF29
AE26
AJ27
AH27
AG29
AF27
E29
E28
D27
C27
G26
F27
C28
E27
F25
E25
E23
D23
E26
C26
G23
F23
E22
E21
F17
G17
G22
F21
G18
E17
G16
E15
G13
H13
H17
E16
E14
G14
J28
J27
J25
K25
J26
G28
G27
L24
K27
H29
H27
MEM_MA_DATA63
MEM_MA_DATA62
MEM_MA_DATA61
MEM_MA_DATA60
MEM_MA_DATA59
MEM_MA_DATA58
MEM_MA_DATA57
MEM_MA_DATA56
MEM_MA_DATA55
MEM_MA_DATA54
MEM_MA_DATA53
MEM_MA_DATA52
MEM_MA_DATA51
MEM_MA_DATA50
MEM_MA_DATA49
MEM_MA_DATA48
MEM_MA_DATA47
MEM_MA_DATA46
MEM_MA_DATA45
MEM_MA_DATA44
MEM_MA_DATA43
MEM_MA_DATA42
MEM_MA_DATA41
MEM_MA_DATA40
MEM_MA_DATA39
MEM_MA_DATA38
MEM_MA_DATA37
MEM_MA_DATA36
MEM_MA_DATA35
MEM_MA_DATA34
MEM_MA_DATA33
MEM_MA_DATA32
MEM_MA_DATA31
MEM_MA_DATA30
MEM_MA_DATA29
MEM_MA_DATA28
MEM_MA_DATA27
MEM_MA_DATA26
MEM_MA_DATA25
MEM_MA_DATA24
MEM_MA_DATA23
MEM_MA_DATA22
MEM_MA_DATA21
MEM_MA_DATA20
MEM_MA_DATA19
MEM_MA_DATA18
MEM_MA_DATA17
MEM_MA_DATA16
MEM_MA_DATA15
MEM_MA_DATA14
MEM_MA_DATA13
MEM_MA_DATA12
MEM_MA_DATA11
MEM_MA_DATA10
MEM_MA_DATA9
MEM_MA_DATA8
MEM_MA_DATA7
MEM_MA_DATA6
MEM_MA_DATA5
MEM_MA_DATA4
MEM_MA_DATA3
MEM_MA_DATA2
MEM_MA_DATA1
MEM_MA_DATA0
MEM_MA_DATA[63..0] 6,7
MEM_MB_ADD[15..0]6,7,8
MEM_MB0_CLK_H26,8
MEM_MB0_CLK_L26,8
MEM_MB0_CLK_H16,8
MEM_MB0_CLK_L16,8
MEM_MB0_CLK_H06,8
MEM_MB0_CLK_L06,8
MEM_MB0_CS_L16,8
MEM_MB0_CS_L06,8
MEM_MB0_ODT06,8
MEM_MB1_CLK_H27,8
MEM_MB1_CLK_L27,8
MEM_MB1_CLK_H17,8
MEM_MB1_CLK_L17,8
MEM_MB1_CLK_H07,8
MEM_MB1_CLK_L07,8
MEM_MB1_CS_L17,8
MEM_MB1_CS_L07,8
MEM_MB1_ODT07,8
MEM_MB_CAS_L6,7,8
MEM_MB_WE_L6,7,8
MEM_MB_RAS_L6,7,8
MEM_MB_BANK26,7,8
MEM_MB_BANK16,7,8
MEM_MB_BANK06,7,8
MEM_MB_CKE17,8
MEM_MB_CKE06,8
MEM_MB_DQS_H[7..0]6,7
MEM_MB_DQS_L[7..0]6,7
MEM_MB_DM[7..0]6,7
MEM_MB0_CLK_H2
MEM_MB0_CLK_L2
MEM_MB0_CLK_H1
MEM_MB0_CLK_L1
MEM_MB0_CLK_H0
MEM_MB0_CLK_L0
MEM_MB0_CS_L1
MEM_MB0_CS_L0
MEM_MB0_ODT0
MEM_MB1_CLK_H2
MEM_MB1_CLK_L2
MEM_MB1_CLK_H1
MEM_MB1_CLK_L1
MEM_MB1_CLK_H0
MEM_MB1_CLK_L0
MEM_MB1_CS_L1
MEM_MB1_CS_L0
MEM_MB1_ODT0
MEM_MB_CAS_L
MEM_MB_WE_L
MEM_MB_RAS_L
MEM_MB_BANK2
MEM_MB_BANK1
MEM_MB_BANK0
MEM_MB_CKE1
MEM_MB_CKE0
MEM_MB_ADD15
MEM_MB_ADD14
MEM_MB_ADD13
MEM_MB_ADD12
MEM_MB_ADD11
MEM_MB_ADD10
MEM_MB_ADD9
MEM_MB_ADD8
MEM_MB_ADD7
MEM_MB_ADD6
MEM_MB_ADD5
MEM_MB_ADD4
MEM_MB_ADD3
MEM_MB_ADD2
MEM_MB_ADD1
MEM_MB_ADD0
MEM_MB_DQS_H7
MEM_MB_DQS_L7
MEM_MB_DQS_H6
MEM_MB_DQS_L6
MEM_MB_DQS_H5
MEM_MB_DQS_L5
MEM_MB_DQS_H4
MEM_MB_DQS_L4
MEM_MB_DQS_H3
MEM_MB_DQS_L3
MEM_MB_DQS_H2
MEM_MB_DQS_L2
MEM_MB_DQS_H1
MEM_MB_DQS_L1
MEM_MB_DQS_H0
MEM_MB_DQS_L0
MEM_MB_DM7
MEM_MB_DM6
MEM_MB_DM5
MEM_MB_DM4
MEM_MB_DM3
MEM_MB_DM2
MEM_MB_DM1
MEM_MB_DM0
U1C
U1C
AJ19
MB0_CLK_H(2)
AK19
MB0_CLK_L(2)
A18
MB0_CLK_H(1)
A19
MB0_CLK_L(1)
U31
MB0_CLK_H(0)
U30
MB0_CLK_L(0)
AE30
MB0_CS_L(1)
AC31
MB0_CS_L(0)
AD29
MB0_ODT(0)
AL19
MB1_CLK_H(2)
AL18
MB1_CLK_L(2)
C19
MB1_CLK_H(1)
D19
MB1_CLK_L(1)
W29
MB1_CLK_H(0)
W28
MB1_CLK_L(0)
AE29
MB1_CS_L(1)
AB31
MB1_CS_L(0)
AD31
MB1_ODT(0)
AC29
MB_CAS_L
AC30
MB_WE_L
AB29
MB_RAS_L
N31
MB_BANK(2)
AA31
MB_BANK(1)
AA28
MB_BANK(0)
M31
MB_CKE(1)
M29
MB_CKE(0)
N28
MB_ADD(15)
N29
MB_ADD(14)
AE31
MB_ADD(13)
N30
MB_ADD(12)
P29
MB_ADD(11)
AA29
MB_ADD(10)
P31
MB_ADD(9)
R29
MB_ADD(8)
R28
MB_ADD(7)
R31
MB_ADD(6)
R30
MB_ADD(5)
T31
MB_ADD(4)
T29
MB_ADD(3)
U29
MB_ADD(2)
U28
MB_ADD(1)
AA30
MB_ADD(0)
AK13
MB_DQS_H(7)
AJ13
MB_DQS_L(7)
AK17
MB_DQS_H(6)
AJ17
MB_DQS_L(6)
AK23
MB_DQS_H(5)
AL23
MB_DQS_L(5)
AL28
MB_DQS_H(4)
AL29
MB_DQS_L(4)
D31
MB_DQS_H(3)
C31
MB_DQS_L(3)
C24
MB_DQS_H(2)
C23
MB_DQS_L(2)
D17
MB_DQS_H(1)
C17
MB_DQS_L(1)
C14
MB_DQS_H(0)
C13
MB_DQS_L(0)
AJ14
MB_DM(7)
AH17
MB_DM(6)
AJ23
MB_DM(5)
AK29
MB_DM(4)
C30
MB_DM(3)
A23
MB_DM(2)
B17
MB_DM(1)
B13
MB_DM(0)
ZIF-SOCK940-RH-1
ZIF-SOCK940-RH-1
MB_DATA(63)
MB_DATA(62)
MB_DATA(61)
MB_DATA(60)
MB_DATA(59)
MB_DATA(58)
MB_DATA(57)
MB_DATA(56)
MB_DATA(55)
MB_DATA(54)
MB_DATA(53)
MB_DATA(52)
MB_DATA(51)
MB_DATA(50)
MB_DATA(49)
MB_DATA(48)
MB_DATA(47)
MB_DATA(46)
MB_DATA(45)
MB_DATA(44)
MB_DATA(43)
MB_DATA(42)
MB_DATA(41)
MB_DATA(40)
MB_DATA(39)
MB_DATA(38)
MB_DATA(37)
MB_DATA(36)
MB_DATA(35)
MB_DATA(34)
MB_DATA(33)
MB_DATA(32)
MB_DATA(31)
MB_DATA(30)
MB_DATA(29)
MB_DATA(28)
MB_DATA(27)
MB_DATA(26)
MB_DATA(25)
MB_DATA(24)
MB_DATA(23)
MB_DATA(22)
MB_DATA(21)
MB_DATA(20)
MB_DATA(19)
MB_DATA(18)
MB_DATA(17)
MB_DATA(16)
MB_DATA(15)
MB_DATA(14)
MB_DATA(13)
MB_DATA(12)
MB_DATA(11)
MB_DATA(10)
MB_DATA(9)
MB_DATA(8)
MB_DATA(7)
MB_DATA(6)
MB_DATA(5)
MB_DATA(4)
MB_DATA(3)
MB_DATA(2)
MB_DATA(1)
MB_DATA(0)
MB_DQS_H(8)
MB_DQS_L(8)
MB_DM(8)
MB_CHECK(7)
MB_CHECK(6)
MB_CHECK(5)
MB_CHECK(4)
MB_CHECK(3)
MB_CHECK(2)
MB_CHECK(1)
MB_CHECK(0)
AH13
AL13
AL15
AJ15
AF13
AG13
AL14
AK15
AL16
AL17
AK21
AL21
AH15
AJ16
AH19
AL20
AJ22
AL22
AL24
AK25
AJ21
AH21
AH23
AJ24
AL27
AK27
AH31
AG30
AL25
AL26
AJ30
AJ31
E31
E30
B27
A27
F29
F31
A29
A28
A25
A24
C22
D21
A26
B25
B23
A22
B21
A20
C16
D15
C21
A21
A17
A16
B15
A14
E13
F13
C15
A15
A13
D13
J31
J30
J29
K29
K31
G30
G29
L29
L28
H31
G31
MEM_MB_DATA63
MEM_MB_DATA62
MEM_MB_DATA61
MEM_MB_DATA60
MEM_MB_DATA59
MEM_MB_DATA58
MEM_MB_DATA57
MEM_MB_DATA56
MEM_MB_DATA55
MEM_MB_DATA54
MEM_MB_DATA53
MEM_MB_DATA52
MEM_MB_DATA51
MEM_MB_DATA50
MEM_MB_DATA49
MEM_MB_DATA48
MEM_MB_DATA47
MEM_MB_DATA46
MEM_MB_DATA45
MEM_MB_DATA44
MEM_MB_DATA43
MEM_MB_DATA42
MEM_MB_DATA41
MEM_MB_DATA40
MEM_MB_DATA39
MEM_MB_DATA38
MEM_MB_DATA37
MEM_MB_DATA36
MEM_MB_DATA35
MEM_MB_DATA34
MEM_MB_DATA33
MEM_MB_DATA32
MEM_MB_DATA31
MEM_MB_DATA30
MEM_MB_DATA29
MEM_MB_DATA28
MEM_MB_DATA27
MEM_MB_DATA26
MEM_MB_DATA25
MEM_MB_DATA24
MEM_MB_DATA23
MEM_MB_DATA22
MEM_MB_DATA21
MEM_MB_DATA20
MEM_MB_DATA19
MEM_MB_DATA18
MEM_MB_DATA17
MEM_MB_DATA16
MEM_MB_DATA15
MEM_MB_DATA14
MEM_MB_DATA13
MEM_MB_DATA12
MEM_MB_DATA11
MEM_MB_DATA10
MEM_MB_DATA9
MEM_MB_DATA8
MEM_MB_DATA7
MEM_MB_DATA6
MEM_MB_DATA5
MEM_MB_DATA4
MEM_MB_DATA3
MEM_MB_DATA2
MEM_MB_DATA1
MEM_MB_DATA0
MEM_MB_DATA[63..0] 6,7
A A
MSIK
MSIK
MSIK
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
MS-7508 0A
MS-7508 0A
MS-7508 0A
Custom
Custom
Custom
Date: Sheet
Date: Sheet of
5
4
3
2
Date: Sheet of
1
of
435Tuesday, October 16, 2007
435Tuesday, October 16, 2007
435Tuesday, October 16, 2007

5
VCCP_NB
VCCP
D D
VCCP_NB
C C
B B
VCCP
PLACE on CPU bottom side
C48
C48
C49
C49
C10u6.3X50805
C10u6.3X50805
X_C10u6.3X50805
X_C10u6.3X50805
C73
C73
C72
C72
C71
C71
A A
VCC_DDR
C92
C92
C10u6.3X50805
C10u6.3X50805
C0.22u10X
C0.22u10X
X_C0.22u10X
X_C0.22u10X
C93
C93
X_C10u6.3X50805
X_C10u6.3X50805
5
C74
C74
C4.7u6.3X5
C4.7u6.3X5
X_C4.7u6.3X5
X_C4.7u6.3X5
C94
C94
C10u6.3X50805
C10u6.3X50805
C75
C75
C4.7u6.3X5
C4.7u6.3X5
A4
A6
AA8
AA10
AA12
AA14
AA16
AA18
AB7
AB9
AB11
AC4
AC5
AC8
AC10
AD2
AD3
AD7
AD9
AE10
AF7
AF9
AG4
AG5
AG7
AH2
AH3
B3
B5
B7
C2
C4
C6
C8
D3
D5
D7
D9
E4
E6
E8
E10
F5
F7
F9
F11
G6
G8
G10
G12
H7
H11
H23
J8
J12
J14
J16
J18
J20
J22
J24
K7
K9
K11
K13
K15
K17
K19
K21
K23
L4
L5
L8
L10
L12
Y17
Y19
C76
C76
C95
C95
X_C10u6.3X50805
X_C10u6.3X50805
U1F
U1F
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
ZIF-SOCK940-RH-1
ZIF-SOCK940-RH-1
C77
C77
C0.01u10X
C0.01u10X
C0.01u10X
C0.01u10X
C97
C97
C96
C96
X_C0.22u10X
X_C0.22u10X
X_C0.22u10X
X_C0.22u10X
C98
C98
C180p50N
C180p50N
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
C99
C99
C0.01u10X
C0.01u10X
A3
A7
A9
A11
AA4
AA5
AA7
AA9
AA11
AA13
AA15
AA17
AA19
AA21
AA23
AB2
AB3
AB8
AB10
AB12
AB14
AB16
AB18
AB20
AB22
AC7
AC9
AC11
AC13
AC15
AC17
AC19
AC21
AC23
AD8
AD10
AD12
AD14
AD16
AD20
AD22
AD24
AE4
AE5
AE9
AE11
AF2
AF3
AF8
AF10
AF12
AF14
AF16
AF18
AF20
AF22
AF24
AF26
AF28
AG10
AG11
AH14
AH16
AH18
AH20
AH22
AH24
AH26
AH28
AH30
AK2
AK14
AK16
AK18
Y14
Y16
VCCP_NB
C100
C100
C0.01u10X
C0.01u10X
C452
C452
C0.01u10X
C0.01u10X
VCCP
C83
C83
C4.7u6.3X50805
C4.7u6.3X50805
4
U1G
U1G
L14
VDD
L16
VDD
L18
VDD
M2
VDD
M3
VDD
M7
VDD
M9
VDD
M11
VDD
M13
VDD
M15
VDD
M17
VDD
M19
VDD
N8
VDD
N10
VDD
N12
VDD
N14
VDD
N16
VDD
N18
VDD
P7
VDD
P9
VDD
P11
VDD
P13
VDD
P15
VDD
P17
VDD
P19
VDD
R4
VDD
R5
VDD
R8
VDD
R10
VDD
R12
VDD
R14
VDD
R16
VDD
R18
VDD
R20
VDD
T2
VDD
T3
VDD
T7
VDD
T9
VDD
T11
VDD
T13
VDD
T15
VDD
T17
VDD
T19
VDD
T21
VDD
U8
VDD
U10
VDD
U12
VDD
U14
VDD
U16
VDD
U18
VDD
U20
VDD
V9
VDD
V11
VDD
V13
VDD
V15
VDD
V17
VDD
V19
VDD
V21
VDD
W4
VDD
W5
VDD
W8
VDD
W10
VDD
W12
VDD
W14
VDD
W16
VDD
W18
VDD
W20
VDD
Y2
VDD
Y3
VDD
Y7
VDD
Y9
VDD
Y11
VDD
Y13
VDD
Y15
VDD
Y21
VDD
ZIF-SOCK940-RH-1
ZIF-SOCK940-RH-1
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
AK20
AK22
AK24
AK26
AK28
AK30
AL5
B4
B9
B11
B14
B16
B18
B20
B22
B24
B26
B28
B30
C3
D14
D16
D18
D20
D22
D24
D26
D28
D30
E11
F4
F14
F16
F18
F20
F22
F24
F26
F28
F30
G9
G11
H8
H10
H12
H14
H16
H18
H22
H24
H26
H28
H30
J4
J5
J7
J9
J11
J13
J15
J17
J19
J21
J23
K2
K3
K8
K10
K12
K14
K16
K18
K20
K22
Y18
VCCP
VTT_DDR
C87
C87
C88
C0.01u10X
C0.01u10X
C88
C0.01u10X
C0.01u10X
C84
C84
C85
C85
C86
C86
C10u6.3X50805
C10u6.3X50805
X_C10u6.3X50805
X_C10u6.3X50805
X_C4.7u6.3X50805
X_C4.7u6.3X50805
4
AA20
AA22
AB13
AB15
AB17
AB19
AB21
AB23
AC12
AC14
AC16
AC18
AC20
AC22
AD11
AD23
AE12
AF11
L20
L22
M21
M23
N20
N22
P21
P23
R22
T23
U22
V23
W22
Y23
C89
C89
C10u6.3X50805
C10u6.3X50805
3
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
1
1
2
2
3
3
4
4
5
5
6
6
7
7
8
8
ZIF-SOCK940-RH-1
ZIF-SOCK940-RH-1
VTT_DDR
C91
C91
C90
C90
C0.01u10X
C0.01u10X
C0.22u10X
C0.22u10X
3
2
VCC_DDR
C63
C63
VTT_DDR
C64
C64
1.2V_HT
U1E
U1E
L25
L26
L31
L30
W26
W25
AE27
U24
V24
AE28
Y31
Y30
AG31
V31
W31
AF31
ZIF-SOCK940-RH-1
ZIF-SOCK940-RH-1
C65
C65
RSVD1
RSVD2
RSVD3
RSVD4
RSVD5
RSVD6
RSVD7
RSVD8
RSVD9
RSVD10
RSVD11
RSVD12
RSVD13
RSVD14
RSVD15
RSVD16
C66
C66
U1H
U1H
C56
C56
N17
VSS
N19
VSS
N21
VSS
N23
VSS
P2
VSS
P3
VSS
P8
VSS
P10
VSS
P12
VSS
P14
VSS
P16
VSS
P18
VSS
P20
VSS
P22
VSS
R7
VSS
R9
VSS
R11
VSS
R13
VSS
R15
VSS
R17
VSS
R19
VSS
R21
VSS
R23
VSS
T8
VSS
T10
VSS
T12
VSS
T14
VSS
T16
VSS
T18
VSS
T20
VSS
T22
VSS
U4
VSS
U5
VSS
U7
VSS
U9
VSS
U11
VSS
U13
VSS
U15
VSS
U17
VSS
U19
VSS
U21
VSS
U23
VSS
V2
VSS
V3
VSS
V10
VSS
V12
VSS
V14
VSS
V16
VSS
V18
VSS
V20
VSS
V22
VSS
W9
VSS
W11
VSS
W13
VSS
W15
VSS
W17
VSS
W19
VSS
W21
VSS
W23
VSS
Y8
VSS
Y10
VSS
Y12
VSS
W7
VSS
Y20
VSS
Y22
VSS
C62
C57
C57
C59
C59
C62
C61
C61
C60
C60
C67
C67
U1I
U1I
AJ4
VLDT_A1
AJ3
VLDT_A2
AJ2
VLDT_A3
AJ1
VLDT_A4
D12
VTT
C12
VTT
B12
VTT
A12
VTT
AB24
VDDIO
AB26
VDDIO
AB28
VDDIO
AB30
VDDIO
AC24
VDDIO
AD26
VDDIO
AD28
VDDIO
AD30
VDDIO
AF30
VDDIO
M24
VDDIO
M26
VDDIO
M28
VDDIO
M30
VDDIO
P24
VDDIO
P26
VDDIO
P28
VDDIO
P30
VDDIO
T24
VDDIO
T26
VDDIO
T28
VDDIO
T30
VDDIO
V25
VDDIO
V26
VDDIO
V28
VDDIO
V30
VDDIO
Y24
VDDIO
Y26
VDDIO
Y28
VDDIO
Y29
VDDIO
ZIF-SOCK940-RH-1
ZIF-SOCK940-RH-1
RSVD17
RSVD18
RSVD19
RSVD20
RSVD21
RSVD22
RSVD23
RSVD24
RSVD25
RSVD26
RSVD27
RSVD28
RSVD29
RSVD30
RSVD31
RSVD32
RSVD33
RSVD34
RSVD35
RSVD36
RSVD37
RSVD38
CPU_CORETYPE#
C69
C69
C68
C68
E20
B19
AL4
AK4
AK3
F2
F3
G4
G3
G5
AD25
AE24
AE25
AJ18
AJ20
C18
C20
G24
G25
H25
V29
W30
C70
C70
H6
VLDT_B1
H5
VLDT_B2
H2
VLDT_B3
H1
VLDT_B4
AK12
VTT
AJ12
VTT
AH12
VTT
AG12
VTT
AL12
VTT
K24
VSS
K26
VSS
K28
VSS
K30
VSS
L7
VSS
L9
VSS
L11
VSS
L13
VSS
L15
VSS
L17
VSS
L19
VSS
L21
VSS
L23
VSS
M8
VSS
M10
VSS
M12
VSS
M14
VSS
M16
VSS
M18
VSS
M20
VSS
M22
VSS
N4
VSS
N5
VSS
N7
VSS
N9
VSS
N11
VSS
N13
VSS
N15
VSS
R45 X_0R0402R45 X_0R0402
CPU_CORETYPE#
VCC_DDR
R2
R42 300R0402R42 300R0402
300R0402R2300R0402
VTT_DDR
TP33TP33
VCCP_NB_SENSE 22,27
VCCP_NB# 22
VCCP_NB
VLDT_RUN_B
1.2V_HT
1.2V_HT
VCC_DDR
R27
R27
X_1KR0402
X_1KR0402
C4
C4
X_C0.22u16X
X_C0.22u16X
C9
C50
C50
VCC_DDR
C0.22u10X
C0.22u10X
C0.22u10X
C0.22u10X
C0.01u10X
C10u6.3X50805
C10u6.3X50805
C4.7u6.3X5
X_C4.7u6.3X5
X_C4.7u6.3X5
X_C4.7u6.3X5
X_C4.7u6.3X5
X_C4.7u6.3X5
X_C4.7u6.3X5
X_C0.22u10X
X_C0.22u10X
X_C4.7u6.3X5
X_C4.7u6.3X5
2
C4.7u6.3X5
C4.7u6.3X5
C4.7u6.3X5
C4.7u6.3X5
C4.7u6.3X5
C4.7u6.3X5
C4.7u6.3X5
X_C0.22u10X
X_C0.22u10X
C0.01u10X
MSIK
MSIK
MSIK
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
MS-7508 0A
MS-7508 0A
MS-7508 0A
Custom
Custom
Custom
Date: Sheet
Date: Sheet of
Date: Sheet of
1
C29
C29
C28
C28
C4.7u6.3X5
C4.7u6.3X5
C10000p10X0402
C10000p10X0402
C6
C6
C8
C5
C5
C7
C7
C0.22u16X
C0.22u16X
X_C0.22u16X
X_C0.22u16X
X_C0.22u16X
X_C0.22u16X
C4.7u10Y0805C8C4.7u10Y0805
C11
C11
C10
C10
C12
C12
X_C0.22u16X
X_C0.22u16X
X_C0.22u16X
X_C0.22u16X
C4.7u10Y0805
C4.7u10Y0805
X_C4.7u10Y0805C9X_C4.7u10Y0805
VCCP VCC_DDR
VCCP VCCP_NB
VID1 3,27
C51
C51
C52
C52
C0.22u10X
C0.22u10X
C4.7u6.3X50805
C4.7u6.3X50805
X_C4.7u6.3X50805
X_C4.7u6.3X50805
C79
C79
C78
C78
C80
C80
C4.7u6.3X5
C4.7u6.3X5
X_C4.7u6.3X5
X_C4.7u6.3X5
C10u6.3X50805
C10u6.3X50805
1
C30
C30
C31
C31
C10000p10X0402
C10000p10X0402
X_C10000p10X0402
X_C10000p10X0402
C14
C14
C15
C15
C13
C13
C0.22u16X
C0.22u16X
X_C180p50N0402
X_C180p50N0402
X_C180p50N0402
X_C180p50N0402
CPU_ALERT# 13
C32 X_C2.2u6.3X5C32 X_C2.2u6.3X5
C33 X_C2.2u6.3X5C33 X_C2.2u6.3X5
C34 X_C2.2u6.3X5C34 X_C2.2u6.3X5
C53
C53
C54
C54
C55
C55
C0.01u10X
C0.01u10X
C4.7u6.3X5
C4.7u6.3X5
X_C0.22u10X
X_C0.22u10X
C82
C82
C81
C81
C4.7u6.3X5
C4.7u6.3X5
X_C4.7u6.3X5
X_C4.7u6.3X5
of
535Tuesday, October 16, 2007
535Tuesday, October 16, 2007
535Tuesday, October 16, 2007

5
4
3
2
1
VCC3
VCC3
MEM_MA_DQS_H[7..0]4,7
MEM_MA_DQS_L[7..0]4,7
D D
C C
B B
MEM_MA_DM[7..0]4,7
MEM_MA_DATA0
MEM_MA_DATA1
MEM_MA_DATA2
MEM_MA_DATA3
MEM_MA_DATA4
MEM_MA_DATA5
MEM_MA_DATA6
MEM_MA_DATA7
MEM_MA_DATA8
MEM_MA_DATA9
MEM_MA_DATA10
MEM_MA_DATA11
MEM_MA_DATA12
MEM_MA_DATA13
MEM_MA_DATA14
MEM_MA_DATA15
MEM_MA_DATA16
MEM_MA_DATA17
MEM_MA_DATA18
MEM_MA_DATA19
MEM_MA_DATA20
MEM_MA_DATA21
MEM_MA_DATA22
MEM_MA_DATA23
MEM_MA_DATA24
MEM_MA_DATA25
MEM_MA_DATA26
MEM_MA_DATA27
MEM_MA_DATA28
MEM_MA_DATA29
MEM_MA_DATA30
MEM_MA_DATA31
MEM_MA_DATA32
MEM_MA_DATA33
MEM_MA_DATA34
MEM_MA_DATA35
MEM_MA_DATA36
MEM_MA_DATA37
MEM_MA_DATA38
MEM_MA_DATA39
MEM_MA_DATA40
MEM_MA_DATA41
MEM_MA_DATA42
MEM_MA_DATA43
MEM_MA_DATA44
MEM_MA_DATA45
MEM_MA_DATA46
MEM_MA_DATA47
MEM_MA_DATA48
MEM_MA_DATA49
MEM_MA_DATA50
MEM_MA_DATA51
MEM_MA_DATA52
MEM_MA_DATA53
MEM_MA_DATA54
MEM_MA_DATA55
MEM_MA_DATA56
MEM_MA_DATA57
MEM_MA_DATA58
MEM_MA_DATA59
MEM_MA_DATA60
MEM_MA_DATA61
MEM_MA_DATA62
MEM_MA_DATA63
MEM_MA_DATA[63..0] 4,7
DIMM2
DIMM2
10
122
123
128
129
12
13
21
22
131
132
140
141
24
25
30
31
143
144
149
150
33
34
39
40
152
153
158
159
80
81
86
87
199
200
205
206
89
90
95
96
208
209
214
215
98
99
107
108
217
218
226
227
110
111
116
117
229
230
235
236
11
14
17
20
23
26
29
32
35
38
41
44
47
50
65
66
79
82
85
88
91
94
97
VCC_DDR
170
197
172
187
184
189
VDDQ53VDDQ59VDDQ64VDDQ
VSS
VSS
VSS
151
154
157
VDDQ
VDDQ69VDDQ
VSS
VSS
VSS
160
163
166
169
VDDQ
VSS
198
VDDQ
VSS
178
VSS
201
204
102
19
55
3
NC1
RC118RC0
DQ0
4
DQ1
9
NC/TEST
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQ8
DQ9
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
DQ16
DQ17
DQ18
DQ19
DQ20
DQ21
DQ22
DQ23
DQ24
DQ25
DQ26
DQ27
DQ28
DQ29
DQ30
DQ31
DQ32
DQ33
DQ34
DQ35
DQ36
DQ37
DQ38
DQ39
DQ40
DQ41
DQ42
DQ43
DQ44
DQ45
DQ46
DQ47
DQ48
DQ49
DQ50
DQ51
DQ52
DQ53
DQ54
DQ55
DQ56
DQ57
DQ58
DQ59
DQ60
DQ61
DQ62
DQ63
2
VSS
5
VSS
8
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
100
103
106
109
68
NC2
VDD51VDD56VDD62VDD72VDD78VDD
VSS
VSS
VSS
VSS
112
115
118
121
124
191
194
181
175
75
VDD
VDD
VDD
VDD
VDDQ
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
127
130
133
136
139
142
145
148
VDDQ
VSS
67
207
VDDQ
VSS
210
238
VSS
213
VDDSPD
VSS
VSS
216
219
C102
C102
X_C0.1u16Y0402
X_C0.1u16Y0402
161
CB042CB143CB248CB349CB4
DM0/DQS9
NC/DQS9#
DM1/DQS10
NC/DQS10#
DM2/DQS11
NC/DQS11#
DM3/DQS12
NC/DQS12#
DM4/DQS13
NC/DQS13#
DM5/DQS14
NC/DQS14#
DM6/DQS15
NC/DQS15#
DM7/DQS16
NC/DQS16#
DM8/DQS17
NC/DQS17#
CK1#(CK0#)
VSS
VSS
VSS
VSS
222
225
228
231
162
167
168
CB5
CB6
CB7
DQS0
DQS0#
DQS1
DQS1#
DQS2
DQS2#
DQS3
DQS3#
DQS4
DQS4#
DQS5
DQS5#
DQS6
DQS6#
DQS7
DQS7#
DQS8
DQS8#
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10_AP
A11
A12
A13
A14
A15
A16/BA2
BA1
BA0
WE#
CAS#
RAS#
ODT0
ODT1
CKE0
CKE1
CS0#
CS1#
CK0(DU)
CK0#(DU)
CK1(CK0)
CK2(DU)
CK2#(DU)
SCL
SDA
VREF
X1
SA0
SA1
SA2
X2
X3
VSS
VSS
VSS
DDRII-240_ORANG-RH
DDRII-240_ORANG-RH
234
237
MEM_MA_DQS_H0
7
MEM_MA_DQS_L0
6
MEM_MA_DQS_H1
16
MEM_MA_DQS_L1
15
MEM_MA_DQS_H2
28
MEM_MA_DQS_L2
27
MEM_MA_DQS_H3
37
MEM_MA_DQS_L3
36
MEM_MA_DQS_H4
84
MEM_MA_DQS_L4
83
MEM_MA_DQS_H5
93
MEM_MA_DQS_L5
92
MEM_MA_DQS_H6
105
MEM_MA_DQS_L6
104
MEM_MA_DQS_H7
114
MEM_MA_DQS_L7
113
46
45
MEM_MA_ADD0
188
MEM_MA_ADD1
183
MEM_MA_ADD2
63
MEM_MA_ADD3
182
MEM_MA_ADD4
61
MEM_MA_ADD5
60
MEM_MA_ADD6
180
MEM_MA_ADD7
58
MEM_MA_ADD8
179
MEM_MA_ADD9
177
MEM_MA_ADD10
70
MEM_MA_ADD11
57
MEM_MA_ADD12
176
MEM_MA_ADD13
196
MEM_MA_ADD14
174
MEM_MA_ADD15
173
54
190
71
MEM_MA_WE_L
73
MEM_MA_CAS_L
74
MEM_MA_RAS_L
192
125
126
134
135
146
147
155
156
202
203
211
212
223
224
232
233
164
165
MEM_MA0_ODT0
195
77
MEM_MA_CKE0
52
171
MEM_MA0_CS_L0
193
MEM_MA0_CS_L1
76
MEM_MA0_CLK_H0
185
MEM_MA0_CLK_L0
186
MEM_MA0_CLK_H1
137
MEM_MA0_CLK_L1
138
MEM_MA0_CLK_H2
220
MEM_MA0_CLK_L2
221
SCL
120
SDA
119
1
X1
239
240
101
X2
X3
MEM_MA_BANK2
MEM_MA_BANK1
MEM_MA_BANK0
MEM_MA_DM0
MEM_MA_DM1
MEM_MA_DM2
MEM_MA_DM3
MEM_MA_DM4
MEM_MA_DM5
MEM_MA_DM6
MEM_MA_DM7
VDDR_VREF
MEM_MA_BANK2 4,7,8
MEM_MA_BANK1 4,7,8
MEM_MA_BANK0 4,7,8
MEM_MA_WE_L 4,7,8
MEM_MA_CAS_L 4,7,8
MEM_MA_RAS_L 4,7,8
MEM_MA0_ODT0 4,8
MEM_MA_CKE0 4,8
MEM_MA0_CS_L0 4,8
MEM_MA0_CS_L1 4,8
MEM_MA0_CLK_H0 4,8
MEM_MA0_CLK_L0 4,8
MEM_MA0_CLK_H1 4,8
MEM_MA0_CLK_L1 4,8
MEM_MA0_CLK_H2 4,8
MEM_MA0_CLK_L2 4,8
VDDR_VREF
C104
C104
C0.1u16Y0402
C0.1u16Y0402
ADDRESS A0
A A
MEM_MB_DQS_H[7..0]4,7
MEM_MB_DQS_L[7..0]4,7
MEM_MA_ADD[15..0] 4,7,8
VCC_DDR
R29
R29
49.9R1%0402
49.9R1%0402
R30
R30
49.9R1%0402
49.9R1%0402
SCL
SDA
C105
C105
X_C0.1u16Y0402
X_C0.1u16Y0402
C106
C106
X_C0.1u16Y0402
X_C0.1u16Y0402
VDDR_VREF
SCL 7
SDA 7
MEM_MB_DM[7..0] 4,7
MEM_MB_DATA[63..0] 4,7
MEM_MB_ADD[15..0] 4,7,8
3VDUAL
VDDR_VREF
Y
D41
D41
Z
X
SCL
SDA
MEM_MB_DATA0
MEM_MB_DATA1
MEM_MB_DATA2
MEM_MB_DATA3
MEM_MB_DATA4
MEM_MB_DATA5
MEM_MB_DATA6
MEM_MB_DATA7
MEM_MB_DATA8
MEM_MB_DATA9
MEM_MB_DATA10
MEM_MB_DATA11
MEM_MB_DATA12
MEM_MB_DATA13
MEM_MB_DATA14
MEM_MB_DATA15
MEM_MB_DATA16
MEM_MB_DATA17
MEM_MB_DATA18
MEM_MB_DATA19
MEM_MB_DATA20
MEM_MB_DATA21
MEM_MB_DATA22
MEM_MB_DATA23
MEM_MB_DATA24
MEM_MB_DATA25
MEM_MB_DATA26
MEM_MB_DATA27
MEM_MB_DATA28
MEM_MB_DATA29
MEM_MB_DATA30
MEM_MB_DATA31
MEM_MB_DATA32
MEM_MB_DATA33
MEM_MB_DATA34
MEM_MB_DATA35
MEM_MB_DATA36
MEM_MB_DATA37
MEM_MB_DATA38
MEM_MB_DATA39
MEM_MB_DATA40
MEM_MB_DATA41
MEM_MB_DATA42
MEM_MB_DATA43
MEM_MB_DATA44
MEM_MB_DATA45
MEM_MB_DATA46
MEM_MB_DATA47
MEM_MB_DATA48
MEM_MB_DATA49
MEM_MB_DATA50
MEM_MB_DATA51
MEM_MB_DATA52
MEM_MB_DATA53
MEM_MB_DATA54
MEM_MB_DATA55
MEM_MB_DATA56
MEM_MB_DATA57
MEM_MB_DATA58
MEM_MB_DATA59
MEM_MB_DATA60
MEM_MB_DATA61
MEM_MB_DATA62
MEM_MB_DATA63
Y
D40
D40
Z
X
1PS226_SOT23
1PS226_SOT23
1PS226_SOT23
1PS226_SOT23
DIMM1
DIMM1
3
4
9
10
122
123
128
129
12
13
21
22
131
132
140
141
24
25
30
31
143
144
149
150
33
34
39
40
152
153
158
159
80
81
86
87
199
200
205
206
89
90
95
96
208
209
214
215
98
99
107
108
217
218
226
227
110
111
116
117
229
230
235
236
2
5
8
11
14
17
20
23
26
29
32
35
38
41
44
47
50
65
66
79
82
85
88
91
94
97
ADDRESS A2
R31 0R0402R31 0R0402
R32 0R0402R32 0R0402
DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQ8
DQ9
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
DQ16
DQ17
DQ18
DQ19
DQ20
DQ21
DQ22
DQ23
DQ24
DQ25
DQ26
DQ27
DQ28
DQ29
DQ30
DQ31
DQ32
DQ33
DQ34
DQ35
DQ36
DQ37
DQ38
DQ39
DQ40
DQ41
DQ42
DQ43
DQ44
DQ45
DQ46
DQ47
DQ48
DQ49
DQ50
DQ51
DQ52
DQ53
DQ54
DQ55
DQ56
DQ57
DQ58
DQ59
DQ60
DQ61
DQ62
DQ63
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VCC_DDR
102
68
19
55
NC2
NC1
RC118RC0
NC/TEST
VSS
VSS
VSS
VSS
VSS
100
103
106
109
112
MEM_SMB_CLK0 13
MEM_SMB_DATA0 13
VDD51VDD56VDD62VDD72VDD78VDD
VSS
VSS
VSS
VSS
115
118
121
124
127
C101
C101
X_C0.1u16Y0402
X_C0.1u16Y0402
170
197
172
187
184
189
67
VDDQ53VDDQ59VDDQ64VDDQ
VSS
VSS
VSS
151
154
157
VDDQ
VDDQ
VDDQ69VDDQ
VSS
VSS
VSS
VSS
160
163
166
169
198
VDDQ
VSS
178
VDDQ
VSS
VSS
201
204
191
194
181
175
75
VDD
VDD
VDD
VDD
VDDQ
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
130
133
136
139
142
145
148
207
VDDQ
VSS
210
238
VSS
213
VDDSPD
VSS
VSS
216
CB042CB143CB248CB349CB4
DM1/DQS10
DM2/DQS11
DM3/DQS12
DM4/DQS13
DM5/DQS14
DM6/DQS15
DM7/DQS16
DM8/DQS17
CK1#(CK0#)
VSS
VSS
VSS
VSS
219
222
225
228
161
162
167
168
CB5
CB6
CB7
DQS0
DQS0#
DQS1
DQS1#
DQS2
DQS2#
DQS3
DQS3#
DQS4
DQS4#
DQS5
DQS5#
DQS6
DQS6#
DQS7
DQS7#
DQS8
DQS8#
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10_AP
A11
A12
A13
A14
A15
A16/BA2
BA1
BA0
WE#
CAS#
RAS#
DM0/DQS9
NC/DQS9#
NC/DQS10#
NC/DQS11#
NC/DQS12#
NC/DQS13#
NC/DQS14#
NC/DQS15#
NC/DQS16#
NC/DQS17#
ODT0
ODT1
CKE0
CKE1
CS0#
CS1#
CK0(DU)
CK0#(DU)
CK1(CK0)
CK2(DU)
CK2#(DU)
SCL
SDA
VREF
X1
SA0
SA1
SA2
X2
X3
VSS
VSS
VSS
DDRII-240_ORANGE-RH
DDRII-240_ORANGE-RH
231
234
237
7
6
16
15
28
27
37
36
84
83
93
92
105
104
114
113
46
45
188
183
63
182
61
60
180
58
179
177
70
57
176
196
174
173
MEM_MB_BANK2
54
MEM_MB_BANK1
190
MEM_MB_BANK0
71
MEM_MB_WE_L
73
MEM_MB_CAS_L
74
MEM_MB_RAS_L
192
125
126
134
135
146
147
155
156
202
203
211
212
223
224
232
233
164
165
195
77
52
171
MEM_MB0_CS_L0
193
MEM_MB0_CS_L1
76
MEM_MB0_CLK_H0
185
MEM_MB0_CLK_L0
186
MEM_MB0_CLK_H1
137
MEM_MB0_CLK_L1
138
MEM_MB0_CLK_H2
220
MEM_MB0_CLK_L2
221
120
119
1
X1
239
240
101
X2
X3
MEM_MB_DQS_H0
MEM_MB_DQS_L0
MEM_MB_DQS_H1
MEM_MB_DQS_L1
MEM_MB_DQS_H2
MEM_MB_DQS_L2
MEM_MB_DQS_H3
MEM_MB_DQS_L3
MEM_MB_DQS_H4
MEM_MB_DQS_L4
MEM_MB_DQS_H5
MEM_MB_DQS_L5
MEM_MB_DQS_H6
MEM_MB_DQS_L6
MEM_MB_DQS_H7
MEM_MB_DQS_L7
MEM_MB_ADD0
MEM_MB_ADD1
MEM_MB_ADD2
MEM_MB_ADD3
MEM_MB_ADD4
MEM_MB_ADD5
MEM_MB_ADD6
MEM_MB_ADD7
MEM_MB_ADD8
MEM_MB_ADD9
MEM_MB_ADD10
MEM_MB_ADD11
MEM_MB_ADD12
MEM_MB_ADD13
MEM_MB_ADD14
MEM_MB_ADD15
MEM_MB_DM0
MEM_MB_DM1
MEM_MB_DM2
MEM_MB_DM3
MEM_MB_DM4
MEM_MB_DM5
MEM_MB_DM6
MEM_MB_DM7
MEM_MB0_ODT0
MEM_MB_CKE0
MEM_MB_CKE0
SCL
SDA
VDDR_VREF
VCC3
MEM_MB_BANK2 4,7,8
MEM_MB_BANK1 4,7,8
MEM_MB_BANK0 4,7,8
MEM_MB_WE_L 4,7,8
MEM_MB_CAS_L 4,7,8
MEM_MB_RAS_L 4,7,8
MEM_MB0_ODT0 4,8
MEM_MB_CKE0 4,8
MEM_MB0_CS_L0 4,8
MEM_MB0_CS_L1 4,8
MEM_MB0_CLK_H0 4,8
MEM_MB0_CLK_L0 4,8
MEM_MB0_CLK_H1 4,8
MEM_MB0_CLK_L1 4,8
MEM_MB0_CLK_H2 4,8
MEM_MB0_CLK_L2 4,8
VDDR_VREF
C103
C103
C1000p50X0402
C1000p50X0402
MSIK
MSIK
MSIK
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
MS-7508 0A
MS-7508 0A
MS-7508 0A
Custom
Custom
Custom
Date: Sheet
Date: Sheet of
5
4
3
2
Date: Sheet of
1
of
635Tuesday, October 16, 2007
635Tuesday, October 16, 2007
635Tuesday, October 16, 2007

5
4
3
2
1
MEM_MB_DM[7..0]4,6
MEM_MB_ADD[15..0]4,6,8
MEM_MB_DATA[63..0]4,6
MEM_MB_DATA0
MEM_MB_DATA1
MEM_MB_DATA2
MEM_MB_DATA3
MEM_MB_DATA4
MEM_MB_DATA5
MEM_MB_DATA6
MEM_MB_DATA7
MEM_MB_DATA8
MEM_MB_DATA9
MEM_MB_DATA10
MEM_MB_DATA11
MEM_MB_DATA12
MEM_MB_DATA13
MEM_MB_DATA14
MEM_MB_DATA15
MEM_MB_DATA16
MEM_MB_DATA17
MEM_MB_DATA18
MEM_MB_DATA19
MEM_MB_DATA20
MEM_MB_DATA21
MEM_MB_DATA22
MEM_MB_DATA23
MEM_MB_DATA24
MEM_MB_DATA25
MEM_MB_DATA26
MEM_MB_DATA27
MEM_MB_DATA28
MEM_MB_DATA29
MEM_MB_DATA30
MEM_MB_DATA31
MEM_MB_DATA32
MEM_MB_DATA33
MEM_MB_DATA34
MEM_MB_DATA35
MEM_MB_DATA36
MEM_MB_DATA37
MEM_MB_DATA38
MEM_MB_DATA39
MEM_MB_DATA40
MEM_MB_DATA41
MEM_MB_DATA42
MEM_MB_DATA43
MEM_MB_DATA44
MEM_MB_DATA45
MEM_MB_DATA46
MEM_MB_DATA47
MEM_MB_DATA48
MEM_MB_DATA49
MEM_MB_DATA50
MEM_MB_DATA51
MEM_MB_DATA52
MEM_MB_DATA53
MEM_MB_DATA54
MEM_MB_DATA55
MEM_MB_DATA56
MEM_MB_DATA57
MEM_MB_DATA58
MEM_MB_DATA59
MEM_MB_DATA60
MEM_MB_DATA61
MEM_MB_DATA62
MEM_MB_DATA63
122
123
128
129
131
132
140
141
143
144
149
150
152
153
158
159
199
200
205
206
208
209
214
215
107
108
217
218
226
227
110
111
116
117
229
230
235
236
DIMM3
DIMM3
10
12
13
21
22
24
25
30
31
33
34
39
40
80
81
86
87
89
90
95
96
98
99
11
14
17
20
23
26
29
32
35
38
41
44
47
50
65
66
79
82
85
88
91
94
97
VCC_DDR
102
68
19
55
3
4
9
2
5
8
DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQ8
DQ9
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
DQ16
DQ17
DQ18
DQ19
DQ20
DQ21
DQ22
DQ23
DQ24
DQ25
DQ26
DQ27
DQ28
DQ29
DQ30
DQ31
DQ32
DQ33
DQ34
DQ35
DQ36
DQ37
DQ38
DQ39
DQ40
DQ41
DQ42
DQ43
DQ44
DQ45
DQ46
DQ47
DQ48
DQ49
DQ50
DQ51
DQ52
DQ53
DQ54
DQ55
DQ56
DQ57
DQ58
DQ59
DQ60
DQ61
DQ62
DQ63
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
NC2
NC1
RC118RC0
VDD51VDD56VDD62VDD72VDD78VDD
NC/TEST
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
100
103
106
109
112
115
118
121
197
172
187
VDDQ
VDDQ69VDDQ
VSS
VSS
VSS
160
163
166
169
184
VDDQ
VSS
198
VDDQ
VSS
VCC3
C108
C108
X_C0.1u16Y0402
X_C0.1u16Y0402
189
67
178
VDDQ
VSS
VSS
201
204
207
VDDQ
VSS
210
238
VSS
213
VDDSPD
VSS
VSS
216
219
161
CB042CB143CB248CB349CB4
DM0/DQS9
NC/DQS9#
DM1/DQS10
NC/DQS10#
DM2/DQS11
NC/DQS11#
DM3/DQS12
NC/DQS12#
DM4/DQS13
NC/DQS13#
DM5/DQS14
NC/DQS14#
DM6/DQS15
NC/DQS15#
DM7/DQS16
NC/DQS16#
DM8/DQS17
NC/DQS17#
CK1#(CK0#)
VSS
VSS
VSS
VSS
222
225
228
231
162
167
168
CB5
CB6
CB7
DQS0
DQS0#
DQS1
DQS1#
DQS2
DQS2#
DQS3
DQS3#
DQS4
DQS4#
DQS5
DQS5#
DQS6
DQS6#
DQS7
DQS7#
DQS8
DQS8#
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10_AP
A11
A12
A13
A14
A15
A16/BA2
BA1
BA0
WE#
CAS#
RAS#
ODT0
ODT1
CKE0
CKE1
CS0#
CS1#
CK0(DU)
CK0#(DU)
CK1(CK0)
CK2(DU)
CK2#(DU)
SCL
SDA
VREF
X1
SA0
SA1
SA2
X2
X3
VSS
VSS
VSS
DDRII-240_GREEN-RH
DDRII-240_GREEN-RH
234
237
7
6
16
15
28
27
37
36
84
83
93
92
105
104
114
113
46
45
188
183
63
182
61
60
180
58
179
177
70
57
176
196
174
173
54
190
71
73
74
192
125
126
134
135
146
147
155
156
202
203
211
212
223
224
232
233
164
165
195
77
52
171
193
76
185
186
137
138
220
221
120
119
1
X1
239
240
101
X2
X3
MEM_MA_DQS_H0
MEM_MA_DQS_L0
MEM_MA_DQS_H1
MEM_MA_DQS_L1
MEM_MA_DQS_H2
MEM_MA_DQS_L2
MEM_MA_DQS_H3
MEM_MA_DQS_L3
MEM_MA_DQS_H4
MEM_MA_DQS_L4
MEM_MA_DQS_H5
MEM_MA_DQS_L5
MEM_MA_DQS_H6
MEM_MA_DQS_L6
MEM_MA_DQS_H7
MEM_MA_DQS_L7
MEM_MA_ADD0
MEM_MA_ADD1
MEM_MA_ADD2
MEM_MA_ADD3
MEM_MA_ADD4
MEM_MA_ADD5
MEM_MA_ADD6
MEM_MA_ADD7
MEM_MA_ADD8
MEM_MA_ADD9
MEM_MA_ADD10
MEM_MA_ADD11
MEM_MA_ADD12
MEM_MA_ADD13
MEM_MA_ADD14
MEM_MA_ADD15
MEM_MA_BANK2
MEM_MA_BANK1
MEM_MA_BANK0
MEM_MA_WE_L
MEM_MA_CAS_L
MEM_MA_RAS_L
MEM_MA_DM0
MEM_MA_DM1
MEM_MA_DM2
MEM_MA_DM3
MEM_MA_DM4
MEM_MA_DM5
MEM_MA_DM6
MEM_MA_DM7
MEM_MA1_ODT0
MEM_MA_CKE1
MEM_MA1_CS_L0
MEM_MA1_CS_L1
MEM_MA1_CLK_H0
MEM_MA1_CLK_L0
MEM_MA1_CLK_H1
MEM_MA1_CLK_L1
MEM_MA1_CLK_H2
MEM_MA1_CLK_L2
SCL
SDA
MEM_MA_BANK2 4,6,8
MEM_MA_BANK1 4,6,8
MEM_MA_BANK0 4,6,8
MEM_MA_WE_L 4,6,8
MEM_MA_CAS_L 4,6,8
MEM_MA_RAS_L 4,6,8
MEM_MA1_ODT0 4,8
MEM_MA_CKE1 4,8
MEM_MA1_CS_L0 4,8
MEM_MA1_CS_L1 4,8
MEM_MA1_CLK_H0 4,8
MEM_MA1_CLK_L0 4,8
MEM_MA1_CLK_H1 4,8
MEM_MA1_CLK_L1 4,8
MEM_MA1_CLK_H2 4,8
MEM_MA1_CLK_L2 4,8
SCL 6
SDA 6
C110
C110
VCC3
C0.1u16Y0402
C0.1u16Y0402
VDDR_VREF
MEM_MA_DM[7..0]4,6
MEM_MA_ADD[15..0]4,6,8
MEM_MA_DQS_H[7..0]4,6
MEM_MA_DQS_L[7..0]4,6
MEM_MA_DATA[63..0]4,6
D D
MEM_MA_DATA0
MEM_MA_DATA1
MEM_MA_DATA2
MEM_MA_DATA3
MEM_MA_DATA4
MEM_MA_DATA5
MEM_MA_DATA6
MEM_MA_DATA7
MEM_MA_DATA8
MEM_MA_DATA9
MEM_MA_DATA10
MEM_MA_DATA11
MEM_MA_DATA12
MEM_MA_DATA13
MEM_MA_DATA14
MEM_MA_DATA15
MEM_MA_DATA16
MEM_MA_DATA17
MEM_MA_DATA18
MEM_MA_DATA19
MEM_MA_DATA20
MEM_MA_DATA21
MEM_MA_DATA22
MEM_MA_DATA23
MEM_MA_DATA24
MEM_MA_DATA25
MEM_MA_DATA26
MEM_MA_DATA27
MEM_MA_DATA28
MEM_MA_DATA29
MEM_MA_DATA30
MEM_MA_DATA31
MEM_MA_DATA32
MEM_MA_DATA33
C C
B B
MEM_MA_DATA34
MEM_MA_DATA35
MEM_MA_DATA36
MEM_MA_DATA37
MEM_MA_DATA38
MEM_MA_DATA39
MEM_MA_DATA40
MEM_MA_DATA41
MEM_MA_DATA42
MEM_MA_DATA43
MEM_MA_DATA44
MEM_MA_DATA45
MEM_MA_DATA46
MEM_MA_DATA47
MEM_MA_DATA48
MEM_MA_DATA49
MEM_MA_DATA50
MEM_MA_DATA51
MEM_MA_DATA52
MEM_MA_DATA53
MEM_MA_DATA54
MEM_MA_DATA55
MEM_MA_DATA56
MEM_MA_DATA57
MEM_MA_DATA58
MEM_MA_DATA59
MEM_MA_DATA60
MEM_MA_DATA61
MEM_MA_DATA62
MEM_MA_DATA63
DIMM4
DIMM4
10
122
123
128
129
12
13
21
22
131
132
140
141
24
25
30
31
143
144
149
150
33
34
39
40
152
153
158
159
80
81
86
87
199
200
205
206
89
90
95
96
208
209
214
215
98
99
107
108
217
218
226
227
110
111
116
117
229
230
235
236
11
14
17
20
23
26
29
32
35
38
41
44
47
50
65
66
79
82
85
88
91
94
97
VCC_DDR
102
68
19
55
3
4
9
2
5
8
DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQ8
DQ9
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
DQ16
DQ17
DQ18
DQ19
DQ20
DQ21
DQ22
DQ23
DQ24
DQ25
DQ26
DQ27
DQ28
DQ29
DQ30
DQ31
DQ32
DQ33
DQ34
DQ35
DQ36
DQ37
DQ38
DQ39
DQ40
DQ41
DQ42
DQ43
DQ44
DQ45
DQ46
DQ47
DQ48
DQ49
DQ50
DQ51
DQ52
DQ53
DQ54
DQ55
DQ56
DQ57
DQ58
DQ59
DQ60
DQ61
DQ62
DQ63
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
NC2
NC1
RC118RC0
VDD51VDD56VDD62VDD72VDD78VDD
NC/TEST
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
100
103
106
109
112
115
118
121
124
170
191
194
181
175
75
VDD
VDD
VDD
VDD
VDDQ
VDDQ53VDDQ59VDDQ64VDDQ
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
127
130
133
136
139
142
145
148
151
154
157
MEM_MB_DQS_H[7..0]4,6
MEM_MB_DQS_L[7..0]4,6
170
191
194
181
175
75
VDD
VDD
VDD
VDD
VDDQ
VDDQ53VDDQ59VDDQ64VDDQ
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
124
127
130
133
136
139
142
145
148
151
154
157
197
172
187
VDDQ
VDDQ69VDDQ
VSS
VSS
VSS
160
163
166
169
VDDQ
VSS
VCC3
C107
C107
X_C0.1u16Y0402
X_C0.1u16Y0402
184
189
67
178
VDDQ
VDDQ
VSS
VSS
VSS
198
201
204
207
VDDQ
VSS
210
VSS
238
VDDSPD
VSS
VSS
213
216
CB042CB143CB248CB349CB4
VSS
VSS
VSS
219
222
225
228
161
162
167
168
CB5
CB6
CB7
DQS0
DQS0#
DQS1
DQS1#
DQS2
DQS2#
DQS3
DQS3#
DQS4
DQS4#
DQS5
DQS5#
DQS6
DQS6#
DQS7
DQS7#
DQS8
DQS8#
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10_AP
A11
A12
A13
A14
A15
A16/BA2
BA1
BA0
WE#
CAS#
RAS#
DM0/DQS9
NC/DQS9#
DM1/DQS10
NC/DQS10#
DM2/DQS11
NC/DQS11#
DM3/DQS12
NC/DQS12#
DM4/DQS13
NC/DQS13#
DM5/DQS14
NC/DQS14#
DM6/DQS15
NC/DQS15#
DM7/DQS16
NC/DQS16#
DM8/DQS17
NC/DQS17#
ODT0
ODT1
CKE0
CKE1
CS0#
CS1#
CK0(DU)
CK0#(DU)
CK1(CK0)
CK1#(CK0#)
CK2(DU)
CK2#(DU)
SCL
SDA
VREF
X1
SA0
SA1
SA2
X2
X3
VSS
VSS
VSS
VSS
DDRII-240_ORANGE-RH
DDRII-240_ORANGE-RH
231
234
237
7
6
16
15
28
27
37
36
84
83
93
92
105
104
114
113
46
45
188
183
63
182
61
60
180
58
179
177
70
57
176
196
174
173
MEM_MB_BANK2
54
MEM_MB_BANK1
190
MEM_MB_BANK0
71
MEM_MB_WE_L
73
MEM_MB_CAS_L
74
MEM_MB_RAS_L
192
125
126
134
135
146
147
155
156
202
203
211
212
223
224
232
233
164
165
195
77
52
171
193
76
185
186
137
138
220
221
120
119
1
X1
239
240
101
X2
X3
MEM_MB_DQS_H0
MEM_MB_DQS_L0
MEM_MB_DQS_H1
MEM_MB_DQS_L1
MEM_MB_DQS_H2
MEM_MB_DQS_L2
MEM_MB_DQS_H3
MEM_MB_DQS_L3
MEM_MB_DQS_H4
MEM_MB_DQS_L4
MEM_MB_DQS_H5
MEM_MB_DQS_L5
MEM_MB_DQS_H6
MEM_MB_DQS_L6
MEM_MB_DQS_H7
MEM_MB_DQS_L7
MEM_MB_ADD0
MEM_MB_ADD1
MEM_MB_ADD2
MEM_MB_ADD3
MEM_MB_ADD4
MEM_MB_ADD5
MEM_MB_ADD6
MEM_MB_ADD7
MEM_MB_ADD8
MEM_MB_ADD9
MEM_MB_ADD10
MEM_MB_ADD11
MEM_MB_ADD12
MEM_MB_ADD13
MEM_MB_ADD14
MEM_MB_ADD15
MEM_MB_DM0
MEM_MB_DM1
MEM_MB_DM2
MEM_MB_DM3
MEM_MB_DM4
MEM_MB_DM5
MEM_MB_DM6
MEM_MB_DM7
MEM_MB1_ODT0
MEM_MB_CKE1
MEM_MB1_CS_L0
MEM_MB1_CS_L1
MEM_MB1_CLK_H0
MEM_MB1_CLK_L0
MEM_MB1_CLK_H1
MEM_MB1_CLK_L1
MEM_MB1_CLK_H2
MEM_MB1_CLK_L2
SCL
SDA
VCC3
MEM_MB_BANK2 4,6,8
MEM_MB_BANK1 4,6,8
MEM_MB_BANK0 4,6,8
MEM_MB_WE_L 4,6,8
MEM_MB_CAS_L 4,6,8
MEM_MB_RAS_L 4,6,8
MEM_MB1_ODT0 4,8
MEM_MB_CKE1 4,8
MEM_MB1_CS_L0 4,8
MEM_MB1_CS_L1 4,8
MEM_MB1_CLK_H0 4,8
MEM_MB1_CLK_L0 4,8
MEM_MB1_CLK_H1 4,8
MEM_MB1_CLK_L1 4,8
MEM_MB1_CLK_H2 4,8
MEM_MB1_CLK_L2 4,8
C109
C109
C0.1u16Y0402
C0.1u16Y0402
VDDR_VREF
ADDRESS A4
A A
5
4
3
ADDRESS A6
MSIK
MSIK
MSIK
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
MS-7508 0A
MS-7508 0A
MS-7508 0A
Custom
Custom
Custom
Date: Sheet
Date: Sheet of
2
Date: Sheet of
1
of
735Tuesday, October 16, 2007
735Tuesday, October 16, 2007
735Tuesday, October 16, 2007

5
4
3
2
1
MEM_MA_ADD15
VTT_DDR
VCC_DDR
MEM_MA_ADD14
MEM_MA_ADD13
MEM_MA_ADD12
MEM_MA_ADD11
MEM_MA_ADD10
MEM_MA_ADD9
MEM_MA_ADD8
MEM_MA_ADD7
MEM_MA_ADD6
MEM_MA_ADD5
MEM_MA_ADD4
MEM_MA_ADD3
MEM_MA_ADD2
MEM_MA_ADD1
MEM_MA_ADD0
MEM_MA_CAS_L
MEM_MA_WE_L
MEM_MA_RAS_L
MEM_MA_BANK2
MEM_MA_BANK1
MEM_MA_BANK0
VTT_DDR
C161
C161
C0.1u16Y0402
C0.1u16Y0402
C615
C615
X_C0.1u16Y0402
X_C0.1u16Y0402
MEM_MA0_CLK_H24,6
D D
MEM_MA_CKE04,6
MEM_MA_ADD154,6,7
MEM_MA_ADD144,6,7
MEM_MA_BANK24,6,7
MEM_MB_ADD04,6,7
MEM_MB_BANK14,6,7
MEM_MB_ADD104,6,7
MEM_MB_BANK04,6,7
MEM_MA_ADD84,6,7
MEM_MA_ADD64,6,7
MEM_MA_ADD54,6,7
MEM_MA_ADD44,6,7
MEM_MB_ADD34,6,7
MEM_MB_ADD14,6,7
MEM_MB_ADD24,6,7
MEM_MA_ADD24,6,7
MEM_MB_WE_L4,6,7
MEM_MB_CAS_L4,6,7
MEM_MA1_CS_L04,7
MEM_MA0_CS_L04,6
MEM_MB_CKE14,7
C C
B B
A A
MEM_MB_CKE04,6
MEM_MB_ADD154,6,7
MEM_MB_ADD144,6,7
MEM_MB1_ODT04,7
MEM_MA_ADD134,6,7
MEM_MB1_CS_L14,7
MEM_MA1_CS_L14,7
MEM_MB1_CS_L04,7
MEM_MB0_CS_L04,6
MEM_MA_BANK04,6,7
MEM_MA_RAS_L4,6,7
MEM_MB_BANK24,6,7
MEM_MB_ADD124,6,7
MEM_MB_ADD94,6,7
MEM_MB_ADD114,6,7
MEM_MA_ADD124,6,7
MEM_MA_ADD94,6,7
MEM_MA_ADD114,6,7
MEM_MA_ADD74,6,7
MEM_MB_ADD54,6,7
MEM_MB_ADD44,6,7
MEM_MA_ADD34,6,7
MEM_MA_ADD14,6,7
MEM_MB_RAS_L4,6,7
MEM_MA_ADD04,6,7
MEM_MA_BANK14,6,7
MEM_MA_ADD104,6,7
MEM_MA_WE_L4,6,7
MEM_MB0_ODT04,6
MEM_MA_CAS_L4,6,7
MEM_MA0_ODT04,6
MEM_MA_CKE14,7
MEM_MB_ADD74,6,7
MEM_MB_ADD84,6,7
MEM_MB_ADD64,6,7
MEM_MA1_ODT04,7
MEM_MA0_CS_L14,6
MEM_MB_ADD134,6,7
MEM_MB0_CS_L14,6
MEM_MA_CKE0
MEM_MA_ADD15
MEM_MA_ADD14
MEM_MA_BANK2
MEM_MB_ADD0
MEM_MB_BANK1
MEM_MB_ADD10
MEM_MB_BANK0
MEM_MA_ADD8
MEM_MA_ADD6
MEM_MA_ADD5
MEM_MA_ADD4
MEM_MB_ADD3
MEM_MB_ADD1
MEM_MB_ADD2
MEM_MA_ADD2
MEM_MB_WE_L
MEM_MB_CAS_L
MEM_MA1_CS_L0
MEM_MA0_CS_L0
MEM_MB_CKE1
MEM_MB_CKE0
MEM_MB_ADD15
MEM_MB_ADD14
MEM_MB1_ODT0
MEM_MA_ADD13
MEM_MB1_CS_L1
MEM_MA1_CS_L1
MEM_MB1_CS_L0
MEM_MB0_CS_L0
MEM_MA_BANK0
MEM_MA_RAS_L
MEM_MB_BANK2
MEM_MB_ADD12
MEM_MB_ADD9
MEM_MB_ADD11
MEM_MA_ADD12
MEM_MA_ADD9
MEM_MA_ADD11
MEM_MA_ADD7
MEM_MB_ADD5
MEM_MB_ADD4
MEM_MA_ADD3
MEM_MA_ADD1
MEM_MB_RAS_L
MEM_MA_ADD0
MEM_MA_BANK1
MEM_MA_ADD10
MEM_MA_WE_L
MEM_MB0_ODT0
MEM_MA_CAS_L
MEM_MA0_ODT0
MEM_MA_CKE1
MEM_MB_ADD7
MEM_MB_ADD8
MEM_MB_ADD6
MEM_MA1_ODT0
MEM_MA0_CS_L1
MEM_MB_ADD13
MEM_MB0_CS_L1
5
RN2 8P4R-47R0402RN2 8P4R-47R0402
1
3
5
7
RN3 8P4R-47R0402RN3 8P4R-47R0402
1
3
5
7
1
3
5
7
RN5 8P4R-47R0402RN5 8P4R-47R0402
1
3
5
7
RN6 8P4R-47R0402RN6 8P4R-47R0402
1
3
5
7
RN7 8P4R-47R0402RN7 8P4R-47R0402
1
3
5
7
RN8 8P4R-47R0402RN8 8P4R-47R0402
1
3
5
7
RN9 8P4R-47R0402RN9 8P4R-47R0402
1
3
5
7
RN10 8P4R-47R0402RN10 8P4R-47R0402
1
3
5
7
RN11 8P4R-47R0402RN11 8P4R-47R0402
1
3
5
7
RN12 8P4R-47R0402RN12 8P4R-47R0402
1
3
5
7
RN13 8P4R-47R0402RN13 8P4R-47R0402
1
3
5
7
RN14 8P4R-47R0402RN14 8P4R-47R0402
1
3
5
7
RN15 8P4R-47R0402RN15 8P4R-47R0402
1
3
5
7
RN16 8P4R-47R0402RN16 8P4R-47R0402
1
3
5
7
VTT_DDR
2
4
6
8
2
4
6
8
2
4
6
8
2
4
6
8
2
4
6
8
2
4
6
8
2
4
6
8
2
4
6
8
VTT_DDR
2
4
6
8
2
4
6
8
2
4
6
8
2
4
6
8
2
4
6
8
2
4
6
8
2
4
6
8
MEM_MA0_CLK_L24,6
MEM_MA0_CLK_H14,6
MEM_MA0_CLK_L14,6
MEM_MA0_CLK_H04,6
MEM_MA0_CLK_L04,6
MEM_MB0_CLK_H24,6
MEM_MB0_CLK_L24,6
MEM_MB0_CLK_H14,6
MEM_MB0_CLK_L14,6
MEM_MB0_CLK_H04,6
MEM_MB0_CLK_L04,6
MEM_MA1_CLK_H24,7
MEM_MA1_CLK_L24,7
MEM_MA1_CLK_H14,7
MEM_MA1_CLK_L14,7
MEM_MA1_CLK_H04,7
MEM_MA1_CLK_L04,7
MEM_MB1_CLK_H24,7
MEM_MB1_CLK_L24,7
MEM_MB1_CLK_H14,7
MEM_MB1_CLK_L14,7
MEM_MB1_CLK_H04,7
MEM_MB1_CLK_L04,7
4
MEM_MA0_CLK_H2
MEM_MA0_CLK_L2
MEM_MA0_CLK_H1
MEM_MA0_CLK_L1
MEM_MA0_CLK_H0
MEM_MA0_CLK_L0
MEM_MB0_CLK_H2
MEM_MB0_CLK_L2
MEM_MB0_CLK_H1
MEM_MB0_CLK_L1
MEM_MB0_CLK_H0
MEM_MB0_CLK_L0
MEM_MA1_CLK_H2
MEM_MA1_CLK_L2
MEM_MA1_CLK_H1
MEM_MA1_CLK_L1
MEM_MA1_CLK_H0
MEM_MA1_CLK_L0
MEM_MB1_CLK_H2
MEM_MB1_CLK_L2
MEM_MB1_CLK_H1
MEM_MB1_CLK_L1
MEM_MB1_CLK_H0
MEM_MB1_CLK_L0
C119
C119
C1.5p50N0402
C1.5p50N0402
C136
C136
C1.5p50N0402
C1.5p50N0402
C151
C151
C1.5p50N0402
C1.5p50N0402
C158
C158
C1.5p50N0402
C1.5p50N0402
C159
C159
C1.5p50N0402
C1.5p50N0402
C160
C160
C1.5p50N0402
C1.5p50N0402
C177
C177
C1.5p50N0402
C1.5p50N0402
C178
C178
C1.5p50N0402
C1.5p50N0402
C179
C179
C1.5p50N0402
C1.5p50N0402
C180
C180
C1.5p50N0402
C1.5p50N0402
C181
C181
C1.5p50N0402
C1.5p50N0402
C182
C182
C1.5p50N0402
C1.5p50N0402
3
C111 C22p50N0402C111 C22p50N0402
C113 C22p50N0402C113 C22p50N0402
C115 C22p50N0402C115 C22p50N0402
C117 C22p50N0402C117 C22p50N0402
C120 C22p50N0402C120 C22p50N0402
C122 C22p50N0402C122 C22p50N0402
C124 C22p50N0402C124 C22p50N0402
C126 C22p50N0402C126 C22p50N0402
C128 C22p50N0402C128 C22p50N0402
C130 C22p50N0402C130 C22p50N0402
C132 C22p50N0402C132 C22p50N0402
C134 C22p50N0402C134 C22p50N0402
C137 C22p50N0402C137 C22p50N0402
C139 C22p50N0402C139 C22p50N0402
C141 C22p50N0402C141 C22p50N0402
C143 C22p50N0402C143 C22p50N0402
C145 C22p50N0402C145 C22p50N0402
C147 C22p50N0402C147 C22p50N0402
C149 C22p50N0402C149 C22p50N0402
C152 C22p50N0402C152 C22p50N0402RN4 8P4R-47R0402RN4 8P4R-47R0402
C154 C22p50N0402C154 C22p50N0402
C156 C22p50N0402C156 C22p50N0402
Decoupling Between Processor and DIMMs
Layout: Spread out on VTT pour
C164
C162
C162
C0.1u16Y0402
C0.1u16Y0402
C612
C612
C627
C627
X_C0.1u16Y0402
X_C0.1u16Y0402
C654
C654
X_C0.1u16Y0402
X_C0.1u16Y0402
C173
C173
C0.1u16Y0402
C0.1u16Y0402
X_C0.1u16Y0402
X_C0.1u16Y0402
C625
C625
X_C0.1u16Y0402
X_C0.1u16Y0402
C649
C649
X_C0.1u16Y0402
X_C0.1u16Y0402
C613
C613
X_C0.1u16Y0402
X_C0.1u16Y0402
C163
C163
C626
C626
X_C0.1u16Y0402
X_C0.1u16Y0402
C652
C652
X_C0.1u16Y0402
X_C0.1u16Y0402
C0.1u16Y0402
C0.1u16Y0402
C611
C611
X_C0.1u16Y0402
X_C0.1u16Y0402
C622
C622
X_C0.1u16Y0402
X_C0.1u16Y0402
C648
C648
X_C0.1u16Y0402
X_C0.1u16Y0402
C164
C0.1u16Y0402
C0.1u16Y0402
C614
C614
X_C0.1u16Y0402
X_C0.1u16Y0402
C633
C633
X_C0.1u16Y0402
X_C0.1u16Y0402
C165
C165
C0.1u16Y0402
C0.1u16Y0402
C610
C610
C631
C631
C653
C653
X_C0.1u16Y0402
X_C0.1u16Y0402
C166
C166
C0.1u16Y0402
C0.1u16Y0402
C621
C621
X_C0.1u16Y0402
X_C0.1u16Y0402
X_C0.1u16Y0402
X_C0.1u16Y0402
C630
C630
X_C0.1u16Y0402
X_C0.1u16Y0402
C647
C647
X_C0.1u16Y0402
X_C0.1u16Y0402
C618
C618
C632
C632
X_C0.1u16Y0402
X_C0.1u16Y0402
C660
C660
X_C0.1u16Y0402
X_C0.1u16Y0402
for EMI
2
C174
C174
C619
C619
X_C0.1u16Y0402
X_C0.1u16Y0402
X_C0.1u16Y0402
X_C0.1u16Y0402
C658
C658
X_C0.1u16Y0402
X_C0.1u16Y0402
MEM_MB_ADD15
MEM_MB_ADD14
MEM_MB_ADD13
MEM_MB_ADD12
MEM_MB_ADD11
MEM_MB_ADD10
MEM_MB_ADD9
MEM_MB_ADD8
MEM_MB_ADD7
MEM_MB_ADD6
MEM_MB_ADD5
MEM_MB_ADD4
MEM_MB_ADD3
MEM_MB_ADD2
MEM_MB_ADD1
MEM_MB_ADD0
MEM_MB_CAS_L
MEM_MB_WE_L
MEM_MB_RAS_L
MEM_MB_BANK2
MEM_MB_BANK1
MEM_MB_BANK0
C168
C168
X_C0.1u16Y0402
X_C0.1u16Y0402
X_C0.1u16Y0402
X_C0.1u16Y0402
C617
C617
X_C0.1u16Y0402
X_C0.1u16Y0402
X_C0.1u16Y0402
X_C0.1u16Y0402
C657
C657
X_C0.1u16Y0402
X_C0.1u16Y0402
C112 C22p50N0402C112 C22p50N0402
C114 C22p50N0402C114 C22p50N0402
C116 C22p50N0402C116 C22p50N0402
C118 C22p50N0402C118 C22p50N0402
C121 C22p50N0402C121 C22p50N0402
C123 C22p50N0402C123 C22p50N0402
C125 C22p50N0402C125 C22p50N0402
C127 C22p50N0402C127 C22p50N0402
C129 C22p50N0402C129 C22p50N0402
C131 C22p50N0402C131 C22p50N0402
C133 C22p50N0402C133 C22p50N0402
C135 C22p50N0402C135 C22p50N0402
C138 C22p50N0402C138 C22p50N0402
C140 C22p50N0402C140 C22p50N0402
C142 C22p50N0402C142 C22p50N0402
C144 C22p50N0402C144 C22p50N0402
C146 C22p50N0402C146 C22p50N0402
C148 C22p50N0402C148 C22p50N0402
C150 C22p50N0402C150 C22p50N0402
C153 C22p50N0402C153 C22p50N0402
C155 C22p50N0402C155 C22p50N0402
C157 C22p50N0402C157 C22p50N0402
C169
C169
C175
C175
X_C0.1u16Y0402
X_C0.1u16Y0402
X_C0.1u16Y0402
X_C0.1u16Y0402
C616
C616
C620
C620
X_C0.1u16Y0402
X_C0.1u16Y0402
X_C0.1u16Y0402
X_C0.1u16Y0402
C656
C656
X_C0.1u16Y0402
X_C0.1u16Y0402
MSIK
MSIK
MSIK
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet
Date: Sheet
VCC_DDRVCC_DDR
C176
C176
C172
C172
X_C0.1u16Y0402
X_C0.1u16Y0402
X_C0.1u16Y0402
X_C0.1u16Y0402
VCC_DDR
VTT_DDR
C167
C167
C171
C171
C170
C170
VCC_DDR
C628
C628
C629
C629
X_C1000p16X0402
X_C1000p16X0402
X_C1000p16X0402
X_C1000p16X0402
MS-7508 0A
MS-7508 0A
MS-7508 0A
1
X_C100p16X0402
X_C100p16X0402
X_C100p16X0402
X_C100p16X0402
C623
C623
X_C1000p16X0402
X_C1000p16X0402
835Tuesday, October 16, 2007
835Tuesday, October 16, 2007
835Tuesday, October 16, 2007
X_C100p16X0402
X_C100p16X0402
C624
C624
X_C1000p16X0402
X_C1000p16X0402
of
of
of

5
4
3
2
1
HT_CADIN_H[15..0]3
HT_CADIN_L[15..0]3
HT_CADOUT_H[15..0]3
HT_CADOUT_L[15..0]3
D D
C C
VCC_DDR
VCC_DDR
R5
R5
R6
R6
300R0402
300R0402
300R0402
300R0402
B B
NB_CORE_1.1V
HT_CADIN_H[15..0]
HT_CADIN_L[15..0]
HT_CADOUT_H[15..0]
HT_CADOUT_L[15..0]
HT_CTLOUT_H13
HT_CTLOUT_L13
CPU_PROCHOT#
CPU_THRIP#
L2 L0402L2 L0402
HT_CADOUT_H0
HT_CADOUT_H1
HT_CADOUT_H2
HT_CADOUT_H3
HT_CADOUT_H4
HT_CADOUT_H5
HT_CADOUT_H6
HT_CADOUT_H7
HT_CADOUT_H8
HT_CADOUT_H9
HT_CADOUT_H10
HT_CADOUT_H11
HT_CADOUT_H12
HT_CADOUT_H13
HT_CADOUT_H14
HT_CADOUT_H15
HT_CADOUT_L0
HT_CADOUT_L1
HT_CADOUT_L2
HT_CADOUT_L3
HT_CADOUT_L4
HT_CADOUT_L5
HT_CADOUT_L6
HT_CADOUT_L7
HT_CADOUT_L8
HT_CADOUT_L9
HT_CADOUT_L10
HT_CADOUT_L11
HT_CADOUT_L12
HT_CADOUT_L13
HT_CADOUT_L14
HT_CADOUT_L15
HT_CLKOUT_H03
HT_CLKOUT_L03
HT_CLKOUT_H13
HT_CLKOUT_L13
HT_CTLOUT_H03
HT_CTLOUT_L03
1.1V_PLL_CPU_HT
CPU_PROCHOT#3
CPU_THRIP#3
C184
C184
X_C1u6.3X50402-1
X_C1u6.3X50402-1
HT_CTLOUT_H1
HT_CTLOUT_L1
R34 150R1%0402R34 150R1%0402
R35 150R1%0402R35 150R1%0402
CPU_PROCHOT#
CPU_THRIP#
1.1V_PLL_CPU_HT
C185
C185
C0.1u16X0402-2
C0.1u16X0402-2
AG8
HT_MCP_RXD0_P
AG9
HT_MCP_RXD1_P
AK9
HT_MCP_RXD2_P
AJ10
HT_MCP_RXD3_P
AG12
HT_MCP_RXD4_P
AG13
HT_MCP_RXD5_P
AK13
HT_MCP_RXD6_P
AJ14
HT_MCP_RXD7_P
AB10
HT_MCP_RXD8_P
AD10
HT_MCP_RXD9_P
AF10
HT_MCP_RXD10_P
AC12
HT_MCP_RXD11_P
AB11
HT_MCP_RXD12_P
AB13
HT_MCP_RXD13_P
AF14
HT_MCP_RXD14_P
AE14
HT_MCP_RXD15_P
AH8
HT_MCP_RXD0_N
AH9
HT_MCP_RXD1_N
AJ9
HT_MCP_RXD2_N
AH10
HT_MCP_RXD3_N
AH12
HT_MCP_RXD4_N
AH13
HT_MCP_RXD5_N
AJ13
HT_MCP_RXD6_N
AH14
HT_MCP_RXD7_N
AC10
HT_MCP_RXD8_N
AE10
HT_MCP_RXD9_N
AG10
HT_MCP_RXD10_N
AD12
HT_MCP_RXD11_N
AC11
HT_MCP_RXD12_N
AB12
HT_MCP_RXD13_N
AG14
HT_MCP_RXD14_N
AD14
HT_MCP_RXD15_N
AJ11
HT_MCP_RX_CLK0_P
AH11
HT_MCP_RX_CLK0_N
AE12
HT_MCP_RX_CLK1_P
AF12
HT_MCP_RX_CLK1_N
AJ15
HT_MCP_RXCTL0_P
AH15
HT_MCP_RXCTL0_N
AB14
RESERVED35
AC14
RESERVED36
AB9
HT_MCP_COMP_VDD
AB8
HT_MCP_COMP_GND
AD8
PROCHOT/GPIO20#
AE8
THERMTRIP/GPIO58#
AC15
+1.1V_PLL_CPU_HT
AB15
+1.1V_PLL_CPU
U3A
U3A
SEC 1 OF 8
SEC 1 OF 8
HT_MCP_TXD0_P
HT_MCP_TXD1_P
HT_MCP_TXD2_P
HT_MCP_TXD3_P
HT_MCP_TXD4_P
HT_MCP_TXD5_P
HT_MCP_TXD6_P
HT_MCP_TXD7_P
HT_MCP_TXD8_P
HT_MCP_TXD9_P
HT_MCP_TXD10_P
HT_MCP_TXD11_P
HT_MCP_TXD12_P
HT_MCP_TXD13_P
HT_MCP_TXD14_P
HT_MCP_TXD15_P
HT_MCP_TXD0_N
HT_MCP_TXD1_N
HT_MCP_TXD2_N
HT_MCP_TXD3_N
HT_MCP_TXD4_N
HT_MCP_TXD5_N
HT_MCP_TXD6_N
HT_MCP_TXD7_N
HT_MCP_TXD8_N
HT_MCP_TXD9_N
HT_MCP_TXD10_N
HT_MCP_TXD11_N
HT_MCP_TXD12_N
HT_MCP_TXD13_N
HT_MCP_TXD14_N
HT_MCP_TXD15_N
HT_MCP_TX_CLK0_P
HT_MCP_TX_CLK0_N
HT_MCP_TX_CLK1_P
HT_MCP_TX_CLK1_N
HT_MCP_TXCTL0_P
HT_MCP_TXCTL0_N
RESERVED33
RESERVED34
HT_MCP_REQ#
HT_MCP_STOP#
HT_MCP_RST#
HT_MCP_PWRGD
CLKOUT_200MHZ_P
CLKOUT_200MHZ_N
CPU_SBVREF
CLKOUT_25MHZ
CLK200_TERM_GND
AH23
AH22
AJ21
AH21
AH19
AH18
AJ17
AH17
AF22
AB20
AC20
AE20
AD18
AF18
AB17
AC16
AJ23
AJ22
AK21
AG21
AJ19
AJ18
AK17
AG17
AG22
AB19
AD20
AF20
AE18
AG18
AB16
AD16
AH20
AG20
AC18
AB18
AH16
AG16
AE16
AF16
AH25
AH24
AG23
AG24
AK25
AJ25
AF24
AK26
AJ26
HT_CADIN_H0
HT_CADIN_H1
HT_CADIN_H2
HT_CADIN_H3
HT_CADIN_H4
HT_CADIN_H5
HT_CADIN_H6
HT_CADIN_H7
HT_CADIN_H8
HT_CADIN_H9
HT_CADIN_H10
HT_CADIN_H11
HT_CADIN_H12
HT_CADIN_H13
HT_CADIN_H14
HT_CADIN_H15
HT_CADIN_L0
HT_CADIN_L1
HT_CADIN_L2
HT_CADIN_L3
HT_CADIN_L4
HT_CADIN_L5
HT_CADIN_L6
HT_CADIN_L7
HT_CADIN_L8
HT_CADIN_L9
HT_CADIN_L10
HT_CADIN_L11
HT_CADIN_L12
HT_CADIN_L13
HT_CADIN_L14
HT_CADIN_L15
R33 10KR0402R33 10KR0402
TP22TP22
R36 2.37KR1%0402R36 2.37KR1%0402
HT_CLKIN_H0 3
HT_CLKIN_L0 3
HT_CLKIN_H1 3
HT_CLKIN_L1 3
HT_CTLIN_H0 3
HT_CTLIN_L0 3
HT_CTLIN_H1 3
HT_CTLIN_L1 3
LDT_STOP# 3
LDT_RST# 3
LDT_PWRGD 3,22
CPU_CLK 3
CPU_CLK# 3
VCC3
NB_CORE_1.1V
C183
C183
C0.1u16X0402-2
C0.1u16X0402-2
NB_CORE_1.1V
L3 L0402L3 L0402
+1.1V_PLL_CPU
C187
C187
X_C4.7u6.3X5
X_C4.7u6.3X5
C186
C186
C0.1u16X0402-2
C0.1u16X0402-2
+1.1V_PLL_CPU
A A
MSIK
MSIK
MSIK
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
MS-7508 0A
MS-7508 0A
MS-7508 0A
Custom
Custom
Custom
Date: Sheet
Date: Sheet
5
4
3
2
Date: Sheet
935Tuesday, October 16, 2007
935Tuesday, October 16, 2007
935Tuesday, October 16, 2007
of
of
1
of

A
4 4
+12V
R37
R37
3 3
VCC3
Q1 N-2N7002_SOT23
Q1 N-2N7002_SOT23
R39 X_0RR39 X_0R
10KR0402
10KR0402
R38 100KR0402R38 100KR0402
G
G
S
S
D
D
C188
C188
X_C4.7u6.3X5
X_C4.7u6.3X5
HDMI_3.3V_PLL_HVDD
C189
C189
C0.1u16X0402
C0.1u16X0402
VCC3
C196
2 2
C196
C0.1u16X0402
C0.1u16X0402
NB_CORE_1.1V
B
NB_CORE_1.1V
L5 L0402L5 L0402
C
U3B
U3B
SEC 2 OF 8
PE0_RX0_P018
PE0_RX0_P118
PE0_RX0_P218
PE0_RX0_P318
PE0_RX0_P418
PE0_RX0_P518
PE0_RX0_P618
PE0_RX0_P718
PE0_RX0_P818
PE0_RX0_P918
PE0_RX0_P1018
PE0_RX0_P1118
PE0_RX0_P1218
PE0_RX0_P1318
PE0_RX0_P1418
PE0_RX0_P1518
PE0_RX0_N018
PE0_RX0_N118
PE0_RX0_N218
PE0_RX0_N318
PE0_RX0_N418
PE0_RX0_N518
PE0_RX0_N618
PE0_RX0_N718
PE0_RX0_N818
PE0_RX0_N918
PE0_RX0_N1018
PE0_RX0_N1118
PE0_RX0_N1218
PE0_RX0_N1318
PE0_RX0_N1418
PE0_RX0_N1518
PE0_RX0_P0
PE0_RX0_P1
PE0_RX0_P2
PE0_RX0_P3
PE0_RX0_P4
PE0_RX0_P5
PE0_RX0_P6
PE0_RX0_P7
PE0_RX0_P8
PE0_RX0_P9
PE0_RX0_P10
PE0_RX0_P11
PE0_RX0_P12
PE0_RX0_P13
PE0_RX0_P14
PE0_RX0_P15
PE0_RX0_N0
PE0_RX0_N1
PE0_RX0_N2
PE0_RX0_N3
PE0_RX0_N4
PE0_RX0_N5
PE0_RX0_N6
PE0_RX0_N7
PE0_RX0_N8
PE0_RX0_N9
PE0_RX0_N10
PE0_RX0_N11
PE0_RX0_N12
PE0_RX0_N13
PE0_RX0_N14
PE0_RX0_N15
PE_WAKE#18
TP23TP23
HDMI_3.3V_PLL_HVDD
PE0_PRSNTX16#18 HDMI_DVI_TXD_N0 28
L4 L0402L4 L0402
C191
C191
C190
C190
C0.1u16X0402
C0.1u16X0402
X_C4.7u6.3X5
X_C4.7u6.3X5
R49 X_0R0402R49 X_0R0402
C193
C193
C0.1u16X0402
C0.1u16X0402
nvidia new checklist suggest remove
H23
PE0_RX0_P
H25
PE0_RX1_P
K22
PE0_RX2_P
K24
PE0_RX3_P
K26
PE0_RX4_P
M22
PE0_RX5_P
M23
PE0_RX6_P
M26
PE0_RX7_P
P22
PE0_RX8_P
P26
PE0_RX9_P
P25
PE0_RX10_P
T23
PE0_RX11_P
T26
PE0_RX12_P
U23
PE0_RX13_P
V24
PE0_RX14_P
V27
PE0_RX15_P
H24
PE0_RX0_N
H26
PE0_RX1_N
K23
PE0_RX2_N
K25
PE0_RX3_N
K27
PE0_RX4_N
L22
PE0_RX5_N
M24
PE0_RX6_N
M25
PE0_RX7_N
P23
PE0_RX8_N
P27
PE0_RX9_N
P24
PE0_RX10_N
T24
PE0_RX11_N
T25
PE0_RX12_N
V23
PE0_RX13_N
V25
PE0_RX14_N
V26
PE0_RX15_N
B22
PE_WAKE/GPIO21#
AF27
+3.3V_HDMI_PLL_HVDD
AF28
HDCP_ROM_SCLK
AE26
+3.3V_HDMI
AF29
PE0_PRSNTX16#
W22
+1.1V_PLL_PE_SS1
Y22
+1.1V_PLL_DPPLL
U22
+1.1V_PLL_PE1
V22
+1.1V_DP_VDD
SEC 2 OF 8
PE0_TX0_P
PE0_TX1_P
PE0_TX2_P
PE0_TX3_P
PE0_TX4_P
PE0_TX5_P
PE0_TX6_P
PE0_TX7_P
PE0_TX8_P
PE0_TX9_P
PE0_TX10_P
PE0_TX11_P
PE0_TX12_P
PE0_TX13_P
PE0_TX14_P
PE0_TX15_P
PE0_TX0_N
PE0_TX1_N
PE0_TX2_N
PE0_TX3_N
PE0_TX4_N
PE0_TX5_N
PE0_TX6_N
PE0_TX7_N
PE0_TX8_N
PE0_TX9_N
PE0_TX10_N
PE0_TX11_N
PE0_TX12_N
PE0_TX13_N
PE0_TX14_N
PE0_TX15_N
PE0_REFCLK_P
PE0_REFCLK_N
HDMI_TXD0_N
HDMI_TXD0_P
PE_RESET#
PE_CLK_COMP
+3.3V_DLL_HT
RESERVED2
G29
H27
J27
J30
K29
L29
M27
N27
N30
P29
R29
T27
U27
U30
V29
W29
G28
H28
J28
J29
K28
L28
M28
N28
N29
P28
R28
T28
U28
U29
V28
W28
Y24
Y23
AC24
AC25
AH29
AJ30
R22
T22
PE0_TX0_P0
PE0_TX0_P1
PE0_TX0_P2
PE0_TX0_P3
PE0_TX0_P4
PE0_TX0_P5
PE0_TX0_P6
PE0_TX0_P7
PE0_TX0_P8
PE0_TX0_P9
PE0_TX0_P10
PE0_TX0_P11
PE0_TX0_P12
PE0_TX0_P13
PE0_TX0_P14
PE0_TX0_P15
PE0_TX0_N0
PE0_TX0_N1
PE0_TX0_N2
PE0_TX0_N3
PE0_TX0_N4
PE0_TX0_N5
PE0_TX0_N6
PE0_TX0_N7
PE0_TX0_N8
PE0_TX0_N9
PE0_TX0_N10
PE0_TX0_N11
PE0_TX0_N12
PE0_TX0_N13
PE0_TX0_N14
PE0_TX0_N15
HDMI_DVI_TXD_N0
HDMI_DVI_TXD_P0
PE_RESET# 18,20
PE_CLK_COMP
C195
C195
HDMI_DVI_TXD_P0 28
R40 2.37KR1%0402R40 2.37KR1%0402
D
PE0_REFCLK 18
PE0_REFCLK# 18
L6 L0402L6 L0402
PE0_TX0_P0 18
PE0_TX0_P1 18
PE0_TX0_P2 18
PE0_TX0_P3 18
PE0_TX0_P4 18
PE0_TX0_P5 18
PE0_TX0_P6 18
PE0_TX0_P7 18
PE0_TX0_P8 18
PE0_TX0_P9 18
PE0_TX0_P10 18
PE0_TX0_P11 18
PE0_TX0_P12 18
PE0_TX0_P13 18
PE0_TX0_P14 18
PE0_TX0_P15 18
PE0_TX0_N0 18
PE0_TX0_N1 18
PE0_TX0_N2 18
PE0_TX0_N3 18
PE0_TX0_N4 18
PE0_TX0_N5 18
PE0_TX0_N6 18
PE0_TX0_N7 18
PE0_TX0_N8 18
PE0_TX0_N9 18
PE0_TX0_N10 18
PE0_TX0_N11 18
PE0_TX0_N12 18
PE0_TX0_N13 18
PE0_TX0_N14 18
PE0_TX0_N15 18
VCC3
E
1 1
A
B
C
C0.1u16X0402
C0.1u16X0402
MSIK
MSIK
MSIK
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
MS-7508 0A
MS-7508 0A
MS-7508 0A
Custom
Custom
Custom
Date: Sheet
Date: Sheet
D
Date: Sheet
E
of
of
of
10 35Tuesday, October 16, 2007
10 35Tuesday, October 16, 2007
10 35Tuesday, October 16, 2007

5
4
3
2
1
D D
PE1_RX_P18
PE1_RX_N18
PE1394_RXP20
PE1394_RXN20
PE1_RX_P
PE1_RX_N
AB29
AB28
Y28
Y27
AK29
PE1_PRSNT#18
RN45
RN45
1
3
5
7
8P4R-0R0402
8P4R-0R0402
MIIRXER
MIICOL
MIICRS
2
4
6
8
MIIRXER
MIICOL
RN41
RN41
1
3
5
7
X_8P4R-0R0402
X_8P4R-0R0402
2
4
6
8
MII_RXER17
MII_COL17
MII_CRS17
C C
MII_RXER
MII_COL
MII_CRS MIICRS
1.1VDUAL
L8 X_60L3A-40L8 X_60L3A-40
CP4CP4
1 2
C200
C200
X_C4.7u6.3X5
X_C4.7u6.3X5
B B
DAC_RED27
DAC_GREEN27
DAC_BLUE27
R56
R56
150R1%0402
150R1%0402
HDMI_DVI_TXD_N128
HDMI_DVI_TXD_P128
HDMI_DVI_DDC_DATA28
HDMI_DVI_DDC_CLK28
HDMI_DVI_DETECT28
3VDUAL
C201
C201
C0.1u16X0402
C0.1u16X0402
R57
R57
150R1%0402
150R1%0402
RGMII_RXD017
RGMII_RXD117
RGMII_RXD217
RGMII_RXD317
RGMII_RXCLK17
RGMII_RXCTL17
R241 X_10KR0402R241 X_10KR0402
R275 10KR0402R275 10KR0402
3VDUAL
R53 0R0402R53 0R0402
R54 0R0402R54 0R0402
R55 0R0402R55 0R0402
R58
R58
Auguest 2007 checklist suggestion
150R1%0402
150R1%0402
VCC3
L9 X_60L3A-40L9 X_60L3A-40
CP6CP6
1 2
C207
C207
X_C4.7u6.3X5
X_C4.7u6.3X5
A A
C206
C206
C0.1u16X0402
C0.1u16X0402
PE1_PRSNT#
R41 1KR1%0402R41 1KR1%0402
RGMII_RXD0
RGMII_RXD1
RGMII_RXD2
RGMII_RXD3
RGMII_RXCLK
RGMII_RXCTL
R50 49.9R1%0402R50 49.9R1%0402
R51
R51
49.9R1%0402
49.9R1%0402
DAC_HSYNC27
DAC_VSYNC27
DAC_RSET
R60
R60
X_124R1%0402
X_124R1%0402
MIIRXER
MIICOL
MIICRS
MII_COM_GND
RGMII_INTR#
MII_COM_3P3V
DAC_VREF
C203
C203
X_C0.1u16X0402
X_C0.1u16X0402
AG28
AG30
AC27
AC26
AD27
AD28
AE30
AE29
AJ29
AG29
AH30
G24
D26
E26
B26
B27
A26
C26
D24
E24
F23
B23
C23
D30
D29
C30
B30
C29
B29
A29
F28
U3C
U3C
PE1_RX_P
PE1_RX_N
PE2_RX_P
PE2_RX_N
PEA_CLKREQ/GPIO51#
PE1_PRSNT#
PE2_PRSNT#
HDMI_TXD1_N
HDMI_TXD1_P
PE3_RX_P
PE3_RX_N
HDMI_DDC_DATA
HDMI_DDC_CLK
HDMI_RSET
PE3_PRSNT#
HPLUG_DET3
RGMII_RXD0/MII_RXD0
RGMII_RXD1/MII_RXD1
RGMII_RXD2/MII_RXD2
RGMII_RXD3/MII_RXD3
RGMII_RXCLK/MII_RXCLK
RGMII_RXCTL/MII_RXDV
MII_RXER/GPIO36
MII_COL/GPIO13/MI2C_DATA
MII_CRS/GPIO14/MI2C_CLK
RGMII/MII_INTR/GPIO35
M9
+1.1V_PLL_MAC_DUAL
MII_COMP_3P3V
MII_COMP_GND
DAC_RED
DAC_GREEN
DAC_BLUE
DAC_HSYNC
DAC_VSYNC
DAC_RSET
DAC_VREF
+3.3V_DAC
SEC 3 OF 8
SEC 3 OF 8
PE1_REFCLK_P
PE1_REFCLK_N
PE2_REFCLK_P
PE2_REFCLK_N
HDMI_TXC0_P
HDMI_TXC0_N
PE3_REFCLK_P
PE3_REFCLK_N
HDMI_TXD2_N
HDMI_TXD2_P
RGMII_TXD0/MII_TXD0
RGMII_TXD1/MII_TXD1
RGMII_TXD2/MII_TXD2
RGMII_TXD3/MII_TXD3
RGMII_TXCLK/MII_TXCLK
RGMII_TXCTL/MII_TXEN
RGMII/MII_MDC
RGMII/MII_MDIO
RGMII/MII_PWRDWN/GPIO37
MII_RESET/GPIO12#
DDC_CLK/GPIO17
DDC_DATA/GPIO19
JTAG_TRST#
XTALOUT_RTC
PE1_TX_P
PE1_TX_N
PE2_TX_P
PE2_TX_N
PE3_TX_P
PE3_TX_N
BUF_25MHZ
MII_VREF
JTAG_TCK
JTAG_TDI
JTAG_TDO
JTAG_TMS
XTALIN
XTALOUT
XTALIN_RTC
AA28
AA27
PE1394TXP
AA30
PE1394TXN
AA29
PE1_REFCLK_P
Y26
PE1_REFCLK_N
Y25
CK_PE_100M_1394P
AB23
CK_PE_100M_1394N
AA23
AC29
AC28
AE27
AE28
AB24
AB25
AB27
AB26
A28
B28
D28
E27
SB_RGMII_TXCLK
D27
SB_RGMII_TXCTL
E28
B25
A25
F24
BUF_LANCLK25M
C24
C25
C27
B6
A6
M7
M5
M6
M8
L9
K7
K8
K6
K5
C208
C208
C18p50N0402
C18p50N0402
PE1_TX_P
PE1_TX_N
C198 C0.1u16X0402C198 C0.1u16X0402
C199 C0.1u16X0402C199 C0.1u16X0402
RGMII_TXD0
RGMII_TXD1
RGMII_TXD2
RGMII_TXD3
R509 33R0402R509 33R0402
R510 33R0402R510 33R0402
RGMII_MDC
RGMII_MDIO
R48 22R0402R48 22R0402
RGMII_RESET#
RGMII_VREF
R59 10KR0402R59 10KR0402
R515 X_15KR0402R515 X_15KR0402
C204
C204
C22p50N04020
C22p50N04020
Y2
Y2
1 2
32.768KHZ12.5P_D-LF
32.768KHZ12.5P_D-LF
4
3
C209
C209
C18p50N0402
C18p50N0402
HDMI_DVI_TXCLK 28
HDMI_DVI_TXCLK# 28
HDMI_DVI_TXD_N2 28
HDMI_DVI_TXD_P2 28
VGA_DDC_CLK 27
VGA_DDC_DATA 27
Y1
Y1
12
25MHZ18P_D-4
25MHZ18P_D-4
PE1394_TXP
PE1394_TXN
PE1_REFCLK_P 18
PE1_REFCLK_N 18
CK_PE_100M_1394P 20
CK_PE_100M_1394N 20
RGMII_TXCLK
RGMII_TXCTL
RGMII_MDC 17
RGMII_MDIO 17
RGMII_LAN25CLK 17
RGMII_RESET# 17
RGMII_VREF
C205
C205
C22p50N04020
C22p50N04020
PE1_TX_P 18
PE1_TX_N 18
PE1394_TXP 20
PE1394_TXN 20
RGMII_TXD0 17
RGMII_TXD1 17
RGMII_TXD2 17
RGMII_TXD3 17
RGMII_TXCLK 17
RGMII_TXCTL 17
3VDUAL
C202
C202
C0.1u16X0402
C0.1u16X0402
R43
R43
1KR1%0402
1KR1%0402
R44
R44
1KR1%0402
1KR1%0402
MSIK
MSIK
MSIK
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
MS-7508 0A
MS-7508 0A
MS-7508 0A
Custom
Custom
Custom
Date: Sheet
Date: Sheet
5
4
3
2
Date: Sheet
11 35Tuesday, October 16, 2007
11 35Tuesday, October 16, 2007
11 35Tuesday, October 16, 2007
of
of
1
of