MSI MS-7507 Schematic 0A

1
1Cover Sheet Block Diagram/Clock Map/Power Map Intel LGA775 CPU Intel Lakeport - MCH Intel ICH7 - PCI & DMI & CPU & IRQ Intel ICH7 - LPC & ATA & USB & GPIO 13 Intel ICH7 - POWER Clock - RTM 876-660 LPC I/O - Fintek 71882FG Azalia - ALC888 LAN REALTEK RTL8111C/8101E DDR II System Memory DDR II VTT Decoupling PCI EXPRESS X16&X1 Slot PCI Slot 1 & 2
A A
JMicron 1394 ATA33/66/100 IDE & SATA Connectors VGA Connector USB Connectors ATX Connetcor & Front Panel FWH uPI ACPI
2-4 5-7
8-11
12
14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29
Version 0A
MS-7507
CPU:
Intel Prescott ( L2=2MB ) - 3.4G & Above Intel Cendar Mill (65nm) - 3.73G & Above Intel Smithfield (90nm Dual core) Intel Conroe (65W Dual core)
System Chipset:
Intel Lakeport - MCH (North Bridge) Intel ICH7R (South Bridge)
On Board Chipset:
BIOS -- SPI HD -- ALC888 LPC Super I/O -- F71882FG LAN-- REALTEK RTL8111C Co-lay RTL8101E CLOCK -- RTM876-660
Main Memory:
DDR II *2 (Max 2GB)
Expansion Slots:
PCI2.3 SLOT * 2 PCI EXPRESS X1 SLOT PCI EXPRESS X16 SLOT
VRM 11
30
ST PWM:
1
Controller: 3 PHASES
MICRO-STAR INT'L CO.,LTD
MICRO-STAR INT'L CO.,LTD
MICRO-STAR INT'L CO.,LTD
MS-7507
MS-7507
MSI
MSI
MSI
Size Document Description Rev
Size Document Description Rev
Size Document Description Rev
Custom
Custom
Custom
Date:
Wednesday, August 29, 2007
Date:
Wednesday, August 29, 2007
Date:
Wednesday, August 29, 2007
Cover Sheet
Cover Sheet
Cover Sheet
MS-7507
Sheet of
Sheet of
Sheet of
0A
0A
0A
Block Diagram
1
VRM 10.1 RT6703 3-Phase PWM
Analog
RGB
Video Out
UltraDMA 33/66/100
IDE Primary
A A
SATA 0~3
SATA
USB
USB Port 0~7
Intel LGA775 Processor
FSB 533/800
133/200 MHz
FSB
Lakeport GMCH
DMI
ICH7
DDR2 400/533
DDRII
200/266 MHz
PCI
2DDR II DIMM Modules
PCI EXPRESS X16
PCI Slot 1
PCI Slot 2
PCI EXPRESS X16 Connector
AC'97
LPC Bus
ALC888
PCI
LPC SIO
RTL8111C
SPI
SPI
Fintek F71882F
EEPROM
FWH
Keyboard
Mouse
1
Floopy Parallel Serial
MICRO-STAR INT'L CO.,LTD
MICRO-STAR INT'L CO.,LTD
MICRO-STAR INT'L CO.,LTD
MS-7507
MS-7507
MSI
MSI
MSI
Size Document Description Rev
Size Document Description Rev
Size Document Description Rev
Custom
Custom
Custom
Date:
Wednesday, August 29, 2007
Date:
Wednesday, August 29, 2007
Date:
Wednesday, August 29, 2007
MS-7507
BLOCK DIAGRAM
BLOCK DIAGRAM
BLOCK DIAGRAM
Sheet of
Sheet of
Sheet of
234
234
234
0A
0A
0A
5
4
3
2
1
CLOCK MAP
D D
HCLK
LGA775
MCHCLK
DOT96M
945GC
DDRCLKA
CH A
CH B
DDRCLKB
PCIECLK
C C
RTM876-660
PCIECLK SATACLK
ICHCLK
USB48MHz
ICH7
ICH14.318MHz
SIO48MHz
33MHz
Fintek SIO
HDCLK 24M
 ALC888
B B
TPMCLK_33M
TPM
PCIELAN_100M
RTL8111C
PCIEX16 100MHz
PCIEX1 100MHz
A A
PCICLK[0..1]
33MHz
5
4
PCIE X 16
PCIE X 1
PCI1
PCI2
3
MICRO-STAR INT'L CO.,LTD
MICRO-STAR INT'L CO.,LTD
MICRO-STAR INT'L CO.,LTD
MS-7507
MS-7507
MSI
MSI
MSI
Size Document Description Rev
Size Document Description Rev
Size Document Description Rev
Custom
Custom
Custom
CLOCK MAP
CLOCK MAP
CLOCK MAP
Date:
Wednesday, August 29, 2007
Date:
Wednesday, August 29, 2007
Date:
2
Wednesday, August 29, 2007
MS-7507
1
Sheet of
Sheet of
Sheet of
334
334
334
0A
0A
0A
5
4
3
2
1
Processor
0.8375-1.6000V Core-125A
1.2V FSB Vtt-5.3A VCCPLL VCC-IOPLL & VCCA
D D
L6703 Regulator
VCCP
0.8375-1.6000V
W83310DS Regula
VTT_DDR
0.9V
DDR2 DIMM conn(4) & term
0.9V SM Vtt-1.2A(S0)
945G/P MCH
1.2V FSB Vtt-0.9A
1.8V DDR2 I/O-4.4A(S0,S1)
VTT Regulator
V_FSB_VTT
1.2V
1.8V DDR2 I/O-25mA(S3)
0.9V DDR2 VREF-2mA
0.9V DDR2 SB_VREF-10uA DDR2 Resister Comp V-36mA DDR2 Resis Comp SB_V-10uA
Divider
R
uP6103 Regulator
VCC_DDR
1.8V
1.5V Core-13.8A(Integrated)
1.5V Core-8.9A(Discrete)
1.5V PCI Express&DMI-1.5A
1.5V PCIE&DMI PLL-45mA
1.5V HOST PLL-45mA
C C
1.5V VCCA_DPLLA&B-55mA
uP6103 Regulator
V_1P5_CORE
1.5V
1.5V MPLL-66mA
2.5V DAC-70mA*
2.5V HV-3mA
2.5V CMOS-2.0mA
uP7707 Regulator
V_2P5_MCH
2.5V
1.8V Vdd/vddq-4.7A(S0,S1)
PCIE X16 slot(1)
+12V-5.5A +3.3Vaux-375mA(wake) +3.3Vaux-20mA(no wake) +3.3V-3.0A
PCIE X1 slot(1)
+12V-0.5A +3.3Vaux-375mA(wake) +3.3Vaux-20mA(no wake) +3.3V-3.0A
PCI slot slot(4)
+3.3Vaux-375mA(wake) +3.3Vaux-20mA(no wake) +3.3V-7.6A +5.0V-5.0A +12V-0.5A
ICH7
1.2V VCC_CPU-14mA
1.05V Core-0.86A VCC1_5A*-1.01A VCC1_5B*-0.77A 5VRef-6mA
R
1.05V Regulator
V_1P05_CORE
1.05V
5VrefSus-10mA +3.3V-0.33A RTC-6uA(G3)
B B
3.3V VccSus*-52mA VccSus1_05V-See Note 1
uP7706 Regulator
3VSB
3.3V
uP7501 Regulator
5VDIMM
5V
-12V-0.1A
USB
+5V-4A(S0,S1)
PS2
+5V-345mA(S0,S1)
CLKGEN
+3.3V-560mA VccUSBPLL-10mA VccDMIPLL-50mA VccSATAIPLL-50mA
L L
LAN
3VSB-
Battery
SIO
+3.3V
3VSB-
+5VSB+12V +5V +3.3V+12V
Audio Codec
SPI ROM
ATX
A A
2x2
5
4
ATX POWER
3
1394
MICRO-STAR INT'L CO.,LTD
MICRO-STAR INT'L CO.,LTD
MICRO-STAR INT'L CO.,LTD
MS-7507
MS-7507
MSI
MSI
MSI
Size Document Description Rev
Size Document Description Rev
Size Document Description Rev
Custom
Custom
Custom
Date:
Wednesday, August 29, 2007
Date:
Wednesday, August 29, 2007
Date:
2
Wednesday, August 29, 2007
MS-7507
LGA775 - Signal
LGA775 - Signal
LGA775 - Signal
1
Sheet of
Sheet of
Sheet of
434
434
434
0A
0A
0A
5
H_A#[3..31]8
D D
H_A#31
H_A#30
AJ6
AJ5
AH5
AH4
AG5
D53#
B15
C14
H_D#53
H_D#52
A35#
A34#
D52#
D51#
C15
H_D#51
A33#
D50#
A14
D17
H_D#50
H_D#49
A32#
A31#
D49#
D48#
D20
H_D#48
AG4
G22
H_D#47
U1A
U1A
H_TESTHI13
R0402_6
R12 X_0R0402R12 X_0R0402
R387
R387
X_1KR0402
X_1KR0402
H_DBI#0 H_DBI#1 H_DBI#2 H_DBI#3
H_TDI H_TDO H_TMS H_TRST# H_TCK PECI VTIN1 GNDHM H_TRMTRIP#
H_PROCHOT# H_IGNNE# ICH_H_SMI# H_A20M#
H_DBI#[0..3]8
H_IERR#6
H_FERR#12
H_STPCLK#12
H_INIT#12
H_DBSY#8
H_DRDY#8
H_TRDY#8
H_ADS#8
H_DEFER#8
H_TRMTRIP#12
H_PROCHOT#6
ICH_H_SMI#12
R11 X_0R0402R11 X_0R0402
Kentsfield
CPU_BSEL015 CPU_BSEL115 CPU_BSEL215
H_CPURST#6,8
H_D#[0..63]8
H_LOCK#8
H_BNR#8
H_HIT#8 H_HITM#8 H_BPRI#8
PECI16 VTIN116
GNDHM16
H_IGNNE#12
H_A20M#12
H_BPM#1
R19 X_51R0402R19 X_51R0402
H_PWRGD6,12
C C
H_CPUSLP#12
B B
A A
VTT_OUT_RIGHT
H_D#63 H_D#62 H_D#61 H_D#60 H_D#59 H_D#58 H_D#57 H_D#56 H_D#55 H_D#54
G11 D19 C20
AB2 AB3
AD3
AD1 AF1 AC1 AG1 AE1
AL1 AK1
AE8 AL2
AH2 AE6 D16
A20
AA2 G29
H30 G30
G23
B22 A22 A19 B19 B21 C21 B18 A17 B16 C18
A8
R3 M3
P3 H4
B2 C1 E3
D2 C3 C2 D4 E4 G8 G7
G5
M2
N2 P2 K3
L2
N5 C9
Y1 V2
N1
DBI0# DBI1# DBI2# DBI3#
IERR# MCERR# FERR#/PBE# STPCLK# BINIT# INIT# RSP#
DBSY# DRDY# TRDY#
ADS# LOCK# BNR# HIT# HITM# BPRI# DEFER#
TDI TDO TMS TRST# TCK PECI THERMDA THERMDC THERMTRIP# GND/SKTOCC# PROCHOT# IGNNE# SMI# A20M# TESTI_13
RSVD#AH2 RESERVED0 RESERVED1 RESERVED2 RESERVED4 RESERVED5
BOOTSELECT LL_ID0 LL_ID1
BSEL0 BSEL1 BSEL2
PWRGOOD RESET#
D63# D62# D61# D60# D59# D58# D57# D56# D55# D54#
4
CPU SIGNAL BLOCK PULL HIGHT PULL DOWN
H_A#8
H_A#10
H_A#5
H_A#6
H_A#7
H_A#3
H_A#29
AG6
A30#
A29#
D47#
D46#
D22
H_D#46
H_A#28
H_A#27
AF4
AF5
A28#
D45#
E22
G21
H_D#45
H_D#44
H_A#26
AB4
A27#
A26#
D44#
D43#
F21
H_D#43
H_A#24
H_A#25
AC5
AB5
A25#
D42#
F20
E21
H_D#42
H_D#41
H_A#23
AA5
A24#
A23#
D41#
D40#
E19
H_D#40
H_A#22
H_A#21
AD6
AA4
A22#
D39#
F18
E18
H_D#39
H_D#38
H_A#20
H_A#19
A21#
A20#Y4A19#Y6A18#W6A17#
D38#
D37#
D36#
F17
G17
H_D#37
H_D#36
H_A#18
H_A#17
H_A#16
H_A#15
AB6
A16#W5A15#V4A14#V5A13#U4A12#U5A11#T4A10#
D35#
D34#
D33#
D32#
E16
E15
G18
G16
H_D#32
H_D#33
H_D#34
H_D#35
H_A#13
H_A#14
D31#
F15
G15
H_D#30
H_D#31
H_A#12
D30#
D29#
G14
H_D#29
H_A#11
F14
H_D#28
H_A#9
U6
A9#T5A8#R4A7#M4A6#L4A5#M5A4#P6A3#
D28#
D27#
D26#
D25#
F12
E13
D13
G13
H_D#24
H_D#25
H_D#26
H_D#27
D24#
D23#
F11
H_D#22
H_D#23
D10
H_A#4
L5
AC2
D22#
D21#
D20#D7D19#E9D18#F9D17#F8D16#G9D15#
E10
H_D#18
H_D#19
H_D#20
H_D#21
AN4
AN3
AN5
DBR#
VSS_SENSE
VCC_SENSE
VCC_MB_REGULATION
D14#
D11
C12
H_D#14
H_D#15
H_D#16
H_D#17
3
VID5
VID7
VID6
AJ3
AK3
AM7
AM5
D12#D8D11#
C11
H_D#11
H_D#12
ITP_CLK1
ITP_CLK0
D10#
D9#
B10
A11
H_D#8
H_D#9
H_D#10
A10
AL4
VID6
VID5
RSVD/VID7
D8#
D7#A7D6#B7D5#B6D4#A5D3#C6D2#A4D1#C5D0#
H_D#6
H_D#7
AN6
VSS_MB_REGULATION
D13#
B12
H_D#13
VCC_SENSE
C1
C1 X_C10u16X51206-RH
X_C10u16X51206-RH
VSS_SENSE
VID[0..7] 31
VID2
VID3
VID1
VID4
VID0
AK4
AL6
AM3
AL5
AM2
VID4
VID3
VID2
VID1
VID0
VID_SELECT
GTLREF_SEL
FC5/CPU_GTLREF2
RSVD/CPU_GTLREF3
H_D#1
H_D#2
H_D#3
H_D#4
H_D#5
AN7 H1
GTLREF0
H2
GTLREF1
H29 E24
GTLREF2
F2 G10
AG3
BPM5#
AF2
BPM4#
AG2
BPM3#
AD2
BPM2#
AJ1
BPM1#
AJ2
BPM0#
J6
REQ4#
K6
REQ3#
M6
REQ2#
J5
REQ1#
K4
REQ0#
W2
TESTHI12
P1
TESTHI11
H5
TESTHI10
G4
TESTHI9
G3
TESTHI8
F24
TESTHI7
G24
TESTHI6
G26
TESTHI5
G27
TESTHI4
G25
TESTHI3
F25
TESTHI2
W3
TESTHI1
F26
TESTHI0
AK6
FORCEPH
G6
RSVD#G6
G28
BCLK1#
F28
BCLK0#
A3
RS2#
F5
RS1#
B3
RS0#
U3
AP1#
U2
AP0#
F3
BR0#
T2
COMP5
J2
COMP4
R1
COMP3
G2
COMP2
T1
COMP1
A13
COMP0
J17
DP3#
H16
DP2#
H15
DP1#
J16
DP0#
AD5
ADSTB1#
R6
ADSTB0#
C17
DSTBP3#
G19
DSTBP2#
E12
DSTBP1#
B9
DSTBP0#
A16
DSTBN3#
G20
DSTBN2#
G12
DSTBN1#
C8
DSTBN0#
L1
LINT1/NMI
K1
LINT0/INTR
B4
ZIF-SOCK775-15U-IN,ZIF-SOCK775-15U-IN_TH
ZIF-SOCK775-15U-IN,ZIF-SOCK775-15U-IN_TH
H_D#0
VCC_SENSE 31
VSS_SENSE 31
VTT_OUT_RIGHT
R1
R1 1KR1%0402
1KR1%0402
CPU_GTLREF0 CPU_GTLREF1 GTLREF_SEL MCH_GTLREF_CPU CPU_GTLREF2 CPU_GTLREF3
H_BPM#5 H_BPM#4 H_BPM#3 H_BPM#2 H_BPM#1 H_BPM#0
H_REQ#4 H_REQ#3 H_REQ#2 H_REQ#1 H_REQ#0
H_TESTHI12 H_TESTHI11 H_TESTHI10
H_TESTHI8
H_TESTHI2_7 H_TESTHI1
H_TESTHI0 FORCEPH RSVD_G6
H_RS#2 H_RS#1 H_RS#0
TEST-U3 TEST-U2
H_COMP5 H_COMP4 H_COMP3 H_COMP2 H_COMP1 H_COMP0
TEST-J17 TEST-H16 TEST-H15 TEST-J16
VTT_OUT_RIGHT 6,7
VID_SEL 31 CPU_GTLREF0 6 CPU_GTLREF1 6
T1T1
MCH_GTLREF_CPU 8 CPU_GTLREF2 6 CPU_GTLREF3 6
H_BPM#0 7 H_REQ#[0..4] 8
H_TESTHI12 7
R2 X_0R0402R2 X_0R0402 R3 X_0R0402R3 X_0R0402
R0402_6
R4 51R0402R4 51R0402 R5 51R0402R5 51R0402
R6 X_130R1%0402R6 X_130R1%0402 R7 X_51R0402R7 X_51R0402
CK_H_CPU# 15 CK_H_CPU 15
H_RS#[0..2] 8
T2T2 T3T3
R16 49.9R1%0402R16 49.9R1%0402 R17 49.9R1%0402R17 49.9R1%0402
T4T4 T5T5 T6T6 T7T7
H_ADSTB#1 8 H_ADSTB#0 8 H_DSTBP#3 8 H_DSTBP#2 8 H_DSTBP#1 8 H_DSTBP#0 8 H_DSTBN#3 8 H_DSTBN#2 8 H_DSTBN#1 8 H_DSTBN#0 8 H_NMI 12 H_INTR 12
2
H_BPM#2H_TESTHI9 H_BPM#3
Kentsfield
V_FSB_VTT
VTT_OUT_RIGHT VTT_OUT_LEFT
C5
C5 C0.1u16Y0402
C0.1u16Y0402
V_FSB_VTT
H_BR#0 6,8 VTT_OUT_LEFT 6
VID5 VID4 VID2 VID0
VID7 VID3 VID6 VID1
H_BPM#1 H_BPM#0 H_BPM#5 H_BPM#3
H_TRST# H_BPM#4 H_TDO H_TCK
H_TDI H_BPM#2 H_TMS
H_TESTHI12 H_TESTHI11 H_TESTHI10 H_TESTHI9
H_TESTHI13 H_TESTHI8 H_TESTHI1
H_COMP1 H_COMP5 H_COMP3 H_COMP4
1
RN1
RN1 8P4R-680R0402-RH
8P4R-680R0402-RH
1
2
3
4
5
6
7
8
RN2
RN2 8P4R-680R0402-RH
8P4R-680R0402-RH
1
2
3
4
5
6
7
8
RN3
RN3 8P4R-51R0402
8P4R-51R0402
1
2
3
4
5
6
7
8
RN4
RN4 8P4R-51R0402
8P4R-51R0402
1
2
3
4
5
6
7
8
RN5
RN5 8P4R-51R0402
8P4R-51R0402
1
2
3
4
5
6
7
8
RN6 8P4R-51R0402RN6 8P4R-51R0402
1
2
3
4
5
6
7
8
RN14 8P4R-51R0402RN14 8P4R-51R0402
1
2
3
4
5
6
7
8
RN43
RN43 8P4R-49.9R1%-1
8P4R-49.9R1%-1
1 3 5 7
VTT_OUT_RIGHT
VTT_OUT_RIGHT
VTT_OUT_LEFT
VTT_OUT_LEFT
C4
C4 C0.1u16Y0402
C0.1u16Y0402
2 4 6 8
VTT_OUT_LEFT
MICRO-STAR INT'L CO.,LTD
MICRO-STAR INT'L CO.,LTD
MICRO-STAR INT'L CO.,LTD
MS-7507
MS-7507
MSI
MSI
MSI
Size Document Description Rev
Size Document Description Rev
Size Document Description Rev
Custom
Custom
Custom
Date:
Wednesday, August 29, 2007
Date:
Wednesday, August 29, 2007
Date:
5
4
3
2
Wednesday, August 29, 2007
MS-7507
LGA775 - Signal
LGA775 - Signal
LGA775 - Signal
1
534
534
534
Sheet of
Sheet of
Sheet of
0A
0A
0A
5
VCCP
AG30
AG29
AG28
AG27
AG26
AG25
AG22
AG21
AG19
AG18
AG15
AG14
AG12
AG11
AF9
AF8
AF22
AF21
U1B
AF19 AF18 AF15 AF14 AF12 AF11
AE23 AE22 AE21 AE19 AE18 AE15 AE14 AE12 AE11
AD30 AD29 AD28 AD27 AD26 AD25 AD24 AD23
AC30 AC29 AC28 AC27 AC26 AC25 AC24 AC23
AE9
AD8
AC8
AB8 AA8
VCCP
U1B
VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCCW8VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
Y8
Y30
Y23
Y24
Y25
Y26
Y27
Y28
Y29
W30
W29
W28
W27
W26
W25
W24
W23
VCCP
D D
C C
VCC
AG8
VCC
AG9
VCC
VCCU8VCCV8VCC
AH11
VCC
VCC
U30
AH12
VCC
VCC
U29
AH14
VCC
VCC
U28
AH15
VCC
VCC
U27
4
AH18
U26
VCC
VCC
AH19
U25
VCC
VCC
AH21
VCC
VCC
U24
AH22
VCC
U23
AH25
VCC
VCCT8VCC
AH26
T30
VCC
VCC
AH27
VCC
VCC
T29
AH28
VCC
VCC
T28
AH29
VCC
VCC
T27
AH30
VCC
VCC
T26
AH8
T25
VCC
VCC
AH9
T24
VCC
VCC
AJ11
T23
VCC
AJ12
VCC
AJ14
VCC
AJ15
VCC
VCCN8VCCP8VCCR8VCC
AJ18
N30
VCC
VCC
AJ19
N29
VCC
VCC
AJ21
N28
VCC
VCC
AJ22
N27
VCC
VCC
AJ25
VCC
VCC
N26
AJ26
N25
VCC
VCC
3
AJ8
AJ9
AK11
AK12
AK14
AK15
AK18
AK19
AK21
AK22
AK25
AK26
AK8
AK9
AL11
AL12
AL14
AL15
AL18
AL19
AL21
AL22
AL25
AL26
AL29
AL30
AL8
AL9
AM11
AM12
AM14
AM15
AM18
AM19
AM21
AM22
AM25
AM26
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCCJ8VCCJ9VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCCK8VCCL8VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCCM8VCC
VCC
J14
J15
J18
J19
J20
J21
J22
J23
J24
J25
J26
J27
J28
J29
J30
K23
K24
K25
K26
K27
K28
K29
N23
N24
M27
M28
M29
M30
K30
M23
M24
M25
M26
AM29
VCC
VCC
J13
AM30
VCC
VCC
J12
AM8
J11
VCC
VCC
AM9
VCC
VCC
J10
AN11
VCC
VCC
AN9
AN12
VCC
VCC
AN8
2
AN14
AN15
AN18
AN19
VCC
VCC
VCC
VCC
VTT_OUT_RIGHT
VTT_OUT_LEFT
VCC
VCC
VCC
VCC
AN25
AN26
AN29
AN30
AN21
AN22
VCC
VCC
VCCA
VSSA
VCCPLL
VCC-IOPLL
VTTPWRGD
VTT_SEL
RSVD#F29
H_VCCA
A23
H_VSSA
B23
H_VCCPLL
D23
H_VCCA
C23
A25
VTT
A26
VTT
A27
VTT
A28
VTT
A29
VTT
A30
VTT
B25
VTT
B26
VTT
B27
VTT
B28
VTT
B29
VTT
B30
VTT
C25
VTT
C26
VTT
C27
VTT
C28
VTT
C29
VTT
C30
VTT
D25
VTT
D26
VTT
D27
VTT
D28
VTT
D29
VTT
D30
VTT
VTT_PWG
AM6
VTT_OUT_RIGHT
AA1
VTT_OUT_LEFT
J1
VTT_SEL
F27 F29
ZIF-SOCK775-15U-IN,ZIF-SOCK775-15U-IN_TH
ZIF-SOCK775-15U-IN,ZIF-SOCK775-15U-IN_TH
V_FSB_VTT
1
V_FSB_VTT
C6
C10u10Y0805
C6
C10u10Y0805
C7
X_C10u10Y0805
C7
X_C10u10Y0805
CAPS FOR FSB GENERIC
VTT_SEL 28
*GTLREF VOLTAGE SHOULD BE 0.67 * VTT = 0.8V (At VTT=1.2V)
R26
R24
VTT_OUT_RIGHT
B B
VTT_OUT_RIGHT
R24
124R1%0402
124R1%0402
C9
C9 X_C10u6.3X51206-RH
X_C10u6.3X51206-RH
R32
R32
124R1%0402
124R1%0402
GTL_REF0 VTT_OUT_LEFT
R28
R28
210R1%0402
210R1%0402
GTL_REF1
R34
R34
210R1%0402
210R1%0402
R25
R25
10R1%0402
10R1%0402
C10
C10 C1u16Y
C1u16Y
R33
R33
10R1%0402
10R1%0402
C20
C20 C1u16Y
C1u16Y
CPU_GTLREF0 5
C11
C11 X_C220p50N0402
X_C220p50N0402
CPU_GTLREF1 5
C21
C21 X_C220p50N0402
X_C220p50N0402
V_FSB_VTT
R26
124R1%0402
124R1%0402
R30
R30
124R1%0402
124R1%0402
GTL_REF3
R29
R29
210R1%0402
210R1%0402
GTL_REF2
R35
R35
210R1%0402
210R1%0402
R27
R27
10R1%0402
10R1%0402
C12
C12 C1u16Y
C1u16Y
R31
R31
10R1%0402
10R1%0402
C22
C22 C1u16Y
C1u16Y
CPU_GTLREF2 5
C13
C13 X_C220p50N0402
X_C220p50N0402
CPU_GTLREF3 5
C23
C23 X_C220p50N0402
X_C220p50N0402
*PLACE COMPONENTS AS CLOSE AS POSSIBLE TO PROCESSOR SOCKET *TRACE WIDTH TO CAPS MUST BE NO SMALLER THAN 12MILS
V_FSB_VTT V_1P5_CORE
L1 X_10u100mA_0805-RHL1 X_10u100mA_0805-RH
21
CP2CP2
C14
C14 C1u16Y
C1u16Y
C15
C15 C10u10Y0805
C10u10Y0805
H_VCCA
C16
C16 X_C10u10Y0805
X_C10u10Y0805
H_VSSA
CP1CP1
H_VCCPLL
C17
C17 X_C1u16Y
X_C1u16Y
C18
C18 C0.01u16X0402
C0.01u16X0402
C19
C19 C10u10Y0805
C10u10Y0805
VTT_PWRGOOD
PLACE AT CPU END OF ROUTE
A A
VTT_OUT_RIGHT5,7
VTT_OUT_LEFT5
VTT_OUT_RIGHT H_PROCHOT#
VTT_OUT_LEFT
5
R36 130R1%0402R36 130R1%0402 R37 62R0402R37 62R0402
R38 62R0402R38 62R0402 R40 X_100R0402R40 X_100R0402 R42 62R0402R42 62R0402
H_IERR# H_CPURST#
H_PWRGD H_BR#0
H_PROCHOT# 5 H_IERR# 5
H_CPURST# 5,8 H_PWRGD 5,12 H_BR#0 5,8
4
VID_GD#28,31
3
VTT_OUT_RIGHT
R43 1KR0402R43 1KR0402
R39
R39 680R0402-RH
680R0402-RH
CE
B
Q2
Q2 N-MMBT3904_NL_SOT23
N-MMBT3904_NL_SOT23
2
VTT_PWG
VTT_PWG SPEC : High > 0.9V Low < 0.3V Trise < 150ns
MICRO-STAR INT'L CO.,LTD
MICRO-STAR INT'L CO.,LTD
MICRO-STAR INT'L CO.,LTD
MS-7507
MS-7507
MSI
MSI
MSI
Size Document Description Rev
Size Document Description Rev
Size Document Description Rev
Custom
Custom
Custom
Date:
Wednesday, August 29, 2007
Date:
Wednesday, August 29, 2007
Date:
Wednesday, August 29, 2007
MS-7507
LGA775 - Power
LGA775 - Power
LGA775 - Power
1
634
634
634
Sheet of
Sheet of
Sheet of
0A
0A
0A
5
U1C
U1C
VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS
1122334
VSSY7VSSY5VSSY2VSSW7VSSW4VSSV7VSSV6VSS
4
A12 A15
AA23 AA24 AA25 AA26 AA27 AA28 AA29
AA30
AB23 AB24 AB25 AB26 AB27 AB28 AB29 AB30
AC3 AC6 AC7 AD4
AD7 AE10 AE13 AE16 AE17
AE2 AE20 AE24 AE25 AE26 AE27 AE28 AE29 AE30
AE5
AE7 AF10 AF13 AF16 AF17 AF20 AF23 AF24 AF25 AF26 AF27 AF28 AF29
AF3 AF30
AF6
AF7
A18
A2
A21
A6 A9
AA3 AA6
AA7 AB1
AB7
D D
C C
B B
VSS
AG10
VSS
AG13
VSS
AG16
VSS
AG17
VSS
AG20
VSS
AG23
V30
VSS
AG24
VSSV3VSS
VSS
AG7
V29
AH1
V28
VSS
AH10
VSS
VSS
V27
VSS
VSS
AH13
V26
VSS
VSS
AH16
V25
VSS
VSS
AH17
V24
VSS
VSS
AH20
V23
VSS
VSS
AH23
4
U7
VSS
VSST7VSST6VSST3VSSR7VSSR5VSS
VSS
VSS
VSS
VSS
AH3
AH6
AH7
AH24
AJ10
VSS
AJ13
VSS
R30
AJ16
VSS
R29
AJ17
VSS
VSS
R28
AJ20
VSS
VSS
R27
AJ23
VSS
VSS
R26
AJ24
VSS
VSS
R25
AJ27
VSS
VSS
R24
VSS
VSS
AJ28
R23
VSS
VSSR2VSSP7VSSP4VSS
VSS
VSS
AJ29
AJ30
3
H19
H20
H21
H22
H23
H24
H25
H26
H27
VSS
AM17
VSS
AM20
VSS
AM23
VSS
AM24
VSS
AM27
VSSH3VSSH6VSSH7VSSH8VSSH9VSSJ4VSSJ7VSS
VSS
AM28
H28
AM4
VSS
VSS
AN1
VSS
VSS
VSS
VSS
AN10
VSS
VSS
AN13
VSS
VSS
AN16
VSS
VSS
AN17
AN2
VSS
VSS
VSS
VSS
AN20
AN23
VSS
VSS
VSS
VSS
AN24
P30
P29
P28
P27
P26
P25
P24
P23
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSSN7VSSN6VSSN3VSSM7VSSM1VSSL7VSSL6VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
AJ4
AJ7
AK2
AK10
AK13
AK16
AK17
AK20
AK23
AK24
AK27
VSS
AK28
VSS
AK29
AK30
VSS
L30
L29
L28
L27
VSSL3VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
AK5
AK7
AL10
AL13
AL16
AL17
AL20
AL23
L26
AL24
VSS
VSS
L25
AL27
VSS
VSS
L24
AL28
VSS
VSS
K2
L23
K5
VSS
VSSK7VSS
VSS
VSS
VSS
VSS
VSS
AL7
AM1
AM10
AM13
AM16
H18
VSS
VSS
AN27
H17
VSS
VSS
AN28
H14
VSS
VSSB1VSS
2
F7
H10
H11
H12
H13
VSS
VSS
VSS
VSS
VSS
Y3
COMP6
AE3
COMP7
B13 AE4
RSVD#AE4
D1
RSVD#D1
D14
RSVD#D14
E5
RSVD#E5
E6
RSVD#E6
E7
RSVD#E7
E23
RSVD#E23
F23
RSVD#F23
AL3
RSVD
J3
RSVD#J3
N4
RSVD#N4
P5
RSVD#P5
AC4
RSVD#AC4
F6
IMPSEL#
V1
MSID1
W1
MSID0
R0402_6
U1
FC28
G1
FC27
E29
FC26
A24
FC23
F4
VSS
F22
VSS
F19
VSS
F16
VSS
F13
VSS
F10
VSS
E8
VSS
E28
VSS
E27
VSS
E26
VSS
E25
VSS
E20
VSS
E2
VSS
E17
VSS
E14
VSS
E11
VSS
D9
VSS
D6
VSS
D5
VSS
D3
VSS
D24
VSS
D21
VSS
D18
VSS
D15
VSS
D12
VSS
C7
VSS
C4
VSS
C24
VSS
C22
VSS
C19
VSS
C16
VSS
C13
VSS
C10
VSS
B8
VSS
B5
VSS
VSS
VSS
ZIF-SOCK775-15U-IN,ZIF-SOCK775-15U-IN_TH
ZIF-SOCK775-15U-IN,ZIF-SOCK775-15U-IN_TH
B24
VSS
B11
B14
RSVD/COMP8
VSS
B17
B20
H_COMP6 H_COMP7 H_COMP8
1505 1477 1497
FC28 FC27
T8T8 T9T9 T10T10
R437 X_0R0402R437 X_0R0402
RN65 8P4R-51R0402RN65 8P4R-51R0402
1 3 5 7
R50 X_0R0402R50 X_0R0402 R51 X_0R0402R51 X_0R0402 R180 X_0R0402R180 X_0R0402 R52 X_1KR0402R52 X_1KR0402
05 Per FMB
05 Value FMB
R44 49.9R1%0402R44 49.9R1%0402 R45 49.9R1%0402R45 49.9R1%0402 R46 24.9R1%0402R46 24.9R1%0402
30.1ohm
Can cut
2 4 6 8
H_TESTHI12 H_BPM#0
1
VTT_OUT_RIGHT 5,6
FC28
R97 X_0R0402R97 X_0R0402
FC27
R120 X_0R0402R120 X_0R0402
H_TESTHI12 5 H_BPM#0 5
Kentsfield
MSID1 MSID0
0
0
0
1
MLCC
VCCP
C575
C575
X_C10U6.3Y1206
X_C10U6.3Y1206
A A
5
VCCP
C584
C584
C10U6.3Y1206
C10U6.3Y1206
4
(Place into CPU Socket Cavity)
C576
C576
C10U6.3Y1206
C10U6.3Y1206
C585
C585
C10U6.3Y1206
C10U6.3Y1206
C577
C577
X_C10U6.3Y1206
X_C10U6.3Y1206
C586
C586
X_C10U6.3Y1206
X_C10U6.3Y1206
C578
C578
C10U6.3Y1206
C10U6.3Y1206
C587
C587
C10U6.3Y1206
C10U6.3Y1206
C579
C579
C10U6.3Y1206
C10U6.3Y1206
C588
C588
X_C10U6.3Y1206
X_C10U6.3Y1206
3
C580
C580
C10U6.3Y1206
C10U6.3Y1206
C589
C589
C10U6.3Y1206
C10U6.3Y1206
MICRO-STAR INT'L CO.,LTD
MICRO-STAR INT'L CO.,LTD
MICRO-STAR INT'L CO.,LTD
MS-7507
MS-7507
MSI
MSI
MSI
Size Document Description Rev
Size Document Description Rev
Size Document Description Rev
Custom
Custom
Custom
Date:
Monday, September 10, 2007
Date:
Monday, September 10, 2007
Date:
2
Monday, September 10, 2007
MS-7507
LGA775 - GND
LGA775 - GND
LGA775 - GND
1
734
734
734
Sheet of
Sheet of
Sheet of
0A
0A
0A
5
N17
P17
P18
P20
VCC
VCC
VCC
P21
VCC
AA35
U2A
M34
M38
AA37
M36
AA41
W42
W41
W40
M31 M29
AJ12
M18
J39
K38
J42
K35
J37
N35 R33 N32 N34
N42 N37 N38 R32 R36 U37 R35 R38 V33 U34 U32 V42 U35 Y36 Y38
V32 Y34
V35 F38
D42 U39 U40
E41 D41 K36 G37 E42
U41 P40
U42 V41 Y40
T40 Y43 T43
AJ9 C30
A28 C27 B27
D27 D28
U2A
HA3# HA4# HA5# HA6# HA7# HA8# HA9# HA10# HA11# HA12# HA13# HA14# HA15# HA16# HA17# HA18# HA19# HA20# HA21# HA22# HA23# HA24# HA25# HA26# HA27# HA28# HA29# HA30# HA31#
HAD_STB0# HAD_STB1# HPCREQ#
HBREQ0# HBPRI#
HBNR# HLOCK# HADS# HREQ0#
HREQ1# HREQ2# HREQ3# HREQ4#
HHIT# HHITM# HDEFER#
HTRDY# HDBSY# HDRDY# HEDRDY#
RS0# RS1# RS2#
HCLKP HCLKN
PWROK HCPURST#
RSTIN# ICH_SYNC#
HRCOMP HSCOMP HSWING
HDVREF HACCVREF
H_A#[3..31]5
D D
H_ADSTB#05 H_ADSTB#15
C C
H_BNR#5
H_LOCK#5
H_ADS#5
H_REQ#[0..4]5
H_HIT#5 H_HITM#5 H_DEFER#5
H_TRDY#5 H_DBSY#5
H_DRDY#5
H_RS#[0..2]5
CK_H_MCH15
PLTRST#12,16
R53
R53
16.9R1%0402-RH
16.9R1%0402-RH
CK_H_MCH#15
CHIP_PWGD13,28
H_CPURST#5,6
B B
ICH_SYNC#13
H_A#3 H_A#4 H_A#5 H_A#6 H_A#7 H_A#8 H_A#9 H_A#10 H_A#11 H_A#12 H_A#13 H_A#14 H_A#15 H_A#16 H_A#17 H_A#18 H_A#19 H_A#20 H_A#21 H_A#22 H_A#23 H_A#24 H_A#25 H_A#26 H_A#27 H_A#28 H_A#29 H_A#30 H_A#31
H_BR#05,6
H_BPRI#5
H_REQ#0 H_REQ#1 H_REQ#2 H_REQ#3 H_REQ#4
TP1TP1
H_RS#0 H_RS#1 H_RS#2
ICH_SYNC#
HXRCOMP HXSCOMP HXSWING
MCH_GTLREF_CPU
AA22
AB21
VCC
VCC
RSVRD1
RSVRD2
AA42
AA34
AB22
AB23
VCC
VCC
RSVRD3
RSVRD4
L15
AA38
AC22
AD14
VCC
VCC
RSVRD5
RSVRD6
U27
M15
4
AF6
AF7
VCC
VCC
RSVRD7
RSVRD8
A43
R27
AF8
AF9
VCC
VCC
VCC
RSVRD9
RSVRD10
RSVRD11
M11
AG25
AF10
AF11
VCC
VCC
RSVRD12
RSVRD13
AG26
AG27
AF12
AF13
AF14
VCC
VCC
RSVRD14
RSVRD15
AJ24
AJ27
AK40
AF30
AG2
VCC
VCC
VCC
RSVRD16
RSVRD17
RSVRD18
AL39
AW17
AG3
AG4
VCC
VCC
RSVRD19
RSVRD20
AY14
AW18
V_1P5_CORE
AG5
AG6
AG7
AG8
AG9
VCC
VCC
VCC
VCC
RSVRD21
RSVRD22
RSVRD23
RSVRD24
Y30
Y33
BC16
AD30
AC34
AG10
AG11
VCC
VCC
VCC
RSVRD25
RSVRD26
RSVRD27
AF31
AD31
AG12
AG13
AG14
VCC
VCC
RSVRD28
RSVRD29
V31
U30
AA30
AH1
AH2
VCC
VCC
VCC
RSVRD31
RSVRD32
RSVRD30
AK21
AC30
AH4
AJ5
AJ13
VCC
VCC
RSVRD33
RSVRD34
AJ23
AJ26
AL29
AJ14
AK2
VCC
VCC
VCC
RSVRD35
RSVRD36
RSVRD37
AJ21
AL20
AK3
AK4
AK14
VCC
VCC
RSVRD38
RSVRD39
AJ29
AL26
AK27
3
AK15
AK20
VCC
VCC
VCC
RSVRD40
RSVRD41
RSVRD42
V30
AG29
2
R15
R17
R18
R20
R21
R23
R24
U15
U17
U18
U19
U20
U21
U22
U23
U24
U25
U26
V15
V17
V18
V19
V20
V21
V22
V23
V25
V27
W17
W18
W19
W20
W22
W24
W26
W27
Y15
VCC
VCC
NC1
BC43
VCC
NC2
BC42
BC2
VCC
NC3
BC1
VCC
NC4
VCC
NC5
BB43
M17
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
KDINV_0# HDINV_1# HDINV_2# HDINV_3#
HD_STBP0# HD_STBN0#
HD_STBP1# HD_STBN1#
HD_STBP2# HD_STBN2#
HD_STBP3#
NC6
NC7
NC8
NC9
NC10
NC11
NC12
NC13
NC14
NC15C2NC16
NC17
NC18
NC19B3NC20B2NC21
VCC
VCC
VCC
VCC
VCC
VCC
VCC
E35
B43
B42
B41
A42
Y17
Y18
Y19
Y21
Y23
Y25
BB2
BB1
C42
BA2
AW2
AV27
AV26
AW26
Y27
AA15
VCC
VCC
AA17
AA18
VCC
VCC
AA19
VCC
AA20
HD_STBN3#
[INTEL-945GC-A2[SLA9C]-RH]
[INTEL-945GC-A2[SLA9C]-RH]
V_1P5_CORE
HD0# HD1# HD2# HD3# HD4# HD5# HD6# HD7# HD8#
HD9# HD10# HD11# HD12# HD13# HD14# HD15# HD16# HD17# HD18# HD19# HD20# HD21# HD22# HD23# HD24# HD25# HD26# HD27# HD28# HD29# HD30# HD31# HD32# HD33# HD34# HD35# HD36# HD37# HD38# HD39# HD40# HD41# HD42# HD43# HD44# HD45# HD46# HD47# HD48# HD49# HD50# HD51# HD52# HD53# HD54# HD55# HD56# HD57# HD58# HD59# HD60# HD61# HD62# HD63#
P41 M39 P42 M42 N41 M40 L40 M41 K42 G39 J41 G42 G40 G41 F40 F43 F37 E37 J35 D39 C41 B39 B40 H34 C37 J32 B35 J34 B34 F32 L32 J31 H31 M33 K31 M27 K29 F31 H29 F29 L27 M24 J26 K26 G26 H24 K24 F24 E31 A33 E40 D37 C39 D38 D33 C35 D34 C34 B31 C31 C32 D32 B30 D30
K40 A38 E29 B32
K41 L43
F35 G34
J27 M26
E34 B37
H_D#0 H_D#1 H_D#2 H_D#3 H_D#4 H_D#5 H_D#6 H_D#7 H_D#8 H_D#9 H_D#10 H_D#11 H_D#12 H_D#13 H_D#14 H_D#15 H_D#16 H_D#17 H_D#18 H_D#19 H_D#20 H_D#21 H_D#22 H_D#23 H_D#24 H_D#25 H_D#26 H_D#27 H_D#28 H_D#29 H_D#30 H_D#31 H_D#32 H_D#33 H_D#34 H_D#35 H_D#36 H_D#37 H_D#38 H_D#39 H_D#40 H_D#41 H_D#42 H_D#43 H_D#44 H_D#45 H_D#46 H_D#47 H_D#48 H_D#49 H_D#50 H_D#51 H_D#52 H_D#53 H_D#54 H_D#55 H_D#56 H_D#57 H_D#58 H_D#59 H_D#60 H_D#61 H_D#62 H_D#63
H_DBI#0 H_DBI#1 H_DBI#2 H_DBI#3
H_DSTBP#0 5 H_DSTBN#0 5
H_DSTBP#1 5 H_DSTBN#1 5
H_DSTBP#2 5 H_DSTBN#2 5
H_DSTBP#3 5 H_DSTBN#3 5
1
H_D#[0..63] 5
H_DBI#[0..3] 5
R54
R54
60.4R1%0402
A A
V_FSB_VTT
60.4R1%0402
HXSCOMP
C36
C36 X_C2.2p50N0402
X_C2.2p50N0402
V_FSB_VTT
HD_SWING VOLTAGE "10 MIL TRACE , 7 MIL SPACE" HD_SWING S/B 1/3*VTT +/- 2%
R56
R56
301R1%0402
301R1%0402
R58
R58
62R0402
62R0402
R60
R60
84.5R1%0402-LF
84.5R1%0402-LF
HXSWING
C39
C39 C0.1u16Y0402
C0.1u16Y0402
PLACE DIVIDER RESISTOR NEAR VTT
5
4
V_FSB_VTT
GTLREF VOLTAGE SHOULD BE 0.63*VTT=0.756V
R55
R55
124 OHM OVER 210 RESISTORS
124R1%0402
124R1%0402
R59
R59
210R1%0402
210R1%0402
R57
R57
10R1%0402
10R1%0402
C37
C37 C0.1u16Y0402
C0.1u16Y0402
CAPS SHOULD BE PLACED NEAR MCH PIN
3
MCH_GTLREF_CPU
C38
C38 X_C220p50N0402
X_C220p50N0402
MCH_GTLREF_CPU 5
MICRO-STAR INT'L CO.,LTD
MICRO-STAR INT'L CO.,LTD
MICRO-STAR INT'L CO.,LTD
MS-7507
MS-7507
MSI
MSI
MSI
Size Document Description Rev
Size Document Description Rev
Size Document Description Rev
Custom
Custom
Custom
Date:
Wednesday, August 29, 2007
Date:
Wednesday, August 29, 2007
Date:
2
Wednesday, August 29, 2007
MS-7507
945GC - CPU Signals
945GC - CPU Signals
945GC - CPU Signals
1
834
834
834
Sheet of
Sheet of
Sheet of
0A
0A
0A
5
DATA_A[0..63]18
DATA_A0
DATA_A1
DATA_A3
DATA_A2
DATA_A6
DATA_A4
D D
C C
DQS_A[0..7]18 DQS_A#[0..7]18
B B
A A
SCS_A#[0..1]18,20
RAS_A#18,20 CAS_A#18,20
WE_A#18,20
MAA_A[0..13]18,20
ODT_A[0..1]18,20
SBS_A[0..2]18,20
DQS_A[0..7] DQS_A#[0..7]
P_DDR_A018
N_DDR_A018
P_DDR_A118
N_DDR_A118
P_DDR_A218
N_DDR_A218
R65
R65
80.6R1%0402
80.6R1%0402
SMPCOMP_N SMPCOMP_P
TP2TP2 TP3TP3
R61
R61
80.6R1%0402
80.6R1%0402
does it need to connect to GND through a 40 ohm resister?
VCC_DDR
C42
C42 C0.1u16Y0402
C0.1u16Y0402
U2B
BB37 BA39 BA35 AY38
BA34 BA37 BB35
BA32
AW32
BB30 BA30 AY30 BA27 BC28 AY27 AY28 BB27 AY33
AW27
BB26 BC38
AW37
AY39 AY37 BB40
BC33 AY34 BA26
AU4 AR2
AY11 BA10 AU18 AR18 AU35 AV35 AP42 AP40 AG42 AG41 AC42 AC41
BB32 AY32
AK42 AK41 BA31 BB31
AH40 AH43
AM3
BA3 BB4
AY5 BB5
AY6 BA5
AL5 AJ6 AJ8
DATA_B[0..63]19
U2B
SACS0# SACS1# SACS2# SACS3#
SARAS# SACAS# SAWE#
SAMA0 SAMA1 SAMA2 SAMA3 SAMA4 SAMA5 SAMA6 SAMA7 SAMA8 SAMA9 SAMA10 SAMA11 SAMA12 SAMA13
SAODT0 SAODT1 SAODT2 SAODT3
SABA0 SABA1 SABA2
SADQS0 SADQS0# SADQS1 SADQS1# SADQS2 SADQS2# SADQS3 SADQS3# SADQS4 SADQS4# SADQS5 SADQS5# SADQS6 SADQS6# SADQS7 SADQS7#
SACLK0 SACLK0# SACLK1 SACLK1# SACLK2 SACLK2# SACLK3 SACLK3# SACLK4 SACLK4# SACLK5 SACLK5#
MCH_SRCOMP0 MCH_SRCOMP1 SMOCDCOMP0 SMOCDCOMP1
SCS_A#0 SCS_A#1
RAS_A# CAS_A# WE_A#
MAA_A0 MAA_A1 MAA_A2 MAA_A3 MAA_A4 MAA_A5 MAA_A6 MAA_A7 MAA_A8 MAA_A9 MAA_A10 MAA_A11 MAA_A12 MAA_A13
ODT_A0 ODT_A1
SBS_A0 SBS_A1 SBS_B1 SBS_A2
DQS_A0 DQS_A#0 DQS_A1 DQS_A#1 DQS_A2 DQS_A#2 DQS_A3 DQS_A#3 DQS_A4 DQS_A#4 DQS_A5 DQS_A#5 DQS_A6 DQS_A#6 DQS_A7 DQS_A#7
P_DDR_A0 N_DDR_A0 P_DDR_A1 N_DDR_A1 P_DDR_A2 N_DDR_A2
AP3
SADQ0
AP2
AU3
SADQ1
SADQ2
SBDQ0
AL6
DATA_B0
DATA_A5
AV4
AN1
AP4
SADQ3
SADQ4
SBDQ1
SBDQ2
AL8
AP8
AP9
DATA_B3
DATA_B2
DATA_B1
AU5
SADQ5
SBDQ3
AJ11
DATA_B4
DATA_A8
DATA_A7
AU2
AW3
SADQ6
SADQ7
SBDQ4
SBDQ5
AL9
AM10
DATA_B5
DATA_B6
DATA_A10
DATA_A9
AY3
BA7
SADQ8
SADQ9
SBDQ6
SBDQ7
AP6
AU7
DATA_B7
DATA_B8
4
DATA_A11
DATA_A12
DATA_A13
BB7
AV1
SADQ10
SADQ11
SADQ12
SBDQ8
SBDQ9
SBDQ10
AV6
AV12
DATA_B9
DATA_B11
DATA_B10
DATA_A14
DATA_A15
AW4
BC6
AY7
SADQ13
SADQ14
SBDQ11
SBDQ12
AR5
AR7
AM11
DATA_B12
DATA_B13
DATA_A16
DATA_A17
AW12
AY10
SADQ15
SADQ16
SADQ17
SBDQ13
SBDQ14
SBDQ15
AR12
AR10
DATA_B14
DATA_B15
DATA_A18
DATA_A20
DATA_A19
BA12
BB12
BA9
SADQ18
SADQ19
SADQ20
SBDQ16
SBDQ17
SBDQ18
AV15
AM15
AM13
DATA_B17
DATA_B16
DATA_B18
DATA_A21
DATA_A22
DATA_A23
BB9
BC11
AY12
SADQ21
SADQ22
SADQ23
SBDQ19
SBDQ20
SBDQ21
AN12
AR13
AM17
DATA_B21
DATA_B20
DATA_B19
DATA_A24
DATA_A25
DATA_A26
AM20
AM18
AV20
SADQ24
SADQ25
SADQ26
SBDQ22
SBDQ23
SBDQ24
AT15
AP15
AM24
DATA_B22
DATA_B23
DATA_B24
DATA_A27
DATA_A29
DATA_A28
AM21
AP17
AR17
SADQ27
SADQ28
SBDQ25
SBDQ26
AV24
AM23
AM26
DATA_B27
DATA_B25
DATA_B26
DATA_A32
DATA_A31
DATA_A30
AP20
AT20
AP32
SADQ29
SADQ30
SADQ31
SBDQ27
SBDQ28
SBDQ29
AP21
AP24
AR21
DATA_B28
DATA_B29
DATA_B30
DATA_A34
DATA_A33
AV34
AV38
SADQ32
SADQ33
SADQ34
SBDQ30
SBDQ31
SBDQ32
AT24
AU27
DATA_B32
DATA_B31
DATA_A35
DATA_A37
DATA_A36
AU39
AV32
AT32
SADQ35
SADQ36
SADQ37
SBDQ33
SBDQ34
SBDQ35
AN29
AR31
AM31
DATA_B34
DATA_B35
DATA_B33
DATA_A38
DATA_A40
DATA_A39
AR34
AU37
AR41
SADQ38
SADQ39
SADQ40
SBDQ36
SBDQ37
SBDQ38
AP27
AP31
AR27
DATA_B36
DATA_B37
DATA_B38
DATA_A41
DATA_A43
DATA_A42
AR42
AN43
AM40
SADQ41
SADQ42
SADQ43
SBDQ39
SBDQ40
SBDQ41
AP35
AP37
AU31
DATA_B40
DATA_B39
DATA_B41
3
DATA_A45
DATA_A44
DATA_A46
AU41
AU42
AP41
SADQ44
SADQ45
SADQ46
SBDQ42
SBDQ43
SBDQ44
AL35
AN32
AR35
DATA_B42
DATA_B43
DATA_B44
DQM_A[0..7]18
SCKE_A[0..1]18,20
DATA_A47
DATA_A49
DATA_A48
AN40
AL41
AL42
SADQ47
SADQ48
SADQ49
SBDQ45
SBDQ46
SBDQ47
AU38
AM38
AM34
DATA_B45
DATA_B46
DATA_B47
DATA_A52
DATA_A51
DATA_A50
AF39
AE40
AM41
SADQ50
SADQ51
SADQ52
SBDQ48
SBDQ49
SBDQ50
AJ34
AL34
AF32
DATA_B48
DATA_B49
DATA_B50
DATA_A53
DATA_A54
DATA_A55
AM42
AF41
AF42
SADQ53
SADQ54
SADQ55
SBDQ51
SBDQ52
SBDQ53
AJ32
AL31
AF34
DATA_B52
DATA_B51
DATA_B53
SCKE_B[0..1]19,20
DQM_B[0..7]19
DATA_A56
DATA_A57
DATA_A58
AD40
AD43
AA39
SADQ56
SADQ57
SADQ58
SBDQ54
SBDQ55
SBDQ56
AD32
AC32
AG35
DATA_B55
DATA_B54
DATA_B56
DATA_A61
DATA_A60
DATA_A59
AA40
AE42
AE41
SADQ59
SADQ60
SADQ61
SBDQ57
SBDQ58
SBDQ59
Y32
AA32
AD34
DATA_B57
DATA_B58
DATA_B59
DATA_A62
DATA_A63
AB41
AB42
SADQ62
SADQ63
SBDQ60
SBDQ61
SBDQ62
AF35
AF37
AC33
DATA_B61
DATA_B62
DATA_B60
SCKE_A1
SCKE_A0
BB25
AY25
BC24
SACKE0
SACKE1
SACKE2
SBDQ63
SBCKE0
BA14
AC35
DATA_B63
SCKE_B0
BA25
SACKE3
SBCKE1
SBCKE2
AY16
BA13
BB13
SCKE_B1
DQM_A1
DQM_A0
AY2
AR3
SADM0
SBCKE3
AD39
DQM_B7
DQM_A2
DQM_A3
AP18
BB10
SADM2
SADM1
SBDM6
SBDM7
AJ39
AR38
DQM_B6
DQM_B5
DQM_A4
DQM_A5
AP39
AT34
SADM4
SADM3
SBDM4
SBDM5
AP23
AR29
DQM_B3
DQM_B4
DQM_A6
DQM_A7
AC40
AG40
SADM6
SADM5
SBDM2
SBDM3
AW7
AP13
DQM_B2
DQM_B1
2
SADM7
SBDQS0# SBDQS1# SBDQS2# SBDQS3# SBDQS4# SBDQS5# SBDQS6# SBDQS7#
SBCLK0# SBCLK1# SBCLK2# SBCLK3# SBCLK4# SBCLK5#
SMVREF1 SMVREF0
SBDM0
SBDM1
AL11
DQM_B0
SBCS0# SBCS1# SBCS2# SBCS3#
SBRAS# SBCAS#
SBWE#
SBMA0 SBMA1 SBMA2 SBMA3 SBMA4 SBMA5 SBMA6 SBMA7 SBMA8
SBMA9 SBMA10 SBMA11 SBMA12 SBMA13
SBODT0 SBODT1 SBODT2 SBODT3
SBBA0 SBBA1
SBBA2 SBDQS0 SBDQS1 SBDQS2 SBDQS3 SBDQS4 SBDQS5 SBDQS6 SBDQS7
SBCLK0 SBCLK1 SBCLK2 SBCLK3 SBCLK4 SBCLK5
AW41 BA41 AW40
BA23 AY24 BB23
BB22 BB21 BA21 AY21 BC20 AY19 AY20 BA18 BA19 BB18 BA22 BB17 BA17 AW42
AY42 AV40 AV43 AU40
AW23 AY23 AY17
AM8 AM6 AV7 AR9 AV13 AT13 AU23 AR23 AT29 AV29 AP36 AM35 AG34 AG32 AD36 AD38
AM29 AM27 AV9 AW9 AL38 AL36 AP26 AR26 AU10 AT10 AJ38 AJ36
AM2 AM4
SCS_B#1
RAS_B# CAS_B# WE_B#
MAA_B0 MAA_B1 MAA_B2 MAA_B3 MAA_B4 MAA_B5 MAA_B6 MAA_B7 MAA_B8 MAA_B9 MAA_B10 MAA_B11 MAA_B12 MAA_B13
ODT_B0 ODT_B1
SBS_B0 SBS_B2
DQS_B0 DQS_B#0 DQS_B1 DQS_B#1 DQS_B2 DQS_B#2 DQS_B3 DQS_B#3 DQS_B4 DQS_B#4 DQS_B5 DQS_B#5 DQS_B6 DQS_B#6 DQS_B7 DQS_B#7
P_DDR_B0 N_DDR_B0 P_DDR_B1 N_DDR_B1 P_DDR_B2 N_DDR_B2
MCH_VREF_B MCH_VREF_A
C41
C41
C0.1u16Y0402
C0.1u16Y0402
SCS_B#0
BA40
Parts Close To MCH
[INTEL-945GC-A2[SLA9C]-RH]
[INTEL-945GC-A2[SLA9C]-RH]
SCS_B#[0..1] 19,20
RAS_B# 19,20 CAS_B# 19,20 WE_B# 19,20
MAA_B[0..13] 19,20
ODT_B[0..1] 19,20
SBS_B[0..2] 19,20
DQS_B[0..7] DQS_B#[0..7]
P_DDR_B0 19 N_DDR_B0 19 P_DDR_B1 19 N_DDR_B1 19 P_DDR_B2 19 N_DDR_B2 19
CP3CP3 R62 X_0R0402R62 X_0R0402
C40
C40 C0.1u16Y0402
C0.1u16Y0402
VCC_DDR
1
DQS_B[0..7] 19 DQS_B#[0..7] 19
R63
R63
1KR1%0402
1KR1%0402
R64
R64
1KR1%0402
1KR1%0402
MICRO-STAR INT'L CO.,LTD
MICRO-STAR INT'L CO.,LTD
MICRO-STAR INT'L CO.,LTD
MS-7507
MS-7507
MSI
MSI
MSI
Size Document Description Rev
Size Document Description Rev
Size Document Description Rev
Custom
Custom
Custom
Date:
Wednesday, August 29, 2007
Date:
Wednesday, August 29, 2007
Date:
5
4
3
2
Wednesday, August 29, 2007
MS-7507
945GC - Memory Signals
945GC - Memory Signals
945GC - Memory Signals
1
934
934
934
Sheet of
Sheet of
Sheet of
0A
0A
0A
5
V_1P5_CORE
AA26
AB17
AB18
AB19
AB20
U2C
U2C
NOA_6
VCCA_HPLLVCCA_HPLL VCCA_MPLL
VCCA_GPLL
C62
C10000p10X0402-RH
C62
C10000p10X0402-RH
VCCA_MPLL
C63
C63 C1U10Y0402-RH
C1U10Y0402-RH
VCCA_DPLLB
G12 F12 D11 D12
J13 H13 E10 F10
J9
H10
F7
F9 C4 D3 G6
J6
K9
K8
F4 G4 M6 M7
K2
L1
U11 U10
R8 R7
P4 N3
Y10 Y11 F20
Y7
Y8
AA9
AA10
AA6
AA7 AC9 AC8
B14
B16
F15
E15
F21
H21
L20 AK17 AL17
K21 AK23 AK18
L21 L18
N21
C21
B20
C19
B19
B17
D19
C18
B18
A18
C69
C69 C0.1u16Y0402
C0.1u16Y0402
EXP_A_RXP_022 EXP_A_RXN_022 EXP_A_RXP_122 EXP_A_RXN_122 EXP_A_RXP_222
DMI_ITP_MRP_012
DMI_ITN_MRN_012
DMI_ITP_MRP_112
DMI_ITN_MRN_112
DMI_ITP_MRP_212
DMI_ITN_MRN_212
DMI_ITP_MRP_312
DMI_ITN_MRN_312 CK_PE_100M_MCH15
CK_PE_100M_MCH#15
SDVOCTRLDATA22 SDVOCTRLCLK22
RN15
RN15
MCH_BSEL1
8
MCH_BSEL2
6
MCH_BSEL0
4 2
8P4R-470R0402
8P4R-470R0402
CP4CP4
L13 X_180L1.5A-90L13 X_180L1.5A-90
I = 70mA
L14 X_600L200mA-450L14 X_600L200mA-450
CP5CP5
EXP_A_RXN_222 EXP_A_RXP_322 EXP_A_RXN_322 EXP_A_RXP_422 EXP_A_RXN_422 EXP_A_RXP_522 EXP_A_RXN_522 EXP_A_RXP_622 EXP_A_RXN_622 EXP_A_RXP_722 EXP_A_RXN_722 EXP_A_RXP_822 EXP_A_RXN_822 EXP_A_RXP_922 EXP_A_RXN_922 EXP_A_RXP_1022 EXP_A_RXN_1022 EXP_A_RXP_1122 EXP_A_RXN_1122 EXP_A_RXP_1222 EXP_A_RXN_1222 EXP_A_RXP_1322 EXP_A_RXN_1322 EXP_A_RXP_1422 EXP_A_RXN_1422 EXP_A_RXP_1522 EXP_A_RXN_1522 EXP_EN_HDR22
MCH_BSEL015,16 MCH_BSEL115,16 MCH_BSEL215,16
R67
R67
X_1KR1%0402
X_1KR1%0402
V_2P5_DAC_FILTERED
+
+
12
X_.CD220u10EL7
X_.CD220u10EL7
DMI_ITP_MRP_0 DMI_ITN_MRN_0 DMI_ITP_MRP_1 DMI_ITN_MRN_1 DMI_ITP_MRP_2 DMI_ITN_MRN_2 DMI_ITP_MRP_3 DMI_ITN_MRN_3
CK_PE_100M_MCH CK_PE_100M_MCH#
SDVOCTRLDATA SDVOCTRLCLK
VCCA_DPLLA VCCA_DPLLB
V_2P5_MCH
C61
C0.1u16Y0402
C61
C0.1u16Y0402
EC64
EC64
D D
C C
V_FSB_VTT
7 5
V_2P5_MCH
V_1P5_CORE
3 1
B B
VCCA_MPLL = 60mA
A A
V_1P5_CORE
VCCA_DPLLB = 55mA
L6
L6
X_10u125mA_0805-RH-1
X_10u125mA_0805-RH-1
+
+
CP8CP8
12
5
EC88
EC88 X_.CD220u10EL7
X_.CD220u10EL7
AA24
EXPARXP0 EXPARXN0 EXPARXP1 EXPARXN1 EXPARXP2 EXPARXN2 EXPARXP3 EXPARXN3 EXPARXP4 EXPARXN4 EXPARXP5 EXPARXN5 EXPARXP6 EXPARXN6 EXPARXP7 EXPARXN7 EXPARXP8 EXPARXN8 EXPARXP9 EXPARXN9 EXPARXP10 EXPARXN10 EXPARXP11 EXPARXN11 EXPARXP12 EXPARXN12 EXPARXP13 EXPARXN13 EXPARXP14 EXPARXN14 EXPARXP15 EXPARXN15 EXP_EN
DMI RXP0 DMI RXN0 DMI RXP1 DMI RXN1 DMI RXP2 DMI RXN2 DMI RXP3 DMI RXN3
GCLKP GCLKN
SDVOCTRLDATA SDVOCTRLCLK
BSEL0 BSEL1 BSEL2 RSV_TP[0] RSV_TP[1]
EXP_SLR RSV_TP[2] RSV_TP[3] RSV_TP[4] RSV_TP[5] RSV_TP[6]
VCCAHPLL VCCAMPLL VCCADPLLA VCCADPLLB VCCA_EXPPLL
VCC2 VCCADAC VCCADAC VSSA_DAC
V_FSB_VTT
VCC
V_1P5_CORE
VCC
VCC
VCC
VCC
VTT
VTT
VTT
VTT
B23
A24
B24
B25
B26
VCCA_DPLLA = 55mA
V_1P5_CORE
VCCA_HPLL = 45mA VCCA_GPLL = 45mA
4
AB24
AB25
AB26
AB27
AC15
AC17
AC18
AC20
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
E23
C23
X_10u125mA_0805-RH-1
X_10u125mA_0805-RH-1
CP6CP6
X_10u125mA_0805-RH-1
X_10u125mA_0805-RH-1
CP10CP10
E24
D24
D25
C25
C26
D23
L4
L4
L7
L7
4
AC24
AC26
AC27
VCC
VCC
VCC
VCC
VTT
VTT
VTT
VTT
F23
E27
E26
+
+
12
EC65
EC65 X_.CD220u10EL7
X_.CD220u10EL7
AD17
AD19
AD15
VCC
VCC
VCC
VTT
VTT
VTT
F27
H23
G23
VCCA_DPLLA
VCCA_HPLL
C70
C70 C0.1u16Y0402
C0.1u16Y0402
AD23
AD25
AD26
AD21
VCC
VCC
VCC
VTT
VTT
VTT
J23
L23
K23
M23
V_1P5_CORE
C65
C65 C0.1u16Y0402
C0.1u16Y0402
VCC
VTT
AE20
AE17
AE18
AE22
AE24
AE26
AE27
VCC
VCC
VCC
VCC
VCC
VCC
VTT
VTT
VCC
P23
N23
AF21
AF23
V_1P5_PCIEXPRESS =
1.5A
V_1P5_CORE
AF15
AF17
AF19
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
AF25
AF26
AF27
AF29
V_1P5_CORE
VCC
AV18
AY43
VCCSM
VCC
AG15
AG17
VCCSM
VCC
AV23
AV21
AV31
AV42
AW13
AW15
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCC
VCC
VCC
VCC
VCC
AG18
AG19
AG20
AG21
AG22
AG23
L15
L15
X_0R1206-LF
X_0R1206-LF
CP9CP9 CP11CP11
L5
L5
1u500mA_0805-RH-1
1u500mA_0805-RH-1
AW20
VCCSM
VCCSM
VCC
VCC
AG24
3
AW21
AW24
VCCSM
VCC
AJ15
AJ17
3
AW29
AW31
VCCSM
VCCSM
VCCSM
VCC
VCC
VCC
AJ18
AJ20
C10u10Y0805
C10u10Y0805
CP7CP7
AW34
AW35
VCCSM
C72
C72
VCCSM
AY41
BB16
BB20
BB24
VCCSM
VCCSM
VCCSM
VCCSM
VCC_EXP
VCC_EXP
AE4
AE3
C71
X_C10U10Y0805
C71
X_C10U10Y0805
VCCA_GPLL
C66
C66 X_C10U10Y0805
X_C10U10Y0805
BB28
BB33
BB38
BB42
VCCSM
VCCSM
VCCSM
VCCSM
VCC_EXP
VCC_EXP
VCC_EXP
VCC_EXP
AE2
AD8
AD12
AD10
C73
X_C10U10Y0805
C73
X_C10U10Y0805
BC26
BC13
BC18
BC22
VCCSM
VCCSM
VCCSM
VCCSM
VCC_EXP
VCC_EXP
VCC_EXP
VCC_EXP
AD6
AD5
AD4
AD2
C74
X_C10u10Y0805
C74
X_C10u10Y0805
C67
C67 C1U10Y0402-RH
C1U10Y0402-RH
VCC_DDR
BC31
BC35
BC40
N9
N7
N5
VCCSM
VCCSM
VCCSM
VCC_EXP
VCC_EXP
VCC_EXP
VCC_EXP
VCC_EXP
VCC_EXP
VCC_EXP
VCC_EXP
Y13
AA5
AD1
AC6
AC5
AA13
AC13
V_1P5_PCIEXPRESS
C75
X_C0.1u16Y0402
C75
X_C0.1u16Y0402
N11
N10
VCC_EXP
VCC_EXP
VCC_EXP
VCC_EXP
VCC_EXP
VCC_EXPV9VCC_EXP
V13
U6
R13
R11
R10
R5
N12
VCC_EXP
VCC_EXP
VCC_EXP
VCC_EXP
VCC_EXP
VCC_EXP
VCC_EXPV7VCC_EXPV6VCC_EXP
[INTEL-945GC-A2[SLA9C]-RH]
[INTEL-945GC-A2[SLA9C]-RH]
V5
V10
2
V_1P5_PCIEXPRESS
U13
U8
U7
VCC_EXP
VCC_EXP
VCC_EXP
EXPATXP0
EXPATXN0
EXPATXP1
EXPATXN1
EXPATXP2
EXPATXN2
EXPATXP3
EXPATXN3
EXPATXP4
EXPATXN4
EXPATXP5
EXPATXN5
EXPATXP6
EXPATXN6
EXPATXP7
EXPATXN7
EXPATXP8
EXPATXN8
EXPATXP9
EXPATXN9 EXPATXP10 EXPATXN10 EXPATXP11 EXPATXN11 EXPATXP12 EXPATXN12 EXPATXP13 EXPATXN13 EXPATXP14 EXPATXN14 EXPATXP15 EXPATXN15
DMI TXP0 DMI TXN0 DMI TXP1 DMI TXN1 DMI TXP2 DMI TXN2 DMI TXP3 DMI TXN3
EXP_COMPO
EXP_COMPI
HSYNC VSYNC
RED
GREEN
BLUE RED#
GREENB
BLUE#
DDC_DATA
DDC_CLK
DREFCLKINP DREFCLKINN
IREF
EXTTS#
XORTEST
ALLZTEST
V_1P5_PCIEXPRESS
2
D14 C13 A13 B12 A11 B10 C10 C9 A9 B7 D7 D6 A6 B5 E2 F1 G2 J1 J3 K4 L4 M4 M2 N1 P2 T1 T4 U4 U2 V1 V3 W4
W2 Y1 AA2 AB1 Y4 AA4 AB3 AC4
AC12 AC11
D17 C17
F17 K17 H18
G17 J17 J18
N18 N20
J15 H15
A20 J20 H20 K18
1
V_1P5_CORE
EXP_A_TXP_0 22 EXP_A_TXN_0 22 EXP_A_TXP_1 22 EXP_A_TXN_1 22 EXP_A_TXP_2 22 EXP_A_TXN_2 22 EXP_A_TXP_3 22 EXP_A_TXN_3 22 EXP_A_TXP_4 22 EXP_A_TXN_4 22 EXP_A_TXP_5 22 EXP_A_TXN_5 22 EXP_A_TXP_6 22 EXP_A_TXN_6 22 EXP_A_TXP_7 22 EXP_A_TXN_7 22 EXP_A_TXP_8 22 EXP_A_TXN_8 22 EXP_A_TXP_9 22 EXP_A_TXN_9 22 EXP_A_TXP_10 22 EXP_A_TXN_10 22 EXP_A_TXP_11 22 EXP_A_TXN_11 22 EXP_A_TXP_12 22 EXP_A_TXN_12 22 EXP_A_TXP_13 22 EXP_A_TXN_13 22 EXP_A_TXP_14 22 EXP_A_TXN_14 22 EXP_A_TXP_15 22
DMI_MTP_IRP_0 DMI_MTN_IRN_0 DMI_MTP_IRP_1 DMI_MTN_IRN_1 DMI_MTP_IRP_2 DMI_MTN_IRN_2 DMI_MTP_IRP_3 DMI_MTN_IRN_3
GRCOMP
HSYNC VSYNC
VGA_RED VGA_GREEN VGA_BLUE
MCH_DDC_DATA MCH_DDC_CLK
CK_96M_DREF CK_96M_DREF#
DACREFSET EXTTS
MSI
MSI
MSI
EXP_A_TXN_15 22
DMI_MTP_IRP_0 12 DMI_MTN_IRN_0 12 DMI_MTP_IRP_1 12 DMI_MTN_IRN_1 12 DMI_MTP_IRP_2 12 DMI_MTN_IRN_2 12 DMI_MTP_IRP_3 12
R66
R66
24.9R1%
24.9R1%
R69
R69
10KR0402
10KR0402
TP4TP4
C354 Co-lay C283 BOTTOM SIDE
C59
C59 X_C10p16N
X_C10p16N
Size Document Description Rev
Size Document Description Rev
Size Document Description Rev
Custom
Custom
Custom
Date:
Date:
Date:
DMI_MTN_IRN_3 12 V_1P5_PCIEXPRESS
MCH_DDC_DATA 30 MCH_DDC_CLK 30
CK_96M_DREF 15 CK_96M_DREF# 15
R68
R68
255R1%0402-RH
255R1%0402-RH
V_2P5_MCH
MICRO-STAR INT'L CO.,LTD
MICRO-STAR INT'L CO.,LTD
MICRO-STAR INT'L CO.,LTD
945GC PCI-Express & RBG Signals
945GC PCI-Express & RBG Signals
945GC PCI-Express & RBG Signals
Wednesday, August 29, 2007
Wednesday, August 29, 2007
Wednesday, August 29, 2007
VCC_DDR
C47 X_C10u10Y0805C47 X_C10u10Y0805 C48 X_C10U10Y0805C48 X_C10U10Y0805 C49 C0.1u16Y0402C49 C0.1u16Y0402
VCC_DDR
C50 C10U10Y0805C50 C10U10Y0805 C51 C0.1u16Y0402C51 C0.1u16Y0402 C52 X_C10U10Y0805C52 X_C10U10Y0805
MCH MEMORY DECOUPLING
V_FSB_VTT
FSB GENERIC DECOUPLING
HSYNC 30 VSYNC 30
VGA_RED 30 VGA_GREEN 30 VGA_BLUE 30
C56 X_C10p50N0402C56 X_C10p50N0402 C57 X_C10p50N0402C57 X_C10p50N0402 C58 X_C10p50N0402C58 X_C10p50N0402
MS-7507
MS-7507
MS-7507
1
C44 X_C10U10Y0805C44 X_C10U10Y0805 C45 C10U10Y0805C45 C10U10Y0805 C43 X_C0.1u16Y0402C43 X_C0.1u16Y0402 C82 X_C0.1u16Y0402C82 X_C0.1u16Y0402 C83 C0.1u16Y0402C83 C0.1u16Y0402 C84 X_C10U10Y0805C84 X_C10U10Y0805 C602 X_C0.1u16XC602 X_C0.1u16X C603 X_C1u6.3X-RHC603 X_C1u6.3X-RH
C53 X_C0.1u16Y0402C53 X_C0.1u16Y0402 C54 X_C0.1u16Y0402C54 X_C0.1u16Y0402 C55 C0.1u16Y0402C55 C0.1u16Y0402
10 34
10 34
10 34
Sheet of
Sheet of
Sheet of
0A
0A
0A
5
AN21
AN20
AN18
AN17
AN15
AN13
AN4
AN2
AM39
AM37
AM36
AM33
AM9
AM7
AM5
AL43
AL37
U2D
U2D
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS
VSS
VSS
VSS
VSS
VSS
VSS
J12
J21
J24
J43
J38
J29
VSS
VSS
VSS
VSS
VSS
VSSK7VSSK6VSSK5VSSK3VSS
VSS
K20
K15
K13
K12
K10
K32
K27
A16
D D
C C
B B
A22 A26 A31 A35
B4 B6
B9 B11 B13 B21 B22 B28 B33 B38
C3 C5
C7 C12 C14 C22 C40
D2
D5 D10 D16 D20 D21
E3 E4 E7
E9 E12 E13 E17 E18 E20 E21 E32
F2
F6 F13 F18 F26 F34 F42
G3 G5 G7
G9 G10 G13 G15 G18 G20 G21 G24 G27 G29 G31 G32 G35 G38 H12 H17 H26 H27 H32
J2 J5 J7
J10
VSS
VSS
AN23
VSS
VSS
K34
AN24
VSS
VSS
K37
AN26
VSS
K39
AN27
VSS
VSSL2VSS
AN31
VSS
VSS
L12
AN42
VSS
VSS
L13
4
AU12
AU9
AU6
AT31
AT27
AT26
AT23
AT21
AT18
AT17
AT12
AR43
AR39
AR37
AR32
AR24
AR20
AR15
AR6
AR1
AP38
AP34
AP29
AP12
AP10
AP7
AP5
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
L31
L29
L26
L24
L42
VSS
VSS
VSS
VSS
VSS
VSS
VSSM9VSSM8VSSM5VSSM3VSS
M21
M20
M13
M10
VSS
VSS
VSSN8VSSN6VSS
N2
N24
N15
N13
M37
M35
VSS
VSS
VSS
VSS
VSS
VSS
VSS
N36
N33
N31
N29
N27
N26
AU13
VSS
VSS
N39
AU15
VSS
N43
AU17
VSS
VSSP3VSS
AU20
VSS
VSS
P14
AU21
VSS
VSS
P15
AU24
VSS
VSS
P24
3
AU26
VSS
VSS
P26
AU29
VSS
VSS
P27
AU32
VSS
VSS
P29
AU34
VSS
P30
2
AE19
AD29
AD27
AD24
AD22
AD20
AD18
AC29
AC25
AC19
AA29
AA27
AA25
Y29
Y26
Y24
Y22
Y20
W25
W23
W21
V29
V26
V24
U29
R29
R26
D43
A40
BC9
BB41
BB39
BB34
BB19
BB14
BB11
BB6
BB3
BA42
BA4
AW10
AV37
AV17
AV10
AV2
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSSD1VSS
VSSA4VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSSR9VSSR6VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSST2VSS
VSSU3VSSU5VSSU9VSS
VSS
VSS
VSS
VSS
VSS
VSSV2VSSV8VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSSW3VSSY2VSSY5VSSY6VSSY9VSS
VSS
VSS
VSS
VSS
R12
R14
T42
R30
R31
R34
R37
R39
U12
U14
V11
V12
V14
V34
V36
V37
V38
V39
V43
Y12
Y14
Y31
Y35
U31
U33
U36
U38
Y37
AF20
AF22
AF24
AY1
BC4
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
Y39
Y42
L17
AA3
AA8
AF18
AE21
AE23
AE25
VSS
VSS
[INTEL-945GC-A2[SLA9C]-RH]
[INTEL-945GC-A2[SLA9C]-RH]
AL33 AL32 AL27 AL24 AL23 AL21 AL18 AL15 AL13 AL12 AL10 AL7 AL3 AL2 AL1 AK30 AK29 AK26 AK24 AJ37 AJ35 AJ33 AJ31 AJ30 AJ10 AJ7 AH42 AG39 AG38 AG37 AG36 AG33 AG31 AG30 AF43 AF38 AF36 AF33 AF5 AF3 AF2 AF1 AD42 AD37 AD35 AD33 AD13 AD11 AD9 AD7 AC39 AC38 AC37 AC36 AC31 AC23 AC21 AC14 AC10 AC7 AC3 AC2 AB43 AB2 AA36 AA33 AA31 AA23 AA21 AA14 AA12 AA11
1
A A
MICRO-STAR INT'L CO.,LTD
MICRO-STAR INT'L CO.,LTD
MICRO-STAR INT'L CO.,LTD
MS-7507
MS-7507
MSI
MSI
MSI
Size Document Description Rev
Size Document Description Rev
Size Document Description Rev
Custom
Custom
Custom
Date:
Wednesday, August 29, 2007
Date:
Wednesday, August 29, 2007
Date:
5
4
3
2
Wednesday, August 29, 2007
MS-7507
Intel .945GC - GND
Intel .945GC - GND
Intel .945GC - GND
1
11 34
11 34
11 34
Sheet of
Sheet of
Sheet of
0A
0A
0A
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