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CONTENT SHEET
1
Cover Sheet, Block Diagram
Intel LGA775 CPU
NVIDIA MCP73
DDR2 DIMM 1 , 2
DDR2 Terminations
NVIDIA MCP73
D-Sub
PCI-Express Slot
PCI Slot 1 & 2
LPC-Super I/O F71882FG
ATX/Front Panel/FAN
KB/COM1/LPT
USB Connectors
A A
LAN-RTL8211BL
Azalia Codec - 888 25
ACPI Controller 26
VTT Regulator
VRD11-ISL6312 3Phase
EMI
Manual Parts
GPIO & Jumper Setting
1-2
3-5
6-8
9
10
11-16
17
18
19
20
21
22
23
24
27
28
29
30
31
MS-7393
CPU:
System Chipset:
On Board Device:
Main Memory:
Expansion Slots:
Intersil PWM:
Intel Pentium 4 Cedar Mill / Prescott , Pentium D Smithfield / Presler
and Conroe / Kentsfield family processors in LGA775 Package.
NVIDIA MCP73
BIOS -- SPI Flash 4M
Azalia Codec -- ALC888
LPC Super I/O -- FINTEK F71882FG
LAN -- Realtek RTL8211BL-GR
CLOCK Gen -- Integated in MCP73
Dual-channel DDR-II * 2 (Max 4GB)
PCI EXPRESS X16 SLOT *1
PCI EXPRESS X1 SLOT * 1
PCI SLOT * 2
Controller: Intersil ISL6312 (3 Phases)
Version: 0B
POWER MAP
POWER OK & RESET MAP
History
32
33
34
PCB = 245mm X 220mm 4L
1
MICRO-STAR INT'L CO.,LTD
MICRO-STAR INT'L CO.,LTD
MICRO-STAR INT'L CO.,LTD
MS-7393-0B--070910K1
MS-7393-0B--070910K1
MSI
MSI
MSI
Size Document Description Rev
Size Document Description Rev
Size Document Description Rev
Custom
Custom
Custom
Date:
Monday, September 10, 2007
Date:
Monday, September 10, 2007
Date:
Monday, September 10, 2007
MS-7393-0B--070910K1
Cover Sheet
Cover Sheet
Cover Sheet
Sheet of
Sheet of
Sheet of
134
134
134
0A
0A
0A
![](/html/97/9707/9707304389095e928103657c9f6978d4db666033eee9a687b7be67f1fc1a91c6/bg2.png)
Block Diagram
1
VRD 11
ISL6312
3-Phase PWM
PCI_E X16
Connector
PCI_E X1
Connector
PCI EXPRESS X16
PCI EXPRESS X1
Intel LGA775 Processor
FSB 800/1066/1333MHZ
FSB
NVIDIA
MCP73
DDRII
64-BIT 533/667/800MHZ
2 DDR II
DIMM
Modules
Board Stack-up
(1080 Prepreg Considerations)
Solder Mask
PREPREG 2.7mils
CORE 50mils
Solder Mask
PREPREG 2.7mils
Single End 50ohm Top/Bottom : 4mils
USB2.0 - 90ohm : 15/4.5/7.5/4.5/15
SATA - 95ohm : 15/4/8/4/15
LAN - 100ohm : 15/4/8/4/15
PCIE - 95ohm : 15/4/8/4/15
IEEE1394 - 110ohm : 15/4/9/4/15
IDE : 15/4/8/4/15
1.9mils Cu plus plating
1.9mils Cu plus plating
1 oz. (1.2mils)
Cu Power
Plane
1 oz. (1.2mils)
Cu GND
Plane
Board Stack-up
A A
SATA-II 1~4
USB Port 0~10
HD Audio Codec
ALC888
SATA2
USB2.0
HD Audio Link
SPI
LPC
LPC SIO
PCI
RGMII
PCI Slot 1
RTL8211B(GIGA PHY)
PCI Slot 2
LAN
FINTEK
F71882FG
(2116 Prepreg Considerations)
Solder Mask
PREPREG 4.7mils
CORE 47mils
Solder Mask
PREPREG 4.7mils
Single End 60ohm Top/Bottom : 5mils
IEEE1394 - 110ohm Top : 5/7/5
PCIE, LAN, SATA - 100ohm Top : 5/6/5
USB2.0 - 90ohm Top : 7.5/7.5/7.5
1/2 oz. Cu plus plating
1/2 oz. Cu plus plating
1 oz. Cu Power
Plane
1 oz. Cu Ground
Plane
SPI
Flash ROM
LPC
LPC
Debug Port
Keyboard
Mouse
Floopy
SerialParallel
MICRO-STAR INT'L CO.,LTD
MICRO-STAR INT'L CO.,LTD
MICRO-STAR INT'L CO.,LTD
MS-7393-0B--070910K1
MS-7393-0B--070910K1
MSI
MSI
MSI
Size Document Description Rev
Size Document Description Rev
Size Document Description Rev
Custom
Custom
Custom
Date:
Monday, September 10, 2007
Date:
Monday, September 10, 2007
Date:
1
Monday, September 10, 2007
MS-7393-0B--070910K1
Block Diagram
Block Diagram
Block Diagram
Sheet of
Sheet of
Sheet of
0A
0A
0A
234
234
234
![](/html/97/9707/9707304389095e928103657c9f6978d4db666033eee9a687b7be67f1fc1a91c6/bg3.png)
8
D D
H_TDI
H_TDO
H_TMS
H_TRST#
H_TCK
R129 X_0R0402R129 X_0R0402
R127 X_0R0402R127 X_0R0402
H_PWRGD4,6
H_CPURST#4,6
H_DBI#0
H_DBI#1
H_DBI#2
H_DBI#3
CPU_GTLREF2
THERMDA
THERMDC
H_TESTHI13
C9_RESERVED
CPU_GTLREF3
H_D#63
H_D#62
H_D#61
H_D#60
H_D#59
H_D#58
H_D#57
H_D#56
H_D#55
H_D#54
H_DBI#[0..3]6
H_IERR#4
H_FERR#4,6
H_STPCLK#6
H_INIT#6
H_DBSY#6
H_DRDY#6
H_TRDY#6
H_ADS#6
H_LOCK#6
H_BNR#6
H_HIT#6
C C
H_TESTHI13 is not as H_SLP#.
MCP73 has no CPU_SLP# pin.
B B
H_D#[0..63]6
H_HITM#6
H_BPRI#6
H_DEFER#6
THERMDA20
THERMDC20
TRMTRIP#4,6
H_PROCHOT#4,6
H_IGNNE#6
H_SMI#6
H_A20M#6
CPU_BSEL06
CPU_BSEL16
CPU_BSEL26
G11
D19
C20
AB2
AB3
AD3
AD1
AF1
AC1
AG1
AE1
AL1
AK1
AE8
AL2
AH2
AE6
G10
D16
A20
AA2
G29
H30
G30
G23
B22
A22
A19
B19
B21
C21
B18
A17
B16
C18
H_A#[3..35]6
A8
F2
R3
M3
P3
H4
B2
C1
E3
D2
C3
C2
D4
E4
G8
G7
M2
N2
P2
K3
L2
N5
C9
Y1
V2
N1
7
FP_RST#14,21
U3A
U3A
DBI0#
DBI1#
DBI2#
DBI3#
EDRDY#
IERR#
MCERR#
FERR#/PBE#
STPCLK#
BINIT#
INIT#
RSP#
DBSY#
DRDY#
TRDY#
ADS#
LOCK#
BNR#
HIT#
HITM#
BPRI#
DEFER#
TDI
TDO
TMS
TRST#
TCK
THERMDA
THERMDC
THERMTRIP#
GND/SKTOCC#
PROCHOT#
IGNNE#
SMI#
A20M#
TESTI_13
RSVD#AH2
RESERVED0
RESERVED1
RESERVED2
RESERVED3
RESERVED4
RESERVED5
BOOTSELECT
LL_ID0
LL_ID1
BSEL0
BSEL1
BSEL2
PWRGOOD
RESET#
D63#
D62#
D61#
D60#
D59#
D58#
D57#
D56#
D55#
D54#
H_D#53
D53#
B15
D52#
C14
C15
H_D#51
H_D#52
D51#
D50#
A14
H_D#50
CPU SIGNAL BLOCK
H_A#31
H_A#32
H_A#35
H_A#29
H_A#30
H_A#33
H_A#34
AJ6
AJ5
AH5
AH4
AG5
AG4
AG6
A35#
A34#
A33#
A32#
A31#
A30#
A29#
D49#
D48#
D47#
D46#
D45#
D44#
D43#
D42#
F21
E22
D20
G22
H_D#47
H_D#48
D22
H_D#46
H_D#45
G21
H_D#43
H_D#44
E21
H_D#42
D17
H_D#49
R124 X_0R0402R124 X_0R0402
H_A#28
H_A#27
H_A#24
H_A#25
H_A#26
AF4
AF5
AB4
AC5
AB5
A28#
A27#
A26#
A25#
D41#
D40#
D39#
D38#
F20
F18
F17
E19
E18
H_D#38
H_D#37
H_D#39
H_D#41
H_D#40
H_A#23
AA5
A24#
A23#
D37#
D36#
G17
H_D#36
H_A#22
H_A#21
AD6
AA4
A22#
D35#
E16
G18
H_D#34
H_D#35
6
H_A#18
H_A#20
H_A#19
A21#
A20#Y4A19#Y6A18#W6A17#
D34#
D33#
D32#
E15
G16
H_D#31
H_D#32
H_D#33
H_A#16
H_A#17
H_A#15
H_A#14
AB6
A16#W5A15#V4A14#V5A13#U4A12#U5A11#T4A10#
D31#
D30#
D29#
D28#
F15
F14
G15
G14
H_D#29
H_D#28
H_D#30
H_D#27
D27#
G13
H_A#12
H_A#13
D26#
E13
D13
H_D#25
H_D#26
H_A#11
D25#
D24#
F12
H_D#24
H_A#10
H_A#9
U6
D23#
F11
D10
H_D#23
H_D#22
H_A#3
H_A#4
H_A#5
H_A#6
H_A#8
H_A#7
L5
A9#T5A8#R4A7#M4A6#L4A5#M5A4#P6A3#
D22#
D21#
D20#D7D19#E9D18#F9D17#F8D16#G9D15#
E10
H_D#20
H_D#17
H_D#18
H_D#19
H_D#21
H_D#16
AC2
D11
C12
H_D#14
H_D#15
DBR#
D14#
D13#
B12
H_D#13
5
AN5
AJ3
AN4
AN3
AN6
ITP_CLK1
VSS_SENSE
VCC_SENSE
VSS_MB_REGULATION
VCC_MB_REGULATION
D12#D8D11#
D10#
D9#
D8#
D7#A7D6#B7D5#B6D4#A5D3#C6D2#A4D1#C5D0#
B10
A11
A10
C11
H_D#8
H_D#9
H_D#7
H_D#12
H_D#10
H_D#11
AK3
ITP_CLK0
H_D#5
H_D#6
VID7
VID6
VID5
AM7
AM5
AL4
VID6#
RSVD#AM7
H_D#2
H_D#3
H_D#4
VCC_VRM_SENSE
VSS_VRM_SENSE
VID2
VID3
VID1
VID4
VID0
AK4
AL6
AM3
AL5
VID5#
VID4#
VID3#
VID2#
VID1#
VID_SELECT
GTLREF0
GTLREF1
GTLREF_SEL
GTLREF2
BPM5#
BPM4#
BPM3#
BPM2#
BPM1#
BPM0#
PCREQ#
REQ4#
REQ3#
REQ2#
REQ1#
REQ0#
TESTHI12
TESTHI11
TESTHI10
TESTHI9
TESTHI8
TESTHI7
TESTHI6
TESTHI5
TESTHI4
TESTHI3
TESTHI2
TESTHI1
TESTHI0
FORCEPH
RSVD#G6
BCLK1#
BCLK0#
RS2#
RS1#
RS0#
AP1#
AP0#
BR0#
COMP5
COMP4
COMP3
COMP2
COMP1
COMP0
DP3#
DP2#
DP1#
DP0#
ADSTB1#
ADSTB0#
DSTBP3#
DSTBP2#
DSTBP1#
DSTBP0#
DSTBN3#
DSTBN2#
DSTBN1#
DSTBN0#
LINT1/NMI
LINT0/INTR
ZIF-SOCK775-15u-in
ZIF-SOCK775-15u-in
B4
H_D#0
H_D#1
AM2
VID0#
VID[0..7] 28
AN7
H1
H2
GTLREF_SEL
H29
P_GTLREF
E24
H_BPM#5
AG3
H_BPM#4
AF2
H_BPM#3
AG2
H_BPM#2
AD2
H_BPM#1
AJ1
H_BPM#0
AJ2
G5
H_REQ#4
J6
H_REQ#3
K6
H_REQ#2
M6
H_REQ#1
J5
H_REQ#0
K4
H_TESTHI12
W2
H_TESTHI11
P1
H_TESTHI10
H5
H_TESTHI9
G4
H_TESTHI8
G3
F24
G24
G26
G27
G25
F25
W3
F26
FORCEPH
AK6
RSVD_G6
G6
G28
F28
H_RS#2
A3
H_RS#1
F5
H_RS#0
B3
TEST-U3
U3
TEST-U2
U2
F3
H_COMP5
T2
H_COMP4
J2
H_COMP3
R1
H_COMP2
G2
H_COMP1
T1
H_COMP0
A13
TEST-J17
J17
TEST-H16
H16
TEST-H15
H15
TEST-J16
J16
AD5
R6
C17
G19
E12
B9
A16
G20
G12
C8
L1
K1
4
C108
C108
X_C10u6.3X50805
X_C10u6.3X50805
R82
R82
X_51R0402
X_51R0402
CPU_GTLREF0
CPU_GTLREF1
CPU_PECI_O
H_TESTHI2_7
H_TESTHI1
H_TESTHI0
VCC_VRM_SENSE 28
VSS_VRM_SENSE 28
VTT_OUT_RIGHT
R85
R85
680R0402-RH
680R0402-RH
VRD_VIDSEL 4,28
CPU_GTLREF0 4
CPU_GTLREF1 4
T6T6
H_BPM#0 5
H_REQ#[0..4] 6
H_TESTHI12 5
R190 51R0402R190 51R0402
R195 51R0402R195 51R0402
R108 X_130R1%0402R108 X_130R1%0402
R155 X_51R0402R155 X_51R0402
CK_H_CPU# 6
CK_H_CPU 6
H_RS#[0..2] 6
T2T2
T3T3
R142 49.9R1%0402R142 49.9R1%0402
R160 49.9R1%0402R160 49.9R1%0402
R148 49.9R1%0402R148 49.9R1%0402
R178 49.9R1%0402R178 49.9R1%0402
R146 49.9R1%0402R146 49.9R1%0402
R199 49.9R1%0402R199 49.9R1%0402
T5T5
T7T7
T8T8
T4T4
H_ADSTB#1 6
H_ADSTB#0 6
H_DSTBP#3 6
H_DSTBP#2 6
H_DSTBP#1 6
H_DSTBP#0 6
H_DSTBN#3 6
H_DSTBN#2 6
H_DSTBN#1 6
H_DSTBN#0 6
H_NMI 4,6
H_INTR 4,6
3
R167 X_20R0402R167 X_20R0402
R163 0R0402R163 0R0402
Choose one for PECI function
V_FSB_VTT
VTT_OUT_RIGHT
VTT_OUT_LEFT
H_BR#0 4,6
VTT_OUT_LEFT
C58
C58
C0.1u10X0402
C0.1u10X0402
2
VID2
VID5
VID0
VID4
VID7
VID3
VID6
VID1
H_BPM#0
H_BPM#1
H_BPM#5
H_BPM#3
H_TRST#
H_BPM#4
H_TDO
H_TCK
H_TDI
H_BPM#2
H_TMS
CPU_PECI_MCP
IO_PECI
Does it not need to connect to chip?
Does MCP73 no need GTLREF?
There is no CPU_GTL_VREF pin on MCP73.
CPU_GTLREF2
C220p50N0402
C220p50N0402
CPU_GTLREF3
C220p50N0402
C220p50N0402
C87
C87
C85
C85
CPU_PECI_MCP 6
IO_PECI 20
P_GTLREF
C44
C44
C220p50N0402
C220p50N0402
R186 10R0402R186 10R0402
C182
C182
C0.1u10X0402
C0.1u10X0402
R181 10R0402R181 10R0402
C186
C186
C0.1u10X0402
C0.1u10X0402
H_TESTHI1
H_TESTHI11
H_TESTHI10
H_TESTHI13
H_TESTHI12
C48
C48
C0.1u10X0402
C0.1u10X0402
C86
C86
C1u6.3X50402-1
C1u6.3X50402-1
C61
C61
C1u6.3X50402-1
C1u6.3X50402-1
RN3
RN3
8P4R-680R
8P4R-680R
1
2
3
4
5
6
7
8
1
2
3
4
5
6
7
8
RN2
RN2
8P4R-680R
8P4R-680R
RN4
RN4
8P4R-51R0402
8P4R-51R0402
1
2
3
4
5
6
7
8
RN5
RN5
1
2
3
4
5
6
7
8
8P4R-51R0402
8P4R-51R0402
1
2
3
4
5
6
7
8
RN6
RN6
8P4R-51R0402
8P4R-51R0402
R260 51R0402R260 51R0402
R262 51R0402R262 51R0402
R264 51R0402R264 51R0402
R154 51R0402R154 51R0402
R134 51R0402R134 51R0402
R80
R80
88.7R1%
88.7R1%
R6935.7R1% R6935.7R1%
C41
C41
C1u6.3X50402-1
C1u6.3X50402-1
R182 124R1%0402R182 124R1%0402
R185
R185
210R1%0402
210R1%0402
R97 124R1%0402R97 124R1%0402
R104
R104
210R1%0402
210R1%0402
1
VTT_OUT_RIGHT
C62
C62
C0.1u10X0402
C0.1u10X0402
VTT_OUT_RIGHT
VTT_OUT_LEFT
C56
C56
C0.1u10X0402
C0.1u10X0402
VTT_OUT_RIGHTVTT_OUT_LEFT
VTT_OUT_RIGHT
VTT_OUT_RIGHT
C60
C60
C0.1u10X0402
C0.1u10X0402
R79
R79
100R1%0402
100R1%0402
R73
R73
82.5R1%0402
82.5R1%0402
A A
VTT_OUT_LEFT
VTT_OUT_LEFT
VTT_OUT_LEFT
8
7
H_BPM#1
H_BPM#2
H_BPM#3
R102 X_0R0402R102 X_0R0402
R113 51R0402R113 51R0402
R175 X_0R0402R175 X_0R0402
R174 51R0402R174 51R0402
R172 X_0R0402R172 X_0R0402
R173 51R0402R173 51R0402
6
C9_RESERVED
H_TESTHI9
H_TESTHI8
MICRO-STAR INT'L CO.,LTD
MICRO-STAR INT'L CO.,LTD
MICRO-STAR INT'L CO.,LTD
MS-7393-0B--070910K1
MS-7393-0B--070910K1
MSI
MSI
MSI
Size Document Description Rev
Size Document Description Rev
Size Document Description Rev
Custom
Custom
Custom
Date:
Monday, September 10, 2007
Date:
Monday, September 10, 2007
Date:
5
4
3
Monday, September 10, 2007
2
MS-7393-0B--070910K1
LGA775 - Signals
LGA775 - Signals
LGA775 - Signals
Sheet of
Sheet of
Sheet of
334
334
334
1
0A
0A
0A
![](/html/97/9707/9707304389095e928103657c9f6978d4db666033eee9a687b7be67f1fc1a91c6/bg4.png)
8
VCCP
AF9
AF8
AF22
AF21
U3B
AF19
AF18
AF15
AF14
AF12
AF11
AE9
AE23
AE22
AE21
AE19
AE18
AE15
AE14
AE12
AE11
AD8
AD30
AD29
AD28
AD27
AD26
AD25
AD24
AD23
AC8
AC30
AC29
AC28
AC27
AC26
AC25
AC24
AC23
AB8
AA8
U3B
VCCP
VCC#AF19
VCC#AF18
VCC#AF15
VCC#AF14
VCC#AF12
VCC#AF11
VCC#AE9
VCC#AE23
VCC#AE22
VCC#AE21
VCC#AE19
VCC#AE18
VCC#AE15
VCC#AE14
VCC#AE12
VCC#AE11
VCC#AD8
VCC#AD30
VCC#AD29
VCC#AD28
VCC#AD27
VCC#AD26
VCC#AD25
VCC#AD24
VCC#AD23
VCC#AC8
VCC#AC30
VCC#AC29
VCC#AC28
VCC#AC27
VCC#AC26
VCC#AC25
VCC#AC24
VCC#AC23
VCC#AB8
VCC#AA8
VCC#AF9
VCC#AF8
VCC#AF22
VCC#AF21
VCC#Y28
VCC#Y29
VCC#Y30
VCC#Y8
Y8
Y28
Y29
Y30
VCCP
D D
C C
AG11
VCC#AG11
VCC#Y27
Y27
AG12
VCC#AG12
VCC#Y26
Y26
AG14
VCC#AG14
VCC#Y25
Y25
AG15
VCC#AG15
VCC#Y24
Y24
AG18
VCC#AG18
Y23
AG19
VCC#AG19
VCC#W8W8VCC#Y23
7
AG21
W30
VCC#AG21
VCC#W30
AG22
VCC#AG22
VCC#W29
W29
AG25
VCC#AG25
VCC#W28
W28
AG26
VCC#AG26
VCC#W27
W27
AG27
VCC#AG27
VCC#W26
W26
AG28
VCC#AG28
VCC#W25
W25
AG29
VCC#AG29
VCC#W24
W24
AG30
VCC#AG30
W23
AG8
VCC#AG8
AG9
VCC#AG9
VCC#U8U8VCC#V8V8VCC#W23
AH11
VCC#AH11
VCC#U30
U30
AH12
VCC#AH12
VCC#U29
U29
AH14
VCC#AH14
VCC#U28
U28
AH15
VCC#AH15
VCC#U27
U27
AH18
VCC#AH18
VCC#U26
U26
AH19
VCC#AH19
VCC#U25
U25
AH21
VCC#AH21
VCC#U24
U24
AH22
VCC#AH22
U23
AH25
VCC#AH25
VCC#T8T8VCC#U23
6
AH26
T30
VCC#AH26
VCC#T30
AH27
VCC#AH27
VCC#T29
T29
AH28
VCC#AH28
VCC#T28
T28
AH29
VCC#AH29
VCC#T27
T27
AH30
VCC#AH30
VCC#T26
T26
AH8
T25
VCC#AH8
VCC#T25
AH9
T24
VCC#AH9
VCC#T24
5
AL11
AK8
AJ8
AJ9
AK11
AK12
AK14
AK15
N24
VCC#AJ8
VCC#N24
N23
VCC#AJ9
VCC#AK11
VCC#M8M8VCC#N23
VCC#AK12
VCC#AK14
VCC#AK15
VCC#M28
VCC#M29
VCC#M30
M28
M29
M30
AK18
VCC#AK18
VCC#M27
M27
AJ11
AJ12
AJ14
AJ15
AJ18
AJ19
AJ21
AJ22
AJ25
AJ26
VCC#AJ11
VCC#AJ12
VCC#AJ14
VCC#AJ15
VCC#AJ18
VCC#AJ19
VCC#AJ21
VCC#AJ22
VCC#AJ25
VCC#AJ26
VCC#N25
VCC#N26
VCC#N27
VCC#N28
VCC#N29
VCC#N30
VCC#N8N8VCC#P8P8VCC#R8R8VCC#T23
T23
N25
N26
N27
N28
N29
N30
AK19
AK21
AK22
VCC#AK19
VCC#AK21
VCC#AK22
VCC#M24
VCC#M25
VCC#M26
M24
M25
M26
AK25
AK26
VCC#AK8
VCC#AK25
VCC#AK26
VCC#K8K8VCC#L8L8VCC#M23
M23
AK9
VCC#AK9
VCC#AL11
VCC#K29
VCC#K30
K29
K30
AL12
VCC#AL12
VCC#K28
K28
AL14
K27
4
AL15
AL18
AL19
AL21
AL22
AL25
AL26
AL29
AL30
AM11
AM12
AM14
AM15
AM18
AM19
AL8
AL9
VCC#AL8
VCC#AL14
VCC#AL15
VCC#AL18
VCC#AL19
VCC#AL21
VCC#K24
VCC#K25
VCC#K26
VCC#K27
K23
K24
K25
K26
VCC#AL9
VCC#AL22
VCC#AL25
VCC#AL26
VCC#AL29
VCC#AL30
VCC#J26
VCC#J27
VCC#J28
VCC#J29
VCC#J30
VCC#J8J8VCC#J9J9VCC#K23
J26
J27
J28
J29
J30
AM21
VCC#AM11
VCC#AM12
VCC#AM14
VCC#AM15
VCC#AM18
VCC#AM19
VCC#J20
VCC#J21
VCC#J22
VCC#J23
VCC#J24
VCC#J25
J19
J20
J21
J22
J23
J24
J25
3
AN11
AN12
AN14
AN15
AN18
AN19
AN21
AN8
VCC#AN12
VCC#AN8
VCC#AN14
VCC#AN30
AN30
VCC#AN15
VCC#AN29
AN29
AN22
VCCA
VSSA
VCC#AN18
VCC#AN19
VCC#AN21
VCC#AN22
VCCPLL
VCC-IOPLL
VTT#A25
VTT#A26
VTT#A27
VTT#A28
VTT#A29
VTT#A30
VTT#B25
VTT#B26
VTT#B27
VTT#B28
VTT#B29
VTT#B30
VTT#C25
VTT#C26
VTT#C27
VTT#C28
VTT#C29
VTT#C30
VTT#D25
VTT#D26
VTT#D27
VTT#D28
VTT#D29
VTT#D30
VTTPWRGD
VTT_OUT_RIGHT
VTT_OUT_LEFT
VTT_SEL
RSVD#F29
VCC#AN25
VCC#AN26
1122334
AN25
AN26
ZIF-SOCK775-15u-in
ZIF-SOCK775-15u-in
4
AM8
AM9
AM22
AM25
AM26
AM29
AM30
VCC#AM8
VCC#AM9
VCC#AM21
VCC#AM22
VCC#J18
VCC#J19
J15
J18
VCC#AN11
VCC#AM25
VCC#AM26
VCC#AM29
VCC#AM30
VCC#AN9
VCC#J10
VCC#J11
VCC#J12
VCC#J13
VCC#J14
VCC#J15
J10
J11
J12
J13
J14
AN9
A23
B23
D23
C23
A25
A26
A27
A28
A29
A30
B25
B26
B27
B28
B29
B30
C25
C26
C27
C28
C29
C30
D25
D26
D27
D28
D29
D30
AM6
AA1
J1
F27
F29
2
H_VCCA
H_VSSA
H_VCCPLL
H_VCCA
VTT_PWG
VTT_SEL
V_FSB_VTT
C106
C106
X_C10u6.3X50805
X_C10u6.3X50805
CAPS FOR FSB GENERIC
VTT_OUT_RIGHT
VTT_OUT_LEFT
VTT_SEL 26
1
C101
C101
C10u6.3X50805
C10u6.3X50805
C118
C118
C10u6.3X50805
C10u6.3X50805
V_FSB_VTT
VTT_OUT_RIGHT
B B
CPU_GTLREF1_SEL13
VTT_OUT_RIGHT
R111
R111
0R0402
0R0402
R166 124R1%0402R166 124R1%0402
210R1%0402
210R1%0402
R159 63.4R1%0402R159 63.4R1%0402
3VDUAL
R929
R929
357R1%0402
357R1%0402
10KR0402
10KR0402
DS
Q22
Q22
G
X_2N7002
X_2N7002
R169
R169
R156
R156
DS
G
PLACE AT CPU END OF ROUTE
VTT_OUT_RIGHT
V_FSB_VTT
VTT_OUT_LEFT
A A
C119 C1u6.3X50402-1C119 C1u6.3X50402-1
C195 C1u6.3X50402-1C195 C1u6.3X50402-1 R408
R103 X_130R1%0402R103 X_130R1%0402
R128 62R0402R128 62R0402
R209 200R0402R209 200R0402
R152 X_150R1%0402R152 X_150R1%0402
R187 62R0402R187 62R0402
PLACE AT C55 END OF ROUTE
VTT_OUT_RIGHT
8
R171 10R0402R171 10R0402
C77
C77
C1u6.3X50402-1
C1u6.3X50402-1
C74
C74
C1u6.3X50402-1
C1u6.3X50402-1
Q30
Q30
2N7002
2N7002
R153 62R0402R153 62R0402
R145 62R0402R145 62R0402
R158 X_150R1%0402R158 X_150R1%0402
R157 X_150R1%0402R157 X_150R1%0402
7
C79
C79
C220p50N0402
C220p50N0402
R164
R164
137R1%0402
137R1%0402
H_PROCHOT#
H_IERR#
H_CPURST#
H_PWRGD
H_BR#0
CPU_GTLREF0 3
*GTLREF VOLTAGE SHOULD BE
C84
C84
C0.1u10X0402
C0.1u10X0402
R170 10R0402R170 10R0402
C0.1u10X0402
C0.1u10X0402
0.63*VTT = 0.756V
CPU_GTLREF1 3
C187
C187
0.61VTT All other CPUs
C78
C78
C220p50N0402
C220p50N0402
0.685 VTT Kentsfield FSB Overclocking
Load R929, Unload Q22
CPU_GTLREF1_SEL
0 0.685 VTT
1 0.61VTT
H_PROCHOT# 3,6
H_IERR# 3
H_CPURST# 3,6
H_PWRGD 3,6
H_BR#0 3,6
Load Q22, Unload R929
CPU_GTLREF1_SEL
0 0.61 VTT
1 0.685 VTT
TRMTRIP# 3,6
H_FERR# 3,6
H_INTR 3,6
H_NMI 3,6
6
GTL VOLTAGE
GTL VOLTAGE
5
*PLACE COMPONENTS AS CLOSE AS POSSIBLE TO PROCESSOR SOCKET
*TRACE WIDTH TO CAPS MUST BE NO SMALLER THAN 12MILS
V_FSB_VTT VCC1_5
L2 X_10u/100m/8L2 X_10u/100m/8
21
CP2 X_COPPERCP2 X_COPPER
VTT_PWRGOOD
VRD_VIDSEL3,28
VID_SELECT
0 (VRM10)
1 (VRM11)
VTT_PWG
VID_GD
VR_READY
4
X_4.7KR0402
X_4.7KR0402
R62
R62
X_1KR0402
X_1KR0402
C116
C116
C1u6.3X50402-1
C1u6.3X50402-1
R3
R3
B
C107
C107
C10u6.3X50805
C10u6.3X50805
VCC5_SB
VCC5_SB
CE
Q11
Q11
X_2N3904
X_2N3904
R4
R4
X_4.7KR0402
X_4.7KR0402
G
power on sequence
VTT_PWG beforce VCCP
VCCP beforce VTT_PWG
3
C100
C100
X_C10u6.3X50805
X_C10u6.3X50805
DS
Q8
Q8
X_2N7002
X_2N7002
H_VCCA
H_VSSA
VR_READY
DS
Q3
Q3
G
X_2N7002
X_2N7002
VTT_PWG
VID_GD
DS
Q10
Q10
G
X_2N7002
X_2N7002
VTT_PWG
MSI
MSI
MSI
Size Document Description Rev
Size Document Description Rev
Size Document Description Rev
Custom
Custom
Custom
Date:
Monday, September 10, 2007
Date:
Monday, September 10, 2007
Date:
Monday, September 10, 2007
2
CP3 X_COPPERCP3 X_COPPER
C137
C137
C1u6.3X50402-1
C1u6.3X50402-1
VR_READY 14
R411
R411
0R0402
0R0402
R408
X_0R0402
X_0R0402
MICRO-STAR INT'L CO.,LTD
MICRO-STAR INT'L CO.,LTD
MICRO-STAR INT'L CO.,LTD
MS-7393-0B--070910K1
MS-7393-0B--070910K1
MS-7393-0B--070910K1
LGA775 - Power
LGA775 - Power
LGA775 - Power
H_VCCPLL
C132
C132
C0.01u16X0402
C0.01u16X0402
VTT_PWG SPEC :
High > 0.9V
Low < 0.3V
Trise < 150ns
1.25V VTT_PWRGOOD
VID_GD 26
434
434
434
Sheet of
Sheet of
Sheet of
1
C128
C128
C10u6.3X50805
C10u6.3X50805
0A
0A
0A
![](/html/97/9707/9707304389095e928103657c9f6978d4db666033eee9a687b7be67f1fc1a91c6/bg5.png)
8
7
6
MSID1
MSID0
05B (130W)
pull-down
pull-down
5
05A (95W)
pull-down
NC
2006 65W FSB
NC
NC
4
3
2
1
V26
V25
V24
VSS#V26
VSS#V25
VSS#AH6
VSS#AH7
AH6
AH7
AJ10
V23
VSS#U7U7VSS#U1
VSS#V24
VSS#V23
VSS#AJ10
VSS#AJ13
VSS#AJ16
AJ13
AJ16
U1
AJ17
R143 0R0402R143 0R0402
R147 X_0R0402R147 X_0R0402
T3
R5
R30
VSS#T7T7VSS#T6T6VSS#T3
VSS#R7R7VSS#R5
VSS#R30
VSS#AJ17
VSS#AJ20
VSS#AJ23
VSS#AJ24
VSS#AJ27
VSS#AJ28
VSS#AJ29
AJ20
AJ23
AJ24
AJ27
AJ28
AJ29
R29
R28
R27
VSS#R29
VSS#R28
VSS#AJ30
VSS#AJ4
AJ4
AJ7
AJ30
VSS#R27
VSS#AJ7
H_TESTHI12 3
R2
R26
R25
R24
R23
VSS#R2
VSS#R26
VSS#R25
VSS#R24
VSS#R23
VSS#AK10
VSS#AK13
VSS#AK16
VSS#AK17
VSS#AK2
AK2
AK10
AK13
AK16
AK17
AK20
P4
P30
P29
VSS#P7P7VSS#P4
VSS#P30
VSS#AK20
VSS#AK23
VSS#AK24
AK23
AK24
AK27
P28
P27
P26
VSS#P29
VSS#P28
VSS#P27
VSS#AK27
VSS#AK28
VSS#AK29
AK28
AK29
AK30
P25
P24
P23
VSS#P26
VSS#P25
VSS#P24
VSS#AK30
VSS#AK5
VSS#AK7
AK5
AK7
AL10
N3
VSS#N7N7VSS#N6N6VSS#N3
VSS#P23
VSS#AL10
VSS#AL13
VSS#AL16
AL13
AL16
AL17
M1
VSS#M7M7VSS#M1
VSS#AL17
VSS#AL20
VSS#AL23
AL20
AL23
AL24
L6
L3
L30
VSS#L7L7VSS#L6
VSS#L30
VSS#AL24
VSS#AL27
VSS#AL28
AL3
AL27
AL28
L29
L28
VSS#L3
VSS#L29
VSS#L28
VSS#AL3
VSS#AL7
VSS#AM1
AL7
AM1
L27
L26
VSS#L27
VSS#L26
VSS#AM10
VSS#AM13
AM10
AM13
L25
L24
VSS#L25
VSS#L24
VSS#AM16
VSS#AM17
AM16
AM17
L23
VSS#K7K7VSS#K5
VSS#L23
VSS#AM20
VSS#AM23
AM20
AM23
K5
VSS#AM24
AM24
K2
J7
VSS#K2
VSS#AM27
AM27
AM28
H3
H6
H7
H8
H9
VSS#J4J4VSS#J7
VSS#H6
VSS#H7
VSS#H8
VSS#H9
VSS#AM28
VSS#AM4
VSS#AN1
VSS#AN10
VSS#AN13
AN1
AM4
AN10
AN13
H28
VSS#H3
VSS#H28
VSS#AN16
VSS#AN17
VSS#AN2
AN2
AN16
AN17
H25
H26
H27
VSS#H26
VSS#H27
VSS#AN20
VSS#AN23
AN20
AN23
AN24
H24
VSS#H24
VSS#H25
VSS#AN24
VSS#AN27
AN27
H21
H22
H23
VSS#H21
VSS#H22
VSS#H23
VSS#AN28
VSS#B1B1VSS#B11
AN28
H17
H18
H19
H20
VSS#H14
VSS#H13
VSS#H17
VSS#H18
VSS#H19
VSS#H20
VSS#H12
VSS#H11
VSS#H10
VSS#G1
VSS#F7
VSS#F4
VSS#F22
VSS#F19
VSS#F16
VSS#F13
VSS#F10
VSS#E8
VSS#E29
VSS#E28
VSS#E27
VSS#E26
VSS#E25
VSS#E20
VSS#E2
VSS#E17
VSS#E14
VSS#E11
VSS#D9
VSS#D6
VSS#D5
VSS#D3
VSS#D24
VSS#D21
VSS#D18
VSS#D15
VSS#D12
VSS#C7
VSS#C4
VSS#C24
VSS#C22
VSS#C19
VSS#C16
VSS#C13
VSS#C10
VSS#B8
VSS#B5
VSS#B24
VSS#B20
VSS#B17
VSS#B14
ZIF-SOCK775-15u-in
ZIF-SOCK775-15u-in
B11
B14
H14
H13
H12
H11
H10
G1
F7
F4
F22
F19
F16
F13
F10
E8
E29
E28
E27
E26
E25
E20
E2
E17
E14
E11
D9
D6
D5
D3
D24
D21
D18
D15
D12
C7
C4
C24
C22
C19
C16
C13
C10
B8
B5
B24
B20
B17
R176 51R0402R176 51R0402
R179 X_0R0402R179 X_0R0402
R177 X_0R0402R177 X_0R0402
R196 X_1KR0402R196 X_1KR0402
VTT_OUT_LEFT
H_BPM#0 3
VTT_OUT_RIGHT
R162
R162
R207
E7
F23
F6
RSVD#E5E5RSVD#E6E6RSVD#E7
RSVD#F23
VSS#AF20
VSS#AF23
VSS#AF24
VSS#AF25
AF20
AF23
AF24
AF25
AF26
R207
24.9R1%0402
24.9R1%0402
51R0402
51R0402
H_COMP8
B13
IMPSEL#
RSVD#B13
VSS#AF26
VSS#AF27
VSS#AF28
AF27
AF28
AF29
R139
R139
P5
N4
J3
RSVD#J3
RSVD#N4
VSS#AF29
VSS#AF3
VSS#AF30
AF3
AF6
AF30
MSID[1]V1MSID[0]
RSVD#P5
VSS#AF6
VSS#AF7
VSS#AG10
AF7
AG10
R133
R133
X_51R0402
X_51R0402
AC4
W1
RSVD#AC4
VSS#AG13
VSS#AG16
VSS#AG17
AG13
AG16
AG17
VSS#Y7Y7VSS#Y5Y5VSS#Y2
VSS#AG20
VSS#AG23
VSS#AG24
AG20
AG23
AG24
Y2
W4
VSS#W7W7VSS#W4
VSS#AG7
VSS#AH1
AH1
AG7
AH10
V6
V30
VSS#V7V7VSS#V6
VSS#AH10
VSS#AH13
VSS#AH16
AH13
AH16
AH17
V3
V29
V28
VSS#V3
VSS#V30
VSS#V29
VSS#AH17
VSS#AH20
VSS#AH23
AH20
AH23
AH24
V27
VSS#V28
VSS#V27
VSS#AH24
VSS#AH3
AH3
R132
R132
R118
R118
49.9R1%0402
H_COMP6
H_COMP7
AE3
COMP6Y3COMP7
VSS#AE29
VSS#AE30
AE5
AE29
AE30
49.9R1%0402
49.9R1%0402
D1
D14
AE4
RSVD#D1
RSVD#D14
RSVD#AE4
VSS#AE5
VSS#AE7
VSS#AF10
VSS#AF13
AE7
AF10
AF13
49.9R1%0402
E23
RSVD#E23
VSS#AF16
VSS#AF17
AF16
AF17
49.9R1%0402
D D
R197 X_1KR0402R197 X_1KR0402
C C
B B
49.9R1%0402
U3C
U3C
A12
A15
A18
A2
A21
A24
A6
A9
AA23
AA24
AA25
AA26
AA27
AA28
AA29
AA3
AA30
AA6
AA7
AB1
AB23
AB24
AB25
AB26
AB27
AB28
AB29
AB30
AB7
AC3
AC6
AC7
AD4
AD7
AE10
AE13
AE16
AE17
AE2
AE20
AE24
AE25
AE26
AE27
AE28
VSS#A12
VSS#A15
VSS#A18
VSS#A2
VSS#A21
VSS#A24
VSS#A6
VSS#A9
VSS#AA23
VSS#AA24
VSS#AA25
VSS#AA26
VSS#AA27
VSS#AA28
VSS#AA29
VSS#AA3
VSS#AA30
VSS#AA6
VSS#AA7
VSS#AB1
VSS#AB23
VSS#AB24
VSS#AB25
VSS#AB26
VSS#AB27
VSS#AB28
VSS#AB29
VSS#AB30
VSS#AB7
VSS#AC3
VSS#AC6
VSS#AC7
VSS#AD4
VSS#AD7
VSS#AE10
VSS#AE13
VSS#AE16
VSS#AE17
VSS#AE2
VSS#AE20
VSS#AE24
VSS#AE25
VSS#AE26
VSS#AE27
VSS#AE28
R99 X_0R0402R99 X_0R0402
CPU DECOUPLING CAPACITORS
VCCP VCCP
A A
EC22
EC22
C22u6.3X1206
C22u6.3X1206
EC24
EC24
C22u6.3X1206
C22u6.3X1206
EC15
EC15
C22u6.3X1206
C22u6.3X1206
VCCP
EC23
EC23
C22u6.3X1206
C22u6.3X1206
EC27
EC27
C22u6.3X1206
C22u6.3X1206
EC14
EC14
C22u6.3X1206
C22u6.3X1206
EC26
EC26
C22u6.3X1206
C22u6.3X1206
EC12
EC12
C22u6.3X1206
C22u6.3X1206
EC16
EC16
C22u6.3X1206
C22u6.3X1206
VCCP
EC25
EC25
C22u6.3X1206
C22u6.3X1206
EC13
EC13
C22u6.3X1206
C22u6.3X1206
EC17
EC17
C22u6.3X1206
C22u6.3X1206
Place these caps within socket cavity
MICRO-STAR INT'L CO.,LTD
MICRO-STAR INT'L CO.,LTD
MICRO-STAR INT'L CO.,LTD
MS-7393-0B--070910K1
MS-7393-0B--070910K1
MSI
MSI
MSI
Size Document Description Rev
Size Document Description Rev
Size Document Description Rev
Custom
Custom
Custom
Date:
Monday, September 10, 2007
Date:
Monday, September 10, 2007
Date:
8
7
6
5
4
3
Monday, September 10, 2007
2
MS-7393-0B--070910K1
LGA775 - GND
LGA775 - GND
LGA775 - GND
Sheet of
Sheet of
Sheet of
1
0A
0A
534
534
534
0A
![](/html/97/9707/9707304389095e928103657c9f6978d4db666033eee9a687b7be67f1fc1a91c6/bg6.png)
8
H_DBI#[0..3]3
D D
C C
B B
H_DBI#[0..3]
VTT_OUT_RIGHT
A A
7
H_DSTBP#03
H_DSTBN#03
H_DSTBP#13
H_DSTBN#13
H_DSTBP#23
H_DSTBN#23
H_DSTBP#33
H_DSTBN#33
H_A#[3..35]3
H_ADSTB#03
H_ADSTB#13
H_REQ#[0..4]3
H_ADS#3
H_BNR#3
H_BR#03,4
H_BPRI#3
H_DBSY#3
H_DEFER#3
H_DRDY#3
H_HIT#3
H_HITM#3
H_LOCK#3
H_TRDY#3
H_RS#[0..2]3
H_FERR#3,4
H_A20M#3
H_IGNNE#3
H_INIT#3
H_SMI#3
H_INTR3,4
H_NMI3,4
H_STPCLK#3
H_PWRGD3,4
R228 49.9R1%0402R228 49.9R1%0402
R231 49.9R1%0402R231 49.9R1%0402
H_DBI#0
H_DBI#1
H_DBI#2
H_DBI#3
H_A#3
H_A#4
H_A#5
H_A#6
H_A#7
H_A#8
H_A#9
H_A#10
H_A#11
H_A#12
H_A#13
H_A#14
H_A#15
H_A#16
H_A#17
H_A#18
H_A#19
H_A#20
H_A#21
H_A#22
H_A#23
H_A#24
H_A#25
H_A#26
H_A#27
H_A#28
H_A#29
H_A#30
H_A#31
H_A#32
H_A#33
H_A#34
H_A#35
H_REQ#0
H_REQ#1
H_REQ#2
H_REQ#3
H_REQ#4
H_RS#0
H_RS#1
H_RS#2
H_FERR#
H_A20M#
H_IGNNE#
H_INIT#
H_SMI#
H_INTR
H_NMI
H_STPCLK#
AA34
AA32
AA31
AB30
AA30
AC35
AC34
AC33
AC32
AC31
AE30
AC30
AE34
AE33
AE31
AG33
AE32
AG35
AG34
AF30
AG31
AG30
AJ32
AJ34
AJ33
AJ30
AJ31
AL35
AK30
AA33
AG32
AF37
AF36
AH37
AC36
AE35
AC37
AG36
AD38
AG37
AE36
AG38
AD36
AD37
AD35
AL38
AH38
AK36
AL36
AL37
AH36
AH35
AJ36
AK37
AM38
AM37
W36
W37
M38
W34
W31
W33
W32
W30
W35
V36
N31
P30
R34
G33
G35
H31
N36
J35
V30
U31
U30
U8A
U8A
?
?
CPU_DSTBP0#
CPU_DSTBN0#
CPU_DBI0#
CPU_DSTBP1#
CPU_DSTBN1#
CPU_DBI1#
CPU_DSTBP2#
CPU_DSTBN2#
CPU_DBI2#
CPU_DSTBP3#
CPU_DSTBN3#
CPU_DBI3#
CPU_A3#
CPU_A4#
CPU_A5#
CPU_A6#
CPU_A7#
CPU_A8#
CPU_A9#
CPU_A10#
CPU_A11#
CPU_A12#
CPU_A13#
CPU_A14#
CPU_A15#
CPU_A16#
CPU_A17#
CPU_A18#
CPU_A19#
CPU_A20#
CPU_A21#
CPU_A22#
CPU_A23#
CPU_A24#
CPU_A25#
CPU_A26#
CPU_A27#
CPU_A28#
CPU_A29#
CPU_A30#
CPU_A31#
CPU_A32#
CPU_A33#
CPU_A34#
CPU_A35#
CPU_ADSTB0#
CPU_ADSTB1#
CPU_REQ0#
CPU_REQ1#
CPU_REQ2#
CPU_REQ3#
CPU_REQ4#
CPU_ADS#
CPU_BNR#
CPU_BR0#
CPU_BPRI#
CPU_DBSY#
CPU_DEFER#
CPU_DRDY#
CPU_HIT#
CPU_HITM#
CPU_LOCK#
CPU_TRDY#
CPU_RS0#
CPU_RS1#
CPU_RS2#
FERR#
A20M#
IGNNE#
INIT#
SMI#
LINT0_INTR
LINT1_NMI
STPCLK#
CPU_PWRGD
CPU_COMP_VCC
CPU_COMP_GND
?
?
6
SEC 1 OF 10
SEC 1 OF 10
MCP73
MCP73
CPU_D0#
CPU_D1#
CPU_D2#
CPU_D3#
CPU_D4#
CPU_D5#
CPU_D6#
CPU_D7#
CPU_D8#
CPU_D9#
CPU_D10#
CPU_D11#
CPU_D12#
CPU_D13#
CPU_D14#
CPU_D15#
CPU_D16#
CPU_D17#
CPU_D18#
CPU_D19#
CPU_D20#
CPU_D21#
CPU_D22#
CPU_D23#
CPU_D24#
CPU_D25#
CPU_D26#
CPU_D27#
CPU_D28#
CPU_D29#
CPU_D30#
CPU_D31#
CPU_D32#
CPU_D33#
CPU_D34#
CPU_D35#
CPU_D36#
CPU_D37#
CPU_D38#
CPU_D39#
CPU_D40#
CPU_D41#
CPU_D42#
CPU_D43#
CPU_D44#
CPU_D45#
CPU_D46#
CPU_D47#
CPU_D48#
CPU_D49#
CPU_D50#
CPU_D51#
CPU_D52#
CPU_D53#
CPU_D54#
CPU_D55#
CPU_D56#
CPU_D57#
CPU_D58#
CPU_D59#
CPU_D60#
CPU_D61#
CPU_D62#
CPU_D63#
CPU_RESET#
BCLK_OUT_CPU_P
BCLK_OUT_CPU_N
BCLK_OUT_ITP_P
BCLK_OUT_ITP_N
BCLK_OUT_MCP_P
BCLK_OUT_MCP_N
BCLK_IN_N
BCLK_IN_P
BSEL0
BSEL1
BSEL2
PECI
PROCHOT#
THERMTRIP#
BCLK_COMP
AB36
AA36
AB37
Y36
AA35
Y35
Y37
Y38
U35
T35
U36
T36
V37
T37
R37
T38
R31
U33
U34
R30
U32
R32
R33
R35
N30
N32
N33
N34
L30
L31
L33
L32
L35
L34
K30
J34
J31
J30
J33
J32
G31
G34
G36
F33
E33
E35
D35
D36
J36
M37
R36
N35
P37
P36
L36
M35
M36
L37
H36
H35
K36
K37
H38
H37
C36
G38
G37
AN36
AM35
D37
D38
C37
C38
F36
E36
F37
B37
AM36
AJ35
B38
5
H_D#0
H_D#1
H_D#2
H_D#3
H_D#4
H_D#5
H_D#6
H_D#7
H_D#8
H_D#9
H_D#10
H_D#11
H_D#12
H_D#13
H_D#14
H_D#15
H_D#16
H_D#17
H_D#18
H_D#19
H_D#20
H_D#21
H_D#22
H_D#23
H_D#24
H_D#25
H_D#26
H_D#27
H_D#28
H_D#29
H_D#30
H_D#31
H_D#32
H_D#33
H_D#34
H_D#35
H_D#36
H_D#37
H_D#38
H_D#39
H_D#40
H_D#41
H_D#42
H_D#43
H_D#44
H_D#45
H_D#46
H_D#47
H_D#48
H_D#49
H_D#50
H_D#51
H_D#52
H_D#53
H_D#54
H_D#55
H_D#56
H_D#57
H_D#58
H_D#59
H_D#60
H_D#61
H_D#62
H_D#63
CPUCLK
CPUCLK#
BCLKMCP
BCLKMCP#
BCLKIN#
BCLKIN
CPU_PECI_MCP
H_PROCHOT#_R
H_CPURST# 3,4
R226 0R0402R226 0R0402
R225 0R0402R225 0R0402
R222 0R0402R222 0R0402
R224 0R0402R224 0R0402
CPU_BSEL0
CPU_BSEL1
CPU_BSEL2
TRMTRIP#
TRMTRIP# 3,4
R220 X_2.37KR1%0402R220 X_2.37KR1%0402
H_D#[0..63] 3
X_49.9R1%0402
X_49.9R1%0402
CPU_PECI_MCP 3
R223
R223
4
8
CPU_BSEL13
CPU_BSEL03
CPU_BSEL23
R221
R221
X_49.9R1%0402
X_49.9R1%0402
6
4
2
8P4R-470R0402
8P4R-470R0402
R219
R219
X_49.9R1%0402
X_49.9R1%0402
RN16
RN16
3
V_FSB_VTT
7
5
3
1
R214
R214
X_49.9R1%0402
X_49.9R1%0402
BSEL[2..0] FSB CLK (MHz)
000
001
010
100
TBD
C148
C148
X_C15p50N0402
X_C15p50N0402
R217 0R0402R217 0R0402
VTT_OUT_RIGHT
R229
R229
X_130R1%0402
X_130R1%0402
C152
C152
X_C15p50N0402
X_C15p50N0402
266MHz
133MHz
200MHz
333MHz
Reserved
CK_H_CPU 3
CK_H_CPU# 3
2
H_PROCHOT# 3,4
1
if CPU processor hot cause system shutdown, remove OR.
MICRO-STAR INT'L CO.,LTD
MICRO-STAR INT'L CO.,LTD
MICRO-STAR INT'L CO.,LTD
MS-7393-0B--070910K1
MS-7393-0B--070910K1
MSI
MSI
MSI
Size Document Description Rev
Size Document Description Rev
Size Document Description Rev
Custom
Custom
Custom
Date:
Monday, September 10, 2007
Date:
Monday, September 10, 2007
Date:
8
7
6
5
4
3
Monday, September 10, 2007
2
MS-7393-0B--070910K1
MCP73-CPU
MCP73-CPU
MCP73-CPU
Sheet of
Sheet of
Sheet of
634
634
634
1
0A
0A
0A
![](/html/97/9707/9707304389095e928103657c9f6978d4db666033eee9a687b7be67f1fc1a91c6/bg7.png)
8
7
6
5
4
3
2
1
D D
PE1_TXP18
PE1_TXN18
PE1_RXP18
PE1_RXN18
PE1_CLK18
PE1_CLK#18
PE1_TXP
PE1_TXN
PE1_RXP
PE1_RXN
PE1_CLK
PE1_CLK#
R334 0R0402R334 0R0402
3VDUAL
53
U15
U15
VCC
C C
PE_RESET#18
X_NC7SZ08M5X_SOT23-5
X_NC7SZ08M5X_SOT23-5
VCC
A
A
4
Y
Y
1
B
B
2
GND
GND
PE_RESET_GATE#
ATX_PWR_OK 14,20,21,27
PE_WAKE*18
PE_WAKE*
R315 X_2.37KR1%0402R315 X_2.37KR1%0402
connect to +3.3V through a bead instead backdrivng circuit , if HDMI unused.
VCC3
R246
CP7 X_COPPERCP7 X_COPPER
FB13
FB13
X_30ohm/500m/6
X_30ohm/500m/6
B B
VGA_BLUE17
VGA_GREEN17
VGA_RED17
VGA_BLUE
VGA_GREEN
VGA_RED
R254
R254
150R1%0402
150R1%0402
21
+3.3V_HDMI_IN
R261
R261
150R1%0402
150R1%0402
R258
R258
150R1%0402
150R1%0402
C167
C167
C0.1u10X0402
C0.1u10X0402
PLACE NEAR MCP73 within 600mil.
A A
8
7
6
C168
C168
C0.1u10X0402
C0.1u10X0402
HSYNC#17
VSYNC#17
R265
R265
124R1%0402
124R1%0402
DDC_DATA17
DDC_CLK17
X_1KR1%0402
X_1KR1%0402
R246
C242
C242
C4.7u6.3X50805
C4.7u6.3X50805
HSYNC#
VSYNC#
C173 C0.01u16X0402C173 C0.01u16X0402
DDC_DATA
DDC_CLK
10KR0402
10KR0402
VCC3
R390 10KR0402R390 10KR0402
HDMI_RSET
DAC_RSET
R404
R404
5
60mA
10mA
H9
H8
H7
H6
B1
C1
F6
F5
D2
D3
E2
E3
A2
B2
F7
E7
E13
A3
A35
A36
C35
B35
C34
B34
B36
A37
D34
C30
B30
A27
B27
C27
B28
C28
C26
D28
D30
E29
F27
E27
G27
D29
C29
U8B
U8B
?
?
PE1_TX0_P
PE1_TX0_N
PE1_RX0_P
PE1_RX0_N
PE1_REFCLK_P
PE1_REFCLK_N
PEA_PRSNT#
PEA_CLKREQ#
PE2_TX0_P
PE2_TX0_N
PE2_RX0_P
PE2_RX0_N
PE2_REFCLK_P
PE2_REFCLK_N
PEB_PRSNT#
PEX_RST0#
PE_WAKE#/GPIO_21
PEX_CLK_COMP
HDMI_TXD0_P
HDMI_TXD0_N
HDMI_TXD1_P
HDMI_TXD1_N
HDMI_TXD2_P
HDMI_TXD2_N
HDMI_TXC_P
HDMI_TXC_N
HDMI_RSET
V3P3_HDMI_IO
V3P3_HDMI_PLL
DAC_BLUE
DAC_GREEN
DAC_RED
DAC_HSYNC
DAC_VSYNC
DAC_RSET
DAC_VREF
DDC_DATA0
DDC_CLK0
DDC_DATA3
DDC_CLK3
HPLUG_DET3
HDCP_ROM_SCLK
HDCP_ROM_SDATA
?
?
SEC 3 OF 10
SEC 3 OF 10
PE0_PRSNTX1#/DDC_CLK1
PE0_PRSNTX4#/DDC_DATA1
MCP73
MCP73
PE0_TX15_P
PE0_TX14_P
PE0_TX13_P
PE0_TX12_P
PE0_TX11_P
PE0_TX10_P
PE0_TX9_P
PE0_TX8_P
PE0_TX7_P
PE0_TX6_P
PE0_TX5_P
PE0_TX4_P
PE0_TX3_P
PE0_TX2_P
PE0_TX1_P
PE0_TX0_P
PE0_TX15_N
PE0_TX14_N
PE0_TX13_N
PE0_TX12_N
PE0_TX11_N
PE0_TX10_N
PE0_TX9_N
PE0_TX8_N
PE0_TX7_N
PE0_TX6_N
PE0_TX5_N
PE0_TX4_N
PE0_TX3_N
PE0_TX2_N
PE0_TX1_N
PE0_TX0_N
PE0_RX15_P
PE0_RX14_P
PE0_RX13_P
PE0_RX12_P
PE0_RX11_P
PE0_RX10_P
PE0_RX9_P
PE0_RX8_P
PE0_RX7_P
PE0_RX6_P
PE0_RX5_P
PE0_RX4_P
PE0_RX3_P
PE0_RX2_P
PE0_RX1_P
PE0_RX0_P
PE0_RX15_N
PE0_RX14_N
PE0_RX13_N
PE0_RX12_N
PE0_RX11_N
PE0_RX10_N
PE0_RX9_N
PE0_RX8_N
PE0_RX7_N
PE0_RX6_N
PE0_RX5_N
PE0_RX4_N
PE0_RX3_N
PE0_RX2_N
PE0_RX1_N
PE0_RX0_N
PE0_REFCLK_P
PE0_REFCLK_N
PE0_PRSNTX8#/EXP_EN
PE0_PRSNTX16#
V1P2_PEX0_PLL
V1P2_PEX1_PLL
V1P2_PLL_XREF_XS0
V1P2_PLL_XREF_XS1
V3P3_PLL_XREF_XS0
V3P3_PLL_XREF_XS1
V3P3_PLL_COREPLL
V3P3_VPLL
4
V4
U2
T2
R1
R4
P4
N2
M2
L1
L4
K4
J2
H2
G1
G4
F4
V3
U3
T3
R2
R3
P3
N3
M3
L2
L3
K3
J3
H3
G2
G3
F3
V6
V8
U9
T5
T7
T9
P6
P8
N9
M5
M7
M9
K6
K8
J9
H5
V5
V7
V9
T4
T6
T8
P5
P7
P9
M4
M6
M8
K5
K7
K9
H4
C2
D1
B3
B4
A4
C4
M14
N14
M12
M13
L8
L9
H26
F26
PE_A_TXP15
PE_A_TXP14
PE_A_TXP13
PE_A_TXP12
PE_A_TXP11
PE_A_TXP10
PE_A_TXP9
PE_A_TXP8
PE_A_TXP7
PE_A_TXP6
PE_A_TXP5
PE_A_TXP4
PE_A_TXP3
PE_A_TXP2
PE_A_TXP1
PE_A_TXP0
PE_A_TXN15
PE_A_TXN14
PE_A_TXN13
PE_A_TXN12
PE_A_TXN11
PE_A_TXN10
PE_A_TXN9
PE_A_TXN8
PE_A_TXN7
PE_A_TXN6
PE_A_TXN5
PE_A_TXN4
PE_A_TXN3
PE_A_TXN2
PE_A_TXN1
PE_A_TXN0
PE_A_RXP15
PE_A_RXP14
PE_A_RXP13
PE_A_RXP12
PE_A_RXP11
PE_A_RXP10
PE_A_RXP9
PE_A_RXP8
PE_A_RXP7
PE_A_RXP6
PE_A_RXP5
PE_A_RXP4
PE_A_RXP3
PE_A_RXP2
PE_A_RXP1
PE_A_RXP0
PE_A_RXN15
PE_A_RXN14
PE_A_RXN13
PE_A_RXN12
PE_A_RXN11
PE_A_RXN10
PE_A_RXN9
PE_A_RXN8
PE_A_RXN7
PE_A_RXN6
PE_A_RXN5
PE_A_RXN4
PE_A_RXN3
PE_A_RXN2
PE_A_RXN1
PE_A_RXN0
PE_PRSNT1#
PE_PRSNT4#
PE_PRSNT8#
PE_PRSNT16#
170mA
21mA
5mA
5mA
+1.2V_PXE_PLL
45mA
+3.3V_PLL
+3.3V_PLL
PE_A_TXP[0..15] 18
PE_A_TXN[0..15] 18
PE_A_RXP[0..15] 18
PE_A_RXN[0..15] 18
PE_A_CLK 18
PE_A_CLK# 18
PE_PRSNT1# 18
PE_PRSNT4# 18
PE_PRSNT8# 18
PE_PRSNT16# 18
C274
C274
C0.1u10X0402
C0.1u10X0402
C232
C232
C0.1u10X0402
C0.1u10X0402
3
SDVO_SCL#
SDVO_SDA#
C268
C268
C0.1u10X0402
C0.1u10X0402
C230
C230
C0.1u10X0402
C0.1u10X0402
SDVO Muxing on X16 PCI Express
PE_PRSNT1# SDVO_SCL#
PE_A_TX3
PE_A_TX2
PE_A_TX1
PE_A_TX0
PE_A_RX1
PE_A_RX0
C276
C276
C4.7u6.3X50805
C4.7u6.3X50805
bottom
C236
C236
C4.7u6.3X50805
C4.7u6.3X50805
MSI
MSI
MSI
PE_PRSNT4#
PE_A_TX13
PE_A_TX14
PE_A_TX15
PE_A_RX14
PE_A_RX15
CP15 X_COPPERCP15 X_COPPER
FB11
FB11
2 1
X_30ohm/500m/6
X_30ohm/500m/6
CP12 X_COPPERCP12 X_COPPER
FB8
FB8
2 1
X_30ohm/500m/6
X_30ohm/500m/6
MICRO-STAR INT'L CO.,LTD
MICRO-STAR INT'L CO.,LTD
MICRO-STAR INT'L CO.,LTD
MS-7393-0B--070910K1
MS-7393-0B--070910K1
Size Document Description Rev
Size Document Description Rev
Size Document Description Rev
Custom
Custom
Custom
Date:
Monday, September 10, 2007
Date:
Monday, September 10, 2007
Date:
Monday, September 10, 2007
2
MS-7393-0B--070910K1
MCP73-PCIE/DAC
MCP73-PCIE/DAC
MCP73-PCIE/DAC
SDVO_SDA#
SDVO_CLK#PE_A_TX12
SDVO_BLUE
SDVO_GREEN
SDVO_RED
SDVO_INTR
SDVO_TVCLKIN
VCC1_3
VCC3
Sheet of
Sheet of
Sheet of
734
734
734
1
0A
0A
0A
![](/html/97/9707/9707304389095e928103657c9f6978d4db666033eee9a687b7be67f1fc1a91c6/bg8.png)
8
7
6
5
4
3
2
1
DATA 0
DIMM 1
DIMM 2
ADDR 0A / CNTL 0A
ADDR 0B / CNTL 0B
DIMM 0A
D D
DQS_A[0..7]9
DQS_A#[0..7]9
DQM_A[0..7]9
C C
MEM_0A_ADD[0..15]9,10
MEM_0A_BA[0..2]9,10
MEM_0A_CS#[0..1]9,10
MEM_0A_CKE[0..1]9,10
B B
MEM_0A_ODT[0..1]9,10
MCLK_0A_09
MCLK_0A_0#9
MCLK_0A_19
MCLK_0A_1#9
MCLK_0A_29
MCLK_0A_2#9
MEM_0B_CS#[0..1]9,10
MEM_0B_CKE[0..1]9,10
MEM_0B_ODT[0..1]9,10
MCLK_0B_09
MCLK_0B_0#9
MCLK_0B_19
MCLK_0B_1#9
MCLK_0B_29
MCLK_0B_2#9
A A
DQS_A0
DQS_A#0
DQS_A1
DQS_A#1
DQS_A2
DQS_A#2
DQS_A3
DQS_A#3
DQS_A4
DQS_A#4
DQS_A5
DQS_A#5
DQS_A6
DQS_A#6
DQS_A7
DQS_A#7
DQM_A0
DQM_A1
DQM_A2
DQM_A3
DQM_A4
DQM_A5
DQM_A6
DQM_A7
MEM_0A_ADD0
MEM_0A_ADD1
MEM_0A_ADD2
MEM_0A_ADD3
MEM_0A_ADD4
MEM_0A_ADD5
MEM_0A_ADD6
MEM_0A_ADD7
MEM_0A_ADD8
MEM_0A_ADD9
MEM_0A_ADD10
MEM_0A_ADD11
MEM_0A_ADD12
MEM_0A_ADD13
MEM_0A_ADD14
MEM_0A_ADD15
MEM_0A_BA0
MEM_0A_BA1
MEM_0A_BA2
MEM_0A_CS#0
MEM_0A_CS#1
MEM_0A_CKE0
MEM_0A_CKE1
MEM_0A_ODT0
MEM_0A_ODT1
MEM_0B_CS#0
MEM_0B_CS#1
MEM_0B_CKE0
MEM_0B_CKE1
MEM_0B_ODT0
MEM_0B_ODT1
AU37
AU38
AN33
AN34
AU31
AV31
AP28
AR28
AK18
AL18
AU20
AT20
AL14
AM14
AT14
AR15
AT36
AN35
AT31
AJ29
AM18
AU21
AN14
AT15
AU29
AK21
AK22
AL22
AM22
AP22
AN22
AL24
AK24
AM24
AT28
AN24
AP24
AT24
AK25
AK26
AU27
AU28
AR24
AR27
AU24
AL26
AN26
AT25
AT23
AN20
AM20
AT35
AR35
AT18
AR18
AT26
AU23
AM26
AP26
AU25
AV23
AR20
AP20
AT34
AR34
AT17
AU17
U8C
U8C
?
?
MDQS0_0
MDQS0_0#
MDQS0_1
MDQS0_1#
MDQS0_2
MDQS0_2#
MDQS0_3
MDQS0_3#
MDQS0_4
MDQS0_4#
MDQS0_5
MDQS0_5#
MDQS0_6
MDQS0_6#
MDQS0_7
MDQS0_7#
MDQM0_0
MDQM0_1
MDQM0_2
MDQM0_3
MDQM0_4
MDQM0_5
MDQM0_6
MDQM0_7
MA0A_0
MA0A_1
MA0A_2
MA0A_3
MA0A_4
MA0A_5
MA0A_6
MA0A_7
MA0A_8
MA0A_9
MA0A_10
MA0A_11
MA0A_12
MA0A_13
MA0A_14
MA0A_15
MBA0A_0
MBA0A_1
MBA0A_2
MCS0A_0#
MCS0A_1#
MCKE0A_0
MCKE0A_1
MODT0A_0
MODT0A_1
MCLK0A_0
MCLK0A_0#
MCLK0A_1
MCLK0A_1#
MCLK0A_2
MCLK0A_2#
MCS0B_0#
MCS0B_1#
MCKE0B_0
MCKE0B_1
MODT0B_0
MODT0B_1
MCLK0B_0
MCLK0B_0#
MCLK0B_1
MCLK0B_1#
MCLK0B_2
MCLK0B_2#
?
?
SEC 2 OF 10
SEC 2 OF 10
MCP73
MCP73
MDQ0_0
MDQ0_1
MDQ0_2
MDQ0_3
MDQ0_4
MDQ0_5
MDQ0_6
MDQ0_7
MDQ0_8
MDQ0_9
MDQ0_10
MDQ0_11
MDQ0_12
MDQ0_13
MDQ0_14
MDQ0_15
MDQ0_16
MDQ0_17
MDQ0_18
MDQ0_19
MDQ0_20
MDQ0_21
MDQ0_22
MDQ0_23
MDQ0_24
MDQ0_25
MDQ0_26
MDQ0_27
MDQ0_28
MDQ0_29
MDQ0_30
MDQ0_31
MDQ0_32
MDQ0_33
MDQ0_34
MDQ0_35
MDQ0_36
MDQ0_37
MDQ0_38
MDQ0_39
MDQ0_40
MDQ0_41
MDQ0_42
MDQ0_43
MDQ0_44
MDQ0_45
MDQ0_46
MDQ0_47
MDQ0_48
MDQ0_49
MDQ0_50
MDQ0_51
MDQ0_52
MDQ0_53
MDQ0_54
MDQ0_55
MDQ0_56
MDQ0_57
MDQ0_58
MDQ0_59
MDQ0_60
MDQ0_61
MDQ0_62
MDQ0_63
MRAS0A#
MCAS0A#
MWE0A#
MEM_COMP_1P8V
MEM_COMP_GND
V1P2_PLL_MEM_CPU
V3P3_PLL
AT37
AT38
AU35
AV35
AR36
AR37
AV37
AU36
AL32
AL31
AR32
AP30
AL34
AL33
AN32
AP32
AT32
AU32
AR30
AT29
AT33
AU33
AR31
AT30
AL30
AK29
AL28
AK28
AN30
AM30
AN28
AM28
AP18
AN18
AP16
AN16
AL20
AK20
AK17
AR16
AR22
AT21
AT19
AR19
AR23
AT22
AU19
AV19
AK16
AP14
AR12
AP12
AM16
AL16
AK14
AT12
AU15
AV15
AU13
AU12
AT16
AU16
AR14
AT13
AV27
AR26
AT27
AP37
AP36
M26
D26
30mA
DATA_A0
DATA_A1
DATA_A2
DATA_A3
DATA_A4
DATA_A5
DATA_A6
DATA_A7
DATA_A8
DATA_A9
DATA_A10
DATA_A11
DATA_A12
DATA_A13
DATA_A14
DATA_A15
DATA_A16
DATA_A17
DATA_A18
DATA_A19
DATA_A20
DATA_A21
DATA_A22
DATA_A23
DATA_A24
DATA_A25
DATA_A26
DATA_A27
DATA_A28
DATA_A29
DATA_A30
DATA_A31
DATA_A32
DATA_A33
DATA_A34
DATA_A35
DATA_A36
DATA_A37
DATA_A38
DATA_A39
DATA_A40
DATA_A41
DATA_A42
DATA_A43
DATA_A44
DATA_A45
DATA_A46
DATA_A47
DATA_A48
DATA_A49
DATA_A50
DATA_A51
DATA_A52
DATA_A53
DATA_A54
DATA_A55
DATA_A56
DATA_A57
DATA_A58
DATA_A59
DATA_A60
DATA_A61
DATA_A62
DATA_A63
MEM_0A_RAS#
MEM_0A_CAS#
MEM_0A_WE#
M_DRV0_1P8V
M_DRV1_GND
60mA
+3.3V_PLL
DATA_A[0..63] 9
MEM_0A_RAS# 9,10
MEM_0A_CAS# 9,10
MEM_0A_WE# 9,10
R227 40.2R1%0402R227 40.2R1%0402
R230 40.2R1%0402R230 40.2R1%0402
C406
C406
C0.1u10X0402
C0.1u10X0402
VCC_DDR
FB12
FB12
2 1
X_30ohm/500m/6
X_30ohm/500m/6
CP28 X_COPPERCP28 X_COPPER
bottom
VCC1_3
MICRO-STAR INT'L CO.,LTD
MICRO-STAR INT'L CO.,LTD
MICRO-STAR INT'L CO.,LTD
MS-7393-0B--070910K1
MS-7393-0B--070910K1
MSI
MSI
MSI
Size Document Description Rev
Size Document Description Rev
Size Document Description Rev
Custom
Custom
Custom
Date:
Monday, September 10, 2007
Date:
Monday, September 10, 2007
Date:
8
7
6
5
4
3
Monday, September 10, 2007
2
MS-7393-0B--070910K1
MCP73-MEM
MCP73-MEM
MCP73-MEM
Sheet of
Sheet of
Sheet of
1
0A
0A
0A
834
834
834
![](/html/97/9707/9707304389095e928103657c9f6978d4db666033eee9a687b7be67f1fc1a91c6/bg9.png)
DIMM1 / 0A
DIMM2 / 0B
VCC3VCC_DDR VCC3VCC_DDR
DIMM1
DATA_A[0..63]8
DATA_A0
DATA_A1
DATA_A2
DATA_A3
DATA_A4
DATA_A5
DATA_A6
DATA_A7
DATA_A8
DATA_A9
DATA_A10
DATA_A11
DATA_A12
DATA_A13
DATA_A14
DATA_A15
DATA_A16
DATA_A17
DATA_A18
DATA_A19
DATA_A20
DATA_A21
DATA_A22
DATA_A23
DATA_A24
DATA_A25
DATA_A26
DATA_A27
DATA_A28
DATA_A29
DATA_A30
DATA_A31
DATA_A32
DATA_A33
DATA_A34
DATA_A35
DATA_A36
DATA_A37
DATA_A38
DATA_A39
DATA_A40
DATA_A41
DATA_A42
DATA_A43
DATA_A44
DATA_A45
DATA_A46
DATA_A47
DATA_A48
DATA_A49
DATA_A50
DATA_A51
DATA_A52
DATA_A53
DATA_A54
DATA_A55
DATA_A56
DATA_A57
DATA_A58
DATA_A59
DATA_A60
DATA_A61
DATA_A62
DATA_A63
VCC3 VCC3
2
D16
D16
3
BAV99
BAV99
1
DIMM1
3
4
9
10
122
123
128
129
12
13
21
22
131
132
140
141
24
25
30
31
143
144
149
150
33
34
39
40
152
153
158
159
80
81
86
87
199
200
205
206
89
90
95
96
208
209
214
215
98
99
107
108
217
218
226
227
110
111
116
117
229
230
235
236
2
5
8
11
14
17
20
23
26
29
32
35
38
41
44
47
50
65
66
79
82
85
88
91
94
97
2
D18
D18
SMB_MEM_CLKSMB_MEM_DATA
3
BAV99
BAV99
1
DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQ8
DQ9
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
DQ16
DQ17
DQ18
DQ19
DQ20
DQ21
DQ22
DQ23
DQ24
DQ25
DQ26
DQ27
DQ28
DQ29
DQ30
DQ31
DQ32
DQ33
DQ34
DQ35
DQ36
DQ37
DQ38
DQ39
DQ40
DQ41
DQ42
DQ43
DQ44
DQ45
DQ46
DQ47
DQ48
DQ49
DQ50
DQ51
DQ52
DQ53
DQ54
DQ55
DQ56
DQ57
DQ58
DQ59
DQ60
DQ61
DQ62
DQ63
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
68
19
55
102
NC
NC
RC118RC0
VDD051VDD156VDD262VDD372VDD478VDD5
NC/TEST
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
100
103
106
109
112
115
118
121
124
127
170
191
194
181
175
75
VDD6
VDD7
VDD8
VDD3
VDDQ0
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
130
133
136
139
142
145
148
ADDRESS: 000
0xA0
VDDQ153VDDQ259VDDQ364VDDQ4
VSS
151
197
172
187
184
189
67
178
238
161
162
167
168
CB042CB143CB248CB349CB4
CB5
CB6
CB7
DQS_A0
7
VDDQ5
VDDQ6
VDDQ7
VDDQ8
VDDQ9
VDDQ469VDDQ7
VSS
VSS
VSS
VSS
VSS
154
157
160
163
166
VDDSPD
VSS
VSS
VSS
VSS
VSS
VSS
VSS
169
198
201
204
207
210
213
216
DQS0
DQS0#
DQS1
DQS1#
DQS2
DQS2#
DQS3
DQS3#
DQS4
DQS4#
DQS5
DQS5#
DQS6
DQS6#
DQS7
DQS7#
DQS8
DQS8#
A10_AP
A16/BA2
WE#
CAS#
RAS#
DM0/DQS9
NC/DQS9#
DM1/DQS10
NC/DQS10#
DM2/DQS11
NC/DQS11#
DM3/DQS12
NC/DQS12#
DM4/DQS13
NC/DQS13#
DM5/DQS14
NC/DQS14#
DM6/DQS15
NC/DQS15#
DM7/DQS16
NC/DQS16#
DM8/DQS17
NC/DQS17#
ODT0
ODT1
CKE0
CKE1
CS0#
CS1#
CK0(DU)
CK0#(DU)
CK1(CK0)
CK1#(CK0#)
CK2(DU)
CK2#(DU)
VREF
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
219
222
225
228
231
234
237
6
16
15
28
27
37
36
84
83
93
92
105
104
114
113
46
45
188
A0
183
A1
63
A2
182
A3
61
A4
60
A5
180
A6
58
A7
179
A8
177
A9
70
57
A11
176
A12
196
A13
174
A14
173
A15
54
190
BA1
71
BA0
73
74
192
125
126
134
135
146
147
155
156
202
203
211
212
223
224
232
233
164
165
195
77
52
171
193
76
185
186
137
138
220
221
120
SCL
119
SDA
1
239
SA0
240
SA1
101
SA2
DDRII-240_GREEN
DDRII-240_GREEN
DQS_A#0
DQS_A1
DQS_A#1
DQS_A2
DQS_A#2
DQS_A3
DQS_A#3
DQS_A4
DQS_A#4
DQS_A5
DQS_A#5
DQS_A6
DQS_A#6
DQS_A7
DQS_A#7
MEM_0A_ADD0
MEM_0A_ADD1
MEM_0A_ADD2
MEM_0A_ADD3
MEM_0A_ADD4
MEM_0A_ADD5
MEM_0A_ADD6
MEM_0A_ADD7
MEM_0A_ADD8
MEM_0A_ADD9
MEM_0A_ADD10
MEM_0A_ADD11
MEM_0A_ADD12
MEM_0A_ADD13
MEM_0A_ADD14
MEM_0A_ADD15
MEM_0A_BA2
MEM_0A_BA1
MEM_0A_BA0
MEM_0A_WE#
MEM_0A_CAS#
MEM_0A_RAS#
DQM_A0
DQM_A1
DQM_A2
DQM_A3
DQM_A4
DQM_A5
DQM_A6
DQM_A7
MEM_0A_ODT0
MEM_0A_ODT1
MEM_0A_CKE0
MEM_0A_CKE1
MEM_0A_CS#0
MEM_0A_CS#1
Does DIMM_VREF_A need to connect to W83110?
VCC_DDR
DQS_A[0..7]8
DQS_A#[0..7]8
DQS_A0 8
DQS_A#0 8
DQS_A1 8
DQS_A#1 8
DQS_A2 8
DQS_A#2 8
DQS_A3 8
DQS_A#3 8
DQS_A4 8
DQS_A#4 8
DQS_A5 8
DQS_A#5 8
DQS_A6 8
DQS_A#6 8
DQS_A7 8
DQS_A#7 8
MEM_0A_ADD[0..15] 8,10
MEM_0A_BA[0..2] 8,10
MEM_0A_WE# 8,10
MEM_0A_CAS# 8,10
MEM_0A_RAS# 8,10
DQM_A[0..7] 8
MEM_0A_ODT[0..1] 8,10
MEM_0A_CKE[0..1] 8,10
MEM_0A_CS#[0..1] 8,10
MCLK_0A_0 8
MCLK_0A_0# 8
MCLK_0A_1 8
MCLK_0A_1# 8
MCLK_0A_2 8
MCLK_0A_2# 8
SMB_MEM_CLK 14
SMB_MEM_DATA 14
DIMM_VREF_A DIMM_VREF_A
C50
C50
C0.1u10X0402
C0.1u10X0402
PLACE CLOSE TO DIMM PIN PLACE CLOSE TO DIMM PIN
R70
R70
121R1%0402
121R1%0402
DIMM_VREF_A
R74
R74
121R1%0402
121R1%0402
DATA_A0
DATA_A1
DATA_A2
DATA_A3
DATA_A4
DATA_A5
DATA_A6
DATA_A7
DATA_A8
DATA_A9
DATA_A10
DATA_A11
DATA_A12
DATA_A13
DATA_A14
DATA_A15
DATA_A16
DATA_A17
DATA_A18
DATA_A19
DATA_A20
DATA_A21
DATA_A22
DATA_A23
DATA_A24
DATA_A25
DATA_A26
DATA_A27
DATA_A28
DATA_A29
DATA_A30
DATA_A31
DATA_A32
DATA_A33
DATA_A34
DATA_A35
DATA_A36
DATA_A37
DATA_A38
DATA_A39
DATA_A40
DATA_A41
DATA_A42
DATA_A43
DATA_A44
DATA_A45
DATA_A46
DATA_A47
DATA_A48
DATA_A49
DATA_A50
DATA_A51
DATA_A52
DATA_A53
DATA_A54
DATA_A55
DATA_A56
DATA_A57
DATA_A58
DATA_A59
DATA_A60
DATA_A61
DATA_A62
DATA_A63
DIMM2
DIMM2
122
123
128
129
131
132
140
141
143
144
149
150
152
153
158
159
199
200
205
206
208
209
214
215
107
108
217
218
226
227
110
111
116
117
229
230
235
236
19
55
102
NC
3
RC118RC0
DQ0
4
DQ1
9
10
12
13
21
22
24
25
30
31
33
34
39
40
80
81
86
87
89
90
95
96
98
99
2
5
8
11
14
17
20
23
26
29
32
35
38
41
44
47
50
65
66
79
82
85
88
91
94
97
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQ8
DQ9
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
DQ16
DQ17
DQ18
DQ19
DQ20
DQ21
DQ22
DQ23
DQ24
DQ25
DQ26
DQ27
DQ28
DQ29
DQ30
DQ31
DQ32
DQ33
DQ34
DQ35
DQ36
DQ37
DQ38
DQ39
DQ40
DQ41
DQ42
DQ43
DQ44
DQ45
DQ46
DQ47
DQ48
DQ49
DQ50
DQ51
DQ52
DQ53
DQ54
DQ55
DQ56
DQ57
DQ58
DQ59
DQ60
DQ61
DQ62
DQ63
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
NC/TEST
VSS
VSS
VSS
VSS
100
103
106
109
ADDRESS: 001
0xA2
68
NC
VDD051VDD156VDD262VDD372VDD478VDD5
VSS
VSS
VSS
VSS
112
115
118
121
170
197
172
187
184
189
67
178
238
161
162
167
191
194
181
175
75
VDD6
VDD7
VDD8
VDD3
VDDQ0
VDDQ153VDDQ259VDDQ364VDDQ4
VDDQ5
VDDQ6
VDDQ7
VDDQ8
VDDQ9
VDDQ469VDDQ7
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
124
127
130
133
136
139
142
145
148
151
154
157
160
163
166
VDDSPD
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
169
198
201
204
207
210
213
216
219
168
CB042CB143CB248CB349CB4
CB5
CB6
CB7
DQS_A0
7
DQS0
DQS0#
DQS1
DQS1#
DQS2
DQS2#
DQS3
DQS3#
DQS4
DQS4#
DQS5
DQS5#
DQS6
DQS6#
DQS7
DQS7#
DQS8
DQS8#
A10_AP
A16/BA2
CAS#
RAS#
DM0/DQS9
NC/DQS9#
DM1/DQS10
NC/DQS10#
DM2/DQS11
NC/DQS11#
DM3/DQS12
NC/DQS12#
DM4/DQS13
NC/DQS13#
DM5/DQS14
NC/DQS14#
DM6/DQS15
NC/DQS15#
DM7/DQS16
NC/DQS16#
DM8/DQS17
NC/DQS17#
ODT0
ODT1
CKE0
CKE1
CS0#
CS1#
CK0(DU)
CK0#(DU)
CK1(CK0)
CK1#(CK0#)
CK2(DU)
CK2#(DU)
VREF
VSS
VSS
VSS
VSS
VSS
VSS
222
225
228
231
234
237
MSI
MSI
MSI
Size Document Description Rev
Size Document Description Rev
Size Document Description Rev
Date:
Date:
Date:
DQS_A#0
6
DQS_A1
16
DQS_A#1
15
DQS_A2
28
DQS_A#2
27
DQS_A3
37
DQS_A#3
36
DQS_A4
84
DQS_A#4
83
DQS_A5
93
DQS_A#5
92
DQS_A6
105
DQS_A#6
104
DQS_A7
114
DQS_A#7
113
46
45
MEM_0A_ADD0
188
A0
MEM_0A_ADD1
183
A1
MEM_0A_ADD2
63
A2
MEM_0A_ADD3
182
A3
MEM_0A_ADD4
61
A4
MEM_0A_ADD5
60
A5
MEM_0A_ADD6
180
A6
MEM_0A_ADD7
58
A7
MEM_0A_ADD8
179
A8
MEM_0A_ADD9
177
A9
MEM_0A_ADD10
70
MEM_0A_ADD11
57
A11
MEM_0A_ADD12
176
A12
MEM_0A_ADD13
196
A13
MEM_0A_ADD14
174
A14
MEM_0A_ADD15
173
A15
MEM_0A_BA2
54
MEM_0A_BA1
190
BA1
MEM_0A_BA0
71
BA0
MEM_0A_WE#
73
WE#
MEM_0A_CAS#
74
MEM_0A_RAS#
192
DQM_A0
125
126
DQM_A1
134
135
DQM_A2
146
147
DQM_A3
155
156
DQM_A4
202
203
DQM_A5
211
212
DQM_A6
223
224
DQM_A7
232
233
164
165
MEM_0B_ODT0
195
MEM_0B_ODT1
77
MEM_0B_CKE0
52
MEM_0B_CKE1
171
MEM_0B_CS#0
193
MEM_0B_CS#1
76
185
186
137
138
220
221
SMB_MEM_CLK
120
SCL
SMB_MEM_DATA
119
SDA
1
239
SA0
240
SA1
101
SA2
VSS
DDRII-240_GREEN
DDRII-240_GREEN
MICRO-STAR INT'L CO.,LTD
MICRO-STAR INT'L CO.,LTD
MICRO-STAR INT'L CO.,LTD
Custom
Custom
Custom
Monday, September 10, 2007
Monday, September 10, 2007
Monday, September 10, 2007
MCLK_0B_0 8
MCLK_0B_0# 8
MCLK_0B_1 8
MCLK_0B_1# 8
MCLK_0B_2 8
MCLK_0B_2# 8
C54
VCC3
DDR II - DIMM 1 & 2 Sockets
DDR II - DIMM 1 & 2 Sockets
DDR II - DIMM 1 & 2 Sockets
C54
C0.1u10X0402
C0.1u10X0402
MS-7393-0B--070910K1
MS-7393-0B--070910K1
MS-7393-0B--070910K1
MEM_0B_ODT[0..1] 8,10
MEM_0B_CKE[0..1] 8,10
MEM_0B_CS#[0..1] 8,10
Sheet of
Sheet of
Sheet of
0A
0A
0A
934
934
934
![](/html/97/9707/9707304389095e928103657c9f6978d4db666033eee9a687b7be67f1fc1a91c6/bga.png)
8
7
6
5
4
3
2
1
CHANNEL A VTT_DDR DECOULPING CAPS
D D
C C
VTT_DDR
VTT_DDR
C81
C81
C10u6.3X50805
C10u6.3X50805
C83
C83
C10u6.3X50805
C10u6.3X50805
C130
C130
C0.1u10X0402
C0.1u10X0402
C91
C91
C0.1u10X0402
C0.1u10X0402
C144
C144
C0.1u10X0402
C0.1u10X0402
C93
C93
C0.1u10X0402
C0.1u10X0402
C146
C146
C0.1u10X0402
C0.1u10X0402
C121
C121
C0.1u10X0402
C0.1u10X0402
C158
C158
C0.1u10X0402
C0.1u10X0402
C96
C96
C0.1u10X0402
C0.1u10X0402
C169
C169
C0.1u10X0402
C0.1u10X0402
C160
C160
C0.1u10X0402
C0.1u10X0402
C113
C113
C0.1u10X0402
C0.1u10X0402
MEM_0A_ADD[0..15]8,9
MEM_0A_BA[0..2]8,9
MEM_0A_CS#[0..1]8,9
MEM_0A_CKE[0..1]8,9
MEM_0A_ODT[0..1]8,9
MEM_0A_RAS#8,9
MEM_0A_CAS#8,9
MEM_0A_WE#8,9
MEM_0B_CS#[0..1]8,9
MEM_0B_CKE[0..1]8,9
MEM_0B_ODT[0..1]8,9
MEM_0A_CKE1
MEM_0B_CKE1
MEM_0B_CKE0
MEM_0A_CKE0
R936 X_90.9R1%0402R936 X_90.9R1%0402
R937 X_90.9R1%0402R937 X_90.9R1%0402
R938 X_90.9R1%0402R938 X_90.9R1%0402
R939 X_90.9R1%0402R939 X_90.9R1%0402
CHANNEL A ----- 0A , 0B
MEM_0A_ADD10
MEM_0A_BA0
MEM_0A_RAS#
MEM_0B_CS#0
MEM_0A_ADD5
MEM_0A_ADD2
MEM_0A_ADD0
MEM_0A_BA1
MEM_0A_ADD6
MEM_0A_ADD4
MEM_0A_ADD1
MEM_0A_ADD3
MEM_0A_ADD9
MEM_0A_ADD11
MEM_0A_ADD8
MEM_0A_ADD7
MEM_0A_ADD15
MEM_0A_ADD14
MEM_0A_BA2
MEM_0A_ADD12
MEM_0A_CKE1
MEM_0B_CKE1
MEM_0B_CKE0
MEM_0A_CKE0
MEM_0A_CS#0
MEM_0A_WE#
MEM_0A_CAS#
MEM_0A_ADD13
MEM_0B_CS#1
MEM_0A_CS#1
MEM_0A_ODT1
MEM_0A_ODT0
MEM_0B_ODT0
MEM_0B_ODT1
1
2
3
4
5
6
7
8
RN14 8P4R-47R0402RN14 8P4R-47R0402
1
2
3
4
5
6
7
8
RN13 8P4R-47R0402RN13 8P4R-47R0402
1
2
3
4
5
6
7
8
RN11 8P4R-47R0402RN11 8P4R-47R0402
1
2
3
4
5
6
7
8
RN10 8P4R-47R0402RN10 8P4R-47R0402
1
2
3
4
5
6
7
8
RN9 8P4R-47R0402RN9 8P4R-47R0402
1
2
3
4
5
6
7
8
RN8 8P4R-47R0402RN8 8P4R-47R0402
1
2
3
4
5
6
7
8
RN15 8P4R-47R0402RN15 8P4R-47R0402
1
2
3
4
5
6
7
8
RN19 8P4R-47R0402RN19 8P4R-47R0402
R212 47R0402R212 47R0402
R233 47R0402R233 47R0402
VTT_DDR
VCC_DDR VCC_DDR VCC_DDR
B B
C138
C138
C10u6.3X50805
C10u6.3X50805
公板上
兩根再
A A
8
C117
C117
C0.1u10X0402
C0.1u10X0402
C125
C125
C0.1u10X0402
C0.1u10X0402
C72
C72
C0.1u10X0402
C0.1u10X0402
C153
C153
C0.1u10X0402
C0.1u10X0402
C92
C92
C0.1u10X0402
C0.1u10X0402
C97
C97
C0.1u10X0402
C0.1u10X0402
C141
C141
C0.1u10X0402
C0.1u10X0402
0.1u X5, 1uX3, 10uX3
X2
7
C80
C80
C0.1u10X0402
C0.1u10X0402
C90
C90
C0.1u10X0402
C0.1u10X0402
C103
C103
C0.1u10X0402
C0.1u10X0402
C76
C76
C0.1u10X0402
C0.1u10X0402
C405
C405
C0.1u10X0402
C0.1u10X0402
C409
C409
C1u6.3X50402-1
C1u6.3X50402-1
bottom
MICRO-STAR INT'L CO.,LTD
MICRO-STAR INT'L CO.,LTD
MICRO-STAR INT'L CO.,LTD
MS-7393-0B--070910K1
MS-7393-0B--070910K1
MSI
MSI
MSI
Size Document Description Rev
Size Document Description Rev
Size Document Description Rev
Custom
Custom
Custom
Date:
Monday, September 10, 2007
Date:
Monday, September 10, 2007
Date:
6
5
4
3
Monday, September 10, 2007
2
MS-7393-0B--070910K1
DDR II VTT Termination & Decoupling
DDR II VTT Termination & Decoupling
DDR II VTT Termination & Decoupling
Sheet of
Sheet of
Sheet of
10 34
10 34
10 34
1
0A
0A
0A
![](/html/97/9707/9707304389095e928103657c9f6978d4db666033eee9a687b7be67f1fc1a91c6/bgb.png)
8
7
6
5
4
3
2
1
U8D
U8D
?
?
AM3
PCI_AD0
AK5
PCI_AD1
AM2
PCI_AD2
AH4
PCI_AD3
AM1
PCI_AD4
AH5
PCI_AD5
AL2
PCI_AD6
AH6
PCI_AD7
AH7
PCI_AD8
AL3
PCI_AD9
AF5
PCI_AD10
AF6
PCI_AD11
AF7
PCI_AD12
AL4
PCI_AD13
AF8
PCI_AD14
AK3
PCI_AD15
AH2
PCI_AD16
AD8
PCI_AD17
AH1
PCI_AD18
AD9
PCI_AD19
AG2
PCI_AD20
AB5
PCI_AD21
AG1
PCI_AD22
AB6
PCI_AD23
AG3
PCI_AD24
AB8
PCI_AD25
AG4
PCI_AD26
AB9
PCI_AD27
AF3
PCI_AD28
AA9
PCI_AD29
AF4
PCI_AD30
Y4
PCI_AD31
AL1
PCI_CBE0#
AF9
PCI_CBE1#
AD7
PCI_CBE2#
AB7
PCI_CBE3#
AH3
PCI_FRAME#
AD6
PCI_IRDY#
AJ2
PCI_TRDY#
AJ3
PCI_STOP#
AD5
PCI_DEVSEL#
AK4
PCI_PAR
AD4
PCI_PERR#/GPIO_43/RS232_DCD#
AE9
PCI_SERR#
AE3
PCI_PME#/GPIO_30
Y3
PCI_RESET0#
Y2
PCI_RESET1#
Y1
PCI_RESET2#
W2
PCI_RESET3#
?
?
SEC 4 OF 10
SEC 4 OF 10
PCI_REQ2#/GPIO_40/RS232_DSR#
PCI_REQ3#/GPIO_38/RS232_CTS#
PCI_REQ4#/GPIO_52/RS232_SIN#
PCI_GNT2#/GPIO_41/RS232_DTR#
PCI_GNT3#/GPIO_39/RS232_RTS#
PCI_GNT4#/GPIO_53/RS232_SOUT#
LPC_DRQ1/GPIO_19/FANRPM1
C_BE#[3..0]
R335 33R0402R335 33R0402
R336 33R0402R336 33R0402
FRAME#19
DEVSEL#19
AD[31..0]
IRDY#19
TRDY#19
STOP#19
PAR19
PERR#19
SERR#19
PME#19
C_BE#0
C_BE#1
C_BE#2
C_BE#3
FRAME#
IRDY#
TRDY#
STOP#
DEVSEL#
PAR
PERR#
SERR#
PME#
PCI_RESET1*
AD0
AD1
AD2
AD3
AD4
AD5
AD6
AD7
AD8
AD9
AD10
AD11
AD12
AD13
AD14
AD15
AD16
AD17
AD18
AD19
AD20
AD21
AD22
AD23
AD24
AD25
AD26
AD27
AD28
AD29
AD30
AD31
AD[31..0]19
D D
C C
C_BE#[3..0]19
PCIRST_SLOT1*19
B B
MCP73
MCP73
PCI_REQ0#
PCI_REQ1#
PCI_GNT0#
PCI_GNT1#
PCI_CLK0
PCI_CLK1
PCI_CLK2
PCI_CLK3
PCI_CLK4
PCI_CLKIN
PCI_INTW#
PCI_INTX#
PCI_INTY#
PCI_INTZ#
LPC_AD0
LPC_AD1
LPC_AD2
LPC_AD3
LPC_DRQ0#/GPIO_50
LPC_FRAME#
LPC_SERIRQ
LPC_RESET#
LPC_CLK0
LPC_CLK1
AE2
Y5
AD3
Y6
AD2
AD1
Y7
AC2
Y8
AC1
1394REQ* 19
PCI1REQ* 19
PCI2REQ* 19
PCI3REQ* 19
PCI1GNT* 19
PCI2GNT* 19
AC3
AC4
AB3
PCICLK1
PCICLK2
R350 22R0402R350 22R0402
R330 22R0402R330 22R0402
AB4
PCICLK4
AA3
R333 22R0402R333 22R0402
AA2
Y9
W1
W3
W4
LPCAD0
A8
LPCAD1
B8
LPCAD2
A7
LPCAD3
B7
B6
C6
C8
C7
D8
D5
C5
PCI_INTA* 19
PCI_INTB* 19
PCI_INTC* 19
PCI_INTD* 19
LPC_DRQ#0
LPCFRAME# LPC_FRAME#
R291 22R0402R291 22R0402
SERIRQ
SIORST*PCI_RESET2*
SIOPCLK
R290 33R0402R290 33R0402
R314 33R0402R314 33R0402
C225
C225
X_C10p50N0402
X_C10p50N0402
PCI_CLKIN
LPCAD2
LPCAD3
LPCAD0
LPCAD1
VCC3
R332
R332
8.2KR0402
8.2KR0402
PCICLK_SLOT1 19
PCICLK_SLOT2 19
PCI_CLKIN = PCICLK+3000mil
RN30
RN30
1
3
5
7
8P4R-22R0402
8P4R-22R0402
2
4
6
8
LPC_DRQ#0 20
LPC_FRAME# 20
SERIRQ 20
SIO_RST* 20PCIRST_SLOT2*19
SIO_PCLK 20
LPC_AD2
LPC_AD3
LPC_AD0
LPC_AD1
PCICLK1
PCICLK2
PCICLK4
60mils
LPC_AD[3..0] 20
C237X_C10p50N0402 C237X_C10p50N0402
C228X_C10p50N0402 C228X_C10p50N0402
C240X_C10p50N0402 C240X_C10p50N0402
FOR EMI
VCC3
LPC_FRAME#
R304
R304
8.2KR0402
8.2KR0402
STRAP
HDA_SDOUT
LPC_FRAME
00 = LPC BIOS
01 = PCI BIOS
10 = SPI BIOS
11 = RESERVED
A A
MSI
MSI
MSI
Size Document Description Rev
Size Document Description Rev
Size Document Description Rev
Custom
Custom
Custom
Date:
Monday, September 10, 2007
Date:
Monday, September 10, 2007
Date:
8
7
6
5
4
3
Monday, September 10, 2007
2
DEFAULT*
MICRO-STAR INT'L CO.,LTD
MICRO-STAR INT'L CO.,LTD
MICRO-STAR INT'L CO.,LTD
MS-7393-0B--070910K1
MS-7393-0B--070910K1
MS-7393-0B--070910K1
MCP73-PCI/LPC
MCP73-PCI/LPC
MCP73-PCI/LPC
Sheet of
Sheet of
Sheet of
11 34
11 34
11 34
1
0A
0A
0A