MSI MS-7339 Schematics

5

4

3

2

1

MSI

MS-7339 Ver:0A

D D

C C

B B

CPU:

AMD M2 Athlon 64/Athlon 64 FX

System Chipset:

ATI RS690
ATI SB600

On Board Chipset:

Winbond Super I/O -- W83627DHG Ver.C
LAN -- MARVELL 8039/8071
HD Codec --ALC888/662
BIOS -- SPI ROM

Main Memory:

DDR * 4 (Max 4GB)

Expansion Slots:

PCI-E X 1 *1
PCI-E X 16 *1
PCI 2.2 Slot X 2

PWM:

Controller--Intersil ISL6566CR 3 Phase

Clock Generator:

Controller--ICS951464

TPM

Title Page

Cover Sheet 1
Block Diagram
AMD M2 940
System Memory
DDR2 Terminations

2
3,4,5
6,7

8
ATI RS690 9-12
CLOCK GENERATOR ICS951464 13

ATI SB600 14-18
PCI Slot 1,2
PCI-Express X 16 ,X1
I/O W83627DHG Ver.C / FDD
LAN MARVELL 8039/8071
HD Audio - ALC888/662
USB connectors
PWM - ISL6566CR
MS-6 ACPI Controller & MS-6+
IDE / SATA / FAN / LPT / DVI
ATX Connector / Front Panel / KB / C ON
VGA Connector

TPM WPCT200/AT97SC3203
GPIO/PCI Config.

MANUAL PARTS
Reverse

19
20
21
22
23
24
25
26-27
28
29
30
31
32
33
34
35POWER OK MAP

POWER MAP 36

WPCT200/AT97SC3203

RESET MAP
History

37
38

A A

Micro Star Restricted Secret

Title

Document Number

MICRO-STAR INT'L

No. 69, Li-De St, Jung-He City,

CO.,LTD.

Taipei Hsien, Taiwan

5

4

3

2

http://www.msi.com.tw

Cover Sheet

1

MS-7339

Last Revision Date:
Sheet

Thursday, November 30, 2006

Rev

0A

of

138

5

4

3

2

1

BLOCK DIAGRAM

D D

POWER

SUPPLY

CONNECTOR

VREG

SOCKET 940

K9

DDR2 SDRAM CONN 0

128-BIT 400/533MHZ

HT 16X16 1GHZ

PEX X16

C C

ATA 133

PRIMARY IDE

PEX X1

PCI EXPRESS

PCI EXPRESS

ATI
RS690
465 BGA

HT 8X8 1GHZ

ATI

SB600

AZAILIA/AC97

VGA CONN

PCI 33MHZ

Realtek ALC 888(HD, 7.1Channel)

DDR2 SDRAM CONN 2

DDR2 SDRAM CONN 1

DDR2 SDRAM CONN3

LAN-RTL8100C

IEEE1394-VT6308

564 BGA

PCI SLOT 1

X4 - SATA CONN

B B

FLOPPY CONN

PS2/KBRD CONN

PARALLEL CONN

COM1-2 CONN

INTEGRATED SATA 1/2

SIO

LPC SUPER I/O
W83627DHG

LPC BUS 33MHZ

X8 USB2.0 (SB460)
X10 USB2.0 (SB600)

BACK PANEL CONN

USB2 PORTS 0-1
DOUBLE STACK

USB2 PORTS 2-3
X2/GBIT LAN

FRONT PANEL HDR

USB2 PORTS 4-5

PCI SLOT 2

USB2 PORTS 6-7

SPI

A A

5

4

3

USB2 PORTS 8-9

Micro Star Restricted Secret

Title

Document Number

MICRO-STAR INT'L

No. 69, Li-De St, Jung-He City,

CO.,LTD.

Taipei Hsien, Taiwan

2

http://www.msi.com.tw

Block Diagram

MS-7339

Last Revision Date:
Sheet

1

Thursday, November 30, 2006

2

Rev

0A

38

of

5

HT_CADIN_H[15..0]9

HT_CADIN_L[15..0]9

HT_CADOUT_H[15..0]9

HT_CADOUT_L[15..0]9

D D

VCCA_1V2

HT_CADIN_H[15..0]
HT_CADIN_L[15..0]
HT_CADOUT_H[15..0]
HT_CADOUT_L[15..0]

VCCA_1V2 VDDA25

X_C0.22U16X

C186

C0.22U16X

C175
C0.22U16X

C179

C199

X_C0.22U16X

C166

C4.7U16Y1206

C4.7U16Y1206

AMD REQUEST

CPU1A

L0_CLKIN_H(1)
L0_CLKIN_L(1)
L0_CLKIN_H(0)
L0_CLKIN_L(0)

L0_CTLIN_H(1)
L0_CTLIN_L(1)
L0_CTLIN_H(0)
L0_CTLIN_L(0)

L0_CADIN_H(15)
L0_CADIN_L(15)
L0_CADIN_H(14)
L0_CADIN_L(14)
L0_CADIN_H(13)
L0_CADIN_L(13)
L0_CADIN_H(12)
L0_CADIN_L(12)
L0_CADIN_H(11)
L0_CADIN_L(11)
L0_CADIN_H(10)
L0_CADIN_L(10)
L0_CADIN_H(9)
L0_CADIN_L(9)
L0_CADIN_H(8)
L0_CADIN_L(8)

L0_CADIN_H(7)
L0_CADIN_L(7)
L0_CADIN_H(6)
L0_CADIN_L(6)
L0_CADIN_H(5)
L0_CADIN_L(5)
L0_CADIN_H(4)
L0_CADIN_L(4)
L0_CADIN_H(3)
L0_CADIN_L(3)
L0_CADIN_H(2)
L0_CADIN_L(2)
L0_CADIN_H(1)
L0_CADIN_L(1)
L0_CADIN_H(0)
L0_CADIN_L(0)

HYPERTRANSPORT

L0_CLKOUT_H(1)

L0_CLKOUT_L(1)

L0_CLKOUT_H(0)

L0_CLKOUT_L(0)

L0_CTLOUT_H(1)

L0_CTLOUT_L(1)

L0_CTLOUT_H(0)

L0_CTLOUT_L(0)

L0_CADOUT_H(15)

L0_CADOUT_L(15)

L0_CADOUT_H(14)

L0_CADOUT_L(14)

L0_CADOUT_H(13)

L0_CADOUT_L(13)

L0_CADOUT_H(12)

L0_CADOUT_L(12)

L0_CADOUT_H(11)

L0_CADOUT_L(11)

L0_CADOUT_H(10)

L0_CADOUT_L(10)

L0_CADOUT_H(9)

L0_CADOUT_L(9)

L0_CADOUT_H(8)

L0_CADOUT_L(8)

L0_CADOUT_H(7)

L0_CADOUT_L(7)

L0_CADOUT_H(6)

L0_CADOUT_L(6)

L0_CADOUT_H(5)

L0_CADOUT_L(5)

L0_CADOUT_H(4)

L0_CADOUT_L(4)

L0_CADOUT_H(3)

L0_CADOUT_L(3)

L0_CADOUT_H(2)

L0_CADOUT_L(2)

L0_CADOUT_H(1)

L0_CADOUT_L(1)

L0_CADOUT_H(0)

L0_CADOUT_L(0)

HT_CLKIN_H19

HT_CLKIN_L19

VCCA_1V2

C C

B B

HT_CLKIN_H09

HT_CLKIN_L09

R116 51R1%0402
R117 51R1%0402

HT_CTLIN_H09

HT_CTLIN_L09

HT_CADIN_H15
HT_CADIN_L15
HT_CADIN_H14
HT_CADIN_L14
HT_CADIN_H13
HT_CADIN_L13
HT_CADIN_H12
HT_CADIN_L12
HT_CADIN_H11
HT_CADIN_L11
HT_CADIN_H10
HT_CADIN_L10
HT_CADIN_H9
HT_CADIN_L9
HT_CADIN_H8
HT_CADIN_L8

HT_CADIN_H7
HT_CADIN_L7
HT_CADIN_H6
HT_CADIN_L6
HT_CADIN_H5
HT_CADIN_L5
HT_CADIN_H4
HT_CADIN_L4
HT_CADIN_H3

HT_CADIN_H2
HT_CADIN_L2
HT_CADIN_H1
HT_CADIN_L1
HT_CADIN_H0
HT_CADIN_L0

N6
P6
N3
N2

V4
V5
U1
V1

U6
V6
T4
T5
R6
T6
P4

P5
M4
M5

L6
M6
K4
K5

J6
K6

U3
U2
R1

T1
R3
R2
N1
P1

L1
M1

L3

L2

J1
K1

J3

J2

C191

AMD REQUEST

C167

C4.7U16Y1206

AD5
AD4
AD1
AC1

Y6
W6
W2
W3

Y5
Y4
AB6
AA6
AB5
AB4
AD6
AC6
AF6
AE6
AF5
AF4
AH6
AG6
AH5
AH4

Y1
W1
AA2
AA3
AB1
AA1
AC2
AC3
AE2
AE3
AF1
AE1
AG2
AG3
AH1
AG1

4

C0.22U16X

C201

C180

HT_CLKOUT_H1 9
HT_CLKOUT_L1 9
HT_CLKOUT_H0 9
HT_CLKOUT_L0 9

HT_CTLOUT_H0 9
HT_CTLOUT_L0 9

HT_CADOUT_H15
HT_CADOUT_L15
HT_CADOUT_H14
HT_CADOUT_L14
HT_CADOUT_H13
HT_CADOUT_L13
HT_CADOUT_H12
HT_CADOUT_L12
HT_CADOUT_H11
HT_CADOUT_L11
HT_CADOUT_H10
HT_CADOUT_L10
HT_CADOUT_H9
HT_CADOUT_L9
HT_CADOUT_H8
HT_CADOUT_L8

HT_CADOUT_H7
HT_CADOUT_L7
HT_CADOUT_H6
HT_CADOUT_L6
HT_CADOUT_H5
HT_CADOUT_L5
HT_CADOUT_H4
HT_CADOUT_L4
HT_CADOUT_H3
HT_CADOUT_L3HT_CADIN_L3
HT_CADOUT_H2
HT_CADOUT_L2
HT_CADOUT_H1
HT_CADOUT_L1
HT_CADOUT_H0
HT_CADOUT_L0

C196

X_C0.22U16X

TP15
TP14

X_C0.22U16X

3

for DHG Remove R512, R514, add R513, R515
for SB600 or EHG Remove R515, R513, add R514, R512

C50

C0.22U16X

C45

X_C1000P50X

TP24
TP27
TP16
TP22

TP6

TP1

TP10
TP11
TP13
TP8
TP18

R512 X_0R0402
R513 X_0R0402

R514 X_0R0402
R515 X_0R0402

C64

C3300P50X0402

LDT_PWRGD
LDT_STOP#
LDT_RST#

CPU_PRESENT_L

CPU_TDI
CPU_TRST_L
CPU_TCK
CPU_TMS

CPU_DBREQ_L
COREFB+

CPU_VTT_SENSE CPU_PSI_L

CPU_TEST25_H

CPU_TEST25_L

R43 300R0402
R42 300R0402

CPU_SIC14
SIO_THERM_SIC21

CPU_SID14

SIO_THERM_SID21

VCC_DDR

R109
300R0402

R112

39.2R1%

R113

39.2R1%

C56

C3900P50X

169R1%

C55

C3900P50X

R104
300R0402

THERM_SIC
THERM_SID

R280
X_300R0402

CPU_STRAP_HI_E11
CPU_STRAP_LO_F11

R73

C4.7U16Y1206

CPUCLKIN
CPUCLKIN#

TP100

COREFB+25

COREFB-25

CPU_M_VREF

THERMDC_CPU30
THERMDA_CPU30

CPU_CLK13

CPU_CLK#13

VCC_DDR

THERM_SIC

THERM_SID

C58

C10

VDDA1

D10

VDDA2

A8

CLKIN_H

B8

CLKIN_L

C9

PWROK

D8

LDTSTOP_L

C7

RESET_L

AL3

CPU_PRESENT_L

AL6

SIC

AK6

SID

AL10

TDI

AJ10

TRST_L

AH10

TCK

AL9

TMS

A5

DBREQ_L

G2

VDD_FB_H

G1

VDD_FB_L

E12

VTT_SENSE

F12

M_VREF

AH11

M_ZN

AJ11

M_ZP

A10

TEST25_H

B10

TEST25_L

F10

TEST19

E9

TEST18

AJ7

TEST13

F6

TEST9

D6

TEST17

E7

TEST16

F8

TEST15

C5

TEST14

AH9

TEST12

E5

TEST7

AJ5

TEST6

AG9

TEST5

AG8

TEST4

AH7

TEST3

AJ6

TEST2

2

CPU1D

MISC

THERMTRIP_L

PROCHOT_L

DBRDY

VDDIO_FB_H

VDDIO_FB_L

HTREF1
HTREF0

TEST29_H

TEST29_L

TEST24
TEST23
TEST22
TEST21
TEST20

TEST28_H

TEST28_L

TEST27
TEST26
TEST10

TEST8

80L2_100_0805

2 1

VID(5)
VID(4)
VID(3)
VID(2)
VID(1)
VID(0)

TDO

PSI_L

D2
D1
C1
E3
E2
E1

AK7
AL7

AK10

B6
AK11

AL11
F1

V8
V7

C11
D11

AK8
AH8
AJ9
AL8
AJ8

J10
H9
AK9
AK5
G7
D4

VDDA25VDDA_25

L4

TP9

VID4
VID3
VID2
VID1
VID0

CPU_THRIP_L#
PROCHOT_L

CPU_TDO

CPU_DBRDY
CPU_VDDIOFB_H

CPU_VDDIOFB_LCOREFB-

R108 300R0402

VCC_DDR

R18
300R0402

TP26

TP7

TP12

VCC_DDR

R52

80.6R1%

TP21
TP17
TP20

TP19

R764

X_300R0402

R765

R766

R767

CPU_VDDIOFB_H 27

C160

C1000P50X0402

R106
300R0402

1

X_300R0402

X_300R0402

VCC_DDRVCC_DDR

R510

300R0402

Q45

N-MMBT3904_NL_SOT23

R111 44.2R1%
R114 44.2R1%

C161

C1000P50X0402

X_300R0402

VID[0..4] 25

R511

4.7KR0402

CPU_THRIP# 26

VCCA_1V2

VCC_DDR

VCC_DDR

CPU_PRESENT_L
CPU_TEST25_H

CPU_TEST25_L

VCC_DDR

R105
300R0402

Q67
X_N-2N7002_SOT23

VDDA25

THRM#PROCHOT_L

THRM# 30

VCC_DDR

A A

LDT_PWRGD
LDT_STOP#
LDT_RST#

For SB600

RN6

1
3
5
7

R118 1KR1%0402
R67 510R

R72 510R

RN58

1

2

3

4

5

6

7

8

8P4R-10KR

2

LDT_PWRGD

4

LDT_STOP#

6

LDT_RST#

8

LDT_PWRGD14

LDT_STOP#11,14

LDT_RST#14

VCC_DDR

R54

16.9R1%

LDT_PWRGD
LDT_STOP#
LDT_RST#

CPU_M_VREF

AMD REQUEST

CPU_DBREQ_L
CPU_DBRDY
CPU_TCK
CPU_TMS
CPU_TDI
CPU_TRST_L
CPU_TDO

SW1 X_SW-TACT4PS

1

3

2

4

R719
X_100R

VCC_DDR

1
3
5
7

9
11
13
15
17
19
21
23

KEY

X__H2X13[25]_black

X_8P4R-330R

R57

16.9R1%

5

4

3

C65

C0.1U25Y0402-RH

C59
C1000P16X

2

VCC3

R718

R717
X_4.7KR0402

X_1KR0402

Q70

X_N-PMBS3904_SOT23-RH

J4

2
4
6
8
10
12
14
16
18
20
22
24
26

Micro Star Restricted Secret

Title

ATHLON64 HT I/F CTRL & DEBUG

Document Number

MICRO-STAR INT'L

No. 69, Li-De St, Jung-He City,

CO.,LTD.

Taipei Hsien, Taiwan
http://www.msi.com.tw

MS-7339

1

LDT_RST#LDT_RST_L

LDT_RST_L

Last Revision Date:

Thursday, November 30, 2006

Sheet

of

338

Rev

0A

5

4

3

2

1

MEM_MA_DQS_L[7..0]6,7

MEM_MA_DQS_H[7..0]6,7

MEM_MA_DM[7..0]6,7

D D

CPU1B

MEM_MA0_CLK_H26,8
MEM_MA0_CLK_L26,8
MEM_MA0_CLK_H16,8
MEM_MA0_CLK_L16,8
MEM_MA0_CLK_H06,8
MEM_MA0_CLK_L06,8

MEM_MA0_CS_L16,8
MEM_MA0_CS_L06,8

MEM_MA0_ODT06,8
MEM_MA1_CLK_H27,8

MEM_MA1_CLK_L27,8
MEM_MA1_CLK_H17,8
MEM_MA1_CLK_L17,8
MEM_MA1_CLK_H07,8
MEM_MA1_CLK_L07,8

MEM_MA1_CS_L17,8
MEM_MA1_CS_L07,8

MEM_MA1_ODT07,8

C C

MEM_MA_CAS_L6,7,8
MEM_MA_WE_L6,7,8
MEM_MA_RAS_L6,7,8

MEM_MA_BANK26,7,8
MEM_MA_BANK16,7,8
MEM_MA_BANK06,7,8

MEM_MA_CKE17,8
MEM_MA_CKE06,8

MEM_MA_ADD[15..0]6,7,8

B B

MEM_MA0_CLK_H2
MEM_MA0_CLK_L2
MEM_MA0_CLK_H1
MEM_MA0_CLK_L1
MEM_MA0_CLK_H0
MEM_MA0_CLK_L0

MEM_MA0_CS_L1
MEM_MA0_CS_L0

MEM_MA0_ODT0
MEM_MA1_CLK_H2

MEM_MA1_CLK_L2
MEM_MA1_CLK_H1
MEM_MA1_CLK_L1
MEM_MA1_CLK_H0
MEM_MA1_CLK_L0

MEM_MA1_CS_L1
MEM_MA1_CS_L0

MEM_MA1_ODT0

MEM_MA_CAS_L
MEM_MA_WE_L
MEM_MA_RAS_L

MEM_MA_BANK2
MEM_MA_BANK1
MEM_MA_BANK0

MEM_MA_CKE1
MEM_MA_CKE0

MEM_MA_ADD15
MEM_MA_ADD14
MEM_MA_ADD13
MEM_MA_ADD12
MEM_MA_ADD11
MEM_MA_ADD10
MEM_MA_ADD9
MEM_MA_ADD8
MEM_MA_ADD7
MEM_MA_ADD6
MEM_MA_ADD5
MEM_MA_ADD4
MEM_MA_ADD3
MEM_MA_ADD2
MEM_MA_ADD1
MEM_MA_ADD0

MEM_MA_DQS_H7
MEM_MA_DQS_L7
MEM_MA_DQS_H6
MEM_MA_DQS_L6
MEM_MA_DQS_H5
MEM_MA_DQS_L5
MEM_MA_DQS_H4
MEM_MA_DQS_L4
MEM_MA_DQS_H3
MEM_MA_DQS_L3
MEM_MA_DQS_H2
MEM_MA_DQS_L2
MEM_MA_DQS_H1
MEM_MA_DQS_L1
MEM_MA_DQS_H0
MEM_MA_DQS_L0

MEM_MA_DM7
MEM_MA_DM6
MEM_MA_DM5
MEM_MA_DM4
MEM_MA_DM3
MEM_MA_DM2
MEM_MA_DM1
MEM_MA_DM0

AG21
AG20

G19
H19
U27
U26

AC25
AA24

AC28
AE20

AE19

G20
G21
V27

W27

AD27
AA25

AC27

AB25
AB27
AA26

N25
Y27

AA27

M25
M27

N24

AC26

N26
P25
Y25
N27
R24
P27
R25
R26
R27
T25
U25
T27

W24

AD15
AE15
AG18
AG19
AG24
AG25
AG27
AG28

D29
C29
C25
D25
E19
F19
F15

G15

AF15
AF19
AJ25
AH29

B29
E24
E18
H15

L27

MEMORY INTERFACE A

MA0_CLK_H(2)
MA0_CLK_L(2)
MA0_CLK_H(1)
MA0_CLK_L(1)
MA0_CLK_H(0)
MA0_CLK_L(0)

MA0_CS_L(1)
MA0_CS_L(0)

MA0_ODT(0)
MA1_CLK_H(2)

MA1_CLK_L(2)
MA1_CLK_H(1)
MA1_CLK_L(1)
MA1_CLK_H(0)
MA1_CLK_L(0)

MA1_CS_L(1)
MA1_CS_L(0)

MA1_ODT(0)

MA_CAS_L
MA_WE_L
MA_RAS_L

MA_BANK(2)
MA_BANK(1)
MA_BANK(0)

MA_CKE(1)
MA_CKE(0)

MA_ADD(15)
MA_ADD(14)
MA_ADD(13)
MA_ADD(12)
MA_ADD(11)
MA_ADD(10)
MA_ADD(9)
MA_ADD(8)
MA_ADD(7)
MA_ADD(6)
MA_ADD(5)
MA_ADD(4)
MA_ADD(3)
MA_ADD(2)
MA_ADD(1)
MA_ADD(0)

MA_DQS_H(7)
MA_DQS_L(7)
MA_DQS_H(6)
MA_DQS_L(6)
MA_DQS_H(5)
MA_DQS_L(5)
MA_DQS_H(4)
MA_DQS_L(4)
MA_DQS_H(3)
MA_DQS_L(3)
MA_DQS_H(2)
MA_DQS_L(2)
MA_DQS_H(1)
MA_DQS_L(1)
MA_DQS_H(0)
MA_DQS_L(0)

MA_DM(7)
MA_DM(6)
MA_DM(5)
MA_DM(4)
MA_DM(3)
MA_DM(2)
MA_DM(1)
MA_DM(0)

MA_DATA(63)
MA_DATA(62)
MA_DATA(61)
MA_DATA(60)
MA_DATA(59)
MA_DATA(58)
MA_DATA(57)
MA_DATA(56)
MA_DATA(55)
MA_DATA(54)
MA_DATA(53)
MA_DATA(52)
MA_DATA(51)
MA_DATA(50)
MA_DATA(49)
MA_DATA(48)
MA_DATA(47)
MA_DATA(46)
MA_DATA(45)
MA_DATA(44)
MA_DATA(43)
MA_DATA(42)
MA_DATA(41)
MA_DATA(40)
MA_DATA(39)
MA_DATA(38)
MA_DATA(37)
MA_DATA(36)
MA_DATA(35)
MA_DATA(34)
MA_DATA(33)
MA_DATA(32)
MA_DATA(31)
MA_DATA(30)
MA_DATA(29)
MA_DATA(28)
MA_DATA(27)
MA_DATA(26)
MA_DATA(25)
MA_DATA(24)
MA_DATA(23)
MA_DATA(22)
MA_DATA(21)
MA_DATA(20)
MA_DATA(19)
MA_DATA(18)
MA_DATA(17)
MA_DATA(16)
MA_DATA(15)
MA_DATA(14)
MA_DATA(13)
MA_DATA(12)
MA_DATA(11)
MA_DATA(10)

MA_DATA(9)
MA_DATA(8)
MA_DATA(7)
MA_DATA(6)
MA_DATA(5)
MA_DATA(4)
MA_DATA(3)
MA_DATA(2)
MA_DATA(1)
MA_DATA(0)

MA_DQS_H(8)

MA_DQS_L(8)

MA_DM(8)

MA_CHECK(7)
MA_CHECK(6)
MA_CHECK(5)
MA_CHECK(4)
MA_CHECK(3)
MA_CHECK(2)
MA_CHECK(1)
MA_CHECK(0)

MEM_MA_DATA63

AE14

MEM_MA_DATA62

AG14

MEM_MA_DATA61

AG16

MEM_MA_DATA60

AD17

MEM_MA_DATA59

AD13

MEM_MA_DATA58

AE13

MEM_MA_DATA57

AG15

MEM_MA_DATA56

AE16

MEM_MA_DATA55

AG17

MEM_MA_DATA54

AE18

MEM_MA_DATA53

AD21

MEM_MA_DATA52

AG22

MEM_MA_DATA51

AE17

MEM_MA_DATA50

AF17

MEM_MA_DATA49

AF21

MEM_MA_DATA48

AE21

MEM_MA_DATA47

AF23

MEM_MA_DATA46

AE23

MEM_MA_DATA45

AJ26

MEM_MA_DATA44

AG26

MEM_MA_DATA43

AE22

MEM_MA_DATA42

AG23

MEM_MA_DATA41

AH25

MEM_MA_DATA40

AF25

MEM_MA_DATA39

AJ28

MEM_MA_DATA38

AJ29

MEM_MA_DATA37

AF29

MEM_MA_DATA36

AE26

MEM_MA_DATA35

AJ27

MEM_MA_DATA34

AH27

MEM_MA_DATA33

AG29

MEM_MA_DATA32

AF27

MEM_MA_DATA31

E29

MEM_MA_DATA30

E28

MEM_MA_DATA29

D27

MEM_MA_DATA28

C27

MEM_MA_DATA27

G26

MEM_MA_DATA26

F27

MEM_MA_DATA25

C28

MEM_MA_DATA24

E27

MEM_MA_DATA23

F25

MEM_MA_DATA22

E25

MEM_MA_DATA21

E23

MEM_MA_DATA20

D23

MEM_MA_DATA19

E26

MEM_MA_DATA18

C26

MEM_MA_DATA17

G23

MEM_MA_DATA16

F23

MEM_MA_DATA15

E22

MEM_MA_DATA14

E21

MEM_MA_DATA13

F17

MEM_MA_DATA12

G17

MEM_MA_DATA11

G22

MEM_MA_DATA10

F21

MEM_MA_DATA9

G18

MEM_MA_DATA8

E17

MEM_MA_DATA7

G16

MEM_MA_DATA6

E15

MEM_MA_DATA5

G13

MEM_MA_DATA4

H13

MEM_MA_DATA3

H17

MEM_MA_DATA2

E16

MEM_MA_DATA1

E14

MEM_MA_DATA0

G14
J28

J27
J25
K25

J26
G28
G27
L24
K27
H29
H27

MEM_MA_DATA[63..0] 6,7

MEM_MB_ADD[15..0]6,7,8

MEM_MB_DQS_L[7..0]6,7

MEM_MB_DQS_H[7..0]6,7

MEM_MB_DM[7..0]6,7

CPU1C

MEM_MB0_CLK_H26,8
MEM_MB0_CLK_L26,8
MEM_MB0_CLK_H16,8
MEM_MB0_CLK_L16,8
MEM_MB0_CLK_H06,8
MEM_MB0_CLK_L06,8

MEM_MB0_CS_L16,8
MEM_MB0_CS_L06,8

MEM_MB0_ODT06,8
MEM_MB1_CLK_H27,8

MEM_MB1_CLK_L27,8
MEM_MB1_CLK_H17,8
MEM_MB1_CLK_L17,8
MEM_MB1_CLK_H07,8
MEM_MB1_CLK_L07,8

MEM_MB1_CS_L17,8
MEM_MB1_CS_L07,8

MEM_MB1_ODT07,8

MEM_MB_CAS_L6,7,8
MEM_MB_WE_L6,7,8
MEM_MB_RAS_L6,7,8

MEM_MB_BANK26,7,8
MEM_MB_BANK16,7,8
MEM_MB_BANK06,7,8

MEM_MB_CKE17,8
MEM_MB_CKE06,8

MEM_MB0_CLK_H2
MEM_MB0_CLK_L2
MEM_MB0_CLK_H1
MEM_MB0_CLK_L1
MEM_MB0_CLK_H0
MEM_MB0_CLK_L0

MEM_MB0_CS_L1
MEM_MB0_CS_L0

MEM_MB0_ODT0
MEM_MB1_CLK_H2

MEM_MB1_CLK_L2
MEM_MB1_CLK_H1
MEM_MB1_CLK_L1
MEM_MB1_CLK_H0
MEM_MB1_CLK_L0

MEM_MB1_CS_L1
MEM_MB1_CS_L0

MEM_MB1_ODT0

MEM_MB_CAS_L
MEM_MB_WE_L
MEM_MB_RAS_L

MEM_MB_BANK2
MEM_MB_BANK1
MEM_MB_BANK0

MEM_MB_CKE1
MEM_MB_CKE0

MEM_MB_ADD15
MEM_MB_ADD14
MEM_MB_ADD13
MEM_MB_ADD12
MEM_MB_ADD11
MEM_MB_ADD10
MEM_MB_ADD9
MEM_MB_ADD8
MEM_MB_ADD7
MEM_MB_ADD6
MEM_MB_ADD5
MEM_MB_ADD4
MEM_MB_ADD3
MEM_MB_ADD2
MEM_MB_ADD1
MEM_MB_ADD0

MEM_MB_DQS_H7
MEM_MB_DQS_L7
MEM_MB_DQS_H6
MEM_MB_DQS_L6
MEM_MB_DQS_H5
MEM_MB_DQS_L5
MEM_MB_DQS_H4
MEM_MB_DQS_L4
MEM_MB_DQS_H3
MEM_MB_DQS_L3
MEM_MB_DQS_H2
MEM_MB_DQS_L2
MEM_MB_DQS_H1
MEM_MB_DQS_L1
MEM_MB_DQS_H0
MEM_MB_DQS_L0

MEM_MB_DM7
MEM_MB_DM6
MEM_MB_DM5
MEM_MB_DM4
MEM_MB_DM3
MEM_MB_DM2
MEM_MB_DM1
MEM_MB_DM0

AJ19

AK19

AE30
AC31

AD29
AL19

AL18

W29
W28

AE29
AB31

AD31

AC29
AC30
AB29

AA31
AA28

M31
M29

AE31

AA29

AA30
AK13

AJ13

AK17

AJ17
AK23
AL23
AL28
AL29

AJ14
AH17

AJ23
AK29

A18
A19
U31
U30

C19
D19

N31

N28
N29

N30
P29

P31
R29
R28
R31
R30
T31
T29
U29
U28

D31
C31
C24
C23
D17
C17
C14
C13

C30
A23
B17
B13

MEMORY INTERFACE B

MB0_CLK_H(2)
MB0_CLK_L(2)
MB0_CLK_H(1)
MB0_CLK_L(1)
MB0_CLK_H(0)
MB0_CLK_L(0)

MB0_CS_L(1)
MB0_CS_L(0)

MB0_ODT(0)
MB1_CLK_H(2)

MB1_CLK_L(2)
MB1_CLK_H(1)
MB1_CLK_L(1)
MB1_CLK_H(0)
MB1_CLK_L(0)

MB1_CS_L(1)
MB1_CS_L(0)

MB1_ODT(0)

MB_CAS_L
MB_WE_L
MB_RAS_L

MB_BANK(2)
MB_BANK(1)
MB_BANK(0)

MB_CKE(1)
MB_CKE(0)

MB_ADD(15)
MB_ADD(14)
MB_ADD(13)
MB_ADD(12)
MB_ADD(11)
MB_ADD(10)
MB_ADD(9)
MB_ADD(8)
MB_ADD(7)
MB_ADD(6)
MB_ADD(5)
MB_ADD(4)
MB_ADD(3)
MB_ADD(2)
MB_ADD(1)
MB_ADD(0)

MB_DQS_H(7)
MB_DQS_L(7)
MB_DQS_H(6)
MB_DQS_L(6)
MB_DQS_H(5)
MB_DQS_L(5)
MB_DQS_H(4)
MB_DQS_L(4)
MB_DQS_H(3)
MB_DQS_L(3)
MB_DQS_H(2)
MB_DQS_L(2)
MB_DQS_H(1)
MB_DQS_L(1)
MB_DQS_H(0)
MB_DQS_L(0)

MB_DM(7)
MB_DM(6)
MB_DM(5)
MB_DM(4)
MB_DM(3)
MB_DM(2)
MB_DM(1)
MB_DM(0)

MB_DATA(63)
MB_DATA(62)
MB_DATA(61)
MB_DATA(60)
MB_DATA(59)
MB_DATA(58)
MB_DATA(57)
MB_DATA(56)
MB_DATA(55)
MB_DATA(54)
MB_DATA(53)
MB_DATA(52)
MB_DATA(51)
MB_DATA(50)
MB_DATA(49)
MB_DATA(48)
MB_DATA(47)
MB_DATA(46)
MB_DATA(45)
MB_DATA(44)
MB_DATA(43)
MB_DATA(42)
MB_DATA(41)
MB_DATA(40)
MB_DATA(39)
MB_DATA(38)
MB_DATA(37)
MB_DATA(36)
MB_DATA(35)
MB_DATA(34)
MB_DATA(33)
MB_DATA(32)
MB_DATA(31)
MB_DATA(30)
MB_DATA(29)
MB_DATA(28)
MB_DATA(27)
MB_DATA(26)
MB_DATA(25)
MB_DATA(24)
MB_DATA(23)
MB_DATA(22)
MB_DATA(21)
MB_DATA(20)
MB_DATA(19)
MB_DATA(18)
MB_DATA(17)
MB_DATA(16)
MB_DATA(15)
MB_DATA(14)
MB_DATA(13)
MB_DATA(12)
MB_DATA(11)
MB_DATA(10)

MB_DATA(9)
MB_DATA(8)
MB_DATA(7)
MB_DATA(6)
MB_DATA(5)
MB_DATA(4)
MB_DATA(3)
MB_DATA(2)
MB_DATA(1)
MB_DATA(0)

MB_DQS_H(8)

MB_DQS_L(8)

MB_DM(8)

MB_CHECK(7)
MB_CHECK(6)
MB_CHECK(5)
MB_CHECK(4)
MB_CHECK(3)
MB_CHECK(2)
MB_CHECK(1)
MB_CHECK(0)

AH13
AL13
AL15
AJ15
AF13
AG13
AL14
AK15
AL16
AL17
AK21
AL21
AH15
AJ16
AH19
AL20
AJ22
AL22
AL24
AK25
AJ21
AH21
AH23
AJ24
AL27
AK27
AH31
AG30
AL25
AL26
AJ30
AJ31
E31
E30
B27
A27
F29
F31
A29
A28
A25
A24
C22
D21
A26
B25
B23
A22
B21
A20
C16
D15
C21
A21
A17
A16
B15
A14
E13
F13
C15
A15
A13
D13

J31
J30

J29
K29

K31
G30
G29
L29
L28
H31
G31

MEM_MB_DATA63
MEM_MB_DATA62
MEM_MB_DATA61
MEM_MB_DATA60
MEM_MB_DATA59
MEM_MB_DATA58
MEM_MB_DATA57
MEM_MB_DATA56
MEM_MB_DATA55
MEM_MB_DATA54
MEM_MB_DATA53
MEM_MB_DATA52
MEM_MB_DATA51
MEM_MB_DATA50
MEM_MB_DATA49
MEM_MB_DATA48
MEM_MB_DATA47
MEM_MB_DATA46
MEM_MB_DATA45
MEM_MB_DATA44
MEM_MB_DATA43
MEM_MB_DATA42
MEM_MB_DATA41
MEM_MB_DATA40
MEM_MB_DATA39
MEM_MB_DATA38
MEM_MB_DATA37
MEM_MB_DATA36
MEM_MB_DATA35
MEM_MB_DATA34
MEM_MB_DATA33
MEM_MB_DATA32
MEM_MB_DATA31
MEM_MB_DATA30
MEM_MB_DATA29
MEM_MB_DATA28
MEM_MB_DATA27
MEM_MB_DATA26
MEM_MB_DATA25
MEM_MB_DATA24
MEM_MB_DATA23
MEM_MB_DATA22
MEM_MB_DATA21
MEM_MB_DATA20

MEM_MB_DATA19
MEM_MB_DATA18
MEM_MB_DATA17
MEM_MB_DATA16
MEM_MB_DATA15
MEM_MB_DATA14
MEM_MB_DATA13
MEM_MB_DATA12
MEM_MB_DATA11
MEM_MB_DATA10

MEM_MB_DATA9

MEM_MB_DATA8

MEM_MB_DATA7

MEM_MB_DATA6

MEM_MB_DATA5

MEM_MB_DATA4

MEM_MB_DATA3

MEM_MB_DATA2

MEM_MB_DATA1

MEM_MB_DATA0

MEM_MB_DATA[63..0] 6,7

A A

Micro Star Restricted Secret

Title

ATHLON64 DDR MEMORY I/F

Document Number

MICRO-STAR INT'L

No. 69, Li-De St, Jung-He City,

CO.,LTD.

Taipei Hsien, Taiwan

5

4

3

2

http://www.msi.com.tw

MS-7339

1

Last Revision Date:
Sheet

Thursday, November 30, 2006

438

Rev

0A

of

5

4

3

2

1

VCCP

CPU1F

VDD1

A4

VDD1

A6

VDD2

AA8

VDD3

AA10

VDD4

AA12

VDD5

AA14

VDD6

AA16

VDD7

AA18

VDD8

AB7

VDD9

D D

C C

B B

AB11

AC10

AE10

AB9
AC4

AC5
AC8

AD2
AD3
AD7
AD9

AF7
AF9
AG4
AG5
AG7
AH2
AH3

E10

F11

G10
G12

H11
H23

K11
K13
K15
K17
K19
K21
K23

Y17
Y19

VDD10
VDD11
VDD12
VDD13
VDD14
VDD15
VDD16
VDD17
VDD18
VDD19
VDD20
VDD21
VDD22
VDD23
VDD24
VDD25
VDD26
VDD27

B3

VDD28

B5

VDD29

B7

VDD30

C2

VDD31

C4

VDD32

C6

VDD33

C8

VDD34

D3

VDD35

D5

VDD36

D7

VDD37

D9

VDD38

E4

VDD39

E6

VDD40

E8

VDD41
VDD42

F5

VDD43

F7

VDD44

F9

VDD45
VDD46

G6

VDD47

G8

VDD48
VDD49
VDD50

H7

VDD51
VDD52
VDD53

J8

VDD54

J12

VDD55

J14

VDD56

J16

VDD57

J18

VDD58

J20

VDD59

J22

VDD60

J24

VDD61

K7

VDD62

K9

VDD63
VDD64
VDD65
VDD66
VDD67
VDD68
VDD69
VDD70

L4

VDD71

L5

VDD72

L8

VDD73

L10

VDD74

L12

VDD75
VDD150
VDD151

VSS1
VSS2
VSS3
VSS4
VSS5
VSS6
VSS7
VSS8

VSS9
VSS10
VSS11
VSS12
VSS13
VSS14
VSS15
VSS16
VSS17
VSS18
VSS19
VSS20
VSS21
VSS22
VSS23
VSS24
VSS25
VSS26
VSS27
VSS28
VSS29
VSS30
VSS31
VSS32
VSS33
VSS34
VSS35
VSS36
VSS37
VSS38
VSS39
VSS40
VSS41
VSS42
VSS43
VSS44
VSS45
VSS46
VSS47
VSS48
VSS49
VSS50
VSS51
VSS52
VSS53
VSS54
VSS55
VSS56
VSS57
VSS58
VSS59
VSS60
VSS61
VSS62
VSS63
VSS64
VSS65
VSS66
VSS67
VSS68
VSS69
VSS70
VSS71
VSS72
VSS73
VSS74

VSS240
VSS241

A3
A7
A9
A11
AA4
AA5
AA7
AA9
AA11
AA13
AA15
AA17
AA19
AA21
AA23
AB2
AB3
AB8
AB10
AB12
AB14
AB16
AB18
AB20
AB22
AC7
AC9
AC11
AC13
AC15
AC17
AC19
AC21
AC23
AD8
AD10
AD12
AD14
AD16
AD20
AD22
AD24
AE4
AE5
AE9
AE11
AF2
AF3
AF8
AF10
AF12
AF14
AF16
AF18
AF20
AF22
AF24
AF26
AF28
AG10
AG11
AH14
AH16
AH18
AH20
AH22
AH24
AH26
AH28
AH30
AK2
AK14
AK16
AK18
Y14
Y16

VCCP

M11
M13
M15
M17
M19

N10
N12
N14
N16
N18

P11
P13
P15
P17
P19

R10
R12
R14
R16
R18
R20

U10
U12
U14
U16
U18
U20

V11
V13
V15
V17
V19
V21

W10
W12
W14
W16
W18
W20

Y11
Y13
Y15
Y21

VCCP

CPU1G

L14
L16
L18

T11
T13
T15
T17
T19
T21

VDD2

VDD1
VDD2
VDD3

M2

VDD4

M3

VDD5

M7

VDD6

M9

VDD7
VDD8
VDD9
VDD10
VDD11
VDD12

N8

VDD13
VDD14
VDD15
VDD16
VDD17
VDD18

P7

VDD19

P9

VDD20
VDD21
VDD22
VDD23
VDD24
VDD25

R4

VDD26

R5

VDD27

R8

VDD28
VDD29
VDD30
VDD31
VDD32
VDD33
VDD34

T2

VDD35

T3

VDD36

T7

VDD37

T9

VDD38
VDD39
VDD40
VDD41
VDD42
VDD43
VDD44

U8

VDD45
VDD46
VDD47
VDD48
VDD49
VDD50
VDD51

V9

VDD52
VDD53
VDD54
VDD55
VDD56
VDD57
VDD58

W4

VDD59

W5

VDD60

W8

VDD61
VDD62
VDD63
VDD64
VDD65
VDD66
VDD67

Y2

VDD68

Y3

VDD69

Y7

VDD70

Y9

VDD71
VDD72
VDD73
VDD74
VDD75

VSS1
VSS2
VSS3
VSS4
VSS5
VSS6
VSS7
VSS8

VSS9
VSS10
VSS11
VSS12
VSS13
VSS14
VSS15
VSS16
VSS17
VSS18
VSS19
VSS20
VSS21
VSS22
VSS23
VSS24
VSS25
VSS26
VSS27
VSS28
VSS29
VSS30
VSS31
VSS32
VSS33
VSS34
VSS35
VSS36
VSS37
VSS38
VSS39
VSS40
VSS41
VSS42
VSS43
VSS44
VSS45
VSS46
VSS47
VSS48
VSS49
VSS50
VSS51
VSS52
VSS53
VSS54
VSS55
VSS56
VSS57
VSS58
VSS59
VSS60
VSS61
VSS62
VSS63
VSS64
VSS65
VSS66
VSS67
VSS68
VSS69
VSS70
VSS71
VSS72
VSS73
VSS74
VSS75

AK20
AK22
AK24
AK26
AK28
AK30
AL5
B4
B9
B11
B14
B16
B18
B20
B22
B24
B26
B28
B30
C3
D14
D16
D18
D20
D22
D24
D26
D28
D30
E11
F4
F14
F16
F18
F20
F22
F24
F26
F28
F30
G9
G11
H8
H10
H12
H14
H16
H18
H22
H24
H26
H28
H30
J4
J5
J7
J9
J11
J13
J15
J17
J19
J21
J23
K2
K3
K8
K10
K12
K14
K16
K18
K20
K22
Y18

TP102

AA20
AA22
AB13
AB15
AB17
AB19
AB21
AB23
AC12
AC14
AC16
AC18
AC20
AC22
AD11
AD23
AE12
AF11

M21
M23

W22

L20
L22

N20
N22
P21
P23
R22
T23
U22
V23

Y23

CPU1H

VDD3

VDD1
VDD2
VDD3
VDD4
VDD5
VDD6
VDD7
VDD8
VDD9
VDD10
VDD11
VDD12
VDD13
VDD14
VDD15
VDD16
VDD17
VDD18
VDD19
VDD20
VDD21
VDD22
VDD23
VDD24
VDD25
VDD26
VDD27
VDD28
VDD29
VDD30
VDD31
VDD32

5

GND

6

GND

7

GND

8

GND

VSS1
VSS2
VSS3
VSS4
VSS5
VSS6
VSS7
VSS8

VSS9
VSS10
VSS11
VSS12
VSS13
VSS14
VSS15
VSS16
VSS17
VSS18
VSS19
VSS20
VSS21
VSS22
VSS23
VSS24
VSS25
VSS26
VSS27
VSS28
VSS29
VSS30
VSS31
VSS32
VSS33
VSS34
VSS35
VSS36
VSS37
VSS38
VSS39
VSS40
VSS41
VSS42
VSS43
VSS44
VSS45
VSS46
VSS47
VSS48
VSS49
VSS50
VSS51
VSS52
VSS53
VSS54
VSS55
VSS56
VSS57
VSS58
VSS59
VSS60
VSS61
VSS62
VSS63
VSS64
VSS65

N17
N19
N21
N23
P2
P3
P8
P10
P12
P14
P16
P18
P20
P22
R7
R9
R11
R13
R15
R17
R19
R21
R23
T8
T10
T12
T14
T16
T18
T20
T22
U4
U5
U7
U9
U11
U13
U15
U17
U19
U21
U23
V2
V3
V10
V12
V14
V16
V18
V20
V22
W9
W11
W13
W15
W17
W19
W21
W23
Y8
Y10
Y12
W7
Y20
Y22

VCCP

TP103

VCC_DDR

TP101

VCCA_1V2

VTT_DDR

VCCP

C645
C0.22U16X

AJ4
AJ3
AJ2
AJ1

D12
C12
B12
A12

AB24
AB26
AB28
AB30
AC24
AD26
AD28
AD30
AF30

M24
M26
M28
M30
P24
P26
P28
P30

T24
T26
T28

T30
V25
V26
V28
V30
Y24
Y26
Y28
Y29

C648

C0.22U16X

AMD REQUEST

VLDT_A1
VLDT_A2
VLDT_A3
VLDT_A4

VTT1
VTT2
VTT3
VTT4

VDDIO1
VDDIO2
VDDIO3
VDDIO4
VDDIO5
VDDIO6
VDDIO7
VDDIO8
VDDIO9
VDDIO10
VDDIO11
VDDIO12
VDDIO13
VDDIO14
VDDIO15
VDDIO16
VDDIO17
VDDIO18
VDDIO19
VDDIO20
VDDIO21
VDDIO22
VDDIO23
VDDIO24
VDDIO25
VDDIO26
VDDIO27
VDDIO28
VDDIO29

C647

CPU1I

VDDIO

C0.22U16X

VLDT_B1
VLDT_B2
VLDT_B3
VLDT_B4

VTT5
VTT6
VTT7
VTT8
VTT9

VSS1
VSS2
VSS3
VSS4
VSS5
VSS6
VSS7
VSS8

VSS9
VSS10
VSS11
VSS12
VSS13
VSS14
VSS15
VSS16
VSS17
VSS18
VSS19
VSS20
VSS21
VSS22
VSS23
VSS24
VSS25
VSS26
VSS27
VSS28

C649

C0.01U50X

H6
H5
H2
H1

AK12
AJ12
AH12
AG12
AL12

K24
K26
K28
K30
L7
L9
L11
L13
L15
L17
L19
L21
L23
M8
M10
M12
M14
M16
M18
M20
M22
N4
N5
N7
N9
N11
N13
N15

For EMI

VCC_DDR

VLDT_RUN_B

VTT_DDR

C4.7U10Y0805

C678
X_C0.1U25Y0402-RH

C670
C180P50N0402

AMD REQUEST

C84

X_C0.01U50Y5

VCCA_1V2

C839

C180P50N0402

C681

X_C0.1U25Y0402-RH

C75

C77

X_C0.01U50Y5

C73

X_C0.01U50Y5

C840

C180P50N0402

C180P50N0402

AMD REQUEST

C682
X_C0.1U25Y0402-RH

AMD REQUEST

C841

C683

X_C0.1U25Y0402-RH

C842
C180P50N0402

Closed Processor

C684
X_C0.1U25Y0402-RH

C843

C180P50N0402

C635

C640

VTT_DDR

C157
C0.22U16X

C274

C0.22U16X

AMD REQUEST

C207
C4.7U6.3X50805

C202

C4.7U6.3X50805

AMD REQUEST

C194
C180P50N0402

C62

C184

C1000P50X

C180P50N0402

C229

C1000P50X

C633

C22U6.3X1206

C634
X_C22U6.3X1206

C22U6.3X1206

C204

C638

C0.22U16X

C0.22U16X

C22U6.3X1206

AMD REQUEST

A A

VTT_DDR

C238
C0.22U16X

C34

C0.22U16X

C213
C4.7U6.3X50805

5

C291

C4.7U6.3X50805

C187
C180P50N0402

C237

C226

C1000P50X

C180P50N0402

C51

C1000P50X

4

VCC_DDR VCC3

C671 C0.01U16X0402

3

C263

C4.7U10Y0805

C642

C22U6.3X1206

C189
C4.7U10Y0805

C627

C22U6.3X1206

+

EC22
CD1000U16EL20-2

C636

C22U6.3X1206

VCC_DDRVCC_DDR

C22U6.3X1206

AMD REQUEST

C22U6.3X1206

C641

C646

C133

C22U6.3X1206

2

C632

C22U6.3X1206

C22

C4.7U10Y0805

C628

C22U6.3X1206

C195

C4.7U10Y0805

C639

C22U6.3X1206

C631

C0.22U16X

C70

C22U6.3X1206

C220

C0.22U16X

AMD REQUEST

C630

C22U6.3X1206

C644

C197

C22U6.3X1206

C0.01U50X

Micro Star Restricted Secret

Title

ATHLON64 PWR & GND

Document Number

MICRO-STAR INT'L

No. 69, Li-De St, Jung-He City,

CO.,LTD.

Taipei Hsien, Taiwan
http://www.msi.com.tw

C643

C22U6.3X1206

C669
C180P50N0402

MS-7339

1

C629

C95

C22U6.3X1206

C22U6.3X1206

C864

C865

C180P50N0402

C180P50N0402

Last Revision Date:

Thursday, November 30, 2006

Sheet

of

538

Rev

0A

5

4

3

2

1

MEM_MA_DQS_H[7..0]4,7
MEM_MA_DQS_L[7..0]4,7

D D

MEM_MA_DM[7..0]4,7

C C

SCL7,13,15

SDA7,13,15
MEM_MA_BANK24,7,8
MEM_MA_BANK14,7,8
MEM_MA_BANK04,7,8

MEM_MA_ADD[15..0]4,7,8

B B

MEM_MA0_CLK_H04,8
MEM_MA0_CLK_L04,8
MEM_MA0_CLK_H14,8
MEM_MA0_CLK_L14,8
MEM_MA0_CLK_H24,8
MEM_MA0_CLK_L24,8

MEM_MA_CKE04,8
MEM_MA_RAS_L4,7,8

MEM_MA_CAS_L4,7,8

A A

MEM_MA0_CS_L04,8
MEM_MA0_CS_L14,8

MEM_MA_DQS_H7
MEM_MA_DQS_L7
MEM_MA_DQS_H6
MEM_MA_DQS_L6
MEM_MA_DQS_H5
MEM_MA_DQS_L5
MEM_MA_DQS_H4
MEM_MA_DQS_L4
MEM_MA_DQS_H3
MEM_MA_DQS_L3
MEM_MA_DQS_H2
MEM_MA_DQS_L2
MEM_MA_DQS_H1
MEM_MA_DQS_L1
MEM_MA_DQS_H0
MEM_MA_DQS_L0

MEM_MA_BANK2
MEM_MA_BANK1
MEM_MA_BANK0

MEM_MA_ADD15
MEM_MA_ADD14
MEM_MA_ADD13
MEM_MA_ADD12
MEM_MA_ADD11
MEM_MA_ADD10
MEM_MA_ADD9
MEM_MA_ADD8
MEM_MA_ADD7
MEM_MA_ADD6
MEM_MA_ADD5
MEM_MA_ADD4
MEM_MA_ADD3
MEM_MA_ADD2
MEM_MA_ADD1
MEM_MA_ADD0

MEM_MA0_CLK_H0
MEM_MA0_CLK_L0
MEM_MA0_CLK_H1
MEM_MA0_CLK_L1
MEM_MA0_CLK_H2
MEM_MA0_CLK_L2

MEM_MA_CKE0
MEM_MA_RAS_L

MEM_MA_CAS_L
MEM_MA0_CS_L0

MEM_MA0_CS_L1

5

MEM_MA_DM7
MEM_MA_DM6
MEM_MA_DM5
MEM_MA_DM4
MEM_MA_DM3
MEM_MA_DM2
MEM_MA_DM1
MEM_MA_DM0

SCL
SDA

VCC_DDR

172

178

184

187

189

1975359646769170

175

VDD1

VDD2

VDD3

VDD4

VDD5

VDD6

VDD7

VDD8

VDD9

VDD10

VDD11

VDDQ1

164

DQS17_H

165

DQS17_L

232

DQS16_H

233

DQS16_L

223

DQS15_H

224

DQS15_L

211

DQS14_H

212

DQS14_L

202

DQS13_H

203

DQS13_L

155

DQS12_H

156

DQS12_L

146

DQS11_H

147

DQS11_L

134

DQS10_H

135

DQS10_L

125

DQS9_H

126

DQS9_L

46

DQS8_H

45

DQS8_L

114

DQS7_H

113

DQS7_L

105

DQS6_H

104

DQS6_L

93

DQS5_H

92

DQS5_L

84

DQS4_H

83

DQS4_L

37

DQS3_H

36

DQS3_L

28

DQS2_H

27

DQS2_L

16

DQS1_H

15

DQS1_L

7

DQS0_H

6

DQS0_L

101

SA2

240

SA1

239

SA0

120

SCL

119

SDA

54

BA2

190

BA1

71

BA0

173

A15

174

A14

196

A13

176

A12

57

A11

70

A10

177

A9

179

A8

58

A7

180

A6

60

A5

61

A4

182

A3

63

A2

183

A1

188

A0

168

CB7

167

CB6

162

CB5

161

CB4

49

CB3

48

CB2

43

CB1

42

CB0

185

CK0_H

186

CK0_L

137

CK1_H

138

CK1_L

220

CK2_H

221

CK2_L

18

RESET_L

52

CKE0

171

CKE1

192

RAS_L

74

CAS_L

193

S0_L

76

S1_L

VDDQ2

181

191

194515662727578

VDDQ3

VDDQ4

VDDQ5

VDDQ6

VDDQ7

VDDQ8

VDDQ9

VDDQ10

VDDQ11

VCC3

238

VDDSPD

ERR_OUT_L

DIMM1

DQ63
DQ62
DQ61
DQ60
DQ59
DQ58
DQ57
DQ56
DQ55
DQ54
DQ53
DQ52
DQ51
DQ50
DQ49
DQ48
DQ47
DQ46
DQ45
DQ44
DQ43
DQ42
DQ41
DQ40
DQ39
DQ38
DQ37
DQ36
DQ35
DQ34
DQ33
DQ32
DQ31
DQ30
DQ29
DQ28
DQ27
DQ26
DQ25
DQ24
DQ23
DQ22
DQ21
DQ20
DQ19
DQ18
DQ17
DQ16
DQ15
DQ14
DQ13
DQ12
DQ11
DQ10

WE_L
VREF

ODT0
ODT1

PAR_IN

MEM_MA_DATA63

236

MEM_MA_DATA62

235

MEM_MA_DATA61

230

MEM_MA_DATA60

229

MEM_MA_DATA59

117

MEM_MA_DATA58

116

MEM_MA_DATA57

111

MEM_MA_DATA56

110

MEM_MA_DATA55

227

MEM_MA_DATA54

226

MEM_MA_DATA53

218

MEM_MA_DATA52

217

MEM_MA_DATA51

108

MEM_MA_DATA50

107

MEM_MA_DATA49

99

MEM_MA_DATA48

98

MEM_MA_DATA47

215

MEM_MA_DATA46

214

MEM_MA_DATA45

209

MEM_MA_DATA44

208

MEM_MA_DATA43

96

MEM_MA_DATA42

95

MEM_MA_DATA41

90

MEM_MA_DATA40

89

MEM_MA_DATA39

206

MEM_MA_DATA38

205

MEM_MA_DATA37

200

MEM_MA_DATA36

199

MEM_MA_DATA35

87

MEM_MA_DATA34

86

MEM_MA_DATA33

81

MEM_MA_DATA32

80

MEM_MA_DATA31

159

MEM_MA_DATA30

158

MEM_MA_DATA29

153

MEM_MA_DATA28

152

MEM_MA_DATA27

40

MEM_MA_DATA26

39

MEM_MA_DATA25

34

MEM_MA_DATA24

33

MEM_MA_DATA23

150

MEM_MA_DATA22

149

MEM_MA_DATA21

144

MEM_MA_DATA20

143

MEM_MA_DATA19

31

MEM_MA_DATA18

30

MEM_MA_DATA17

25

MEM_MA_DATA16

24

MEM_MA_DATA15

141

MEM_MA_DATA14

140

MEM_MA_DATA13

132

MEM_MA_DATA12

131

MEM_MA_DATA11

22

MEM_MA_DATA10

21

MEM_MA_DATA9

13

DQ9

MEM_MA_DATA8

12

DQ8

MEM_MA_DATA7

129

DQ7

MEM_MA_DATA6

128

DQ6

MEM_MA_DATA5

123

DQ5

MEM_MA_DATA4

122

DQ4

MEM_MA_DATA3

10

DQ3

MEM_MA_DATA2

9

DQ2

MEM_MA_DATA1

4

DQ1

MEM_MA_DATA0

3

DQ0

MEM_MA_WE_L

73

VDDR_VREF

1
102

TEST

MEM_MA0_ODT0

195
77

55
68

19

NC1

4

MEM_MA_DATA[63..0] 4,7

MEM_MA_WE_L 4,7,8

X_C0.1U25Y0402-RH

MEM_MA0_ODT0 4,8

VDDR_VREF

C618

MEM_MB_DQS_H[7..0]4,7
MEM_MB_DQS_L[7..0]4,7

MEM_MB_DM[7..0]4,7

MEM_MB_BANK24,7,8
MEM_MB_BANK14,7,8
MEM_MB_BANK04,7,8

MEM_MB_ADD[15..0]4,7,8

MEM_MB0_CLK_H04,8
MEM_MB0_CLK_L04,8
MEM_MB0_CLK_H14,8
MEM_MB0_CLK_L14,8
MEM_MB0_CLK_H24,8
MEM_MB0_CLK_L24,8

MEM_MB_CKE04,8
MEM_MB_RAS_L4,7,8

MEM_MB_CAS_L4,7,8
MEM_MB0_CS_L04,8

MEM_MB0_CS_L14,8

VCC3

MEM_MB_DM7
MEM_MB_DM6
MEM_MB_DM5
MEM_MB_DM4
MEM_MB_DM3
MEM_MB_DM2
MEM_MB_DM1
MEM_MB_DM0

MEM_MB_DQS_H7
MEM_MB_DQS_L7
MEM_MB_DQS_H6
MEM_MB_DQS_L6
MEM_MB_DQS_H5
MEM_MB_DQS_L5
MEM_MB_DQS_H4
MEM_MB_DQS_L4
MEM_MB_DQS_H3
MEM_MB_DQS_L3
MEM_MB_DQS_H2
MEM_MB_DQS_L2
MEM_MB_DQS_H1
MEM_MB_DQS_L1
MEM_MB_DQS_H0
MEM_MB_DQS_L0

SCL
SDA
MEM_MB_BANK2
MEM_MB_BANK1
MEM_MB_BANK0

MEM_MB_ADD15
MEM_MB_ADD14
MEM_MB_ADD13
MEM_MB_ADD12
MEM_MB_ADD11
MEM_MB_ADD10
MEM_MB_ADD9
MEM_MB_ADD8
MEM_MB_ADD7
MEM_MB_ADD6
MEM_MB_ADD5
MEM_MB_ADD4
MEM_MB_ADD3
MEM_MB_ADD2
MEM_MB_ADD1
MEM_MB_ADD0

MEM_MB0_CLK_H0
MEM_MB0_CLK_L0
MEM_MB0_CLK_H1
MEM_MB0_CLK_L1
MEM_MB0_CLK_H2
MEM_MB0_CLK_L2

MEM_MB_CKE0
MEM_MB_RAS_L

MEM_MB_CAS_L
MEM_MB0_CS_L0

MEM_MB0_CS_L1

3

VCC_DDR

172

178

184

187

189

1975359646769170

175

VDD1

VDD2

VDD3

VDD4

VDD5

VDD6

VDD7

VDD8

VDD9

VDD10

VDD11

VDDQ1

164

DQS17_H

165

DQS17_L

232

DQS16_H

233

DQS16_L

223

DQS15_H

224

DQS15_L

211

DQS14_H

212

DQS14_L

202

DQS13_H

203

DQS13_L

155

DQS12_H

156

DQS12_L

146

DQS11_H

147

DQS11_L

134

DQS10_H

135

DQS10_L

125

DQS9_H

126

DQS9_L

46

DQS8_H

45

DQS8_L

114

DQS7_H

113

DQS7_L

105

DQS6_H

104

DQS6_L

93

DQS5_H

92

DQS5_L

84

DQS4_H

83

DQS4_L

37

DQS3_H

36

DQS3_L

28

DQS2_H

27

DQS2_L

16

DQS1_H

15

DQS1_L

7

DQS0_H

6

DQS0_L

101

SA2

240

SA1

239

SA0

120

SCL

119

SDA

54

BA2

190

BA1

71

BA0

173

A15

174

A14

196

A13

176

A12

57

A11

70

A10

177

A9

179

A8

58

A7

180

A6

60

A5

61

A4

182

A3

63

A2

183

A1

188

A0

168

CB7

167

CB6

162

CB5

161

CB4

49

CB3

48

CB2

43

CB1

42

CB0

185

CK0_H

186

CK0_L

137

CK1_H

138

CK1_L

220

CK2_H

221

CK2_L

18

RESET_L

52

CKE0

171

CKE1

192

RAS_L

74

CAS_L

193

S0_L

76

S1_L

VDDQ2

181

191

194515662727578

VDDQ3

VDDQ4

VDDQ5

VDDQ6

VDDQ7

VDDQ8

VDDQ9

VCC3

VDDQ10

VDDQ11

238

VDDSPD

WE_L
VREF

ODT0
ODT1

ERR_OUT_L

PAR_IN

DQ63
DQ62
DQ61
DQ60
DQ59
DQ58
DQ57
DQ56
DQ55
DQ54
DQ53
DQ52
DQ51
DQ50
DQ49
DQ48
DQ47
DQ46
DQ45
DQ44
DQ43
DQ42
DQ41
DQ40
DQ39
DQ38
DQ37
DQ36
DQ35
DQ34
DQ33
DQ32
DQ31
DQ30
DQ29
DQ28
DQ27
DQ26
DQ25
DQ24
DQ23
DQ22
DQ21
DQ20
DQ19
DQ18
DQ17
DQ16
DQ15
DQ14
DQ13
DQ12
DQ11
DQ10

TEST

DQ9
DQ8
DQ7
DQ6
DQ5
DQ4
DQ3
DQ2
DQ1
DQ0

NC1

DIMM2

236
235
230
229
117
116
111
110
227
226
218
217
108
107
99
98
215
214
209
208
96
95
90
89
206
205
200
199
87
86
81
80
159
158
153
152
40
39
34
33
150
149
144
143
31
30
25
24
141
140
132
131
22
21
13
12
129
128
123
122
10
9
4
3

73
1
102
195

77
55

68
19

2

MEM_MB_DATA63
MEM_MB_DATA62
MEM_MB_DATA61
MEM_MB_DATA60
MEM_MB_DATA59
MEM_MB_DATA58
MEM_MB_DATA57
MEM_MB_DATA56
MEM_MB_DATA55
MEM_MB_DATA54
MEM_MB_DATA53
MEM_MB_DATA52
MEM_MB_DATA51
MEM_MB_DATA50
MEM_MB_DATA49
MEM_MB_DATA48
MEM_MB_DATA47
MEM_MB_DATA46
MEM_MB_DATA45
MEM_MB_DATA44
MEM_MB_DATA43
MEM_MB_DATA42
MEM_MB_DATA41
MEM_MB_DATA40
MEM_MB_DATA39
MEM_MB_DATA38
MEM_MB_DATA37
MEM_MB_DATA36
MEM_MB_DATA35
MEM_MB_DATA34
MEM_MB_DATA33
MEM_MB_DATA32
MEM_MB_DATA31
MEM_MB_DATA30
MEM_MB_DATA29
MEM_MB_DATA28
MEM_MB_DATA27
MEM_MB_DATA26
MEM_MB_DATA25
MEM_MB_DATA24
MEM_MB_DATA23
MEM_MB_DATA22
MEM_MB_DATA21
MEM_MB_DATA20
MEM_MB_DATA19
MEM_MB_DATA18
MEM_MB_DATA17
MEM_MB_DATA16
MEM_MB_DATA15
MEM_MB_DATA14
MEM_MB_DATA13
MEM_MB_DATA12
MEM_MB_DATA11
MEM_MB_DATA10
MEM_MB_DATA9
MEM_MB_DATA8
MEM_MB_DATA7
MEM_MB_DATA6
MEM_MB_DATA5
MEM_MB_DATA4
MEM_MB_DATA3
MEM_MB_DATA2
MEM_MB_DATA1
MEM_MB_DATA0

MEM_MB_WE_L

VDDR_VREF

MEM_MB0_ODT0

MEM_MB_DATA[63..0] 4,7

MEM_MB_WE_L 4,7,8

VDDR_VREF

C619
C1000P10X0402

MEM_MB0_ODT0 4,8

TP104

VCC_DDR

R24

56.2R1%

R22

56.2R1%

SCL

SDA

C19

X_C0.1U25Y0402-RH

VDDR_VREF

C621

C0.1U25Y0402-RH

Micro Star Restricted Secret

Title

FIRST LOGICAL DDR DIMM

Document Number

MICRO-STAR INT'L

No. 69, Li-De St, Jung-He City,

CO.,LTD.

Taipei Hsien, Taiwan
http://www.msi.com.tw

SCL 7,13,15
SDA 7,13,15

VDDR_VREF

AMD REQUEST

MS-7339

1

Last Revision Date:

Thursday, November 30, 2006

Sheet

638

Rev

0A

of

5

4

3

2

1

MEM_MA_DQS_H[7..0]4,6
MEM_MA_DQS_L[7..0]4,6

D D

MEM_MA_DM[7..0]4,6

C C

SCL6,13,15
SDA6,13,15
MEM_MA_BANK24,6,8
MEM_MA_BANK14,6,8
MEM_MA_BANK04,6,8

MEM_MA_ADD[15..0]4,6,8

B B

MEM_MA1_CLK_H04,8
MEM_MA1_CLK_L04,8
MEM_MA1_CLK_H14,8
MEM_MA1_CLK_L14,8
MEM_MA1_CLK_H24,8
MEM_MA1_CLK_L24,8

MEM_MA_CKE14,8

A A

MEM_MA_RAS_L4,6,8
MEM_MA_CAS_L4,6,8

MEM_MA1_CS_L04,8
MEM_MA1_CS_L14,8

MEM_MA_DM7
MEM_MA_DM6
MEM_MA_DM5
MEM_MA_DM4
MEM_MA_DM3
MEM_MA_DM2
MEM_MA_DM1
MEM_MA_DM0

MEM_MA_DQS_H7
MEM_MA_DQS_L7
MEM_MA_DQS_H6
MEM_MA_DQS_L6
MEM_MA_DQS_H5
MEM_MA_DQS_L5
MEM_MA_DQS_H4
MEM_MA_DQS_L4
MEM_MA_DQS_H3
MEM_MA_DQS_L3
MEM_MA_DQS_H2
MEM_MA_DQS_L2
MEM_MA_DQS_H1
MEM_MA_DQS_L1
MEM_MA_DQS_H0

VCC3

SCL
SDA
MEM_MA_BANK2
MEM_MA_BANK1
MEM_MA_BANK0

MEM_MA_ADD15
MEM_MA_ADD14
MEM_MA_ADD13
MEM_MA_ADD12
MEM_MA_ADD11
MEM_MA_ADD10
MEM_MA_ADD9
MEM_MA_ADD8
MEM_MA_ADD7
MEM_MA_ADD6
MEM_MA_ADD5
MEM_MA_ADD4
MEM_MA_ADD3
MEM_MA_ADD2
MEM_MA_ADD1
MEM_MA_ADD0

MEM_MA1_CLK_H0
MEM_MA1_CLK_L0
MEM_MA1_CLK_H1
MEM_MA1_CLK_L1
MEM_MA1_CLK_H2
MEM_MA1_CLK_L2

MEM_MA_CKE1 MEM_MB_CKE1
MEM_MA_RAS_L

MEM_MA_CAS_L
MEM_MA1_CS_L0

MEM_MA1_CS_L1

5

VCC_DDR VCC3

172

178

184

187

189

1975359646769170

VDD1

VDD2

VDD3

VDD4

VDD5

VDD6

VDD7

VDD8

VDD9

VDD10

164

DQS17_H

165

DQS17_L

232

DQS16_H

233

DQS16_L

223

DQS15_H

224

DQS15_L

211

DQS14_H

212

DQS14_L

202

DQS13_H

203

DQS13_L

155

DQS12_H

156

DQS12_L

146

DQS11_H

147

DQS11_L

134

DQS10_H

135

DQS10_L

125

DQS9_H

126

DQS9_L

46

DQS8_H

45

DQS8_L

114

DQS7_H

113

DQS7_L

105

DQS6_H

104

DQS6_L

93

DQS5_H

92

DQS5_L

84

DQS4_H

83

DQS4_L

37

DQS3_H

36

DQS3_L

28

DQS2_H

27

DQS2_L

16

DQS1_H

15

DQS1_L

7

DQS0_H

6

DQS0_L

101

SA2

240

SA1

239

SA0

120

SCL

119

SDA

54

BA2

190

BA1

71

BA0

173

A15

174

A14

196

A13

176

A12

57

A11

70

A10

177

A9

179

A8

58

A7

180

A6

60

A5

61

A4

182

A3

63

A2

183

A1

188

A0

168

CB7

167

CB6

162

CB5

161

CB4

49

CB3

48

CB2

43

CB1

42

CB0

185

CK0_H

186

CK0_L

137

CK1_H

138

CK1_L

220

CK2_H

221

CK2_L

18

RESET_L

52

CKE0

171

CKE1

192

RAS_L

74

CAS_L

193

S0_L

76

S1_L

VDD11

175

VDDQ1

VDDQ2

181

191

194515662727578

VDDQ3

VDDQ4

VDDQ5

VDDQ6

VDDQ7

VDDQ8

VDDQ9

VDDQ10

238

VDDQ11

VDDSPD

ERR_OUT_L

4

DQ63
DQ62
DQ61
DQ60
DQ59
DQ58
DQ57
DQ56
DQ55
DQ54
DQ53
DQ52
DQ51
DQ50
DQ49
DQ48
DQ47
DQ46
DQ45
DQ44
DQ43
DQ42
DQ41
DQ40
DQ39
DQ38
DQ37
DQ36
DQ35
DQ34
DQ33
DQ32
DQ31
DQ30
DQ29
DQ28
DQ27
DQ26
DQ25
DQ24
DQ23
DQ22
DQ21
DQ20
DQ19
DQ18
DQ17
DQ16
DQ15
DQ14
DQ13
DQ12
DQ11
DQ10

WE_L
VREF
TEST
ODT0

ODT1

PAR_IN

DIMM3

DQ9
DQ8
DQ7
DQ6
DQ5
DQ4
DQ3
DQ2
DQ1
DQ0

NC1

MEM_MA_DATA63

236

MEM_MA_DATA62

235

MEM_MA_DATA61

230

MEM_MA_DATA60

229

MEM_MA_DATA59

117

MEM_MA_DATA58

116

MEM_MA_DATA57

111

MEM_MA_DATA56

110

MEM_MA_DATA55

227

MEM_MA_DATA54

226

MEM_MA_DATA53

218

MEM_MA_DATA52

217

MEM_MA_DATA51

108

MEM_MA_DATA50

107

MEM_MA_DATA49

99

MEM_MA_DATA48

98

MEM_MA_DATA47

215

MEM_MA_DATA46

214

MEM_MA_DATA45

209

MEM_MA_DATA44

208

MEM_MA_DATA43

96

MEM_MA_DATA42

95

MEM_MA_DATA41

90

MEM_MA_DATA40

89

MEM_MA_DATA39

206

MEM_MA_DATA38

205

MEM_MA_DATA37

200

MEM_MA_DATA36

199

MEM_MA_DATA35

87

MEM_MA_DATA34

86

MEM_MA_DATA33

81

MEM_MA_DATA32

80

MEM_MA_DATA31

159

MEM_MA_DATA30

158

MEM_MA_DATA29

153

MEM_MA_DATA28

152

MEM_MA_DATA27

40

MEM_MA_DATA26

39

MEM_MA_DATA25

34

MEM_MA_DATA24

33

MEM_MA_DATA23

150

MEM_MA_DATA22

149

MEM_MA_DATA21

144

MEM_MA_DATA20

143

MEM_MA_DATA19

31

MEM_MA_DATA18

30

MEM_MA_DATA17

25

MEM_MA_DATA16

24

MEM_MA_DATA15

141

MEM_MA_DATA14

140

MEM_MA_DATA13

132

MEM_MA_DATA12

131

MEM_MA_DATA11

22

MEM_MA_DATA10

21

MEM_MA_DATA9

13

MEM_MA_DATA8

12

MEM_MA_DATA7

129

MEM_MA_DATA6

128

MEM_MA_DATA5

123

MEM_MA_DATA4

122

MEM_MA_DATA3

10

MEM_MA_DATA2

9

MEM_MA_DATA1

4

MEM_MA_DATA0

3

MEM_MA_WE_L

73
1
102

MEM_MA1_ODT0

195
77

55
68

19

MEM_MA_WE_L 4,6,8

C844

C0.1U25Y0402-RH

MEM_MA1_ODT0 4,8

MEM_MA_DATA[63..0] 4,6

MEM_MB_DM[7..0]4,6

VDDR_VREF VDDR_VREF

AMD REQUEST

3

MEM_MB_DQS_L[7..0]4,6
MEM_MB_DQS_H[7..0]4,6

VCC_DDR VCC3

172

178

184

187

189

1975359646769170

175

181

191

194515662727578

238

DIMM4

VDD1

VDD2

VDD3

VDD4

VDD5

VDD6

VDD7

VDD8

VDD9

VDD10

VDD11

VDDQ1

VDDQ2

VDDQ3

VDDQ4

VDDQ5

VDDQ6

VDDQ7

VDDQ8

VDDQ9

VDDQ10

VDDQ11

VDDSPD

164

DQS17_H

165

MEM_MB_DM7
MEM_MB_DM6
MEM_MB_DM5
MEM_MB_DM4
MEM_MB_DM3
MEM_MB_DM2
MEM_MB_DM1
MEM_MB_DM0

MEM_MB_DQS_H7
MEM_MB_DQS_L7
MEM_MB_DQS_H6
MEM_MB_DQS_L6
MEM_MB_DQS_H5
MEM_MB_DQS_L5
MEM_MB_DQS_H4
MEM_MB_DQS_L4
MEM_MB_DQS_H3
MEM_MB_DQS_L3
MEM_MB_DQS_H2
MEM_MB_DQS_L2
MEM_MB_DQS_H1
MEM_MB_DQS_L1
MEM_MB_DQS_H0

VCC3

SCL6,13,15
SDA6,13,15

MEM_MB_BANK24,6,8
MEM_MB_BANK14,6,8
MEM_MB_BANK04,6,8

MEM_MB_ADD[15..0]4,6,8

MEM_MB1_CLK_H04,8
MEM_MB1_CLK_L04,8
MEM_MB1_CLK_H14,8
MEM_MB1_CLK_L14,8
MEM_MB1_CLK_H24,8
MEM_MB1_CLK_L24,8

MEM_MB_CKE14,8
MEM_MB_RAS_L4,6,8

MEM_MB_CAS_L4,6,8
MEM_MB1_CS_L04,8

MEM_MB1_CS_L14,8

MEM_MB_DQS_L0MEM_MA_DQS_L0

SCL
SDA

MEM_MB_BANK2
MEM_MB_BANK1
MEM_MB_BANK0

MEM_MB_ADD15
MEM_MB_ADD14
MEM_MB_ADD13
MEM_MB_ADD12
MEM_MB_ADD11
MEM_MB_ADD10
MEM_MB_ADD9
MEM_MB_ADD8
MEM_MB_ADD7
MEM_MB_ADD6
MEM_MB_ADD5
MEM_MB_ADD4
MEM_MB_ADD3
MEM_MB_ADD2
MEM_MB_ADD1
MEM_MB_ADD0

MEM_MB1_CLK_H0
MEM_MB1_CLK_L0
MEM_MB1_CLK_H1
MEM_MB1_CLK_L1
MEM_MB1_CLK_H2
MEM_MB1_CLK_L2

MEM_MB_RAS_L
MEM_MB_CAS_L

MEM_MB1_CS_L0
MEM_MB1_CS_L1

DQS17_L

232

DQS16_H

233

DQS16_L

223

DQS15_H

224

DQS15_L

211

DQS14_H

212

DQS14_L

202

DQS13_H

203

DQS13_L

155

DQS12_H

156

DQS12_L

146

DQS11_H

147

DQS11_L

134

DQS10_H

135

DQS10_L

125

DQS9_H

126

DQS9_L

46

DQS8_H

45

DQS8_L

114

DQS7_H

113

DQS7_L

105

DQS6_H

104

DQS6_L

93

DQS5_H

92

DQS5_L

84

DQS4_H

83

DQS4_L

37

DQS3_H

36

DQS3_L

28

DQS2_H

27

DQS2_L

16

DQS1_H

15

DQS1_L

7

DQS0_H

6

DQS0_L

101

SA2

240

SA1

239

SA0

120

SCL

119

SDA

54

BA2

190

BA1

71

BA0

173

A15

174

A14

196

A13

176

A12

57

A11

70

A10

177

A9

179

A8

58

A7

180

A6

60

A5

61

A4

182

A3

63

A2

183

A1

188

A0

168

CB7

167

CB6

162

CB5

161

CB4

49

CB3

48

CB2

43

CB1

42

CB0

185

CK0_H

186

CK0_L

137

CK1_H

138

CK1_L

220

CK2_H

221

CK2_L

18

RESET_L

52

CKE0

171

CKE1

192

RAS_L

74

CAS_L

193

S0_L

76

S1_L

ERR_OUT_L

DQ63
DQ62
DQ61
DQ60
DQ59
DQ58
DQ57
DQ56
DQ55
DQ54
DQ53
DQ52
DQ51
DQ50
DQ49
DQ48
DQ47
DQ46
DQ45
DQ44
DQ43
DQ42
DQ41
DQ40
DQ39
DQ38
DQ37
DQ36
DQ35
DQ34
DQ33
DQ32
DQ31
DQ30
DQ29
DQ28
DQ27
DQ26
DQ25
DQ24
DQ23
DQ22
DQ21
DQ20
DQ19
DQ18
DQ17
DQ16
DQ15
DQ14
DQ13
DQ12
DQ11
DQ10

WE_L
VREF
TEST
ODT0

ODT1

PAR_IN

MEM_MB_DATA63

236

MEM_MB_DATA62

235

MEM_MB_DATA61

230

MEM_MB_DATA60

229

MEM_MB_DATA59

117

MEM_MB_DATA58

116

MEM_MB_DATA57

111

MEM_MB_DATA56

110

MEM_MB_DATA55

227

MEM_MB_DATA54

226

MEM_MB_DATA53

218

MEM_MB_DATA52

217

MEM_MB_DATA51

108

MEM_MB_DATA50

107

MEM_MB_DATA49

99

MEM_MB_DATA48

98

MEM_MB_DATA47

215

MEM_MB_DATA46

214

MEM_MB_DATA45

209

MEM_MB_DATA44

208

MEM_MB_DATA43

96

MEM_MB_DATA42

95

MEM_MB_DATA41

90

MEM_MB_DATA40

89

MEM_MB_DATA39

206

MEM_MB_DATA38

205

MEM_MB_DATA37

200

MEM_MB_DATA36

199

MEM_MB_DATA35

87

MEM_MB_DATA34

86

MEM_MB_DATA33

81

MEM_MB_DATA32

80

MEM_MB_DATA31

159

MEM_MB_DATA30

158

MEM_MB_DATA29

153

MEM_MB_DATA28

152

MEM_MB_DATA27

40

MEM_MB_DATA26

39

MEM_MB_DATA25

34

MEM_MB_DATA24

33

MEM_MB_DATA23

150

MEM_MB_DATA22

149

MEM_MB_DATA21

144

MEM_MB_DATA20

143

MEM_MB_DATA19

31

MEM_MB_DATA18

30

MEM_MB_DATA17

25

MEM_MB_DATA16

24

MEM_MB_DATA15

141

MEM_MB_DATA14

140

MEM_MB_DATA13

132

MEM_MB_DATA12

131

MEM_MB_DATA11

22

MEM_MB_DATA10

21

MEM_MB_DATA9

13

DQ9

MEM_MB_DATA8

12

DQ8

MEM_MB_DATA7

129

DQ7

MEM_MB_DATA6

128

DQ6

MEM_MB_DATA5

123

DQ5

MEM_MB_DATA4

122

DQ4

MEM_MB_DATA3

10

DQ3

MEM_MB_DATA2

9

DQ2

MEM_MB_DATA1

4

DQ1

MEM_MB_DATA0

3

DQ0

MEM_MB_WE_L

73
1
102

MEM_MB1_ODT0

195
77

55
68

19

NC1

MEM_MB1_ODT0 4,8

Title

Document Number

MICRO-STAR INT'L

No. 69, Li-De St, Jung-He City,

CO.,LTD.

Taipei Hsien, Taiwan

2

http://www.msi.com.tw

MEM_MB_DATA[63..0] 4,6

MEM_MB_WE_L 4,6,8

C622

C0.1U25Y0402-RH

Micro Star Restricted Secret

SECOND LOGICAL DDR DIMM

MS-7339

Last Revision Date:

Thursday, November 30, 2006

Sheet

1

738

Rev

0A

of

5

4

3

2

1

VTT_DDR

MEM_MB_ADD154,6,7
MEM_MB_ADD144,6,7

MEM_MB_BANK24,6,7

MEM_MA_ADD94,6,7
MEM_MA_ADD114,6,7
MEM_MB_ADD124,6,7

D D

C C

MEM_MB_ADD94,6,7
MEM_MA_ADD74,6,7
MEM_MA_ADD64,6,7
MEM_MB_ADD64,6,7
MEM_MB_ADD54,6,7
MEM_MA_ADD54,6,7
MEM_MB_ADD14,6,7
MEM_MB_ADD24,6,7
MEM_MA_ADD14,6,7
MEM_MA_ADD24,6,7

MEM_MB_ADD104,6,7
MEM_MB_BANK04,6,7

MEM_MB_RAS_L4,6,7

MEM_MB0_CS_L04,6
MEM_MA_BANK04,6,7

MEM_MB_BANK14,6,7
MEM_MA_RAS_L4,6,7
MEM_MA0_CS_L04,6

MEM_MA0_CS_L14,6
MEM_MB1_CS_L14,7
MEM_MA_ADD134,6,7
MEM_MA1_CS_L14,7

MEM_MA1_CS_L04,7
MEM_MA1_ODT04,7

MEM_MB_ADD15
MEM_MB_ADD14
MEM_MB_BANK2
MEM_MA_ADD9
MEM_MA_ADD11
MEM_MB_ADD12
MEM_MB_ADD9
MEM_MA_ADD7
MEM_MA_ADD6
MEM_MB_ADD6
MEM_MB_ADD5
MEM_MA_ADD5
MEM_MB_ADD1
MEM_MB_ADD2
MEM_MA_ADD1
MEM_MA_ADD2

MEM_MB_ADD10
MEM_MB_BANK0
MEM_MB_RAS_L
MEM_MB0_CS_L0

MEM_MA_BANK0
MEM_MB_BANK1
MEM_MA_RAS_L
MEM_MA0_CS_L0

MEM_MA0_CS_L1
MEM_MB1_CS_L1
MEM_MA_ADD13
MEM_MA1_CS_L1

MEM_MA1_CS_L0
MEM_MA1_ODT0

RN15 8P4R-47R0402

1

2

3

4

5

6

7

RN16 8P4R-47R0402

RN18 8P4R-47R0402

RN20 8P4R-47R0402

RN23 8P4R-47R0402

RN22 8P4R-47R0402

RN26 8P4R-47R0402

8

1

2

3

4

5

6

7

8

1

2

3

4

5

6

7

8

1

2

3

4

5

6

7

8

1

2

3

4

5

6

7

8

1

2

3

4

5

6

7

8

1

2

3

4

5

6

7

8

R115 47R0402
R122 47R0402

MEM_MA0_CLK_H24,6

MEM_MA0_CLK_L24,6

MEM_MA0_CLK_H14,6

MEM_MA0_CLK_L14,6

MEM_MA0_CLK_H04,6

MEM_MA0_CLK_L04,6

MEM_MB0_CLK_H24,6

MEM_MB0_CLK_L24,6

MEM_MB0_CLK_H14,6

MEM_MB0_CLK_L14,6

MEM_MB0_CLK_H04,6

MEM_MB0_CLK_L04,6

MEM_MA0_CLK_H2

MEM_MA0_CLK_L2

MEM_MA0_CLK_H1

MEM_MA0_CLK_L1

MEM_MA0_CLK_H0

MEM_MA0_CLK_L0

MEM_MB0_CLK_H2

MEM_MB0_CLK_L2

MEM_MB0_CLK_H1

MEM_MB0_CLK_L1

MEM_MB0_CLK_H0

MEM_MB0_CLK_L0

C182
C1.5P50N0402

C63
C1.5P50N0402

C107

C1.5P50N0402

C173
C1.5P50N0402

C47
C1.5P50N0402

C113
C1.5P50N0402

C0.1U25Y0402-RH

VTT_DDR

C224

MEM_MA_ADD15
MEM_MA_ADD14
MEM_MA_ADD13
MEM_MA_ADD12
MEM_MA_ADD11
MEM_MA_ADD10
MEM_MA_ADD9
MEM_MA_ADD8
MEM_MA_ADD7
MEM_MA_ADD6
MEM_MA_ADD5
MEM_MA_ADD4
MEM_MA_ADD3
MEM_MA_ADD2
MEM_MA_ADD1
MEM_MA_ADD0

MEM_MA_CAS_L
MEM_MA_WE_L
MEM_MA_RAS_L

MEM_MA_BANK2
MEM_MA_BANK1
MEM_MA_BANK0

C0.1U25Y0402-RH

C223

C165

C0.1U25Y0402-RH

C22P50N0402C93
C22P50N0402C90
C22P50N0402C185
C22P50N0402C99
C22P50N0402C100
C22P50N0402C141
C22P50N0402C106
C22P50N0402C110
C22P50N0402C105
C22P50N0402C115
C22P50N0402C108
C22P50N0402C114
C22P50N0402C120
C22P50N0402C126
C22P50N0402C131
C22P50N0402C143

C22P50N0402C154
C22P50N0402C162
C22P50N0402C145

C22P50N0402C96
C22P50N0402C151

Decoupling Between Processor and DIMMs

Layout: Spread out on VTT pour

C0.1U25Y0402-RH

C192

C305

C0.1U25Y0402-RH

C0.1U25Y0402-RH

C102

C88

C0.1U25Y0402-RH

AMD REQUEST

C221

C0.1U25Y0402-RH

MEM_MB_ADD15
MEM_MB_ADD14
MEM_MB_ADD13
MEM_MB_ADD12
MEM_MB_ADD11
MEM_MB_ADD10
MEM_MB_ADD9
MEM_MB_ADD8
MEM_MB_ADD7
MEM_MB_ADD6
MEM_MB_ADD5
MEM_MB_ADD4
MEM_MB_ADD3
MEM_MB_ADD2
MEM_MB_ADD1
MEM_MB_ADD0

MEM_MB_CAS_L
MEM_MB_WE_L
MEM_MB_RAS_L

MEM_MB_BANK2
MEM_MB_BANK1
MEM_MB_BANK0

C0.1U25Y0402-RH

C147

C188

C0.1U25Y0402-RH

C0.1U25Y0402-RH
C232

C216

C0.1U25Y0402-RH

VCC_DDRVCC_DDR

C22P50N0402C101
C22P50N0402C98
C22P50N0402C190
C22P50N0402C109
C22P50N0402C111
C22P50N0402C163
C22P50N0402C117
C22P50N0402C124
C22P50N0402C116
C22P50N0402C129
C22P50N0402C121
C22P50N0402C128
C22P50N0402C132
C22P50N0402C135
C22P50N0402C138
C22P50N0402C150

C22P50N0402C170
C22P50N0402C176
C22P50N0402C168

C22P50N0402C104
C22P50N0402C153C22P50N0402C146
C22P50N0402C159

C0.1U25Y0402-RH
C85

C123

C0.1U25Y0402-RH

AMD REQUEST

C0.1U25Y0402-RH

C119

C144

C0.1U25Y0402-RH

For EMI

VTT_DDR

VTT_DDR

MEM_MB_CKE14,7

MEM_MB_CKE04,6
MEM_MA_BANK24,6,7
MEM_MA_ADD124,6,7
MEM_MA_ADD84,6,7
MEM_MB_ADD114,6,7
MEM_MB_ADD74,6,7
MEM_MB_ADD84,6,7

B B

A A

MEM_MB_ADD44,6,7
MEM_MB_ADD34,6,7
MEM_MA_ADD44,6,7
MEM_MA_ADD34,6,7
MEM_MA_ADD04,6,7
MEM_MA_ADD104,6,7
MEM_MB_ADD04,6,7
MEM_MA_BANK14,6,7

MEM_MB_WE_L4,6,7

MEM_MB_CAS_L4,6,7
MEM_MA_WE_L4,6,7
MEM_MA_CAS_L4,6,7

MEM_MA_CKE14,7
MEM_MA_CKE04,6
MEM_MA_ADD154,6,7
MEM_MA_ADD144,6,7

MEM_MA0_ODT04,6

MEM_MB0_ODT04,6
MEM_MB_ADD134,6,7
MEM_MB0_CS_L14,6

MEM_MB1_CS_L04,7
MEM_MB1_ODT04,7

MEM_MB_CKE1
MEM_MB_CKE0
MEM_MA_BANK2
MEM_MA_ADD12
MEM_MA_ADD8
MEM_MB_ADD11
MEM_MB_ADD7
MEM_MB_ADD8
MEM_MB_ADD4
MEM_MB_ADD3
MEM_MA_ADD4
MEM_MA_ADD3
MEM_MA_ADD0
MEM_MA_ADD10
MEM_MB_ADD0
MEM_MA_BANK1

MEM_MB_WE_L
MEM_MB_CAS_L
MEM_MA_WE_L
MEM_MA_CAS_L

MEM_MA_CKE1
MEM_MA_CKE0
MEM_MA_ADD15
MEM_MA_ADD14

MEM_MA0_ODT0
MEM_MB0_ODT0
MEM_MB_ADD13
MEM_MB0_CS_L1

MEM_MB1_CS_L0
MEM_MB1_ODT0

5

RN14 8P4R-47R0402

1

2

3

4

5

6

7

RN17 8P4R-47R0402

RN19 8P4R-47R0402

RN21 8P4R-47R0402

RN24 8P4R-47R0402

RN13 8P4R-47R0402

RN25 8P4R-47R0402

8

1

2

3

4

5

6

7

8

1

2

3

4

5

6

7

8

1

2

3

4

5

6

7

8

1

2

3

4

5

6

7

8

1

2

3

4

5

6

7

8

1

2

3

4

5

6

7

8

R119 47R0402
R120 47R0402

MEM_MA1_CLK_H24,7

MEM_MA1_CLK_L24,7

MEM_MA1_CLK_H14,7

MEM_MA1_CLK_L14,7

MEM_MA1_CLK_H04,7

MEM_MA1_CLK_L04,7

MEM_MB1_CLK_H24,7

MEM_MB1_CLK_L24,7

MEM_MB1_CLK_H14,7

MEM_MB1_CLK_L14,7

MEM_MB1_CLK_H04,7

MEM_MB1_CLK_L04,7

4

MEM_MA1_CLK_H2

MEM_MA1_CLK_L2

MEM_MA1_CLK_H1

MEM_MA1_CLK_L1

MEM_MA1_CLK_H0

MEM_MA1_CLK_L0

MEM_MB1_CLK_H2

MEM_MB1_CLK_L2

MEM_MB1_CLK_H1

MEM_MB1_CLK_L1

MEM_MB1_CLK_H0

MEM_MB1_CLK_L0

C183
C1.5P50N0402

C53
C1.5P50N0402

C118
C1.5P50N0402

C177
C1.5P50N0402

C49
C1.5P50N0402

C122
C1.5P50N0402

C0.1U25Y0402-RH

VTT_DDR VCC_DDR

C92

C0.1U25Y0402-RH

C848

3

X_C0.1U25Y0402-RH

VTT_DDR

C198

C323

C0.1U25Y0402-RH

C94

C0.1U25Y0402-RH

C849

C0.1U25Y0402-RH

C0.1U25Y0402-RH

AMD REQUEST

C685

C850

C686

X_C0.1U25Y0402-RH

C324

C0.1U25Y0402-RH

C67

C0.1U25Y0402-RH

C851

C0.1U25Y0402-RH

C0.1U25Y0402-RH

C687

X_C0.1U25Y0402-RH

C66

C0.1U25Y0402-RH

C852

C0.1U25Y0402-RH

2

C688

X_C0.1U25Y0402-RH

C273

C0.1U25Y0402-RH

C853

C0.1U25Y0402-RH

C689

X_C0.1U25Y0402-RH

X_C0.1U25Y0402-RH

C97

C0.1U25Y0402-RH

VCC_DDR

Title

Document Number

MICRO-STAR INT'L

No. 69, Li-De St, Jung-He City,

CO.,LTD.

Taipei Hsien, Taiwan
http://www.msi.com.tw

C690

C140

C0.1U25Y0402-RH

C691

X_C0.1U25Y0402-RH

C155

C0.1U25Y0402-RH

Micro Star Restricted Secret

DDR Terminatior

MS-7339

C692

X_C0.1U25Y0402-RH

C845

C846
X_C0.1U25Y0402-RH

X_C0.1U25Y0402-RH

AMD REQUEST

Last Revision Date:

Thursday, November 30, 2006

Sheet

838

1

of

Rev

0A

5

4

3

2

1

D D

C C

B B

VDDHT_PKG

HT_CADOUT_H15
HT_CADOUT_L15
HT_CADOUT_H14
HT_CADOUT_L14
HT_CADOUT_H13
HT_CADOUT_L13
HT_CADOUT_H12
HT_CADOUT_L12
HT_CADOUT_H11
HT_CADOUT_L11
HT_CADOUT_H10
HT_CADOUT_L10
HT_CADOUT_H9
HT_CADOUT_L9
HT_CADOUT_H8
HT_CADOUT_L8

HT_CADOUT_H7
HT_CADOUT_L7
HT_CADOUT_H6
HT_CADOUT_L6
HT_CADOUT_H5
HT_CADOUT_L5
HT_CADOUT_H4
HT_CADOUT_L4
HT_CADOUT_H3
HT_CADOUT_L3
HT_CADOUT_H2
HT_CADOUT_L2
HT_CADOUT_H1
HT_CADOUT_L1
HT_CADOUT_H0
HT_CADOUT_L0

HT_CLKOUT_H13
HT_CLKOUT_L13

HT_CLKOUT_H03
HT_CLKOUT_L03

HT_CTLOUT_H03
HT_CTLOUT_L03

R152 49.9R1%0402
R137 49.9R1%0402

HT_RXCALN
HT_RXCALP

U12A

R19

HT_RXCAD15P

R18

HT_RXCAD15N

R21

HT_RXCAD14P

R22

HT_RXCAD14N

U22

HT_RXCAD13P

U21

HT_RXCAD13N

U18

HT_RXCAD12P

U19

HT_RXCAD12N

W19

HT_RXCAD11P

W20

HT_RXCAD11N

AC21

HT_RXCAD10P

AB22

HT_RXCAD10N

AB20

HT_RXCAD9P

AA20

HT_RXCAD9N

AA19

HT_RXCAD8P

Y19

HT_RXCAD8N

T24

HT_RXCAD7P

R25

HT_RXCAD7N

U25

HT_RXCAD6P

U24

HT_RXCAD6N

V23

HT_RXCAD5P

U23

HT_RXCAD5N

V24

HT_RXCAD4P

V25

HT_RXCAD4N

AA25

HT_RXCAD3P

AA24

HT_RXCAD3N

AB23

HT_RXCAD2P

AA23

HT_RXCAD2N

AB24

HT_RXCAD1P

AB25

HT_RXCAD1N

AC24

HT_RXCAD0P

AC25

HT_RXCAD0N

W21

HT_RXCLK1P

W22

HT_RXCLK1N

Y24

HT_RXCLK0P

W25

HT_RXCLK0N

P24

HT_RXCTLP

P25

HT_RXCTLN

A24

HT_RXCALP

C24

HT_RXCALN

ATI-215RQA6AVA11FG-A11-RH

PART 1 OF 5

HYPER TRANSPORT

I/F

HT_TXCAD15P
HT_TXCAD15N
HT_TXCAD14P
HT_TXCAD14N
HT_TXCAD13P
HT_TXCAD13N
HT_TXCAD12P
HT_TXCAD12N
HT_TXCAD11P
HT_TXCAD11N
HT_TXCAD10P
HT_TXCAD10N

HT_TXCAD9P

HT_TXCAD9N

HT_TXCAD8P

HT_TXCAD8N

HT_TXCAD7P

HT_TXCAD7N

HT_TXCAD6P

HT_TXCAD6N

HT_TXCAD5P

HT_TXCAD5N

HT_TXCAD4P

HT_TXCAD4N

HT_TXCAD3P

HT_TXCAD3N

HT_TXCAD2P

HT_TXCAD2N

HT_TXCAD1P

HT_TXCAD1N

HT_TXCAD0P

HT_TXCAD0N

HT_TXCLK1P
HT_TXCLK1N

HT_TXCLK0P
HT_TXCLK0N

HT_TXCTLP
HT_TXCTLN

HT_TXCALP
HT_TXCALN

P21
P22
P18
P19
M22
M21
M18
M19
L18
L19
G22
G21
J20
J21
F21
F22

N24
N25
L25
M24
K25
K24
J23
K23
G25
H24
F25
F24
E23
F23
E24
E25

L21
L22

J24
J25

N23
P23

C25
D24

HT_TXCALP

HT_TXCALN

HT_CADIN_H15
HT_CADIN_L15
HT_CADIN_H14
HT_CADIN_L14
HT_CADIN_H13
HT_CADIN_L13
HT_CADIN_H12
HT_CADIN_L12
HT_CADIN_H11
HT_CADIN_L11
HT_CADIN_H10
HT_CADIN_L10
HT_CADIN_H9
HT_CADIN_L9
HT_CADIN_H8
HT_CADIN_L8

HT_CADIN_H7
HT_CADIN_L7
HT_CADIN_H6
HT_CADIN_L6
HT_CADIN_H5
HT_CADIN_L5
HT_CADIN_H4
HT_CADIN_L4
HT_CADIN_H3
HT_CADIN_L3
HT_CADIN_H2
HT_CADIN_L2
HT_CADIN_H1
HT_CADIN_L1
HT_CADIN_H0
HT_CADIN_L0

R138 100R1%0402

HT_CLKIN_H1 3
HT_CLKIN_L1 3

HT_CLKIN_H0 3
HT_CLKIN_L0 3

HT_CTLIN_H0 3
HT_CTLIN_L0 3

HT_CADIN_H[15..0]3

HT_CADIN_L[15..0]3

HT_CADOUT_H[15..0]3

HT_CADOUT_L[15..0]3

A A

5

HT_CADIN_H[15..0]
HT_CADIN_L[15..0]
HT_CADOUT_H[15..0]
HT_CADOUT_L[15..0]

Micro Star Restricted Secret

Title

Document Number

MICRO-STAR INT'L

No. 69, Li-De St, Jung-He City,

CO.,LTD.

Taipei Hsien, Taiwan

4

3

http://www.msi.com.tw

2

RS690-HT LINK I/F

MS-7339

Last Revision Date:
Sheet

Thursday, November 30, 2006

938

1

Rev

0A

of

A

4 4

3 3

2 2

B

U12B

AB7
AB6

W11
W12

AA11
AB11

AA7

AB9
AA9

W14
W15

AB12
AA12

AA14
AB14

W4
W5

W9

G5
G4

J8
J7
J4
J5
L8
L7
L4

L5
M8
M7
M4
M5
P8
P7
P4
P5
R4
R5
R7
R8
U4
U5

Y4
Y5
V9

Y7

GFX_RX0P
GFX_RX0N
GFX_RX1P
GFX_RX1N
GFX_RX2P
GFX_RX2N
GFX_RX3P
GFX_RX3N
GFX_RX4P
GFX_RX4N
GFX_RX5P
GFX_RX5N
GFX_RX6P
GFX_RX6N
GFX_RX7P
GFX_RX7N
GFX_RX8P
GFX_RX8N
GFX_RX9P
GFX_RX9N
GFX_RX10P
GFX_RX10N
GFX_RX11P
GFX_RX11N
GFX_RX12P
GFX_RX12N
GFX_RX13P
GFX_RX13N
GFX_RX14P
GFX_RX14N
GFX_RX15P
GFX_RX15N

GPP_RX0P
GPP_RX0N

GPP_RX1P
GPP_RX1N

GPP_RX2P
GPP_RX2N

GPP_RX3P
GPP_RX3N

SB_RX0P
SB_RX0N

SB_RX1P
SB_RX1N

PCEH_ISET
PCEH_TXISET

PED_RX020
PED_RX0*20
PED_RX120
PED_RX1*20
PED_RX220
PED_RX2*20
PED_RX320
PED_RX3*20
PED_RX420
PED_RX4*20
PED_RX520
PED_RX5*20
PED_RX620
PED_RX6*20
PED_RX720
PED_RX7*20
PED_RX820
PED_RX8*20
PED_RX920
PED_RX9*20
PED_RX1020
PED_RX10*20
PED_RX1120
PED_RX11*20
PED_RX1220
PED_RX12*20
PED_RX1320
PED_RX13*20
PED_RX1420
PED_RX14*20
PED_RX1520
PED_RX15*20

A_RX2P14
A_RX2N14

A_RX3P14
A_RX3N14

PE0_RX20
PE0_RX*20

RX_LANP022
RX_LANN022

A_RX0P14
A_RX0N14

A_RX1P14
A_RX1N14

R184 X_1.47KR1%0402
R189 X_8.25KR1%

A_RX2P
A_RX2N

A_RX3P
A_RX3N

PE0_RX
PE0_RX*

RX_LANP0
RX_LANN0 TX_LANN0

*
* *

C

PART 2 OF 5

PCIE GFX I/F

PCIE I/F GPP

PCIE I/F SB

GFX_TX0P
GFX_TX0N
GFX_TX1P
GFX_TX1N
GFX_TX2P
GFX_TX2N
GFX_TX3P
GFX_TX3N
GFX_TX4P
GFX_TX4N
GFX_TX5P
GFX_TX5N
GFX_TX6P
GFX_TX6N
GFX_TX7P
GFX_TX7N
GFX_TX8P
GFX_TX8N
GFX_TX9P

GFX_TX9N
GFX_TX10P
GFX_TX10N
GFX_TX11P
GFX_TX11N
GFX_TX12P
GFX_TX12N
GFX_TX13P
GFX_TX13N
GFX_TX14P
GFX_TX14N
GFX_TX15P
GFX_TX15N

GPP_TX0P

GPP_TX0N

GPP_TX1P

GPP_TX1N

GPP_TX2P

GPP_TX2N

GPP_TX3P

GPP_TX3N

SB_TX0P
SB_TX0N

SB_TX1P
SB_TX1N

PCEH_PCAL
PCEH_NCAL

J1
H2
K2
K1
K3
L3
L1
L2
N2
N1
P2
P1
P3
R3
R1
R2
T2
U1
V2
V1
V3
W3
W1
W2
Y2
AA1
AA2
AB2
AB1
AC1
AE3
AE4

A_TX2P0

AD8

A_TX2N0

AE8

A_TX3P0

AD7

A_TX3N0

AE7

PE0_TX

AD4

PE0_TX*

AE5

TX_LANP0

AD5
AD6

A_TX0P_C

AE9

A_TX0N_C

AD10

A_TX1P_C

AC8

A_TX1N_C

AD9

R191 562R1%0402

AD11

R195 2KR1%0402

AE11

PED_TX0 20
PED_TX0* 20
PED_TX1 20
PED_TX1* 20
PED_TX2 20
PED_TX2* 20
PED_TX3 20
PED_TX3* 20
PED_TX4 20
PED_TX4* 20
PED_TX5 20
PED_TX5* 20
PED_TX6 20
PED_TX6* 20
PED_TX7 20
PED_TX7* 20
PED_TX8 20
PED_TX8* 20
PED_TX9 20
PED_TX9* 20
PED_TX10 20
PED_TX10* 20
PED_TX11 20
PED_TX11* 20
PED_TX12 20
PED_TX12* 20
PED_TX13 20
PED_TX13* 20
PED_TX14 20
PED_TX14* 20
PED_TX15 20
PED_TX15* 20

C347 C0.1U10X0402
C345 C0.1U10X0402

C354 C0.1U10X0402
C350 C0.1U10X0402

C355 C0.1U10X0402
C362 C0.1U10X0402

C322 C0.1U10X0402
C316 C0.1U10X0402

C341 C0.1U10X0402
C338 C0.1U10X0402

*

VDDA12_PKG2

D

A_TX2P 14
A_TX2N 14

A_TX3P 14
A_TX3N 14

PE0_TX 20
PE0_TX* 20

TXLANP 22
TXLANN 22

A_TX0P 14
A_TX0N 14

A_TX1P 14
A_TX1N 14

E

ATI-215RQA6AVA11FG-A11-RH

1 1

A

B

C

D

Micro Star Restricted Secret

Title

Document Number

MICRO-STAR INT'L

No. 69, Li-De St, Jung-He City,

CO.,LTD.

Taipei Hsien, Taiwan
http://www.msi.com.tw

RS690-PCIE I/F

MS-7339

Last Revision Date:

Thursday, November 30, 2006

Sheet

10 38

E

Rev

0A

of

5

4

3

2

1

1 2

CP11

1 2

CP23

LPVSSAVSSQ

NOTE: CONNECT TO GND CLOSE TO FI R S T C A P

TP106

D D

R230-R232 PLACED

+1.8V_S0

C C

LDT_STOP#3,14

VCC3

B B

R233

R245

4.7KR0402

R230

4.7KR0402

2KR0402

DDC_DATA20,28

A A

+1.8V_S0

R249

4.7KR0402

Q34
N-MMBT3904_NL_SOT23

R154 4.7KR0402

R723 X_0R0402
R724 0R0402

5

VCC3

R257
1KR1%0402

VCCA_1V2

L30 200L400_350_0805

DDC_DATA

I2C_CLK
I2C_DATA

STRP_DATA

I2C_DATA

DDC_DATA1

L32 200L400_350_0805

L15 200L400_350_0805

C4.7U10Y0805

WITHIN 1' OF NB

C246
C4.7U10Y0805

C312

VCC3

L19 26L600m_100_0805

CP20

+1.8V_S0

1 2

R181 X_0R0402

+1.8V_S0

L21 200L400_350_0805

AVSSQ

R134

R135

X_75R1%0402

X_75R1%0402

C243

C1U6.3Y0402-RH

HTREFCLK13

NB_OSC_14M13

NBSRCCLK13
NBSRCCLK#13

SBLINKCLK13
SBLINKCLK#13

LOAD_ROM#:LOAD ROM STRAP ENABLE

C344

C4.7U10Y0805

LDT_STOP_NB#

TV_SWITCH20

R234 X_2.7KR0402
R244 X_2.7KR0402
R259 X_2.7KR0402
R262 X_2.7KR0402

C340
C1U6.3Y0402-RH

DFT_GPIO2
DFT_GPIO3
DFT_GPIO4
DFT_GPIO5

RS690 RS690 only (NC for RS485)

DFT_GPIO1 DFT_GPIO[4:2] DFT_GPIO5

PULL HIGH
(internally
pulled high)

PULL
LOW

Bypass the loading
of EEPROM straps
and use Hardware
default values

DEFAULT

I2C Master can
load strap values
from EEPROM if
connected, or use
default values if
not connected

4

C4.7U10Y0805

C296
C2.2U10Y-RH

C252
C2.2U10Y-RH

R136
X_75R1%0402

TV_SWITCH

DFT_GPIO0

Memory
side port
not available

Memory
side port
available

AVDD

AVDD

C264

C260
C0.1U16Y0402

AVDDDI

AVDDQ

C254
C0.1U16Y0402

VSYNC#30

HSYNC#30

DAC_SCL30

DAC_SDAT30

PCI_RST1#21,26,31
NB_PWRGD26,27

ALLOW_LDTSTOP14

SB_OSC_INT_R

R227 X_2.7KR0402
R236 X_2.7KR0402

TMDS_HPD228

DEFAULT

U12C

B22

AVDD1

R30
G30
B30

R176 715R1%0402

PLLVDD

R246 10KR0402

DFT_GPIO2
DFT_GPIO5
DFT_GPIO4
DFT_GPIO3

BMREQ#14
I2C_CLK20,28

STRP_DATA

R
G
B

DFT_GPIO0
LOAD_ROM#

I2C_CLK
I2C_DATA

DDC_DATA1

C22

AVDD2

G17

AVSSN1

H17

AVSSN2

A20

AVDDDI

B20

AVSSDI

A21

AVDDQ

A22

AVSSQ

C21

C_R

C20

Y_G

D19

COMP_B

E19

RED

F19

GREEN

G19

BLUE

C6

DACVSYNC

A5

DACHSYNC

RSET

B21

RSET

B6

DACSCL

A6

DACSDA

A10

PLLVDD

B10

PLLVSS

B24

HTPVDD

B25

HTPVSS

C10

SYSRESET#

C11

POWERGOOD

C5

LDTSTOP#

B5

ALLOW_LDTSTOP

R15310KR0402

C23

HTTSTCLK

B23

HTREFCLK

C2

TVCLKIN

B11

OSCIN

A11

OSCOUT

F2

GFX_CLKP

E1

GFX_CLKN

G1

SB_CLKP

G2

SB_CLKN

D6

DFT_GPIO0

D7

DFT_GPIO1

C8

DFT_GPIO2

C7

DFT_GPIO3

B8

DFT_GPIO4

A8

DFT_GPIO5

B2

BMREQb

A2

I2C_CLK

B4

I2C_DATA

AA15

THERMALDIODE_P

AB15

THERMALDIODE_N

C14

TMDS_HPD

B3

DDC_DATA

C3

TESTMODE

A3

STRP_DATA

R237

ATI-215RQA6AVA11FG-A11-RH

4.7KR0402

PART 3 OF 5

PLL PWR

PM

CLOCKs

MIS. CRT/TVOUT

These pin straps are used to configure PCI-E GPP mode:
111: register defined (register default to Config E)

110: 4-0-0-0-0 Config A
101: 4-4 Config B
100: 4-2-2 Config C
011: 4-2-1-1 Config D
010: 4-1-1-1-1 Config E
others: register defined (register default to Config E)

3

B14
B15
B13
A13
H14
G14
D17
E17

A15
B16
C17
C18
B17
A17
A18
B18

E15

TXCLK_LP

D15

TXCLK_LN

H15

TXCLK_UP

G15

TXCLK_UN

D14

LPVDD

E14

LPVSS

A12
B12
C12
C13

A16

LVSSR1

A14

LVSSR3

D12

LVSSR5

C19

LVSSR6

C15

LVSSR7

C16

LVSSR8

F14

LVSSR12

F15

LVSSR13

E12
G12
F12

AD14

DVO_D0

AD15

DVO_D1

AE15

DVO_D2

AD16

DVO_D3

AE16

DVO_D4

AC17

DVO_D5

AD18

DVO_D6

AE19

DVO_D7

AD19

DVO_D8

AE20

DVO_D9

AD20

DVO_D10

AE21

DVO_D11

AD13
AC13

DVO_DE

AE13
AE17
AD17

Enable debug bus via the memory
IO pads, if available in the package

DEFAULT

TXOUT_L0P
TXOUT_L0N
TXOUT_L1P
TXOUT_L1N
TXOUT_L2P
TXOUT_L2N
TXOUT_L3P
TXOUT_L3N

TXOUT_U0P
TXOUT_U0N
TXOUT_U1P
TXOUT_U1N
TXOUT_U2P
TXOUT_U2N
TXOUT_U3P
TXOUT_U3N

LVTMDVO

LVDDR18D_1
LVDDR18D_2
LVDDR18A_1
LVDDR18A_2

LVDS_DIGON

LVDS_BLON
LVDS_BLEN

DVO_VSYNC
DVO_HSYNC

DVO_IDCKP
DVO_IDCKN

use default values

use the memory data bus
to output the debug bus

LPVDD

LVDDR18D
LVDDR18AHTPVDD

TMDS_HPD1

TMDS_CLKP 28
TMDS_CLKN 28

C0.1U16Y0402

C351

C0.1U16Y0402

DEFAULT

2

TMDS_00P 28
TMDS_00N 28
TMDS_01P 28
TMDS_01N 28
TMDS_02P 28
TMDS_02N 28

C321

C319

C1U6.3Y0402-RH

C303
C353
C4.7U10Y0805

C0.1U16Y0402

TMDS_HPD1 20

LPVSS

C1U10Y

L29 30L3_15_0805

L27 200L400_350_0805

C310

L33 200L400_350_0805

Title

Document Number

MICRO-STAR INT'L

No. 69, Li-De St, Jung-He City,

CO.,LTD.

Taipei Hsien, Taiwan
http://www.msi.com.tw

Q49

Q48

X_N-2N7002_SOT23

Micro Star Restricted Secret

RS690-SYSTEM I/F

MS-7339

Last Revision Date:
Sheet

1

+1.8V_S0

X_N-2N7002_SOT23

+12V

R255 X_4.7K/4
R256 X_4.7K/4

VCC3

Rev

0A

Thursday, November 30, 2006

11 38

of

5

U12E

D D

VCCA_1V2

0.5A

ATI-215RQA6AVA11FG-A11-RH

VSS62

B7

VSS61

H12

VSS60

AC16

VSS59

M13

4

D4

VSS56

VSS57

F17

AC15

M3

VSSA51

VSS54

VSS55

A23

AE10

VSSA50

VSS53

H23

M17

AC4P9AE6

VSSA48

VSSA49

VSS52

VSS51

AE14

R17

VSSA46

VSSA47

VSS49

VSS50

T23

T25

AC9

AC10G6Y15

VSSA44

VSSA45

VSS47

VSS48

AC7

AD3

VSSA42

VSSA43

VSS45

VSS46

AC22

R23C4AE22

AC5

AC6

VSSA40

VSSA41

VSS44

AC14

R9

AD1

VSSA38

VSSA39

VSS41

VSS42

D25

G24

Y14

AA3

VSSA37

VSSA95

VSS39

VSS40

Y22

AC23

Y11

Y12

VSSA93

VSSA94

VSS37

VSS38

H25

W24

VSSA35

VSSA36

VSS35

VSS36

AD25

U20

VSSA33

VSSA34

VSS33

VSS34

W23

Y25

VSSA32

VSS31

VSS32

R14

R20

VSSA30

VSS29

VSS30

P15

R12

3

VSSA27

VSSA28

VSS27

VSS28

P20

VSSA20

VSSA21

VSSA22

VSSA24

VSSA25

VSSA26

GROUND

VSS20

VSS21

VSS22

VSS23

VSS25

VSS26

M20

M23

M25

N12

N14

L24

P13

VSSA18

VSSA19

VSS18

VSS19

L23

M11

VSSA16

VSSA17

VSS16

VSS17

L20

VSSA15

VSS15

L12

L14

VSSA13

VSS13

VSS14

J12

VSS12

G23

VSSA10

VSSA11

VSS10

VSS11

M15

J22

VSSA9

VSS9

AE18

VSSA8

VSS8

R24

VSSA7

VSS7

P11

VSSA6

VSS6

Y23

V14F3V15A1H1G3J2H3J6F1L6M2M6J3P6T1N3R6U2T3U3U6Y1W6AC2Y3Y9

VSSA4

VSSA5

VSS4

VSS5

V11

VSSA3

VSS3

D23E9G11

V12

VSSA2

PAR 5 OF 5

VSS2

A25

F11

VSS1

2

VCCA_1V2

3.5A

1

CP9

TP107

C C

C10U6.3X50805

VCCA_1V2

B B

VCCA_1V2

**
*

A A

R156
X_0R-RH

1 2

C265

+1.8V_S0

1.5A

VCC3 VDDR3

+1.8V_S0

220L3_40_0805

R217:
RS485: 0 Ohm RESISTOR
RS690: 220 Ohm 500mA FERRITE BEAD

CURRENT MEASUREMENT

C266

C10U6.3X50805

L26 X_30L3_15_0805

CP21

1 2

L40

X_30L3_15_0805

L41 X_30L3_15_0805

L22 30L3_15_0805

L45

1 2

1 2

CP26

TP108

*
**

5

CP52

C256

C1U6.3Y0402-RH

C1U6.3Y0402-RH

X_C1U6.3Y0402-RH

X_C10U10Y0805

C4.7U10Y0805

C280

C279
C1U6.3Y0402-RH

C365

C4.7U10Y0805

C284

C370

C358

C1U6.3Y0402-RH

C261

C1U6.3Y0402-RH

C283
C1U6.3Y0402-RH

C369

C10U10Y0805

C278
C1U6.3Y0402-RH

C363
C1U10Y

C262

C650

C0.1U16X

C359

C368

C1U6.3Y0402-RH

C1U6.3Y0402-RH

背面

C255

C0.1U25Y0402-RH

背面

C655

C656

C0.1U16X

VDDA12_PKG1
VDDA12_PKG2

For EMI

+1.8V_S0

C0.1U16X

DDR

VDDHT_PKG

C693
X_C0.1U16Y0402

4

VDD_HT

VDD18

VDDA18

C374

C10U10Y0805

AE24
AD24
AD22
AB17
AE23

W17
AC18
AD21
AC19
AC20
AB19
AD23
AA17
AE25

AC3

AD2

AC12
AD12
AE12

AC11

Y17

AE2
AB3

AB4

AE1
E11

D11

D22

J14
J15

U7

W7

E7
F7
F9

G9

M1

U12D

PART 4 OF 5

VDD_HT1
VDD_HT2
VDD_HT5
VDD_HT6
VDD_HT9
VDD_HT10
VDD_HT11
VDD_HT12
VDD_HT13
VDD_HT14
VDD_HT15
VDD_HT16
VDD_HT17
VDD_HT18
VDD_HT19

VDD18_1
VDD18_2

VDDA18_1
VDDA18_2
VDDA18_3
VDDA18_4
VDDA18_5
VDDA18_6
VDDA18_7
VDDA18_8

VDDR3_2
VDDR3_1

VDDR_1
VDDR_2
VDDR_3

VDDA12/VDDPLL_1
VDDA12/VDDPLL_2
VSSA12/VSSPLL_1
VSSA12/VSSPLL_2

VDDHT_PKG
VDDA12_PKG1
VDDA12_PKG2

D1

VDDA_12_1

G7

VDDA_12_2

E2

VDDA_12_3

C1

VDDA_12_4

E3

VDDA_12_5

D2

VDDA_12_6

M9

VDDA_12_7

F4

VDDA_12_8

B1

VDDA_12_9

VDDC_1
VDDC_2
VDDC_3
VDDC_4
VDDC_5
VDDC_6
VDDC_7
VDDC_8

VDDC_9
VDDC_10
VDDC_11
VDDC_12
VDDC_13
VDDC_14
VDDC_15
VDDC_16
VDDC_17
VDDC_18
VDDC_19
VDDC_20
VDDC_21
VDDC_22
VDDC_23
VDDC_24
VDDC_25
VDDC_26
VDDC_27
VDDC_28
VDDC_29
VDDC_30
VDDC_31
VDDC_32

D3
L9
E6

L11
L13
L15
M12
R15
M14
N11
N13
N15
J11
H11
P12
P14
R11
R13
A19
B19
U11
U14
P17
L17
J19
D20
G20
A9
B9
C9
D9
A7
A4
U12
U15

VDDA_12_10
VDDA_12_11
VDDA_12_12

POWER

ATI-215RQA6AVA11FG-A11-RH

3

VDDA_12

背面

C251

C0.1U25Y0402-RH

C0.1U25Y0402-RH

C259

C0.1U16X

C653

背面

C0.1U16X

C657
C0.1U16X

C652

C0.1U16X

2

C654

C0.1U16X

NB RS485 POWER STATES

CP27

C367

C360

C10U6.3X50805

C1U10Y

10A

C651

C10U6.3X50805

Power Signal

VDDHT

VDDR,VDDRCK

VDD18

VDDC

VDDA18

VDDA12

AVDDDI

PLLVDD

HTPVDD

VDDR3

LPVDD

LVDDR18D

LVDDR18A OFFON ON OFF OFF

R253

CURRENT MEASUREMENT

X_0R-RH

1 2

C366
C10U6.3X50805

VCCA_1V2

C247

C244
C10U6.3X50805

S1

S3

S0

ON

ON

OFF

ON

ON

ON

ON

ON

OFF

ON

ON

OFF

ON

ON

OFF

ON

ON

OFF

ON

ON

OFFAVDD

ON

ON

OFF

ON

ON

OFF

ON

ON

OFF

ON

ON

OFF

ON

ON

OFF

ON

ON

OFF

Micro Star Restricted Secret

Title

Document Number

MICRO-STAR INT'L

No. 69, Li-De St, Jung-He City,

CO.,LTD.

Taipei Hsien, Taiwan
http://www.msi.com.tw

RS690-POWER

S4/S5

OFF

OFF

OFF

OFF

OFF

OFF

OFF

OFF

OFF

OFF

OFF

OFF

OFF

MS-7339

G3

OFF

OFF

OFF

OFF

OFF

OFF

OFF

OFF

OFF

OFF

OFF

OFF

OFF

Last Revision Date:

Thursday, November 30, 2006

Sheet

12 38

1

Rev

0A

of