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5
4
3
2
1
MSI
D D
CPU:
MS-7329 Ver:1.0
AMD 940 Athlon 64/Athlon 64 FX
System Chipset:
NVIDIA C51PV / C51PVG
NVIDIA MCP51 / MCP51G
On Board Chipset:
LPC Super I/O -- W83627EHF / DHF
LAN -- RTL8201CL
IEEE1394 - VT6307 / VT6308
AC97 Codec --ALC883
BIOS --LPC FLASH ROM 4M
C C
Main Memory:
DDR * 4 (Max 4GB)
Expansion Slots:
PCI-E X1 *1
PCI-E X 16 *1
PCI 2.2 Slot * 2
Title Page
Cover Sheet 1
Block Diagram
AMD AM2 940
System Memory
DDR Terminations
2
3,4,5
6,7
8
C51PV 9-11
MCP51 12-15
PCI Slot 1,2
PCI-E X16 , X1 Slot
LPC -W83627EHF / FDD / BIOS
LAN VSC8201
Azalia CODEC & Interanl SPK
1394 Controller-VT6307
USB connectors
MS-6 ACPI Controller & MS-6+
PWM - ISL6566CR
IDE &FDD & FAN
ATX Connector / Front Panel
16
17
18
19
20
21
22
23
24
25
26
27KB/MS/LPT/COM/TPM/EMI
PWM:
Controller--Intersil ISL6566CR 3 Phase
B B
TV-OUT/Component Video Out
VGA / DVI
MANUAL PARTS
GPIO SPEC
POWER OK MAP
POWER MAP
RESET MAP
History
28
29
30
31
32
33
34
35
HDMI 36-37
HDMI Codec. / XPC Audio Connector
38
A A
Micro Star Restricted Secret
Micro Star Restricted Secret
Micro Star Restricted Secret
Title
Title
Title
Document Number
Document Number
Document Number
MICRO-STAR INT'L CO.,LTD.
MICRO-STAR INT'L CO.,LTD.
MICRO-STAR INT'L CO.,LTD.
No. 69, Li-De St, Jung-He City,
No. 69, Li-De St, Jung-He City,
No. 69, Li-De St, Jung-He City,
Taipei Hsien, Taiwan
Taipei Hsien, Taiwan
Taipei Hsien, Taiwan
http://www.msi.com.tw
http://www.msi.com.tw
5
4
3
2
http://www.msi.com.tw
Cover Sheet
Cover Sheet
Cover Sheet
MS-9650
MS-9650
MS-9650
1
Last Revision Date:
Last Revision Date:
Last Revision Date:
Friday, November 03, 2006
Friday, November 03, 2006
Friday, November 03, 2006
Sheet
Sheet
Sheet
Rev
Rev
Rev
0A
0A
0A
139
139
139
of
of
of
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5
4
3
2
1
BLOCK DIAGRAM
D D
C C
PRIMARY IDE
SECONDARY IDE
X4 - SATA CONN
FLOPPY CONN
B B
POWER
SUPPLY
CONNECTOR
PEX X16, PEX X1
ATA 133
INTEGRATED SATA 1/2
SIO
LPC SUPER I/O
47M997
VREG
PCI EXPRESS
LPC BUS 33MHZ
LPC HDR
SOCKET AM2
NFORCE
CRUSH 51
468 BGA
NFORCE
MCP 51
508 BGA
HT 16X16 1GHZ
HT 8X8 1GHZ
AZAILIA/AC97
X8 USB2
VGA CONN / TV-OUT CONN
Slicon Image 1930 HDMI
PCI 33MHZ
Realtek ALC 883 (Azalia, 7.1Channel)
BACK PANEL CONN
USB2 PORTS 0-1
DOUBLE STACK
USB2 PORTS 2-3
X2/GBIT LAN
FRONT PANEL HDR
USB2 PORTS 4-5
USB2 PORTS 6-7
DDRII SDRAM CONN 0
DDRII SDRAM CONN 2
DDRII SDRAM CONN 1
DDRII SDRAM CONN3
1394-VT6308
PCI SLOT 1
PCI SLOT 2 HEADER
4MB FLASH
A A
5
4
3
VITESSE VSC8601 Giga PHY
Micro Star Restricted Secret
Micro Star Restricted Secret
Micro Star Restricted Secret
Title
Title
Title
Document Number
Document Number
Document Number
MICRO-STAR INT'L CO.,LTD.
MICRO-STAR INT'L CO.,LTD.
MICRO-STAR INT'L CO.,LTD.
No. 69, Li-De St, Jung-He City,
No. 69, Li-De St, Jung-He City,
No. 69, Li-De St, Jung-He City,
Taipei Hsien, Taiwan
Taipei Hsien, Taiwan
Taipei Hsien, Taiwan
http://www.msi.com.tw
http://www.msi.com.tw
2
http://www.msi.com.tw
Block Diagram
Block Diagram
Block Diagram
MS-7252CH
MS-7252CH
MS-7252CH
Last Revision Date:
Last Revision Date:
Last Revision Date:
Sheet
Sheet
Sheet
1
Friday, November 03, 2006
Friday, November 03, 2006
Friday, November 03, 2006
2
2
2
Rev
Rev
Rev
0A
0A
0A
39
39
39
of
of
of
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5
4
3
2
1
VDDA_25 VDDA25
L1 80L3_100_0805L1 80L3_100_0805
2 1
CPU1A
CPU1A
HYPERTRANSPORT
L0_CLKIN_H(1)
L0_CLKIN_L(1)
L0_CLKIN_H(0)
L0_CLKIN_L(0)
L0_CTLIN_H(1)
L0_CTLIN_L(1)
L0_CTLIN_H(0)
L0_CTLIN_L(0)
L0_CADIN_H(15)
L0_CADIN_L(15)
L0_CADIN_H(14)
L0_CADIN_L(14)
L0_CADIN_H(13)
L0_CADIN_L(13)
L0_CADIN_H(12)
L0_CADIN_L(12)
L0_CADIN_H(11)
L0_CADIN_L(11)
L0_CADIN_H(10)
L0_CADIN_L(10)
L0_CADIN_H(9)
L0_CADIN_L(9)
L0_CADIN_H(8)
L0_CADIN_L(8)
L0_CADIN_H(7)
L0_CADIN_L(7)
L0_CADIN_H(6)
L0_CADIN_L(6)
L0_CADIN_H(5)
L0_CADIN_L(5)
L0_CADIN_H(4)
L0_CADIN_L(4)
L0_CADIN_H(3)
L0_CADIN_L(3)
L0_CADIN_H(2)
L0_CADIN_L(2)
L0_CADIN_H(1)
L0_CADIN_L(1)
L0_CADIN_H(0)
L0_CADIN_L(0)
HYPERTRANSPORT
L0_CLKOUT_H(1)
L0_CLKOUT_L(1)
L0_CLKOUT_H(0)
L0_CLKOUT_L(0)
L0_CTLOUT_H(1)
L0_CTLOUT_L(1)
L0_CTLOUT_H(0)
L0_CTLOUT_L(0)
L0_CADOUT_H(15)
L0_CADOUT_L(15)
L0_CADOUT_H(14)
L0_CADOUT_L(14)
L0_CADOUT_H(13)
L0_CADOUT_L(13)
L0_CADOUT_H(12)
L0_CADOUT_L(12)
L0_CADOUT_H(11)
L0_CADOUT_L(11)
L0_CADOUT_H(10)
L0_CADOUT_L(10)
L0_CADOUT_H(9)
L0_CADOUT_L(9)
L0_CADOUT_H(8)
L0_CADOUT_L(8)
L0_CADOUT_H(7)
L0_CADOUT_L(7)
L0_CADOUT_H(6)
L0_CADOUT_L(6)
L0_CADOUT_H(5)
L0_CADOUT_L(5)
L0_CADOUT_H(4)
L0_CADOUT_L(4)
L0_CADOUT_H(3)
L0_CADOUT_L(3)
L0_CADOUT_H(2)
L0_CADOUT_L(2)
L0_CADOUT_H(1)
L0_CADOUT_L(1)
L0_CADOUT_H(0)
L0_CADOUT_L(0)
AD5
AD4
AD1
AC1
Y6
W6
W2
W3
Y5
Y4
AB6
AA6
AB5
AB4
AD6
AC6
AF6
AE6
AF5
AF4
AH6
AG6
AH5
AH4
Y1
W1
AA2
AA3
AB1
AA1
AC2
AC3
AE2
AE3
AF1
AE1
AG2
AG3
AH1
AG1
HT_CLKOUT_H1 9
HT_CLKOUT_L1 9
HT_CLKOUT_H0 9
HT_CLKOUT_L0 9
HT_CTLOUT_H0 9
HT_CTLOUT_L0 9
HT_CADOUT_H15
HT_CADOUT_L15
HT_CADOUT_H14
HT_CADOUT_L14
HT_CADOUT_H13
HT_CADOUT_L13
HT_CADOUT_H12
HT_CADOUT_L12
HT_CADOUT_H11
HT_CADOUT_L11
HT_CADOUT_H10
HT_CADOUT_L10
HT_CADOUT_H9
HT_CADOUT_L9
HT_CADOUT_H8
HT_CADOUT_L8
HT_CADOUT_H7
HT_CADOUT_L7
HT_CADOUT_H6
HT_CADOUT_L6
HT_CADOUT_H5
HT_CADOUT_L5
HT_CADOUT_H4
HT_CADOUT_L4
HT_CADOUT_H3
HT_CADOUT_L3
HT_CADOUT_H2
HT_CADOUT_L2
HT_CADOUT_H1
HT_CADOUT_L1
HT_CADOUT_H0
HT_CADOUT_L0
TP15TP15
TP14TP14
CPU_CLK9
CPU_CLK#9
C66 C3900P50XC66 C3900P50X
R68
R68
_169R1%-1
_169R1%-1
C65 C3900P50XC65 C3900P50X
C38
C38
X_C1000P50X0402
X_C1000P50X0402
CPU_SIC18
VCC_DDR
R104
R104
39.2R1%
39.2R1%
R103
R103
39.2R1%
39.2R1%
CPU_M_VREF
CPU_STRAP_HI_E11
CPU_STRAP_LO_F11
R56 300RR56 300R
R53 300RR53 300R
TP3TP3
TP4TP4
D D
VCC1_2HT
C C
HT_CLKIN_H19
HT_CLKIN_L19
HT_CLKIN_H09
HT_CLKIN_L09
R107 51R1%0402-LFR107 51R1%0402-LF
R106 51R1%0402-LFR106 51R1%0402-LF
HT_CTLIN_H09
HT_CTLIN_L09
HT_CADIN_H15
HT_CADIN_L15
HT_CADIN_H14
HT_CADIN_L14
HT_CADIN_H13
HT_CADIN_L13
HT_CADIN_H12
HT_CADIN_L12
HT_CADIN_H11
HT_CADIN_L11
HT_CADIN_H10
HT_CADIN_L10
HT_CADIN_H9
HT_CADIN_L9
HT_CADIN_H8
HT_CADIN_L8
HT_CADIN_H7
HT_CADIN_L7
HT_CADIN_H6
HT_CADIN_L6
HT_CADIN_H5
HT_CADIN_L5
HT_CADIN_H4
HT_CADIN_L4
HT_CADIN_H3
HT_CADIN_L3
HT_CADIN_H2
HT_CADIN_L2
HT_CADIN_H1
HT_CADIN_L1
HT_CADIN_H0
HT_CADIN_L0
N6
P6
N3
N2
V4
V5
U1
V1
U6
V6
T4
T5
R6
T6
P4
P5
M4
M5
L6
M6
K4
K5
J6
K6
U3
U2
R1
T1
R3
R2
N1
P1
L1
M1
L3
L2
J1
K1
J3
J2
CPU_SID18
C4.7U16Y1206
C4.7U16Y1206
VCC_DDR
TP26TP26
TP27TP27
TP28TP28
TP30TP30
TP24TP24
COREFB+24
COREFB-24
TP8TP8
TP10TP10
TP11TP11
TP7TP7
TP17TP17
C57
C57
C0.22U16X
C0.22U16X
LDT_RST_L
TP13TP13
TP2TP2
TP1TP1
VCC1_2HT
C221
C213
C213
C166
C165
C165
C4.7U10Y0805
C4.7U10Y0805
X_C4.7U10Y0805
X_C4.7U10Y0805
B B
HT_CADIN_H[15..0]9
HT_CADIN_L[15..0]9
HT_CADOUT_H[15..0]9
HT_CADOUT_L[15..0]9
C166
X_C4.7U10Y0805
X_C4.7U10Y0805
C0.22U16X
C0.22U16X
HT_CADIN_H[15..0]
HT_CADIN_L[15..0]
HT_CADOUT_H[15..0]
HT_CADOUT_L[15..0]
C183
C183
X_C0.22U16X
X_C0.22U16X
C221
X_C10P25N0402/0.25
X_C10P25N0402/0.25
VCC_DDR
CPU_PRESENT_L
CPU_TEST25_H
CPU_TEST25_L
A A
_15R1%0805-1
_15R1%0805-1
VCC_DDR
R109 1KR0402R109 1KR0402
R65 510RR65 510R
R67 510RR67 510R
R62
R62
_15R1%0805-1
_15R1%0805-1
R63
R63
C0.1U16Y0402
C0.1U16Y0402
5
CPU_M_VREF
C75
C75
C70
C70
C1000P50X0402
C1000P50X0402
C188
C219
C219
X_C10P25N0402/0.25
X_C10P25N0402/0.25
HDT_LDT_RST#
TP31TP31
Modify CPU_THRIP level shifter circuit
CPU_THRIP_L
R979 1KR979 1K
4
C188
AMD RECOMMAND
VCC3
R585
R585
X_300R
X_300R
Q60
Q60
X_N-2N7002_SOT23
X_N-2N7002_SOT23
VCC3
R977
R977
4.7K
4.7K
R980 1KR980 1K
Q67
Q67
N-MMBT3904_SOT23
N-MMBT3904_SOT23
VDDA25
LDT_RST_L
R978
R978
4.7K
4.7K
CPU_THRIP#
Q66
Q66
N-MMBT3904_SOT23
N-MMBT3904_SOT23
CPU_THRIP# 12
SM_THERMDC18,25
SM_THERMDA18,25
HT_STOP#9
LDT_RST9
CPU_PWRGD9
3
VDDA25
C73
C73
C69
C69
C3300P50X
C3300P50X
CPUCLKIN
CPUCLKIN#
CPU_PWRGD_L
HT_STOP_L
CPU_PRESENT_L
CPU_SIC
R94 300R1%R94 300R1%
R102 300R1%R102 300R1%
CPU_SID
CPU_TDI
CPU_TRST_L
CPU_TCK
CPU_TMS
CPU_DBREQ_L
COREFB+
COREFB-
CPU_VTT_SENSE
CPU_TEST25_H
CPU_TEST25_L
HT_STOP#
PWM_EN13,23,24
LDT_RST
CPU_PWRGD
C952
C952
0.1u
0.1u
C10
D10
A8
B8
C9
D8
C7
AL3
AL6
AK6
AL10
AJ10
AH10
AL9
A5
G2
G1
E12
F12
AH11
AJ11
A10
B10
F10
E9
AJ7
F6
D6
E7
F8
C5
AH9
E5
AJ5
AG9
AG8
AH7
AJ6
VCC_DDR
CPU1D
CPU1D
MISC
MISC
VDDA1
VDDA2
CLKIN_H
CLKIN_L
PWROK
LDTSTOP_L
RESET_L
CPU_PRESENT_L
THERMTRIP_L
SIC
SID
TDI
TRST_L
TCK
TMS
DBREQ_L
VDD_FB_H
VDD_FB_L
VTT_SENSE
M_VREF
M_ZN
M_ZP
TEST25_H
TEST25_L
TEST19
TEST18
TEST13
TEST9
TEST17
TEST16
TEST15
TEST14
TEST12
TEST7
TEST6
TEST5
TEST4
TEST3
TEST2
1
2
4
5
9
10
12
13
VID(5)
VID(4)
VID(3)
VID(2)
VID(1)
VID(0)
PROCHOT_L
TDO
DBRDY
VDDIO_FB_H
VDDIO_FB_L
PSI_L
HTREF1
HTREF0
TEST29_H
TEST29_L
TEST24
TEST23
TEST22
TEST21
TEST20
TEST28_H
TEST28_L
TEST27
TEST26
TEST10
TEST8
147
74LVC08
74LVC08
147
74LVC08
74LVC08
147
147
2
U909A
U909A
3
U909B
U909B
6
U909C
U909C
8
74LVC08
74LVC08
U909D
U909D
11
74LVC08
74LVC08
D2
D1
C1
E3
E2
E1
AK7
AL7
AK10
B6
AK11
AL11
F1
V8
V7
C11
D11
AK8
AH8
AJ9
AL8
AJ8
J10
H9
AK9
AK5
G7
D4
TP9TP9
VID4
VID3
VID2
VID1
VID0
CPU_THRIP_L
CPU_TDO
CPU_DBRDY
VDDIO_FB_H
CPU_PSI_L
R101 300RR101 300R
HT_STOP_L
LDT_RST_L
CPU_PWRGD_L
VCC_DDR
R95 300RR95 300R
TP25TP25
TP29TP29
VDDIO_FB_H 23
TP12TP12
R61 80.6R1%R61 80.6R1%
TP20TP20
TP18TP18
TP19TP19
TP16TP16
VCC_DDR
R19
R19
300R
300R
VCC_DDR
C163
C163
C1000P50X0402
C1000P50X0402
R96
R96
300R
300R
VDDA25
VCC_DDR
LDT_RST_L
CPU_PWRGD_L
CPU_THRIP_L
HT_STOP_L
Title
Title
Title
ATHLON64 HT I/F CTRL & DEBUG
ATHLON64 HT I/F CTRL & DEBUG
ATHLON64 HT I/F CTRL & DEBUG
Document Number
Document Number
Document Number
MICRO-STAR INT'L CO.,LTD.
MICRO-STAR INT'L CO.,LTD.
MICRO-STAR INT'L CO.,LTD.
No. 69, Li-De St, Jung-He City,
No. 69, Li-De St, Jung-He City,
No. 69, Li-De St, Jung-He City,
Taipei Hsien, Taiwan
Taipei Hsien, Taiwan
Taipei Hsien, Taiwan
http://www.msi.com.tw
http://www.msi.com.tw
http://www.msi.com.tw
VID[0..4] 18,24
C164
C164
C1000P50X0402
C1000P50X0402
R99 44.2R1%R99 44.2R1%
R100 44.2R1%R100 44.2R1%
VCC1_2HT
HT Bus Level shift
RN8
RN8
2
4
6
8
RN48
RN48
2
4
6
8
RN2
RN2
1
3
5
7
MS-7252CH
MS-7252CH
MS-7252CH
Last Revision Date:
Last Revision Date:
Last Revision Date:
Sheet
Sheet
Sheet
1
LDT_RST
CPU_PWRGD
HT_STOP#
8P4R-1KR
8P4R-1KR
HT_STOP_L
CPU_THRIP_L
CPU_PWRGD_L
LDT_RST_L
8P4R-300R
8P4R-300R
LDT_RST
CPU_PWRGD
CPU_THRIP#
HT_STOP#
Friday, November 03, 2006
Friday, November 03, 2006
Friday, November 03, 2006
1
3
5
7
1
3
5
7
2
4
6
8
X_8P4R-0R
X_8P4R-0R
Micro Star Restricted Secret
Micro Star Restricted Secret
Micro Star Restricted Secret
Rev
Rev
Rev
0A
0A
0A
of
of
of
339
339
339
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5
4
3
2
1
MEM_MA_DQS_L[7..0]6,7
MEM_MA_DQS_H[7..0]6,7
MEM_MA_DM[7..0]6,7
D D
CPU1B
CPU1B
MEMORY INTERFACE A
MEM_MA0_CLK_H26,8
MEM_MA0_CLK_L26,8
MEM_MA0_CLK_H16,8
MEM_MA0_CLK_L16,8
MEM_MA0_CLK_H06,8
MEM_MA0_CLK_L06,8
MEM_MA0_CS_L16,8
MEM_MA0_CS_L06,8
MEM_MA0_ODT06,8
MEM_MA1_CLK_H27,8
MEM_MA1_CLK_L27,8
MEM_MA1_CLK_H17,8
MEM_MA1_CLK_L17,8
MEM_MA1_CLK_H07,8
MEM_MA1_CLK_L07,8
MEM_MA1_CS_L17,8
MEM_MA1_CS_L07,8
MEM_MA1_ODT07,8
C C
MEM_MA_ADD[15..0]6,7,8
B B
MEM_MA_CAS_L6,7,8
MEM_MA_WE_L6,7,8
MEM_MA_RAS_L6,7,8
MEM_MA_BANK26,7,8
MEM_MA_BANK16,7,8
MEM_MA_BANK06,7,8
MEM_MA_CKE17,8
MEM_MA_CKE06,8
MEM_MA0_CLK_H2
MEM_MA0_CLK_L2
MEM_MA0_CLK_H1
MEM_MA0_CLK_L1
MEM_MA0_CLK_H0
MEM_MA0_CLK_L0
MEM_MA0_CS_L1
MEM_MA0_CS_L0
MEM_MA0_ODT0
MEM_MA1_CLK_H2
MEM_MA1_CLK_L2
MEM_MA1_CLK_H1
MEM_MA1_CLK_L1
MEM_MA1_CLK_H0
MEM_MA1_CLK_L0
MEM_MA1_CS_L1
MEM_MA1_CS_L0
MEM_MA1_ODT0
MEM_MA_CAS_L
MEM_MA_WE_L
MEM_MA_RAS_L
MEM_MA_BANK2
MEM_MA_BANK1
MEM_MA_BANK0
MEM_MA_CKE1
MEM_MA_CKE0
MEM_MA_ADD15
MEM_MA_ADD14
MEM_MA_ADD13
MEM_MA_ADD12
MEM_MA_ADD11
MEM_MA_ADD10
MEM_MA_ADD9
MEM_MA_ADD8
MEM_MA_ADD7
MEM_MA_ADD6
MEM_MA_ADD5
MEM_MA_ADD4
MEM_MA_ADD3
MEM_MA_ADD2
MEM_MA_ADD1
MEM_MA_ADD0
MEM_MA_DQS_H7
MEM_MA_DQS_L7
MEM_MA_DQS_H6
MEM_MA_DQS_L6
MEM_MA_DQS_H5
MEM_MA_DQS_L5
MEM_MA_DQS_H4
MEM_MA_DQS_L4
MEM_MA_DQS_H3
MEM_MA_DQS_L3
MEM_MA_DQS_H2
MEM_MA_DQS_L2
MEM_MA_DQS_H1
MEM_MA_DQS_L1
MEM_MA_DQS_H0
MEM_MA_DQS_L0
MEM_MA_DM7
MEM_MA_DM6
MEM_MA_DM5
MEM_MA_DM4
MEM_MA_DM3
MEM_MA_DM2
MEM_MA_DM1
MEM_MA_DM0
AG21
AG20
G19
H19
U27
U26
AC25
AA24
AC28
AE20
AE19
G20
G21
V27
W27
AD27
AA25
AC27
AB25
AB27
AA26
N25
Y27
AA27
M25
M27
N24
AC26
N26
P25
Y25
N27
R24
P27
R25
R26
R27
U25
W24
AD15
AE15
AG18
AG19
AG24
AG25
AG27
AG28
D29
C29
C25
D25
E19
G15
AF15
AF19
AJ25
AH29
B29
E24
E18
H15
L27
T25
T27
F19
F15
MEMORY INTERFACE A
MA0_CLK_H(2)
MA0_CLK_L(2)
MA0_CLK_H(1)
MA0_CLK_L(1)
MA0_CLK_H(0)
MA0_CLK_L(0)
MA0_CS_L(1)
MA0_CS_L(0)
MA0_ODT(0)
MA1_CLK_H(2)
MA1_CLK_L(2)
MA1_CLK_H(1)
MA1_CLK_L(1)
MA1_CLK_H(0)
MA1_CLK_L(0)
MA1_CS_L(1)
MA1_CS_L(0)
MA1_ODT(0)
MA_CAS_L
MA_WE_L
MA_RAS_L
MA_BANK(2)
MA_BANK(1)
MA_BANK(0)
MA_CKE(1)
MA_CKE(0)
MA_ADD(15)
MA_ADD(14)
MA_ADD(13)
MA_ADD(12)
MA_ADD(11)
MA_ADD(10)
MA_ADD(9)
MA_ADD(8)
MA_ADD(7)
MA_ADD(6)
MA_ADD(5)
MA_ADD(4)
MA_ADD(3)
MA_ADD(2)
MA_ADD(1)
MA_ADD(0)
MA_DQS_H(7)
MA_DQS_L(7)
MA_DQS_H(6)
MA_DQS_L(6)
MA_DQS_H(5)
MA_DQS_L(5)
MA_DQS_H(4)
MA_DQS_L(4)
MA_DQS_H(3)
MA_DQS_L(3)
MA_DQS_H(2)
MA_DQS_L(2)
MA_DQS_H(1)
MA_DQS_L(1)
MA_DQS_H(0)
MA_DQS_L(0)
MA_DM(7)
MA_DM(6)
MA_DM(5)
MA_DM(4)
MA_DM(3)
MA_DM(2)
MA_DM(1)
MA_DM(0)
MA_DATA(63)
MA_DATA(62)
MA_DATA(61)
MA_DATA(60)
MA_DATA(59)
MA_DATA(58)
MA_DATA(57)
MA_DATA(56)
MA_DATA(55)
MA_DATA(54)
MA_DATA(53)
MA_DATA(52)
MA_DATA(51)
MA_DATA(50)
MA_DATA(49)
MA_DATA(48)
MA_DATA(47)
MA_DATA(46)
MA_DATA(45)
MA_DATA(44)
MA_DATA(43)
MA_DATA(42)
MA_DATA(41)
MA_DATA(40)
MA_DATA(39)
MA_DATA(38)
MA_DATA(37)
MA_DATA(36)
MA_DATA(35)
MA_DATA(34)
MA_DATA(33)
MA_DATA(32)
MA_DATA(31)
MA_DATA(30)
MA_DATA(29)
MA_DATA(28)
MA_DATA(27)
MA_DATA(26)
MA_DATA(25)
MA_DATA(24)
MA_DATA(23)
MA_DATA(22)
MA_DATA(21)
MA_DATA(20)
MA_DATA(19)
MA_DATA(18)
MA_DATA(17)
MA_DATA(16)
MA_DATA(15)
MA_DATA(14)
MA_DATA(13)
MA_DATA(12)
MA_DATA(11)
MA_DATA(10)
MA_DATA(9)
MA_DATA(8)
MA_DATA(7)
MA_DATA(6)
MA_DATA(5)
MA_DATA(4)
MA_DATA(3)
MA_DATA(2)
MA_DATA(1)
MA_DATA(0)
MA_DQS_H(8)
MA_DQS_L(8)
MA_DM(8)
MA_CHECK(7)
MA_CHECK(6)
MA_CHECK(5)
MA_CHECK(4)
MA_CHECK(3)
MA_CHECK(2)
MA_CHECK(1)
MA_CHECK(0)
MEM_MA_DATA63
AE14
MEM_MA_DATA62
AG14
MEM_MA_DATA61
AG16
MEM_MA_DATA60
AD17
MEM_MA_DATA59
AD13
MEM_MA_DATA58
AE13
MEM_MA_DATA57
AG15
MEM_MA_DATA56
AE16
MEM_MA_DATA55
AG17
MEM_MA_DATA54
AE18
MEM_MA_DATA53
AD21
MEM_MA_DATA52
AG22
MEM_MA_DATA51
AE17
MEM_MA_DATA50
AF17
MEM_MA_DATA49
AF21
MEM_MA_DATA48
AE21
MEM_MA_DATA47
AF23
MEM_MA_DATA46
AE23
MEM_MA_DATA45
AJ26
MEM_MA_DATA44
AG26
MEM_MA_DATA43
AE22
MEM_MA_DATA42
AG23
MEM_MA_DATA41
AH25
MEM_MA_DATA40
AF25
MEM_MA_DATA39
AJ28
MEM_MA_DATA38
AJ29
MEM_MA_DATA37
AF29
MEM_MA_DATA36
AE26
MEM_MA_DATA35
AJ27
MEM_MA_DATA34
AH27
MEM_MA_DATA33
AG29
MEM_MA_DATA32
AF27
MEM_MA_DATA31
E29
MEM_MA_DATA30
E28
MEM_MA_DATA29
D27
MEM_MA_DATA28
C27
MEM_MA_DATA27
G26
MEM_MA_DATA26
F27
MEM_MA_DATA25
C28
MEM_MA_DATA24
E27
MEM_MA_DATA23
F25
MEM_MA_DATA22
E25
MEM_MA_DATA21
E23
MEM_MA_DATA20
D23
MEM_MA_DATA19
E26
MEM_MA_DATA18
C26
MEM_MA_DATA17
G23
MEM_MA_DATA16
F23
MEM_MA_DATA15
E22
MEM_MA_DATA14
E21
MEM_MA_DATA13
F17
MEM_MA_DATA12
G17
MEM_MA_DATA11
G22
MEM_MA_DATA10
F21
MEM_MA_DATA9
G18
MEM_MA_DATA8
E17
MEM_MA_DATA7
G16
MEM_MA_DATA6
E15
MEM_MA_DATA5
G13
MEM_MA_DATA4
H13
MEM_MA_DATA3
H17
MEM_MA_DATA2
E16
MEM_MA_DATA1
E14
MEM_MA_DATA0
G14
J28
J27
J25
K25
J26
G28
G27
L24
K27
H29
H27
MEM_MA_DATA[63..0] 6,7
MEM_MB_ADD[15..0]6,7,8
MEM_MB_DQS_L[7..0]6,7
MEM_MB_DQS_H[7..0]6,7
MEM_MB_DM[7..0]6,7
CPU1C
CPU1C
MEMORY INTERFACE B
MEM_MB0_CLK_H26,8
MEM_MB0_CLK_L26,8
MEM_MB0_CLK_H16,8
MEM_MB0_CLK_L16,8
MEM_MB0_CLK_H06,8
MEM_MB0_CLK_L06,8
MEM_MB0_CS_L16,8
MEM_MB0_CS_L06,8
MEM_MB0_ODT06,8
MEM_MB1_CLK_H27,8
MEM_MB1_CLK_L27,8
MEM_MB1_CLK_H17,8
MEM_MB1_CLK_L17,8
MEM_MB1_CLK_H07,8
MEM_MB1_CLK_L07,8
MEM_MB1_CS_L17,8
MEM_MB1_CS_L07,8
MEM_MB1_ODT07,8
MEM_MB_CAS_L6,7,8
MEM_MB_WE_L6,7,8
MEM_MB_RAS_L6,7,8
MEM_MB_BANK26,7,8
MEM_MB_BANK16,7,8
MEM_MB_BANK06,7,8
MEM_MB_CKE17,8
MEM_MB_CKE06,8
MEM_MB0_CLK_H2
MEM_MB0_CLK_L2
MEM_MB0_CLK_H1
MEM_MB0_CLK_L1
MEM_MB0_CLK_H0
MEM_MB0_CLK_L0
MEM_MB0_CS_L1
MEM_MB0_CS_L0
MEM_MB0_ODT0
MEM_MB1_CLK_H2
MEM_MB1_CLK_L2
MEM_MB1_CLK_H1
MEM_MB1_CLK_L1
MEM_MB1_CLK_H0
MEM_MB1_CLK_L0
MEM_MB1_CS_L1
MEM_MB1_CS_L0
MEM_MB1_ODT0
MEM_MB_CAS_L
MEM_MB_WE_L
MEM_MB_RAS_L
MEM_MB_BANK2
MEM_MB_BANK1
MEM_MB_BANK0
MEM_MB_CKE1
MEM_MB_CKE0
MEM_MB_ADD15
MEM_MB_ADD14
MEM_MB_ADD13
MEM_MB_ADD12
MEM_MB_ADD11
MEM_MB_ADD10
MEM_MB_ADD9
MEM_MB_ADD8
MEM_MB_ADD7
MEM_MB_ADD6
MEM_MB_ADD5
MEM_MB_ADD4
MEM_MB_ADD3
MEM_MB_ADD2
MEM_MB_ADD1
MEM_MB_ADD0
MEM_MB_DQS_H7
MEM_MB_DQS_L7
MEM_MB_DQS_H6
MEM_MB_DQS_L6
MEM_MB_DQS_H5
MEM_MB_DQS_L5
MEM_MB_DQS_H4
MEM_MB_DQS_L4
MEM_MB_DQS_H3
MEM_MB_DQS_L3
MEM_MB_DQS_H2
MEM_MB_DQS_L2
MEM_MB_DQS_H1
MEM_MB_DQS_L1
MEM_MB_DQS_H0
MEM_MB_DQS_L0
MEM_MB_DM7
MEM_MB_DM6
MEM_MB_DM5
MEM_MB_DM4
MEM_MB_DM3
MEM_MB_DM2
MEM_MB_DM1
MEM_MB_DM0
AJ19
AK19
AE30
AC31
AD29
AL19
AL18
W29
W28
AE29
AB31
AD31
AC29
AC30
AB29
AA31
AA28
M31
M29
AE31
AA29
AA30
AK13
AJ13
AK17
AJ17
AK23
AL23
AL28
AL29
AJ14
AH17
AJ23
AK29
A18
A19
U31
U30
C19
D19
N31
N28
N29
N30
P29
P31
R29
R28
R31
R30
T31
T29
U29
U28
D31
C31
C24
C23
D17
C17
C14
C13
C30
A23
B17
B13
MEMORY INTERFACE B
MB0_CLK_H(2)
MB0_CLK_L(2)
MB0_CLK_H(1)
MB0_CLK_L(1)
MB0_CLK_H(0)
MB0_CLK_L(0)
MB0_CS_L(1)
MB0_CS_L(0)
MB0_ODT(0)
MB1_CLK_H(2)
MB1_CLK_L(2)
MB1_CLK_H(1)
MB1_CLK_L(1)
MB1_CLK_H(0)
MB1_CLK_L(0)
MB1_CS_L(1)
MB1_CS_L(0)
MB1_ODT(0)
MB_CAS_L
MB_WE_L
MB_RAS_L
MB_BANK(2)
MB_BANK(1)
MB_BANK(0)
MB_CKE(1)
MB_CKE(0)
MB_ADD(15)
MB_ADD(14)
MB_ADD(13)
MB_ADD(12)
MB_ADD(11)
MB_ADD(10)
MB_ADD(9)
MB_ADD(8)
MB_ADD(7)
MB_ADD(6)
MB_ADD(5)
MB_ADD(4)
MB_ADD(3)
MB_ADD(2)
MB_ADD(1)
MB_ADD(0)
MB_DQS_H(7)
MB_DQS_L(7)
MB_DQS_H(6)
MB_DQS_L(6)
MB_DQS_H(5)
MB_DQS_L(5)
MB_DQS_H(4)
MB_DQS_L(4)
MB_DQS_H(3)
MB_DQS_L(3)
MB_DQS_H(2)
MB_DQS_L(2)
MB_DQS_H(1)
MB_DQS_L(1)
MB_DQS_H(0)
MB_DQS_L(0)
MB_DM(7)
MB_DM(6)
MB_DM(5)
MB_DM(4)
MB_DM(3)
MB_DM(2)
MB_DM(1)
MB_DM(0)
MB_DATA(63)
MB_DATA(62)
MB_DATA(61)
MB_DATA(60)
MB_DATA(59)
MB_DATA(58)
MB_DATA(57)
MB_DATA(56)
MB_DATA(55)
MB_DATA(54)
MB_DATA(53)
MB_DATA(52)
MB_DATA(51)
MB_DATA(50)
MB_DATA(49)
MB_DATA(48)
MB_DATA(47)
MB_DATA(46)
MB_DATA(45)
MB_DATA(44)
MB_DATA(43)
MB_DATA(42)
MB_DATA(41)
MB_DATA(40)
MB_DATA(39)
MB_DATA(38)
MB_DATA(37)
MB_DATA(36)
MB_DATA(35)
MB_DATA(34)
MB_DATA(33)
MB_DATA(32)
MB_DATA(31)
MB_DATA(30)
MB_DATA(29)
MB_DATA(28)
MB_DATA(27)
MB_DATA(26)
MB_DATA(25)
MB_DATA(24)
MB_DATA(23)
MB_DATA(22)
MB_DATA(21)
MB_DATA(20)
MB_DATA(19)
MB_DATA(18)
MB_DATA(17)
MB_DATA(16)
MB_DATA(15)
MB_DATA(14)
MB_DATA(13)
MB_DATA(12)
MB_DATA(11)
MB_DATA(10)
MB_DATA(9)
MB_DATA(8)
MB_DATA(7)
MB_DATA(6)
MB_DATA(5)
MB_DATA(4)
MB_DATA(3)
MB_DATA(2)
MB_DATA(1)
MB_DATA(0)
MB_DQS_H(8)
MB_DQS_L(8)
MB_DM(8)
MB_CHECK(7)
MB_CHECK(6)
MB_CHECK(5)
MB_CHECK(4)
MB_CHECK(3)
MB_CHECK(2)
MB_CHECK(1)
MB_CHECK(0)
AH13
AL13
AL15
AJ15
AF13
AG13
AL14
AK15
AL16
AL17
AK21
AL21
AH15
AJ16
AH19
AL20
AJ22
AL22
AL24
AK25
AJ21
AH21
AH23
AJ24
AL27
AK27
AH31
AG30
AL25
AL26
AJ30
AJ31
E31
E30
B27
A27
F29
F31
A29
A28
A25
A24
C22
D21
A26
B25
B23
A22
B21
A20
C16
D15
C21
A21
A17
A16
B15
A14
E13
F13
C15
A15
A13
D13
J31
J30
J29
K29
K31
G30
G29
L29
L28
H31
G31
MEM_MB_DATA63
MEM_MB_DATA62
MEM_MB_DATA61
MEM_MB_DATA60
MEM_MB_DATA59
MEM_MB_DATA58
MEM_MB_DATA57
MEM_MB_DATA56
MEM_MB_DATA55
MEM_MB_DATA54
MEM_MB_DATA53
MEM_MB_DATA52
MEM_MB_DATA51
MEM_MB_DATA50
MEM_MB_DATA49
MEM_MB_DATA48
MEM_MB_DATA47
MEM_MB_DATA46
MEM_MB_DATA45
MEM_MB_DATA44
MEM_MB_DATA43
MEM_MB_DATA42
MEM_MB_DATA41
MEM_MB_DATA40
MEM_MB_DATA39
MEM_MB_DATA38
MEM_MB_DATA37
MEM_MB_DATA36
MEM_MB_DATA35
MEM_MB_DATA34
MEM_MB_DATA33
MEM_MB_DATA32
MEM_MB_DATA31
MEM_MB_DATA30
MEM_MB_DATA29
MEM_MB_DATA28
MEM_MB_DATA27
MEM_MB_DATA26
MEM_MB_DATA25
MEM_MB_DATA24
MEM_MB_DATA23
MEM_MB_DATA22
MEM_MB_DATA21
MEM_MB_DATA20
MEM_MB_DATA19
MEM_MB_DATA18
MEM_MB_DATA17
MEM_MB_DATA16
MEM_MB_DATA15
MEM_MB_DATA14
MEM_MB_DATA13
MEM_MB_DATA12
MEM_MB_DATA11
MEM_MB_DATA10
MEM_MB_DATA9
MEM_MB_DATA8
MEM_MB_DATA7
MEM_MB_DATA6
MEM_MB_DATA5
MEM_MB_DATA4
MEM_MB_DATA3
MEM_MB_DATA2
MEM_MB_DATA1
MEM_MB_DATA0
MEM_MB_DATA[63..0] 6,7
A A
Micro Star Restricted Secret
Micro Star Restricted Secret
Micro Star Restricted Secret
Title
Title
Title
ATHLON64 DDR MEMORY I/F
ATHLON64 DDR MEMORY I/F
ATHLON64 DDR MEMORY I/F
Document Number
Document Number
Document Number
MICRO-STAR INT'L CO.,LTD.
MICRO-STAR INT'L CO.,LTD.
MICRO-STAR INT'L CO.,LTD.
No. 69, Li-De St, Jung-He City,
No. 69, Li-De St, Jung-He City,
No. 69, Li-De St, Jung-He City,
Taipei Hsien, Taiwan
Taipei Hsien, Taiwan
Taipei Hsien, Taiwan
http://www.msi.com.tw
http://www.msi.com.tw
5
4
3
2
http://www.msi.com.tw
MS-7252CH
MS-7252CH
MS-7252CH
Last Revision Date:
Last Revision Date:
Last Revision Date:
Sheet
Sheet
Sheet
1
Friday, November 03, 2006
Friday, November 03, 2006
Friday, November 03, 2006
439
439
439
Rev
Rev
Rev
0A
0A
0A
of
of
of
![](/html/03/03b6/03b6543c2a5df5c7b89b33a1f4becf59c691f79585bdfdeaae45c72dd8571a48/bg5.png)
5
4
3
2
1
VCCP
CPU1F
CPU1F
VDD1
VDD1
A4
VDD1
A6
VDD2
AA8
VDD3
VTT_DDR
AA10
AA12
AA14
AA16
AA18
AB7
AB9
AB11
AC4
AC5
AC8
AC10
AD2
AD3
AD7
AD9
AE10
AF7
AF9
AG4
AG5
AG7
AH2
AH3
E10
G10
G12
H11
H23
K11
K13
K15
K17
K19
K21
K23
Y17
Y19
VDD4
VDD5
VDD6
VDD7
VDD8
VDD9
VDD10
VDD11
VDD12
VDD13
VDD14
VDD15
VDD16
VDD17
VDD18
VDD19
VDD20
VDD21
VDD22
VDD23
VDD24
VDD25
VDD26
VDD27
B3
VDD28
B5
VDD29
B7
VDD30
C2
VDD31
C4
VDD32
C6
VDD33
C8
VDD34
D3
VDD35
D5
VDD36
D7
VDD37
D9
VDD38
E4
VDD39
E6
VDD40
E8
VDD41
VDD42
F5
VDD43
F7
VDD44
F9
VDD45
F11
VDD46
G6
VDD47
G8
VDD48
VDD49
VDD50
H7
VDD51
VDD52
VDD53
J8
VDD54
J12
VDD55
J14
VDD56
J16
VDD57
J18
VDD58
J20
VDD59
J22
VDD60
J24
VDD61
K7
VDD62
K9
VDD63
VDD64
VDD65
VDD66
VDD67
VDD68
VDD69
VDD70
L4
VDD71
L5
VDD72
L8
VDD73
L10
VDD74
L12
VDD75
VDD150
VDD151
D D
C C
B B
VSS1
VSS2
VSS3
VSS4
VSS5
VSS6
VSS7
VSS8
VSS9
VSS10
VSS11
VSS12
VSS13
VSS14
VSS15
VSS16
VSS17
VSS18
VSS19
VSS20
VSS21
VSS22
VSS23
VSS24
VSS25
VSS26
VSS27
VSS28
VSS29
VSS30
VSS31
VSS32
VSS33
VSS34
VSS35
VSS36
VSS37
VSS38
VSS39
VSS40
VSS41
VSS42
VSS43
VSS44
VSS45
VSS46
VSS47
VSS48
VSS49
VSS50
VSS51
VSS52
VSS53
VSS54
VSS55
VSS56
VSS57
VSS58
VSS59
VSS60
VSS61
VSS62
VSS63
VSS64
VSS65
VSS66
VSS67
VSS68
VSS69
VSS70
VSS71
VSS72
VSS73
VSS74
VSS240
VSS241
A3
A7
A9
A11
AA4
AA5
AA7
AA9
AA11
AA13
AA15
AA17
AA19
AA21
AA23
AB2
AB3
AB8
AB10
AB12
AB14
AB16
AB18
AB20
AB22
AC7
AC9
AC11
AC13
AC15
AC17
AC19
AC21
AC23
AD8
AD10
AD12
AD14
AD16
AD20
AD22
AD24
AE4
AE5
AE9
AE11
AF2
AF3
AF8
AF10
AF12
AF14
AF16
AF18
AF20
AF22
AF24
AF26
AF28
AG10
AG11
AH14
AH16
AH18
AH20
AH22
AH24
AH26
AH28
AH30
AK2
AK14
AK16
AK18
Y14
Y16
VCCP
M11
M13
M15
M17
M19
N10
N12
N14
N16
N18
P11
P13
P15
P17
P19
R10
R12
R14
R16
R18
R20
U10
U12
U14
U16
U18
U20
V11
V13
V15
V17
V19
V21
W10
W12
W14
W16
W18
W20
Y11
Y13
Y15
Y21
VCC_DDR
VCCP
C564
C564
C0.22U16X
C0.22U16X
VCC1_2HT
VTT_DDR
C575
C575
C0.22U16X
C0.22U16X
AB24
AB26
AB28
AB30
AC24
AD26
AD28
AD30
AF30
M24
M26
M28
M30
CPU1I
CPU1I
VDDIO
VLDT_A1
VLDT_A2
VLDT_A3
VLDT_A4
VTT1
VTT2
VTT3
VTT4
VDDIO1
VDDIO2
VDDIO3
VDDIO4
VDDIO5
VDDIO6
VDDIO7
VDDIO8
VDDIO9
VDDIO10
VDDIO11
VDDIO12
VDDIO13
VDDIO14
VDDIO15
VDDIO16
VDDIO17
VDDIO18
VDDIO19
VDDIO20
VDDIO21
VDDIO22
VDDIO23
VDDIO24
VDDIO25
VDDIO26
VDDIO27
VDDIO28
VDDIO29
VDDIO
VLDT_B1
VLDT_B2
VLDT_B3
VLDT_B4
VTT5
VTT6
VTT7
VTT8
VTT9
VSS1
VSS2
VSS3
VSS4
VSS5
VSS6
VSS7
VSS8
VSS9
VSS10
VSS11
VSS12
VSS13
VSS14
VSS15
VSS16
VSS17
VSS18
VSS19
VSS20
VSS21
VSS22
VSS23
VSS24
VSS25
VSS26
VSS27
VSS28
AJ4
AJ3
AJ2
AJ1
D12
C12
B12
A12
P24
P26
P28
P30
T24
T26
T28
T30
V25
V26
V28
V30
Y24
Y26
Y28
Y29
0603
C547
C571
C571
C0.22U16X
C0.22U16X
C547
C0.01U25X0402
C0.01U25X0402
VLDT_RUN_B
H6
H5
H2
VTT_DDR
H1
AK12
AJ12
AH12
AG12
AL12
K24
K26
K28
K30
L7
L9
L11
L13
L15
L17
L19
L21
L23
M8
M10
M12
M14
M16
M18
M20
M22
N4
N5
N7
N9
N11
N13
N15
0603
C548
C548
X_C10P25N0402/0.25
X_C10P25N0402/0.25
C94
C94
C4.7U16Y1206
C4.7U16Y1206
GND 3,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,28,29,30,36,37,38,39
C22U6.3X1206
C22U6.3X1206
C558
C558
C60
C60
X_10U/1206
X_10U/1206
VCC1_2HT
C784
C784
C180P50N0402
C180P50N0402
VCCP
C777
C777
C180P50N
C180P50N
VCC_DDR
C781
C781
C180P50N0402
C180P50N0402
VCC_DDR
C780
C780
C180P50N0402
C180P50N0402
C180P50N0402
C180P50N0402
VTT_DDR
C785
C785
C180P50N0402
C180P50N0402
C180P50N0402
C180P50N0402
AMD RECOMMAND
for EMI containment.
C561
C561
X_10U/1206
X_10U/1206
C782
C782
C180P50N0402
C180P50N0402
C789
C789
C180P50N0402
C180P50N0402
C787
C787
C788
C788
C180P50N0402
C180P50N0402
C783
C783
C786
C786
C180P50N0402
C180P50N0402
C90
C90
X_10U/1206
X_10U/1206
C778
C778
C180P50N0402
C180P50N0402
C779
C779
C180P50N0402
C180P50N0402
X_10U/1206
X_10U/1206
C563
C563
10U/1206
10U/1206
C136
C136
CPU1G
CPU1G
VDD2
L14
L16
L18
T11
T13
T15
T17
T19
T21
VDD2
VDD1
VDD2
VDD3
M2
VDD4
M3
VDD5
M7
VDD6
M9
VDD7
VDD8
VDD9
VDD10
VDD11
VDD12
N8
VDD13
VDD14
VDD15
VDD16
VDD17
VDD18
P7
VDD19
P9
VDD20
VDD21
VDD22
VDD23
VDD24
VDD25
R4
VDD26
R5
VDD27
R8
VDD28
VDD29
VDD30
VDD31
VDD32
VDD33
VDD34
T2
VDD35
T3
VDD36
T7
VDD37
T9
VDD38
VDD39
VDD40
VDD41
VDD42
VDD43
VDD44
U8
VDD45
VDD46
VDD47
VDD48
VDD49
VDD50
VDD51
V9
VDD52
VDD53
VDD54
VDD55
VDD56
VDD57
VDD58
W4
VDD59
W5
VDD60
W8
VDD61
VDD62
VDD63
VDD64
VDD65
VDD66
VDD67
Y2
VDD68
Y3
VDD69
Y7
VDD70
Y9
VDD71
VDD72
VDD73
VDD74
VDD75
VSS1
VSS2
VSS3
VSS4
VSS5
VSS6
VSS7
VSS8
VSS9
VSS10
VSS11
VSS12
VSS13
VSS14
VSS15
VSS16
VSS17
VSS18
VSS19
VSS20
VSS21
VSS22
VSS23
VSS24
VSS25
VSS26
VSS27
VSS28
VSS29
VSS30
VSS31
VSS32
VSS33
VSS34
VSS35
VSS36
VSS37
VSS38
VSS39
VSS40
VSS41
VSS42
VSS43
VSS44
VSS45
VSS46
VSS47
VSS48
VSS49
VSS50
VSS51
VSS52
VSS53
VSS54
VSS55
VSS56
VSS57
VSS58
VSS59
VSS60
VSS61
VSS62
VSS63
VSS64
VSS65
VSS66
VSS67
VSS68
VSS69
VSS70
VSS71
VSS72
VSS73
VSS74
VSS75
AK20
AK22
AK24
AK26
AK28
AK30
AL5
B4
B9
B11
B14
B16
B18
B20
B22
B24
B26
B28
B30
C3
D14
D16
D18
D20
D22
D24
D26
D28
D30
E11
F4
F14
F16
F18
F20
F22
F24
F26
F28
F30
G9
G11
H8
H10
H12
H14
H16
H18
H22
H24
H26
H28
H30
J4
J5
J7
J9
J11
J13
J15
J17
J19
J21
J23
K2
K3
K8
K10
K12
K14
K16
K18
K20
K22
Y18
VCC_DDR
VCCP
AA20
AA22
AB13
AB15
AB17
AB19
AB21
AB23
AC12
AC14
AC16
AC18
AC20
AC22
AD11
AD23
AE12
AF11
M21
M23
N20
N22
P21
P23
R22
U22
V23
W22
Y23
CPU1H
CPU1H
VDD3
VDD3
VDD1
VDD2
VDD3
VDD4
VDD5
VDD6
VDD7
VDD8
VDD9
VDD10
VDD11
VDD12
VDD13
VDD14
VDD15
VDD16
VDD17
VDD18
L20
VDD19
L22
VDD20
VDD21
VDD22
VDD23
VDD24
VDD25
VDD26
VDD27
T23
VDD28
VDD29
VDD30
VDD31
VDD32
5
GND
6
GND
7
GND
8
GND
1
GND
2
GND
3
GND
4
GND
VSS1
VSS2
VSS3
VSS4
VSS5
VSS6
VSS7
VSS8
VSS9
VSS10
VSS11
VSS12
VSS13
VSS14
VSS15
VSS16
VSS17
VSS18
VSS19
VSS20
VSS21
VSS22
VSS23
VSS24
VSS25
VSS26
VSS27
VSS28
VSS29
VSS30
VSS31
VSS32
VSS33
VSS34
VSS35
VSS36
VSS37
VSS38
VSS39
VSS40
VSS41
VSS42
VSS43
VSS44
VSS45
VSS46
VSS47
VSS48
VSS49
VSS50
VSS51
VSS52
VSS53
VSS54
VSS55
VSS56
VSS57
VSS58
VSS59
VSS60
VSS61
VSS62
VSS63
VSS64
VSS65
N17
N19
N21
N23
P2
P3
P8
P10
P12
P14
P16
P18
P20
P22
R7
R9
R11
R13
R15
R17
R19
R21
R23
T8
T10
T12
T14
T16
T18
T20
T22
U4
U5
U7
U9
U11
U13
U15
U17
U19
U21
U23
V2
V3
V10
V12
V14
V16
V18
V20
V22
W9
W11
W13
W15
W17
W19
W21
W23
Y8
Y10
Y12
W7
Y20
Y22
C42
C42
C68
C68
C0.22U16X
C0.22U16X
A A
VTT_DDR
C0.22U16X
C0.22U16X
C189
C189
C0.22U16X
C0.22U16X
C0.22U16X
C0.22U16X
C4.7U10Y0805
C4.7U10Y0805
C192
C192
C4.7U10Y0805
C4.7U10Y0805
5
C36
C36
C34
C34
X_C4.7U10Y0805
X_C4.7U10Y0805
C203
C203
C201
C201
X_C4.7U10Y0805
X_C4.7U10Y0805
C50
C50
X_C10P50N0402
X_C10P50N0402
X_C10P50N0402
X_C10P50N0402
C194
C194
X_C10P50N0402
X_C10P50N0402
X_C10P50N0402
X_C10P50N0402
C39
C39
X_C1000P50X0402
X_C1000P50X0402
C169
C169
X_C1000P50X0402
X_C1000P50X0402
C53
C53
C74
C74
X_C1000P50X0402
X_C1000P50X0402
C187
C187
C160
C160
X_C1000P50X0402
X_C1000P50X0402
4
C551
C551
C0.22U16X
C0.22U16X
VCC_DDR
C562
C562
X_C22U6.3X1206
X_C22U6.3X1206
C0.22U16X
C0.22U16X
10U/1206
10U/1206
C559
C559
C0.22U16X
C0.22U16X
C567
C567
C4.7U10Y0805
C4.7U10Y0805
C224
C224
C4.7U10Y0805
C4.7U10Y0805
C102
C102
C4.7U10Y0805
C4.7U10Y0805
C259
C259
C4.7U10Y0805
C4.7U10Y0805
C87
C87
C0.22U16X
C0.22U16X
C76
C76
C555
C555
C0.22U16X
C0.22U16X
C179
C179
C0.22U16X
C0.22U16X
3
C97
C97
C0.22U16X
C0.22U16X
VCCP
C557
C557
X_10U/1206
X_10U/1206
C269
C269
C574
C574
X_C10P25N0402/0.25
X_C10P25N0402/0.25
C556
C556
X_10U/1206
X_10U/1206
C560
C560
X_10U/1206
X_10U/1206
C552
C552
X_10U/1206
X_10U/1206
2
C554
C554
10U/1206
10U/1206
C553
C553
10U/1206
10U/1206
C570
C570
10U/1206
10U/1206
Title
Title
Title
Document Number
Document Number
Document Number
MICRO-STAR INT'L CO.,LTD.
MICRO-STAR INT'L CO.,LTD.
MICRO-STAR INT'L CO.,LTD.
No. 69, Li-De St, Jung-He City,
No. 69, Li-De St, Jung-He City,
No. 69, Li-De St, Jung-He City,
Taipei Hsien, Taiwan
Taipei Hsien, Taiwan
Taipei Hsien, Taiwan
http://www.msi.com.tw
http://www.msi.com.tw
http://www.msi.com.tw
10U/1206
10U/1206
Micro Star Restricted Secret
Micro Star Restricted Secret
Micro Star Restricted Secret
ATHLON64 PWR & GND
ATHLON64 PWR & GND
ATHLON64 PWR & GND
C550
C550
MS-7252H1
MS-7252H1
MS-7252H1
1
C549
C549
X_10U/1206
X_10U/1206
Last Revision Date:
Last Revision Date:
Last Revision Date:
Friday, November 03, 2006
Friday, November 03, 2006
Friday, November 03, 2006
Sheet
Sheet
Sheet
539
539
539
Rev
Rev
Rev
0A
0A
0A
of
of
of
![](/html/03/03b6/03b6543c2a5df5c7b89b33a1f4becf59c691f79585bdfdeaae45c72dd8571a48/bg6.png)
5
MEM_MA_DQS_H[7..0]4,7
MEM_MA_DQS_L[7..0]4,7
DIMM1
MEM_MA_DATA[63..0]4,7
D D
C C
B B
VCC_DDR
MEM_MA_DATA0
MEM_MA_DATA1
MEM_MA_DATA2
MEM_MA_DATA3
MEM_MA_DATA4
MEM_MA_DATA5
MEM_MA_DATA6
MEM_MA_DATA7
MEM_MA_DATA8
MEM_MA_DATA9
MEM_MA_DATA10
MEM_MA_DATA11
MEM_MA_DATA12
MEM_MA_DATA13
MEM_MA_DATA14
MEM_MA_DATA15
MEM_MA_DATA16
MEM_MA_DATA17
MEM_MA_DATA18
MEM_MA_DATA19
MEM_MA_DATA20
MEM_MA_DATA21
MEM_MA_DATA22
MEM_MA_DATA23
MEM_MA_DATA24
MEM_MA_DATA25
MEM_MA_DATA26
MEM_MA_DATA27
MEM_MA_DATA28
MEM_MA_DATA29
MEM_MA_DATA30
MEM_MA_DATA31
MEM_MA_DATA32
MEM_MA_DATA33
MEM_MA_DATA34
MEM_MA_DATA35
MEM_MA_DATA36
MEM_MA_DATA37
MEM_MA_DATA38
MEM_MA_DATA39
MEM_MA_DATA40
MEM_MA_DATA41
MEM_MA_DATA42
MEM_MA_DATA43
MEM_MA_DATA44
MEM_MA_DATA45
MEM_MA_DATA46
MEM_MA_DATA47
MEM_MA_DATA48
MEM_MA_DATA49
MEM_MA_DATA50
MEM_MA_DATA51
MEM_MA_DATA52
MEM_MA_DATA53
MEM_MA_DATA54
MEM_MA_DATA55
MEM_MA_DATA56
MEM_MA_DATA57
MEM_MA_DATA58
MEM_MA_DATA59
MEM_MA_DATA60
MEM_MA_DATA61
MEM_MA_DATA62
MEM_MA_DATA63
DIMM1
10
122
123
128
129
12
13
21
22
131
132
140
141
24
25
30
31
143
144
149
150
33
34
39
40
152
153
158
159
80
81
86
87
199
200
205
206
89
90
95
96
208
209
214
215
98
99
107
108
217
218
226
227
110
111
116
117
229
230
235
236
11
14
17
20
23
26
29
32
35
38
41
44
47
50
65
66
79
82
85
88
91
94
97
3
DQ0
4
DQ1
9
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQ8
DQ9
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
DQ16
DQ17
DQ18
DQ19
DQ20
DQ21
DQ22
DQ23
DQ24
DQ25
DQ26
DQ27
DQ28
DQ29
DQ30
DQ31
DQ32
DQ33
DQ34
DQ35
DQ36
DQ37
DQ38
DQ39
DQ40
DQ41
DQ42
DQ43
DQ44
DQ45
DQ46
DQ47
DQ48
DQ49
DQ50
DQ51
DQ52
DQ53
DQ54
DQ55
DQ56
DQ57
DQ58
DQ59
DQ60
DQ61
DQ62
DQ63
2
VSS
5
VSS#5
8
VSS#8
VSS#11
VSS#14
VSS#17
VSS#20
VSS#23
VSS#26
VSS#29
VSS#32
VSS#35
VSS#38
VSS#41
VSS#44
VSS#47
VSS#50
VSS#65
VSS#66
VSS#79
VSS#82
VSS#85
VSS#88
VSS#91
VSS#94
VSS#97
55
RC118RC0
VSS#100
VSS#103
100
103
19
102
NC#19
VSS#106
106
109
VCC_DDR
68
NC
VDD051VDD156VDD262VDD372VDD478VDD5
NC/TEST
VSS#109
VSS#112
VSS#115
VSS#118
112
115
118
VSS#121
VSS#124
121
124
75
VDD3#75
VSS#127
VSS#130
127
130
191
VSS#133
133
136
194
181
VDD6
VSS#136
VSS#139
139
142
170
175
VDD7
VDD8
VSS#142
VSS#145
145
148
VDDQ0
VSS#148
151
VDDQ153VDDQ259VDDQ364VDDQ4
VSS#151
VSS#154
154
157
197
69
VSS#157
VSS#160
160
163
172
187
VDDQ5
VDDQ4#69
VSS#163
VSS#166
166
169
4
184
178
VDDQ6
VDDQ7
VSS#169
VSS#198
198
201
189
67
VDDQ8
VDDQ7#178
VSS#201
VSS#204
204
207
VCC3
238
VDDQ9
VSS#207
VSS#210
210
213
VDDSPD
VSS#213
VSS#216
216
219
CB042CB143CB248CB349CB4
VSS#219
VSS#222
VSS#225
222
225
228
161
162
167
CB5
CB6
DQS0
DQS0#
DQS1
DQS1#
DQS2
DQS2#
DQS3
DQS3#
DQS4
DQS4#
DQS5
DQS5#
DQS6
DQS6#
DQS7
DQS7#
DQS8
DQS8#
A10_AP
A16/BA2
WE#
CAS#
RAS#
DM0/DQS9
NC/DQS9#
DM1/DQS10
NC/DQS10#
DM2/DQS11
NC/DQS11#
DM3/DQS12
NC/DQS12#
DM4/DQS13
NC/DQS13#
DM5/DQS14
NC/DQS14#
DM6/DQS15
NC/DQS15#
DM7/DQS16
NC/DQS16#
DM8/DQS17
NC/DQS17#
ODT0
ODT1
CKE0
CKE1
CS0#
CS1#
CK0(DU)
CK0#(DU)
CK1(CK0)
CK1#(CK0#)
CK2(DU)
CK2#(DU)
VREF
VSS#228
VSS#231
VSS#234
VSS#237
231
234
237
168
CB7
7
6
16
15
28
27
37
36
84
83
93
92
105
104
114
113
46
45
X3
X3
188
A0
183
A1
63
A2
182
A3
61
A4
60
A5
180
A6
58
A7
179
A8
177
A9
70
57
A11
176
A12
196
A13
174
A14
173
A15
54
190
BA1
71
BA0
73
74
192
125
126
134
135
146
147
155
156
202
203
211
212
223
224
232
233
164
165
195
77
52
171
193
76
185
186
137
138
220
221
120
SCL
119
SDA
X1
X1
1
X2
X2
239
SA0
240
SA1
101
SA2
DDRII-240_green-RH
DDRII-240_green-RH
MEM_MA_DQS_H0
MEM_MA_DQS_L0
MEM_MA_DQS_H1
MEM_MA_DQS_L1
MEM_MA_DQS_H2
MEM_MA_DQS_L2
MEM_MA_DQS_H3
MEM_MA_DQS_L3
MEM_MA_DQS_H4
MEM_MA_DQS_L4
MEM_MA_DQS_H5
MEM_MA_DQS_L5
MEM_MA_DQS_H6
MEM_MA_DQS_L6
MEM_MA_DQS_H7
MEM_MA_DQS_L7
MEM_MA_ADD0
MEM_MA_ADD1
MEM_MA_ADD2
MEM_MA_ADD3
MEM_MA_ADD4
MEM_MA_ADD5
MEM_MA_ADD6
MEM_MA_ADD7
MEM_MA_ADD8
MEM_MA_ADD9
MEM_MA_ADD10
MEM_MA_ADD11
MEM_MA_ADD12
MEM_MA_ADD13
MEM_MA_ADD14
MEM_MA_ADD15
MEM_MA_BANK2
MEM_MA_BANK1
MEM_MA_BANK0
MEM_MA_WE_L
MEM_MA_CAS_L
MEM_MA_RAS_L
MEM_MA_DM0
MEM_MA_DM1
MEM_MA_DM2
MEM_MA_DM3
MEM_MA_DM4
MEM_MA_DM5
MEM_MA_DM6
MEM_MA_DM7
MEM_MA0_ODT0
MEM_MA_CKE0
MEM_MA0_CS_L0
MEM_MA0_CS_L1
MEM_MA0_CLK_H0
MEM_MA0_CLK_L0
MEM_MA0_CLK_H1
MEM_MA0_CLK_L1
MEM_MA0_CLK_H2
MEM_MA0_CLK_L2
SMB_MEMCLK
SMB_MEMDATA
VDDR_VREF
MEM_MB_DATA[63..0]4,7
MEM_MA_ADD[15..0] 4,7,8
MEM_MA_BANK2 4,7,8
MEM_MA_BANK1 4,7,8
MEM_MA_BANK0 4,7,8
MEM_MA_WE_L 4,7,8
MEM_MA_CAS_L 4,7,8
MEM_MA_RAS_L 4,7,8
MEM_MA_DM[7..0] 4,7
MEM_MA0_ODT0 4,8
MEM_MA_CKE0 4,8
MEM_MA0_CS_L0 4,8
MEM_MA0_CS_L1 4,8
MEM_MA0_CLK_H0 4,8
MEM_MA0_CLK_L0 4,8
MEM_MA0_CLK_H1 4,8
MEM_MA0_CLK_L1 4,8
MEM_MA0_CLK_H2 4,8
MEM_MA0_CLK_L2 4,8
R19533R R19533R
R18733R R18733R
VDDR_VREF
C52
C52
C0.1U16Y0402
C0.1U16Y0402
3
MEM_MB_DQS_H[7..0]4,7
MEM_MB_DQS_L[7..0]4,7
SMB_MEM_CLK 13
SMB_MEM_DATA 13
MEM_MB_DATA0
MEM_MB_DATA1
MEM_MB_DATA2
MEM_MB_DATA3
MEM_MB_DATA4
MEM_MB_DATA5
MEM_MB_DATA6
MEM_MB_DATA7
MEM_MB_DATA8
MEM_MB_DATA9
MEM_MB_DATA10
MEM_MB_DATA11
MEM_MB_DATA12
MEM_MB_DATA13
MEM_MB_DATA14
MEM_MB_DATA15
MEM_MB_DATA16
MEM_MB_DATA17
MEM_MB_DATA18
MEM_MB_DATA19
MEM_MB_DATA20
MEM_MB_DATA21
MEM_MB_DATA22
MEM_MB_DATA23
MEM_MB_DATA24
MEM_MB_DATA25
MEM_MB_DATA26
MEM_MB_DATA27
MEM_MB_DATA28
MEM_MB_DATA29
MEM_MB_DATA30
MEM_MB_DATA31
MEM_MB_DATA32
MEM_MB_DATA33
MEM_MB_DATA34
MEM_MB_DATA35
MEM_MB_DATA36
MEM_MB_DATA37
MEM_MB_DATA38
MEM_MB_DATA39
MEM_MB_DATA40
MEM_MB_DATA41
MEM_MB_DATA42
MEM_MB_DATA43
MEM_MB_DATA44
MEM_MB_DATA45
MEM_MB_DATA46
MEM_MB_DATA47
MEM_MB_DATA48
MEM_MB_DATA49
MEM_MB_DATA50
MEM_MB_DATA51
MEM_MB_DATA52
MEM_MB_DATA53
MEM_MB_DATA54
MEM_MB_DATA55
MEM_MB_DATA56
MEM_MB_DATA57
MEM_MB_DATA58
MEM_MB_DATA59
MEM_MB_DATA60
MEM_MB_DATA61
MEM_MB_DATA62
MEM_MB_DATA63
DIMM2
DIMM2
10
122
123
128
129
12
13
21
22
131
132
140
141
24
25
30
31
143
144
149
150
33
34
39
40
152
153
158
159
80
81
86
87
199
200
205
206
89
90
95
96
208
209
214
215
98
99
107
108
217
218
226
227
110
111
116
117
229
230
235
236
11
14
17
20
23
26
29
32
35
38
41
44
47
50
65
66
79
82
85
88
91
94
97
2
VCC_DDR
170
68
102
NC
NC/TEST
VSS#109
VSS#112
109
112
VSS#115
115
75
VDD051VDD156VDD262VDD372VDD478VDD5
VDD3#75
VSS#118
VSS#121
VSS#124
VSS#127
VSS#130
118
121
124
127
130
133
191
VSS#133
VSS#136
136
55
19
3
RC118RC0
DQ0
4
9
2
5
8
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQ8
DQ9
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
DQ16
DQ17
DQ18
DQ19
DQ20
DQ21
DQ22
DQ23
DQ24
DQ25
DQ26
DQ27
DQ28
DQ29
DQ30
DQ31
DQ32
DQ33
DQ34
DQ35
DQ36
DQ37
DQ38
DQ39
DQ40
DQ41
DQ42
DQ43
DQ44
DQ45
DQ46
DQ47
DQ48
DQ49
DQ50
DQ51
DQ52
DQ53
DQ54
DQ55
DQ56
DQ57
DQ58
DQ59
DQ60
DQ61
DQ62
DQ63
VSS
VSS#5
VSS#8
VSS#11
VSS#14
VSS#17
VSS#20
VSS#23
VSS#26
VSS#29
VSS#32
VSS#35
VSS#38
VSS#41
VSS#44
VSS#47
VSS#50
VSS#65
VSS#66
VSS#79
VSS#82
VSS#85
VSS#88
VSS#91
VSS#94
VSS#97
VSS#100
100
103
NC#19
VSS#103
VSS#106
106
194
181
VDD6
VSS#139
139
142
175
VDD7
VDD8
VSS#142
VSS#145
145
148
VDDQ0
VDDQ153VDDQ259VDDQ364VDDQ4
VSS#148
VSS#151
151
154
197
VSS#154
VSS#157
157
160
VSS#160
172
69
VDDQ5
VDDQ4#69
VSS#163
VSS#166
163
166
187
184
VDDQ6
VDDQ7
VSS#169
VSS#198
169
198
189
178
VDDQ8
VDDQ7#178
VSS#201
VSS#204
201
204
VCC3
67
VDDQ9
VSS#207
VSS#210
207
210
238
VDDSPD
VSS#213
VSS#216
213
216
CB042CB143CB248CB349CB4
VSS#219
VSS#222
219
222
225
161
DM0/DQS9
NC/DQS9#
DM1/DQS10
NC/DQS10#
DM2/DQS11
NC/DQS11#
DM3/DQS12
NC/DQS12#
DM4/DQS13
NC/DQS13#
DM5/DQS14
NC/DQS14#
DM6/DQS15
NC/DQS15#
DM7/DQS16
NC/DQS16#
DM8/DQS17
NC/DQS17#
CK0#(DU)
CK1(CK0)
CK1#(CK0#)
CK2#(DU)
VSS#225
VSS#228
VSS#231
228
231
162
167
168
CB5
CB6
CB7
DQS0
DQS0#
DQS1
DQS1#
DQS2
DQS2#
DQS3
DQS3#
DQS4
DQS4#
DQS5
DQS5#
DQS6
DQS6#
DQS7
DQS7#
DQS8
DQS8#
X3
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10_AP
A11
A12
A13
A14
A15
A16/BA2
BA1
BA0
WE#
CAS#
RAS#
ODT0
ODT1
CKE0
CKE1
CS0#
CS1#
CK0(DU)
CK2(DU)
SCL
SDA
X1
VREF
X2
SA0
SA1
SA2
VSS#234
VSS#237
234
237
DDRII-240_green-RH
DDRII-240_green-RH
MEM_MB_DQS_H0
7
MEM_MB_DQS_L0
6
MEM_MB_DQS_H1
16
MEM_MB_DQS_L1
15
MEM_MB_DQS_H2
28
MEM_MB_DQS_L2
27
MEM_MB_DQS_H3
37
MEM_MB_DQS_L3
36
MEM_MB_DQS_H4
84
MEM_MB_DQS_L4
83
MEM_MB_DQS_H5
93
MEM_MB_DQS_L5
92
MEM_MB_DQS_H6
105
MEM_MB_DQS_L6
104
MEM_MB_DQS_H7
114
MEM_MB_DQS_L7
113
46
45
X3
MEM_MB_ADD0
188
MEM_MB_ADD1
183
MEM_MB_ADD2
63
MEM_MB_ADD3
182
MEM_MB_ADD4
61
MEM_MB_ADD5
60
MEM_MB_ADD6
180
MEM_MB_ADD7
58
MEM_MB_ADD8
179
MEM_MB_ADD9
177
MEM_MB_ADD10
70
MEM_MB_ADD11
57
MEM_MB_ADD12
176
MEM_MB_ADD13
196
MEM_MB_ADD14
174
MEM_MB_ADD15
173
MEM_MB_BANK2
54
MEM_MB_BANK1
190
MEM_MB_BANK0
71
MEM_MB_WE_L
73
MEM_MB_CAS_L
74
MEM_MB_RAS_L
192
MEM_MB_DM0
125
126
MEM_MB_DM1
134
135
MEM_MB_DM2
146
147
MEM_MB_DM3
155
156
MEM_MB_DM4
202
203
MEM_MB_DM5
211
212
MEM_MB_DM6
223
224
MEM_MB_DM7
232
233
164
165
MEM_MB0_ODT0
195
77
MEM_MB_CKE0
52
171
MEM_MB0_CS_L0
193
MEM_MB0_CS_L1
76
MEM_MB0_CLK_H0
185
MEM_MB0_CLK_L0
186
MEM_MB0_CLK_H1
137
MEM_MB0_CLK_L1
138
MEM_MB0_CLK_H2
220
MEM_MB0_CLK_L2
221
SMB_MEMCLK
120
SMB_MEMDATA
119
X1
VDDR_VREF
1
X2
VCC3
239
240
101
PLACE CLOSE TO DIMM PIN
ADDRESS: 001
0xA4
C63
C63
C0.1U16Y0402
C0.1U16Y0402
1
MEM_MB_ADD[15..0] 4,7,8
MEM_MB_BANK2 4,7,8
MEM_MB_BANK1 4,7,8
MEM_MB_BANK0 4,7,8
MEM_MB_WE_L 4,7,8
MEM_MB_CAS_L 4,7,8
MEM_MB_RAS_L 4,7,8
MEM_MB_DM[7..0] 4,7
MEM_MB0_ODT0 4,8
MEM_MB_CKE0 4,8
MEM_MB0_CS_L0 4,8
MEM_MB0_CS_L1 4,8
MEM_MB0_CLK_H0 4,8
MEM_MB0_CLK_L0 4,8
MEM_MB0_CLK_H1 4,8
MEM_MB0_CLK_L1 4,8
MEM_MB0_CLK_H2 4,8
MEM_MB0_CLK_L2 4,8
R55
A A
R55
56.2R1%
56.2R1%
R66
R66
56.2R1%
56.2R1%
C43
C43
C0.1U16Y0402
C0.1U16Y0402
C59
C59
C0.1U16Y0402
C0.1U16Y0402
VDDR_VREF
C56
C56
C1000P50X0402
C1000P50X0402
5
DIMM 1
ADDR=1010000B
SMB_MEMCLK
SMB_MEMCLK 7
SMB_MEMDATA 7
4
3VDUAL 3VDUAL
2
3
1
D17
D17
X_1PS226_SOT23
X_1PS226_SOT23
3
SMB_MEM_CLKSMB_MEM_DATASMB_MEMDATA
3
2
D18
D18
X_1PS226_SOT23
X_1PS226_SOT23
1
DIMM 2
ADDR=1010001B
2
Micro Star Restricted Secret
Micro Star Restricted Secret
Micro Star Restricted Secret
Title
Title
Title
FIRST LOGICAL DDR DIMM
FIRST LOGICAL DDR DIMM
FIRST LOGICAL DDR DIMM
Document Number
Document Number
Document Number
MICRO-STAR INT'L CO.,LTD.
MICRO-STAR INT'L CO.,LTD.
MICRO-STAR INT'L CO.,LTD.
No. 69, Li-De St, Jung-He City,
No. 69, Li-De St, Jung-He City,
No. 69, Li-De St, Jung-He City,
Taipei Hsien, Taiwan
Taipei Hsien, Taiwan
Taipei Hsien, Taiwan
http://www.msi.com.tw
http://www.msi.com.tw
http://www.msi.com.tw
MS-7252CH
MS-7252CH
MS-7252CH
Last Revision Date:
Last Revision Date:
Last Revision Date:
Sheet
Sheet
Sheet
1
Friday, November 03, 2006
Friday, November 03, 2006
Friday, November 03, 2006
of
of
of
639
639
639
Rev
Rev
Rev
0A
0A
0A
![](/html/03/03b6/03b6543c2a5df5c7b89b33a1f4becf59c691f79585bdfdeaae45c72dd8571a48/bg7.png)
5
4
3
2
1
MEM_MA_DQS_H[7..0]4,6
MEM_MA_DQS_L[7..0]4,6
DIMM3
MEM_MA_DATA[63..0]4,6
D D
C C
B B
A A
MEM_MA_DATA0
MEM_MA_DATA1
MEM_MA_DATA2
MEM_MA_DATA3
MEM_MA_DATA4
MEM_MA_DATA5
MEM_MA_DATA6
MEM_MA_DATA7
MEM_MA_DATA8
MEM_MA_DATA9
MEM_MA_DATA10
MEM_MA_DATA11
MEM_MA_DATA12
MEM_MA_DATA13
MEM_MA_DATA14
MEM_MA_DATA15
MEM_MA_DATA16
MEM_MA_DATA17
MEM_MA_DATA18
MEM_MA_DATA19
MEM_MA_DATA20
MEM_MA_DATA21
MEM_MA_DATA22
MEM_MA_DATA23
MEM_MA_DATA24
MEM_MA_DATA25
MEM_MA_DATA26
MEM_MA_DATA27
MEM_MA_DATA28
MEM_MA_DATA29
MEM_MA_DATA30
MEM_MA_DATA31
MEM_MA_DATA32
MEM_MA_DATA33
MEM_MA_DATA34
MEM_MA_DATA35
MEM_MA_DATA36
MEM_MA_DATA37
MEM_MA_DATA38
MEM_MA_DATA39
MEM_MA_DATA40
MEM_MA_DATA41
MEM_MA_DATA42
MEM_MA_DATA43
MEM_MA_DATA44
MEM_MA_DATA45
MEM_MA_DATA46
MEM_MA_DATA47
MEM_MA_DATA48
MEM_MA_DATA49
MEM_MA_DATA50
MEM_MA_DATA51
MEM_MA_DATA52
MEM_MA_DATA53
MEM_MA_DATA54
MEM_MA_DATA55
MEM_MA_DATA56
MEM_MA_DATA57
MEM_MA_DATA58
MEM_MA_DATA59
MEM_MA_DATA60
MEM_MA_DATA61
MEM_MA_DATA62
MEM_MA_DATA63
DIMM3
10
122
123
128
129
12
13
21
22
131
132
140
141
24
25
30
31
143
144
149
150
33
34
39
40
152
153
158
159
80
81
86
87
199
200
205
206
89
90
95
96
208
209
214
215
98
99
107
108
217
218
226
227
110
111
116
117
229
230
235
236
11
14
17
20
23
26
29
32
35
38
41
44
47
50
65
66
79
82
85
88
91
94
97
3
DQ0
4
DQ1
9
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQ8
DQ9
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
DQ16
DQ17
DQ18
DQ19
DQ20
DQ21
DQ22
DQ23
DQ24
DQ25
DQ26
DQ27
DQ28
DQ29
DQ30
DQ31
DQ32
DQ33
DQ34
DQ35
DQ36
DQ37
DQ38
DQ39
DQ40
DQ41
DQ42
DQ43
DQ44
DQ45
DQ46
DQ47
DQ48
DQ49
DQ50
DQ51
DQ52
DQ53
DQ54
DQ55
DQ56
DQ57
DQ58
DQ59
DQ60
DQ61
DQ62
DQ63
2
VSS
5
VSS#5
8
VSS#8
VSS#11
VSS#14
VSS#17
VSS#20
VSS#23
VSS#26
VSS#29
VSS#32
VSS#35
VSS#38
VSS#41
VSS#44
VSS#47
VSS#50
VSS#65
VSS#66
VSS#79
VSS#82
VSS#85
VSS#88
VSS#91
VSS#94
VSS#97
55
RC118RC0
VSS#100
VSS#103
100
103
19
102
NC#19
VSS#106
106
109
VCC_DDR
68
NC
VDD051VDD156VDD262VDD372VDD478VDD5
NC/TEST
VSS#109
VSS#112
VSS#115
VSS#118
112
115
118
VSS#121
VSS#124
121
124
75
VDD3#75
VSS#127
VSS#130
127
130
191
VSS#133
133
136
194
181
VDD6
VSS#136
VSS#139
139
142
170
175
VDD7
VDD8
VSS#142
VSS#145
145
148
VDDQ0
VDDQ153VDDQ259VDDQ364VDDQ4
VSS#148
VSS#151
151
154
197
VSS#154
VSS#157
157
160
172
69
VDDQ4#69
VSS#160
VSS#163
163
166
VCC3 VCC3
187
184
189
67
VDDQ5
VDDQ6
VSS#166
VSS#169
169
198
178
VDDQ7
VDDQ7#178
VSS#198
VSS#201
201
204
VDDQ8
VDDQ9
VSS#204
VSS#207
207
238
VSS#210
210
213
VDDSPD
VSS#213
VSS#216
216
219
CB042CB143CB248CB349CB4
VSS#219
VSS#222
VSS#225
222
225
161
162
CB5
DQS0#
DQS1#
DQS2#
DQS3#
DQS4#
DQS5#
DQS6#
DQS7#
DQS8#
A10_AP
A16/BA2
DM0/DQS9
NC/DQS9#
DM1/DQS10
NC/DQS10#
DM2/DQS11
NC/DQS11#
DM3/DQS12
NC/DQS12#
DM4/DQS13
NC/DQS13#
DM5/DQS14
NC/DQS14#
DM6/DQS15
NC/DQS15#
DM7/DQS16
NC/DQS16#
DM8/DQS17
NC/DQS17#
CK0(DU)
CK0#(DU)
CK1(CK0)
CK1#(CK0#)
CK2(DU)
CK2#(DU)
VSS#228
VSS#231
VSS#234
228
231
234
167
168
CB6
CB7
7
DQS0
6
16
DQS1
15
28
DQS2
27
37
DQS3
36
84
DQS4
83
93
DQS5
92
105
DQS6
104
114
DQS7
113
46
DQS8
45
X3
X3
188
A0
183
A1
63
A2
182
A3
61
A4
60
A5
180
A6
58
A7
179
A8
177
A9
70
57
A11
176
A12
196
A13
174
A14
173
A15
54
190
BA1
71
BA0
73
WE#
74
CAS#
192
RAS#
125
126
134
135
146
147
155
156
202
203
211
212
223
224
232
233
164
165
195
ODT0
77
ODT1
52
CKE0
171
CKE1
193
CS0#
76
CS1#
185
186
137
138
220
221
120
SCL
119
SDA
X1
X1
1
VREF
X2
X2
239
SA0
240
SA1
101
SA2
VSS#237
237
DDRII-240_green-RH
DDRII-240_green-RH
MEM_MA_DQS_H0
MEM_MA_DQS_L0
MEM_MA_DQS_H1
MEM_MA_DQS_L1
MEM_MA_DQS_H2
MEM_MA_DQS_L2
MEM_MA_DQS_H3
MEM_MA_DQS_L3
MEM_MA_DQS_H4
MEM_MA_DQS_L4
MEM_MA_DQS_H5
MEM_MA_DQS_L5
MEM_MA_DQS_H6
MEM_MA_DQS_L6
MEM_MA_DQS_H7
MEM_MA_DQS_L7
MEM_MA_ADD0
MEM_MA_ADD1
MEM_MA_ADD2
MEM_MA_ADD3
MEM_MA_ADD4
MEM_MA_ADD5
MEM_MA_ADD6
MEM_MA_ADD7
MEM_MA_ADD8
MEM_MA_ADD9
MEM_MA_ADD10
MEM_MA_ADD11
MEM_MA_ADD12
MEM_MA_ADD13
MEM_MA_ADD14
MEM_MA_ADD15
MEM_MA_BANK2
MEM_MA_BANK1
MEM_MA_BANK0
MEM_MA_WE_L
MEM_MA_CAS_L
MEM_MA_RAS_L
MEM_MA_DM0
MEM_MA_DM1
MEM_MA_DM2
MEM_MA_DM3
MEM_MA_DM4
MEM_MA_DM5
MEM_MA_DM6
MEM_MA_DM7
MEM_MA1_ODT0
MEM_MA_CKE1
MEM_MA1_CS_L0
MEM_MA1_CS_L1
MEM_MA1_CLK_H0
MEM_MA1_CLK_L0
MEM_MA1_CLK_H1
MEM_MA1_CLK_L1
MEM_MA1_CLK_H2
MEM_MA1_CLK_L2
SMB_MEMCLK
SMB_MEMDATA
VDDR_VREF
VCC3
MEM_MB_DATA[63..0]4,6
MEM_MA_ADD[15..0] 4,6,8
MEM_MA_BANK2 4,6,8
MEM_MA_BANK1 4,6,8
MEM_MA_BANK0 4,6,8
MEM_MA_WE_L 4,6,8
MEM_MA_CAS_L 4,6,8
MEM_MA_RAS_L 4,6,8
MEM_MA_DM[7..0] 4,6
MEM_MA1_ODT0 4,8
MEM_MA_CKE1 4,8
MEM_MA1_CS_L0 4,8
MEM_MA1_CS_L1 4,8
MEM_MA1_CLK_H0 4,8
MEM_MA1_CLK_L0 4,8
MEM_MA1_CLK_H1 4,8
MEM_MA1_CLK_L1 4,8
MEM_MA1_CLK_H2 4,8
MEM_MA1_CLK_L2 4,8
VDDR_VREF
C54
C54
C0.1U16Y0402
C0.1U16Y0402
MEM_MB_DQS_L[7..0]4,6
MEM_MB_DQS_H[7..0]4,6
MEM_MB_DATA0
MEM_MB_DATA1
MEM_MB_DATA2
MEM_MB_DATA3
MEM_MB_DATA4
MEM_MB_DATA5
MEM_MB_DATA6
MEM_MB_DATA7
MEM_MB_DATA8
MEM_MB_DATA9
MEM_MB_DATA10
MEM_MB_DATA11
MEM_MB_DATA12
MEM_MB_DATA13
MEM_MB_DATA14
MEM_MB_DATA15
MEM_MB_DATA16
MEM_MB_DATA17
MEM_MB_DATA18
MEM_MB_DATA19
MEM_MB_DATA20
MEM_MB_DATA21
MEM_MB_DATA22
MEM_MB_DATA23
MEM_MB_DATA24
MEM_MB_DATA25
MEM_MB_DATA26
MEM_MB_DATA27
MEM_MB_DATA28
MEM_MB_DATA29
MEM_MB_DATA30
MEM_MB_DATA31
MEM_MB_DATA32
MEM_MB_DATA33
MEM_MB_DATA34
MEM_MB_DATA35
MEM_MB_DATA36
MEM_MB_DATA37
MEM_MB_DATA38
MEM_MB_DATA39
MEM_MB_DATA40
MEM_MB_DATA41
MEM_MB_DATA42
MEM_MB_DATA43
MEM_MB_DATA44
MEM_MB_DATA45
MEM_MB_DATA46
MEM_MB_DATA47
MEM_MB_DATA48
MEM_MB_DATA49
MEM_MB_DATA50
MEM_MB_DATA51
MEM_MB_DATA52
MEM_MB_DATA53
MEM_MB_DATA54
MEM_MB_DATA55
MEM_MB_DATA56
MEM_MB_DATA57
MEM_MB_DATA58
MEM_MB_DATA59
MEM_MB_DATA60
MEM_MB_DATA61
MEM_MB_DATA62
MEM_MB_DATA63
DIMM4
DIMM4
10
122
123
128
129
12
13
21
22
131
132
140
141
24
25
30
31
143
144
149
150
33
34
39
40
152
153
158
159
80
81
86
87
199
200
205
206
89
90
95
96
208
209
214
215
98
99
107
108
217
218
226
227
110
111
116
117
229
230
235
236
11
14
17
20
23
26
29
32
35
38
41
44
47
50
65
66
79
82
85
88
91
94
97
VCC_DDR
170
197
172
187
184
189
68
102
NC/TEST
VSS#109
109
112
NC
VSS#112
VSS#115
115
75
VDD051VDD156VDD262VDD372VDD478VDD5
VDD3#75
VSS#118
VSS#121
VSS#124
VSS#127
VSS#130
118
121
124
127
130
133
191
194
VDD6
VSS#133
VSS#136
VSS#139
136
139
181
175
VDD7
VSS#142
142
145
VDD8
VDDQ0
VSS#145
VSS#148
148
151
VDDQ153VDDQ259VDDQ364VDDQ4
VSS#151
VSS#154
154
157
VSS#157
55
19
3
RC118RC0
DQ0
4
9
2
5
8
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQ8
DQ9
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
DQ16
DQ17
DQ18
DQ19
DQ20
DQ21
DQ22
DQ23
DQ24
DQ25
DQ26
DQ27
DQ28
DQ29
DQ30
DQ31
DQ32
DQ33
DQ34
DQ35
DQ36
DQ37
DQ38
DQ39
DQ40
DQ41
DQ42
DQ43
DQ44
DQ45
DQ46
DQ47
DQ48
DQ49
DQ50
DQ51
DQ52
DQ53
DQ54
DQ55
DQ56
DQ57
DQ58
DQ59
DQ60
DQ61
DQ62
DQ63
VSS
VSS#5
VSS#8
VSS#11
VSS#14
VSS#17
VSS#20
VSS#23
VSS#26
VSS#29
VSS#32
VSS#35
VSS#38
VSS#41
VSS#44
VSS#47
VSS#50
VSS#65
VSS#66
VSS#79
VSS#82
VSS#85
VSS#88
VSS#91
VSS#94
VSS#97
VSS#100
100
103
NC#19
VSS#103
VSS#106
106
69
VDDQ4#69
VSS#160
VSS#163
160
163
VDDQ5
VDDQ6
VSS#166
VSS#169
166
169
178
VDDQ7
VDDQ7#178
VSS#198
VSS#201
198
201
67
VDDQ8
VDDQ9
VSS#204
VSS#207
204
207
238
VDDSPD
VSS#210
VSS#213
210
213
CB042CB143CB248CB349CB4
VSS#216
VSS#219
216
219
VSS#222
222
225
161
DM0/DQS9
NC/DQS9#
DM1/DQS10
NC/DQS10#
DM2/DQS11
NC/DQS11#
DM3/DQS12
NC/DQS12#
DM4/DQS13
NC/DQS13#
DM5/DQS14
NC/DQS14#
DM6/DQS15
NC/DQS15#
DM7/DQS16
NC/DQS16#
DM8/DQS17
NC/DQS17#
CK0#(DU)
CK1(CK0)
CK1#(CK0#)
CK2#(DU)
VSS#225
VSS#228
VSS#231
228
231
162
167
168
CB5
CB6
CB7
DQS0
DQS0#
DQS1
DQS1#
DQS2
DQS2#
DQS3
DQS3#
DQS4
DQS4#
DQS5
DQS5#
DQS6
DQS6#
DQS7
DQS7#
DQS8
DQS8#
X3
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10_AP
A11
A12
A13
A14
A15
A16/BA2
BA1
BA0
WE#
CAS#
RAS#
ODT0
ODT1
CKE0
CKE1
CS0#
CS1#
CK0(DU)
CK2(DU)
SCL
SDA
X1
VREF
X2
SA0
SA1
SA2
VSS#234
VSS#237
234
237
DDRII-240_green-RH
DDRII-240_green-RH
7
6
16
15
28
27
37
36
84
83
93
92
105
104
114
113
46
45
X3
188
183
63
182
61
60
180
58
179
177
70
57
176
196
174
173
54
190
71
73
74
192
125
126
134
135
146
147
155
156
202
203
211
212
223
224
232
233
164
165
195
77
52
171
193
76
185
186
137
138
220
221
120
119
X1
1
X2
239
240
101
VDDR_VREF
VCC3
MEM_MB_DQS_H0
MEM_MB_DQS_L0
MEM_MB_DQS_H1
MEM_MB_DQS_L1
MEM_MB_DQS_H2
MEM_MB_DQS_L2
MEM_MB_DQS_H3
MEM_MB_DQS_L3
MEM_MB_DQS_H4
MEM_MB_DQS_L4
MEM_MB_DQS_H5
MEM_MB_DQS_L5
MEM_MB_DQS_H6
MEM_MB_DQS_L6
MEM_MB_DQS_H7
MEM_MB_DQS_L7
MEM_MB_ADD0
MEM_MB_ADD1
MEM_MB_ADD2
MEM_MB_ADD3
MEM_MB_ADD4
MEM_MB_ADD5
MEM_MB_ADD6
MEM_MB_ADD7
MEM_MB_ADD8
MEM_MB_ADD9
MEM_MB_ADD10
MEM_MB_ADD11
MEM_MB_ADD12
MEM_MB_ADD13
MEM_MB_ADD14
MEM_MB_ADD15
MEM_MB_BANK2
MEM_MB_BANK1
MEM_MB_BANK0
MEM_MB_WE_L
MEM_MB_CAS_L
MEM_MB_RAS_L
MEM_MB_DM0
MEM_MB_DM1
MEM_MB_DM2
MEM_MB_DM3
MEM_MB_DM4
MEM_MB_DM5
MEM_MB_DM6
MEM_MB_DM7
MEM_MB1_ODT0
MEM_MB_CKE1
MEM_MB1_CS_L0
MEM_MB1_CS_L1
MEM_MB1_CLK_H0
MEM_MB1_CLK_L0
MEM_MB1_CLK_H1
MEM_MB1_CLK_L1
MEM_MB1_CLK_H2
MEM_MB1_CLK_L2
SMB_MEMCLK
SMB_MEMDATA
C46
C46
C0.1U16Y0402
C0.1U16Y0402
MEM_MB_ADD[15..0] 4,6,8
MEM_MB_BANK2 4,6,8
MEM_MB_BANK1 4,6,8
MEM_MB_BANK0 4,6,8
MEM_MB_WE_L 4,6,8
MEM_MB_CAS_L 4,6,8
MEM_MB_RAS_L 4,6,8
MEM_MB_DM[7..0] 4,6
MEM_MB1_ODT0 4,8
MEM_MB_CKE1 4,8
MEM_MB1_CS_L0 4,8
MEM_MB1_CS_L1 4,8
MEM_MB1_CLK_H0 4,8
MEM_MB1_CLK_L0 4,8
MEM_MB1_CLK_H1 4,8
MEM_MB1_CLK_L1 4,8
MEM_MB1_CLK_H2 4,8
MEM_MB1_CLK_L2 4,8
DIMM3
ADDR=1010010B
SMB_MEMCLK
SMB_MEMDATA
5
4
SMB_MEMCLK 6
SMB_MEMDATA 6
3
DIMM 4
ADDR=1010011B
2
Micro Star Restricted Secret
Micro Star Restricted Secret
Micro Star Restricted Secret
Title
Title
Title
SECOND LOGICAL DDR DIMM
SECOND LOGICAL DDR DIMM
SECOND LOGICAL DDR DIMM
Document Number
Document Number
Document Number
MICRO-STAR INT'L CO.,LTD.
MICRO-STAR INT'L CO.,LTD.
MICRO-STAR INT'L CO.,LTD.
No. 69, Li-De St, Jung-He City,
No. 69, Li-De St, Jung-He City,
No. 69, Li-De St, Jung-He City,
Taipei Hsien, Taiwan
Taipei Hsien, Taiwan
Taipei Hsien, Taiwan
http://www.msi.com.tw
http://www.msi.com.tw
http://www.msi.com.tw
MS-7252CH
MS-7252CH
MS-7252CH
Last Revision Date:
Last Revision Date:
Last Revision Date:
Sheet
Sheet
Sheet
1
Friday, November 03, 2006
Friday, November 03, 2006
Friday, November 03, 2006
of
of
of
739
739
739
Rev
Rev
Rev
0A
0A
0A
![](/html/03/03b6/03b6543c2a5df5c7b89b33a1f4becf59c691f79585bdfdeaae45c72dd8571a48/bg8.png)
5
4
3
2
1
MEM_MA_ADD[15..0]4,6,7
MEM_MB_ADD154,6,7
D D
C C
MEM_MB_ADD144,6,7
MEM_MB_BANK24,6,7
MEM_MA_ADD94,6,7
MEM_MA_ADD114,6,7
MEM_MB_ADD124,6,7
MEM_MB_ADD94,6,7
MEM_MA_ADD74,6,7
MEM_MA_ADD64,6,7
MEM_MB_ADD64,6,7
MEM_MB_ADD54,6,7
MEM_MA_ADD54,6,7
MEM_MB_ADD14,6,7
MEM_MB_ADD24,6,7
MEM_MA_ADD14,6,7
MEM_MA_ADD24,6,7
MEM_MB_ADD104,6,7
MEM_MB_BANK04,6,7
MEM_MB_RAS_L4,6,7
MEM_MB0_CS_L04,6
MEM_MA_BANK04,6,7
MEM_MB_BANK14,6,7
MEM_MA_RAS_L4,6,7
MEM_MA0_CS_L04,6
MEM_MA_ADD134,6,7
MEM_MB1_CS_L14,7
MEM_MA0_CS_L14,6
MEM_MA1_CS_L14,7
MEM_MB1_CS_L04,7
MEM_MB1_ODT04,7
MEM_MB_ADD15
MEM_MB_ADD14
MEM_MB_BANK2
MEM_MA_ADD9
MEM_MA_ADD11
MEM_MB_ADD12
MEM_MB_ADD9
MEM_MA_ADD7
MEM_MA_ADD6
MEM_MB_ADD6
MEM_MB_ADD5
MEM_MA_ADD5
MEM_MB_ADD1
MEM_MB_ADD2
MEM_MA_ADD1
MEM_MA_ADD2
MEM_MB_ADD10
MEM_MB_BANK0
MEM_MB_RAS_L
MEM_MB0_CS_L0
MEM_MA_BANK0
MEM_MB_BANK1
MEM_MA_RAS_L
MEM_MA0_CS_L0
MEM_MA_ADD13
MEM_MB1_CS_L1
MEM_MA0_CS_L1
MEM_MA1_CS_L1
MEM_MB1_CS_L0
MEM_MB1_ODT0
RN15 8P4R-47R0402RN15 8P4R-47R0402
1
2
3
4
5
6
7
RN16 8P4R-47R0402RN16 8P4R-47R0402
RN18 8P4R-47R0402RN18 8P4R-47R0402
RN20 8P4R-47R0402RN20 8P4R-47R0402
RN24 8P4R-47R0402RN24 8P4R-47R0402
RN22 8P4R-47R0402RN22 8P4R-47R0402
RN28 8P4R-47R0402RN28 8P4R-47R0402
R108 47R0402R108 47R0402
R113 47R0402R113 47R0402
8
1
2
3
4
5
6
7
8
1
2
3
4
5
6
7
8
1
2
3
4
5
6
7
8
1
2
3
4
5
6
7
8
1
2
3
4
5
6
7
8
1
2
3
4
5
6
7
8
VTT_DDR
MEM_MA0_CLK_H24,6
MEM_MA0_CLK_L24,6
MEM_MA0_CLK_H14,6
MEM_MA0_CLK_L14,6
MEM_MA0_CLK_H04,6
MEM_MA0_CLK_L04,6
MEM_MB0_CLK_H24,6
MEM_MB0_CLK_L24,6
MEM_MB0_CLK_H14,6
MEM_MB0_CLK_L14,6
MEM_MB0_CLK_H04,6
MEM_MB0_CLK_L04,6
MEM_MA0_CLK_H2
MEM_MA0_CLK_L2
MEM_MA0_CLK_H1
MEM_MA0_CLK_L1
MEM_MA0_CLK_H0
MEM_MA0_CLK_L0
MEM_MB0_CLK_H2
MEM_MB0_CLK_L2
MEM_MB0_CLK_H1
MEM_MB0_CLK_L1
MEM_MB0_CLK_H0
MEM_MB0_CLK_L0
C185
C185
C1.5P50N0402
C1.5P50N0402
C72
C72
C1.5P50N0402
C1.5P50N0402
C124
C124
C1.5P50N0402
C1.5P50N0402
C176
C176
C1.5P50N0402
C1.5P50N0402
C71
C71
C1.5P50N0402
C1.5P50N0402
C122
C122
C1.5P50N0402
C1.5P50N0402
MEM_MA_ADD15
MEM_MA_ADD14
MEM_MA_ADD13
MEM_MA_ADD12
MEM_MA_ADD11
MEM_MA_ADD10
MEM_MA_ADD9
MEM_MA_ADD8
MEM_MA_ADD6
MEM_MA_ADD5
MEM_MA_ADD4
MEM_MA_ADD3 MEM_MB_ADD3
MEM_MA_ADD2
MEM_MA_ADD1
MEM_MA_ADD0
MEM_MA_CAS_L
MEM_MA_WE_L
MEM_MA_RAS_L
MEM_MA_BANK2
MEM_MA_BANK1
MEM_MA_BANK0
C565 C22P50N0402C565 C22P50N0402
C566 C22P50N0402C566 C22P50N0402
C590 C22P50N0402C590 C22P50N0402
C568 C22P50N0402C568 C22P50N0402
C573 C22P50N0402C573 C22P50N0402
C587 C22P50N0402C587 C22P50N0402
C572 C22P50N0402C572 C22P50N0402
C577 C22P50N0402C577 C22P50N0402
C576 C22P50N0402C576 C22P50N0402
C578 C22P50N0402C578 C22P50N0402
C580 C22P50N0402C580 C22P50N0402
C583 C22P50N0402C583 C22P50N0402
C579 C22P50N0402C579 C22P50N0402
C585 C22P50N0402C585 C22P50N0402
C581 C22P50N0402C581 C22P50N0402
C588 C22P50N0402C588 C22P50N0402
C589 C22P50N0402C589 C22P50N0402
C586 C22P50N0402C586 C22P50N0402
C584 C22P50N0402C584 C22P50N0402
C569 C22P50N0402C569 C22P50N0402
C591 C22P50N0402C591 C22P50N0402
C582 C22P50N0402C582 C22P50N0402
Decoupling Between Processor and DIMMs
VTT_DDR
C199
C199
X_C0.1U16Y0402
X_C0.1U16Y0402
X_C0.1U16Y0402
X_C0.1U16Y0402
C193
C193
C0.1U16Y0402
C0.1U16Y0402
C173
C173
C0.1U16Y0402
C0.1U16Y0402
C156
C156
Layout: Spread out on VTT pour
C190
C190
C181
C181
X_C0.1U16Y0402
X_C0.1U16Y0402
C0.1U16Y0402
C0.1U16Y0402
C111
C111
X_C0.1U16Y0402
X_C0.1U16Y0402
X_C0.1U16Y0402
X_C0.1U16Y0402
C150
C150
MEM_MB_ADD15
MEM_MB_ADD14
MEM_MB_ADD13
MEM_MB_ADD12
MEM_MB_ADD11
MEM_MB_ADD10
MEM_MB_ADD9
MEM_MB_ADD8
MEM_MB_ADD7MEM_MA_ADD7
MEM_MB_ADD6
MEM_MB_ADD5
MEM_MB_ADD4
MEM_MB_ADD2
MEM_MB_ADD1
MEM_MB_ADD0
MEM_MB_CAS_L
MEM_MB_WE_L
MEM_MB_RAS_L
MEM_MB_BANK2
MEM_MB_BANK1
MEM_MB_BANK0
C130
C130
X_C0.1U16Y0402
X_C0.1U16Y0402
C0.1U16Y0402
C0.1U16Y0402
C109 C22P50N0402C109 C22P50N0402
C110 C22P50N0402C110 C22P50N0402
C171 C22P50N0402C171 C22P50N0402
C116 C22P50N0402C116 C22P50N0402
C118 C22P50N0402C118 C22P50N0402
C161 C22P50N0402C161 C22P50N0402
C119 C22P50N0402C119 C22P50N0402
C132 C22P50N0402C132 C22P50N0402
C128 C22P50N0402C128 C22P50N0402
C133 C22P50N0402C133 C22P50N0402
C141 C22P50N0402C141 C22P50N0402
C148 C22P50N0402C148 C22P50N0402
C140 C22P50N0402C140 C22P50N0402
C152 C22P50N0402C152 C22P50N0402
C145 C22P50N0402C145 C22P50N0402
C162 C22P50N0402C162 C22P50N0402
C167 C22P50N0402C167 C22P50N0402
C158 C22P50N0402C158 C22P50N0402
C151 C22P50N0402C151 C22P50N0402
C115 C22P50N0402C115 C22P50N0402
C172 C22P50N0402C172 C22P50N0402
C147 C22P50N0402C147 C22P50N0402
C202
C202
C137
C137
C0.1U16Y0402
C0.1U16Y0402
X_C0.1U16Y0402
X_C0.1U16Y0402
C159
C159
VTT_DDR
C105
C105
C103
C103
C0.1U16Y0402
3
C0.1U16Y0402
C0.1U16Y0402
C0.1U16Y0402
MEM_MB_ADD[15..0]4,6,7
MEM_MB_CKE14,7
MEM_MB_CKE04,6
MEM_MA_BANK24,6,7
B B
A A
MEM_MA_ADD124,6,7
MEM_MA_ADD84,6,7
MEM_MB_ADD114,6,7
MEM_MB_ADD74,6,7
MEM_MB_ADD84,6,7
MEM_MB_ADD44,6,7
MEM_MB_ADD34,6,7
MEM_MA_ADD44,6,7
MEM_MA_ADD34,6,7
MEM_MA_ADD04,6,7
MEM_MA_ADD104,6,7
MEM_MB_ADD04,6,7
MEM_MA_BANK14,6,7
MEM_MB_WE_L4,6,7
MEM_MB_CAS_L4,6,7
MEM_MA_WE_L4,6,7
MEM_MA_CAS_L4,6,7
MEM_MA_CKE14,7
MEM_MA_CKE04,6
MEM_MA_ADD154,6,7
MEM_MA_ADD144,6,7
MEM_MA0_ODT04,6
MEM_MB0_ODT04,6
MEM_MB_ADD134,6,7
MEM_MB0_CS_L14,6
MEM_MA1_CS_L04,7
MEM_MA1_ODT04,7
MEM_MB_CKE1
MEM_MB_CKE0
MEM_MA_BANK2
MEM_MA_ADD12
MEM_MA_ADD8
MEM_MB_ADD11
MEM_MB_ADD7
MEM_MB_ADD8
MEM_MB_ADD4
MEM_MB_ADD3
MEM_MA_ADD4
MEM_MA_ADD3
MEM_MA_ADD0
MEM_MA_ADD10
MEM_MB_ADD0
MEM_MA_BANK1
MEM_MB_WE_L
MEM_MB_CAS_L
MEM_MA_WE_L
MEM_MA_CAS_L
MEM_MA_CKE1
MEM_MA_CKE0
MEM_MA_ADD15
MEM_MA_ADD14
MEM_MA0_ODT0
MEM_MB0_ODT0
MEM_MB_ADD13
MEM_MB0_CS_L1
MEM_MA1_CS_L0
MEM_MA1_ODT0
RN14 8P4R-47R0402RN14 8P4R-47R0402
1
3
5
7
RN17 8P4R-47R0402RN17 8P4R-47R0402
1
3
5
7
RN19 8P4R-47R0402RN19 8P4R-47R0402
1
3
5
7
RN21 8P4R-47R0402RN21 8P4R-47R0402
1
3
5
7
RN26 8P4R-47R0402RN26 8P4R-47R0402
1
3
5
7
RN13 8P4R-47R0402RN13 8P4R-47R0402
1
3
5
7
RN27 8P4R-47R0402RN27 8P4R-47R0402
1
3
5
7
R105 47R0402R105 47R0402
R117 47R0402R117 47R0402
VTT_DDR
2
4
6
8
2
4
6
8
2
4
6
8
2
4
6
8
2
4
6
8
2
4
6
8
2
4
6
8
MEM_MA1_CLK_H24,7
MEM_MA1_CLK_L24,7
MEM_MA1_CLK_H14,7
MEM_MA1_CLK_L14,7
MEM_MA1_CLK_H04,7
MEM_MA1_CLK_L04,7
MEM_MB1_CLK_H24,7
MEM_MB1_CLK_L24,7
MEM_MB1_CLK_H14,7
MEM_MB1_CLK_L14,7
MEM_MB1_CLK_H04,7
MEM_MB1_CLK_L04,7
5
4
MEM_MA1_CLK_H2
MEM_MA1_CLK_L2
MEM_MA1_CLK_H1
MEM_MA1_CLK_L1
MEM_MA1_CLK_H0
MEM_MA1_CLK_L0
MEM_MB1_CLK_H2
MEM_MB1_CLK_L2
MEM_MB1_CLK_H1
MEM_MB1_CLK_L1
MEM_MB1_CLK_H0
MEM_MB1_CLK_L0
C186
C186
C1.5P50N0402
C1.5P50N0402
C61
C61
C1.5P50N0402
C1.5P50N0402
C129
C129
C1.5P50N0402
C1.5P50N0402
C180
C180
C1.5P50N0402
C1.5P50N0402
C67
C67
C1.5P50N0402
C1.5P50N0402
C127
C127
C1.5P50N0402
C1.5P50N0402
C28
C28
C0.1U16Y0402
C0.1U16Y0402
C0.1U16Y0402
C0.1U16Y0402
C86
C86
C0.1U16Y0402
C0.1U16Y0402
C29
C29
C0.1U16Y0402
C0.1U16Y0402
X_C10P50N0402
X_C10P50N0402
X_C10P50N0402
X_C10P50N0402
C77
C77
C0.1U16Y0402
C0.1U16Y0402
VTT_DDR
VCC_DDR
C241
C241
C0.1U16Y0402
C0.1U16Y0402
C223
C223
X_C10P50N0402
X_C10P50N0402
C242
C242
X_C10P50N0402
X_C10P50N0402
2
C250
C250
C0.1U16Y0402
C0.1U16Y0402
For EMI
C227
C227
X_C10P50N0402
X_C10P50N0402
C58
C58
X_C10P50N0402
X_C10P50N0402
C231
C231
C0.1U16Y0402
C0.1U16Y0402
C256
C256
X_C10P50N0402
X_C10P50N0402
C200
C200
C222
C222
C108
C108
C0.1U16Y0402
C0.1U16Y0402
C0.1U16Y0402
C0.1U16Y0402
C26
C26
C22
C22
X_C10P50N0402
X_C10P50N0402
Title
Title
Title
Document Number
Document Number
Document Number
MICRO-STAR INT'L CO.,LTD.
MICRO-STAR INT'L CO.,LTD.
MICRO-STAR INT'L CO.,LTD.
No. 69, Li-De St, Jung-He City,
No. 69, Li-De St, Jung-He City,
No. 69, Li-De St, Jung-He City,
Taipei Hsien, Taiwan
Taipei Hsien, Taiwan
Taipei Hsien, Taiwan
http://www.msi.com.tw
http://www.msi.com.tw
http://www.msi.com.tw
C254
C254
VCC_DDRVCC_DDR
C125
C125
C121
C121
C95
C95
C0.1U16Y0402
X_C0.1U16Y0402
X_C0.1U16Y0402
C262
C262
C123
C123
C0.1U16Y0402
C0.1U16Y0402
MS-7252CH
MS-7252CH
MS-7252CH
C0.1U16Y0402
C0.1U16Y0402
C0.1U16Y0402
C131
C131
C0.1U16Y0402
C0.1U16Y0402
C0.1U16Y0402
C0.1U16Y0402
Last Revision Date:
Last Revision Date:
Last Revision Date:
Sheet
Sheet
Sheet
1
C0.1U16Y0402
C0.1U16Y0402
C0.1U16Y0402
C0.1U16Y0402
Micro Star Restricted Secret
Micro Star Restricted Secret
Micro Star Restricted Secret
DDR Terminatior
DDR Terminatior
DDR Terminatior
C112
C112
VCC_DDR
C30
C30
Friday, November 03, 2006
Friday, November 03, 2006
Friday, November 03, 2006
839
839
839
of
of
of
Rev
Rev
Rev
0A
0A
0A
![](/html/03/03b6/03b6543c2a5df5c7b89b33a1f4becf59c691f79585bdfdeaae45c72dd8571a48/bg9.png)
5
U13F
U13F
?
HT_CADOUT_H[15..0]3
D D
HT_CADOUT_L[15..0]3
C C
HT_CADOUT_H[15..0]
HT_CADOUT_L[15..0]
HT_CLKOUT_H03
HT_CLKOUT_L03
HT_CLKOUT_H13
HT_CLKOUT_L13
HT_CTLOUT_H03
HT_CTLOUT_L03
HT_CADOUT_H0
HT_CADOUT_H1
HT_CADOUT_H2
HT_CADOUT_H3
HT_CADOUT_H4
HT_CADOUT_H5
HT_CADOUT_H6
HT_CADOUT_H7
HT_CADOUT_H8
HT_CADOUT_H9
HT_CADOUT_H10
HT_CADOUT_H11
HT_CADOUT_H12
HT_CADOUT_H13
HT_CADOUT_H14
HT_CADOUT_H15
HT_CADOUT_L0
HT_CADOUT_L1
HT_CADOUT_L2
HT_CADOUT_L3
HT_CADOUT_L4
HT_CADOUT_L5
HT_CADOUT_L6
HT_CADOUT_L7
HT_CADOUT_L8
HT_CADOUT_L9
HT_CADOUT_L10
HT_CADOUT_L11
HT_CADOUT_L12
HT_CADOUT_L13
HT_CADOUT_L14
HT_CADOUT_L15
HT_CTLOUT_H0
HT_CTLOUT_L0
Y23
W24
V24
U22
R24
P24
P22
N22
Y21
V21
W21
T21
R18
P16
N20
M17
Y22
W23
V23
U21
R23
P23
P21
N21
Y20
W20
W22
U20
R19
P17
N19
N18
T23
T22
R21
R20
M23
M22
?
HT_CPU_RXD0_P
HT_CPU_RXD1_P
HT_CPU_RXD2_P
HT_CPU_RXD3_P
HT_CPU_RXD4_P
HT_CPU_RXD5_P
HT_CPU_RXD6_P
HT_CPU_RXD7_P
HT_CPU_RXD8_P
HT_CPU_RXD9_P
HT_CPU_RXD10_P
HT_CPU_RXD11_P
HT_CPU_RXD12_P
HT_CPU_RXD13_P
HT_CPU_RXD14_P
HT_CPU_RXD15_P
HT_CPU_RXD0_N
HT_CPU_RXD1_N
HT_CPU_RXD2_N
HT_CPU_RXD3_N
HT_CPU_RXD4_N
HT_CPU_RXD5_N
HT_CPU_RXD6_N
HT_CPU_RXD7_N
HT_CPU_RXD8_N
HT_CPU_RXD9_N
HT_CPU_RXD10_N
HT_CPU_RXD11_N
HT_CPU_RXD12_N
HT_CPU_RXD13_N
HT_CPU_RXD14_N
HT_CPU_RXD15_N
HT_CPU_RX_CLK0_P
HT_CPU_RX_CLK0_N
HT_CPU_RX_CLK1_P
HT_CPU_RX_CLK1_N
HT_CPU_RXCTL_P
HT_CPU_RXCTL_N
VCC1_2HT
B B
1P2VPLL_PWR10,11
A A
1P2VPLL_PWR
5
R150 150R1%R150 150R1%
CP23
CP23
X_COPPER
X_COPPER
C1U10Y
C1U10Y
PLACE ON BACK SIDE
C598
C598
R147 150R1%R147 150R1%
1P2VPLL_FILT
C600
C600
C0.1U16Y0402
C0.1U16Y0402
W19
Y19
N16
T13
NVIDIA-C51-G-A1
NVIDIA-C51-G-A1
HT_CPU_CAL_1P2V
HT_CPU_CAL_GND
+1.2V_PLLHTCPU
+1.2V_PLLHTMCP
?
?
C51
C51
SEC 1 OF 6
SEC 1 OF 6
4
HT_CPU_TXD0_P
HT_CPU_TXD1_P
HT_CPU_TXD2_P
HT_CPU_TXD3_P
HT_CPU_TXD4_P
HT_CPU_TXD5_P
HT_CPU_TXD6_P
HT_CPU_TXD7_P
HT_CPU_TXD8_P
HT_CPU_TXD9_P
HT_CPU_TXD10_P
HT_CPU_TXD11_P
HT_CPU_TXD12_P
HT_CPU_TXD13_P
HT_CPU_TXD14_P
HT_CPU_TXD15_P
HT_CPU_TXD0_N
HT_CPU_TXD1_N
HT_CPU_TXD2_N
HT_CPU_TXD3_N
HT_CPU_TXD4_N
HT_CPU_TXD5_N
HT_CPU_TXD6_N
HT_CPU_TXD7_N
HT_CPU_TXD8_N
HT_CPU_TXD9_N
HT_CPU_TXD10_N
HT_CPU_TXD11_N
HT_CPU_TXD12_N
HT_CPU_TXD13_N
HT_CPU_TXD14_N
HT_CPU_TXD15_N
HT_CPU_TX_CLK0_P
HT_CPU_TX_CLK0_N
HT_CPU_TX_CLK1_P
HT_CPU_TX_CLK1_N
HT_CPU_TXCTL_P
HT_CPU_TXCTL_N
CLKOUT_PRI_200MHZ_P
CLKOUT_PRI_200MHZ_N
CLKOUT_SEC_200MHZ_P
CLKOUT_SEC_200MHZ_N
HT_CPU_REQ*
HT_CPU_STOP*
HT_CPU_RESET*
HT_CPU_PWRGD
+2.5V_PLLHTCPU
4
VCC2_5
HT_CADIN_H0
C23
HT_CADIN_H1
D23
HT_CADIN_H2
E22
HT_CADIN_H3
F23
HT_CADIN_H4
H22
HT_CADIN_H5
J21
HT_CADIN_H6
K21
HT_CADIN_H7
K23
HT_CADIN_H8
D21
HT_CADIN_H9
F19
HT_CADIN_H10
F21
HT_CADIN_H11
G20
HT_CADIN_H12
J19
HT_CADIN_H13
L17
HT_CADIN_H14
L20
HT_CADIN_H15
L18
HT_CADIN_L0
C24
HT_CADIN_L1
D24
HT_CADIN_L2
E23
HT_CADIN_L3
F24
HT_CADIN_L4
H23
HT_CADIN_L5
J22
HT_CADIN_L6
K22
HT_CADIN_L7
K24
HT_CADIN_L8
D22
HT_CADIN_L9
E20
HT_CADIN_L10
E21
HT_CADIN_L11
G19
HT_CADIN_L12
J18
HT_CADIN_L13
K17
HT_CADIN_L14
K19
HT_CADIN_L15
L19
G23
G24
G22
G21
L23
L24
B24
B23
A22
B21
F18
G18
D20
E19
L16
C244
C244
X_C4.7U10Y0805
X_C4.7U10Y0805
HT_CLKIN_H0
HT_CLKIN_L0
HT_CLKIN_H1
HT_CLKIN_L1
HT_CTLIN_H0
HT_CTLIN_L0
2P5V_PLL
C595
C595
X_C0.1U16Y0402
X_C0.1U16Y0402
HT_CADIN_H[15..0]
HT_CADIN_L[15..0]
HT_CLKIN_H0 3
HT_CLKIN_L0 3
HT_CLKIN_H1 3
HT_CLKIN_L1 3
HT_CTLIN_H0 3
HT_CTLIN_L0 3
CPU_CLK 3
CPU_CLK# 3
HT_STOP#
LDT_RST
CPU_PWRGD
FB20 X_0RFB20 X_0R
CP24
CP24
X_COPPER
X_COPPER
HT_CADIN_H[15..0] 3
HT_CADIN_L[15..0] 3
HT_STOP# 3
LDT_RST 3
CPU_PWRGD 3
2P5V_PLL
C599
C599
C597
C597
C1U10Y
C1U10Y
PLACE ON BACK SIDE
3
C0.1U16Y0402
C0.1U16Y0402
3
HTMCP_UP[7..0]12
HTMCP_UP#[7..0]12
HTMCP_UPCLK012
HTMCP_UPCLK0#12
HTMCP_UPCNTL12
HTMCP_UPCNTL#12
MCPOUT_200MHZ12
MCPOUT_200MHZ#12
2P5V_PLL 10
2
U13A
U13A
?
HTMCP_UP[7..0]
HTMCP_UP#[7..0]
HTMCP_REQ#12
HTMCP_STOP#12
HTMCP_PWRGD12
MCPOUT_25MHZ12
HTMCP_UP0
HTMCP_UP1
HTMCP_UP2
HTMCP_UP3
HTMCP_UP4
HTMCP_UP5
HTMCP_UP6
HTMCP_UP7
HTMCP_UPCLK0
HTMCP_UPCLK0#
HTMCP_UPCNTL
HTMCP_UPCNTL#
HTMCP_REQ#
HTMCP_STOP#
HTMCP_RST1#
HTMCP_PWRGD
MCPOUT_25MHZ
MCPOUT_200MHZ
MCPOUT_200MHZ#
HTMCP_UP#0
HTMCP_UP#1
HTMCP_UP#2
HTMCP_UP#3
HTMCP_UP#4
HTMCP_UP#5
HTMCP_UP#6
HTMCP_UP#7
AD6
AC7
AA8
AA9
AD10
AD11
AC12
AC13
AA6
W7
Y8
V9
Y10
AA11
V11
W12
AC6
AB7
AB8
AB9
AC10
AC11
AB12
AB13
Y6
Y7
AA7
W9
W10
Y12
W11
V13
AD9
AC9
U10
T10
AD14
AC14
AB5
AA5
AC5
AD5
AC4
Y5
W5
D25
D25
12
S-BAT54A_SOT23
S-BAT54A_SOT23
3
R1035
R1035
10K
10K
HT_MCP_RXD0_P
HT_MCP_RXD1_P
HT_MCP_RXD2_P
HT_MCP_RXD3_P
HT_MCP_RXD4_P
HT_MCP_RXD5_P
HT_MCP_RXD6_P
HT_MCP_RXD7_P
HT_MCP_RXD8_P
HT_MCP_RXD9_P
HT_MCP_RXD10_P
HT_MCP_RXD11_P
HT_MCP_RXD12_P
HT_MCP_RXD13_P
HT_MCP_RXD14_P
HT_MCP_RXD15_P
HT_MCP_RXD0_N
HT_MCP_RXD1_N
HT_MCP_RXD2_N
HT_MCP_RXD3_N
HT_MCP_RXD4_N
HT_MCP_RXD5_N
HT_MCP_RXD6_N
HT_MCP_RXD7_N
HT_MCP_RXD8_N
HT_MCP_RXD9_N
HT_MCP_RXD10_N
HT_MCP_RXD11_N
HT_MCP_RXD12_N
HT_MCP_RXD13_N
HT_MCP_RXD14_N
HT_MCP_RXD15_N
HT_MCP_RX_CLK0_P
HT_MCP_RX_CLK0_N
HT_MCP_RX_CLK1_P
HT_MCP_RX_CLK1_N
HT_MCP_RXCTL_P
HT_MCP_RXCTL_N
HT_MCP_REQ*
HT_MCP_STOP*
HT_MCP_RESET*
HT_MCP_PWRGD
CLKIN_25MHZ
CLKIN_200MHZ_P
CLKIN_200MHZ_N
?
?
HTMCP_RST1#
2
?
SEC 2 OF 6
SEC 2 OF 6
HTMCP_RST# 12
C51
C51
HT_MCP_TXD0_P
HT_MCP_TXD1_P
HT_MCP_TXD2_P
HT_MCP_TXD3_P
HT_MCP_TXD4_P
HT_MCP_TXD5_P
HT_MCP_TXD6_P
HT_MCP_TXD7_P
HT_MCP_TXD8_P
HT_MCP_TXD9_P
HT_MCP_TXD10_P
HT_MCP_TXD11_P
HT_MCP_TXD12_P
HT_MCP_TXD13_P
HT_MCP_TXD14_P
HT_MCP_TXD15_P
HT_MCP_TXD0_N
HT_MCP_TXD1_N
HT_MCP_TXD2_N
HT_MCP_TXD3_N
HT_MCP_TXD4_N
HT_MCP_TXD5_N
HT_MCP_TXD6_N
HT_MCP_TXD7_N
HT_MCP_TXD8_N
HT_MCP_TXD9_N
HT_MCP_TXD10_N
HT_MCP_TXD11_N
HT_MCP_TXD12_N
HT_MCP_TXD13_N
HT_MCP_TXD14_N
HT_MCP_TXD15_N
HT_MCP_TX_CLK0_P
HT_MCP_TX_CLK0_N
HT_MCP_TX_CLK1_P
HT_MCP_TX_CLK1_N
HT_MCP_TXCTL_P
HT_MCP_TXCTL_N
CLKOUT_CTERM
SCLKIN_MCLKOUT_200MHZ_P
SCLKIN_MCLKOUT_200MHZ_N
HT_MCP_CAL_1P2V
HT_MCP_CAL_GND
HTMCP_DWN0
AC24
HTMCP_DWN1
AD23
HTMCP_DWN2
AC22
HTMCP_DWN3
AC20
HTMCP_DWN4
AB18
HTMCP_DWN5
AA17
HTMCP_DWN6
AB16
HTMCP_DWN7
AC16
AB21
AB20
AB19
W18
W15
AA15
Y14
W13
HTMCP_DWN#0
AC23
HTMCP_DWN#1
AD22
HTMCP_DWN#2
AC21
HTMCP_DWN#3
AD20
HTMCP_DWN#4
AC18
HTMCP_DWN#5
AB17
HTMCP_DWN#6
AB15
HTMCP_DWN#7
AD16
AB22
AA20
AA19
V17
V15
Y15
W14
Y13
AC19
AD19
Y17
W17
AC15
AD15
B22
A20
B20
AB23
AB24
Title
Title
Title
Document Number
Document Number
Document Number
MICRO-STAR INT'L CO.,LTD.
MICRO-STAR INT'L CO.,LTD.
MICRO-STAR INT'L CO.,LTD.
No. 69, Li-De St, Jung-He City,
No. 69, Li-De St, Jung-He City,
No. 69, Li-De St, Jung-He City,
Taipei Hsien, Taiwan
Taipei Hsien, Taiwan
Taipei Hsien, Taiwan
http://www.msi.com.tw
http://www.msi.com.tw
http://www.msi.com.tw
1
HTMCP_DWN[7..0]
HTMCP_DWN#[7..0]
HTMCP_DWNCLK0
HTMCP_DWNCLK0#
HTMCP_DWNCNTL
HTMCP_DWNCNTL#
R155 2.37K/1R155 2.37K/1
2.37K Ohm
MS-7252CH
MS-7252CH
MS-7252CH
Last Revision Date:
Last Revision Date:
Last Revision Date:
Sheet
Sheet
Sheet
1
VCC1_2
R148 150R1%R148 150R1%
R149 150R1%R149 150R1%
Micro Star Restricted Secret
Micro Star Restricted Secret
Micro Star Restricted Secret
C51PV-1/ HT CPU & MCP
C51PV-1/ HT CPU & MCP
C51PV-1/ HT CPU & MCP
HTMCP_DWN[7..0] 12
HTMCP_DWN#[7..0] 12
HTMCP_DWNCLK0 12
HTMCP_DWNCLK0# 12
HTMCP_DWNCNTL 12
HTMCP_DWNCNTL# 12
Friday, November 03, 2006
Friday, November 03, 2006
Friday, November 03, 2006
939
939
939
of
of
of
Rev
Rev
Rev
0A
0A
0A
![](/html/03/03b6/03b6543c2a5df5c7b89b33a1f4becf59c691f79585bdfdeaae45c72dd8571a48/bga.png)
5
U13B
U13B
?
?
J8
PED_RX017
PED_RX117
PED_RX217
PED_RX317
PED_RX417
PED_RX517
PED_RX617
PED_RX717
PC0_PRSNT#17
PE1_RX17
PE1_RX*17
PED_RX817
PED_RX917
PED_RX1017
PED_RX1117
PED_RX1217
PED_RX1317
PED_RX1417
PED_RX1517
PED_RX0*17
PED_RX1*17
PED_RX2*17
PED_RX3*17
PED_RX4*17
PED_RX5*17
PED_RX6*17
PED_RX7*17
PED_RX8*17
PED_RX9*17
PED_RX10*17
PED_RX11*17
PED_RX12*17
PED_RX13*17
PED_RX14*17
PED_RX15*17
R229 10KR0402R229 10KR0402
VCC3
PE1_RX*
D D
C C
PC1_PRSNT#17
R230 10KR0402R230 10KR0402
VCC3
R231 10KR0402R231 10KR0402
VCC3
1P2VPLL_PWR
1P2VPLL_PWR9,11
B B
FB21 X_0RFB21 X_0R
CP10
CP10
X_COPPER
X_COPPER
PLACE ON BACK SIDE
C603
C603
C0.1U16Y0402
C0.1U16Y0402
J6
K9
L6
L7
M9
N8
N6
R6
P3
R8
U6
T8
U7
V4
Y3
J7
J5
J9
L5
L8
M8
N7
N5
R5
P4
R7
U5
T9
U8
V3
AA3
D1
G6
H6
E2
J4
K3
E3
D3
E4
AC3
AB3
T11
PE0_RX0_P
PE0_RX1_P
PE0_RX2_P
PE0_RX3_P
PE0_RX4_P
PE0_RX5_P
PE0_RX6_P
PE0_RX7_P
PE0_RX8_P
PE0_RX9_P
PE0_RX10_P
PE0_RX11_P
PE0_RX12_P
PE0_RX13_P
PE0_RX14_P
PE0_RX15_P
PE0_RX0_N
PE0_RX1_N
PE0_RX2_N
PE0_RX3_N
PE0_RX4_N
PE0_RX5_N
PE0_RX6_N
PE0_RX7_N
PE0_RX8_N
PE0_RX9_N
PE0_RX10_N
PE0_RX11_N
PE0_RX12_N
PE0_RX13_N
PE0_RX14_N
PE0_RX15_N
PE0_PRSNT*
PE1_RX_P
PE1_RX_N
PE1_PRSNT*
PE2_RX_P
PE2_RX_N
PE2_PRSNT*
PE1_CLKREQ*/CLK
PE2_CLKREQ*/DATA
PE_REFCLKIN_P
PE_REFCLKIN_N
+1.2V_PLLPE
?
?
SEC 3 OF 6
SEC 3 OF 6
C51
C51
PE0_TX0_P
PE0_TX1_P
PE0_TX2_P
PE0_TX3_P
PE0_TX4_P
PE0_TX5_P
PE0_TX6_P
PE0_TX7_P
PE0_TX8_P
PE0_TX9_P
PE0_TX10_P
PE0_TX11_P
PE0_TX12_P
PE0_TX13_P
PE0_TX14_P
PE0_TX15_P
PE0_TX0_N
PE0_TX1_N
PE0_TX2_N
PE0_TX3_N
PE0_TX4_N
PE0_TX5_N
PE0_TX6_N
PE0_TX7_N
PE0_TX8_N
PE0_TX9_N
PE0_TX10_N
PE0_TX11_N
PE0_TX12_N
PE0_TX13_N
PE0_TX14_N
PE0_TX15_N
PE0_REFCLK_P
PE0_REFCLK_N
PE1_TX_P
PE1_TX_N
PE1_REFCLK_P
PE1_REFCLK_N
PE2_TX_P
PE2_TX_N
PE2_REFCLK_P
PE2_REFCLK_N
PE_TSTCLK_P
PE_TSTCLK_N
PE_RST*
PE_CTERM_GND
4
L1
L3
L4
M4
P1
R1
R3
R4
U4
V1
W1
W3
AA1
AB1
AC1
AD2
L2
M2
M3
N3
P2
R2
T2
T3
U3
V2
W2
Y2
AA2
AB2
AC2
AD3
K1
K2
G4
G5
G2
G3
H4
J3
H2
H3
F1
F2
G1
D2
PE1_TXPE1_RX
PE1_TX*
PE1_CLK
PE1_CLK*
R232 X_100RR232 X_100R
PE_RST*
PE_COMP
PED_TX0 17
PED_TX1 17
PED_TX2 17
PED_TX3 17
PED_TX4 17
PED_TX5 17
PED_TX6 17
PED_TX7 17
PED_TX8 17
PED_TX9 17
PED_TX10 17
PED_TX11 17
PED_TX12 17
PED_TX13 17
PED_TX14 17
PED_TX15 17
PED_TX0* 17
PED_TX1* 17
PED_TX2* 17
PED_TX3* 17
PED_TX4* 17
PED_TX5* 17
PED_TX6* 17
PED_TX7* 17
PED_TX8* 17
PED_TX9* 17
PED_TX10* 17
PED_TX11* 17
PED_TX12* 17
PED_TX13* 17
PED_TX14* 17
PED_TX15* 17
PE0_CLK
PE0_CLK*
PE1_TX 17
PE1_TX* 17
PE1_CLK 17
PE1_CLK* 17
PE_RST* 17
R228 2.37KR1%R228 2.37KR1%
PE0_CLK 17
PE0_CLK* 17
3
U13C
U13C
?
C20P50N
C20P50N
?
A5
DAC_RED
B6
DAC_GREEN
A6
DAC_BLUE
B7
DAC_HSYNC
C7
DAC_VSYNC
D8
DAC_RSET
D9
DAC_VREF
C8
DAC_IDUMP
A9
+3.3V_DAC
H13
+2.5V_PLLGPU
C9
XTAL_IN
B9
XTAL_OUT
R9
+1.2V_PLLGPU
P9
+1.2V_PLLCORE
H16
+1.2V_PLLIFP
?
?
10 mil7.5 mil
RÂGÂB-
HSYNC#
HSYNC#29
VSYNC#
VSYNC#29
R212 124R1%R212 124R1%
C279 C0.01U16X0402C279 C0.01U16X0402
3P3V_DAC
C268
C268
C20P50N
C20P50N
2P5V_PLL
Y2 27MHZ20P_DY2 27MHZ20P_D
C277
C277
C326
C326
C0.1U16Y0402
C0.1U16Y0402
2P5V_PLL9
1P2VPLL_PWR9,11
1P2VPLL_PWR
C0.1U16Y0402
C0.1U16Y0402
C327
C327
R28
2
C51
C51
SEC 4 OF 6
SEC 4 OF 6
C946
C946
X_C10P50N0603
X_C10P50N0603
1 2
IFPA_TXC_P
IFPA_TXC_N
IFPA_TXD0_P
IFPA_TXD1_P
IFPA_TXD2_P
IFPA_TXD3_P
IFPA_TXD0_N
IFPA_TXD1_N
IFPA_TXD2_N
IFPA_TXD3_N
IFPB_TXC_P
IFPB_TXC_N
IFPB_TXD4_P
IFPB_TXD5_P
IFPB_TXD6_P
IFPB_TXD7_P
IFPB_TXD4_N
IFPB_TXD5_N
IFPB_TXD6_N
IFPB_TXD7_N
IFPAB_PROBE
IFPAB_RSET
+2.5V_PLLIFP
+2.5V_PLLCORE
PKG_TEST
TEST_MODE_EN
JTAG_TCK
JTAG_TDI
JTAG_TDO
JTAG_TMS
JTAG_TRST*
R1000 0RR1000 0R
C14
B13
A15
D15
A14
F14
B15
C15
B14
E14
A10
B10
B11
E13
D13
B12
A11
F13
C13
C12
A16
F15
E16
H12
C4.7U10Y0805
C4.7U10Y0805
D17
C17
C18
B19
C19
B18
A19
TXC+
TXC-
TX0+
TX1+
TX2+
TX0ÂTX1ÂTX2-
IFPAB_PROBE
IFPAB_RSET
2P5V_PLL
2P5V_PLL
C951
C951
R177 1KR0402R177 1KR0402
JTAG_TCK
R172 X_10KR0402R172 X_10KR0402
JTAG_TDI
R169 X_10KR0402R169 X_10KR0402
JTAG_TMS
R163 X_10KR0402R163 X_10KR0402
JTAG_TRST*
R168 X_10KR0402R168 X_10KR0402
TXC+ 36
TXC- 36
TX0+ 36
TX1+ 36
TX2+ 36
TX0- 36
TX1- 36
TX2- 36
C0.1U16Y0402C258 C0.1U16Y0402C258
R182 1KR0402R182 1KR0402
3.3V FOR TMDS
2P5V_PLL 9
R-
44.9 ohm
TXC+
TXCÂTX0+
TX0ÂTX1+
TX1ÂTX2+
TX2-
1
R561
R561
49.9/4
49.9/4
VCC2_5
R562
R562
49.9/4
49.9/4
3P3V_IFPA
R563
R563
49.9/4
49.9/4
R564
R564
49.9/4
49.9/4
R565
R565
49.9/4
49.9/4
R566
R566
49.9/4
49.9/4
R567
R567
49.9/4
49.9/4
R568
R568
49.9/4
49.9/4
G
G28
C947
C947
X_C10P50N0603
X_C10P50N0603
R1002 0RR1002 0R
1 2
G-
VCC3
B
PMOS
Q46
_P-CMT2301GM233_SOT23-3-RH
_P-CMT2301GM233_SOT23-3-RH
DS
Q47
Q47
N-2N7002_SOT23
N-2N7002_SOT23
A A
ATX_PWR_OK123,26
G
Q46
G
R296 10KR0402R296 10KR0402
S
S
G
G
R511 X_0/0805R511 X_0/0805
D
D
D S
For C51G No DVI
3P3V_IFPA
3P3V_IFPA 11
15~20 mil width
VCC3
Ver : 0b del FB9
4A ?
CP17
CP17
X_COPPER
X_COPPER
C266
C266
X_C4.7U10Y0805
X_C4.7U10Y0805
3P3V_DAC
C267
C267
C0.1U16Y0402
C0.1U16Y0402
B28
R206
R206
R200
R200
R211
150R1%
150R1%
R211
150R1%
150R1%
150R1%
150R1%
C948
C948
X_C10P50N0603
X_C10P50N0603
PLACE NEAR C51
R1003 0RR1003 0R
1 2
TMDS Backdrive Prevention Circuit
5
4
3
2
B-
Micro Star Restricted Secret
Micro Star Restricted Secret
Micro Star Restricted Secret
Title
Title
Title
Document Number
Document Number
Document Number
C51PV-2 / PCI-E & DAC
C51PV-2 / PCI-E & DAC
C51PV-2 / PCI-E & DAC
MICRO-STAR INT'L CO.,LTD.
MICRO-STAR INT'L CO.,LTD.
MICRO-STAR INT'L CO.,LTD.
No. 69, Li-De St, Jung-He City,
No. 69, Li-De St, Jung-He City,
No. 69, Li-De St, Jung-He City,
Taipei Hsien, Taiwan
Taipei Hsien, Taiwan
Taipei Hsien, Taiwan
http://www.msi.com.tw
http://www.msi.com.tw
http://www.msi.com.tw
MS-7252CH
MS-7252CH
MS-7252CH
Last Revision Date:
Last Revision Date:
Last Revision Date:
Sheet
Sheet
Sheet
1
Rev
Rev
Rev
Friday, November 03, 2006
Friday, November 03, 2006
Friday, November 03, 2006
10 39
10 39
10 39
of
of
of
0A
0A
0A
![](/html/03/03b6/03b6543c2a5df5c7b89b33a1f4becf59c691f79585bdfdeaae45c72dd8571a48/bgb.png)
A
B
C
D
E
C51 DECOUPLING
PLACE ON BACK SIDE
VCC1_2
4 4
VCC1_2
3 3
VCC1_2HT
VCC3
G11
AB11
AA18
W16
E10
F10
F11
H11
T15
U13
U11
U16
U15
K16
M16
R16
M21
T16
U17
C21
H17
D18
C10
U13E
U13E
C51
C51
SEC 5 OF 6
B5
+1.2V_CORE
C6
+1.2V_CORE
D7
+1.2V_CORE
E8
+1.2V_CORE
E9
+1.2V_CORE
+1.2V_CORE
+1.2V_CORE
+1.2V_CORE
+1.2V_CORE
+1.2V_CORE
J11
+1.2V_CORE
J12
+1.2V_CORE
J13
+1.2V_CORE
J14
+1.2V_CORE
+1.2V_HTMCP
+1.2V_HTMCP
+1.2V_HTMCP
Y9
+1.2V_HTMCP
+1.2V_HTMCP
+1.2V_HTMCP
+1.2V_HTMCP
+1.2V_HTMCP
+1.2V_HTMCP
B4
+1.2V_PED
C5
+1.2V_PED
D6
+1.2V_PED
E7
+1.2V_PED
+1.2V_HT
+1.2V_HT
+1.2V_HT
+1.2V_HT
J20
+1.2V_HT
+1.2V_HT
+1.2V_HT
+1.2V_HT
+1.2V_HT
+3.3V
+3.3V
?
?
SEC 5 OF 6
+1.2V_PEA
+1.2V_PEA
+1.2V_PEA
+1.2V_PEA
+1.2V_PEA
+1.2V_PEA
+1.2V_PEA
+1.2V_PEA
+1.2V_PLL
+1.2V_PLL
+1.2V_PLL
+1.2V_PLL
+1.2V_PLL
+1.2V_PLL
+1.2V_PLL
+1.2V_PLL
+1.2V_PLL
+1.2V_PLL
+1.2V_PLL
+1.2V_PLL
+2.5V_CORE
+2.5V_CORE
+2.5V_IFPA
+2.5V_IFPB
FB11
FB11
X_30L3_15_0805
X_30L3_15_0805
A3
B3
C4
D5
E6
F7
F8
F9
A2
B2
C2
C3
D4
E5
F6
G7
G8
G9
H10
J10
C16
B16
G15
H15
FB12
FB12
X_30L3_15_0805
X_30L3_15_0805
VCC2_5
3P3_IFPA_L
CP5
CP5
X_COPPER
X_COPPER
1P2VPEA_PWR
VCC1_2
C667
C667
C0.1U25Y
C0.1U25Y
CP7
CP7
X_COPPER
X_COPPER
1P2VPLL_PWR
C228
C228
C4.7U10Y0805
C4.7U10Y0805
1P2VPLL_PWR 9,10
FB31 X_0RFB31 X_0R
CP25
CP25
X_COPPER
X_COPPER
3P3V_IFPA 10
3.3V FOR TMDS
X_C10U10Y0805
X_C10U10Y0805
VCC1_2
C608
C608
C1U10Y
C1U10Y
VCC1_2
C288
C288
X_C10U10Y0805
X_C10U10Y0805
1P2VPLL_PWR
C328
C328
C4.7U10Y0805
C4.7U10Y0805
C4.7U10Y0805
C4.7U10Y0805
C308
C308
C10U10Y0805
C10U10Y0805
X_C4.7U10Y0805
X_C4.7U10Y0805
VCC1_2HT
C592
C592
PLACE ON BACK SIDE
CENTER OF C51
C606
C606
C0.1U16Y0402
C0.1U16Y0402
C1U10Y
C1U10Y
C278
C278
C264
C264
X_C0.1U16Y0402
X_C0.1U16Y0402
C329
C329
C602
C602
C0.1U16Y0402
C0.1U16Y0402
1P2VPEA_PWR
*
C309
C309
X_C0.1U16Y0402
X_C0.1U16Y0402
C593
C593
C283
C283
C609
C609
C0.1U16Y0402
C0.1U16Y0402
X_C0.1U16Y0402
X_C0.1U16Y0402
C271
C271
X_C0.1U16Y0402
X_C0.1U16Y0402
X_C0.1U16Y0402
X_C0.1U16Y0402
C607
C607
C0.1U16Y0402
C0.1U16Y0402
C0.1U16Y0402
C0.1U16Y0402
*
C321
C321
C324
C324
C0.1U16Y0402
C0.1U16Y0402
C1U10Y
C1U10Y
C251
C251
C245
C245
C610
C610
C0.1U16Y0402
C0.1U16Y0402
C287
C287
C0.1U16Y0402
C0.1U16Y0402
C611
C611
C0.1U16Y0402
C0.1U16Y0402
C323
C323
C0.1U16Y0402
C0.1U16Y0402
C211
C211
C605
C605
**
C260
C260
C281
C281
X_C0.1U16Y0402
X_C0.1U16Y0402
X_C0.1U16Y0402
X_C0.1U16Y0402
*
C604
C604
C330
C330
X_C0.1U16Y0402
X_C0.1U16Y0402
X_C0.1U16Y0402
X_C0.1U16Y0402
C322
C322
C0.1U16Y0402
C0.1U16Y0402
*
C220
C220
C282
C282
*
C331
C331
C325
C325
C0.1U16Y0402
C0.1U16Y0402
*
C177
C177
C298
C298
C178
C178
*
C182
C182
VCC1_2
C594
C594
C0.1U16Y0402
C0.1U16Y0402
C0.1U16Y0402
C0.1U16Y0402
C0.1U16Y0402
C0.1U16Y0402
**
C215
C215
MCPHT CORE BALLS
C596
C596
VCC3
C383
C383
X_C0.1U16Y0402
C0.1U16Y0402
C0.1U16Y0402
2 2
B1
E11
L12
P14
N14
M14
P13
N13
M13
P12
N12
M12
P11
N11
M11
L11
AA24
AA23
A23
AA22
V22
R22
L22
F22
AB6
C22
H21
Y16
G13
U12
AB14
R17
C20
T14
V19
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
C51
C51
SEC 6 OF 6
SEC 6 OF 6
?
?
U13D
U13D
1 1
GNDC1GND
AA21
GND
AA13
GND
GND
GND
GND
GND
E12
C11
U14
AA4
AB4
A
GND
GND
GND
GND
GND
GND
GND
F12
E15
E18
Y18
U18
D11
AB10
GND
GND
GND
GND
GND
GND
GND
J17
F16
E17
Y11
N17
U19
G17
GND
GND
GND
GND
GND
GND
GND
J16
L21
T12
F17
T17
H19
D19
GND
GND
GND
GND
GND
GND
GND
J15
L13
L14
T19
P19
H14
M19
B
V8
PE_GNDF4PE_GNDV6PE_GNDK8PE_GNDH8PE_GNDW8PE_GNDW6PE_GNDT6PE_GNDP6PE_GNDM6PE_GNDK6PE_GND
?
?
PE_GNDU9PE_GNDY4PE_GNDW4PE_GNDT4PE_GNDN4PE_GNDK4PE_GNDN9PE_GNDP8PE_GNDL9PE_GNDF3PE_GND
H9
C
C0.1U16Y0402
C0.1U16Y0402
C0.1U16Y0402
C0.1U16Y0402
C0.1U16Y0402
C0.1U16Y0402
C0.1U16Y0402
C0.1U16Y0402
X_C0.1U16Y0402
X_C0.1U16Y0402
X_C0.1U16Y0402
X_C0.1U16Y0402
X_C0.1U16Y0402
X_C0.1U16Y0402
X_C0.1U16Y0402
D
X_C0.1U16Y0402
X_C0.1U16Y0402
Micro Star Restricted Secret
Micro Star Restricted Secret
Micro Star Restricted Secret
Title
Title
Title
Document Number
Document Number
Document Number
MICRO-STAR INT'L CO.,LTD.
MICRO-STAR INT'L CO.,LTD.
MICRO-STAR INT'L CO.,LTD.
No. 69, Li-De St, Jung-He City,
No. 69, Li-De St, Jung-He City,
No. 69, Li-De St, Jung-He City,
Taipei Hsien, Taiwan
Taipei Hsien, Taiwan
Taipei Hsien, Taiwan
http://www.msi.com.tw
http://www.msi.com.tw
http://www.msi.com.tw
C51PV-3/PWR/GND
C51PV-3/PWR/GND
C51PV-3/PWR/GND
MS-7252CH
MS-7252CH
MS-7252CH
Last Revision Date:
Last Revision Date:
Last Revision Date:
Sheet
Sheet
Sheet
E
Rev
Rev
Rev
0A
0A
0A
Friday, November 03, 2006
Friday, November 03, 2006
Friday, November 03, 2006
11 39
11 39
11 39
of
of
of
![](/html/03/03b6/03b6543c2a5df5c7b89b33a1f4becf59c691f79585bdfdeaae45c72dd8571a48/bgc.png)
5
R268
R268
1.5KR
1.5KR
HTMCP_DWN[7..0]
HTMCP_DWN#[7..0]
HTMCP_DWNCLK09
HTMCP_DWNCLK0#9
HTMCP_DWNCNTL9 HTMCP_UPCNTL 9
HTMCP_DWNCNTL#9
R264 150R1%R264 150R1%
R265 49.9R1%R265 49.9R1%
SLP_S5#13,23
HTMCP_DWN0
HTMCP_DWN1
HTMCP_DWN2
HTMCP_DWN3
HTMCP_DWN4
HTMCP_DWN5
HTMCP_DWN6
HTMCP_DWN7
HTMCP_DWN#0
HTMCP_DWN#1
HTMCP_DWN#2
HTMCP_DWN#3
HTMCP_DWN#4
HTMCP_DWN#5
HTMCP_DWN#6
HTMCP_DWN#7
HTMCP_DWNCLK0
HTMCP_DWNCLK0#
HTMCP_DWNCNTL
HTMCP_DWNCNTL#
HTMCP_REQ#
HTMCP_STOP#
HTMCP_COMP_GND1
HTMCP_COMP_GND2
HT_VLD
SLP_S5#
HTVDD_EN
VCORE_EN
HTMCP_DWN0
HTMCP_DWN1
HTMCP_DWN2
HTMCP_DWN3
HTMCP_DWN4
HTMCP_DWN5
HTMCP_DWN6
HTMCP_DWN7
HTMCP_DWN*0
HTMCP_DWN*1
HTMCP_DWN*2
HTMCP_DWN*3
HTMCP_DWN*4
HTMCP_DWN*5
HTMCP_DWN*6
HTMCP_DWN*7
VCC1_5
VOLTAGE = 3.3 V
C388
C388
X_C10U10Y0805
X_C10U10Y0805
C0.1U16Y0402
C0.1U16Y0402
C397
C397
C0.01U16X0402
C0.01U16X0402
+3.3V_PLL_CPU_HT
C402
C402
HTMCP_DWN[7..0]9
D D
HTMCP_DWN#[7..0]9
VCC3 VCC3
R256
R256
1.5KR
1.5KR
HTMCP_REQ#9
HTMCP_STOP#9
C C
VCC3
FB13 X_0RFB13 X_0R
C385
C385
CP26
CP26
X_COPPER
X_C10P50N0402
X_C10P50N0402
B B
A A
X_COPPER
5
K1
L1
M1
N1
R1
T1
U1
V1
K2
L2
M2
N2
R2
T2
U2
V2
P1
P2
W1
W2
AD1
AA5
AB1
AB2
F22
N26
M24
F23
N25
M6
M5
C350
C350
C0.1U16Y0402
C0.1U16Y0402
C_BE#[3..0]16,21
MS6_RST*23
1394_RST*21
SIO_RST*18
4
U17G
U17G
HT_MCP_RXD0_P
HT_MCP_RXD1_P
HT_MCP_RXD2_P
HT_MCP_RXD3_P
HT_MCP_RXD4_P
HT_MCP_RXD5_P
HT_MCP_RXD6_P
HT_MCP_RXD7_P
HT_MCP_RXD0_N
HT_MCP_RXD1_N
HT_MCP_RXD2_N
HT_MCP_RXD3_N
HT_MCP_RXD4_N
HT_MCP_RXD5_N
HT_MCP_RXD6_N
HT_MCP_RXD7_N
HT_MCP_RX_CLK_P
HT_MCP_RX_CLK_N
HT_MCP_RXCTL_P
HT_MCP_RXCTL_N
HT_MCP_REQ*
HT_MCP_STOP*
HT_MCP_COMP_GND1
HT_MCP_COMP_GND2
HT_VLD
CPU_VLD
MEM_VLD
HTVDD_EN
CPUVDD_EN
+1.5V_PLL_CPU_HT
+3.3V_PLL_CPU_HT
AD[31..0]16,21
C_BE#[3..0]
4
MCP51
MCP51
SEC 1 OF 7
SEC 1 OF 7
AD[31..0]
0
1
2
3
FRAME#16,21
IRDY#16,21
TRDY#16,21
STOP#16,21
DEVSEL#16,21
PAR16,21
PERR#16,21
SERR#16
PME#16,21
R321 33R0402R321 33R0402
R344 33R0402R344 33R0402
R330 33R0402R330 33R0402
HT_MCP_TXD0_P
HT_MCP_TXD1_P
HT_MCP_TXD2_P
HT_MCP_TXD3_P
HT_MCP_TXD4_P
HT_MCP_TXD5_P
HT_MCP_TXD6_P
HT_MCP_TXD7_P
HT_MCP_TXD0_N
HT_MCP_TXD1_N
HT_MCP_TXD2_N
HT_MCP_TXD3_N
HT_MCP_TXD4_N
HT_MCP_TXD5_N
HT_MCP_TXD6_N
HT_MCP_TXD7_N
HT_MCP_TX_CLK_P
HT_MCP_TX_CLK_N
HT_MCP_TXCTL_P
HT_MCP_TXCTL_N
CLKOUT_200MHZ_P
CLKOUT_200MHZ_N
CLKOUT_25MHZ
HT_MCP_PWRGD
HT_MCP_RST*
THERMTRIP*/GPIO
CLK200MHZ_TERM_GND
JTAG_TCK
JTAG_TDI
JTAG_TDO
JTAG_TMS
JTAG_TRST*
AD0
AF19
AD1
AB21
AD2
AC19
AD3
AA20
AD4
AA19
AD5
AF20
AD6
AE19
AD7
AE20
AD8
AB20
AD9
AB19
AD10
AA18
AD11
AB18
AD12
AE18
AD13
AF18
AD14
AC17
AD15
AA17
AD16
AB15
AD17
AF15
AD18
AE15
AD19
AF14
AD20
AE14
AD21
AA14
AD22
AB14
AD23
AC13
AD24
AB13
AD25
AE13
AD26
AA12
AD27
AF13
AD28
AB12
AD29
AF12
AD30
AE12
AD31
AF11
PCI_C/BE*0
C_BE#0
AD19
PCI_C/BE*1
C_BE#1
AB17
C_BE#2
AA15
PCI_C/BE*3
C_BE#3
AA13
FRAME#
AC15
IRDY#
AD15
TRDY#
AB16
STOP#
AE16
DEVSEL#
AA16
PAR
AE17
PERR#
AF16
SERR#
AF17
PME#
AD11
PCI_CLKRUN#
AF25
AE25
AD24
MS6RST*
AE26
1394RST*
W22
SIORST*
L26
HTMCP_UP0
AA1
HTMCP_UP1
Y1
HTMCP_UP2
AA3
HTMCP_UP3
W5
HTMCP_UP4
U5
HTMCP_UP5
T5
HTMCP_UP6
R5
HTMCP_UP7
P5
HTMCP_UP#0
AA2
HTMCP_UP#1
Y2
HTMCP_UP#2
AA4
HTMCP_UP#3
W6
HTMCP_UP#4
U6
HTMCP_UP#5
T6
HTMCP_UP#6
R6
HTMCP_UP#7
P6
HTMCP_UPCLK0
V5
HTMCP_UPCLK0#
V6
HTMCP_UPCNTL
N5
HTMCP_UPCNTL#
N6
MCPOUT_200MHZ
AC1
MCPOUT_200MHZ#
AC2
MCPOUT25MHZ
Y5
AD2
AE1
J6
CLK200MHZ_TERMP_GND
K6
MCP51_TCK
H22
MCP51_TDI
H21
H23
MCP51_TMS
D26
MCP51_TRST#
F25
U17A
U17A
PCI_AD0
PCI_AD1
PCI_AD2
PCI_AD3
PCI_AD4
PCI_AD5
PCI_AD6
PCI_AD7
PCI_AD8
PCI_AD9
PCI_AD10
PCI_AD11
PCI_AD12
PCI_AD13
PCI_AD14
PCI_AD15
PCI_AD16
PCI_AD17
PCI_AD18
PCI_AD19
PCI_AD20
PCI_AD21
PCI_AD22
PCI_AD23
PCI_AD24
PCI_AD25
PCI_AD26
PCI_AD27
PCI_AD28
PCI_AD29
PCI_AD30
PCI_AD31
PCI_CBE0*
PCI_CBE1*
PCI_CBE2*
PCI_CBE3*
PCI_FRAME*
PCI_IRDY*
PCI_TRDY*
PCI_STOP*
PCI_DEVSEL*
PCI_PAR
PCI_PERR*/GPIO
PCI_SERR*
PCI_PME*/GPIO
PCI_CLKRUN*/GPIO
PCI_RESET0*
PCI_RESET1*
PCI_RESET2*
PCI_RESET3*
LPC_RESET*
HTMCP_UP0
HTMCP_UP1
HTMCP_UP2
HTMCP_UP3
HTMCP_UP4
HTMCP_UP5
HTMCP_UP6
HTMCP_UP7
HTMCP_UP*0
HTMCP_UP*1
HTMCP_UP*2
HTMCP_UP*3
HTMCP_UP*4
HTMCP_UP*5
HTMCP_UP*6
HTMCP_UP*7
SEC 2 OF 7
SEC 2 OF 7
3
R259
R259
22R0402
22R0402
R332 10KR0402R332 10KR0402
R348 10KR0402R348 10KR0402
R351 10KR0402R351 10KR0402
R333 10KR0402R333 10KR0402
MCP51
MCP51
3
HTMCP_UP[7..0]
HTMCP_UP#[7..0]
HTMCP_UPCLK0 9
HTMCP_UPCLK0# 9
HTMCP_UPCNTL# 9
MCPOUT_200MHZ 9
MCPOUT_200MHZ# 9
MCPOUT_25MHZ
R262 562R1%R262 562R1%
PCI_REQ0*
PCI_REQ1*
PCI_REQ2*
PCI_REQ3*/GPIO
PCI_REQ4*/GPIO
PCI_GNT0*
PCI_GNT1*
PCI_GNT2*
PCI_GNT3*/GPIO
PCI_GNT4*/GPIO
PCI_INTW*
PCI_INTX*
PCI_INTY*
PCI_INTZ*
PCI_CLK0
PCI_CLK1
PCI_CLK2
PCI_CLK3
PCI_CLK4
PCI_CLKIN
LPC_AD0
LPC_AD1
LPC_AD2
LPC_AD3
LPC_FRAME*
LPC_DRQ0*
LPC_DRQ1*/LPC_CS*
LPC_SERIRQ
LPC_PWRDWN*/GPIO
LPC_CLK0
LPC_CLK1
HTMCP_UP[7..0] 9
HTMCP_UP#[7..0] 9
MCPOUT_25MHZ 9
CPU_THRIP# 3
VCC3
AA22
AE22
AF21
AF22
AE23
AE21
AC21
AA21
AB24
AB22
AE11
AB11
AC11
AA11
AE24
AF24
AD23
AF23
AB23
AC23
K24
H26
H25
K22
G25
K21
K23
L22
H24
F26
G26
X_C10P50N0402
X_C10P50N0402
R267
R267
1.5KR
1.5KR
PCICLK1394
R313 22R0402R313 22R0402
PCICLK1
R308 22R0402R308 22R0402
PCICLK2
R317 22R0402R317 22R0402
PCICLK4
R323 22R0402R323 22R0402
Length=PCICLK+3 inch
LPC_AD0
LPC_AD1
LPC_AD2
LPC_AD3
LPC_FRAME#
LPC_DRQ#0
LPC_CS#
SERIRQ
SIOPCLK
LPCPCLK
C483
C483
VCC3VCC3
R266
R266
1.5KR
1.5KR
HTMCP_PWRGD
HTMCP_RST#
1394REQ* 16,21
PCI1REQ* 16
PCI2REQ* 16
PCIEXT1REQ* 16
PCIEXT2REQ* 16
1394GNT* 21
PCI1GNT* 16
PCI2GNT* 16
TP22TP22
TP21TP21
PCI_INTA* 16,21
PCI_INTB* 16
PCI_INTC* 16
PCI_INTD* 16
PCI_CLKIN
LPC_FRAME# 18
LPC_DRQ#0 18
SERIRQ 18
R350 22R0402R350 22R0402
R349 22R0402R349 22R0402
C484
C484
X_C10P50N0402
X_C10P50N0402
2
HTMCP_PWRGD 9
HTMCP_RST# 9
PCICLK_1394 21
PCICLK_SLOT1 16
PCICLK_SLOT2 16
LPC_AD[3..0] 18
2
TP23TP23
SIO_PCLK 18
LPC_PCLK 18
POWER SEQUENCE
C499
C499
C0.1U16Y0402
C0.1U16Y0402
R315 1KR0402R315 1KR0402
HT_PWRGD23
R316 0R0402R316 0R0402
3VDUAL
VCC3
MCPOUT25MHZ
PCICLK4
PCICLK2
PCICLK1394
PCICLK1
R289 8.2KR0402R289 8.2KR0402
R312 8.2KR0402R312 8.2KR0402
LPC_DRQ#0
LPC_CS#
SERIRQ
VCC3
Title
Title
Title
Document Number
Document Number
Document Number
1
SLP_S5#VCORE_EN
C500
C500
C0.1U16Y0402
C0.1U16Y0402
R311 0R0402R311 0R0402
C395 X_C10P50N0402C395 X_C10P50N0402
C479 X_C10P50N0402C479 X_C10P50N0402
C475 X_C10P50N0402C475 X_C10P50N0402
C474 X_C10P50N0402C474 X_C10P50N0402
C464 X_C10P50N0402C464 X_C10P50N0402
PME#
PCI_CLKRUN#
R345 8.2KR0402R345 8.2KR0402
R331 8.2KR0402R331 8.2KR0402
R346 10KR0402R346 10KR0402
For EMI
C503 X_C10P50N0402C503 X_C10P50N0402
C519 X_C10P50N0402C519 X_C10P50N0402
C478 X_C10P50N0402C478 X_C10P50N0402
C168 X_C10P50N0402C168 X_C10P50N0402
Micro Star Restricted Secret
Micro Star Restricted Secret
Micro Star Restricted Secret
MCP51-1/ HT & PCI
MCP51-1/ HT & PCI
MCP51-1/ HT & PCI
MS-7252CH
MS-7252CH
MICRO-STAR INT'L CO.,LTD.
MICRO-STAR INT'L CO.,LTD.
MICRO-STAR INT'L CO.,LTD.
No. 69, Li-De St, Jung-He City,
No. 69, Li-De St, Jung-He City,
No. 69, Li-De St, Jung-He City,
Taipei Hsien, Taiwan
Taipei Hsien, Taiwan
Taipei Hsien, Taiwan
http://www.msi.com.tw
http://www.msi.com.tw
http://www.msi.com.tw
MS-7252CH
1
HT_VLDHTVDD_EN
C469
C469
C0.1U16Y0402
C0.1U16Y0402
Last Revision Date:
Last Revision Date:
Last Revision Date:
Sheet
Sheet
Sheet
VCC3
Friday, November 03, 2006
Friday, November 03, 2006
Friday, November 03, 2006
12 39
12 39
12 39
Rev
Rev
Rev
0A
0A
0A
of
of
of