MSI MS-7313 Schematic 0a

1

1Cover Sheet
Block Diagram/Clock Map/Power Map
Intel LGA775 CPU
Intel Lakeport - MCH
Intel ICH7 - PCI & DMI & CPU & IRQ
Intel ICH7 - LPC & ATA & USB & GPIO 13
Intel ICH7 - POWER
Clock - RTM 876-665
LPC I/O - Fintek 71882FG
LAN REALTEK RTL8111C/8101E
DDR II DIMM A
DDR II DIMM B
DDR II VTT Decoupling
Azalia - ALC888
PCI EXPRESS X16 Slot

A A

PCI Slot 1 & 2
ATA33/66/100 IDE & SATA Connectors
USB Connectors
ATX Connetcor & Front Panel
VGA Connector
UPI ACPI CONTROLLER
GMCH VCORE
PWM-ST L6703TR

2-4
5-7

8-11

12

14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30

Version 0A

MS-7313

CPU:

Intel Prescott ( L2=2MB ) - 3.4G & Above
Intel Cendar Mill (65nm) - 3.73G & Above
Intel Smithfield (90nm Dual core)
Intel Conroe (65W Dual core)

System Chipset:

Intel Lakeport - MCH (North Bridge)
Intel ICH7R (South Bridge)

On Board Chipset:

BIOS -- SPI
HD -- ALC888
LPC Super I/O -- F71882FG
LAN-- REALTEK RTL8111C Co-lay RTL8101E
CLOCK -- RTM876-665

Main Memory:

DDR II *2 (Max 4GB)

Expansion Slots:

PCI2.3 SLOT * 2
PCI EXPRESS X16 SLOT

ST PWM:

Controller: 3 PHASES

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MS-7313

MS-7313

Cover Sheet

Cover Sheet

Cover Sheet

MS-7313

Sheet of

Sheet of

Sheet of

133

133

133

0A

0A

0A

MSI

MSI

MSI

Size Document Description Rev

Size Document Description Rev

Size Document Description Rev

Custom

Custom

Custom

Date:

Monday, November 26, 2007

Date:

Monday, November 26, 2007

Date:

1

Monday, November 26, 2007

Block Diagram

1

VRM 10.1
RT6703
3-Phase PWM

Analog

RGB

Video
Out

UltraDMA
33/66/100

IDE Primary

A A

SATA 0~3

SATA

USB

Intel LGA775 Processor

FSB 533/800/1066

133/200/266
MHz

FSB

Lakeport
GMCH

DMI

ICH7

DDR2 400/533/667

DDRII

200/266/333
MHz

PCI

2DDR II
DIMM
Modules

PCI EXPRESS X16

PCI Slot 1

PCI Slot 2

PCI EXPRESS
X16
Connector

USB Port 0~7

HD

LPC Bus

ALC888

PCI

LPC SIO

RTL8111C

Fintek
F71882F

TPM

Keyboard

Mouse

Floopy Parallel Serial

1

SPI

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MS-7313

MS-7313

MSI

MSI

MSI

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Custom

Custom

Custom

Date:

Friday, November 09, 2007

Date:

Friday, November 09, 2007

Date:

Friday, November 09, 2007

MS-7313

BLOCK DIAGRAM

BLOCK DIAGRAM

BLOCK DIAGRAM

Sheet of

Sheet of

Sheet of

233

233

233

0A

0A

0A

5

4

3

2

1

CLOCK MAP

D D

HCLK

LGA775

MCHCLK

DOT96M

945GC

DDRCLKA

CH A

CH B

DDRCLKB

PCIECLK

PCIECLK

C C

RTM876-660

SATACLK

ICHCLK

USB48MHz

ICH7

ICH14.318MHz

SIO48MHz

33MHz

Fintek SIO

HDCLK 24M

　ALC888

B B

TPMCLK_33M

TPM

PCIELAN_100M

RTL8111C

PCIEX16 100MHz

PCIEX1 100MHz

A A

PCICLK[0..1]

33MHz

5

4

PCIE X 16

PCIE X 1

PCI1

PCI2

3

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MS-7313

MS-7313

MSI

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Custom

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Custom

CLOCK MAP

CLOCK MAP

CLOCK MAP

Date:

Friday, November 09, 2007

Date:

Friday, November 09, 2007

Date:

2

Friday, November 09, 2007

MS-7313

1

Sheet of

Sheet of

Sheet of

333

333

333

0A

0A

0A

5

4

3

2

1

Processor

0.8375-1.6000V Core-125A

1.2V FSB Vtt-5.3A
VCCPLL

D D

VCC-IOPLL & VCCA

L6703 Regulator

VCCP

0.8375-1.6000V

W83310DS Regula

VTT_DDR

0.9V

DDR2 DIMM conn(4) & term

0.9V SM Vtt-1.2A(S0)

945G/P MCH

1.2V FSB Vtt-0.9A

1.8V DDR2 I/O-4.4A(S0,S1)

VTT Regulator

V_FSB_VTT

1.2V

1.8V DDR2 I/O-25mA(S3)

0.9V DDR2 VREF-2mA

0.9V DDR2 SB_VREF-10uA
DDR2 Resister Comp V-36mA
DDR2 Resis Comp SB_V-10uA

Divider

R

uP6103 Regulator

VCC_DDR

1.8V

1.5V Core-13.8A(Integrated)

1.5V Core-8.9A(Discrete)

1.5V PCI Express&DMI-1.5A

1.5V PCIE&DMI PLL-45mA

C C

1.5V HOST PLL-45mA

1.5V VCCA_DPLLA&B-55mA

uP6103 Regulator

V_1P5_CORE

1.5V

1.5V MPLL-66mA

2.5V DAC-70mA*

2.5V HV-3mA

2.5V CMOS-2.0mA

uP7707 Regulator

V_2P5_MCH

2.5V

1.8V Vdd/vddq-4.7A(S0,S1)

PCIE X16 slot(1)

+12V-5.5A
+3.3Vaux-375mA(wake)
+3.3Vaux-20mA(no wake)
+3.3V-3.0A

PCIE X1 slot(1)

+12V-0.5A
+3.3Vaux-375mA(wake)
+3.3Vaux-20mA(no wake)
+3.3V-3.0A

PCI slot slot(4)

+3.3Vaux-375mA(wake)
+3.3Vaux-20mA(no wake)
+3.3V-7.6A
+5.0V-5.0A
+12V-0.5A

ICH7

1.2V VCC_CPU-14mA

1.05V Core-0.86A
VCC1_5A*-1.01A
VCC1_5B*-0.77A
5VRef-6mA

R

1.05V Regulator

V_1P05_CORE

1.05V

5VrefSus-10mA
+3.3V-0.33A

B B

RTC-6uA(G3)

3.3V VccSus*-52mA
VccSus1_05V-See Note 1

uP7706 Regulator

3VSB

3.3V

uP7501 Regulator

5VDIMM

5V

-12V-0.1A

USB

+5V-4A(S0,S1)

PS2

+5V-345mA(S0,S1)

CLKGEN

+3.3V-560mA
VccUSBPLL-10mA
VccDMIPLL-50mA
VccSATAIPLL-50mA

L
L

LAN

3VSB-

Battery

SIO

+3.3V

3VSB-

+5VSB+12V +5V +3.3V+12V

Audio Codec

SPI ROM

ATX

A A

2x2

5

4

ATX POWER

3

1394

MICRO-STAR INT'L CO.,LTD

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MS-7313

MS-7313

MSI

MSI

MSI

Size Document Description Rev

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Size Document Description Rev

Custom

Custom

Custom

Date:

Friday, November 09, 2007

Date:

Friday, November 09, 2007

Date:

2

Friday, November 09, 2007

MS-7313

LGA775 - Signal

LGA775 - Signal

LGA775 - Signal

1

Sheet of

Sheet of

Sheet of

433

433

433

0A

0A

0A

5

4

3

VCC_SENSE

VCC_SENSE 30

2

1

CPU SIGNAL BLOCK PULL HIGHT PULL DOWN

VSS_SENSE

H_A#[3..31]8

D D

H_A#8

H_A#10

H_A#5

H_A#6

H_A#7

H_A#3

H_A#31

H_A#28

H_A#29

H_A#30

H_A#27

H_A#24

H_A#25

H_A#26

H_A#22

H_A#21

H_A#23

H_A#18

H_A#17

H_A#20

H_A#19

H_A#16

H_A#15

H_A#11

H_A#12

H_A#13

H_A#14

AJ6

AJ5

AH5

AH4

AG5

AG4

AG6

AF4

AF5

AB4

AC5

AB5

AA5

AD6

AA4

E19

A23#

D40#

E18

H_D#39

A22#

D39#

H_D#38

A21#

D38#

F18

H_D#37

AB6

A20#Y4A19#Y6A18#W6A17#

D37#

D36#

D35#

F17

E16

G17

G18

H_D#34

H_D#35

H_D#36

A16#W5A15#V4A14#V5A13#U4A12#U5A11#T4A10#

D34#

D33#

D32#

D31#

D30#

D29#

F15

E15

G16

G15

G14

H_D#28

H_D#29

H_D#30

H_D#31

H_D#32

H_D#33

D28#

F14

U1A

U1A

A35#

A34#

A33#

A32#

A31#

A30#

A29#

A28#

A27#

A26#

A25#

A24#

D47#

D46#

D45#

D44#

D43#

D42#

D41#

F21

F20

E22

E21

D22

G21

H_D#45

H_D#44

H_D#43

H_D#42

H_D#41

H_D#40

H_D#46

4

H_TDI
H_TDO
H_TMS
H_TRST#
H_TCK
PECI
VTIN1
GNDHM
H_TRMTRIP#

H_PROCHOT#
H_IGNNE#
ICH_H_SMI#
H_A20M#

H_TESTHI13

NC_0402_6

R72 X_0R0402R72 X_0R0402

R80

R80

CPU_BSEL0
CPU_BSEL1
CPU_BSEL2

H_DBI#0
H_DBI#1
H_DBI#2
H_DBI#3

H_DBI#[0..3]8

H_IERR#6

H_FERR#12

H_STPCLK#12

H_INIT#12

H_DBSY#8

H_DRDY#8

H_TRDY#8

H_ADS#8

C C

H_CPUSLP#12

CPU_BSEL016
CPU_BSEL116
CPU_BSEL216

VTT_OUT_RIGHT

H_D#[0..63]8

RN26

RN26
8P4R-470R0402

8P4R-470R0402

B B

A A

H_LOCK#8

H_BNR#8

H_HIT#8
H_HITM#8
H_BPRI#8

H_DEFER#8

GNDHM16

H_TRMTRIP#12

H_PROCHOT#6

H_IGNNE#12

ICH_H_SMI#12

H_A20M#12

R103 X_0R0402R103 X_0R0402

H_BPM#1

Kentsfield

CPU_BSEL016
CPU_BSEL116
CPU_BSEL216

H_PWRGD6,12

H_CPURST#6,8

V_FSB_VTT

135

246

5

PECI16
VTIN116

X_1KR0402

X_1KR0402

R77 X_51R0402R77 X_51R0402

7

8

H_D#63
H_D#62
H_D#61
H_D#60
H_D#59
H_D#58
H_D#57
H_D#56
H_D#55
H_D#54

G11
D19
C20

AB2
AB3

AD3

AD1
AF1
AC1
AG1
AE1

AL1
AK1

AE8
AL2

AH2
AE6
D16

A20

AA2
G29

H30
G30

G23

B22
A22
A19
B19
B21
C21
B18
A17
B16
C18

A8

R3
M3

P3
H4

B2
C1
E3

D2
C3
C2
D4
E4
G8
G7

G5

M2

N2
P2
K3

L2

N5
C9

Y1
V2

N1

DBI0#
DBI1#
DBI2#
DBI3#

IERR#
MCERR#
FERR#/PBE#
STPCLK#
BINIT#
INIT#
RSP#

DBSY#
DRDY#
TRDY#

ADS#
LOCK#
BNR#
HIT#
HITM#
BPRI#
DEFER#

TDI
TDO
TMS
TRST#
TCK
PECI
THERMDA
THERMDC
THERMTRIP#
GND/SKTOCC#
PROCHOT#
IGNNE#
SMI#
A20M#
TESTI_13

RSVD#AH2
RESERVED0
RESERVED1
RESERVED2
RESERVED4
RESERVED5

BOOTSELECT
LL_ID0
LL_ID1

BSEL0
BSEL1
BSEL2

PWRGOOD
RESET#

D63#
D62#
D61#
D60#
D59#
D58#
D57#
D56#
D55#
D54#

D53#

B15

C14

H_D#53

H_D#52

D52#

D51#

D50#

D49#

D48#

A14

C15

D17

D20

G22

H_D#51

H_D#50

H_D#49

H_D#48

H_D#47

H_A#9

U6

A9#T5A8#R4A7#M4A6#L4A5#M5A4#P6A3#

D27#

D26#

D25#

D24#

F12

F11

E13

D13

G13

H_D#23

H_D#24

H_D#25

H_D#26

H_D#27

H_A#4

D23#

D22#

E10

D10

H_D#21

H_D#22

AC2

L5

DBR#

D21#

D20#D7D19#E9D18#F9D17#F8D16#G9D15#

H_D#17

H_D#18

H_D#19

H_D#20

AN6

AN5

AN4

AN3

VSS_SENSE

VCC_SENSE

VCC_MB_REGULATION

D14#

B12

D11

C12

H_D#13

H_D#14

H_D#15

H_D#16

AJ3

AK3

ITP_CLK1

ITP_CLK0

VSS_MB_REGULATION

D13#

D12#D8D11#

D10#

B10

C11

H_D#10

H_D#11

H_D#12

VID5

VID7

VID6

AM7

AM5

AL4

VID6

RSVD/VID7

D9#

D8#

D7#A7D6#B7D5#B6D4#A5D3#C6D2#A4D1#C5D0#

A11

A10

H_D#6

H_D#7

H_D#8

H_D#9

3

VID2

VID3

VID1

VID4

AK4

AL6

AM3

AL5

VID5

VID4

VID3

VID2

FC5/CPU_GTLREF2

RSVD/CPU_GTLREF3

H_D#2

H_D#3

H_D#4

H_D#5

VID[0..7] 30

VID0

AM2

VID1

VID0

VID_SELECT

GTLREF_SEL

H_D#1

AN7
H1

GTLREF0

H2

GTLREF1

H29
E24

GTLREF2

F2
G10

AG3

BPM5#

AF2

BPM4#

AG2

BPM3#

AD2

BPM2#

AJ1

BPM1#

AJ2

BPM0#

J6

REQ4#

K6

REQ3#

M6

REQ2#

J5

REQ1#

K4

REQ0#

W2

TESTHI12

P1

TESTHI11

H5

TESTHI10

G4

TESTHI9

G3

TESTHI8

F24

TESTHI7

G24

TESTHI6

G26

TESTHI5

G27

TESTHI4

G25

TESTHI3

F25

TESTHI2

W3

TESTHI1

F26

TESTHI0

AK6

FORCEPH

G6

RSVD#G6

G28

BCLK1#

F28

BCLK0#

A3

RS2#

F5

RS1#

B3

RS0#

U3

AP1#

U2

AP0#

F3

BR0#

T2

COMP5

J2

COMP4

R1

COMP3

G2

COMP2

T1

COMP1

A13

COMP0

J17

DP3#

H16

DP2#

H15

DP1#

J16

DP0#

AD5

ADSTB1#

R6

ADSTB0#

C17

DSTBP3#

G19

DSTBP2#

E12

DSTBP1#

B9

DSTBP0#

A16

DSTBN3#

G20

DSTBN2#

G12

DSTBN1#

C8

DSTBN0#

L1

LINT1/NMI

K1

LINT0/INTR

ZIF-SOCK775-15U-IN,ZIF-SOCK775-15U-IN_TH

ZIF-SOCK775-15U-IN,ZIF-SOCK775-15U-IN_TH

B4

H_D#0

VSS_SENSE 30

VTT_OUT_RIGHT

R65

R65
1KR1%0402

1KR1%0402

CPU_GTLREF0
CPU_GTLREF1
GTLREF_SEL
MCH_GTLREF_CPU
CPU_GTLREF2
CPU_GTLREF3

H_BPM#5
H_BPM#4
H_BPM#3
H_BPM#2
H_BPM#1
H_BPM#0

H_REQ#4
H_REQ#3
H_REQ#2
H_REQ#1
H_REQ#0

H_TESTHI12
H_TESTHI11
H_TESTHI10

H_TESTHI8

H_TESTHI2_7
H_TESTHI1

H_TESTHI0
FORCEPH
RSVD_G6

H_RS#2
H_RS#1
H_RS#0

TEST-U3
TEST-U2

H_COMP5
H_COMP4
H_COMP3
H_COMP2
H_COMP1
H_COMP0

TEST-J17
TEST-H16
TEST-H15
TEST-J16

R115 49.9R1%0402R115 49.9R1%0402
R146 49.9R1%0402R146 49.9R1%0402

VTT_OUT_RIGHT 6,7

VID_SEL 30
CPU_GTLREF0 6
CPU_GTLREF1 6

T7T7

MCH_GTLREF_CPU 8
CPU_GTLREF2 6
CPU_GTLREF3 6

H_BPM#0 7
H_REQ#[0..4] 8

H_TESTHI12 7

R107 X_0R0402R107 X_0R0402
R110 X_0R0402R110 X_0R0402

NC_0402_6

R137 51R0402R137 51R0402
R138 51R0402R138 51R0402

R71 X_130R1%0402R71 X_130R1%0402
R106 X_51R0402R106 X_51R0402

T2T2
T1T1

T4T4
T5T5
T6T6
T3T3

Kentsfield

CK_H_CPU# 15
CK_H_CPU 15

H_RS#[0..2] 8

H_ADSTB#1 8
H_ADSTB#0 8
H_DSTBP#3 8
H_DSTBP#2 8
H_DSTBP#1 8
H_DSTBP#0 8
H_DSTBN#3 8
H_DSTBN#2 8
H_DSTBN#1 8
H_DSTBN#0 8
H_NMI 12
H_INTR 12

H_BPM#2H_TESTHI9
H_BPM#3

V_FSB_VTT

VTT_OUT_RIGHT
VTT_OUT_LEFT

C67

C67
C0.1u16Y0402

C0.1u16Y0402

2

V_FSB_VTT

H_BR#0 6,8
VTT_OUT_LEFT 6

MSI

MSI

MSI

RN4

RN4

8P4R-680R0402-RH

VID5
VID4
VID2
VID0

VID7
VID3
VID6
VID1

H_BPM#1
H_BPM#0
H_BPM#5
H_BPM#3

H_TRST#
H_BPM#4
H_TDO
H_TCK

H_TDI
H_BPM#2
H_TMS

H_TESTHI12
H_TESTHI11
H_TESTHI10
H_TESTHI9

H_TESTHI13
H_TESTHI8
H_TESTHI1

H_COMP1
H_COMP5
H_COMP3
H_COMP4

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Size Document Description Rev

Size Document Description Rev

Size Document Description Rev

Custom

Custom

Custom

Date:

Friday, November 09, 2007

Date:

Friday, November 09, 2007

Date:

Friday, November 09, 2007

8P4R-680R0402-RH

1

2

3

4

5

6

7

8

RN3

RN3

8P4R-680R0402-RH

8P4R-680R0402-RH

1

2

3

4

5

6

7

8

RN5

RN5
8P4R-51R0402

8P4R-51R0402

1

2

3

4

5

6

7

8

RN6

RN6
8P4R-51R0402

8P4R-51R0402

1

2

3

4

5

6

7

8

RN7

RN7
8P4R-51R0402

8P4R-51R0402

1

2

3

4

5

6

7

8

RN11 8P4R-51R0402RN11 8P4R-51R0402

1

2

3

4

5

6

7

8

RN10 8P4R-51R0402RN10 8P4R-51R0402

1

2

3

4

5

6

7

8

RN9

RN9

8P4R-49.9R1%-1

8P4R-49.9R1%-1

1
3
5
7

MS-7313

MS-7313

MS-7313

LGA775 - Signal

LGA775 - Signal

LGA775 - Signal

1

VTT_OUT_RIGHT

VTT_OUT_RIGHT

VTT_OUT_LEFT

VTT_OUT_LEFT

C65

C65
C0.1u16Y0402

C0.1u16Y0402

2
4
6
8

Sheet of

Sheet of

Sheet of

VTT_OUT_LEFT

533

533

533

0A

0A

0A

5

VCCP

AG30

AG29

AG28

AG27

AG26

AG25

AG22

AG21

AG19

AG18

AG15

AG14

AG12

AG11

AF9

AF8

AF22

AF21

U1B

AF19
AF18
AF15
AF14
AF12
AF11

AE9
AE23
AE22
AE21
AE19
AE18
AE15
AE14
AE12
AE11

AD8
AD30
AD29
AD28
AD27
AD26
AD25
AD24
AD23

AC8
AC30
AC29
AC28
AC27
AC26
AC25
AC24
AC23

AB8

AA8

VCCP

U1B

VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCCW8VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

Y8

Y30

Y29

Y28

Y27

Y26

Y25

Y24

Y23

W30

W29

W28

W27

W26

W25

W24

W23

VCCP

D D

C C

AG8

VCC

AG9

VCC

VCCU8VCCV8VCC

AH11

VCC

VCC

U30

AH12

VCC

VCC

U29

AH14

VCC

VCC

U28

AH15

VCC

VCC

U27

4

AH18

U26

VCC

VCC

AH19

VCC

VCC

U25

AH21

VCC

VCC

U24

AH22

VCC

U23

AH25

VCC

VCCT8VCC

AH26

VCC

VCC

T30

AH27

VCC

VCC

T29

AH28

VCC

VCC

T28

AH29

VCC

VCC

T27

AH30

VCC

VCC

T26

AH8

T25

VCC

VCC

AH9

T24

VCC

VCC

3

AJ11

AJ12

AJ14

AJ15

AJ18

AJ19

AJ21

AJ22

AJ25

AJ26

AJ8

AJ9

AK11

AK12

AK14

AK15

AK18

AK19

AK21

AK22

AK25

AK26

AK8

AK9

AL11

AL12

AL14

AL15

AL18

AL19

AL21

AL22

AL25

AL26

AL29

AL30

AL8

AL9

AM11

AM12

AM14

AM15

AM18

AM19

AM21

AM22

AM25

AM26

AM29

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCCJ8VCCJ9VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCCK8VCCL8VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCCM8VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCCN8VCCP8VCCR8VCC

J13

J14

J15

J18

J19

J20

J21

J22

J23

J24

J25

J26

J27

J28

J29

T23

N30

N23

N24

N25

N26

N27

N28

N29

M24

M25

M26

M27

M28

M29

M30

K27

K28

K29

K30

M23

K26

K25

K24

K23

J30

VCC

VCC

2

AM30

AM8

AM9

AN11

AN12

AN14

AN15

AN18

AN19

AN21

AN22

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCCA
VSSA

VCCPLL

VCC-IOPLL

VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT

VTTPWRGD

VTT_OUT_RIGHT

VTT_OUT_LEFT

VTT_SEL

RSVD#F29

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

J10

J11

J12

AN8

AN9

AN25

AN26

AN29

AN30

A23
B23
D23
C23

A25
A26
A27
A28
A29
A30
B25
B26
B27
B28
B29
B30
C25
C26
C27
C28
C29
C30
D25
D26
D27
D28
D29
D30
AM6

AA1
J1
F27

F29

H_VCCA
H_VSSA
H_VCCPLL
H_VCCA

VTT_PWG
VTT_OUT_RIGHT

VTT_OUT_LEFT
VTT_SEL

V_FSB_VTT

C10u10Y0805

C10u10Y0805

CAPS FOR FSB GENERIC

VTT_SEL 28

1

V_FSB_VTT

C131

C131

C127

X_C10u10Y0805

C127

X_C10u10Y0805

*GTLREF VOLTAGE SHOULD BE 0.67 * VTT = 0.8V (At VTT=1.2V)

R116

R109

R92

R89

R89

124R1%0402

VTT_OUT_RIGHT

B B

VTT_OUT_RIGHT

124R1%0402

C60

C60
X_C10u6.3X51206-RH

X_C10u6.3X51206-RH

R96

R96

124R1%0402

124R1%0402

GTL_REF0

R90

R90

210R1%0402

210R1%0402

GTL_REF1

R100

R100

210R1%0402

210R1%0402

R92

10R1%0402

10R1%0402

C61

C61
C1u16Y

C1u16Y

R101

R101

10R1%0402

10R1%0402

C70

C70
C1u16Y

C1u16Y

CPU_GTLREF0 5

C62

C62
X_C220p50N0402

X_C220p50N0402

CPU_GTLREF1 5

C71

C71
X_C220p50N0402

X_C220p50N0402

VTT_OUT_LEFT

V_FSB_VTT

R109

124R1%0402

124R1%0402

R87

R87

124R1%0402

124R1%0402

GTL_REF3

R114

R114

210R1%0402

210R1%0402

GTL_REF2

R83

R83

210R1%0402

210R1%0402

R116

10R1%0402

10R1%0402

C73

C73
C1u16Y

C1u16Y

R86

R86

10R1%0402

10R1%0402

C56

C56
C1u16Y

C1u16Y

CPU_GTLREF2 5

C76

C76
X_C220p50N0402

X_C220p50N0402

CPU_GTLREF3 5

C57

C57
X_C220p50N0402

X_C220p50N0402

ZIF-SOCK775-15U-IN,ZIF-SOCK775-15U-IN_TH

ZIF-SOCK775-15U-IN,ZIF-SOCK775-15U-IN_TH

*PLACE COMPONENTS AS CLOSE AS POSSIBLE TO PROCESSOR SOCKET
*TRACE WIDTH TO CAPS MUST BE NO SMALLER THAN 12MILS

V_FSB_VTT V_1P5_CORE

L3 X_10u100mA_0805-RHL3 X_10u100mA_0805-RH

21

CP2CP2

C107

C107
C1u16Y

C1u16Y

C110

C110
C10u10Y0805

C10u10Y0805

H_VCCA

C117

C117
X_C10u10Y0805

X_C10u10Y0805

H_VSSA

CP3CP3

H_VCCPLL

C129

C129
X_C1u16Y

X_C1u16Y

C126

C126
C0.01u16X0402

C0.01u16X0402

C133

C133
C10u10Y0805

C10u10Y0805

VTT_PWRGOOD

PLACE AT CPU END OF ROUTE

A A

VTT_OUT_RIGHT5,7

VTT_OUT_LEFT5

VTT_OUT_RIGHT H_PROCHOT#

VTT_OUT_LEFT

5

R82 130R1%0402R82 130R1%0402
R91 62R0402R91 62R0402

R104 62R0402R104 62R0402
R94 X_100R0402R94 X_100R0402
R108 62R0402R108 62R0402

H_IERR#
H_CPURST#

H_PWRGD
H_BR#0

H_PROCHOT# 5
H_IERR# 5

H_CPURST# 5,8
H_PWRGD 5,12
H_BR#0 5,8

4

VID_GD#28,30

3

VTT_OUT_RIGHT

R78 1KR0402R78 1KR0402

R73

R73
680R0402-RH

680R0402-RH

CE

B

Q11

Q11
N-MMBT3904_NL_SOT23

N-MMBT3904_NL_SOT23

2

VTT_PWG

VTT_PWG SPEC :
High > 0.9V
Low < 0.3V
Trise < 150ns

MICRO-STAR INT'L CO.,LTD

MICRO-STAR INT'L CO.,LTD

MICRO-STAR INT'L CO.,LTD

MS-7313

MS-7313

MSI

MSI

MSI

Size Document Description Rev

Size Document Description Rev

Size Document Description Rev

Custom

Custom

Custom

LGA775 - Power

LGA775 - Power

LGA775 - Power

Date:

Friday, November 09, 2007

Date:

Friday, November 09, 2007

Date:

Friday, November 09, 2007

MS-7313

1

633

633

633

Sheet of

Sheet of

Sheet of

0A

0A

0A

5

V30

V29

VSS

AG17

VSS

AG20

VSS

AG23

VSS

AG24

VSSV3VSS

VSS

AG7

AH1

VSS

V28

VSS

VSS

AH10

U1C

U1C

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

1122334

VSSY7VSSY5VSSY2VSSW7VSSW4VSSV7VSSV6VSS

VSS

VSS

VSS

4

AG10

AG13

AG16

A12
A15

D D

C C

B B

A18
A21

AA23
AA24
AA25
AA26
AA27
AA28
AA29

AA3

AA30

AA6
AA7

AB1
AB23
AB24
AB25
AB26
AB27
AB28
AB29
AB30

AB7

AC3
AC6
AC7
AD4

AD7
AE10
AE13
AE16
AE17

AE2
AE20
AE24
AE25
AE26
AE27
AE28
AE29
AE30

AE5

AE7
AF10
AF13
AF16
AF17
AF20
AF23
AF24
AF25
AF26
AF27
AF28
AF29

AF3
AF30

AF6

AF7

A2
A6

A9

V27

VSS

VSS

AH13

V26

VSS

VSS

AH16

V25

VSS

VSS

AH17

V24

VSS

VSS

AH20

V23

VSS

VSS

AH23

4

U7

VSS

VSST7VSST6VSST3VSSR7VSSR5VSS

VSS

VSS

VSS

VSS

AH3

AH6

AH7

AH24

3

H18

H19

H20

H21

H22

H23

H24

H25

H26

H27

R30

R29

R28

R27

R26

R25

R24

R23

P30

P29

P28

P27

P26

P25

P24

P23

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSSR2VSSP7VSSP4VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSSN7VSSN6VSSN3VSSM7VSSM1VSSL7VSSL6VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

AJ4

AJ7

AJ10

AJ13

AJ16

AJ17

AJ20

AJ23

AJ24

AJ27

AJ28

AJ29

AJ30

AK10

AK13

AK16

AK17

AK2

AK20

AK23

AK24

AK27

VSS

AK28

VSS

AK29

VSS

AK30

AK5

VSS

AK7

VSS

VSS

AL10

L30

VSS

AL13

VSSL3VSS

VSS

AL16

L29

VSS

AL17

L28

VSS

VSS

AL20

L27

VSS

VSS

AL23

L26

VSS

VSS

AL24

L25

VSS

VSS

AL27

L24

VSS

VSS

AL28

L23

AL7

VSS

VSS

VSSK7VSS

VSS

AM1

K2

K5

VSS

VSS

VSS

AM10

AM13

AM16

H28

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSSH3VSSH6VSSH7VSSH8VSSH9VSSJ4VSSJ7VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

AN1

AN2

AM4

AN10

AN13

AN16

AN17

AN20

AN23

AN24

AM17

AM20

AM23

AM24

AM27

AM28

AN27

VSS

VSS

H17

VSS

VSS

AN28

H14

VSS

VSSB1VSS

H13

B11

VSS

H12

VSS

VSS

B14

2

F7

H10

H11

VSS

VSS

VSS

COMP6
COMP7

RSVD/COMP8

RSVD#AE4

RSVD#D1

RSVD#D14

RSVD#E5
RSVD#E6
RSVD#E7

RSVD#E23

RSVD#F23

RSVD#J3

RSVD#N4

RSVD#P5

RSVD#AC4

IMPSEL#

MSID1
MSID0

VSS

VSS

VSS

B17

B20

B24

RSVD

FC28
FC27
FC26
FC23

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

Y3
AE3
B13

AE4
D1
D14
E5
E6
E7
E23
F23
AL3
J3
N4
P5
AC4

F6
V1
W1

NC_0402_6

U1
G1
E29
A24

F4
F22
F19
F16
F13
F10
E8
E28
E27
E26
E25
E20
E2
E17
E14
E11
D9
D6
D5
D3
D24
D21
D18
D15
D12
C7
C4
C24
C22
C19
C16
C13
C10
B8
B5

H_COMP6
H_COMP7
H_COMP8

1505
1477
1497

FC28
FC27

T10T10
T9T9
T8T8

R95 X_0R0402R95 X_0R0402

1
3
5
7

R102 X_0R0402R102 X_0R0402
R84 X_0R0402R84 X_0R0402
R132 X_0R0402R132 X_0R0402
R131 X_1KR0402R131 X_1KR0402

05 Per FMB

05 Value FMB

R93 49.9R1%0402R93 49.9R1%0402
R85 49.9R1%0402R85 49.9R1%0402
R147 24.9R1%0402R147 24.9R1%0402

30.1ohm

Can cut

2
4
6
8

H_TESTHI12
H_BPM#0

1

VTT_OUT_RIGHT 5,6

FC28

R99 X_0R0402R99 X_0R0402

FC27

R113 X_0R0402R113 X_0R0402RN8 8P4R-51R0402RN8 8P4R-51R0402

H_TESTHI12 5
H_BPM#0 5

Kentsfield

MSID1 MSID0

0

0

0

1

ZIF-SOCK775-15U-IN,ZIF-SOCK775-15U-IN_TH

MLCC

VCCP

C89

C89

X_C10U6.3Y1206

X_C10U6.3Y1206

A A

5

VCCP

C86

C86

C10U6.3Y1206

C10U6.3Y1206

4

(Place into CPU Socket Cavity)

C80

C90

C90

C10U6.3Y1206

C10U6.3Y1206

C82

C82

C10U6.3Y1206

C10U6.3Y1206

C80

X_C10U6.3Y1206

X_C10U6.3Y1206

C88

C88

X_C10U6.3Y1206

X_C10U6.3Y1206

C87

C87

C10U6.3Y1206

C10U6.3Y1206

C77

C77

C10U6.3Y1206

C10U6.3Y1206

ZIF-SOCK775-15U-IN,ZIF-SOCK775-15U-IN_TH

C91

C91

C10U6.3Y1206

C10U6.3Y1206

C79

C79

X_C10U6.3Y1206

X_C10U6.3Y1206

3

C78

C78

C10U6.3Y1206

C10U6.3Y1206

C81

C81

C10U6.3Y1206

C10U6.3Y1206

MICRO-STAR INT'L CO.,LTD

MICRO-STAR INT'L CO.,LTD

MICRO-STAR INT'L CO.,LTD

MS-7313

MS-7313

MSI

MSI

MSI

Size Document Description Rev

Size Document Description Rev

Size Document Description Rev

Custom

Custom

Custom

LGA775 - GND

LGA775 - GND

LGA775 - GND

Date:

Friday, November 09, 2007

Date:

Friday, November 09, 2007

Date:

2

Friday, November 09, 2007

MS-7313

1

733

733

733

Sheet of

Sheet of

Sheet of

0A

0A

0A

5

N17

P17

P18

P20

VCC

VCC

VCC

P21

VCC

AA35

VCC

RSVRD1

U13A

M34

M38

AA37

M36

AA41

W42

W41

W40

M31
M29

AJ12

M18

K38
K35

N35
R33
N32
N34

N42
N37
N38
R32
R36
U37
R35
R38
V33
U34
U32
V42
U35
Y36
Y38

V32
Y34

V35
F38

D42
U39
U40

E41
D41
K36
G37
E42

U41
P40

U42
V41
Y40

T40
Y43
T43

AJ9
C30

A28
C27
B27

D27
D28

J39
J42
J37

U13A

HA3#
HA4#
HA5#
HA6#
HA7#
HA8#
HA9#
HA10#
HA11#
HA12#
HA13#
HA14#
HA15#
HA16#
HA17#
HA18#
HA19#
HA20#
HA21#
HA22#
HA23#
HA24#
HA25#
HA26#
HA27#
HA28#
HA29#
HA30#
HA31#

HAD_STB0#
HAD_STB1#
HPCREQ#

HBREQ0#
HBPRI#

HBNR#
HLOCK#
HADS#
HREQ0#

HREQ1#
HREQ2#
HREQ3#
HREQ4#

HHIT#
HHITM#
HDEFER#

HTRDY#
HDBSY#
HDRDY#
HEDRDY#

RS0#
RS1#
RS2#

HCLKP
HCLKN

PWROK
HCPURST#

RSTIN#
ICH_SYNC#

HRCOMP
HSCOMP
HSWING

HDVREF
HACCVREF

H_A#[3..31]5

D D

H_ADSTB#05
H_ADSTB#15

C C

B B

PLTRST#12,16

ICH_SYNC#13

H_BNR#5

H_LOCK#5

H_ADS#5

H_REQ#[0..4]5

H_HITM#5
H_DEFER#5

H_TRDY#5
H_DBSY#5

H_DRDY#5

H_RS#[0..2]5

CK_H_MCH15

CK_H_MCH#15

CHIP_PWGD13,28

H_CPURST#5,6

R159

R159

16.9R1%0402-RH

16.9R1%0402-RH

H_BPRI#5

H_HIT#5

H_A#3
H_A#4
H_A#5
H_A#6
H_A#7
H_A#8
H_A#9
H_A#10
H_A#11
H_A#12
H_A#13
H_A#14
H_A#15
H_A#16
H_A#17
H_A#18
H_A#19
H_A#20
H_A#21
H_A#22
H_A#23
H_A#24
H_A#25
H_A#26
H_A#27
H_A#28
H_A#29
H_A#30
H_A#31

H_BR#05,6

H_REQ#0
H_REQ#1
H_REQ#2
H_REQ#3
H_REQ#4

TP1TP1

H_RS#0
H_RS#1
H_RS#2

ICH_SYNC#

HXRCOMP
HXSCOMP
HXSWING

MCH_GTLREF_CPU

AA22

AB21

VCC

VCC

RSVRD2

RSVRD3

AA42

AA34

AB22

AB23

VCC

VCC

RSVRD4

RSVRD5

L15

AA38

AC22

AD14

VCC

VCC

RSVRD6

RSVRD7

U27

M15

4

AF6

AF7

VCC

RSVRD8

A43

R27

AF8

AF9

VCC

VCC

VCC

RSVRD9

RSVRD10

RSVRD11

M11

AG25

AF10

VCC

RSVRD12

AG26

AF11

VCC

RSVRD13

AG27

AF12

VCC

RSVRD14

AJ24

AF13

VCC

RSVRD15

AJ27

AF14

VCC

RSVRD16

AK40

AF30

VCC

RSVRD17

AL39

AG2

VCC

RSVRD18

AW17

AG3

AW18

V_1P5_CORE

AG4

AG5

AG6

VCC

VCC

VCC

RSVRD19

RSVRD20

RSVRD21

AY14

BC16

AD30

VCC

RSVRD22

AG7

VCC

RSVRD23

AC34

AG8

Y30

VCC

RSVRD24

AG9

Y33

VCC

RSVRD25

AG10

VCC

RSVRD26

AF31

AG11

VCC

RSVRD27

AD31

AG12

VCC

RSVRD28

U30

AG13

VCC

RSVRD29

V31

AG14

VCC

RSVRD30

AA30

AH1

VCC

RSVRD31

AC30

AH2

VCC

RSVRD32

AK21

AH4

AJ23

VCC

RSVRD33

3

AJ5

AJ13

AJ14

AK2

AK3

AK4

AK14

AK15

AK20

R15

R17

R18

R20

R21

R23

R24

U15

U17

U18

U19

U20

U21

U22

U23

U24

U25

U26

V15

V17

V18

V19

V20

V21

V22

V23

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

RSVRD34

RSVRD35

RSVRD36

RSVRD37

RSVRD38

RSVRD39

RSVRD40

RSVRD41

RSVRD42

NC1

NC2

NC3

NC4

NC5

NC6

NC7

NC8

NC9

NC10

NC11

NC12

NC13

NC14

NC15C2NC16

NC17

NC18

NC19B3NC20B2NC21

VCC

VCC

AL20

V30

AJ21

AJ29

AL26

AK27

AG29

AJ26

AL29

BC43

BC42

BC2

BC1

BB43

BB2

BB1

BA2

AW26

AW2

AV27

AV26

E35

B43

B42

B41

A42

Y17

Y18

C42

Y19

VCC

VCC

V25

Y21

VCC

VCC

V27

Y23

VCC

VCC

W17

Y25

VCC

VCC

W18

Y27

VCC

VCC

W19

VCC

VCC

AA15

2

W20

VCC

VCC

AA17

W22

VCC

VCC

AA18

W24

VCC

VCC

AA19

W26

VCC

VCC

AA20

W27

Y15

M17

P41

HD0#

VCC

HD1#
HD2#
HD3#
HD4#
HD5#
HD6#
HD7#
HD8#

HD9#
HD10#
HD11#
HD12#
HD13#
HD14#
HD15#
HD16#
HD17#
HD18#
HD19#
HD20#
HD21#
HD22#
HD23#
HD24#
HD25#
HD26#
HD27#
HD28#
HD29#
HD30#
HD31#
HD32#
HD33#
HD34#
HD35#
HD36#
HD37#
HD38#
HD39#
HD40#
HD41#
HD42#
HD43#
HD44#
HD45#
HD46#
HD47#
HD48#
HD49#
HD50#
HD51#
HD52#
HD53#
HD54#
HD55#
HD56#
HD57#
HD58#
HD59#
HD60#
HD61#
HD62#
HD63#

KDINV_0#
HDINV_1#
HDINV_2#
HDINV_3#

V_1P5_CORE

M39
P42
M42
N41
M40
L40
M41
K42
G39
J41
G42
G40
G41
F40
F43
F37
E37
J35
D39
C41
B39
B40
H34
C37
J32
B35
J34
B34
F32
L32
J31
H31
M33
K31
M27
K29
F31
H29
F29
L27
M24
J26
K26
G26
H24
K24
F24
E31
A33
E40
D37
C39
D38
D33
C35
D34
C34
B31
C31
C32
D32
B30
D30

K40
A38
E29
B32

K41
L43

F35
G34

J27
M26

E34
B37

VCC

VCC

HD_STBP0#

HD_STBN0#
HD_STBP1#

HD_STBN1#
HD_STBP2#

HD_STBN2#
HD_STBP3#

HD_STBN3#

[INTEL-945GC-A2[SLA9C]-RH]

[INTEL-945GC-A2[SLA9C]-RH]

H_D#0
H_D#1
H_D#2
H_D#3
H_D#4
H_D#5
H_D#6
H_D#7
H_D#8
H_D#9
H_D#10
H_D#11
H_D#12
H_D#13
H_D#14
H_D#15
H_D#16
H_D#17
H_D#18
H_D#19
H_D#20
H_D#21
H_D#22
H_D#23
H_D#24
H_D#25
H_D#26
H_D#27
H_D#28
H_D#29
H_D#30
H_D#31
H_D#32
H_D#33
H_D#34
H_D#35
H_D#36
H_D#37
H_D#38
H_D#39
H_D#40
H_D#41
H_D#42
H_D#43
H_D#44
H_D#45
H_D#46
H_D#47
H_D#48
H_D#49
H_D#50
H_D#51
H_D#52
H_D#53
H_D#54
H_D#55
H_D#56
H_D#57
H_D#58
H_D#59
H_D#60
H_D#61
H_D#62
H_D#63

H_DBI#0
H_DBI#1
H_DBI#2
H_DBI#3

H_DSTBP#0 5
H_DSTBN#0 5

H_DSTBP#1 5
H_DSTBN#1 5

H_DSTBP#2 5
H_DSTBN#2 5

H_DSTBP#3 5
H_DSTBN#3 5

1

H_D#[0..63] 5

H_DBI#[0..3] 5

R170

R170

60.4R1%0402

A A

V_FSB_VTT

60.4R1%0402

HXSCOMP

C168

C168
X_C2.2p50N0402

X_C2.2p50N0402

V_FSB_VTT

HD_SWING VOLTAGE "10 MIL TRACE , 7 MIL
SPACE" HD_SWING S/B 1/3*VTT +/- 2%

R166

R166

301R1%0402

301R1%0402

R167

R167

62R0402

62R0402

R169

R169

84.5R1%0402-LF

84.5R1%0402-LF

HXSWING

C164

C164
C0.1u16Y0402

C0.1u16Y0402

PLACE DIVIDER RESISTOR NEAR VTT

5

4

V_FSB_VTT

GTLREF VOLTAGE SHOULD BE 0.63*VTT=0.756V

R157

R157

124 OHM OVER 210 RESISTORS

124R1%0402

124R1%0402

R158

R158

210R1%0402

210R1%0402

R165

R165

10R1%0402

10R1%0402

C162

C162
C0.1u16Y0402

C0.1u16Y0402

CAPS SHOULD BE PLACED NEAR MCH PIN

3

MCH_GTLREF_CPU

C165

C165
X_C220p50N0402

X_C220p50N0402

MCH_GTLREF_CPU 5

MICRO-STAR INT'L CO.,LTD

MICRO-STAR INT'L CO.,LTD

MICRO-STAR INT'L CO.,LTD

MS-7313

MS-7313

MSI

MSI

MSI

Size Document Description Rev

Size Document Description Rev

Size Document Description Rev

Custom

Custom

Custom

945GC - CPU Signals

945GC - CPU Signals

945GC - CPU Signals

Date:

Friday, November 09, 2007

Date:

Friday, November 09, 2007

Date:

2

Friday, November 09, 2007

MS-7313

1

833

833

833

Sheet of

Sheet of

Sheet of

0A

0A

0A

5

DATA_A[0..63]18

DATA_A0

DATA_A1

DATA_A3

DATA_A2

DATA_A6

DATA_A4

D D

C C

DQS_A[0..7]18
DQS_A#[0..7]18

B B

A A

SCS_A#[0..1]18,20

RAS_A#18,20
CAS_A#18,20

WE_A#18,20

MAA_A[0..13]18,20

ODT_A[0..1]18,20

SBS_A[0..2]18,20

DQS_A[0..7]
DQS_A#[0..7]

P_DDR_A018

N_DDR_A018

P_DDR_A118

N_DDR_A118

P_DDR_A218

N_DDR_A218

R214

R214

80.6R1%0402

80.6R1%0402

SMPCOMP_N
SMPCOMP_P

TP3TP3
TP4TP4

R213

R213

80.6R1%0402

80.6R1%0402

does it need to connect to
GND through a 40 ohm resister?

VCC_DDR

C240

C240
C0.1u16Y0402

C0.1u16Y0402

U13B

BB37
BA39
BA35
AY38

BA34
BA37
BB35

BA32

AW32

BB30
BA30
AY30
BA27
BC28
AY27
AY28
BB27
AY33

AW27

BB26
BC38

AW37

AY39
AY37
BB40

BC33
AY34
BA26

AU4
AR2

BA3

BB4
AY11
BA10
AU18
AR18
AU35
AV35
AP42
AP40
AG42
AG41
AC42
AC41

BB32
AY32

AY5

BB5
AK42
AK41
BA31
BB31

AY6

BA5
AH40
AH43

AL5

AJ6

AJ8

AM3

DATA_B[0..63]19

U13B

SACS0#
SACS1#
SACS2#
SACS3#

SARAS#
SACAS#
SAWE#

SAMA0
SAMA1
SAMA2
SAMA3
SAMA4
SAMA5
SAMA6
SAMA7
SAMA8
SAMA9
SAMA10
SAMA11
SAMA12
SAMA13

SAODT0
SAODT1
SAODT2
SAODT3

SABA0
SABA1
SABA2

SADQS0
SADQS0#
SADQS1
SADQS1#
SADQS2
SADQS2#
SADQS3
SADQS3#
SADQS4
SADQS4#
SADQS5
SADQS5#
SADQS6
SADQS6#
SADQS7
SADQS7#

SACLK0
SACLK0#
SACLK1
SACLK1#
SACLK2
SACLK2#
SACLK3
SACLK3#
SACLK4
SACLK4#
SACLK5
SACLK5#

MCH_SRCOMP0
MCH_SRCOMP1
SMOCDCOMP0
SMOCDCOMP1

SCS_A#0
SCS_A#1

RAS_A#
CAS_A#
WE_A#

MAA_A0
MAA_A1
MAA_A2
MAA_A3
MAA_A4
MAA_A5
MAA_A6
MAA_A7
MAA_A8
MAA_A9
MAA_A10
MAA_A11
MAA_A12
MAA_A13

ODT_A0
ODT_A1

SBS_A0
SBS_A1 SBS_B1
SBS_A2

DQS_A0
DQS_A#0
DQS_A1
DQS_A#1
DQS_A2
DQS_A#2
DQS_A3
DQS_A#3
DQS_A4
DQS_A#4
DQS_A5
DQS_A#5
DQS_A6
DQS_A#6
DQS_A7
DQS_A#7

P_DDR_A0
N_DDR_A0
P_DDR_A1
N_DDR_A1
P_DDR_A2
N_DDR_A2

AP3

AP2

SADQ0

AU3

SADQ1

SADQ2

SBDQ0

AL6

DATA_B0

DATA_B1

AV4

AN1

SADQ3

SBDQ1

AL8

AP8

DATA_B2

DATA_A5

AP4

SADQ4

SADQ5

SBDQ2

SBDQ3

AP9

DATA_B4

DATA_B3

AU5

SADQ6

SBDQ4

AJ11

DATA_A7

AU2

SADQ7

SBDQ5

AL9

DATA_B5

DATA_A8

AW3

SADQ8

SBDQ6

AM10

DATA_B6

DATA_A9

AY3

SADQ9

SBDQ7

AP6

DATA_B7

DATA_A10

DATA_A11

BA7

BB7

SADQ10

SADQ11

SBDQ8

SBDQ9

AV6

AU7

DATA_B8

DATA_B9

4

DATA_A12

DATA_A13

AV1

AW4

SADQ12

SADQ13

SBDQ10

SBDQ11

AV12

AM11

DATA_B11

DATA_B10

DATA_A14

DATA_A15

BC6

AY7

SADQ14

SADQ15

SBDQ12

SBDQ13

AR5

AR7

DATA_B12

DATA_B13

DATA_A16

DATA_A17

AW12

AY10

SADQ16

SADQ17

SBDQ14

SBDQ15

AR12

AR10

DATA_B14

DATA_B15

DATA_A18

DATA_A19

BA12

BB12

SADQ18

SADQ19

SBDQ16

SBDQ17

AM15

AM13

DATA_B17

DATA_B16

DATA_A20

DATA_A21

BA9

BB9

SADQ20

SADQ21

SBDQ18

SBDQ19

AV15

AM17

DATA_B18

DATA_B19

DATA_A22

DATA_A23

BC11

AY12

SADQ22

SADQ23

SBDQ20

SBDQ21

AN12

AR13

DATA_B21

DATA_B20

DATA_A24

DATA_A25

AM20

AM18

SADQ24

SADQ25

SBDQ22

SBDQ23

AT15

AP15

DATA_B22

DATA_B23

DATA_A26

DATA_A27

AV20

AM21

SADQ26

SADQ27

SBDQ24

SBDQ25

AM24

AM23

DATA_B24

DATA_B25

DATA_A29

DATA_A28

AP17

AR17

SADQ28

SADQ29

SBDQ26

SBDQ27

AV24

AM26

DATA_B27

DATA_B26

DATA_A31

DATA_A30

AP20

AT20

SADQ30

SADQ31

SBDQ28

SBDQ29

AP21

AR21

DATA_B28

DATA_B29

DATA_A32

DATA_A33

AP32

AV34

SADQ32

SADQ33

SBDQ30

SBDQ31

AT24

AP24

DATA_B31

DATA_B30

DATA_A34

DATA_A35

AV38

AU39

SADQ34

SADQ35

SBDQ32

SBDQ33

AU27

AN29

DATA_B32

DATA_B33

DATA_A37

DATA_A36

AV32

AT32

SADQ36

SADQ37

SBDQ34

SBDQ35

AR31

AM31

DATA_B34

DATA_B35

DATA_A38

DATA_A39

AR34

AU37

SADQ38

SADQ39

SBDQ36

SBDQ37

AP27

AR27

DATA_B36

DATA_B37

DATA_A41

DATA_A40

AR41

AR42

SADQ40

SADQ41

SBDQ38

SBDQ39

AP31

AU31

DATA_B39

DATA_B38

DATA_A43

DATA_A42

AN43

AM40

SADQ42

SADQ43

SBDQ40

SBDQ41

AP35

AP37

DATA_B40

DATA_B41

DATA_A45

DATA_A44

AU41

AU42

SADQ44

SBDQ42

AL35

AN32

DATA_B42

DATA_B43

3

DATA_A47

DATA_A46

AP41

AN40

SADQ45

SADQ46

SADQ47

SBDQ43

SBDQ44

SBDQ45

AR35

AU38

DATA_B45

DATA_B44

DQM_A[0..7]18

SCKE_A[0..1]18,20

DATA_A49

DATA_A48

AL41

AL42

SADQ48

SADQ49

SBDQ46

SBDQ47

AM38

AM34

DATA_B46

DATA_B47

DATA_A51

DATA_A50

AF39

AE40

SADQ50

SADQ51

SBDQ48

SBDQ49

AJ34

AL34

DATA_B48

DATA_B49

DATA_A53

DATA_A52

AM41

AM42

SADQ52

SADQ53

SBDQ50

SBDQ51

AF32

AF34

DATA_B51

DATA_B50

SCKE_B[0..1]19,20

DQM_B[0..7]19

DATA_A54

DATA_A55

AF41

AF42

SADQ54

SADQ55

SBDQ52

SBDQ53

AJ32

AL31

DATA_B52

DATA_B53

DATA_A56

DATA_A57

AD40

AD43

SADQ56

SADQ57

SBDQ54

SBDQ55

AD32

AG35

DATA_B55

DATA_B54

DATA_A58

DATA_A59

AA39

AA40

SADQ58

SADQ59

SBDQ56

SBDQ57

AC32

AD34

DATA_B57

DATA_B56

DATA_A61

DATA_A60

AE42

AE41

SADQ60

SADQ61

SBDQ58

SBDQ59

Y32

AA32

DATA_B58

DATA_B59

DATA_A62

DATA_A63

AB41

AB42

SADQ62

SADQ63

SBDQ60

SBDQ61

AF35

AF37

DATA_B61

DATA_B60

SCKE_A0

BB25

SACKE0

SBDQ62

SBDQ63

AC33

AC35

DATA_B63

DATA_B62

SCKE_A1

AY25

BC24

BA25

SACKE1

SACKE2

SBCKE0

BA14

AY16

SCKE_B0

SCKE_B1

SACKE3

SBCKE1

SBCKE2

BA13

BB13

DQM_A1

DQM_A0

AY2

AR3

SADM0

SBCKE3

AD39

DQM_B7

SADM1

SBDM7

DQM_A2

BB10

AJ39

DQM_B6

SADM2

SBDM6

DQM_A3

AP18

AR38

DQM_B5

SADM3

SBDM5

DQM_A4

AT34

AR29

DQM_B4

SADM4

SBDM4

DQM_A5

AP39

AP23

DQM_B3

SADM5

SBDM3

DQM_A6

AG40

AP13

DQM_B2

DQM_A7

AC40

SADM6

SBDM2

AW7

DQM_B1

2

SADM7

SBDQS0#
SBDQS1#
SBDQS2#
SBDQS3#
SBDQS4#
SBDQS5#
SBDQS6#
SBDQS7#

SBCLK0#
SBCLK1#
SBCLK2#
SBCLK3#
SBCLK4#
SBCLK5#

SMVREF1
SMVREF0

SBDM0

SBDM1

AL11

DQM_B0

SBCS0#
SBCS1#
SBCS2#
SBCS3#

SBRAS#
SBCAS#

SBWE#

SBMA0
SBMA1
SBMA2
SBMA3
SBMA4
SBMA5
SBMA6
SBMA7
SBMA8

SBMA9
SBMA10
SBMA11
SBMA12
SBMA13

SBODT0
SBODT1
SBODT2
SBODT3

SBBA0
SBBA1

SBBA2
SBDQS0
SBDQS1
SBDQS2
SBDQS3
SBDQS4
SBDQS5
SBDQS6
SBDQS7

SBCLK0
SBCLK1
SBCLK2
SBCLK3
SBCLK4
SBCLK5

AW41
BA41
AW40

BA23
AY24
BB23

BB22
BB21
BA21
AY21
BC20
AY19
AY20
BA18
BA19
BB18
BA22
BB17
BA17
AW42

AY42
AV40
AV43
AU40

AW23
AY23
AY17

AM8
AM6
AV7
AR9
AV13
AT13
AU23
AR23
AT29
AV29
AP36
AM35
AG34
AG32
AD36
AD38

AM29
AM27
AV9
AW9
AL38
AL36
AP26
AR26
AU10
AT10
AJ38
AJ36

AM2
AM4

SCS_B#1

RAS_B#
CAS_B#
WE_B#

MAA_B0
MAA_B1
MAA_B2
MAA_B3
MAA_B4
MAA_B5
MAA_B6
MAA_B7
MAA_B8
MAA_B9
MAA_B10
MAA_B11
MAA_B12
MAA_B13

ODT_B0
ODT_B1

SBS_B0
SBS_B2

DQS_B0
DQS_B#0
DQS_B1
DQS_B#1
DQS_B2
DQS_B#2
DQS_B3
DQS_B#3
DQS_B4
DQS_B#4
DQS_B5
DQS_B#5
DQS_B6
DQS_B#6
DQS_B7
DQS_B#7

P_DDR_B0
N_DDR_B0
P_DDR_B1
N_DDR_B1
P_DDR_B2
N_DDR_B2

MCH_VREF_B
MCH_VREF_A

C262

C262

C0.1u16Y0402

C0.1u16Y0402

SCS_B#0

BA40

Parts Close To MCH

[INTEL-945GC-A2[SLA9C]-RH]

[INTEL-945GC-A2[SLA9C]-RH]

SCS_B#[0..1] 19,20

RAS_B# 19,20
CAS_B# 19,20
WE_B# 19,20

MAA_B[0..13] 19,20

ODT_B[0..1] 19,20

SBS_B[0..2] 19,20

DQS_B[0..7]
DQS_B#[0..7]

P_DDR_B0 19
N_DDR_B0 19
P_DDR_B1 19
N_DDR_B1 19
P_DDR_B2 19
N_DDR_B2 19

CP12CP12
R220 X_0R0402R220 X_0R0402

C213

C213
C0.1u16Y0402

C0.1u16Y0402

VCC_DDR

1

DQS_B[0..7] 19
DQS_B#[0..7] 19

R223

R223

1KR1%0402

1KR1%0402

R224

R224

1KR1%0402

1KR1%0402

MICRO-STAR INT'L CO.,LTD

MICRO-STAR INT'L CO.,LTD

MICRO-STAR INT'L CO.,LTD

MS-7313

MS-7313

MSI

MSI

MSI

Size Document Description Rev

Size Document Description Rev

Size Document Description Rev

Custom

Custom

Custom

945GC - Memory Signals

945GC - Memory Signals

945GC - Memory Signals

Date:

Friday, November 09, 2007

Date:

Friday, November 09, 2007

Date:

5

4

3

2

Friday, November 09, 2007

MS-7313

1

933

933

933

Sheet of

Sheet of

Sheet of

0A

0A

0A

5

RN27

RN27

MCH_BSEL0A

7

8

MCH_BSEL1AMCH_BSEL1

5

6

3

4

MCH_BSEL2A

1

2

8P4R-10KR0402

8P4R-10KR0402

DMI_ITP_MRP_0
DMI_ITN_MRN_0
DMI_ITP_MRP_1
DMI_ITN_MRN_1
DMI_ITP_MRP_2
DMI_ITN_MRN_2
DMI_ITP_MRP_3
DMI_ITN_MRN_3

CK_PE_100M_MCH
CK_PE_100M_MCH#

SDVOCTRLDATA
SDVOCTRLCLK

MCH_BSEL0A
MCH_BSEL1A
MCH_BSEL2A

R172

R172

VCCA_HPLLVCCA_HPLL

VCCA_MPLL
VCCA_DPLLA
VCCA_DPLLB

VCCA_GPLL

V_2P5_MCH

V_2P5_DAC_FILTERED

C183

X_C10u10Y0805

C183

X_C10u10Y0805

C190

C0.1u16Y0402

C190

C0.1u16Y0402

DMI_ITP_MRP_012

DMI_ITN_MRN_012

DMI_ITP_MRP_112

DMI_ITN_MRN_112

DMI_ITP_MRP_212

DMI_ITN_MRN_212

DMI_ITP_MRP_312

DMI_ITN_MRN_312
CK_PE_100M_MCH15

CK_PE_100M_MCH#15

SDVOCTRLDATA22
SDVOCTRLCLK22

RN28

RN28

8
6

MCH_BSEL0

4

MCH_BSEL1

2

8P4R-470R0402

8P4R-470R0402

CP7CP7

L8

L8

X_180L1.5A-90

X_180L1.5A-90

MCH_BSEL0

EXP_A_RXP_022
EXP_A_RXN_022
EXP_A_RXP_122
EXP_A_RXN_122
EXP_A_RXP_222
EXP_A_RXN_222
EXP_A_RXP_322
EXP_A_RXN_322
EXP_A_RXP_422
EXP_A_RXN_422
EXP_A_RXP_522
EXP_A_RXN_522
EXP_A_RXP_622
EXP_A_RXN_622
EXP_A_RXP_722
EXP_A_RXN_722
EXP_A_RXP_822
EXP_A_RXN_822
EXP_A_RXP_922
EXP_A_RXN_922
EXP_A_RXP_1022
EXP_A_RXN_1022
EXP_A_RXP_1122
EXP_A_RXN_1122
EXP_A_RXP_1222
EXP_A_RXN_1222
EXP_A_RXP_1322
EXP_A_RXN_1322
EXP_A_RXP_1422
EXP_A_RXN_1422
EXP_A_RXP_1522
EXP_A_RXN_1522
EXP_EN_HDR22

X_1KR1%0402

X_1KR1%0402

MCH_BSEL015,16
MCH_BSEL115,16

D D

C C

V_FSB_VTT

7
5

V_2P5_MCH

3
1

B B

I = 70mA

NOA_6

C10000p10X0402-RH

C10000p10X0402-RH

C188

C188

V_1P5_CORE

G12
F12
D11
D12

J13
H13
E10
F10

J9

H10

F7

F9
C4
D3
G6

J6
K9
K8

F4
G4
M6
M7
K2

L1

U11
U10

R8
R7
P4
N3

Y10
Y11
F20

Y7

Y8

AA9

AA10

AA6

AA7
AC9
AC8

B14

B16

F15

E15

F21

H21

L20

AK17

AL17

K21

AK23
AK18

L21

L18

N21

C21

B20

C19

B19

B17

D19

C18

B18

A18

U13C

U13C

EXPARXP0
EXPARXN0
EXPARXP1
EXPARXN1
EXPARXP2
EXPARXN2
EXPARXP3
EXPARXN3
EXPARXP4
EXPARXN4
EXPARXP5
EXPARXN5
EXPARXP6
EXPARXN6
EXPARXP7
EXPARXN7
EXPARXP8
EXPARXN8
EXPARXP9
EXPARXN9
EXPARXP10
EXPARXN10
EXPARXP11
EXPARXN11
EXPARXP12
EXPARXN12
EXPARXP13
EXPARXN13
EXPARXP14
EXPARXN14
EXPARXP15
EXPARXN15
EXP_EN

DMI RXP0
DMI RXN0
DMI RXP1
DMI RXN1
DMI RXP2
DMI RXN2
DMI RXP3
DMI RXN3

GCLKP
GCLKN

SDVOCTRLDATA
SDVOCTRLCLK

BSEL0
BSEL1
BSEL2
RSV_TP[0]
RSV_TP[1]

EXP_SLR
RSV_TP[2]
RSV_TP[3]
RSV_TP[4]
RSV_TP[5]
RSV_TP[6]

VCCAHPLL
VCCAMPLL
VCCADPLLA
VCCADPLLB
VCCA_EXPPLL

VCC2
VCCADAC
VCCADAC
VSSA_DAC

V_FSB_VTT

AA24

VCC

AA26

VCC

VTT

A24

AB17

VCC

VTT

B23

AB18

VCC

VTT

B24

AB19

VCC

VTT

B25

AB20

VCC

VTT

B26

AB24

VCC

VTT

C23

AB25

VCC

VTT

C25

AB26

VCC

VTT

C26

AB27

VCC

VTT

D23

AC15

VCC

VTT

D24

AC17

VCC

VTT

D25

4

AC18

E23

VCC

VTT

AC20

VCC

VTT

E24

AC24

VCC

VTT

E26

AC26

VCC

VTT

E27

AC27

VCC

VTT

F23

AD15

VCC

VTT

F27

AD17

VCC

VTT

G23

AD19

H23

AD23

AD25

AD21

VCC

VCC

VCC

VTT

VTT

VTT

J23

L23

K23

V_1P5_CORE

VCC

VTT

AD26

VCC

VTT

M23

AE17

VCC

VTT

N23

AE18

VCC

VTT

P23

AE20

VCC

AE22

VCC

AE24

VCC

AE26

VCC

VCC

AF21

AE27

VCC

VCC

AF23

AF15

VCC

VCC

AF25

AF17

VCC

VCC

AF26

AF19

VCC

VCC

AF27

VCC

AF29

AV18

AY43

VCCSM

VCC

AG15

AG17

AV23

AV21

VCCSM

VCCSM

VCC

VCC

AG18

AG19

AV31

AV42

VCCSM

VCCSM

VCC

VCC

AG20

AG21

AW13

AW15

VCCSM

VCCSM

VCC

VCC

AG22

AG23

AW20

VCCSM

VCCSM

VCC

VCC

AG24

3

AW21

AW24

VCCSM

VCC

AJ15

AJ17

AW29

AW31

VCCSM

VCCSM

VCC

VCC

AJ18

AJ20

AW34

VCCSM

VCCSM

VCC

AY41

AW35

VCCSM

VCCSM

BB16

BB20

VCCSM

AE4

BB24

BB28

BB33

VCCSM

VCCSM

VCCSM

VCC_EXP

VCC_EXP

VCC_EXP

AE3

AE2

AD12

BB38

BB42

BC13

VCCSM

VCCSM

VCCSM

VCC_EXP

VCC_EXP

VCC_EXP

AD8

AD6

AD10

BC26

BC18

BC22

VCCSM

VCCSM

VCCSM

VCC_EXP

VCC_EXP

VCC_EXP

AD5

AD4

AD2

BC31

BC35

BC40

VCCSM

VCCSM

VCCSM

VCC_EXP

VCC_EXP

VCC_EXP

AD1

AC6

AC13

VCC_DDR

N7

N5

VCCSM

VCC_EXP

VCC_EXP

VCC_EXP

VCC_EXP

AA5

AC5

AA13

N11

N10

N9

VCC_EXP

VCC_EXP

VCC_EXP

VCC_EXP

VCC_EXP

VCC_EXP

Y13

V13

R11

R10

R5

N12

VCC_EXP

VCC_EXP

VCC_EXP

VCC_EXP

VCC_EXPV9VCC_EXP

VCC_EXPV7VCC_EXPV6VCC_EXP

V5

V10

R13

VCC_EXP

VCC_EXP

2

V_1P5_PCIEXPRESS

U13

U8

U7

U6

VCC_EXP

VCC_EXP

VCC_EXP

VCC_EXP

EXPATXP10
EXPATXN10
EXPATXP11
EXPATXN11
EXPATXP12
EXPATXN12

EXPATXP13
EXPATXN13
EXPATXP14
EXPATXN14
EXPATXP15
EXPATXN15

EXP_COMPO

EXP_COMPI

DREFCLKINP
DREFCLKINN

[INTEL-945GC-A2[SLA9C]-RH]

[INTEL-945GC-A2[SLA9C]-RH]

V_1P5_PCIEXPRESS

EXPATXP0

EXPATXN0

EXPATXP1

EXPATXN1

EXPATXP2

EXPATXN2

EXPATXP3

EXPATXN3

EXPATXP4

EXPATXN4

EXPATXP5

EXPATXN5

EXPATXP6

EXPATXN6

EXPATXP7

EXPATXN7

EXPATXP8

EXPATXN8

EXPATXP9

EXPATXN9

DMI TXP0
DMI TXN0
DMI TXP1
DMI TXN1
DMI TXP2
DMI TXN2
DMI TXP3
DMI TXN3

HSYNC
VSYNC

RED

GREEN

BLUE
RED#

GREENB

BLUE#

DDC_DATA

DDC_CLK

IREF

EXTTS#

XORTEST

ALLZTEST

D14
C13
A13
B12
A11
B10
C10
C9
A9
B7
D7
D6
A6
B5
E2
F1
G2
J1
J3
K4
L4
M4
M2
N1
P2
T1
T4
U4
U2
V1
V3
W4

W2
Y1
AA2
AB1
Y4
AA4
AB3
AC4

AC12
AC11

D17
C17

F17
K17
H18

G17
J17
J18

N18
N20

J15
H15

A20
J20
H20
K18

DMI_MTP_IRP_0
DMI_MTN_IRN_0
DMI_MTP_IRP_1
DMI_MTN_IRN_1
DMI_MTP_IRP_2
DMI_MTN_IRN_2
DMI_MTP_IRP_3
DMI_MTN_IRN_3

GRCOMP

HSYNC
VSYNC

VGA_RED
VGA_GREEN
VGA_BLUE

MCH_DDC_DATA
MCH_DDC_CLK

CK_96M_DREF
CK_96M_DREF#

DACREFSET
EXTTS

EXP_A_TXP_0 22
EXP_A_TXN_0 22
EXP_A_TXP_1 22
EXP_A_TXN_1 22
EXP_A_TXP_2 22
EXP_A_TXN_2 22
EXP_A_TXP_3 22
EXP_A_TXN_3 22
EXP_A_TXP_4 22
EXP_A_TXN_4 22
EXP_A_TXP_5 22
EXP_A_TXN_5 22
EXP_A_TXP_6 22
EXP_A_TXN_6 22
EXP_A_TXP_7 22
EXP_A_TXN_7 22
EXP_A_TXP_8 22
EXP_A_TXN_8 22
EXP_A_TXP_9 22
EXP_A_TXN_9 22
EXP_A_TXP_10 22
EXP_A_TXN_10 22
EXP_A_TXP_11 22
EXP_A_TXN_11 22
EXP_A_TXP_12 22
EXP_A_TXN_12 22
EXP_A_TXP_13 22
EXP_A_TXN_13 22
EXP_A_TXP_14 22
EXP_A_TXN_14 22
EXP_A_TXP_15 22
EXP_A_TXN_15 22

DMI_MTP_IRP_0 12
DMI_MTN_IRN_0 12
DMI_MTP_IRP_1 12
DMI_MTN_IRN_1 12
DMI_MTP_IRP_2 12
DMI_MTN_IRN_2 12
DMI_MTP_IRP_3 12

R209

R209

24.9R1%

24.9R1%

R182

R182

10KR0402

10KR0402

TP2TP2

C354 Co-lay C283 BOTTOM　SIDE

C432

C432
X_C10p16N

X_C10p16N

DMI_MTN_IRN_3 12
V_1P5_PCIEXPRESS

MCH_DDC_DATA 27
MCH_DDC_CLK 27

CK_96M_DREF 15
CK_96M_DREF# 15

R179

R179

255R1%0402-RH

255R1%0402-RH

V_2P5_MCH

1

V_1P5_CORE

VCC_DDR

C144 X_C10u10Y0805C144 X_C10u10Y0805
C146 X_C10U10Y0805C146 X_C10U10Y0805
C166 C0.1u16Y0402C166 C0.1u16Y0402

VCC_DDR

C186 C10U10Y0805C186 C10U10Y0805
C175 C0.1u16Y0402C175 C0.1u16Y0402
C159 X_C10U10Y0805C159 X_C10U10Y0805

MCH MEMORY DECOUPLING

V_FSB_VTT

FSB GENERIC DECOUPLING

HSYNC 27
VSYNC 27

VGA_RED 27
VGA_GREEN 27
VGA_BLUE 27

C187 X_C18p50N0402C187 X_C18p50N0402
C185 X_C18p50N0402C185 X_C18p50N0402
C182 X_C18p50N0402C182 X_C18p50N0402

C245 X_C10U10Y0805C245 X_C10U10Y0805
C237 C10U10Y0805C237 C10U10Y0805

C233 X_C0.1u16Y0402C233 X_C0.1u16Y0402
C232 C0.1u16Y0402C232 C0.1u16Y0402
C431 X_C10U10Y0805C431 X_C10U10Y0805
C428 X_C0.1u16XC428 X_C0.1u16X
C429 X_C1u6.3X-RHC429 X_C1u6.3X-RH

C171 X_C0.1u16Y0402C171 X_C0.1u16Y0402
C177 X_C0.1u16Y0402C177 X_C0.1u16Y0402
C172 C0.1u16Y0402C172 C0.1u16Y0402

L10

L10

X_10u125mA_0805-RH-1

V_1P5_CORE

L7 X_600L200mA-450L7 X_600L200mA-450

CP6CP6

VCCA_MPLL = 60mA

A A

V_1P5_CORE

L9

L9

X_10u125mA_0805-RH-1

X_10u125mA_0805-RH-1

CP8CP8

VCCA_DPLLB = 55mA

5

VCCA_MPLL

C174

C174
C1U10Y0402-RH

C1U10Y0402-RH

C191

X_C10u10Y0805

C191

X_C10u10Y0805

V_1P5_CORE

VCCA_DPLLA = 55mA

VCCA_DPLLB

C184

C184
C0.1u16Y0402

C0.1u16Y0402 C195

V_1P5_CORE

VCCA_HPLL = 45mA VCCA_GPLL = 45mA

X_10u125mA_0805-RH-1

CP4CP4

L6

L6

X_10u125mA_0805-RH-1

X_10u125mA_0805-RH-1

CP5CP5

4

VCCA_DPLLA

C163

X_C10u10Y0805

C163

X_C10u10Y0805

VCCA_HPLL

C181

C181
C0.1u16Y0402

C0.1u16Y0402

C180

C180
C0.1u16Y0402

C0.1u16Y0402

V_1P5_CORE

V_1P5_PCIEXPRESS =

1.5A

V_1P5_CORE

L15

L15

X_0R1206-LF

X_0R1206-LF

CP11CP11
CP13CP13

L12

L12

1u500mA_0805-RH-1

1u500mA_0805-RH-1

CP9CP9

3

C231

C10u10Y0805

C231

C10u10Y0805

C229

X_C10U10Y0805

C229

X_C10U10Y0805

VCCA_GPLL

C195
X_C10U10Y0805

X_C10U10Y0805

C244

X_C10U10Y0805

C244

X_C10U10Y0805

V_1P5_PCIEXPRESS

X_C0.1u16Y0402

X_C0.1u16Y0402

C236

X_C10u10Y0805

C236

X_C10u10Y0805

C193

C193
C1U10Y0402-RH

C1U10Y0402-RH

C243

C243

MICRO-STAR INT'L CO.,LTD

MICRO-STAR INT'L CO.,LTD

MICRO-STAR INT'L CO.,LTD

MS-7313

MS-7313

MSI

MSI

MSI

Size Document Description Rev

Size Document Description Rev

Size Document Description Rev

Custom

Custom

Custom

945GC PCI-Express & RBG Signals

945GC PCI-Express & RBG Signals

945GC PCI-Express & RBG Signals

Date:

Saturday, November 10, 2007

Date:

Saturday, November 10, 2007

Date:

2

Saturday, November 10, 2007

MS-7313

1

10 33

10 33

10 33

Sheet of

Sheet of

Sheet of

0A

0A

0A