5
4
3
2
1
MS-7312 VER:0A
Page Title
Cover Sheet 1
*AMD PGA 940 K8-AM2 (DDR2 800)
D D
*VIA K8M800
*VIA VT8237RPLUS
(AGP 8X / VLink 8X)
*Winbond 83627EHG(DHG) LPC I/O
*REALTEK RT8201CL 10/100 PHY
*USB 2.0 support (integrated into VT8237R)
*REALTEK ALC655 AC'97 CODEC
*DDR2 DIMM * 2
*AGP SLOT * 1 ( 8X )
C C
*PCI SLOT * 3
Block Diagram 2
GPIO SPEC
3
AMD K8 AM2-> 940 PGA Socket 4,5,6
System Memory DDR2 DUAL CHANNEL
DDR2 Terminations R & C
VGA CONNECTOR
Clock Synthesizer
NB VIA K8M800/K8T800 PRO (HT)
K8 Vcore Power
AGP SLOT 8X
VT8237RPLUS
PCI Connectors * 3
REALTEK ALC655 AC'97 CODEC
IDE ATA 66/100/133 Connectors * 1
Front and Rear USB Port
LPC I/O W83627EHG(DHG)& ROM & Floppy&Fan
KeyBoard/Mouse/LPT/COM Connectors
7
8
9
10
11,12,13
14
15
16,17,18
19,20
21
22
23
24
25
REALTEK RTL8201CL 10/100 PHY
B B
ACPI Power Controller (MS-6)
System Regulator&Front Panel
Decoupling Cap.
Power Sequence
History
Option Parts
26
27
28
29
30
31
32
EMI Parts 33
A A
Micro Star Restricted Secret
Micro Star Restricted Secret
Micro Star Restricted Secret
Title
Title
Title
Document Number
Document Number
Document Number
MICRO-STAR INT'L CO.,LTD.
MICRO-STAR INT'L CO.,LTD.
MICRO-STAR INT'L CO.,LTD.
No. 69, Li-De St, Jung-He City,
No. 69, Li-De St, Jung-He City,
No. 69, Li-De St, Jung-He City,
Taipei Hsien, Taiwan
Taipei Hsien, Taiwan
Taipei Hsien, Taiwan
http://www.msi.com.tw
http://www.msi.com.tw
5
4
3
2
http://www.msi.com.tw
Cover Sheet
Cover Sheet
Cover Sheet
MS-7312
MS-7312
MS-7312
Last Revision Date:
Last Revision Date:
Last Revision Date:
Tuesday, May 30, 2006
Tuesday, May 30, 2006
Tuesday, May 30, 2006
Sheet
Sheet
Sheet
1
Rev
Rev
Rev
0A
0A
0A
of
13 3
of
13 3
of
13 3
5
Block Diagram
4
3
2
1
D D
CPUCLK+ & CPUCLK-(100/133/166/200)
AMD K8 AM2 Socket 940
DDR2 800
HCLK+ & HCLK-(100/133/166/200) / GCLK(66)
SYSTEM CLOCK
Synthesizer /
ICS950410AF
C C
PCICLK[1~3]
AGPCLK(66)
VCLK(66) / OSC(14) / PCISB(33) / USBCLK(48) / APICCLK(14)
A
G
P
AGP 8X /Fast Write
S
L
O
T
PCI-33
K8M800/K8T800 pro
VIA
HT
VLINK
Dual ATA 100/133
DDR2 * 2
IDE Slot
==>ATA66,100,133 *2
B B
A A
AC_14(14)
SIOPCLK(33)/SIO48M(48)
5
3 PCI Slots
AC97 => S/W Audio
REALTEK ALC655
AC97
SERIAL ATA *2
4
VT8237RPLUS
USB
Dual USB 1.1 OHCI
/2.0 EHCI 8 Ports
==> Front-Port *4 ,
Back-Port *4
3
LPC BUS
MII
10/100 LAN
REALTEK RTL8201CL
SUPER I/O
W83627EHG(DHG)
2
4M ROM
Micro Star Restricted Secret
Micro Star Restricted Secret
Micro Star Restricted Secret
Title
Title
Title
Document Number
Document Number
Document Number
MICRO-STAR INT'L CO.,LTD.
MICRO-STAR INT'L CO.,LTD.
MICRO-STAR INT'L CO.,LTD.
No. 69, Li-De St, Jung-He City,
No. 69, Li-De St, Jung-He City,
No. 69, Li-De St, Jung-He City,
Taipei Hsien, Taiwan
Taipei Hsien, Taiwan
Taipei Hsien, Taiwan
http://www.msi.com.tw
http://www.msi.com.tw
http://www.msi.com.tw
1
Block Diagram
Block Diagram
Block Diagram
MS-7312
MS-7312
MS-7312
Last Revision Date:
Last Revision Date:
Last Revision Date:
Sheet
Sheet
Sheet
Rev
Rev
Rev
0A
0A
0A
Tuesday, May 30, 2006
Tuesday, May 30, 2006
Tuesday, May 30, 2006
23 3
23 3
23 3
of
of
of
5
GPIO FUNCTION
4
3
2
1
D D
PIN NAME Function define
GPO0 (VDDS)
GPO1(VDDS)
GPO2/SUSA#
(VDDS)
GPO3/SUSST#(VDDS)
GPO4/SUSCLK(VDDS)
GPO5/CPUSTP#
GPO6/PCISTP#
GPO7/GNT5
*
GPO8/GPI8/VGATE
C C
*
GPO9/GPI9/UDPWREN
*
GPO10/GPI10/PICD0
*
GPO11/GPI11/PICD1
GPO12/GPI12/INTE#
*
GPO13/GPI13/INTF#
*
GPO14/GPI14/INTG#
*
GPO15/GPI15/INTH#
*
GPO20/GPI20
/ACSDIN2/PCS0#
GPO21/GPI21/ACSDIN3
/PCS1#/SLPBTN#
GPO22/GPI22/GHI#
B B
GPO23/GPI23/DPSLP
/GPIOAGPO24/GPI24
GPO25/GPI25
GPO26/GPI26/SMBDT2
(VDDS)
GPO27/GPI27/SMBCK2
(VDDS)
/GPIOB
GPO28/GPI28/VIDSEL
GPO29/GPI29/VRDSLP
GPO30/GPI30
GPO31/GPI31
A A
/GPIOC
/GPIOD
Default
Function
GPO0
GPO1
SUSA#
SUSST#
SUSCLK
CPUSTP#
PCISTP#
GPO7
GPI8
UDPWREN
GPI10
GPI11
GPI12
GPI13
GPI14
GPI15
GPI20/ACSDIN2
GPI21/ACSDIN3
GPI22
GPI23
GPI24
GPI25
SMBDT2
SMBCK2
GPO28
/VIDSEL
GPO29
/VRDSLP
GPI30
GPI31
NA
NA
4.7K ohm Pull up to 3VDUAL
SUSST#
4.7K ohm Pull up to 3VDUAL
4.7K ohm Pull up to 3VDUAL
4.7K ohm Pull up to VCC3
4.7K ohm Pull up to VCC3
2.7K ohm Pull up to VCC3
4.7K ohm Pull up to VCC3
NA
330 ohm Pull up to VCC3
330 ohm Pull up to VCC3
NA
NA
NA
2.7K ohm Pull up to VCC3INTH#
4.7K ohm Pull down
4.7K ohm Pull down
4.7K ohm Pull up to VCC3
4.7K ohm Pull up to VCC3
4.7K ohm Pull down
4.7K ohm Pull down
4.7K ohm Pull up to 3VDUAL
4.7K ohm Pull up to 3VDUAL
SATA_LED
4.7K ohm Pull down
4.7K ohm Pull down
4.7K ohm Pull down
PIN NAME Function define
GPI0
(VBAT)
GPI1
(VSUS3)
GPI2/EXTSMI#
(VSUS3)
GPI3/RING#
(VSUS3)
GPI4/LID#
(VSUS3)
GPI5/BATLOW# (VDDS)
GPI6/AGPBZ
GPI7/REQ5
GPI8/VGATE
*
*
GPI9/UDPWREN
*
GPI10/PICD0
*
GPI11/PICD1
*
GPI12/INTE#
*
GPI13/INTF#
*
GPI14/INTG#
*
GPI15/INTH# GPI15
GPI16/INTRUDER#
(VBAT)
GPI17/CPUMISS
GPI18/AOLGP1/THRM#
GPI19/APICCLK
PCI Config.
DEVICE
PCI Slot 1
PCI Slot 2
INTA#
INTB#
INTC#
INTD#
INTB#
INTC#
INTD#
INTA#
INTC#
PCI Slot 3
INTD#
INTA# PGNT#2
INTB#
5
4
Default
Function
GPI0
GPI1
EXTSMI#
RING#
LID#
BATLOW#
AGPBZ
GPI7
GPI8
UDPWREN
GPI10
GPI11
GPI12
GPI13
GPI14
INTRUDER#
CPUMISS
AOLGP1
APICCLK
3
PREQ#0
PGNT#0
PREQ#1
PGNT#1
PREQ#2
4.7K ohm Pull up to VBAT
ATADET0=>Detect IDE1 ATA100/66
4.7K ohm Pull up to 3VDUAL
4.7K ohm Pull up to 3VDUAL
ATADET1=>Detect IDE2 ATA100/66
4.7K ohm Pull up to 3VDUAL
4.7K ohm Pull up to VCC3
2.7K ohm Pull up to VCC3
4.7K ohm Pull up to VCC3
NA
330 ohm Pull up to VCC3
330 ohm Pull up to VCC3
NA
NA
NA
2.7K ohm Pull up to VCC3INTH#
1M ohm Pull up to VBAT
4.7K ohm Pull up to 3VDUAL
4.7K ohm Pull up to 3VDUAL
THRMS#
APICCLK
IDSEL
AD19
AD20
AD21
CLOCK REQ#/GNT#
PCICLK1
PCICLK2
PCICLK3
PCI RESET DEVICE
DDR DIMM Config.
CLK GEN PIN OUT MCP1 INT Pin
22 (PCICLK5)
23 (PCICLK6)
21 (PCICLK4)
2
USB
Rear
Front
Port DATA +/-
USB1
LAN_USB1
JUSB1
JUSB2
USB1USB1+
USB0USB0+
USB2USB2+
USB3USB3+
USB4USB4+
USB5USB5+
USB6USB6+
USB7USB7+
Signals Target
PCISLOTRST#
PCIDEVRST#
HDDRST#
PCI slot 1-3
NB , Super I/O
Primary, Scondary IDE
PCIRST# AGP SLOT
DEVICE
CLOCK ADDRESS
MEMCLK_H5/MEMCLK_L5
DIMM 1
1010000XB
MEMCLK_H0/MEMCLK_L0
MEMCLK_H7/MEMCLK_L7
MEMCLK_H4/MEMCLK_L4
DIMM 2
1010001XB
MEMCLK_H1/MEMCLK_L1
MEMCLK_H6/MEMCLK_L6
Micro Star Restricted Secret
Micro Star Restricted Secret
Micro Star Restricted Secret
Title
Title
Title
Document Number
Document Number
Document Number
MICRO-STAR INT'L CO.,LTD.
MICRO-STAR INT'L CO.,LTD.
MICRO-STAR INT'L CO.,LTD.
No. 69, Li-De St, Jung-He City,
No. 69, Li-De St, Jung-He City,
No. 69, Li-De St, Jung-He City,
Taipei Hsien, Taiwan
Taipei Hsien, Taiwan
Taipei Hsien, Taiwan
http://www.msi.com.tw
http://www.msi.com.tw
http://www.msi.com.tw
OC#
USB_OC#1
( OC#0~1 )
USB_OC#2
( OC#2~3 )
USB_OC#5
( OC#4~7 )
GPIO Spec.
GPIO Spec.
GPIO Spec.
MS-7312
MS-7312
MS-7312
Last Revision Date:
Last Revision Date:
Last Revision Date:
Sheet
Sheet
Sheet
1
Rev
Rev
Rev
0A
0A
0A
Monday, May 29, 2006
Monday, May 29, 2006
Monday, May 29, 2006
of
of
of
33 3
33 3
33 3
5
4
3
2
1
C213
C213
C4.7U10Y0805
C4.7U10Y0805
CLKIP1 11
CLKIN1 11
CLKIP0 11
CLKIN0 11
CTLIP0 11
CTLIN0 11
CADON[0..15]
CADOP[0..15]
CADIN[0..15]
CADIP[0..15]
C152
C152
C4.7U10Y0805
C4.7U10Y0805
N6
P6
N3
N2
V4
V5
U1
V1
U6
V6
T4
T5
R6
T6
P4
P5
M4
M5
L6
M6
K4
K5
J6
K6
U3
U2
R1
T1
R3
R2
N1
P1
L1
M1
L3
L2
J1
K1
J3
J2
C166
C166
C0.22U16X
C0.22U16X
L0_CLKIN_H(1)
L0_CLKIN_L(1)
L0_CLKIN_H(0)
L0_CLKIN_L(0)
L0_CTLIN_H(1)
L0_CTLIN_L(1)
L0_CTLIN_H(0)
L0_CTLIN_L(0)
L0_CADIN_H(15)
L0_CADIN_L(15)
L0_CADIN_H(14)
L0_CADIN_L(14)
L0_CADIN_H(13)
L0_CADIN_L(13)
L0_CADIN_H(12)
L0_CADIN_L(12)
L0_CADIN_H(11)
L0_CADIN_L(11)
L0_CADIN_H(10)
L0_CADIN_L(10)
L0_CADIN_H(9)
L0_CADIN_L(9)
L0_CADIN_H(8)
L0_CADIN_L(8)
L0_CADIN_H(7)
L0_CADIN_L(7)
L0_CADIN_H(6)
L0_CADIN_L(6)
L0_CADIN_H(5)
L0_CADIN_L(5)
L0_CADIN_H(4)
L0_CADIN_L(4)
L0_CADIN_H(3)
L0_CADIN_L(3)
L0_CADIN_H(2)
L0_CADIN_L(2)
L0_CADIN_H(1)
L0_CADIN_L(1)
L0_CADIN_H(0)
L0_CADIN_L(0)
ZIF-SOCKET940
ZIF-SOCKET940
C218
C218
C0.22U16X
C0.22U16X
CPU3000A
CPU3000A
HYPERTRANSPORT
HYPERTRANSPORT
L0_CLKOUT_H(1)
L0_CLKOUT_L(1)
L0_CLKOUT_H(0)
L0_CLKOUT_L(0)
L0_CTLOUT_H(1)
L0_CTLOUT_L(1)
L0_CTLOUT_H(0)
L0_CTLOUT_L(0)
L0_CADOUT_H(15)
L0_CADOUT_L(15)
L0_CADOUT_H(14)
L0_CADOUT_L(14)
L0_CADOUT_H(13)
L0_CADOUT_L(13)
L0_CADOUT_H(12)
L0_CADOUT_L(12)
L0_CADOUT_H(11)
L0_CADOUT_L(11)
L0_CADOUT_H(10)
L0_CADOUT_L(10)
L0_CADOUT_H(9)
L0_CADOUT_L(9)
L0_CADOUT_H(8)
L0_CADOUT_L(8)
L0_CADOUT_H(7)
L0_CADOUT_L(7)
L0_CADOUT_H(6)
L0_CADOUT_L(6)
L0_CADOUT_H(5)
L0_CADOUT_L(5)
L0_CADOUT_H(4)
L0_CADOUT_L(4)
L0_CADOUT_H(3)
L0_CADOUT_L(3)
L0_CADOUT_H(2)
L0_CADOUT_L(2)
L0_CADOUT_H(1)
L0_CADOUT_L(1)
L0_CADOUT_H(0)
L0_CADOUT_L(0)
C219
C219
C180P50N
C180P50N
AD5
AD4
AD1
AC1
Y6
W6
W2
W3
Y5
Y4
AB6
AA6
AB5
AB4
AD6
AC6
AF6
AE6
AF5
AF4
AH6
AG6
AH5
AH4
Y1
W1
AA2
AA3
AB1
AA1
AC2
AC3
AE2
AE3
AF1
AE1
AG2
AG3
AH1
AG1
C176
C176
C180P50N
C180P50N
CADOP15
CADON15
CADOP14
CADON14
CADOP13
CADON13
CADOP12
CADON12
CADOP11
CADON11
CADOP10
CADON10
CADOP9
CADON9
CADOP8
CADON8
CADOP7
CADON7
CADOP6
CADON6
CADOP5
CADON5
CADOP4
CADON4
CADOP3
CADON3
CADOP2
CADON2
CADOP1
CADON1
CADOP0
CADON0
CLKOP1 11
CLKON1 11
CLKOP0 11
CLKON0 11
TP19TP19
TP18TP18
CTLOP0 11
CTLON0 11
VDDA_25
L4 80L3_40_0805 L4 80L3_40_0805
2 1
C51
CPUCLK0_H 10
C51
CPUCLK0_L 10
CPU_SIC 24
VCC_DDR
CPU_SID 24
VCC_DDR
R99
R99
39.2R1%
39.2R1%
CPU_STRAP_HI_E11
CPU_STRAP_LO_F11
R97
R97
39.2R1%
39.2R1%
VDDA25
C3900P50X
C3900P50X
R55
R55
169R1%
169R1%
C50 C3900P50X C50 C3900P50X
R87 300R1% R87 300R1%
R96 X_300R1% R96 X_300R1%
TP14TP14
R32 300R R32 300R
R41 300R R41 300R
TP9TP9
CPUCLKIN
CPUCLKIN#
C37
C37
X_C1000P50X
X_C1000P50X
TP29TP29
TP24TP24
TP23TP23
TP28TP28
TP7TP7
CPU_M_VREF
THERMDC_CPU 24
THERMDA_CPU 24
TP17TP17
C43
C43
C4.7U16Y1206
C4.7U16Y1206
TP4TP4
TP3TP3
TP10TP10
TP12TP12
TP15TP15
TP8TP8
TP21TP21
C0.22U16X
C0.22U16X
CPU_PWRGD_L
HT_STOP_L
LDT_RST_L
CPU_PRESENT_L
CPU_TDI
CPU_TRST_L
CPU_TCK
CPU_TMS
CPU_DBREQ_L
COREFB+ 14
COREFB- 14
-HTSTOP 11,18
VDDA25
C60
C60
C52
C52
C3300P50X
C3300P50X
COREFB+
COREFB-
CPU_VTT_SENSE
CPU_TEST25_H
CPU_TEST25_L
-HTSTOP
AL10
AJ10
AH10
AH11
AJ11
AH9
AG9
AG8
AH7
C10
D10
A8
B8
C9
D8
C7
AL3
AL6
AK6
AL9
A5
G2
G1
E12
F12
A10
B10
F10
E9
AJ7
F6
D6
E7
F8
C5
E5
AJ5
AJ6
CPU3000D
CPU3000D
MISC
MISC
VDDA1
VDDA2
CLKIN_H
CLKIN_L
PWROK
LDTSTOP_L
RESET_L
CPU_PRESENT_L
THERMTRIP_L
SIC
SID
TDI
TRST_L
TCK
TMS
DBREQ_L
VDD_FB_H
VDD_FB_L
VTT_SENSE
M_VREF
M_ZN
M_ZP
TEST25_H
TEST25_L
TEST19
TEST18
TEST13
TEST9
TEST17
TEST16
TEST15
TEST14
TEST12
TEST7
TEST6
TEST5
TEST4
TEST3
TEST2
ZIF-SOCKET940
ZIF-SOCKET940
3VDUAL
14 7
U3AU3A
1 2
VID(5)
VID(4)
VID(3)
VID(2)
VID(1)
VID(0)
PROCHOT_L
TDO
DBRDY
VDDIO_FB_H
VDDIO_FB_L
PSI_L
HTREF1
HTREF0
TEST29_H
TEST29_L
TEST24
TEST23
TEST22
TEST21
TEST20
TEST28_H
TEST28_L
TEST27
TEST26
TEST10
TEST8
HT Bus Level shift
D2
D1
C1
E3
E2
E1
AK7
AL7
AK10
CPU_DBRDY
B6
AK11
AL11
CPU_PSI_L
F1
V8
V7
C11
D11
AK8
AH8
AJ9
AL8
AJ8
J10
H9
AK9
AK5
G7
D4
HT_STOP_L
TP13TP13
VID4
VID3
VID2
VID1
VID0
CPU_THRIP_L
CPU_TDO
CPU_VDDIOFB_H
CPU_VDDIOFB_L
R95 300R R95 300R
VCC_DDR
R10
R10
300R
300R
VCC_DDR
TP25TP25
TP11TP11
TP16TP16
R105 X_0R R105 X_0R
TP27TP27
TP20TP20
TP26TP26
TP22TP22
VCC_DDR
R209
R209
X_300R
X_300R
TP30TP30
TP6TP6
TP5TP5
R89
R89
300R
300R
VCC_DDR
VDDIO_FB_H 28
C149
C149
C1000P50X
C1000P50X
R43
R43
80.6R1%
80.6R1%
CPU_PRESENT_L
CPU_TEST25_H
CPU_TEST25_L
R24
R24
330R
330R
VCC_DDR
C150
C150
C1000P50X
C1000P50X
R93 44.2R1% R93 44.2R1%
R94 44.2R1% R94 44.2R1%
R106 1KR R106 1KR
R52 510R R52 510R
R53 510R R53 510R
VID[0..4] 14
R88
R88
300R
300R
VDD_12_A
VCC_DDR
CADON[0..15] 11
CADOP[0..15] 11
CADIN[0..15] 11
CADIP[0..15] 11
D D
VDD_12_A
C151
C151
C4.7U10Y0805
C4.7U10Y0805
VDD_12_A
R100 51R/4 R100 51R/4
R104 51R/4 R104 51R/4
CADIP15
CADIN15
C C
B B
CADIP14
CADIN14
CADIP13
CADIN13
CADIP12
CADIN12
CADIP11
CADIN11
CADIP10
CADIN10
CADIP9
CADIN9
CADIP8
CADIN8
CADIP7
CADIN7
CADIP6
CADIN6
CADIP5
CADIN5
CADIP4
CADIN4
CADIP3
CADIN3
CADIP2
CADIN2
CADIP1
CADIN1
CADIP0
CADIN0
VCC_DDR
R50
R50
15R1%0805-1
15R1%0805-1
R49
R49
15R1%0805-1
15R1%0805-1
CPU_M_VREF
C61
C61
C0.1U16X
C0.1U16X
C55
C55
C1000P50X
C1000P50X
-LDTRST 11
LDT_RST_L
ALL_PWRGD 18,27
A A
3VDUAL
14 7
U3BU3B
3 4
3VDUAL
14 7
U3CU3C
5 6
LDT_RST_L
CPU_PWRGD_L
CPU_THRIP_L CPU_THRIP#
Q4
Q4
N-MMBT3904_SOT23
N-MMBT3904_SOT23
VDDA25
R27 10KR0402 R27 10KR0402
R26 10KR0402 R26 10KR0402
VCC_DDR
RN5
RN5
1
3
5
7
2
4
6
8
8P4R-330R
8P4R-330R
HT_STOP_L
CPU_THRIP_L
CPU_PWRGD_L
LDT_RST_L
LDT_RST_L
-HTSTOP
CPU_THRIP# 27
CPU Side
Micro Star Restricted Secret
Micro Star Restricted Secret
Micro Star Restricted Secret
Title
Title
Title
ATHLON64 HT I/F CTRL & DEBUG
ATHLON64 HT I/F CTRL & DEBUG
ATHLON64 HT I/F CTRL & DEBUG
Document Number
Document Number
Document Number
MICRO-STAR INT'L CO.,LTD.
MICRO-STAR INT'L CO.,LTD.
MICRO-STAR INT'L CO.,LTD.
No. 69, Li-De St, Jung-He City,
No. 69, Li-De St, Jung-He City,
No. 69, Li-De St, Jung-He City,
Taipei Hsien, Taiwan
Taipei Hsien, Taiwan
Taipei Hsien, Taiwan
http://www.msi.com.tw
http://www.msi.com.tw
5
4
3
2
http://www.msi.com.tw
MS-7312
MS-7312
MS-7312
1
Last Revision Date:
Last Revision Date:
Last Revision Date:
Wednesday, June 14, 2006
Wednesday, June 14, 2006
Wednesday, June 14, 2006
Sheet
Sheet
Sheet
43 3
43 3
43 3
Rev
Rev
Rev
0A
0A
0A
of
of
of
5
4
3
2
1
MEM_MA_DQS_L[7..0] 7
MEM_MA_DQS_H[7..0] 7
MEM_MA_DM[7..0] 7
MEM_MB_DQS_L[7..0] 7
MEM_MB_DQS_H[7..0] 7
MEM_MB_DM[7..0] 7
D D
CPU3000B
CPU3000B
MEMORY INTERFACE A
MEM_MA0_CLK_H2 7,8
MEM_MA0_CLK_L2 7,8
MEM_MA0_CLK_H1 7,8
MEM_MA0_CLK_L1 7,8
MEM_MA0_CLK_H0 7,8
MEM_MA0_CLK_L0 7,8
MEM_MA0_CS_L1 7,8
MEM_MA0_CS_L0 7,8
MEM_MA0_ODT0 7,8
MEM_MA0_CLK_H2
MEM_MA0_CLK_L2
MEM_MA0_CLK_H1
MEM_MA0_CLK_L1
MEM_MA0_CLK_H0
MEM_MA0_CLK_L0
MEM_MA0_CS_L1
MEM_MA0_CS_L0
MEM_MA0_ODT0
AG21
AG20
AC25
AA24
AC28
AE20
AE19
AD27
AA25
G19
H19
U27
U26
G20
G21
V27
W27
AC27
C C
MEM_MA_CAS_L 7,8
MEM_MA_WE_L 7,8
MEM_MA_RAS_L 7,8
MEM_MA_BANK2 7,8
MEM_MA_BANK1 7,8
MEM_MA_BANK0 7,8
MEM_MA_CKE0 7,8
MEM_MA_ADD[15..0] 7,8
B B
MEM_MA_CAS_L
MEM_MA_WE_L
MEM_MA_RAS_L
MEM_MA_BANK2
MEM_MA_BANK1
MEM_MA_BANK0
MEM_MA_CKE0
MEM_MA_ADD15
MEM_MA_ADD14
MEM_MA_ADD13
MEM_MA_ADD12
MEM_MA_ADD11
MEM_MA_ADD10
MEM_MA_ADD9
MEM_MA_ADD8
MEM_MA_ADD7
MEM_MA_ADD6
MEM_MA_ADD5
MEM_MA_ADD4
MEM_MA_ADD3
MEM_MA_ADD2
MEM_MA_ADD1
MEM_MA_ADD0
MEM_MA_DQS_H7
MEM_MA_DQS_L7
MEM_MA_DQS_H6
MEM_MA_DQS_L6
MEM_MA_DQS_H5
MEM_MA_DQS_L5
MEM_MA_DQS_H4
MEM_MA_DQS_L4
MEM_MA_DQS_H3
MEM_MA_DQS_L3
MEM_MA_DQS_H2
MEM_MA_DQS_L2
MEM_MA_DQS_H1
MEM_MA_DQS_L1
MEM_MA_DQS_H0
MEM_MA_DQS_L0
MEM_MA_DM7
MEM_MA_DM6
MEM_MA_DM5
MEM_MA_DM4
MEM_MA_DM3
MEM_MA_DM2
MEM_MA_DM1
MEM_MA_DM0
AB25
AB27
AA26
AA27
AC26
AD15
AE15
AG18
AG19
AG24
AG25
AG27
AG28
AF15
AF19
AJ25
AH29
N25
Y27
M25
M27
N24
N26
P25
Y25
N27
R24
P27
R25
R26
R27
U25
W24
D29
C29
C25
D25
E19
G15
B29
E24
E18
H15
L27
T25
T27
F19
F15
MEMORY INTERFACE A
MA0_CLK_H(2)
MA0_CLK_L(2)
MA0_CLK_H(1)
MA0_CLK_L(1)
MA0_CLK_H(0)
MA0_CLK_L(0)
MA0_CS_L(1)
MA0_CS_L(0)
MA0_ODT(0)
MA1_CLK_H(2)
MA1_CLK_L(2)
MA1_CLK_H(1)
MA1_CLK_L(1)
MA1_CLK_H(0)
MA1_CLK_L(0)
MA1_CS_L(1)
MA1_CS_L(0)
MA1_ODT(0)
MA_CAS_L
MA_WE_L
MA_RAS_L
MA_BANK(2)
MA_BANK(1)
MA_BANK(0)
MA_CKE(1)
MA_CKE(0)
MA_ADD(15)
MA_ADD(14)
MA_ADD(13)
MA_ADD(12)
MA_ADD(11)
MA_ADD(10)
MA_ADD(9)
MA_ADD(8)
MA_ADD(7)
MA_ADD(6)
MA_ADD(5)
MA_ADD(4)
MA_ADD(3)
MA_ADD(2)
MA_ADD(1)
MA_ADD(0)
MA_DQS_H(7)
MA_DQS_L(7)
MA_DQS_H(6)
MA_DQS_L(6)
MA_DQS_H(5)
MA_DQS_L(5)
MA_DQS_H(4)
MA_DQS_L(4)
MA_DQS_H(3)
MA_DQS_L(3)
MA_DQS_H(2)
MA_DQS_L(2)
MA_DQS_H(1)
MA_DQS_L(1)
MA_DQS_H(0)
MA_DQS_L(0)
MA_DM(7)
MA_DM(6)
MA_DM(5)
MA_DM(4)
MA_DM(3)
MA_DM(2)
MA_DM(1)
MA_DM(0)
ZIF-SOCKET940
ZIF-SOCKET940
MA_DATA(63)
MA_DATA(62)
MA_DATA(61)
MA_DATA(60)
MA_DATA(59)
MA_DATA(58)
MA_DATA(57)
MA_DATA(56)
MA_DATA(55)
MA_DATA(54)
MA_DATA(53)
MA_DATA(52)
MA_DATA(51)
MA_DATA(50)
MA_DATA(49)
MA_DATA(48)
MA_DATA(47)
MA_DATA(46)
MA_DATA(45)
MA_DATA(44)
MA_DATA(43)
MA_DATA(42)
MA_DATA(41)
MA_DATA(40)
MA_DATA(39)
MA_DATA(38)
MA_DATA(37)
MA_DATA(36)
MA_DATA(35)
MA_DATA(34)
MA_DATA(33)
MA_DATA(32)
MA_DATA(31)
MA_DATA(30)
MA_DATA(29)
MA_DATA(28)
MA_DATA(27)
MA_DATA(26)
MA_DATA(25)
MA_DATA(24)
MA_DATA(23)
MA_DATA(22)
MA_DATA(21)
MA_DATA(20)
MA_DATA(19)
MA_DATA(18)
MA_DATA(17)
MA_DATA(16)
MA_DATA(15)
MA_DATA(14)
MA_DATA(13)
MA_DATA(12)
MA_DATA(11)
MA_DATA(10)
MA_DATA(9)
MA_DATA(8)
MA_DATA(7)
MA_DATA(6)
MA_DATA(5)
MA_DATA(4)
MA_DATA(3)
MA_DATA(2)
MA_DATA(1)
MA_DATA(0)
MA_DQS_H(8)
MA_DQS_L(8)
MA_DM(8)
MA_CHECK(7)
MA_CHECK(6)
MA_CHECK(5)
MA_CHECK(4)
MA_CHECK(3)
MA_CHECK(2)
MA_CHECK(1)
MA_CHECK(0)
AE14
AG14
AG16
AD17
AD13
AE13
AG15
AE16
AG17
AE18
AD21
AG22
AE17
AF17
AF21
AE21
AF23
AE23
AJ26
AG26
AE22
AG23
AH25
AF25
AJ28
AJ29
AF29
AE26
AJ27
AH27
AG29
AF27
E29
E28
D27
C27
G26
F27
C28
E27
F25
E25
E23
D23
E26
MEM_MA_DATA18
C26
MEM_MA_DATA17
G23
MEM_MA_DATA16
F23
MEM_MA_DATA15
E22
MEM_MA_DATA14
E21
MEM_MA_DATA13
F17
MEM_MA_DATA12
G17
MEM_MA_DATA11
G22
MEM_MA_DATA10
F21
G18
E17
G16
E15
G13
H13
H17
E16
E14
G14
J28
J27
J25
K25
J26
G28
G27
L24
K27
H29
H27
MEM_MA_DATA63
MEM_MA_DATA62
MEM_MA_DATA61
MEM_MA_DATA60
MEM_MA_DATA59
MEM_MA_DATA58
MEM_MA_DATA57
MEM_MA_DATA56
MEM_MA_DATA55
MEM_MA_DATA54
MEM_MA_DATA53
MEM_MA_DATA52
MEM_MA_DATA51
MEM_MA_DATA50
MEM_MA_DATA49
MEM_MA_DATA48
MEM_MA_DATA47
MEM_MA_DATA46
MEM_MA_DATA45
MEM_MA_DATA44
MEM_MA_DATA43
MEM_MA_DATA42
MEM_MA_DATA41
MEM_MA_DATA40
MEM_MA_DATA39
MEM_MA_DATA38
MEM_MA_DATA37
MEM_MA_DATA36
MEM_MA_DATA35
MEM_MA_DATA34
MEM_MA_DATA33
MEM_MA_DATA32
MEM_MA_DATA31
MEM_MA_DATA30
MEM_MA_DATA29
MEM_MA_DATA28
MEM_MA_DATA27
MEM_MA_DATA26
MEM_MA_DATA25
MEM_MA_DATA24
MEM_MA_DATA23
MEM_MA_DATA22
MEM_MA_DATA21
MEM_MA_DATA20
MEM_MA_DATA19
MEM_MA_DATA9
MEM_MA_DATA8
MEM_MA_DATA7
MEM_MA_DATA6
MEM_MA_DATA5
MEM_MA_DATA4
MEM_MA_DATA3
MEM_MA_DATA2
MEM_MA_DATA1
MEM_MA_DATA0
MEM_MA_DATA[63..0] 7
MEM_MB0_CLK_H2 7,8
MEM_MB0_CLK_L2 7,8
MEM_MB0_CLK_H1 7,8
MEM_MB0_CLK_L1 7,8
MEM_MB0_CLK_H0 7,8
MEM_MB0_CLK_L0 7,8
MEM_MB0_CS_L1 7,8
MEM_MB0_CS_L0 7,8
MEM_MB0_ODT0 7,8
MEM_MB_CAS_L 7,8
MEM_MB_WE_L 7,8
MEM_MB_RAS_L 7,8
MEM_MB_BANK2 7,8
MEM_MB_BANK1 7,8
MEM_MB_BANK0 7,8
MEM_MB_CKE0 7,8
MEM_MB_ADD[15..0] 7,8
MEM_MB0_CLK_H2
MEM_MB0_CLK_L2
MEM_MB0_CLK_H1
MEM_MB0_CLK_L1
MEM_MB0_CLK_H0
MEM_MB0_CLK_L0
MEM_MB0_CS_L1
MEM_MB0_CS_L0
MEM_MB0_ODT0
MEM_MB_CAS_L
MEM_MB_WE_L
MEM_MB_RAS_L
MEM_MB_BANK2
MEM_MB_BANK1
MEM_MB_BANK0
MEM_MB_CKE0
MEM_MB_ADD15
MEM_MB_ADD14
MEM_MB_ADD13
MEM_MB_ADD12
MEM_MB_ADD11
MEM_MB_ADD10
MEM_MB_ADD9
MEM_MB_ADD8
MEM_MB_ADD7
MEM_MB_ADD6
MEM_MB_ADD5
MEM_MB_ADD4
MEM_MB_ADD3
MEM_MB_ADD2
MEM_MB_ADD1
MEM_MB_ADD0
MEM_MB_DQS_H7
MEM_MB_DQS_L7
MEM_MB_DQS_H6
MEM_MB_DQS_L6
MEM_MB_DQS_H5
MEM_MB_DQS_L5
MEM_MB_DQS_H4
MEM_MB_DQS_L4
MEM_MB_DQS_H3
MEM_MB_DQS_L3
MEM_MB_DQS_H2
MEM_MB_DQS_L2
MEM_MB_DQS_H1
MEM_MB_DQS_L1
MEM_MB_DQS_H0
MEM_MB_DQS_L0
MEM_MB_DM7
MEM_MB_DM6
MEM_MB_DM5
MEM_MB_DM4
MEM_MB_DM3
MEM_MB_DM2
MEM_MB_DM1
MEM_MB_DM0
AJ19
AK19
AE30
AC31
AD29
AL19
AL18
W29
W28
AE29
AB31
AD31
AC29
AC30
AB29
AA31
AA28
M31
M29
AE31
AA29
AA30
AK13
AJ13
AK17
AJ17
AK23
AL23
AL28
AL29
AJ14
AH17
AJ23
AK29
A18
A19
U31
U30
C19
D19
N31
N28
N29
N30
P29
P31
R29
R28
R31
R30
T31
T29
U29
U28
D31
C31
C24
C23
D17
C17
C14
C13
C30
A23
B17
B13
MB0_CLK_H(2)
MB0_CLK_L(2)
MB0_CLK_H(1)
MB0_CLK_L(1)
MB0_CLK_H(0)
MB0_CLK_L(0)
MB0_CS_L(1)
MB0_CS_L(0)
MB0_ODT(0)
MB1_CLK_H(2)
MB1_CLK_L(2)
MB1_CLK_H(1)
MB1_CLK_L(1)
MB1_CLK_H(0)
MB1_CLK_L(0)
MB1_CS_L(1)
MB1_CS_L(0)
MB1_ODT(0)
MB_CAS_L
MB_WE_L
MB_RAS_L
MB_BANK(2)
MB_BANK(1)
MB_BANK(0)
MB_CKE(1)
MB_CKE(0)
MB_ADD(15)
MB_ADD(14)
MB_ADD(13)
MB_ADD(12)
MB_ADD(11)
MB_ADD(10)
MB_ADD(9)
MB_ADD(8)
MB_ADD(7)
MB_ADD(6)
MB_ADD(5)
MB_ADD(4)
MB_ADD(3)
MB_ADD(2)
MB_ADD(1)
MB_ADD(0)
MB_DQS_H(7)
MB_DQS_L(7)
MB_DQS_H(6)
MB_DQS_L(6)
MB_DQS_H(5)
MB_DQS_L(5)
MB_DQS_H(4)
MB_DQS_L(4)
MB_DQS_H(3)
MB_DQS_L(3)
MB_DQS_H(2)
MB_DQS_L(2)
MB_DQS_H(1)
MB_DQS_L(1)
MB_DQS_H(0)
MB_DQS_L(0)
MB_DM(7)
MB_DM(6)
MB_DM(5)
MB_DM(4)
MB_DM(3)
MB_DM(2)
MB_DM(1)
MB_DM(0)
ZIF-SOCKET940
ZIF-SOCKET940
CPU3000C
CPU3000C
MEMORY INTERFACE B
MEMORY INTERFACE B
MB_DATA(63)
MB_DATA(62)
MB_DATA(61)
MB_DATA(60)
MB_DATA(59)
MB_DATA(58)
MB_DATA(57)
MB_DATA(56)
MB_DATA(55)
MB_DATA(54)
MB_DATA(53)
MB_DATA(52)
MB_DATA(51)
MB_DATA(50)
MB_DATA(49)
MB_DATA(48)
MB_DATA(47)
MB_DATA(46)
MB_DATA(45)
MB_DATA(44)
MB_DATA(43)
MB_DATA(42)
MB_DATA(41)
MB_DATA(40)
MB_DATA(39)
MB_DATA(38)
MB_DATA(37)
MB_DATA(36)
MB_DATA(35)
MB_DATA(34)
MB_DATA(33)
MB_DATA(32)
MB_DATA(31)
MB_DATA(30)
MB_DATA(29)
MB_DATA(28)
MB_DATA(27)
MB_DATA(26)
MB_DATA(25)
MB_DATA(24)
MB_DATA(23)
MB_DATA(22)
MB_DATA(21)
MB_DATA(20)
MB_DATA(19)
MB_DATA(18)
MB_DATA(17)
MB_DATA(16)
MB_DATA(15)
MB_DATA(14)
MB_DATA(13)
MB_DATA(12)
MB_DATA(11)
MB_DATA(10)
MB_DATA(9)
MB_DATA(8)
MB_DATA(7)
MB_DATA(6)
MB_DATA(5)
MB_DATA(4)
MB_DATA(3)
MB_DATA(2)
MB_DATA(1)
MB_DATA(0)
MB_DQS_H(8)
MB_DQS_L(8)
MB_DM(8)
MB_CHECK(7)
MB_CHECK(6)
MB_CHECK(5)
MB_CHECK(4)
MB_CHECK(3)
MB_CHECK(2)
MB_CHECK(1)
MB_CHECK(0)
AH13
AL13
AL15
AJ15
AF13
AG13
AL14
AK15
AL16
AL17
AK21
AL21
AH15
AJ16
AH19
AL20
AJ22
AL22
AL24
AK25
AJ21
AH21
AH23
AJ24
AL27
AK27
AH31
AG30
AL25
AL26
AJ30
AJ31
E31
E30
B27
A27
F29
F31
A29
A28
A25
A24
C22
D21
A26
B25
B23
A22
B21
A20
C16
D15
C21
A21
A17
A16
B15
A14
E13
F13
C15
A15
A13
D13
J31
J30
J29
K29
K31
G30
G29
L29
L28
H31
G31
MEM_MB_DATA63
MEM_MB_DATA62
MEM_MB_DATA61
MEM_MB_DATA60
MEM_MB_DATA59
MEM_MB_DATA58
MEM_MB_DATA57
MEM_MB_DATA56
MEM_MB_DATA55
MEM_MB_DATA54
MEM_MB_DATA53
MEM_MB_DATA52
MEM_MB_DATA51
MEM_MB_DATA50
MEM_MB_DATA49
MEM_MB_DATA48
MEM_MB_DATA47
MEM_MB_DATA46
MEM_MB_DATA45
MEM_MB_DATA44
MEM_MB_DATA43
MEM_MB_DATA42
MEM_MB_DATA41
MEM_MB_DATA40
MEM_MB_DATA39
MEM_MB_DATA38
MEM_MB_DATA37
MEM_MB_DATA36
MEM_MB_DATA35
MEM_MB_DATA34
MEM_MB_DATA33
MEM_MB_DATA32
MEM_MB_DATA31
MEM_MB_DATA30
MEM_MB_DATA29
MEM_MB_DATA28
MEM_MB_DATA27
MEM_MB_DATA26
MEM_MB_DATA25
MEM_MB_DATA24
MEM_MB_DATA23
MEM_MB_DATA22
MEM_MB_DATA21
MEM_MB_DATA20
MEM_MB_DATA19
MEM_MB_DATA18
MEM_MB_DATA17
MEM_MB_DATA16
MEM_MB_DATA15
MEM_MB_DATA14
MEM_MB_DATA13
MEM_MB_DATA12
MEM_MB_DATA11
MEM_MB_DATA10
MEM_MB_DATA9
MEM_MB_DATA8
MEM_MB_DATA7
MEM_MB_DATA6
MEM_MB_DATA5
MEM_MB_DATA4
MEM_MB_DATA3
MEM_MB_DATA2
MEM_MB_DATA1
MEM_MB_DATA0
MEM_MB_DATA[63..0] 7
A A
Micro Star Restricted Secret
Micro Star Restricted Secret
Micro Star Restricted Secret
Title
Title
Title
ATHLON64 DDR MEMORY I/F
ATHLON64 DDR MEMORY I/F
ATHLON64 DDR MEMORY I/F
Document Number
Document Number
Document Number
MICRO-STAR INT'L CO.,LTD.
MICRO-STAR INT'L CO.,LTD.
MICRO-STAR INT'L CO.,LTD.
No. 69, Li-De St, Jung-He City,
No. 69, Li-De St, Jung-He City,
No. 69, Li-De St, Jung-He City,
Taipei Hsien, Taiwan
Taipei Hsien, Taiwan
Taipei Hsien, Taiwan
http://www.msi.com.tw
http://www.msi.com.tw
5
4
3
2
http://www.msi.com.tw
MS-7312
MS-7312
MS-7312
1
Last Revision Date:
Last Revision Date:
Last Revision Date:
Monday, June 05, 2006
Monday, June 05, 2006
Monday, June 05, 2006
Sheet
Sheet
Sheet
53 3
53 3
53 3
Rev
Rev
Rev
0A
0A
0A
of
of
of
5
4
3
2
1
VCCP
CPU3000F
CPU3000F
VDD1
VDD1
A4
VDD1
A6
VDD2
AA8
VDD3
D D
C C
B B
AA10
AA12
AA14
AA16
AA18
AB7
AB9
AB11
AC4
AC5
AC8
AC10
AD2
AD3
AD7
AD9
AE10
AF7
AF9
AG4
AG5
AG7
AH2
AH3
E10
G10
G12
H11
H23
K11
K13
K15
K17
K19
K21
K23
Y17
Y19
B3
B5
B7
C2
C4
C6
C8
D3
D5
D7
D9
E4
E6
E8
F5
F7
F9
F11
G6
G8
H7
J8
J12
J14
J16
J18
J20
J22
J24
K7
K9
L4
L5
L8
L10
L12
VDD4
VDD5
VDD6
VDD7
VDD8
VDD9
VDD10
VDD11
VDD12
VDD13
VDD14
VDD15
VDD16
VDD17
VDD18
VDD19
VDD20
VDD21
VDD22
VDD23
VDD24
VDD25
VDD26
VDD27
VDD28
VDD29
VDD30
VDD31
VDD32
VDD33
VDD34
VDD35
VDD36
VDD37
VDD38
VDD39
VDD40
VDD41
VDD42
VDD43
VDD44
VDD45
VDD46
VDD47
VDD48
VDD49
VDD50
VDD51
VDD52
VDD53
VDD54
VDD55
VDD56
VDD57
VDD58
VDD59
VDD60
VDD61
VDD62
VDD63
VDD64
VDD65
VDD66
VDD67
VDD68
VDD69
VDD70
VDD71
VDD72
VDD73
VDD74
VDD75
VDD150
VDD151
ZIF-SOCKET940
ZIF-SOCKET940
VSS1
VSS2
VSS3
VSS4
VSS5
VSS6
VSS7
VSS8
VSS9
VSS10
VSS11
VSS12
VSS13
VSS14
VSS15
VSS16
VSS17
VSS18
VSS19
VSS20
VSS21
VSS22
VSS23
VSS24
VSS25
VSS26
VSS27
VSS28
VSS29
VSS30
VSS31
VSS32
VSS33
VSS34
VSS35
VSS36
VSS37
VSS38
VSS39
VSS40
VSS41
VSS42
VSS43
VSS44
VSS45
VSS46
VSS47
VSS48
VSS49
VSS50
VSS51
VSS52
VSS53
VSS54
VSS55
VSS56
VSS57
VSS58
VSS59
VSS60
VSS61
VSS62
VSS63
VSS64
VSS65
VSS66
VSS67
VSS68
VSS69
VSS70
VSS71
VSS72
VSS73
VSS74
VSS240
VSS241
A3
A7
A9
A11
AA4
AA5
AA7
AA9
AA11
AA13
AA15
AA17
AA19
AA21
AA23
AB2
AB3
AB8
AB10
AB12
AB14
AB16
AB18
AB20
AB22
AC7
AC9
AC11
AC13
AC15
AC17
AC19
AC21
AC23
AD8
AD10
AD12
AD14
AD16
AD20
AD22
AD24
AE4
AE5
AE9
AE11
AF2
AF3
AF8
AF10
AF12
AF14
AF16
AF18
AF20
AF22
AF24
AF26
AF28
AG10
AG11
AH14
AH16
AH18
AH20
AH22
AH24
AH26
AH28
AH30
AK2
AK14
AK16
AK18
Y14
Y16
VCCP
W10
W12
W14
W16
W18
W20
M11
M13
M15
M17
M19
N10
N12
N14
N16
N18
P11
P13
P15
P17
P19
R10
R12
R14
R16
R18
R20
U10
U12
U14
U16
U18
U20
V11
V13
V15
V17
V19
V21
Y11
Y13
Y15
Y21
L14
L16
L18
M2
M3
M7
M9
N8
P7
P9
R4
R5
R8
T2
T3
T7
T9
T11
T13
T15
T17
T19
T21
U8
V9
W4
W5
W8
Y2
Y3
Y7
Y9
CPU3000G
CPU3000G
VDD2
VDD2
VDD1
VDD2
VDD3
VDD4
VDD5
VDD6
VDD7
VDD8
VDD9
VDD10
VDD11
VDD12
VDD13
VDD14
VDD15
VDD16
VDD17
VDD18
VDD19
VDD20
VDD21
VDD22
VDD23
VDD24
VDD25
VDD26
VDD27
VDD28
VDD29
VDD30
VDD31
VDD32
VDD33
VDD34
VDD35
VDD36
VDD37
VDD38
VDD39
VDD40
VDD41
VDD42
VDD43
VDD44
VDD45
VDD46
VDD47
VDD48
VDD49
VDD50
VDD51
VDD52
VDD53
VDD54
VDD55
VDD56
VDD57
VDD58
VDD59
VDD60
VDD61
VDD62
VDD63
VDD64
VDD65
VDD66
VDD67
VDD68
VDD69
VDD70
VDD71
VDD72
VDD73
VDD74
VDD75
ZIF-SOCKET940
ZIF-SOCKET940
VSS1
VSS2
VSS3
VSS4
VSS5
VSS6
VSS7
VSS8
VSS9
VSS10
VSS11
VSS12
VSS13
VSS14
VSS15
VSS16
VSS17
VSS18
VSS19
VSS20
VSS21
VSS22
VSS23
VSS24
VSS25
VSS26
VSS27
VSS28
VSS29
VSS30
VSS31
VSS32
VSS33
VSS34
VSS35
VSS36
VSS37
VSS38
VSS39
VSS40
VSS41
VSS42
VSS43
VSS44
VSS45
VSS46
VSS47
VSS48
VSS49
VSS50
VSS51
VSS52
VSS53
VSS54
VSS55
VSS56
VSS57
VSS58
VSS59
VSS60
VSS61
VSS62
VSS63
VSS64
VSS65
VSS66
VSS67
VSS68
VSS69
VSS70
VSS71
VSS72
VSS73
VSS74
VSS75
AK20
AK22
AK24
AK26
AK28
AK30
AL5
B4
B9
B11
B14
B16
B18
B20
B22
B24
B26
B28
B30
C3
D14
D16
D18
D20
D22
D24
D26
D28
D30
E11
F4
F14
F16
F18
F20
F22
F24
F26
F28
F30
G9
G11
H8
H10
H12
H14
H16
H18
H22
H24
H26
H28
H30
J4
J5
J7
J9
J11
J13
J15
J17
J19
J21
J23
K2
K3
K8
K10
K12
K14
K16
K18
K20
K22
Y18
VCCP
AA20
AA22
AB13
AB15
AB17
AB19
AB21
AB23
AC12
AC14
AC16
AC18
AC20
AC22
AD11
AD23
AE12
AF11
M21
M23
N20
N22
R22
U22
W22
L20
L22
P21
P23
T23
V23
Y23
5
6
7
8
1
2
3
CPU3000H
CPU3000H
VDD3
VDD3
VDD1
VDD2
VDD3
VDD4
VDD5
VDD6
VDD7
VDD8
VDD9
VDD10
VDD11
VDD12
VDD13
VDD14
VDD15
VDD16
VDD17
VDD18
VDD19
VDD20
VDD21
VDD22
VDD23
VDD24
VDD25
VDD26
VDD27
VDD28
VDD29
VDD30
VDD31
VDD32
GND
GND
GND
GND
GND
GND
GND
ZIF-SOCKET940
ZIF-SOCKET940
VSS1
VSS2
VSS3
VSS4
VSS5
VSS6
VSS7
VSS8
VSS9
VSS10
VSS11
VSS12
VSS13
VSS14
VSS15
VSS16
VSS17
VSS18
VSS19
VSS20
VSS21
VSS22
VSS23
VSS24
VSS25
VSS26
VSS27
VSS28
VSS29
VSS30
VSS31
VSS32
VSS33
VSS34
VSS35
VSS36
VSS37
VSS38
VSS39
VSS40
VSS41
VSS42
VSS43
VSS44
VSS45
VSS46
VSS47
VSS48
VSS49
VSS50
VSS51
VSS52
VSS53
VSS54
VSS55
VSS56
VSS57
VSS58
VSS59
VSS60
VSS61
VSS62
VSS63
VSS64
VSS65
N17
N19
N21
N23
P2
P3
P8
P10
P12
P14
P16
P18
P20
P22
R7
R9
R11
R13
R15
R17
R19
R21
R23
T8
T10
T12
T14
T16
T18
T20
T22
U4
U5
U7
U9
U11
U13
U15
U17
U19
U21
U23
V2
V3
V10
V12
V14
V16
V18
V20
V22
W9
W11
W13
W15
W17
W19
W21
W23
Y8
Y10
Y12
W7
Y20
Y22
VTT_DDR
VCC_DDR
VCCP
C450
C450
C0.22U16X/B
C0.22U16X/B
VCCP
C456
C456
X_C22U6.3X1206/B
X_C22U6.3X1206/B
VDD_12_A
C441
C441
C0.22U16X/B
C0.22U16X/B
C22U6.3X1206/B
C22U6.3X1206/B
C454
C454
AB24
AB26
AB28
AB30
AC24
AD26
AD28
AD30
AF30
M24
M26
M28
M30
P24
P26
P28
P30
V25
V26
V28
V30
Y24
Y26
Y28
Y29
AJ4
AJ3
AJ2
AJ1
D12
C12
B12
A12
T24
T26
T28
T30
CPU3000I
CPU3000I
VDDIO
VDDIO
VLDT_A1
VLDT_A2
VLDT_A3
VLDT_A4
VTT1
VTT2
VTT3
VTT4
VDDIO1
VDDIO2
VDDIO3
VDDIO4
VDDIO5
VDDIO6
VDDIO7
VDDIO8
VDDIO9
VDDIO10
VDDIO11
VDDIO12
VDDIO13
VDDIO14
VDDIO15
VDDIO16
VDDIO17
VDDIO18
VDDIO19
VDDIO20
VDDIO21
VDDIO22
VDDIO23
VDDIO24
VDDIO25
VDDIO26
VDDIO27
VDDIO28
VDDIO29
ZIF-SOCKET940
ZIF-SOCKET940
C442
C442
X_C0.22U16X/B
X_C0.22U16X/B
C459
C459
X_C22U6.3X1206/B
X_C22U6.3X1206/B
VLDT_B1
VLDT_B2
VLDT_B3
VLDT_B4
VTT5
VTT6
VTT7
VTT8
VTT9
VSS1
VSS2
VSS3
VSS4
VSS5
VSS6
VSS7
VSS8
VSS9
VSS10
VSS11
VSS12
VSS13
VSS14
VSS15
VSS16
VSS17
VSS18
VSS19
VSS20
VSS21
VSS22
VSS23
VSS24
VSS25
VSS26
VSS27
VSS28
C457
C457
C0.01U50X/B
C0.01U50X/B
H6
H5
H2
H1
AK12
AJ12
AH12
AG12
AL12
K24
K26
K28
K30
L7
L9
L11
L13
L15
L17
L19
L21
L23
M8
M10
M12
M14
M16
M18
M20
M22
N4
N5
N7
N9
N11
N13
N15
VLDT_RUN_B
VTT_DDR
C440
C440
C180P50N/B
C180P50N/B
C444
C444
X_C22U6.3X1206/B
X_C22U6.3X1206/B
C69
C69
C4.7U16Y1206
C4.7U16Y1206
X_C22U6.3X1206/B
X_C22U6.3X1206/B
C460
C460
C22U6.3X1206/B
C22U6.3X1206/B
C443
C443
C453
C453
C22U6.3X1206/B
C22U6.3X1206/B
C446
C446
C22U6.3X1206/B
C22U6.3X1206/B
C438
C438
C22U6.3X1206/B
C22U6.3X1206/B
C447
C447
C22U6.3X1206/B
C22U6.3X1206/B
C451
C451
X_C22U6.3X1206/B
X_C22U6.3X1206/B
C22U6.3X1206/B
C22U6.3X1206/B
C439
C439
VTT_DDR
C41
C36
C36
C54
C33
C33
C0.22U16X
C0.22U16X
A A
VTT_DDR
C174
C174
C0.22U16X
C0.22U16X
C54
C0.22U16X
C0.22U16X
C178
C178
C0.22U16X
C0.22U16X
5
C4.7U10Y0805
C4.7U10Y0805
C188
C188
C4.7U10Y0805
C4.7U10Y0805
C41
C4.7U10Y0805
C4.7U10Y0805
C190
C190
C4.7U10Y0805
C4.7U10Y0805
C47
C47
C10P16N
C10P16N
C185
C185
C10P16N
C10P16N
C153
C153
C10P16N
C10P16N
C34
C34
C10P16N
C10P16N
C59
C59
C1000P50X
C1000P50X
C142
C142
C1000P50X
C1000P50X
C48
C48
C1000P50X
C1000P50X
C158
C158
C1000P50X
C1000P50X
VCC_DDR VCC_DDR
C77
C77
C449
C449
C445
C445
C0.22U16X/B
C0.22U16X/B
C0.22U16X/B
C0.22U16X/B
4
X_C0.22U16X
X_C0.22U16X
C74
C74
X_C4.7U10Y0805
X_C4.7U10Y0805
C79
C79
X_C4.7U10Y0805
X_C4.7U10Y0805
3
C452
C452
C22U6.3X1206/B
C22U6.3X1206/B
C455
C455
C22U6.3X1206/B
C22U6.3X1206/B
C73
C73
X_C4.7U10Y0805
X_C4.7U10Y0805
2
C448
C448
X_C0.22U16X/B
X_C0.22U16X/B
C179
C179
C0.22U16X
C0.22U16X
C458
C458
C71
C71
C0.01U50X/B
C0.01U50X/B
C0.22U16X
C0.22U16X
Micro Star Restricted Secret
Micro Star Restricted Secret
Micro Star Restricted Secret
Title
Title
Title
ATHLON64 PWR & GND
ATHLON64 PWR & GND
ATHLON64 PWR & GND
Document Number
Document Number
Document Number
MICRO-STAR INT'L CO.,LTD.
MICRO-STAR INT'L CO.,LTD.
MICRO-STAR INT'L CO.,LTD.
No. 69, Li-De St, Jung-He City,
No. 69, Li-De St, Jung-He City,
No. 69, Li-De St, Jung-He City,
Taipei Hsien, Taiwan
Taipei Hsien, Taiwan
Taipei Hsien, Taiwan
http://www.msi.com.tw
http://www.msi.com.tw
http://www.msi.com.tw
C208
C208
X_C180P50N
X_C180P50N
MS-7312
MS-7312
MS-7312
1
Last Revision Date:
Last Revision Date:
Last Revision Date:
Tuesday, June 13, 2006
Tuesday, June 13, 2006
Tuesday, June 13, 2006
Sheet
Sheet
Sheet
63 3
63 3
63 3
Rev
Rev
Rev
0A
0A
0A
of
of
of
5
MEM_MA_DQS_H[7..0] 5
MEM_MA_DQS_L[7..0] 5
69
VDD6
64
VDD753VDD859VDD9
170
VDD1067VDD11
VDDQ1
172
178
184
187
189
197
VDD1
VDD2
VDD3
VDD4
164
D D
C C
MEM_MA_ADD[15..0] 5,8
B B
MEM_MA_DM[7..0] 5
SMBCLK1 10,17,24,27
SMBDATA1 10,17,24,27
MEM_MA_BANK2 5,8
MEM_MA_BANK1 5,8
MEM_MA_BANK0 5,8
MEM_MA0_CLK_H0 5,8
MEM_MA0_CLK_L0 5,8
MEM_MA0_CLK_H1 5,8
MEM_MA0_CLK_L1 5,8
MEM_MA0_CLK_H2 5,8
MEM_MA0_CLK_L2 5,8
MEM_MA_CKE0 5,8
MEM_MA_RAS_L 5,8
MEM_MA_CAS_L 5,8
MEM_MA0_CS_L0 5,8
MEM_MA0_CS_L1 5,8
MEM_MA_DM7
MEM_MA_DM6
MEM_MA_DM5
MEM_MA_DM4
MEM_MA_DM3
MEM_MA_DM2
MEM_MA_DM1
MEM_MA_DM0
MEM_MA_DQS_H7
MEM_MA_DQS_L7
MEM_MA_DQS_H6
MEM_MA_DQS_L6
MEM_MA_DQS_H5
MEM_MA_DQS_L5
MEM_MA_DQS_H4
MEM_MA_DQS_L4
MEM_MA_DQS_H3
MEM_MA_DQS_L3
MEM_MA_DQS_H2
MEM_MA_DQS_L2
MEM_MA_DQS_H1
MEM_MA_DQS_L1
MEM_MA_DQS_H0
MEM_MA_DQS_L0
SMB_MEMCLK
SMB_MEMDATA
MEM_MA_BANK2
MEM_MA_BANK1
MEM_MA_BANK0
MEM_MA_ADD15
MEM_MA_ADD14
MEM_MA_ADD13
MEM_MA_ADD12
MEM_MA_ADD11
MEM_MA_ADD10
MEM_MA_ADD9
MEM_MA_ADD8
MEM_MA_ADD7
MEM_MA_ADD6
MEM_MA_ADD5
MEM_MA_ADD4
MEM_MA_ADD3
MEM_MA_ADD2
MEM_MA_ADD1
MEM_MA_ADD0
MEM_MA0_CLK_H0
MEM_MA0_CLK_L0
MEM_MA0_CLK_H1
MEM_MA0_CLK_L1
MEM_MA0_CLK_H2
MEM_MA0_CLK_L2
MEM_MA_CKE0
MEM_MA_RAS_L
MEM_MA_CAS_L
MEM_MA0_CS_L0
MEM_MA0_CS_L1
DQS17_H
165
DQS17_L
232
DQS16_H
233
DQS16_L
223
DQS15_H
224
DQS15_L
211
DQS14_H
212
DQS14_L
202
DQS13_H
203
DQS13_L
155
DQS12_H
156
DQS12_L
146
DQS11_H
147
DQS11_L
134
DQS10_H
135
DQS10_L
125
DQS9_H
126
DQS9_L
46
DQS8_H
45
DQS8_L
114
DQS7_H
113
DQS7_L
105
DQS6_H
104
DQS6_L
93
DQS5_H
92
DQS5_L
84
DQS4_H
83
DQS4_L
37
DQS3_H
36
DQS3_L
28
DQS2_H
27
DQS2_L
16
DQS1_H
15
DQS1_L
7
DQS0_H
6
DQS0_L
101
SA2
240
SA1
239
SA0
120
SCL
119
SDA
54
BA2
190
BA1
71
BA0
173
A15
174
A14
196
A13
176
A12
57
A11
70
A10
177
A9
179
A8
58
A7
180
A6
60
A5
61
A4
182
A3
63
A2
183
A1
188
A0
168
CB7
167
CB6
162
CB5
161
CB4
49
CB3
48
CB2
43
CB1
42
CB0
185
CK0_H
186
CK0_L
137
CK1_H
138
CK1_L
220
CK2_H
221
CK2_L
18
RESET_L
52
CKE0
171
CKE1
192
RAS_L
74
CAS_L
193
S0_L
76
S1_L
DDRII-240_yellow-RH
DDRII-240_yellow-RH
VDD5
4
VCC3 VCC_DDR
175
181
191
194
72
78
238
DIMM1
DIMM1
VDDQ2
VDDQ3
VDDQ4
VDDQ5
VDDQ651VDDQ756VDDQ862VDDQ9
VDDQ1075VDDQ11
VDDSPD
ERR_OUT_L
PAR_IN
CHECK GND
DQ63
DQ62
DQ61
DQ60
DQ59
DQ58
DQ57
DQ56
DQ55
DQ54
DQ53
DQ52
DQ51
DQ50
DQ49
DQ48
DQ47
DQ46
DQ45
DQ44
DQ43
DQ42
DQ41
DQ40
DQ39
DQ38
DQ37
DQ36
DQ35
DQ34
DQ33
DQ32
DQ31
DQ30
DQ29
DQ28
DQ27
DQ26
DQ25
DQ24
DQ23
DQ22
DQ21
DQ20
DQ19
DQ18
DQ17
DQ16
DQ15
DQ14
DQ13
DQ12
DQ11
DQ10
DQ9
DQ8
DQ7
DQ6
DQ5
DQ4
DQ3
DQ2
DQ1
DQ0
WE_L
VREF
TEST
ODT0
ODT1
NC1
236
235
230
229
117
116
111
110
227
226
218
217
108
107
99
98
215
214
209
208
96
95
90
89
206
205
200
199
87
86
81
80
159
158
153
152
40
39
34
33
150
149
144
143
31
30
25
24
141
140
132
131
22
21
13
12
129
128
123
122
10
9
4
3
73
1
102
195
77
55
68
19
MEM_MA_DATA63
MEM_MA_DATA62
MEM_MA_DATA61
MEM_MA_DATA60
MEM_MA_DATA59
MEM_MA_DATA58
MEM_MA_DATA57
MEM_MA_DATA56
MEM_MA_DATA55
MEM_MA_DATA54
MEM_MA_DATA53
MEM_MA_DATA52
MEM_MA_DATA51
MEM_MA_DATA50
MEM_MA_DATA49
MEM_MA_DATA48
MEM_MA_DATA47
MEM_MA_DATA46
MEM_MA_DATA45
MEM_MA_DATA44
MEM_MA_DATA43
MEM_MA_DATA42
MEM_MA_DATA41
MEM_MA_DATA40
MEM_MA_DATA39
MEM_MA_DATA38
MEM_MA_DATA37
MEM_MA_DATA36
MEM_MA_DATA35
MEM_MA_DATA34
MEM_MA_DATA33
MEM_MA_DATA32
MEM_MA_DATA31
MEM_MA_DATA30
MEM_MA_DATA29
MEM_MA_DATA28
MEM_MA_DATA27
MEM_MA_DATA26
MEM_MA_DATA25
MEM_MA_DATA24
MEM_MA_DATA23
MEM_MA_DATA22
MEM_MA_DATA21
MEM_MA_DATA20
MEM_MA_DATA19
MEM_MA_DATA18
MEM_MA_DATA17
MEM_MA_DATA16
MEM_MA_DATA15
MEM_MA_DATA14
MEM_MA_DATA13
MEM_MA_DATA12
MEM_MA_DATA11
MEM_MA_DATA10
MEM_MA_DATA9
MEM_MA_DATA8
MEM_MA_DATA7
MEM_MA_DATA6
MEM_MA_DATA5
MEM_MA_DATA4
MEM_MA_DATA3
MEM_MA_DATA2
MEM_MA_DATA1
MEM_MA_DATA0
MEM_MA_WE_L
VDDR_VREF
MEM_MA0_ODT0
MEM_MA_DATA[63..0] 5
MEM_MA_WE_L 5,8
MEM_MA0_ODT0 5,8
VCC_DDR
VDDR_VREF
C28
C28
C0.1U25Y
C0.1U25Y
3
MEM_MB_DQS_H[7..0] 5
MEM_MB_DQS_L[7..0] 5
164
MEM_MB_DM[7..0] 5
VCC3
MEM_MB_BANK2 5,8
MEM_MB_BANK1 5,8
MEM_MB_BANK0 5,8
MEM_MB_ADD[15..0] 5,8
MEM_MB0_CLK_H0 5,8
MEM_MB0_CLK_L0 5,8
MEM_MB0_CLK_H1 5,8
MEM_MB0_CLK_L1 5,8
MEM_MB0_CLK_H2 5,8
MEM_MB0_CLK_L2 5,8
MEM_MB_CKE0 5,8
MEM_MB_RAS_L 5,8
MEM_MB_CAS_L 5,8
MEM_MB0_CS_L0 5,8
MEM_MB0_CS_L1 5,8
MEM_MB_DM7
MEM_MB_DM6
MEM_MB_DM5
MEM_MB_DM4
MEM_MB_DM3
MEM_MB_DM2
MEM_MB_DM1
MEM_MB_DM0
MEM_MB_DQS_H7
MEM_MB_DQS_L7
MEM_MB_DQS_H6
MEM_MB_DQS_L6
MEM_MB_DQS_H5
MEM_MB_DQS_L5
MEM_MB_DQS_H4
MEM_MB_DQS_L4
MEM_MB_DQS_H3
MEM_MB_DQS_L3
MEM_MB_DQS_H2
MEM_MB_DQS_L2
MEM_MB_DQS_H1
MEM_MB_DQS_L1
MEM_MB_DQS_H0
MEM_MB_DQS_L0
SMB_MEMCLK
SMB_MEMDATA
MEM_MB_BANK2
MEM_MB_BANK1
MEM_MB_BANK0
MEM_MB_ADD15
MEM_MB_ADD14
MEM_MB_ADD13
MEM_MB_ADD12
MEM_MB_ADD11
MEM_MB_ADD10
MEM_MB_ADD9
MEM_MB_ADD8
MEM_MB_ADD7
MEM_MB_ADD6
MEM_MB_ADD5
MEM_MB_ADD4
MEM_MB_ADD3
MEM_MB_ADD2
MEM_MB_ADD1
MEM_MB_ADD0
MEM_MB0_CLK_H0
MEM_MB0_CLK_L0
MEM_MB0_CLK_H1
MEM_MB0_CLK_L1
MEM_MB0_CLK_H2
MEM_MB0_CLK_L2
MEM_MB_CKE0
MEM_MB_RAS_L
MEM_MB_CAS_L
MEM_MB0_CS_L0
MEM_MB0_CS_L1
165
232
233
223
224
211
212
202
203
155
156
146
147
134
135
125
126
46
45
114
113
105
104
93
92
84
83
37
36
28
27
16
15
101
240
239
120
119
54
190
71
173
174
196
176
57
70
177
179
58
180
60
61
182
63
183
188
168
167
162
161
49
48
43
42
185
186
137
138
220
221
18
52
171
192
74
193
76
VCC_DDR
DQS17_H
DQS17_L
DQS16_H
DQS16_L
DQS15_H
DQS15_L
DQS14_H
DQS14_L
DQS13_H
DQS13_L
DQS12_H
DQS12_L
DQS11_H
DQS11_L
DQS10_H
DQS10_L
DQS9_H
DQS9_L
DQS8_H
DQS8_L
DQS7_H
DQS7_L
DQS6_H
DQS6_L
DQS5_H
DQS5_L
DQS4_H
DQS4_L
DQS3_H
DQS3_L
DQS2_H
DQS2_L
DQS1_H
DQS1_L
7
DQS0_H
6
DQS0_L
SA2
SA1
SA0
SCL
SDA
BA2
BA1
BA0
A15
A14
A13
A12
A11
A10
A9
A8
A7
A6
A5
A4
A3
A2
A1
A0
CB7
CB6
CB5
CB4
CB3
CB2
CB1
CB0
CK0_H
CK0_L
CK1_H
CK1_L
CK2_H
CK2_L
RESET_L
CKE0
CKE1
RAS_L
CAS_L
S0_L
S1_L
DDRII-240_green-RH
DDRII-240_green-RH
2
1
VCC3
69
170
175
181
191
194
72
78
VDDQ651VDDQ756VDDQ862VDDQ9
VDDQ1075VDDQ11
ERR_OUT_L
238
VDDSPD
DIMM2
DIMM2
DQ63
DQ62
DQ61
DQ60
DQ59
DQ58
DQ57
DQ56
DQ55
DQ54
DQ53
DQ52
DQ51
DQ50
DQ49
DQ48
DQ47
DQ46
DQ45
DQ44
DQ43
DQ42
DQ41
DQ40
DQ39
DQ38
DQ37
DQ36
DQ35
DQ34
DQ33
DQ32
DQ31
DQ30
DQ29
DQ28
DQ27
DQ26
DQ25
DQ24
DQ23
DQ22
DQ21
DQ20
DQ19
DQ18
DQ17
DQ16
DQ15
DQ14
DQ13
DQ12
DQ11
DQ10
DQ9
DQ8
DQ7
DQ6
DQ5
DQ4
DQ3
DQ2
DQ1
DQ0
WE_L
VREF
TEST
ODT0
ODT1
PAR_IN
NC1
236
235
230
229
117
116
111
110
227
226
218
217
108
107
99
98
215
214
209
208
96
95
90
89
206
205
200
199
87
86
81
80
159
158
153
152
40
39
34
33
150
149
144
143
31
30
25
24
141
140
132
131
22
21
13
12
129
128
123
122
10
9
4
3
73
1
102
195
77
55
68
19
MEM_MB_DATA63
MEM_MB_DATA62
MEM_MB_DATA61
MEM_MB_DATA60
MEM_MB_DATA59
MEM_MB_DATA58
MEM_MB_DATA57
MEM_MB_DATA56
MEM_MB_DATA55
MEM_MB_DATA54
MEM_MB_DATA53
MEM_MB_DATA52
MEM_MB_DATA51
MEM_MB_DATA50
MEM_MB_DATA49
MEM_MB_DATA48
MEM_MB_DATA47
MEM_MB_DATA46
MEM_MB_DATA45
MEM_MB_DATA44
MEM_MB_DATA43
MEM_MB_DATA42
MEM_MB_DATA41
MEM_MB_DATA40
MEM_MB_DATA39
MEM_MB_DATA38
MEM_MB_DATA37
MEM_MB_DATA36
MEM_MB_DATA35
MEM_MB_DATA34
MEM_MB_DATA33
MEM_MB_DATA32
MEM_MB_DATA31
MEM_MB_DATA30
MEM_MB_DATA29
MEM_MB_DATA28
MEM_MB_DATA27
MEM_MB_DATA26
MEM_MB_DATA25
MEM_MB_DATA24
MEM_MB_DATA23
MEM_MB_DATA22
MEM_MB_DATA21
MEM_MB_DATA20
MEM_MB_DATA19
MEM_MB_DATA18
MEM_MB_DATA17
MEM_MB_DATA16
MEM_MB_DATA15
MEM_MB_DATA14
MEM_MB_DATA13
MEM_MB_DATA12
MEM_MB_DATA11
MEM_MB_DATA10
MEM_MB_DATA9
MEM_MB_DATA8
MEM_MB_DATA7
MEM_MB_DATA6
MEM_MB_DATA5
MEM_MB_DATA4
MEM_MB_DATA3
MEM_MB_DATA2
MEM_MB_DATA1
MEM_MB_DATA0
MEM_MB_WE_L
VDDR_VREF
MEM_MB0_ODT0
MEM_MB_DATA[63..0] 5
MEM_MB_WE_L 5,8
VDDR_VREF
C30
C30
C0.1U25Y
C0.1U25Y
MEM_MB0_ODT0 5,8
172
178
184
187
189
197
64
VDD1
VDD2
VDD3
VDD4
VDD5
VDD6
VDD753VDD859VDD9
VDD1067VDD11
VDDQ1
VDDQ2
VDDQ3
VDDQ4
VDDQ5
DIMM 1 DIMM 2
A A
5
ADDR=1010000B
4
R19
R19
56.2R1%
56.2R1%
R18
R18
56.2R1%
56.2R1%
C31
C31
C0.1U16X
C0.1U16X
VDDR_VREF
VDDR_VREF
C27
C27
C0.1U16X
C0.1U16X
3
C29
C29
C1000P50X
C1000P50X
2
ADDR=1010001B
Micro Star Restricted Secret
Micro Star Restricted Secret
Micro Star Restricted Secret
Title
Title
Title
FIRST LOGICAL DDR DIMM
FIRST LOGICAL DDR DIMM
FIRST LOGICAL DDR DIMM
Document Number
Document Number
Document Number
MICRO-STAR INT'L CO.,LTD.
MICRO-STAR INT'L CO.,LTD.
MICRO-STAR INT'L CO.,LTD.
No. 69, Li-De St, Jung-He City,
No. 69, Li-De St, Jung-He City,
No. 69, Li-De St, Jung-He City,
Taipei Hsien, Taiwan
Taipei Hsien, Taiwan
Taipei Hsien, Taiwan
http://www.msi.com.tw
http://www.msi.com.tw
http://www.msi.com.tw
MS-7312
MS-7312
MS-7312
1
Last Revision Date:
Last Revision Date:
Last Revision Date:
Wednesday, June 14, 2006
Wednesday, June 14, 2006
Wednesday, June 14, 2006
Sheet
Sheet
Sheet
73 3
73 3
73 3
Rev
Rev
Rev
0A
0A
0A
of
of
of
5
4
3
2
1
MEM_MA_ADD[15..0] 5,7
C202
C202
C0.1U16X
C0.1U16X
VCC_DDR
C105
C105
C0.1U16X
C0.1U16X
C123
C123
C0.1U16X
C0.1U16X
C114
C114
C0.1U16X
C0.1U16X
MEM_MA_ADD15
VTT_DDR
MEM_MA_BANK2
RN12 8P4R-47R0402 RN12 8P4R-47R0402
1
MEM_MA_BANK2 5,7
MEM_MB_BANK2 5,7
D D
MEM_MA_BANK0 5,7
MEM_MA_RAS_L 5,7
MEM_MB0_CS_L0 5,7
MEM_MA0_CS_L0 5,7
MEM_MB_BANK0 5,7
MEM_MB_RAS_L 5,7
MEM_MA_BANK1 5,7
MEM_MB0_CS_L1 5,7
C C
MEM_MB_BANK2
MEM_MB_ADD12
MEM_MB_ADD9
MEM_MA_ADD12
RN13 8P4R-47R0402 RN13 8P4R-47R0402
MEM_MA_ADD9
MEM_MB_ADD11
MEM_MB_ADD7
MEM_MB_ADD6
RN15 8P4R-47R0402 RN15 8P4R-47R0402
MEM_MA_ADD6
MEM_MA_ADD5
MEM_MB_ADD5
MEM_MA_ADD1
RN17 8P4R-47R0402 RN17 8P4R-47R0402
MEM_MA_ADD2
MEM_MB_ADD1
MEM_MB_ADD2
MEM_MA_BANK0
RN21 8P4R-47R0402 RN21 8P4R-47R0402
MEM_MA_RAS_L
MEM_MB0_CS_L0
MEM_MA0_CS_L0
MEM_MB_BANK0
RN20 8P4R-47R0402 RN20 8P4R-47R0402
MEM_MB_RAS_L
MEM_MA_BANK1
MEM_MA_ADD10
MEM_MB_ADD13
MEM_MB0_CS_L1
2
3
4
5
6
7
8
1
2
3
4
5
6
7
8
1
2
3
4
5
6
7
8
1
2
3
4
5
6
7
8
1
2
3
4
5
6
7
8
1
2
3
4
5
6
7
8
R110 47R0402 R110 47R0402
R112 47R0402 R112 47R0402
MEM_MA0_CLK_H2 5,7
MEM_MA0_CLK_L2 5,7
MEM_MA0_CLK_H1 5,7
MEM_MA0_CLK_L1 5,7
MEM_MA0_CLK_H0 5,7
MEM_MA0_CLK_L0 5,7
MEM_MB0_CLK_H2 5,7
MEM_MB0_CLK_L2 5,7
MEM_MB0_CLK_H1 5,7
MEM_MB0_CLK_L1 5,7
MEM_MB0_CLK_H0 5,7
MEM_MB0_CLK_L0 5,7
MEM_MA0_CLK_H2
MEM_MA0_CLK_L2
MEM_MA0_CLK_H1
MEM_MA0_CLK_L1
MEM_MA0_CLK_H0
MEM_MA0_CLK_L0
MEM_MB0_CLK_H2
MEM_MB0_CLK_L2
MEM_MB0_CLK_H1
MEM_MB0_CLK_L1
MEM_MB0_CLK_H0
MEM_MB0_CLK_L0
C172
C172
C1.5P50N0402
C1.5P50N0402
C58
C58
C1.5P50N0402
C1.5P50N0402
C96
C96
C1.5P50N0402
C1.5P50N0402
C168
C168
C1.5P50N0402
C1.5P50N0402
C57
C57
C1.5P50N0402
C1.5P50N0402
C88
C88
C1.5P50N0402
C1.5P50N0402
VTT_DDR
X_C0.1U16X
X_C0.1U16X
MEM_MA_ADD14
MEM_MA_ADD13
MEM_MA_ADD12
MEM_MA_ADD11
MEM_MA_ADD10
MEM_MA_ADD9
MEM_MA_ADD8
MEM_MA_ADD7
MEM_MA_ADD6
MEM_MA_ADD5
MEM_MA_ADD4
MEM_MA_ADD3
MEM_MA_ADD2
MEM_MA_ADD1
MEM_MA_ADD0
MEM_MA_CAS_L
MEM_MA_WE_L
MEM_MA_RAS_L
MEM_MA_BANK2
MEM_MA_BANK1
MEM_MA_BANK0
Decoupling Between Processor and DIMMs
C189
C189
C94
C94
C0.1U16X
C0.1U16X
C181
C181
X_C0.1U16X
X_C0.1U16X
C191
C191
X_C0.1U16X
X_C0.1U16X
VCC_DDR
C22P50N0402 C80 C22P50N0402 C80
C22P50N0402 C183 C22P50N0402 C183
C22P50N0402 C92 C22P50N0402 C92
C22P50N0402 C93 C22P50N0402 C93
C22P50N0402 C144 C22P50N0402 C144
C22P50N0402 C107 C22P50N0402 C107
C22P50N0402 C103 C22P50N0402 C103
C22P50N0402 C108 C22P50N0402 C108
C22P50N0402 C115 C22P50N0402 C115
C22P50N0402 C110 C22P50N0402 C110
C22P50N0402 C121 C22P50N0402 C121
C22P50N0402 C116 C22P50N0402 C116
C22P50N0402 C122 C22P50N0402 C122
C22P50N0402 C130 C22P50N0402 C130
C22P50N0402 C139 C22P50N0402 C139
C22P50N0402 C165 C22P50N0402 C165
C22P50N0402 C160 C22P50N0402 C160
C22P50N0402 C169 C22P50N0402 C169
C22P50N0402 C84 C22P50N0402 C84
C22P50N0402 C135 C22P50N0402 C135
C22P50N0402 C154 C22P50N0402 C154
Layout: Spread out on VTT pour
C193
C193
C101
C101
C0.1U16X
C0.1U16X
C0.1U16X
C0.1U16X
C0.1U16X
C0.1U16X
C175
C175
C131
C131
C0.1U16X
C0.1U16X
MEM_MB_ADD15
MEM_MB_ADD14
MEM_MB_ADD13
MEM_MB_ADD12
MEM_MB_ADD11
MEM_MB_ADD10
MEM_MB_ADD9
MEM_MB_ADD8
MEM_MB_ADD7
MEM_MB_ADD6
MEM_MB_ADD5
MEM_MB_ADD4
MEM_MB_ADD3
MEM_MB_ADD2
MEM_MB_ADD1
MEM_MB_ADD0
MEM_MB_CAS_L
MEM_MB_WE_L
MEM_MB_RAS_L
MEM_MB_BANK2
MEM_MB_BANK1
MEM_MB_BANK0
C170
C170
X_C0.1U16X
X_C0.1U16X
C91 C22P50N0402 C91 C22P50N0402
C100 C22P50N0402 C100 C22P50N0402 C22P50N0402 C83 C22P50N0402 C83
C182 C22P50N0402 C182 C22P50N0402
C106 C22P50N0402 C106 C22P50N0402
C112 C22P50N0402 C112 C22P50N0402
C167 C22P50N0402 C167 C22P50N0402
C102 C22P50N0402 C102 C22P50N0402
C118 C22P50N0402 C118 C22P50N0402
C113 C22P50N0402 C113 C22P50N0402
C120 C22P50N0402 C120 C22P50N0402
C125 C22P50N0402 C125 C22P50N0402
C126 C22P50N0402 C126 C22P50N0402
C132 C22P50N0402 C132 C22P50N0402
C133 C22P50N0402 C133 C22P50N0402
C138 C22P50N0402 C138 C22P50N0402
C155 C22P50N0402 C155 C22P50N0402
C180 C22P50N0402 C180 C22P50N0402
C171 C22P50N0402 C171 C22P50N0402
C164 C22P50N0402 C164 C22P50N0402
C99 C22P50N0402 C99 C22P50N0402
C143 C22P50N0402 C143 C22P50N0402
C156 C22P50N0402 C156 C22P50N0402
C194
C194
C0.1U16X
C0.1U16X
C0.1U16X
C0.1U16X
C184
C184
VCC_DDR
MEM_MB_ADD[15..0] 5,7
RN11 8P4R-47R0402 RN11 8P4R-47R0402
MEM_MA_CKE0 5,7
B B
MEM_MB_BANK1 5,7
MEM_MA_WE_L 5,7
MEM_MA_CAS_L 5,7
MEM_MB_WE_L 5,7
MEM_MA0_ODT0 5,7
MEM_MB_CKE0 5,7
MEM_MB_CAS_L 5,7
MEM_MA0_CS_L1 5,7
MEM_MB0_ODT0 5,7
A A
5
MEM_MA_CKE0
MEM_MA_ADD15
MEM_MA_ADD14
MEM_MB_ADD8
MEM_MA_ADD11
MEM_MA_ADD7
MEM_MA_ADD8
MEM_MA_ADD4
MEM_MB_ADD4
MEM_MB_ADD3
MEM_MA_ADD3
MEM_MB_ADD0
MEM_MB_BANK1
MEM_MA_ADD0
MEM_MB_ADD10
MEM_MA_WE_L
MEM_MA_CAS_L
MEM_MB_WE_L
MEM_MA0_ODT0
MEM_MB_CKE0
MEM_MB_ADD15
MEM_MB_ADD14
MEM_MB_CAS_L
MEM_MA_ADD13
MEM_MA0_CS_L1
MEM_MB0_ODT0
1
3
5
7
RN14 8P4R-47R0402 RN14 8P4R-47R0402
1
3
5
7
RN16 8P4R-47R0402 RN16 8P4R-47R0402
1
3
5
7
RN18 8P4R-47R0402 RN18 8P4R-47R0402
1
3
5
7
RN22 8P4R-47R0402 RN22 8P4R-47R0402
1
3
5
7
RN10 8P4R-47R0402 RN10 8P4R-47R0402
1
3
5
7
RN23 8P4R-47R0402 RN23 8P4R-47R0402
1
3
5
7
VTT_DDR
2
4
6
8
2
4
6
8
2
4
6
8
2
4
6
8
2
4
6
8
2
4
6
8
2
4
6
8
4
3
VTT_DDR
C204
C204
C0.1U16X
C0.1U16X
C86
C86
X_C0.1U16X
X_C0.1U16X
C22
C22
X_C0.1U16X
X_C0.1U16X
C78
C78
X_C0.1U16X
X_C0.1U16X
C23
C23
X_C0.1U16X
X_C0.1U16X
C76
C76
X_C0.1U16X
X_C0.1U16X
C136
C136
C0.1U16X
C0.1U16X
C0.1U16X
C0.1U16X
2
C87
C87
C119
C119
C0.1U16X
C0.1U16X
C187
C187
C0.1U16X
C0.1U16X
C109
C109
C196
C196
X_C0.1U16X
C0.1U16X
C0.1U16X
X_C0.1U16X
C0.1U16X
C0.1U16X
Micro Star Restricted Secret
Micro Star Restricted Secret
Micro Star Restricted Secret
Title
Title
Title
DDR Terminatior
DDR Terminatior
DDR Terminatior
Document Number
Document Number
Document Number
MICRO-STAR INT'L CO.,LTD.
MICRO-STAR INT'L CO.,LTD.
MICRO-STAR INT'L CO.,LTD.
No. 69, Li-De St, Jung-He City,
No. 69, Li-De St, Jung-He City,
No. 69, Li-De St, Jung-He City,
Taipei Hsien, Taiwan
Taipei Hsien, Taiwan
Taipei Hsien, Taiwan
http://www.msi.com.tw
http://www.msi.com.tw
http://www.msi.com.tw
C200
C200
C81
C81
X_C0.1U16X
X_C0.1U16X
MS-7312
MS-7312
MS-7312
C127
C127
C0.1U16X
C0.1U16X
X_C0.1U16X
X_C0.1U16X
Last Revision Date:
Last Revision Date:
Last Revision Date:
Monday, June 12, 2006
Monday, June 12, 2006
Monday, June 12, 2006
Sheet
Sheet
Sheet
1
C24
C24
Rev
Rev
Rev
0A
0A
0A
83 3
83 3
83 3
of
of
of
5
D D
4
VCC
3
2
1
Use K8T800Pro remove all
VGA CONNECTOR
D6
D6
3
7
3
AB
AR VHSYNC
AR 12
AG 12 DDCDATA 12
AB 12
C C
B B
7
1
8
1
8
2
6
2
6
5
445
M_Z-PACDND006M_MSOP8
M_Z-PACDND006M_MSOP8
R103
R103
M_75R
M_75R
VSYNC 12
HSYNC 12
components
VCC
VVSYNC AG
FB10 M_30L500m_200 FB10 M_30L500m_200
FB9 M_30L500m_200 FB9 M_30L500m_200
FB8 M_30L500m_200 FB8 M_30L500m_200
C163
C162
C162
C161
C161
X_C22P50N
X_C22P50N
R84 M_22R R84 M_22R
C163
X_C22P50N
X_C22P50N
X_C22P50N
X_C22P50N
VCC
R92
R92
M_4.7KR
M_4.7KR
X_C22P50N
X_C22P50N
R85
R85
M_4.7KR
M_4.7KR
C157
C157
C145
C145
X_C22P50N
X_C22P50N
VVSYNC
VHSYNC
R98
R98
R102
R102
M_75R
M_75R
M_75R
M_75R
Trace Note:
1.The 5V traces should be 20 mils to VGA/DFP
F3
1.5AF31.5A
CB3
CB3
M_C0.1U25Y
M_C0.1U25Y
C141
C141
X_C22P50N
X_C22P50N
R86 M_0.082U300m R86 M_0.082U300m
R90 M_0.082U300m R90 M_0.082U300m R91 M_22R R91 M_22R
JVGA2
JVGA2
16
6
1
7
2
8
3
9
4
10
5
17
M_CONN-VGA
M_CONN-VGA
11
12
13
14
15
C124
C124
M_C22P50N
M_C22P50N
VCC
R83
R83
M_1.8KR
M_1.8KR
C128
C128
M_C22P50N
M_C22P50N
R82
R82
M_1.8KR
M_1.8KR
DDCCLK 12
A A
Micro Star Restricted Secret
Micro Star Restricted Secret
Micro Star Restricted Secret
Title
Title
Title
SECOND LOGICAL DDR DIMM
SECOND LOGICAL DDR DIMM
SECOND LOGICAL DDR DIMM
Document Number
Document Number
Document Number
MICRO-STAR INT'L CO.,LTD.
MICRO-STAR INT'L CO.,LTD.
MICRO-STAR INT'L CO.,LTD.
No. 69, Li-De St, Jung-He City,
No. 69, Li-De St, Jung-He City,
No. 69, Li-De St, Jung-He City,
Taipei Hsien, Taiwan
Taipei Hsien, Taiwan
Taipei Hsien, Taiwan
http://www.msi.com.tw
http://www.msi.com.tw
5
4
3
2
http://www.msi.com.tw
MS-7312
MS-7312
MS-7312
1
Last Revision Date:
Last Revision Date:
Last Revision Date:
Wednesday, June 14, 2006
Wednesday, June 14, 2006
Wednesday, June 14, 2006
Sheet
Sheet
Sheet
Rev
Rev
Rev
0A
0A
0A
of
of
of
93 3
93 3
93 3
5
4
3
2
1
Clock Synthesizer
VCC3
FB24 X_120S/0805 FB24 X_120S/0805
CP10
AC_14
APICCLK
GUICLK
CP10
X_COPPER
X_COPPER
CLKVCC3
CLKVCC3
C285
C285
X_C0.1U16Y0402
X_C0.1U16Y0402
D D
C C
AC_14 21
APICCLK 17,18
GUICLK 12
"FS0~FS3" are all internal
pull-up via 100K ohm ..
FS0
FS2
FS1
FS3
B B
R203 10KR0402 R203 10KR0402
R171 10KR0402 R171 10KR0402
R170 10KR0402 R170 10KR0402
R164 10KR0402 R164 10KR0402
CLKVCC3
R176 10KR0402 R176 10KR0402
R223 22R0402 R223 22R0402
R158 22R0402 R158 22R0402
R159 22R0402 R159 22R0402
C284
C284
X_C4.7U10Y0805
X_C4.7U10Y0805
16
19
29
35
38
43
46
32
10
15
20
27
30
33
34
39
42
47
FS0
FS1
48
FS2
45
U11
U11
2
VDDHTT
9
VDDPCI
VDDPCI
VDDPCI
AVDD48
VDDCPU
VDDCPU
VDDA
VDDREF
PD#*
5
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
1
*FS0/REF0
*FS1/REF1
*FS2/REF2
RTM360-803
RTM360-803
C270
C270
C0.1U16Y0402
C0.1U16Y0402
PCICLK8/HTTCLK1/ModeB*
X1
3
CLKX1
14.318MHZ
14.318MHZ
C294
C294
C33P50N
C33P50N
C272
C272
C0.1U16Y0402
C0.1U16Y0402
CPUCLKT0
CPUCLKC0
CPUCLKT1
CPUCLKC1
PCICLK0
PCICLK1
PCICLK2
PCICLK3
PCICLK4
PCICLK5
PCICLK6
PCICLK7
PCICLK10
HTTCLK0/ModeA*
PCICLK9/HTTCLK2
PCICLK11/HTTCLK3
24_48M/24_48SEL#
48MHz/FS3**
RESET#
X2
4
CLKX2
Y4
Y4
C289
C289
C33P50N
C33P50N
SCLK
SDATA
C273
C273
C0.1U16Y0402
C0.1U16Y0402
41
40
37
36
13
14
17
18
21
22
23
24
12
MODEA
6
MODEB
7
HT_66_2
8
11
28
31
25
26
44
C274
C274
C0.1U16Y0402
C0.1U16Y0402
FOR K8T800 Pro
R172 X_15R R172 X_15R
R173 X_15R R173 X_15R
R174 47.5R1%0402 R174 47.5R1%0402
R175 47.5R1%0402 R175 47.5R1%0402
RN30
RN30
7 8
5 6
3 4
1 2
R220 22R R220 22R
R221 22R R221 22R
RN29
RN29
7 8
5 6
3 4
1 2
SEL_24
R168 33R0402 R168 33R0402
R163 22R0402 R163 22R0402
SMBCLK1
SMBDATA1
R161 10KR0402 R161 10KR0402
C318
C313
C313
C0.1U16Y0402
C0.1U16Y0402
CPUCLK0_H CPUCLK0_L
8P4R-22R0402
8P4R-22R0402
8P4R-22R0402
8P4R-22R0402
C317
C317
C0.1U16Y0402
C0.1U16Y0402
R165 X_261R1%0402 R165 X_261R1%0402
HCLK+
HCLKCPUCLK0_H
CPUCLK0_L
LPC_PCLK
SIOPCLK
PCICLK1
PCICLK2
PCICLK3
SBPCLK
VCLK
GCLK_SLOT
GCLK_NB
SIO48M
USBCLK_SB FS3
SMBCLK1 7,17,24,27
SMBDATA1 7,17,24,27
CLK_RESET# 27,28
C318
C0.1U16Y0402
C0.1U16Y0402
HCLK+ 11
HCLK- 11
CPUCLK0_H 4
CPUCLK0_L 4
LPC_PCLK 24
SIOPCLK 24
PCICLK1 19
PCICLK2 19
PCICLK3 20
SBPCLK 18
VCLK 18
GCLK_SLOT 15
GCLK_NB 12
SIO48M 24
USBCLK_SB 16
C271
C271
C0.1U16Y0402
C0.1U16Y0402
APICCLK
VCLK
GCLK_SLOT
GCLK_NB
USBCLK_SB
SIO48M
AC_14
GUICLK
SBPCLK
PCICLK3
PCICLK2
PCICLK1
SIOPCLK
LPC_PCLK
C254 X_C10P25N0402 C254 X_C10P25N0402
C264 X_C10P25N0402 C264 X_C10P25N0402
C319 X_C10P25N0402 C319 X_C10P25N0402
C260 X_C10P25N0402 C260 X_C10P25N0402
C328 X_C10P25N0402 C328 X_C10P25N0402
C327 C10P25N0402 C327 C10P25N0402
CPUCLK0_H
CPUCLK0_L
HCLK+
C261 X_C10P25N0402 C261 X_C10P25N0402
HCLK-
C262 X_C10P25N0402 C262 X_C10P25N0402
C259 X_C10P25N0402 C259 X_C10P25N0402
8P4C-10P
8P4C-10P
For K8T800 Pro
CN9
CN9
7 8
5 6
3 4
1 2
8P4C-10P
8P4C-10P
CN10
CN10
1 2
3 4
5 6
7 8
C257 X_5P C257 X_5P
C258 X_5P C258 X_5P
FS(3:0)
A A
0000
0001
0010
0011
0100
0101
0110
0111
1000
1001
1010
1011
1100
1101
1110
1111
CPU
100.90
133.90
168.00
202.00
100.20
133.50
166.70
200.40
150.00
180.00
210.00
240.00
270.00
233.33
266.67
300.00
HTT
67.27
66.95
67.20
67.33
66.80
66.75
66.68
60.00
60.00
70.00
60.00
67.50
66.67
66.67
75.00
5
PCI
33.63
33.48
33.60
33.67
33.40
33.38
33.34
33.40 66.80
30.00
30.00
35.00
30.00
33.75
33.33
33.33
37.50
MODEA
R231 10KR0402 R231 10KR0402
MODEB
R236 10KR0402 R236 10KR0402
MODE B MODE A
HTTCLK2
HTTCLK1
0
1
1
0
1 1
4
0 0
HTTCLK1
PCICLK8
HTTCLK1
HTTCLK2
PCICLK9
PCICLK9
PIN11 PIN8 PIN7
PCICLK11
HTTCLK3
PCICLK11
PCICLK11
SEL_24
R177 X_10KR0402 R177 X_10KR0402
SEL_24
0
1
3
PIN28
48M
24M
Micro Star Restricted Secret
Micro Star Restricted Secret
Micro Star Restricted Secret
Title
Title
Title
Document Number
Document Number
Document Number
MICRO-STAR INT'L CO.,LTD.
MICRO-STAR INT'L CO.,LTD.
MICRO-STAR INT'L CO.,LTD.
No. 69, Li-De St, Jung-He City,
No. 69, Li-De St, Jung-He City,
No. 69, Li-De St, Jung-He City,
Taipei Hsien, Taiwan
Taipei Hsien, Taiwan
Taipei Hsien, Taiwan
http://www.msi.com.tw
http://www.msi.com.tw
2
http://www.msi.com.tw
Clock Synthesizer
Clock Synthesizer
Clock Synthesizer
MS-7312
MS-7312
MS-7312
Last Revision Date:
Last Revision Date:
Last Revision Date:
Sheet
Sheet
Sheet
1
Wednesday, June 14, 2006
Wednesday, June 14, 2006
Wednesday, June 14, 2006
10 33
10 33
10 33
Rev
Rev
Rev
0A
0A
0A
of
of
of