5
4
3
2
1
MSI
MS-7295 Ver:0B
D D
C C
B B
CPU:
AMD 940 Athlon 64/Athlon 64 FX
System Chipset:
NVIDIA C51PV / C51PVG
NVIDIA MCP 51
On Board Chipset:
LPC Super I/O -- Winbond 83627EHF
LAN Vitess VSC8601
HD Codec --ALC883
BIOS --LPC FLASH ROM 4M
Main Memory:
DDR * 4 (Max 4GB)
Expansion Slots:
PCI-E X 16 *1
PCI-E X 4 *1
PCI 2.3 Slot * 2
PWM:
Controller--Intersil ISL6566CR 3 Phase
Title Page
Cover Sheet 1
Block Diagram
AMD M2 940
System Memory
DDR Terminations
2
3,4,5
6,7
8
C51PVG 9-11
MCP51 12-15
PCI Slot 1,2
PCI-Express X 16 , X4 Slot
SIO-Winbond83627EHF / BIOS
LAN - Vitesse VSC8601
Azalia CODEC ALC883 & Interanl SPK
USB connectors
MS-6 ACPI Controller & MS-6+
PWM - ISL6566CRZ
IDE &FDD & FAN
ATX Connector / Front Panel
VGA Connector
DVI CONNECTOR
COM PORTS & TPM1.2
10/100 LAN RTL8201BL
MANUAL PARTS
History
GPIO SPEC
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31-32
33
NECCI
BOGOTA
34 POWER OK MAP
POWER MAP 35
A A
Micro Star Restricted Secret
Micro Star Restricted Secret
Micro Star Restricted Secret
Title
Title
Title
MSI
Cover Sheet
Cover Sheet
Document Number
Document Number
Document Number
MICRO-STAR INT'L CO.,LTD.
MICRO-STAR INT'L CO.,LTD.
MICRO-STAR INT'L CO.,LTD.
No. 69, Li-De St, Jung-He City,
No. 69, Li-De St, Jung-He City,
No. 69, Li-De St, Jung-He City,
Taipei Hsien, Taiwan
Taipei Hsien, Taiwan
Taipei Hsien, Taiwan
http://www.msi.com.tw
http://www.msi.com.tw
5
4
3
2
http://www.msi.com.tw
Cover Sheet
1
MS-7295
MS-7295
MS-7295
Last Revision Date:
Last Revision Date:
Last Revision Date:
Wednesday, May 10, 2006
Wednesday, May 10, 2006
Wednesday, May 10, 2006
Sheet
Sheet
Sheet
Rev
Rev
Rev
0B
0B
0B
13 5
13 5
13 5
of
of
of
5
4
3
2
1
BLOCK DIAGRAM
D D
POWER
SUPPLY
CONNECTOR
PEX X16, PEX X1
VREG
PCI EXPRESS
SOCKET 940
K9
NFORCE
CRUSH 51
HT 16X16 1GHZ
128-BIT 400/533MHZ
DDR SDRAM CONN 0
DDR SDRAM CONN 2
DDR SDRAM CONN 1
DDR SDRAM CONN3
VGA CONN
468 BGA
C C
PRIMARY IDE
SECONDARY IDE
X4 - SATA CONN
B B
FLOPPY CONN
PS2/KBRD CONN
PARALLEL CONN
SERIAL HDR
SERIAL HDR
ATA 133
INTEGRATED SATA 1/2
SIO
SUPER I/O
W83697EHF
LPC BUS 33MHZ
LPC HDR
4MB FLASH
NFORCE
MCP 51
508 BGA
HT 8X8 1GHZ
RGMII
MII
AZAILIA/AC97
X8 USB2
Vitesses VSC8601
Realtek 8201CL
PCI 33MHZ
Realtek ALC 883 (Azalia, 5.1Channel)
BACK PANEL CONN
USB2 PORTS 0-1
DOUBLE STACK
USB2 PORTS 2-3
X2/GBIT LAN
FRONT PANEL HDR
USB2 PORTS 4-5
USB2 PORTS 6-7
PCI SLOT 1
PCI SLOT 2
TPM 1.2
A A
Micro Star Restricted Secret
Micro Star Restricted Secret
Micro Star Restricted Secret
Title
Title
Title
Document Number
Document Number
Document Number
MICRO-STAR INT'L CO.,LTD.
MICRO-STAR INT'L CO.,LTD.
MICRO-STAR INT'L CO.,LTD.
No. 69, Li-De St, Jung-He City,
No. 69, Li-De St, Jung-He City,
No. 69, Li-De St, Jung-He City,
Taipei Hsien, Taiwan
Taipei Hsien, Taiwan
Taipei Hsien, Taiwan
http://www.msi.com.tw
http://www.msi.com.tw
5
4
3
2
http://www.msi.com.tw
MSI
Block Diagram
Block Diagram
Block Diagram
MS-7295
MS-7295
MS-7295
Last Revision Date:
Last Revision Date:
Last Revision Date:
Sheet
Sheet
Sheet
1
Wednesday, May 10, 2006
Wednesday, May 10, 2006
Wednesday, May 10, 2006
2
2
2
Rev
Rev
Rev
0B
0B
0B
35
35
35
of
of
of
5
4
3
2
1
HT_CLKIN_H1 9
HT_CLKIN_L1 9
HT_CLKIN_H0 9
HT_CLKIN_L0 9
R103 51/4 R103 51/4
R102 51/4 R102 51/4
HT_CTLIN_H0 9
HT_CTLIN_L0 9
HT_CADIN_H15
HT_CADIN_L15
HT_CADIN_H14
HT_CADIN_L14
HT_CADIN_H13
HT_CADIN_L13
HT_CADIN_H12
HT_CADIN_L12
HT_CADIN_H11
HT_CADIN_L11
HT_CADIN_H10
HT_CADIN_L10
HT_CADIN_H9
HT_CADIN_L9
HT_CADIN_H8
HT_CADIN_L8
HT_CADIN_H7
HT_CADIN_L7
HT_CADIN_H6
HT_CADIN_L6
HT_CADIN_H5
HT_CADIN_L5
HT_CADIN_H4
HT_CADIN_L4
HT_CADIN_H3
HT_CADIN_L3
HT_CADIN_H2
HT_CADIN_L2
HT_CADIN_H1
HT_CADIN_L1
HT_CADIN_H0
HT_CADIN_L0
4
VCC_DDR
1
3
5
7
9
11
13
15
17
19
21
23
HT_CADIN_H[15..0]
HT_CADIN_L[15..0]
HT_CADOUT_H[15..0]
HT_CADOUT_L[15..0]
C219
C219
C4.7U10Y0805
C4.7U10Y0805
R23 X_100R R23 X_100R
KEY
KEY
X_hdr_k8_hdt/B
X_hdr_k8_hdt/B
5
C171
C171
C4.7U10Y0805
C4.7U10Y0805
N6
P6
N3
N2
V4
V5
U1
V1
U6
V6
T4
T5
R6
T6
P4
P5
M4
M5
L6
M6
K4
K5
J6
K6
U3
U2
R1
T1
R3
R2
N1
P1
L1
M1
L3
L2
J1
K1
J3
J2
J1
J1
C185
C185
C0.22U10Y0402
C0.22U10Y0402
HYPERTRANSPORT
HYPERTRANSPORT
L0_CLKIN_H(1)
L0_CLKIN_L(1)
L0_CLKIN_H(0)
L0_CLKIN_L(0)
L0_CTLIN_H(1)
L0_CTLIN_L(1)
L0_CTLIN_H(0)
L0_CTLIN_L(0)
L0_CADIN_H(15)
L0_CADIN_L(15)
L0_CADIN_H(14)
L0_CADIN_L(14)
L0_CADIN_H(13)
L0_CADIN_L(13)
L0_CADIN_H(12)
L0_CADIN_L(12)
L0_CADIN_H(11)
L0_CADIN_L(11)
L0_CADIN_H(10)
L0_CADIN_L(10)
L0_CADIN_H(9)
L0_CADIN_L(9)
L0_CADIN_H(8)
L0_CADIN_L(8)
L0_CADIN_H(7)
L0_CADIN_L(7)
L0_CADIN_H(6)
L0_CADIN_L(6)
L0_CADIN_H(5)
L0_CADIN_L(5)
L0_CADIN_H(4)
L0_CADIN_L(4)
L0_CADIN_H(3)
L0_CADIN_L(3)
L0_CADIN_H(2)
L0_CADIN_L(2)
L0_CADIN_H(1)
L0_CADIN_L(1)
L0_CADIN_H(0)
L0_CADIN_L(0)
VCC_DDR
VCC3
R232
R232
X_1K/4
X_1K/4
X_N-PMBS3904_SOT23-RH
X_N-PMBS3904_SOT23-RH
2
4
6
8
10
12
14
16
18
20
22
24
26
C225
C225
C0.22U10Y0402
C0.22U10Y0402
CPU1A
CPU1A
L0_CLKOUT_H(1)
L0_CLKOUT_L(1)
L0_CLKOUT_H(0)
L0_CLKOUT_L(0)
L0_CTLOUT_H(1)
L0_CTLOUT_L(1)
L0_CTLOUT_H(0)
L0_CTLOUT_L(0)
L0_CADOUT_H(15)
L0_CADOUT_L(15)
L0_CADOUT_H(14)
L0_CADOUT_L(14)
L0_CADOUT_H(13)
L0_CADOUT_L(13)
L0_CADOUT_H(12)
L0_CADOUT_L(12)
L0_CADOUT_H(11)
L0_CADOUT_L(11)
L0_CADOUT_H(10)
L0_CADOUT_L(10)
L0_CADOUT_H(9)
L0_CADOUT_L(9)
L0_CADOUT_H(8)
L0_CADOUT_L(8)
L0_CADOUT_H(7)
L0_CADOUT_L(7)
L0_CADOUT_H(6)
L0_CADOUT_L(6)
L0_CADOUT_H(5)
L0_CADOUT_L(5)
L0_CADOUT_H(4)
L0_CADOUT_L(4)
L0_CADOUT_H(3)
L0_CADOUT_L(3)
L0_CADOUT_H(2)
L0_CADOUT_L(2)
L0_CADOUT_H(1)
L0_CADOUT_L(1)
L0_CADOUT_H(0)
L0_CADOUT_L(0)
R494
R494
X_4.7K/4
X_4.7K/4
Q29
Q29
J1_LDT_RST
C226
C226
C180P50N0402
C180P50N0402
AD5
AD4
AD1
AC1
Y6
W6
W2
W3
Y5
Y4
AB6
AA6
AB5
AB4
AD6
AC6
AF6
AE6
AF5
AF4
AH6
AG6
AH5
AH4
Y1
W1
AA2
AA3
AB1
AA1
AC2
AC3
AE2
AE3
AF1
AE1
AG2
AG3
AH1
AG1
LDT_RST J1_LDT_RST
THERMDA_CPU
THERMDC_CPU
3VDUAL
C2200P/16V/0402
C2200P/16V/0402
T_CRIT_A# 25
C193
C193
C180P50N0402
C180P50N0402
HT_CLKOUT_H1 9
HT_CLKOUT_L1 9
HT_CLKOUT_H0 9
HT_CLKOUT_L0 9
HT_CTLOUT_H0 9
HT_CTLOUT_L0 9
HT_CADOUT_H15
HT_CADOUT_L15
HT_CADOUT_H14
HT_CADOUT_L14
HT_CADOUT_H13
HT_CADOUT_L13
HT_CADOUT_H12
HT_CADOUT_L12
HT_CADOUT_H11
HT_CADOUT_L11
HT_CADOUT_H10
HT_CADOUT_L10
HT_CADOUT_H9
HT_CADOUT_L9
HT_CADOUT_H8
HT_CADOUT_L8
HT_CADOUT_H7
HT_CADOUT_L7
HT_CADOUT_H6
HT_CADOUT_L6
HT_CADOUT_H5
HT_CADOUT_L5
HT_CADOUT_H4
HT_CADOUT_L4
HT_CADOUT_H3
HT_CADOUT_L3
HT_CADOUT_H2
HT_CADOUT_L2
HT_CADOUT_H1
HT_CADOUT_L1
HT_CADOUT_H0
HT_CADOUT_L0
R524 0/4 R524 0/4
C87
C87
R523 0/4 R523 0/4
R275 1K/4 R275 1K/4
4
TP17TP17
TP16TP16
VCC3
C442 X_C10U10Y0805 C442 X_C10U10Y0805
C445 C0.1U25Y0402 C445 C0.1U25Y0402
U28
U28
1
VDD
2
D+
3
D-
4
T_CRIT_A
SNSR-LM90CIMMXNOPB-RH
SNSR-LM90CIMMXNOPB-RH
MGRBT11C
VCC_DDR
SMBCLK
SMBDate
ALERT
GND
VDDA_25
CPU_CLK 9
CPU_CLK# 9
VCC_DDR
R55
R55
_15R1%0805-1
_15R1%0805-1
R54
R54
_15R1%0805-1
_15R1%0805-1
8
7
6
5
L2 40L3_25_0805 L2 40L3_25_0805
2 1
C60
C60
VCC_DDR
R100
R100
39.2/4/1%
39.2/4/1%
CPU_STRAP_HI_E11
CPU_STRAP_LO_F11
R99
R99
39.2/4/1%
39.2/4/1%
CPU_M_VREF
C72
C72
C0.1U16X0402
C0.1U16X0402
SMBCLK 13,16,17,22
SMBDATA 13,16,17,22
SIO_SMI# 13
C3900P50X
C3900P50X
R59
R59
169/4/1%
169/4/1%
C59 C3900P50X C59 C3900P50X
R92 300/4/1% R92 300/4/1%
R98 X_300/4/1% R98 X_300/4/1%
R33 300/4 R33 300/4
R29 300/4 R29 300/4
C66
C66
C1000P50X0402
C1000P50X0402
VDDA25
TP12TP12
TP8TP8
3
THERMDC_CPU 18
THERMDA_CPU 18
C46
C46
C4.7U16Y1206
C4.7U16Y1206
CPUCLKIN
CPUCLKIN#
C23
C23
X_C1000P50X0402
X_C1000P50X0402
TP15TP15
CPU_M_VREF
TP2TP2
TP1TP1
TP9TP9
TP10TP10
TP13TP13
TP7TP7
TP19TP19
HT_STOP# 9
LDT_RST 9
CPU_PWRGD 9,22,23
VDDA25
C0.22U10Y0402
C0.22U10Y0402
C71
C71
C65
C65
C3300P50X
C3300P50X
C10
D10
A8
COREFB+
COREFB-
AK6
AL10
AJ10
AH10
AH11
AJ11
AH9
AG9
AG8
AH7
B8
C9
D8
C7
AL3
AL6
AL9
A5
G2
G1
E12
F12
A10
B10
F10
E9
AJ7
F6
D6
E7
F8
C5
E5
AJ5
AJ6
CPU_PWRGD_L
HT_STOP_L
LDT_RST_L
CPU_PRESENT_L
CPU_TDI
CPU_TRST_L
CPU_TCK
CPU_TMS
CPU_DBREQ_L
COREFB+ 23
COREFB- 23
CPU_VTT_SENSE
CPU_TEST25_H
CPU_TEST25_L
THERMDC_CPU
THERMDA_CPU
HT_STOP#
VRM_GD 9,22,23
LDT_RST
CPU_PWRGD CPU_PWRGD_L
CPU1D
CPU1D
MISC
MISC
VDDA1
VDDA2
CLKIN_H
CLKIN_L
PWROK
LDTSTOP_L
RESET_L
CPU_PRESENT_L
THERMTRIP_L
SIC
SID
TDI
TRST_L
TCK
TMS
DBREQ_L
VDD_FB_H
VDD_FB_L
VTT_SENSE
M_VREF
M_ZN
M_ZP
TEST25_H
TEST25_L
TEST19
TEST18
TEST13
TEST9
TEST17
TEST16
TEST15
TEST14
TEST12
TEST7
TEST6
TEST5
TEST4
TEST3
TEST2
3VDUAL
14 7
U46A U46A
1 2
3VDUAL
14 7
U46D U46D
9 8
3VDUAL
3 4
3VDUAL
13 12
3VDUAL
14 7
U46C U46C
5 6
3VDUAL
14 7
U46E U46E
11 10
PROCHOT_L
VDDIO_FB_H
VDDIO_FB_L
TEST29_H
TEST29_L
TEST28_H
TEST28_L
14 7
14 7
U46F U46F
VID(5)
VID(4)
VID(3)
VID(2)
VID(1)
VID(0)
TDO
DBRDY
PSI_L
HTREF1
HTREF0
TEST24
TEST23
TEST22
TEST21
TEST20
TEST27
TEST26
TEST10
TEST8
U46B U46B
2
D2
D1
C1
E3
E2
E1
AK7
AL7
AK10
CPU_DBRDY
B6
AK11
AL11
CPU_PSI_L
F1
V8
V7
C11
D11
AK8
AH8
AJ9
AL8
AJ8
J10
H9
AK9
AK5
G7
D4
HT_STOP_L
TP11TP11
VID4
VID3
VID2
VID1
VID0
CPU_THRIP_L
CPU_TDO
CPU_VDDIOFB_H
CPU_VDDIOFB_L
R97 300/4 R97 300/4
LDT_RST_L
VCC_DDR
R18
R18
300/4
300/4
VCC_DDR
C168
TP14TP14
TEST29_H
TEST29_L
VCC_DDR
TP22TP22
TP20TP20
TP21TP21
TP18TP18
C168
C1000P50X0402
C1000P50X0402
TP6TP6
TP5TP5
R94
R94
300/4
300/4
R49
R49
80.6/4/1%
80.6/4/1%
HT Bus Level shift
VCC_DDR
R529
R529
330R
330R
B
C E
Q48
Q48
N-MMBT3904_NL_SOT23
VDDA25
VCC_DDR
CPU_PWRGD_L
CPU_THRIP_L CPU_THRIP#
HT_STOP_L HT_STOP#
Title
Title
Title
Document Number
Document Number
Document Number
N-MMBT3904_NL_SOT23
RN3
RN3
1
3
5
7
RN5
RN5
1
3
5
7
X_8P4R-0R
X_8P4R-0R
MICRO-STAR INT'L CO.,LTD.
MICRO-STAR INT'L CO.,LTD.
MICRO-STAR INT'L CO.,LTD.
No. 69, Li-De St, Jung-He City,
No. 69, Li-De St, Jung-He City,
No. 69, Li-De St, Jung-He City,
Taipei Hsien, Taiwan
Taipei Hsien, Taiwan
Taipei Hsien, Taiwan
http://www.msi.com.tw
http://www.msi.com.tw
http://www.msi.com.tw
LDT_RST
2
CPU_PWRGD
4
CPU_THRIP#
6
HT_STOP#
8
8P4R-1KR
8P4R-1KR
HT_STOP_L
2
CPU_THRIP_L
4
CPU_PWRGD_L
6
LDT_RST_L
8
8P4R-300R
8P4R-300R
RN4
RN4
2
4
6
8
Micro Star Restricted Secret
Micro Star Restricted Secret
Micro Star Restricted Secret
ATHLON64 HT I/F CTRL & DEBUG
ATHLON64 HT I/F CTRL & DEBUG
ATHLON64 HT I/F CTRL & DEBUG
MSI
C169
C169
C1000P50X0402
C1000P50X0402
CPU_PRESENT_L
CPU_TEST25_H
CPU_TEST25_L
CPU_THRIP# CPU_THRIP_L
1
CPU_PWRGD
3
5
7
MS-7295
MS-7295
MS-7295
VID[0..4] 23
VCC_DDR
R95 44.2/1% R95 44.2/1%
R96 44.2/1% R96 44.2/1%
R106 1K/4 R106 1K/4
R56 510/4 R56 510/4
R57 510/4 R57 510/4
CPU_THRIP# 12
LDT_RST LDT_RST_L
Last Revision Date:
Last Revision Date:
Last Revision Date:
Wednesday, May 10, 2006
Wednesday, May 10, 2006
Wednesday, May 10, 2006
Sheet
Sheet
Sheet
1
R93
R93
300/4
300/4
VCC1_2HT
VCC_DDR
FROM C51PVG
CPU Side
Rev
Rev
Rev
0B
0B
0B
of
of
of
33 5
33 5
33 5
HT_CADIN_H[15..0] 9
HT_CADIN_L[15..0] 9
HT_CADOUT_H[15..0] 9
HT_CADOUT_L[15..0] 9
D D
VCC1_2HT
C170
C170
C4.7U10Y0805
C4.7U10Y0805
VCC1_2HT
C C
B B
SW1 X_SW-TACT4PS SW1 X_SW-TACT4PS
123
CPU_DBREQ_L
CPU_DBRDY
A A
CPU_TCK
CPU_TMS
CPU_TDI
CPU_TRST_L
CPU_TDO
5
4
3
2
1
MEM_MA_DQS_L[7..0] 6
MEM_MA_DQS_H[7..0] 6
MEM_MA_DM[7..0] 6
MEM_MB_DQS_L[7..0] 7
MEM_MB_DQS_H[7..0] 7
MEM_MB_DM[7..0] 7
D D
CPU1B
CPU1B
MEMORY INTERFACE A
MEM_MA0_CLK_H2 6,8
MEM_MA0_CLK_L2 6,8
MEM_MA0_CLK_H1 6,8
MEM_MA0_CLK_L1 6,8
MEM_MA0_CLK_H0 6,8
MEM_MA0_CLK_L0 6,8
MEM_MA0_CS_L1 6,8
MEM_MA0_CS_L0 6,8
MEM_MA0_ODT0 6,8
MEM_MA1_CLK_H2 6,8
MEM_MA1_CLK_L2 6,8
MEM_MA1_CLK_H1 6,8
MEM_MA1_CLK_L1 6,8
MEM_MA1_CLK_H0 6,8
MEM_MA1_CLK_L0 6,8
MEM_MA1_CS_L1 6,8
MEM_MA1_CS_L0 6,8
MEM_MA1_ODT0 6,8
C C
MEM_MA_CAS_L 6,8
MEM_MA_WE_L 6,8
MEM_MA_RAS_L 6,8
MEM_MA_BANK2 6,8
MEM_MA_BANK1 6,8
MEM_MA_BANK0 6,8
MEM_MA_CKE1 6,8
MEM_MA_CKE0 6,8
MEM_MA_ADD[15..0] 6,8
B B
MEM_MA0_CLK_H2
MEM_MA0_CLK_L2
MEM_MA0_CLK_H1
MEM_MA0_CLK_L1
MEM_MA0_CLK_H0
MEM_MA0_CLK_L0
MEM_MA0_CS_L1
MEM_MA0_CS_L0
MEM_MA0_ODT0
MEM_MA1_CLK_H2
MEM_MA1_CLK_L2
MEM_MA1_CLK_H1
MEM_MA1_CLK_L1
MEM_MA1_CLK_H0
MEM_MA1_CLK_L0
MEM_MA1_CS_L1
MEM_MA1_CS_L0
MEM_MA1_ODT0
MEM_MA_CAS_L
MEM_MA_WE_L
MEM_MA_RAS_L
MEM_MA_BANK2
MEM_MA_BANK1
MEM_MA_BANK0
MEM_MA_CKE1
MEM_MA_CKE0
MEM_MA_ADD15
MEM_MA_ADD14
MEM_MA_ADD13
MEM_MA_ADD12
MEM_MA_ADD11
MEM_MA_ADD10
MEM_MA_ADD9
MEM_MA_ADD8
MEM_MA_ADD7
MEM_MA_ADD6
MEM_MA_ADD5
MEM_MA_ADD4
MEM_MA_ADD3
MEM_MA_ADD2
MEM_MA_ADD1
MEM_MA_ADD0
MEM_MA_DQS_H7
MEM_MA_DQS_L7
MEM_MA_DQS_H6
MEM_MA_DQS_L6
MEM_MA_DQS_H5
MEM_MA_DQS_L5
MEM_MA_DQS_H4
MEM_MA_DQS_L4
MEM_MA_DQS_H3
MEM_MA_DQS_L3
MEM_MA_DQS_H2
MEM_MA_DQS_L2
MEM_MA_DQS_H1
MEM_MA_DQS_L1
MEM_MA_DQS_H0
MEM_MA_DQS_L0
MEM_MA_DM7
MEM_MA_DM6
MEM_MA_DM5
MEM_MA_DM4
MEM_MA_DM3
MEM_MA_DM2
MEM_MA_DM1
MEM_MA_DM0
AG21
AG20
G19
H19
U27
U26
AC25
AA24
AC28
AE20
AE19
G20
G21
V27
W27
AD27
AA25
AC27
AB25
AB27
AA26
N25
Y27
AA27
M25
M27
N24
AC26
N26
P25
Y25
N27
R24
P27
R25
R26
R27
U25
W24
AD15
AE15
AG18
AG19
AG24
AG25
AG27
AG28
D29
C29
C25
D25
E19
G15
AF15
AF19
AJ25
AH29
B29
E24
E18
H15
L27
T25
T27
F19
F15
MEMORY INTERFACE A
MA0_CLK_H(2)
MA0_CLK_L(2)
MA0_CLK_H(1)
MA0_CLK_L(1)
MA0_CLK_H(0)
MA0_CLK_L(0)
MA0_CS_L(1)
MA0_CS_L(0)
MA0_ODT(0)
MA1_CLK_H(2)
MA1_CLK_L(2)
MA1_CLK_H(1)
MA1_CLK_L(1)
MA1_CLK_H(0)
MA1_CLK_L(0)
MA1_CS_L(1)
MA1_CS_L(0)
MA1_ODT(0)
MA_CAS_L
MA_WE_L
MA_RAS_L
MA_BANK(2)
MA_BANK(1)
MA_BANK(0)
MA_CKE(1)
MA_CKE(0)
MA_ADD(15)
MA_ADD(14)
MA_ADD(13)
MA_ADD(12)
MA_ADD(11)
MA_ADD(10)
MA_ADD(9)
MA_ADD(8)
MA_ADD(7)
MA_ADD(6)
MA_ADD(5)
MA_ADD(4)
MA_ADD(3)
MA_ADD(2)
MA_ADD(1)
MA_ADD(0)
MA_DQS_H(7)
MA_DQS_L(7)
MA_DQS_H(6)
MA_DQS_L(6)
MA_DQS_H(5)
MA_DQS_L(5)
MA_DQS_H(4)
MA_DQS_L(4)
MA_DQS_H(3)
MA_DQS_L(3)
MA_DQS_H(2)
MA_DQS_L(2)
MA_DQS_H(1)
MA_DQS_L(1)
MA_DQS_H(0)
MA_DQS_L(0)
MA_DM(7)
MA_DM(6)
MA_DM(5)
MA_DM(4)
MA_DM(3)
MA_DM(2)
MA_DM(1)
MA_DM(0)
MA_DATA(63)
MA_DATA(62)
MA_DATA(61)
MA_DATA(60)
MA_DATA(59)
MA_DATA(58)
MA_DATA(57)
MA_DATA(56)
MA_DATA(55)
MA_DATA(54)
MA_DATA(53)
MA_DATA(52)
MA_DATA(51)
MA_DATA(50)
MA_DATA(49)
MA_DATA(48)
MA_DATA(47)
MA_DATA(46)
MA_DATA(45)
MA_DATA(44)
MA_DATA(43)
MA_DATA(42)
MA_DATA(41)
MA_DATA(40)
MA_DATA(39)
MA_DATA(38)
MA_DATA(37)
MA_DATA(36)
MA_DATA(35)
MA_DATA(34)
MA_DATA(33)
MA_DATA(32)
MA_DATA(31)
MA_DATA(30)
MA_DATA(29)
MA_DATA(28)
MA_DATA(27)
MA_DATA(26)
MA_DATA(25)
MA_DATA(24)
MA_DATA(23)
MA_DATA(22)
MA_DATA(21)
MA_DATA(20)
MA_DATA(19)
MA_DATA(18)
MA_DATA(17)
MA_DATA(16)
MA_DATA(15)
MA_DATA(14)
MA_DATA(13)
MA_DATA(12)
MA_DATA(11)
MA_DATA(10)
MA_DATA(9)
MA_DATA(8)
MA_DATA(7)
MA_DATA(6)
MA_DATA(5)
MA_DATA(4)
MA_DATA(3)
MA_DATA(2)
MA_DATA(1)
MA_DATA(0)
MA_DQS_H(8)
MA_DQS_L(8)
MA_DM(8)
MA_CHECK(7)
MA_CHECK(6)
MA_CHECK(5)
MA_CHECK(4)
MA_CHECK(3)
MA_CHECK(2)
MA_CHECK(1)
MA_CHECK(0)
MEM_MA_DATA63
AE14
MEM_MA_DATA62
AG14
MEM_MA_DATA61
AG16
MEM_MA_DATA60
AD17
MEM_MA_DATA59
AD13
MEM_MA_DATA58
AE13
MEM_MA_DATA57
AG15
MEM_MA_DATA56
AE16
MEM_MA_DATA55
AG17
MEM_MA_DATA54
AE18
MEM_MA_DATA53
AD21
MEM_MA_DATA52
AG22
MEM_MA_DATA51
AE17
MEM_MA_DATA50
AF17
MEM_MA_DATA49
AF21
MEM_MA_DATA48
AE21
MEM_MA_DATA47
AF23
MEM_MA_DATA46
AE23
MEM_MA_DATA45
AJ26
MEM_MA_DATA44
AG26
MEM_MA_DATA43
AE22
MEM_MA_DATA42
AG23
MEM_MA_DATA41
AH25
MEM_MA_DATA40
AF25
MEM_MA_DATA39
AJ28
MEM_MA_DATA38
AJ29
MEM_MA_DATA37
AF29
MEM_MA_DATA36
AE26
MEM_MA_DATA35
AJ27
MEM_MA_DATA34
AH27
MEM_MA_DATA33
AG29
MEM_MA_DATA32
AF27
MEM_MA_DATA31
E29
MEM_MA_DATA30
E28
MEM_MA_DATA29
D27
MEM_MA_DATA28
C27
MEM_MA_DATA27
G26
MEM_MA_DATA26
F27
MEM_MA_DATA25
C28
MEM_MA_DATA24
E27
MEM_MA_DATA23
F25
MEM_MA_DATA22
E25
MEM_MA_DATA21
E23
MEM_MA_DATA20
D23
MEM_MA_DATA19
E26
MEM_MA_DATA18
C26
MEM_MA_DATA17
G23
MEM_MA_DATA16
F23
MEM_MA_DATA15
E22
MEM_MA_DATA14
E21
MEM_MA_DATA13
F17
MEM_MA_DATA12
G17
MEM_MA_DATA11
G22
MEM_MA_DATA10
F21
MEM_MA_DATA9
G18
MEM_MA_DATA8
E17
MEM_MA_DATA7
G16
MEM_MA_DATA6
E15
MEM_MA_DATA5
G13
MEM_MA_DATA4
H13
MEM_MA_DATA3
H17
MEM_MA_DATA2
E16
MEM_MA_DATA1
E14
MEM_MA_DATA0
G14
MEM_MA_DQS_H8
J28
MEM_MA_DQS_L8
J27
MEM_MA_DM8
J25
MEM_MA_CHECK7
K25
MEM_MA_CHECK6
J26
MEM_MA_CHECK5
G28
MEM_MA_CHECK4
G27
MEM_MA_CHECK3
L24
MEM_MA_CHECK2
K27
MEM_MA_CHECK1
H29
MEM_MA_CHECK0
H27
MEM_MA_DATA[63..0] 6
MEM_MA_DQS_H8 6
MEM_MA_DQS_L8 6
MEM_MA_DM8 6
MEM_MB0_CLK_H2 7,8
MEM_MB0_CLK_L2 7,8
MEM_MB0_CLK_H1 7,8
MEM_MB0_CLK_L1 7,8
MEM_MB0_CLK_H0 7,8
MEM_MB0_CLK_L0 7,8
MEM_MB0_CS_L1 7,8
MEM_MB0_CS_L0 7,8
MEM_MB0_ODT0 7,8
MEM_MB1_CLK_H2 7,8
MEM_MB1_CLK_L2 7,8
MEM_MB1_CLK_H1 7,8
MEM_MB1_CLK_L1 7,8
MEM_MB1_CLK_H0 7,8
MEM_MB1_CLK_L0 7,8
MEM_MB1_CS_L1 7,8
MEM_MB1_CS_L0 7,8
MEM_MB1_ODT0 7,8
MEM_MB_CAS_L 7,8
MEM_MB_WE_L 7,8
MEM_MB_RAS_L 7,8
MEM_MB_BANK2 7,8
MEM_MB_BANK1 7,8
MEM_MB_BANK0 7,8
MEM_MB_CKE1 7,8
MEM_MB_CKE0 7,8
MEM_MB_ADD[15..0] 7,8
MEM_MB0_CLK_H2
MEM_MB0_CLK_L2
MEM_MB0_CLK_H1
MEM_MB0_CLK_L1
MEM_MB0_CLK_H0
MEM_MB0_CLK_L0
MEM_MB0_CS_L1
MEM_MB0_CS_L0
MEM_MB0_ODT0
MEM_MB1_CLK_H2
MEM_MB1_CLK_L2
MEM_MB1_CLK_H1
MEM_MB1_CLK_L1
MEM_MB1_CLK_H0
MEM_MB1_CLK_L0
MEM_MB1_CS_L1
MEM_MB1_CS_L0
MEM_MB1_ODT0
MEM_MB_CAS_L
MEM_MB_WE_L
MEM_MB_RAS_L
MEM_MB_BANK2
MEM_MB_BANK1
MEM_MB_BANK0
MEM_MB_CKE1
MEM_MB_CKE0
MEM_MB_ADD15
MEM_MB_ADD14
MEM_MB_ADD13
MEM_MB_ADD12
MEM_MB_ADD11
MEM_MB_ADD10
MEM_MB_ADD9
MEM_MB_ADD8
MEM_MB_ADD7
MEM_MB_ADD6
MEM_MB_ADD5
MEM_MB_ADD4
MEM_MB_ADD3
MEM_MB_ADD2
MEM_MB_ADD1
MEM_MB_ADD0
MEM_MB_DQS_H7
MEM_MB_DQS_L7
MEM_MB_DQS_H6
MEM_MB_DQS_L6
MEM_MB_DQS_H5
MEM_MB_DQS_L5
MEM_MB_DQS_H4
MEM_MB_DQS_L4
MEM_MB_DQS_H3
MEM_MB_DQS_L3
MEM_MB_DQS_H2
MEM_MB_DQS_L2
MEM_MB_DQS_H1
MEM_MB_DQS_L1
MEM_MB_DQS_H0
MEM_MB_DQS_L0
MEM_MB_DM7
MEM_MB_DM6
MEM_MB_DM5
MEM_MB_DM4
MEM_MB_DM3
MEM_MB_DM2
MEM_MB_DM1
MEM_MB_DM0
AJ19
AK19
AE30
AC31
AD29
AL19
AL18
W29
W28
AE29
AB31
AD31
AC29
AC30
AB29
AA31
AA28
M31
M29
N28
N29
AE31
N30
AA29
R29
R28
R31
R30
U29
U28
AA30
AK13
AJ13
AK17
AJ17
AK23
AL23
AL28
AL29
D31
C31
C24
C23
D17
C17
C14
C13
AJ14
AH17
AJ23
AK29
C30
A18
A19
U31
U30
C19
D19
N31
P29
P31
T31
T29
A23
B17
B13
MB0_CLK_H(2)
MB0_CLK_L(2)
MB0_CLK_H(1)
MB0_CLK_L(1)
MB0_CLK_H(0)
MB0_CLK_L(0)
MB0_CS_L(1)
MB0_CS_L(0)
MB0_ODT(0)
MB1_CLK_H(2)
MB1_CLK_L(2)
MB1_CLK_H(1)
MB1_CLK_L(1)
MB1_CLK_H(0)
MB1_CLK_L(0)
MB1_CS_L(1)
MB1_CS_L(0)
MB1_ODT(0)
MB_CAS_L
MB_WE_L
MB_RAS_L
MB_BANK(2)
MB_BANK(1)
MB_BANK(0)
MB_CKE(1)
MB_CKE(0)
MB_ADD(15)
MB_ADD(14)
MB_ADD(13)
MB_ADD(12)
MB_ADD(11)
MB_ADD(10)
MB_ADD(9)
MB_ADD(8)
MB_ADD(7)
MB_ADD(6)
MB_ADD(5)
MB_ADD(4)
MB_ADD(3)
MB_ADD(2)
MB_ADD(1)
MB_ADD(0)
MB_DQS_H(7)
MB_DQS_L(7)
MB_DQS_H(6)
MB_DQS_L(6)
MB_DQS_H(5)
MB_DQS_L(5)
MB_DQS_H(4)
MB_DQS_L(4)
MB_DQS_H(3)
MB_DQS_L(3)
MB_DQS_H(2)
MB_DQS_L(2)
MB_DQS_H(1)
MB_DQS_L(1)
MB_DQS_H(0)
MB_DQS_L(0)
MB_DM(7)
MB_DM(6)
MB_DM(5)
MB_DM(4)
MB_DM(3)
MB_DM(2)
MB_DM(1)
MB_DM(0)
MEM_MA_CHECK[7..0] 6
CPU1C
CPU1C
MEMORY INTERFACE B
MEMORY INTERFACE B
MB_DATA(63)
MB_DATA(62)
MB_DATA(61)
MB_DATA(60)
MB_DATA(59)
MB_DATA(58)
MB_DATA(57)
MB_DATA(56)
MB_DATA(55)
MB_DATA(54)
MB_DATA(53)
MB_DATA(52)
MB_DATA(51)
MB_DATA(50)
MB_DATA(49)
MB_DATA(48)
MB_DATA(47)
MB_DATA(46)
MB_DATA(45)
MB_DATA(44)
MB_DATA(43)
MB_DATA(42)
MB_DATA(41)
MB_DATA(40)
MB_DATA(39)
MB_DATA(38)
MB_DATA(37)
MB_DATA(36)
MB_DATA(35)
MB_DATA(34)
MB_DATA(33)
MB_DATA(32)
MB_DATA(31)
MB_DATA(30)
MB_DATA(29)
MB_DATA(28)
MB_DATA(27)
MB_DATA(26)
MB_DATA(25)
MB_DATA(24)
MB_DATA(23)
MB_DATA(22)
MB_DATA(21)
MB_DATA(20)
MB_DATA(19)
MB_DATA(18)
MB_DATA(17)
MB_DATA(16)
MB_DATA(15)
MB_DATA(14)
MB_DATA(13)
MB_DATA(12)
MB_DATA(11)
MB_DATA(10)
MB_DATA(9)
MB_DATA(8)
MB_DATA(7)
MB_DATA(6)
MB_DATA(5)
MB_DATA(4)
MB_DATA(3)
MB_DATA(2)
MB_DATA(1)
MB_DATA(0)
MB_DQS_H(8)
MB_DQS_L(8)
MB_DM(8)
MB_CHECK(7)
MB_CHECK(6)
MB_CHECK(5)
MB_CHECK(4)
MB_CHECK(3)
MB_CHECK(2)
MB_CHECK(1)
MB_CHECK(0)
AH13
AL13
AL15
AJ15
AF13
AG13
AL14
AK15
AL16
AL17
AK21
AL21
AH15
AJ16
AH19
AL20
AJ22
AL22
AL24
AK25
AJ21
AH21
AH23
AJ24
AL27
AK27
AH31
AG30
AL25
AL26
AJ30
AJ31
E31
E30
B27
A27
F29
F31
A29
A28
A25
A24
C22
D21
A26
B25
B23
A22
B21
A20
C16
D15
C21
A21
A17
A16
B15
A14
E13
F13
C15
A15
A13
D13
J31
J30
J29
K29
K31
G30
G29
L29
L28
H31
G31
MEM_MB_DATA63
MEM_MB_DATA62
MEM_MB_DATA61
MEM_MB_DATA60
MEM_MB_DATA59
MEM_MB_DATA58
MEM_MB_DATA57
MEM_MB_DATA56
MEM_MB_DATA55
MEM_MB_DATA54
MEM_MB_DATA53
MEM_MB_DATA52
MEM_MB_DATA51
MEM_MB_DATA50
MEM_MB_DATA49
MEM_MB_DATA48
MEM_MB_DATA47
MEM_MB_DATA46
MEM_MB_DATA45
MEM_MB_DATA44
MEM_MB_DATA43
MEM_MB_DATA42
MEM_MB_DATA41
MEM_MB_DATA40
MEM_MB_DATA39
MEM_MB_DATA38
MEM_MB_DATA37
MEM_MB_DATA36
MEM_MB_DATA35
MEM_MB_DATA34
MEM_MB_DATA33
MEM_MB_DATA32
MEM_MB_DATA31
MEM_MB_DATA30
MEM_MB_DATA29
MEM_MB_DATA28
MEM_MB_DATA27
MEM_MB_DATA26
MEM_MB_DATA25
MEM_MB_DATA24
MEM_MB_DATA23
MEM_MB_DATA22
MEM_MB_DATA21
MEM_MB_DATA20
MEM_MB_DATA19
MEM_MB_DATA18
MEM_MB_DATA17
MEM_MB_DATA16
MEM_MB_DATA15
MEM_MB_DATA14
MEM_MB_DATA13
MEM_MB_DATA12
MEM_MB_DATA11
MEM_MB_DATA10
MEM_MB_DATA9
MEM_MB_DATA8
MEM_MB_DATA7
MEM_MB_DATA6
MEM_MB_DATA5
MEM_MB_DATA4
MEM_MB_DATA3
MEM_MB_DATA2
MEM_MB_DATA1
MEM_MB_DATA0
MEM_MB_DQS_H8
MEM_MB_DQS_L8
MEM_MB_DM8
MEM_MB_CHECK7
MEM_MB_CHECK6
MEM_MB_CHECK5
MEM_MB_CHECK4
MEM_MB_CHECK3
MEM_MB_CHECK2
MEM_MB_CHECK1
MEM_MB_CHECK0
MEM_MB_DQS_H8 7
MEM_MB_DQS_L8 7
MEM_MB_DM8 7
MEM_MB_CHECK[7..0] 7
MEM_MB_DATA[63..0] 7
A A
Micro Star Restricted Secret
Micro Star Restricted Secret
Micro Star Restricted Secret
Title
Title
Title
MSI
ATHLON64 DDR MEMORY I/F
ATHLON64 DDR MEMORY I/F
Document Number
Document Number
Document Number
MICRO-STAR INT'L CO.,LTD.
MICRO-STAR INT'L CO.,LTD.
MICRO-STAR INT'L CO.,LTD.
No. 69, Li-De St, Jung-He City,
No. 69, Li-De St, Jung-He City,
No. 69, Li-De St, Jung-He City,
Taipei Hsien, Taiwan
Taipei Hsien, Taiwan
Taipei Hsien, Taiwan
http://www.msi.com.tw
http://www.msi.com.tw
5
4
3
2
http://www.msi.com.tw
ATHLON64 DDR MEMORY I/F
MS-7295
MS-7295
MS-7295
Last Revision Date:
Last Revision Date:
Last Revision Date:
Wednesday, May 10, 2006
Wednesday, May 10, 2006
Wednesday, May 10, 2006
Sheet
Sheet
Sheet
43 5
43 5
1
43 5
Rev
Rev
Rev
0B
0B
0B
of
of
of
5
4
3
2
1
VCCP
CPU1F
CPU1F
VDD1
VDD1
A4
VDD1
A6
VDD2
AA8
VDD3
VTT_DDR
C20
C20
C0.22U10Y0402
C0.22U10Y0402
VTT_DDR
C195
C195
C0.22U10Y0402
C0.22U10Y0402
AA10
AA12
AA14
AA16
AA18
AB7
AB9
AB11
AC4
AC5
AC8
AC10
AD2
AD3
AD7
AD9
AE10
AF7
AF9
AG4
AG5
AG7
AH2
AH3
E10
G10
G12
H11
H23
K11
K13
K15
K17
K19
K21
K23
Y17
Y19
B3
B5
B7
C2
C4
C6
C8
D3
D5
D7
D9
E4
E6
E8
F5
F7
F9
F11
G6
G8
H7
J8
J12
J14
J16
J18
J20
J22
J24
K7
K9
L4
L5
L8
L10
L12
VDD4
VDD5
VDD6
VDD7
VDD8
VDD9
VDD10
VDD11
VDD12
VDD13
VDD14
VDD15
VDD16
VDD17
VDD18
VDD19
VDD20
VDD21
VDD22
VDD23
VDD24
VDD25
VDD26
VDD27
VDD28
VDD29
VDD30
VDD31
VDD32
VDD33
VDD34
VDD35
VDD36
VDD37
VDD38
VDD39
VDD40
VDD41
VDD42
VDD43
VDD44
VDD45
VDD46
VDD47
VDD48
VDD49
VDD50
VDD51
VDD52
VDD53
VDD54
VDD55
VDD56
VDD57
VDD58
VDD59
VDD60
VDD61
VDD62
VDD63
VDD64
VDD65
VDD66
VDD67
VDD68
VDD69
VDD70
VDD71
VDD72
VDD73
VDD74
VDD75
VDD150
VDD151
C63
C63
C0.22U10Y0402
C0.22U10Y0402
C200
C200
C0.22U10Y0402
C0.22U10Y0402
5
D D
C C
B B
A A
VSS1
VSS2
VSS3
VSS4
VSS5
VSS6
VSS7
VSS8
VSS9
VSS10
VSS11
VSS12
VSS13
VSS14
VSS15
VSS16
VSS17
VSS18
VSS19
VSS20
VSS21
VSS22
VSS23
VSS24
VSS25
VSS26
VSS27
VSS28
VSS29
VSS30
VSS31
VSS32
VSS33
VSS34
VSS35
VSS36
VSS37
VSS38
VSS39
VSS40
VSS41
VSS42
VSS43
VSS44
VSS45
VSS46
VSS47
VSS48
VSS49
VSS50
VSS51
VSS52
VSS53
VSS54
VSS55
VSS56
VSS57
VSS58
VSS59
VSS60
VSS61
VSS62
VSS63
VSS64
VSS65
VSS66
VSS67
VSS68
VSS69
VSS70
VSS71
VSS72
VSS73
VSS74
VSS240
VSS241
C24
C24
C4.7U10Y0805
C4.7U10Y0805
C203
C203
C4.7U10Y0805
C4.7U10Y0805
A3
A7
A9
A11
AA4
AA5
AA7
AA9
AA11
AA13
AA15
AA17
AA19
AA21
AA23
AB2
AB3
AB8
AB10
AB12
AB14
AB16
AB18
AB20
AB22
AC7
AC9
AC11
AC13
AC15
AC17
AC19
AC21
AC23
AD8
AD10
AD12
AD14
AD16
AD20
AD22
AD24
AE4
AE5
AE9
AE11
AF2
AF3
AF8
AF10
AF12
AF14
AF16
AF18
AF20
AF22
AF24
AF26
AF28
AG10
AG11
AH14
AH16
AH18
AH20
AH22
AH24
AH26
AH28
AH30
AK2
AK14
AK16
AK18
Y14
Y16
C206
C206
X_C4.7U10Y0805
X_C4.7U10Y0805
C29
C29
C4.7U10Y0805
C4.7U10Y0805
C180P50N0402
C180P50N0402
C52
C52
C180P50N0402
C180P50N0402
C202
C202
VCCP
C34
C34
C180P50N0402
C180P50N0402
C172
C172
C180P50N0402
C180P50N0402
L14
VDD1
L16
VDD2
L18
VDD3
M2
VDD4
M3
VDD5
M7
VDD6
M9
VDD7
M11
VDD8
M13
VDD9
M15
VDD10
M17
VDD11
M19
VDD12
N8
VDD13
N10
VDD14
N12
VDD15
N14
VDD16
N16
VDD17
N18
VDD18
P7
VDD19
P9
VDD20
P11
VDD21
P13
VDD22
P15
VDD23
P17
VDD24
P19
VDD25
R4
VDD26
R5
VDD27
R8
VDD28
R10
VDD29
R12
VDD30
R14
VDD31
R16
VDD32
R18
VDD33
R20
VDD34
T2
VDD35
T3
VDD36
T7
VDD37
T9
VDD38
T11
VDD39
T13
VDD40
T15
VDD41
T17
VDD42
T19
VDD43
T21
VDD44
U8
VDD45
U10
VDD46
U12
VDD47
U14
VDD48
U16
VDD49
U18
VDD50
U20
VDD51
V9
VDD52
V11
VDD53
V13
VDD54
V15
VDD55
V17
VDD56
V19
VDD57
V21
VDD58
W4
VDD59
W5
VDD60
W8
VDD61
W10
VDD62
W12
VDD63
W14
VDD64
W16
VDD65
W18
VDD66
W20
VDD67
Y2
VDD68
Y3
VDD69
Y7
VDD70
Y9
VDD71
Y11
VDD72
Y13
VDD73
Y15
VDD74
Y21
VDD75
C73
C73
C1000P50X0402
C1000P50X0402
C163
C163
C1000P50X0402
C1000P50X0402
CPU1G
CPU1G
VDD2
VDD2
VSS1
VSS2
VSS3
VSS4
VSS5
VSS6
VSS7
VSS8
VSS9
VSS10
VSS11
VSS12
VSS13
VSS14
VSS15
VSS16
VSS17
VSS18
VSS19
VSS20
VSS21
VSS22
VSS23
VSS24
VSS25
VSS26
VSS27
VSS28
VSS29
VSS30
VSS31
VSS32
VSS33
VSS34
VSS35
VSS36
VSS37
VSS38
VSS39
VSS40
VSS41
VSS42
VSS43
VSS44
VSS45
VSS46
VSS47
VSS48
VSS49
VSS50
VSS51
VSS52
VSS53
VSS54
VSS55
VSS56
VSS57
VSS58
VSS59
VSS60
VSS61
VSS62
VSS63
VSS64
VSS65
VSS66
VSS67
VSS68
VSS69
VSS70
VSS71
VSS72
VSS73
VSS74
VSS75
C57
C57
C1000P50X0402
C1000P50X0402
C190
C190
C1000P50X0402
C1000P50X0402
4
AK20
AK22
AK24
AK26
AK28
AK30
AL5
B4
B9
B11
B14
B16
B18
B20
B22
B24
B26
B28
B30
C3
D14
D16
D18
D20
D22
D24
D26
D28
D30
E11
F4
F14
F16
F18
F20
F22
F24
F26
F28
F30
G9
G11
H8
H10
H12
H14
H16
H18
H22
H24
H26
H28
H30
J4
J5
J7
J9
J11
J13
J15
J17
J19
J21
J23
K2
K3
K8
K10
K12
K14
K16
K18
K20
K22
Y18
VCC_DDR
C585
C585
C0.22U10Y0402
C0.22U10Y0402
VCCP
VTT_DDR
C593
C593
C0.22U10Y0402
C0.22U10Y0402
AA20
AA22
AB13
AB15
AB17
AB19
AB21
AB23
AC12
AC14
AC16
AC18
AC20
AC22
AD11
AD23
AE12
AF11
M21
M23
W22
CPU1H
CPU1H
VDD3
VDD3
VDD1
VDD2
VDD3
VDD4
VDD5
VDD6
VDD7
VDD8
VDD9
VDD10
VDD11
VDD12
VDD13
VDD14
VDD15
VDD16
VDD17
VDD18
L20
VDD19
L22
VDD20
VDD21
VDD22
N20
VDD23
N22
VDD24
P21
VDD25
P23
VDD26
R22
VDD27
T23
VDD28
U22
VDD29
V23
VDD30
VDD31
Y23
VDD32
5
GND
6
GND
7
GND
8
GND
1
GND
2
GND
3
GND
C32 X_C0.1U16X0402 C32 X_C0.1U16X0402
C33 X_C0.1U16X0402 C33 X_C0.1U16X0402
C47 X_C0.1U16X0402 C47 X_C0.1U16X0402
C58 X_C0.1U16X0402 C58 X_C0.1U16X0402
C53 X_C0.1U16X0402 C53 X_C0.1U16X0402
C54 X_C0.1U16X0402 C54 X_C0.1U16X0402
C731 X_C0.1U16X0402 C731 X_C0.1U16X0402
C64 X_C0.1U16X0402 C64 X_C0.1U16X0402
C67 X_C0.1U16X0402 C67 X_C0.1U16X0402
C734 X_C0.1U16X0402 C734 X_C0.1U16X0402
C732 X_C0.1U16X0402 C732 X_C0.1U16X0402
C733 X_C0.1U16X0402 C733 X_C0.1U16X0402
C735 X_C0.1U16X0402 C735 X_C0.1U16X0402
C736 X_C0.1U16X0402 C736 X_C0.1U16X0402
C737 X_C0.1U16X0402 C737 X_C0.1U16X0402
C240
C240
C0.22U10Y0402
C0.22U10Y0402
VSS10
VSS11
VSS12
VSS13
VSS14
VSS15
VSS16
VSS17
VSS18
VSS19
VSS20
VSS21
VSS22
VSS23
VSS24
VSS25
VSS26
VSS27
VSS28
VSS29
VSS30
VSS31
VSS32
VSS33
VSS34
VSS35
VSS36
VSS37
VSS38
VSS39
VSS40
VSS41
VSS42
VSS43
VSS44
VSS45
VSS46
VSS47
VSS48
VSS49
VSS50
VSS51
VSS52
VSS53
VSS54
VSS55
VSS56
VSS57
VSS58
VSS59
VSS60
VSS61
VSS62
VSS63
VSS64
VSS65
C286
C286
C4.7U10Y0805
C4.7U10Y0805
VSS1
VSS2
VSS3
VSS4
VSS5
VSS6
VSS7
VSS8
VSS9
N17
N19
N21
N23
P2
P3
P8
P10
P12
P14
P16
P18
P20
P22
R7
R9
R11
R13
R15
R17
R19
R21
R23
T8
T10
T12
T14
T16
T18
T20
T22
U4
U5
U7
U9
U11
U13
U15
U17
U19
U21
U23
V2
V3
V10
V12
V14
V16
V18
V20
V22
W9
W11
W13
W15
W17
W19
W21
W23
Y8
Y10
Y12
W7
Y20
Y22
3
C83
C83
C4.7U10Y0805
C4.7U10Y0805
VTT_DDR
VCC_DDR
C0.22U10Y0402
C0.22U10Y0402
VCC1_2HT
VCCP
C598
C598
AJ4
VLDT_A1
AJ3
VLDT_A2
AJ2
VLDT_A3
AJ1
VLDT_A4
D12
VTT1
C12
VTT2
B12
VTT3
A12
VTT4
AB24
VDDIO1
AB26
VDDIO2
AB28
VDDIO3
AB30
VDDIO4
AC24
VDDIO5
AD26
VDDIO6
AD28
VDDIO7
AD30
VDDIO8
AF30
VDDIO9
M24
VDDIO10
M26
VDDIO11
M28
VDDIO12
M30
VDDIO13
P24
VDDIO14
P26
VDDIO15
P28
VDDIO16
P30
VDDIO17
T24
VDDIO18
T26
VDDIO19
T28
VDDIO20
T30
VDDIO21
V25
VDDIO22
V26
VDDIO23
V28
VDDIO24
V30
VDDIO25
Y24
VDDIO26
Y26
VDDIO27
Y28
VDDIO28
Y29
VDDIO29
C606
C606
C0.22U10Y0402
C0.22U10Y0402
_C22U6.3X50805
_C22U6.3X50805
VCC_DDR
_C22U6.3X50805
_C22U6.3X50805
VCC_DDR
C597
C597
C4.7U6.3X5-1
C4.7U6.3X5-1
CPU1I
CPU1I
VDDIO
VDDIO
C0.22U10Y0402
C0.22U10Y0402
VCCP
C740
C740
C583
C583
VLDT_B1
VLDT_B2
VLDT_B3
VLDT_B4
VTT5
VTT6
VTT7
VTT8
VTT9
VSS1
VSS2
VSS3
VSS4
VSS5
VSS6
VSS7
VSS8
VSS9
VSS10
VSS11
VSS12
VSS13
VSS14
VSS15
VSS16
VSS17
VSS18
VSS19
VSS20
VSS21
VSS22
VSS23
VSS24
VSS25
VSS26
VSS27
VSS28
C601
C601
C0.01U25X0402
C0.01U25X0402
C741
C741
_C22U6.3X50805
_C22U6.3X50805
C596
C596
C22U6.3X50805
C22U6.3X50805
C599
C599
C4.7U6.3X5-1
C4.7U6.3X5-1
H6
H5
H2
VTT_DDR
H1
AK12
AJ12
AH12
AG12
AL12
K24
K26
K28
K30
L7
L9
L11
L13
L15
L17
L19
L21
L23
M8
M10
M12
M14
M16
M18
M20
M22
N4
N5
N7
N9
N11
N13
N15
C581
C581
X_C22U6.3X50805
X_C22U6.3X50805
C739
C739
C22U6.3X50805
C22U6.3X50805
C4.7U10Y0805
C4.7U10Y0805
C116
C116
C725
C725
C4.7U6.3X5-1
C4.7U6.3X5-1
2
VLDT_RUN_B
C180P50N0402
C180P50N0402
X_C22U6.3X50805
X_C22U6.3X50805
C591
C591
C97
C97
C4.7U10Y0805
C4.7U10Y0805
C94
C94
C4.7U16Y1206
C4.7U16Y1206
GND 3,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30
VCCP VCC_DDR
C670 X__C1U6.3Y50402/80-20% C670 X__C1U6.3Y50402/80-20%
C682 X__C1U6.3Y50402/80-20% C682 X__C1U6.3Y50402/80-20%
X_C22U6.3X1206
C592
C592
X_C22U6.3X50805
X_C22U6.3X50805
C586
C586
C0.22U10Y0402
C0.22U10Y0402
X_C22U6.3X1206
C76
C76
_C22U6.3X50805
_C22U6.3X50805
C588
C588
C587
C587
_C22U6.3X50805
_C22U6.3X50805
C0.22U10Y0402
C0.22U10Y0402
C191
C191
C108
C108
C0.01U25X0402
C0.01U25X0402
Title
Title
Title
MSI
Document Number
Document Number
Document Number
MICRO-STAR INT'L CO.,LTD.
MICRO-STAR INT'L CO.,LTD.
MICRO-STAR INT'L CO.,LTD.
No. 69, Li-De St, Jung-He City,
No. 69, Li-De St, Jung-He City,
No. 69, Li-De St, Jung-He City,
Taipei Hsien, Taiwan
Taipei Hsien, Taiwan
Taipei Hsien, Taiwan
http://www.msi.com.tw
http://www.msi.com.tw
http://www.msi.com.tw
C595
C595
X_C22U6.3X50805
X_C22U6.3X50805
_C22U6.3X50805
_C22U6.3X50805
C584
C584
C600
C600
X_C22U6.3X50805
X_C22U6.3X50805
C180P50N0402
C180P50N0402
C297
C297
C605
C605
C180P50N0402
C180P50N0402
Micro Star Restricted Secret
Micro Star Restricted Secret
Micro Star Restricted Secret
ATHLON64 PWR & GND
ATHLON64 PWR & GND
ATHLON64 PWR & GND
MS-7295
MS-7295
MS-7295
C582
C582
X_C22U6.3X50805
X_C22U6.3X50805
C590
C590
C0.22U10Y0402
C0.22U10Y0402
C726
C726
C4.7U6.3X5-1
C4.7U6.3X5-1
X_C22U6.3X50805
X_C22U6.3X50805
C589
C589
X_C22U6.3X1206
X_C22U6.3X1206
C100
C100
C728
C728
C729
C729
_C22U6.3X50805
_C22U6.3X50805
C594
C594
C727
C727
C180P50N0402
C180P50N0402
Last Revision Date:
Last Revision Date:
Last Revision Date:
Wednesday, May 10, 2006
Wednesday, May 10, 2006
Wednesday, May 10, 2006
Sheet
Sheet
Sheet
1
X_C22U6.3X1206
X_C22U6.3X1206
C156
C156
C730
C730
C22U6.3X50805
C22U6.3X50805
Rev
Rev
Rev
0B
0B
0B
of
of
of
53 5
53 5
53 5
5
4
3
2
1
VCC_DDR VCC3
MEM_MA_DQS_H[7..0] 4
MEM_MA_DQS_L[7..0] 4
172
178
184
187
189
197
64
69
170
175
181
191
VDD1
VDD2
VDD3
VDD4
VDD5
VDD6
VDD753VDD859VDD9
VDD1067VDD11
VDDQ1
VDDQ2
VDDQ3
MEM_MA_DM8 MEM_MA_DATA63
D D
MEM_MA_DQS_H8 4
MEM_MA_DQS_L8 4
C C
MEM_MA_BANK2 4,8
MEM_MA_BANK1 4,8
MEM_MA_BANK0 4,8
MEM_MA_ADD[15..0] 4,8
MEM_MA_CHECK[7..0] 4
B B
MEM_MA0_CLK_H0 4,8
MEM_MA0_CLK_L0 4,8
MEM_MA0_CLK_H1 4,8
MEM_MA0_CLK_L1 4,8
MEM_MA0_CLK_H2 4,8
MEM_MA0_CLK_L2 4,8
MEM_MA_CKE0 4,8
MEM_MA_RAS_L 4,8
MEM_MA_CAS_L 4,8
MEM_MA0_CS_L0 4,8
MEM_MA0_CS_L1 4,8
MEM_MA_DM8 4
MEM_MA_DM[7..0] 4
MEM_MA_DQS_H8
MEM_MA_DQS_L8
MEM_MA_DQS_H7
MEM_MA_DQS_L7
MEM_MA_DQS_H6
MEM_MA_DQS_L6
MEM_MA_DQS_H5
MEM_MA_DQS_L5
MEM_MA_DQS_H4
MEM_MA_DQS_L4
MEM_MA_DQS_H3
MEM_MA_DQS_L3
MEM_MA_DQS_H2
MEM_MA_DQS_L2
MEM_MA_DQS_H1
MEM_MA_DQS_L1
MEM_MA_DQS_H0
MEM_MA_DQS_L0
SMB_MEM_CLK 13
SMB_MEM_DATA 13
R182 33/4 R182 33/4
R179 33/4 R179 33/4
MEM_MA_BANK2
MEM_MA_BANK1
MEM_MA_BANK0
MEM_MA_ADD15
MEM_MA_ADD14
MEM_MA_ADD13
MEM_MA_ADD12
MEM_MA_ADD11
MEM_MA_ADD10
MEM_MA_ADD9
MEM_MA_ADD8
MEM_MA_ADD7
MEM_MA_ADD6
MEM_MA_ADD5
MEM_MA_ADD4
MEM_MA_ADD3
MEM_MA_ADD2
MEM_MA_ADD1
MEM_MA_ADD0
MEM_MA_CHECK6
MEM_MA_CHECK5
MEM_MA_CHECK4
MEM_MA_CHECK3
MEM_MA_CHECK2
MEM_MA_CHECK1
MEM_MA_CHECK0
MEM_MA0_CLK_H0
MEM_MA0_CLK_L0
MEM_MA0_CLK_H1
MEM_MA0_CLK_L1
MEM_MA0_CLK_H2
MEM_MA0_CLK_L2
MEM_MA_CKE0
MEM_MA_RAS_L
MEM_MA_CAS_L
MEM_MA0_CS_L0
MEM_MA0_CS_L1
MEM_MA_DM7
MEM_MA_DM6
MEM_MA_DM5
MEM_MA_DM4
MEM_MA_DM3
MEM_MA_DM2
MEM_MA_DM1
MEM_MA_DM0
SMB_MEMCLK
SMB_MEMDATA
164
DQS17_H
165
DQS17_L
232
DQS16_H
233
DQS16_L
223
DQS15_H
224
DQS15_L
211
DQS14_H
212
DQS14_L
202
DQS13_H
203
DQS13_L
155
DQS12_H
156
DQS12_L
146
DQS11_H
147
DQS11_L
134
DQS10_H
135
DQS10_L
125
DQS9_H
126
DQS9_L
46
DQS8_H
45
DQS8_L
114
DQS7_H
113
DQS7_L
105
DQS6_H
104
DQS6_L
93
DQS5_H
92
DQS5_L
84
DQS4_H
83
DQS4_L
37
DQS3_H
36
DQS3_L
28
DQS2_H
27
DQS2_L
16
DQS1_H
15
DQS1_L
7
DQS0_H
6
DQS0_L
101
SA2
240
SA1
239
SA0
120
SCL
119
SDA
54
BA2
190
BA1
71
BA0
173
A15
174
A14
196
A13
176
A12
57
A11
70
A10
177
A9
179
A8
58
A7
180
A6
60
A5
61
A4
182
A3
63
A2
183
A1
188
A0
168
CB7
167
CB6
162
CB5
161
CB4
49
CB3
48
CB2
43
CB1
42
CB0
185
CK0_H
186
CK0_L
137
CK1_H
138
CK1_L
220
CK2_H
221
CK2_L
18
RESET_L
52
CKE0
171
CKE1
192
RAS_L
74
CAS_L
193
S0_L
76
S1_L
VDDQ4
DIMM 2
A A
5
ADDR=1010000B
194
VDDQ5
VDDQ651VDDQ756VDDQ862VDDQ9
VCC3 VCC_DDR
78
238
72
VDDQ1075VDDQ11
ERR_OUT_L
DIMM2 DIMM2
VDDSPD
DQ63
DQ62
DQ61
DQ60
DQ59
DQ58
DQ57
DQ56
DQ55
DQ54
DQ53
DQ52
DQ51
DQ50
DQ49
DQ48
DQ47
DQ46
DQ45
DQ44
DQ43
DQ42
DQ41
DQ40
DQ39
DQ38
DQ37
DQ36
DQ35
DQ34
DQ33
DQ32
DQ31
DQ30
DQ29
DQ28
DQ27
DQ26
DQ25
DQ24
DQ23
DQ22
DQ21
DQ20
DQ19
DQ18
DQ17
DQ16
DQ15
DQ14
DQ13
DQ12
DQ11
DQ10
WE_L
VREF
TEST
ODT0
ODT1
PAR_IN
DQ9
DQ8
DQ7
DQ6
DQ5
DQ4
DQ3
DQ2
DQ1
DQ0
NC1
236
235
230
229
117
116
111
110
227
226
218
217
108
107
99
98
215
214
209
208
96
95
90
89
206
205
200
199
87
86
81
80
159
158
153
152
40
39
34
33
150
149
144
143
31
30
25
24
141
140
132
131
22
21
13
12
129
128
123
122
10
9
4
3
73
1
102
195
77
55
68
19
MEM_MA_DATA62
MEM_MA_DATA61
MEM_MA_DATA60
MEM_MA_DATA59
MEM_MA_DATA58
MEM_MA_DATA57
MEM_MA_DATA56
MEM_MA_DATA55
MEM_MA_DATA54
MEM_MA_DATA53
MEM_MA_DATA52
MEM_MA_DATA51
MEM_MA_DATA50
MEM_MA_DATA49
MEM_MA_DATA48
MEM_MA_DATA47
MEM_MA_DATA46
MEM_MA_DATA45
MEM_MA_DATA44
MEM_MA_DATA43
MEM_MA_DATA42
MEM_MA_DATA41
MEM_MA_DATA40
MEM_MA_DATA39
MEM_MA_DATA38
MEM_MA_DATA37
MEM_MA_DATA36
MEM_MA_DATA35
MEM_MA_DATA34
MEM_MA_DATA33
MEM_MA_DATA32
MEM_MA_DATA31
MEM_MA_DATA30
MEM_MA_DATA29
MEM_MA_DATA28
MEM_MA_DATA27
MEM_MA_DATA26
MEM_MA_DATA25
MEM_MA_DATA24
MEM_MA_DATA23
MEM_MA_DATA22
MEM_MA_DATA21
MEM_MA_DATA20
MEM_MA_DATA19
MEM_MA_DATA18
MEM_MA_DATA17
MEM_MA_DATA16
MEM_MA_DATA15
MEM_MA_DATA14
MEM_MA_DATA13
MEM_MA_DATA12
MEM_MA_DATA11
MEM_MA_DATA10
MEM_MA_DATA9
MEM_MA_DATA8
MEM_MA_DATA7
MEM_MA_DATA6
MEM_MA_DATA5
MEM_MA_DATA4
MEM_MA_DATA3
MEM_MA_DATA2
MEM_MA_DATA1
MEM_MA_DATA0 MEM_MA_CHECK7
MEM_MA_WE_L
VDDR_VREF
MEM_MA0_ODT0
MEM_MA_DATA[63..0] 4
MEM_MA_WE_L 4,8
MEM_MA0_ODT0 4,8
VDDR_VREF
C56
C56
C0.1U25Y0402
C0.1U25Y0402
MEM_MA_DM8 4
MEM_MA_DM[7..0] 4
MEM_MA_DQS_H8 4
MEM_MA_DQS_L8 4
SMB_MEMCLK 7
SMB_MEMDATA 7
MEM_MA_BANK2 4,8
MEM_MA_BANK1 4,8
MEM_MA_BANK0 4,8
MEM_MA_ADD[15..0] 4,8
MEM_MA_CHECK[7..0] 4
MEM_MA1_CLK_H0 4,8
MEM_MA1_CLK_L0 4,8
MEM_MA1_CLK_H1 4,8
MEM_MA1_CLK_L1 4,8
MEM_MA1_CLK_H2 4,8
MEM_MA1_CLK_L2 4,8
MEM_MA_CKE1 4,8
MEM_MA_RAS_L 4,8
MEM_MA_CAS_L 4,8
MEM_MA1_CS_L0 4,8
MEM_MA1_CS_L1 4,8
VCC3
MEM_MA_DM8
MEM_MA_DM7
MEM_MA_DM6
MEM_MA_DM5
MEM_MA_DM4
MEM_MA_DM3
MEM_MA_DM2
MEM_MA_DM1
MEM_MA_DM0
MEM_MA_DQS_H8
MEM_MA_DQS_L8
MEM_MA_DQS_H7
MEM_MA_DQS_L7
MEM_MA_DQS_H6
MEM_MA_DQS_L6
MEM_MA_DQS_H5
MEM_MA_DQS_L5
MEM_MA_DQS_H4
MEM_MA_DQS_L4
MEM_MA_DQS_H3
MEM_MA_DQS_L3
MEM_MA_DQS_H2
MEM_MA_DQS_L2
MEM_MA_DQS_H1
MEM_MA_DQS_L1
MEM_MA_DQS_H0
MEM_MA_DQS_L0
SMB_MEMCLK
SMB_MEMDATA
MEM_MA_BANK2
MEM_MA_BANK1
MEM_MA_BANK0
MEM_MA_ADD15
MEM_MA_ADD14
MEM_MA_ADD13
MEM_MA_ADD12
MEM_MA_ADD11
MEM_MA_ADD10
MEM_MA_ADD9
MEM_MA_ADD8
MEM_MA_ADD7
MEM_MA_ADD6
MEM_MA_ADD5
MEM_MA_ADD4
MEM_MA_ADD3
MEM_MA_ADD2
MEM_MA_ADD1
MEM_MA_ADD0
MEM_MA_CHECK7
MEM_MA_CHECK6
MEM_MA_CHECK5
MEM_MA_CHECK4
MEM_MA_CHECK3
MEM_MA_CHECK2
MEM_MA_CHECK1
MEM_MA_CHECK0
MEM_MA1_CLK_H0
MEM_MA1_CLK_L0
MEM_MA1_CLK_H1
MEM_MA1_CLK_L1
MEM_MA1_CLK_H2
MEM_MA1_CLK_L2
MEM_MA_CKE1
MEM_MA_RAS_L
MEM_MA_CAS_L
MEM_MA1_CS_L0
MEM_MA1_CS_L1
164
DQS17_H
165
DQS17_L
232
DQS16_H
233
DQS16_L
223
DQS15_H
224
DQS15_L
211
DQS14_H
212
DQS14_L
202
DQS13_H
203
DQS13_L
155
DQS12_H
156
DQS12_L
146
DQS11_H
147
DQS11_L
134
DQS10_H
135
DQS10_L
125
DQS9_H
126
DQS9_L
46
DQS8_H
45
DQS8_L
114
DQS7_H
113
DQS7_L
105
DQS6_H
104
DQS6_L
93
DQS5_H
92
DQS5_L
84
DQS4_H
83
DQS4_L
37
DQS3_H
36
DQS3_L
28
DQS2_H
27
DQS2_L
16
DQS1_H
15
DQS1_L
7
DQS0_H
6
DQS0_L
101
SA2
240
SA1
239
SA0
120
SCL
119
SDA
54
BA2
190
BA1
71
BA0
173
A15
174
A14
196
A13
176
A12
57
A11
70
A10
177
A9
179
A8
58
A7
180
A6
60
A5
61
A4
182
A3
63
A2
183
A1
188
A0
168
CB7
167
CB6
162
CB5
161
CB4
49
CB3
48
CB2
43
CB1
42
CB0
185
CK0_H
186
CK0_L
137
CK1_H
138
CK1_L
220
CK2_H
221
CK2_L
18
RESET_L
52
CKE0
171
CKE1
192
RAS_L
74
CAS_L
193
S0_L
76
S1_L
VCC_DDR
3VDUAL
SMB_MEMDATA VDDR_VREF
4
2
3
1
D17
D17
X_1PS226_SOT23
X_1PS226_SOT23
SMB_MEMCLK 7 SMB_MEMDATA 7
SMB_MEMCLK
3
3VDUAL
3
2
1
D16
D16
X_1PS226_SOT23
X_1PS226_SOT23
172
178
184
187
189
197
VDD1
VDD2
VDD3
VDD4
VDD5
VDD6
VDD753VDD859VDD9
DIMM 4
ADDR=1010010B
R48
R48
C40
C40
56.2/4/1%
56.2/4/1%
C0.1U16X0402
C0.1U16X0402
R62
R62
56.2/4/1%
56.2/4/1%
2
64
69
VDD1067VDD11
VDDR_VREF
C75
C75
C0.1U16X0402
C0.1U16X0402
170
175
181
191
VDDQ1
VDDQ2
VDDQ3
C70
C70
C1000P50X0402
C1000P50X0402
78
VDDQ651VDDQ756VDDQ862VDDQ9
72
VDDQ1075VDDQ11
ERR_OUT_L
238
VDDSPD
PAR_IN
DQ63
DQ62
DQ61
DQ60
DQ59
DQ58
DQ57
DQ56
DQ55
DQ54
DQ53
DQ52
DQ51
DQ50
DQ49
DQ48
DQ47
DQ46
DQ45
DQ44
DQ43
DQ42
DQ41
DQ40
DQ39
DQ38
DQ37
DQ36
DQ35
DQ34
DQ33
DQ32
DQ31
DQ30
DQ29
DQ28
DQ27
DQ26
DQ25
DQ24
DQ23
DQ22
DQ21
DQ20
DQ19
DQ18
DQ17
DQ16
DQ15
DQ14
DQ13
DQ12
DQ11
DQ10
WE_L
VREF
TEST
ODT0
ODT1
DIMM4 DIMM4
MEM_MA_DATA63
236
MEM_MA_DATA62
235
MEM_MA_DATA61
230
MEM_MA_DATA60
229
MEM_MA_DATA59
117
MEM_MA_DATA58
116
MEM_MA_DATA57
111
MEM_MA_DATA56
110
MEM_MA_DATA55
227
MEM_MA_DATA54
226
MEM_MA_DATA53
218
MEM_MA_DATA52
217
MEM_MA_DATA51
108
MEM_MA_DATA50
107
MEM_MA_DATA49
99
MEM_MA_DATA48
98
MEM_MA_DATA47
215
MEM_MA_DATA46
214
MEM_MA_DATA45
209
MEM_MA_DATA44
208
MEM_MA_DATA43
96
MEM_MA_DATA42
95
MEM_MA_DATA41
90
MEM_MA_DATA40
89
MEM_MA_DATA39
206
MEM_MA_DATA38
205
MEM_MA_DATA37
200
MEM_MA_DATA36
199
MEM_MA_DATA35
87
MEM_MA_DATA34
86
MEM_MA_DATA33
81
MEM_MA_DATA32
80
MEM_MA_DATA31
159
MEM_MA_DATA30
158
MEM_MA_DATA29
153
MEM_MA_DATA28
152
MEM_MA_DATA27
40
MEM_MA_DATA26
39
MEM_MA_DATA25
34
MEM_MA_DATA24
33
MEM_MA_DATA23
150
MEM_MA_DATA22
149
MEM_MA_DATA21
144
MEM_MA_DATA20
143
MEM_MA_DATA19
31
MEM_MA_DATA18
30
MEM_MA_DATA17
25
MEM_MA_DATA16
24
MEM_MA_DATA15
141
MEM_MA_DATA14
140
MEM_MA_DATA13
132
MEM_MA_DATA12
131
MEM_MA_DATA11
22
MEM_MA_DATA10
21
MEM_MA_DATA9
13
DQ9
MEM_MA_DATA8
12
DQ8
MEM_MA_DATA7
129
DQ7
MEM_MA_DATA6
128
DQ6
MEM_MA_DATA5
123
DQ5
MEM_MA_DATA4
122
DQ4
MEM_MA_DATA3
10
DQ3
MEM_MA_DATA2
9
DQ2
MEM_MA_DATA1
4
DQ1
MEM_MA_DATA0
3
DQ0
MEM_MA_WE_L
73
1
102
MEM_MA1_ODT0
195
77
55
68
19
NC1
Micro Star Restricted Secret
Micro Star Restricted Secret
Micro Star Restricted Secret
Title
Title
Title
MSI
FIRST LOGICAL DDR DIMM
FIRST LOGICAL DDR DIMM
Document Number
Document Number
Document Number
MICRO-STAR INT'L CO.,LTD.
MICRO-STAR INT'L CO.,LTD.
MICRO-STAR INT'L CO.,LTD.
No. 69, Li-De St, Jung-He City,
No. 69, Li-De St, Jung-He City,
No. 69, Li-De St, Jung-He City,
Taipei Hsien, Taiwan
Taipei Hsien, Taiwan
Taipei Hsien, Taiwan
http://www.msi.com.tw
http://www.msi.com.tw
http://www.msi.com.tw
FIRST LOGICAL DDR DIMM
MEM_MA_WE_L 4,8
MEM_MA1_ODT0 4,8
MS-7295
MS-7295
MS-7295
Last Revision Date:
Last Revision Date:
Last Revision Date:
Wednesday, May 10, 2006
Wednesday, May 10, 2006
Wednesday, May 10, 2006
Sheet
Sheet
Sheet
1
MEM_MA_DATA[63..0] 4
VDDR_VREF
C62
C62
C0.1U25Y0402
C0.1U25Y0402
Rev
Rev
Rev
0B
0B
0B
63 5
63 5
63 5
of
of
of
194
VDDQ4
VDDQ5
5
4
3
2
1
MEM_MB_DQS_H[7..0] 4
MEM_MB_DQS_L[7..0] 4
D D
MEM_MB_DM8 4
MEM_MB_DM[7..0] 4
MEM_MB_DQS_H8 4
MEM_MB_DQS_L8 4
C C
VCC3
MEM_MB_BANK2 4,8
MEM_MB_BANK1 4,8
MEM_MB_BANK0 4,8
MEM_MB_ADD[15..0] 4,8
B B
MEM_MB_CHECK[7..0] 4
MEM_MB0_CLK_H0 4,8
MEM_MB0_CLK_L0 4,8
MEM_MB0_CLK_H1 4,8
MEM_MB0_CLK_L1 4,8
MEM_MB0_CLK_H2 4,8
MEM_MB0_CLK_L2 4,8
MEM_MB_CKE0 4,8
MEM_MB_RAS_L 4,8
MEM_MB_CAS_L 4,8
MEM_MB0_CS_L0 4,8
MEM_MB0_CS_L1 4,8
MEM_MB_DM8
MEM_MB_DM7
MEM_MB_DM6
MEM_MB_DM5
MEM_MB_DM4
MEM_MB_DM3
MEM_MB_DM2
MEM_MB_DM1
MEM_MB_DM0
MEM_MB_DQS_H8
MEM_MB_DQS_L8
MEM_MB_DQS_H7
MEM_MB_DQS_L7
MEM_MB_DQS_H6
MEM_MB_DQS_L6
MEM_MB_DQS_H5
MEM_MB_DQS_L5
MEM_MB_DQS_H4
MEM_MB_DQS_L4
MEM_MB_DQS_H3
MEM_MB_DQS_L3
MEM_MB_DQS_H2
MEM_MB_DQS_L2
MEM_MB_DQS_H1
MEM_MB_DQS_L1
MEM_MB_DQS_H0
MEM_MB_DQS_L0
SMB_MEMCLK
SMB_MEMDATA
MEM_MB_BANK2
MEM_MB_BANK1
MEM_MB_BANK0
MEM_MB_ADD15
MEM_MB_ADD14
MEM_MB_ADD13
MEM_MB_ADD12
MEM_MB_ADD11
MEM_MB_ADD10
MEM_MB_ADD9
MEM_MB_ADD8
MEM_MB_ADD7
MEM_MB_ADD6
MEM_MB_ADD5
MEM_MB_ADD4
MEM_MB_ADD3
MEM_MB_ADD2
MEM_MB_ADD1
MEM_MB_ADD0
MEM_MB_CHECK7
MEM_MB_CHECK6
MEM_MB_CHECK5
MEM_MB_CHECK4
MEM_MB_CHECK3
MEM_MB_CHECK2
MEM_MB_CHECK1
MEM_MB_CHECK0
MEM_MB0_CLK_H0
MEM_MB0_CLK_L0
MEM_MB0_CLK_H1
MEM_MB0_CLK_L1
MEM_MB0_CLK_H2
MEM_MB0_CLK_L2
MEM_MB_CKE0
MEM_MB_RAS_L
MEM_MB_CAS_L
MEM_MB0_CS_L0
MEM_MB0_CS_L1
VCC_DDR
172
178
184
187
189
197
64
69
170
175
181
191
VDD1
VDD2
VDD3
VDD4
VDD5
VDD6
VDD753VDD859VDD9
VDD1067VDD11
VDDQ1
VDDQ2
VDDQ3
164
DQS17_H
165
DQS17_L
232
DQS16_H
233
DQS16_L
223
DQS15_H
224
DQS15_L
211
DQS14_H
212
DQS14_L
202
DQS13_H
203
DQS13_L
155
DQS12_H
156
DQS12_L
146
DQS11_H
147
DQS11_L
134
DQS10_H
135
DQS10_L
125
DQS9_H
126
DQS9_L
46
DQS8_H
45
DQS8_L
114
DQS7_H
113
DQS7_L
105
DQS6_H
104
DQS6_L
93
DQS5_H
92
DQS5_L
84
DQS4_H
83
DQS4_L
37
DQS3_H
36
DQS3_L
28
DQS2_H
27
DQS2_L
16
DQS1_H
15
DQS1_L
7
DQS0_H
6
DQS0_L
101
SA2
240
SA1
239
SA0
120
SCL
119
SDA
54
BA2
190
BA1
71
BA0
173
A15
174
A14
196
A13
176
A12
57
A11
70
A10
177
A9
179
A8
58
A7
180
A6
60
A5
61
A4
182
A3
63
A2
183
A1
188
A0
168
CB7
167
CB6
162
CB5
161
CB4
49
CB3
48
CB2
43
CB1
42
CB0
185
CK0_H
186
CK0_L
137
CK1_H
138
CK1_L
220
CK2_H
221
CK2_L
18
RESET_L
52
CKE0
171
CKE1
192
RAS_L
74
CAS_L
193
S0_L
76
S1_L
VDDQ4
194
VDDQ5
VDDQ651VDDQ756VDDQ862VDDQ9
72
VCC3
78
VDDQ1075VDDQ11
ERR_OUT_L
238
VDDSPD
PAR_IN
DQ63
DQ62
DQ61
DQ60
DQ59
DQ58
DQ57
DQ56
DQ55
DQ54
DQ53
DQ52
DQ51
DQ50
DQ49
DQ48
DQ47
DQ46
DQ45
DQ44
DQ43
DQ42
DQ41
DQ40
DQ39
DQ38
DQ37
DQ36
DQ35
DQ34
DQ33
DQ32
DQ31
DQ30
DQ29
DQ28
DQ27
DQ26
DQ25
DQ24
DQ23
DQ22
DQ21
DQ20
DQ19
DQ18
DQ17
DQ16
DQ15
DQ14
DQ13
DQ12
DQ11
DQ10
WE_L
VREF
TEST
ODT0
ODT1
DQ9
DQ8
DQ7
DQ6
DQ5
DQ4
DQ3
DQ2
DQ1
DQ0
NC1
DIMM1 DIMM1
236
235
230
229
117
116
111
110
227
226
218
217
108
107
99
98
215
214
209
208
96
95
90
89
206
205
200
199
87
86
81
80
159
158
153
152
40
39
34
33
150
149
144
143
31
30
25
24
141
140
132
131
22
21
13
12
129
128
123
122
10
9
4
3
73
1
102
195
77
55
68
19
MEM_MB_DATA63
MEM_MB_DATA62
MEM_MB_DATA61
MEM_MB_DATA60
MEM_MB_DATA59
MEM_MB_DATA58
MEM_MB_DATA57
MEM_MB_DATA56
MEM_MB_DATA55
MEM_MB_DATA54
MEM_MB_DATA53
MEM_MB_DATA52
MEM_MB_DATA51
MEM_MB_DATA50
MEM_MB_DATA49
MEM_MB_DATA48
MEM_MB_DATA47
MEM_MB_DATA46
MEM_MB_DATA45
MEM_MB_DATA44
MEM_MB_DATA43
MEM_MB_DATA42
MEM_MB_DATA41
MEM_MB_DATA40
MEM_MB_DATA39
MEM_MB_DATA38
MEM_MB_DATA37
MEM_MB_DATA36
MEM_MB_DATA35
MEM_MB_DATA34
MEM_MB_DATA33
MEM_MB_DATA32
MEM_MB_DATA31
MEM_MB_DATA30
MEM_MB_DATA29
MEM_MB_DATA28
MEM_MB_DATA27
MEM_MB_DATA26
MEM_MB_DATA25
MEM_MB_DATA24
MEM_MB_DATA23
MEM_MB_DATA22
MEM_MB_DATA21
MEM_MB_DATA20
MEM_MB_DATA19
MEM_MB_DATA18
MEM_MB_DATA17
MEM_MB_DATA16
MEM_MB_DATA15
MEM_MB_DATA14
MEM_MB_DATA13
MEM_MB_DATA12
MEM_MB_DATA11
MEM_MB_DATA10
MEM_MB_DATA9
MEM_MB_DATA8
MEM_MB_DATA7
MEM_MB_DATA6
MEM_MB_DATA5
MEM_MB_DATA4
MEM_MB_DATA3
MEM_MB_DATA2
MEM_MB_DATA1
MEM_MB_DATA0
MEM_MB_WE_L
VDDR_VREF
MEM_MB0_ODT0
MEM_MB_DATA[63..0] 4
MEM_MB_WE_L 4,8
VDDR_VREF
C78
C78
C0.1U25Y0402
C0.1U25Y0402
MEM_MB0_ODT0 4,8
VCC_DDR VCC3
172
178
184
187
189
197
64
69
170
175
181
191
VDD1
VDD2
VDD3
VDD4
VDD5
VDD6
VDD753VDD859VDD9
VDD1067VDD11
VDDQ1
VDDQ2
MEM_MB_DM8 4
MEM_MB_DM[7..0] 4
MEM_MB_DQS_H8 4
MEM_MB_DQS_L8 4
SMB_MEMCLK 6
SMB_MEMDATA 6
MEM_MB_BANK2 4,8
MEM_MB_BANK1 4,8
MEM_MB_BANK0 4,8
MEM_MB_ADD[15..0] 4,8
MEM_MB_CHECK[7..0] 4
MEM_MB1_CLK_H0 4,8
MEM_MB1_CLK_L0 4,8
MEM_MB1_CLK_H1 4,8
MEM_MB1_CLK_L1 4,8
MEM_MB1_CLK_H2 4,8
MEM_MB1_CLK_L2 4,8
MEM_MB_CKE1 4,8
MEM_MB_RAS_L 4,8
MEM_MB_CAS_L 4,8
MEM_MB1_CS_L0 4,8
MEM_MB1_CS_L1 4,8
MEM_MB_DM8
MEM_MB_DM7
MEM_MB_DM6
MEM_MB_DM5
MEM_MB_DM4
MEM_MB_DM3
MEM_MB_DM2
MEM_MB_DM1
MEM_MB_DM0
MEM_MB_DQS_H8
MEM_MB_DQS_L8
MEM_MB_DQS_H7
MEM_MB_DQS_L7
MEM_MB_DQS_H6
MEM_MB_DQS_L6
MEM_MB_DQS_H5
MEM_MB_DQS_L5
MEM_MB_DQS_H4
MEM_MB_DQS_L4
MEM_MB_DQS_H3
MEM_MB_DQS_L3
MEM_MB_DQS_H2
MEM_MB_DQS_L2
MEM_MB_DQS_H1
MEM_MB_DQS_L1
MEM_MB_DQS_H0
MEM_MB_DQS_L0
VCC3
SMB_MEMCLK
SMB_MEMDATA
MEM_MB_BANK2
MEM_MB_BANK1
MEM_MB_BANK0
MEM_MB_ADD15
MEM_MB_ADD14
MEM_MB_ADD13
MEM_MB_ADD12
MEM_MB_ADD11
MEM_MB_ADD10
MEM_MB_ADD9
MEM_MB_ADD8
MEM_MB_ADD7
MEM_MB_ADD6
MEM_MB_ADD5
MEM_MB_ADD4
MEM_MB_ADD3
MEM_MB_ADD2
MEM_MB_ADD1
MEM_MB_ADD0
MEM_MB_CHECK7
MEM_MB_CHECK6
MEM_MB_CHECK5
MEM_MB_CHECK4
MEM_MB_CHECK3
MEM_MB_CHECK2
MEM_MB_CHECK1
MEM_MB_CHECK0
MEM_MB1_CLK_H0
MEM_MB1_CLK_L0
MEM_MB1_CLK_H1
MEM_MB1_CLK_L1
MEM_MB1_CLK_H2
MEM_MB1_CLK_L2
MEM_MB_CKE1
MEM_MB_RAS_L
MEM_MB_CAS_L
MEM_MB1_CS_L0
MEM_MB1_CS_L1
164
DQS17_H
165
DQS17_L
232
DQS16_H
233
DQS16_L
223
DQS15_H
224
DQS15_L
211
DQS14_H
212
DQS14_L
202
DQS13_H
203
DQS13_L
155
DQS12_H
156
DQS12_L
146
DQS11_H
147
DQS11_L
134
DQS10_H
135
DQS10_L
125
DQS9_H
126
DQS9_L
46
DQS8_H
45
DQS8_L
114
DQS7_H
113
DQS7_L
105
DQS6_H
104
DQS6_L
93
DQS5_H
92
DQS5_L
84
DQS4_H
83
DQS4_L
37
DQS3_H
36
DQS3_L
28
DQS2_H
27
DQS2_L
16
DQS1_H
15
DQS1_L
7
DQS0_H
6
DQS0_L
101
SA2
240
SA1
239
SA0
120
SCL
119
SDA
54
BA2
190
BA1
71
BA0
173
A15
174
A14
196
A13
176
A12
57
A11
70
A10
177
A9
179
A8
58
A7
180
A6
60
A5
61
A4
182
A3
63
A2
183
A1
188
A0
168
CB7
167
CB6
162
CB5
161
CB4
49
CB3
48
CB2
43
CB1
42
CB0
185
CK0_H
186
CK0_L
137
CK1_H
138
CK1_L
220
CK2_H
221
CK2_L
18
RESET_L
52
CKE0
171
CKE1
192
RAS_L
74
CAS_L
193
S0_L
76
S1_L
VDDQ3
78
VDDQ651VDDQ756VDDQ862VDDQ9
72
VDDQ1075VDDQ11
238
VDDSPD
DQ63
DQ62
DQ61
DQ60
DQ59
DQ58
DQ57
DQ56
DQ55
DQ54
DQ53
DQ52
DQ51
DQ50
DQ49
DQ48
DQ47
DQ46
DQ45
DQ44
DQ43
DQ42
DQ41
DQ40
DQ39
DQ38
DQ37
DQ36
DQ35
DQ34
DQ33
DQ32
DQ31
DQ30
DQ29
DQ28
DQ27
DQ26
DQ25
DQ24
DQ23
DQ22
DQ21
DQ20
DQ19
DQ18
DQ17
DQ16
DQ15
DQ14
DQ13
DQ12
DQ11
DQ10
DQ9
DQ8
DQ7
DQ6
DQ5
DQ4
DQ3
DQ2
DQ1
DQ0
WE_L
VREF
TEST
ODT0
ODT1
ERR_OUT_L
PAR_IN
NC1
DIMM3 DIMM3
236
235
230
229
117
116
111
110
227
226
218
217
108
107
99
98
215
214
209
208
96
95
90
89
206
205
200
199
87
86
81
80
159
158
153
152
40
39
34
33
150
149
144
143
31
30
25
24
141
140
132
131
22
21
13
12
129
128
123
122
10
9
4
3
73
1
102
195
77
55
68
19
MEM_MB_DATA63
MEM_MB_DATA62
MEM_MB_DATA61
MEM_MB_DATA60
MEM_MB_DATA59
MEM_MB_DATA58
MEM_MB_DATA57
MEM_MB_DATA56
MEM_MB_DATA55
MEM_MB_DATA54
MEM_MB_DATA53
MEM_MB_DATA52
MEM_MB_DATA51
MEM_MB_DATA50
MEM_MB_DATA49
MEM_MB_DATA48
MEM_MB_DATA47
MEM_MB_DATA46
MEM_MB_DATA45
MEM_MB_DATA44
MEM_MB_DATA43
MEM_MB_DATA42
MEM_MB_DATA41
MEM_MB_DATA40
MEM_MB_DATA39
MEM_MB_DATA38
MEM_MB_DATA37
MEM_MB_DATA36
MEM_MB_DATA35
MEM_MB_DATA34
MEM_MB_DATA33
MEM_MB_DATA32
MEM_MB_DATA31
MEM_MB_DATA30
MEM_MB_DATA29
MEM_MB_DATA28
MEM_MB_DATA27
MEM_MB_DATA26
MEM_MB_DATA25
MEM_MB_DATA24
MEM_MB_DATA23
MEM_MB_DATA22
MEM_MB_DATA21
MEM_MB_DATA20
MEM_MB_DATA19
MEM_MB_DATA18
MEM_MB_DATA17
MEM_MB_DATA16
MEM_MB_DATA15
MEM_MB_DATA14
MEM_MB_DATA13
MEM_MB_DATA12
MEM_MB_DATA11
MEM_MB_DATA10
MEM_MB_DATA9
MEM_MB_DATA8
MEM_MB_DATA7
MEM_MB_DATA6
MEM_MB_DATA5
MEM_MB_DATA4
MEM_MB_DATA3
MEM_MB_DATA2
MEM_MB_DATA1
MEM_MB_DATA0
MEM_MB_WE_L
MEM_MB1_ODT0
MEM_MB_WE_L 4,8
MEM_MB1_ODT0 4,8
MEM_MB_DATA[63..0] 4
VDDR_VREF
C48
C48
C0.1U25Y0402
C0.1U25Y0402
194
VDDQ4
VDDQ5
A A
5
ADDR=1010001B
4
3
DIMM 3 DIMM 1
ADDR=1010011B
2
Micro Star Restricted Secret
Micro Star Restricted Secret
Micro Star Restricted Secret
Title
Title
Title
Document Number
Document Number
Document Number
MICRO-STAR INT'L CO.,LTD.
MICRO-STAR INT'L CO.,LTD.
MICRO-STAR INT'L CO.,LTD.
No. 69, Li-De St, Jung-He City,
No. 69, Li-De St, Jung-He City,
No. 69, Li-De St, Jung-He City,
Taipei Hsien, Taiwan
Taipei Hsien, Taiwan
Taipei Hsien, Taiwan
http://www.msi.com.tw
http://www.msi.com.tw
http://www.msi.com.tw
SECOND LOGICAL DDR DIMM
SECOND LOGICAL DDR DIMM
SECOND LOGICAL DDR DIMM
MSI
MS-7295
MS-7295
MS-7295
1
Last Revision Date:
Last Revision Date:
Last Revision Date:
Wednesday, May 10, 2006
Wednesday, May 10, 2006
Wednesday, May 10, 2006
Sheet
Sheet
Sheet
73 5
73 5
73 5
Rev
Rev
Rev
0B
0B
0B
of
of
of
5
4
3
2
1
C0.1U16X0402
C0.1U16X0402
C0.1U16X0402
C0.1U16X0402
C106
C106
VCC_DDR VCC_DDR
C140
C140
C0.1U16X0402
C0.1U16X0402
C0.1U16X0402
C0.1U16X0402
C146
C146
C131
C131
C0.1U16X0402
C0.1U16X0402
MEM_MA_ADD[15..0] 4,6
MEM_MA0_CLK_H2 4,6
VTT_DDR
MEM_MA_ADD15
RN9 8P4R-47R0402 RN9 8P4R-47R0402
1
D D
MEM_MA_BANK2 4,6
MEM_MA_BANK0 4,6
MEM_MA_RAS_L 4,6
MEM_MB0_CS_L0 4,7
MEM_MA0_CS_L0 4,6
MEM_MB_BANK0 4,7
MEM_MA_BANK1 4,6
MEM_MB_RAS_L 4,7
MEM_MA1_CS_L1 4,6
MEM_MB1_CS_L1 4,7
MEM_MB0_CS_L1 4,7
C C
MEM_MA1_CS_L0 4,6
MEM_MA1_ODT0 4,6
MEM_MA_ADD14
MEM_MA_BANK2
MEM_MB_ADD9
MEM_MB_ADD11
MEM_MA_ADD12
MEM_MA_ADD9
MEM_MB_ADD7
MEM_MB_ADD6
MEM_MA_ADD6
MEM_MA_ADD5
MEM_MB_ADD5
MEM_MA_ADD1
MEM_MA_ADD2
MEM_MB_ADD1
MEM_MB_ADD2
MEM_MA_BANK0
MEM_MA_RAS_L
MEM_MB0_CS_L0
MEM_MA0_CS_L0
MEM_MB_BANK0
MEM_MA_BANK1
MEM_MB_RAS_L
MEM_MA_ADD10
MEM_MB_ADD13
MEM_MA1_CS_L1
MEM_MB1_CS_L1
MEM_MB0_CS_L1
MEM_MA1_CS_L0
MEM_MA1_ODT0
RN10 8P4R-47R0402 RN10 8P4R-47R0402
RN12 8P4R-47R0402 RN12 8P4R-47R0402
RN15 8P4R-47R0402 RN15 8P4R-47R0402
RN18 8P4R-47R0402 RN18 8P4R-47R0402
RN17 8P4R-47R0402 RN17 8P4R-47R0402
RN22 8P4R-47R0402 RN22 8P4R-47R0402
2
3
4
5
6
7
8
1
2
3
4
5
6
7
8
1
2
3
4
5
6
7
8
1
2
3
4
5
6
7
8
1
2
3
4
5
6
7
8
1
2
3
4
5
6
7
8
1
2
3
4
5
6
7
8
R107 47/4 R107 47/4
R108 47/4 R108 47/4
MEM_MA0_CLK_L2 4,6
MEM_MA0_CLK_H1 4,6
MEM_MA0_CLK_L1 4,6
MEM_MA0_CLK_H0 4,6
MEM_MA0_CLK_L0 4,6
MEM_MB0_CLK_H2 4,7
MEM_MB0_CLK_L2 4,7
MEM_MB0_CLK_H1 4,7
MEM_MB0_CLK_L1 4,7
MEM_MB0_CLK_H0 4,7
MEM_MB0_CLK_L0 4,7
MEM_MA0_CLK_H2
MEM_MA0_CLK_L2
MEM_MA0_CLK_H1
MEM_MA0_CLK_L1
MEM_MA0_CLK_H0
MEM_MA0_CLK_L0
MEM_MB0_CLK_H2
MEM_MB0_CLK_L2
MEM_MB0_CLK_H1
MEM_MB0_CLK_L1
MEM_MB0_CLK_H0
MEM_MB0_CLK_L0
C188
C188
C1.5P50N0402
C1.5P50N0402
C69
C69
C1.5P50N0402
C1.5P50N0402
C133
C133
C1.5P50N0402
C1.5P50N0402
C176
C176
C1.5P50N0402
C1.5P50N0402
C68
C68
C1.5P50N0402
C1.5P50N0402
C128
C128
C1.5P50N0402
C1.5P50N0402
VTT_DDR
C212
C212
C0.1U16X0402
C0.1U16X0402
C207
C207
C0.1U16X0402
C0.1U16X0402
MEM_MA_ADD15
MEM_MA_ADD14
MEM_MA_ADD13
MEM_MA_ADD12
MEM_MA_ADD11
MEM_MA_ADD10
MEM_MA_ADD9
MEM_MA_ADD8
MEM_MA_ADD7
MEM_MA_ADD6
MEM_MA_ADD5
MEM_MA_ADD4
MEM_MA_ADD3
MEM_MA_ADD2
MEM_MA_ADD1
MEM_MA_ADD0
MEM_MA_CAS_L
MEM_MA_WE_L
MEM_MA_RAS_L
MEM_MA_BANK2
MEM_MA_BANK1
MEM_MA_BANK0
C603 C22P50N0402/B C603 C22P50N0402/B
C602 C22P50N0402/B C602 C22P50N0402/B
C625 C22P50N0402/B C625 C22P50N0402/B
C604 C22P50N0402/B C604 C22P50N0402/B
C608 C22P50N0402/B C608 C22P50N0402/B
C621 C22P50N0402/B C621 C22P50N0402/B
C609 C22P50N0402/B C609 C22P50N0402/B
C610 C22P50N0402/B C610 C22P50N0402/B
C611 C22P50N0402/B C611 C22P50N0402/B
C613 C22P50N0402/B C613 C22P50N0402/B
C612 C22P50N0402/B C612 C22P50N0402/B
C615 C22P50N0402/B C615 C22P50N0402/B
C614 C22P50N0402/B C614 C22P50N0402/B
C616 C22P50N0402/B C616 C22P50N0402/B
C617 C22P50N0402/B C617 C22P50N0402/B
C619 C22P50N0402/B C619 C22P50N0402/B
C623 C22P50N0402/B C623 C22P50N0402/B
C624 C22P50N0402/B C624 C22P50N0402/B
C622 C22P50N0402/B C622 C22P50N0402/B
C607 C22P50N0402/B C607 C22P50N0402/B
C618 C22P50N0402/B C618 C22P50N0402/B
C620 C22P50N0402/B C620 C22P50N0402/B
MEM_MB_ADD15
MEM_MB_ADD14
MEM_MB_ADD13
MEM_MB_ADD12
MEM_MB_ADD11
MEM_MB_ADD10
MEM_MB_ADD9
MEM_MB_ADD8
MEM_MB_ADD7
MEM_MB_ADD6
MEM_MB_ADD5
MEM_MB_ADD4
MEM_MB_ADD3
MEM_MB_ADD2
MEM_MB_ADD1
MEM_MB_ADD0
MEM_MB_CAS_L
MEM_MB_WE_L
MEM_MB_RAS_L
MEM_MB_BANK2
MEM_MB_BANK1
MEM_MB_BANK0
Decoupling Between Processor and DIMMs
Layout: Spread out on VTT pour
C0.1U16X0402
C0.1U16X0402
C0.1U16X0402
C192
C192
C173
C173
C0.1U16X0402
C0.1U16X0402
C0.1U16X0402
C0.1U16X0402
C198
C198
C0.1U16X0402
C0.1U16X0402
C204
C204
C0.1U16X0402
C0.1U16X0402
C125
C125
C0.1U16X0402
C150
C150
C162
C162
C0.1U16X0402
C0.1U16X0402
C158
C158
C0.1U16X0402
C0.1U16X0402
C127 C22P50N0402 C127 C22P50N0402
C122 C22P50N0402 C122 C22P50N0402
C197 C22P50N0402 C197 C22P50N0402
C129 C22P50N0402 C129 C22P50N0402
C136 C22P50N0402 C136 C22P50N0402
C179 C22P50N0402 C179 C22P50N0402
C141 C22P50N0402 C141 C22P50N0402
C142 C22P50N0402 C142 C22P50N0402
C145 C22P50N0402 C145 C22P50N0402
C151 C22P50N0402 C151 C22P50N0402
C148 C22P50N0402 C148 C22P50N0402
C155 C22P50N0402 C155 C22P50N0402
C152 C22P50N0402 C152 C22P50N0402
C157 C22P50N0402 C157 C22P50N0402
C159 C22P50N0402 C159 C22P50N0402
C174 C22P50N0402 C174 C22P50N0402
C182 C22P50N0402 C182 C22P50N0402
C187 C22P50N0402 C187 C22P50N0402
C183 C22P50N0402 C183 C22P50N0402
C135 C22P50N0402 C135 C22P50N0402
C167 C22P50N0402 C167 C22P50N0402
C175 C22P50N0402 C175 C22P50N0402
C0.1U16X0402
C0.1U16X0402
C213
C213
C180
C180
VCC_DDR
MEM_MB_ADD[15..0] 4,7
MEM_MA_CKE1
RN8 8P4R-47R0402 RN8 8P4R-47R0402
MEM_MA_CKE1 4,6
MEM_MA_CKE0 4,6
MEM_MB_BANK2 4,7
B B
MEM_MB_BANK1 4,7
MEM_MA_WE_L 4,6
MEM_MA_CAS_L 4,6
MEM_MB_WE_L 4,7
MEM_MA0_ODT0 4,6
MEM_MB_CKE1 4,7
MEM_MB_CKE0 4,7
MEM_MB_CAS_L 4,7
MEM_MA0_CS_L1 4,6
MEM_MB0_ODT0 4,7
MEM_MB1_CS_L0 4,7
MEM_MB1_ODT0 4,7
MEM_MA_CKE0
MEM_MB_BANK2
MEM_MB_ADD12
MEM_MB_ADD8
MEM_MA_ADD11
MEM_MA_ADD7
MEM_MA_ADD8
MEM_MA_ADD4
MEM_MA_ADD3
MEM_MB_ADD4
MEM_MB_ADD3
MEM_MB_ADD0
MEM_MB_BANK1
MEM_MA_ADD0
MEM_MB_ADD10
MEM_MA_WE_L
MEM_MA_CAS_L
MEM_MB_WE_L
MEM_MA0_ODT0
MEM_MB_CKE1
MEM_MB_CKE0
MEM_MB_ADD15
MEM_MB_ADD14
MEM_MB_CAS_L
MEM_MA_ADD13
MEM_MA0_CS_L1
MEM_MB0_ODT0
MEM_MB1_CS_L0
MEM_MB1_ODT0
1
3
5
7
RN11 8P4R-47R0402 RN11 8P4R-47R0402
1
3
5
7
RN13 8P4R-47R0402 RN13 8P4R-47R0402
1
3
5
7
RN16 8P4R-47R0402 RN16 8P4R-47R0402
1
3
5
7
RN19 8P4R-47R0402 RN19 8P4R-47R0402
1
3
5
7
RN7 8P4R-47R0402 RN7 8P4R-47R0402
1
3
5
7
RN21 8P4R-47R0402 RN21 8P4R-47R0402
1
3
5
7
R105 47/4 R105 47/4
R111 47/4 R111 47/4
VTT_DDR
2
4
6
8
2
4
6
8
2
4
6
8
2
4
6
8
2
4
6
8
2
4
6
8
2
4
6
8
MEM_MA1_CLK_H2 4,6
MEM_MA1_CLK_L2 4,6
MEM_MA1_CLK_H1 4,6
MEM_MA1_CLK_L1 4,6
MEM_MA1_CLK_H0 4,6
MEM_MA1_CLK_L0 4,6
MEM_MB1_CLK_H2 4,7
MEM_MB1_CLK_L2 4,7
MEM_MB1_CLK_H1 4,7
MEM_MB1_CLK_L1 4,7
A A
MEM_MB1_CLK_H0 4,7
MEM_MB1_CLK_L0 4,7
5
4
MEM_MA1_CLK_H2
MEM_MA1_CLK_L2
MEM_MA1_CLK_H1
MEM_MA1_CLK_L1
MEM_MA1_CLK_H0
MEM_MA1_CLK_L0
MEM_MB1_CLK_H2
MEM_MB1_CLK_L2
MEM_MB1_CLK_H1
MEM_MB1_CLK_L1
MEM_MB1_CLK_H0
MEM_MB1_CLK_L0
C189
C189
C1.5P50N0402
C1.5P50N0402
C55
C55
C1.5P50N0402
C1.5P50N0402
C137
C137
C1.5P50N0402
C1.5P50N0402
C181
C181
C1.5P50N0402
C1.5P50N0402
C61
C61
C1.5P50N0402
C1.5P50N0402
C138
C138
C1.5P50N0402
C1.5P50N0402
VTT_DDR
C0.1U16X0402
C115
C0.1U16X0402
C0.1U16X0402
VTT_DDR VCC_DDR
3
C25
C25
C0.1U16X0402
C0.1U16X0402
C738 C0.1U16X0402 C738 C0.1U16X0402
C742 C0.1U16X0402 C742 C0.1U16X0402
C743 C0.1U16X0402 C743 C0.1U16X0402
C744 C0.1U16X0402 C744 C0.1U16X0402
C745 C0.1U16X0402 C745 C0.1U16X0402
C746 C0.1U16X0402 C746 C0.1U16X0402
C0.1U16X0402
C0.1U16X0402
C117
C117
C115
C0.1U16X0402
C26
C26
C96
C96
C0.1U16X0402
C0.1U16X0402
C84
C84
C0.1U16X0402
C0.1U16X0402
X_C0.1U16X0402
X_C0.1U16X0402
C0.1U16X0402
C0.1U16X0402
C266
C266
C255
C255
C0.1U16X0402
C0.1U16X0402
VTT_DDR
C260
C260
X_C180P50N0402
X_C180P50N0402
2
C254
C254
X_C0.1U16X0402
X_C0.1U16X0402
VCC_DDR
C231
C231
C0.1U16X0402
C0.1U16X0402
C247
C247
C0.1U16X0402
C0.1U16X0402
C237
C237
C120
C120
C0.1U16X0402
C0.1U16X0402
For EMI
X_C180P50N0402
X_C180P50N0402
C220
C220
X_C180P50N0402
X_C180P50N0402
C44
C44
X_C180P50N0402
X_C180P50N0402
Title
Title
Title
Document Number
Document Number
Document Number
MICRO-STAR INT'L CO.,LTD.
MICRO-STAR INT'L CO.,LTD.
MICRO-STAR INT'L CO.,LTD.
No. 69, Li-De St, Jung-He City,
No. 69, Li-De St, Jung-He City,
No. 69, Li-De St, Jung-He City,
Taipei Hsien, Taiwan
Taipei Hsien, Taiwan
Taipei Hsien, Taiwan
http://www.msi.com.tw
http://www.msi.com.tw
http://www.msi.com.tw
C0.1U16X0402
C0.1U16X0402
C143
C143
C287
C287
C273
C273
C0.1U16X0402
C0.1U16X0402
C0.1U16X0402
C261
C261
C201
C201
X_C180P50N0402
X_C180P50N0402
C0.1U16X0402
X_C180P50N0402
X_C180P50N0402
C276
C276
C8
C8
X_C180P50N0402
X_C180P50N0402
Micro Star Restricted Secret
Micro Star Restricted Secret
Micro Star Restricted Secret
MSI
DDR Terminatior
DDR Terminatior
DDR Terminatior
MS-7295
MS-7295
MS-7295
C0.1U16X0402
C0.1U16X0402
C27
C27
C153
C153
C0.1U16X0402
C0.1U16X0402
C6
C6
X_C180P50N0402
X_C180P50N0402
Last Revision Date:
Last Revision Date:
Last Revision Date:
Wednesday, May 10, 2006
Wednesday, May 10, 2006
Wednesday, May 10, 2006
Sheet
Sheet
Sheet
1
Rev
Rev
Rev
0B
0B
0B
of
of
of
83 5
83 5
83 5
5
D D
U9F
U9F
?
?
1P2VPLL_PWR
HT_CADOUT_H[15..0]
HT_CADOUT_L[15..0]
HT_CLKOUT_H0 3
HT_CLKOUT_L0 3
HT_CLKOUT_H1 3
HT_CLKOUT_L1 3
HT_CTLOUT_H0 3
HT_CTLOUT_L0 3
VCC1_2HT
150/4/1%
150/4/1%
R124
R124
FB19 30L500m_200/B FB19 30L500m_200/B
PLACE ON BACK SIDE
HT_CADOUT_H0
HT_CADOUT_H1
HT_CADOUT_H2
HT_CADOUT_H3
HT_CADOUT_H4
HT_CADOUT_H5
HT_CADOUT_H6
HT_CADOUT_H7
HT_CADOUT_H8
HT_CADOUT_H9
HT_CADOUT_H10
HT_CADOUT_H11
HT_CADOUT_H12
HT_CADOUT_H13
HT_CADOUT_H14
HT_CADOUT_H15
HT_CADOUT_L0
HT_CADOUT_L1
HT_CADOUT_L2
HT_CADOUT_L3
HT_CADOUT_L4
HT_CADOUT_L5
HT_CADOUT_L6
HT_CADOUT_L7
HT_CADOUT_L8
HT_CADOUT_L9
HT_CADOUT_L10
HT_CADOUT_L11
HT_CADOUT_L12
HT_CADOUT_L13
HT_CADOUT_L14
HT_CADOUT_L15
HT_CTLOUT_H0
HT_CTLOUT_L0
R127 150/4/1% R127 150/4/1%
C634
C634
_C1U6.3Y50402
_C1U6.3Y50402
1P2VPLL_FILT
C632
C632
C0.1U25Y0402
C0.1U25Y0402
W24
W21
M17
W23
W20
W22
M23
M22
W19
Y23
V24
U22
R24
P24
P22
N22
Y21
V21
T21
R18
P16
N20
Y22
V23
U21
R23
P23
P21
N21
Y20
U20
R19
P17
N19
N18
T23
T22
R21
R20
Y19
N16
T13
HT_CPU_RXD0_P
HT_CPU_RXD1_P
HT_CPU_RXD2_P
HT_CPU_RXD3_P
HT_CPU_RXD4_P
HT_CPU_RXD5_P
HT_CPU_RXD6_P
HT_CPU_RXD7_P
HT_CPU_RXD8_P
HT_CPU_RXD9_P
HT_CPU_RXD10_P
HT_CPU_RXD11_P
HT_CPU_RXD12_P
HT_CPU_RXD13_P
HT_CPU_RXD14_P
HT_CPU_RXD15_P
HT_CPU_RXD0_N
HT_CPU_RXD1_N
HT_CPU_RXD2_N
HT_CPU_RXD3_N
HT_CPU_RXD4_N
HT_CPU_RXD5_N
HT_CPU_RXD6_N
HT_CPU_RXD7_N
HT_CPU_RXD8_N
HT_CPU_RXD9_N
HT_CPU_RXD10_N
HT_CPU_RXD11_N
HT_CPU_RXD12_N
HT_CPU_RXD13_N
HT_CPU_RXD14_N
HT_CPU_RXD15_N
HT_CPU_RX_CLK0_P
HT_CPU_RX_CLK0_N
HT_CPU_RX_CLK1_P
HT_CPU_RX_CLK1_N
HT_CPU_RXCTL_P
HT_CPU_RXCTL_N
HT_CPU_CAL_1P2V
HT_CPU_CAL_GND
+1.2V_PLLHTCPU
+1.2V_PLLHTMCP
?
?
HT_CADOUT_H[15..0] 3
HT_CADOUT_L[15..0] 3
C C
B B
1P2VPLL_PWR 10,11
C51
C51
SEC 1 OF 6
SEC 1 OF 6
4
HT_CPU_TXD0_P
HT_CPU_TXD1_P
HT_CPU_TXD2_P
HT_CPU_TXD3_P
HT_CPU_TXD4_P
HT_CPU_TXD5_P
HT_CPU_TXD6_P
HT_CPU_TXD7_P
HT_CPU_TXD8_P
HT_CPU_TXD9_P
HT_CPU_TXD10_P
HT_CPU_TXD11_P
HT_CPU_TXD12_P
HT_CPU_TXD13_P
HT_CPU_TXD14_P
HT_CPU_TXD15_P
HT_CPU_TXD0_N
HT_CPU_TXD1_N
HT_CPU_TXD2_N
HT_CPU_TXD3_N
HT_CPU_TXD4_N
HT_CPU_TXD5_N
HT_CPU_TXD6_N
HT_CPU_TXD7_N
HT_CPU_TXD8_N
HT_CPU_TXD9_N
HT_CPU_TXD10_N
HT_CPU_TXD11_N
HT_CPU_TXD12_N
HT_CPU_TXD13_N
HT_CPU_TXD14_N
HT_CPU_TXD15_N
HT_CPU_TX_CLK0_P
HT_CPU_TX_CLK0_N
HT_CPU_TX_CLK1_P
HT_CPU_TX_CLK1_N
HT_CPU_TXCTL_P
HT_CPU_TXCTL_N
CLKOUT_PRI_200MHZ_P
CLKOUT_PRI_200MHZ_N
CLKOUT_SEC_200MHZ_P
CLKOUT_SEC_200MHZ_N
HT_CPU_REQ*
HT_CPU_STOP*
HT_CPU_RESET*
HT_CPU_PWRGD
+2.5V_PLLHTCPU
C23
D23
E22
F23
H22
J21
K21
K23
D21
F19
F21
G20
J19
L17
L20
L18
C24
D24
E23
F24
H23
J22
K22
K24
D22
E20
E21
G19
J18
K17
K19
L19
G23
G24
G22
G21
L23
L24
B24
B23
A22
B21
F18
G18
D20
E19
L16
HT_CADIN_H0
HT_CADIN_H1
HT_CADIN_H2
HT_CADIN_H3
HT_CADIN_H4
HT_CADIN_H5
HT_CADIN_H6
HT_CADIN_H7
HT_CADIN_H8
HT_CADIN_H9
HT_CADIN_H10
HT_CADIN_H11
HT_CADIN_H12
HT_CADIN_H13
HT_CADIN_H14
HT_CADIN_H15
HT_CADIN_L0
HT_CADIN_L1
HT_CADIN_L2
HT_CADIN_L3
HT_CADIN_L4
HT_CADIN_L5
HT_CADIN_L6
HT_CADIN_L7
HT_CADIN_L8
HT_CADIN_L9
HT_CADIN_L10
HT_CADIN_L11
HT_CADIN_L12
HT_CADIN_L13
HT_CADIN_L14
HT_CADIN_L15
HT_CLKIN_H0
HT_CLKIN_L0
HT_CLKIN_H1
HT_CLKIN_L1
HT_CTLIN_H0
HT_CTLIN_L0
2P5V_PLL
HT_CADIN_H[15..0]
HT_CADIN_L[15..0]
HT_CLKIN_H0 3
HT_CLKIN_L0 3
HT_CLKIN_H1 3
HT_CLKIN_L1 3
HT_CTLIN_H0 3
HT_CTLIN_L0 3
CPU_CLK 3
CPU_CLK# 3
HT_STOP#
LDT_RST
CPU_PWRGD
3
HT_CADIN_H[15..0] 3
HT_CADIN_L[15..0] 3
HT_STOP# 3
LDT_RST 3
CPU_PWRGD 3,22,23
2
U9A
U9A
?
?
HTMCP_UP[7..0] 12
HTMCP_UP#[7..0] 12
HTMCP_UP[7..0]
HTMCP_UP#[7..0]
HTMCP_UPCLK0 12
HTMCP_UPCLK0# 12
HTMCP_UPCNTL 12
HTMCP_UPCNTL# 12
HTMCP_REQ# 12
HTMCP_STOP# 12
HTMCP_RST# 12
HTMCP_PWRGD 12
MCPOUT_25MHZ 12
MCPOUT_200MHZ 12
MCPOUT_200MHZ# 12
HTMCP_UP0
HTMCP_UP1
HTMCP_UP2
HTMCP_UP3
HTMCP_UP4
HTMCP_UP5
HTMCP_UP6
HTMCP_UP7
HTMCP_UP#0
HTMCP_UP#1
HTMCP_UP#2
HTMCP_UP#3
HTMCP_UP#4
HTMCP_UP#5
HTMCP_UP#6
HTMCP_UP#7
HTMCP_UPCLK0
HTMCP_UPCLK0#
HTMCP_UPCNTL
HTMCP_UPCNTL#
HTMCP_REQ#
HTMCP_STOP#
HTMCP_RST#
HTMCP_PWRGD
MCPOUT_25MHZ
MCPOUT_200MHZ
MCPOUT_200MHZ#
AD6
AC7
AA8
AA9
AD10
AD11
AC12
AC13
AA6
AA11
W12
AC6
AB7
AB8
AB9
AC10
AC11
AB12
AB13
AA7
W10
W11
AD9
AC9
AD14
AC14
AB5
AA5
AC5
AD5
AC4
W7
Y8
V9
Y10
V11
Y6
Y7
W9
Y12
V13
U10
T10
Y5
W5
HT_MCP_RXD0_P
HT_MCP_RXD1_P
HT_MCP_RXD2_P
HT_MCP_RXD3_P
HT_MCP_RXD4_P
HT_MCP_RXD5_P
HT_MCP_RXD6_P
HT_MCP_RXD7_P
HT_MCP_RXD8_P
HT_MCP_RXD9_P
HT_MCP_RXD10_P
HT_MCP_RXD11_P
HT_MCP_RXD12_P
HT_MCP_RXD13_P
HT_MCP_RXD14_P
HT_MCP_RXD15_P
HT_MCP_RXD0_N
HT_MCP_RXD1_N
HT_MCP_RXD2_N
HT_MCP_RXD3_N
HT_MCP_RXD4_N
HT_MCP_RXD5_N
HT_MCP_RXD6_N
HT_MCP_RXD7_N
HT_MCP_RXD8_N
HT_MCP_RXD9_N
HT_MCP_RXD10_N
HT_MCP_RXD11_N
HT_MCP_RXD12_N
HT_MCP_RXD13_N
HT_MCP_RXD14_N
HT_MCP_RXD15_N
HT_MCP_RX_CLK0_P
HT_MCP_RX_CLK0_N
HT_MCP_RX_CLK1_P
HT_MCP_RX_CLK1_N
HT_MCP_RXCTL_P
HT_MCP_RXCTL_N
HT_MCP_REQ*
HT_MCP_STOP*
HT_MCP_RESET*
HT_MCP_PWRGD
CLKIN_25MHZ
CLKIN_200MHZ_P
CLKIN_200MHZ_N
?
?
C51
C51
SEC 2 OF 6
SEC 2 OF 6
SCLKIN_MCLKOUT_200MHZ_P
SCLKIN_MCLKOUT_200MHZ_N
HT_MCP_TXD0_P
HT_MCP_TXD1_P
HT_MCP_TXD2_P
HT_MCP_TXD3_P
HT_MCP_TXD4_P
HT_MCP_TXD5_P
HT_MCP_TXD6_P
HT_MCP_TXD7_P
HT_MCP_TXD8_P
HT_MCP_TXD9_P
HT_MCP_TXD10_P
HT_MCP_TXD11_P
HT_MCP_TXD12_P
HT_MCP_TXD13_P
HT_MCP_TXD14_P
HT_MCP_TXD15_P
HT_MCP_TXD0_N
HT_MCP_TXD1_N
HT_MCP_TXD2_N
HT_MCP_TXD3_N
HT_MCP_TXD4_N
HT_MCP_TXD5_N
HT_MCP_TXD6_N
HT_MCP_TXD7_N
HT_MCP_TXD8_N
HT_MCP_TXD9_N
HT_MCP_TXD10_N
HT_MCP_TXD11_N
HT_MCP_TXD12_N
HT_MCP_TXD13_N
HT_MCP_TXD14_N
HT_MCP_TXD15_N
HT_MCP_TX_CLK0_P
HT_MCP_TX_CLK0_N
HT_MCP_TX_CLK1_P
HT_MCP_TX_CLK1_N
HT_MCP_TXCTL_P
HT_MCP_TXCTL_N
CLKOUT_CTERM
HT_MCP_CAL_1P2V
HT_MCP_CAL_GND
AC24
AD23
AC22
AC20
AB18
AA17
AB16
AC16
AB21
AB20
AB19
W18
W15
AA15
Y14
W13
AC23
AD22
AC21
AD20
AC18
AB17
AB15
AD16
AB22
AA20
AA19
V17
V15
Y15
W14
Y13
AC19
AD19
Y17
W17
AC15
AD15
B22
A20
B20
AB23
AB24
HTMCP_DWN0
HTMCP_DWN1
HTMCP_DWN2
HTMCP_DWN3
HTMCP_DWN4
HTMCP_DWN5
HTMCP_DWN6
HTMCP_DWN7
HTMCP_DWN#0
HTMCP_DWN#1
HTMCP_DWN#2
HTMCP_DWN#3
HTMCP_DWN#4
HTMCP_DWN#5
HTMCP_DWN#6
HTMCP_DWN#7
1
HTMCP_DWN[7..0]
HTMCP_DWN#[7..0]
HTMCP_DWNCLK0
HTMCP_DWNCLK0#
HTMCP_DWNCNTL
HTMCP_DWNCNTL#
R134 2.37K/4/1% R134 2.37K/4/1%
2.37K Ohm
R125 150/4/1% R125 150/4/1%
R126 150/4/1% R126 150/4/1%
VCC1_2
HTMCP_DWN[7..0] 12
HTMCP_DWN#[7..0] 12
HTMCP_DWNCLK0 12
HTMCP_DWNCLK0# 12
HTMCP_DWNCNTL 12
HTMCP_DWNCNTL# 12
VCC2_5
C629
C629
C227
C227
C4.7U10Y0805
A A
5
C4.7U10Y0805
C0.1U25Y0402
C0.1U25Y0402
FB20 30L500m_200/B FB20 30L500m_200/B
C631
C631
_C1U6.3Y50402
_C1U6.3Y50402
PLACE ON BACK SIDE
4
C633
C633
C0.1U25Y0402
C0.1U25Y0402
2P5V_PLL 10
C435
C435
X_C4.7U6.3X5-1
X_C4.7U6.3X5-1
Micro Star Restricted Secret
Micro Star Restricted Secret
Micro Star Restricted Secret
Title
Title
Title
Document Number
Document Number
Document Number
MICRO-STAR INT'L CO.,LTD.
MICRO-STAR INT'L CO.,LTD.
MICRO-STAR INT'L CO.,LTD.
No. 69, Li-De St, Jung-He City,
No. 69, Li-De St, Jung-He City,
No. 69, Li-De St, Jung-He City,
Taipei Hsien, Taiwan
Taipei Hsien, Taiwan
Taipei Hsien, Taiwan
http://www.msi.com.tw
http://www.msi.com.tw
3
2
http://www.msi.com.tw
C51PV-1/ HT CPU & MCP
C51PV-1/ HT CPU & MCP
C51PV-1/ HT CPU & MCP
MSI
MS-7295
MS-7295
MS-7295
1
Last Revision Date:
Last Revision Date:
Last Revision Date:
Wednesday, May 10, 2006
Wednesday, May 10, 2006
Wednesday, May 10, 2006
Sheet
Sheet
Sheet
93 5
93 5
93 5
Rev
Rev
Rev
0B
0B
0B
of
of
of
5
U9B
U9B
?
?
J8
PED_RX0 17
PED_RX1 17
PED_RX2 17
PED_RX3 17
PED_RX4 17
PED_RX5 17
PED_RX6 17
PED_RX7 17
PED_RX8 17
PE1_RX1 17
PE1_RX1* 17
VCC3
VCC3
VCC3
PED_RX9 17
PED_RX10 17
PED_RX11 17
PED_RX12 17
PED_RX13 17
PED_RX14 17
PED_RX15 17
PED_RX0* 17
PED_RX1* 17
PED_RX2* 17
PED_RX3* 17
PED_RX4* 17
PED_RX5* 17
PED_RX6* 17
PED_RX7* 17
PED_RX8* 17
PED_RX9* 17
PED_RX10* 17
PED_RX11* 17
PED_RX12* 17
PED_RX13* 17
PED_RX14* 17
PED_RX15* 17
R200 10K/4 R200 10K/4
PE1_PRSNT#
R185 10K/4 R185 10K/4
R199 10K/4 R199 10K/4
1P2VPLL_PWR
FB21 30L500m_200/B FB21 30L500m_200/B
PE1_RX1
PE1_RX1*
C637
C637
C0.1U25Y0402
C0.1U25Y0402
D D
PC0_PRSNT# 17
MODIFY FOR 0B
C C
PE1_PRSNT# 17
1P2VPLL_PWR 9,11
J6
K9
L6
L7
M9
N8
N6
R6
P3
R8
U6
T8
U7
V4
Y3
J7
J5
J9
L5
L8
M8
N7
N5
R5
P4
R7
U5
T9
U8
V3
AA3
D1
G6
H6
E2
J4
K3
E3
D3
E4
AC3
AB3
T11
PE0_RX0_P
PE0_RX1_P
PE0_RX2_P
PE0_RX3_P
PE0_RX4_P
PE0_RX5_P
PE0_RX6_P
PE0_RX7_P
PE0_RX8_P
PE0_RX9_P
PE0_RX10_P
PE0_RX11_P
PE0_RX12_P
PE0_RX13_P
PE0_RX14_P
PE0_RX15_P
PE0_RX0_N
PE0_RX1_N
PE0_RX2_N
PE0_RX3_N
PE0_RX4_N
PE0_RX5_N
PE0_RX6_N
PE0_RX7_N
PE0_RX8_N
PE0_RX9_N
PE0_RX10_N
PE0_RX11_N
PE0_RX12_N
PE0_RX13_N
PE0_RX14_N
PE0_RX15_N
PE0_PRSNT*
PE1_RX_P
PE1_RX_N
PE1_PRSNT*
PE2_RX_P
PE2_RX_N
PE2_PRSNT*
PE1_CLKREQ*/CLK
PE2_CLKREQ*/DATA
PE_REFCLKIN_P
PE_REFCLKIN_N
+1.2V_PLLPE
?
?
SEC 3 OF 6
SEC 3 OF 6
C51
C51
PE0_TX0_P
PE0_TX1_P
PE0_TX2_P
PE0_TX3_P
PE0_TX4_P
PE0_TX5_P
PE0_TX6_P
PE0_TX7_P
PE0_TX8_P
PE0_TX9_P
PE0_TX10_P
PE0_TX11_P
PE0_TX12_P
PE0_TX13_P
PE0_TX14_P
PE0_TX15_P
PE0_TX0_N
PE0_TX1_N
PE0_TX2_N
PE0_TX3_N
PE0_TX4_N
PE0_TX5_N
PE0_TX6_N
PE0_TX7_N
PE0_TX8_N
PE0_TX9_N
PE0_TX10_N
PE0_TX11_N
PE0_TX12_N
PE0_TX13_N
PE0_TX14_N
PE0_TX15_N
PE0_REFCLK_P
PE0_REFCLK_N
PE1_TX_P
PE1_TX_N
PE1_REFCLK_P
PE1_REFCLK_N
PE2_TX_P
PE2_TX_N
PE2_REFCLK_P
PE2_REFCLK_N
PE_TSTCLK_P
PE_TSTCLK_N
PE_CTERM_GND
PE_RST*
L1
L3
L4
M4
P1
R1
R3
R4
U4
V1
W1
W3
AA1
AB1
AC1
AD2
L2
M2
M3
N3
P2
R2
T2
T3
U3
V2
W2
Y2
AA2
AB2
AC2
AD3
K1
K2
G4
G5
G2
G3
H4
J3
H2
H3
F1
F2
G1
D2
4
PED_TX0 17
PED_TX1 17
PED_TX2 17
PED_TX3 17
PED_TX4 17
PED_TX5 17
PED_TX6 17
PED_TX7 17
PED_TX8 17
PED_TX9 17
PED_TX10 17
PED_TX11 17
PED_TX12 17
PED_TX13 17
PED_TX14 17
PED_TX15 17
PED_TX0* 17
PED_TX1* 17
PED_TX2* 17
PED_TX3* 17
PED_TX4* 17
PED_TX5* 17
PED_TX6* 17
PED_TX7* 17
PED_TX8* 17
PED_TX9* 17
PED_TX10* 17
PED_TX11* 17
PED_TX12* 17
PED_TX13* 17
PED_TX14* 17
PED_TX15* 17
R196 X_100R R196 X_100R
PE_RST*
PE_COMP
PE0_CLK
PE0_CLK*
PE1_TX1
PE1_TX1*
PE1_CLK
PE1_CLK*
PE_RST* 17
R203 2.37K/4/1% R203 2.37K/4/1%
PE0_CLK 17
PE0_CLK* 17
PE1_TX1 17
PE1_TX1* 17
PE1_CLK 17
PE1_CLK* 17
R
R 26
G
G 26
B
B 26
150/4/1%
150/4/1%
PLACE NEAR C51
MODIFY FOR 0B
R165
R165
150/4/1%
150/4/1%
R160
R160
150/4/1%
150/4/1%
3
R168
R168
1P2VPLL_PWR 9,11
C318
C318
C321
C321
X_C10P50N0402
X_C10P50N0402
X_C10P50N0402
X_C10P50N0402
C322
C322
X_C10P50N0402
X_C10P50N0402
1P2VPLL_PWR
C0.1U25Y0402
C0.1U25Y0402
C304
C304
2P5V_PLL 9
HSYNC#
HSYNC# 26
VSYNC#
VSYNC# 26
R172 124/4/1% R172 124/4/1%
C267
C267
C0.01U25X0402
C0.01U25X0402
3P3V_DAC
2P5V_PLL
C307
C307
C0.1U25Y0402
C0.1U25Y0402
2
U9C
U9C
?
?
A5
DAC_RED
B6
DAC_GREEN
A6
DAC_BLUE
B7
DAC_HSYNC
C7
DAC_VSYNC
D8
DAC_RSET
D9
DAC_VREF
C8
DAC_IDUMP
A9
+3.3V_DAC
H13
+2.5V_PLLGPU
C9
XTAL_IN
B9
XTAL_OUT
R9
+1.2V_PLLGPU
P9
+1.2V_PLLCORE
H16
+1.2V_PLLIFP
?
?
C51
C51
SEC 4 OF 6
SEC 4 OF 6
IFPA_TXC_P
IFPA_TXC_N
IFPA_TXD0_P
IFPA_TXD1_P
IFPA_TXD2_P
IFPA_TXD3_P
IFPA_TXD0_N
IFPA_TXD1_N
IFPA_TXD2_N
IFPA_TXD3_N
IFPB_TXC_P
IFPB_TXC_N
IFPB_TXD4_P
IFPB_TXD5_P
IFPB_TXD6_P
IFPB_TXD7_P
IFPB_TXD4_N
IFPB_TXD5_N
IFPB_TXD6_N
IFPB_TXD7_N
IFPAB_PROBE
IFPAB_RSET
+2.5V_PLLIFP
+2.5V_PLLCORE
PKG_TEST
TEST_MODE_EN
JTAG_TCK
JTAG_TDI
JTAG_TDO
JTAG_TMS
JTAG_TRST*
TXC+
C14
TXC-
B13
TX0+
A15
TX1+
D15
TX2+
A14
F14
TX0-
B15
TX1-
C15
TX2-
B14
E14
A10
B10
B11
E13
D13
B12
A11
F13
The cap added for for IFPAB_VPROBE is for test purpose.
C13
C12
The pin shuld be left as NC.
IFPAB_PROBE
A16
IFPAB_RSET
F15
2P5V_PLL
E16
2P5V_PLL
H12
D17
C17
C18
B19
C19
B18
A19
JTAG_TCK
JTAG_TDI
JTAG_TMS
JTAG_TRST*
R146 1K/4 R146 1K/4
1
TXC+ 27
TXC- 27
TX0+ 27
TX1+ 27
TX2+ 27
TX0- 27
TX1- 27
TX2- 27
X_C0.1U25Y0402 C241 X_C0.1U25Y0402 C241
R152 1KR/4/1% R152 1KR/4/1%
2P5V_PLL 9
R139 X_10KR0402 R139 X_10KR0402
R138 X_10KR0402 R138 X_10KR0402
R145 X_10KR0402 R145 X_10KR0402
R137 X_10KR/4 R137 X_10KR/4
VCC2_5
PLACE ON BACK SIDE
B B
VCC3
PMOS
Q45
Q45
FDN338P_0
FDN338P_0
Q44
Q44
ATX_PWR_OK 13,22,25
N-2N7002_SOT23
N-2N7002_SOT23
R421
R421
10K/4
10K/4
S
S
G
G
G
D
D
D S
R417
R417
X_0R0805
X_0R0805
For C51G No DVI
3P3V_IFPA 11
TMDS Backdrive Prevention Circuit
A A
5
4
3
VCC3
FB7 40L3_25_0805 FB7 40L3_25_0805
TXC+
TXCTX0+
TX0TX1+
TX1TX2+
TX2-
4A ?
2
C252
C252
C246
C246
C0.1U25Y0402
C0.1U25Y0402
C4.7U10Y0805
C4.7U10Y0805
3P3V_DAC
R414 49.9/4/1% R414 49.9/4/1%
R415 49.9/4/1% R415 49.9/4/1%
R416 49.9/4/1% R416 49.9/4/1%
R418 49.9/4/1% R418 49.9/4/1%
R419 49.9/4/1% R419 49.9/4/1%
R420 49.9/4/1% R420 49.9/4/1%
R422 49.9/4/1% R422 49.9/4/1%
R423 49.9/4/1% R423 49.9/4/1%
3P3V_IFPA
Micro Star Restricted Secret
Micro Star Restricted Secret
Micro Star Restricted Secret
Title
Title
Title
MSI
C51PV-2 / PCI-E & DAC
C51PV-2 / PCI-E & DAC
Document Number
Document Number
Document Number
MICRO-STAR INT'L CO.,LTD.
MICRO-STAR INT'L CO.,LTD.
MICRO-STAR INT'L CO.,LTD.
No. 69, Li-De St, Jung-He City,
No. 69, Li-De St, Jung-He City,
No. 69, Li-De St, Jung-He City,
Taipei Hsien, Taiwan
Taipei Hsien, Taiwan
Taipei Hsien, Taiwan
http://www.msi.com.tw
http://www.msi.com.tw
http://www.msi.com.tw
C51PV-2 / PCI-E & DAC
MS-7295
MS-7295
MS-7295
1
Last Revision Date:
Last Revision Date:
Last Revision Date:
Wednesday, May 10, 2006
Wednesday, May 10, 2006
Wednesday, May 10, 2006
Sheet
Sheet
Sheet
10 35
10 35
10 35
Rev
Rev
Rev
0B
0B
0B
of
of
of