1
MS-7290 Block Diagram
Internal
Connector
VRM 10.1
Intersil 6316
4-Phase PWM
Intel LGA775 Processor
MS7
FSB
2 DDR II
CLOCK
GENERATOR
ICS954101
DIMM
SIDE and UNDER CHASSIS I/O
Analog
LVDS
Connector
Chrotel
CH7308A SDVO
TO LVDS
SDVO BUS
Lakeport
945GZ
DDRII
Modules
Video
Out
DMI
PCI
MINI PCI
UltraDMA 33 /66/100
IDE Primary
IDE
A A
Connector
Marvell
88SA8040 vA5
SERIAL ATA1 BUS
ICH7
LPC Bus
AK2001 LED
PCI
PCI-E
HD AUDIO
Card Controller
Ricoh 5C486 TYPE II x 2
LAN
Intel Tekoa
82573L
Realtek
ALC262
TI TPA0202
Card BUS
Gigabit LAN
Connector
Line-In
MIC-In
Line-Out
Floopy
option
Panel
Inverter
Connector
Front
Panel
option
Brightness Control
TPM 1.2
FWH
INTERNAL
SPEAKER
LPC SIO
SMSC SCH5017
USB
1
Front
Panel
Line-Out Behavior Define
Internal
Speaker
Off
On
Mode 1
Mode 2
Line-Out
Plug-In
Plug-Out
USB2.0
USB Port0~3
USB Port4~5
Serial
Parallel
PS/2
Title
BLOCK DIAGRAM
Size Document Number Rev
Custom
Date: Sheet
MICRO-START INT'L CO.,LTD.
MS-7290 1.0
23 2 Monday, June 12, 2006
of
8
7
6
5
4
3
2
1
R68 X-0603-R
R750 X-0603-R
TP4
AM5
AM7
AJ3
AK3
RSVD
ITP_CLK1
ITP_CLK0
D8#
D7#A7D6#B7D5#B6D4#A5D3#C6D2#A4D1#C5D0#
A10
H_D#7
H_D#8
H_D#4
H_D#5
H_D#6
H_D#3
R751 X-0603-R
VID5
VID4
AL4
AK4
VID6#
VID5#
VID4#
VID_SELECT
GTLREF_SEL
CS_GTLREF
LINT0/INTR
H_D#1
H_D#2
CPU SIGNAL BLOCK
D D
H_DBI#[0..3] {6}
H_IERR# {4}
H_FERR# {14}
H_STPCLK# {14}
H_DBSY# {6}
H_DRDY# {6}
H_TRDY# {6}
C C
B B
VTT_OUT_RIGHT
A A
H_BNR# {6}
H_HITM# {6}
H_DEFER# {6}
CPU_TMPA {21}
VTIN_GND {21}
TRMTRIP# {14}
H_PROCHOT# {4,25}
H_IGNNE# {14}
ICH_H_SMI# {14}
R90 62-0603
R54 X-0603-R
H_FSBSEL0 {4,8,26}
H_FSBSEL1 {4,8,26}
H_FSBSEL2 {4,8,26}
H_PWRGD {4,14}
H_CPURST# {4,6}
H_D#[0..63] {6}
H_ADS# {6}
H_LOCK# {6}
H_HIT# {6}
H_DBI#0
H_DBI#1
H_DBI#2
H_DBI#3
H_INIT# {14}
H_BPRI# {6}
H_TDI
H_TDO
H_TMS
H_TRST#
H_TCK
H_A20M# {14}
H_TESTHI13 VTT_OUT_LEFT
TP22
H_D#63
H_D#62
H_D#61
H_D#60
H_D#59
H_D#58
H_D#57
H_D#56
H_D#55
H_D#54
G11
D19
C20
AB2
AB3
AD3
AD1
AF1
AC1
AG1
AE1
AL1
AK1
AE8
AL2
AH2
AE6
G10
D16
A20
AA2
G29
H30
G30
G23
B22
A22
A19
B19
B21
C21
B18
A17
B16
C18
A8
F2
R3
M3
P3
H4
B2
C1
E3
D2
C3
C2
D4
E4
G8
G7
M2
N2
P2
K3
L2
N5
C9
Y1
V2
N1
H_A#[3..31] {6}
U3A
DBI0#
DBI1#
DBI2#
DBI3#
EDRDY#
IERR#
MCERR#
FERR#/PBE#
STPCLK#
BINIT#
INIT#
RSP#
DBSY#
DRDY#
TRDY#
ADS#
LOCK#
BNR#
HIT#
HITM#
BPRI#
DEFER#
TDI
TDO
TMS
TRST#
TCK
THERMDA
THERMDC
THERMTRIP#
GND/SKTOCC#
PROCHOT#
IGNNE#
SMI#
A20M#
TESTI_13
RSVD
RESERVED0
RESERVED1
RESERVED2
RESERVED3
RESERVED4
RESERVED5
BOOTSELECT
LL_ID0
LL_ID1
BSEL0
BSEL1
BSEL2
PWRGOOD
RESET#
D63#
D62#
D61#
D60#
D59#
D58#
D57#
D56#
D55#
D54#
B15
H_D#53
D53#
D52#
C14
H_D#52
C15
H_D#51
D51#
H_D#50
H_A#3
L5
H_D#16
D11
H_D#15
AC2
C12
H_D#14
DBR#
D14#
B12
H_D#13
D13#
VCC_SENSE
AN4
AN3
AN6
AN5
VSS_SENSE
VCC_SENSE
VSS_MB_REGULATION
VCC_MB_REGULATION
D12#D8D11#
D10#
D9#
B10
A11
C11
H_D#12
H_D#9
H_D#11
H_D#10
H_A#26
H_A#31
H_A#30
H_A#29
H_A#28
H_A#27
AJ6
AJ5
AH5
AH4
AG5
AG4
AG6
AF4
AF5
AB4
A35#
A34#
A33#
A32#
A31#
A30#
A29#
A28#
A27#
D50#
D49#
D48#
D47#
D46#
D45#
D44#
D43#
D42#
D41#
D40#
F21
G22
H_D#47
D22
H_D#46
E22
H_D#45
G21
H_D#44
H_D#43
E21
H_D#42
F20
H_D#41
E19
H_D#40
E18
H_D#39
A14
D17
D20
H_D#49
H_D#48
H_A#25
A26#
D39#
H_D#38
AC5
F18
A25#
D38#
H_A#24
AB5
F17
H_D#37
H_A#23
A24#
D37#
H_D#36
H_A#19
H_A#22
H_A#21
AA5
AD6
AA4
A23#
A22#
D36#
D35#
E16
G17
G18
H_D#34
H_D#35
H_A#20
A21#
A20#Y4A19#Y6A18#W6A17#
D34#
D33#
D32#
E15
G16
H_D#33
H_D#32
H_A#17
H_A#18
H_A#16
H_A#15
AB6
A16#W5A15#V4A14#V5A13#U4A12#U5A11#T4A10#
D31#
D30#
D29#
F15
F14
G15
G14
H_D#30
H_D#31
H_D#29
H_D#28
H_A#14
D28#
G13
H_D#27
H_A#13
D27#
E13
H_D#26
H_A#12
D26#
H_D#25
H_A#11
D25#
D24#
F12
D13
H_D#24
H_A#7
H_A#9
U6
A9#T5A8#R4A7#M4A6#L4A5#M5A4#P6A3#
D23#
D22#
D21#
D20#D7D19#E9D18#F9D17#F8D16#G9D15#
F11
E10
D10
H_D#19
H_D#22
H_D#23
H_D#21
H_D#20
H_D#18
H_D#17
H_A#6
H_A#8
H_A#10
H_A#5
H_A#4
VSS_SENSE
VID2
VID0
VID1
VID3
AL6
AM3
AL5
AM2
VID3#
VID2#
VID1#
VID0#
GTLREF0
GTLREF1
BPM5#
BPM4#
BPM3#
BPM2#
BPM1#
BPM0#
PCREQ#
REQ4#
REQ3#
REQ2#
REQ1#
REQ0#
TESTHI12
TESTHI11
TESTHI10
TESTHI9
TESTHI8
TESTHI7
TESTHI6
TESTHI5
TESTHI4
TESTHI3
TESTHI2
TESTHI1
TESTHI0
FORCEPH
RSVD
BCLK1#
BCLK0#
RS2#
RS1#
RS0#
AP1#
AP0#
BR0#
COMP5
COMP4
COMP3
COMP2
COMP1
COMP0
DP3#
DP2#
DP1#
DP0#
ADSTB1#
ADSTB0#
DSTBP3#
DSTBP2#
DSTBP1#
DSTBP0#
DSTBN3#
DSTBN2#
DSTBN1#
DSTBN0#
LINT1/NMI
ZIF-SOCK775-15u
B4
H_D#0
FP_RST# {15,23}
VID[0..5] {25}
R6 62-0603
AN7
H1
H2
TP_GTLREF_SEL
H29
MCH_GTLREF_CPU
E24
H_BPM#5
AG3
H_BPM#4
AF2
H_BPM#3
AG2
H_BPM#2
AD2
H_BPM#1
AJ1
H_BPM#0
AJ2
G5
H_REQ#4
J6
H_REQ#3
K6
H_REQ#2
M6
H_REQ#1
J5
H_REQ#0
K4
H_TESTHI12
W2
H_TESTHI11
P1
H_TESTHI10
H5
H_TESTHI9
G4
H_TESTHI8
G3
F24
G24
G26
G27
G25
H_TESTHI2_7
F25
H_TESTHI1
W3
H_TESTHI0
F26
RSVD_AK6
AK6
RSVD_G6
G6
G28
F28
H_RS#2
A3
H_RS#1
F5
H_RS#0
B3
U3
U2
F3
T2
J2
R1
G2
T1
A13
J17
H16
H15
J16
AD5
R6
C17
G19
E12
B9
A16
G20
G12
C8
L1
K1
H_COMP5
H_COMP4
H_COMP3
H_COMP2
H_COMP1
H_COMP0
TP6
TP5
CPU_GTLREF0
CPU_GTLREF1
RN8 62-8P4R
1 2
3 4
5 6
7 8
R75 62-0603
R129 62-0603
R66 62-0603
R125 62-0603
R11 X-0603-R
R77 X-0603-R
CK_H_CPU# {26}
CK_H_CPU {26}
H_RS#[0..2] {6}
R70 60.4RST
R71 60.4RST
R76 60.4RST
R95 60.4RST
R72 60.4RST
R131 60.4RST
TP7
TP11
TP10
TP8
H_ADSTB#1 {6}
H_ADSTB#0 {6}
H_DSTBP#3 {6}
H_DSTBP#2 {6}
H_DSTBP#1 {6}
H_DSTBP#0 {6}
H_DSTBN#3 {6}
H_DSTBN#2 {6}
H_DSTBN#1 {6}
H_DSTBN#0 {6}
H_NMI {14}
H_INTR {14}
VCC_SENSE
VSS_SENSE
C1060
220p-0603
H_REQ#[0..4] {6}
R19 0-0603
R15 0-0603
CPU_GTLREF0 {4}
CPU_GTLREF1 {4}
TP9
MCH_GTLREF_CPU {6}
VTT_OUT_LEFT
V_FSB_VTT
VTT_OUT_RIGHT {4,5}
C42
X-0603-C
VCC_VRM_SENSE
VSS_VRM_SENSE
VTT_OUT_LEFT {4}
H_BR#0 {4,6}
VTT_OUT_RIGHT
C25 0.1u-0603
C11 0.1u-0603
VCC_VRM_SENSE {25}
VSS_VRM_SENSE {25}
BSEL
1
0 2
FSB FREQUENCY
TABLE
266 MHZ (1066) 0 0 0
0
0 1 200 MHZ (800)
1
0 0 133 MHZ (533)
RN4
680-8P4R
VID3
1
VID1
VID4
VID2
VID0
VID5
2
3
4
5
6
7
8
R42 680-0603
R22 680-0603
RN3 62-8P4R
1 2
3 4
5 6
7 8
R1194 62-0603
R1195 62-0603
R1196 49.9RST
R1197 49.9RST
R34 X-0603-R
R47 49.9RST
R64 49.9RST
PLACE BPM TERM I N A T I O N NEAR CPU
VCC_SENSE
C925
X_10u-0805
VSS_SENSE
VTT_OUT_RIGHT
H_BPM#3
H_BPM#5
H_BPM#0
H_BPM#1
H_BPM#2
H_BPM#4
H_TMS
H_TDI
H_TDO
H_TRST#
H_TCK
Title
LGA775 Signals
Size Document N umber Re v
Custom
8
7
6
5
4
3
Date: Sheet
2
MICRO-START INT'L CO.,LTD.
MS-7290 1.0
of
33 2 Monday, June 12, 2006
1
8
VCCP
AG21
AG19
AG18
AG15
AG14
AG12
AG11
AF9
AF8
AF22
AF21
AF19
AF18
AF15
AF14
AF12
AF11
AE9
AE23
AE22
AE21
AE19
AE18
AE15
AE14
AE12
AE11
AD8
AD30
AD29
AD28
AD27
AD26
AD25
AD24
AD23
AC8
AC30
AC29
AC28
AC27
AC26
AC25
AC24
AC23
AB8
AA8
U3B
VCCP
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCCW8VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
Y8
Y30
Y23
Y24
Y25
Y26
Y27
Y28
Y29
W30
VCCP
D D
C C
AG22
VCC
VCC
W29
AG25
VCC
VCC
W28
AG26
VCC
VCC
W27
AG27
VCC
VCC
W26
AG28
VCC
VCC
W25
AG29
VCC
VCC
W24
7
AG30
VCC
W23
AG8
VCC
AG9
VCC
VCCU8VCCV8VCC
AH11
VCC
VCC
U30
AH12
VCC
VCC
U29
AH14
VCC
VCC
U28
AH15
VCC
VCC
U27
AH18
VCC
VCC
U26
AH19
VCC
VCC
U25
AH21
VCC
VCC
U24
AH22
VCC
U23
AH25
VCC
VCCT8VCC
AH26
VCC
VCC
T30
AH27
VCC
VCC
T29
AH28
VCC
VCC
T28
AH29
VCC
VCC
T27
AH30
VCC
VCC
T26
AH8
T25
VCC
VCC
AH9
T24
VCC
VCC
AJ11
T23
VCC
AJ12
VCC
AJ14
VCC
AJ15
6
VCC
VCCN8VCCP8VCCR8VCC
AJ18
N30
VCC
VCC
AJ19
N29
VCC
VCC
AJ21
N28
VCC
VCC
AJ22
N27
VCC
VCC
AJ25
N26
VCC
VCC
AJ26
N25
VCC
VCC
5
AJ8
AJ9
AK11
AK12
AK14
AK15
AK18
AK19
AK21
AK22
AK25
AK26
AK8
AK9
AL11
AL12
AL14
AL15
AL18
AL19
AL21
AL22
AL25
AL26
AL29
AL30
AL8
AL9
AM11
AM12
AM14
AM15
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCCJ8VCCJ9VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCCK8VCCL8VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCCM8VCC
VCC
J22
J23
J24
J25
J26
J27
J28
J29
J30
K23
K24
K25
K26
K27
K28
K29
N23
N24
M27
M28
M29
M30
K30
M23
M24
M25
M26
AM18
VCC
VCC
J21
AM19
VCC
VCC
J20
AM21
VCC
VCC
J19
AM22
VCC
VCC
J18
AM25
VCC
VCC
J15
AM26
VCC
VCC
J14
4
AM29
VCC
VCC
J13
AM30
VCC
VCC
J12
AM8
J11
VCC
VCC
AM9
VCC
VCC
J10
AN11
VCC
VCC
AN9
AN12
VCC
VCC
AN8
AN14
AN15
AN18
AN19
VCC
VCC
VCC
VCC
VTT_OUT_RIGHT
VTT_OUT_LEFT
VCC
VCC
VCC
VCC
AN25
AN26
AN29
AN30
AN21
AN22
VCC
VCC
VCCA
VSSA
VCCPLL
VCC-IOPLL
VTTPWRGD
VTT_SEL
RSVD
HS11HS22HS33HS4
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
4
3
H_VCCA
A23
H_VSSA
B23
D23
H_VCCABB
C23
A25
A26
A27
A28
A29
A30
B25
B26
B27
B28
B29
B30
C25
C26
C27
C28
C29
C30
D25
D26
D27
D28
D29
D30
VTT_PWG
AM6
VTT_OUT_RIGHT
AA1
VTT_OUT_LEFT
J1
F27
F29
ZIF-SOCK775-15u
V_FSB_VTT
TP23
C1062
0.1u-0603
2
C1063
0.1u-0603
C1064
0.1u-0603
1
V_FSB_VTT
C78 10u-0805
C128 10u-0805
C87 10u-0805
C1061 0.1u-0603
CAPS FOR FSB GENERIC
VTT_OUT_LEFT
GTLREF VOLTAGE SHOULD BE
0.63*VTT = 0.756V
VTT_OUT_LEFT
B B
R89 124RST
R88
210RST
R78 124RST
R86
210RST
R91 10-0603
C44
1u-0603
R74 10-0603
C43
1u-0603
C45
220p-0603
C39
220p-0603
CPU_GTLREF0 {3}
V_FSB_VTT
L4 10uH-0805-125mA
CPU_GTLREF1 {3}
PLACE AT CPU END OF ROUTE
H_IERR#
7
H_PROCHOT#
H_CPURST#
H_PWRGD
H_BR#0
H_PROCHOT# {3,25}
H_CPURST# {3,6}
H_PWRGD {3,14}
H_BR#0 {3,6}
H_IERR# {3}
FSBSEL RESISTOR CAN BE REMOVED IF ONLY TEJAS
AND CEDAR MILL ARE SUPPORTED
V_FSB_VTT
RN24
1
3
5
7
470-8P4R
6
5
VTT_OUT_RIGHT {3,5}
VTT_OUT_LEFT {3}
A A
VTT_OUT_RIGHT
VTT_OUT_LEFT
V_FSB_VTT
8
R23 130RST
R130 62-0603
R87 X_100-0603
R69 62-0603
R61 62-0603
PLACE COMPONENTS AS CLOSE AS POSSIBLE TO PROCESSOR SOCKET
TRACE WIDTH TO CAPS MUST BE SMALLER THAN 12MILS
V_FSB_VTT
H_VCCABB
2
4
6
8
L5 10uH-0805-125mA
VID_GD# {24,25}
H_FSBSEL1
H_FSBSEL0
H_FSBSEL2
4
VTT_OUT_RIGHT
VCC5_SB
R63
1K-0603
R62 10K-0603
H_FSBSEL1 {3,8,26}
H_FSBSEL0 {3,8,26}
H_FSBSEL2 {3,8,26}
C75
X-0603-C
R53 680-0603
3
C82
10u-0805
VTT_PWG
Q4
2N3904S
C85
10u-0805
H_VCCA
H_VSSA
VTT_PWG SPEC :
High > 0.9V
Low < 0.3V
Trise < 150ns
C38
X-0603-C
Title
LGA775 Power
Size Document N umber Re v
Custom
Date: Sheet
2
MICRO-START INT'L CO.,LTD.
MS-7290 1.0
43 2 Monday, June 12, 2006
1
of
8
7
6
5
4
3
2
1
R25
VSS
VSS
AK13
R24
VSS
VSS
AK16
R23
VSS
VSS
AK17
MSID1 MSID0
P30
P29
P28
VSSR2VSSP7VSSP4VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
AK2
AK20
AK23
AK24
AK27
AK28
P27
VSS
VSS
AK29
P26
VSS
VSS
AK30
P25
P24
P23
VSS
VSS
VSS
VSSN7VSSN6VSSN3VSSM7VSSM1VSSL7VSSL6VSS
VSS
VSS
VSS
VSS
AK5
AK7
AL10
AL13
AL16
VSS
AL17
VSS
AL20
VSS
AL23
VSS
AL24
VSS
AL27
VSS
L30
AL28
VSS
VSSL3VSS
VSS
AL3
H17
H18
H19
H20
H21
H22
H23
H24
H25
H26
H27
VSS
AN1
VSS
VSS
AN10
VSS
AN13
VSSH3VSSH6VSSH7VSSH8VSSH9VSSJ4VSSJ7VSS
VSS
AN16
VSS
AN17
H28
AN2
VSS
VSS
VSS
VSS
AN20
VSS
VSS
AN23
VSS
VSS
AN24
VSS
VSS
AN27
VSS
VSS
AN28
VSS
VSS
VSSB1VSS
VSS
VSS
VSS
VSS
ZIF-SOCK775-15u
B11
B14
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
H14
H13
H12
H11
H10
G1
F7
F4
F22
F19
F16
F13
F10
E8
E29
E28
E27
E26
E25
E20
E2
E17
E14
E11
D9
D6
D5
D3
D24
D21
D18
D15
D12
C7
C4
C24
C22
C19
C16
C13
C10
B8
B5
B24
B20
B17
L26
VSS
VSS
AM13
L25
VSS
VSS
AM16
L24
VSS
VSS
AM17
L23
VSS
VSS
AM20
VSSK7VSS
VSS
AM23
K5
VSS
AM24
K2
VSS
AM27
VSS
AM28
AM4
L29
L28
L27
VSS
VSS
VSS
VSS
VSS
AL7
AM1
AM10
V_FSB_VTT
VTT_OUT_RIGHT {3,4}
D D
A12
A15
A18
A2
A21
A24
A6
A9
AA23
AA24
AA25
AA26
AA27
AA28
AA29
C C
B B
AA3
AA30
AA6
AA7
AB1
AB23
AB24
AB25
AB26
AB27
AB28
AB29
AB30
AB7
AC3
AC6
AC7
AD4
AD7
AE10
AE13
AE16
AE17
AE2
AE20
AE24
AE25
AE26
AE27
AE28
R58
60.4RST
U3C
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
AE29
H_COMP6
AE30
R28
60.4RST
H_COMP7
AE3
AE4
RSVD
COMP6Y3COMP7
VSS
VSS
VSS
AE5
AE7
TP14
D14
RSVDD1RSVD
VSS
VSS
AF10
AF13
E23
AF16
RSVD
VSS
AF17
TP15
RSVDE5RSVDE6RSVDE7RSVD
VSS
VSS
VSS
AF20
AF23
AF24
VSS
TP12
F23
VSS
AF25
TP13
B13
F6
RSVD
IMPSEL#
VSS
VSS
AF26
AF27
AF28
VSS
AF29
62-0603
RSVDJ3RSVDN4RSVD
VSS
VSS
AF3
R67
VSS
AF30
R59
X-0603-R
R65 62-0603
W1
P5
AC4
VSSY7VSSY5VSSY2VSSW7VSSW4VSSV7VSSV6VSS
RSVD
MSID[1]V1MSID[0]
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
AF6
AF7
AG10
AG13
AG16
AG17
AG20
AG23
VSS
AG24
AG7
VSS
AH1
VSS
AH10
VSS
VSS
AH13
VSS
AH16
V30
VSS
AH17
VSSV3VSS
VSS
AH20
V29
VSS
AH23
V28
VSS
VSS
AH24
V27
AH3
VSS
VSS
V26
AH6
VSS
VSS
V25
AH7
VSS
VSS
V24
VSS
VSS
AJ10
2005 Perf FMB 0 0
2005 Value FMB 0 1
V23
VSS
VSSU7VSSU1VSST7VSST6VSST3VSSR7VSSR5VSS
VSS
VSS
AJ13
AJ16
AJ17
VSS
AJ20
VSS
AJ23
VSS
AJ24
VSS
AJ27
VSS
AJ28
VSS
R30
AJ29
VSS
R29
AJ30
VSS
VSS
R28
R27
R26
VSS
VSS
VSS
VSS
VSS
VSS
AJ4
AJ7
AK10
A A
Title
LGA775 GND
Size Document N umber Re v
Custom
8
7
6
5
4
3
Date: Sheet
2
MICRO-START INT'L CO.,LTD.
MS-7290 1.0
of
53 2 Monday, June 12, 2006
1
8
7
6
5
4
3
2
1
V_1P5_CORE
N17
P17
P18
P20
P21
AA22
AB21
AB22
AB23
AC22
AD14
AF6
AF7
AF8
AF9
AF10
AF11
AF12
AF13
AF14
AF30
AG2
AG3
AG4
AG5
AG6
AG7
AG8
AG9
AG10
AG11
AG12
AG13
AG14
AH1
AH2
AH4
AJ5
AJ13
AJ14
AK2
AK3
AK4
AK14
AK15
AK20
R15
R17
R18
R20
R21
R23
R24
U15
U17
U18
U19
U20
U21
U22
U23
U24
U25
U26
V15
V17
V18
V19
V20
V21
V22
V23
V25
V27
W17
W18
W19
W20
W22
W24
W26
W27
Y15
M17
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
KDINV_0#
HDINV_1#
HDINV_2#
HDINV_3#
HD_STBP0#
HD_STBN0#
HD_STBP1#
HD_STBN1#
HD_STBP2#
HD_STBN2#
HD_STBP3#
HD_STBN3#
VCC
VCC
VCC
VCC
VCC
AA17
AA18
AA19
AA20
MCH_GTLREF_CPU {3}
3
HD0#
HD1#
HD2#
HD3#
HD4#
HD5#
HD6#
HD7#
HD8#
HD9#
HD10#
HD11#
HD12#
HD13#
HD14#
HD15#
HD16#
HD17#
HD18#
HD19#
HD20#
HD21#
HD22#
HD23#
HD24#
HD25#
HD26#
HD27#
HD28#
HD29#
HD30#
HD31#
HD32#
HD33#
HD34#
HD35#
HD36#
HD37#
HD38#
HD39#
HD40#
HD41#
HD42#
HD43#
HD44#
HD45#
HD46#
HD47#
HD48#
HD49#
HD50#
HD51#
HD52#
HD53#
HD54#
HD55#
HD56#
HD57#
HD58#
HD59#
HD60#
HD61#
HD62#
HD63#
Lakeport
V_1P5_CORE
P41
M39
P42
M42
N41
M40
L40
M41
K42
G39
J41
G42
G40
G41
F40
F43
F37
E37
J35
D39
C41
B39
B40
H34
C37
J32
B35
J34
B34
F32
L32
J31
H31
M33
K31
M27
K29
F31
H29
F29
L27
M24
J26
K26
G26
H24
K24
F24
E31
A33
E40
D37
C39
D38
D33
C35
D34
C34
B31
C31
C32
D32
B30
D30
K40
A38
E29
B32
K41
L43
F35
G34
J27
M26
E34
B37
H_D#0
H_D#1
H_D#2
H_D#3
H_D#4
H_D#5
H_D#6
H_D#7
H_D#8
H_D#9
H_D#10
H_D#11
H_D#12
H_D#13
H_D#14
H_D#15
H_D#16
H_D#17
H_D#18
H_D#19
H_D#20
H_D#21
H_D#22
H_D#23
H_D#24
H_D#25
H_D#26
H_D#27
H_D#28
H_D#29
H_D#30
H_D#31
H_D#32
H_D#33
H_D#34
H_D#35
H_D#36
H_D#37
H_D#38
H_D#39
H_D#40
H_D#41
H_D#42
H_D#43
H_D#44
H_D#45
H_D#46
H_D#47
H_D#48
H_D#49
H_D#50
H_D#51
H_D#52
H_D#53
H_D#54
H_D#55
H_D#56
H_D#57
H_D#58
H_D#59
H_D#60
H_D#61
H_D#62
H_D#63
H_DBI#0
H_DBI#1
H_DBI#2
H_DBI#3
H_D#[0..63] {3}
H_DBI#[0..3] {3}
H_DSTBP#0 {3}
H_DSTBN#0 {3}
H_DSTBP#1 {3}
H_DSTBN#1 {3}
H_DSTBP#2 {3}
H_DSTBN#2 {3}
H_DSTBP#3 {3}
H_DSTBN#3 {3}
V_FSB_VTT
Title
Lakepoert CPU
Size Document N umber Re v
Custom
Date: Sheet
2
MICRO-START INT'L CO.,LTD.
MS-7290 1.0
R146 60.4RST
C122
X-0603-C
63 2 Monday, June 12, 2006
1
HXSCOMP
of
M34
M38
AA37
M36
AA41
W42
G37
W41
W40
M31
M29
AJ12
M18
J39
K38
J42
K35
J37
N35
R33
N32
N34
N42
N37
N38
R32
R36
U37
R35
R38
V33
U34
U32
V42
U35
Y36
Y38
V32
Y34
V35
F38
D42
U39
U40
E41
D41
K36
E42
U41
P40
U42
V41
Y40
T40
Y43
T43
AJ9
C30
A28
C27
B27
D27
D28
7
U6A
HA3#
HA4#
HA5#
HA6#
HA7#
HA8#
HA9#
HA10#
HA11#
HA12#
HA13#
HA14#
HA15#
HA16#
HA17#
HA18#
HA19#
HA20#
HA21#
HA22#
HA23#
HA24#
HA25#
HA26#
HA27#
HA28#
HA29#
HA30#
HA31#
HAD_STB0#
HAD_STB1#
HPCREQ#
HBREQ0#
HBPRI#
HBNR#
HLOCK#
HADS#
HREQ0#
HREQ1#
HREQ2#
HREQ3#
HREQ4#
HHIT#
HHITM#
HDEFER#
HTRDY#
HDBSY#
HDRDY#
HEDRDY#
RS0#
RS1#
RS2#
HCLKP
HCLKN
PWROK
HCPURST#
RSTIN#
ICH_SYNC#
HRCOMP
HSCOMP
HSWING
HDVREF
HACCVREF
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
RSVRD
RSVRD
RSVRD
RSVRD
RSVRD
RSVRD
RSVRD
RSVRD
RSVRD
RSVRD
RSVRD
RSVRD
RSVRD
RSVRD
RSVRD
RSVRD
L15
A43
U27
R27
M15
M11
AJ24
AA35
AA42
AA34
AA38
V_FSB_VTT
HD_SWING VOLTAGE "10 MIL TRACE , 7 MIL
SPACE" HD_SWING S/B 1/3*VTT +/- 2%
AG25
AG26
AG27
AJ27
AK40
PLACE DIVIDER RESISTOR NEAR VTT
R143
301RST
R145
84.5RST
R144 62-0603
C121
0.01u-0603
6
VCC
VCC
VCC
RSVRD
RSVRD
RSVRD
AL39
AW17
AW18
HXSWING
VCC
RSVRD
AY14
BC16
VCC
VCC
RSVRD
RSVRD
AD30
VCC
RSVRD
AC34
VCC
RSVRD
Y30
VCC
RSVRD
Y33
AF31
VCC
VCC
RSVRD
RSVRD
AD31
VCC
RSVRD
U30
VCC
RSVRD
V31
VCC
RSVRD
AA30
AC30
VCC
VCC
RSVRD
RSVRD
AK21
VCC
RSVRD
AJ23
VCC
RSVRD
AJ26
VCC
RSVRD
AL29
AL20
5
VCC
VCC
RSVRD
RSVRD
AJ21
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
RSVRD
RSVRD
RSVRD
RSVRD
RSVRD
NC
NC
NC
NC
NC
NC
AL26
AK27
V30
AJ29
AG29
V_FSB_VTT
BC43NCBC42
R141
124RST
BB2NCBB1NCBA2
BC2NCBC1
AW2
BB43
AW26
GTLREF VOLTAGE SHOULD BE 0.63*VTT=0.756V
124 OHM OVER 210 RESISTORS
R393 10-0603
R139
210RST
C115
0.1u-0603
CAPS SHOULD BE PLACED NEAR MCH PIN
VCC
VCC
NC
AV27NCAV26
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
NC
NC
NCC2NC
NCB3NCB2NC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
E35
B43NCB42NCB41
A42
Y17
Y18
Y19
Y21
Y23
Y25
C42
Y27
AA15
MCH_GTLREF MCH_GTLREF
R135 0-0603
C117
220p-0603
4
H_A#[3..31] {3}
D D
H_ADSTB#0 {3}
H_ADSTB#1 {3}
C C
H_BNR# {3}
H_A#3
H_A#4
H_A#5
H_A#6
H_A#7
H_A#8
H_A#9
H_A#10
H_A#11
H_A#12
H_A#13
H_A#14
H_A#15
H_A#16
H_A#17
H_A#18
H_A#19
H_A#20
H_A#21
H_A#22
H_A#23
H_A#24
H_A#25
H_A#26
H_A#27
H_A#28
H_A#29
H_A#30
H_A#31
H_BR#0 {3,4}
H_BPRI# {3}
H_LOCK# {3}
H_ADS# {3}
H_REQ#[0..4] {3}
H_HIT# {3}
H_HITM# {3}
H_DEFER# {3}
H_TRDY# {3}
H_DBSY# {3}
H_DRDY# {3}
H_RS#[0..2] {3}
CK_H_MCH {26}
CK_H_MCH# {26}
PWR_GD {15,24}
B B
H_CPURST# {3,4}
ICH_SYNC# {15}
R142 16.9RST
H_REQ#0
H_REQ#1
H_REQ#2
H_REQ#3
H_REQ#4
H_RS#0
H_RS#1
H_RS#2
GMCH_PLTRST#
ICH_SYNC#
HXRCOMP
HXSCOMP
HXSWING
MCH_GTLREF
VCC3
14 7
U59A
PLTRST# {13,14,17,21,23}
1 2
74LCX14MX-SOIC14
A A
VCC3
14 7
U59B
3 4
GMCH_PLTRST#
74LCX14MX-SOIC14
8
8
7
6
5
4
3
2
1
DQM_A[0..7] {10}
SCKE_A[0..1] {10,11}
DATA_A[0..63] {10}
DQM_A6
DQM_A1
DQM_A4
DQM_A2
DQM_A7
DQM_A3
DATA_A16
DATA_A21
DATA_A6
DATA_A4
AN1
SADQ3
SADQ4
SBDQ1
SBDQ2
AP8
DATA_A5
AP4
SADQ5
SBDQ3
AP9
DATA_A7
AU5
SADQ6
SBDQ4
AJ11
DATA_A8
AU2
SADQ7
SBDQ5
AL9
DATA_A9
AW3
SADQ8
SBDQ6
AM10
DATA_A10
AY3
SADQ9
SBDQ7
AP6
DATA_A11
BA7
BB7
SADQ10
SBDQ8
AV6
AU7
DATA_A12
DATA_A13
AV1
AW4
SADQ11
SADQ12
SBDQ9
SBDQ10
AV12
AM11
DATA_A14
DATA_A15
BC6
AY7
SADQ13
SADQ14
SBDQ11
SBDQ12
AR5
AR7
DATA_A17
AW12
AY10
SADQ15
SADQ16
SBDQ13
SBDQ14
AR12
AR10
DATA_A0
DATA_A1
DATA_A3
DATA_A2
D D
C C
B B
SCS_A#[0..1] {10,11}
RAS_A# {10,11}
CAS_A# {10,11}
WE_A# {10,11}
MAA_A[0..13] {10,11}
ODT_A[0..1] {10,11}
ON_DIE_TERMINATION
SBS_A[0..2] {10,11}
DQS_A0 {10}
DQS_A#0 {10}
DQS_A1 {10}
DQS_A#1 {10}
DQS_A2 {10}
DQS_A#2 {10}
DQS_A3 {10}
DQS_A#3 {10}
DQS_A4 {10}
DQS_A#4 {10}
DQS_A5 {10}
DQS_A#5 {10}
DQS_A6 {10}
DQS_A#6 {10}
DQS_A7 {10}
DQS_A#7 {10}
P_DDR0_A {10}
N_DDR0_A {10}
P_DDR1_A {10}
N_DDR1_A {10}
P_DDR2_A {10}
N_DDR2_A {10}
SCS_A#0
SCS_A#1
RAS_A#
CAS_A#
WE_A#
MAA_A0
MAA_A1
MAA_A2
MAA_A3
MAA_A4
MAA_A5
MAA_A6
MAA_A7
MAA_A8
MAA_A9
MAA_A10
MAA_A11
MAA_A12
ODT_A0
ODT_A1
SBS_A0
SBS_A1
SBS_A2
DQS_A0
DQS_A#0
DQS_A1
DQS_A#1
DQS_A2
DQS_A#2
DQS_A3
DQS_A#3
DQS_A4
DQS_A#4
DQS_A5
DQS_A#5
DQS_A6
DQS_A#6
DQS_A7
DQS_A#7
P_DDR0_A
N_DDR0_A
P_DDR1_A
N_DDR1_A
P_DDR2_A
N_DDR2_A
SMPCOMP_N
SMPCOMP_P MCH_VREF_A
BB37
BA39
BA35
AY38
BA34
BA37
BB35
BA32
AW32
BB30
BA30
AY30
BA27
BC28
AY27
AY28
BB27
AY33
AW27
BB26
BC38
AW37
AY39
AY37
BB40
BC33
AY34
BA26
AU4
AR2
BA3
BB4
AY11
BA10
AU18
AR18
AU35
AV35
AP42
AP40
AG42
AG41
AC42
AC41
BB32
AY32
AY5
BB5
AK42
AK41
BA31
BB31
AY6
BA5
AH40
AH43
AM3
AL5
AJ6
AJ8
U6B
SACS0#
SACS1#
SACS2#
SACS3#
SARAS#
SACAS#
SAWE#
SAMA0
SAMA1
SAMA2
SAMA3
SAMA4
SAMA5
SAMA6
SAMA7
SAMA8
SAMA9
SAMA10
SAMA11
SAMA12
SAMA13
SAODT0
SAODT1
SAODT2
SAODT3
SABA0
SABA1
SABA2
SADQS0
SADQS0#
SADQS1
SADQS1#
SADQS2
SADQS2#
SADQS3
SADQS3#
SADQS4
SADQS4#
SADQS5
SADQS5#
SADQS6
SADQS6#
SADQS7
SADQS7#
SACLK0
SACLK0#
SACLK1
SACLK1#
SACLK2
SACLK2#
SACLK3
SACLK3#
SACLK4
SACLK4#
SACLK5
SACLK5#
MCH_SRCOMP0
MCH_SRCOMP1
SMOCDCOMP0
SMOCDCOMP1
AP3
SADQ0
AP2
SADQ1
AU3
SADQ2
AV4
SBDQ0
R194 80.6RST
SMPCOMP_P
Lakeport
AL6
AL8
DATA_A18
DATA_A19
BA12
BB12
SADQ17
SADQ18
SBDQ15
SBDQ16
AM15
AM13
DATA_A20
BA9
BB9
SADQ19
SADQ20
SBDQ17
SBDQ18
AV15
AM17
DATA_A22
DATA_A23
BC11
AY12
SADQ21
SADQ22
SBDQ19
SBDQ20
AN12
AR13
DATA_A24
DATA_A25
AM20
AM18
SADQ23
SADQ24
SBDQ21
SBDQ22
AT15
AP15
DATA_A26
DATA_A27
AV20
AM21
SADQ25
SADQ26
SBDQ23
SBDQ24
AM24
AM23
DATA_A29
DATA_A28
AP17
AR17
SADQ27
SADQ28
SBDQ25
SBDQ26
AV24
AM26
DATA_A30
AP20
SADQ29
SBDQ27
AP21
DATA_A32
DATA_A31
AT20
AP32
SADQ30
SADQ31
SBDQ28
SBDQ29
AP24
AR21
DATA_A34
DATA_A33
AV34
AV38
SADQ32
SADQ33
SBDQ30
SBDQ31
AT24
AU27
DATA_A35
DATA_A36
AU39
AV32
SADQ34
SADQ35
SBDQ32
SBDQ33
AN29
AR31
DATA_A37
DATA_A38
AT32
AR34
SADQ36
SADQ37
SBDQ34
SBDQ35
AP27
AM31
DATA_A40
DATA_A39
AU37
AR41
SADQ38
SADQ39
SBDQ36
SBDQ37
AP31
AR27
DATA_A41
DATA_A42
AR42
AN43
SADQ40
SADQ41
SBDQ38
SBDQ39
AP35
AU31
DATA_A43
DATA_A44
AM40
AU41
SADQ42
SADQ43
SBDQ40
SBDQ41
AP37
AN32
DATA_A45
DATA_A46
AU42
AP41
SADQ44
SADQ45
SBDQ42
SBDQ43
AL35
AR35
DATA_A48
DATA_A47
AN40
AL41
SADQ46
SADQ47
SBDQ44
SBDQ45
AU38
AM38
DATA_A49
DATA_A50
AL42
AF39
SADQ48
SADQ49
SBDQ46
SBDQ47
AL34
AM34
DATA_A52
DATA_A51
AE40
AM41
SADQ50
SADQ51
SBDQ48
SBDQ49
AJ34
AF32
DATA_A53
DATA_A54
AM42
AF41
SADQ52
SADQ53
SBDQ50
SBDQ51
AL31
AF34
DATA_A56
DATA_A55
AF42
AD40
SADQ54
SADQ55
SBDQ52
SBDQ53
AJ32
AG35
DATA_A57
DATA_A58
AD43
AA39
SADQ56
SADQ57
SBDQ54
SBDQ55
AD32
AC32
DATA_A60
DATA_A59
AA40
AE42
SADQ58
SADQ59
SBDQ56
SBDQ57
Y32
AD34
DATA_A61
DATA_A62
AE41
AB41
SADQ60
SADQ61
SBDQ58
SBDQ59
AF35
AA32
DATA_A63
AB42
SADQ62
SADQ63
SBDQ60
SBDQ61
AF37
AC33
SCKE_A1
SCKE_A0
BB25
AY25
SACKE0
SBDQ62
SBDQ63
AC35
BC24
BA25
SACKE1
SACKE2
SBCKE0
BA14
AY16
SACKE3
SBCKE1
BA13
DQM_A0
AR3
SBCKE2
SBCKE3
BB13
AY2
SADM1
SADM0
SBDM7
AD39
BB10
SADM2
SBDM6
AJ39
AP18
SADM3
SBDM5
AR38
DQM_A5
AT34
SADM4
SBDM4
AR29
AG40
AP39
SADM5
SBDM3
AP13
AP23
AC40
SADM7
SADM6
SBDM1
SBDM2
AW7
SBCS0#
SBCS1#
SBCS2#
SBCS3#
SBRAS#
SBCAS#
SBWE#
SBMA0
SBMA1
SBMA2
SBMA3
SBMA4
SBMA5
SBMA6
SBMA7
SBMA8
SBMA9
SBMA10
SBMA11
SBMA12
SBMA13
SBODT0
SBODT1
SBODT2
SBODT3
SBBA0
SBBA1
SBBA2
SBDQS0
SBDQS0#
SBDQS1
SBDQS1#
SBDQS2
SBDQS2#
SBDQS3
SBDQS3#
SBDQS4
SBDQS4#
SBDQS5
SBDQS5#
SBDQS6
SBDQS6#
SBDQS7
SBDQS7#
SBCLK0
SBCLK0#
SBCLK1
SBCLK1#
SBCLK2
SBCLK2#
SBCLK3
SBCLK3#
SBCLK4
SBCLK4#
SBCLK5
SBCLK5#
SMVREF1
SMVREF0
SBDM0
AL11
SCS_B#0
BA40
SCS_B#1
AW41
BA41
AW40
RAS_B#
BA23
CAS_B#
AY24
WE_B#
BB23
MAA_B0
BB22
MAA_B1
BB21
MAA_B2
BA21
MAA_B3
AY21
MAA_B4
BC20
MAA_B5
AY19
MAA_B6
AY20
MAA_B7
BA18
MAA_B8
BA19
MAA_B9
BB18
MAA_B10
BA22
MAA_B11
BB17
MAA_B12
BA17
MAA_B13 MAA_A13
AW42
ODT_B0
AY42
ODT_B1
AV40
AV43
AU40
SBS_B0
AW23
SBS_B1
AY23
SBS_B2
AY17
DQS_B0
AM8
DQS_B#0
AM6
DQS_B1
AV7
DQS_B#1
AR9
DQS_B2
AV13
DQS_B#2
AT13
DQS_B3
AU23
DQS_B#3
AR23
DQS_B4
AT29
DQS_B#4
AV29
DQS_B5
AP36
DQS_B#5
AM35
DQS_B6
AG34
DQS_B#6
AG32
DQS_B7
AD36
DQS_B#7
AD38
P_DDR0_B
AM29
N_DDR0_B
AM27
P_DDR1_B
AV9
N_DDR1_B
AW9
P_DDR2_B
AL38
N_DDR2_B
AL36
AP26
AR26
AU10
AT10
AJ38
AJ36
MCH_VREF_B
AM2
MCH_VREF_A
AM4
PLACE 0.1UF CAP CLOSE TO MCH
SCS_B#[0..1] {10,11}
RAS_B# {10,11}
CAS_B# {10,11}
WE_B# {10,11}
MAA_B[0..13] {10,11}
ODT_B[0..1] {10,11}
SBS_B[0..2] {10,11}
DQS_B0 {10}
DQS_B#0 {10}
DQS_B1 {10}
DQS_B#1 {10}
DQS_B2 {10}
DQS_B#2 {10}
DQS_B3 {10}
DQS_B#3 {10}
DQS_B4 {10}
DQS_B#4 {10}
DQS_B5 {10}
DQS_B#5 {10}
DQS_B6 {10}
DQS_B#6 {10}
DQS_B7 {10}
DQS_B#7 {10}
P_DDR0_B {10}
N_DDR0_B {10}
P_DDR1_B {10}
N_DDR1_B {10}
P_DDR2_B {10}
N_DDR2_B {10}
C179
0.1u-0603
PLACE 0.1UF CAP CLOSE TO MCH
C178
0.1u-0603
DATA_B42
DATA_B4
DATA_B5
DATA_B3
DATA_B0
DATA_B7
DATA_B2
DATA_B6
DATA_B1
DATA_B14
DATA_B15
DATA_B21
DATA_B23
DATA_B11
DATA_B17
DATA_B10
DATA_B8
DATA_B12
DATA_B13
DATA_B9
DATA_B20
DATA_B16
DATA_B18
DATA_B19
DATA_B27
DATA_B24
DATA_B22
DATA_B25
DATA_B26
DATA_B34
DATA_B32
DATA_B35
DATA_B36
DATA_B31
DATA_B30
DATA_B28
DATA_B29
DATA_B39
DATA_B33
DATA_B37
DATA_B38
DATA_B46
DATA_B47
DATA_B48
DATA_B40
DATA_B45
DATA_B41
DATA_B43
DATA_B44
DATA_B52
DATA_B49
DATA_B54
DATA_B51
DATA_B50
DATA_B53
DATA_B[0..63] {10}
SCKE_B[0..1] {10,11}
VCC_DDR
A A
R193 80.6RST
C183
0.1u-0603
8
SMPCOMP_N
7
6
5
DATA_B61
DATA_B55
DATA_B56
DQM_B[0..7] {10}
DATA_B63
DATA_B57
DATA_B58
DATA_B60
DATA_B59
DATA_B62
SCKE_B0
SCKE_B1
DQM_B2
DQM_B3
DQM_B1
DQM_B7
DQM_B6
DQM_B5
DQM_B0
DQM_B4
VCC_DDR
R199 1KST
CP3
X_COPPER
MCH_VREF_A
MCH_VREF_B
R196
1KST
Title
Lakeport Memory
Size Document N umber Re v
Custom
4
3
Date: Sheet
2
MICRO-START INT'L CO.,LTD.
MS-7290 1.0
of
73 2 Monday, June 12, 2006
1
8
D D
EXP_EN: PCI Express* SDVO
Concurrent Select
0: Only SDVO or PCI-E Operational
1: SDVO and PCI-E operating
simultaneously via PCI Express-G
port
SDVO INTERFACE
SDVO_STALL+ {13}
SDVO_STALL- {13}
DMI_ITP_MRP_0 {14}
DMI_ITN_MRN_0 {14}
DMI_ITP_MRP_1 {14}
DMI_ITN_MRN_1 {14}
DMI_ITP_MRP_2 {14}
DMI_ITN_MRN_2 {14}
DMI_ITP_MRP_3 {14}
DMI_ITN_MRN_3 {14}
CK_PE_100M_MCH {26}
CK_PE_100M_MCH# {26}
H_FSBSEL0 {3,4,26}
H_FSBSEL1 {3,4,26}
H_FSBSEL2 {3,4,26}
R1168 1K-0603
R162 X_0-0603
R157 10K-0603
R160 10K-0603
R152 10K-0603
R155 X-0603-R
V_2P5_MCH
V_2P5_DAC_FILTERED
+
C148
100u-16V
5+1 mm
EXP_EN
DMI_ITP_MRP_0
DMI_ITN_MRN_0
DMI_ITP_MRP_1
DMI_ITN_MRN_1
DMI_ITP_MRP_2
DMI_ITN_MRN_2
DMI_ITP_MRP_3
DMI_ITN_MRN_3
CK_PE_100M_MCH
CK_PE_100M_MCH#
R767 22-0603
R766 22-0603
VCCA_HPLL VCCA_HPLL
VCCA_MPLL
VCCA_DPLLA
VCCA_DPLLB
VCCA_GPLL
C151
0.1u-0603
SEL0
SEL1
SEL2
NOA_6
1u-0603
C149
VCC3
C C
SDVO INTERFACE
SDVO_CTRL_DATA {13}
SDVO_CTRL_CLK {13}
EXP_SLR: PCI Express
Static Lane Reversal
0: BTX 1: ATX
B B
L14 180L-0603-1500mA
V_2P5_MCH
G12
F12
D11
D12
J13
H13
E10
F10
J9
H10
F7
F9
C4
D3
G6
J6
K9
K8
F4
G4
M6
M7
K2
L1
U11
U10
R8
R7
P4
N3
Y10
Y11
F20
Y7
Y8
AA9
AA10
AA6
AA7
AC9
AC8
B14
B16
F15
E15
F21
H21
L20
AK17
AL17
K21
AK23
AK18
L21
L18
N21
C21
B20
C19
B19
B17
D19
C18
B18
A18
V_FSB_VTT
7
U6C
EXPARXP0
EXPARXN0
EXPARXP1
EXPARXN1
EXPARXP2
EXPARXN2
EXPARXP3
EXPARXN3
EXPARXP4
EXPARXN4
EXPARXP5
EXPARXN5
EXPARXP6
EXPARXN6
EXPARXP7
EXPARXN7
EXPARXP8
EXPARXN8
EXPARXP9
EXPARXN9
EXPARXP10
EXPARXN10
EXPARXP11
EXPARXN11
EXPARXP12
EXPARXN12
EXPARXP13
EXPARXN13
EXPARXP14
EXPARXN14
EXPARXP15
EXPARXN15
EXP_EN
DMI RXP0
DMI RXN0
DMI RXP1
DMI RXN1
DMI RXP2
DMI RXN2
DMI RXP3
DMI RXN3
GCLKP
GCLKN
SDVOCTRLDATA
SDVOCTRLCLK
BSEL0
BSEL1
BSEL2
RSV_TP[0]
RSV_TP[1]
EXP_SLR
RSV_TP[2]
RSV_TP[3]
RSV_TP[4]
RSV_TP[5]
RSV_TP[6]
VCCAHPLL
VCCAMPLL
VCCADPLLA
VCCADPLLB
VCCA_EXPPLL
VCC2
VCCADAC
VCCADAC
VSSA_DAC
Lakeport
V_1P5_CORE
AA26
AB17
AB18
AB19
AA24
VCC
VCC
VCC
VCC
VTT
VTT
VTT
B23
A24
B24
B25
VCC
VTT
AB20
VCC
VTT
B26
AB24
VCC
VTT
C23
AB25
VCC
VTT
C25
AB26
VCC
VTT
C26
AB27
VCC
VTT
D23
AC15
VCC
VTT
D24
AC17
VCC
VTT
D25
AC18
VCC
VTT
E23
AC20
VCC
VTT
E24
AC24
VCC
VTT
E26
AC26
VCC
VTT
E27
AC27
VCC
VTT
F23
6
AD15
VCC
VTT
F27
AD17
VCC
VTT
G23
AD19
VCC
VTT
H23
AD21
J23
AD23
AD25
AD26
VCC
VCC
VCC
VTT
VTT
VTT
L23
K23
M23
V_1P5_CORE
VCC
VTT
AE17
N23
VCC
VTT
AE18
VCC
VTT
P23
AE20
VCC
AE22
VCC
AE24
VCC
AE26
VCC
VCC
AF21
AE27
VCC
VCC
AF23
AF15
AF25
VCC
VCC
AF17
AF26
VCC
VCC
AF19
AF27
VCC
VCC
VCC
AF29
VCC_DDR
AV18
AY43
VCCSM
VCCSM
VCC
VCC
AG15
AG17
AV23
AV21
VCCSM
VCC
AG18
AG19
5
AV31
VCCSM
VCCSM
VCC
VCC
AG20
AV42
AW13
VCCSM
VCC
AG21
AG22
AW15
VCCSM
VCCSM
VCC
VCC
AG23
AW20
AW21
VCCSM
VCC
AJ15
AG24
AW24
VCCSM
VCCSM
VCC
VCC
AJ17
AW29
AW31
VCCSM
VCC
AJ18
AJ20
AW34
VCCSM
VCCSM
VCC
AY41
AW35
VCCSM
BB16
VCCSM
VCCSM
BB20
BB24
BB28
VCCSM
VCCSM
VCC_EXP
VCC_EXP
AE4
AE3
AE2
BB33
BB38
VCCSM
VCCSM
VCCSM
VCC_EXP
VCC_EXP
VCC_EXP
AD12
AD10
BB42
BC13
BC18
VCCSM
VCCSM
VCC_EXP
VCC_EXP
AD8
AD6
AD5
4
BC26
BC22
VCCSM
VCCSM
VCCSM
VCC_EXP
VCC_EXP
VCC_EXP
AD4
AD2
BC31
BC35
BC40
VCCSM
VCCSM
VCC_EXP
VCC_EXP
AD1
AC6
AC13
N5
VCCSM
VCC_EXP
VCC_EXP
VCC_EXP
VCC_EXP
AC5
AA13
N10
N9
N7
VCC_EXP
VCC_EXP
VCC_EXP
VCC_EXP
Y13
V13
AA5
N12
N11
VCC_EXP
VCC_EXP
VCC_EXP
VCC_EXP
VCC_EXPV9VCC_EXP
V10
U6
R13
R11
R10
R5
VCC_EXP
VCC_EXP
VCC_EXP
VCC_EXP
VCC_EXPV7VCC_EXPV6VCC_EXP
V5
V_1P5_PCIEXPRESS
U13
U8
U7
VCC_EXP
VCC_EXP
VCC_EXP
VCC_EXP
EXPATXP0
EXPATXN0
EXPATXP1
EXPATXN1
EXPATXP2
EXPATXN2
EXPATXP3
EXPATXN3
EXPATXP4
EXPATXN4
EXPATXP5
EXPATXN5
EXPATXP6
EXPATXN6
EXPATXP7
EXPATXN7
EXPATXP8
EXPATXN8
EXPATXP9
EXPATXN9
EXPATXP10
EXPATXN10
EXPATXP11
EXPATXN11
EXPATXP12
EXPATXN12
EXPATXP13
EXPATXN13
EXPATXP14
EXPATXN14
EXPATXP15
EXPATXN15
DMI TXP0
DMI TXN0
DMI TXP1
DMI TXN1
DMI TXP2
DMI TXN2
DMI TXP3
DMI TXN3
EXP_COMPO
EXP_COMPI
HSYNC
VSYNC
RED
GREEN
BLUE
RED#
GREENB
BLUE#
DDC_DATA
DDC_CLK
DREFCLKINP
DREFCLKINN
IREF
EXTTS#
XORTEST
ALLZTEST
V_1P5_PCIEXPRESS
3
D14
C13
A13
B12
A11
B10
C10
C9
A9
B7
D7
D6
A6
B5
E2
F1
G2
J1
J3
K4
L4
M4
M2
N1
P2
T1
T4
U4
U2
V1
V3
W4
W2
Y1
AA2
AB1
Y4
AA4
AB3
AC4
AC12
AC11
D17
C17
F17
K17
H18
G17
J17
J18
N18
N20
J15
H15
A20
J20
H20
K18
C1068
0.1u-0603
SDVO INTERFACE
DMI_MTP_IRP_0
DMI_MTN_IRN_0
DMI_MTP_IRP_1
DMI_MTN_IRN_1
DMI_MTP_IRP_2
DMI_MTN_IRN_2
DMI_MTP_IRP_3
DMI_MTN_IRN_3
GRCOMP
HSYNC_GMCH
VSYNC_GMCH
VGA_RED
VGA_GREEN
VGA_BLUE
MCH_DDC_DATA
MCH_DDC_CLK
CK_96M_DREF
CK_96M_DREF#
DACREFSET
EXTTS
R165 10K-0603
TP16
TP17
C433
X-0603-C
SDVOB_Clk+ {13}
SDVOB_Clk- {13}
SDVOB_Blue+ {13}
SDVOB_Blue- {13}
SDVOB_Green+ {13}
SDVOB_Green- {13}
SDVOB_Red+ {13}
SDVOB_Red- {13}
DMI_MTP_IRP_0 {14}
DMI_MTN_IRN_0 {14}
DMI_MTP_IRP_1 {14}
DMI_MTN_IRN_1 {14}
DMI_MTP_IRP_2 {14}
DMI_MTN_IRN_2 {14}
DMI_MTP_IRP_3 {14}
DMI_MTN_IRN_3 {14}
R190
24.9RST
R1169 39-0603
R1170 39-0603
VGA_RED {12}
VGA_GREEN {12}
VGA_BLUE {12}
MCH_DDC_DATA {12}
MCH_DDC_CLK {12}
CK_96M_DREF {26}
CK_96M_DREF# {26}
R161 255RST
2
V_1P5_PCIEXPRESS
HSYNC {12}
VSYNC {12}
V_2P5_MCH
1
V_1P5_CORE
C182
C186
C632 0.1u-0603
C633 0.1u-0603
C1129
C1130
C102 10u-0805
C106 10u-0805
C114 0.1u-0603
C109 10u-0805
C131 0.1u-0603
C143 10u-0805
10u-0805
10u-0805
X_0.1u-0402
X_0.1u-0402
VCC_DDR
VCC_DDR
MCH MEMORY DECOUPLING
V_FSB_VTT
C113
C440
0.1u-0603
0.1u-0603
FSB GENERIC DECOUPLING
C129
0.1u-0603
V_1P5_CORE
A A
V_1P5_CORE V_1P5_CORE
L12 600L-0603-200mA
L13
10uH-0805-125mA
8
VCCA_DPLLB
+
C152
100u-16V
5+1 mm
C139
1u-0603
C144
0.1u-0603
7
V_1P5_CORE V_1P5_CORE
L11
10uH-0805-125mA
600L-0603-200mA
L10
VCCA_DPLLA VCCA_MPLL
+
C133
100u-16V
5+1 mm
C134
0.1u-0603
6
C141
0.1u-0603
VCCA_HPLL
C1118
0.1u-0603
V_1P5_CORE
5
L15 1uH-0805
L16 0-1206
+
C184
100u-16V
5+1 mm
R167 1RST
R169 1RST
4
V_1P5_PCIEXPRESS
C176
10u-0805
10u-0805
C181
VCCA_GPLL
C154
10u-0805
I = 1.5A
C158
1u-0603
C174
0.1u-0603
Title
Lakeport DMI & SDVO
Size Document N umber Re v
Custom
Date: Sheet
3
2
MICRO-START INT'L CO.,LTD.
MS-7290 1.0
of
83 2 Monday, June 12, 2006
1
5
AN20
AN18
AN17
AN15
AN13
AN4
AN2
AM39
AM37
AM36
AM33
AM9
AM7
AM5
AL43
AL37
U6D
D D
C C
B B
A16
A22
A26
A31
A35
B11
B13
B21
B22
B28
B33
B38
C12
C14
C22
C40
D10
D16
D20
D21
E12
E13
E17
E18
E20
E21
E32
F13
F18
F26
F34
F42
G10
G13
G15
G18
G20
G21
G24
G27
G29
G31
G32
G35
G38
H12
H17
H26
H27
H32
J10
VSS
VSS
VSS
VSS
VSS
VSS
VSS
B4
VSS
B6
VSS
B9
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
C3
VSS
C5
VSS
C7
VSS
VSS
VSS
VSS
VSS
D2
VSS
D5
VSS
VSS
VSS
VSS
VSS
E3
VSS
E4
VSS
E7
VSS
E9
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
F2
VSS
F6
VSS
VSS
VSS
VSS
VSS
VSS
G3
VSS
G5
VSS
G7
VSS
G9
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
J2
VSS
J5
VSS
J7
VSS
VSS
VSS
VSS
J12
J21
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
J24
J43
J38
J29
VSS
VSSK7VSSK6VSSK5VSSK3VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
K20
K15
K13
K12
K10
K27
AN21
VSS
VSS
K32
AN23
VSS
VSS
K34
AN24
VSS
VSS
K37
AN26
VSS
K39
AN27
VSS
VSSL2VSS
AN31
VSS
VSS
L12
4
AN42
VSS
VSS
L13
3
W23
W21
V29
V26
V24
U29
R29
R26
D43
A40
BC9
BB41
BB39
BB34
BB19
BB14
BB11
BB6
BB3
BA42
BA4
AW10
AV37
AV17
AV10
AV2
AU34
AU32
AU29
AU26
AU24
AU21
AU20
AU17
AU15
AU13
AU12
AU9
AU6
AT31
AT27
AT26
AT23
AT21
AT18
AT17
AT12
AR43
AR39
AR37
AR32
AR24
AR20
AR15
AR6
AR1
AP38
AP34
AP29
AP12
AP10
AP7
AP5
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSSD1VSS
VSSA4VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
L31
L29
L26
L24
L42
VSS
VSS
VSS
VSS
VSS
VSS
VSSM9VSSM8VSSM5VSSM3VSS
M21
M20
M13
M10
VSS
VSS
VSSN8VSSN6VSS
N2
N15
N13
M37
M35
VSS
VSS
VSS
VSS
VSS
VSS
VSS
N31
N29
N27
N26
N24
VSS
VSS
VSSP3VSS
VSS
P15
P14
N36
N33
N43
N39
VSSR9VSSR6VSS
VSS
VSS
VSS
VSS
P24
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSST2VSS
VSSU3VSSU5VSSU9VSS
VSS
VSS
VSS
VSS
VSS
VSSV2VSSV8VSS
VSS
VSS
VSS
VSS
P30
P29
P27
P26
R12
R14
T42
R30
R31
R34
R37
R39
U12
U14
V11
V12
V14
V34
V36
U31
U33
U36
U38
V37
VSS
VSS
W25
VSS
VSS
V38
Y24
Y22
Y20
VSS
VSS
VSS
VSS
VSS
VSSW3VSSY2VSSY5VSSY6VSSY9VSS
V39
V43
2
AE19
AD29
AD27
AD24
AD22
AD20
AD18
AC29
AC25
AC19
AA29
AA27
AA25
Y29
Y26
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
Y12
Y14
Y31
Y35
Y37
AF20
AF22
AF24
AY1
BC4
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
AL33
VSS
AL32
VSS
AL27
VSS
AL24
VSS
AL23
VSS
AL21
VSS
AL18
VSS
AL15
VSS
AL13
VSS
AL12
VSS
AL10
VSS
AL7
VSS
AL3
VSS
AL2
VSS
AL1
VSS
AK30
VSS
AK29
VSS
AK26
VSS
AK24
VSS
AJ37
VSS
AJ35
VSS
AJ33
VSS
AJ31
VSS
AJ30
VSS
AJ10
VSS
AJ7
VSS
AH42
VSS
AG39
VSS
AG38
VSS
AG37
VSS
AG36
VSS
AG33
VSS
AG31
VSS
AG30
VSS
AF43
VSS
AF38
VSS
AF36
VSS
AF33
VSS
AF5
VSS
AF3
VSS
AF2
VSS
AF1
VSS
AD42
VSS
AD37
VSS
AD35
VSS
AD33
VSS
AD13
VSS
AD11
VSS
AD9
VSS
AD7
VSS
AC39
VSS
AC38
VSS
AC37
VSS
AC36
VSS
AC31
VSS
AC23
VSS
AC21
VSS
AC14
VSS
AC10
VSS
AC7
VSS
AC3
VSS
AC2
VSS
AB43
VSS
AB2
VSS
AA36
VSS
AA33
VSS
AA31
VSS
AA23
VSS
AA21
VSS
AA14
VSS
AA12
VSS
AA11
VSS
VSS
AE23
VSS
AE25
VSS
VSS
Lakeport
L17
VSS
VSS
VSS
VSS
VSS
Y39
Y42
AA3
AA8
AF18
AE21
1
A A
Title
Lakeport GND
Size Document N umber Re v
Custom
5
4
3
2
Date: Sheet
MICRO-START INT'L CO.,LTD.
MS-7290 1.0
1
of
93 2 Monday, June 12, 2006
8
7
6
5
4
3
2
1
VCC3 VCC_DDR VCC3 VCC_DDR
DATA_B0
DATA_B1
DATA_B2
DATA_B3
DATA_B4
DATA_B5
DATA_B6
DATA_B7
DATA_B8
DATA_B9
DATA_B10
DATA_B11
DATA_B12
DATA_B13
DATA_B14
DATA_B15
DATA_B16
DATA_B17
DATA_B18
DATA_B19
DATA_B20
DATA_B21
DATA_B22
DATA_B23
DATA_B25
DATA_B26
DATA_B27
DATA_B28
DATA_B29
DATA_B30
DATA_B31
DATA_B32
DATA_B33
DATA_B34
DATA_B35
DATA_B36
DATA_B37
DATA_B38
DATA_B39
DATA_B40
DATA_B41
DATA_B42
DATA_B43
DATA_B44
DATA_B45
DATA_B46
DATA_B47
DATA_B48
DATA_B49
DATA_B50
DATA_B51
DATA_B52
DATA_B53
DATA_B54
DATA_B55
DATA_B56
DATA_B57
DATA_B58
DATA_B59
DATA_B60
DATA_B61
DATA_B62
DATA_B63
4
DIMM2
10
122
123
128
129
12
13
21
22
131
132
140
141
24
25
30
31
143
144
149
150
33
34
39
40
152
153
158
159
80
81
86
87
199
200
205
206
89
90
95
96
208
209
214
215
98
99
107
108
217
218
226
227
110
111
116
117
229
230
235
236
11
14
17
20
23
26
29
32
35
38
41
44
47
50
65
66
79
82
85
88
91
94
97
161
162
167
CB042CB143CB248CB349CB4
DM0/DQS9
NC/DQS9#
DM1/DQS10
NC/DQS10#
DM2/DQS11
NC/DQS11#
DM3/DQS12
NC/DQS12#
DM4/DQS13
NC/DQS13#
DM5/DQS14
NC/DQS14#
DM6/DQS15
NC/DQS15#
DM7/DQS16
NC/DQS16#
DM8/DQS17
NC/DQS17#
CK0(DU)
CK0#(DU)
CK1(CK0)
CK1#(CK0#)
CK2(DU)
CK2#(DU)
VSS
VSS
VSS
VSS
VSS
222
225
228
231
DDRII DIMM1&2
Custom
2
168
CB5
CB6
CB7
DQS_B0
DQS0
DQS0#
DQS1
DQS1#
DQS2
DQS2#
DQS3
DQS3#
DQS4
DQS4#
DQS5
DQS5#
DQS6
DQS6#
DQS7
DQS7#
DQS8
DQS8#
A10_AP
A11
A12
A13
A14
A15
A16/BA2
BA1
BA0
WE#
CAS#
RAS#
ODT0
ODT1
CKE0
CKE1
CS0#
CS1#
SCL
SDA
VREF
SA0
SA1
SA2
VSS
VSS
DDRII-240PIN
234
237
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
7
6
16
15
28
27
37
36
84
83
93
92
105
104
114
113
46
45
188
183
63
182
61
60
180
58
179
177
70
57
176
196
174
173
54
190
71
73
74
192
125
126
134
135
146
147
155
156
202
203
211
212
223
224
232
233
164
165
195
77
52
171
193
76
185
186
137
138
220
221
120
119
1
239
240
101
DQS_B#0
DQS_B1
DQS_B#1
DQS_B2
DQS_B#2
DQS_B3
DQS_B#3
DQS_B4
DQS_B#4
DQS_B5
DQS_B#5
DQS_B6
DQS_B#6
DQS_B7
DQS_B#7
MAA_B0
MAA_B1 MAA_B1
MAA_B2 MAA_B2 MAA_B2
MAA_B3
MAA_B4 DATA_B24
MAA_B5
MAA_B6
MAA_B7
MAA_B8
MAA_B9
MAA_B10
MAA_B11
MAA_B12
MAA_B13
SBS_B2
SBS_B1
SBS_B0
WE_B#
CAS_B#
RAS_B#
DQM_B0
DQM_B1
DQM_B2
DQM_B3
DQM_B4
DQM_B5
DQM_B6
DQM_B7
ODT_B0
ODT_B1
SCKE_B0
SCKE_B1
SCS_B#0
SCS_B#1
P_DDR0_B
N_DDR0_B
P_DDR1_B
N_DDR1_B
P_DDR2_B
N_DDR2_B
SMBCLK_DDR
SMBDATA_DDR
DIMM_VREF_B
DQS_B0 {7}
DQS_B#0 {7}
DQS_B1 {7}
DQS_B#1 {7}
DQS_B2 {7}
DQS_B#2 {7}
DQS_B3 {7}
DQS_B#3 {7}
DQS_B4 {7}
DQS_B#4 {7}
DQS_B5 {7}
DQS_B#5 {7}
DQS_B6 {7}
DQS_B#6 {7}
DQS_B7 {7}
DQS_B#7 {7}
SBS_B2 {7,11}
SBS_B1 {7,11}
SBS_B0 {7,11}
WE_B# {7,11}
CAS_B# {7,11}
RAS_B# {7,11}
ODT_B0 {7,11}
ODT_B1 {7,11}
SCKE_B0 {7,11}
SCKE_B1 {7,11}
SCS_B#0 {7,11}
SCS_B#1 {7,11}
P_DDR0_B {7}
N_DDR0_B {7}
P_DDR1_B {7}
N_DDR1_B {7}
P_DDR2_B {7}
N_DDR2_B {7}
VCC3
C171
0.1u-0603
PLACE CLOSE TO DIMM PIN
ADDRESS: 010
0xA4
MAA_B[0..13] {7,11}
DQM_B[0..7] {7}
DDR2 DIMM2
MICRO-START INT'L CO.,LTD.
MS-7290 1.0
10 32 Monday, June 12, 2006
1
of
68
19
102
55
NC
DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQ8
DQ9
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
DQ16
DQ17
DQ18
DQ19
DQ20
DQ21
DQ22
DQ23
DQ24
DQ25
DQ26
DQ27
DQ28
DQ29
DQ30
DQ31
DQ32
DQ33
DQ34
DQ35
DQ36
DQ37
DQ38
DQ39
DQ40
DQ41
DQ42
DQ43
DQ44
DQ45
DQ46
DQ47
DQ48
DQ49
DQ50
DQ51
DQ52
DQ53
DQ54
DQ55
DQ56
DQ57
DQ58
DQ59
DQ60
DQ61
DQ62
DQ63
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
NC
RC118RC0
NC/TEST
VSS
VSS
VSS
VSS
VSS
VSS
100
103
106
109
112
115
3
4
9
2
5
8
VCC_DDR
191
75
VDD051VDD156VDD262VDD372VDD478VDD5
VDD3
VSS
VSS
VSS
VSS
VSS
VSS
VSS
118
121
124
127
130
133
136
R180 1KST
194
VDD6
VSS
139
181
142
175
VDD7
VSS
145
VDD8
VSS
R185
170
VDDQ0
VDDQ153VDDQ259VDDQ364VDDQ4
VSS
VSS
VSS
VSS
148
151
154
157
DIMM_VREF_B
1KST
197
172
VDDQ5
VDDQ469VDDQ7
VSS
VSS
VSS
160
163
166
187
VDDQ6
VSS
169
184
VDDQ7
VSS
198
189
178
VSS
201
204
C926
0.1u-0603
67
VDDQ8
VDDQ9
VSS
VSS
207
VSS
210
238
VDDSPD
VSS
VSS
213
216
219
Title
Size Document N umber Re v
3
Date: Sheet
DIMM1
DATA_A[0..63] {7}
D D
C C
B B
A A
DATA_A0
DATA_A1
DATA_A2
DATA_A3
DATA_A4
DATA_A5
DATA_A6
DATA_A7
DATA_A8
DATA_A9
DATA_A10
DATA_A11
DATA_A12
DATA_A13
DATA_A14
DATA_A15
DATA_A16
DATA_A17
DATA_A18
DATA_A19
DATA_A20
DATA_A21
DATA_A22
DATA_A23
DATA_A24
DATA_A25
DATA_A26
DATA_A27
DATA_A28
DATA_A29
DATA_A30
DATA_A31
DATA_A32
DATA_A33
DATA_A34
DATA_A35
DATA_A36
DATA_A37
DATA_A38
DATA_A39
DATA_A40
DATA_A41
DATA_A42
DATA_A43
DATA_A44
DATA_A45
DATA_A46
DATA_A47
DATA_A48
DATA_A49
DATA_A50
DATA_A51
DATA_A52
DATA_A53
DATA_A54
DATA_A55
DATA_A56
DATA_A57
DATA_A58
DATA_A59
DATA_A60
DATA_A61
DATA_A62
DATA_A63
3
DQ0
4
DQ1
9
DQ2
10
DQ3
122
DQ4
123
DQ5
128
DQ6
129
DQ7
12
DQ8
13
DQ9
21
DQ10
22
DQ11
131
DQ12
132
DQ13
140
DQ14
141
DQ15
24
DQ16
25
DQ17
30
DQ18
31
DQ19
143
DQ20
144
DQ21
149
DQ22
150
DQ23
33
DQ24
34
DQ25
39
DQ26
40
DQ27
152
DQ28
153
DQ29
158
DQ30
159
DQ31
80
DQ32
81
DQ33
86
DQ34
87
DQ35
199
DQ36
200
DQ37
205
DQ38
206
DQ39
89
DQ40
90
DQ41
95
DQ42
96
DQ43
208
DQ44
209
DQ45
214
DQ46
215
DQ47
98
DQ48
99
DQ49
107
DQ50
108
DQ51
217
DQ52
218
DQ53
226
DQ54
227
DQ55
110
DQ56
111
DQ57
116
DQ58
117
DQ59
229
DQ60
230
DQ61
235
DQ62
236
DQ63
2
VSS
5
VSS
8
VSS
11
VSS
14
VSS
17
VSS
20
VSS
23
VSS
26
VSS
29
VSS
32
VSS
35
VSS
38
VSS
41
VSS
44
VSS
47
VSS
50
VSS
65
VSS
66
VSS
79
VSS
82
VSS
85
VSS
88
VSS
91
VSS
94
VSS
97
VSS
55
100
VSS
103
RC118RC0
VSS
19
102
NC
VSS
106
109
68
NC
VDD051VDD156VDD262VDD372VDD478VDD5
NC/TEST
VSS
VSS
VSS
VSS
112
115
118
121
VSS
191
194
181
175
75
170
197
172
187
184
189
67
178
VDD6
VDD7
VDD8
VDD3
VDDQ0
VDDQ153VDDQ259VDDQ364VDDQ4
VDDQ5
VDDQ6
VDDQ7
VDDQ8
VDDQ9
VDDQ469VDDQ7
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
124
127
130
133
136
139
142
145
148
151
154
157
160
163
166
169
198
201
204
207
210
238
VDDSPD
VSS
VSS
213
216
CB042CB143CB248CB349CB4
DM1/DQS10
NC/DQS10#
DM2/DQS11
NC/DQS11#
DM3/DQS12
NC/DQS12#
DM4/DQS13
NC/DQS13#
DM5/DQS14
NC/DQS14#
DM6/DQS15
NC/DQS15#
DM7/DQS16
NC/DQS16#
DM8/DQS17
NC/DQS17#
CK1#(CK0#)
VSS
VSS
VSS
VSS
219
222
225
228
161
162
167
CB5
CB6
DQS0
DQS0#
DQS1
DQS1#
DQS2
DQS2#
DQS3
DQS3#
DQS4
DQS4#
DQS5
DQS5#
DQS6
DQS6#
DQS7
DQS7#
DQS8
DQS8#
A10_AP
A16/BA2
WE#
CAS#
RAS#
DM0/DQS9
NC/DQS9#
ODT0
ODT1
CKE0
CKE1
CS0#
CS1#
CK0(DU)
CK0#(DU)
CK1(CK0)
CK2(DU)
CK2#(DU)
SDA
VREF
VSS
VSS
VSS
231
234
237
168
CB7
7
6
16
15
28
27
37
36
84
83
93
92
105
104
114
113
46
45
188
A0
183
A1
63
A2
182
A3
61
A4
60
A5
180
A6
58
A7
179
A8
177
A9
70
57
A11
176
A12
196
A13
174
A14
173
A15
54
190
BA1
71
BA0
73
74
192
125
126
134
135
146
147
155
156
202
203
211
212
223
224
232
233
164
165
195
77
52
171
193
76
185
186
137
138
220
221
120
SCL
119
1
239
SA0
240
SA1
101
SA2
DDRII-240PIN
DQS_A0
DQS_A#0
DQS_A1
DQS_A#1
DQS_A2
DQS_A#2
DQS_A3
DQS_A#3
DQS_A4
DQS_A#4
DQS_A5
DQS_A#5
DQS_A6
DQS_A#6
DQS_A7
DQS_A#7
MAA_A0
MAA_A1
MAA_A2
MAA_A3
MAA_A4
MAA_A5
MAA_A6
MAA_A7
MAA_A8
MAA_A9
MAA_A10
MAA_A11
MAA_A12
MAA_A13
SBS_A2
SBS_A1
SBS_A0
WE_A#
CAS_A#
RAS_A#
DQM_A0
DQM_A1
DQM_A2
DQM_A3
DQM_A4
DQM_A5
DQM_A6
DQM_A7
ODT_A0
ODT_A0 {7,11}
ODT_A1
ODT_A1 {7,11}
SCKE_A0
SCKE_A0 {7,11}
SCKE_A1
SCKE_A1 {7,11}
SCS_A#0
SCS_A#0 {7,11}
SCS_A#1
SCS_A#1 {7,11}
P_DDR0_A
N_DDR0_A
P_DDR1_A
N_DDR1_A
P_DDR2_A
N_DDR2_A
SMBCLK_DDR
SMBDATA_DDR
DIMM_VREF_A
PLACE CLOSE TO DIMM PIN
ADDRESS: 000
0xA2
DQS_A0 {7}
DQS_A#0 {7}
DQS_A1 {7}
DQS_A#1 {7}
DQS_A2 {7}
DQS_A#2 {7}
DQS_A3 {7}
DQS_A#3 {7}
DQS_A4 {7}
DQS_A#4 {7}
DQS_A5 {7}
DQS_A#5 {7}
DQS_A6 {7}
DQS_A#6 {7}
DQS_A7 {7}
DQS_A#7 {7}
MAA_A[0..13] { 7,11}
SBS_A2 {7,11}
SBS_A1 {7,11}
SBS_A0 {7,11}
WE_A# {7,11}
CAS_A# {7,11}
RAS_A# {7,11}
DQM_A[0..7] {7}
P_DDR0_A {7}
N_DDR0_A {7}
P_DDR1_A {7}
N_DDR1_A {7}
P_DDR2_A {7}
N_DDR2_A {7}
C170
0.1u-0603
DATA_B[0..63] {7}
DDR2 DIMM1
VCC_DDR
R179 1KST
8
DIMM_VREF_A
R184
1KST
C927
0.1u-0603
SMBCLK_DDR
SMBDATA_DDR
7
6
5
R38 33-0603
R30 33-0603
SMBCLK_ISO {21,24,26}
SMBDATA_ISO {21,24,26}
CHANNEL A V_SM_VTT DECOULPING CAPS CHANNEL B V_SM_VTT DECOULPING CAPS
D D
8
C50
10u-1206
C100
X-1206-C
VTT_DDR
VTT_DDR VTT_DDR
DIMM1 termination 5020
VTT_DDR
C C
VTT_DDR
C71
0.1u-0603
C57
0.1u-0603
C76
0.1u-0603
7
C59
0.1u-0603
C55
X-1206-C
C103
0.1u-0603
C73
0.1u-0603
C67
0.1u-0603
C60
0.1u-0603
C83
0.1u-0603
C94
0.1u-0603
C53
0.1u-0603
C51
10u-1206
C95
0.1u-0603
C98
0.1u-0603
C89
0.1u-0603
C81
0.1u-0603
6
MAA_A1
MAA_A2
MAA_A3
MAA_A4
MAA_A6
MAA_A8
MAA_A5
MAA_A9
MAA_A7
MAA_A11
MAA_A12
SBS_A2
MAA_A13
RAS_A# {7,10}
WE_A# {7,10}
CAS_A# {7,10}
MAA_A[0..13] {7,10}
SBS_A[0..2] {7,10}
SCS_A#[0..1] {7,10}
SCKE_A[0..1] {7,10}
ODT_A[0..1] {7,10}
RAS_A#
WE_A#
CAS_A#
SBS_A1
SBS_A0
MAA_A10
MAA_A0
SCS_A#0
ODT_A0
SCKE_A0
SCKE_A1
ODT_A1
SCS_A#1
5
1 2
RN20 33-8P4R-0402
3 4
5 6
7 8
1 2
RN22 33-8P4R-0402
3 4
5 6
7 8
1 2
RN25 33-8P4R-0402
3 4
5 6
7 8
R104 33-0402
R113 33-0402
R110 33-0402
R106 33-0402
1 2
RN88 33-8P4R-0402
3 4
5 6
7 8
R107 43-0402
R105 43-0402
1 2
RN27 43-8P4R-0402
3 4
5 6
7 8
1 2
RN15 43-8P4R-0402
3 4
5 6
7 8
4
VTT_DDR VTT_DDR
WE_B# {7,10}
RAS_B# {7,10}
CAS_B# {7,10}
MAA_B[0..13] {7,10}
SBS_B[0..2] {7,10}
SCS_B#[0..1] {7,10}
SCKE_B[0..1] {7,10}
ODT_B[0..1] {7,10}
3
MAA_B4
MAA_B3
MAA_B2
MAA_B1
MAA_B9
MAA_B5
MAA_B8
MAA_B6
SBS_B2
MAA_B12
MAA_B11
MAA_B7
MAA_B10
MAA_B0
SBS_B0
SBS_B1
WE_B#
RAS_B#
CAS_B#
SCS_B#0
ODT_B0
SCS_B#1
SCKE_B0
SCKE_B1
ODT_B1
MAA_B13
1 2
RN21 33-8P4R-0402
3 4
5 6
7 8
1 2
RN23 33-8P4R-0402
3 4
5 6
7 8
1 2
RN26 33-8P4R-0402
3 4
5 6
7 8
1 2
RN19 33-8P4R-0402
3 4
5 6
7 8
1 2
RN18 33-8P4R-0402
3 4
5 6
7 8
1 2
RN17 43-8P4R-0402
3 4
5 6
7 8
1 2
RN28 43-8P4R-0402
3 4
5 6
7 8
R760 43-0402
R761 33-0402
2
1
Grantsdale GMCH Po we r Seq ue ncing Requirement
Between 1.5V Core and 2.5V DAC
VCC_DDR VCC_DDR
EC43
470u-4V
+
EC40
B B
SMT 3.8mm
Put between
DIMM1 and DIMM2
VCC_DDR
A A
+
EC155
+
EC156
+
470u-4V
470u-4V
470u-4V
C90
1u-0603
8
VCC_DDR
C56
1u-0603
C160
1u-0603
C65
1u-0603
C96
1u-0603
C112
1u-0603
C88
1u-0603
C77
1u-0603
C86
1u-0603
C101
1u-0603
C58
1u-0603
C132
1u-0603
C63
1u-0603
C74
1u-0603
C84
1u-0603
7
6
5
4
VCC3
D S
Q21 NDS351AN-S-SOT23
G
+
CT2
X-0805-C
3
C153
X-0603-C
C157
0.1u-0603
LM358MX-SO8
V_2P5_MCH
+12V
U7A
3
+
1
2
-
4 8
Title
Size Document N umber Re v
Custom
Date: Sheet
2
+
1 2
R168
130RST
R171
120RST
EC45
100u-16V
1P2VREF {13,24}
V_1P5_CORE
MICRO-START INT'L CO.,LTD.
DDRII Termination and MCH2.5V
MS-7290 1.0
C147
0.1u-0603
V_2P5_MCH
D9
1N4001-S-SM-1
11 32 Monday, June 12, 2006
1
of
8
7
6
5
4
3
2
1
C650
X_22p-0603
C651
X_22p-0603
V_2P5_MCH
V_2P5_MCH
V_2P5_MCH
Video Connector
PLACE CLOSE TO MCH,
WITHIN 750 MIL OF
PIN
D D
VGA_RED {8}
VGA_GREEN {8}
VGA_BLUE {8}
VGA_RED
VGA_GREEN
VGA_BLUE
1 2
1 2
R176
150RST
R177
150RST
1 2
C156
0.1u-0603
1 2
R178
C652
150RST
X_22p-0603
C C
VCC5 VCC5 VCC5 VCC5
1PS226
3
D7
BAV99
5VDDCCL
VSYNC_DSUB
HSYNC_DSUB
5VDDCDA VGA_G VGA_12
GS
GS
7
VCC5
D
G
VCC5
D
G
D
S
D
S
R159
2.2K-0603
Q20
2N7002S
SOT23SGD
R158
2.2K-0603
Q22
2N7002S
SOT23SGD
5VDDCCL
5VDDCDA
B B
V_2P5_MCH
R148
2.7K-0603
V_2P5_MCH
MCH_DDC_CLK
R166
2.7K-0603
MCH_DDC_DATA
MCH_DDC_CLK {8}
A A
MCH_DDC_DATA {8}
8
1PS226
2
3
1
D4
BAV99
VSYNC {8}
HSYNC {8}
6
1PS226
2
3
1
D6
X-BAV99
2
1
1
2
13
12
1PS226
3
D10
BAV99
1PS226
3
D11
BAV99
1PS226
3
D12
BAV99
1PS226
3
D5
X-BAV99
VCC5
14 7
U5A
ACT08DR_SOIC14
VCC5
14 7
U5D
ACT08DR_SOIC14
2
1
2
1
2
1
2
1
R123 22-0603
R119 22-0603
VSYNC_5V
3
HSYNC_5V
11
5
L3
0.082uH/300mA
1 2
R121
150RST
1 2
R120
150RST
1 2
R117
150RST
135
246
7
8
CN5
33p-8P4C
VCC5
FS2
F-MINISMDM150/24
VGA_9.1
VGA_15
VGA_15
VGA_12
C80
X-0603-C
C79
X-0603-C
C72
X-0603-C
1 2
C62
0.1u-0603
JVGA1
15
10
14
9
13
8
12
7
11
6
VGA-D15-BL-B-SC
C70
22p-0603
L2
0.082uH/300mA
C68
22p-0603
L1
0.082uH/300mA
C64
22p-0603
17
5
4
3
2
1
16
VCC5
VCC5
VGA_B
VGA_R
Because of the meterial pending, we have change to another RoHs connector.
VCC5
14 7
R138 39-0603
R151 39-0603
VSYNC_DSUB
HSYNC_DSUB
4
4
5
10
9
U5B
ACT08DR_SOIC14
VCC5
14 7
U5C
ACT08DR_SOIC14
3
6
8
Title
VGA connector
Size Document Number Rev
Custom
Date: Sheet
MICRO-START INT'L CO.,LTD.
MS-7290 1.0
2
C424 0.1u-0603
C116 0.1u-0603
12 32 Monday, June 12, 2006
of
1
5
C673 0.1u-0603
SDVOB_Red+ {8}
SDVOB_Red- {8}
SDVOB_Green+ {8}
SDVOB_Green- {8}
SDVOB_Blue+ {8}
SDVOB_Blue- {8}
D D
SDVOB_Clk+ {8}
SDVOB_Clk- {8}
VCC3 VCC3_SB
15LCD_CLK
D
U38
1
A0
2
A1
3
A2
VSS4SDA
X_24C16
LCD15_ENABLE
R1245 4.7K-0603
LCD_S1_ENA {15}
VCC5_SB
R1203 1K-0603
S
S
G
D
VCC
SCL
VCC3
G S
R808
4.7K-0603
ENA_VDD#
SOT23SGD
C C
+12V
B B
ENA_VDD
High Active
1P2VREF {11,24}
5V_PANEL
A A
R1228
R1227
0-1206
0-1206
D S
G
Q156
N-IPD09N03LA_TO252
1 2
C674 0.1u-0603
1 2
C675 0.1u-0603
1 2
C676 0.1u-0603
1 2
C677 0.1u-0603
1 2
C679 0.1u-0603
1 2
C684 0.1u-0603
1 2
C686 0.1u-0603
1 2
R1240
X_4.7K-0603
Q158
X_2N7002S
G S
G
WP
SOT23SGD
2N7002S
D
Q160
R1229
0-1206
R1235 10K-0603
C1127
X_0.1u-0603
DISCHARGE CIRCUIT:
5V 640mA 2ms
8
7
6
5
R800
X_0-0603
5
6
7
D
Q72
4.7K-0603
1 2
X_1K-0603
R799
VCC14CLR
Q
Q
GND
X_VHCT74
G
S
G S
Q161
D
D
2N3904S
R1174
C1035
0.1u-0603
ENA_VDD#
R1241
X_4.7K-0603
Q159
X_2N3904S
R1242
VCC5
U60A
CK
PR
2N7002S
R1246
X_0-0603
1P2VREF_LVDS
5
X_1K-0603
C700
X_0.1u-0603
1
2
D
3
4
D
SOT23SGD
GS
R797
X_5.6K-0603
1 2
Q157
D
2N7002S
D
D
S
G
+12V
5
+
6
-
2.5V_CH7308
2.5V_CH7308
VCC3
ENA_VDD
1 2
C1126
X_0.1u-0603
15LCD_CLK
G S
G
S
SOT23SGD
Q71
2N7002S
SOT23SGD
+12V
U7B
5
+
6
-
8 4
R1097
390RST
R1098
130RST
AVDD
DVDD
AVDD_PLL
2.5V_CH7308
R795
10K-0603
R796
X_100k
R798
X_5.6K-0603
1 2
SC_PROM
SD_PROM
VCC3
R1243
X_4.7K-0603
VCC3
C1125
X_10u-1206-16V
+12V
R810
4.7K-0603
7
LM358MX-SO8
4 8
R1226 33-0603
7
LM358MX-SO8
U55B
ENA_VDD#
NDS351AN-S-SOT23
FB21 80L-0805
FB22 80L-0805
FB23 80L-0805
SDVO_CTRL_CLK {8}
SDVO_CTRL_DATA {8}
R1236 4.7K-0603
R1237
X_4.7K-0603
R1094
200RST
D S
Q155
G
C680
10u-1206
1 2
C687
10u-1206
1 2
C690
10u-1206
ENA_BKL
ENA_VDD STALL+
Any-One PCIRST
PLTRST# {6,14,17,21,23}
Y5
14.3181MHz
XTAL70:XTAL85
10_10_5 PPM
C696
47p-0603
PANEL_DETECT
R1244
0-0603
High-15"
Low -17"
LCD15_ENABLE
+12V
FS11
F-MINISMDM150/24
D S
N-IPD09N03LA_TO252
G
Q121
VGS(on)=1~3V
11V
D S
N-IPD09N03LA_TO252
G
Q122
R1096 1.05KST
7.5V
D S
N-IPD09N03LA_TO252
G
Q124
5V_PANEL
5+1 mm
1 2
C688
0.1u-0603
C691
0.1u-0603
1 3
+
EC154
C681
0.1u-0603
1 2
R1175
4.7K-0603
C695
47p-0603
C1024
10u-1206-16V
100u-16V
4
1 2
C682
0.1u-0603
C689
0.1u-0603
2.5V_CH7308
R1176
4.7K-0603
VCC3 VCC3
2.2K-0603
FB26 80L-0805
C1023
10u-1206-16V
+
EC159
+
EC160
100u-16V
4
1 2
C683
0.1u-0603
59
60
64
58
62
61
TST263TST1
AVDD
AGND
1
R805
ENABKL
2
ENAVDD
3
AVDD_PLL
4
RESET*
5
AS
6
SPC
7
SPD
8
AGND_PLL
9
SD_PROM
10
SC_PROM
11
SD_DDC
12
SC_DDC
13
DGND
14
XI
15
XO
16
DVDD
C1058
10u-1206-16V
+
EC158
R803
2.2K-0603
+12V
LL2C
17
100u-16V
SDVOB_CLK+
SDVOB_CLK--
Chrontel
CH7308
64 pin - LQFP
LL2C*18LVDD
LDC7*21LGND
LDC7
19
22
23
20
C701
10u-1206-16V
16V/CAP: C701 PN: C11-1063027-T34
100u-16V
C707
10u-0805
DISCHARGE
NDS351AN-S-SOT23
N-IPD09N03LA_TO252
1 2
C708
0.1u-0603
G
Q145
D S
D S
Q153
G
R1218
33-0603
57
56
54
55
AVDD
SDVOB_B-
SDVOB_G-
SDVOB_B+
LDC6*24LVDD
LDC6
26
25
1
U55A
LM358MX-SO8
WP: PULL HIGH -Write Protect Enable
PULL LOW -Normal Operation
STALL-
STALL+
49
53
50
51
52
TST3
DVDD
AGND
SDVOB_R-
SDVOB_R+
SDVOB_G+
SDVOB_STALLÂSDVOB_STALL+
LGND28LDC5*27LDC5
29
1 2
C702
0.1u-0603
VSWING
DGND
LDC4*30LDC4
32
31
VSWING
LDC0*
LDC0
LVDD
LDC1*
LDC1
LGND
LDC2*
LDC2
LVDD
LL1C*
LL1C
LGND
LDC3*
LDC3
U37
1 2
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
C697
0.1u-0603
VCC5
STALL-
C1014
X_10u-0805
1 2
Vo = Vref (1+R2/R1) + Iadj x R2
Vref = 1.25V; Iadj = 55uA
+12V
1P2VREF_LVDS
R1055
8 4
+
-
210RST
3
2
0.1u-0603
R1056
120RST
C709
3
C698
0.1u-0603
3
C678 0.1u-0603
C685 0.1u-0603
1 2
FB25 80L-0805
C699
10u-1206
R801 2.4K-0603
Q143
LT1087S_SOT89
VIN3VOUT
VOUT
ADJ
1
C710
10u-0805
5+1 mm
1 2
1 2
C692
0.1u-0603
2
4
3.3V_PANEL
R1219
0-1206
+
EC157
100u-16V
N-IPD09N03LA_TO252
1 2
VCC3
LVDD1
C693
0.1u-0603
2.5V_CH7308
R1220
0-1206
D S
G
Q154
R1153
130RST
R1154
130RST
SDVO_STALL- {8}
SDVO_STALL+ {8}
R1234
10K-0603
C1015
0.1u-0603
VCC3
R1238 0-0603
VCC3
FB24 80L-0805
C694
10u-1206
D49 X_1N5817/S
R1221
0-1206
C1128
X_0.1u-0603
DISCHARGE CIRCUIT:
3.3V 640mA 2ms
N_FPC6P_2MM
N32-1060270-H06
INVERTOT
C1045
10u-0805
2 4
351
5V_PANEL
PS_ON# {23}
R1239 X_0-0603
2
INVERTER CONNECTOR
J3
7
+12V
7
1
1
2
2
ENA_INV
3
3
4
4
5
5
6
6
8
1 2
8
NO STUFF FOR 7290
R1206
0-0603
RV1
RSK010-1
6
7
BRIGHT_CTRL
R1205
X_0-0603
ENA_VDD# DISCHARGE
2
5V_BRIGHT_CTRL_PWR
C1034
0.1u-0603
15" PANEL
A0M
A0P
A1M
A1P
A2M
A2P
CLK1M
CLK1P
R1095
2.2K-0603
VCC5
FB39
80L-0805
C1069
10u-0805
1
VCC3_SB
R1165
Q147
2N3904S
4.7K-0603
R1207
1K-0603
High Active
ENA_BKL
R1202 1K-0603
Level Shift
17" PANEL
A3M
A3P
A4M
A4P
A5M
A5P
A6M
A6P
CLK2M
CLK2P
A7M
A7P
PANEL_DETECT {15}
5V_PANEL
1 2
C1056
0.1u-0603
C1057
1 2
0.1u-0603
U54A
LM358MX-SO8
1
+
100u-16V
3.3V_PANEL
A0M
A0P
A1M
A1P
A2M
A2P
CLK1M
CLK1P
+12V
8 4
5
+
6
-
7
LM358MX-SO8
U54B
VCC5
D S
NDS351AN-S-SOT23
G
Q123
2
3
1 2
C1018
0.1u-0603
+12V
SCLK_DDC
-
+
8 4
SDAT_DDC
EC153
5+1 mm
Title
Size Do c um e n t N u mb er Re v
C
Date: Sheet
MICRO-START INT'L CO.,LTD.
SDVO LVDS CH7308A
MS-7290 1.0
1
VCC5
R1164
4.7K-0603
ENA_INV
D
Q146
D
2N7002S
SOT23SGD
GS
S
G
LCD17
1
31
2
32
3
33
4
34
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
HONDA_LVC-C30SFYG_LVDS
<CONN NAME>
N5Q-30F0030-H21
LCD15
1
1
2
2
3
3
4
4
5
5
6
6
7
7
8
8
9
9
10
10
11
11
12
12
13
13
14
14
15
15
16
16
17
17
18
18
19
19
20
20
21
21
22
22
23
23
24
24
25
25
26
26
X_IPEX-20143
5V_BRIGHT_CTRL_PWR
13 32 Monday, June 12, 2006
of
8
7
6
5
4
3
2
1
U19A
AH28
A20M#
AG27
CPUSLP#
AG26
FERR#
AG22
AD0
IRDY# {28,29}
TRDY# {28,29}
STOP# {28,29}
PAR {28,29}
SERR# {28,29}
PERR# {28,29}
PIRQ#D
AD1
AD2
AD3
AD4
AD5
AD6
AD7
AD8
AD9
AD10
AD11
AD12
AD13
AD14
AD15
AD16
AD17
AD18
AD19
AD20
AD21
AD22
AD23
AD24
AD25
AD26
AD27
AD28
AD29
AD30
AD31
C_BE#0
C_BE#1
C_BE#2
C_BE#3
G15
G13
AH21
AH16
E18
C18
A16
F18
E16
A18
E17
A17
A15
C14
E14
D14
B12
C13
E12
C11
D11
A11
A10
F11
F10
E9
D9
B9
A8
A6
C7
B6
E6
D6
B15
C12
D12
C15
A12
F16
A7
F14
F15
E10
E11
B10
C9
B19
A9
B18
D7
C16
C17
E13
A13
C8
E7
D16
D17
F13
A14
D8
A3
B4
C5
B5
G8
F7
F8
G7
P5
P2
P6
R2
P1
AD0
AD1
AD2
AD3
AD4
AD5
AD6
AD7
AD8
AD9
AD10
AD11
AD12
AD13
AD14
AD15
AD16
AD17
AD18
AD19
AD20
AD21
AD22
AD23
AD24
AD25
AD26
AD27
AD28
AD29
AD30
AD31
C/BE0#
C/BE1#
C/BE2#
C/BE3#
DEVSEL#
FRAME#
IRDY#
TRDY#
STOP#
PAR
PLOCK#
SERR#
PERR#
PME#
PCICLK
PCIRST#
REQ0#
REQ1#
REQ2#
REQ3#
GPIO22/REQ4#
GPIO1/REQ5#
GNT0#
GNT1#
GNT2#
GNT3#
GPIO48/GNT4#
GPIO17/GNT5#
PIRQA#
PIRQB#
PIRQC#
PIRQD#
GPIO2/PIRQE#
GPIO3/PIRQF#
GPIO4/PIRQG#
GPIO5/PIRQH#
SERIRQ
IDEIRQ
SPI_MOSI
SPI_MISO
SPI_CS#
SPI_CLK
SPI_ARB
VSS_0A4VSS_1
VSS_2B1VSS_3B8VSS_4
A23
CPU LAN PCI EXPRESS DIRECT MEDIA
PCI INTERFACE INTERRUPT
ICH 7
PART 1/3
SPI
VSS_5
VSS_6
VSS_7
VSS_8
VSS_9
VSS_10C2VSS_11C6VSS_12
VSS_13
VSS_14
VSS_15
VSS_16
VSS_17E1VSS_18E2VSS_19E8VSS_20
VSS_21F3VSS_22F4VSS_23F5VSS_24
VSS_25
VSS_26
VSS_27G1VSS_28G2VSS_29G5VSS_30G6VSS_31G9VSS_32
VSS_33
VSS_34
F12
F27
B11
B14
B17
B20
B26
B28
D10
D13
D18
D21
D24
F28
E15
G14
G18
G21
AD[0..31] {28,29}
D D
RN89
ICH_PCLK {26}
PREQ#5
PGNT#0
PGNT#2
PGNT#5
1 2
3 4
5 6
7 8
RN90 X_0-8P4R
C_BE#[0..3] {28,29}
LOCK# {28}
R303 33-0603
X-0603-C C241
PREQ#0
PREQ#1
PREQ#2
PREQ#3
PREQ#4
R306 0-0603
R307 0-0603
PIRQ#A {28,29}
PIRQ#B {28,29}
PIRQ#C {28}
PIRQ#E {28}
PIRQ#F {28}
PIRQ#G {28}
PIRQ#H {28}
SERIRQ {21,23,29}
IDE_IRQ {17}
7 8
5 6
3 4
1 2
Stuff if share
SPI.
PGNT#5
R313
X-0603-R
DEVSEL# {28,29}
FRAME# {28,29}
PCI_PME# {28,29}
C C
PCIRST_ICH6# {24}
PREQ#0 {29}
PREQ#2 {28}
PGNT#0 {29}
PGNT#2 {28}
B B
VCC3_SB
PREQ#1
PREQ#2
A A
PREQ#4
PREQ#3
PREQ#5
PIRQ#D
PIRQ#C
PREQ#0
10K-8P4R
SPI_MISO {27}
SPI_CS# {27}
SPI_MOSI {27}
SPI_CLK {27}
SPI_ARB {27}
1 2
VCC3
3 4
RN44
5 6
8.2K-8P4R
7 8
1 2
3 4
RN45
5 6
8.2K-8P4R
7 8
VCC3 --- 8.2kOhm
IGNNE#
INIT3_3V#
STPCLK#
A20GATE
THRMTRIP#
GPO49/CPUPWRGD
PLTRST#
PERN_1
PERP_1
PETN_1
PETP_1
PERN_2
PERP_2
PETN_2
PETP_2
PERN_3
PERP_3
PETN_3
PETP_3
PERN_4
PERP_4
PETN_4
PETP_4
PERN_5
PERP_5
PETN_5
PETP_5
PERN_6
PERP_6
PETN_6
PETP_6
DMI_0RXN
DMI_0RXP
DMI_0TXN
DMI_0TXP
DMI_1RXN
DMI_1RXP
DMI_1TXN
DMI_1TXP
DMI_2RXN
DMI_2RXP
DMI_2TXN
DMI_2TXP
DMI_3RXN
DMI_3RXP
DMI_3TXN
DMI_3TXP
DMI_CLKN
DMI_CLKP
DMI_ZCOMP
DMI_IRCOMP
LAN_CLK
LAN_RSTSYNC
LAN_RXD0
LAN_RXD1
LAN_RXD2
LAN_TXD0
LAN_TXD1
LAN_TXD2
EE_DIN
EE_DOUT
EE_SHCLK
VSS_35
VSS_36
VSS_37
VSS_38H3VSS_39H4VSS_40
H5
G24
G25
G26
INIT#
INTR
SMI#
RCIN#
EE_CS
AF22
AG21
AF25
AH24
NMI
AF23
AH22
AG23
AE22
AF26
AG24
HSO_N1_C
HSO_P1_C
R247 33-0603
R251 24.9RST
C26
F26
F25
E28
E27
H26
H25
G28
G27
K26
K25
J28
J27
M26
M25
L28
L27
P26
P25
N28
N27
T25
T24
R28
R27
V26
V25
U28
U27
Y26
Y25
W28
W27
AB26
AB25
AA28
AA27
AD25
AD24
AC28
AC27
AE28
AE27
C25
D25
V3
U3
U5
V4
T5
U7
V6
V7
W1
W3
Y2
Y1
ICH7
H_A20M# {3}
H_FERR# {3}
H_IGNNE# {3}
H_INIT# {3}
FWH_INIT# {17}
H_INTR {3}
H_NMI {3}
ICH_H_SMI# {3}
H_STPCLK# {3}
KBRST# {21}
A20GATE {21}
H_PWRGD {3,4}
C286 0.1u-0603
C1013 0.1u-0603
DMI_MTN_IRN_0 {8}
DMI_MTP_IRP_0 {8}
DMI_ITN_MRN_0 {8}
DMI_ITP_MRP_0 {8}
DMI_MTN_IRN_1 {8}
DMI_MTP_IRP_1 {8}
DMI_ITN_MRN_1 {8}
DMI_ITP_MRP_1 {8}
DMI_MTN_IRN_2 {8}
DMI_MTP_IRP_2 {8}
DMI_ITN_MRN_2 {8}
DMI_ITP_MRP_2 {8}
DMI_MTN_IRN_3 {8}
DMI_MTP_IRP_3 {8}
DMI_ITN_MRN_3 {8}
DMI_ITP_MRP_3 {8}
CK_PE_100M_ICH# {26}
CK_PE_100M_ICH {26}
TRMTRIP# {3}
PLTRST# {6,13,17,21,23}
V_DMI {16}
HSI_N1 {27}
HSI_P1 {27}
HSO_N1 {27}
HSO_P1 {27}
VCC5 --- 2.7kOhm
8
7
6
5
4
3
V_FSB_VTT
R384 62-0603
V_FSB_VTT
R387 62-0603
TRMTRIP#
THERMTRIP# ca n b e r o u t e d n e x t to FERR#
with 5mil spacing to others 7mil.
H_FERR#
PLACE AT ICH EN D O F ROUTE
SERIRQ
R274 10K-0603
KBRST#
R270 10K-0603
A20GATE
R277 10K-0603
Title
ICH7 PCI/DMI/CPU/IRQ
Size Document N umber Re v
Custom
Date: Sheet
2
MICRO-START INT'L CO.,LTD.
MS-7290 1.0
VCC3
14 32 Monday, June 12, 2006
of
1
8
LPC_AD[0..3] {17,21,23}
D D
AC_RST# {20}
AC_SDOUT {20}
AC_SYNC {20}
AC_BITCLK {20}
AC_SDIN0 {20}
C377
X-0603-C
C C
OC#1 {19}
0.1u-0603
SMBDATA {21,27}
B B
R336 1M-0603
VBAT
A A
2 1
C107
SMBCLK {21,27}
SW_ON# {21,23}
PWR_GD
8
LPC_DRQ#0 {21}
LPC_FRAME# {17,21,23}
RN51 33-8P4R-0402
X-0603-C
R326 22.6RST-0402
RSMRST# {24,27}
CK_14M_ICH {26}
CK_48M_USB_ICH {26}
LPC_AD0
LPC_AD1
LPC_AD2
LPC_AD3
7 8
5 6
3 4
1 2
C395
USB0- {19}
USB0+ {19}
USB1- {19}
USB1+ {19}
USB2- {19}
USB2+ {19}
USB3- {19}
USB3+ {19}
USB4- {19}
USB4+ {19}
USB5- {19}
USB5+ {19}
OC#2 {19}
OC#3 {19}
R295 33-0603
R291 33-0603
GPI11
SM_LINK0
SM_LINK1
LINK_ALERT#
PWR_GD {6,24}
VRM_GD {24,25}
FP_RST# {3,23}
SLP_S3# {21,23,24}
SLP_S4# {21,24}
LPCPD# {23}
SUSCLK {21}
INTRUDER#
WAKE# {27}
RI# {22}
THERM# {21}
ICH_SYNC# {6}
SPKR {21}
BATTLOW#
R777 X-10K-0603
GPI23
ACBITCLK
ACRST#
ACSDOUT
ACSYNC
USB_BIAS
SMBCLK_ICH
SMBDATA_ICH
RSMRST#
PWR_GD
SLP_S3#
SLP_S4#
WAKE#
RI#
THERM#
ICH_SYNC#
TP_1
TP_2
TP_3
7
AA6
LAD0
AB5
LAD1
AC4
LAD2
Y6
LAD3
AC3
LDRQ_0#
AA5
LDRQ_1#/GPI023
AB3
LFRAME#
U1
ACZ_BCLK
R5
ACZ_RST#
T2
ACZ_SDIN_0
T3
ACZ_SDIN_1
T1
ACZ_SDIN_2
T4
ACZ_SDOUT
R6
ACZ_SYNC
F1
USBP_0N
F2
USBP_0P
G4
USBP_1N
G3
USBP_1P
H1
USBP_2N
H2
USBP_2P
J4
USBP_3N
J3
USBP_3P
K1
USBP_4N
K2
USBP_4P
L4
USBP_5N
L5
USBP_5P
M1
USBP_6N
M2
USBP_6P
N4
USBP_7N
N3
USBP_7P
D3
OC_0#
C4
OC_1#
D5
OC_2#
D4
OC_3#
E5
OC_4#
C3
GPIO29/OC_5#
A2
GPIO30/OC_6#
B3
GPIO31/OC_7#
D1
USBRBIAS
D2
USBRBIAS#
C22
SMBCLK
B22
SMBDATA
B23
GPIO11/SMBALERT#
B25
SMLINK_0
A25
SMLINK_1
A26
LINKALERT#
Y4
RSMRST#
C19
LAN_RST#
C23
PWRBTN#
AA4
PWROK
AD22
VRMPWRGD
A22
SYS_RESET#
B24
SLP_S3#
D23
SLP_S4#
F22
SLP_S5#
A27
SUS_STAT#
C20
SUSCLK
Y5
INTRUDER#
F20
WAKE#
A28
RI#
AF20
THRM#
AH20
MCH_SYNC#
A19
SPKR
C21
BATLOW#/TP_0
AF24
DPRSTP#/TP_1
AH25
DPSLP#/TP_2
F21
TP_3
AC1
CLK14
B2
CLK48
VSS_41
VSS_42
VSS_43
VSS_44J1VSS_45J2VSS_46J5VSS_47
VSS_48
J24
J25
H24
H27
U19B
ICH7
Following are the GPIOs that need to be terminated properly if not used:
GPIO[39:36,23:21,19,7:0]: default as inputs and should be pulled up to Vcc3_3 if unused.
GPIO[31:29,15:8]: default as inputs and should be pulled up to VccSus3_3 if unused.
7
J26
H28
VSS_49
VSS_50
K24
6
ICH 7
PART 2/3
MISC POWER MGNT SM BUS USB AC-LINK LPC
VSS_51
VSS_52
VSS_53
VSS_54
VSS_55
VSS_56
VSS_57
VSS_58M3VSS_59M4VSS_60M5VSS_61
L13
L15
L24
L25
L26
K27
K28
6
M12
VSS_62
M13
M14
VSS_63
VSS_64
M15
M16
VSS_65
VSS_66
M17
M24
VSS_67
VSS_68
M27
M28
VSS_69
P-ATA S-ATA
GPIO RTC
VSS_70N1VSS_71N2VSS_72N5VSS_73N6VSS_74
VSS_75
N11
N12
5
GPIO21/SATA_0GP
GPIO19/SATA_1GP
GPIO36/SATA_2GP
GPIO37/SATA_3GP
GPIO16/DPRSLPVR
GPIO20/STPCPU#
EL_RSVD/GPIO26
EL_STATE0/GPIO27
EL_STATE1/GPIO28
GPIO32/CLKRUN#
GPIO33/AZ_DOCK_EN#
GPIO34/AZ_DOCK_RST#
GPIO35/SATACLKREQ#
VSS_76
VSS_77
VSS_78
VSS_79
VSS_80
VSS_81
N13
N14
N15
N16
N17
N18
5
DDACK#
DDREQ
DIOR#
DIOW#
IORDY
DCS1#
DCS3#
DD_0
DD_1
DD_2
DD_3
DD_4
DD_5
DD_6
DD_7
DD_8
DD_9
DD_10
DD_11
DD_12
DD_13
DD_14
DD_15
SATA_0RXN
SATA_0RXP
SATA_0TXN
SATA_0TXP
SATA_1RXN
SATA_1RXP
SATA_1TXN
SATA_1TXP
SATA_2RXN
SATA_2RXP
SATA_2TXN
SATA_2TXP
SATA_3RXN
SATA_3RXP
SATA_3TXN
SATA_3TXP
SATA_CLKN
SATA_CLKP
SATARBIASN
SATARBIASP
SATALED#
BMBUSY#/GPIO0
GPIO6
GPIO7
GPIO8
GPIO9
GPIO10
GPIO12
GPIO13
GPIO14
GPIO15
GPIO18/STPPCI#
GPIO24
GPIO25
GPIO38
GPIO39
VCCRTC
INTVRMEN
RTCRST#
RTCX1
RTCX2
VSS_82
VSS_83
VSS_84
VSS_85
P3
N24
N25
N26
DA0
DA1
DA2
AF16
AE15
AF15
AH15
AG16
AH17
AE17
AF17
AE16
AD16
AB15
AE14
AG13
AF13
AD14
AC13
AD12
AC12
AE12
AF12
AB13
AC14
AF14
AH13
AH14
AC15
AF3
AE3
AG2
AH2
AE5
AD5
AG4
AH4
AF7
AE7
AG6
AH6
AD9
AE9
AG8
AH8
AF1
AE1
AH10
AG10
AF18
AF19
AH18
AH19
AE19
AB18
AC21
AC18
E21
E20
A20
F19
E19
R4
E22
AC22
AC20
AF21
R3
D20
A21
B21
E23
AG18
AC19
U2
AD21
AD20
AE20
W5
W4
AA3
AB1
AB2
PDD0
PDD1
PDD2
PDD3
PDD4
PDD5
PDD6
PDD7
PDD8
PDD9
PDD10
PDD11
PDD12
PDD13
PDD14
PDD15
SATA_BIAS
SATALED#
GPIO0
SIO_SMI#
GPI8
GPI9
GPI10
SIO_PME#
GPI13
GPI14
GPI15
R1233 X_33-0603
R1231 33-0603
GPI38
GPI39
INTVRMEN
RTC_RST#
RTCX1
RTCX2
4
PD_DACK# {17}
PD_DREQ {17}
PD_IOR# {17}
PD_IOW# {17}
PD_ IORDY {17}
PD_A0 {17}
PD_A1 {17}
PD_A2 {17}
PD_CS#1 {17}
PD_CS#3 {17}
SATA_RX#0 {18}
SATA_RX0 {18}
SATA_TX#0 {18}
SATA_TX0 {18}
CK_ICHSATA# {26}
CK_ICHSATA {26}
R305 24.9RST
SATALED# {23}
1 2
3 4
5 6
7 8
PANEL_DETECT {13}
SIO_SMI# {21}
SIO_PME# {21}
LAN_DISABLE# {27}
LCD_S1_ENA {13}
BIOS_WP# {17}
R328 330K-0603
4
PDD[0..15] {17}
VCC3
RN39
10K-8P4R
HWSPND# {29}
VBAT
VBAT
3
C329
C323
C354
C446
C385
C331
C388
C372
3
0.1u-0603
0.1u-0603
0.1u-0603
0.1u-0603
0.1u-0603
0.1u-0603
0.1u-0603
10u-0805
S-BAT54C_SOT23
2
VCC3
VCC3
* Put a GND Plane under X'TAL
* Please put this block close ICH6
FP_RST#
RI#
LPCPD#
LINK_ALERT#
SM_LINK0
SM_LINK1
GPI14
GPI11
GPI8
GPI15
BATTLOW#
GPI10
GPI9
SIO_PME#
GPI13
WAKE#
LAN_DISABLE#
LCD_S1_ENA
PANEL_DETECT
LPC_DRQ#0
GPI38
SIO_SMI#
GPIO0
GPI39
GPI23
THERM#
AC_BITCLK
SATALED#
R298 10K-0603
1K-0603
R763
R1230 10K-0603
R1247 X_10K-0603
R335 10K-0603
R293 10K-0603
R281 10K-0603
R324 10K-0603
TP_1
R391 X-0603-R
TP_2
R263 X-0603-R
TP_3
R273 X-0603-R
R302 10K-0603
RTC BLOCK
CLR_CMOS
Normal
VCC3_SB
BAT1
VBAT
2
R333 20K-0603
3
D17
1
C397
1u-0805
R330
1K-0603
RTCX1
32K-12.5pf-CSA-309-D
RTCX2
Title
ICH7 LPC/ATA/USB/ GPIO
Size Document N umber Re v
Custom
Date: Sheet
MS-7290 1.0
2
release
push JBAT1
Clear CMOS
RTC_RST#
C396
1u-0805
15p-0402 C383
R323
Y4
10MST-0402
15p-0402 C381
MICRO-START INT'L CO.,LTD.
1
1 2
3 4
RN31
5 6
10K-8P4R
7 8
1 2
RN30
3 4
10K-8P4R
5 6
7 8
1 2
RN36
3 4
10K-8P4R
5 6
7 8
1 2
RN37
3 4
10K-8P4R
5 6
7 8
1 2
3 4
RN34
5 6
10K-8P4R
7 8
R331 20K-0603
*
R744
4.7K-0603
of
15 32 Monday, June 12, 2006
1
VCC3_SB
VCC3
VCC3
VCC3
VCC3
D1x3-BK
1
2
3
JBAT1
8
V_1P5_CORE
D D
V_DMI {14}
C C
80L-1206
560u-2.5V
L17
C274
0.1u-0603
C276
0.1u-0603
C277
1u-0603
EC52
V_DMI
+
M22
M23
W22
W23
AA22
AA23
AB22
AB23
AC23
AC24
AC25
AC26
AD26
AD27
AD28
7
D26
VCC1_5_B
D27
VCC1_5_B
D28
VCC1_5_B
E24
VCC1_5_B
E25
VCC1_5_B
E26
VCC1_5_B
F23
VCC1_5_B
F24
VCC1_5_B
G22
VCC1_5_B
G23
VCC1_5_B
H22
VCC1_5_B
H23
VCC1_5_B
J22
VCC1_5_B
J23
VCC1_5_B
K22
VCC1_5_B
K23
VCC1_5_B
L22
VCC1_5_B
L23
VCC1_5_B
VCC1_5_B
VCC1_5_B
N22
VCC1_5_B
N23
VCC1_5_B
P22
VCC1_5_B
P23
VCC1_5_B
R22
VCC1_5_B
R23
VCC1_5_B
R24
VCC1_5_B
R25
VCC1_5_B
R26
VCC1_5_B
T22
VCC1_5_B
T23
VCC1_5_B
T26
VCC1_5_B
T27
VCC1_5_B
T28
VCC1_5_B
U22
VCC1_5_B
U23
VCC1_5_B
V22
VCC1_5_B
V23
VCC1_5_B
VCC1_5_B
VCC1_5_B
Y22
VCC1_5_B
Y23
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
1.5V DMI POWER 1.5V CORE WELL POWER
6
AD4
AD7
VSS_169
VSS_170
AD8
AD11
VSS_171
VSS_172
AD15
AD19
AD23
AE2
AE4
AE8
AE11
AE13
AE18
VSS_173
VSS_174
VSS_175
VSS_176
VSS_177
VSS_178
VSS_179
VSS_180
VSS_181
ICH 7
PART 3/3
AE21
AE24
VSS_182
VSS_183
AE25
AF2
VSS_184
VSS_185
AF4
AF8
VSS_186
VSS_187
AF11
AF27
VSS_188
VSS_189
AF28
AG1
VSS_190
VSS_191
5
AG3
AG7
VSS_192
VSS_193
AG14
AG17
VSS_194
VSS_195
AG20
AG25
VSS_196
VSS_197
AH1
AH3
VSS_198
VSS_199
AH7
AH23
VSS_200
VSS_201
AH27
VSS_202
4
ICH7
U19C
AD17
V5REF1
G10
V5REF2
A5
VCC3_3-1
AA7
VCC3_3-2
AB12
VCC3_3-3
AB20
VCC3_3-4
AC16
VCC3_3-5
AD13
VCC3_3-6
AD18
VCC3_3-7
AG12
VCC3_3-8
AG15
VCC3_3-9
AG19
VCC3_3-10
AH11
VCC3_3-11
B13
VCC3_3-12
B16
VCC3_3-13
B27
VCC3_3-14
B7
VCC3_3-15
C10
VCC3_3-16
D15
VCC3_3-17
F9
VCC3_3-18
G11
VCC3_3-19
G12
VCC3_3-20
G16
VCC3_3-21
U6
VCC3_3-22
VCCDMIPLL
VCC1_05-1
VCC1_05-2
VCC1_05-3
VCC1_05-4
VCC1_05-5
VCC1_05-6
VCC1_05-7
VCC1_05-8
VCC1_05-9
VCC1_05-10
VCC1_05-11
VCC1_05-12
VCC1_05-13
VCC1_05-14
VCC1_05-15
VCC1_05-16
VCC1_05-17
VCC1_05-18
VCC1_05-19
VCC1_05-20
AE23
AE26
AH26
AG28
AD2
C1
L11
L12
L14
L16
L17
L18
M11
M18
P11
P18
T11
T18
U11
U18
V11
V12
V14
V16
V17
V18
VCC_CPU_IO-1
VCC_CPU_IO-2
VCC_CPU_IO-3
VCCSATAPLL
S0 POWER S5 POWER
VCCUSBPLL
3
5VREF
VCC3
V_FSB_VTT
L18 1uH-0805
C285 0.01u-0603
C375 0.1u-0603
C386
0.1u-0402
C234
1u-0603
C196
0.1u-0603
C236
1u-0603
V_1P05_CORE
C291
0.1u-0603
C444
1u-0603
R243 1RST
L35
10uH-0805-125mA
C1110
10u-0805
V_1P5_CORE
V_1P5_CORE
V_1P5_CORE
2
5VREF Sequencing Circuit
DZ1
1N5817/S
VCC3
0.1u-0603
5VREF
C339
R315 1K-0603
C348 0.1u-0603
1
VCC5 VCC3
V_1P5_CORE
A1
VCC1_5-1
AB10
VCC1_5-2
AB17
VCC1_5-3
AB7
VCC1_5-4
AB8
VCC1_5-5
AB9
B B
V_1P5_CORE
C345 10u-0805
C356 10u-0805
A A
C349
0.1u-0603
C366
0.1u-0603
C275
0.1u-0603
8
AC10
AC17
AC6
AC7
AC8
AD10
AD6
AE10
AF10
AG5
AG9
AH5
AH9
VCC1_5-6
VCC1_5-7
VCC1_5-8
VCC1_5-9
VCC1_5-10
VCC1_5-11
VCC1_5-12
VCC1_5-13
VCC1_5-14
AE6
VCC1_5-15
VCC1_5-16
AF5
VCC1_5-17
AF6
VCC1_5-18
AF9
VCC1_5-19
VCC1_5-20
VCC1_5-21
VCC1_5-22
VCC1_5-23
F17
VCC1_5-24
G17
VCC1_5-25
H6
VCC1_5-26
H7
VCC1_5-27
J6
VCC1_5-28
J7
VCC1_5-29
T7
VCC1_5-30
VSS_106
VSS_107
VSS_108
VSS_109
VSS_110
VSS_111
VSS_112
VSS_113
VSS_114
VSS_115
VSS_116
VSS_117
VSS_118
VSS_119
VSS_120
VSS_121
VSS_122
VSS_123
VSS_124
VSS_125
VSS_126
VSS_127
VSS_128
VSS_129
VSS_130
VSS_131
VSS_132
VSS_133
VSS_134
VSS_135
VSS_136
VSS_137
VSS_138
VSS_139
VSS_140
VSS_141
VSS_142
VSS_143
VSS_144
VSS_145
VSS_146
VSS_147
VSS_148
VSS_149
VSS_150
VSS_151
VSS_152
VSS_153
VSS_154
VSS_155
VSS_156
VSS_157
VSS_158
VSS_159
VSS_160
VSS_161
VSS_162
VSS_163
VSS_164
VSS_165
VSS_166
VSS_167
VSS_168
P4
7
P24
P17
P16
P15
P14
P13
P12
E4
R1
P28
P27
R13
R12
R11
AG11
T6
R18
R17
R16
R15
R14
C27
6
U4
T17
T16
T15
T14
T13
T12
U14
U13
U12
V2
V24
V15
V13
U26
U25
U24
U17
U16
U15
5
Y3
W6
V28
V27
W24
W25
W26
Y28
Y27
Y24
AB6
AB4
AA1
AA25
AA24
AA26
AB11
AB14
AB16
AB19
4
VSS_104
VSS_105
AB24
AB21
VSS_102
VSS_103
AB28
AB27
V5REF_SUS
VCCSUS3_3-1
VCCSUS3_3-2
VCCSUS3_3-3
VCCSUS3_3-4
VCCSUS3_3-5
VCCSUS3_3-6
VCCSUS3_3-7
VCCSUS3_3-8
VCCSUS3_3-9
VCCSUS3_3-10
VCCSUS3_3-11
VCCSUS3_3-12
VCCSUS3_3-13
VCCSUS3_3-14
VCCSUS3_3-15
VCCSUS3_3-16
VCCSUS3_3-17
VCCSUS3_3-18
VCCSUS3_3-19
VCCSUS3_3-20
VCCSUS3_3-21
VCCSUS3_3-22
VCCSUS3_3-23
VCCSUS3_3-24
VCCSUS1_05-1
VCCSUS1_05-2
VCCSUS1_05-3
VCCSUS1_05-4
VCCSUS1_05-5
VSS_100
VSS_101
AC9
AC5
AC2
VSS_98
VSS_99
AD1
AC11
VSS_96
VSS_97
AD3
F6
C387
A24
C24
D19
D22
E3
G19
K3
K4
K5
K6
L1
L2
L3
L6
L7
M6
M7
N7
P7
R7
V1
V5
W2
W7
AA2
C28
G20
K7
Y7
0.1u-0402
C389
C399
VCC3_SB
3
0.1u-0603
C301
0.1u-0603
10u-0805
VCC5_SB
Title
ICH7 Power
Size Document N umber Re v
Custom
Date: Sheet
2
MICRO-START INT'L CO.,LTD.
MS-7290 1.0
of
16 32 Monday, June 12, 2006
1
5
PRIMARY IDE BLOCK
HD_RST# {24}
D D
PD_DREQ {15}
PD_IOW# {15}
PD_IOR# {15}
PD_IORDY {15}
PD_DACK# {15}
IDE_IRQ {14}
PD_A1 {15}
PD_A0 {15}
PD_CS#1 {15}
IDEACTP# {18,23}
VCC5
C C
R211
4.7K-0603
HD_RST#
R1047
8.2K-0603
PDD7
PDD6
PDD5
PDD4
PDD3
PDD2
PDD1
PDD0
VCC5 VCC5
R213
4.7K-0603
VCC3
4
IDE1
1 2
3 4
5 6
7 8
9 10
11 12
13 14
15 16
17 18
19 20
21 22
23 24
25 26
27 28
29 30
31 32
33 34
35 36
37 38
39 40
41 42
43 44
ODD_CONN
N_IDE_CONN_44P
<MSI-BOM>
R1161 0-0603
PDD8
PDD9
PDD10
PDD11
PDD12
PDD13
PDD14
PDD15
28 pin CSEL
H:SLAVE
L:MASTER
ATADET
VCC5 power 5pins (20, 32, 41, 42, 44)
3
PDD[0..15] {15}
PD_A2 {15}
PD_CS#3 {15}
VCC5
VCC5
R1208
X_10K-0603
0-0603
R1210
R1209
0-0603
2
VCC5
CB53
0.1u-0603
1
CB54
0.1u-0603
EC146
+
X_100u-16V
FIRMWARE HUB (FWH)
VCC3
CB2
VCC3
LPC_AD0 {15,21,23}
LPC_AD1 {15,21,23}
LPC_AD2 {15,21,23}
BIOS_WP# {15}
X-0603-C
REV2
REV1
R60 1K-0603
BIOS_WP#
VCC3
PLTRST# {6,13,14,21,23}
ATADET0
R1048
0-0603
B B
BIOS1
1
VPP
2
RST#
3
FGPI3
4
FGPI2
5
FGPI1
6
FGPI0
7
WP#
8
TBL#
9
ID3
10
ID2
11
ID1
12
ID0
13
FWH0
14
FWH1
15
FWH2
16
GND
X_PLCC32-SMT
CB20
0.1u-0603
VCC
CLK
FGPI4
IC(VIL)
GNDA
VCCA
GND
VCC
INIT#
FWH4
RFU
RFU
RFU
RFU
RFU
FWH3
FWH RESISTORS
REV3
REV2
F_GPI4
REV1
VCC5 +12V
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
C427
0.1u-0603
VCC3
FWH_INIT#
FWH_PCLK
F_GPI4 REV3
C37
X-0603-C
1 2
3 4
5 6
7 8
FWH_PCLK {26}
FWH_INIT# {14}
LPC_FRAME# {15,21,23}
LPC_AD3 {15,21,23}
C32
X-0603-C
RN2
10K-8P4R
DB_PCLK {26}
LPC_FRAME#
LPC_AD0
LPC_AD1
LPC_AD2
LPC_AD3
PCIRST#2 {24,28}
C210
X_0.1u-0603
C211
1u-0603
13
14
15
16
17
18
19
U58
PCICLK
LFRAME#
LAD0
LAD1
LAD2
LAD3
PCIRST#
VCC3
20
10
LEDA
LEDB
VCC3
VCC3
LEDC
LEDD
LEDE
LEDF
LEDG
DGH#
DGL#
GND
GND
2
12
X_AK2001_SSOP20
3
4
5
6
7
8
9
1
11
R1187 X_100RST-1206
R1211 X_100RST-1206
R1188 X_100RST-1206
R1212 x_100RST-1206
75mW(per segment) x 7 = 525mW
6
8
7
F
B
G
B
A
G
F
B
A
G
F
C1DP2E3COM#24D
9
10
LED1
A
COM#1
DP
C
D
E
DP
C
D
E
X_LED-G-7SEG-RH
5
C213
X-0603-C
A A
5
C212
X-0603-C
NO STUFF FOR 7290
Title
IDE/FWH/AK2001
Size Document Number Rev
Custom
4
3
2
Date: Sheet
MICRO-START INT'L CO.,LTD.
MS-7290 1.0
17 32 Monday, June 12, 2006
1
of
5
1.8VDD_8040
4
3
2
1
T0 = OPEN ( INT PD )
T1 = OPEN ( INT PU )
T2 = OPEN ( INT PD )
R887
X-10K-0603
T3 = 1
T4 = OPEN ( INT PD )
T5 = 0
D D
MPD_DREQ
MPDD0
MPDD1
MPDD14
MPDD15
61
63
62
64
MPD_DACK#
MPD_IORDY
MPD_IOR#
MPD_IOW#
60
58
59
MPD_A1
MIDE_IRQ
MPD_A2
MPD_A0
H_PDIANG_N: "0" ATA interface signal in Normal Order
54
56
53
51
55
57
52
U42
mode
T6 = OPEN ( INT PD )
T7 = OPEN ( INT PD )
CONFIG0 = OPEN ( INT PD )
CONFIG1 = 0
3VDD_8040
1.8VDD_8040
C C
CONFIG:010
ATAIOSEL:
Chip(PU)
1:Enable
0:Disable
C757
27p-0603
B B
3VDD_8040
AGND_8040
MPDD13
MPDD12
MPDD3
MPDD11
MPDD4
MPDD10
MPDD5
MPDD9
MPDD6
MPDD8
MPDD7
MHD_RST#
PCIRST#1 {24,27,29}
R898 2M-0603
X1
25M-18pf-HC49S-D
1
H_DD[13]
2
H_DD[2]
3
H_DD[12]
4
VDDIO_4
5
H_DD[3]
6
H_DD[11]
7
H_DD[4]
8
GND_8
9
VDD_9
10
H_DD[10]
11
H_DD[5]
12
H_DD[9]
13
H_DD[6]
14
H_DD[8]
15
H_DD[7]
16
H_RESET_N
PCIRST#1
R894 X-10K-0603
R895 X-10K-0603
R900
330-0603
C758
27p-0603
AGND_8040
H_DD[0]
H_DD[1]
H_DD[14]
RST_N17CNFG018CNFG119CNFG220ATAIOSEL21XTLIN/OSC22XTLOUT23VAA124VSS1
GND_57
H_DD[15]
H_DMARQ
H_DIOR_N
H_DIOW_N
88SA8040 Sabre
25
R897
12.1KST
AGND_8040
VDD_56
H_IORDY
ISET26VSS2
H_DA[2]49H_DA[0]50H_DA[1]
H_INTRQ
H_IOCS16_N
H_DMACK_N
H_DASP_N/T1
DEVICE_ID/T0
RX_P
VAA229RX_M
27
28
MST_TX#0
MST_TX0
AGND_8040
H_CS_N0
H_CS_N1
H_PDIAG_N
UAO
VDDIO_44
GND_42
VDD_41
PLUGIN/T7
PM_EN/T6
FIX_UDMA/T5
RECLK1/T4
REFCLK0/T3
SSC_EN/T2
TX_M31TX_P
32
30
MST_RX0
MST_RX#0
UAI
3VAA_8040
MPD_CS#1
48
MPD_CS#3 MPDD2
47
H_PDIANG_N
46
45
44
43
42
41
40
39
38
37
36
35
34
33
TP20
TP21
R889 X-10K-0603
R890 10K-0603
R891
T[0:1]Vender ID
T[4:3]PD 01: 25MHz
T2(PD):Spread Spectrum 150MB
TX_P/M:Output_Pin
RX_P/M:Input_Pin
Vo=1.25*(1+130/300)+55*130*10E(-6)=1.7988V
3.3V to 1.8V Linear Regulator
Q150
LT1087S_SOT89
VIN3VOUT
ADJ
1
VOUT
SOT89
C1040
10u-0805
1 2
C1037
0.1u-0603
3VDD_8040
R888 10K-0603
1.8VDD_8040
VCC3
X-10K-0603
VCC5 VCC5
MHD_RST#
R896
5.6K-0603
IDEACTP# {17,23}
R899 X-0603-R
R904
X_4.7K-0603
VCC5
VCC18_8040 VCC5
2
4
R1177
300RST
C1038
0.1u-0603
R1178
130RST C760 0.01u-0603
C1039
10u-0805
VCC5
CB55
0.1u-0603
MPD_DREQ
MPD_IOW#
MPD_IOR#
MPD_IORDY
MPD_DACK#
MIDE_IRQ
MPD_A1
MPD_A0
MPD_CS#1
CB56
0.1u-0603
MPDD7
MPDD6
MPDD4
MPDD3
MPDD2
MPDD1
MPDD0
R905
10K-0603
R906
4.7K-0603
3VDD_8040
EC147
+
X_100u-16V
IDE2
1 2
3 4
5 6
7 8
9 10
11 12
13 14
15 16
17 18
19 20
21 22
23 24
25 26
27 28
29 30
31 32
33 34
35 36
37 38
39 40
41 42
43 44
HDD_CONN
N_IDE_CONN_44P
<MSI-BOM>
SATA_TX0 {15}
SATA_TX#0 {15}
SATA_RX#0 {15}
SATA_RX0 {15}
CONFIG2 = OPEN ( INT PD )
The following system configuration is assumed:
1. SSC is disabled (T2=0)
2. 25MHz reference clock (T[4:3] = 01b)
3. No fixed UDMA mode (T5=0)
4. Disable power management (T6 = 0)
MPDD8
MPDD9
MPDD10 MPDD5
MPDD11
MPDD12
MPDD13
MPDD14
MPDD15
MPD_A2
MPD_CS#3
R901
10K-0603
Caps must near TXP/M,RXP/M 100ohm
differential impedance
C759 0.01u-0603
C761 0.01u-0603
C762 0.01u-0603
VCC5
CSEL
VCC5
MST_TX0
MST_TX#0
MST_RX#0
MST_RX0
R892
10K-0603
R902
X_10K-0603
R893
X_10K-0603
R903
10K-0603
VCC3
FB27 80L-0805
C763
2.2u-0603
3VDD_8040
C764
2.2u-0603
C765
2.2u-0603
C766
2.2u-0603
C767
0.1u-0603
FB28
80L-0805
C768
0.1u-0603
C769
2.2u-0603
C770
0.1u-0603
3VAA_8040
C771
0.01u-0603
AGND_8040
C772
1000p-0603
VCC18_8040 1.8VDD_8040
FB29 80L-0805
C773
2.2u-0603
C774
2.2u-0603
C775
2.2u-0603
C776
2.2u-0603
C777
2.2u-0603
C778
0.1u-0603
C779
0.1u-0603
C780
0.1u-0603
Title
Marvell 88SA8040
Size Document Number Rev
A3
Date: Sheet
MICRO-START INT'L CO.,LTD.
MS-7290 1.0
A
18 32 Monday, June 12, 2006
of
E
D
C
B
A
POWER CIRCUIT FOR USB PORT 4,5 POWER CIRCUI T FOR USB PORT 0,1,2,3
FS13 X_F-MINISMDM150/24
SVCC1
4 4
USB_STR1
FS10 2.6A-MINISMDM260-S
R788
27KST
OC#2 {15}
R794
51KST
0.1u-0603
C669
X-0603-C
C668
NEAR USB CONNECTOR
R791
470-0603
USB_STR
OC#1 {15}
FS8 2.6A-MINISMDM260-S
R786
27KST
R792
C670
0.1u-0603
51KST
FRONT USB CONNECTOR
C665
0.1u-0603
SVCC3
R789
470-0603
USB_STR
OC#3 {15}
R787
27KST
R793
51KST
REAR PANEL USB CONNECTOR FOR USB PORT 0,1,2,3
SVCC1
5 2
USBR2-
6
D34
IP4220
USBR2+
USBR2ÂUSBR3+
USBR3-
1
3 3
USB2+ {15}
USB2- {15}
USB3+ {15}
USB3- {15}
L24
CMC_90ohm
L37
CMC_90ohm
4 3
1 2
4 3
1 2
USBR3-
4
USBR3+ USBR2+
3
USBR2ÂUSBR2+
USBR3ÂUSBR3+
C671
0.1u-0603
1
2
3
4
1
2
3
4
SVCC1
+
1 2
CONN4
_BH1X4#_brown-RH-1
CONN5
_BH1X4#_brown-RH-1
CT8
1000u-6.3V
USB0- {15}
USB0+ {15}
USB1- {15}
USB1+ {15}
CHANGE FOR 7290
2 2
SVCC1
USBR4-
L38
CMC_90ohm
4 3
USB4+ {15}
USB4- {15}
USB5+ {15}
1 1
USB5- {15}
CMC_90ohm
E
1 2
L23
4 3
1 2
USBR4+
USBR4ÂUSBR5+
USBR5-
5 2
6
1
D
USBR5-
4
USBR5+ USBR4+
3
D35
IP4220
10
9
1
2
3
4
CONN1
5
1
DOWN
UP
SVCC1
1 2
+
CT7
1000u-6.3V
11
5
6
7
8
12
USBR5- USBR4ÂUSBR5+ USBR4+
C
FRONT PANEL USB CONNECTOR FOR USB PORT 4,5
CT10
1000u-6.3V
SVCC3
5 2
4
3
USB connectors
MS-7290 1.0
VCC5
1 2
+
CT12
1000u-6.3V
CMC_90ohm
CMC_90ohm
C1065
0.1u-0603
L36
L25
V_1P5_CORE
+
1 2
CT13
1000u-6.3V
1 2
1 2
C1066
0.1u-0603
C672
X-0603-C
4 3
SBD0ÂSBD0+
SBD1ÂSBD1+
4 3
SBD0ÂSBD0+ SBD1+
B
6
1
V_2P5_MCH
C1067
10u-1206
Title
Size Document Number Rev
Custom
Date: Sheet
SVCC3
+
1 2
CONN3
9
5
10
1
2
3
4
1
DOWN
VCC5_SB
SBD0ÂSBD0+ SBD1+
SBD1-
D36
IP4220
UP
+
1 2
CT14
1000u-6.3V
11
5
6
7
8
12
MICRO-START INT'L CO.,LTD.
19 32 Monday, June 12, 2006
A
of
SBD1-
GPIO_0 H - Function OK; L - MUTE
EAPD
AC_SDOUT {15}
AC_BITCLK {15}
AC_SDIN0 {15}
AC_SYNC {15}
AC_RST# {15}
R955 0-0603
R956 22-0603
C1093
X_0.1u-0603
R1216 10-0603
C840
X_22p-0603
VCC3
EAPD
C834
10u-0805
1
2
3
4
5
6
7
8
9
10
11
12
R1215 X_10-0603
DVDD1
GPIO2
GPIO3
DVSS1
SDATA_OUT
BIT_CLK
DVSS2
SDATA_IN
DVDD2
SYNC
RESET#
PCBEEP
48
R951
20K-0603
SURR-R/HP-OUT-R
39
44
43
42
GPIO0
AVSS2
41
HP-OUT-R
MIC1-L
40
JDREF/NC
MIC1-R SURR-L/HP-OUT-L
37
38
AVDD2
HP-OUT-L
LINE-VREFO-R
MIC1-VREFO-R
LINE2-VREFO
MIC2-VREFO
LINE1-VREFO-L
MIC1-VREFO-L
24
LINE1-R
LINE1-L
45
47
NC246NC1
GPIO1
SPDIFO
SPDIF/EAPD
ALC262
Sense A13LINE2-L14LINE2-R15MIC2-L16MIC2-R17CDL18CD-GND19CDR20MIC1-L21MIC1-R22LINE1-L23LINE1-R
AGND
FRONT-R
FRONT-L
Sense B
DCVOL
VREF
AVSS1
AVDD1
ALC 262
AUDIO CODE REGULATORS
+12V +5VA
1 2
C836
0.1u-0603
C841
X_0.1u-0603
Q98
LT1087S_SOT89
VIN3VOUT
ADJ
1
C842
X_0.1u-0603
VOUT
SOT89
X_0.1u-0603
2
4
C843
+5VA
U46
36
R954
35
10K-0603
34
33
32
31
30
29
28
27
26
25
10u-0805
C833
C835
10u-0805
C839 10u-0805
VCC5
MIC1_VREF0_R
MIC1_VREF0_L
AGND
FB35 80L-0805
C845
0.1u-0603
AGND
C846
10u-0805
5V_AUDIO_OP
EC152
100u-16V
AGND
FB37 80L-0805
FB34 80L-0805
FB38 80L-0805
AGND
Vo=1.25*(1+475/150)+55*475*10E(-6)=5.23V
FOR EMI
C844
X_0.1u-0603
1N5817/S
R952
150RST
R953
475RST
D39
C837
0.1u-0603
OUT_RÂOUT_R+
OUT_LÂOUT_L+
VCC5_SB
D44
1N4148/S
OUT_R- {23}
OUT_R+ {23}
OUT_L- {23}
OUT_L+ {23}
C838
10u-0805
AGND
EAPD
PWR_OK {21,23,24}
R1156 0-0603
R1155 X_10K-0603
C1036
X_0.1u-0603
SURR-R/HP-OUT-R
S
G
G S
2N7002S
SURR-L/HP-OUT-L
R1217
10K-0603
SOT23SGD
Q139
D
C850
2.2u_0805
C851
2.2u_0805
D
C859
2.2u_0805
2.2u_0805
C849
X_5p_0603
R962 20K-0603
R963 20K-0603
R1146
4.7K-0603
VCC5_SB
R965 20K-0603
R966 20K-0603 C860
C866
X_5p_0603
AGND
X_5p_0603
R958
20K-0603
C856
2.2u_0805
C858
2.2u_0805
R971
20K-0603
C847
R1214 0-0603
C865
X_5p_0603
R957
20K-0603
21
20
11
19
R970
20K-0603
RLINEIN
RHPIN
8
SHUTDOWN
9
MUTE_OUT
MUTE_IN
RBYPASS
6
LBYPASS
5
LHPIN
4
LLINEIN
5V_AUDIO_OP
GND1GND
GND13GND
12
AGND
LINE-IN
HP_OUT_L
C1111
100p-0603
HP_OUT_R
C1112
100p-0603
LINE-OUT
GREEN
R959
1K-0603
R969 1K-0603
20 32 Monday, June 12, 2006
MIC1_VREF0_L
LINE1-L
LINE1-R
MIC1-L
MIC1-R
MIC1_VREF0_R
C855 1u-0603
C857 1u-0603
R967 2.2K-0603
OUT_L+
OUT_R+
R968 2.2K-0603
C852 1u-0603
C853 1u-0603
L29 300L-0603
L30 300L-0603
EC98 100u-16V
R1222 47-0603
EC97 100u-16V R960 20K-0603
L27 300L-0603
L28 300L-0603
C861
100p-0603
Title
HD AUDIO ALC262
Size Document Number Re v
Custom
Date: Sheet
SE/BTL
R1223 47-0603
C863
C862
C864
100p-0603
100p-0603
AGND
100p-0603
MICRO-START INT'L CO.,LTD.
MS-7290 1.0
C848
0.1u-0603
R961
100K-0603
SE/BTL
OUT_R+
OUT_R-
SE/BTL#
HP/LINE#
OUT_L-
OUT_L+
U47
OUT_R+
22
15
14
16
2
TJ
17
NC
23
NC
10
3
TPA0202
OUT_R-
R964
100K-0603
C854
0.1u-0603
OUT_LÂOUT_L+
AGND
18
7
VDD|L
VDD|R
GND
24
25
AGND
AGND
A1
A2
A3
A4
A5
B1
B2
B3
B4
B5
C1
C2
C3
C4
C5
BLUE
AGND
of
AUDIO-JK1
1
2345 54321 5 4321
JACKx3
MIC
RED
8
7
6
5
4
3
2
1
RN84
VCC5
FDD1
1
1
2
2
3
3
4
4
5
5
6
6
7
7
8
8
9
9
10
10
11
11
12
12
13
13
14
14
15
15
16
16
17
17
18
18
19
19
20
20
21
21
22
22
23
23
24
24
25
25
26
26
IPEX-20143
FDD_LED1 {23}
21 32 Monday, June 12, 2006
1
2 1
X-0603-C
C718
BZ1
BUZZER-LF
VCC3
LP_D5
LP_D4
LP_D3
LP_D2
LP_D1
LP_D0
VBAT
X-0603-R
3
VCC3
5 6
R820
1M-0603
14 7
U59C
74LCX14MX-SOIC14
LP_SLIN# {22}
LP_INIT# {22}
Pasword Clear
"0":Normal
"1":Clear
2
1
HEADER1X2
SPKROUT {29}
pull up
pull up
RTSA#
1 2
3 4
5 6
7 8
1 2
3 4
5 6
7 8
R1200
10K-0603
LP_SLCT {22}
RN82
33-8P4R-0402
VCC3
R812
10K-0603
R813
VCC3
VCC3_SB
C711 0.1u-0603
C712 0.1u-0603
C713 0.1u-0603
C714 0.1u-0603
D D
C C
SMBUS isolation
VCC3
RN83 10K-8P4R
1 2
3 4
5 6
7 8
SMB Slave Address = 0101110B
B B
VTIN_GND {3}
SMBUS slave
addresess
0101110b
CPUFAN2_PWM
CPUFAN1_PWM
A A
R823 10K-0603
R824 10K-0603
near by PWM
Q79
2N3904S
8
RN78
1K-8P4R-0603
VCC3_SB
2200p-0603
CPU_TMPA {3}
C717
VCC5
246
135
LPC_FRAME# {15,17,23}
LPC_DRQ#0 {15}
PLTRST# {6,13,14,17,23}
SIO_PCLK {26}
SERIRQ {14,23,29}
SMBCLK_ISO {10,24,26}
SMBDATA_ISO {10,24,26}
C716
SYS_TMP
2200p-0603
SYS_GND
8
1K-0603
7
CK_14M_SIO {26}
LPC_AD[0..3] {15,17,23}
SIO_SMI# {15}
SUSCLK {15}
SIO_PME# {15}
SMBCLK {15,27}
SMBDATA {15,27}
R826 10K-0603
PSU_FAN {23}
CPUFAN2_PWM {22}
CPU_FAN2 {22}
CPUFAN1_PWM {22}
CPU_FAN1 {22}
pull up
VCC_DDR
VCC3
THERM# {15}
VCCP
+12V
VCC5
7
(OD)
SYS_GND
SYS_TMP
VCC3_SB
VCC3_SB
DRVDEN0
INDEX#
MOA#
DSA#
DIR#
STEP#
WRDATA#
WE#
TRACK0#
WP#
RDDATA#
HEAD#
DSKCHG#
LPC_AD0
LPC_AD1
LPC_AD2
LPC_AD3
U39
3
GP40/DRVDEN0
14
INDEX~
5
MTR0~
7
DS0~
9
DIR~
10
STEP~
11
WDATA~
12
WGATE~
15
TRK0~
16
WRTPRT~
17
RDATA~
13
HDSEL~
6
DSKCHG~
18
CLOCKI
19
LAD0
20
LAD1
21
LAD2
22
LAD3
23
LFRAME~
24
LDRQ~
25
PCIRST~
26
PCICLK
27
SERIRQ
36
GP27/IO_SMI~/P17
99
CLKI32
90
GP42/IO_PME_S3~
92
IO_PME_S5~/GP43
93
GP61/LED2~
94
GP60/LED1~/WDT
102
SDA2
103
SCLK2
104
SDA1
105
SCLK1
106
SCLK
107
SDA
112
FANTACH4/ADDR_SEL
109
PWM3/ADDR_EN#
113
VID5/FANTACH3
110
PWM2
114
FANTACH2
111
PWM1/XTESTOUT
115
FANTACH1
108
HWM_INT~
116
VID4
117
VID3
118
VID2
119
VID1
120
VID0
123
REMOTE2-
124
REMOTE2+
125
REMOTE1-
126
REMOTE1+
127
VCCP_IN
128
+5VTR_IN
1
+12V_IN
2
+5V_IN
R769 2.7K-0603
R776 2.7K-0603
SMBCLK
SMBDATA
6
power for Hardware Monitor
VCC3
4
29
35
44
72
VCC
VCC
VCC
VCC
VCC
N_QFP128S
VCC3_SB
122
HVCC
LPC Inte rface Floppy Interface
Serial Port 2 Keyboard/
SMBus FAN Control
Hardware Monitoring
and FAN Control
VSS
VSS
VSS
VSS
VSS
VSS
8
31
43
101
HVSS
55
74
121
VBAT
C715
1u-0603
91
32
VTR
VBAT
SLCT
PE
BUSY
ACK~
PD7
PD6
PD5
PD4
PD3
PD2
PD1
PD0
SLCTIN~
Parallel Port Interface Serial Port 1
GP54/DSR2~/FANTACH6
GP56/CTS2-/FANTACH5
Mouse
IDE_RSTDRV~/GP10
GP11/PCIRST_OUT1~
GP12/PCIRST_OUT2~
GP13/PCIRST_OUT3~
GP14/PCIRST_OUT4~
System Signals
AVSS
34
Final Pinout - Rev 0.51 - 11/21/02
INIT~
ERROR~
ALF~
STROBE~
DCD1~
DSR1~
RXD1
RTS1~
TXD1
CTS1~
DTR1~
RI1~
GP51/DCD2~
GP52/RXD2/IRRX
GP55/RTS2-/PWM5
GP53/TXD2/IRTX
GP57/DTR2-/PWM4
GP50/RI2~
KCLK/GP22
KDAT/GP21
MCLK/GP33
MDAT/GP32
GP36/KBDRST~
GP37/A20M
SPEAKER
INTRD_IN~
FPRST~
PWRGD_PS
PWRGD_CPU
PWRGD_3V
3VSB_GATE~
3V_GATE~
SLP_S5~
SLP_S3~
PB_IN~
RSMRST~
SCH5017
5
56
57
58
59
54
53
52
51
50
49
48
47
46
45
60
61
62
64
67
65
68
66
69
70
63
73
77
75
78
76
79
80
71
38
37
40
39
41
42
28
97
96
95
87
30
33
81
82
83
84
85
86
88
89
98
100
ALF_AFD
ERR#
BEEP
RN79
33-8P4R-0402
1 2
3 4
5 6
7 8
RN80 33-8P4R-0402
1 2
3 4
5 6
7 8
ERR#
ALF_AFD
R815
33-0603
DCDA# {22}
DSRA# {22}
SINA {22}
RTSA# {22}
SOUTA {22}
CTSA# {22}
DTRA# {22}
RIA# {22}
KBCLK#
KBDAT#
MSCLK#
MSDAT#
KBRST# {14}
A20GATE {14}
PWR_OK {20,23,24}
SLP_S4# {15,24}
SLP_S3# {15,23,24}
SW_ON# {15,23}
4
LP_AFD# {22}
LP_ERR# {22}
LP_ACK# {22}
LP_BUSY {22}
LP_D7
LP_D6
LP_STB# {22}
SIO_ADDR
H: 0x04E
L: 0x02E
RN81 33-8P4R-0402
KBCLK {22}
KBDATA {22}
MSCLK {22}
MSDATA {22}
Pin81 are internally
pull-up to VTR
(DEFAULT)
VCC3
R1198
10K-0603
VCC5
R825 10K-0603 R814
BEEP
SPKR {15} LP_PE {22}
LP_D[0..7] {22}
J4
DSA#
Title
Size Document Number Rev
A3
Date: Sheet of
SPEAKER
C E
R1199
4.7K-0603
R827
4.7K-0603
R828
2.7K-0603
Q152
B
2N3904S
1 2
3 4
5 6
C E
Q78
B
2N3904S
7 8
150-8P4R
Q80
2N3904S
FLOPPY CONNECTOR
VCC5
INDEX#
DSA#
DSKCHG#
MOA#
DIR#
DRVDEN0
STEP#
WRDATA#
WE#
TRACK0#
WP#
RDDATA#
HEAD#
VCC5
R1213
10K-0603
R1185
470-0603
D
Q151
G
2N7002
S
MICRO-START INT'L CO.,LTD.
SIO SCH5017
MS-7290 1.0
2
5
SERIAL PORT 1
VCC5
C566
0.1u-0603
DTRA# {21}
RTSA# {21}
D D
SOUTA {21}
D30
1N4148/S
DCDA
RXDA
RIA
CTSA
DSRA
U36
20
VCC
2
RIN1
3
RIN2
4
RIN3
7
RIN4
9
RIN5
16
DIN1
15
DIN2
13
DIN3
11
GND
GD75232_SSOP20
ROUT1
ROUT2
ROUT3
ROUT4
ROUT5
DOUT1
DOUT2
DOUT3
V+
V-
1
19
18
17
14
12
5
6
8
10
+12V -12V
+12VC
C567
0.1u-0603
C568 0.1u-0603
-12VC
D31
1N4148/S
DTRA
RTSA
TXDA
DCDA# { 21}
SINA {21}
RIA# {21}
CTSA# {21}
DSRA# {21}
+12VC -12VC
Wake On Modem Header
4
DCDA
RXDA
TXDA
DTRA
DCDA
RXDA
RIA
DTRA
RTSA
CTSA
TXDA
DSRA
1
2
CN6
3
4
220p-8P4C
5
6
7
8
1
2
CN7
3
4
220p-8P4C
5
6
7
8
10 11
COM1
DSRA
1
6
RTSA
2
7
CTSA
3
8
RIA
4
9
5
COMCONN
3
2
LPT1
1
PARALLAL PORT
VCC5
LP_D[0..7]
D29 1N4148/S
LP_BUSY
LP_ACK#
LP_ERR#
LP_AFD#
LP_D2
LP_D3
LP_D4
LP_D5
LP_INIT#
LP_SLIN#
LP_D0
LP_D1
LP_D6
LP_D7
LP_SLCT
LP_PE
no part number
1
2
3
4
5
6
7
8
1
2
3
4
5
6
7
8
1
2
3
4
5
6
7
8
1
2
3
4
5
6
7
8
R467 1K-0603
RN66
1K-8P4R-0603
RN67
1K-8P4R-0603
RN69
1K-8P4R-0603
RN68
1K-8P4R-0603
LP_PE
LP_SLCT
LP_D7
LP_D6
LP_D5
LP_D4
LP_D3
LP_D2
LP_D1
LP_D0
LP_SLIN#
LP_INIT#
LP_AFD#
LP_ERR#
LP_ACK#
LP_BUSY
LP_STB# LP_STB#
1
3
5
7
1
3
5
7
1
3
5
7
1
3
5
7
C569
220p-0603
2
4
6
8
2
4
6
8
2
4
6
8
2
4
6
8
CN8
220p-8P4C
CN9
220p-8P4C
CN10
220p-8P4C
CN11
220p-8P4C
LP_SLCT
LP_PE
LP_BUSY
LP_ACK#
LP_D7
LP_D6
LP_D5
LP_D4
LP_D3
LP_SLIN#
LP_D2
LP_INIT#
LP_D1
LP_ERR#
LP_D0
LP_AFD#
LP_STB#
27
13
25
12
24
11
23
10
22
9
21
8
20
7
19
6
18
5
17
4
16
3
15
2
14
1
LP_D[0..7] { 21}
LP_BUSY {21}
LP_ACK# {21}
LP_ERR# {21}
LP_AFD# {21}
LP_INIT# {21}
LP_SLIN# {21}
LP_SLCT {21}
LP_PE {21}
LP_STB# {21}
MS_CK
MS_DT
7
8
KB_CK
KB_DT
CN13
220p-8P4C
26
_CONN-D-SUB25F-3.18mm
5
3
1
5
3
1
MS1
987
KB1
987
Keyboard
MOUSE
6
4
2
6
4
2
R468
RIA
C C
CPUFAN2_PWM {21}
CPUFAN1_PWM
B B
R1224 X_0-0603
R1225 0-0603
R987
C885
0.1u-0603
100K-0603
-
6
+
5
8 4
+12V
R990 4.7KST
R992
1.82KST
U50B
LM358MX-SO8
7
10K-0603
10K-0603
R469
C E
B
Q65
2N3904S
SYS_FANPWR
F-MINISMDM150/24
Q104
P-IRFR9024NPBF_TO252-LF
FANPW2 FANPW2
EC106
+
100u-16V
+12V
RI# {15}
pull up
FS12
+12V
R994 10K-0603
C886
X-0603-C
FANPW1
FANPW2
CPU FAN
D47 1N4148/S
CPUFAN1_PWM {21}
R995 10K-0603
CPU_FAN1
1
2
3
4
5
FAN1X5_cream
To avoid
current leakage
R999 4.7K-0603
R985
100K-0603
C884
0.1u-0603
CPU_FAN1 {21}
R991
1.82KST
2
3
U50A
LM358MX-SO8
-
1
+
8 4
R989 4.7KST
+12V
SYS_FANPWR
Q103
P-IRFR9024NPBF_TO252-LF
FANPW1
EC105
+
100u-16V
SVCC3
FB36 80L-0805
MSCLK {21}
MSDATA {21}
KBCLK {21}
KBDATA {21}
PS2 KEYBOARD & MOUSE CONNECTOR
C883
0.1u-0603
1 2
3 4
5 6
RN85
4.7K-8P4R
7 8
L31 300L-0603
L32 300L-0603
L33 300L-0603
L34 300L-0603
135
246
+12V
R997 10K-0603
A A
5
R998 10K-0603
D48 1N4148/S
4
CPU_FAN2 {21}
R1000 4.7K-0603
Title
Size Do cu m e n t N u mb er Re v
C
3
2
Date: Sheet
MICRO-START INT'L CO.,LTD.
LPT/COM/FAN
MS-7290 1.0
1
22 32 Monday, June 12, 2006
of
8
7
6
5
4
3
2
1
ATX CONNECTOR
PS_ON# {13}
D D
SLP_S3# {15,21,24}
MS7_PSOUT {24}
C C
R831
1K-0603
R835
1K-0603
VCC3
CB30
0.1u-0603
R829
4.7K-0603
Q81
2N3904S
Q82
2N3904S
VCC5_SB
VCC3
-12V
CB23
0.1u-0603
C719
1000p-0603
CB27
0.1u-0603
PSU_FAN_DETECT
VCC5
11
12
13
14
15
16
17
18
19
20
ATX1
ATX-D2x10
+12V
3.3V
3.3V
3.3V
-12V
GND
GND
PSON
GND
GND
GND
GND
GND
POK
-5V
5VSB
5V
5V
R1181 10K-0603
5V
5V
12V
D45
1N4148/S
1
2
3
4
5
6
7
8
9
10
CB21
0.1u-0603
CB24
0.1u-0603
CB28
0.1u-0603
R1182 10K-0603
CB22
0.1u-0603
CB25
0.1u-0603
CB29
0.1u-0603
VCC3
VCC5
VCC5_SB
+12V
R1183
4.7K-0603
VCC5
R834
1K-0603
C721
1000p-0603
PSU_FAN {21}
PWR_OK {20,21,24}
VCC3_SB
R833
X-0603-R
SW_ON# {15,21}
C720
1u-0603
VCC5
IDE LED SERIAL ATA LED
IDEACTP# {17,18} SATALED# {15}
FP_RST# {3,15}
FDD_LED1 {21}
SOT23
Front Panel
R830 680-0603
CB26
0.1u-0603
HDDLED
D38
BAT54A_SOT23
231
FP_RST#
C1105
X_0.1u-0603
C1102
X_0.1u-0603
HDD+
HDDLED
C722
X-0603-C
C1103
X_0.1u-0603
JFP1
14 13
10
6
H2X8(9)_black
C1104
X_0.1u-0603
15 16
11 12
7 8
5
3 4
1 2
PWR_LED
SUS_LED
OUT_R- {20}
OUT_R+ {20}
OUT_L- {20}
OUT_L+ {20}
PWR_LED {24}
SUS_LED {24}
IO Address:0x02E
U19_HS1
HeatSink
PCB1
PCB-MS-7290-10
BIOS1_X1
BIOS_4Mbit
R844
X_0-0603
26
23
20
17
22
16
28
15
27
21
9
8
7
2
1
X_SLB9635
U40
LAD0
LAD1
LAD2
LAD3
LFRAME#
LRESET#
LPCPD#
CLKRUN#
SERIRQ
LCLK
TESTBI/BADD
TESTI
PP
NC3
NC4
GPIO
3V_1
3V_2
3V_3
3VSB
GND1
GND2
GND3
GND4
XTALO
XTALI/32KIN
NC1
NC2
6
19
24
10
5
18
25
11
4
14
13
12
3
VCC3
VCC3_SB
X_32K-12.5pf-CSA-309-D
Y6
X_12p-0402 C723
X_12p-0402 C724
NO STUFF FOR 7290
LPC_AD[0..3] {15,17,21}
LPC_FRAME# {15,17,21}
LPCPD# {15}
B B
R840
X_0-0603
PLTRST# {6,13,14,17,21}
R839
X_0-0603
VCC3
SERIRQ {14,21,29}
TPM_CLK {26}
TPM_ADDR
R842
X-0603-R
LPC_AD0
LPC_AD1
LPC_AD2
LPC_AD3
LPC_FRAME#
PLTRST#
TPM_CLKRUN#
SERIRQ
TPM_CLK
R843
X-0603-R
VCC3
CLAMP1
PCB-MS-7290-10
RUB1
PCB-MS-7290-10
GASKET1
PCB-MS-7290-10
CARDBUS1
CARDBUS HOUSING
BAT1_X1
+
SCREW1
CARDBUS SCREW
SCREW3
CARDBUS SCREW
J4(1-2)1
X_JMP/GREEN/A
SCREW2
CARDBUS SCREW
SCREW4
CARDBUS SCREW
JBAT1(1-2)1
X_JMP/GREEN/A
VCC3
1 2
RN92
3 4
10K-8P4R
5 6
A A
7 8
8
7
VCC3 VCC3 VCC3
14 7
9 8
U59D
74LCX14MX-SOIC14
6
11 10
14 7
U59E
74LCX14MX-SOIC14
5
13 12
14 7
U59F
74LCX14MX-SOIC14
VCC3
CB31
0.1u-0603
VCC3_SB
CB32
0.1u-0603
4
C725
1000p-0603
C726
1000p-0603
3
CB33
0.1u-0603
Title
ATX/Front Panel/TPM
Size Document Number Rev
Custom
Date: Sheet
MICRO-START INT'L CO.,LTD.
MS-7290 1.0
2
of
23 32 Monday, June 12, 2006
1
5
4
3
2
1
1.5V POWER(Height limit 9mm)
ACPI Controller
R976 X-0603-R
R284
330-0603
R282 33-0603
40
42
41
VCC3
DEV_RST#
HDD_RST#
SLOT_RST#
RAM_DRV
RAM_SBDRV
R377
33-0603
R202 51KST
C240 X-0603-C
R972
5.11KST
R279 33-0603
R285 33-0603
RSMRST#
38
39
37
AGND
RSMRST#
CHARPMP
PCIRST_BUF#
VLR1_DRV
VLR2_SEN
5VUSB_DRV
VLR2_DRV
VLR2_SEN
VAGP_DRV
24
Wide Trace
C434
X-0603-C
R372
X-0603-R
R200
100-0603
5VDIMM
3VSB MODE SELECT
3VSB MODE
D D
C C
DUAL MOSFET
DDR AND DDR II VOLT SELECT
SMBDATA_ISO {10,21,26}
SMBCLK_ISO {10,21,26}
3VDLDEC#
PULL HIGH SINGLE MOSFET
PULL LOW
VRM_GD {15,25}
PWR_GD {6,15}
MS7_PSOUT {23}
DDRTYPE VDIMM
PULL LOW 2.5V
PULL HIGH 1.8V
B B
EC39
470u-4V
SMT 3.8mm
DDR VTT Power
VCC_DDR
VCC3_SB
U4
W83310DS_SOIC8
8
VREF2
7
C119
0.1u-0603
6
5
ENABLE
VCTRL
BOOT_SEL
A A
1
VIN
2
GND2
3
VREF1
4
VOUT
GND9
9
5
VDIMM LINEAR OR PWM SELECT
VDIMM MODE
LINEAR REGULATOR
PWM REGULATOR PULL HIGH
PWR_LED {23}
SUS_LED {23}
1K-0603
PWR_OK {20,21,23}
V_FSB_VTT
+
1 2
V_1P5_CORE
VCC5_SB
R355
680-0603
Q50
2N3904S
VCC3
R267
R290 33-0603
R280 33-0603
C268 0.22u-0603
THIS PIN IS OPEN DRAIN OUTPUT
C118
X-1206-C
EC161
560u-2.5V
8+1mm
EC41
+
470u-4V
VTT_DDR
+
EC36
470u-4V
Q51
X_2N3904S
PWR_GD PWR_GD
PWR_OK
X7R
VCC5
0.1u-0603
+
R354
X_220-0805
VCC5
R343 X_4.7K-0603
R345 4.7K-0603
1K-0603
VCC5_SB
R258
1K-0603
C271
VID_GD# {4,25}
Q19
N-P3055LD_TO252
G
D S
+
1 2
EC44
470u-4V
SMT 3.8mm
VCC_DDR
C108
0.1u-0603
R356
VCC5_SB
VID_GD#
R1232
220-0805
R248
1K-0603
VCC5_SB
R140
1KST
R136
1KST
EXTRAM
PULL LOW
1
2
3
4
5
6
7
8
9
10
11
12
3VDLDEC#
EXTRAM
R344
1K-0603
46
47
48
SCL
SDA
PLED1/EXTRAM
PLED0/3VDLDEC#
FP_RST#
CHIP_PWGD
CPU_PWGD
POK1
PWROK
PSOUT#
DDRTYPE
SS
GND
VCC5
VIDGD#13VID_SEN14VID_DRV155VSB16RAM_SEN17RAM_DRV18RAM_HDRV/DMV19RAM_HSEN20SVRAM_DRV/DMSB213VSB223VSB_DRV23VAGP_SEN
C270
1u-0603
C437
1000p-0603
R371
5.11KST
R203 5.11KST
4
S3#45S5#
VCC5
44
PCI_RST#
43
R977 51KST
C875 X-0603-C
VCC5
SLP_S3#
PCIRST#
C322
X-0603-C
C320
0.1u-0603
U16
MS7-RBC RoHS
36
35
C2
34
C1
33
5VSB
32
31
30
29
5V_DRV
28
27
26
GND
25
Wide Trace
RAM_VREF
C438
1000p-0603
RAM_VREF
C237 2200p-0603
C235
0.1u-0603
C867
X-0603-C
R974
X-0603-R
V_1P5_VREF
C874 2200p-0603
R979 100-0603
C319
X-0603-C
VCC3
VCC5_SB
1800u-6.3V
R204
49.9KRST
U12
6
5
4
3
2
1
MS-6+_SOP14
VCC5
R973 X-0603-C
+12V
R975
49.9KRST
C876
0.1u-0603
SLP_S4# {15,21}
SLP_S3# {15,21,23}
PCIRST_ICH6# {14}
HD_RST# {17}
PCIRST#1 {18,27,29}
PCIRST#2 {17,28}
RSMRST# {15,27}
EC37
330u-6.3V
+
C303 1u-0603
CHARGE PUMP VOLTAGE
9VSB
OUTPUT
C315 1u-0805
C307 1u-0805
V1P2_DRV
V1P2_SEN
C293 1000p-0603
C392
X-0603-C
+
1 2
EC57
5VDIMM
R206 X-0603-C
+12V
C246
X-0603-C
ISET7BOOT
VREF_IN
H_DRV
FB
PGND
COMP
ISEN
SS
L_DRV
GND
VDD
PWROK
VDDA
Iocp=72uA*RISEN/RdsON 20A=72uA*RISEN/8.6m ohm RISEN=2.38k ohm
X-0603-C
U48
ISET7BOOT
6
VREF_IN
5
FB
4
COMP
3
SS
2
GND
1
PWROK
MS-6+_SOP14
R255 10K-0603
C288
1000p-0603
Close to MS6+
R778 0-0603
C278
1000p-0603
4 5
3
5V_DRV
2
1
VCC3
8
9
10
11
12
13
14
C199
4.7u-0805
R201
10-0805
3
C870
8
9
H_DRV
10
PGND
11
ISEN
12
L_DRV
13
VDD
14
VDDA
C877
4.7u-0805
R981
10-0805
C648 X-0805-C
Q45
6
7
8
IRF7313_SO8
D14
1N5817/S
C245 0.22u-0603
R205 10K-0603
C238
4.7u-0805
CLOSE TO CHIP
5VDIMM
8.58A
D40
1N5817/S
C873 0.22u-0603
R978 10K-0603
C878
4.7u-0805
CLOSE TO CHIP
VCC5
VCC5_SB
R327
4.7K-0603
RSMRST#
R764
10K-0603
5VUSB_DRV
1P2VREF {11,13}
C283
4.7u-0805
V_1P5_VREF 5VUSB_DRV
5V_DRV {30}
VCC5_SB
VCC3_SB
CHOKE2
CH-3.3U4A
C259
4.7u-0805
L04-33A7181-T15
9mm
N-P75N02LDG_TO252
N-P75N02LDG_TO252
CHOKE3 CH-1.2U18A-LF
C871
C872
4.7u-0805
4.7u-0805
12.5mm
Cap ripp=10.48A
1_5_LGDRV
Q99_X2
112
2
X_MOS-HEATSINK
V1P2_DRV
V1P2_SEN V 1P05_REF
1u-0603
C425
2200p-0603
5V_DRV
C417
X_2.2u-0603-C
5V_DRV
C1119 X_22u-1206-10V-1.5A
C1120 X_22u-1206-10V-1.5A
C1030 22u-1206-10V-1.5A
C1031 22u-1206-1.5A
C1032 22u-1206-1.5A
C1033 22u-1206-1.5A
D S
G
Q24
CHOKE1
1 2
D S
Q23
R173
4.7-0603
G
C162
1000p-0603
N-P75N02LDG_TO252
Iocp=72uA*RISEN/RdsON
40A=72uA*RISEN/8.6m ohm RISEN=4.7k ohm
VCC3
X-0603-C
C880
D S
Q101
G
2N7002S
R982 150RST
C881
R983
1.05KST
5V DUAL Power
Q52
4 5
3
6
7
2
8
1
IRF7313_SO8
VCC5
FRONT USB
Q18
4 5
3
6
7
2
8
1
IRF7313_SO8
VCC5
Rear USB
RAM_SBDRV
12.5mm
4.2uH-10A
2
+
EC51
1000u-6.3V
C261
X-0603-C
VCC_DDR
C1116 22u-1206-10V-1.5A
C1117 22u-1206-10V-1.5A
C1026 22u-1206-10V-1.5A
+
C1027 22u-1206-1.5A
EC162
C1028 22u-1206-1.5A
1000U16V
C1029 22u-1206-1.5A
D S
G
Q99
N-P75N02LDG_TO252
Q100
D S
G
R980
X_4.7-0603
C879
X_1000p-0603
560uF Ripple Current = 4.7A
1.05V POWER
9VSB
3
+
2
C882
1u-0603
VCC5_SB
5V_DRV
VCC5_SB
5V_DRV
VCC5_SB
VCC_DDR 9.9A = 4A(NB)+4.7A(DDR2*2)+1.2A(VTT)
EC42
+
1000u-6.3V
Title
Size Docu me nt Number Rev
Custom
Date: Sheet
-
4 8
U49A
LM358MX-SO8
USB_STR
R1248 0-1206
Q162
X_N-IPD09N03LA_TO252
D S
G
USB_STR1
R1249 0-1206
Q163
X_N-IPD09N03LA_TO252
D S
G
Q34
2
D
4
D
1
G
N-APM2054NDC-TRL_SOT89-LF
RAM_DRV
3
S
G
15+1mm
MICRO-START INT'L CO.,LTD.
MS7 ACPI controller
MS-7290 1.0
CH-2.2U25A_D
CHOKE4
14mm
V_1P5_CORE
G
1
D50
X_1N5817/S
VCC5
D51
X_1N5817/S
VCC5
D
Q32
S
N-IPD09N03LA_TO252
VCC5
22.87A
NB:14A
SB:1A
V_FSB_VTT:6.2A
SB:1.31A
EC101
560u-2.5V
8+1mm
+
EC103
560u-2.5V
D S
Q102
N-P3055LD_TO252
15+1mm
17.46A
5VDIMM
+
1 2
EC53
1000u-6.3V
24 32 Monday, June 12, 2006
1
V_1P5_CORE
+
1.31A
V_1P05_CORE
+
EC104
1000u-6.3V
VCC5
+
1 2
1000u-6.3V
VCC3
+
1 2
of
+
EC102
560u-2.5V
8+1mm
EC55
EC58
1000u-6.3V
5
ISL6316CR FOR Intel P4 VRD10.1 POWER CKT
VCC3 VCC5
D D
X_0.1u-0603
C965
VRM_GD {15,24}
VID[0..5] {3}
R1113
10KRST-0603
C976 X_33p-0603
VCCP
C C
VCC_VRM_SENSE {3}
VSS_VRM_SENSE {3}
100-0603
X_0.01u-0603
100-0603
R1123
C985
R1127
R1118
X_3.3K-0603
R1119 0-0603
C982
X_680p-0603
R1204 X_0-0603
R1126 1KST
C987
X_0.1u-0603
C988
NOTE:C1109 CLOSE TO U57
VCC5
B B
A A
H_PROCHOT# {3,4}
X_N-MMBT3904_NL_SOT23
Q135
5
R1142
C E
X_4.7K-0603
B
1K-0603
R1099
1500p-0603
X_10KST-0603
RT1
R1121
X_750-0603
R1128
120K-0603
0.01u-0603
R1141
X_4.7K-0603
VR_HOT
VCCP
+12VIN
C966
32
36
40
1
2
3
4
5
6
7
8
12
13
14
15
17
16
10
11
34
35
R1129
240KRST
2.2-0805
C967
2.2u-X7R-0805
EN_PWR
PGOOD
NC1
NC0
VID5
VID4
VID3
VID2
VID1
VID0
GND0
COMP
FB
IDROOP
VDIFF
VSEN
RGND
DAC
REF
FS
SS
BOTTOM PAD
CONNECT TO
GND
VID5
VID4
VID3
VID2
VID1
VID0
C975
R1120
1.78KRST
C1109
R1100
R1104
0.022u-0603
1MRST-0603
150KRST-0603
CPU DECOUPLING CAPACITORS
Place these cap s within socket cavity
C999
10u-1206
C1001
10u-1206
C1003
10u-1206
C1005
10u-1206
C1007
10u-1206
C1009
10u-1206
4
R1101
10u-0805
GND
GND1
41
VR FAN TRIP:1.69V ~ 80 degC
VR HOT TRIP:1.44V ~ 90 degC
VCCP
C E
Q125
N-MMBT3904_NL_SOT23
U57
33
19
ISL6316CR
PWM2
EN
ISEN2+
VCC
ISEN2-
PWM1
ISEN1+
ISEN1-
PWM3
ISEN3+
ISEN3-
PWM4
ISEN4+
ISEN4-
VR_FAN
VR_HOT
TM
OFS
TCOMP
TDK
NTCG104KF104FT
4
R1102
B
26
27
28
20
21
22
31
30
29
25
24
23
37
38
39
9
18
VCC5
R1131
1K-0603
PHASE2
PHASE1
PHASE3
PHASE4
10K-0603
R1137
C1000
10u-1206
C1002
10u-1206
C1004
10u-1206
C1006
10u-1206
C1008
10u-1206
C1010
10u-1206
4.7K-0603
2.74K-0603
R1105
R1109 560RST
R1110
3.3KST
R1111 560RST
R1112
3.3KST
R1114 560RST
R1115
3.3KST
R1122 560RST
R1124
3.3KST
VR_HOT
VCC5
R1132
X_4.7K-0603
C993
R1138
22.6KRST-0603
C1011
C1U10X0805
VID_GD# {4,24}
ISEN2
C970
0.1u-0603
ISEN1
C973
0.1u-0603
ISEN3
C979
0.1u-0603
ISEN4
C983
0.1u-0603
VCC5
R1133
3.3K-0603
R1139
0.1u-0603
X_3.3K-0603
C971
0.1u-0603
C974
0.1u-0603
C980
0.1u-0603
C984
R1136
0-0603
RT2
10KST-0603
SOLDER SIZE
VCCP
+
1 2
+
1 2
+
1 2
0.1u-0603
EC149
C330U2SP
EC148
C330U2SP
EC56
C330U2SP
3
R1103
2.2-0805
C969
1u-0603
C992
1u-0603
3
+12VIN
+12VIN
R1130
2.2-0805
U56A
14
VCC
UGATE1
BOOT1
3
1
6
2
14
3
1
6
2
PHASE1
GND
PWM1
LGATE1
ISL6614ACB_SOIC14
U56B
PVCC5UGATE2
BOOT2
PHASE2
PGND
PWM2
LGATE2
ISL6614ACB_SOIC14
U51A
VCC
UGATE1
BOOT1
PHASE1
GND
PWM1
LGATE1
ISL6614ACB_SOIC14
U51B
PVCC5UGATE2
BOOT2
PHASE2
PGND
PWM2
LGATE2
ISL6614ACB_SOIC14
SP Capacitors
VCCP
TOP SIZE
+
EC150
1 2
C100U2SP
2
+12VIN
+12VP_FET VCC3
EC8 330u/16V
+
R11061R0805
EC9
EC10
R1134
1R0805
EC11 330u/16V
R11431R0805
2
G
Q127
G
+12VP_FET
+
G
Q130
G
+12VP_FET
+
G
Q133
G
+12VP_FET
+
G
Q137
G
12
R1107
IPD06N03LA_TO252
330u/16V
R1117
IPD06N03LA_TO252
330u/16V
R1135
IPD06N03LA_TO252
R1144
IPD06N03LA_TO252
C968
0.1u-0603
R11161R0805
C981
0.1u-0603
C991
0.1u-0603
C997
0.1u-0603
11
2.2-0805
13
4
9
10
2.2-0805
8
7
12
11
2.2-0805
13
4
9
10
2.2-0805
8
7
COIL1
CH-1.2U18A
D S
Q126
IPD09N03LA_TO252
D S
D S
G
D S
Q129
IPD09N03LA_TO252
D S
D S
G
D S
Q132
IPD09N03LA_TO252
D S
D S
G
D S
Q136
IPD09N03LA_TO252
D S
D S
G
C963
1u-0603
PHASE2
R1108
2.2-0805
Q128
IPD06N03LA_TO252
C972
1000p-0603
C977
1u-0603
PHASE1
R1125
2.2-0805
Q131
IPD06N03LA_TO252
C986
1000p-0603
C989
1u-0603
PHASE3
R1140
Q134
2.2-0805
IPD06N03LA_TO252
C994
1000p-0603
C995
1u-0603
PHASE4
R1145
Q138
2.2-0805
IPD06N03LA_TO252
C998
1000p-0603
Title
VRM10.1 Intersil 6316 4Phase
Size Document Number Rev
A3
Date: Sheet of
+12VIN
C1012
1u-0805
C1025
10u-1206
C964
10u-1206
CHOKE5
CH-0.36U30A_S
CP4
X_COPPER
ISEN2
C978
10u-1206
CHOKE6
CH-0.36U30A_S
CP5
X_COPPER
ISEN1
C990
10u-1206
CHOKE7
CH-0.36U30A_S
CP6
X_COPPER
ISEN3
C996
10u-1206
CHOKE8
CH-0.36U30A_S
CP7
X_COPPER
ISEN4
MICRO-START INT'L CO.,LTD.
MS-7290 1.0
1
JPW1
3
GND
12V
4
GND
12V
D2x2
VCCP
SP Capacitors
VCCP
+
EC28 X_C330U2SP
1 2
+
EC33 C330U2SP
1 2
+
EC29 X_C330U2SP
1 2
+
EC25 X_C330U2SP
1 2
+
EC54 C330U2SP
1 2
+
EC151 X_C330U2SP
1 2
+
EC32 C330U2SP
1 2
+
EC30 X_C330U2SP
1 2
+
EC20 X_C330U2SP
1 2
+
EC82 X_C330U2SP
1 2
+
EC83 C330U2SP
1 2
+
EC84 C330U2SP
1 2
+
EC85 X_C330U2SP
1 2
HS1
2
HS-TO252
HS4
2
HS-TO252
HS2
2
HS-TO252
HS3
2
HS-TO252
25 32 Monday, June 12, 2006
1
1
2
1
1
1
1
8
7
6
5
4
3
2
1
Clock Generator - ICS954101
U15
CT15
X_10u-0805
FB18 80L-0805
FB19 2.2-0805
resister
C1114
0.1u-0603
+
CT3
10u-0805
+
CT4
10u-0805
C1115
X_0.1u-0603
SMBCLK_ISO {10,21,24}
SMBDATA_ISO {10,21,24}
VCC3
D D
VCC3
C C
+
VCC3V
VCC3VA
FSA
FSB
FSC
C441
0.1u-0603
C436
0.1u-0603
C266
0.1u-0603
C435
0.1u-0603
C439
0.1u-0603
C442
0.1u-0603
C443
0.1u-0603
42
CPU_VDD
45
CPU_GND
21
SRC_VDD
28
SRC_VDD
34
SRC_VDD
29
SRC_GND
37
VDDA
38
VSSA
1
PCI_VDD
2
PCI_GND
7
PCI_VDD
6
PCI_GND
11
48_VDD
13
48_GND
48
REF_VDD
51
REF_GND
46
SCLK
47
SDATA
18
FSA
16
FSB/TEST_MODE
53
FSC/TEST_SEL
ICS954101DF_SSOP56
CPU0
CPU0#
CPU1
CPU1#
CPU2_ITP/SRC7
CPU2_ITP#/SRC7#
SRC1
SRC1#
SRC2
SRC2#
SRC3
SRC3#
SRC4_SATA
SRC4_SATA#
SRC5
SRC5#
SRC6
SRC6#
DOT96
DOT96#
PCIF0/ITP_EN
PCIF1
PCIF2
PCI0
PCI1
PCI2
PCI3
PCI4
PCI5
USB_48M
REF
VTT_PWRGD#/PD
IREF
X1
X2
Trace length less than 0.5inchs
56p-0603 C312
56p-0603 C313
7 8
5 6
3 4
1 2
CK_H_CPU
CK_H_CPU#
CK_H_MCH# MCHCLK#
CK_PE_100M_MCH
CK_PE_100M_MCH#
CK_ICHSATA#
CK_PE_100M_ICH
CK_PE_100M_LAN
CK_PE_100M_LAN#
CK_96M_DREF
CK_96M_DREF#
RN35
CK_48M_USB_ICH USB48
CPUCLK
44
43
41
40
36
35
19
20
CK_PE_SRC2
22
CK_PE_SRC2#
23
CK_PE_SRC3 CK_ICHSATA
24
CK_PE_SRC3#
25
CK_PE_SRC4
26
CK_PE_SRC4# CK_PE_100M_ICH#
27
31
30
33
32
CK_DOT96
14
CK_DOT96#
15
8
9
10
54
55
SIOPCLK
56
3
4
5
12
52
50
49
17
IREF
39
R253 33-0402
R250 33-0402
CPUCLK#
MCHCLK CK_H_MCH
R242 33-0402
R239 33-0402
R235 33-0402
R233 33-0402
R228 33-0402
R224 33-0402
R219 33-0402
R216 33-0402
R394 33-0402
R395 33-0402
R252 33-0402
R249 33-0402
FWHPCLK
SECPCLK
ICHPCLK
PCICLK1
PCICLK0
FWHPCLK
SECPCLK
R257 33-0402
CK_14M_R
PLL_XI
PLL_XO
CK_VID_GD#
R380 475RST
RN29 33-8P4R-0402
CK_14M_R
Y3
14M-32pf-HC49S-D
FWH_PCLK
TPM_CLK
ICH_PCLK
PCI_CLK1
CK_14M_SIO
7 8
CK_14M_ICH
5 6
3 4
1 2
33-8P4R-0402
R1189 33-0402
CK_H_CPU {3}
CK_H_CPU# {3}
CK_H_MCH {6}
CK_H_MCH# {6}
CK_PE_100M_MCH {8}
CK_PE_100M_MCH# {8}
CK_ICHSATA {15}
CK_ICHSATA# {15}
CK_PE_100M_ICH {14}
CK_PE_100M_ICH# {14}
CK_PE_100M_LAN {27}
CK_PE_100M_LAN# {27}
CK_96M_DREF {8}
CK_96M_DREF# {8}
PCI_CLK0
DB_PCLK
SIO_PCLK
CK_48M_USB_ICH {15}
FWH_PCLK {17}
TPM_CLK {23}
ICH_PCLK {14}
PCI_CLK1 {28}
CK_14M_SIO {21}
CK_14M_ICH {15}
PCI_CLK0 {29}
DB_PCLK {17}
SIO_PCLK {21}
CK_H_CPU
CK_H_CPU#
CK_H_MCH
CK_H_MCH#
CK_PE_100M_ICH#
CK_PE_100M_ICH
CK_ICHSATA#
CK_ICHSATA
CK_PE_100M_MCH#
CK_PE_100M_MCH
CK_PE_100M_LAN
CK_PE_100M_LAN#
CK_96M_DREF
CK_96M_DREF#
MH2
1
5
2
6
(NPTH)
3
7
4
8
9
MH3
1
5
2
6
(NPTH)
3
7
4
8
9
MH9
1
5
2
6
(NPTH)
3
7
4
8
9
R389 49.9RST
R386 49.9RST
R383 49.9RST
R379 49.9RST
R373 49.9RST
R374 49.9RST
R221 49.9RST
R231 49.9RST
R375 49.9RST
R376 49.9RST
R397 49.9RST
R396 49.9RST
R388 49.9RST
R385 49.9RST
MH6
1
2
(NPTH)
3
4
8
9
MH8
1
2
(NPTH)
3
4
8
9
MH10
1
2
(NPTH)
3
4
8
9
CK_14M_SIO
CK_14M_ICH
PCI_CLK0
PCI_CLK1
DB_PCLK
ICH_PCLK
FWH_PCLK
SIO_PCLK
TPM_CLK
CK_48M_USB_ICH
22P-0603 C294
22P-0603 C302
10P-0603 C305
10P-0603 C287
C1055 10P-0603
10P-0603 C292
10P-0603 C308
10P-0603 C311
C306 10P-0603
X-0603-C C284
EMC HF filter capacitors, located close to PLL
MH1
5
6
7
5
6
7
5
6
7
1
2
3
MH4
1
2
3
MH7
1
2
3
MH2004
(NPTH)
4
5
6
(NPTH)
7
4
8
9
5
6
(NPTH)
7
4
8
9
5
6
7
8
9
1
2
3
1
2
3
1
2
3
MH5
MH11
4
4
4
(NPTH)
(NPTH)
(NPTH)
5
6
7
8
9
5
6
7
8
9
5
6
7
8
9
MH15
BSEL[0..2] Level Shift
B B
Clock Generator VTT Power Down Block
R382
LP5
LP3
10K-0603
Q31
2N3904S
LP1
LP8
4
CK_VID_GD#
R244
X-0603-R
R214
X-0603-R
FM4
FM6
VIDGD
LP7
LP4
V_FSB_VTT
RN54
H_FSBSEL1 {3,4,8}
H_FSBSEL0 {3,4,8}
A A
H_FSBSEL2 {3,4,8}
8
7 8
5 6
3 4
1 2
1K-8P4R-0402
7
FSB
FSA
FSC
6
VCCP
FM1
FM5
FM3
FM7
R212 220-0603
Optics Orientation Holes
FM2
FM8
5
LP2
LP10
VCC3V
LP9
LP6
for power cable holder and FP:
HOLES315D189
MH13
1
2
(NPTH)
3
4
8
9
MH17
1
2
(NPTH)
3
4
8
9
MH2005
1
2
3
5
6
7
5
6
7
(NPTH)
4
5
6
7
8
9
MH14
1
2
(NPTH)
3
4
8
9
MH18
1
2
(NPTH)
3
4
8
9
Simulation
x_
J1
VCC3
x_
3
Title
Clock Generator
Size Document Number Rev
J2
Custom
Date: Sheet
MS-7290 1.0
5
6
7
5
6
7
1
2
3
MICRO-START INT'L CO.,LTD.
2
(NPTH)
4
8
9
MH19
1
2
(NPTH)
3
4
8
9
5
6
7
CPU H/S Holes
5
6
7
MH16
1
2
3
26 32 Monday, June 12, 2006
5
6
(NPTH)
7
4
8
9
MH20
1
2
3
5
6
(NPTH)
7
4
8
9
of
1
5
4
3
2
1
LAN VOLTAGE REGULATION
Tekoa(82573L)
D D
C931 0.1u-0603
HSI_P1 {14}
C932 0.1u-0603
HSI_N1 {14}
HSO_N1 {14}
HSO_P1 {14}
CK_PE_100M_LAN {26}
CK_PE_100M_LAN# {26}
WAKE# {15}
PCIRST#1 {18,24,29}
SMBDATA {15,21}
VCC3
SPI_CLK {14}
SPI_MOSI {14}
SPI_MISO {14}
SPI_CS# {14}
C C
B B
A A
SPI_ARB {14}
1
2
3
J5
D1x3-BK
J5(1-2)1
X_JMP/GREEN/A
NOTE: put J5(1-2)1 to pin 2-3
for write protection when MP
R1070 no stuff
for EEPROM
S_MOSI
S_CLK
SMBCLK {15,21}
RN91 X_0-8P4R
R1065 X_0-0603
R1070 X_1K-0603
VCC3_SB
R1077
3.3K-0603
R1083 47-0603
R1085 47-0603
R1091
10K-0603
5
HSI_P1_C
HSI_N1_C
R1059 3.3K-0603
S_CLK
1 2
S_MOSI
3 4
S_MISO
5 6
S_CS#
7 8
R1068 X_0-0603
TP24
TP25
TP26
TP27
R1201 X-0603-C
U53
x_SST25LF040A
7
5
6
4
HOLD#
SI
SCK
GND
CHANGE TO 82573L FOR 7290
VCC3_SB AVDD2_5R VCC3_SB
U52
A2
D1
PETP0/NC
C1
PETN0/NC
F1
PERN0/NC
F2
PERP0/NC
G1
PECLKP/NC
G2
PECLKN/NC
P10
PEWAKE#/NC
P7
PERST#/NC
M11
SMB_DATA/NC
P11
SMB_CLK/NC
N11
SMB_ALRT#--ASF_PGD/NC
A9
NVM_SI/NC
B9
NVM_SO/NC
B10
NVM_CS#/NC
C9
NVM_SK/NC
B4
NVM_REQ/NC
A5
NVM_PROT/NC
D3
NVM_SHRD/NC
A6
NVM_TYPE/NC
P4
JTDI/NC
P6
JTDO/NC
N4
JTMS/NC
N5
JTCK/NC
L3
THRMDP/NC
L2
THRMDN/NC
A8
SDP0/NC
B8
SDP1/NC
C8
SDP2/NC
C7
SDP3/NC
C3
DOCK_IND/NC
N10
ALT_CLK125/NC
H1
TESTPT_0/NC
H2
TESTPT_1/NC
H3
TESTPT_2/NC
J1
TESTPT_3/NC
J2
TESTPT_4/NC
J3
TESTPT_5/NC
K1
TESTPT_6/NC
L1
TESTPT_7/NC
M1
TESTPT_8/NC
M3
TESTPT_9/NC
N2
TESTPT_10/NC
P1
TESTPT_11/NC
N3
TESTPT_12/NC
M8
TESTPT_13/NC
P9
TESTPT_14/NC
E3
TESTPT_15/NC
A14
TESTPT_16/NC
TEKOA-82573L
R1078
3.3K-0603
8
VCC
3
WP#
2
SO
1
CS#
U2
1
2
3
CS
SO
WP
GND4SI
8
VCC
7
HOLD
6
SCK
5
AT25010AN-10SU-2.7_SOIC8
A3
A7
VCC33/NCD9VCC33/NCF3VCC33/NC
IREG25/NC
VCC33/VCC
IREG25/VCC
R1086 47-0603
AVDD2_5R AVDD12R
J4
M10
M2
VCC33/NC
FUSEV/NC
VCC33/VCCN6VCC33/VCCN8VCC33/VCCP2VCC33/VCC
VCC3_SB
C956 0.1u-0603
S_MISO
S_CS#
P12
VSS/NCA1VSSB3VSS
C10
G3
H4
J12
A11
C12
VCC25/VCC
VSS
VCC25/NCB6VCC25/NC
VSS/NCC2VSS
D13
4
L12
K13
J5
G5
H5
VCC25/NC
VCC25/NC
VCC25/NC
VCC25/VCC
VCC25/VCCR
VCC25/VCCR
VCC25/VCC33
VSS/NCD2VSSD4VSSD5VSSD6VSSD7VSSD8VSSE2VSSE4VSSE5VSSE6VSSE7VSSE8VSSE9VSS
N7
VCC25/NCM4VCC25/NC
B2
VCC25_OUT/NCB1VCC25_OUT/NC
A10
F12
VCC12/NC
VCC12/NCC4VCC12/NCC5VCC12/NC
VSSF4VSSF5VSSF6VSSF7VSSF8VSSF9VSS
E10
G12
H12
G13
H11
VCC12/NC
VCC12/NC
VCC12/VCC33
VCC12/VCC33G6VCC12/VCC33
VCC12/VCC33H6VCC12/VCC33H7VCC12/VCC33H8VCC12/VCC33
VSS
VSS/NCG4VSSG7VSSG8VSSG9VSS
F10
F11
R1075 49.9RST
C954 0.1u-0603
R1079 49.9RST
R1080 49.9RST
C957 0.1u-0603
R1081 49.9RST
R1082 49.9RST
C959 0.1u-0603
R1084 49.9RST
C961 0.1u-0603
R1087 49.9RST
R1089 49.9RST
Place these components close
to the LAN Chipset
AVDD2_5R
J10
J11
VCC12/VCC33
K10
VCC12/VCC33J6VCC12/VCC33J7VCC12/VCC33J8VCC12/VCC33J9VCC12/VCC33
VSS
VSS
VSSH9VSS
H10
G10
G11
G14
R1092 0-0603
K4
K11
VCC12/VCCK3VCC12/VCC
VCC12/VCC33
VCC12/VCC33K5VCC12/VCC33K6VCC12/VCC33K7VCC12/VCC33K8VCC12/VCC33K9VCC12/VCC33L5VCC12/VCC33L9VCC12/VCC33
LAN_PWRGOOD/NC
AUX_PRESENT/NC
HS_DACN/RBIAS100
PHY_TSTPT/RBIAS10
PHY_REF/ISOL_T1
CLK_VIEW/LAN_TXD2
NC/LAN_RSTSYNC
VSSK2VSSN1VSS
VSS
P8
N12
0.1u-0603
3
L10
MDIP0/TDP
MDIN0/TDN
MDIP1/RDP
MDIN1/RDN
MDIP2/NC
MDIN2/NC
MDIP3/NC
MDIN3/NC
LED0#/SPDLED
LED1#/ACTLED
LED2#/LINKLED
XTAL1
XTAL2
EN25_REG/NC
CTRL_25/NC
CTRL_12/NC
DEV_OFF#/ADV10
HS_DACP/TOUT
TEST_EN
NC/ISOL_TEX
NC/ISOL_TEK
NC/LAN_TXD0
NC/LAN_TXD1
NC/LAN_RXD0
NC/LAN_RXD1
NC/LAN_RXD2
NC/LAN_CLK
NC/VSS
NC/VCC
NC/VSS
NC/VSS
NC/VSS
NC/VSS
NC/VCC
NC/VCCT
NC/VCCT
TR_D0+
TR_D0ÂTR_D1+
TR_D1ÂTR_D2+
TR_D2ÂTR_D3+
TR_D3-
LPWR
C962
TR_D0+
C13
TR_D0-
C14
TR_D1+
E13
TR_D1-
E14
TR_D2+
F13
TR_D2-
F14
TR_D3+
H13
TR_D3-
H14
100_LED#
B11
ACT_LED#
C11
1G_LED#
A12
XTALI
K14
XTALO
J14
B5
A4
P3
L7
P5
C6
B12
B13
B14
A13
D12
D10
D14
M14
L13
L14
P13
N13
M12
M13
N14
D11
NC
J13
NC
L8
NC
M5
NC
M7
NC
M9
NC
N9
NC
P14
NC
B7
E1
K12
L11
L6
M6
L4
E11
E12
R1062 3.3K-0603
CTRL2_5
CTRL12
LAN_DISABLE#
RSMRST#
R1069 3.3K-0603
R1071 X_3.3K-0603
R1072 X_619-0603
LAN_DISABLE_A13
LAN_DISABLE_D12
LAN CONNECTOR
LAN1
6 5
15
1
2
3
4
7
8
9
10
16
CONN-RJ45_LEDX2_black-2
13
G
14
11
Y
12
17 18
22u-1206-10V-1.5A
R1066 X_1K-0603
RSMRST# {15,24}
VCC3_SB
R1073 3.3K-0603
R1074 4.99K/6/1
R1076 330-0603
R1088 330-0603
R1090
0-0603
C1132
X_0.01u-0603
C1046
25M/18p/HC49S-D
LAN_DISABLE# {15}
AVDD2_5R
C942
4.7u-0805
VCC3_SB
C950
0.1u-0603
100_LED#
1G_LED#
TR_LED
VCC3_SB
2
C1047
4.7u-0805
22u-1206-10V-1.5A
C943
4.7u-0805
ACT_LED#
C1133
X_0.01u-0603
MAX 301mA
AVDD2_5R
BCP69/1A/PNP/SOT223
4
3 2
10u-0805
C933
22p-0603
C934
22p-0603
Q119
CTRL2_5
VCC3_SB
R1162
1R/1206
1
C928
C929
10u-0805
0.1u-0603
C1048
0.1u-0603
Y7
C1049
MAX 630mA
4
Q120
CTRL12
C952
AVDD12R
4.7u-0805
0.1u-0603
AVDD12R
R1163
1R/1206
C930
10u-0805
C935
C953
0.1u-0603
C937
0.1u-0603
1
R1057
C1051
C1052 4.7u-0805
C1054 10u-0805
2.2/1206
0.1u-0603 C1053
C944
0.1u-0603
C948
10u-0805
C949
10u-0805
0.01u-0603 C955
0.01u-0603 C958
0.01u-0603 C960
Title
Size Document Number Rev
A3
Date: Sheet of
R1058
2.2/1206
3 2
BC6909/1A/PNP/SOT223
1
C946
C945
0.1u-0603
0.1u-0603
C951
0.1u-0603
0.1u-0603
MICRO-START INT'L CO.,LTD.
LAN Intel Tekoa 82573L
MS-7290 1.0
C1050
C947
4.7u-0805
0.1u-0603
C941
C940
0.1u-0603
C938
C939
0.1u-0603
0.1u-0603
Giga-Lan
N58-14F0061-S42
Yellow
Link
Blinking
Active
1000
Orange
Green
100
10
None
Orange
13
14
Green
11
Yellow
12
27 32 Monday, June 12, 2006
C936
4.7u-0805
8
7
6
5
4
3
2
1
MINIPCI1
D D
PCI_CLK1 {26}
PREQ#2 {14}
AD31 {14,29}
AD29 {14,29}
AD27 {14,29}
AD25 {14,29}
C_BE#3 {14,29}
AD23 {14,29}
AD21 {14,29}
AD19 {14,29}
AD17 {14,29}
C_BE#2 {14,29} AD16 {14,29}
IRDY# {14,29}
C C
B B
SERR# {14,29}
C_BE#1 {14,29}
AD14 {14,29}
AD12 {14,29}
AD10 {14,29}
AD8 {14,29}
AD7 {14,29}
AD5 {14,29}
AD3 {14,29}
AD1 {14,29}
VCC5
PIRQ#B
VCC3
AD31
AD29
AD27
AD25 AD28
AD23
AD21
AD19
AD17
AD10
AD8
AD7
AD5
AD1
C654
4.7u-0805
VCC5
R780
10K-0603
C655
0.1u-0603
125
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51
53
55
57
59
61
63
65
67
69
71
73
75
77
79
81
83
85
87
89
91
93
95
97
99
101
103
105
107
109
111
113
115
117
119
121
123
CN-MINIPCI-S124-BK
127
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
54
56
58
60
62
64
66
68
70
72
74
76
78
80
82
84
86
88
90
92
94
96
98
100
102
104
106
108
110
112
114
116
118
120
122
124
128
126
MPCI_AGND
VCC5
PIRQ#C
VCC3
MPCI_IDSEL AD18
MPCIACT#
R779 300RST
R781 10K-0603
PIRQ#C {14}
AD30
AD26
AD24
AD22
AD20
AD18
AD16
AD15 AD14
AD13
AD11 AD12
AD9
AD6
AD4
AD2
AD0 AD3
VCC3
PCIRST#2 {17,24}
PGNT#2 {14}
PCI_PME# {14,29}
AD30 {14,29}
AD28 {14,29}
AD26 {14,29}
AD24 {14,29}
AD22 {14,29}
AD20 {14,29}
PAR {14,29}
AD18 {14,29}
FRAME# {14,29}
TRDY# {14,29}
STOP# {14,29}
DEVSEL# {14,29} PERR# {14,29}
AD15 {14,29}
AD13 {14,29}
AD11 {14,29}
AD9 {14,29}
C_BE#0 {14,29}
AD6 {14,29}
AD4 {14,29}
AD2 {14,29}
AD0 {14,29}
VCC3_SB
C653
0.1u-0603
IDSEL = AD18
MASTER = PREQ#2
PIRQ#C
VCC3_SB
+12V
VCC5
VCC3
C1070
C1071
C1072
C1074
C1075
C1076
C1134
C1077
C1079
C1081
C1083
C1085
C1087
C1089
C1106
C1107
C1108
C666
C1135
C888
C1091
C1094
C1095
C1096
C1097
C1098
C1099
C1100
C1101
C667
C1136
X_0.1u-0603
X_0.1u-0603
X_0.1u-0603
X_0.1u-0603
X_0.1u-0603
X_0.1u-0603
X_0.1u-0603
X_0.1u-0603
X_0.1u-0603
X_0.1u-0603
X_0.1u-0603
X_0.1u-0603
X_0.1u-0603
X_0.1u-0603
X_0.1u-0603
X_0.1u-0603
X_0.1u-0603
x_0.1u-0603
X_0.1u-0603
x_0.1u-0603
X_0.1u-0603
X_0.1u-0603
X_0.1u-0603
X_0.1u-0603
X_0.1u-0603
X_0.1u-0603
X_0.1u-0603
X_0.1u-0603
X_0.1u-0603
x_0.1u-0603
X_0.1u-0603
FOR EMI
-12V
C1073
X_0.1u-0603
VCC_DDR
C1078
X_0.1u-0603
C1080
X_0.1u-0603
C1082
X_0.1u-0603
C1084
X_0.1u-0603
C1086
X_0.1u-0603
C1088
X_0.1u-0603
C1090
X_0.1u-0603
C1131
X_0.1u-0402
VCC5 VCC3
C1092
X_0.1u-0603
CP8
CP9
CP10
CP11
CP12
CP13
CP14
X_COPPER
X_COPPER
X_COPPER
X_COPPER
X_COPPER
X_COPPER
X_COPPER
PCI PULL-UP / DOWN RESISTORS
VCC3
VCC5
DEVSEL#
STOP#
FRAME#
A A
LOCK# {14}
8
IRDY#
SERR#
PERR#
LOCK#
1 2
VCC3
3 4
RN70
5 6
8.2K-8P4R
7 8
1 2
VCC3
3 4
RN73
5 6
8.2K-8P4R
7 8
7
6
PIRQ#G {14}
PIRQ#H {14}
PIRQ#F {14}
PIRQ#E {14}
PIRQ#B {14,29}
PIRQ#A {14,29}
PIRQ#G
PIRQ#H
PIRQ#F
PIRQ#E TRDY#
PIRQ#B
PIRQ#A
1 2
3 4
5 6
7 8
R783 8.2K-0603
5
RN72
8.2K-8P4R
+
CT11
X-1500u-6.3V
VCC3
C662
4.7u-0805
4
VCC3
+
C663
0.1u-0603
PCI SLOT DECO UPLI NG CAPACITORS
VCC5
C657 0.1u-0603
CT6
X-1500u-6.3V
C664
0.1u-0603
3
C658 0.1u-0603
C660 0.1u-0603 R782 8.2K-0603
Title
PCI Slot
Size Document Number Rev
Custom
Date: Sheet of
MS-7290 1.0
VCC3
C656 0.1u-0603
C659 0.1u-0603
C661 0.1u-0603
MICRO-START INT'L CO.,LTD.
2
28 32 Monday, June 12, 2006
1
A
B
C
D
E
VCC3_SB
R946 0-0603
R948
VCC3_SB
VCC18_SB
AD31
AD30
AD29
AD28
AD27
AD26
AD25
AD24
AD23
AD22
AD21
AD20
AD19
AD18
AD17
AD16
AD15
AD14
AD13
AD12
AD11
AD10
AD9
AD8
AD7
AD6
AD5
AD4
AD3
AD2
AD1
AD0
PAR
C_BE#3
C_BE#2
C_BE#1
C_BE#0
FRAME#
IRDY#
TRDY#
DEVSEL#
STOP#
PERR#
SERR#
PCI_PME#
IC1B
P8
VCC_PCI3V1
P9
VCC_PCI3V2
P10
VCC_PCI3V3
P11
VCC_PCI3V4
H8
VCC_CORE18V1
M8
VCC_CORE18V2
H12
VCC_CORE18V3
M12
VCC_CORE18V4
F10
VCC_3V1
P12
VCC_3V2
P6
AD31
R6
AD30
T6
AD29
V6
AD28
W6
AD27
P7
AD26
R7
AD25
T7
AD24
R8
AD23
T8
AD22
V8
AD21
W8
AD20
R9
AD19
T9
AD18
V9
AD17
W9
AD16
V12
AD15
W12
AD14
P13
AD13
R13
AD12
T13
AD11
V13
AD10
W13
AD9
R14
AD8
V14
AD7
W14
AD6
T15
AD5
V15
AD4
W15
AD3
V16
AD2
W16
AD1
V17
AD0
R12
PAR
V7
C/BE3#
R10
C/BE2#
T12
C/BE1#
T14
C/BE0#
W7
IDSEL
W5
REQ#
V5
GNT#
T10
FRAME#
V10
IRDY#
W10
TRDY#
R11
DEVSEL#
T11
STOP#
V11
PERR#
W11
SERR#
T2
GBRST#
R5
PCIRST#
T5
PCICLK
W4
CLKRUN#
R1
PME#/RI_OUT#
H9
GND4
J9
GND5
K9
GND6
L9
GND7
M9
GND8
H10
GND9
J10
GND10
R5C486-CSP277-V10_0
IDSEL = AD16
PIRQ#A
PCI PORTION
PIRQ#B
NC1
NC2
NC3
NC4
NC5
NC6
NC7
NC8
NC9
NC10
NC11
NC12
NC13
NC14
NC15
NC16
NC17
NC18
NC19
NC20
NC21
NC22
NC23
NC24
NC25
NC26
NC27
NC28
NC29
NC30
NC31
NC32
HWSPND#
NC33
SPKROUT
IRQ3
IRQ4
IRQ5
IRQ7
IRQ9-SRIRQ#
IRQ10
IRQ11
IRQ12
IRQ14
IRQ15
INTA#
INTB#
NC34
NC35
GND18
GND17
GND16
GND15
GND14
GND13
GND12
GND11
A15
B15
B8
A8
D12
A13
B13
A12
B12
D10
A11
B11
A10
B10
D15
D14
B14
A14
B16
A16
B17
A17
D16
E15
E12
D13
E14
D11
E10
D9
B9
A9
R4
P1
P2
T1
U2
U1
V1
V2
W2
V3
W3
T4
V4
W17
W18
V18
V19
M11
L11
K11
J11
H11
M10
L10
K10
C803
C801
0.01u-0603
VCC3
R939
10K-0603
D46
1N5817/S
SPKROUT {21}
SERIRQ {14,21,23}
C802
0.01u-0603
HWSPND# {15}
VCC3_SB
100K-0603
VCC3_SB
PIRQ#A {14,28}
PIRQ#B {14,28}
R942
R944
100K-0603
10u-1206
C804
0.01u-0603
GND TRACES
GND TRACES
R943
X_100K-0603
R945
X_100K-0603
BCADR16
BCADR[25..0] {30}
BCDATA[15..0] {30}
Vo=1.25*(1+130/300)+55*130*10E(-6)=1.7988V
3.3V to 1.8V Linear Regulator
Q144
C1022
10u-0805
1 2
C1019
0.1u-0603
LT1087S_SOT89
VIN3VOUT
ADJ
1
VOUT
SOT89
2
4
C805
0.01u-0603
ACDATA[15..0] {30}
R1159
300RST
C1020
0.1u-0603
R1160
130RST
C806
10u-1206
R936 0-0603
ACADR[25..0] {30}
VCC18_SB VCC5_SB
J6
VCC_3V3
K6
F12
F11
F14
F13
E13
E16
G1
G4
G6
F2
F5
E1
E4
D1
D4
F4
F1
E5
D2
G5
A2
B4
B1
C1
G2
H6
H4
H1
K4
K1
A5
D5
B6
E6
B7
M5
A6
D6
A7
D7
E7
M6
B2
C2
A3
E2
A4
B5
K5
H2
M4
F6
K2
H5
B3
M2
F7
N4
N5
N6
M1
E8
D8
F8
F9
E9
R2
K8
J4
J1
L1
L4
L2
L5
J5
L6
J2
J8
L8
VCC_3V4
BCADR25
BCADR24
BCADR23
BCADR22
BCADR21
BCADR20
BCADR19
BCADR18
BCADR17
BCADR16
BCADR15
BCADR14
BCADR13
BCADR12
BCADR11
BCADR10
BCADR9
BCADR8
BCADR7
BCADR6
BCADR5
BCADR4
BCADR3
BCADR2
BCADR1
BCADR0
BCDATA15
BCDATA14
BCDATA13
BCDATA12
BCDATA11
BCDATA10
BCDATA9
BCDATA8
BCDATA7
BCDATA6
BCDATA5
BCDATA4
BCDATA3
BCDATA2
BCDATA1
BCDATA0
BIORD#
BIOWR#
BOE#
BWE#
BCE2#
BCE1#
BREG#
BRESET
BWAIT#
BWP
BRDY
BBVD2
BBVD1
BVS2
BVS1
BCD2#
BCD1#
BINPACK#
BVCC5EN#
BVCC3EN#
BVPPEN0
BVPPEN1
NC36
NC37
NC38
NC39
NC40
NC41
NC43
NC44
NC45
NC46
NC47
NC48
GND1
GND2
GND3
CARDBUS
R5C486-CSP277-V10_0
BCADR25
BCADR24
BCADR23
BCADR22
BCADR21
BCADR20
BCADR19
BCADR18
BCADR17
BCADR15
BCADR14
BCADR13
BCADR12
BCADR11
BCADR10
BCADR9
BCADR8
BCADR7
BCADR6
BCADR5
BCADR4
BCADR3
BCADR2
BCADR1
BCADR0
BCDATA15
BCDATA14
BCDATA13
BCDATA12
BCDATA11 ACDATA11
BCDATA10
BCDATA9
BCDATA8
BCDATA7
BCDATA6
BCDATA5
BCDATA4
BCDATA3
BCDATA2
BCDATA1
BCDATA0
BIORD# {30}
BIOWR# {30}
BOE# {30}
BWE# {30}
BCE2# {30}
BCE1# {30}
BREG# {30}
BRESET {30}
BWAIT# {30} AWAIT# {30}
BIOIS16# {30}
BIREQ# {30}
BSPKR# {30}
BCHSTS# {30}
BVS2 {30}
BVS1 {30}
BCD2# {30}
BCD1# {30}
BINPACK# {30}
BVCC5EN# {30}
BVCC3EN# {30}
BVPPEN0 {30}
BVPPEN1 {30}
R950
100K-0603
C1021
10u-0805
VCC_3V5
VCC_3V6
ACADR25
ACADR24
ACADR23
ACADR22
ACADR21
ACADR20
ACADR19
ACADR18
ACADR17
ACADR16
ACADR15
ACADR14
ACADR13
ACADR12
ACADR11
ACADR10
ACADR9
ACADR8
ACADR7
ACADR6
ACADR5
ACADR4
ACADR3
ACADR2
ACADR1
ACADR0
ACDATA15
ACDATA14
ACDATA13
ACDATA12
ACDATA11
ACDATA10
ACDATA9
ACDATA8
ACDATA7
ACDATA6
ACDATA5
ACDATA4
ACDATA3
ACDATA2
ACDATA1
ACDATA0
AIORD#
AIOWD#
AWE#
ACE2#
ACE1#
AREG#
ARESET
AWAIT#
ARDY
ABVD2
ABVD1
ACD2#
ACD1#
AINPACK#
AVPPEN1
AVPPEN0
AVCC3EN#
AVCC5EN#
GND21
GND20
GND19
AD[0..31] {14,28}
C_BE#[0..3] {14,28}
PCI Bus
4 4
DEVSEL# {14,28}
FRAME# {14,28}
IRDY# {14,28}
TRDY# {14,28}
STOP# {14,28}
PAR {14,28}
SERR# {14,28}
PERR# {14,28}
PCI_PME# {14,28}
PowerOnReset for VccCore
VCC3_SB
R938
100K-0603
PCI_CLK0 {26}
R1184
100K-0603
C807
1u-0603
PREQ#0 {14}
PGNT#0 {14}
PCIRST#1 {18,24,27}
GND TRACES
VCC3_SB
GRESET#
AD16
PREQ#0
PGNT#0
10K-0603
3 3
2 2
CoreLogic CLOCKRUN#
AOE#
AWP
AVS2
AVS1
NC42
IC1A
J14
K14
H14
J18
J15
K18
K15
L18
L15
M19
M16
K16
K19
L14
M18
J16
N16
P18
N19
M15
J19
H15
H18
G14
G16
G19
F16
F19
P16
P14
R18
R15
T18
B18
C18
D18
R19
R16
T19
T16
U18
C19
D19
E19
N18
M14
N14
L16
P19
P15
F15
H19
G15
B19
L19
F18
E18
H16
N15
A18
U19
G18
P4
P5
N1
N2
E11
L12
K12
J12
VCC3_SB VCC3_SB VCC3_SB VCC3_SB
R937 0-0603
ACADR25
ACADR24
ACADR23
ACADR22
ACADR21
ACADR20
ACADR19
ACADR18
ACADR17
ACADR15
ACADR14
ACADR13
ACADR12
ACADR11
ACADR10
ACADR9
ACADR8
ACADR7
ACADR6
ACADR5
ACADR4
ACADR3
ACADR2
ACADR1
ACADR0
ACDATA15
ACDATA14
ACDATA13
ACDATA12
ACDATA10
ACDATA9
ACDATA8
ACDATA7
ACDATA6
ACDATA5
ACDATA4
ACDATA3
ACDATA2
ACDATA1
ACDATA0
R949
100K-0603
GND TRACES
ACADR16
GND TRACES
AIORD# {30}
AIOWR# {30}
AOE# {30}
AWE# {30}
ACE2# {30}
ACE1# {30}
AREG# {30}
ARESET {30}
AIOIS16# {30}
AIREQ# {30}
ASPKR# {30}
ACHSTS# {30}
AVS2 {30}
AVS1 {30}
ACD2# {30}
ACD1# {30}
AINPACK# {30}
AVPPEN1 {30}
AVPPEN0 {30}
AVCC3EN# {30}
AVCC5EN# {30}
R18
MASTER = PREQ#0
1 1
VCC3_SB VCC18_SB VCC3_SB
PCI_CLK0
10u-1206
C817
0.01u-0603
C818
0.01u-0603
C819
0.01u-0603
C820
0.01u-0603
C808
10u-1206
C809
0.01u-0603
C810
0.01u-0603
C811
0.01u-0603
*As close as possible to VCCPCI pins. *As close as possible to VCCCORE pins.
A
B
C812
0.01u-0603 C816
C813
10u-1206
C814
0.01u-0603
C815
0.01u-0603
*As close as possible to VCC_3V pins.
Title
R5C486 PCI
Size Document Number Rev
A3
C
D
Date: Sheet
MICRO-START INT'L CO.,LTD.
MS-7290 1. 0
E
of
29 32 Monday, June 12, 2006
A
B
C
D
E
BCADR[25..0] {29}
BCDATA[15..0] {29}
ACADR[25..0] {29}
ACDATA[15..0] {29}
4 4
ARESET {29}
C922
C829
0.1u-0603
0.01u-0603
C1121
X_10u-1206
CAVCC CBVPP CAVPP CBVCC
C1122
AVPPEN0
AVPPEN1
AVCC3EN#
AVCC5EN#
BVPPEN0
BVPPEN1
BVCC3EN#
BVCC5EN#
X_10u-1206
U45
10
VCC3IN1
11
VCC3IN2
6
VCC5IN1
15
VCC5IN2
5
TST
4
AEN0
3
AEN1
2
AVCC3_EN
1
AVCC5_EN
17
BEN0
18
BEN1
19
BVCC3_EN
20
BVCC5_EN
R5534V
3 3
VCC3_SB
C827
1u-0603
5VDUAL
2 2
C1059
10u-0805
C830
1u-0603
AVPPEN0 {29}
AVPPEN1 {29}
AVCC3EN# {29}
AVCC5EN# {29}
BVPPEN0 {29}
BVPPEN1 {29}
BVCC3EN# {29}
BVCC5EN# {29}
C822
10u-1206
AVCCOUT1
AVCCOUT2
AVPPOUT
BVCCOUT1
BVCCOUT2
BVPPOUT
GND
C823
0.01u-0603
7
8
9
13
14
12
16
CAVCC
CBVPP
C828
0.1u-0603
CBVCC
C832
0.1u-0603
CAVPP
C831
0.1u-0603
C921
270p-0603
AIOIS16# {29}
ACHSTS# {29}
ASPKR# {29}
AREG# {29}
AINPACK# {29}
AWAIT# {29}
0.01u-0603
AIREQ# {29}
AIOWR# {29}
AIORD# {29}
SLOT1
76
GND
77
GND
ACD2# {29}
AVS2 {29}
C821
AWE# {29}
AOE# {29}
AVS1 {29}
ACE2# {29}
ACE1# {29}
ACD1# {29}
C923
270p-0603
ACDATA10
ACDATA2
ACDATA9
ACDATA1
ACDATA8
ACDATA0
ACADR0
ACADR1
ACADR2
ACADR3
ACADR4
ACADR5
ACADR6
ACADR25
ACADR7
ACADR24
ACADR12
ACADR23
ACADR15
ACADR22
ACADR16
ACADR21
ACADR20
ACADR14
ACADR19
ACADR13
ACADR18
ACADR8
ACADR17
ACADR9
ACADR11
ACADR10
ACDATA15
ACDATA7
ACDATA14
ACDATA6
ACDATA13
ACDATA5
ACDATA12
ACDATA4
ACDATA11
ACDATA3
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
CD2#_A
WP_A
D10_A
D2_A
D9_A
D1_A
GND
D8_A
D0_A
BVD1_A
A0_A
BVD2_A
A1_A
REG#_A
GND
A2_A
INPACK#_A
A3_A
WAIT#_A
A4_A
RESET_A
A5_A
GND
VS2#_A
A6_A
A25_A
A7_A
A24_A
A12_A
A23_A
GND
A15_A
A22_A
A16_A
VPP_A
NONF
VCC_A
READY_A
A21_A
WE#_A
GND
A20_A
A14_A
A19_A
A13_A
A18_A
A8_A
A17_A
GND
A9_A
IOWR#_A
A11_A
IORD#_A
OE#_A
VS1_A
A10_A
GND
CE2#_A
CE1#_A
D15_A
D7_A
D14_A
D6_A
D13_A
GND
D5_A
D12_A
D4_A
D11_A
D3_A
CD1#_A
GND
GND
CARD_SLOT
INPACK#_B
GND
GND
CD2#_B
WP_B
D10_B
D2_B
D9_B
D1_B
GND
D8_B
D0_B
BVD1_B
A0_B
BVD2_B
A1_B
REG#_B
GND
A2_B
A3_B
WAIT#_B
A4_B
RESET_B
A5_B
GND
VS2#_B
A6_B
A25_B
A7_B
A24_B
A12_B
A23_B
GND
A15_B
A22_B
A16_B
VPP_B
NONF
VCC_B
READY_B
A21_B
WE#_B
GND
A20_B
A14_B
A19_B
A13_B
A18_B
A8_B
A17_B
GND
A9_B
IOWR#_B
A11_B
IORD#_B
OE#_B
VS1_B
A10_B
GND
CE2#_B
CE1#_B
D15_B
D7_B
D14_B
D6_B
D13_B
GND
D5_B
D12_B
D4_B
D11_B
D3_B
CD1#_B
GND
GND
1
2
3
4
BCDATA10
5
BCDATA2
6
BCDATA9
7
BCDATA1
8
9
BCDATA8
10
BCDATA0
11
12
BCADR0
13
14
BCADR1
15
16
17
BCADR2
18
19
BCADR3
20
21
BCADR4
22
23
BCADR5
24
25
26
BCADR6
27
BCADR25
28
BCADR7
29
BCADR24
30
BCADR12
31
BCADR23
32
33
BCADR15
34
BCADR22
35
BCADR16
36
37
38
39
40
BCADR21
41
42
43
BCADR20
44
BCADR14
45
BCADR19
46
BCADR13
47
BCADR18
48
BCADR8
49
BCADR17
50
51
BCADR9
52
53
BCADR11
54
55
56
57
BCADR10
58
59
60
61
BCDATA15
62
BCDATA7
63
BCDATA14
64
BCDATA6
65
BCDATA13
66
67
BCDATA5
68
BCDATA12
69
BCDATA4
70
BCDATA11
71
BCDATA3
72
73
74
75
C924
270p-0603
BCD2# {29}
BIOIS16# {29}
BCHSTS# {29}
BSPKR# {29}
BREG# {29}
BINPACK# {29}
BWAIT# {29}
BVS2 {29}
C824
0.01u-0603
BIREQ# {29}
BWE# {29}
BIOWR# {29}
BIORD# {29}
BOE# {29}
BVS1 {29}
BCE2# {29}
BCE1# {29}
BCD1# {29}
C1123
X_10u-1206
C920
270p-0603
BRESET {29}
C825
0.01u-0603
C1041
0.01u-0603
C826
10u-1206
C1124
X_10u-1206
9VSB VCC5_SB
R1173
10K-0603
1 1
5V_DRV {24}
5V_DRV
A
D
Q149
2N7002S
D
SOT23SGD
GS
S
G
5V_DRV
VCC5
C1113
10u-0805
Q148
4 5
3
2
1
IRF7313_SO8
B
5VDUAL
6
7
8
Title
CARDBUS I/F SLOT
Size Document Number Rev
A3
C
D
Date: Sheet of
MICRO-START INT'L CO.,LTD.
MS-7290 1. 0
30 32 Monday, June 12, 2006
E
8
7
6
5
4
3
2
1
ICH7
GPIO Alt Func Pin I/O/NC Power PU SMI Tol Default Signal Name
GPIO[0] BM_BUSY# AB18 I/O Vcc3p3
N Y 3.3 Input strapped hi
GPIO[1] PCIREQ[5]# C8 I/O V5REF N Y 5 Input PREQ#5
GPIO[2] PIRQE# G8 I/OD V5REF N Y 5 Input PIRQ#E
GPIO[3] PIRQF# F7 I/OD V5REF N Y 5 Input PIRQ#F
GPIO[4] PIRQG# F8 I/OD V5REF N Y 5 Input PIRQ#G
D D
GPIO[5] PIRQH# G7 I/OD V5REF N Y 5 Input PIRQ#H
FWH
GPIO Pin# Power Tol Signal Name
FPGI[0] 6 Main 3.3 ATADET0
FPGI[1] 5 Main 3.3 pull-down
FPGI[2] 4 Main 3.3 pull-down
FPGI[3] 3 Main
FPGI[4] 30 Main 3.3 pull-downGPIO[6] unmuxed AC21 I/O Vcc3p3 N Y 3.3 Input PANEL_DETECT
GPIO[7] unmuxed AC18 I/O Vcc3p3 N Y 3.3 Input SIO_SMI#
GPIO[8] unmuxed E21 I/O VccSus3p3
GPIO[9] unmuxed E20 I/O VccSus3p3 N Y 3.3 Input strapped hi
GPIO[10] unmuxed A20 I/O VccSus3p3
N Y 3.3 Input strapped hi
N Y 3.3 Input strapped hi
PCI Config.
GPIO[11] SMBALERT# B23 I/O VccSus3p3 N Y 3.3 Input strapped hi
GPIO[12] unmuxed F19 I/O VccSus3p3 N Y 3.3 Input SIO_PME#
GPIO[13] unmuxed E19 I/O VccSus3p3 N Y 3.3 Input strapped hi
GPIO[14] unmuxed R4 I/O VccSus3p3 N Y 3.3 Input strapped hi
GPIO[15] unmuxed E22 I/O VccSus3p3 N Y 3.3 Input strapped hi
GPIO[16] unmuxed AC22 I/O Vcc3p3 N N 3.3 0 NC
GPIO[17] PCIGNT[5]# D8 I/O Vcc3p3 N N 3.3 N/A NC
GPIO[18] unmuxed AC20 I/O Vcc3p3 N N 3.3 1 NC
mini-PCI
GPIO[19] SATA1GP AH18 I/O Vcc3p3 N N 3.3 Input strapped hi
GPIO[20] unmuxed AF21 I/O Vcc3p3 N N 3.3 1 NC
GPIO[21] SATA0GP AF19 I/O Vcc3p3 N N 3.3 Input strapped hi
C C
GPIO[22] PCIREQ[4]# A13 I/O Vcc3p3 N N 3.3 Input PREQ#4
GPIO[23] LDRQ1# AA5 I/O Vcc3p3 N N 3.3 Input strapped hi
GPIO[24] unmuxed R3 I/O VccSus3p3 N N 3.3 1 LAN_DISABLE#
GPIO[25] unmuxed D20 I/O VccSus3p3 Y N 3.3 1 HWSPND#
GPIO[26] unmuxed A21 I/O VccSus3p3 N N 3.3 0 LCD_S1_ENA
PCI_RST# DISTRIBUTION
GPIO[27] unmuxed B21 I/O VccSus3p3 N N 3.3 0 NC
GPIO[28] unmuxed E23 I/O VccSus3p3 N N 3.3 0 NC
GPIO[29] OC5# C3 I/O VccSus3p3 N N 3.3 Input OC#2
GPIO[30] OC6# A2 I/O VccSus3p3 N N 3.3 Input OC#3
GPIO[31] OC7# B3 I/O VccSus3p3 N N 3.3 Input OC#3
GPIO[32] unmuxed AG18 I/O Vcc3p3 N N 3.3 1 BIOS_WP#
GPIO[33] unmuxed AC19 I/O Vcc3p3 N N 3.3 1 NC
GPIO[34] unmuxed U2 I/O Vcc3p3 N N 3.3 0 NC
GPIO[35] unmuxed AD21 I/O Vcc3p3 N N 3.3 1 NC
GPIO[36] SATA2GP AH19 I/O Vcc3p3 N N 3.3 Input strapped hi
GPIO[37] SATA3GP AE19 I/O Vcc3p3 N N 3.3 Input strapped hi
GPIO[38] unmuxed AD20 I/O Vcc3p3 N N 3.3 Input strapped hi
B B
GPIO[39] unmuxed AE20 I/O Vcc3p3 N N 3.3 Input strapped hi
GPIO[48] GNT4# A14 I/O Vcc3p3 N N 3.3 N/A NC
GPIO[49] CPUPWRGD AG24 I/O V_CPU_IO N N CPU N/A H_PWRGD
Note: FWH GPs should only be used for static options,
do not put dynamic nets on these
3.3 pull-down
DEVICE
MCP1 INT Pin
PIRQ#A
PIRQ#B
PIRQ#C
PIRQ#B PGNT#2
SOURCE PCIRST# LOAD
ICH7 PCIRST_ICH6# MS7
PLTRST#
MS7
PCIRST#1
PCIRST#2
HD_RST#
NB H_CPURST# CPU
REQ#/GNT#
PREQ#0 AD16
PGNT#0
PREQ#2
NB, SIO, FWH, TPM, CH7308A
LAN, CARD_BUS,MARVELL 88SA8040
mini-PCI,AK2001,
IDE
IDSEL
AD18
CLOCK
PCI_CLK0 Ricoh R5C486
PCI_CLK1
Following are the GPIOs that need to be terminated roperly if not used: GPIO[39:36,23:21,19,7:0]: default as inputs and should
be pulled up to Vcc3_3 if unused. GPIO[31:29,15:8]: default as inputs and should be pulled up to VccSus3_3 if unused.
GPI[15:0] can be configured to cause a SMI# or SCI. Note that a GPI can be routed to either an SMI# or an SCI, but not both.
DDRII DIMM Config.
CLOCK DEVICE ADDRESS
MCLK_A0/MCLK_A#0
SIO SCH5017
PIN NAME
GP27
INTRD_IN- 33
A A
90 OUT PUT GP42
36
USAGE
SIO_PME#
SIO_SMI#
CLEAR PASSWORD
Input/Output PIN#
OUTPUT
INPUT
SMBus DISTRIBUTION
SMBus Power Load
SMBCLK
SMBCLK_ISO
VCC3_SB
VCC3
ICH7, LAN
DIMM, CLK GEN, SIO, MS7
DIMM 1
JUMPER SETTING
JBAT1
8
7
6
5
4
A0H
A4H
(1-2)NORMAL
3
MCLK_A1/MCLK_A#1
MCLK_A2/MCLK_A#2
MCLK_B0/MCLK_B#0
MCLK_B1/MCLK_B#1 DIMM 2
MCLK_B2/MCLK_B#2
(2-3)CLEAR
Title
Size Doc ument N umber Re v
Custom
Date: Sheet
2
MICRO-START INT'L CO.,LTD.
GPIO MAP
MS-7290 1.0
31 32 Monday, June 12, 2006
1
of
Change Note
5
4
3
2
1
Ver:0A
( 1 ) . page 23 : change R830 vaul from 470 ohm to 1K
( 2 ) . page 24 :
D D
1 . change R355 vaul from 470 ohm to 1K
2 . change EC57 vaul from 1000uf to 1800uf
3 . Remove Q162,Q163,C417 and Add R1248,R1249 for USB power rise after PWR_OK
Ver:01S
( 3 ) . page 23 : change R830 vaul from 1K to 680ohm
( 4 ) . page 24 : change R355 vaul from 1K to 680ohm
C C
B B
Title
Change Note
Size Document Number Rev
A3
Date: Sheet of
MICRO-START INT'L CO.,LTD.
MS-7290 1.0
32 32 Monday, June 12, 2006
A