MSI MS-7283 Schematics

5
4
3
2
1
MSI
MS-7283L2 Ver:101
Title Page
Cover Sheet 1
D D
C C
B B
CPU:
AMD AM2 Athlon 64/Athlon 64 FX
System Chipset:
NVIDIA C51G NVIDIA MCP51/MCP51G
On Board Chipset:
LPC Super I/O-W83627EHG LAN-BCM4401/ BCM5788 Codec-AD1986AJCPZ-REEL / MONO BIOS-LPC FLASH ROM 4M
Main Memory:
DDR2 * 2 (Max 2GB)
Expansion Slots:
PWM:
Controller-Intersil ISL6566CRZ 3 Phase
2Block Diagram POWER OK MAP POWER MAP RESET MAP GPIO SPEC AMD AM2(940) DDR2 DIMM Slot DDR2 Terminations
3
4
5
6
7~9
10
11 C51G 12~14 MCP51/MCP51G 15~18 PCI Slot 1,2 PCI-E X16 , X1 Slot LPC -W83627EHG / FDD / BIOS ADI AD1986AJCPZ-REEL / MONO
LAN BCM4401/ BCM5788
USB Connectors MS-6 ACPI & MS-11 PWM Intersil 6566 3Phase IDE &FDD & AD7475 FAN Control ATX Connector / Front Panel KB/MS/LPT/COM VGA Connector MANUAL PARTS History
19
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28
29
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32
A A
Micro Star Restricted Secret
Title
Document Number
MICRO-STAR INT'L
No. 69, Li-De St, Jung-He City,
CO.,LTD.
Taipei Hsien, Taiwan
5
4
3
2
http://www.msi.com.tw
Cover Sheet
MS-7283L2
1
Last Revision Date:
Monday, September 04, 2006
Sheet
Rev
101
of
132
5
BLOCK DIAGRAM
4
3
2
1
D D
POWER
SUPPLY
CONNECTOR
PEX X16, PEX X1
VREG
PCI EXPRESS
SOCKET 940
K8 M2
HT 16X16 1GHZ
NFORCE CRUSH 51
DDR SDRAM CONN 0
128-BIT 400/533MHZ
DDR SDRAM CONN 1
VGA CONN
468 BGA
C C
PRIMARY IDE
SECONDARY IDE
X2 - SATA CONN
B B
FLOPPY CONN
PS2/KBRD CONN
PARALLEL CONN
SERIAL CONN
SERIAL HDR
ATA 133
INTEGRATED SATA 1/2
SIO LPC SUPER I/O W83627EHG
LPC BUS 33MHZ
LPC HDR
4MB FLASH
NFORCE MCP 51 508 BGA
HT 8X8 1GHZ
PCI 33MHZ
AZAILIA/AC97
X8 USB2
AD1986AJCPZ
BACK PANEL CONN
USB2 PORTS 0-1 DOUBLE STACK
USB2 PORTS 2-3 X2/GBIT LAN
FRONT PANEL HDR
USB2 PORTS 4-5
USB2 PORTS 6-7
PCI SLOT 1
PCI SLOT 2
BCM4401/BCM5788
A A
Micro Star Restricted Secret
Title
Document Number
MICRO-STAR INT'L
No. 69, Li-De St, Jung-He City,
CO.,LTD.
Taipei Hsien, Taiwan
5
4
3
2
http://www.msi.com.tw
Block Diagram
MS-7283L2
Last Revision Date: Sheet
1
Monday, September 04, 2006
2
Rev
101
32
of
5
4
3
2
1
PWROK MAP
D D
AMD AM2 940
VRM 10.1
ISL6566CRZ
3-Phases PWM
HT_CPU_PWRGD
NFORCE
PWM_EN
VRM_GD
CRUSH 51G
C C
HT_PWRGD
HT_MCP_PWRGD
RSMRST#
HT_VLD
MEM_VLD
HTVDD_EN
NFORCE
CPU_VLD
B B
CPUVDD_EN
PWRBTN#
MCP51G
SLP_S5#
SLP_S3#
ATX_PWR_OK
MS6
PSIN#
PS_ON#
ATX_PWR_OK
Front Panel
POWER CONN
A A
MSI
Title
Size Document Number Rev
5
4
3
2
Date: Sheet
MICRO-STAR INt'L CO., LTD.
POWER OK MAP
MS-7283L2
332Monday, September 04, 2006
1
101
of
1
A
POWER MAP
2
3
4
5
6
7
8
9
10
A
DDR DIMM & TERMINATOR
ATHLON 64
0.8V - 1.55V Core
B B
VLDT 1.2V
- 95A
- 0.5A
CRUSH 51G
+1.2V REGULATOR
C C
+1.2V_HT REGULATOR
+2.5V REGULATOR
- 10A
-850mA
- 500 mA
ISL6565
VCCP
0.8375V-1.6000V 3-Phase Switch
VRM 10.1
W83310DS
VTT_DDR
Linear
0.9V
MS6 Regulator
V_FSB_VTT
Linear
1.2V
V_1P5_CORE
Linear
1.5V
95A
1.5A
5.0A
(S0,S1)
14A
V_2P5_MCH
2.5V
D D
MCP51G
+1.2V REGULATOR
- TBD A
VCC3_SB
3.3V
Linear
Linear
100mA
1.5A
5VDUAL
5V
+1.5V REGULATOR
E E
+3.3V DUAL
(G3)
RTC
5V
1.2V DUAL
- 1 A
- TBD A
- 5uA
- TBD A
- 200 mA
Linear
MS-11 Regulator
VCC_DDR
1.8V Linear
Switch
(S3)
22mA
20A
425mA
0.9V VTT_DDR
1.8V VCC_DDR
1.8V VCC_DDR
(S0,S1)
(S3)
PCI Express x16 slot
+12V
+3.3Vaux
+3.3V
(wake)+3.3Vaux (no wake)
PCI Express x1 slot
+12V
+3.3Vaux +3.3Vaux
+3.3V
(wake) (no wake)
PCI slot x2
+3.3Vaux +3.3Vaux
+3.3V
+5V
+12V
(wake) (no wake)
- 1.2A
-9.4A
-400mA
- 5.5 A
- 375mA
- 20mA
- 3.0A
- 0.5 A
- 375mA
- 20mA
- 3.0A
- 375mA
- 20mA
- 7.6A
- 5.0A
- 0.5A
USB
F F
FWH
+3.3V
(S0,S1)
G G
- 107mA
3V
Battery
+12V
+5V
+3.3V
+5VSB
+5V +5V
PS2
+5V +5V
(S0,S1) (S3)
(S0,S1) (S3)
- 4.0A
- 20mA
- 345mA
- 2.0mA
ATX POWER
Micro Star Restricted Secret
Title
H H
1
2
3
4
5
6
7
8
POWER MAP
Document Number
MICRO-STAR INT'L
No. 69, Li-De St, Jung-He City,
CO.,LTD.
Taipei Hsien, Taiwan http://www.msi.com.tw
9
MS-7283L2
Last Revision Date: Sheet
Monday, September 04, 2006
Rev
101
of
432
10
5
RESET MAP
4
3
2
1
D D
CPU RST*
CPU PWRGD
CRUSH 51
AMD AM2
PE_RST*
PEX X1
C C
PEX X16
PE_RESET*
HT CPU PWRGD
HT CPU RST*
HT MCP PWRGD
HT MCP RST*
RESET SWITCH
CPU_PWRGD CPU_RST#
HT_MCP_PWRGD
HT_MCP_RST*
MS6
MCP51G
PWR CONN
PS ON
B B
PWR GOOD
FPRST#
POWER_GOOD
RSMRST#
RSTBTN
PWRGD
PWRGD_SB
GPIO_AUX*
HT MCP RST*
HT MCP PWRGD
PCI RST0* PCI RST1* PCI RST2* PCI RST3*
SLP S3*
LPC_RST*
AC_RESET*
HT_MCP_RST*
HT_MCP_PWRGD
PCIRST_SLOT0* PCIRST_SLOT1*
MS6_RST*
SLP S3*
SIO_RST*
HD_RST#
LPC_RST*
PRI IDE
SIO
FLASH
SEC IDE
PCI SLOT 2
PCI SLOT 1
AC97 Audio
RESET*
A A
Micro Star Restricted Secret
Title
RESET MAP
Document Number
MICRO-STAR INT'L
No. 69, Li-De St, Jung-He City,
CO.,LTD.
Taipei Hsien, Taiwan
5
4
3
2
http://www.msi.com.tw
MS-7283L2
Last Revision Date: Sheet
Monday, September 04, 2006
532
1
Rev
101
of
5
4
3
2
1
MS-7283 GPIO FUNCTION
MCP51/MCP51G GPIO FUNCTION
Voltage
PIN
NAME
Function Description
I/O
GPIO_1
GPIO_2
D D
GPIO_3
GPIO_4
GPIO_5
GPIO_6
GPIO_7
GPIO_8
GPIO_9
ODM_ID1 J5
ODM_ID2
ODM_ID3
FOR LENOVO USB SWITCH(FOR LENOVO SPEC)
FOR LENOVO USB SWITCH(FOR LENOVO SPEC)
AE2
K5
J2
J1
AC9
AB9
GPIO_10
GPIO_11 / CPU_VID0
GPIO_12 / CPU_VID1
C C
GPIO_13
PLED_GPIO
SUSLED_GPIO
P24
P25 3VUDAL
GPIO_14
GPIO_15
GPIO_16
THERMTRIP*/GPIO
THERM#/GPIO
SATA_LED*/GPIO_57
FANRPM/GPIO_60
FANCTL0/GPIO_61
EXT_SMI#/GPIO EXT_SMI#(FOR WP# & TBL# GPIO)
B B
PCI Configuration
DEVICE IRQ Routing IDSEL CLOCKREQ#/GNT#
CPU THERMTRIP
THRM#
SATA_LED
BIOS WRITE PROTECT(FOR LENOVO SPEC)
BIOS_TBL#(FOR LENOVO SPEC)
J6
K25
C20
L21
J25
M26
CLK GEN PIN OUT
PAGE
3VUDAL
3VUDAL
3VUDAL
3VUDAL
3VUDAL
3VUDAL
3VUDAL
3VUDAL
+3.3V
+3.3V
+3.3V
+3.3V
+3.3V
+3.3V
SUPER I/O GPIO FUNCTION
NAME
GP10
GP11
GP12
GP13
GP14
GP15 CLR_COMS(FOR LENOVO CLR CMOS GPIO) 123
GP16
GP17
GP32
GP33
GP44
GP45
GP53/PSON#
GP55
GP56/PSIN
GP57/PSOUT#
GP60/RIA#
GP52/SUSB#
GP50
SCE#/GP22/PLED/WDTO#
SUSLED/GP55
DDR DIMM Configuration
DEVICE
DIMM1
DIMM2
ADDRESS CLOCK
1010001B
1010010B
Function Description
COM2_GPIO 128
F_PANL RESET GPIO(FOR LENOVO SPEC)
FRONT USB_1 GPIO(FUSB_G1)
FRONT USB_2 GPIO(FUSB_G2)
PS_ON# (ATX_PWR_ON#)
PSIN (FP_RST#)
PWRBTN#
SLP_S3#
PCI RESET DEVICE
MCLK_A0/MCLK_A0# MCLK_A1/MCLK_A1# MCLK_A2/MCLK_A2#
MCLK_B0/MCLK_B0# MCLK_B1/MCLK_B1# MCLK_B2/MCLK_B2#
PIN
125
122
121
72
68
67
73
77GP50(EN_VRM10)
19
70
PAGE
VoltageI/O
+3.3V
+3.3V
+3.3V
+3.3V
+3.3V
+3.3V
+3.3V
+3.3V
+3.3V
+3.3V
+3.3V
TargetSignals
A A
Micro Star Restricted Secret
Title
Document Number
MICRO-STAR INT'L
No. 69, Li-De St, Jung-He City,
CO.,LTD.
Taipei Hsien, Taiwan
5
4
3
2
http://www.msi.com.tw
GPIO
MS-7283L2
Last Revision Date:
Monday, September 04, 2006
Sheet
1
632
Rev
101
of
5
4
3
2
1
L1 80L3_100_0805
VDDA25VDDA_25
2 1
C3900P50X
CPU1A
L0_CLKIN_H(1) L0_CLKIN_L(1) L0_CLKIN_H(0) L0_CLKIN_L(0)
L0_CTLIN_H(1) L0_CTLIN_L(1) L0_CTLIN_H(0) L0_CTLIN_L(0)
L0_CADIN_H(15) L0_CADIN_L(15) L0_CADIN_H(14) L0_CADIN_L(14) L0_CADIN_H(13) L0_CADIN_L(13) L0_CADIN_H(12) L0_CADIN_L(12) L0_CADIN_H(11) L0_CADIN_L(11) L0_CADIN_H(10) L0_CADIN_L(10) L0_CADIN_H(9) L0_CADIN_L(9) L0_CADIN_H(8) L0_CADIN_L(8)
L0_CADIN_H(7) L0_CADIN_L(7) L0_CADIN_H(6) L0_CADIN_L(6) L0_CADIN_H(5) L0_CADIN_L(5) L0_CADIN_H(4) L0_CADIN_L(4) L0_CADIN_H(3) L0_CADIN_L(3) L0_CADIN_H(2) L0_CADIN_L(2) L0_CADIN_H(1) L0_CADIN_L(1) L0_CADIN_H(0) L0_CADIN_L(0)
C281
HYPERTRANSPORT
L0_CLKOUT_H(1)
L0_CLKOUT_L(1)
L0_CLKOUT_H(0)
L0_CLKOUT_L(0) L0_CTLOUT_H(1)
L0_CTLOUT_L(1) L0_CTLOUT_H(0) L0_CTLOUT_L(0)
L0_CADOUT_H(15) L0_CADOUT_L(15) L0_CADOUT_H(14) L0_CADOUT_L(14) L0_CADOUT_H(13) L0_CADOUT_L(13) L0_CADOUT_H(12) L0_CADOUT_L(12) L0_CADOUT_H(11) L0_CADOUT_L(11) L0_CADOUT_H(10) L0_CADOUT_L(10)
L0_CADOUT_H(9) L0_CADOUT_L(9) L0_CADOUT_H(8) L0_CADOUT_L(8)
L0_CADOUT_H(7) L0_CADOUT_L(7) L0_CADOUT_H(6) L0_CADOUT_L(6) L0_CADOUT_H(5) L0_CADOUT_L(5) L0_CADOUT_H(4) L0_CADOUT_L(4) L0_CADOUT_H(3) L0_CADOUT_L(3) L0_CADOUT_H(2) L0_CADOUT_L(2) L0_CADOUT_H(1) L0_CADOUT_L(1) L0_CADOUT_H(0) L0_CADOUT_L(0)
VCC_DDR
R42 300R
AD5 AD4 AD1 AC1
Y6 W6 W2 W3
Y5 Y4 AB6 AA6 AB5 AB4 AD6 AC6 AF6 AE6 AF5 AF4 AH6 AG6 AH5 AH4
Y1 W1 AA2 AA3 AB1 AA1 AC2 AC3 AE2 AE3 AF1 AE1 AG2 AG3 AH1 AG1
HT_CADOUT_H15 HT_CADOUT_L15 HT_CADOUT_H14 HT_CADOUT_L14 HT_CADOUT_H13 HT_CADOUT_L13 HT_CADOUT_H12 HT_CADOUT_L12 HT_CADOUT_H11 HT_CADOUT_L11 HT_CADOUT_H10 HT_CADOUT_L10 HT_CADOUT_H9 HT_CADOUT_L9 HT_CADOUT_H8 HT_CADOUT_L8
HT_CADOUT_H7 HT_CADOUT_L7 HT_CADOUT_H6 HT_CADOUT_L6 HT_CADOUT_H5 HT_CADOUT_L5 HT_CADOUT_H4 HT_CADOUT_L4 HT_CADOUT_H3 HT_CADOUT_L3 HT_CADOUT_H2 HT_CADOUT_L2 HT_CADOUT_H1 HT_CADOUT_L1 HT_CADOUT_H0 HT_CADOUT_L0
VDDA25
PROCHOT_L THRM#
Q3
VCC3
R408 X_300R
X_N-2N7002_SOT23
VDDA25
Q55 X_N-2N7002LT1G_SOT23
AMD RECOMMAND
TP87
AMD RECOMMAND
C227
HT_CLKOUT_H1 12 HT_CLKOUT_L1 12 HT_CLKOUT_H0 12 HT_CLKOUT_L0 12
HT_CTLOUT_H0 12 HT_CTLOUT_L0 12
LDT_RST#_LHDT_LDT_RST#
VCC_DDR
R425 330R
B
CE
Q56 2N3904S
TP18 TP17
THRM# 16,21,27
CPU_THRIP#CPU_THRIP#_L
CPU_THRIP# 15
HT_CLKIN_H112
HT_CLKIN_L112
VCC1_2HT
D D
C C
HT_CLKIN_H012
HT_CLKIN_L012
R111 51R1%0402-LF R112 51R1%0402-LF
HT_CTLIN_H012
HT_CTLIN_L012
HT_CADIN_H15 HT_CADIN_L15 HT_CADIN_H14 HT_CADIN_L14 HT_CADIN_H13 HT_CADIN_L13 HT_CADIN_H12 HT_CADIN_L12 HT_CADIN_H11 HT_CADIN_L11 HT_CADIN_H10 HT_CADIN_L10 HT_CADIN_H9 HT_CADIN_L9 HT_CADIN_H8 HT_CADIN_L8
HT_CADIN_H7 HT_CADIN_L7 HT_CADIN_H6 HT_CADIN_L6 HT_CADIN_H5 HT_CADIN_L5 HT_CADIN_H4 HT_CADIN_L4 HT_CADIN_H3 HT_CADIN_L3 HT_CADIN_H2 HT_CADIN_L2 HT_CADIN_H1 HT_CADIN_L1 HT_CADIN_H0 HT_CADIN_L0
HT_CADIN_H[15..0]12
HT_CADIN_L[15..0]12
HT_CADOUT_H[15..0]12
HT_CADOUT_L[15..0]12
N6 P6 N3 N2
V4 V5 U1 V1
U6 V6 T4 T5 R6 T6 P4 P5 M4 M5 L6 M6 K4 K5
J6
K6 U3
U2 R1 T1 R3 R2 N1 P1 L1 M1 L3 L2
J1
K1
J3 J2
HT_CADIN_H[15..0] HT_CADIN_L[15..0] HT_CADOUT_H[15..0] HT_CADOUT_L[15..0]
VCC_DDR
CPU_PRESENT_L CPU_TEST25_H
CPU_TEST25_L
B B
R110 1KR0402 R68 510R
R72 510R
VCC_DDR CPU_M_VREF
R64 _15R1%0805-1
R65 _15R1%0805-1
C82
C0.1U16Y0402
C76
C1000P50X0402
VCC1_2HT
C268
C210
C211
C229
C282
CPU_CLK12
CPU_CLK#12
C72
R73
_169R1%-1
C71C3900P50X
X_C1000P50X0402
VCC_DDR
CPU_PWRGD12
For L2 test point
TP100
CPU_RST
C52
TP5
R40 300R R41 300R
TP6
SM_THERMDC27 SM_THERMDA27
HT_STOP#12
LDT_RST#12
VRM_GD25,26
C58
C0.22U16X
C4.7U16Y1206
R100 300R1%
TP28 TP26 TP25 TP27
TP3
COREFB+26
COREFB-26
R106 X_300R1%
TP10
VCC_DDR
CPU_M_VREF
R107 39.2R1%
TP2
TP1
TP11 TP12 TP15 TP22 TP9 TP19
HT_STOP#
LDT_RST#
CPU_PWRGD
VDDA25
C80
C75
C3300P50X
CPUCLKIN CPUCLKIN#
CPU_PWRGD_L HT_STOP#_L LDT_RST#_L
CPU_PRESENT_L
CPU_TDI CPU_TRST_L CPU_TCK CPU_TMS
CPU_DBREQ_L COREFB+
COREFB­CPU_VTT_SENSE
CPU_STRAP_HI_E11 CPU_STRAP_LO_F11
CPU_TEST25_H CPU_TEST25_L
3VDUAL
147
U3A
1 2
3VDUAL
9 8
3VDUAL
147
U3B
3 4
3VDUAL
13 12
3VDUAL
147
U3C
5 6
3VDUAL
11 10
AH10
AH11
147
U3D
147
U3F
147
U3E
C10 D10
AK6
AL10 AJ10
AJ11
AH9
AG9 AG8
AH7
A8 B8
C9 D8 C7
AL3
AL6
AL9
A5
G2 G1
E12
F12
A10 B10 F10
E9
AJ7
F6 D6
E7 F8 C5
E5
AJ5
AJ6
CPU1D
MISC
VDDA1 VDDA2
CLKIN_H CLKIN_L
PWROK LDTSTOP_L RESET_L
CPU_PRESENT_L
THERMTRIP_L
SIC SID
TDI TRST_L TCK TMS
DBREQ_L VDD_FB_H
VDD_FB_L VTT_SENSE
M_VREF M_ZN M_ZP
TEST25_H TEST25_L TEST19 TEST18 TEST13 TEST9
TEST17 TEST16 TEST15 TEST14 TEST12
TEST7 TEST6 TEST5 TEST4 TEST3 TEST2
HT_STOP#_L
LDT_RST#_L
CPU_PWRGD_L
VID(5) VID(4) VID(3) VID(2) VID(1) VID(0)
PROCHOT_L
DBRDY
VDDIO_FB_H
VDDIO_FB_L
PSI_L
HTREF1 HTREF0
TEST29_H TEST29_L
TEST24 TEST23 TEST22 TEST21 TEST20
TEST28_H TEST28_L
TEST27 TEST26 TEST10
TEST8
TDO
D2 D1 C1 E3 E2 E1
AK7 AL7
AK10
B6 AK11
AL11 F1
V8 V7
C11 D11
AK8 AH8 AJ9 AL8 AJ8
J10 H9 AK9 AK5 G7 D4
TP13
VID4 VID3 VID2 VID1 VID0
CPU_THRIP#_L PROCHOT_L
CPU_TDO
CPU_DBRDY
CPU_PSI_L
HTREF1 HTREF0
TEST29_H TEST29_L
R101 300R
R105 300R
TP24
TP14
VDDIO_FB_H 25
TP16
C1000P50X0402
R60 80.6R1%
TP23 TP20
TP21
VCC_DDR
C206
VID[0..4] 21,26
CPU_THRIP#_L HT_STOP#_L CPU_PWRGD_L LDT_RST#_L
LDT_RST# CPU_PWRGD HT_STOP# CPU_THRIP#
CPU_THRIP# HT_STOP# CPU_PWRGD LDT_RST#
C207 C1000P50X0402
VCC1_2HT
R103 44.2R1% R104 44.2R1%R108 39.2R1%
HT Bus Level shift
RN5 8P4R-300R
1 2 3 4 5 6 7 8
RN3 8P4R-1KR
1 2 3 4 5 6 7 8
RN4 X_8P4R-0R
1 2 3 4 5 6 7 8
CPU_THRIP#_L HT_STOP#_L CPU_PWRGD_L LDT_RST#_L
VCC_DDR
VDDA25
NV
A A
C4.7U6.3X50805
C4.7U6.3X50805
C4.7U6.3X50805
AMD RECOMMAND AMD RECOMMAND
C0.22U16X
5
C0.22U16X
X_C10P25N0402/0.25
X_C10P25N0402/0.25
Micro Star Restricted Secret
Title
Document Number
MICRO-STAR INT'L
No. 69, Li-De St, Jung-He City,
CO.,LTD.
Taipei Hsien, Taiwan
4
3
2
http://www.msi.com.tw
AMD M2 HT
MS-7283L2
1
Last Revision Date:
Monday, September 04, 2006
Sheet
732
Rev
101
of
5
4
3
2
1
MEM_MA_DQS_L[7..0]10
MEM_MA_DQS_H[7..0]10
MEM_MA_DM[7..0]10
MEM_MB_DQS_L[7..0]10
MEM_MB_DQS_H[7..0]10
MEM_MB_DM[7..0]10
D D
CPU1B
MEM_MA0_CLK_H210,11 MEM_MA0_CLK_L210,11 MEM_MA0_CLK_H110,11 MEM_MA0_CLK_L110,11 MEM_MA0_CLK_H010,11 MEM_MA0_CLK_L010,11
MEM_MA0_CS_L110,11 MEM_MA0_CS_L010,11
MEM_MA0_ODT010,11
MEM_MA0_CLK_H2 MEM_MA0_CLK_L2 MEM_MA0_CLK_H1 MEM_MA0_CLK_L1 MEM_MA0_CLK_H0 MEM_MA0_CLK_L0
MEM_MA0_CS_L1 MEM_MA0_CS_L0
MEM_MA0_ODT0
AG21 AG20
AC25 AA24
AC28 AE20
AE19
W27
AD27 AA25
G19 H19 U27 U26
G20 G21 V27
AC27
C C
MEM_MA_CAS_L10,11 MEM_MA_WE_L10,11 MEM_MA_RAS_L10,11
MEM_MA_BANK210,11 MEM_MA_BANK110,11 MEM_MA_BANK010,11
MEM_MA_CKE010,11
MEM_MA_ADD[15..0]10,11
B B
MEM_MA_CAS_L MEM_MA_WE_L MEM_MA_RAS_L
MEM_MA_BANK2 MEM_MA_BANK1 MEM_MA_BANK0
MEM_MA_CKE0
MEM_MA_ADD15 MEM_MA_ADD14 MEM_MA_ADD13 MEM_MA_ADD12 MEM_MA_ADD11 MEM_MA_ADD10 MEM_MA_ADD9 MEM_MA_ADD8 MEM_MA_ADD7 MEM_MA_ADD6 MEM_MA_ADD5 MEM_MA_ADD4 MEM_MA_ADD3 MEM_MA_ADD2 MEM_MA_ADD1 MEM_MA_ADD0
MEM_MA_DQS_H7 MEM_MA_DQS_L7 MEM_MA_DQS_H6 MEM_MA_DQS_L6 MEM_MA_DQS_H5 MEM_MA_DQS_L5 MEM_MA_DQS_H4 MEM_MA_DQS_L4 MEM_MA_DQS_H3 MEM_MA_DQS_L3 MEM_MA_DQS_H2 MEM_MA_DQS_L2 MEM_MA_DQS_H1 MEM_MA_DQS_L1 MEM_MA_DQS_H0 MEM_MA_DQS_L0
MEM_MA_DM7 MEM_MA_DM6 MEM_MA_DM5 MEM_MA_DM4 MEM_MA_DM3 MEM_MA_DM2 MEM_MA_DM1 MEM_MA_DM0
AB25 AB27 AA26
AA27
M25 M27
AC26
W24
AD15 AE15 AG18 AG19 AG24 AG25 AG27 AG28
G15
AF15 AF19 AJ25 AH29
N25 Y27
L27
N24 N26
P25 Y25 N27 R24 P27 R25 R26 R27 T25 U25 T27
D29 C29 C25 D25 E19 F19 F15
B29 E24 E18 H15
MEMORY INTERFACE A
MA0_CLK_H(2) MA0_CLK_L(2) MA0_CLK_H(1) MA0_CLK_L(1) MA0_CLK_H(0) MA0_CLK_L(0)
MA0_CS_L(1) MA0_CS_L(0)
MA0_ODT(0) MA1_CLK_H(2)
MA1_CLK_L(2) MA1_CLK_H(1) MA1_CLK_L(1) MA1_CLK_H(0) MA1_CLK_L(0)
MA1_CS_L(1) MA1_CS_L(0)
MA1_ODT(0)
MA_CAS_L MA_WE_L MA_RAS_L
MA_BANK(2) MA_BANK(1) MA_BANK(0)
MA_CKE(1) MA_CKE(0)
MA_ADD(15) MA_ADD(14) MA_ADD(13) MA_ADD(12) MA_ADD(11) MA_ADD(10) MA_ADD(9) MA_ADD(8) MA_ADD(7) MA_ADD(6) MA_ADD(5) MA_ADD(4) MA_ADD(3) MA_ADD(2) MA_ADD(1) MA_ADD(0)
MA_DQS_H(7) MA_DQS_L(7) MA_DQS_H(6) MA_DQS_L(6) MA_DQS_H(5) MA_DQS_L(5) MA_DQS_H(4) MA_DQS_L(4) MA_DQS_H(3) MA_DQS_L(3) MA_DQS_H(2) MA_DQS_L(2) MA_DQS_H(1) MA_DQS_L(1) MA_DQS_H(0) MA_DQS_L(0)
MA_DM(7) MA_DM(6) MA_DM(5) MA_DM(4) MA_DM(3) MA_DM(2) MA_DM(1) MA_DM(0)
MA_DATA(63) MA_DATA(62) MA_DATA(61) MA_DATA(60) MA_DATA(59) MA_DATA(58) MA_DATA(57) MA_DATA(56) MA_DATA(55) MA_DATA(54) MA_DATA(53) MA_DATA(52) MA_DATA(51) MA_DATA(50) MA_DATA(49) MA_DATA(48) MA_DATA(47) MA_DATA(46) MA_DATA(45) MA_DATA(44) MA_DATA(43) MA_DATA(42) MA_DATA(41) MA_DATA(40) MA_DATA(39) MA_DATA(38) MA_DATA(37) MA_DATA(36) MA_DATA(35) MA_DATA(34) MA_DATA(33) MA_DATA(32) MA_DATA(31) MA_DATA(30) MA_DATA(29) MA_DATA(28) MA_DATA(27) MA_DATA(26) MA_DATA(25) MA_DATA(24) MA_DATA(23) MA_DATA(22) MA_DATA(21) MA_DATA(20) MA_DATA(19) MA_DATA(18) MA_DATA(17) MA_DATA(16) MA_DATA(15) MA_DATA(14) MA_DATA(13) MA_DATA(12) MA_DATA(11) MA_DATA(10)
MA_DATA(9) MA_DATA(8) MA_DATA(7) MA_DATA(6) MA_DATA(5) MA_DATA(4) MA_DATA(3) MA_DATA(2) MA_DATA(1) MA_DATA(0)
MA_DQS_H(8)
MA_DQS_L(8)
MA_DM(8)
MA_CHECK(7) MA_CHECK(6) MA_CHECK(5) MA_CHECK(4) MA_CHECK(3) MA_CHECK(2) MA_CHECK(1) MA_CHECK(0)
AE14
MEM_MA_DATA63
AG14
MEM_MA_DATA62
AG16
MEM_MA_DATA61
AD17
MEM_MA_DATA60
AD13
MEM_MA_DATA59
AE13
MEM_MA_DATA58
AG15
MEM_MA_DATA57
AE16
MEM_MA_DATA56
AG17
MEM_MA_DATA55
AE18
MEM_MA_DATA54
AD21
MEM_MA_DATA53
AG22
MEM_MA_DATA52
AE17
MEM_MA_DATA51
AF17
MEM_MA_DATA50
AF21
MEM_MA_DATA49
AE21
MEM_MA_DATA48
AF23
MEM_MA_DATA47
AE23
MEM_MA_DATA46
AJ26
MEM_MA_DATA45
AG26
MEM_MA_DATA44
AE22
MEM_MA_DATA43
AG23
MEM_MA_DATA42
AH25
MEM_MA_DATA41
AF25
MEM_MA_DATA40
AJ28
MEM_MA_DATA39
AJ29
MEM_MA_DATA38
AF29
MEM_MA_DATA37
AE26
MEM_MA_DATA36
AJ27
MEM_MA_DATA35
AH27
MEM_MA_DATA34
AG29
MEM_MA_DATA33
AF27
MEM_MA_DATA32
E29
MEM_MA_DATA31
E28
MEM_MA_DATA30
D27
MEM_MA_DATA29
C27
MEM_MA_DATA28
G26
MEM_MA_DATA27
F27
MEM_MA_DATA26
C28
MEM_MA_DATA25
E27
MEM_MA_DATA24
F25
MEM_MA_DATA23
E25
MEM_MA_DATA22
E23
MEM_MA_DATA21
D23
MEM_MA_DATA20
E26
MEM_MA_DATA19
C26
MEM_MA_DATA18
G23
MEM_MA_DATA17
F23
MEM_MA_DATA16
E22
MEM_MA_DATA15
E21
MEM_MA_DATA14
F17
MEM_MA_DATA13
G17
MEM_MA_DATA12
G22
MEM_MA_DATA11
F21
MEM_MA_DATA10
G18
MEM_MA_DATA9
E17
MEM_MA_DATA8
G16
MEM_MA_DATA7
E15
MEM_MA_DATA6
G13
MEM_MA_DATA5
H13
MEM_MA_DATA4
H17
MEM_MA_DATA3
E16
MEM_MA_DATA2
E14
MEM_MA_DATA1
G14
MEM_MA_DATA0
J28 J27
J25 K25
J26 G28 G27 L24 K27 H29 H27
MEM_MA_DATA[63..0] 10
MEM_MB0_CLK_H210,11 MEM_MB0_CLK_L210,11 MEM_MB0_CLK_H110,11 MEM_MB0_CLK_L110,11 MEM_MB0_CLK_H010,11 MEM_MB0_CLK_L010,11
MEM_MB0_CS_L110,11 MEM_MB0_CS_L010,11
MEM_MB0_ODT010,11
MEM_MB_CAS_L10,11 MEM_MB_WE_L10,11 MEM_MB_RAS_L10,11
MEM_MB_BANK210,11 MEM_MB_BANK110,11 MEM_MB_BANK010,11
MEM_MB_CKE010,11
MEM_MB_ADD[15..0]10,11
MEM_MB0_CLK_H2 MEM_MB0_CLK_L2 MEM_MB0_CLK_H1 MEM_MB0_CLK_L1 MEM_MB0_CLK_H0 MEM_MB0_CLK_L0
MEM_MB0_CS_L1 MEM_MB0_CS_L0
MEM_MB0_ODT0
MEM_MB_CAS_L MEM_MB_WE_L MEM_MB_RAS_L
MEM_MB_BANK2 MEM_MB_BANK1 MEM_MB_BANK0
MEM_MB_CKE0
MEM_MB_ADD15 MEM_MB_ADD14 MEM_MB_ADD13 MEM_MB_ADD12 MEM_MB_ADD11 MEM_MB_ADD10 MEM_MB_ADD9 MEM_MB_ADD8 MEM_MB_ADD7 MEM_MB_ADD6 MEM_MB_ADD5 MEM_MB_ADD4 MEM_MB_ADD3 MEM_MB_ADD2 MEM_MB_ADD1 MEM_MB_ADD0
MEM_MB_DQS_H7 MEM_MB_DQS_L7 MEM_MB_DQS_H6 MEM_MB_DQS_L6 MEM_MB_DQS_H5 MEM_MB_DQS_L5 MEM_MB_DQS_H4 MEM_MB_DQS_L4 MEM_MB_DQS_H3 MEM_MB_DQS_L3 MEM_MB_DQS_H2 MEM_MB_DQS_L2 MEM_MB_DQS_H1 MEM_MB_DQS_L1 MEM_MB_DQS_H0 MEM_MB_DQS_L0
MEM_MB_DM7 MEM_MB_DM6 MEM_MB_DM5 MEM_MB_DM4 MEM_MB_DM3 MEM_MB_DM2 MEM_MB_DM1 MEM_MB_DM0
AJ19
AK19
AE30 AC31
AD29 AL19
AL18
W29 W28
AE29 AB31
AD31
AC29 AC30 AB29
AA31 AA28
M31 M29
AE31
AA29
AA30 AK13
AJ13
AK17
AJ17 AK23 AL23 AL28 AL29
AJ14 AH17
AJ23 AK29
A18 A19 U31 U30
C19 D19
N31
N28 N29
N30 P29
P31 R29 R28 R31 R30 T31 T29 U29 U28
D31 C31 C24 C23 D17 C17 C14 C13
C30 A23 B17 B13
CPU1C
MEMORY INTERFACE B
MB0_CLK_H(2) MB0_CLK_L(2) MB0_CLK_H(1) MB0_CLK_L(1) MB0_CLK_H(0) MB0_CLK_L(0)
MB0_CS_L(1) MB0_CS_L(0)
MB0_ODT(0) MB1_CLK_H(2)
MB1_CLK_L(2) MB1_CLK_H(1) MB1_CLK_L(1) MB1_CLK_H(0) MB1_CLK_L(0)
MB1_CS_L(1) MB1_CS_L(0)
MB1_ODT(0)
MB_CAS_L MB_WE_L MB_RAS_L
MB_BANK(2) MB_BANK(1) MB_BANK(0)
MB_CKE(1) MB_CKE(0)
MB_ADD(15) MB_ADD(14) MB_ADD(13) MB_ADD(12) MB_ADD(11) MB_ADD(10) MB_ADD(9) MB_ADD(8) MB_ADD(7) MB_ADD(6) MB_ADD(5) MB_ADD(4) MB_ADD(3) MB_ADD(2) MB_ADD(1) MB_ADD(0)
MB_DQS_H(7) MB_DQS_L(7) MB_DQS_H(6) MB_DQS_L(6) MB_DQS_H(5) MB_DQS_L(5) MB_DQS_H(4) MB_DQS_L(4) MB_DQS_H(3) MB_DQS_L(3) MB_DQS_H(2) MB_DQS_L(2) MB_DQS_H(1) MB_DQS_L(1) MB_DQS_H(0) MB_DQS_L(0)
MB_DM(7) MB_DM(6) MB_DM(5) MB_DM(4) MB_DM(3) MB_DM(2) MB_DM(1) MB_DM(0)
MB_DATA(63) MB_DATA(62) MB_DATA(61) MB_DATA(60) MB_DATA(59) MB_DATA(58) MB_DATA(57) MB_DATA(56) MB_DATA(55) MB_DATA(54) MB_DATA(53) MB_DATA(52) MB_DATA(51) MB_DATA(50) MB_DATA(49) MB_DATA(48) MB_DATA(47) MB_DATA(46) MB_DATA(45) MB_DATA(44) MB_DATA(43) MB_DATA(42) MB_DATA(41) MB_DATA(40) MB_DATA(39) MB_DATA(38) MB_DATA(37) MB_DATA(36) MB_DATA(35) MB_DATA(34) MB_DATA(33) MB_DATA(32) MB_DATA(31) MB_DATA(30) MB_DATA(29) MB_DATA(28) MB_DATA(27) MB_DATA(26) MB_DATA(25) MB_DATA(24) MB_DATA(23) MB_DATA(22) MB_DATA(21) MB_DATA(20) MB_DATA(19) MB_DATA(18) MB_DATA(17) MB_DATA(16) MB_DATA(15) MB_DATA(14) MB_DATA(13) MB_DATA(12) MB_DATA(11) MB_DATA(10)
MB_DATA(9) MB_DATA(8) MB_DATA(7) MB_DATA(6) MB_DATA(5) MB_DATA(4) MB_DATA(3) MB_DATA(2) MB_DATA(1) MB_DATA(0)
MB_DQS_H(8) MB_DQS_L(8)
MB_DM(8)
MB_CHECK(7) MB_CHECK(6) MB_CHECK(5) MB_CHECK(4) MB_CHECK(3) MB_CHECK(2) MB_CHECK(1) MB_CHECK(0)
AH13 AL13 AL15 AJ15 AF13 AG13 AL14 AK15 AL16 AL17 AK21 AL21 AH15 AJ16 AH19 AL20 AJ22 AL22 AL24 AK25 AJ21 AH21 AH23 AJ24 AL27 AK27 AH31 AG30 AL25 AL26 AJ30 AJ31 E31 E30 B27 A27 F29 F31 A29 A28 A25 A24 C22 D21 A26 B25 B23 A22 B21 A20 C16 D15 C21 A21 A17 A16 B15 A14 E13 F13 C15 A15 A13 D13
J31 J30
J29 K29
K31 G30 G29 L29 L28 H31 G31
MEM_MB_DATA63 MEM_MB_DATA62 MEM_MB_DATA61 MEM_MB_DATA60 MEM_MB_DATA59 MEM_MB_DATA58 MEM_MB_DATA57 MEM_MB_DATA56 MEM_MB_DATA55 MEM_MB_DATA54 MEM_MB_DATA53 MEM_MB_DATA52 MEM_MB_DATA51 MEM_MB_DATA50 MEM_MB_DATA49 MEM_MB_DATA48 MEM_MB_DATA47 MEM_MB_DATA46 MEM_MB_DATA45 MEM_MB_DATA44 MEM_MB_DATA43 MEM_MB_DATA42 MEM_MB_DATA41 MEM_MB_DATA40 MEM_MB_DATA39 MEM_MB_DATA38 MEM_MB_DATA37 MEM_MB_DATA36 MEM_MB_DATA35 MEM_MB_DATA34 MEM_MB_DATA33 MEM_MB_DATA32 MEM_MB_DATA31 MEM_MB_DATA30 MEM_MB_DATA29 MEM_MB_DATA28 MEM_MB_DATA27 MEM_MB_DATA26 MEM_MB_DATA25 MEM_MB_DATA24 MEM_MB_DATA23 MEM_MB_DATA22 MEM_MB_DATA21 MEM_MB_DATA20
MEM_MB_DATA19 MEM_MB_DATA18 MEM_MB_DATA17 MEM_MB_DATA16 MEM_MB_DATA15 MEM_MB_DATA14 MEM_MB_DATA13 MEM_MB_DATA12 MEM_MB_DATA11 MEM_MB_DATA10
MEM_MB_DATA9
MEM_MB_DATA8
MEM_MB_DATA7
MEM_MB_DATA6
MEM_MB_DATA5
MEM_MB_DATA4
MEM_MB_DATA3
MEM_MB_DATA2
MEM_MB_DATA1
MEM_MB_DATA0
MEM_MB_DATA[63..0] 10
A A
Micro Star Restricted Secret
Title
AMD M2 DDR2 MEMORY
Document Number
MICRO-STAR INT'L
No. 69, Li-De St, Jung-He City,
CO.,LTD.
Taipei Hsien, Taiwan
5
4
3
2
http://www.msi.com.tw
MS-7283L2
Last Revision Date: Sheet
1
Monday, September 04, 2006
832
Rev
101
of
5
4
3
2
1
VSS1 VSS2 VSS3 VSS4 VSS5 VSS6 VSS7 VSS8
VSS9 VSS10 VSS11 VSS12 VSS13 VSS14 VSS15 VSS16 VSS17 VSS18 VSS19 VSS20 VSS21 VSS22 VSS23 VSS24 VSS25 VSS26 VSS27 VSS28 VSS29 VSS30 VSS31 VSS32 VSS33 VSS34 VSS35 VSS36 VSS37 VSS38 VSS39 VSS40 VSS41 VSS42 VSS43 VSS44 VSS45 VSS46 VSS47 VSS48 VSS49 VSS50 VSS51 VSS52 VSS53 VSS54 VSS55 VSS56 VSS57 VSS58 VSS59 VSS60 VSS61 VSS62 VSS63 VSS64 VSS65 VSS66 VSS67 VSS68 VSS69 VSS70 VSS71 VSS72 VSS73 VSS74 VSS75
For L2 test point
VCCP(CPU)
TP102
AK20 AK22 AK24 AK26 AK28 AK30 AL5 B4 B9 B11 B14 B16 B18 B20 B22 B24 B26 B28 B30 C3 D14 D16 D18 D20 D22 D24 D26 D28 D30 E11 F4 F14 F16 F18 F20 F22 F24 F26 F28 F30 G9 G11 H8 H10 H12 H14 H16 H18 H22 H24 H26 H28 H30 J4 J5 J7 J9 J11 J13 J15 J17 J19 J21 J23 K2 K3 K8 K10 K12 K14 K16 K18 K20 K22 Y18
VCCPVCCP
AA20 AA22 AB13 AB15 AB17 AB19 AB21 AB23 AC12 AC14 AC16 AC18 AC20 AC22 AD11 AD23 AE12
AF11
M21 M23 N20 N22 P21 P23 R22
U22 V23 W22 Y23
CPU1H
VDD3
VDD1 VDD2 VDD3 VDD4 VDD5 VDD6 VDD7 VDD8 VDD9 VDD10 VDD11 VDD12 VDD13 VDD14 VDD15 VDD16 VDD17 VDD18
L20
VDD19
L22
VDD20 VDD21 VDD22 VDD23 VDD24 VDD25 VDD26 VDD27
T23
VDD28 VDD29 VDD30 VDD31 VDD32
5
GND
6
GND
7
GND
8
GND
1
GND
2
GND
3
GND
4
GND
VSS1 VSS2 VSS3 VSS4 VSS5 VSS6 VSS7 VSS8
VSS9 VSS10 VSS11 VSS12 VSS13 VSS14 VSS15 VSS16 VSS17 VSS18 VSS19 VSS20 VSS21 VSS22 VSS23 VSS24 VSS25 VSS26 VSS27 VSS28 VSS29 VSS30 VSS31 VSS32 VSS33 VSS34 VSS35 VSS36 VSS37 VSS38 VSS39 VSS40 VSS41 VSS42 VSS43 VSS44 VSS45 VSS46 VSS47 VSS48 VSS49 VSS50 VSS51 VSS52 VSS53 VSS54 VSS55 VSS56 VSS57 VSS58 VSS59 VSS60 VSS61 VSS62 VSS63 VSS64 VSS65
N17 N19 N21 N23 P2 P3 P8 P10 P12 P14 P16 P18 P20 P22 R7 R9 R11 R13 R15 R17 R19 R21 R23 T8 T10 T12 T14 T16 T18 T20 T22 U4 U5 U7 U9 U11 U13 U15 U17 U19 U21 U23 V2 V3 V10 V12 V14 V16 V18 V20 V22 W9 W11 W13 W15 W17 W19 W21 W23 Y8 Y10 Y12 W7 Y20 Y22
For L2 test point
VTT_DDR(DDR)
TP103
For L2 test point
V_DIMM(DDR)
VCCP
C684 C1U10X
VCC_DDR
VCC_DDR
TP101
C685 C1U10X
AMD
VCC1_2HT
VTT_DDR
AB24 AB26 AB28 AB30 AC24 AD26 AD28 AD30
AF30
D12 C12 B12 A12
M24 M26 M28 M30 P24 P26 P28 P30
V25 V26 V28 V30 Y24 Y26 Y28 Y29
CPU1I
VLDT_A1 VLDT_A2 VLDT_A3 VLDT_A4
VTT1 VTT2 VTT3 VTT4
VDDIO1 VDDIO2 VDDIO3 VDDIO4 VDDIO5 VDDIO6 VDDIO7 VDDIO8 VDDIO9 VDDIO10 VDDIO11 VDDIO12 VDDIO13 VDDIO14 VDDIO15 VDDIO16 VDDIO17 VDDIO18 VDDIO19 VDDIO20 VDDIO21 VDDIO22 VDDIO23 VDDIO24 VDDIO25 VDDIO26 VDDIO27 VDDIO28 VDDIO29
VDDIO
AJ4 AJ3 AJ2 AJ1
T24 T26 T28 T30
VLDT_B1 VLDT_B2 VLDT_B3 VLDT_B4
VTT5 VTT6 VTT7 VTT8 VTT9
VSS1 VSS2 VSS3 VSS4 VSS5 VSS6 VSS7 VSS8
VSS9 VSS10 VSS11 VSS12 VSS13 VSS14 VSS15 VSS16 VSS17 VSS18 VSS19 VSS20 VSS21 VSS22 VSS23 VSS24 VSS25 VSS26 VSS27 VSS28
H6 H5 H2 H1
AK12 AJ12 AH12 AG12 AL12
K24 K26 K28 K30 L7 L9 L11 L13 L15 L17 L19 L21 L23 M8 M10 M12 M14 M16 M18 M20 M22 N4 N5 N7 N9 N11 N13 N15
VLDT_RUN_B
VTT_DDR
C106 C4.7U16Y1206
GND 7,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31
VCC1_2HT
C674 C180P50N0402
C675 C180P50N0402
VCCP
C1116 C180P50N
VCC_DDR
C180
C188 C180P50N0402
C180P50N
VCCP
VCC_DDR
C620
C0.22U16X
AMD RECOMMAND
C0.22U16X
C631
C0.22U16X
C622
C0.01U25X
C632
C628
C22U6.3X1206
C65
C22U6.3X1206
C22U6.3X1206
C625
C103
C22U6.3X1206
C22U6.3X1206
AMD RECOMMAND
C626
C175 C22U6.3X1206
C201
C180P50N0402
C180P50N0402
C200
C1110
C180P50N0402
C1111 C180P50N0402
VCCP
CPU1F
VDD1
A4
VDD1
A6
VDD2
AA8
VDD3
D D
C C
B B
AA10 AA12 AA14 AA16 AA18
AB11
AC10
AE10
AB7 AB9
AC4 AC5 AC8
AD2 AD3 AD7 AD9
AF7 AF9 AG4 AG5 AG7 AH2 AH3
E10
F11
G10 G12
H11 H23
K11 K13 K15 K17 K19 K21 K23
Y17 Y19
VDD4 VDD5 VDD6 VDD7 VDD8 VDD9 VDD10 VDD11 VDD12 VDD13 VDD14 VDD15 VDD16 VDD17 VDD18 VDD19 VDD20 VDD21 VDD22 VDD23 VDD24 VDD25 VDD26 VDD27
B3
VDD28
B5
VDD29
B7
VDD30
C2
VDD31
C4
VDD32
C6
VDD33
C8
VDD34
D3
VDD35
D5
VDD36
D7
VDD37
D9
VDD38
E4
VDD39
E6
VDD40
E8
VDD41 VDD42
F5
VDD43
F7
VDD44
F9
VDD45 VDD46
G6
VDD47
G8
VDD48 VDD49 VDD50
H7
VDD51 VDD52 VDD53
J8
VDD54
J12
VDD55
J14
VDD56
J16
VDD57
J18
VDD58
J20
VDD59
J22
VDD60
J24
VDD61
K7
VDD62
K9
VDD63 VDD64 VDD65 VDD66 VDD67 VDD68 VDD69 VDD70
L4
VDD71
L5
VDD72
L8
VDD73
L10
VDD74
L12
VDD75 VDD150 VDD151
VSS1 VSS2 VSS3 VSS4 VSS5 VSS6 VSS7 VSS8
VSS9 VSS10 VSS11 VSS12 VSS13 VSS14 VSS15 VSS16 VSS17 VSS18 VSS19 VSS20 VSS21 VSS22 VSS23 VSS24 VSS25 VSS26 VSS27 VSS28 VSS29 VSS30 VSS31 VSS32 VSS33 VSS34 VSS35 VSS36 VSS37 VSS38 VSS39 VSS40 VSS41 VSS42 VSS43 VSS44 VSS45 VSS46 VSS47 VSS48 VSS49 VSS50 VSS51 VSS52 VSS53 VSS54 VSS55 VSS56 VSS57 VSS58 VSS59 VSS60 VSS61 VSS62 VSS63 VSS64 VSS65 VSS66 VSS67 VSS68 VSS69 VSS70 VSS71 VSS72 VSS73 VSS74
VSS240 VSS241
A3 A7 A9 A11 AA4 AA5 AA7 AA9 AA11 AA13 AA15 AA17 AA19 AA21 AA23 AB2 AB3 AB8 AB10 AB12 AB14 AB16 AB18 AB20 AB22 AC7 AC9 AC11 AC13 AC15 AC17 AC19 AC21 AC23 AD8 AD10 AD12 AD14 AD16 AD20 AD22 AD24 AE4 AE5 AE9 AE11 AF2 AF3 AF8 AF10 AF12 AF14 AF16 AF18 AF20 AF22 AF24 AF26 AF28 AG10 AG11 AH14 AH16 AH18 AH20 AH22 AH24 AH26 AH28 AH30 AK2 AK14 AK16 AK18 Y14 Y16
W10 W12 W14 W16 W18 W20
L14 L16 L18
M11 M13 M15 M17 M19
N10 N12 N14 N16 N18
P11 P13 P15 P17 P19
R10 R12 R14 R16 R18 R20
T11 T13 T15 T17 T19 T21
U10 U12 U14 U16 U18 U20
V11 V13 V15 V17 V19 V21
Y11 Y13 Y15 Y21
CPU1G
VDD2
VDD1 VDD2 VDD3
M2
VDD4
M3
VDD5
M7
VDD6
M9
VDD7 VDD8 VDD9 VDD10 VDD11 VDD12
N8
VDD13 VDD14 VDD15 VDD16 VDD17 VDD18
P7
VDD19
P9
VDD20 VDD21 VDD22 VDD23 VDD24 VDD25
R4
VDD26
R5
VDD27
R8
VDD28 VDD29 VDD30 VDD31 VDD32 VDD33 VDD34
T2
VDD35
T3
VDD36
T7
VDD37
T9
VDD38 VDD39 VDD40 VDD41 VDD42 VDD43 VDD44
U8
VDD45 VDD46 VDD47 VDD48 VDD49 VDD50 VDD51
V9
VDD52 VDD53 VDD54 VDD55 VDD56 VDD57 VDD58
W4
VDD59
W5
VDD60
W8
VDD61 VDD62 VDD63 VDD64 VDD65 VDD66 VDD67
Y2
VDD68
Y3
VDD69
Y7
VDD70
Y9
VDD71 VDD72 VDD73 VDD74 VDD75
VCCP
VTT_DDR
C40
C31
C74
C34
C69
C81
C1000P50X0402
C0.22U16X
A A
C0.22U16X
AMD RECOMMAND
C4.7U6.3X50805
C4.7U6.3X50805
AMD RECOMMAND
C1000P50X0402
AMD RECOMMAND
VTT_DDR
C237
C241
C246
C248
C205
C233 C1000P50X0402
C0.22U16X
C0.22U16X
AMD RECOMMAND
C4.7U6.3X50805
C4.7U6.3X50805
AMD RECOMMAND
5
C1000P50X0402
AMD RECOMMAND
VCC_DDR
C614
C0.22U16X
AMD RECOMMAND
C0.22U16X
4
C627
C0.22U16X
C269
C295
C4.7U6.3X50805
C83 C4.7U6.3X50805
AMD RECOMMAND
C618
C22U6.3X1206
VCC_DDR
C624
C22U6.3X1206
AMD RECOMMAND
3
C619
C22U6.3X1206
C22U6.3X1206
C621
C22U6.3X1206
C623
C22U6.3X1206
C122
C4.7U6.3X50805
C4.7U6.3X50805
AMD RECOMMAND
C616
C22U6.3X1206
AMD RECOMMAND
C100
C615
C617
C613
C22U6.3X1206
C0.22U16X
AMD RECOMMANDPLACE BACK OF CPU AMD RECOMMAND
C629
C22U6.3X1206
C22U6.3X1206
C128
C0.22U16X
C611
C630
C0.01U25X
PLACE BACK OF CPU
C612 C22U6.3X1206
C310
C10P50N
2
VTT_DDR
C243
C180P50N0402
C180P50N0402
AMD RECOMMAND for EMI containment.
Micro Star Restricted Secret
Title
Document Number
MICRO-STAR INT'L
No. 69, Li-De St, Jung-He City,
CO.,LTD.
Taipei Hsien, Taiwan http://www.msi.com.tw
AMD M2 PWR, GND
C216
C180P50N0402
MS-7283L2
Last Revision Date: Sheet
1
C35
C62
C180P50N0402
Monday, September 04, 2006
of
932
Rev
101
5
VCC_DDR VCC3 VCC3
4
3
2
1
VCC_DDR
MEM_MA_DQS_H[7..0]8 MEM_MA_DQS_L[7..0]8
MEM_MA_DM[7..0]8
D D
SMB_MEM_CLK16
SMB_MEM_DATA16
C C
B B
MEM_MA_BANK28,11 MEM_MA_BANK18,11 MEM_MA_BANK08,11
MEM_MA_ADD[15..0]8,11
MEM_MA0_CLK_H08,11 MEM_MA0_CLK_L08,11 MEM_MA0_CLK_H18,11 MEM_MA0_CLK_L18,11 MEM_MA0_CLK_H28,11 MEM_MA0_CLK_L28,11
MEM_MA_CKE08,11 MEM_MA_RAS_L8,11
MEM_MA_CAS_L8,11 MEM_MA0_CS_L08,11
MEM_MA0_CS_L18,11
MEM_MA_DQS_H7 MEM_MA_DQS_L7 MEM_MA_DQS_H6 MEM_MA_DQS_L6 MEM_MA_DQS_H5 MEM_MA_DQS_L5 MEM_MA_DQS_H4 MEM_MA_DQS_L4 MEM_MA_DQS_H3 MEM_MA_DQS_L3 MEM_MA_DQS_H2 MEM_MA_DQS_L2 MEM_MA_DQS_H1 MEM_MA_DQS_L1 MEM_MA_DQS_H0 MEM_MA_DQS_L0
R167 33R R164 33R
MEM_MA_BANK2 MEM_MA_BANK1 MEM_MA_BANK0
MEM_MA_ADD15 MEM_MA_ADD14 MEM_MA_ADD13 MEM_MA_ADD12 MEM_MA_ADD11 MEM_MA_ADD10 MEM_MA_ADD9 MEM_MA_ADD8 MEM_MA_ADD7 MEM_MA_ADD6 MEM_MA_ADD5 MEM_MA_ADD4 MEM_MA_ADD3 MEM_MA_ADD2 MEM_MA_ADD1 MEM_MA_ADD0
MEM_MA0_CLK_H0 MEM_MA0_CLK_L0 MEM_MA0_CLK_H1 MEM_MA0_CLK_L1 MEM_MA0_CLK_H2 MEM_MA0_CLK_L2
MEM_MA_CKE0
MEM_MA_RAS_L MEM_MA_CAS_L
MEM_MA0_CS_L0 MEM_MA0_CS_L1
MEM_MA_DM7
MEM_MA_DM6
MEM_MA_DM5
MEM_MA_DM4
MEM_MA_DM3
MEM_MA_DM2
MEM_MA_DM1
MEM_MA_DM0
SMB_MEMCLK SMB_MEMDATA
172
178
184
187
189
DIMM1
160
GND
163
GND
157
GND
164
DQS17_H
165
DQS17_L
232
DQS16_H
233
DQS16_L
223
DQS15_H
224
DQS15_L
211
DQS14_H
212
DQS14_L
202
DQS13_H
203
DQS13_L
155
DQS12_H
156
DQS12_L
146
DQS11_H
147
DQS11_L
134
DQS10_H
135
DQS10_L
125
DQS9_H
126
DQS9_L
46
DQS8_H
45
DQS8_L
114
DQS7_H
113
DQS7_L
105
DQS6_H
104
DQS6_L
93
DQS5_H
92
DQS5_L
84
DQS4_H
83
DQS4_L
37
DQS3_H
36
DQS3_L
28
DQS2_H
27
DQS2_L
16
DQS1_H
15
DQS1_L
7
DQS0_H
6
DQS0_L
101
SA2
240
SA1
239
SA0
120
SCL
119
SDA
54
BA2
190
BA1
71
BA0
173
A15
174
A14
196
A13
176
A12
57
A11
70
A10
177
A9
179
A8
58
A7
180
A6
60
A5
61
A4
182
A3
63
A2
183
A1
188
A0
168
CB7
167
CB6
162
CB5
161
CB4
49
CB3
48
CB2
43
CB1
42
CB0
185
CK0_H
186
CK0_L
137
CK1_H
138
CK1_L
220
CK2_H
221
CK2_L
18
RESET_L
52
CKE0
171
CKE1
192
RAS_L
74
CAS_L
193
S0_L
76
S1_L
154
GND
207
GND
204
GND
222
GND
219
GND
GND
1975359646769170
VDD1
VDD2
VDD3
VDD4
VDD5
GND
GND
GND
GND
GND
GND
GND
GND
VDD6
GND
VDD7
GND
VDD8
GND
VDD9
GND
175
181
VDD10
VDD11
VDDQ1
VDDQ2
VDDQ3
GND
GND
GND
GND
GND
GND
2265811141720232932353841444750656679828588919497100
191
194515662727578
VDDQ4
VDDQ5
VDDQ6
VDDQ7
GND
GND
GND
GND
VDDQ8
GND
VDDQ9
GND
238
VDDQ10
VDDQ11
GND
GND
103
210
213
216
GND
GND
GND
VDDSPD
DQ63 DQ62 DQ61 DQ60 DQ59 DQ58 DQ57 DQ56 DQ55 DQ54 DQ53 DQ52 DQ51 DQ50 DQ49 DQ48 DQ47 DQ46 DQ45 DQ44 DQ43 DQ42 DQ41 DQ40 DQ39 DQ38 DQ37 DQ36 DQ35 DQ34 DQ33 DQ32 DQ31 DQ30 DQ29 DQ28 DQ27 DQ26 DQ25 DQ24 DQ23 DQ22 DQ21 DQ20 DQ19 DQ18 DQ17 DQ16 DQ15 DQ14 DQ13 DQ12 DQ11 DQ10
WE_L
VREF TEST ODT0
ODT1
ERR_OUT_L
PAR_IN
GND
GND
GND
GND
106
109
112
201
GND
198
GND
169
GND
166
GND
236
MEM_MA_DATA63
235
MEM_MA_DATA62
230
MEM_MA_DATA61
229
MEM_MA_DATA60
117
MEM_MA_DATA59
116
MEM_MA_DATA58
111
MEM_MA_DATA57
110
MEM_MA_DATA56
227
MEM_MA_DATA55
226
MEM_MA_DATA54
218
MEM_MA_DATA53
217
MEM_MA_DATA52
108
MEM_MA_DATA51
107
MEM_MA_DATA50
99
MEM_MA_DATA49
98
MEM_MA_DATA48
215
MEM_MA_DATA47
214
MEM_MA_DATA46
209
MEM_MA_DATA45
208
MEM_MA_DATA44
96
MEM_MA_DATA43
95
MEM_MA_DATA42
90
MEM_MA_DATA41
89
MEM_MA_DATA40
206
MEM_MA_DATA39
205
MEM_MA_DATA38
200
MEM_MA_DATA37
199
MEM_MA_DATA36
87
MEM_MA_DATA35
86
MEM_MA_DATA34
81
MEM_MA_DATA33
80
MEM_MA_DATA32
159
MEM_MA_DATA31
158
MEM_MA_DATA30
153
MEM_MA_DATA29
152
MEM_MA_DATA28
40
MEM_MA_DATA27
39
MEM_MA_DATA26
34
MEM_MA_DATA25
33
MEM_MA_DATA24
150
MEM_MA_DATA23
149
MEM_MA_DATA22
144
MEM_MA_DATA21
143
MEM_MA_DATA20
31
MEM_MA_DATA19
30
MEM_MA_DATA18
25
MEM_MA_DATA17
24
MEM_MA_DATA16
141
MEM_MA_DATA15
140
MEM_MA_DATA14
132
MEM_MA_DATA13
131
MEM_MA_DATA12
22
MEM_MA_DATA11
21
MEM_MA_DATA10
13
MEM_MA_DATA9
DQ9
12
MEM_MA_DATA8
DQ8
129
MEM_MA_DATA7
DQ7
128
MEM_MA_DATA6
DQ6
123
MEM_MA_DATA5
DQ5
122
MEM_MA_DATA4
DQ4
10
MEM_MA_DATA3
DQ3
9
MEM_MA_DATA2
DQ2
4
MEM_MA_DATA1
DQ1
3
MEM_MA_DATA0
DQ0
73
MEM_MA_WE_L
VDDR_VREF
1 102 195
MEM_MA0_ODT0
77 55
68 19
NC1
151
GND
148
GND
145
GND
142
GND
139
GND
136
GND
133
GND
130
GND
127
GND
124
GND
121
GND
231
GND
234
GND
237
GND
228
GND
225
GND
GND
GND
115
118
MEM_MA_DATA[63..0] 8
MEM_MA_WE_L 8,11
MEM_MA0_ODT0 8,11
VDDR_VREF
C44 C0.1U16Y0402
MEM_MB_DQS_H[7..0]8 MEM_MB_DQS_L[7..0]8
MEM_MB_DM[7..0]8
MEM_MB_BANK28,11 MEM_MB_BANK18,11 MEM_MB_BANK08,11
MEM_MB_ADD[15..0]8,11
MEM_MB0_CLK_H08,11 MEM_MB0_CLK_L08,11 MEM_MB0_CLK_H18,11 MEM_MB0_CLK_L18,11 MEM_MB0_CLK_H28,11 MEM_MB0_CLK_L28,11
MEM_MB_CKE08,11 MEM_MB_RAS_L8,11
MEM_MB_CAS_L8,11 MEM_MB0_CS_L08,11
MEM_MB0_CS_L18,11
MEM_MB_DM7
MEM_MB_DM6
MEM_MB_DM5
MEM_MB_DM4
MEM_MB_DM3
MEM_MB_DM2
MEM_MB_DM1
MEM_MB_DM0
MEM_MB_DQS_H7 MEM_MB_DQS_L7 MEM_MB_DQS_H6 MEM_MB_DQS_L6 MEM_MB_DQS_H5 MEM_MB_DQS_L5 MEM_MB_DQS_H4 MEM_MB_DQS_L4 MEM_MB_DQS_H3 MEM_MB_DQS_L3 MEM_MB_DQS_H2 MEM_MB_DQS_L2 MEM_MB_DQS_H1 MEM_MB_DQS_L1 MEM_MB_DQS_H0 MEM_MB_DQS_L0 MEM_MB_DATA28
VCC3
SMB_MEMCLK SMB_MEMDATA MEM_MB_BANK2 MEM_MB_BANK1 MEM_MB_BANK0
MEM_MB_ADD15 MEM_MB_ADD14 MEM_MB_ADD13 MEM_MB_ADD12 MEM_MB_ADD11 MEM_MB_ADD10 MEM_MB_ADD9 MEM_MB_ADD8 MEM_MB_ADD7 MEM_MB_ADD6 MEM_MB_ADD5 MEM_MB_ADD4 MEM_MB_ADD3 MEM_MB_ADD2 MEM_MB_ADD1 MEM_MB_ADD0
MEM_MB0_CLK_H0 MEM_MB0_CLK_L0 MEM_MB0_CLK_H1 MEM_MB0_CLK_L1 MEM_MB0_CLK_H2 MEM_MB0_CLK_L2
MEM_MB_CKE0
MEM_MB_RAS_L MEM_MB_CAS_L
MEM_MB0_CS_L0 MEM_MB0_CS_L1
172
178
184
187
189
DIMM2
160
GND
163
GND
157
GND
164
DQS17_H
165
DQS17_L
232
DQS16_H
233
DQS16_L
223
DQS15_H
224
DQS15_L
211
DQS14_H
212
DQS14_L
202
DQS13_H
203
DQS13_L
155
DQS12_H
156
DQS12_L
146
DQS11_H
147
DQS11_L
134
DQS10_H
135
DQS10_L
125
DQS9_H
126
DQS9_L
46
DQS8_H
45
DQS8_L
114
DQS7_H
113
DQS7_L
105
DQS6_H
104
DQS6_L
93
DQS5_H
92
DQS5_L
84
DQS4_H
83
DQS4_L
37
DQS3_H
36
DQS3_L
28
DQS2_H
27
DQS2_L
16
DQS1_H
15
DQS1_L
7
DQS0_H
6
DQS0_L
101
SA2
240
SA1
239
SA0
120
SCL
119
SDA
54
BA2
190
BA1
71
BA0
173
A15
174
A14
196
A13
176
A12
57
A11
70
A10
177
A9
179
A8
58
A7
180
A6
60
A5
61
A4
182
A3
63
A2
183
A1
188
A0
168
CB7
167
CB6
162
CB5
161
CB4
49
CB3
48
CB2
43
CB1
42
CB0
185
CK0_H
186
CK0_L
137
CK1_H
138
CK1_L
220
CK2_H
221
CK2_L
18
RESET_L
52
CKE0
171
CKE1
192
RAS_L
74
CAS_L
193
S0_L
76
S1_L
154
GND
207
GND
204
GND
222
GND
219
GND
GND
1975359646769170
VDD1
VDD2
VDD3
VDD4
VDD5
GND
GND
GND
GND
GND
GND
GND
GND
VDD6
GND
VDD7
GND
VDD8
GND
VDD9
GND
175
181
VDD10
VDD11
VDDQ1
VDDQ2
VDDQ3
GND
GND
GND
GND
GND
GND
2265811141720232932353841444750656679828588919497100
191
194515662727578
VDDQ4
VDDQ5
VDDQ6
VDDQ7
GND
GND
GND
GND
VDDQ8
GND
VDDQ9
VDDQ10
GND
GND
238
216
GND
VDDQ11
VDDSPD
ERR_OUT_L
GND
GND
GND
103
106
213
GND
PAR_IN
GND
109
210
DQ63 DQ62 DQ61 DQ60 DQ59 DQ58 DQ57 DQ56 DQ55 DQ54 DQ53 DQ52 DQ51 DQ50 DQ49 DQ48 DQ47 DQ46 DQ45 DQ44 DQ43 DQ42 DQ41 DQ40 DQ39 DQ38 DQ37 DQ36 DQ35 DQ34 DQ33 DQ32 DQ31 DQ30 DQ29 DQ28 DQ27 DQ26 DQ25 DQ24 DQ23 DQ22 DQ21 DQ20 DQ19 DQ18 DQ17 DQ16 DQ15 DQ14 DQ13 DQ12 DQ11 DQ10
WE_L
VREF TEST ODT0
ODT1
112
201
GND
198
GND
GND
169
GND
166
GND
236
MEM_MB_DATA63
235
MEM_MB_DATA62
230
MEM_MB_DATA61
229
MEM_MB_DATA60
117
MEM_MB_DATA59
116
MEM_MB_DATA58
111
MEM_MB_DATA57
110
MEM_MB_DATA56
227
MEM_MB_DATA55
226
MEM_MB_DATA54
218
MEM_MB_DATA53
217
MEM_MB_DATA52
108
MEM_MB_DATA51
107
MEM_MB_DATA50
99
MEM_MB_DATA49
98
MEM_MB_DATA48
215
MEM_MB_DATA47
214
MEM_MB_DATA46
209
MEM_MB_DATA45
208
MEM_MB_DATA44
96
MEM_MB_DATA43
95
MEM_MB_DATA42
90
MEM_MB_DATA41
89
MEM_MB_DATA40
206
MEM_MB_DATA39
205
MEM_MB_DATA38
200
MEM_MB_DATA37
199
MEM_MB_DATA36
87
MEM_MB_DATA35
86
MEM_MB_DATA34
81
MEM_MB_DATA33
80
MEM_MB_DATA32
159
MEM_MB_DATA31
158
MEM_MB_DATA30
153
MEM_MB_DATA29
152 40
MEM_MB_DATA27
39
MEM_MB_DATA26
34
MEM_MB_DATA25
33
MEM_MB_DATA24
150
MEM_MB_DATA23
149
MEM_MB_DATA22
144
MEM_MB_DATA21
143
MEM_MB_DATA20
31
MEM_MB_DATA19
30
MEM_MB_DATA18
25
MEM_MB_DATA17
24
MEM_MB_DATA16
141
MEM_MB_DATA15
140
MEM_MB_DATA14
132
MEM_MB_DATA13
131
MEM_MB_DATA12
22
MEM_MB_DATA11
21
MEM_MB_DATA10
13
MEM_MB_DATA9
DQ9
12
MEM_MB_DATA8
DQ8
129
MEM_MB_DATA7
DQ7
128
MEM_MB_DATA6
DQ6
123
MEM_MB_DATA5
DQ5
122
MEM_MB_DATA4
DQ4
10
MEM_MB_DATA3
DQ3
9
MEM_MB_DATA2
DQ2
4
MEM_MB_DATA1
DQ1
3
MEM_MB_DATA0
DQ0
73
MEM_MB_WE_L
VDDR_VREF
1 102 195
MEM_MB0_ODT0
77 55
68 19
NC1
151
GND
148
GND
145
GND
142
GND
139
GND
136
GND
133
GND
130
GND
127
GND
124
GND
121
GND
231
GND
234
GND
237
GND
228
GND
225
GND GND
GND
GND
115
118
MEM_MB_DATA[63..0] 8
MEM_MB_WE_L 8,11
MEM_MB0_ODT0 8,11
VDDR_VREF
C64 C0.1U16Y0402
DIMM 1 ADDR=1010000B
DIMM 2 ADDR=1010001B
3VDUAL
VCC_DDR
VDDR_VREF
A A
5
R70
56.2R1%
R67
56.2R1%
C41 C0.1U16Y0402
C57 C0.1U16Y0402
For L2 test point
SM_VREF(DDR)
TP104
C54 C1000P50X0402
4
SMB_MEMCLK SMB_MEMDATA
SMB_MEMCLK SMB_MEMDATA
3
SMB_MEM_CLK
SMB_MEM_DATA
2
3
D17 X_1PS226_SOT23
1
3VDUAL
2
3
D18 X_1PS226_SOT23
1
2
Micro Star Restricted Secret
Title
FIRST LOGICAL DDR DIMM
Document Number
MICRO-STAR INT'L
No. 69, Li-De St, Jung-He City,
CO.,LTD.
Taipei Hsien, Taiwan http://www.msi.com.tw
MS-7283L2
1
Last Revision Date:
Monday, September 04, 2006
Sheet
10 32
Rev
101
of
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