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MS-7268
uATX(244mm X 210mm)
Page Title
Cover Sheet 1
Block disgram 2
D D
CPU:
AMD K8 Socket939 Athlon64/64FX
System Chipset:
North Bridge --- SIS 761GX
South Bridge --- SIS 964
OnBoard Chipset:
Clock Gen:ICS953805/
AC'97 Codec:Realtek ALC655/653
C C
LAN:RT8201CL PHY (10/100)
SIO:Winbond W83627 EHG Ver:H
Flash ROM:4MB LPC
RTM866-759
GPIO SPEC
Clock Distribution 4
Power Delivery
CPU:K8_939
Clock Synthesizer:ICS953805CF
DDR1 DIMM(Dual Channel)
Vcore:ISL6566CR(3 Phase)
NB:SIS 761GX/761/756/770
SB:SIS 965
IDE & SATA Connectors
PCIE X16
PCI Connectors 1&2
Main Memory:
DDRI (266/333/400MHz) * 2 (Dual Channel)
Expansion Slots:
PCI Express (X16) Slot * 1
PCI Slot * 2
B B
PWM:
Controller:ISL6566CR (3-Phase)
ACPI:
WINBOND / MS6 Ver: RBF
Other:
USB Port
AC97 Codec:Reltek ALC655
LAN:RTL 8201CL MII PHY(10/100)
SIO:Winbond W83627 EHF&Floppy&ROM
ACPI Power Controller:MS-6
VGA Connector & Fan
KB/MS/LPT/COM Connectors
Front Panel & System Regulator
Option Parts 32
EMI Parts 33
History 34
3
5
6,7,8
9
10,11
12
13,14,15,16
17,18,19,20
21
22
23
24
25
26
27
28
29
30
31
A A
Title
Title
Title
Cover Sheet
Cover Sheet
Cover Sheet
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
MS-7268 0A
MS-7268 0A
MS-7268 0A
Date: Sheet
Date: Sheet of
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Date: Sheet of
1
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13 4 Wednesday, December 14, 2005
13 4 Wednesday, December 14, 2005
13 4 Wednesday, December 14, 2005
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VRM ISL6566CR
DESKTOP Athlon 64
3-Phase PWM
D D
HyperTransport LINK0
1G
K8-939
LINK0
16x16
DDR266,333,400
DDR266,333,400
UNBUFFERED DDR
DIMM1
184-PIN DDR FIRST LOGICAL DIMM
UNBUFFERED DDR
DIMM2
184-PIN DDR SECOND LOGICAL DIMM
External Clock Generator
ICS953805
SIS NB
DESKTOP 761GX
CRT
PCIE X16
C C
Rear port x 4
Front port x 4
PCI BUS
Realtek
B B
10/100 PHY
RT8201CL
PCI SLOT 2
PCIE X16
PCI SLOT 1
USB2.0
MuTIOL
SIS SB
DESKTOP 965/L
USB2.0 (4+4)
SATA*2
AC97
ATA 66/100/133*2
LPC I/F
INT RTC
PCI SLOT*2
AC LINK
SATA Link
ATA 66/100/133
LPC I/F
VGA CON
AC97 CODEC
ALC655/653
SATA Port #1~2
IDE1
IDE2
W83627 EHG Ver:H
761GX CORE & PCIE
POWER
& NB,SB POWER
SEQUENCE
A A
ACPI MS6
CONTROLLER &
DDR MEMORY POWER
5
4
FLOPPY
*1 *1 *1 *2
LPT
KB &
MOUSE
3
SERIAL
PORTS
FAN
CONTROL
2
FLASH
BIOS
4M
Title
Title
Title
Block diagram
Block diagram
Block diagram
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
MS-7268 0A
MS-7268 0A
MS-7268 0A
Date: Sheet
Date: Sheet
Date: Sheet
1
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23 4 Wednesday, December 14, 2005
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23 4 Wednesday, December 14, 2005
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23 4 Wednesday, December 14, 2005
5
PCI RESET DEVICE
Signals
HDDRST#
PCIDEVRST# LPC
PCISLOTRST# PCIE x16,PCI slot1&2
D D
Target
Primary,Secondary IDE
JUMPER SETTING
JCMOS1
JAUD1
(1-2)NORMAL
(5-6) LINEOUT_R (9-10) LINEOUT_L
(2-3)CLEAR
DDR DIMM Config.
DEVICE
DIMM 1
CH-A
DIMM 2
CH-B
C C
10100000B
10100001B
CLOCK ADDRESS
MCLK_1L#0/MCLK_1L0
MCLK_1L#1/MCLK_1L1
MCLK_1L#2/MCLK_1L2
MCLK_1H#0/MCLK_1H0
MCLK_1H#1/MCLK_1H1
MCLK_1H#2/MCLK_1H2
4
PCI Config.
DEVICE MCP1 INT Pin
PCI Slot 1
PCI Slot 2
LPC
SIO
PIRQ#A
PIRQ#C
PIRQ#D
PIRQ#C
PIRQ#D
PIRQ#A
PIRQ#B
REQ#/GNT#
PREQ#0
PGNT#0
PREQ#1
PGNT#1
3
IDSEL
AD21
AD22
CLOCK
PCICLK1 PIRQ#B
PCICLK2
LPC_PCLK
SIO_PCLK
2
SB/GPIO
Name Function Description
GPIO 0
GPIO 1
GPIO 2
GPIO 3
GPIO 4
GPIO 5
GPIO 6
GPIO 7
GPIO 8
GPIO 9
GPIO 10
GPIO 11
GPIO 12
NA
BIOS_WP#
THERM#(OVT# of SIO)
1K ohm Pull up to VCC3
4.7K ohm Pull up to VCC3
1K ohm Pull up to VCC3
NA
NA
1K ohm Pull up to 3VDUAL
NA
NA
LDTREQ#(SIS ap note A761GX-0-003)
NA
1
USB
Rear
Front
B B
A A
Port DATA +/-
USB1
LAN_USB1
JUSB1
JUSB2
USB1USB1+
USB0USB0+
USB2USB2+
USB3USB3+
USB4USB4+
USB5USB5+
USB6USB6+
USB7USB7+
OC#
USB_OC#1
( OC#0~1 )
USB_OC#2
( OC#2~3 )
USB_OC#4
( OC#4~5 )
USB_OC#6
( OC#6~7 )
Title
Title
Title
GPIO Spec
GPIO Spec
GPIO Spec
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
MS-7268 0A
MS-7268 0A
MS-7268 0A
Date: Sheet
Date: Sheet
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Date: Sheet
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33 4 Wednesday, December 14, 2005
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33 4 Wednesday, December 14, 2005
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DIMM1-CHA DIMM2-CHB
4
3
2
1
D D
C C
Dual Chanel
3 PAIR MEM CLK
Athlon64
uFCPGA 939
3 PAIR MEM CLK
1 PAIR CPU CLK
200MHZ
14.318MHZ OSC INPUT
EXTERNAL
CLK GEN.
1PAIR NB CLK
66MHZ
NB-OSC
14.318MHZ
NB PCIE CLK
100MHZ
V-OSC
14.318MHZ
PCIE CLK
100MHZ
SB PCIE CLK
100MHZ
SB-OSC
14.318MHZ OSC INPUT
SIS761GX
PCIE GFX SLOT - 16 LANES
USB CLK
12MHZ
SIS SB
964
AC97_BITCLK
32.768KHZ OSC INPUT
SUPER IO
AC97 CODEC
14.318MHZ
SIO_PCLK
33MHZ
SB_PCLK33
33MHZ
SATACLK
100MHZ
KB_CLK
MS_CLK
B B
PCI CLK1
33MHZ
PCI CLK2
33MHZ
SIO_PCLK
33MHZ
PCI SLOT1
PCI SLOT2
LPC
KEYBOARD
MOUSE
SIO_PCLK
33MHZ
A A
Title
Title
Title
Clock Distribution
Clock Distribution
Clock Distribution
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
MS-7268 0A
MS-7268 0A
MS-7268 0A
Date: Sheet
Date: Sheet
5
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Date: Sheet
1
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43 4 Wednesday, December 14, 2005
of
43 4 Wednesday, December 14, 2005
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43 4 Wednesday, December 14, 2005
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ATHLON 64
VDDCORE
0.8-1.55V 80A(90W)
VTT_DDR_SUS 0.455A
VCC_25_SUS 2.2A
VLDT 1.2V 0.5A
VDDA_12_A(S0,S1)
NB 761GX
VLDT 1.2V 0.1A
ATX P/S WITH 1A STBY CURRENT
VBAT
D D
5VSB
+/-5%
5V
+/-5%
3.3V
+/-5%
12V
+/-5%
-12V
+/-5%
CPU
PW
12V
+/-5%
VRM SW
REGULATOR
VDD 1.2V
REGULATOR
CPU_VCORE (S0, S1)
VDDA_12_A (S0, S1)
VTT_DDR(S0,S1,S3)
VCC_DDR(S0,S1,S3)
VDDA_12_A (S0, S1)
+3.3V (S0, S1)
CLOCK LOGIC
3.3V 0.05A
1.8V
REGULATOR
1.3V VTT_DDR
2.6V VDDR
REGULATOR
REGULATOR
VTT_DDR(S0,S1,S3)
VCC_DDR(S0,S1,S3)
+3.3VSB REGULATOR
ACPI CONTROLLER
C C
+5VSB REGULATOR
ACPI CONTROLLER
+3V_Dual (S0, S1, S3, S4, S5)
+5V_Dual (S0, S1, S3)
VCC1.8
DDR400 DIMMs
VTT_DDR VTT 1.8A
VDD MEM VDD 3A
1.8V STB
REGULATOR
+3V_Dual (S0, S1, S3, S4, S5)
VCC1.8SB (S0, S1, S3, S4, S5)
+3.3V (S0, S1)
5VAA LDO
REGULATOR
+5VR (S0, S1)
VCC1.8(S0,S1)
VCC1.8(S0,S1)
VCC1.8(S0,S1)
+3.3V (S0, S1)
VCC1.8SB (S0,S1,S3)
VBAT
+3.3V (S0, S1)
+5VR (S0, S1)
NB CORE VDDC
1.8V 3.7A
PCI-E I/O 1.8V 1A
SB SIS964
1.8V 0.7A
3VDual 0.1A
+3.3V 0.1A
VCC1.8SB 0.4A
RTCVCC
AC97 CODEC
3.3V CORE 0.3A
5V ANALOG 0.1A
ENTHERNET
3.3V 0.5A (S0, S1)
3.3V 0.1A (S0,S1,S3)
B B
+3V_Dual (S0, S1, S3, S4, S5)
+3.3V (S0, S1)
VBAT
SUPER I/O
+3V SD 0.01A
+3V 0.1A
VBAT
+5V_Dual (S0, S1, S3)
PCI Slot (per slot)
5V
3.3V
12V
3.3Vaux
A A
-12V
5.0A
7.6A
0.5A
0.375A
0.1A
X2
X16 PCIE
3.3V
12V
3.0A
5.5A
USB X4 FR USB X4 RL
VDD
5VDual
VDD
5VDual
2A 2A
2XPS/2
5VDual
1.0A
+3.3VDUAL (S0, S1, S3)
Title
Title
Title
Power Delivery
Power Delivery
Power Delivery
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
MS-7268 0A
MS-7268 0A
MS-7268 0A
Date: Sheet
Date: Sheet
5
4
3
2
Date: Sheet
1
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53 4 Wednesday, December 14, 2005
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53 4 Wednesday, December 14, 2005
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53 4 Wednesday, December 14, 2005
5
VDD_12_A
C84
C191
C191
C0.22u25Y
C0.22u25Y
C84
X_C0.22u25Y
X_C0.22u25Y
C86
C86
X_C0.22u25Y
X_C0.22u25Y
D D
CADIP[0..15] 13
CADIN[0..15] 13
15:5:5:5:15
C C
CLKIP1 13
CLKIN1 13
CLKIP0 13
CLKIN0 13
CTLIP0 13
CTLIN0 13
20:5:5:5:20
B B
C85
C85
C0.22u25Y
C0.22u25Y
CADIP15
CADIN15
CADIP14
CADIN14
CADIP13
CADIN13
CADIP12
CADIN12
CADIP11
CADIN11
CADIP10
CADIN10
CADIP9
CADIN9
CADIP8
CADIN8
CADIP7
CADIN7
CADIP6
CADIN6
CADIP5
CADIN5
CADIP4
CADIN4
CADIP3
CADIN3
CADIP2
CADIN2
CADIP1
CADIN1
CADIP0
CADIN0
C197
C197
X_C0.22u25Y
X_C0.22u25Y
VDD_12_A
C172
C172
C0.22u25Y
C0.22u25Y
E2
VLDT_06
E1
VLDT_05
F1
VLDT_02
F2
VLDT_01
R5
L0_CADIN_H15
T5
L0_CADIN_L15
P3
L0_CADIN_H14
P4
L0_CADIN_L14
N5
L0_CADIN_H13
P5
L0_CADIN_L13
M3
L0_CADIN_H12
M4
L0_CADIN_L12
K3
L0_CADIN_H11
K4
L0_CADIN_L11
J5
L0_CADIN_H10
K5
L0_CADIN_L10
H3
L0_CADIN_H9
H4
L0_CADIN_L9
G5
L0_CADIN_H8
H5
L0_CADIN_L8
R3
L0_CADIN_H7
R2
L0_CADIN_L7
N1
L0_CADIN_H6
P1
L0_CADIN_L6
N3
L0_CADIN_H5
N2
L0_CADIN_L5
L1
L0_CADIN_H4
M1
L0_CADIN_L4
J1
L0_CADIN_H3
K1
L0_CADIN_L3
J3
L0_CADIN_H2
J2
L0_CADIN_L2
G1
L0_CADIN_H1
H1
L0_CADIN_L1
G3
L0_CADIN_H0
G2
L0_CADIN_L0
L5
L0_CLKIN_H1
M5
L0_CLKIN_L1
L3
L0_CLKIN_H0
L2
L0_CLKIN_L0
R1
L0_CTLIN_H0
T1
L0_CTLIN_L0
C83
C83
X_C0.22u25Y
X_C0.22u25Y
CPU1A
CPU1A
VLDT_08
VLDT_07
VLDT_04
VLDT_03
L0_CADOUT_H15
L0_CADOUT_L15
L0_CADOUT_H14
L0_CADOUT_L14
L0_CADOUT_H13
L0_CADOUT_L13
L0_CADOUT_H12
L0_CADOUT_L12
L0_CADOUT_H11
L0_CADOUT_L11
L0_CADOUT_H10
L0_CADOUT_L10
L0_CADOUT_H9
L0_CADOUT_L9
L0_CADOUT_H8
L0_CADOUT_L8
L0_CADOUT_H7
L0_CADOUT_L7
L0_CADOUT_H6
L0_CADOUT_L6
L0_CADOUT_H5
L0_CADOUT_L5
L0_CADOUT_H4
L0_CADOUT_L4
L0_CADOUT_H3
L0_CADOUT_L3
L0_CADOUT_H2
L0_CADOUT_L2
L0_CADOUT_H1
L0_CADOUT_L1
L0_CADOUT_H0
L0_CADOUT_L0
L0_CLKOUT_H1
L0_CLKOUT_L1
L0_CLKOUT_H0
L0_CLKOUT_L0
L0_CTLOUT_H0
L0_CTLOUT_L0
VLDT 0
VLDT 0
AG4
AG3
AG1
AG2
V4
V3
Y5
W5
Y4
Y3
AB5
AA5
AD5
AC5
AD4
AD3
AF5
AE5
AF4
AF3
V1
U1
W2
W3
Y1
W1
AA2
AA3
AC2
AC3
AD1
AC1
AE2
AE3
AF1
AE1
AB4
AB3
AB1
AA1
U2
U3
CADOP15
CADON15
CADOP14
CADON14
CADOP13
CADON13
CADOP12
CADON12
CADOP11
CADON11
CADOP10
CADON10
CADOP9
CADON9
CADOP8
CADON8
CADOP7
CADON7
CADOP6
CADON6
CADOP5
CADON5
CADOP4
CADON4
CADOP3
CADON3
CADOP2
CADON2
CADOP1
CADON1
CADOP0
CADON0
CLKOP1
CLKON1
CLKOP0
CLKON0
CTLOP0
CTLON0
4
C130
C130
C4.7u10Y0805
C4.7u10Y0805
15:5:5:5:15
CLKOP1 13
CLKON1 13
CLKOP0 13
CLKON0 13
CTLOP0 13
CTLON0 13
3
VDDA_25_CPU
VDDA_25_CPU
CADOP[0..15] 13
CADON[0..15] 13
Width:5mil, Spacing:10mil, Long:<1000mil
CPUCLK0_H 9
CPUCLK0_L 9
VDD_12_A
R78 44.2R1% R78 44.2R1%
R77 44.2R1% R77 44.2R1%
C54 C3900P50X C54 C3900P50X
C53 C3900P50X C53 C3900P50X
VCC_DDR
R52
R52
820R1%
820R1%
R71
R71
820R1%
820R1%
VDD_12_A
20:5:5:5:20
RN44
RN44
680R
680R
FB6
FB6
300L700mA250_0805
300L700mA250_0805
C77
C77
R69
R69
169R1%0402
169R1%0402
R75 49.9R1%0402 R75 49.9R1%0402
R76 49.9R1%0402 R76 49.9R1%0402
-LDTRST
7 8
CPU_GD
5 6
-LDTSTOP
3 4
1 2
CPU_VDDA_25
C62
C63
C63
C4.7u6.3X0805
C4.7u6.3X0805
-LDTRST 13
CPU_GD 28
-LDTSTOP 13
C76
C76
C102P50X0402
C102P50X0402
C102P50X0402
C102P50X0402
VCC_DDR
Rout 5/5/5 mil, Long:<500 mils
CLKIN_H
CLKIN_L
CPU_STRAP_HI_E11
CPU_STRAP_LO_F11
VDDA_25_CPU
R94
R94
R95
R95
680R0402
680R0402
680R0402
680R0402
C62
C61
C61
C102P50X0402
C102P50X0402
C0.22u25Y
C0.22u25Y
-LDTRST
CPU_GD
-LDTSTOP
L0_REF1
L0_REF0
COREFB+ 12
COREFB- 12
TP9TP9
CPU_CORESENSE
TP11TP11
CPU_VDDIOFB_H
TP15TP15
CPU_VDDIOFB_L
TP16TP16
R100 51.1R1% R100 51.1R1%
TP5TP5
TP4TP4
CPU_STRAP_HI_AJ12
CPU_STRAP_HI_AF12
CPU_STRAP_HI_T3
CPU_STRAP_LO_T4
CPU_NC_A4
TP7TP7
CPU_NC_D4
TP1TP1
CPU_NC_B4
TP3TP3
CPU_NC_C4
TP2TP2
CPU_NC_C7
TP10TP10
CPU_NC_C6
TP6TP6
CPU_NC_C5
CPU_NC_A5
AA24
AE13
AG6
AG7
AJ12
AF12
AE22
AG22
AH8
AH29
AJ22
AJ28
AK3
AK4
AK6
AK8
AK10
AK12
C3
B3
A3
F8
E8
B6
D1
C1
E5
E6
E7
Y24
A8
B8
E11
F11
C5
A5
B11
AF8
AJ9
T3
T4
A4
D4
B4
C4
C7
C6
AL8
AL7
AJ4
AJ5
AJ6
AJ7
AJ8
AL3
AL4
AL5
AL6
2
VDDA3
VDDA2
VDDA1
RESET_L
PWROK
LDTSTOP_L
L0_REF1
L0_REF0
COREFB_H
COREFB_L
CORESENSE
VDDIOFB_H
VDDIOFB_L
VDDIOSENSE
CLKIN_H
CLKIN_L
BYPASSCLK_H
BYPASSCLK_L
PLLCHRZ_H
PLLCHRZ_L
DBRDY
TMS
TCK
TRST_L
TDI
SINGLECHAIN
BURNIN_L
SCANIN_H
SCANIN_L
ANALOG3
ANALOG2
ANALOG1
ANALOG0
DIG_T
ANALOG_T
RSVD_SMBUSC
RSVD_SMBUSD
FREE1
FREE2
FREE3
FREE4
FREE5
FREE6
FREE7
FREE8
FREE9
FREE10
FREE11
FREE12
FREE13
FREE14
FREE15
FREE16
FREE17
FREE18
FREE19
FREE20
FREE21
CPU1D
CPU1D
THERMTRIP_L
THERMDA
THERMDC
VID4
VID3
VID2
VID1
VID0
FBCLKOUT_H
FBCLKOUT_L
DBREQ_L
SCANCLK2
SCANCLK1
SCANEN
SCANSHIFTENB
SCANSHIFTEN
TDO
SCANOUT_H
SCANOUT_L
PROGEN1_L
PROGEN0_L
FREE22
FREE23
FREE24
FREE25
FREE26
FREE27
FREE28
FREE29
FREE30
FREE31
FREE32
FREE33
FREE34
FREE35
FREE36
FREE37
FREE38
FREE39
FREE40
FREE41
BP3
BP2
BP1
BP0
MISC
MISC
THRM#
AG10
AJ2
AJ1
A13
A12
C12
A11
A10
CPU_NC_C13
C13
CPU_NC_E9
E9
CPU_STRAP_LO_B13
B13
CPU_STRAP_LO_C10
C10
CPU_FBCLKOUT_H
F13
E13
CPU_FBCLKOUT_L
A6
CPU_STRAP_LO_AG9
AG9
CPU_STRAP_LO_AH6
AH6
CPU_STRAP_LO_AF10
AF10
CPU_STRAP_LO_AH10
AH10
CPU_STRAP_LO_AJ10
AJ10
AG8
CPU_NC_V5
V5
CPU_NC_U5
U5
VTT_DDR
AL14
A14
AL9
AL10
AL11
AL12
C22
C28
D8
D11
D12
D29
E21
E22
G15
N27
T25
T29
U28
C11
AG15
AH12
THRM# 18,28
THERMDA_CPU 27
THERMDC_CPU 27
VID4 12
VID3 12
VID2 12
VID1 12
VID0 12
TP8TP8
TP12TP12
R67
R67
80.6R1%0402
80.6R1%0402
R93 680R0402 R93 680R0402
TP14TP14
TP13TP13
VTT_DDR
1
R73 680R0402 R73 680R0402
R72 680R0402 R72 680R0402
Layout with 5/5/5 from
CPU, then fan out to
8/5/8, 20 mil
spacing,Total length
<1000 mils
CPU_STRAP_LO_AH10
CPU_STRAP_LO_AF10
CPU_STRAP_LO_AG9
CPU_STRAP_LO_AH6
RN41
RN41
680R
680R
7 8
5 6
3 4
1 2
A A
Title
Title
Title
AMD-K8-939-1(VLDT,MISC)
AMD-K8-939-1(VLDT,MISC)
AMD-K8-939-1(VLDT,MISC)
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
MS-7268 0A
MS-7268 0A
MS-7268 0A
Date: Sheet
Date: Sheet
5
4
3
2
Date: Sheet
1
of
63 4 Thursday, December 15, 2005
of
63 4 Thursday, December 15, 2005
of
63 4 Thursday, December 15, 2005
5
4
3
2
1
VDD_VTT_SUS_CPU is connected to the VDD_VTT_SUS power
supply through the package or on the die. It is only connected
CPU1C
MDQ_B[0..63] 11
D D
C C
B B
MDQM_B[0..7] 11
MDQS_B[0..7] 11
A A
MDQ_B63
MDQ_B62
MDQ_B61
MDQ_B60
MDQ_B59
MDQ_B58
MDQ_B57
MDQ_B56
MDQ_B55
MDQ_B54
MDQ_B53
MDQ_B52
MDQ_B51
MDQ_B50
MDQ_B49
MDQ_B48
MDQ_B47
MDQ_B46
MDQ_B45
MDQ_B44
MDQ_B43
MDQ_B42
MDQ_B41
MDQ_B40
MDQ_B39
MDQ_B38
MDQ_B37
MDQ_B36
MDQ_B35
MDQ_B34
MDQ_B33
MDQ_B32
MDQ_B31
MDQ_B30
MDQ_B29
MDQ_B28
MDQ_B27
MDQ_B26
MDQ_B25
MDQ_B24
MDQ_B23
MDQ_B22
MDQ_B21
MDQ_B20
MDQ_B19
MDQ_B18
MDQ_B17
MDQ_B16
MDQ_B15
MDQ_B14
MDQ_B13
MDQ_B12
MDQ_B11
MDQ_B10
MDQ_B9
MDQ_B8
MDQ_B7
MDQ_B6
MDQ_B5
MDQ_B4
MDQ_B3
MDQ_B2
MDQ_B1
MDQ_B0
MDQM_B7
MDQM_B6
MDQM_B5
MDQM_B4
MDQM_B3
MDQM_B2
MDQM_B1
MDQM_B0
MDQS_B7
MDQS_B6
MDQS_B5
MDQS_B4
MDQS_B3
MDQS_B2
MDQS_B1
MDQS_B0
AJ15
AL16
AL18
AL19
AL15
AK15
AK17
AJ17
AH19
AL21
AJ23
AL25
AK19
AJ19
AL24
AK25
AJ25
AL26
AG29
AF31
AH25
AL27
AJ31
AG31
AE31
AD31
AB31
AA29
AE29
AC28
AC31
AA30
M31
H31
G31
G30
C31
C27
D25
C30
C23
C19
D17
C15
C17
D15
AA31
W29
N31
N29
W28
W31
R29
AL17
AK21
AK27
AC29
U30
AH15
AL20
AJ27
AC30
L30
L31
L29
J28
E30
E31
B27
A27
B23
A20
B19
A25
A24
A19
B17
A15
A18
B15
P31
V31
J30
B29
B21
A16
J29
A28
A21
A17
MEMDATA127
MEMDATA126
MEMDATA125
MEMDATA124
MEMDATA123
MEMDATA122
MEMDATA121
MEMDATA120
MEMDATA119
MEMDATA118
MEMDATA117
MEMDATA116
MEMDATA115
MEMDATA114
MEMDATA113
MEMDATA112
MEMDATA111
MEMDATA110
MEMDATA109
MEMDATA108
MEMDATA107
MEMDATA106
MEMDATA105
MEMDATA104
MEMDATA103
MEMDATA102
MEMDATA101
MEMDATA100
MEMDATA99
MEMDATA98
MEMDATA97
MEMDATA96
MEMDATA95
MEMDATA94
MEMDATA93
MEMDATA92
MEMDATA91
MEMDATA90
MEMDATA89
MEMDATA88
MEMDATA87
MEMDATA86
MEMDATA85
MEMDATA84
MEMDATA83
MEMDATA82
MEMDATA81
MEMDATA80
MEMDATA79
MEMDATA78
MEMDATA77
MEMDATA76
MEMDATA75
MEMDATA74
MEMDATA73
MEMDATA72
MEMDATA71
MEMDATA70
MEMDATA69
MEMDATA68
MEMDATA67
MEMDATA66
MEMDATA65
MEMDATA64
MEMCHECK15
MEMCHECK14
MEMCHECK13
MEMCHECK12
MEMCHECK11
MEMCHECK10
MEMCHECK9
MEMCHECK8
MEMDM_UP8
MEMDM_UP7
MEMDM_UP6
MEMDM_UP5
MEMDM_UP4
MEMDM_UP3
MEMDM_UP2
MEMDM_UP1
MEMDM_UP0
MEMDQS_UP8
MEMDQS_UP7
MEMDQS_UP6
MEMDQS_UP5
MEMDQS_UP4
MEMDQS_UP3
MEMDQS_UP2
MEMDQS_UP1
MEMDQS_UP0
CPU1C
MEMDATA63
MEMDATA62
MEMDATA61
MEMDATA60
MEMDATA59
MEMDATA58
MEMDATA57
MEMDATA56
MEMDATA55
MEMDATA54
MEMDATA53
MEMDATA52
MEMDATA51
MEMDATA50
MEMDATA49
MEMDATA48
MEMDATA47
MEMDATA46
MEMDATA45
MEMDATA44
MEMDATA43
MEMDATA42
MEMDATA41
MEMDATA40
MEMDATA39
MEMDATA38
MEMDATA37
MEMDATA36
MEMDATA35
MEMDATA34
MEMDATA33
MEMDATA32
MEMDATA31
MEMDATA30
MEMDATA29
MEMDATA28
MEMDATA27
MEMDATA26
MEMDATA25
MEMDATA24
MEMDATA23
MEMDATA22
MEMDATA21
MEMDATA20
MEMDATA19
MEMDATA18
MEMDATA17
MEMDATA16
MEMDATA15
MEMDATA14
MEMDATA13
MEMDATA12
MEMDATA11
MEMDATA10
MEMDATA9
MEMDATA8
MEMDATA7
MEMDATA6
MEMDATA5
MEMDATA4
MEMDATA3
MEMDATA2
MEMDATA1
MEMDATA0
MEMCHECK7
MEMCHECK6
MEMCHECK5
MEMCHECK4
MEMCHECK3
MEMCHECK2
MEMCHECK1
MEMCHECK0
MEMDM_LO8
MEMDM_LO7
MEMDM_LO6
MEMDM_LO5
MEMDM_LO4
MEMDM_LO3
MEMDM_LO2
MEMDM_LO1
MEMDM_LO0
MEMDQS_LO8
MEMDQS_LO7
MEMDQS_LO6
MEMDQS_LO5
MEMDQS_LO4
MEMDQS_LO3
MEMDQS_LO2
MEMDQS_LO1
MEMDQS_LO0
DDR: DATA
DDR: DATA
Athlon 64 939 Processor
AE16
AG17
AG18
AE18
AJ16
AG16
AE17
AJ18
AJ20
AE20
AE23
AG24
AG19
AE19
AJ24
AE24
AG25
AE25
AD25
AC25
AF25
AJ26
AE27
AD29
AB25
AB27
AA28
Y25
AC26
AB29
AA27
Y27
N25
M25
K27
K25
M29
M27
K29
J27
H27
G27
D27
F25
H29
G26
E26
G25
G23
F23
C20
F19
E24
C24
G19
E19
E18
G17
E16
E15
G18
C18
G16
C16
Y29
W27
P27
R25
W26
V25
R28
P29
V29
AF17
AG21
AH27
AA25
L26
F27
G20
E17
U26
AH17
AG20
AG26
AA26
L25
E27
E20
F17
MDQ_A63
MDQ_A62
MDQ_A61
MDQ_A60
MDQ_A59
MDQ_A58
MDQ_A57
MDQ_A56
MDQ_A55
MDQ_A54
MDQ_A53
MDQ_A52
MDQ_A51
MDQ_A50
MDQ_A49
MDQ_A48
MDQ_A47
MDQ_A46
MDQ_A45
MDQ_A44
MDQ_A43
MDQ_A42
MDQ_A41
MDQ_A40
MDQ_A39
MDQ_A38
MDQ_A37
MDQ_A36
MDQ_A35
MDQ_A34
MDQ_A33
MDQ_A32
MDQ_A31
MDQ_A30
MDQ_A29
MDQ_A28
MDQ_A27
MDQ_A26
MDQ_A25
MDQ_A24
MDQ_A23
MDQ_A22
MDQ_A21
MDQ_A20
MDQ_A19
MDQ_A18
MDQ_A17
MDQ_A16
MDQ_A15
MDQ_A14
MDQ_A13
MDQ_A12
MDQ_A11
MDQ_A10
MDQ_A9
MDQ_A8
MDQ_A7
MDQ_A6
MDQ_A5
MDQ_A4
MDQ_A3
MDQ_A2
MDQ_A1
MDQ_A0
MDQM_A7
MDQM_A6
MDQM_A5
MDQM_A4
MDQM_A3
MDQM_A2
MDQM_A1
MDQM_A0
MDQS_A7
MDQS_A6
MDQS_A5
MDQS_A4
MDQS_A3
MDQS_A2
MDQS_A1
MDQS_A0
MDQ_A[0..63] 10
MDQM_A[0..7] 10
MDQS_A[0..7] 10
on the board to decoupling near the CPU package.
VTT_DDR
C176
C176
C4.7u6.3X0805
C4.7u6.3X0805
Routing
on the bottom layer
MEMDATA[63..0] with 10/10
MEMDQS_L[8..0] with 15/20
MEMCHECK[7..0] with 10/10
MEMADDA[13..0] with 10/10
MA COMMAND with 10/10
MEMCLK_1L/2L[0..2] with 20/5/5/5/20
on the top layer
MEMDATA[127..64] with 10/10
MEMDQS_H[8..0] with 15/20
MEMCHECK[15..8] with 10/10
MEMADDB[13..0] with 10/10
MB COMMAND with 10/10
MEMCLK_1H/2H[0..2] with 20/5/5/5/20
VCC_DDR
R53
R53
15R1%
15R1%
R60
R60
15R1%
15R1%
VCC_DDR
C66
C66
C0.22u25Y
C0.22u25Y
R101
R101
34.8R1%
34.8R1%
R92
R92
34.8R1%
34.8R1%
MA_A[13..0] 10 MA_B[13..0] 11
DIMM1 DIMM2
VDDR_VREF
C45
C45
C103P50X
C103P50X
C52
C52
C49
C49
C51
C51
C0.1u25Y
X_C103P50X
X_C103P50X
C0.1u25Y
X_C102P50X
X_C102P50X
VDDR_VREF
TP17TP17
MCS_1H#1 11
MCS_1H#0 11
MCS_1L#1 10
MCS_1L#0 10
MEM_CKEC 11
MEM_CKEA 10
MBA_A1 10
MBA_A0 10
MRAS_A# 10
MCAS_A# 10
MWE_A# 10
VTT_DDR
B14
VTT6
C14
VTT7
D14
VTT8
E14
VTT1
AG14
VTT5
AK14
VTT4
AJ14
VTT3
AH14
VTT2
F15
CPU_VTT_SENSE
MEM_ZN
MEM_ZP
MCS_1H#1
MCS_1H#0
MCS_1L#1
MCS_1L#0
MEM_CKEC
MEM_CKEA
MA_A13
MA_A12
MA_A11
MA_A10
MA_A9
MA_A8
MA_A7
MA_A6
MA_A5
MA_A4
MA_A3
MA_A2
MA_A1
MA_A0
MBA_A1
MBA_A0
MCAS_A#
MWE_A# MWE_B#
AF13
AF15
AE15
AL29
AJ29
AG28
AF29
AL28
AJ30
AG27
AE26
AF23
W25
AC27
AD27
AF27
AE28
C25
B25
E25
G24
C26
E28
V27
F29
H25
G28
J26
J25
L27
L28
N26
P25
U25
MEMVREF
VTT_SENSE
MEMZN
MEMZP
MEMCS_1H_L1
MEMCS_1H_L0
MEMCS_1L_L1
MEMCS_1L_L0
MEMCS_2H_L1
MEMCS_2H_L0
MEMCS_2L_L1
MEMCS_2L_L0
MEMCKED
MEMCKEC
MEMCKEB
MEMCKEA
MEMADDA13
MEMADDA12
MEMADDA11
MEMADDA10
MEMADDA9
MEMADDA8
MEMADDA7
MEMADDA6
MEMADDA5
MEMADDA4
MEMADDA3
MEMADDA2
MEMADDA1
MEMADDA0
MEMBANKA1
MEMBANKA0
MEMRASA_L
MEMCASA_L
MEMWEA_L
CPU1B
CPU1B
MEMCLK_1H_H2
MEMCLK_1H_L2
MEMCLK_1H_H1
MEMCLK_1H_L1
MEMCLK_1H_H0
MEMCLK_1H_L0
MEMCLK_1L_H2
MEMCLK_1L_L2
MEMCLK_1L_H1
MEMCLK_1L_L1
MEMCLK_1L_H0
MEMCLK_1L_L0
MEMCLK_2H_H2
MEMCLK_2H_L2
MEMCLK_2H_H1
MEMCLK_2H_L1
MEMCLK_2H_H0
MEMCLK_2H_L0
MEMCLK_2L_H2
MEMCLK_2L_L2
MEMCLK_2L_H1
MEMCLK_2L_L1
MEMCLK_2L_H0
MEMCLK_2L_L0
MEMADDB13
MEMADDB12
MEMADDB11
MEMADDB10
MEMADDB9
MEMADDB8
MEMADDB7
MEMADDB6
MEMADDB5
MEMADDB4
MEMADDB3
MEMADDB2
MEMADDB1
MEMADDB0
MEMBANKB1
MEMBANKB0
MEMRASB_L
MEMCASB_L
MEMWEB_L
MEMRESET_L
DDR: CMD/CTRL/CLK
DDR: CMD/CTRL/CLK
Athlon 64 939 Processor
AL22
AL23
A22
A23
R31
R30
AH23
AG23
D23
E23
R27
R26
AJ21
AH21
C21
D21
T31
U31
AF21
AE21
G21
G22
T27
U27
AK23
A26
A29
W30
C29
E29
D31
G29
F31
J31
K31
N28
N30
U29
Y31
AE30
AG30
AK29
AH31
D19
暫不上件
MA_A13
MA_A12
MA_A10
MA_A9
MA_A8
MA_A7
MA_A6
MA_A4
MA_A3
MA_A2
MA_A1
MA_A0
MA_B13
MA_B12
MA_B11
MA_B10
MA_B9
MA_B8
MA_B7
MA_B6
MA_B5
MA_B4
MA_B3
MA_B2
MA_B1
MA_B0
X_C22P50N0402 C142 X_C22P50N0402 C142
X_C22P50N0402 C60 X_C22P50N0402 C60
X_C22P50N0402 C67 X_C22P50N0402 C67
X_C22P50N0402 C102 X_C22P50N0402 C102
X_C22P50N0402 C70 X_C22P50N0402 C70
X_C22P50N0402 C75 X_C22P50N0402 C75
X_C22P50N0402 C73 X_C22P50N0402 C73
X_C22P50N0402 C81 X_C22P50N0402 C81
X_C22P50N0402 C79 X_C22P50N0402 C79
X_C22P50N0402 C91 X_C22P50N0402 C91
X_C22P50N0402 C93 X_C22P50N0402 C93
X_C22P50N0402 C94 X_C22P50N0402 C94
X_C22P50N0402 C96 X_C22P50N0402 C96
X_C22P50N0402 C99 X_C22P50N0402 C99
X_C22P50N0402 C141 X_C22P50N0402 C141
X_C22P50N0402 C59 X_C22P50N0402 C59
X_C22P50N0402 C68 X_C22P50N0402 C68
X_C22P50N0402 C101 X_C22P50N0402 C101
X_C22P50N0402 C69 X_C22P50N0402 C69
X_C22P50N0402 C74 X_C22P50N0402 C74
X_C22P50N0402 C72 X_C22P50N0402 C72
X_C22P50N0402 C80 X_C22P50N0402 C80
X_C22P50N0402 C78 X_C22P50N0402 C78
X_C22P50N0402 C90 X_C22P50N0402 C90
X_C22P50N0402 C92 X_C22P50N0402 C92
X_C22P50N0402 C95 X_C22P50N0402 C95
X_C22P50N0402 C97 X_C22P50N0402 C97
X_C22P50N0402 C98 X_C22P50N0402 C98
MA_B13
MA_B12
MA_B11
MA_B10
MA_B9
MA_B8
MA_B7
MA_B6
MA_B5
MA_B4
MA_B3
MA_B2
MA_B1
MA_B0
MBA_B1
MBA_B0
MRAS_B# MRAS_A#
MCAS_B#
MCS_1H#1
MCS_1H#0
MCS_1L#1 MA_A11
MCS_1L#0
MBA_A1
MBA_A0 MA_A5
MBA_B1
MBA_B0
MEM_CKEC
MEM_CKEA
MRAS_A#
MCAS_A#
MWE_A#
MRAS_B#
MCAS_B#
MWE_B#
MCLK_1H2 11
MCLK_1H#2 11
MCLK_1H1 11
MCLK_1H#1 11
MCLK_1H0 11
MCLK_1H#0 11
MCLK_1L2 10
MCLK_1L#2 10
MCLK_1L1 10
MCLK_1L#1 10
MCLK_1L0 10
MCLK_1L#0 10
MBA_B1 11
MBA_B0 11
MRAS_B# 11
MCAS_B# 11
MWE_B# 11
X_C22P50N0402 C129 X_C22P50N0402 C129
X_C22P50N0402 C124 X_C22P50N0402 C124
X_C22P50N0402 C128 X_C22P50N0402 C128
X_C22P50N0402 C123 X_C22P50N0402 C123
X_C22P50N0402 C104 X_C22P50N0402 C104
X_C22P50N0402 C115 X_C22P50N0402 C115
X_C22P50N0402 C105 X_C22P50N0402 C105
X_C22P50N0402 C114 X_C22P50N0402 C114
X_C22P50N0402 C56 X_C22P50N0402 C56
X_C22P50N0402 C57 X_C22P50N0402 C57
X_C22P50N0402 C120 X_C22P50N0402 C120
X_C22P50N0402 C126 X_C22P50N0402 C126
X_C22P50N0402 C121 X_C22P50N0402 C121
X_C22P50N0402 C119 X_C22P50N0402 C119
X_C22P50N0402 C127 X_C22P50N0402 C127
X_C22P50N0402 C122 X_C22P50N0402 C122
DIMM2
DIMM1
Title
Title
Title
AMD-K8-939-2
AMD-K8-939-2
AMD-K8-939-2
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
MS-7268 0A
MS-7268 0A
MS-7268 0A
Date: Sheet
Date: Sheet
5
4
3
2
Date: Sheet
1
of
73 4 Thursday, December 15, 2005
of
73 4 Thursday, December 15, 2005
of
73 4 Thursday, December 15, 2005
5
VCCP VCC_DDR
R11
R13
R15
R17
R19
R21
T10
T12
T14
T16
T18
T20
U11
U13
U15
U17
U19
U21
V10
V12
V14
V16
V18
V20
W11
W13
W15
VDD109
VDD110
VDD111
VDD112
VDD113
VDD114
VDD115T2VDD116T6VDD117T8VDD118
VDD119
VDD120
VDD121
VDD122
VDD123
VDD124U4VDD125U7VDD126U9VDD127
VDD128
VDD129
VDD130
VDD131
VDD132
VDD133V6VDD134V8VDD135
VDD136
VDD137
VDD138
VDD139
VDD140
VDD141W7VDD142W9VDD143
VDD144
VDD31
AE4
AD18
L20
L22
VSS169
VSS34
AD7
AD9
VDD32
VDD33
AE7
AE9
L24
VSS170
VSS171
VSS35
VSS36
AD11
AD13
VDD145
VDD34
VDD35
VDD36
VDD37
AK5
AJ11
AE11
M11
M13
VSS172M7VSS173M9VSS174
VSS175
VSS37
VSS38
VSS39
VSS40
AD15
AD17
AD19
D D
VDD1
VDD2
VDD3
VDD4
VDD5
VDD6
VDD7
VDD8
VDD9
VDD10
VDD11
VDD12
VDD13
VDD14
VDD15
VDD16
VDD17
VDD18
VDD19
VDD20
VDD21
VDD22
VDD23
VDD24
VDD25
VDD26
VDD27
VDD28
VDD29
VDD30
AA4
AA7
AA9
VCCP
H23
H26
H28
J10
C C
VSS136
VSS137
VSS138
VSS1A7VSS2A9VSS3
AA6
VSS139J6VSS140J8VSS141
VSS4
VSS5
VSS6
AA8
AA10
AA12
AA11
AA13
J12
J14
VSS142
VSS7
AA14
AA16
AA15
J16
VSS143
VSS144
VSS8
VSS9
AA18
AA17
AA19
J18
J20
VSS145
VSS10
AA20
AA22
AB6
AA21
J22
J24
VSS146
VSS147
VSS11
VSS12
AB2
AB7
AB8
AB10
AB12
VSS148
VSS149K2VSS150K7VSS151K9VSS152
VSS13
VSS14
VSS15
VSS16
AB9
AB11
AB13
AB14
K11
VSS17
AB15
AB16
AB18
K13
K15
VSS153
VSS18
AB17
AB19
AB20
K17
VSS154
VSS155
VSS19
VSS20
AB21
AC9
AC11
K19
K21
VSS156
VSS21
AB23
AB26
AC13
K23
VSS157
VSS158
VSS22
VSS23
AB28
AC15
AC17
K26
K28
VSS159
VSS24
AC4
AC6
AC19
VSS160
VSS25
AC10
AD2
AD6
AD8
AD10
L10
L12
VSS161L4VSS162L6VSS163L8VSS164
VSS165
VSS26
VSS27
VSS28
VSS29
VSS30
AC12
AC14
AC16
AC18
AD12
AD14
L14
L16
VSS166
VSS31
AC20
AC22
AD16
L18
VSS167
VSS168
VSS32
VSS33
AC24
W17
W19
VDD146
VDD38
AK7
AK9
M15
M17
VSS176
VSS41
AD21
AD23
W21
VDD147
VDD148
VDD149Y2VDD150Y6VDD151Y8VDD152
VDD39
VDD40
VDD41B5VDD42
AK11
M19
M21
VSS177
VSS178
VSS179
VSS42
VSS43
VSS44
AD26
AD28
B10
B12
M23
M26
VSS180
VSS45
AE6
AE8
4
Y10
VDD43
VDD44
D10
M28
VSS181
VSS182
VSS46
VSS47
AE10
Y12
Y14
Y16
Y18
VDD153
VDD154
VDD155
VDD45G7VDD46G9VDD47
G11
G13
N10
N12
VSS183N6VSS184N8VSS185
VSS48
VSS49
VSS50
AF2
AF6
AE12
AE14
Y20
AA23
VDDIO1
VDD156
VDD157
VDD48
VDD49H2VDD50H6VDD51H8VDD52
N14
N16
N18
VSS186
VSS187
VSS188
VSS189
VSS51
VSS52
VSS53
VSS54
AF7
AF9
AF11
AB22
AB24
VDDIO2
H10
H12
N20
N22
VSS190
VSS55
AF14
AF16
AB30
AC21
AC23
VDDIO3
VDDIO4
VDDIO5
VDD53
VDD54
VDD55
H14
H16
H18
N24
VSS191
VSS192
VSS193P2VSS194P7VSS195P9VSS196
VSS56
VSS57
VSS58
AF20
AF22
AF24
AD20
AD22
AD24
VDDIO6
VDDIO7
VDDIO8
VDD56
VDD57J4VDD58J7VDD59J9VDD60
P11
P13
VSS59
VSS60
VSS61
AG5
AF26
AF28
AD30
AF30
VDDIO9
VDDIO10
J11
J13
P15
P17
VSS197
VSS198
VSS62
VSS63
AG11
AG13
AH30
AK16
VDDIO11
VDDIO12
VDDIO13
VDD61
VDD62
VDD63
J15
J17
P19
P21
VSS199
VSS200
VSS201
VSS64
VSS65
VSS66
AH1
AG12
AK18
AK20
VDDIO14
VDDIO15
VDD64
VDD65K6VDD66K8VDD67
J19
P23
P26
VSS202
VSS203
VSS67
VSS68
AH2
AH3
AK22
AK24
AK26
VDDIO16
VDDIO17
VDDIO18
VDD68
K10
K12
P28
VSS204
VSS205R4VSS206R6VSS207R8VSS208
VSS69
VSS70
VSS71
AH4
AH5
AH7
AK28
AK30
VDDIO19
VDDIO20
VDD69
VDD70
K14
K16
R10
VSS72
VSS73
AH9
AH11
B16
B18
VDDIO21
VDDIO22
VDD71
VDD72
K18
K20
R12
R14
VSS209
VSS210
VSS74
VSS75
AH13
AH16
B20
B22
B24
VDDIO23
VDDIO24
VDDIO25
VDD73L7VDD74L9VDD75
L11
R16
R18
R20
VSS211
VSS212
VSS213
VSS76
VSS77
VSS78
AH18
AH20
AH22
B26
B28
VDDIO26
VDDIO27
VDD76
VDD77
L13
L15
R22
R24
VSS214
VSS215
VSS79
VSS80
AH24
AH26
3
B30
D30
F30
H20
H22
H24
H30
VDDIO28
VDDIO29
VDDIO30
VDDIO31
VDDIO32
VDDIO33
VDDIO34
VDD78
VDD79
VDD80
VDD81M2VDD82M6VDD83M8VDD84
L17
L19
L21
M10
T11
T13
T15
T17
T19
VSS216T7VSS217T9VSS218
VSS219
VSS220
VSS221
VSS222
VSS81
VSS82
VSS83
VSS84
VSS85
VSS86B7VSS87B9VSS88C2VSS89C8VSS90C9VSS91D2VSS92D3VSS93D5VSS94D6VSS95D7VSS96D9VSS97
AJ3
AJ13
AL13
AK13
AH28
J21
J23
VDDIO35
VDDIO36
VDD85
VDD86
M12
M14
T21
T23
VSS223
VSS224
K22
K24
VDDIO37
VDDIO38
VDD87
VDD88
M16
M18
T26
T28
VSS225
VSS226
K30
L23
M22
M24
VDDIO39
VDDIO40
VDDIO41
VDD89
VDD90N4VDD91N7VDD92N9VDD93
M20
U10
U12
VSS227U6VSS228U8VSS229
M30
N23
VDDIO42
VDDIO43
VDDIO44
VDD94
N11
N13
U14
U16
VSS230
VSS231
VSS232
D13
P22
P24
VDDIO45
VDDIO46
VDD95
VDD96
N15
N17
U18
U20
VSS233
VSS234
VSS98
VSS99
D16
D18
P30
R23
VDDIO47
VDDIO48
VDD97
VDD98
N19
N21
U22
U24
VSS235
VSS236
VSS100
VSS101
D20
D22
T22
D24
T24
T30
U23
V22
VDDIO49
VDDIO50
VDDIO51
VDDIO52
VDDIO53
VDD99P6VDD100P8VDD101
VDD102
VDD103
P10
P12
P14
V11
V13
VSS237V2VSS238V7VSS239V9VSS240
VSS241
VSS102
VSS103
VSS104
VSS105E3VSS106E4VSS107
D26
D28
V24
V30
VDDIO54
VDDIO55
VDD104
VDD105
P16
P18
V15
V17
VSS242
VSS243
VSS108
E10
E12
W23
P20
V19
G12
Y22
Y30
CPU1E CPU1E
VDDIO56
VDDIO57
VDDIO58
VDD106
VDD107R7VDD108
R9
V21
V23
V26
V28
VSS244
VSS245
VSS246
VSS247
VSS248
VSS109
VSS110F5VSS111F6VSS112F7VSS113F9VSS114
W10
W12
VSS249W4VSS250W6VSS251W8VSS252
VSS115
VSS116
VSS117
F10
F12
F14
F16
F18
2
W14
VSS253
VSS254
VSS118
VSS119
F22
W16
W18
VSS255
VSS120
F24
F26
W20
W22
W24
VSS256
VSS257
VSS258
VSS121
VSS122
VSS123G4VSS124G6VSS125G8VSS126
F28
Y11
VSS259
VSS260Y7VSS261Y9VSS262
G10
G14
Y13
Y15
Y17
VSS263
VSS264
VSS127
VSS128H7VSS129H9VSS130
H11
Y19
Y21
VSS265
VSS266
VSS131
H13
H15
Y23
VSS267
VSS268
VSS132
VSS133
H17
Y26
Y28
VSS269
VSS134
H19
H21
1
CPU1F CPU1F
VSS270
VSS135
Bottomside Decoupling
B B
A A
5
VCCP
C423
C423
C10u10Y1206-B
C10u10Y1206-B
C436
C436
C10u10Y120-B
C10u10Y120-B
C425
C425
C10u10Y1206-B
C10u10Y1206-B
VCC_DDR
C134
C134
C4.7u6.3X0805
C4.7u6.3X0805
C422
C422
C0.22u25X-B
C0.22u25X-B
C433
C433
C10u10Y1206-B
C10u10Y1206-B
C48
C48
C0.22u25X
C0.22u25X
C435
C435
C10u10Y1206-B
C10u10Y1206-B
C148
C148
C4.7u6.3X0805
C4.7u6.3X0805
C169
C169
C4.7u6.3X0805
C4.7u6.3X0805
C65
C65
C4.7u6.3X0805
C4.7u6.3X0805
C424
C424
C10u10Y1206-B
C10u10Y1206-B
C431
C431
C0.22u25X-B
C0.22u25X-B
C133
C133
C4.7u6.3X0805
C4.7u6.3X0805
C64
C64
C4.7u6.3X0805
C4.7u6.3X0805
4
C427
C427
C0.22u25X-B
C0.22u25X-B
C434
C434
C0.22u25X-B
C0.22u25X-B
VTT_DDR VCC_DDR
C432
C432
C0.22u25X-B
C0.22u25X-B
C428
C428
C0.22u25X-B
C0.22u25X-B
C38
C38
C4.7u6.3X0805
C4.7u6.3X0805
C55
C55
C0.22u25X
C0.22u25X
C430
C430
C0.22u25X-B
C0.22u25X-B
C132
C132
C0.22u25X
C0.22u25X
C421
C421
C0.22u25X-B
C0.22u25X-B
C426
C426
C0.22u25X-B
C0.22u25X-B
C429
C429
C0.22u25X-B
C0.22u25X-B
3
Title
Title
Title
AMD-K8-939-3
AMD-K8-939-3
AMD-K8-939-3
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
MS-7268 0A
MS-7268 0A
MS-7268 0A
Date: Sheet
Date: Sheet
2
Date: Sheet
1
of
83 4 Thursday, December 15, 2005
of
83 4 Thursday, December 15, 2005
of
83 4 Thursday, December 15, 2005
*
5
4
Clock Gen(ICS 953805 or RTM866-759)
3
2
1
VCC3
CP28 CP28
1 2
C258
C258
C263
C263
C262
C262
X_C0.1u25Y
X_C0.1u25Y
X_C10u10Y1206
X_C10u10Y1206
D D
C C
L1
X_0R0805L1X_0R0805
C10u10Y0805
C10u10Y0805
C235
C235
C0.1u25Y
C0.1u25Y
C244
C244
C0.1u25Y
C0.1u25Y
C202
C202
C0.1u25Y
C0.1u25Y
REFCLK0 14
REFCLK1 18
REFCLK2 14
AC_14 25
SB_PCLK33 17
SIO_PCLK 27
PCICLK2 23
PCICLK1 23
LPC_PCLK 27
C195
C195
C0.1u25Y
C0.1u25Y
REFCLK0
REFCLK1
REFCLK2
AC_14
SB_PCLK33
SIO_PCLK
PCICLK2
PCICLK1
LPC_PCLK
C249
C249
C0.1u25Y
C0.1u25Y
R146 10R0402 R146 10R0402
R144 10R0402 R144 10R0402
R158 10R0402 R158 10R0402
R159 10R0402 R159 10R0402
C245
C245
C0.1u25Y
C0.1u25Y
7 8
5 6
3 4
1 2
C192
C192
C0.1u25Y
C0.1u25Y
RN66
RN66
33R0402
33R0402
C254
C254
C0.1u25Y
C0.1u25Y
FS0
FS1
R186 33R0402 R186 33R0402
VCK33
C210
C210
C0.1u25Y
C0.1u25Y
C193 C27P50N0402 C193 C27P50N0402
C194 27P50N0402 C194 27P50N0402
12_48M * internal Up
"L"-->48MHz /
"H"-->12MHz
USB_12M
C223
C223
C0.1u25Y
C0.1u25Y
CLKTM
PECLKREQ#
MODE
FS2
FS3
Y1
Y1
14.318MHZ32P
14.318MHZ32P
R160 475R1% R160 475R1%
R192 10KR0402 R192 10KR0402
VCK33
11
12
19
25
34
40
47
52
56
14
15
16
17
20
21
22
23
48
18
U10
U10
ICS953805AF_SSOP56
ICS953805AF_SSOP56
1
VDDREF
VDDZ
VDDPCI
VDDPCI
VDD48
VDDPCIEX
VDDPCIEX
VDDSRC
VDDA
VDDCPU
2
*FS0/REF0
3
*FS1/REF1
4
PD#/CLKSTOP#
**Test_mode/PCICLK0
PCICLK1
*PECLKREQ#/PCICLK2
**Mode/PCICLK3
*(CPU_Stop#)/PCICLK4
**FS2/PCICLK5
**FS3/PCICLK6_F
PCICLK7_F
6
"X1
7
"X2
IREF
5
GNDREF
8
GNDZ
GNDPCI
R199 2.7KR0402 R199 2.7KR0402
55
CPUCLKP
54
CPUCLKN
51
NBCLKP
50
NBCLKN
46
SRCCLKP
45
SRCCLKN
42
PCIEXP0
41
PCIEXN0
39
PCIEXP1
38
PCIEXN1
36
PCIEXP2
35
PCIEXN2
33
PCIEXP3_F
32
PCIEXN3_F
31
PCIEXP4_F
30
PCIEXN4_F
9
ZCLK0
10
ZCLK1
SDATA
SCLK
GNDCPU
GNDA
GNDSRC
GNDPCIEX
GND48
GNDPCI
SEL24_48M
27
26
13
29
43
53
49
44
37
28
24
R201 X_10KR0402 R201 X_10KR0402
~24_48MHz/SEL24_48#**
12_48MHz/SEL12_48#*
*(RESET_IN#)/RESET#
24_48M ** internal Pull-Down
"L"-->48MHz /
"H"-->24MHz
CPUCLKP
CPUCLKN
NBCLKP
NBCLKN
SRCCLKP
SRCCLKN
PCIEXP0
PCIEXN0
PCIEXP2
PCIEXN2
SEL24_48M
SEL12_48M
R142 15R1% R142 15R1%
R143 15R1% R143 15R1%
R151 15R1% R151 15R1%
R157 15R1% R157 15R1%
R163 33R0402 R163 33R0402
R168 33R0402 R168 33R0402
R171 33R0402 R171 33R0402
R174 33R0402 R174 33R0402
R181 33R0402 R181 33R0402
R184 33R0402 R184 33R0402
R162 22R0402 R162 22R0402
R167 22R0402 R167 22R0402
R200 22R0402 R200 22R0402
R194 22R0402 R194 22R0402
R189 33R0402 R189 33R0402
R170 33R0402 R170 33R0402
VCK33
CPUCLK0_H
CPUCLK0_L
NBCLK_H
NBCLK_L
SATACLK
SATACLK#
PENB_100M
PENB_100M#
PEX16_100M
PEX16_100M#
NB_ZCLK
SB_ZCLK
SIO48M
USB_12M
FP_RST#
SMBDAT
SMBCLK
MODE ** internal Pull-Down
"L"-->Deaktop /
"H"-->Mobile
MODE
CPUCLK0_H 6
CPUCLK0_L 6
NBCLK_H 13
NBCLK_L 13
SATACLK 19
SATACLK# 19
PENB_100M 13
PENB_100M# 13
PEX16_100M 22
PEX16_100M# 22
NB_ZCLK 14
SB_ZCLK 17
SIO48M 27
USB_12M 19
FP_RST# 28,31
SMBDAT 10,11,18,22,23,28
SMBCLK 10,11,18,22,23,28
R177 2.7KR0402 R177 2.7KR0402
PENB_100M
PENB_100M#
PEX16_100M
PEX16_100M#
SATACLK
SATACLK#
USB_12M
PCICLK1
PCICLK2
SIO_PCLK
SB_PCLK33
CPUCLK0_H
CPUCLK0_L
NBCLK_H
NBCLK_L
NB_ZCLK
SB_ZCLK
SIO48M
USB_12M
LPC_PCLK
AC_14
REFCLK2
REFCLK0
REFCLK1
R172 49.9R1%0402 R172 49.9R1%0402
R175 49.9R1%0402 R175 49.9R1%0402
R182 49.9R1%0402 R182 49.9R1%0402
R185 49.9R1%0402 R185 49.9R1%0402
R164 49.9R1%0402 R164 49.9R1%0402
R169 49.9R1%0402 R169 49.9R1%0402
R193 X_75R1%0402 R193 X_75R1%0402
CN8 X_C10P50N CN8 X_C10P50N
1 2
3 4
5 6
7 8
C184 C10P25N0402 C184 C10P25N0402
C185 C10P25N0402 C185 C10P25N0402
C212 C10P25N0402 C212 C10P25N0402
C217 C10P25N0402 C217 C10P25N0402
C225 C10P25N0402 C225 C10P25N0402
C231 C10P25N0402 C231 C10P25N0402
C259 X_C10P25N0402 C259 X_C10P25N0402
C323 X_C10P25N0402 C323 X_C10P25N0402
C246 X_C10P25N0402 C246 X_C10P25N0402
CN7 X_10P50N CN7 X_10P50N
1 2
3 4
5 6
7 8
VCK33
FS1
R155 X_2.7KR0402 R155 X_2.7KR0402
FS0
B B
Different clock generator with different frequency define table
ICS953805
Bit4
0
0
0
0
0
0
0
0
0
A A
5
0
0
0
0
0
4
0
0
0
0
0
0
0
0
0
1
1
0
1
0
0
11
1
0
0
1
1
0
001
1
1
1
1
1
1
1
1
(FS2)
(FS3)
(FS0)
CPUCLK
(FS1)
Bit0 Bit1 Bit2 Bit3 Bit3 Bit0 Bit1 Bit2 Bit4
0
0
0
1
0
1
1
1
0
0
1
0
10
1
0
0
1
1
0
1
00
0
1
110
101
(MHz)
100.00
133.33
166.66
200.00
250.00
266.66
333.33
400.00
100.00
133.33
166.66
250.00
266.66
333.33
100.00
NBCLK
SRC
(MHz)
(MHz)
100.00
100.00
133.33
100.00
166.66
100.00
200.00
100.00
250.00
100.00
100.00
266.66
100.00
333.33
100.00
400.00
100.00
125.00
100.00
166.66
100.00
222.22
100.00 1
250.00
100.00
333.33
100.00
400.00
100.00
500.00
100.00 100.00
125.00
FS3
FS2
ZCLK
(MHz)
133.33
133.33
133.33
133.33
133.33
133.33
133.33
133.33
133.33
133.33
133.33
133.33
133.33
133.33
133.33
133.33
R145 X_2.7KR0402 R145 X_2.7KR0402
R188 X_2.7KR0402 R188 X_2.7KR0402
R187 X_2.7KR0402 R187 X_2.7KR0402
PCI-EX
(MHz)
100.00
100.00
100.00
100.00
100.00
100.00
100.00
100.00
100.00
100.00
100.00
100.00
100.00
100.00
100.00
100.00
3
PCI
(MHz)
33.33
33.33
33.33
33.33
33.33
33.33
33.33
33.33
33.33
33.33
33.33
33.33
33.33
33.33
33.33
33.33
1
0
1
0
0
1
0
1
10
0
1
1
0
0
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
ICS953805
0
0
0
0
0
0
1 0
1
1
1
0
0
0
1
1
1
1
0
1
0
1
1
0
0
0
1
1
0
1
1
0
0
0
1 0
0
1
1
0
0
1 1
0
1
0
1
1
133.33
166.66
200.00
250.00
266.66
333.33
134.66
168.33
202.00
252.50
134.66
168.33 200.00
202.00
252.50
206.00
206.00
2
NBCLK (FS0)
(MHz)
166.66
222.22
250.00
333.33
400.00
500.00
134.66
168.33
202.00
252.50
168.33
224.44
252.50
336.66
206.00
257.50
(MHz) (MHz) (MHz)
100.00
100.00
100.00
100.00
100.00
100.00
100.00
100.00
100.00
100.00
100.00
100.00
100.00
100.00
100.00
PCI-EX
ZCLK SRC (FS1) CPUCLK (FS2) (FS3)
133.33
133.33
133.33
133.33
133.33
133.33
134.66
134.66
134.66
134.66
134.66
134.66
134.66
134.66
137.33
137.33
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
Date: Sheet
PCI
(MHz)
(MHz)
100.00
33.33
100.00
33.33
100.00
33.33
100.00
33.33
100.00
33.33
100.00
33.33
101.00
33.66
101.00
33.66
101.00
33.66
101.00
33.66
101.00
33.66
101.00
33.66
101.00
33.66
101.00
33.66
103.00
34.33
103.00
34.33
Clock Synthesizer
Clock Synthesizer
Clock Synthesizer
MS-7268 0A
MS-7268 0A
MS-7268 0A
1
93 4 Thursday, December 15, 2005
93 4 Thursday, December 15, 2005
93 4 Thursday, December 15, 2005
of
of
of
5
DDR DIMM1
DIMM1
DIMM1
48
43
41
130
37
32
125
29
122
27
141
118
115
167
59
52
113
157
158
71
163
154
65
63
5
14
25
36
56
67
78
86
47
97
107
119
129
149
159
169
177
140
44
45
49
51
134
135
142
144
21
111
92
91
181
182
183
16
17
137
138
76
75
82
184
7
38
46
70
85
108
120
148
168
81
89
93
100
116
124
132
139
145
152
160
176
DIMM-D184-BK
DIMM-D184-BK
SIGNALS
SIGNALS
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10/AP
A11
A12/NC
A13/NC
BA0
BA1
NC/BA2
CS0#
CS1#
NC/CS2#
NC/CS3#
RAS#
CAS#
WE#
DQS0
DQS1
DQS2
DQS3
DQS4
DQS5
DQS6
DQS7
DQS8
DQM0/DQS9
DQM1/DQS10
DQM2/DQS11
DQM3/DQS12
DQM4/DQS13
DQM5/DQS14
DQM6/DQS15
DQM7/DQS16
DQM8/DQS17
MECC0
MECC1
MECC2
MECC3
MECC4
MECC5
MECC6
MECC7
CKE0
CKE1
SCL
SDA
SA0
SA1
SA2
CK0/NC
CK0#/NC
CK1/CK0
CK1#/CK0#
CK2/NC
CK2#/NC
ID_VDD
SPD_VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
POWER
POWER
DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQ8
DQ9
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
DQ16
DQ17
DQ18
DQ19
DQ20
DQ21
DQ22
DQ23
DQ24
DQ25
DQ26
DQ27
DQ28
DQ29
DQ30
DQ31
DQ32
DQ33
DQ34
DQ35
DQ36
DQ37
DQ38
DQ39
DQ40
DQ41
DQ42
DQ43
DQ44
DQ45
DQ46
DQ47
DQ48
DQ49
DQ50
DQ51
DQ52
DQ53
DQ54
DQ55
DQ56
DQ57
DQ58
DQ59
DQ60
DQ61
DQ62
DQ63
VREF
FETEN/NC
NC/RESET#
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
NC
NC
NC
NC
WP
MBA_A0 7
MBA_A1 7
MWE_A# 7
SMBCLK
SMBDAT
VCC_DDR
VCC_DDR
MA_A0
MA_A1
MA_A2
MA_A3
MA_A4
MA_A5
MA_A6
MA_A7
MA_A8
MA_A9
MA_A10
MA_A11
MA_A12
MA_A13
MBA_A0
MBA_A1
MCS_1L#0
MCS_1L#1
MRAS_A#
MCAS_A#
MWE_A#
MDQS_A0
MDQS_A1
MDQS_A2
MDQS_A3
MDQS_A4
MDQS_A5
MDQS_A6
MDQS_A7
MDQM_A0
MDQM_A1
MDQM_A2
MDQM_A3
MDQM_A4
MDQM_A5
MDQM_A6
MDQM_A7
MEM_CKEA
MA_A[13..0] 7
D D
MCS_1L#0 7
MCS_1L#1 7
MRAS_A# 7
MCAS_A# 7
MDQS_A[0..7] 7
C C
B B
A A
MDQM_A[0..7] 7
MEM_CKEA 7
SMBCLK 9,11,18,22,23,28
SMBDAT 9,11,18,22,23,28
MCLK_1L1 7
MCLK_1L#1 7
MCLK_1L0 7
MCLK_1L#0 7
MCLK_1L2 7
MCLK_1L#2 7
PURPLE
MDQ_A0
2
MDQ_A1
4
MDQ_A2
6
MDQ_A3
8
MDQ_A4
94
MDQ_A5
95
MDQ_A6
98
MDQ_A7
99
MDQ_A8
12
MDQ_A9
13
MDQ_A10
19
MDQ_A11
20
MDQ_A12
105
MDQ_A13
106
MDQ_A14
109
MDQ_A15
110
MDQ_A16
23
MDQ_A17
24
MDQ_A18
28
MDQ_A19
31
MDQ_A20
114
MDQ_A21
117
MDQ_A22
121
MDQ_A23
123
MDQ_A24
33
MDQ_A25
35
MDQ_A26
39
MDQ_A27
40
MDQ_A28
126
MDQ_A29
127
MDQ_A30
131
MDQ_A31
133
MDQ_A32
53
MDQ_A33
55
MDQ_A34
57
MDQ_A35
60
MDQ_A36
146
MDQ_A37
147
MDQ_A38
150
MDQ_A39
151
MDQ_A40
61
MDQ_A41
64
MDQ_A42
68
MDQ_A43
69
MDQ_A44
153
MDQ_A45
155
MDQ_A46
161
MDQ_A47
162
MDQ_A48
72
MDQ_A49
73
MDQ_A50
79
MDQ_A51
80
MDQ_A52
165
MDQ_A53
166
MDQ_A54
170
MDQ_A55
171
MDQ_A56
83
MDQ_A57
84
MDQ_A58
87
MDQ_A59
88
MDQ_A60
174
MDQ_A61
175
MDQ_A62
178
MDQ_A63
179
9
101
102
173
1
90
103
10
15
22
30
54
62
77
96
104
112
128
136
143
156
164
172
180
3
11
18
26
34
42
50
58
66
74
4
DDR_VREF1
C40
C40
C0.1u25Y0402
C0.1u25Y0402
VCC_DDR
MDQ_A[0..63] 7
VCC_DDR
DDR_VREF1
R34
R34
15R1%
15R1%
R42
R42
15R1%
15R1%
3
2
1
DDR Terminational Resisitors
VTT_DDR VTT_DDR
MDQ_A40
1 2
MDQ_A44
MDQ_A35
MBA_A0
MDQ_A41
MWE_A#
MDQ_A45
MRAS_A#
MDQ_A42
MDQS_A5
MDQM_A5
MDQ_A48
MDQ_A47
MDQ_A43
MDQ_A46
MA_A13
MDQ_A53
MDQ_A49
MDQ_A55
MDQS_A6
MDQ_A54
MDQM_A6
MDQ_A61
MDQ_A60
MDQ_A51
MDQ_A50
MDQ_A62
MDQM_A7
MDQ_A57
MDQ_A56
MDQ_A59
MDQ_A58
MDQ_A63
MDQS_A7
MDQ_A32
MBA_A1
MA_A10
MA_A0
MCS_1L#1
MCAS_A#
MCS_1L#0
MCLK_1L2 7
R96 120R0402 R96 120R0402
R68 120R0402 R68 120R0402
R80 120R0402 R80 120R0402
3 4
5 6
7 8
1 2
3 4
5 6
7 8
1 2
3 4
5 6
7 8
1 2
3 4
5 6
7 8
1 2
3 4
5 6
7 8
1 2
3 4
5 6
7 8
1 2
3 4
5 6
7 8
1 2
3 4
5 6
7 8
1 2
3 4
5 6
7 8
1 2
3 4
5 6
7 8
1 2
3 4
5 6
7 8
MCLK_1L#2 7
MCLK_1L#1 7 MCLK_1L1 7
MCLK_1L#0 7 MCLK_1L0 7
RN43
RN43
56R0402
56R0402
RN46
RN46
56R0402
56R0402
RN52
RN52
56R0402
56R0402
RN54
RN54
56R0402
56R0402
RN56
RN56
56R0402
56R0402
RN58
RN58
56R0402
56R0402
RN60
RN60
56R0402
56R0402
RN62
RN62
56R0402
56R0402
RN65
RN65
56R0402
56R0402
RN36
RN36
56R0402
56R0402
RN48
RN48
56R0402
56R0402
MDQ_A1
MDQ_A5
MDQ_A0
MDQ_A4
MDQ_A2
MDQ_A6
MDQS_A0
MDQM_A0
MDQ_A12
MDQ_A8
MDQ_A3
MDQ_A7
MDQM_A1
MDQS_A1
MDQ_A13
MDQ_A9
MDQ_A11
MDQ_A10
MDQ_A15
MDQ_A14 MDQ_A52
MA_A11
MDQS_A2
MDQ_A21
MDQ_A17
MDQ_A22
MDQ_A18
MA_A9
MDQM_A2
MDQ_A19
MDQ_A23
MA_A8
MA_A7
MDQ_A28
MDQ_A24
MA_A6
MA_A5
MDQ_A16
MA_A12
MDQ_A20
MEM_CKEA
MDQM_A3
MDQS_A3
MDQ_A25
MDQ_A29
MA_A1
MA_A2
MDQ_A31
MDQ_A27
MDQS_A4
MDQ_A33
MDQ_A37
MDQ_A36
MDQ_A39
MDQ_A38
MDQ_A34
MDQM_A4
MDQ_A26
MDQ_A30
MA_A3
MA_A4
1 2
3 4
5 6
7 8
1 2
3 4
5 6
7 8
1 2
3 4
5 6
7 8
1 2
3 4
5 6
7 8
1 2
3 4
5 6
7 8
1 2
3 4
5 6
7 8
1 2
3 4
5 6
7 8
1 2
3 4
5 6
7 8
1 2
3 4
5 6
7 8
1 2
3 4
5 6
7 8
1 2
3 4
5 6
7 8
1 2
3 4
5 6
7 8
1 2
3 4
5 6
7 8
1 2
3 4
5 6
7 8
1 2
3 4
5 6
7 8
RN4
RN4
56R0402
56R0402
RN6
RN6
56R0402
56R0402
RN8
RN8
56R0402
56R0402
RN11
RN11
56R0402
56R0402
RN14
RN14
56R0402
56R0402
RN18
RN18
56R0402
56R0402
RN21
RN21
56R0402
56R0402
RN25
RN25
56R0402
56R0402
RN28
RN28
56R0402
56R0402
RN16
RN16
56R0402
56R0402
RN30
RN30
56R0402
56R0402
RN34
RN34
56R0402
56R0402
RN38
RN38
56R0402
56R0402
RN40
RN40
56R0402
56R0402
RN32
RN32
56R0402
56R0402
ADDR.=1010000B
Title
Title
Title
DIMM1(CHA)
DIMM1(CHA)
DIMM1(CHA)
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
MS-7268 0A
MS-7268 0A
MS-7268 0A
Date: Sheet
Date: Sheet
5
4
3
2
Date: Sheet
1
of
10 34 Thursday, December 15, 2005
of
10 34 Thursday, December 15, 2005
of
10 34 Thursday, December 15, 2005
5
4
3
2
1
DECOUPLING CAPACITORS
DDR DIMM2
DIMM2
DIMM2
48
SIGNALS
SIGNALS
A0
43
A1
41
A2
130
A3
37
A4
32
A5
125
A6
29
A7
122
A8
27
A9
141
A10/AP
118
A11
115
A12/NC
167
A13/NC
59
BA0
52
BA1
113
NC/BA2
157
CS0#
158
CS1#
71
NC/CS2#
163
NC/CS3#
154
RAS#
65
CAS#
63
WE#
5
DQS0
14
DQS1
25
DQS2
36
DQS3
56
DQS4
67
DQS5
78
DQS6
86
DQS7
47
DQS8
97
DQM0/DQS9
107
DQM1/DQS10
119
DQM2/DQS11
129
DQM3/DQS12
149
DQM4/DQS13
159
DQM5/DQS14
169
DQM6/DQS15
177
DQM7/DQS16
140
DQM8/DQS17
44
MECC0
45
MECC1
49
MECC2
51
MECC3
134
MECC4
135
MECC5
142
MECC6
144
MECC7
21
CKE0
111
CKE1
92
SCL
91
SDA
181
SA0
182
SA1
183
SA2
16
CK0/NC
17
CK0#/NC
137
CK1/CK0
138
CK1#/CK0#
76
CK2/NC
75
CK2#/NC
82
ID_VDD
184
SPD_VDD
7
VDD
38
VDD
46
VDD
70
VDD
85
VDD
108
VDD
120
VDD
148
VDD
168
VDD
81
GND
89
GND
93
GND
100
GND
116
GND
124
GND
132
GND
139
GND
145
GND
152
GND
160
GND
176
GND
DIMM-D184-BK
DIMM-D184-BK
ADDR.=1010001B
POWER
POWER
MRAS_B# 7
MCAS_B# 7
MBA_B0 7
MBA_B1 7
MWE_B# 7
SMBCLK
SMBDAT
VCC_DDR
VCC_DDR
VCC_DDR
MA_B0
MA_B1
MA_B2
MA_B3
MA_B4
MA_B5
MA_B6
MA_B7
MA_B8
MA_B9
MA_B10
MA_B11
MA_B12
MA_B13
MBA_B0
MBA_B1
MCS_1H#0
MCS_1H#1
MRAS_B#
MCAS_B#
MWE_B#
MDQS_B0
MDQS_B1
MDQS_B2
MDQS_B3
MDQS_B4
MDQS_B5
MDQS_B6
MDQS_B7
MDQM_B0
MDQM_B1
MDQM_B2
MDQM_B3
MDQM_B4
MDQM_B5
MDQM_B6
MDQM_B7
MEM_CKEC
5
D D
C C
B B
A A
MA_B[13..0] 7
MCS_1H#0 7
MCS_1H#1 7
MDQS_B[0..7] 7
MDQM_B[0..7] 7
MEM_CKEC 7
SMBCLK ,10,18,22,23,28
SMBDAT ,10,18,22,23,28
MCLK_1H1 7
MCLK_1H#1 7
MCLK_1H0 7
MCLK_1H#0 7
MCLK_1H2 7
MCLK_1H#2 7
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
DQ16
DQ17
DQ18
DQ19
DQ20
DQ21
DQ22
DQ23
DQ24
DQ25
DQ26
DQ27
DQ28
DQ29
DQ30
DQ31
DQ32
DQ33
DQ34
DQ35
DQ36
DQ37
DQ38
DQ39
DQ40
DQ41
DQ42
DQ43
DQ44
DQ45
DQ46
DQ47
DQ48
DQ49
DQ50
DQ51
DQ52
DQ53
DQ54
DQ55
DQ56
DQ57
DQ58
DQ59
DQ60
DQ61
DQ62
DQ63
VREF
FETEN/NC
NC/RESET#
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQ8
DQ9
NC
NC
NC
NC
WP
GREEN
2
4
6
8
94
95
98
99
12
13
19
20
105
106
109
110
23
24
28
31
114
117
121
123
33
35
39
40
126
127
131
133
53
55
57
60
146
147
150
151
61
64
68
69
153
155
161
162
72
73
79
80
165
166
170
171
83
84
87
88
174
175
178
179
9
101
102
173
1
90
103
10
15
22
30
54
62
77
96
104
112
128
136
143
156
164
172
180
3
11
18
26
34
42
50
58
66
74
MDQ_B0
MDQ_B1
MDQ_B2
MDQ_B3
MDQ_B4
MDQ_B5
MDQ_B6
MDQ_B7
MDQ_B8
MDQ_B9
MDQ_B10
MDQ_B11
MDQ_B12
MDQ_B13
MDQ_B14
MDQ_B15
MDQ_B16
MDQ_B17
MDQ_B18
MDQ_B19
MDQ_B20
MDQ_B21
MDQ_B22
MDQ_B23
MDQ_B24
MDQ_B25
MDQ_B26
MDQ_B27
MDQ_B28
MDQ_B29
MDQ_B30
MDQ_B31
MDQ_B32
MDQ_B33
MDQ_B34
MDQ_B35
MDQ_B36
MDQ_B37
MDQ_B38
MDQ_B39
MDQ_B40
MDQ_B41
MDQ_B42
MDQ_B43
MDQ_B44
MDQ_B45
MDQ_B46
MDQ_B47
MDQ_B48
MDQ_B49
MDQ_B50
MDQ_B51
MDQ_B52
MDQ_B53
MDQ_B54
MDQ_B55
MDQ_B56
MDQ_B57
MDQ_B58
MDQ_B59
MDQ_B60
MDQ_B61
MDQ_B62
MDQ_B63
DDR_VREF1
C34
C34
C0.1u25Y0402
C0.1u25Y0402
VCC_DDR
MDQ_B[0..63] 7
DDR_VREF1
4
DDR Terminational Resisitors
VTT_DDR
MDQ_B44
1 2
MDQ_B40
MRAS_B#
MDQ_B45
MCS_1H#1
MDQM_B5
MDQS_B5
MDQ_B42
MDQ_B46
MDQ_B43
MDQ_B47
MDQ_B52
MDQ_B48
MDQ_B49
MDQ_B53
MDQ_B54
MDQM_B6
MDQS_B6
MDQ_B55
MDQ_B50
MDQ_B51
MDQ_B60
MDQ_B61
MDQ_B56
MDQ_B57
MDQM_B7
MDQS_B7
MDQ_B62
MDQ_B63
MDQ_B58
MDQ_B59
MA_B2
MA_B1
MA_B0
MA_B10
MDQS_B2
MA_B11
MDQM_B2
MA_B9
MDQS_B3
MDQM_B3
MA_B4
MA_B3
MWE_B#
MDQ_B41
MCS_1H#0
MCAS_B#
MCLK_1H2 7
MCLK_1H1 7
MCLK_1H0 7
R97 120R0402 R97 120R0402
R70 120R0402 R70 120R0402
R81 120R0402 R81 120R0402
3 4
5 6
7 8
1 2
3 4
5 6
7 8
1 2
3 4
5 6
7 8
1 2
3 4
5 6
7 8
1 2
3 4
5 6
7 8
1 2
3 4
5 6
7 8
1 2
3 4
5 6
7 8
1 2
3 4
5 6
7 8
1 2
3 4
5 6
7 8
1 2
3 4
5 6
7 8
1 2
3 4
5 6
7 8
1 2
3 4
5 6
7 8
MCLK_1H#2 7
MCLK_1H#1 7
MCLK_1H#0 7
RN45
RN45
56R0402
56R0402
RN51
RN51
56R0402
56R0402
RN53
RN53
56R0402
56R0402
RN55
RN55
56R0402
56R0402
RN57
RN57
56R0402
56R0402
RN59
RN59
56R0402
56R0402
RN61
RN61
56R0402
56R0402
RN64
RN64
56R0402
56R0402
RN35
RN35
56R0402
56R0402
RN20
RN20
56R0402
56R0402
RN31
RN31
56R0402
56R0402
RN49
RN49
56R0402
56R0402
MDQ_B4
MDQ_B0
MDQ_B5
MDQ_B1
MDQM_B0
MDQS_B0
MDQ_B6
MDQ_B2
MDQ_B7
MDQ_B3
MDQ_B8
MDQ_B12
MDQ_B9
MDQ_B13
MDQS_B1
MDQM_B1 MA_B13
MDQ_B14
MDQ_B15
MDQ_B10
MDQ_B11
MEM_CKEC
MDQ_B20
MA_B12
MDQ_B16
MDQ_B17
MDQ_B21
MDQ_B18
MDQ_B22
MA_B7
MA_B8
MDQ_B23
MDQ_B19
MA_B5
MA_B6
MDQ_B24
MDQ_B28
MDQ_B29
MDQ_B25
MDQ_B26
MDQ_B30
MDQ_B27
MDQ_B31
MBA_B1
MDQ_B32
MDQ_B36
MDQ_B37
MDQ_B33
MDQS_B4
MDQM_B4
MDQ_B34
MDQ_B38
MDQ_B39
MBA_B0
MDQ_B35
3
1 2
3 4
5 6
7 8
1 2
3 4
5 6
7 8
1 2
3 4
5 6
7 8
1 2
3 4
5 6
7 8
1 2
3 4
5 6
7 8
1 2
3 4
5 6
7 8
1 2
3 4
5 6
7 8
1 2
3 4
5 6
7 8
1 2
3 4
5 6
7 8
1 2
3 4
5 6
7 8
1 2
3 4
5 6
7 8
1 2
3 4
5 6
7 8
1 2
3 4
5 6
7 8
1 2
3 4
5 6
7 8
VTT_DDR
RN3
RN3
56R0402
56R0402
RN5
RN5
56R0402
56R0402
RN7
RN7
56R0402
56R0402
RN10
RN10
56R0402
56R0402
RN13
RN13
56R0402
56R0402
RN15
RN15
56R0402
56R0402
RN17
RN17
56R0402
56R0402
RN24
RN24
56R0402
56R0402
RN27
RN27
56R0402
56R0402
RN29
RN29
56R0402
56R0402
RN33
RN33
56R0402
56R0402
RN37
RN37
56R0402
56R0402
RN39
RN39
56R0402
56R0402
RN42
RN42
56R0402
56R0402
VTT_DDR
CB3
CB3
C1u6.3Y0402
C1u6.3Y0402
CB5
CB5
C0.1u25Y0402
C0.1u25Y0402
CB6
CB6
X_C0.1u25Y0402
X_C0.1u25Y0402
CB8
CB8
C1u6.3Y0402
C1u6.3Y0402
CB10
CB10
C0.1u25Y0402
C0.1u25Y0402
CB12
CB12
X_C1u6.3Y0402
X_C1u6.3Y0402
CB14
CB14
C1u6.3Y0402
C1u6.3Y0402
CB16
CB16
C0.1u25Y0402
C0.1u25Y0402
CB18
CB18
X_C0.1u25Y0402
X_C0.1u25Y0402
CB20
CB20
C1u6.3Y0402
C1u6.3Y0402
CB22
CB22
C0.1u25Y0402
C0.1u25Y0402
CB24
CB24
X_C1u6.3Y0402
X_C1u6.3Y0402
CB26
CB26
C1u6.3Y0402
C1u6.3Y0402
CB28
CB28
C0.1u25Y0402
C0.1u25Y0402
CB29
CB29
X_C0.1u25Y0402
X_C0.1u25Y0402
CB31
CB31
C1u6.3Y0402
C1u6.3Y0402
CB32
CB32
C0.1u25Y0402
C0.1u25Y0402
CB34
CB34
X_0.1u25Y0402
X_0.1u25Y0402
CB35
CB35
C1u6.3Y0402
C1u6.3Y0402
CB37
CB37
C0.1u25Y0402
C0.1u25Y0402
CB39
CB39
X_C0.1u25Y0402
X_C0.1u25Y0402
CB41
CB41
C1u6.3Y0402
C1u6.3Y0402
CB43
CB43
C0.1u25Y0402
C0.1u25Y0402
CB44
CB44
X_C0.1u25Y0402
X_C0.1u25Y0402
CB46
CB46
C1u6.3Y0402
C1u6.3Y0402
CB49
CB49
C0.1u25Y0402
C0.1u25Y0402
CB51
CB51
X_C0.1u25Y0402
X_C0.1u25Y0402
CB52
CB52
C1u6.3Y0402
C1u6.3Y0402
CB55
CB55
C0.1u25Y0402
C0.1u25Y0402
CB57
CB57
X_C1u6.3Y0402
X_C1u6.3Y0402
CB59
CB59
C1u6.3Y0402
C1u6.3Y0402
CB61
CB61
C0.1u25Y0402
C0.1u25Y0402
CB63
CB63
X_C0.1u25Y0402
X_C0.1u25Y0402
CB65
CB65
C1u6.3Y0402
C1u6.3Y0402
CB67
CB67
C0.1u25Y0402
C0.1u25Y0402
CB68
CB68
X_C0.1u25Y0402
X_C0.1u25Y0402
CB9
CB9
C1u16Y0805
C1u16Y0805
CB47
CB47
C1u16Y0805
C1u16Y0805
2
VCC_DDR
CB1
CB1
X_C1u16Y0805
X_C1u16Y0805
CB40
CB40
C1u16Y0805
C1u16Y0805
CB69
CB69
C1u16Y0805
C1u16Y0805
CB2
CB2
C102P50X0402
C102P50X0402
CB4
CB4
C0.1u25Y0402
C0.1u25Y0402
CB7
CB7
X_C1u6.3Y0402
X_C1u6.3Y0402
CB11
CB11
C1u6.3Y0402
C1u6.3Y0402
CB13
CB13
C0.1u25Y0402
C0.1u25Y0402
CB15
CB15
X_C102P50X0402
X_C102P50X0402
CB17
CB17
C1u6.3Y0402
C1u6.3Y0402
CB19
CB19
C102P50X0402
C102P50X0402
CB21
CB21
X_C0.1u25Y0402
X_C0.1u25Y0402
CB23
CB23
C1u6.3Y0402
C1u6.3Y0402
CB25
CB25
C0.1u25Y0402
C0.1u25Y0402
CB27
CB27
X_C102P50X0402
X_C102P50X0402
CB30
CB30
C1u6.3Y0402
C1u6.3Y0402
CB33
CB33
C0.1u25Y0402
C0.1u25Y0402
CB36
CB36
X_C0.1u25Y0402
X_C0.1u25Y0402
CB38
CB38
X_C102P50X0402
X_C102P50X0402
CB42
CB42
C102P50X0402
C102P50X0402
CB45
CB45
C0.1u25Y0402
C0.1u25Y0402
CB48
CB48
X_C0.1u25Y0402
X_C0.1u25Y0402
CB50
CB50
C1u6.3Y0402
C1u6.3Y0402
CB53
CB53
C0.1u25Y0402
C0.1u25Y0402
CB54
CB54
X_C1u6.3Y0402
X_C1u6.3Y0402
CB56
CB56
C1u6.3Y0402
C1u6.3Y0402
CB58
CB58
C102P50X0402
C102P50X0402
CB60
CB60
X_C0.1u25Y0402
X_C0.1u25Y0402
CB62
CB62
C1u6.3Y0402
C1u6.3Y0402
CB64
CB64
C0.1u25Y0402
C0.1u25Y0402
CB66
CB66
X_C102P50X0402
X_C102P50X0402
VTT_DDR
Title
Title
Title
DIMM2(CHB)
DIMM2(CHB)
DIMM2(CHB)
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
MS-7268 0A
MS-7268 0A
MS-7268 0A
Date: Sheet
Date: Sheet
Date: Sheet
1
of
11 34 Thursday, December 15, 2005
of
11 34 Thursday, December 15, 2005
of
11 34 Thursday, December 15, 2005