MSI MS-7267 Schematic 3.0

1
1Cover Sheet Block Diagram/Clock Map/Power Map 2-4 Intel LGA775 CPU Intel Lakeport - GMCH Intel ICH7 - PCI & DMI & CPU & IRQ
5-7
8-11
12 Intel ICH7 - LPC & ATA & USB & GPIO 13 Intel ICH7 - POWER Clock - ICS954519 LPC I/O - W83627D(E)HG Azalia - ALC883 LAN REALTEK RTL8100C/8110SB/8110SC DDR II System Memory A & B DDR II VTT Decoupling PCI EXPRESS X16 Slot PCI Slot 1 & 2 & 3
A A
ATA33/66/100 IDE & SATA Connectors VGA Connector USB Connectors ATX Connetcor & Front Panel FWH ACPI CONTROLLER MS7
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
MS-7267
CPU:
Intel Prescott ( L2=2MB ) - 3.4G & Above Intel Cendar Mill (65nm) - 3.73G & Above Intel Smithfield (90nm Dual core) Intel Conroe (65W Dual core)
System Chipset:
Intel Lakeport - GMCH (North Bridge) Intel ICH7R (South Bridge)
On Board Chipset:
BIOS -- FWH EEPROM Azalia -- ALC883 LPC Super I/O -- W83627D(E)HG LAN-- REALTEK RTL8100C Co-lay RTL8110SB\SC CLOCK -- ICS954519
Main Memory:
DDR II *2 (Max 2GB)
Expansion Slots:
PCI 2.3 SLOT * 3 PCI EXPRESS X16 SLOT
Version 3.0
VRM 11 - ISL6312CR GMCH POWER AutoBOM parts
29
30
31~34
PWM:
1
Controller: ISL6312CR 3 PHASES
MSI
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
COVER SHEET
COVER SHEET
COVER SHEET
MS-7267
MS-7267
MS-7267
1 35Thursday, July 20, 2006
1 35Thursday, July 20, 2006
1 35Thursday, July 20, 2006
3.0
3.0
3.0
Block Diagram
www.schematic-x.blogspot.com
1
VRD 11 ISL6312CR 3-Phase PWM
Analog Video Out
PCI EXPRESS
RGB
PCI EXPRESS X16
Intel LGA775 Processor
FSB 533/800/1066
133/200 /266 MHz
FSB
Lakeport GMCH
DDR2 400/533/667
DDRII
200/266 /333 MHz
2DDR II DIMM Modules
X16 Connector
DMI
UltraDMA
IDE Primary
33/66/100
A A
SATA 0~3
SATA
ICH7
USB
PCI
PCI Slot 1
PCI Slot 2
PCI Slot 3
USB Port 0~7
ALC883
Azalia
LPC Bus
Azalia
PCI
LPC SIO
RTL8100C
&8110SB&811SC
Winbond 83627D(E)HG
EEPROM
FWH
Keyboard
Mouse
1
Floopy Parallel Serial
MSI
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
BLOCK DIAGRAM
BLOCK DIAGRAM
BLOCK DIAGRAM
MS-7267
MS-7267
MS-7267
2 35Thursday, July 20, 2006
2 35Thursday, July 20, 2006
2 35Thursday, July 20, 2006
3.0
3.0
3.0
5
4
3
2
1
HCLK
LGA775
CLOCK MAP
D D
MCHCLK
Lakeport
DOTCLK96MHz
MCH
100MHZ
ICS 954519
100 MHZ
Clock Generator
SATACLK
USB48MHz
ICH7
ICH14.318MHz
C C
FWH_PCLK
33 MHZ
SIO48MHz
33 MHZ
33MHz
Winbon LPC IO
FWH
CHANNEL A CHANNEL A #
DIMM A&B
CHANNEL B CHANNEL B#
B B
PCI_LAN
33MHz
REALTEK 8100C
25MHz
&8110SB&811SC
PCI_E1PCI_E1_100MHz PCI-Express X 16
PCI1
A A
5
33MHzPCICLK[0..2]
4
PCI2
PCI3
MSI
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
3
2
Date: Sheet of
CLOCK MAP
CLOCK MAP
CLOCK MAP
MS-7267
MS-7267
MS-7267
1
3 35Thursday, July 20, 2006
3 35Thursday, July 20, 2006
3 35Thursday, July 20, 2006
3.0
3.0
3.0
5
POWER MAP
4
3
2
1
D D
C C
B B
ATX POWER
+12V +5V +3.3V +5VSB
25A 15A25.5A
MSI
2A
ACPI Controller
5VDIMM VCC_DDR
MS - 7
8.58A
VR
15.3+1.31+6.2 = 22.81
V_1P5_CORE
19A
MSI
MS6 +
W83310DS
4+5+1.2 = 10.2A10.2*1.8/5/0.8 = 4.59A
1.2A
15.3A
PCI_E
937.5mA
6.5A 5A
12.1A
125A 5.3A
LGA775VRM 10.1
PCI1
Lakeport
4A
GMCH
13.8A + 1.5A = 15.3A
5A
VTT_DDR
DDR2 X 2
1.2A
1.71mA
PCI2
0.9A
PCI3
6.2A
VR
1.31A
V_FSB_VTT
V_1P05_CORE
VR
6.2A
1.31A
0.7A
ICH7
14mA
VLAN25
REALTEK 8100C
VCC3_SB
A A
5VDUAL
5
1.5A
4.345A
&8110SB&811SC
MSI
4.345A
USB+PS2
4
3
2
Title
Title
Title
POWER MAP
POWER MAP
POWER MAP
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
VLAN12
MS-7267
MS-7267
MS-7267
4 35Thursday, July 20, 2006
4 35Thursday, July 20, 2006
4 35Thursday, July 20, 2006
1
3.0
3.0
3.0
8
D D
H_DBI#[0..3]8
H_IERR#6
H_FERR#6,12
H_STPCLK#12
H_DBSY#8
H_DRDY#8
H_TRDY#8
C C
VTT_OUT_LEFT
H_CPUSLP#12
VTT_OUT_RIGHT
B B
X_C0.1U25Y
X_C0.1U25Y
C388
C388
A A
H_ADS#8
H_LOCK#8
H_BNR#8 H_HITM#8 H_DEFER#8
CPU_TMPA16 VTIN_GND16
TRMTRIP#6,12
H_PROCHOT#6
H_IGNNE#12
ICH_H_SMI#12
R381 62R0402R381 62R0402
R382 0RR382 0R
R385 X_1KR-1R385 X_1KR-1
H_FSBSEL06,15 H_FSBSEL16,15 H_FSBSEL26,15
H_PWRGD6,12
H_CPURST#6,8
H_D#[0..63]8
H_DBI#0 H_DBI#1 H_DBI#2 H_DBI#3 CPU_GTLREF0
TP8TP8
H_INIT#12
H_HIT#8
H_BPRI#8
H_TDI H_TDO H_TMS H_TRST# H_TCK
H_A20M#12
H_TESTHI13
TP11TP11 TP12TP12
H_D#63 H_D#62 H_D#61 H_D#60 H_D#59 H_D#58 H_D#57 H_D#56 H_D#55 H_D#54
A8 G11 D19 C20
F2 AB2 AB3
R3
M3
AD3
P3
H4
B2
C1
E3
D2
C3
C2
D4
E4
G8 G7
AD1 AF1 AC1 AG1 AE1 AL1 AK1
M2 AE8 AL2
N2 P2 K3 L2
AH2
N5
AE6
C9 G10 D16 A20
Y1
V2 AA2
G29 H30 G30
N1 G23 B22
A22 A19 B19 B21 C21 B18 A17 B16 C18
7
U22A
U22A
DBI0# DBI1# DBI2# DBI3#
EDRDY# IERR# MCERR# FERR#/PBE# STPCLK# BINIT# INIT# RSP#
DBSY# DRDY# TRDY#
ADS# LOCK# BNR# HIT# HITM# BPRI# DEFER#
TDI TDO TMS TRST# TCK THERMDA THERMDC THERMTRIP# GND/SKTOCC# PROCHOT# IGNNE# SMI# A20M# TESTI_13
RSVD RESERVED0 RESERVED1 RESERVED2 RESERVED3 RESERVED4 RESERVED5
BOOTSELECT LL_ID0 LL_ID1
BSEL0 BSEL1 BSEL2
PWRGOOD RESET# D63#
D62# D61# D60# D59# D58# D57# D56# D55# D54#
H_A#[3..31]8
B15
H_D#53
D53#
D52#
C14
H_D#52
D51#
A14
C15
H_D#50
H_D#51
CPU SIGNAL BLOCK
H_A#29
H_A#30
H_A#31
AJ6
AJ5
AH5
AH4
AG5
AG4
A35#
A34#
A33#
A32#
A31#
A30#
D50#
D49#
D48#
D47#
D46#
D45#
D44#
D43#
F21
E22
D17
D20
D22
G22
G21
H_D#42
H_D#46
H_D#48
H_D#49
H_D#44
H_D#47
H_D#43
H_D#45
AG6
A29#
D42#
E21
H_A#28
H_A#27
AF4
AF5
A28#
D41#
F20
E19
H_D#41
H_D#40
H_A#26
AB4
A27#
A26#
D40#
D39#
E18
H_D#39
H_A#25
H_A#24
AC5
AB5
A25#
D38#
F18
F17
H_D#37
H_D#38
H_A#23
AA5
A24#
A23#
D37#
D36#
G17
H_D#36
6
H_A#22
H_A#21
AD6
A22#
D35#
G18
H_D#35
H_D#34
H_A#20
AA4
A21#
A20#Y4A19#Y6A18#W6A17#
D34#
D33#
E16
E15
H_D#33
H_A#18
H_A#19
D32#
G16
G15
H_D#32
H_D#31
H_A#17
AB6
D31#
D30#
F15
H_D#30
H_A#12
H_A#13
H_A#14
H_A#16
H_A#15
H_A#11
A16#W5A15#V4A14#V5A13#U4A12#U5A11#T4A10#
D29#
D28#
D27#
D26#
D25#
D24#
F14
F12
E13
D13
G14
G13
H_D#24
H_D#27
H_D#28
H_D#26
H_D#25
H_D#29
H_A#6
H_A#7
H_A#8
H_A#10
H_A#9
U6
A9#T5A8#R4A7#M4A6#L4A5#M5A4#P6A3#
D23#
D22#
D21#
D20#D7D19#E9D18#F9D17#F8D16#G9D15#
F11
E10
D10
H_D#21
H_D#22
H_D#19
H_D#20
H_D#23
H_A#4
H_A#5
H_D#18
H_D#17
H_A#3
L5
D11
H_D#16
H_D#15
5
AC2
DBR#
D14#
B12
C12
H_D#13
H_D#14
AN3
AN4
VCC_SENSE
D13#
D12#D8D11#
C11
H_D#12
H_D#11
R367 0RR367 0R
R369 0RR369 0R
VID7
AN5
AN6
AJ3
AK3
AM7
RSVD
ITP_CLK1
ITP_CLK0
VSS_SENSE
VSS_MB_REGULATION
VCC_MB_REGULATION
D10#
D9#
D8#
D7#A7D6#B7D5#B6D4#A5D3#C6D2#A4D1#C5D0#
B10
A11
A10
H_D#6
H_D#8
H_D#5
H_D#10
H_D#4
H_D#7
H_D#9
VID5
VID6
AM5
VID6#
H_D#2
H_D#3
AL4
VID5#
VID4
AK4
VID_SELECT
GTLREF_SEL
CS_GTLREF
H_D#1
VCC_VRM_SENSE
VSS_VRM_SENSE
VID0
VID2
VID3
VID1
AL6
AM3
AL5
AM2
VID4#
VID3#
VID2#
VID1#
VID0#
GTLREF0 GTLREF1
BPM5# BPM4# BPM3# BPM2# BPM1# BPM0#
PCREQ#
REQ4# REQ3# REQ2# REQ1# REQ0#
TESTHI12 TESTHI11 TESTHI10
TESTHI9 TESTHI8 TESTHI7 TESTHI6 TESTHI5 TESTHI4 TESTHI3 TESTHI2 TESTHI1 TESTHI0
FORCEPH
RSVD
BCLK1# BCLK0#
RS2# RS1# RS0#
AP1# AP0#
BR0# COMP5 COMP4 COMP3 COMP2 COMP1 COMP0
DP3#
DP2#
DP1#
DP0#
ADSTB1# ADSTB0# DSTBP3# DSTBP2# DSTBP1# DSTBP0# DSTBN3# DSTBN2# DSTBN1# DSTBN0#
LINT1/NMI
LINT0/INTR
ZIF-SOCK775-15u-in
ZIF-SOCK775-15u-in
B4
H_D#0
4
VID7 29 VID6 29 VID5 29 VID4 29 VID3 29 VID2 29 VID1 29 VID0 29
R328 1KRR328 1KR
R374 X_62R-1R374 X_62R-1
AN7 H1 H2 H29 E24 AG3 AF2 AG2 AD2 AJ1 AJ2
G5 J6 K6 M6 J5 K4
H_TESTHI12
W2
H_TESTHI11
P1
H_TESTHI10
H5
H_TESTHI9
G4
H_TESTHI8
G3 F24 G24 G26 G27 G25 F25 W3 F26 AK6 G6
G28 F28
A3 F5 B3
U3 U2 F3 T2 J2 R1 G2 T1 A13
J17 H16 H15 J16
AD5 R6 C17 G19 E12 B9 A16 G20 G12 C8 L1 K1
VCCP
CPU_GTLREF1 TP_GTLREF_SEL
MCH_GTLREF_CPU H_BPM#5 H_BPM#4 H_BPM#3 H_BPM#2 H_BPM#1 H_BPM#0
H_REQ#4 H_REQ#3 H_REQ#2 H_REQ#1 H_REQ#0
H_TESTHI2_7 H_TESTHI1 H_TESTHI0 RSVD_AK6 RSVD_G6
H_RS#2 H_RS#1 H_RS#0
TP9TP9 TP10TP10
H_COMP5 H_COMP4 H_COMP3 H_COMP2 H_COMP1 H_COMP0
R366
R366 X_0R-1
X_0R-1
R371
R371 X_0R-1
X_0R-1
VTT_OUT_RIGHT
R331 1KRR331 1KR
H_REQ#[0..4] 8
RN50 8P4R-51R-LFRN50 8P4R-51R-LF
1 2 3 4 5 6 7 8
R375 51R-1R375 51R-1
R376 51R-1R376 51R-1 R377 51R-1R377 51R-1 R378 51R-1R378 51R-1 R379 X_62R-1R379 X_62R-1 R380 X_51R-1R380 X_51R-1
CK_H_CPU# 15 CK_H_CPU 15
H_RS#[0..2] 8
R475 49.9R1%-1R475 49.9R1%-1 R458 49.9R1%-1R458 49.9R1%-1 R386 49.9R1%-1R386 49.9R1%-1 R387 49.9R1%-1R387 49.9R1%-1 R388 49.9R1%-1R388 49.9R1%-1 R389 49.9R1%-1R389 49.9R1%-1
TP13TP13 TP14TP14 TP15TP15 TP16TP16
H_ADSTB#1 8 H_ADSTB#0 8 H_DSTBP#3 8 H_DSTBP#2 8 H_DSTBP#1 8 H_DSTBP#0 8 H_DSTBN#3 8 H_DSTBN#2 8 H_DSTBN#1 8
H_DSTBN#0 8 H_NMI 12 H_INTR 12
VCC_VRM_SENSE 29 VSS_VRM_SENSE 29
FOR CONROE-L
VID_SEL
CPU_GTLREF0 6 CPU_GTLREF1 6
TP18TP18
MCH_GTLREF_CPU 8
PECI
VTT_OUT_LEFT
V_FSB_VTT
3
VID_SEL 29
PECI 16
VTT_OUT_RIGHT 6,7
VTT_OUT_LEFT 6
C389
C389
X_C0.1U25Y
X_C0.1U25Y
H_BR#0 6,8
VTT_OUT_RIGHT
C390
C390
X_C1U10X
X_C1U10X
2
BSEL
1
02
TABLE
FSB FREQUENCY
1
0 0 0 266 MHZ (1066) 0
01 200 MHZ (800) 1
0 0 133 MHZ (533)
Prescott / Cedar Mill LL_ID[1:0] = 00 GTLREF_SEL = 0 VTT_SEL = 1
RN51
RN51
8P4R-680R-LF
8P4R-680R-LF
VID5
1
VID4
3
VID2
5
VID0
7
VID7
1
VID3
3
VID1
5
VID6
7
RN54 8P4R-680R-LFRN54 8P4R-680R-LF
RN52 8P4R-51R-LFRN52 8P4R-51R-LF
1 2 3 4 5 6 7 8 1 2 3 4 5 6 7 8
RN53 8P4R-51R-LFRN53 8P4R-51R-LF
R392 51R-1R392 51R-1 R393 51R-1R393 51R-1 R394 51R-1R394 51R-1
PLACE BPM/TCK/TDI/TMS TERMINATION NEAR CPU
PLACE TDO TERMINATION NEAR CONNECTOR
2 4 6 8 2 4 6 8
VTT_OUT_RIGHT
H_BPM#3 H_BPM#5 H_BPM#0 H_BPM#1 H_TMS H_BPM#2 H_TDI H_BPM#4
H_TDO
H_TRST#
H_TCK
MSI
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
8
7
6
5
4
3
Date: Sheet of
Intel LGA775 CPU - Signals
Intel LGA775 CPU - Signals
Intel LGA775 CPU - Signals
2
MS-7267
MS-7267
MS-7267
3.0
3.0
5 35Thursday, July 20, 2006
5 35Thursday, July 20, 2006
5 35Thursday, July 20, 2006
1
3.0
8
VCCP
AG21
AG19
AG18
AG15
AG14
AG12
AG11
AF9
AF8
AF22
AF21
U22B
AF19 AF18 AF15 AF14 AF12 AF11
AE23 AE22 AE21 AE19 AE18 AE15 AE14 AE12 AE11
AD30 AD29 AD28 AD27 AD26 AD25 AD24 AD23
AC30 AC29 AC28 AC27 AC26 AC25 AC24 AC23
U22B
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC VCC VCC VCC VCC VCC
AE9
VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC
AD8
VCC VCC VCC VCC VCC VCC VCC VCC VCC
AC8
VCC VCC VCC VCC VCC VCC VCC VCC VCC
AB8
VCC
AA8
VCC
VCC
VCCW8VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCCP
Y8
Y30
Y23
Y24
Y25
Y26
Y27
Y28
Y29
W30
VCCP
D D
C C
AG22
VCC
VCC
W29
AG25
VCC
VCC
W28
AG26
VCC
VCC
W27
AG27
VCC
VCC
W26
AG28
VCC
VCC
W25
AG29
VCC
VCC
W24
7
AG30
VCC
W23
6
AH27
AH26
AH25
AH22
AH21
AH19
AH18
AH15
AH14
AH12
AH11
AG9
AG8
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCCU8VCCV8VCC
U26
U27
U28
U29
U30
VCC
VCC
AH28
AH29
AH30
AH8
AH9
AJ11
AJ12
AJ14
AJ15
AJ18
AJ19
AJ21
AJ22
AJ25
AJ26
AJ8
AJ9
AK11
AK12
AK14
AK15
AK18
AK19
AK21
AK22
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCCM8VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCCN8VCCP8VCCR8VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCCT8VCC
VCC
VCC
T23
T24
T25
T26
T27
T28
T29
T30
U23
U24
U25
N30
N23
N24
N25
N26
N27
N28
N29
M24
M25
M26
M27
M28
M29
M30
VCC
VCC
AK25
M23
VCC
AK26
VCC
5
AK8
AK9
AL11
AL12
AL14
AL15
AL18
AL19
AL21
AL22
AL25
AL26
AL29
AL30
AL8
AL9
AM11
AM12
AM14
AM15
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCCJ8VCCJ9VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCCK8VCCL8VCC
J22
J23
J24
J25
J26
J27
J28
J29
J30
K23
K24
K25
K26
K27
K28
K29
K30
VCC
VCC
AM18
VCC
VCC
J21
AM19
VCC
VCC
J20
AM21
J19
VCC
VCC
AM22
VCC
VCC
J18
AM25
VCC
VCC
J15
AM26
J14
VCC
VCC
4
AM29
VCC
VCC
J13
AM30
VCC
VCC
J12
AM8
J11
VCC
VCC
AM9
J10
AN11
VCC
VCC
AN9
VCC
VCC
AN12
VCC
VCC
AN8
AN14
AN30
AN15
AN18
AN19
AN21
VCC
VCC
VCC
VCC
VCC
VTTPWRGD
VTT_OUT_RIGHT
VTT_OUT_LEFT
VCC
VCC
VCC
VCC
AN25
AN26
AN29
AN22
VCC
VCCA VSSA
VCCPLL
VCC-IOPLL
VTT_SEL
RSVD
HS11HS22HS33HS4
A23 B23 D23 C23
A25
VTT
A26
VTT
A27
VTT
A28
VTT
A29
VTT
A30
VTT
B25
VTT
B26
VTT
B27
VTT
B28
VTT
B29
VTT
B30
VTT
C25
VTT
C26
VTT
C27
VTT
C28
VTT
C29
VTT
C30
VTT
D25
VTT
D26
VTT
D27
VTT
D28
VTT
D29
VTT
D30
VTT
AM6 AA1
J1 F27
F29
ZIF-SOCK775-15u-in
ZIF-SOCK775-15u-in
4
3
H_VCCA H_VSSA H_VCCPLL H_VCCA
VTT_PWG VTT_OUT_RIGHT
VTT_OUT_LEFT
VCCA ------ 120mA VCCIOPLL -- 100mA
FOR CONROE-L
R352
R352 X_1KR-1
X_1KR-1
V_FSB_VTT
R351X_1KR-1 R351X_1KR-1
01TEJ/PSC
RSVD
VCC3
2
V_FSB_VTT
C377 C10U10Y0805C377 C10U10Y0805 C378 C10U10Y0805C378 C10U10Y0805 C379 C10U10Y0805C379 C10U10Y0805
1
CAPS FOR FSB GENERIC
VTT_OUT_RIGHT
GTLREF VOLTAGE SHOULD BE
0.63*VTT = 0.756V
VTT_OUT_RIGHT
B B
VTT_OUT_RIGHT5,7
VTT_OUT_LEFT5
A A
VCC3 VCC5
X_C1U10Y
X_C1U10Y
C386
C386
C0.1U25Y
C0.1U25Y
R353 124R1%-LFR353 124R1%-LF
R484 124R1%-LFR484 124R1%-LF
VTT_OUT_RIGHT
C384
C384
8
R354 10RR354 10R
R355
R355 210R1%-1
210R1%-1
R485
R485 210R1%-1
210R1%-1
C380
C380 C1U10Y
C1U10Y
C487
C487 C1U10Y
C1U10Y
R476 10RR476 10R
C381
C381 X_C220P50N-1
X_C220P50N-1
C488
C488 X_C220P50N-1
X_C220P50N-1
PLACE AT CPU END OF ROUTE
R357 130R1%-1R357 130R1%-1 R358 62R-1R358 62R-1
R361 62R-1R361 62R-1
R362 X_100R-1R362 X_100R-1
VTT_OUT_RIGHT H_IERR#
R363 62R-1R363 62R-1
H_CPURST#
H_BR#0
H_PWRGDVTT_OUT_LEFT
PLACE AT ICH END OF ROUTE
V_FSB_VTT
R364 62R-1R364 62R-1 R365 62R-1R365 62R-1
TRMTRIP# H_FERR#
7
H_PROCHOT# 5 H_CPURST# 5,8
H_BR#0 5,8 H_PWRGD 5,12
H_IERR# 5VTT_OUT_RIGHT5,7
TRMTRIP# 5,12 H_FERR# 5,12
CPU_GTLREF0 5
CPU_GTLREF1 5
6
V_FSB_VTT
CP19 X_COPPERCP19 X_COPPER
VTT_OUT_LEFT
VCC5_SB
VID_GD#15,28,29
FSBSEL RESISTOR CAN BE REMOVED IF ONLY TEJAS AND CEDAR MILL ARE SUPPORTED
5
R359
R359 1KR
1KR
R360 10KR-1R360 10KR-1
V_FSB_VTT
R356 680R-1R356 680R-1
R391 470R-1R391 470R-1 R401 470R-1R401 470R-1 R407 470R-1R407 470R-1
H_FSBSEL1
H_FSBSEL2 H_FSBSEL0
PLACE COMPONENTS AS CLOSE AS POSSIBLE TO PROCESSOR SOCKET TRACE WIDTH TO CAPS MUST BE SMALLER THAN 12MILS
L14 X_10U125m_0805-1L14 X_10U125m_0805-1 L15 X_10U125m_0805-1L15 X_10U125m_0805-1
VTT_PWGH_PROCHOT#
Q47
Q47
N-MMBT3904_NL_SOT23
N-MMBT3904_NL_SOT23
H_FSBSEL1 5,15 H_FSBSEL2 5,15 H_FSBSEL0 5,15
4
C385
C385 X_C1U10Y
X_C1U10Y
C382
C382
C10U10Y0805
C10U10Y0805
VTT_PWG SPEC : High > 0.9V Low < 0.3V Trise < 150ns
3
C383
C383 C10U10Y1206
C10U10Y1206
H_VCCA
H_VSSA
V_1P5_CORE
CP20
CP20
X_COPPER
X_COPPER
MSI
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
2
H_VCCPLL
C392
C392
C10U10Y0805
C10U10Y0805
Intel LGA775 CPU - Power
Intel LGA775 CPU - Power
Intel LGA775 CPU - Power
MS-7267
MS-7267
MS-7267
C393
C393
C1U10Y
C1U10Y
6 35Thursday, July 20, 2006
6 35Thursday, July 20, 2006
6 35Thursday, July 20, 2006
1
3.0
3.0
3.0
8
7
6
5
4
3
2
1
VTT_OUT_RIGHT5,6
D D
VTT_OUT_RIGHT
R349
R349
49.9R1%-1
49.9R1%-1
H_COMP7
H_COMP6
R350
R350
49.9R1%-1
49.9R1%-1
TP5TP5
R390
30R
30R
51R-1
51R-1
TP4TP4
TP3TP3
H_COMP8
51R-1
51R-1
51R-1
51R-1
CP31 X_COPPERCP31 X_COPPER
R348
R348
R347
R347
R372
R372
R390
FOR CONROE-L
H17
H18
H19
H20
H21
H22
H23
H24
H25
H26
H27
VSS
H28
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSSH3VSSH6VSSH7VSSH8VSSH9VSSJ4VSSJ7VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSSB1VSS
AN1
AN2
AN10
AN13
AN16
AN17
AN20
AN23
AN24
AN27
AN28
B11
VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS
VSS
ZIF-SOCK775-15u-in
ZIF-SOCK775-15u-in
B14
H14 H13 H12 H11 H10 G1 F7 F4 F22 F19 F16 F13 F10 E8 E29 E28 E27 E26 E25 E20 E2 E17 E14 E11 D9 D6 D5 D3 D24 D21 D18 D15 D12 C7 C4 C24 C22 C19 C16 C13 C10 B8 B5 B24 B20 B17
CP32 X_COPPERCP32 X_COPPER
CP33 X_COPPERCP33 X_COPPER
VSS
VSS
L26
AM13
VSS
VSS
L25
VSS
VSS
AM16
L24
VSS
VSS
AM17
L23
VSS
VSS
AM20
VSSK7VSS
VSS
AM23
K5
VSS
AM24
K2
VSS
AM27
VSS
AM28
AM4
AE3
AE4
D14
E23
F23
F6
B13
P5
W1
RSVDJ3RSVDN4RSVD
VSS
VSS
AF3
AF30
VSS
AF6
VSS
VSS
AF7
AG10
AC4
RSVD
MSID[1]V1MSID[0]
VSS
VSS
VSS
AG13
AG16
AG17
VSS
AG20
VSS
AG23
U22C
U22C
RSVD
RSVDD1RSVD
RSVD
RSVDE5RSVDE6RSVDE7RSVD
AF17
VSS
AF20
VSS
AF23
VSS
AF24
VSS
VSS
AF25
RSVD
IMPSEL#
VSS
VSS
AF26
AF27
AF28
VSS
AF29
A12 A15 A18
AA23 AA24 AA25 AA26 AA27 AA28 AA29
AA30
AB23 AB24 AB25 AB26 AB27 AB28 AB29 AB30
AE10 AE13 AE16 AE17
AE20 AE24 AE25 AE26 AE27 AE28
A21 A24
AA3 AA6
AA7 AB1
AB7 AC3 AC6 AC7 AD4 AD7
AE2
CP34 X_COPPERCP34 X_COPPER
C C
B B
COMP6Y3COMP7
VSS VSS VSS
A2
VSS VSS VSS
A6
VSS
A9
VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
AE5
AE7
AF10
AF13
AF16
AE29
AE30
V30
VSSY7VSSY5VSSY2VSSW7VSSW4VSSV7VSSV6VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
AH1
AG7
AH10
AH13
AH16
AH17
AG24
VSSV3VSS
VSS
AH20
V29
AH23
VSS
V28
VSS
VSS
AH24
V27
V26
VSS
VSS
VSS
VSS
AH3
AH6
V25
V24
V23
VSS
VSS
VSS
VSSU7VSSU1VSST7VSST6VSST3VSSR7VSSR5VSS
VSS
VSS
VSS
VSS
AH7
AJ10
AJ13
AJ16
AJ17
VSS
AJ20
VSS
AJ23
VSS
AJ24
VSS
AJ27
VSS
AJ28
VSS
R30
AJ29
VSS
R29
AJ30
VSS
VSS
R28
R27
R26
R25
R24
R23
P30
P29
P28
P27
P26
P25
P24
P23
VSS
VSS
VSS
VSS
VSS
VSS
VSSR2VSSP7VSSP4VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
AJ4
AJ7
AK10
AK13
AK16
AK17
AK2
AK20
AK23
AK24
AK27
AK28
AK29
AK30
AK5
AK7
AL10
AL13
L30
VSSN7VSSN6VSSN3VSSM7VSSM1VSSL7VSSL6VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
AL16
AL17
AL20
AL23
AL24
AL27
AL28
VSSL3VSS
VSS
AL3
L29
L28
L27
VSS
VSS
VSS
AL7
AM1
AM10
R409 X_1KRR409 X_1KR
FOR CONROE-L
A A
MSI
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
8
7
6
5
4
3
Date: Sheet of
Intel LGA775 CPU - GND
Intel LGA775 CPU - GND
Intel LGA775 CPU - GND
2
MS-7267
MS-7267
MS-7267
3.0
3.0
7 35Thursday, July 20, 2006
7 35Thursday, July 20, 2006
7 35Thursday, July 20, 2006
1
3.0
8
H_A#[3..31]5
D D
H_ADSTB#05 H_ADSTB#15
H_REQ#[0..4]5
H_LOCK#5
H_RS#[0..2]5
H_BR#05,6
H_BPRI#5
H_BNR#5
H_ADS#5
H_HIT#5 H_HITM#5 H_DEFER#5
H_TRDY#5 H_DBSY#5
H_DRDY#5
CK_H_MCH15
CK_H_MCH#15
PWRGD_3V13,28
H_CPURST#5,6
ICH_SYNC#
MCH_GTLREF_CPU
TP2TP2
HXRCOMP HXSCOMP HXSWING
C C
B B
PLTRST#12,16,27
ICH_SYNC#13
R338 16.9R1%-LFR338 16.9R1%-LF
7
N17
P17
P18
P20
P21
AA22
AB21
AB22
AB23
AC22
VCC
VCC
RSVRD
AA35
VCC
RSVRD
AA42
VCC
RSVRD
AA34
VCC
RSVRD
AA38
VCC
RSVRD
L15
VCC
RSVRD
M15
AD14
VCC
RSVRD
U27
U21A
AA37
AA41
W42
W41
W40
AJ12
K38 K35 M34
N35 R33 N32 N34 M38 N42 N37 N38 R32 R36 U37 R35 R38 V33 U34 U32 V42 U35 Y36 Y38
V32 Y34
M36 V35
F38
D42 U39 U40
E41 D41 K36 G37 E42
U41 P40
U42 V41 Y40
T40 Y43 T43
M31 M29
AJ9 C30
M18
A28 C27 B27
D27 D28
J39 J42 J37
U21A
HA3# HA4# HA5# HA6# HA7# HA8# HA9# HA10# HA11# HA12# HA13# HA14# HA15# HA16# HA17# HA18# HA19# HA20# HA21# HA22# HA23# HA24# HA25# HA26# HA27# HA28# HA29# HA30# HA31#
HAD_STB0# HAD_STB1# HPCREQ#
HBREQ0# HBPRI#
HBNR# HLOCK# HADS# HREQ0#
HREQ1# HREQ2# HREQ3# HREQ4#
HHIT# HHITM# HDEFER#
HTRDY# HDBSY# HDRDY# HEDRDY#
RS0# RS1# RS2#
HCLKP HCLKN
PWROK HCPURST#
RSTIN# ICH_SYNC#
HRCOMP HSCOMP HSWING
HDVREF HACCVREF
VCC
VCC
VCC
H_A#3 H_D#0 H_A#4 H_A#5 H_A#6 H_A#7 H_A#8 H_A#9 H_A#10 H_A#11 H_A#12 H_A#13 H_A#14 H_A#15 H_A#16 H_A#17 H_A#18 H_A#19 H_A#20 H_A#21 H_A#22 H_A#23 H_A#24 H_A#25 H_A#26 H_A#27 H_A#28 H_A#29 H_A#30 H_A#31
H_REQ#0 H_REQ#1 H_REQ#2 H_REQ#3 H_REQ#4
H_RS#0 H_RS#1 H_RS#2
AF6
VCC
RSVRD
R27
AF7
VCC
RSVRD
A43
AF8
VCC
RSVRD
M11
AF9
VCC
RSVRD
AG25
AF10
VCC
RSVRD
AG26
AF11
VCC
RSVRD
AG27
6
AF12
VCC
RSVRD
AJ24
AF13
VCC
RSVRD
AJ27
AF14
VCC
RSVRD
AK40
AF30
VCC
RSVRD
AL39
AG2
VCC
RSVRD
AW17
AG3
VCC
RSVRD
AW18
AG4
VCC
RSVRD
AY14
V_1P5_CORE
AG5
AG6
AG7
AG8
VCC
VCC
VCC
VCC
RSVRD
RSVRD
RSVRD
RSVRD
Y30
BC16
AD30
AC34
AG9
VCC
RSVRD
Y33
AG10
VCC
RSVRD
AF31
AG11
VCC
RSVRD
AD31
AG12
VCC
RSVRD
U30
AG13
AG14
VCC
RSVRD
V31
AA30
AH1
VCC
VCC
RSVRD
RSVRD
AC30
AH2
VCC
RSVRD
AK21
AH4
VCC
RSVRD
AJ23
AJ5
VCC
RSVRD
AJ26
AJ13
VCC
RSVRD
AL29
5
AJ14
AK2
VCC
RSVRD
AJ21
AL20
AK3
VCC
VCC
RSVRD
RSVRD
AL26
AK4
VCC
RSVRD
AK27
AK14
VCC
RSVRD
AJ29
AK15
VCC
RSVRD
AG29
AK20
VCC
RSVRD
V30
R15
VCC
R17
R18
VCC
VCC
NC
BC43NCBC42
R20
VCC
NC
BC2NCBC1
4
R21
R23
R24
U15
U17
U18
U19
U20
U21
U22
U23
U24
U25
U26
V15
V17
V18
V19
V20
V21
V22
V23
V25
V27
W17
W18
W19
W20
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
NC
NC
NC
NC
NC
NC
NC
NCC2NC
NCB3NCB2NC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
E35
B43NCB42NCB41
A42
Y17
Y18
Y19
Y21
Y23
Y25
BB43
BB2NCBB1NCBA2
AW26
AW2
AV27NCAV26
C42
Y27
AA15
AA17
W22
AA18
VCC
VCC
W24
AA19
VCC
VCC
W26
VCC
VCC
AA20
W27
Y15
VCC
VCC
HD_STBP0# HD_STBN0#
HD_STBP1# HD_STBN1#
HD_STBP2# HD_STBN2#
HD_STBP3# HD_STBN3#
3
M17
HD0# HD1#
VCC
HD2# HD3# HD4# HD5# HD6# HD7# HD8#
HD9# HD10# HD11# HD12# HD13# HD14# HD15# HD16# HD17# HD18# HD19# HD20# HD21# HD22# HD23# HD24# HD25# HD26# HD27# HD28# HD29# HD30# HD31# HD32# HD33# HD34# HD35# HD36# HD37# HD38# HD39# HD40# HD41# HD42# HD43# HD44# HD45# HD46# HD47# HD48# HD49# HD50# HD51# HD52# HD53# HD54# HD55# HD56# HD57# HD58# HD59# HD60# HD61# HD62# HD63#
KDINV_0# HDINV_1# HDINV_2# HDINV_3#
Lakeport
Lakeport
V_1P5_CORE
P41
H_D#1
M39
H_D#2
P42
H_D#3
M42
H_D#4
N41
H_D#5
M40
H_D#6
L40
H_D#7
M41
H_D#8
K42
H_D#9
G39
H_D#10
J41
H_D#11
G42
H_D#12
G40
H_D#13
G41
H_D#14
F40
H_D#15
F43
H_D#16
F37
H_D#17
E37
H_D#18
J35
H_D#19
D39
H_D#20
C41
H_D#21
B39
H_D#22
B40
H_D#23
H34
H_D#24
C37
H_D#25
J32
H_D#26
B35
H_D#27
J34
H_D#28
B34
H_D#29
F32
H_D#30
L32
H_D#31
J31
H_D#32
H31
H_D#33
M33
H_D#34
K31
H_D#35
M27
H_D#36
K29
H_D#37
F31
H_D#38
H29
H_D#39
F29
H_D#40
L27
H_D#41
M24
H_D#42
J26
H_D#43
K26
H_D#44
G26
H_D#45
H24
H_D#46
K24
H_D#47
F24
H_D#48
E31
H_D#49
A33
H_D#50
E40
H_D#51
D37
H_D#52
C39
H_D#53
D38
H_D#54
D33
H_D#55
C35
H_D#56
D34
H_D#57
C34
H_D#58
B31
H_D#59
C31
H_D#60
C32
H_D#61
D32
H_D#62
B30
H_D#63
D30 K40
A38 E29 B32
K41 L43
F35 G34
J27 M26
E34 B37
H_DBI#0 H_DBI#1 H_DBI#2 H_DBI#3
H_DSTBP#0 5 H_DSTBN#0 5
H_DSTBP#1 5 H_DSTBN#1 5
H_DSTBP#2 5 H_DSTBN#2 5
H_DSTBP#3 5 H_DSTBN#3 5
2
H_D#[0..63] 5
1
H_DBI#[0..3] 5
R339
V_FSB_VTT
A A
R339
60.4R1%-1
60.4R1%-1
HXSCOMP
C373
C373 X_C2.2P50N
X_C2.2P50N
V_FSB_VTT
HD_SWING VOLTAGE "10 MIL TRACE , 7 MIL SPACE" HD_SWING S/B 1/3*VTT +/- 2%
PLACE DIVIDER RESISTOR NEAR VTT
R341
R341
301R1%-1
301R1%-1
84.5R1%-LF
84.5R1%-LF C376
R345
R345
R343 62R-1R343 62R-1
HXSWING
C376 C0.1U25Y
C0.1U25Y
V_FSB_VTT
R340
R340 124R1%-LF
124R1%-LF
R344
R344 210R1%-1
210R1%-1
CAPS SHOULD BE PLACED NEAR MCH PIN
8
7
6
5
GTLREF VOLTAGE SHOULD BE 0.63*VTT=0.756V 124 OHM OVER 210 RESISTORS
C374
C374 C0.1U25Y
C0.1U25Y
R342 10RR342 10R
4
MCH_GTLREF_CPU
C375
C375 X_C220P50N
X_C220P50N
MCH_GTLREF_CPU 5
3
MSI
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
Intel Lakeport - CPU Signals
Intel Lakeport - CPU Signals
Intel Lakeport - CPU Signals
MS-7267
MS-7267
MS-7267
2
8 35Thursday, July 20, 2006
8 35Thursday, July 20, 2006
8 35Thursday, July 20, 2006
1
3.0
3.0
3.0
8
7
6
5
4
3
2
1
DATA_A37
DATA_A38
AT32
AR34
SADQ36
SADQ37
SADQ38
SBDQ34
SBDQ35
SBDQ36
AP27
AM31
DATA_B35
DATA_B36
DATA_A41
DATA_A40
DATA_A39
AU37
AR41
AR42
SADQ39
SADQ40
SADQ41
SBDQ37
SBDQ38
SBDQ39
AP31
AR27
AU31
DATA_B39
DATA_B37
DATA_B38
SCKE_A[0..1]19,20
DATA_A43
DATA_A42
DATA_A44
AN43
AM40
AU41
SADQ42
SADQ43
SADQ44
SBDQ40
SBDQ41
SBDQ42
AP35
AP37
AN32
DATA_B42
DATA_B40
DATA_B41
5
DATA_A45
DATA_A47
DATA_A46
AU42
AP41
AN40
SADQ45
SADQ46
SADQ47
SBDQ43
SBDQ44
SBDQ45
AL35
AR35
AU38
DATA_B45
DATA_B43
DATA_B44
DATA_A49
DATA_A48
DATA_A50
AL41
AL42
AF39
SADQ48
SADQ49
SADQ50
SBDQ46
SBDQ47
SBDQ48
AL34
AM38
AM34
DATA_B46
DATA_B47
DATA_B48
DATA_A[0..63]19
DATA_A16
DATA_A21
DATA_A6
DATA_A4
DATA_A5
AN1
AP4
SADQ3
SADQ4
SBDQ1
SBDQ2
AP8
AP9
DATA_B3
DATA_B2
DATA_A7
AU5
AU2
SADQ5
SADQ6
SBDQ3
SBDQ4
AL9
AJ11
DATA_B4
DATA_B5
DATA_A8
DATA_A9
AW3
AY3
SADQ7
SADQ8
SBDQ5
SBDQ6
AP6
AM10
DATA_B7
DATA_B6
DATA_A10
DATA_A11
BA7
BB7
SADQ9
SADQ10
SADQ11
SBDQ7
SBDQ8
SBDQ9
AV6
AU7
DATA_B8
DATA_B9
DATA_A14
DATA_A12
DATA_A13
AV1
AW4
BC6
SADQ12
SADQ13
SADQ14
SBDQ10
SBDQ11
SBDQ12
AR5
AV12
AM11
DATA_B11
DATA_B10
DATA_B12
DATA_A17
DATA_A15
AY7
AW12
AY10
SADQ15
SADQ16
SBDQ13
SBDQ14
AR7
AR12
AR10
DATA_B14
DATA_B15
DATA_B13
DATA_A0
DATA_A1
DATA_A3
D D
C C
B B
A A
SCS_A#[0..1]19,20
RAS_A#19,20 CAS_A#19,20
WE_A#19,20
MAA_A[0..13]19,20
ODT_A[0..1]19,20
SBS_A[0..2]19,20
DQS_A019
DQS_A#019
DQS_A119
DQS_A#119
DQS_A219
DQS_A#219
DQS_A319
DQS_A#319
DQS_A419
DQS_A#419
DQS_A519
DQS_A#519
DQS_A619
DQS_A#619
DQS_A719
DQS_A#719
P_DDR_A019
N_DDR_A019
P_DDR_A119
N_DDR_A119
P_DDR_A219
N_DDR_A219
does it need to connect to GND through a 40 ohm resister?
R333 80.6R1%-LFR333 80.6R1%-LF
VCC_DDR
R337 80.6R1%-LFR337 80.6R1%-LF
C372
C372
C0.1U25Y
C0.1U25Y
8
U21B
BB37 BA39 BA35 AY38
BA34 BA37 BB35
BA32
AW32
BB30 BA30 AY30 BA27
BC28
AY27 AY28 BB27 AY33
AW27
BB26
BC38
AW37
AY39 AY37 BB40
BC33
AY34 BA26
AU4 AR2 BA3
BB4 AY11 BA10
AU18 AR18 AU35
AV35 AP42 AP40
AG42 AG41 AC42 AC41
BB32 AY32
AY5
BB5 AK42 AK41 BA31 BB31
AY6
BA5
AH40 AH43
AL5 AJ6 AJ8
AM3
Lakeport
Lakeport
DATA_B[0..63]19
U21B
SACS0# SACS1# SACS2# SACS3#
SARAS# SACAS# SAWE#
SAMA0 SAMA1 SAMA2 SAMA3 SAMA4 SAMA5 SAMA6 SAMA7 SAMA8 SAMA9 SAMA10 SAMA11 SAMA12 SAMA13
SAODT0 SAODT1 SAODT2 SAODT3
SABA0 SABA1 SABA2
SADQS0 SADQS0# SADQS1 SADQS1# SADQS2 SADQS2# SADQS3 SADQS3# SADQS4 SADQS4# SADQS5 SADQS5# SADQS6 SADQS6# SADQS7 SADQS7#
SACLK0 SACLK0# SACLK1 SACLK1# SACLK2 SACLK2# SACLK3 SACLK3# SACLK4 SACLK4# SACLK5 SACLK5#
MCH_SRCOMP0 MCH_SRCOMP1 SMOCDCOMP0 SMOCDCOMP1
SCS_A#0 SCS_A#1
RAS_A# CAS_A# WE_A#
MAA_A0 MAA_A1 MAA_A2 MAA_A3 MAA_A4 MAA_A5 MAA_A6 MAA_A7 MAA_A8 MAA_A9 MAA_A10 MAA_A11 MAA_A12 MAA_A13
ODT_A0 ODT_A1
SBS_A0 SBS_A1 SBS_A2
DQS_A0 DQS_A#0 DQS_A1 DQS_A#1 DQS_A2 DQS_A#2 DQS_A3 DQS_A#3 DQS_A4 DQS_A#4 DQS_A5 DQS_A#5 DQS_A6 DQS_A#6 DQS_A7 DQS_A#7
P_DDR_A0 P_DDR_B0 N_DDR_A0 P_DDR_A1 N_DDR_A1 P_DDR_A2 N_DDR_A2
SMPCOMP_N SMPCOMP_P MCH_VREF_AMCH_VREF_B
TP7TP7 TP6TP6
SMPCOMP_P
SMPCOMP_N
DATA_A2
AP3
AP2
AU3
AV4
SADQ0
SADQ1
SADQ2
SBDQ0
AL6
AL8
DATA_B0
DATA_B1
7
DATA_A18
DATA_A19
BA12
BB12
SADQ17
SADQ18
SADQ19
SBDQ15
SBDQ16
SBDQ17
AM15
AM13
DATA_B17
DATA_B16
DATA_A22
DATA_A20
BA9
BB9
BC11
SADQ20
SADQ21
SBDQ18
SBDQ19
AV15
AN12
AM17
DATA_B20
DATA_B18
DATA_B19
6
DATA_A24
DATA_A25
DATA_A23
AY12
AM20
SADQ22
SADQ23
SADQ24
SBDQ20
SBDQ21
SBDQ22
AP15
AR13
DATA_B21
DATA_B23
DATA_B22
DATA_A26
DATA_A27
AM18
AV20
SADQ25
SADQ26
SBDQ23
SBDQ24
AT15
AM24
DATA_B24
DATA_B25
DATA_A28
AM21
AP17
SADQ27
SADQ28
SBDQ25
SBDQ26
AV24
AM23
DATA_B26
DATA_A31
DATA_A29
DATA_A30
AR17
AP20
AT20
SADQ29
SADQ30
SADQ31
SBDQ27
SBDQ28
SBDQ29
AP21
AR21
AM26
DATA_B27
DATA_B28
DATA_B29
DATA_A34
DATA_A32
DATA_A33
AP32
AV34
AV38
SADQ32
SADQ33
SADQ34
SBDQ30
SBDQ31
SBDQ32
AT24
AP24
AU27
DATA_B32
DATA_B31
DATA_B30
DATA_A35
DATA_A36
AU39
AV32
SADQ35
SBDQ33
AN29
AR31
DATA_B34
DATA_B33
DATA_A53
DATA_A52
DATA_A51
AE40
AM41
AM42
SADQ51
SADQ52
SADQ53
SBDQ49
SBDQ50
SBDQ51
AJ34
AF32
AF34
DATA_B49
DATA_B51
DATA_B50
SCKE_B[0..1]19,20
DATA_A56
DATA_A54
DATA_A55
AF41
AF42
AD40
SADQ54
SADQ55
SADQ56
SBDQ52
SBDQ53
SBDQ54
AJ32
AL31
AG35
DATA_B52
DATA_B54
DATA_B53
DQM_A[0..7]19
DATA_A57
DATA_A58
DATA_A59
AD43
AA39
AA40
SADQ57
SADQ58
SADQ59
SBDQ55
SBDQ56
SBDQ57
AD32
AC32
AD34
DATA_B55
DATA_B57
DATA_B56
DQM_B[0..7]19
DATA_A61
DATA_A62
DATA_A60
AE42
AE41
AB41
SADQ60
SADQ61
SADQ62
SBDQ58
SBDQ59
SBDQ60
Y32
AF35
AA32
DATA_B58
DATA_B60
DATA_B59
SCKE_A0
DATA_A63
AB42
BB25
SADQ63
SACKE0
SBDQ61
SBDQ62
SBDQ63
AF37
AC33
AC35
DATA_B61
DATA_B63
DATA_B62
4
SCKE_A1
AY25
BC24
BA25
SACKE1
SACKE2
SBCKE0
BA14
AY16
SCKE_B0
SCKE_B1
SACKE3
SBCKE1
SBCKE2
BA13
BB13
DQM_A1
DQM_A0
AY2
AR3
SADM0
SBCKE3
AD39
DQM_B7
DQM_A2
DQM_A3
BB10
SADM2
SADM1
SBDM6
SBDM7
AJ39
DQM_B6
DQM_B5
DQM_A4
AT34
AP18
SADM3
SBDM5
AR29
AR38
DQM_B4
DQM_A6
DQM_A5
AG40
AP39
SADM5
SADM4
SBDM3
SBDM4
AP13
AP23
DQM_B2
DQM_B3
DQM_A7
AC40
SADM7
SADM6
SBDM1
SBDM2
AW7
DQM_B1
DQM_B0
SBCS0# SBCS1# SBCS2# SBCS3#
SBRAS# SBCAS#
SBWE# SBMA0
SBMA1 SBMA2 SBMA3 SBMA4 SBMA5 SBMA6 SBMA7 SBMA8
SBMA9 SBMA10 SBMA11 SBMA12 SBMA13
SBODT0 SBODT1 SBODT2 SBODT3
SBBA0 SBBA1 SBBA2
SBDQS0
SBDQS0#
SBDQS1
SBDQS1#
SBDQS2
SBDQS2#
SBDQS3
SBDQS3#
SBDQS4
SBDQS4#
SBDQS5
SBDQS5#
SBDQS6
SBDQS6#
SBDQS7
SBDQS7#
SBCLK0
SBCLK0#
SBCLK1
SBCLK1#
SBCLK2
SBCLK2#
SBCLK3
SBCLK3#
SBCLK4
SBCLK4#
SBCLK5
SBCLK5#
SMVREF1 SMVREF0
SBDM0
AL11
BA40 AW41 BA41 AW40
BA23 AY24 BB23
BB22 BB21 BA21 AY21 BC20 AY19 AY20 BA18 BA19 BB18 BA22 BB17 BA17 AW42
AY42 AV40 AV43 AU40
AW23 AY23 AY17
AM8 AM6 AV7 AR9 AV13 AT13 AU23 AR23 AT29 AV29 AP36 AM35 AG34 AG32 AD36 AD38
AM29 AM27 AV9 AW9 AL38 AL36 AP26 AR26 AU10 AT10 AJ38 AJ36
AM2 AM4
SCS_B#0 SCS_B#1
RAS_B# CAS_B# WE_B#
MAA_B0 MAA_B1 MAA_B2 MAA_B3 MAA_B4 MAA_B5 MAA_B6 MAA_B7 MAA_B8 MAA_B9 MAA_B10 MAA_B11 MAA_B12 MAA_B13
ODT_B0 ODT_B1
SBS_B0 SBS_B1 SBS_B2
DQS_B0 DQS_B#0 DQS_B1 DQS_B#1 DQS_B2 DQS_B#2 DQS_B3 DQS_B#3 DQS_B4 DQS_B#4 DQS_B5 DQS_B#5 DQS_B6 DQS_B#6 DQS_B7 DQS_B#7
N_DDR_B0 P_DDR_B1 N_DDR_B1 P_DDR_B2 N_DDR_B2
MCH_VREF_A
3
SCS_B#[0..1] 19,20
RAS_B# 19,20 CAS_B# 19,20 WE_B# 19,20
MAA_B[0..13] 19,20
ODT_B[0..1] 19,20
SBS_B[0..2] 19,20
DQS_B0 19 DQS_B#0 19 DQS_B1 19 DQS_B#1 19 DQS_B2 19 DQS_B#2 19 DQS_B3 19 DQS_B#3 19 DQS_B4 19 DQS_B#4 19 DQS_B5 19 DQS_B#5 19 DQS_B6 19 DQS_B#6 19 DQS_B7 19 DQS_B#7 19
P_DDR_B0 19 N_DDR_B0 19 P_DDR_B1 19 N_DDR_B1 19 P_DDR_B2 19 N_DDR_B2 19
C370
C370
C0.1U25Y
C0.1U25Y
PLACE CLOSE TO MCH
C371
PLACE 0.1UF CAP CLOSE TO MCH
VCC_DDR
R335 1KR1%-1R335 1KR1%-1
R336
R336 1KR1%-1
1KR1%-1
MSI
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
2
C371
C0.1U25Y
C0.1U25Y
CP18
CP18
X_COPPER
X_COPPER
R334 X_0R-1R334 X_0R-1
MCH_VREF_A
Intel Lakeport - Memory Signals
Intel Lakeport - Memory Signals
Intel Lakeport - Memory Signals
MS-7267
MS-7267
MS-7267
MCH_VREF_B
9 35Thursday, July 20, 2006
9 35Thursday, July 20, 2006
9 35Thursday, July 20, 2006
1
3.0
3.0
3.0
Loading...
+ 21 hidden pages