MSI MS-7267 Schematic 2.1
1
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Date: 2009.10.10
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1Cover Sheet
Block Diagram/Clock Map/Power Map
Intel LGA775 CPU
Intel Lakeport - MCH
Intel ICH7 - PCI & DMI & CPU & IRQ
Intel ICH7 - LPC & ATA & USB & GPIO 13
Intel ICH7 - POWER
Clock - ICS954559
LPC I/O - W83627EHG
Azalia - ALC850
LAN REALTEK RTL8100C/8110SB/8110SC
DDR II System Memory A & B
DDR II VTT Decoupling
PCI EXPRESS X16 Slot
PCI Slot 1 & 2 & 3
A A
ATA33/66/100 IDE & SATA Connectors
VGA Connector
USB Connectors
ATX Connetcor & Front Panel
FWH
ACPI CONTROLLER MS7
VRM 11 - ISL6312CR
GMCH POWER
AutoBOM parts
2-4
5-7
8-11
12
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31~34
MS-7267
CPU:
Intel Prescott ( L2=2MB ) - 3.4G & Above
Intel Cendar Mill (65nm) - 3.73G & Above
Intel Smithfield (90nm Dual core)
Intel Conroe (65W Dual core)
System Chipset:
Intel Lakeport - MCH (North Bridge)
Intel ICH7R (South Bridge)
On Board Chipset:
BIOS -- FWH EEPROM
AC '97 -- ALC850
LPC Super I/O -- W83627EHG
LAN-- REALTEK RTL8100C Co-lay RTL8110SB\SC
CLOCK -- ICS954519
Main Memory:
DDR II *2 (Max 2GB)
Expansion Slots:
PCI2.3 SLOT * 3
PCI EXPRESS X16 SLOT
RICH PWM:
Controller: ISL6312CR 3 PHASES
Version 2.1
MSI
MICRO-STAR INt'L CO., LTD.
MICRO-STAR INt'L CO., LTD.
MICRO-STAR INt'L CO., LTD.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
1
Date: Sheet of
COVER SHEET
COVER SHEET
COVER SHEET
MS-7267
MS-7267
MS-7267
2.1
2.1
2.1
135Wednesday, November 15, 2006
135Wednesday, November 15, 2006
135Wednesday, November 15, 2006
Block Diagram
1
VRM 10.1
RT8800
3-Phase PWM
Analog
Video
Out
IDE Primary
A A
SATA 0~3
SATA
USB
USB Port 0~7
ALC850
AC'97
RTL8100C
&8110SB&811SC
SPI
PCI
EEPROM
Intel LGA775 Processor
RGB
UltraDMA
33/66/100
AC'97
SPI
133/200
MHz
Lakeport
GMCH
ICH7
FSB
DMI
FSB 533/800
FWH
LPC Bus
DDR2 400/533
DDRII
200/266
MHz
PCI
LPC SIO
Winbond
83627EHG
Keyboard
2DDR II
DIMM
Modules
PCI Slot 1
PCI Slot 2
PCI EXPRESS X16
Floopy Parallel Serial
PCI Slot 3
PCI EXPRESS
X16
Connector
Mouse
MSI
MICRO-STAR INt'L CO., LTD.
MICRO-STAR INt'L CO., LTD.
MICRO-STAR INt'L CO., LTD.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
1
Date: Sheet of
BLOCK DIAGRAM
BLOCK DIAGRAM
BLOCK DIAGRAM
MS-7267
MS-7267
MS-7267
2.1
2.1
2.1
235Wednesday, November 15, 2006
235Wednesday, November 15, 2006
235Wednesday, November 15, 2006
5
4
3
2
1
HCLK
LGA775
CLOCK MAP
D D
MCHCLK
Lakeport
MCH
ICS 954519
DOTCLK
96MHz
ICHCLK
Clock
Generator
SATACLK
USB48MHz
ICH7
ICH14.318MHz
C C
SIO48MHz
FWH_PCLK
33MHz
AC_CLK
14.318MHz
B B
PCI_LAN
33MHz
Winbon
LPC IO
FWH
¡¡ALC850
REALTEK 8100C
&8110SB&811SC
PCI_E1PCI_E1_100MHz
PCI-Express X 16
CHANNEL A
CHANNEL A #
CHANNEL B
CHANNEL B#
DIMM A&B
PCI1
A A
5
PCICLK[0..2]
33MHz
4
PCI2
PCI3
MSI
MICRO-STAR INt'L CO., LTD.
MICRO-STAR INt'L CO., LTD.
MICRO-STAR INt'L CO., LTD.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
3
2
Date: Sheet of
CLOCK MAP
CLOCK MAP
CLOCK MAP
MS-7267
MS-7267
MS-7267
1
2.1
2.1
2.1
335Wednesday, November 15, 2006
335Wednesday, November 15, 2006
335Wednesday, November 15, 2006
5
POWER MAP
4
3
2
1
D D
C C
B B
ATX POWER
+12V +5V +3.3V +5VSB
25A 15A25.5A
MSI
2A
ACPI
Controller
5VDIMM
MS - 7
8.58A
VR
15.3+1.31+6.2 = 22.81
V_1P5_CORE
6.2A
VR
VCC3_SB
1.5A
PCI1
PCI2
PCI_E1
937.5mA
6.5A
5A
12.1A
19A
MSI
MS6 +
VCC_DDR
W83310DS
1.31A
VR
V_FSB_VTT
125A 5.3A
4+5+1.2 = 10.2A10.2*1.8/5/0.8 = 4.59A
1.2A
VTT_DDR
15.3A
V_1P05_CORE
6.2A
LGA775VRM 10.1
Lakeport
4A
13.8A + 1.5A
= 15.3A
5A
1.2A
1.71mA
1.31A
0.7A
MCH
DDR2 X 2
14mA
ICH7
PCI3
0.9A
VLAN25
REALTEK 8100C
&8110SB&811SC
VLAN12
A A
5VDUAL
5
4.345A
4.345A
USB+PS2
4
3
2
MSI
MICRO-STAR INt'L CO., LTD.
MICRO-STAR INt'L CO., LTD.
MICRO-STAR INt'L CO., LTD.
Title
Title
Title
POWER MAP
POWER MAP
POWER MAP
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
MS-7267
MS-7267
MS-7267
435Wednesday, November 15, 2006
435Wednesday, November 15, 2006
435Wednesday, November 15, 2006
1
2.1
2.1
2.1
8
D D
H_DBI#[0..3]8
CPU_GTLREF2
CPU_GTLREF26
H_IERR#6
H_FERR#6,12
H_STPCLK#12
H_INIT#12
H_DBSY#8
H_DRDY#8
H_TRDY#8
TRMTRIP#6,12
R381 62R0402R381 62R0402
R382 0RR382 0R
CPU_GTLREF36
R385 X_1KR-1R385 X_1KR-1
H_D#[0..63]8
H_LOCK#8
CPU_TMPA16
VTIN_GND16
H_PROCHOT#6
H_BNR#8
H_HITM#8
H_DEFER#8
H_IGNNE#12
ICH_H_SMI#12
H_FSBSEL06,15
H_FSBSEL16,15
H_FSBSEL26,15
H_PWRGD6,12
H_CPURST#6,8
H_ADS#8
H_HIT#8
H_BPRI#8
H_A20M#12
CPU_GTLREF3
C C
VTT_OUT_LEFT
H_CPUSLP#12
VTT_OUT_RIGHT
B B
X_C0.1U25Y
X_C0.1U25Y
C388
C388
A A
7
H_A#[3..31]8
AJ6
AJ5
AH5
D53#
B15
H_D#53
D52#
C14
H_D#52
D51#
C15
H_D#51
D50#
A14
H_D#50
D49#
D17
H_D#49
A35#
D48#
D20
H_D#48
A34#
D47#
G22
H_D#47
A33#
D46#
D22
H_D#46
AH4
E22
H_D#45
U22A
U22A
H_DBI#0
A8
H_TDI
H_TDO
H_TMS
H_TRST#
H_TCK
H_D#63
H_D#62
H_D#61
H_D#60
H_D#59
H_D#58
H_D#57
H_D#56
H_D#55
H_D#54
G11
D19
C20
F2
AB2
AB3
R3
M3
AD3
P3
H4
B2
C1
E3
D2
C3
C2
D4
E4
G8
G7
AD1
AF1
AC1
AG1
AE1
AL1
AK1
M2
AE8
AL2
N2
P2
K3
L2
AH2
N5
AE6
C9
G10
D16
A20
Y1
V2
AA2
G29
H30
G30
N1
G23
B22
A22
A19
B19
B21
C21
B18
A17
B16
C18
DBI0#
DBI1#
DBI2#
DBI3#
EDRDY#
IERR#
MCERR#
FERR#/PBE#
STPCLK#
BINIT#
INIT#
RSP#
DBSY#
DRDY#
TRDY#
ADS#
LOCK#
BNR#
HIT#
HITM#
BPRI#
DEFER#
TDI
TDO
TMS
TRST#
TCK
THERMDA
THERMDC
THERMTRIP#
GND/SKTOCC#
PROCHOT#
IGNNE#
SMI#
A20M#
TESTI_13
RSVD2
RESERVED0
RESERVED1
RESERVED2
RESERVED3
RESERVED4
RESERVED5
BOOTSELECT
LL_ID0
LL_ID1
BSEL0
BSEL1
BSEL2
PWRGOOD
RESET#
D63#
D62#
D61#
D60#
D59#
D58#
D57#
D56#
D55#
D54#
H_DBI#1
H_DBI#2
H_DBI#3 CPU_GTLREF0
H_TESTHI13
H_TEST
TP11TP11
TP12TP12
6
CPU SIGNAL BLOCK
H_A#25
H_A#29
H_A#30
H_A#31
H_A#23
H_A#26
H_A#28
H_A#24
H_A#22
H_A#27
H_A#20
H_A#21
AG5
AG4
AG6
AF4
AF5
AB4
AC5
AB5
AA5
AD6
AA4
A32#
A31#
A30#
A29#
A28#
A27#
A26#
A25#
A24#
A23#
A22#
A21#
D45#
D44#
D43#
D42#
D41#
D40#
D39#
D38#
D37#
D36#
D35#
E21
H_D#42
F20
H_D#41
E19
H_D#40
E18
H_D#39
F18
H_D#38
F17
H_D#37
G17
H_D#35
H_D#36
D34#
E16
E15
G18
H_D#33
H_D#34
G21
H_D#44
F21
H_D#43
H_A#19
A20#Y4A19#Y6A18#W6A17#
D33#
G16
H_D#32
D32#
H_A#18
D31#
G15
H_D#31
H_A#16
H_A#15
H_A#17
AB6
A16#W5A15#V4A14#V5A13#U4A12#U5A11#T4A10#
D30#
D29#
D28#
F15
F14
G14
H_D#30
H_D#28
H_D#29
H_A#14
D27#
G13
H_D#27
H_A#13
D26#
E13
H_D#26
H_A#12
D25#
D13
H_D#25
H_A#11
D24#
F12
H_D#24
H_A#10
U6
F11
H_D#23
H_A#7
H_A#8
H_A#9
A9#T5A8#R4A7#M4A6#L4A5#M5A4#P6A3#
D23#
D22#
D21#
D20#D7D19#E9D18#F9D17#F8D16#G9D15#
E10
D10
H_D#21
H_D#22
H_D#20
H_A#6
H_D#19
H_A#5
H_D#18
H_A#4
H_D#17
H_A#3
L5
H_D#16
D11
H_D#15
5
AC2
DBR#
D14#
C12
H_D#13
H_D#14
4
VCCP
VID[0..7] 28
R328 1KRR328 1KR
R374 X_62R-1R374 X_62R-1
R331 0RR331 0R
TP_GTLREF_SEL
MCH_GTLREF_CPU
H_BPM#5
H_BPM#4
H_BPM#3
H_BPM#2
H_BPM#1
H_BPM#0
H_REQ#4
H_REQ#3
H_REQ#2
H_REQ#1
H_REQ#0
H_TESTHI12
H_TESTHI11
H_TESTHI10
H_TESTHI9
H_TESTHI8
H_TESTHI2_7
H_TESTHI1
H_TESTHI0
RSVD_AK6
RSVD_G6
H_RS#2
H_RS#1
H_RS#0
TP9TP9
TP10TP10
H_COMP5
H_COMP4
H_COMP3
H_COMP2
H_COMP1
H_COMP0
CP31CP31
CP21CP21
VTT_OUT_RIGHT
VID_SEL
CPU_GTLREF1
RN50 8P4R-51R-LFRN50 8P4R-51R-LF
1 2
3 4
5 6
7 8
R375 51R-1R375 51R-1
R376 51R-1R376 51R-1
R377 51R-1R377 51R-1
R378 51R-1R378 51R-1
R379 X_62R-1R379 X_62R-1
R380 X_51R-1R380 X_51R-1
CK_H_CPU# 15
CK_H_CPU 15
H_RS#[0..2] 8
R475 49.9R1%-1R475 49.9R1%-1
R458 49.9R1%-1R458 49.9R1%-1
R386 49.9R1%-1R386 49.9R1%-1
R387 49.9R1%-1R387 49.9R1%-1
R388 49.9R1%-1R388 49.9R1%-1
R389 49.9R1%-1R389 49.9R1%-1
TP13TP13
TP14TP14
TP15TP15
TP16TP16
H_ADSTB#1 8
H_ADSTB#0 8
H_DSTBP#3 8
H_DSTBP#2 8
H_DSTBP#1 8
H_DSTBP#0 8
H_DSTBN#3 8
H_DSTBN#2 8
H_DSTBN#1 8
H_DSTBN#0 8
H_NMI 12
H_INTR 12
VCC_VRM_SENSE
R367 X_0RR367 X_0R
VSS_VRM_SENSE
R369 X_0RR369 X_0R
VID0
VID5
VID6
VID2
VID3
VID4
VID7
VID1
AM5
AL4
AK4
AL6
AM3
AL5
AK3
H_D#6
AM2
AM7
VID6#
VID5#
VID4#
VID3#
VID2#
VID1#
VID0#
RSVD0
ITP_CLK0
H_D#5
H_D#4
H_D#3
H_D#2
GTLREF_SEL
VID_SELECT
GTLREF0
GTLREF1
CS_GTLREF
BPM5#
BPM4#
BPM3#
BPM2#
BPM1#
BPM0#
PCREQ#
REQ4#
REQ3#
REQ2#
REQ1#
REQ0#
TESTHI12
TESTHI11
TESTHI10
TESTHI9
TESTHI8
TESTHI7
TESTHI6
TESTHI5
TESTHI4
TESTHI3
TESTHI2
TESTHI1
TESTHI0
FORCEPH
RSVD1
BCLK1#
BCLK0#
RS2#
RS1#
RS0#
AP1#
AP0#
BR0#
COMP5
COMP4
COMP3
COMP2
COMP1
COMP0
DP3#
DP2#
DP1#
DP0#
ADSTB1#
ADSTB0#
DSTBP3#
DSTBP2#
DSTBP1#
DSTBP0#
DSTBN3#
DSTBN2#
DSTBN1#
DSTBN0#
LINT1/NMI
LINT0/INTR
ZIF-SOCK775-15u-in
ZIF-SOCK775-15u-in
B4
H_D#0
H_D#1
AN7
H1
H2
H29
E24
AG3
AF2
AG2
AD2
AJ1
AJ2
G5
J6
K6
M6
J5
K4
W2
P1
H5
G4
G3
F24
G24
G26
G27
G25
F25
W3
F26
AK6
G6
G28
F28
A3
F5
B3
U3
U2
F3
T2
J2
R1
G2
T1
A13
J17
H16
H15
J16
AD5
R6
C17
G19
E12
B9
A16
G20
G12
C8
L1
K1
AN3
AN4
AN5
AJ3
AN6
ITP_CLK1
VSS_SENSE
VCC_SENSE
VSS_MB_REGULATION
VCC_MB_REGULATION
D13#
D12#D8D11#
D10#
D9#
D8#
D7#A7D6#B7D5#B6D4#A5D3#C6D2#A4D1#C5D0#
B12
B10
A11
A10
C11
H_D#8
H_D#10
H_D#12
H_D#11
H_D#7
H_D#9
VCC_VRM_SENSE 28
VSS_VRM_SENSE 28
TP18TP18
MCH_GTLREF_CPU 8
PECI
PECI 16
H_REQ#[0..4] 8
3
For Conroe-L
VID_SEL 28
CPU_GTLREF0 6
CPU_GTLREF1 6
VTT_OUT_LEFT
V_FSB_VTT
VTT_OUT_RIGHT 6,7
VTT_OUT_LEFT 6,7
C389
C389
X_C0.1U25Y
X_C0.1U25Y
TP_CPU_G17
H_TESTHI_M7
H_BR#0 6,8
VTT_OUT_RIGHT
C390
C390
X_C1U10X
X_C1U10X
2
H_TESTHI8
R551 X_0RR551 X_0R
H_TESTHI9
R552 X_0RR552 X_0R
TP_CPU_G1
R553 X_0RR553 X_0R
H_TEST
R554 X_0RR554 X_0R
H_TESTHI_M
R579 X_0RR579 X_0R
R549 X_51RR549 X_51R
FOR kentsfield CPU
BSEL
02
10FSB FREQUENCY
01 200 MHZ (800)
1
0 0 133 MHZ (533)
Prescott / Cedar Mill
LL_ID[1:0] = 00
GTLREF_SEL = 0
VTT_SEL = 1
VID5
1
VID4
3
VID2
5
VID0
7
VID7
1
VID3
3
VID1
5
VID6
7
RN52 8P4R-51R-LFRN52 8P4R-51R-LF
1 2
3 4
5 6
7 8
1 2
3 4
5 6
7 8
RN53 8P4R-51R-LFRN53 8P4R-51R-LF
R392 51R-1R392 51R-1
R393 51R-1R393 51R-1
R394 51R-1R394 51R-1
PLACE BPM/TCK/TDI/TMS TERMINATION NEAR CPU
PLACE TDO TERMINATION NEAR CONNECTOR
H_TESTVTT_OUT_LEFT
TABLE
RN51
RN51
8P4R-680R-LF
8P4R-680R-LF
2
4
6
8
2
4
6
8
RN54 8P4R-680R-LFRN54 8P4R-680R-LF
H_BPM#3
H_BPM#2
H_BPM#0
H_BPM#1
H_TESTHI12
VTT_OUT_RIGHT
H_BPM#3
H_BPM#5
H_BPM#0
H_BPM#1
H_TMS
H_BPM#2
H_TDI
H_BPM#4
H_TRST#
1
H_TDO
H_TCK
MICRO-STAR INt'L CO., LTD.
MICRO-STAR INt'L CO., LTD.
MICRO-STAR INt'L CO., LTD.
MSI
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
8
7
6
5
4
3
Date: Sheet of
2
Intel LGA775 CPU - Signals
Intel LGA775 CPU - Signals
Intel LGA775 CPU - Signals
MS-7267
MS-7267
MS-7267
534Thursday, November 16, 2006
534Thursday, November 16, 2006
534Thursday, November 16, 2006
1
2.3
2.3
2.3
8
VCCP
AG18
AG15
AG14
AG12
AG11
AF9
AF8
AF22
AF21
U22B
U22B
VCCP
AF19
VCC
D D
C C
AF18
VCC
AF15
VCC
AF14
VCC
AF12
VCC
AF11
VCC
AE9
VCC
AE23
VCC
AE22
VCC
AE21
VCC
AE19
VCC
AE18
VCC
AE15
VCC
AE14
VCC
AE12
VCC
AE11
VCC
AD8
VCC
AD30
VCC
AD29
VCC
AD28
VCC
AD27
VCC
AD26
VCC
AD25
VCC
AD24
VCC
AD23
VCC
AC8
VCC
AC30
VCC
AC29
VCC
AC28
VCC
AC27
VCC
AC26
VCC
AC25
VCC
AC24
VCC
AC23
VCC
AB8
VCC
AA8
VCC
VCCP
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
Y8
Y23
Y24
Y25
Y26
Y27
Y28
Y29
Y30
7
AH27
AH26
AH25
AH22
AH21
AH19
AH18
AH15
AH14
AH12
AH11
AG9
AG8
AG30
AG29
AG28
AG27
AG26
AG25
AG22
AG21
AG19
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCCT8VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCCU8VCCV8VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCCW8VCC
W30
U30
W23
W24
W25
W26
W27
W28
W29
T29
T30
U23
U24
U25
U26
U27
U28
U29
6
AH28
AH29
AH30
AH8
AH9
AJ11
AJ12
AJ14
AJ15
AJ18
AJ19
AJ21
AJ22
AJ25
AJ26
AJ8
AJ9
AK11
AK12
AK14
AK15
AK18
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCCM8VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCCN8VCCP8VCCR8VCC
VCC
VCC
VCC
VCC
VCC
VCC
T23
T24
T25
T26
T27
T28
N23
N24
N25
N26
N27
N28
N29
N30
M27
M28
M29
M30
5
AK19
AK21
AK22
AK25
AK26
AK8
AK9
AL11
AL12
AL14
AL15
AL18
AL19
AL21
AL22
AL25
AL26
AL29
AL30
AL8
AL9
AM11
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCCJ8VCCJ9VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCCK8VCCL8VCC
VCC
VCC
VCC
VCC
M25
M26
K25
K26
K27
K28
K29
K30
M23
M24
J25
J26
J27
J28
J29
J30
K23
K24
4
AM12
AM14
AM15
AM18
AM19
AM21
AM22
AM25
AM26
AM29
AM30
AM8
AM9
AN11
AN12
AN14
AN15
AN18
AN19
AN21
AN22
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCCA
VSSA
VCCPLL
VCC-IOPLL
VTTPWRGD
VTT_OUT_RIGHT
VTT_OUT_LEFT
VTT_SEL
RSVD
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
J23
J24
J11
J12
J13
J14
J15
J18
J19
J20
J21
J22
HS11HS22HS33HS4
J10
AN8
AN9
AN25
AN26
AN29
AN30
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
4
H_VCCA
A23
H_VSSA
B23
H_VCCPLL
D23
H_VCCA
C23
A25
A26
A27
A28
A29
A30
B25
B26
B27
B28
B29
B30
C25
C26
C27
C28
C29
C30
D25
D26
D27
D28
D29
D30
VTT_PWG
AM6
VTT_OUT_RIGHT
AA1
VTT_OUT_LEFT
J1
F27
F29
ZIF-SOCK775-15u-in
ZIF-SOCK775-15u-in
3
VCCA ------ 120mA
VCCIOPLL -- 100mA
V_FSB_VTT
VTT_SEL 29
2
1
V_FSB_VTT
C377 C10U10Y0805C377 C10U10Y0805
C378 C10U10Y0805C378 C10U10Y0805
C379 C10U10Y0805C379 C10U10Y0805
CAPS FOR FSB GENERIC
VTT_OUT_RIGHT
R353 124R1%-LFR353 124R1%-LF
GTLREF VOLTAGE SHOULD BE
0.63*VTT = 0.756V
VTT_OUT_RIGHT
B B
R484 124R1%-LFR484 124R1%-LF
PLACE AT CPU END OF ROUTE
VTT_OUT_LEFT5,7
X_C1U10Y
X_C1U10Y
C386
C386
C0.1U25Y
C0.1U25Y
VTT_OUT_RIGHT
C384
C384
VTT_OUT_RIGHT H_IERR#
8
VTT_OUT_RIGHT5,7
A A
VCC3 VCC5
R355
R355
210R1%-1
210R1%-1
R485
R485
210R1%-1
210R1%-1
V_FSB_VTT
R354 10RR354 10R
C380
C380
C1U10Y
C1U10Y
R476 10RR476 10R
C487
C487
C1U10Y
C1U10Y
R357 130R1%-1R357 130R1%-1
R358 62R-1R358 62R-1
R361 62R-1R361 62R-1
R362 X_100R-1R362 X_100R-1
R363 62R-1R363 62R-1
PLACE AT ICH END OF ROUTE
R364 62R-1R364 62R-1
R365 62R-1R365 62R-1
7
H_CPURST#
H_BR#0
TRMTRIP#
H_FERR#
C381
C381
X_C220P50N-1
X_C220P50N-1
C488
C488
X_C220P50N-1
X_C220P50N-1
H_PWRGDVTT_OUT_LEFT
H_PROCHOT# 5
H_CPURST# 5,8
H_BR#0 5,8
H_PWRGD 5,12
H_IERR# 5VTT_OUT_RIGHT5,7
TRMTRIP# 5,12
H_FERR# 5,12
CPU_GTLREF0 5
CPU_GTLREF1 5
6
VID_GD#27,28
VTT_OUT_LEFT
V_FSB_VTT
VTT_OUT_LEFT
VCC5_SB
R226 X_124R1%/2R226 X_124R1%/2
R244 X_124R1%/2R244 X_124R1%/2
5
R359
R359
1KR
1KR
R360 10KR-1R360 10KR-1
PLACE COMPONENTS AS CLOSE AS POSSIBLE TO PROCESSOR SOCKET
TRACE WIDTH TO CAPS MUST BE SMALLER THAN 12MILS
L14 X_10U125m_0805-1L14 X_10U125m_0805-1
V_FSB_VTT
L15 X_10U125m_0805-1L15 X_10U125m_0805-1
CP19 X_COPPERCP19 X_COPPER
VTT_PWG SPEC :
CPU_GTLREF2
C287
C287
X_C220P50N2
X_C220P50N2
CPU_GTLREF3
C118
C118
X_C220P50N2
X_C220P50N2
High > 0.9V
Low < 0.3V
Trise < 150ns
C385
C385
X_C1U10Y
X_C1U10Y
CPU_GTLREF2 5
R514
R514
X_0R0402
X_0R0402
CPU_GTLREF3 5
R356 680R-1R356 680R-1
R227
R227
X_210R1%/2
X_210R1%/2
R256
R256
X_210R1%/2
X_210R1%/2
VTT_PWGH_PROCHOT#
Q47
Q47
N-MMBT3904_NL_SOT23
N-MMBT3904_NL_SOT23
R237 X_10R/2R237 X_10R/2
C454
C454
X_C1U16Y3
X_C1U16Y3
R257 10R/2R257 10R/2
C462
C462
X_C1U16Y3
X_C1U16Y3
Reserve for Kentsfield (quad Core)
4
C382
C382
C10U10Y0805
C10U10Y0805
FSBSEL RESISTOR CAN BE REMOVED IF ONLY TEJAS
AND CEDAR MILL ARE SUPPORTED
V_FSB_VTT
*GTLREF VOLTAGE SHOULD BE
0.63*VTT = 0.756V
R514,R547,R548 PLACE
BACKSIDE
3
H_VCCA
C383
C383
C10U10Y1206
C10U10Y1206
H_VSSA
R391 470R-1R391 470R-1
R401 470R-1R401 470R-1
R407 470R-1R407 470R-1
V_1P5_CORE
H_FSBSEL1
H_FSBSEL1 5,15
H_FSBSEL2
H_FSBSEL2 5,15
H_FSBSEL0
H_FSBSEL0 5,15
MSI
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
2
H_VCCPLL
CP20
CP20
X_COPPER
X_COPPER
MICRO-STAR INt'L CO., LTD.
MICRO-STAR INt'L CO., LTD.
MICRO-STAR INt'L CO., LTD.
Intel LGA775 CPU - Power
Intel LGA775 CPU - Power
Intel LGA775 CPU - Power
C392
C392
C10U10Y0805
C10U10Y0805
MS-7267
MS-7267
MS-7267
C393
C393
C1U10Y
C1U10Y
634Thursday, November 16, 2006
634Thursday, November 16, 2006
634Thursday, November 16, 2006
1
2.3
2.3
2.3
8
7
6
5
4
3
2
1
R431
R431
X_1K/4/1
X_1K/4/1
VTT_OUT_RIGHT
A12
A15
A18
A2
A21
A24
A6
A9
AA23
AA24
AA25
AA26
AA27
AA28
AA29
AA3
AA30
AA6
AA7
AB1
AB23
AB24
AB25
AB26
AB27
AB28
AB29
AB30
AB7
AC3
AC6
AC7
AD4
AD7
AE10
AE13
AE16
AE17
AE2
AE20
AE24
AE25
AE26
AE27
AE28
R349
R349
49.9R1%-1
49.9R1%-1
U22C
U22C
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
R390
R390
R347
R347
R348
R348
R372
R372
51R-1
51R-1
51R-1
51R-1
51R-1
51R-1
24.9R1%-1
TP5TP5
D14
RSVD2D1RSVD3
VSS
AF10
AF13
VSS
E23
AF16
RSVD4
VSS
AF17
TP3TP3
TP4TP4
RSVD5E5RSVD6E6RSVD7E7RSVD8
VSS
VSS
VSS
AF20
AF23
AF24
24.9R1%-1
H_COMP8
F6
F23
B13
RSVD9
IMPSEL#
VSS
VSS
VSS
VSS
VSS
VSS
AF3
AF25
AF26
AF27
AF28
AF29
R350
R350
49.9R1%-1
49.9R1%-1
H_COMP7
H_COMP6
AE3
AE4
RSVD1
COMP6Y3COMP7
VSS
VSS
VSS
VSS
AE5
AE7
AE29
AE30
RSVD10J3RSVD11N4RSVD12
VSS
H_TESTHI_M5
P5
AC4
W1
VSSY7VSSY5VSSY2VSSW7VSSW4VSSV7VSSV6VSS
MSID[1]V1MSID[0]
RSVD13
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
AF6
AF7
AF30
AG10
AG13
AG16
AG17
AG20
AG23
AG24
H_TESTHI_M
R437
R437
x_0R-1
x_0R-1
TP_CPU_G1
V30
V29
V28
V27
V26
V25
V24
V23
R30
R29
R28
R27
R26
R25
R24
R23
P30
P29
P28
P27
P26
P25
P24
P23
VSSV3VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSSU7VSSU1VSST7VSST6VSST3VSSR7VSSR5VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSSR2VSSP7VSSP4VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
AJ4
AH1
AH3
AH6
AG7
AH7
AJ10
AJ13
AH10
AH13
AH16
AJ16
AH17
AH20
AH23
AH24
AJ7
AJ17
AJ20
AJ23
AJ24
AJ27
AJ28
AJ29
AJ30
AK10
AK13
AK16
AK17
VSS
AK2
AK5
AK20
AK23
AK24
AK27
AK28
AK29
AK30
VSS
VSS
VSSN7VSSN6VSSN3VSSM7VSSM1VSSL7VSSL6VSS
VSS
VSS
VSS
VSS
AK7
AL10
AL13
AL16
L30
VSSL3VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
AL3
AL17
AL20
AL23
AL24
AL27
AL28
TP8TP8
K2
L29
L28
L27
L26
L25
L24
L23
K5
VSS
VSS
VSS
VSS
VSS
VSS
VSSK7VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
AL7
VSS
AM1
AM10
AM13
AM16
AM17
AM20
AM23
AM24
AM27
AM28
VSS
VSS
VSSH3VSSH6VSSH7VSSH8VSSH9VSSJ4VSSJ7VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
AN1
AN2
AM4
AN10
AN13
AN16
AN17
AN20
AN23
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
AN24
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSSB1VSS
VSS
ZIF-SOCK775-15u-in
ZIF-SOCK775-15u-in
B11
B14
AN27
AN28
H17
H18
H19
H20
H21
H22
H23
H24
H25
H26
H27
H28
TP_CPU_G15
H14
H13
H12
H11
H10
TP_CPU_G1 VTT_OUT_LEFT
G1
F7
F4
F22
F19
F16
F13
F10
E8
E29
E28
E27
E26
E25
E20
E2
E17
E14
E11
D9
D6
D5
D3
D24
D21
D18
D15
D12
C7
C4
C24
C22
C19
C16
C13
C10
B8
B5
B24
B20
B17
R429 x_51R-1R429 x_51R-1
VTT_OUT_LEFT5,6
TP17TP17
VTT_OUT_RIGHT5,6
D D
C C
B B
A A
MSI
MICRO-STAR INt'L CO., LTD.
MICRO-STAR INt'L CO., LTD.
MICRO-STAR INt'L CO., LTD.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
8
7
6
5
4
3
Date: Sheet
2
Intel LGA775 CPU - GND
Intel LGA775 CPU - GND
Intel LGA775 CPU - GND
MS-7267
MS-7267
MS-7267
2.3
2.3
2.3
of
734Thursday, November 16, 2006
734Thursday, November 16, 2006
734Thursday, November 16, 2006
1
8
H_A#[3..31]5
D D
H_ADSTB#05
H_ADSTB#15
H_LOCK#5
H_REQ#[0..4]5
H_TRDY#5
H_DBSY#5
H_DRDY#5
H_RS#[0..2]5
CK_H_MCH15
CK_H_MCH#15
PWRGD_3V13,27
H_CPURST#5,6
PLTRST#12,16
ICH_SYNC#13
R338 16.9R1%-LFR338 16.9R1%-LF
R339
R339
60.4R1%-1
60.4R1%-1
H_BR#05,6
H_BPRI#5
H_BNR#5
H_ADS#5
H_HIT#5
H_HITM#5
H_DEFER#5
TP2TP2
ICH_SYNC#
MCH_GTLREF_CPU
C373
C373
X_C2.2P50N
X_C2.2P50N
C C
B B
V_FSB_VTT
A A
8
7
N17
P17
P18
P20
P21
AA22
AB21
AB22
U21A
U21A
H_A#3 H_D#0
J39
HA3#
H_A#4
K38
HA4#
H_A#5
J42
HA5#
H_A#6
K35
HA6#
H_A#7
J37
HA7#
H_A#8
M34
HA8#
H_A#9
N35
HA9#
H_A#10
R33
HA10#
H_A#11
N32
HA11#
H_A#12
N34
HA12#
H_A#13
M38
HA13#
H_A#14
N42
HA14#
H_A#15
N37
HA15#
H_A#16
N38
HA16#
H_A#17
R32
HA17#
H_A#18
R36
HA18#
H_A#19
U37
HA19#
H_A#20
R35
HA20#
H_A#21
R38
HA21#
H_A#22
V33
HA22#
H_A#23
U34
HA23#
H_A#24
U32
HA24#
H_A#25
V42
HA25#
H_A#26
U35
HA26#
H_A#27
Y36
HA27#
H_A#28
Y38
HA28#
H_A#29
AA37
HA29#
H_A#30
V32
HA30#
H_A#31
Y34
HA31#
M36
HAD_STB0#
V35
HAD_STB1#
F38
HPCREQ#
AA41
HBREQ0#
D42
HBPRI#
U39
HBNR#
U40
HLOCK#
W42
HADS#
H_REQ#0
E41
HREQ0#
H_REQ#1
D41
HREQ1#
H_REQ#2
K36
HREQ2#
H_REQ#3
G37
HREQ3#
H_REQ#4
E42
HREQ4#
U41
HHIT#
W41
HHITM#
P40
HDEFER#
W40
HTRDY#
U42
HDBSY#
V41
HDRDY#
Y40
HEDRDY#
H_RS#0
T40
RS0#
H_RS#1
Y43
RS1#
H_RS#2
T43
RS2#
M31
HCLKP
M29
HCLKN
AJ9
PWROK
C30
HCPURST#
AJ12
RSTIN#
M18
HXRCOMP
HXSCOMP
HXSWING
HXSCOMP
ICH_SYNC#
A28
HRCOMP
C27
HSCOMP
B27
HSWING
D27
HDVREF
D28
HACCVREF
7
AB23
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
RSVRD1
RSVRD2
RSVRD3
RSVRD4
L15
AA35
AA42
AA34
AA38
V_FSB_VTT
HD_SWING VOLTAGE "10 MIL TRACE , 7 MIL
SPACE" HD_SWING S/B 1/3*VTT +/- 2%
PLACE DIVIDER RESISTOR NEAR VTT
R341
R341
301R1%-1
301R1%-1
R345
R345
84.5R1%-LF
84.5R1%-LF
AC22
AD14
VCC
VCC
VCC
RSVRD5
RSVRD6
RSVRD7
U27
M15
AF6
AF7
AF8
AF9
AF10
AF11
VCC
VCC
VCC
VCC
VCC
RSVRD8
RSVRD9
RSVRD11
RSVRD12
RSVRD13
A43
R27
M11
AG25
AG26
AG27
R343 62R-1R343 62R-1
6
V_1P5_CORE
AF12
AF13
AF14
AF30
AG2
AG3
AG4
AG5
AG6
AG7
AG8
AG9
AG10
AG11
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
RSVRD14
RSVRD15
RSVRD16
RSVRD17
RSVRD18
RSVRD19
RSVRD20
RSVRD21
RSVRD22
RSVRD23
RSVRD24
RSVRD25
RSVRD26
RSVRD27
Y30
AL39
AK40
HXSWING
C376
C376
C0.1U25Y
C0.1U25Y
Y33
AF31
AY14
BC16
AD30
AC34
AD31
AW17
AW18
AJ24
AJ27
6
5
AG12
AG13
AG14
AH1
AH2
AH4
AJ5
AJ13
AJ14
AK2
AK3
AK4
AK14
AK15
AK20
R15
R17
R18
R20
R21
R23
R24
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
RSVRD32
RSVRD33
RSVRD34
RSVRD35
RSVRD36
RSVRD37
RSVRD38
RSVRD39
RSVRD40
RSVRD41
RSVRD42
RSVRD31
RSVRD28
RSVRD29
RSVRD30
V31
U30
AJ23
AK21
AA30
AC30
RSVRD43
NC1
NC2
NC3
NC4
NC5
NC6
V30
BB2
BC2
AL26
AJ29
AK27
V_FSB_VTT
AG29
BC43
BC42
R340
R340
124R1%-LF
124R1%-LF
R344
R344
210R1%-1
210R1%-1
BC1
BB43
AJ26
AJ21
AL29
AL20
4
U15
U17
U18
U19
U20
U21
U22
U23
U24
U25
U26
V15
V17
V18
V19
V20
V21
V22
V23
V25
V27
W17
W18
W19
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
NC7
NC8
NC9
NC10
NC11
NC12
NC13
NC14
NC15C2NC16
NC17
NC18
NC19B3NC20B2NC21
VCC
VCC
VCC
VCC
VCC
VCC
A42
Y17
VCC
Y18
Y19
Y21
Y23
Y25
Y27
MCH_GTLREF_CPU
C375
C375
X_C220P50N
X_C220P50N
AA15
E35
B43
B42
B41
C42
BB1
BA2
AW2
AV27
AV26
AW26
GTLREF VOLTAGE SHOULD BE 0.63*VTT=0.756V
124 OHM OVER 210 RESISTORS
R342 10RR342 10R
C374
C374
C0.1U25Y
C0.1U25Y
W20
W22
VCC
VCC
VCC
VCC
VCC
VCC
AA17
AA18
W24
W26
W27
Y15
M17
VCC
VCC
VCC
VCC
VCC
KDINV_0#
HDINV_1#
HDINV_2#
HDINV_3#
HD_STBP0#
HD_STBN0#
HD_STBP1#
HD_STBN1#
HD_STBP2#
HD_STBN2#
HD_STBP3#
HD_STBN3#
VCC
VCC
AA19
AA20
V_1P5_CORE
MCH_GTLREF_CPU 5
3
HD0#
HD1#
HD2#
HD3#
HD4#
HD5#
HD6#
HD7#
HD8#
HD9#
HD10#
HD11#
HD12#
HD13#
HD14#
HD15#
HD16#
HD17#
HD18#
HD19#
HD20#
HD21#
HD22#
HD23#
HD24#
HD25#
HD26#
HD27#
HD28#
HD29#
HD30#
HD31#
HD32#
HD33#
HD34#
HD35#
HD36#
HD37#
HD38#
HD39#
HD40#
HD41#
HD42#
HD43#
HD44#
HD45#
HD46#
HD47#
HD48#
HD49#
HD50#
HD51#
HD52#
HD53#
HD54#
HD55#
HD56#
HD57#
HD58#
HD59#
HD60#
HD61#
HD62#
HD63#
(INTEL-QG82945GC-A2-LF)
(INTEL-QG82945GC-A2-LF)
CAPS SHOULD BE PLACED NEAR MCH PIN
5
4
3
2
P41
H_D#1
M39
H_D#2
P42
H_D#3
M42
H_D#4
N41
H_D#5
M40
H_D#6
L40
H_D#7
M41
H_D#8
K42
H_D#9
G39
H_D#10
J41
H_D#11
G42
H_D#12
G40
H_D#13
G41
H_D#14
F40
H_D#15
F43
H_D#16
F37
H_D#17
E37
H_D#18
J35
H_D#19
D39
H_D#20
C41
H_D#21
B39
H_D#22
B40
H_D#23
H34
H_D#24
C37
H_D#25
J32
H_D#26
B35
H_D#27
J34
H_D#28
B34
H_D#29
F32
H_D#30
L32
H_D#31
J31
H_D#32
H31
H_D#33
M33
H_D#34
K31
H_D#35
M27
H_D#36
K29
H_D#37
F31
H_D#38
H29
H_D#39
F29
H_D#40
L27
H_D#41
M24
H_D#42
J26
H_D#43
K26
H_D#44
G26
H_D#45
H24
H_D#46
K24
H_D#47
F24
H_D#48
E31
H_D#49
A33
H_D#50
E40
H_D#51
D37
H_D#52
C39
H_D#53
D38
H_D#54
D33
H_D#55
C35
H_D#56
D34
H_D#57
C34
H_D#58
B31
H_D#59
C31
H_D#60
C32
H_D#61
D32
H_D#62
B30
H_D#63
D30
H_DBI#0
K40
H_DBI#1
A38
H_DBI#2
E29
H_DBI#3
B32
K41
L43
F35
G34
J27
M26
E34
B37
H_D#[0..63] 5
H_DBI#[0..3] 5
H_DSTBP#0 5
H_DSTBN#0 5
H_DSTBP#1 5
H_DSTBN#1 5
H_DSTBP#2 5
H_DSTBN#2 5
H_DSTBP#3 5
H_DSTBN#3 5
MSI
MICRO-STAR INt'L CO., LTD.
MICRO-STAR INt'L CO., LTD.
MICRO-STAR INt'L CO., LTD.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
2
Intel Lakeport - CPU Signals
Intel Lakeport - CPU Signals
Intel Lakeport - CPU Signals
MS-7267
MS-7267
MS-7267
1
2.3
2.3
2.3
834Thursday, November 16, 2006
834Thursday, November 16, 2006
834Thursday, November 16, 2006
1
8
DATA_A[0..63]18
D D
SCS_A#[0..1]18,19
MAA_A[0..13]18,19
ODT_A[0..1]18,19
C C
SBS_A[0..2]18,19
B B
does it need to connect to
GND through a 40 ohm resister?
R333 80.6R1%-LFR333 80.6R1%-LF
VCC_DDR
A A
R337 80.6R1%-LFR337 80.6R1%-LF
C372
C372
C0.1U25Y
C0.1U25Y
SCS_A#0
SCS_A#1
RAS_A#
RAS_A#18,19
CAS_A#
CAS_A#18,19
WE_A#
WE_A#18,19
MAA_A0
MAA_A1
MAA_A2
MAA_A3
MAA_A4
MAA_A5
MAA_A6
MAA_A7
MAA_A8
MAA_A9
MAA_A10
MAA_A11
MAA_A12
MAA_A13
ODT_A0
ODT_A1
SBS_A0
SBS_A1
SBS_A2
DQS_A0
DQS_A018
DQS_A#0
DQS_A#018
DQS_A1
DQS_A118
DQS_A#1
DQS_A#118
DQS_A2
DQS_A218
DQS_A#2
DQS_A#218
DQS_A3
DQS_A318
DQS_A#3
DQS_A#318
DQS_A4
DQS_A418
DQS_A#4
DQS_A#418
DQS_A5
DQS_A518
DQS_A#5
DQS_A#518
DQS_A6
DQS_A618
DQS_A#6
DQS_A#618
DQS_A7
DQS_A718
DQS_A#7
DQS_A#718
P_DDR_A0 P_DDR_B0
P_DDR_A018
N_DDR_A0
N_DDR_A018
P_DDR_A1
P_DDR_A118
N_DDR_A1
N_DDR_A118
P_DDR_A2
P_DDR_A218
N_DDR_A2
N_DDR_A218
SMPCOMP_N
SMPCOMP_P MCH_VREF_AMCH_VREF_B
TP7TP7
TP6TP6
SMPCOMP_P
SMPCOMP_N
8
U21B
U21B
BB37
SACS0#
BA39
SACS1#
BA35
SACS2#
AY38
SACS3#
BA34
SARAS#
BA37
SACAS#
BB35
SAWE#
BA32
SAMA0
AW32
SAMA1
BB30
SAMA2
BA30
SAMA3
AY30
SAMA4
BA27
SAMA5
BC28
SAMA6
AY27
SAMA7
AY28
SAMA8
BB27
SAMA9
AY33
SAMA10
AW27
SAMA11
BB26
SAMA12
BC38
SAMA13
AW37
SAODT0
AY39
SAODT1
AY37
SAODT2
BB40
SAODT3
BC33
SABA0
AY34
SABA1
BA26
SABA2
AU4
SADQS0
AR2
SADQS0#
BA3
SADQS1
BB4
SADQS1#
AY11
SADQS2
BA10
SADQS2#
AU18
SADQS3
AR18
SADQS3#
AU35
SADQS4
AV35
SADQS4#
AP42
SADQS5
AP40
SADQS5#
AG42
SADQS6
AG41
SADQS6#
AC42
SADQS7
AC41
SADQS7#
BB32
SACLK0
AY32
SACLK0#
AY5
SACLK1
BB5
SACLK1#
AK42
SACLK2
AK41
SACLK2#
BA31
SACLK3
BB31
SACLK3#
AY6
SACLK4
BA5
SACLK4#
AH40
SACLK5
AH43
SACLK5#
AL5
MCH_SRCOMP0
AJ6
MCH_SRCOMP1
AJ8
SMOCDCOMP0
AM3
SMOCDCOMP1
(INTEL-QG82945GC-A2-LF)
(INTEL-QG82945GC-A2-LF)
DATA_B[0..63]18
7
DATA_A6
DATA_A0
AP3
SADQ0
7
DATA_A10
DATA_A1
DATA_A8
DATA_A3
DATA_A2
DATA_A7
DATA_A9
DATA_A4
DATA_A11
DATA_A5
BA7
AP2
SADQ1
BB7
AU3
AV4
AN1
AP4
AU5
AU2
AW3
AY3
SADQ2
SADQ3
SADQ4
SADQ5
SADQ6
SADQ7
SADQ8
SADQ9
SADQ10
SBDQ0
SBDQ1
SBDQ2
SBDQ3
SBDQ4
SBDQ5
SBDQ6
SBDQ7
SBDQ8
AL6
AL8
AL9
AP8
AP9
AP6
AV6
AU7
AJ11
AM10
DATA_B4
DATA_B5
DATA_B3
DATA_B7
DATA_B8
DATA_B9
DATA_B0
DATA_B2
DATA_B6
DATA_B1
6
DATA_A16
DATA_A21
DATA_A24
DATA_A25
DATA_A18
DATA_A26
DATA_A22
DATA_A17
DATA_A23
DATA_A14
DATA_A15
DATA_A20
DATA_A12
DATA_A19
DATA_A13
AV1
AW4
BC6
AY7
AW12
AY10
BA12
BB12
BA9
BB9
BC11
SADQ11
SADQ12
SADQ13
SADQ14
SADQ15
SADQ16
SADQ17
SADQ18
SADQ19
SADQ20
SADQ21
SADQ22
SBDQ9
SBDQ10
SBDQ11
SBDQ12
SBDQ13
SBDQ14
SBDQ15
SBDQ16
SBDQ17
SBDQ18
SBDQ19
SBDQ20
AR5
AR7
AV12
AV15
AR12
AR10
AN12
AM11
AM15
AM13
AM17
DATA_B14
DATA_B15
DATA_B11
DATA_B17
DATA_B10
DATA_B20
DATA_B16
DATA_B12
DATA_B13
DATA_B18
DATA_B19
6
DATA_A32
DATA_A31
DATA_A27
DATA_A29
DATA_A33
DATA_A30
DATA_A28
AY12
AM20
AM18
AV20
AM21
AP17
AR17
AP20
AT20
AP32
AV34
SADQ23
SADQ24
SADQ25
SADQ26
SADQ27
SADQ28
SADQ29
SADQ30
SADQ31
SADQ32
SBDQ21
SBDQ22
SBDQ23
SBDQ24
SBDQ25
SBDQ26
SBDQ27
SBDQ28
SBDQ29
SBDQ30
AT15
AT24
AP15
AV24
AP21
AP24
AR13
AR21
AM24
AM23
AM26
DATA_B21
DATA_B23
DATA_B27
DATA_B31
DATA_B30
DATA_B24
DATA_B22
DATA_B28
DATA_B29
DATA_B25
DATA_B26
5
SCKE_A[0..1]18,19
DATA_A37
DATA_A45
DATA_A49
DATA_A41
DATA_A34
DATA_A35
DATA_A38
DATA_A36
AV38
AU39
AV32
AT32
AR34
SADQ33
SADQ34
SADQ35
SADQ36
SADQ37
SADQ38
SBDQ31
SBDQ32
SBDQ33
SBDQ34
SBDQ35
SBDQ36
AP27
AU27
AN29
AR31
AM31
DATA_B34
DATA_B32
DATA_B35
DATA_B36
DATA_B33
DATA_A48
DATA_A43
DATA_A42
DATA_A40
DATA_A39
AU37
AR41
AR42
AN43
AM40
SADQ39
SADQ40
SADQ41
SADQ42
SADQ43
SBDQ37
SBDQ38
SBDQ39
SBDQ40
SBDQ41
AP31
AP35
AP37
AR27
AU31
DATA_B40
DATA_B39
DATA_B41
DATA_B37
DATA_B38
5
DATA_A53
DATA_A44
DATA_A47
DATA_A54
DATA_A55
DATA_A52
DATA_A51
DATA_A46
DATA_A50
AU41
AU42
AP41
AN40
AL41
AL42
AF39
AE40
AM41
AM42
AF41
AF42
SADQ44
SADQ45
SADQ46
SADQ47
SADQ48
SADQ49
SADQ50
SADQ51
SADQ52
SADQ53
SADQ54
SADQ55
SBDQ42
SBDQ43
SBDQ44
SBDQ45
SBDQ46
SBDQ47
SBDQ48
SBDQ49
SBDQ50
SBDQ51
SBDQ52
SBDQ53
AJ34
AL35
AN32
DATA_B42
DATA_B43
AJ32
AL34
AL31
AF32
AF34
AR35
AU38
AM38
AM34
DATA_B46
DATA_B47
DATA_B48
DATA_B52
DATA_B45
DATA_B49
DATA_B44
DATA_B51
DATA_B50
DATA_B53
SCKE_B[0..1]18,19
4
DQM_A[0..7]18
DQM_A6
DQM_A1
DQM_A4
DQM_A2
DQM_A7
DQM_A3
BC24
SACKE2
SBCKE0
BA14
SCKE_B0
BA25
SACKE3
SBCKE1
AY16
SCKE_B1
BA13
SBCKE2
SBCKE3
BB13
DQM_A5
DQM_A0
AC40
AG40
AP39
AT34
AP18
BB10
AY2
AR3
SADM6
SADM5
SADM4
SADM3
SADM2
SADM1
SADM0
SBDM2
SBDM3
SBDM4
SBDM5
SBDM6
SBDM7
AW7
AJ39
AP13
AP23
AR29
AR38
AD39
DQM_B2
DQM_B3
DQM_B1
DQM_B7
DQM_B6
DQM_B5
DQM_B4
DATA_A56
AD40
SADQ56
SBDQ54
AG35
DATA_B54
SCKE_A1
DATA_A61
DATA_A62
DATA_A57
SCKE_A0
DATA_A60
DATA_A58
DATA_A63
DATA_A59
BB25
AY25
AD43
AA39
AA40
AE42
AE41
AB41
AB42
SACKE0
SACKE1
SADQ57
SADQ58
SADQ59
SADQ60
SADQ61
SADQ62
SADQ63
SBDQ55
SBDQ56
SBDQ57
SBDQ58
SBDQ59
SBDQ60
SBDQ61
SBDQ62
SBDQ63
Y32
AF35
AF37
AA32
AD32
AC32
AD34
AC33
AC35
DATA_B61
DATA_B63
DATA_B55
DATA_B57
DATA_B58
DATA_B56
DATA_B60
DATA_B59
DATA_B62
DQM_B[0..7]18
4
SADM7
SBDQS0#
SBDQS1#
SBDQS2#
SBDQS3#
SBDQS4#
SBDQS5#
SBDQS6#
SBDQS7#
SBCLK0#
SBCLK1#
SBCLK2#
SBCLK3#
SBCLK4#
SBCLK5#
SMVREF1
SMVREF0
SBDM0
SBDM1
AL11
DQM_B0
SBCS0#
SBCS1#
SBCS2#
SBCS3#
SBRAS#
SBCAS#
SBWE#
SBMA0
SBMA1
SBMA2
SBMA3
SBMA4
SBMA5
SBMA6
SBMA7
SBMA8
SBMA9
SBMA10
SBMA11
SBMA12
SBMA13
SBODT0
SBODT1
SBODT2
SBODT3
SBBA0
SBBA1
SBBA2
SBDQS0
SBDQS1
SBDQS2
SBDQS3
SBDQS4
SBDQS5
SBDQS6
SBDQS7
SBCLK0
SBCLK1
SBCLK2
SBCLK3
SBCLK4
SBCLK5
BA40
AW41
BA41
AW40
BA23
AY24
BB23
BB22
BB21
BA21
AY21
BC20
AY19
AY20
BA18
BA19
BB18
BA22
BB17
BA17
AW42
AY42
AV40
AV43
AU40
AW23
AY23
AY17
AM8
AM6
AV7
AR9
AV13
AT13
AU23
AR23
AT29
AV29
AP36
AM35
AG34
AG32
AD36
AD38
AM29
AM27
AV9
AW9
AL38
AL36
AP26
AR26
AU10
AT10
AJ38
AJ36
AM2
AM4
3
SCS_B#0
SCS_B#1
RAS_B#
CAS_B#
WE_B#
MAA_B0
MAA_B1
MAA_B2
MAA_B3
MAA_B4
MAA_B5
MAA_B6
MAA_B7
MAA_B8
MAA_B9
MAA_B10
MAA_B11
MAA_B12
MAA_B13
ODT_B0
ODT_B1
SBS_B0
SBS_B1
SBS_B2
DQS_B0
DQS_B#0
DQS_B1
DQS_B#1
DQS_B2
DQS_B#2
DQS_B3
DQS_B#3
DQS_B4
DQS_B#4
DQS_B5
DQS_B#5
DQS_B6
DQS_B#6
DQS_B7
DQS_B#7
N_DDR_B0
P_DDR_B1
N_DDR_B1
P_DDR_B2
N_DDR_B2
MCH_VREF_A
3
SCS_B#[0..1] 18,19
RAS_B# 18,19
CAS_B# 18,19
WE_B# 18,19
MAA_B[0..13] 18,19
ODT_B[0..1] 18,19
SBS_B[0..2] 18,19
DQS_B0 18
DQS_B#0 18
DQS_B1 18
DQS_B#1 18
DQS_B2 18
DQS_B#2 18
DQS_B3 18
DQS_B#3 18
DQS_B4 18
DQS_B#4 18
DQS_B5 18
DQS_B#5 18
DQS_B6 18
DQS_B#6 18
DQS_B7 18
DQS_B#7 18
P_DDR_B0 18
N_DDR_B0 18
P_DDR_B1 18
N_DDR_B1 18
P_DDR_B2 18
N_DDR_B2 18
C370
C370
C0.1U25Y
C0.1U25Y
VCC_DDR
PLACE CLOSE TO MCH
2
C371
PLACE 0.1UF CAP CLOSE TO MCH
R335 1KR1%-1R335 1KR1%-1
MSI
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
2
C371
C0.1U25Y
C0.1U25Y
CP18
CP18
X_COPPER
X_COPPER
R334 X_0R-1R334 X_0R-1
MCH_VREF_A
R336
R336
1KR1%-1
1KR1%-1
MICRO-STAR INt'L CO., LTD.
MICRO-STAR INt'L CO., LTD.
MICRO-STAR INt'L CO., LTD.
Intel Lakeport - Memory Signals
Intel Lakeport - Memory Signals
Intel Lakeport - Memory Signals
MS-7267
MS-7267
MS-7267
1
MCH_VREF_B
934Thursday, November 16, 2006
934Thursday, November 16, 2006
934Thursday, November 16, 2006
1
2.3
2.3
2.3
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