5
4
3
2
1
Cover Sheet
Lunar Water
CPU:
D D
MS-7264
C C
Version 0E
Intel Conroe, Pentium D, Pentium 4
System Chipset:
Intel 965 - GMCH (North Bridge)
Intel ICH8 DO (South Bridge)
On Board Chipset:
BIOS -- SPI FLASH
HD Audio -- ALC262
LPC Super I/O -- SMSC SCH5017
LAN-- NINEVEH 82566
CLOCK -- CY505YC64CT
IDE Controller -- VT6410 IDE
TPM -- SLB9635TT1.2
Block Diagram
Intel LGA775 CPU
CLOCK Generator-CY505YC64CT
Intel 965 - MCH
DDR II System Memory 1 & 2
DDR II VTT Decoupling & TPM1.2
PCI EXPRESS X16 Slot
Intel ICH8 - PCI & DMI & CPU & IRQ
Intel ICH8 - LPC & ATA & USB & GPIO
Intel ICH8 - POWER
RISER Slot & JCR
& SATA Connector
LAN-NINEVEH 82566
VIA VT6410 IDE
Main Memory:
MS-6416N1
MS-7264-0D
MS-4046-2A
B B
MS-4085-0D
MS-4048-3A
MS-4099-0B
ERP Number
604-4046-020
604-4085-D10
604-4048-06S
604-4099-B10
Mainboard
Power Buttom/LED board
Front Audio Board
Front 1394 / USB Board
Riser Card
Functiom
DDR II * 2 (Max 4GB)
Expansion Slots:
PCI EXPRESS X16 SLOT
PCI EXPRESS CARD SLOT
RISER SLOT
Intersil PWM:
Controller: Intersil 6326 3Phase
HD AUDIO-ALC262 & Front Panel
SIO SMSC SCH5017 & FDD
KB/MS/LPT/COM Port /FAN
VGA Connector
USB Connectors
ATX Connetcor & IR
ACPI CONTROLLER MS7
DIMM/GMCH/AMT POWER
1
2
3-5
6
7-10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
VRM11 Intersil 6326 3Phase
28
Model option table
Manual parts
Function
MS-7264-0D
A A
BroadwaterG+ICH8+Giga-Lan+VT6410, ROHS
5
4
BOM Config Model type
Cfg7264-0A-S
3
ERP BOM No.
GPIO & Jumper Setting
Power MAP
History
2
Title
COVER SHEET
Size Document Number Rev
Date: Sheet
MICRO-START INT'L CO.,LTD.
MS-7264 0E
1
29
30
31
32
13 2 Monday, July 31, 2006
of
Block Diagram
1
VRM 11
Intersil 6326
Intel LGA775 Processor
3-Phase PWM
FSB
PCI EXPRESS
X16
Connector
Analog
PCI EXPRESS X16
RGB
Q-965
DDRII
GMCH
DDR II
DIMM
Modules
x2
Video
Out
DMI
PCI X1
VT-6410
A A
SATA 0~1
SATA
USB
ICH8
(DO)
PCI EXPRESS X1
PCI X2
Riser Slot 1
IDE
IDE_1
USB Port 0~7
LPC Bus
TPM1.2-SLB9635TT
LPC SIO
SMSC
SCH5017
ALC262
Audio Codec
GIGA LAN
INTEL 82566
Azalia
LPC Bus
GLCI/LCI
SPI
Line_In
Line_Out
Mouse
Keyboard
..
.
.
.
.
.
.
.
.
.
.
VGA
.....
.....
.....
USB2
USB3
SPI
FLASH
USB5
USB4
.............
............
Keyboard
Floopy Parallel Serial
Mouse
GigaLanPrint Port
Title
Size Document Number Rev
1
Date: Sheet
MICRO-START INT'L CO.,LTD.
BLOCK DIAGRAM
MS-7264
23 2 Monday, July 31, 2006
of
0E
5
4
3
2
1
VSS_CPU_SENSE
VCC_CPU_SENSE
AN3
AN4
AN5
AN6
VSS_SENSE
VCC_SENSE
VSS_MB_REGULATION
VCC_MB_REGULATION
D13#
D12#
D11#
D10#
D9#
B12D8C11
B10
A11
R383 X_1KR1%0402
1 2
R424 0R
C447
X_C22U16Y1210-RH
R420 0R
VID7
VID6
VID3
VID4
VID5
AJ3
AK3
AM5
AL4
AK4
AL6
AM7
VID6#
VID5#
VID4#
RSVD
VID_SELECT
ITP_CLK1
ITP_CLK0
GTLREF_SEL
CS_GTLREF
TESTHI12
TESTHI11
TESTHI10
FORCEPH
LINT1/NMI
D8#
A10A7B7B6A5C6A4C5B4
LINT0/INTR
D7#
D6#
D5#
D4#
D3#
D2#
D1#
VID3#
GTLREF0
GTLREF1
ADSTB1#
ADSTB0#
DSTBP3#
DSTBP2#
DSTBP1#
DSTBP0#
DSTBN3#
DSTBN2#
DSTBN1#
DSTBN0#
D0#
CPU SIGNAL BLOCK
H_A#[3..35] (7)
D D
G11
D19
C20
AB2
AB3
AD3
AD1
AF1
AC1
AG1
AE1
AL1
AK1
AE8
AL2
AH2
AE6
G10
D16
A20
AA2
G29
H30
G30
G23
B22
A22
A19
B19
B21
C21
B18
A17
B16
C18
A8
F2
R3
M3
P3
H4
B2
C1
E3
D2
C3
C2
D4
E4
G8
G7
M2
N2
P2
K3
L2
N5
C9
Y1
V2
N1
U19A
DBI0#
DBI1#
DBI2#
DBI3#
EDRDY#
IERR#
MCERR#
FERR#/PBE#
STPCLK#
BINIT#
INIT#
RSP#
DBSY#
DRDY#
TRDY#
ADS#
LOCK#
BNR#
HIT#
HITM#
BPRI#
DEFER#
TDI
TDO
TMS
TRST#
TCK
THERMDA
THERMDC
THERMTRIP#
GND/SKTOCC#
PROCHOT#
IGNNE#
SMI#
A20M#
TESTI_13
RSVD
RESERVED0
RESERVED1
RESERVED2
RESERVED3
RESERVED4
RESERVED5
BOOTSELECT
LL_ID0
LL_ID1
BSEL0
BSEL1
BSEL2
PWRGOOD
RESET#
D63#
D62#
D61#
D60#
D59#
D58#
D57#
D56#
D55#
D54#
B15
H_DBI#[0..3] (7)
H_IERR# (4)
H_FERR# (4,14)
H_STPCLK# (14)
H_INIT# (14)
H_DBSY# (7)
H_DRDY# (7)
H_TRDY# (7)
H_ADS# (7)
H_LOCK# (7)
H_BNR# (7)
H_HIT# (7)
C C
B B
H_HITM# (7)
H_BPRI# (7)
H_DEFER# (7)
TRMTRIP# (4,14)
H_PROCHOT# (4,28)
H_IGNNE# (14)
ICH_H_SMI# (14)
H_A20M# (14)
VTT_OUT_LEFT H_TEST_C9
VTT_OUT_RIGHT
H_D#[0..63] (7)
R562 51R0402
R387 X_62R0402
H_FSBSEL0 (4,6,9)
H_FSBSEL1 (4,6,9)
H_FSBSEL2 (4,6,9)
H_PWRGD (4,15)
H_CPURST# (4,7)
H_DBI#0
H_DBI#1
H_DBI#2
H_DBI#3
R423 0R0402
H_TDI
H_TDO
H_TMS
H_TRST#
H_TCK
CPU_TMPA_A
VTIN_GND_C
H_SLP#
H_D#63
H_D#62
H_D#61
H_D#60
H_D#59
H_D#58
H_D#57
H_D#56
H_D#55
H_D#54
D53#
H_A#33
H_A#29
H_A#30
H_A#35
H_A#32
H_A#34
H_A#31
AJ6
AJ5
AH5
AH4
AG5
AG4
AG6
A35#
A34#
A33#
A32#
A31#
A30#
D52#
D51#
D50#
D49#
D48#
D47#
D46#
D45#
D44#
D43#
C14
C15
A14
D17
D20
G22
D22
E22
G21
F21
E21
H_A#28
AF4
A29#
A28#
D42#
D41#
F20
H_A#22
H_A#26
H_A#27
AF5
AB4
A27#
D40#
E19
E18
H_A#25
AC5
A26#
A25#
D39#
D38#
F18
H_A#23
H_A#24
AB5
AA5
A24#
D37#
F17
G17
H_A#16
H_A#20
H_A#17
H_A#21
H_A#18
H_A#19
AD6
AA4Y4Y6W6AB6W5V4V5U4U5T4U6T5R4M4L4M5P6L5
A23#
A22#
A21#
A20#
A19#
A18#
A17#
D36#
D35#
D34#
D33#
D32#
D31#
D30#
G18
E16
E15
G16
G15
F15
G14
H_A#15
A16#
D29#
F14
H_A#14
A15#
A14#
D28#
D27#
G13
H_A#12
H_A#13
A13#
D26#
E13
D13
A12#
D25#
F12
H_A#10
A11#
A10#
D24#
D23#
F11
H_A#8
H_A#5
H_A#7
H_A#6
H_A#9
A9#
A8#
A7#
A6#
A5#
D22#
D21#
D20#
D19#
D18#
D10
E10D7E9F9F8G9D11
H_A#4
H_A#3
A4#
D17#
A3#
D16#
D15#
AC2
DBR#
D14#
C12
FP_RST# (15,25)
VCC_VRM_SENSE (28)
VSS_VRM_SENSE (28)
VID[0..7] (28)
VID0
VID1
VID2
AM3
AL5
AM2
VID2#
VID1#
VID0#
AN7
H1
H2
H29
E24
AG3
BPM5#
AF2
BPM4#
AG2
BPM3#
AD2
BPM2#
AJ1
BPM1#
AJ2
BPM0#
G5
PCREQ#
J6
REQ4#
K6
REQ3#
M6
REQ2#
J5
REQ1#
K4
REQ0#
W2
P1
H5
G4
TESTHI9
G3
TESTHI8
F24
TESTHI7
G24
TESTHI6
G26
TESTHI5
G27
TESTHI4
G25
TESTHI3
F25
TESTHI2
W3
TESTHI1
F26
TESTHI0
AK6
G6
RSVD
G28
BCLK1#
F28
BCLK0#
A3
RS2#
F5
RS1#
B3
RS0#
U3
AP1#
U2
AP0#
F3
BR0#
T2
COMP5
J2
COMP4
R1
COMP3
G2
COMP2
T1
COMP1
A13
COMP0
J17
DP3#
H16
DP2#
H15
DP1#
J16
DP0#
AD5
R6
C17
G19
E12
B9
A16
G20
G12
C8
L1
K1
ZIF-SOCK775-15u-in
R384
TP_GTLREF_SEL
H_BPM#5
H_BPM#4
H_BPM#3
H_BPM#2
H_BPM#1
H_BPM#0
PECI
H_REQ#4
H_REQ#3
H_REQ#2
H_REQ#1
H_REQ#0
H_TESTHI12
H_TESTHI11
H_TESTHI10
H_TESTHI9
H_TESTHI8
H_TESTHI2_7
H_TESTHI1
H_TESTHI0
H_RS#2
H_RS#1
H_RS#0
H_COMP5
H_COMP4
H_COMP3
H_COMP2
H_COMP1
H_COMP0
VTT_OUT_RIGHT
_680R0402-1
R558 X_0R0402
R559 X_0R0402
R560 X_0R0402
R561 X_0R0402
PECI (14)
R235 51R0402
R414 51R0402
R234 51R0402
R411 X_62R0402
R426 X_62R0402
H_FORCE# (28)
CK_H_CPU# (6)
CK_H_CPU (6)
TP14
TP2
R396 49.9R1%0402
R379 49.9R1%0402
R380 49.9R1%0402
R419 49.9R1%0402
R386 49.9R1%0402
R281 49.9R1%0402
TP8
TP9
TP10
TP11
H_ADSTB#1 (7)
H_ADSTB#0 (7)
H_DSTBP#3 (7)
H_DSTBP#2 (7)
H_DSTBP#1 (7)
H_DSTBP#0 (7)
H_DSTBN#3 (7)
H_DSTBN#2 (7)
H_DSTBN#1 (7)
H_DSTBN#0 (7)
H_NMI (14)
H_INTR (14)
VRD_VIDSEL (28)
CPU_GTLREF0 (4)
CPU_GTLREF1 (4)
TP3
MCH_GTLREF_CPU (7)
H_TESTHI8
H_TESTHI9
H_TEST_C9
H_REQ#[0..4] (7)
H_TESTHI12 (5)
H_RS#[0..2] (7)
H_SLP#
H_TESTHI10
H_TESTHI9
V_FSB_VTT
TP_CPU_G1 (5)
RN35 8P4R-51R0402
1
2
3
4
5
6
7
8
R418 51R0402
R425 51R0402
VTT_OUT_RIGHT (4,5)
VTT_OUT_LEFT (4,5)
H_BR#0 (4,7)
VTT_OUT_LEFT (4,5)
C408
X_C0.1U16Y0402
VTT_OUT_LEFT
VTT_OUT_RIGHT
C444 C0.1U16Y0402
C443 C0.1U16Y0402
VID4
VID5
VID6
VID7
VID0
VID1
VID2
VID3
BSEL
1
2
0
0
0
1
0
0
CPU_TMPA_A
RN36 8P4R-51R0402
1
2
3
4
5
6
7
8
R398 51R0402
R399 51R0402
R400 _62R0402
R403 _62R0402
R410 X_62R0402
R388 _62R0402
R409 _62R0402
PLACE BPM TERMINATION NEAR CPU
RN37
_8P4R-680R-LF
1
3
5
7
RN38
_8P4R-680R-LF
1
3
5
7
2
4
6
8
2
4
6
8
VTT_OUT_RIGHT
TABLE
FSB FREQUENCY
0
267 MHZ (1067)
0
0
200 MHZ (800)
133 MHZ (533)
1
R382 0R0402
R407 X_0R0402
CPU_TMPA (21)
CPU_TMPA_SST (15)
H_BPM#2
H_BPM#3
H_BPM#0
H_BPM#1
H_BPM#4
H_BPM#5
H_TDI
H_TMS
H_TDO
H_TRST#
H_TCK
H_D#37
H_D#47
H_D#45
H_D#46
H_D#43
H_D#44
H_D#41
H_D#49
H_D#51
H_D#48
H_D#52
H_D#50
H_D#53
A A
5
H_D#39
H_D#38
H_D#35
H_D#36
H_D#34
H_D#33
4
H_D#40
H_D#42
H_D#31
H_D#32
H_D#30
H_D#29
H_D#28
H_D#27
H_D#26
H_D#25
H_D#24 H_A#11
H_D#23
H_D#22
H_D#21
H_D#20
H_D#18
H_D#19
H_D#17
H_D#16
H_D#15
H_D#14
H_D#13
H_D#12
H_D#11
H_D#10
H_D#8
H_D#9
H_D#6
H_D#7
H_D#4
H_D#5
H_D#3
H_D#2
H_D#0
H_D#1
VTIN_GND_C
R381 0R0402
R402 X_0R0402
Title
Size Document Number Rev
3
2
Date: Sheet
MICRO-START INT'L CO.,LTD.
INTEL LGA775 CPU SIGNAL
MS-7264
1
VTIN_GND (21)
VTIN_GND_SST (15)
33 2 Monday, July 31, 2006
of
0E
5
VCCP
AH26
AH25
AH22
AH21
AH19
AH18
AH15
AH14
AH12
AH11
AG9
AG8
AG30
AG29
AG28
AG27
AG26
AG25
AG22
AG21
AG19
AG18
AG15
AG14
AG12
AG11
AF9
AF8
AF22
AF21
AF19
AF18
AF15
AF14
AF12
AF11
AE23
AE22
AE21
AE19
AE18
AE15
AE14
AE12
AE11
AD30
AD29
AD28
AD27
AD26
AD25
AD24
AD23
AC30
AC29
AC28
AC27
AC26
AC25
AC24
AC23
AE9
AD8
AC8
AB8
AA8
VCCP
U19B
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
T30T8U23
U24
U25
U26
U27
U28
U29
U30U8V8
W23
W24
W25
W26
W27
W28
W29
W30W8Y23
Y24
Y25
Y26
Y27
Y28
Y29
Y30
Y8
VCCP
D D
C C
AH27
VCC
VCC
T29
AH28
T28
VCC
VCC
AH29
VCC
VCC
T27
AH30
VCC
VCC
T26
AH8
T25
VCC
VCC
AH9
T24
VCC
VCC
AJ11
4
VCC
VCC
AJ12
VCC
VCC
AJ14
VCC
VCC
AJ15
VCC
VCC
AJ18
N30N8P8R8T23
VCC
VCC
AJ19
N29
VCC
VCC
AJ21
N28
VCC
VCC
AJ22
N27
VCC
VCC
AJ25
N26
VCC
VCC
AJ26
N25
VCC
VCC
3
AJ8
AJ9
AK11
AK12
AK14
AK15
AK18
AK19
AK21
AK22
AK25
AK26
AK8
AK9
AL11
AL12
AL14
AL15
AL18
AL19
AL21
AL22
AL25
AL26
AL29
AL30
AL8
AL9
AM11
AM12
AM14
AM15
AM18
AM19
AM21
AM22
AM25
AM26
AM29
AM30
AM8
AM9
AN11
AN12
AN14
AN15
AN18
AN19
AN21
AN22
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
A23
VCCA
B23
VSSA
D23
VCCPLL
C23
VCC-IOPLL
A25
VTT
A26
VTT
A27
VTT
A28
VTT
A29
VTT
A30
VTT
B25
VTT
B26
VTT
B27
VTT
B28
VTT
B29
VTT
B30
VTT
C25
VTT
C26
VTT
C27
VTT
C28
VTT
C29
VTT
C30
VTT
D25
VTT
D26
VTT
D27
VTT
D28
VTT
D29
VTT
D30
VTT
AM6
VTTPWRGD
VTT_SEL
HS1
HS2
123
RSVD
HS3
HS4
4
AA1
J1
F27
F29
ZIF-SOCK775-15u-in
VTT_OUT_RIGHT
VTT_OUT_LEFT
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
AN25
AN26
AN29
AN30
AN8
AN9
J10
J11
J12
J13
J14
J15
J18
J19
J20
J21
J22
J23
J24
J25
J26
J27
J28
J29
J30J8J9
K23
K24
K25
K26
K27
K28
K29
K30K8L8
M23
M24
M25
M26
M27
M28
M29
M30M8N23
N24
2
H_VCCA
H_VSSA
H_VCCPLL
H_VCCIOPLL
VTT_PWG
VTT_OUT_RIGHT
VTT_OUT_LEFT
V_FSB_VTT
VTT_SEL (26)
1
V_FSB_VTT
C226 C10U10Y0805
C227 C10U10Y0805
C228 C10U10Y0805
CAPS FOR FSB GENERIC
VTT_OUT_LEFT
GTLREF VOLTAGE SHOULD BE
0.63*VTT = 0.756V
B B
VTT_OUT_LEFT
R405 _124R1%0402-LF
R408 _124R1%0402-LF
CPU_GTLR0
R406
_210R1%0402
CPU_GTLR1
R404
_210R1%0402
R391 _10R0402-LF
C406
C1U10X
R390 _10R0402-LF
C407
C1U10X
C389
C220P16X0402
C388
C220P16X0402
CPU_GTLREF0 (3)
CPU_GTLREF1 (3)
V_FSB_VTT
10U125m_0805-1
V_FSB_VTT
PLACE AT CPU END OF ROUTE
H_PROCHOT#
V_1P5_ICH
R417
10KR0402
R416
X_0R0402-LF-1
VTT_OUT_RIGHT (3,5)
VTT_OUT_LEFT (3,5)
A A
VTT_OUT_RIGHT
VTT_OUT_LEFT
5
R415 X_130R1%0402-LF CP5 X_COPPER
R393 _62R0402
R394 X_100R0402-1
R421 _62R0402
R413 _62R0402
V_FSB_VTT
PLACE AT ICH END OF ROUTE
R412 _62R0402
R395 _62R0402
H_PROCHOT#
H_IERR#
H_PWRGD
H_BR#0
H_CPURST#
TRMTRIP# (3,14)
H_FERR# (3,14)
H_PROCHOT# (3,28)
H_IERR# (3)
H_PWRGD (3,15)
H_BR#0 (3,7)
H_CPURST# (3,7)
4
PLACE COMPONENTS AS CLOSE AS POSSIBLE TO PROCESSOR SOCKET
TRACE WIDTH TO CAPS MUST BE SMALLER THAN 12MILS
L17
R233
_0R0805-LF
L15 10U125m_0805-1 R430
C211
_C22U6.3X50805
C230
C0.1U16Y0402
THERM# (15)
1 2
VCC3 VCC3
R429
10KR0402
R428
10KR0402
Q64
Q63
N-SST3904_SOT23
N-SST3904_SOT23
3
C216
X_C1U10X
H_VCCPLL
C224
C10U10Y0805
H_VCCIOPLL
H_VCCA
C1U10X
C225
H_VSSA
FSBSEL RESISTOR CAN BE REMOVED IF ONLY TEJAS
AND CEDAR MILL ARE SUPPORTED
V_FSB_VTT
100mA
100mA
RN12
H_FSBSEL1
1
2
H_FSBSEL0
3
4
H_FSBSEL2
5
6
7
8
_8P4R-470R0402-LF
V_FSB_VTT
R573 X_10KR0402
H_FSBSEL1 (3,6,9)
H_FSBSEL0 (3,6,9)
H_FSBSEL2 (3,6,9)
2
VID_GD# (26,28)
VTT_PWG SPEC :
High > 0.9V
Low < 0.3V
Trise < 150ns
VTT_OUT_RIGHT
VCC5_SB
C603
X_C1U10X
Title
Size Document Number Rev
Date: Sheet
R427 _680R0402-1
1KR0402
R431 4.7KR0402-1
Q81
X_N-SST3904_SOT23
MICRO-START INT'L CO.,LTD.
INTEL LGA775 POWER
VTT_PWG
Q65
N-SST3904_SOT23
MS-7264
1
43 2 Monday, July 31, 2006
C448
X_C1U10X
of
0E
5
4
3
2
1
MSID1 MSID0
VTT_OUT_RIGHT (3,4)
D D
U19C
A12
VSS
A15
VSS
A18
VSS
A2
VSS
A21
VSS
A24
VSS
A6
R564
X_1KR0402
C C
AA23
AA24
AA25
AA26
AA27
AA28
AA29
AA3
AA30
AA6
AA7
AB1
AB23
AB24
AB25
AB26
AB27
AB28
AB29
AB30
AB7
AC3
AC6
AC7
AD4
AD7
AE10
AE13
AE16
AE17
AE2
AE20
AE24
AE25
AE26
AE27
AE28
VSS
A9
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
TP5
TP4
TP13
R385
R392
49.9R1%0402
49.9R1%0402
H_COMP7
H_COMP6
Y3
AE3
AE4D1D14
E23E5E6E7F23F6B13J3N4P5V1W1AC4Y7Y5Y2W7W4V7V6V30V3V29
RSVD
RSVD
RSVD
COMP6
COMP7
VSS
VSS
VSS
VSS
VSS
VSS
AE29
AE30
AE5
AE7
AF10
AF13
AF16
RSVD
VSS
AF17
VSS
AF20
RSVD
VSS
AF23
RSVD
VSS
AF24
RSVD
VSS
AF25
R422 51R0402
RSVD
IMPSEL#
VSS
VSS
AF26
24.9R1%0402
R279
H_COMP8
RSVD
VSS
VSS
VSS
AF27
AF28
AF29
AF3
RSVD
VSS
AF30
RSVD
VSS
AF6
RSVD
VSS
2005 Perf FMB 0 0
2005 Value FMB 0 NC
2006 65W FMB 0 NC
R389 51R0402
R401 51R0402
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
AH1
VSS
VSS
AH10
VSS
AH13
VSS
AH16
AH17
VSS
VSS
VSS
AH20
RSVD
MSID[1]
MSID[0]
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
AF7
AG10
AG13
AG16
AG17
AG20
AG23
AG24
AG7
VSS
VSS
AH23
V28
VSS
VSS
AH24
V27
AH3
VSS
VSS
V26
AH6
VSS
VSS
V25
AH7
VSS
VSS
V24
VSS
VSS
AJ10
H_TESTHI12 (3)
V23U7U1T7T6T3R7R5R30
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
AJ13
AJ16
AJ17
AJ20
AJ23
AJ24
AJ27
AJ28
AJ29
VSS
VSS
R29
AJ30
VSS
VSS
H17
H18
H19
H20
H21
H22
H23
H24
H25
H26
H27
H28
VSS
VSS
AM28
AM4
VSS
VSS
VSS
AN1
VSS
VSS
VSS
VSS
AN10
VSS
VSS
AN13
H3H6H7H8H9J4J7
VSS
VSS
AN16
VSS
AN17
AN2
VSS
VSS
VSS
VSS
AN20
VSS
VSS
AN23
VSS
VSS
AN24
VSS
VSS
VSS
VSS
AN27
AN28B1B11
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
B14
ZIF-SOCK775-15u-in
H14
H13
H12
H11
H10
G1
F7
F4
F22
F19
F16
F13
F10
E8
E29
E28
E27
E26
E25
E20
E2
E17
E14
E11
D9
D6
D5
D3
D24
D21
D18
D15
D12
C7
C4
C24
C22
C19
C16
C13
C10
B8
B5
B24
B20
B17
R563 51R0402
TP_CPU_W29
TP_CPU_G1 (3)
VTT_OUT_LEFT (3,4)
TP26
R28
R27
R26
R25
R24
R23R2P7P4P30
P29
P28
P27
P26
P25
P24
P23N7N6N3M7M1L7L6L30L3L29
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
AJ4
AJ7
AK10
AK13
AK16
AK17
AK2
AK20
AK23
AK24
AK27
AK28
AK29
AK30
AK5
AK7
AL10
AL13
AL16
AL17
AL20
AL23
VSS
VSS
AL24
VSS
VSS
AL27
VSS
VSS
AL28
VSS
VSS
L28
L27
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
AL3
AL7
AM1
AM10
L26
VSS
VSS
AM13
L25
VSS
VSS
AM16
L24
VSS
VSS
AM17
L23K7K5
VSS
VSS
AM20
AM23
VSS
VSS
VSS
VSS
AM24
K2
VSS
VSS
AM27
B B
7
8
9
2
MH6
A A
5
4
3
9
2
MH7
6
5
3
4
7
8
6
5
3
4
7
8
9
2
MH8
9
2
MH5
2
6
5
3
4
7
8
6
5
3
4
Title
Size Document Number Rev
Date: Sheet
MICRO-START INT'L CO.,LTD.
INTEL LGA775 GND
MS-7264
1
53 2 Monday, July 31, 2006
0E
of
5
VCC3
X_HK4_80L3_70_0805
D D
C C
H_FSBSEL0
H_FSBSEL2
VDD_CK
B B
H_FSBSEL2
FB1
R143
1KR0402
R150
4.7KR0402-1
VDD_CK
C140
C0.1U16Y0402
C160
C0.1U16Y0402
C173
C0.1U16Y0402
C119
C0.1U16Y0402
C144
C0.1U16Y0402
C194
C0.1U16Y0402
R165 X_0R0402
R145 X_0R0402
1 2
1 2
1 2
1 2
1 2
1 2
Q33
N-SST3904_SOT23
Q38
N-SST3904_SOT23
C193
C1U6.3X50402
C125
C1U6.3X50402
C170
C1U6.3X50402
C183
C1U6.3X50402
C152
C1U6.3X50402
C155
C1U6.3X50402
CK_FSBSEL0
CK_FSBSEL2
R179
1KR0402
Q40
N-SST3904_SOT23
R168
4.7KR0402-1
Q43
N-SST3904_SOT23
CK_PWRGD (15,19)
SMBDATA (13,15,17,21)
SMBCLK (13,15,17,21)
SMBCLK_ISO (11,21,26)
SMBDATA_ISO (11,21,26)
VDD_CK
H_FSBSEL0
Mounting Holes
7
8
9
2
MH2
A A
9
2
MH9
6
5
3
4
7
8
6
5
3
4
5
7
8
9
2
MH4
9
2
MH1
3
4
8
3
KB_GND
6
5
7
6
5
4
7
8
9
2
MH3
9
2
MH10
6
5
3
4
7
8
6
5
3
4
L_GND
4
VDD_CK
VDD_CLK_IO
IO_VOUT
PLL_XI
PLL_XO
FSB
R128 X_0R0402
R118 X_0R0402
R117 0R0402
R127 0R0402
X_J3
SIM3
X_J1
SIM1 SIM2
Optics Orientation Holes
FM3
FM8
FM4
FM2
FM1
FM7
R594 0R
R595 0R
4
FM11
FM10
FM9
FM12
FM6
FM5
For EMI reserver
L_GND
X_J2
16
9
2
61
39
55
12
20
26
45
36
49
48
60
59
56
57
64
63
15
19
11
52
8
58
23
29
42
U11
VDD
VDD48
VDDPCI
VDDREF
VDDSRC
VDDCPU
VDD96I/O
VDDPLL3I/O
VDDSRCI/O
VDDSRCI/O
VDDSRCI/O
VIN
VOUT
X1
X2
CK_PWRGD/PD#
FSLB/TEST_MODE
SCLK
SDATA
GND
GND
GND48
GNDCPU
GNDPCI
GNDREF
GNDSRC
GNDSRC
GNDSRC
CY505YC64CT
VCC3_SB
CPUCLKT0
CPUCLKC0
CPUCLKT1
CPUCLKC1
CPUT2_ITP/SRCT8
CPUC2_ITP/SRCC8
DOTC_96/SRCC0
DOTT_96/SRCT0
SRCCLKT1/SE1
SRCCLKC1/SE2
SRCCLKT2/SATACL
SRCCLKC2/SATACL
SRCCLKT3/CR#_C
SRCCLKC3/CR#_D
SRCCLKT4
SRCCLKC4
PCI_STOP#/SRCT5
CPU_STOP#/SRCC5
SRCCLKT6
SRCCLKC6
SRCCLKT7/CR#_F
SRCCLKC7/CR#_E
SRCCLKT9
SRCCLKC9
SRCCLKT10
SRCCLKC10
SRCCLKT11/CR#_H
SRCCLKC11/CR#_G
PCICLK0/CR#_A
PCICLK1/CR#_B
PCICLK2/LTE
PCICLK4/SRC5_EN
PCI_F5/ITP_EN
USB_48MHZ/FSLA
FSLC/TST_SL/REF
R137 X_0R
SLP_M (15,27)
G
P-SI2303BDS-T1-E3_SOT23-3-RH
IO_VOUT
3
54
53
51
50
47
46
14
13
17
18
21
22
24
25
27
28
38
37
41
40
44
43
30
31
34
35
33
32
1
3
4
5
PCICLK3
6
7
10
62
Trace length less than 0.5inchs
FB2
D S
80L3_70_0805
Q37
R101 33R0402-2
C116
X_C10P50N
3
R154 33R0402-2
CK_H_CPU CPUCLK
R158 33R0402-2
CPUCLK#
MCHCLK
MCHCLK#
CK_DOT96#
CK_DOT96
CK_PE_SRC1
CK_PE_SRC1#
CK_PE_SRC2
CK_PE_SRC2#
CK_PE_SRC3
CK_PE_SRC3#
CK_PE_SRC4
CK_PE_SRC4#
CK_PE_SRC5
CK_PE_SRC5#
CK_PE_SRC6
CK_PE_SRC6#
CK_PE_SRC7
CK_PE_SRC7#
CK_PE_SRC9# CK_PE_100M_PCIE1#
CK_PE_SRC10
CK_PE_SRC10#
PCICLK0
PCICLK1
PCICLK2
PCICLK4
PCICLK6 ICH_PCLK
USB_48M
CK_14M
C150
C163
X_C10P25N0402
X_C10P25N0402
PCICLK4
VDD_CK
VDD_CK
R110
15R0805
Q30
N-SST3904_SOT23
C165
C171
C10U10Y0805
C0.1U16Y0402
C142
C10U10Y0805
C0.1U16Y0402
R183 0R0402
R186 0R0402
R155 1KR0402
R138 1KR0402
R136
X_10KR0402
+
C128
X_C10U6.3X51206
VDD_CLK_IO
C187
R156 33R0402-2
R162 33R0402-2
R163 33R0402-2
R157 33R0402-2
R174 PP_33R0402-2
R178 PP_33R0402-2
R180 33R0402-2
R182 33R0402-2
R184 33R0402-2
R187 33R0402-2
R189 33R0402-2
R196 33R0402-2
R177 33R0402-2
R181 33R0402-2
R169 PP_33R0402-2
R176 PP_33R0402-2
R190 PP_33R0402-2
R197 PP_33R0402-2
R201 PP_33R0402-2
R195 PP_33R0402-2
R126 22R0402
R547 33R0402-2
R132 33R0402-2
R141 33R0402-2
R146 22R0402
R130 22R0402
R149 22R0402
R152 33R0402-2
R131 33R0402-2
R135 33R0402-2
R144 _10KR0402
FB3
X_80L3_70_0805
C130
C10U10Y0805
C0.1U16Y0402
CK_H_CPU#
CK_H_MCH
CK_H_MCH#
CK_96M_DREF#
CK_96M_DREF
CK_ICHSATA
CK_ICHSATA#
CK_PE_100M_16PORT
CK_PE_100M_16PORT#
CK_PE_100M_ICH
CK_PE_100M_ICH#
PCI_STOP#
CPU_STOP#
CK_PE_100M_MCH
CK_PE_100M_MCH#
CK_PE_100M_PCIE1 CK_PE_SRC9
PCI_CLK0
PCI_CLK2
RAIDCLK
TPM_PCLK PCICLK3
PCI_CLK1
SIO_PCLK
CK_48M_USB_ICH
SIO_14
CK_14M_ICH
CK_FSBSEL0
CK_FSBSEL2
C188
VCC3
C190
2
C180
C10U10Y0805
C0.1U16Y0402
2
CK_H_CPU (3)
CK_H_CPU# (3)
CK_H_MCH (7)
CK_H_MCH# (7)
CK_96M_DREF# (9)
CK_96M_DREF (9)
CK_PE_100M_CARD3 (17)
CK_PE_100M_CARD3# (17)
CK_ICHSATA (15)
CK_ICHSATA# (15)
CK_PE_100M_16PORT (13)
CK_PE_100M_16PORT# (13)
CK_PE_100M_ICH (14)
CK_PE_100M_ICH# (14)
PCI_STOP# (15)
CPU_STOP# (15)
CK_PE_100M_MCH (9)
CK_PE_100M_MCH# (9)
CK_PE_100M_CARD1 (17)
CK_PE_100M_CARD1# (17)
CK_PE_100M_PCIE1 (17)
CK_PE_100M_PCIE1# (17)
CK_PE_100M_CARD2 (17)
CK_PE_100M_CARD2# (17)
PCI_CLK0 (17)
PCI_CLK2 (17)
RAIDCLK (19)
TPM_PCLK (12)
PCI_CLK1 (17)
SIO_PCLK (21)
ICH_PCLK (14)
CK_48M_USB_ICH (15)
SIO_14 (21)
CK_14M_ICH (15)
PCI_CLK0
SIO_PCLK
RAIDCLK
PCI_CLK1
PCI_CLK2
ICH_PCLK
TPM_PCLK
CK_48M_USB_ICH
SIO_14
CK_14M_ICH
Title
Size Document Number Rev
Date: Sheet
1
FSC FSB FSA CPU
Bit7 Bit6 Bit5 MHz
0 0 0 266.66
0 0 1 133.33
0 1 0 200.00
0 1 1 166.66
1 0 0 333.33
1 0 1 100.00
1 1 0 400.00
PCI_STOP#
CPU_STOP#
H_FSBSEL1 (3,4,9)
H_FSBSEL0 (3,4,9)
H_FSBSEL2 (3,4,9)
C132
C47P50N0402
C131
C47P50N0402
R198 X_0R0402
R199 X_0R0402
H_FSBSEL1 FSB
H_FSBSEL0 USB_48M
H_FSBSEL2
VDD_CK
R151
_47KR0402-1
CK_14M_ICH
R148
33KR0402
PLL_XI
Y1
14.318MHZ32P_D-1-RH
PLL_XO
CK_PE_100M_ICH
CK_PE_100M_ICH#
R147 1KR0402
R160 X_10KR0402
R142 X_10KR0402
R161
_47KR0402-1
CK_48M_USB_ICH
R153
33KR0402
For EMI reserver
C135 C22P50N0402
C141 C22P50N0402
C148 C22P50N0402
C157 C22P50N0402
C586 C22P50N0402
C162 C22P50N0402
C154 C22P50N0402
C166 X_C10P25N0402
C145 X_C10P25N0402
C156 X_C10P25N0402
MICRO-START INT'L CO.,LTD.
CLOCK Generator-CY505YC64CT
Monday, July 31, 2006
MS-7264
1
6
CK_14M
0E
of
32
5
4
3
2
1
V_FSB_VTT
P29
P27
P26
P24
P23
N29
N26
N24
N23
M29
M24
M23
L24
L23
K24
K23
J24
J23
H24
H23
G26
G24
G23
F26
F24
F23
E29
E27
E26
E23
D29
D28
D27
C30
C29
C27
B30
B29
B28
B27
A30
A28
R27
R26
R24
R23
AG19
AG18
AG17
VTT_45
VCC_44
AA21
AA19
VTT_46
VCC_45
VCC_46
AA13
AA3
VCC_84
VCC_85
VCC_47
VCC_48
Y24
Y22
3
AG15
VCC_86
VCC_87
VCC_49
VCC_50
Y20
J42
L39
J40
L37
L36
K42
N32
N34
M38
N37
M36
R34
N35
N38
U37
N39
R37
P42
R39
V36
R38
U36
U33
R35
V33
V35
Y34
V42
V38
Y36
Y38
Y39
AA37
M34
U34
F40
L35
L38
G43
J37
W40
Y40
W41
T43
Y43
U42
V41
AA42
W42
G39
U40
U41
AA41
U39
R32
U32
AM17
C31
AM18
J13
D23
C25
D25
B25
D24
B24
V_1P25_CORE
R263
49.9R1%0402
R264
49.9R1%0402
U22A
HA3#
HA4#
HA5#
HA6#
HA7#
HA8#
HA9#
HA10#
HA11#
HA12#
HA13#
HA14#
HA15#
HA16#
HA17#
HA18#
HA19#
HA20#
HA21#
HA22#
HA23#
HA24#
HA25#
HA26#
HA27#
HA28#
HA29#
HA30#
HA31#
HA32#
HA33#
HA34#
HA35#
HADSTB0#
HADSTB1#
HREQ0#
HREQ1#
HREQ2#
HREQ3#
HREQ4#
HADS#
HTRDY#
HDRDY#
HDEFER#
HITM#
HHIT#
HLOCK#
HBREQ0#
HBNR#
HBPRI#
HDBSY#
HRS0#
HRS1#
HRS2#
HCLKP
HCLKN
PWROK
HCPURST#
RSTIN#
ICH_SYNC#
HRCOMP
HSCOMP
HSCOMP#
HSWING
HDVREF
HAVREF
C265
X_C2.7P25N0402
C266
X_C2.7P25N0402
VTT_1
VTT_2
VTT_3
VCC_1
VCC_2
AJ12
AJ11
AJ10
HXSCOMP
HXSCOMPB
VTT_4
VTT_5
VCC_3
VCC_4
AJ9
VTT_6
VCC_5
AJ8
VTT_7
VCC_6
AJ7
VTT_8
VCC_7
AJ6
VTT_9
VCC_8
AJ5
VTT_10
VTT_11
VTT_12
VTT_13
VTT_14
VTT_15
VTT_16
VTT_17
VTT_18
VTT_19
VTT_20
VTT_21
VTT_22
VTT_23
VTT_24
VTT_25
VTT_26
VTT_27
VTT_28
VCC_9
VCC_10
VCC_11
VCC_12
VCC_13
VCC_14
VCC_15
VCC_16
VCC_17
VCC_18
VCC_19
VCC_20
VCC_21
VCC_22
VCC_23
VCC_24
VCC_25
VCC_26
VCC_27
AJ4
AJ3
AJ2
AH4
AH2
AH1
AG13
AG12
AG11
AG10
AG9
AG8
AG7
AG6
AG5
AG4
AG3
AG2
AF13
HD_SWING VOLTAGE "10 MIL TRACE , 7 MIL
SPACE" HD_SWING S/B 1/4*VTT +/- 2%
PLACE DIVIDER RESISTOR NEAR VTT
V_FSB_VTT
R254
301R1%0402
R253
100R1%0402
4
VTT_29
VTT_30
VTT_31
VTT_32
VCC_28
VCC_29
VCC_30
VCC_31
AF12
AF11
AD24
AD22
R261
51R0402
C249
C0.01U16X0402
VTT_33
VCC_32
AD20
AC25
VTT_34
VTT_35
VCC_80
VCC_34
AC23
AC21
VTT_36
VTT_37
VCC_35
VCC_36
AC19
AC13
HXSWING
VTT_38
VTT_39
VCC_37
VCC_38
AC6
AB24
VTT_40
VTT_41
VCC_39
VCC_40
AB22
AB20
VTT_42
VTT_43
VCC_41
VCC_42
AA25
AA23
VTT_44
VCC_43
PLTRST# (12,14,17,21)
H_A#3
H_A#4
H_A#5
H_A#6
H_A#7
H_A#8
H_A#9
H_A#10
H_A#11
H_A#12
H_A#13
H_A#14
H_A#15
H_A#16
H_A#17
H_A#18
H_A#19
H_A#20
H_A#21
H_A#22
H_A#23
H_A#24
H_A#25
H_A#26
H_A#27
H_A#28
H_A#29
H_A#30
H_A#31
H_A#32
H_A#33
H_A#34
H_A#35
H_REQ#0
H_REQ#1
H_REQ#2
H_REQ#3
H_REQ#4
H_RS#0
H_RS#1
H_RS#2
HXRCOMP
HXSCOMP
HXSCOMPB
HXSWING
MCH_GTLREF
V_FSB_VTT
V_FSB_VTT
H_A#[3..35] (3)
D D
C C
B B
A A
H_REQ#[0..4] (3)
H_RS#[0..2] (3)
R268
16.9R1%
5
H_ADSTB#0 (3)
H_ADSTB#1 (3)
H_ADS# (3)
H_TRDY# (3)
H_DRDY# (3)
H_DEFER# (3)
H_HITM# (3)
H_HIT# (3)
H_LOCK# (3)
H_BR#0 (3,4)
H_BNR# (3)
H_BPRI# (3)
H_DBSY# (3)
CK_H_MCH (6)
CK_H_MCH# (6)
PWRGD_3V (15,26)
H_CPURST# (3,4)
ICH_SYNC# (15)
V_1P25_CORE
AG14
AF26
AF25
AF24
AF22
AF20
AF18
AF17
AF15
AF14
AE27
AE26
AE25
AE23
AE21
AE19
AE17
AD27
AD26
AD18
AD17
AD15
AD14
AC27
VCC_88
VCC_89
VCC_90
VCC_91
VCC_93
VCC_94
VCC_95
VCC_96
VCC_97
VCC_98
VCC_99
VCC_100
VCC_101
VCC_102
VCC_103
VCC_104
VCC_105
VCC_106
VCC_107
VCC_108
VCC_109
VCC_110
VCC_111
VCC_112
VCC_51
VCC_52
VCC_53
VCC_54
VCC_55
VCC_56
VCC_57
VCC_58
VCC_59
VCC_60
VCC_61
VCC_62
VCC_63
VCC_64
VCC_65
VCC_66
VCC_67
VCC_68
VCC_69
VCC_70
VCC_71
VCC_72
VCC_73
VCC_74
Y13Y6V13
V12
V10V9U13
U10U9U6U3N12
N11N9N8N6N3L6J6J3J2G2F11F9D4
GTLREF VOLTAGE SHOULD BE 0.63*VTT=0.756V
124 OHM OVER 210 RESISTORS
V_FSB_VTT
_124R1%0402-LF
MCH_GTLREF_CPU
R262
51R0402
C250
C1U16Y
MCH_GTLREF
C260
X_C2200P50X
R248
R246
_210R1%0402
AC26
AC17
AC15
AC14
AB27
AB26
AB18
AB17
VCC_113
VCC_114
VCC_115
VCC_116
VCC_117
VCC_118
VCC_119
VCC_120
VCC_75
VCC_76
VCC_77
VCC_78
VCC_79
VCC_81
VCC_82
VCC_83
C13C9P20
Y11
AG25
AG21
AG20
MCH_GTLREF_CPU (3)
AA27
AA26
HD0
HD1
HD2
HD3
VCC_121
VCC_122
HD4
HD5
HD6
HD7
HD8
HD9
HD10
HD11
HD12
HD13
HD14
HD15
HD16
HD17
HD18
HD19
HD20
HD21
HD22
HD23
HD24
HD25
HD26
HD27
HD28
HD29
HD30
HD31
HD32
HD33
HD34
HD35
HD36
HD37
HD38
HD39
HD40
HD41
HD42
HD43
HD44
HD45
HD46
HD47
HD48
HD49
HD50
HD51
HD52
HD53
HD54
HD55
HD56
HD57
HD58
HD59
HD60
HD61
HD62
HD63
HDINV#0
HDINV#1
HDINV#2
HDINV#3
HDSTBP0#
HDSTBN0#
HDSTBP1#
HDSTBN1#
HDSTBP2#
HDSTBN2#
HDSTBP3#
HDSTBN3#
Broadwater-GC
2
R40
P41
R41
N40
R42
M39
N41
N42
L41
J39
L42
J41
K41
G40
F41
F42
C42
D41
F38
G37
E42
E39
E37
C39
B39
G33
A37
F33
E35
K32
H32
B34
J31
F32
M31
E31
K31
G31
K29
F31
J29
F29
L27
K27
H26
L26
J26
M26
C33
C35
E41
B41
D42
C40
D35
B40
C38
D37
B33
D33
C34
B35
A32
D32
M40
J33
G29
E33
L40
M43
G35
H33
G27
H27
B38
D38
H_D#0
H_D#1
H_D#2
H_D#3
H_D#4
H_D#5
H_D#6
H_D#7
H_D#8
H_D#9
H_D#10
H_D#11
H_D#12
H_D#13
H_D#14
H_D#15
H_D#16
H_D#17
H_D#18
H_D#19
H_D#20
H_D#21
H_D#22
H_D#23
H_D#24
H_D#25
H_D#26
H_D#27
H_D#28
H_D#29
H_D#30
H_D#31
H_D#32
H_D#33
H_D#34
H_D#35
H_D#36
H_D#37
H_D#38
H_D#39
H_D#40
H_D#41
H_D#42
H_D#43
H_D#44
H_D#45
H_D#46
H_D#47
H_D#48
H_D#49
H_D#50
H_D#51
H_D#52
H_D#53
H_D#54
H_D#55
H_D#56
H_D#57
H_D#58
H_D#59
H_D#60
H_D#61
H_D#62
H_D#63
H_DBI#0
H_DBI#1
H_DBI#2
H_DBI#3
H_D#[0..63] (3)
U22_X1
X5
MCH
X6
X7
X8
Heatsink
MCH_HS
H_DBI#[0..3] (3)
H_DSTBP#0 (3)
H_DSTBN#0 (3)
H_DSTBP#1 (3)
H_DSTBN#1 (3)
H_DSTBP#2 (3)
H_DSTBN#2 (3)
H_DSTBP#3 (3)
H_DSTBN#3 (3)
V_FSB_VTT
C270
C0.1U16Y0402
C284
C0.1U16Y0402
Title
Size Document Number Rev
Date: Sheet
C276
C0.1U16Y0402
MICRO-START INT'L CO.,LTD.
INTEL Broaswater -CPU signal
MS-7264
1
X1
X2
X3
X4
73 2 Monday, July 31, 2006
0E
of
5
4
3
2
1
SCKE_B[0..1] (11,12)
DQM_B[0..7] (11)
DATA_B[0..63] (11)
SCKE_B0
DATA_B23
DATA_B22
AV15
AW17
SDQ_B21
SDQ_B22
SDQ_B23
SDQ_A21
SDQ_A22
SDQ_A23
BA10
BB10
DATA_A23
DATA_A22
DATA_B24
DATA_B26
DATA_B25
AV24
AT23
AT26
SDQ_B24
SDQ_B25
SDQ_B26
SDQ_A24
SDQ_A25
SDQ_A26
AT18
AR18
AU21
DATA_A26
DATA_A24
DATA_A25
DATA_B28
DATA_B29
DATA_B27
AP26
AU23
AW23
SDQ_B27
SDQ_B28
SDQ_B29
SDQ_A27
SDQ_A28
SDQ_A29
AT21
AP17
AN17
DATA_A28
DATA_A27
DATA_A29
DATA_B31
DATA_B32
DATA_B30
AR24
AN26
AW37
SDQ_B30
SDQ_B31
SDQ_A30
SDQ_A31
AP20
AV20
AV42
DATA_A32
DATA_A31
DATA_A30
DATA_B18
DATA_B14
DATA_B12
DATA_B17
DATA_B4
DATA_B5
AN5
AN6
SDQ_B3
SDQ_B4
SDQ_A3
SDQ_A4
AP3
AP2
DATA_A4
DATA_A5
DATA_B6
DATA_B7
AN9
AU7
SDQ_B5
SDQ_B6
SDQ_A5
SDQ_A6
AU1
AV4
DATA_A6
DATA_A7
DATA_B8
DATA_B9
AT11
AU11
SDQ_B7
SDQ_B8
SDQ_A7
SDQ_A8
AY2
AY3
DATA_A9
DATA_A8
DATA_B10
AP13
AR13
SDQ_B9
SDQ_B10
SDQ_B11
SDQ_A9
SDQ_A10
SDQ_A11
BB5
AY6
DATA_A11
DATA_A10
AR11
AU9
SDQ_B12
SDQ_A12
AW2
AW3
DATA_A13
DATA_A12
DATA_B1
DATA_B3
DATA_B2
D D
C C
B B
VCC_DDR
C0.1U16Y0402
SCS_A#[0..1] (11,12)
RAS_A# (11,12)
CAS_A# (11,12)
WE_A# (11,12)
MAA_A[0..14] (11,12)
ODT_A[0..1] (11,12)
SBS_A[0..2] (11,12)
DQS_A0 (11)
DQS_A#0 (11)
DQS_A1 (11)
DQS_A#1 (11)
DQS_A2 (11)
DQS_A#2 (11)
DQS_A3 (11)
DQS_A#3 (11)
DQS_A4 (11)
DQS_A#4 (11)
DQS_A5 (11)
DQS_A#5 (11)
DQS_A6 (11)
DQS_A#6 (11)
DQS_A7 (11)
DQS_A#7 (11)
P_DDR0_A (11)
N_DDR0_A (11)
P_DDR1_A (11)
N_DDR1_A (11)
P_DDR2_A (11)
N_DDR2_A (11)
R354 20R1%0402
R357 20R1%0402
R375 20R1%0402
R374 20R1%0402 C347
SCS_A#0
SCS_A#1
RAS_A#
CAS_A#
WE_A#
MAA_A0
MAA_A1
MAA_A2
MAA_A3
MAA_A4
MAA_A5
MAA_A6
MAA_A7
MAA_A8
MAA_A9
MAA_A10
MAA_A11
MAA_A12
MAA_A13
MAA_A14
ODT_A0
ODT_A1
SBS_A0
SBS_A1
SBS_A2
DQS_A0
DQS_A#0
DQS_A1
DQS_A#1
DQS_A2
DQS_A#2
DQS_A3
DQS_A#3
DQS_A4
DQS_A#4
DQS_A5
DQS_A#5
DQS_A6
DQS_A#6
DQS_A7
DQS_A#7
P_DDR0_A
N_DDR0_A
P_DDR1_A
N_DDR1_A
P_DDR2_A
N_DDR2_A
SRCOMP0
SRCOMP1
SRCOMP2
SRCOMP3
Place CAPs
close to
RCOMPXPU and
VOH/VOL
resistors
AW35
BA35
BA34
BB38
BB33
AY35
BB34
BA31
BB25
BA26
BA25
AY25
BA23
AY24
AY23
BB23
BA22
AY33
BB22
AW21
AY38
BA21
AY37
BA38
BB35
BA39
BA33
AW32
BB21
AU4
AR3
BB3
BA4
BB9
BA9
AT20
AU18
AR41
AR40
AL41
AL40
AG42
AG41
AC42
AC41
AU31
AR31
AP27
AN27
AV33
AW33
AP29
AP31
AM26
AM27
AT33
AU33
AN2
AN3
BB40 AM8
BA40
Broadwater-GC
DATA_B0
AN7
AN8
AW5
SDQ_B0
SDQ_B1
SDQ_A0
SDQ_A1
AR5
AR4
AV3
DATA_A0
DATA_A2
DATA_A1
AW7
SDQ_B2
SDQ_A2
AV2
DATA_A3
U22B
SCS_A0#
SCS_A1#
SCS_A2#
SCS_A3#
SRAS_A#
SCAS_A#
SWE_A#
SMA_A0
SMA_A1
SMA_A2
SMA_A3
SMA_A4
SMA_A5
SMA_A6
SMA_A7
SMA_A8
SMA_A9
SMA_A10
SMA_A11
SMA_A12
SMA_A13
SMA_A14
SODT_A0
SODT_A1
SODT_A2
SODT_A3
SBS_A0
SBS_A1
SBS_A2
SDQS_A0
SDQS_A0#
SDQS_A1
SDQS_A1#
SDQS_A2
SDQS_A2#
SDQS_A3
SDQS_A3#
SDQS_A4
SDQS_A4#
SDQS_A5
SDQS_A5#
SDQS_A6
SDQS_A6#
SDQS_A7
SDQS_A7#
SCLK_A0
SCLK_A0#
SCLK_A1
SCLK_A1#
SCLK_A2
SCLK_A2#
SCLK_A3
SCLK_A3#
SCLK_A4
SCLK_A4#
SCLK_A5
SCLK_A5#
SRCOMP0
SRCOMP1
SRCOMP2 SMRCOMPVOL
SRCOMP3
DATA_B13
DATA_B11
DATA_B15
AV12
AU12
SDQ_B13
SDQ_B14
SDQ_B15
SDQ_A13
SDQ_A14
SDQ_A15
BA5
BB4
DATA_A15
DATA_A14
DATA_B16
AU15
AV13
AU17
SDQ_B16
SDQ_B17
SDQ_B18
SDQ_A16
SDQ_A17
SDQ_A18
AY7
BC7
AW11
DATA_A17
DATA_A18
DATA_A16
DATA_B20
DATA_B21
DATA_B19
AT17
AU13
AM13
SDQ_B19
SDQ_B20
SDQ_A19
SDQ_A20
AY11
BB6
BA6
DATA_A20
DATA_A21
DATA_A19
DATA_B34
DATA_B33
AV38
AN36
SDQ_B32
SDQ_B33
SDQ_B34
SDQ_A32
SDQ_A33
SDQ_A34
AU40
AP42
DATA_A34
DATA_A33
DATA_B37
DATA_B35
DATA_B36
AN37
AU35
AR35
SDQ_B35
SDQ_B36
SDQ_B37
SDQ_A35
SDQ_A36
SDQ_A37
AN39
AV40
AV41
DATA_A36
DATA_A37
DATA_A35
DATA_B39
DATA_B38
DATA_B40
AN35
AR37
AM35
SDQ_B38
SDQ_B39
SDQ_B40
SDQ_A38
SDQ_A39
SDQ_A40
AR42
AP41
AN41
DATA_A39
DATA_A40
DATA_A38
DATA_B43
DATA_B42
DATA_B41
AM38
AJ34
AL38
SDQ_B41
SDQ_B42
SDQ_B43
SDQ_A41
SDQ_A42
SDQ_A43
AM39
AK42
AK41
DATA_A41
DATA_A43
DATA_A42
DATA_B44
DATA_B45
AR39
AM34
SDQ_B44
SDQ_A44
AN40
AN42
DATA_A45
DATA_A44
DATA_B47
DATA_B46
AL37
AL32
SDQ_B45
SDQ_B46
SDQ_B47
SDQ_A45
SDQ_A46
SDQ_A47
AL42
AL39
DATA_A47
DATA_A46
DATA_B50
DATA_B49
DATA_B48
AG38
AJ38
AF35
SDQ_B48
SDQ_B49
SDQ_B50
SDQ_A48
SDQ_A49
SDQ_A50
AJ40
AH43
AF39
DATA_A49
DATA_A50
DATA_A48
DATA_B52
DATA_B53
DATA_B51
AF33
AJ37
AJ35
SDQ_B51
SDQ_B52
SDQ_A51
SDQ_A52
AE40
AJ42
AJ41
DATA_A53
DATA_A51
DATA_A52
DATA_B54
DATA_B56
DATA_B55
AG33
AF34
SDQ_B53
SDQ_B54
SDQ_B55
SDQ_A53
SDQ_A54
SDQ_A55
AF41
AF42
DATA_A54
DATA_A55
DATA_A56
DATA_B58
DATA_B57
AD36
AC33
AA34
SDQ_B56
SDQ_B57
SDQ_A56
SDQ_A57
AD40
AD43
AB41
DATA_A58
DATA_A57
DATA_B59
AA36
SDQ_B58
SDQ_A58
AA40
DATA_A59
DATA_B61
DATA_B60
AD34
AF38
SDQ_B59
SDQ_B60
SDQ_B61
SDQ_A59
SDQ_A60
SDQ_A61
AE42
AE41
DATA_A60
DATA_A61
DATA_B62
DATA_B63
AC34
AA33
SDQ_B62
SDQ_B63
SDQ_A62
SDQ_A63
AC39
AB42
DATA_A63
DATA_A62
SCKE_B1
AY12
AW12
SCKE_B0
SCKE_B1
SCKE_A0
SCKE_A1
BC20
AY20
SCKE_A1
SCKE_A0
BB11
SCKE_B2
SCKE_A2
AY21
DATA_A[0..63] (11)
SCKE_A[0..1] (11,12)
A A
5
4
DQM_A[0..7] (11)
3
BA11
SCKE_B3
SCKE_A3
BA19
DQM_A0
DQM_B1
DQM_B0
AR7
AW9
SDM_B0
SDM_B1
SDM_A0
SDM_A1
AR2
BA2
DQM_A1
DQM_B3
DQM_B2
AW13
AP23
SDM_B2
SDM_B3
SDM_A2
SDM_A3
AY9
AN18
DQM_A3
DQM_A2
DQM_B4
DQM_B5
AU37
AM37
SDM_B4
SDM_B5
SDM_A4
SDM_A5
AU43
AM43
DQM_A4
DQM_A5
DQM_B7
DQM_B6
AG39
AD38
SDM_B6
SDM_B7
SMRCOMPVOH
SDM_A6
SDM_A7
AG40
AC40
DQM_A7
DQM_A6
BB27
SCS_B0#
BB30
SCS_B1#
AY27
SCS_B2#
AY31
SCS_B3#
AW26
SRAS_B#
AW29
SCAS_B#
BA27
SWE_B#
BB17
SMA_B0
AY17
SMA_B1
BA17
SMA_B2
BC16
SMA_B3
AW15
SMA_B4
BA15
SMA_B5
BB15
SMA_B6
BA14
SMA_B7
AY15
SMA_B8
BB14
SMA_B9
AW18
SMA_B10
BB13
SMA_B11
BA13
SMA_B12
AY29
SMA_B13
AY13
SMA_B14
BA29
SODT_B0
BA30
SODT_B1
BB29
SODT_B2
BB31
SODT_B3
AY19
SBS_B0
BA18
SBS_B1
BC12
SBS_B2
AV6
SDQS_B0
AU5
SDQS_B0#
AR12
SDQS_B1
AP12
SDQS_B1#
AP15
SDQS_B2
AR15
SDQS_B2#
AT24
SDQS_B3
AU26
SDQS_B3#
AW39
SDQS_B4
AU39
SDQS_B4#
AL35
SDQS_B5
AL34
SDQS_B5#
AG35
SDQS_B6
AG36
SDQS_B6#
AC36
SDQS_B7
AC37
SDQS_B7#
AV31
SCLK_B0
AW31
SCLK_B0#
AU27
SCLK_B1
AT27
SCLK_B1#
AV32
SCLK_B2
AT32
SCLK_B2#
AU29
SCLK_B3
AR29
SCLK_B3#
AV29
SCLK_B4
AW27
SCLK_B4#
AN33
SCLK_B5
AP32
SCLK_B5#
AM6
SVREF
AM10
PLACE 0.1UF CAP CLOSE TO MCH
VCC_DDR
R347 1KR1%0402
1KR1%0402
SCS_B#0
SCS_B#1
RAS_B#
CAS_B#
WE_B#
MAA_B0
MAA_B1
MAA_B2
MAA_B3
MAA_B4
MAA_B5
MAA_B6
MAA_B7
MAA_B8
MAA_B9
MAA_B10
MAA_B11
MAA_B12
MAA_B13
MAA_B14
ODT_B0
ODT_B1
SBS_B0
SBS_B1
SBS_B2
DQS_B0
DQS_B#0
DQS_B1
DQS_B#1
DQS_B2
DQS_B#2
DQS_B3
DQS_B#3
DQS_B4
DQS_B#4
DQS_B5
DQS_B#5
DQS_B6
DQS_B#6
DQS_B7
DQS_B#7
P_DDR0_B
N_DDR0_B
P_DDR1_B
N_DDR1_B
P_DDR2_B
N_DDR2_B
R345
2
MCH_VREF_A
SMRCOMPVOL
SMRCOMPVOH
C349
C0.1U16Y0402
SCS_B#[0..1] (11,12)
RAS_B# (11,12)
CAS_B# (11,12)
WE_B# (11,12)
MAA_B[0..14] (11,12)
ODT_B[0..1] (11,12)
SBS_B[0..2] (11,12)
DQS_B0 (11)
DQS_B#0 (11)
DQS_B1 (11)
DQS_B#1 (11)
DQS_B2 (11)
DQS_B#2 (11)
DQS_B3 (11)
DQS_B#3 (11)
DQS_B4 (11)
DQS_B#4 (11)
DQS_B5 (11)
DQS_B#5 (11)
DQS_B6 (11)
DQS_B#6 (11)
DQS_B7 (11)
DQS_B#7 (11)
P_DDR0_B (11)
N_DDR0_B (11)
P_DDR1_B (11)
N_DDR1_B (11)
P_DDR2_B (11)
N_DDR2_B (11)
MCH_VREF_A
VCC_DDR
R355
1KR1%0402
C361
C0.1U16Y0402
SMRCOMPVOH
R350
_3.01KR1%0402-LF
DDR_RCOMPVOH: 0.8*VRM
C358
C0.1U16Y0402
SMRCOMPVOL
DDR_RCOMPVOL: 0.2*VRM
C355
R351
1KR1%0402
MSI
Title
Size Document Number Rev
Date: Sheet
INTEL Broadwater-Memory
C0.1U16Y0402
MICRO-START INT'L CO.,LTD.
MS-7264
1
83 2 Monday, July 31, 2006
0E
of
5
EXP_A_RXP_0 (13)
EXP_A_RXN_0 (13)
EXP_A_RXP_1 (13)
EXP_A_RXN_1 (13)
EXP_A_RXP_2 (13)
EXP_A_RXN_2 (13)
SDVO_CTRL_DATA (13)
SDVO_CTRL_CLK (13)
H_FSBSEL0 (3,4,6)
H_FSBSEL1 (3,4,6)
H_FSBSEL2 (3,4,6)
V_1P5_ICH
VCCA_MPLL
EXP_A_RXP_3 (13)
EXP_A_RXN_3 (13)
EXP_A_RXP_4 (13)
EXP_A_RXN_4 (13)
EXP_A_RXP_5 (13)
EXP_A_RXN_5 (13)
EXP_A_RXP_6 (13)
EXP_A_RXN_6 (13)
EXP_A_RXP_7 (13)
EXP_A_RXN_7 (13)
EXP_A_RXP_8 (13)
EXP_A_RXN_8 (13)
EXP_A_RXP_9 (13)
EXP_A_RXN_9 (13)
EXP_A_RXP_10 (13)
EXP_A_RXN_10 (13)
EXP_A_RXP_11 (13)
EXP_A_RXN_11 (13)
EXP_A_RXP_12 (13)
EXP_A_RXN_12 (13)
EXP_A_RXP_13 (13)
EXP_A_RXN_13 (13)
EXP_A_RXP_14 (13)
EXP_A_RXN_14 (13)
EXP_A_RXP_15 (13)
EXP_A_RXN_15 (13)
DMI_ITP_MRP_0 (14)
DMI_ITN_MRN_0 (14)
DMI_ITP_MRP_1 (14)
DMI_ITN_MRN_1 (14)
DMI_ITP_MRP_2 (14)
DMI_ITN_MRN_2 (14)
DMI_ITP_MRP_3 (14)
DMI_ITN_MRN_3 (14)
CK_PE_100M_MCH (6)
CK_PE_100M_MCH# (6)
R241 X_1KR0402
C271
C281
EC37
5
D D
C C
Low : BTX
EXP_EN_HDR (13)
V_1P25_CL_MCH
B B
VCCD_CRT
C0.1U16Y0402
VCCDQ_CRT
C0.1U16Y0402
A A
V_1P25_CORE V_1P25_CORE
L21 10U100m_0805
CD470U6.3EL11-RH
EXP_A_RXP_0
EXP_A_RXN_0
EXP_A_RXP_1
EXP_A_RXN_1
EXP_A_RXP_2
EXP_A_RXN_2
EXP_A_RXP_3
EXP_A_RXN_3
EXP_A_RXP_4
EXP_A_RXN_4
EXP_A_RXP_5
EXP_A_RXN_5
EXP_A_RXP_6
EXP_A_RXN_6
EXP_A_RXP_7
EXP_A_RXN_7
EXP_A_RXP_8
EXP_A_RXN_8
EXP_A_RXP_9
EXP_A_RXN_9
EXP_A_RXP_10
EXP_A_RXN_10
EXP_A_RXP_11
EXP_A_RXN_11
EXP_A_RXP_12
EXP_A_RXN_12
EXP_A_RXP_13
EXP_A_RXN_13
EXP_A_RXP_14
EXP_A_RXN_14
EXP_A_RXP_15
EXP_A_RXN_15
DMI_ITP_MRP_0
DMI_ITN_MRN_0
DMI_ITP_MRP_1
DMI_ITN_MRN_1
DMI_ITP_MRP_2
DMI_ITN_MRN_2
DMI_ITP_MRP_3
DMI_ITN_MRN_3
CK_PE_100M_MCH
CK_PE_100M_MCH#
SDVO_CTRL_DATA
SDVO_CTRL_CLK
R247 10KR0402
R240 10KR0402
R245 10KR0402
R244 0R0402
R249 0R
R242 0R0805
R243 _1R0805-LF
+
1 2
VCC_CL_PLL
VCCA_HPLL VCCA_HPLL
VCCA_MPLL
VCCA_DPLLA
VCCA_DPLLB
VCCA_GPLL
V_3P3_DAC_FILTERED
VCCD_CRT
VCCDQ_CRT
VCC3
C264
C1U16Y
C272
X_C0.022U25X0402
R250 1R1%
R251 1R1%
VCCA_DPLLB
EXP_SLR
EXP_EN
SEL0
SEL1
SEL2
V_1P25_CORE
C244
C10U10Y0805
C262
C0.1U16Y0402
F15
G15
K15
J15
F12
E12
J12
H12
J11
H11
F7
E7
E5
F6
C2
D2
G6
G5
L9
L8
M8
M9
M4
L4
M5
M6
R9
R10
T4
R4
R6
R7
W2
V1
Y8
Y9
AA7
AA6
AB3
AA4
B12
B13
G17
E17
G20
J20
J18
G18
E18
J17
Y32
C23
A24
A22
C22
B15
C17
B16
A16
C21
B21
D16
B17
Broadwater-GC
L30 _0R1206-LF
V_1P25_CORE
V_1P25_CL_MCH
V_1P25_CL_MCH
U22C
EXP_RXP0
EXP_RXN0
EXP_RXP1
EXP_RXN1
EXP_RXP2
EXP_RXN2
EXP_RXP3
EXP_RXN3
EXP_RXP4
EXP_RXN4
EXP_RXP5
EXP_RXN5
EXP_RXP6
EXP_RXN6
EXP_RXP7
EXP_RXN7
EXP_RXP8
EXP_RXN8
EXP_RXP9
EXP_RXN9
EXP_RXP10
EXP_RXN10
EXP_RXP11
EXP_RXN11
EXP_RXP12
EXP_RXN12
EXP_RXP13
EXP_RXN13
EXP_RXP14
EXP_RXN14
EXP_RXP15
EXP_RXN15
DMI_RXP0
DMI_RXN0
DMI_RXP1
DMI_RXN1
DMI_RXP2
DMI_RXN2
DMI_RXP3
DMI_RXN3
GCLKP
GCLKN
SDV0_CTRLDATA
SDVO_CTRLCLK
BSEL0
BSEL1
BSEL2
RESERVED
EXP_SLR
EXP_EN
VCC_CL_PLL
VCCA_HPLL
VCCA_MPLL
VCCA_DPLLA
VCCA_DPLLB
VCCA_EXPPLL
VCCA_DAC_17
VCCA_DAC_18
VCCA_EXP_19
VCCD_CRT_20
VCCDQ_CRT_21
VSS_1
VCC33
AL26
VCC_CL_1
VCC_EXP_1
VCC_EXP_2
AD11
AD10
4
AL24
AL23
AL21
AL20
AL18
AL17
AL15
AK30
VCC_CL_2
VCC_CL_3
VCC_CL_4
VCC_CL_5
VCC_CL_6
VCC_CL_7
VCC_CL_8
VCC_CL_9
VCC_EXP_3
VCC_EXP_4
VCC_EXP_5
VCC_EXP_6
VCC_EXP_7
VCC_EXP_8
VCC_EXP_9
VCC_EXP_10
AD9
AD8
AD7
AD6
AD5
AD4
AD2
AD1
L20 10U100m_0805 L24 600L200m_500-1
EC38
CD470U6.3EL11-RH
L23 10U100m_0805
4
AK29
AK27
AJ31
AG31
VCC_CL_10
VCC_CL_11
VCC_CL_12
VCC_EXP_11
VCC_EXP_12
VCC_EXP_13
AC4
AC3
AC2
AE4
VCC_DDR
+
1 2
AF31
AD32
AC32
AA32
VCC_CL_13
VCC_CL_14
VCC_CL_15
VCC_CL_16
VCC_EXP_14
VCC_EXP_15
VCC_EXP_16
AE3
AE2
BC39
VCCA_DPLLA
VCCA_HPLL
AJ30
AJ29
AJ27
VCC_CL_17
VCC_CL_18
VCC_CL_19
VCC_CL_20
VCCSM_1
VCCSM_2
VCCSM_3
VCCSM_4
BC34
BC30
BC26
AG30
AG29
AG27
AG26
VCC_CL_21
VCC_CL_22
VCC_CL_23
VCCSM_5
VCCSM_6
VCCSM_7
BC22
BC18
BC14
BB39
V_1P25_CORE V_1P25_CL_MCH
C263
C0.1U16Y0402
C258
C2.2U6.3Y
AF30
AF29
AF27
VCC_CL_24
VCC_CL_25
VCC_CL_26
VCC_CL_27
VCCSM_8
VCCSM_9
VCCSM_10
VCCSM_11
BB37
BB32
BB28
AD30
AD29
AC30
AC29
AL12
VCC_CL_28
VCC_CL_29
VCC_CL_30
VCC_CL_31
VCCSM_12
VCCSM_13
VCCSM_14
VCCSM_15
BB26
BB24
BB20
BB18
BB16
L19 10U100m_0805
AL11
AL10
AL9
VCC_CL_32
VCC_CL_33
VCC_CL_34
VCC_CL_35
VCCSM_16
VCCSM_17
VCCSM_18
VCCSM_19
BB12
AY32
AW24
AL8
AL7
VCC_CL_36
VCC_CL_37
VCCSM_20
VCCSM_21
VCCSM_22 VCC_CL_38
AW20
AV26
AV18 AL6
C374
C1U16Y
AL5
AL4
AL3
VCC_CL_39
VCC_CL_40
VCC_CL_41
VCC_SMCLK_1
BB41
3
AL2
AK26
AK24
AK23
AK21
VCC_CL_42
VCC_CL_43
VCC_CL_44
VCC_CL_45
VCC_SMCLK_5
VCC_SMCLK_4
VCC_SMCLK_3
VCC_SMCLK_2
BA43
BB42
AY42
BA42
V_CKDDR
R377 1R1%
R378 1R1%
R257 1R1%
R256 1R1%
C10U10Y0805
3
AK20
AK18
AK17
AK15
AK3
AK2
AK1
AJ13
VCC_CL_46
VCC_CL_47
VCC_CL_48
VCC_CL_49
VCC_CL_50
VCC_CL_51
VCC_CL_52
VCC_CL_53
VCC_CL_54
RESERVED_2
RESERVED_4
RESERVED_5
RESERVED_6
RESERVED_7
RESERVED_3
RESERVED_1
AN21
BB2
AW42
AN32
AM31
BB19
H18
L31 600L350m_450
C379 C10U10Y0805 R358
VCCA_GPLL
C261
C353 C10U10Y0805
C354
X_C10U10Y0805
AD31
AC31
AA31
Y31
VCC_CL_55
VCC_CL_56
VCC_CL_57
VCC_CL_58
RESERVED_8
RESERVED_9
RESERVED_10
RESERVED_11
AG32
AF32
AM21
AL31
AJ26
AJ24
AJ23
AJ21
AJ20
VCC_CL_59
VCC_CL_60
VCC_CL_61
VCC_CL_62
RESERVED_12
RESERVED_13
RESERVED_14
RESERVED_15
AJ32
AA10
AA9
AA11
Y12
C275
C0.1U16Y0402
AJ18
AJ17
AJ15
AJ14
AA30
VCC_CL_63
VCC_CL_64
VCC_CL_65
VCC_CL_66
VCC_CL_67
RESERVED_16
RESERVED_17
RESERVED_18
RESERVED_19
RESERVED_20
U30
U31
R29
R30
U12
VCC_DDR
AA29
Y30
Y29
V30
V29
VCC_CL_68
VCC_CL_69
VCC_CL_70
VCC_CL_71
VCC_CL_72
RESERVED_25
RESERVED_21
RESERVED_22
RESERVED_23
RESERVED_24
AP21
U11
R12
R13
F13
VCC3
L27 0.1U400m
_CD100U16EL11
U29
U27
AL13
AK14
AL29
VCC_CL_73
VCC_CL_74
VCC_CL_75
VCC_CL_76
VCC_CL_77
RESERVED_28
RESERVED_27
RESERVED_26
BC43
AA39
V31
EC39
2
AL27
EXP_TXP0
EXP_TXN0
EXP_TXP1
EXP_TXN1
VCC_CL_78
VCC_CL_79
EXP_TXP2
EXP_TXN2
EXP_TXP3
EXP_TXN3
EXP_TXP4
EXP_TXN4
EXP_TXP5
EXP_TXN5
EXP_TXP6
EXP_TXN6
EXP_TXP7
EXP_TXN7
EXP_TXP8
EXP_TXN8
EXP_TXP9
EXP_TXN9
EXP_TXP10
EXP_TXN10
EXP_TXP11
EXP_TXN11
EXP_TXP12
EXP_TXN12
EXP_TXP13
EXP_TXN13
EXP_TXP14
EXP_TXN14
EXP_TXP15
EXP_TXN15
DMI_TXP0
DMI_TXN0
DMI_TXP1
DMI_TXN1
DMI_TXP2
DMI_TXN2
DMI_TXP3
DMI_TXN3
EXP_COMPO
EXP_COMPI
GREEN
GREEN#
DDC_DATA
DDC_CLK
DREFCLKP
DREFCLKN
REFSET
CL_PWROK
CL_RST#
CL_VERF
CL_CLK
CL_DATA
ALLZTEST
XORTEST
RESERVED
TEST0
TEST1
TEST2
BC1
A43
TP1
TP15
TP16
1 2
+
C588
_C4.7U10X50805
2
HSYNC
VSYNC
RED
BLUE
RED#
BLUE#
C273
X_C0.1U16Y0402
EXP_A_TXP_0
D11
EXP_A_TXN_0
D12
EXP_A_TXP_1
B11
EXP_A_TXN_1
A10
EXP_A_TXP_2
C10
EXP_A_TXN_2
D9
EXP_A_TXP_3
B9
EXP_A_TXN_3
B7
EXP_A_TXP_4
D7
EXP_A_TXN_4
D6
EXP_A_TXP_5
B5
EXP_A_TXN_5
B6
EXP_A_TXP_6
B3
EXP_A_TXN_6
B4
EXP_A_TXP_7
F2
EXP_A_TXN_7
E2
EXP_A_TXP_8
F4
EXP_A_TXN_8
G4
EXP_A_TXP_9
J4
EXP_A_TXN_9
K3
EXP_A_TXP_10
L2
EXP_A_TXN_10
K1
EXP_A_TXP_11
N2
EXP_A_TXN_11
M2
EXP_A_TXP_12
P3
EXP_A_TXN_12
N4
EXP_A_TXP_13
R2
EXP_A_TXN_13
P1
EXP_A_TXP_14
U2
EXP_A_TXN_14
T2
EXP_A_TXP_15
V3
EXP_A_TXN_15
U4
DMI_MTP_IRP_0
V7
DMI_MTN_IRN_0
V6
DMI_MTP_IRP_1
W4
DMI_MTN_IRN_1
Y4
DMI_MTP_IRP_2
AC8
DMI_MTN_IRN_2
AC9
DMI_MTP_IRP_3
Y2
DMI_MTN_IRN_3
AA2
GRCOMP
AC11
AC12
HSYNC_R
C15
VSYNC_R
D15
VGA_RED
B18
VGA_GREEN
C19
VGA_BLUE
B20
C18
D19
D20
MCH_DDC_DATA
L13
MCH_DDC_CLK
M13
CK_96M_DREF
C14
CK_96M_DREF#
D13
DACREFSET
A20
R340
0R0402
AM15
AA12
CL_VREF_MCH
AM5
AD13
AD12
K20
F20
A14
TP7
V_3P3_DAC_FILTERED
C282
C0.01U16X0402
1
Place close to GMCH
EXP_A_TXP_0 (13)
EXP_A_TXN_0 (13)
EXP_A_TXP_1 (13)
EXP_A_TXN_1 (13)
EXP_A_TXP_2 (13)
EXP_A_TXN_2 (13)
EXP_A_TXP_3 (13)
EXP_A_TXN_3 (13)
EXP_A_TXP_4 (13)
EXP_A_TXN_4 (13)
EXP_A_TXP_5 (13)
EXP_A_TXN_5 (13)
EXP_A_TXP_6 (13)
EXP_A_TXN_6 (13)
EXP_A_TXP_7 (13)
EXP_A_TXN_7 (13)
EXP_A_TXP_8 (13)
EXP_A_TXN_8 (13)
EXP_A_TXP_9 (13)
EXP_A_TXN_9 (13)
EXP_A_TXP_10 (13)
EXP_A_TXN_10 (13)
EXP_A_TXP_11 (13)
EXP_A_TXN_11 (13)
EXP_A_TXP_12 (13)
EXP_A_TXN_12 (13)
EXP_A_TXP_13 (13)
EXP_A_TXN_13 (13)
EXP_A_TXP_14 (13)
EXP_A_TXN_14 (13)
EXP_A_TXP_15 (13)
EXP_A_TXN_15 (13)
DMI_MTP_IRP_0 (14)
DMI_MTN_IRN_0 (14)
DMI_MTP_IRP_1 (14)
DMI_MTN_IRN_1 (14)
DMI_MTP_IRP_2 (14)
DMI_MTN_IRN_2 (14)
DMI_MTP_IRP_3 (14)
DMI_MTN_IRN_3 (14)
R328 24.9R1%0402
R584 0R0402
R585 0R0402
R270 1.3KR1%0402
Title
Size Document Number Rev
Date: Sheet
V_1P25_CORE
C629 X_C10P25N0402
C630 X_C10P25N0402
HSYNC (23)
VSYNC (23)
VGA_RED (23)
VGA_GREEN (23)
VGA_BLUE (23)
MCH_DDC_DATA (23)
MCH_DDC_CLK (23)
CK_96M_DREF (6)
CK_96M_DREF# (6)
MCH_CLPWROK (15,27)
CL_RST (15)
CL_N_CLK (15)
CL_N_DATA (15)
V_1P25_CL_MCH
MICRO-START INT'L CO.,LTD.
INTEL Broadwater-PCIE
VCC_DDR
C482 C2.2U6.3Y
C382 C2.2U6.3Y
C384 C2.2U6.3Y
C383 C2.2U6.3Y
C385 C2.2U6.3Y
C381 C2.2U6.3Y
MCH MEMORY DECOUPLING
V_1P25_CL_MCH
C362
MCH CL DECOUPLING
V_1P25_CORE
C342
C288
C290
C337
C351
C323
C304
C352
C293
C322
C280 C0.1U16Y0402
C309 C0.1U16Y0402
C279 C0.1U16Y0402
C277 C0.1U16Y0402
MCH CORE DECOUPLING
MCH CL VREF:0.349V
1KR1%0402
CL_VREF_MCH
R360
392R1%0402
C363
C0.1U16Y0402
MS-7264
1
C10U10Y0805
C10U10Y0805
C10U10Y0805
C10U10Y0805
C10U10Y0805
C10U10Y0805
C10U10Y0805
C10U10Y0805
C10U10Y0805
C10U10Y0805
C10U10Y0805
93 2 Monday, July 31, 2006
0E
of
5
4
3
2
1
V_1P25_CORE
D D
BC37
BC32
BC28
BC24
BC10
BC5
BB7
AY41
AY4
AW43
AW41
AW1
AV37
AV35
AV27
AV23
AV21
AV17
AV11
AV9
AV7
AU42
AU38
AU32
C C
B B
AU24
AU20
AT31
AT29
AT15
AT13
AT12
AR38
AR33
AR32
AR27
AR26
AR23
AR21
AR20
AR17
AP43
AP24
AP18
AN38
AN31
AN29
AN24
AN23
AN20
AN15
AN13
AN12
AN11
AM42
AM40
AM36
AM33
AM29
AM24
AM23
AM20
AM11
AL36
AL33
AK43
AU6
AU2
AR9
AR6
AP1
AN4
AM9
AM7
AM4
AM2
AM1
U22D
VSS_1
VSS_2
VSS_3
VSS_4
VSS_5
VSS_6
VSS_7
VSS_8
VSS_9
VSS_10
VSS_11
VSS_12
VSS_13
VSS_14
VSS_15
VSS_16
VSS_17
VSS_18
VSS_19
VSS_20
VSS_21
VSS_22
VSS_23
VSS_24
VSS_25
VSS_26
VSS_27
VSS_28
VSS_29
VSS_30
VSS_31
VSS_32
VSS_33
VSS_34
VSS_35
VSS_36
VSS_37
VSS_38
VSS_39
VSS_40
VSS_41
VSS_42
VSS_43
VSS_44
VSS_45
VSS_46
VSS_47
VSS_48
VSS_49
VSS_50
VSS_51
VSS_52
VSS_53
VSS_54
VSS_55
VSS_56
VSS_57
VSS_58
VSS_59
VSS_60
VSS_61
VSS_62
VSS_63
VSS_64
VSS_65
VSS_66
VSS_67
VSS_68
VSS_69
VSS_70
VSS_71
VSS_72
VSS_73
VSS_74
VSS_75
VSS_76
AA17
AA15
VCC_123
VCC_124
AA14
Y27
VCC_125
VCC_126
Y26
Y18
VCC_127
VCC_128
Y17
Y15
VCC_129
VCC_130
Y14
W27
VCC_131
VCC_132
W26
W25
VCC_133
VCC_134
W23
W21
VCC_135
VCC_136
W19
W18
VCC_137
VCC_138
W17
V27
VCC_139
VCC_140
V26
V25
VCC_141
VCC_142
V24
V23
VCC_143
VCC_144
V22
V21
VCC_145
VCC_146
V20
V19
VCC_147
VCC_148
V18
V17
VCC_149
VCC_150
V15
V14
VCC_151
VCC_152
U26
U25
VCC_153
VCC_154
U24
U23
VCC_155
VCC_156
U22
U21
VCC_157
VCC_158
U20
U19
VCC_159
VCC_160
U18
U17
VCC_161
VCC_162
U15
U14
VCC_163
VCC_164
R20
R18
VCC_165
VCC_166
R17
R15
VCC_167
VCC_168
R14
P15
VCC_169
VCC_170
P14
AG24
VCC_171
VCC_172
AG23
AG22
VCC_173
VCC_174
M20
L17
N17
N18
N15
RESERVED_29
RESERVED_30
RESERVED_31
RESERVED_32
L15
L18
M18
F17
K17
RESERVED_33
RESERVED_34
RESERVED_35
RESERVED_36
RESERVED_37
N20
BC42
BC2
NC_1
NC_2
RESERVED_38
NC_3
BB43
NC_4
BB1
B43
B42B2A42
NC_5
NC_6
NC_7
NC_8
NC_9
L12
M11
VSS
VCC
A3A5A41C1C43E1R21
VSS_293
VSS_292
VSS_291
VSS_290
VSS_289
VSS_288
W20
W22
VSS_287
VSS_286
VSS_285
W24
AA18
VSS_284
VSS_283
AC18
AE18
VSS_282
VSS_281
AE20
AE22
VSS_280
VSS_279
AE24
AF19
VSS_278
VSS_277
AF21
AF23
VSS_276
VSS_275
AY40
VSS_274
BA1
BC3
VSS_273
VSS_272
BC41
M33
VSS_271
VSS_270
M35
M37
VSS_269
VSS_268
M42N5N7
VSS_267
VSS_266
N10
VSS_265
VSS_264
VSS_263
VSS_262
VSS_261
VSS_260
VSS_259
VSS_258
VSS_257
VSS_256
VSS_255
VSS_254
VSS_253
VSS_252
VSS_251
VSS_250
VSS_249
VSS_248
VSS_247
VSS_246
VSS_245
VSS_244
VSS_243
VSS_242
VSS_241
VSS_240
VSS_239
VSS_238
VSS_237
VSS_236
VSS_235
VSS_234
VSS_233
VSS_232
VSS_231
VSS_230
VSS_229
VSS_228
VSS_227
VSS_226
VSS_225
VSS_224
VSS_223
VSS_222
VSS_221
VSS_220
VSS_219
VSS_218
VSS_217
VSS_216
VSS_215
VSS_214
VSS_213
VSS_212
VSS_211
VSS_210
VSS_209
VSS_208
VSS_207
VSS_206
VSS_205
VSS_204
VSS_203
VSS_202
VSS_201
VSS_200
VSS_199
VSS_198
VSS_197
VSS_196
VSS_195
VSS_194
VSS_193
VSS_192
VSS_191
VSS_190
VSS_189
VSS_188
N13
N21
N27
N31
N33
N36
P2
P17
P18
P21
P30
P43
R3
R5
R8
R11
R31
R33
R36
T1
T42
U5
U7
U8
U35
U38
V2
V5
V8
V11
V32
V34
V37
V39
V43
W3
Y1
Y5
Y7
Y10
Y19
Y21
Y23
Y25
Y33
Y35
Y37
Y42
AA5
AA8
AA20
AA22
AA24
AA35
AA38
AB1
AB2
AB19
AB21
AB23
AB25
AB43
AC5
AC7
AC10
AC20
AC22
AC24
AC35
AC38
AD19
AD21
AD23
AD25
AD33
AD35
VSS_77
VSS_78
VSS_79
VSS_80
VSS_81
VSS_82
VSS_83
VSS_84
VSS_85
VSS_86
VSS_87
VSS_88
VSS_89
VSS_90
VSS_91
VSS_92
VSS_93
VSS_94
VSS_95
VSS_96
VSS_97
VSS_98
VSS_99
VSS_100
VSS_101
VSS_102
VSS_103
VSS_104
VSS_105
VSS_106
VSS_107
VSS_108
VSS_109
VSS_110
VSS_111
VSS_112
VSS_113
VSS_114
VSS_115
VSS_116
VSS_117
VSS_118
VSS_119
VSS_120
VSS_121
VSS_122
VSS_123
VSS_124
VSS_125
VSS_126
VSS_127
VSS_128
VSS_129
VSS_130
VSS_131
VSS_132
VSS_133
VSS_134
VSS_135
VSS_136
VSS_137
VSS_138
VSS_139
VSS_140
VSS_141
VSS_142
VSS_143
VSS_144
VSS_145
VSS_146
VSS_147
VSS_148
VSS_149
VSS_150
VSS_151
VSS_152
VSS_153
VSS_154
VSS_155
VSS_156
VSS_157
VSS_158
VSS_159
VSS_160
VSS_161
VSS_162
VSS_163
VSS_164
VSS_165
VSS_166
VSS_167
VSS_168
VSS_169
VSS_170
VSS_171
VSS_172
VSS_173
VSS_174
VSS_175
VSS_176
VSS_177
VSS_178
VSS_179
VSS_180
VSS_181
VSS_182
VSS_183
VSS_184
VSS_185
VSS_186
VSS_187
AJ39
AJ36
AJ33
AH42
AG37
AG34
AF43
AF37
AF36
AF10
AF9
AF8
AF7
AF6
M27
M21
M17
M15
M10M7M1
L33
L32
L31
L29
L21
L20
L11L7L5L3K43
K26
K21
K18
K13
K12K2J38
J35
J32
J27
J21J9J7J5H31
H29
H21
H20
H17
H15
H13
G42
G38
G32
G21
G13
G12
G11G9G7G1F37
F35
F27
F21
F18F3E43
E32
E24
E21
E20
E15
E13
E11E9E3
D40
D31
D21
D17D3C26
C11C6C5C4B37
B32
B31
B26
B23
B22
B19
B14
B10
A39
A34
A26
A18
A12A7AF5
AF3
A A
5
4
3
2
Broadwater-GC
AF2
AF1
AD42
AD39
AD37
Title
Size Document Number Rev
Date: Sheet
MICRO-START INT'L CO.,LTD.
INTEL Broadwater-GND
MS-7264
1
10 32 Monday, July 31, 2006
0E
of