MSI MS-7263 Schematics
5
4
3
2
1
Cover Sheet
Callisto K
Block Diagram
Intel LGA775 CPU
D D
MS-7263N1
Version 1.1
CPU:
Intel Conroe / PentiumD / Pentium4 / Celeron
System Chipset:
Intel BroadwaterGF - GMCH (North Bridge)
Intel ICH8 - (South Bridge)
On Board Chipset:
BIOS - SPI FLASH (8M)
HD Audio - ALC262
C C
LPC Super I/O - SMSC SCH5017
LAN - Realtek 8110SC
CLOCK Generator - ICSLP505-1
IDE Controller - VT6410 RAID IDE
TPM - SLB9635TT1.2(Option)
MS-7263N1
MS-7263-1.1
ERP Number
601-7263-
Functiom
Mainboard
Main Memory:
DDR II(667/533) x 2 - Up to 4GB
Expansion Slots (low profile):
B B
PCI-E[x1] Slot x2(Option)
PCI Slot x2
Intersil PWM:
Controller: Intersil 6326 4Phase
CLOCK Generator-ICSLP505-1
Intel BroadWater - MCH
DDR II System Memory 1 & 2
DDR II VTT Decoupling & TPM1.2
VGA Connector
Intel ICH8 - PCI & DMI & CPU & IRQ
Intel ICH8 - LPC & ATA & USB & GPIO
Intel ICH8 - POWER
PCI-E[x1] & SATA Slots
LAN-RTL8110SC
VIA VT6410 RAID IDE
HD AUDIO-ALC262
PCI SLOT 1 & 2
USB Connectors
SIO SMSC SCH5017 & FDD
KB/MS/LPT/COM Port /FAN
ATX Connetcor & Front Panel
ACPI CONTROLLER MS7
DIMM/GMCH POWER
1
2
3-5
6
7-10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
VRM11 Intersil 6326 4Phase
28
Model option table
Manual parts
Function
MS-7263-1.1
A A
BroadwaterGF+ICH8+RTL8100SC+VT6410,ROHS
5
4
BOM ConfigModel type
Cfg7263-1a
ERP BOM No.
601-7263-
GPIO & Jumper Setting
Power MAP
History & Check list
MICRO-START INT'L CO.,LTD.
MICRO-START INT'L CO.,LTD.
Title
Title
Title
COVER SHEET
COVER SHEET
COVER SHEET
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
3
2
Date: Sheet
MICRO-START INT'L CO.,LTD.
MS-7263N1 1.1
MS-7263N1 1.1
MS-7263N1 1.1
1
29
30
31
32
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132Thursday, August 24, 2006
Block Diagram
1
VRM 11
Intersil 6326
Intel LGA775 Processor
4-Phase PWM
533/800/1066 MHz
FSB
2 DDR II
DIMM
Analog
Video
Out
RGB
SATA
Broadwater-GF
GMCH
DMI
CL
SATA 0~1(2~3 Optional)
USB
USB Port 0~5
A A
PCI-Express[X1]
PCI EXPRESS
ICH8
DDRII
533/667 MHz
PCI
PCI
(Extender x2, Optional)
ALC 262
Audio Codec
HD AUDIO LINK
LPC Bus
LPC Bus
Modules
VT6410
RAID IDE
IDE
PCI Slot 1
PCI Slot 2
LAN
RTL8100SC(10/100/1000)
TPM 1.2(Optional)
SPI
LPC SIO
SMSC
SHC5017
SPI FLASH
Keyboard
Mouse
Floopy
1
Serial(COM1&2)Parallel
MICRO-START INT'L CO.,LTD.
MICRO-START INT'L CO.,LTD.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
Date: Sheet
MICRO-START INT'L CO.,LTD.
BLOCK DIAGRAM
BLOCK DIAGRAM
BLOCK DIAGRAM
MS-7263N1
MS-7263N1
MS-7263N1
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232Thursday, August 24, 2006
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232Thursday, August 24, 2006
1.1
1.1
1.1
5
4
3
2
1
VSS_CPU_SENSE
VCC_CPU_SENSE
AN5
AN4
AN3
AN6
VSS_SENSE
VCC_SENSE
VSS_MB_REGULATION
VCC_MB_REGULATION
D13#
D12#D8D11#
D10#
D9#
B12
B10
A11
C11
H_D#9
H_D#11
H_D#13
H_D#12
H_D#10
R77 X_1KR1%0402R77 X_1KR1%0402
12
R45 0R0603R45 0R0603
C60
C60
X_C22U16Y1210-RH
X_C22U16Y1210-RH
R42 0R0603R42 0R0603
VID7
VID6
VID3
VID4
VID5
AM7
AM5
AL4
AK4
AK3
ITP_CLK0
H_D#6
H_D#5
VID6#
RSVD#AM7
H_D#3
H_D#4
H_D#2
AL6
VID5#
VID4#
VID_SELECT
GTLREF_SEL
FORCEPH
LINT1/NMI
LINT0/INTR
B4
H_D#0
H_D#1
AJ3
ITP_CLK1
D8#
D7#A7D6#B7D5#B6D4#A5D3#C6D2#A4D1#C5D0#
A10
H_D#7
H_D#8
VID3#
GTLREF0
GTLREF1
GTLREF2
TESTHI12
TESTHI11
TESTHI10
RSVD#G6
ADSTB1#
ADSTB0#
DSTBP3#
DSTBP2#
DSTBP1#
DSTBP0#
DSTBN3#
DSTBN2#
DSTBN1#
DSTBN0#
CPU SIGNAL BLOCK
H_A#[3..35](7)
D D
U8A
G11
D19
C20
AB2
AB3
AD3
AD1
AF1
AC1
AG1
AE1
AL1
AK1
AE8
AL2
AH2
AE6
G10
D16
A20
AA2
G29
H30
G30
G23
B22
A22
A19
B19
B21
C21
B18
A17
B16
C18
A8
F2
R3
M3
P3
H4
B2
C1
E3
D2
C3
C2
D4
E4
G8
G7
M2
N2
P2
K3
L2
N5
C9
Y1
V2
N1
U8A
DBI0#
DBI1#
DBI2#
DBI3#
EDRDY#
IERR#
MCERR#
FERR#/PBE#
STPCLK#
BINIT#
INIT#
RSP#
DBSY#
DRDY#
TRDY#
ADS#
LOCK#
BNR#
HIT#
HITM#
BPRI#
DEFER#
TDI
TDO
TMS
TRST#
TCK
THERMDA
THERMDC
THERMTRIP#
GND/SKTOCC#
PROCHOT#
IGNNE#
SMI#
A20M#
TESTI_13
RSVD#AH2
RESERVED0
RESERVED1
RESERVED2
RESERVED3
RESERVED4
RESERVED5
BOOTSELECT
LL_ID0
LL_ID1
BSEL0
BSEL1
BSEL2
PWRGOOD
RESET#
D63#
D62#
D61#
D60#
D59#
D58#
D57#
D56#
D55#
D54#
B15
H_D#53
H_DBI#[0..3](7)
H_IERR#(4)
H_FERR#(4,14)
H_STPCLK#(14)
H_INIT#(14)
H_DBSY#(7)
H_DRDY#(7)
H_TRDY#(7)
H_ADS#(7)
H_LOCK#(7)
H_BNR#(7)
H_HIT#(7)
H_D#[0..63](7)
H_HITM#(7)
H_BPRI#(7)
H_DEFER#(7)
TRMTRIP#(4,14)
H_PROCHOT#(4,28)
H_IGNNE#(14)
ICH_H_SMI#(14)
H_A20M#(14)
R557 51R0402R557 51R0402
R79 X_62R0402R79 X_62R0402
H_FSBSEL0(4,6,9)
H_FSBSEL1(4,6,9)
H_FSBSEL2(4,6,9)
H_PWRGD(4,15)
H_CPURST#(4,7)
C C
VTT_OUT_LEFT
VTT_OUT_RIGHT
B B
A A
H_DBI#0
H_DBI#1
H_DBI#2
H_DBI#3
R98 0R0402R98 0R0402
H_TDI
H_TDO
H_TMS
H_TRST#
H_TCK
CPU_TMPA_A
VTIN_GND_C
H_SLP#
H_TEST_C9
H_D#63
H_D#62
H_D#61
H_D#60
H_D#59
H_D#58
H_D#57
H_D#56
H_D#55
H_D#54
D53#
D52#
C14
H_D#52
D51#
A14
C15
H_D#51
H_D#50
D50#
D49#
D17
H_D#49
H_A#35
H_A#34
AJ6
AJ5
A35#
D48#
D20
G22
H_D#47
H_D#48
H_A#33
AH5
A34#
A33#
D47#
D46#
D22
H_D#46
H_A#32
H_A#31
AH4
AG5
A32#
D45#
E22
G21
H_D#45
H_D#44
H_A#30
AG4
A31#
A30#
D44#
D43#
F21
H_D#43
H_A#28
H_A#29
AG6
AF4
A29#
D42#
F20
E21
H_D#41
H_D#42
H_A#27
AF5
A28#
A27#
D41#
D40#
E19
H_D#40
H_A#25
H_A#26
AB4
AC5
A26#
D39#
F18
E18
H_D#39
H_D#38
H_A#24
AB5
A25#
A24#
D38#
D37#
F17
H_D#37
H_A#22
H_A#23
AA5
AD6
A23#
D36#
G17
G18
H_D#35
H_D#36
H_A#21
AA4
A22#
A21#
D35#
D34#
E16
H_D#34
H_A#19
H_A#18
H_A#20
A20#Y4A19#Y6A18#W6A17#
D33#
D32#
E15
G16
G15
H_D#33
H_D#31
H_D#32
H_A#17
AB6
D31#
D30#
F15
H_D#30
H_A#13
H_A#16
H_A#12
H_A#14
H_A#15
A16#W5A15#V4A14#V5A13#U4A12#U5A11#T4A10#
D29#
D28#
D27#
D26#
D25#
D24#
F14
F12
E13
D13
G14
G13
H_D#28
H_D#27
H_D#29
H_D#25
H_D#26
H_D#24 H_A#11
H_A#10
H_A#8
H_A#6
H_A#7
H_A#9
U6
A9#T5A8#R4A7#M4A6#L4A5#M5A4#P6A3#
D23#
D22#
D21#
D20#D7D19#E9D18#F9D17#F8D16#G9D15#
F11
E10
D10
H_D#23
H_D#22
H_D#19
H_D#20
H_D#21
H_A#4
H_A#5
H_D#17
H_D#18
H_A#3
L5
D11
H_D#15
H_D#16
AC2
DBR#
D14#
C12
H_D#14
FP_RST# (15,25)
VCC_VRM_SENSE (28)
VSS_VRM_SENSE (28)
VID[0..7] (28)
VID0
VID1
VID2
AM3
AL5
AM2
VID2#
VID1#
VID0#
AN7
H1
H2
H29
E24
AG3
BPM5#
AF2
BPM4#
AG2
BPM3#
AD2
BPM2#
AJ1
BPM1#
AJ2
BPM0#
G5
PCREQ#
J6
REQ4#
K6
REQ3#
M6
REQ2#
J5
REQ1#
K4
REQ0#
W2
P1
H5
G4
TESTHI9
G3
TESTHI8
F24
TESTHI7
G24
TESTHI6
G26
TESTHI5
G27
TESTHI4
G25
TESTHI3
F25
TESTHI2
W3
TESTHI1
F26
TESTHI0
AK6
G6
G28
BCLK1#
F28
BCLK0#
A3
RS2#
F5
RS1#
B3
RS0#
U3
AP1#
U2
AP0#
F3
BR0#
T2
COMP5
J2
COMP4
R1
COMP3
G2
COMP2
T1
COMP1
A13
COMP0
J17
DP3#
H16
DP2#
H15
DP1#
J16
DP0#
AD5
R6
C17
G19
E12
B9
A16
G20
G12
C8
L1
K1
ZIF-SOCK775-15u-in
ZIF-SOCK775-15u-in
R35
R35
680R0402
680R0402
TP_GTLREF_SEL
H_BPM#5
H_BPM#4
H_BPM#3
H_BPM#2
H_BPM#1
H_BPM#0
PECI
H_REQ#4
H_REQ#3
H_REQ#2
H_REQ#1
H_REQ#0
H_TESTHI12
H_TESTHI11
H_TESTHI10
H_TESTHI9
H_TESTHI8
H_TESTHI2_7
H_TESTHI1
H_TESTHI0
RSVD_AK6
H_RS#2
H_RS#1
H_RS#0
H_COMP5
H_COMP4
H_COMP3
H_COMP2
H_COMP1
H_COMP0
VTT_OUT_RIGHT
R549 X_0R0402R549 X_0R0402
R551 X_0R0402R551 X_0R0402
R550 X_0R0402R550 X_0R0402
R552 X_0R0402R552 X_0R0402
H_TESTHI12 (5)
R131 51R0402R131 51R0402
R130 51R0402R130 51R0402
R76 X_62R0402R76 X_62R0402
R103 X_62R0402R103 X_62R0402
CK_H_CPU# (6)
CK_H_CPU (6)
TP5TP5
TP4TP4
R84 49.9R1%0402R84 49.9R1%0402
R107 49.9R1%0402R107 49.9R1%0402
R95 49.9R1%0402R95 49.9R1%0402
R117 49.9R1%0402R117 49.9R1%0402
R90 49.9R1%0402R90 49.9R1%0402
R137 49.9R1%0402R137 49.9R1%0402
TP9TP9
TP7TP7
TP8TP8
TP6TP6
H_ADSTB#1 (7)
H_ADSTB#0 (7)
H_DSTBP#3 (7)
H_DSTBP#2 (7)
H_DSTBP#1 (7)
H_DSTBP#0 (7)
H_DSTBN#3 (7)
H_DSTBN#2 (7)
H_DSTBN#1 (7)
H_DSTBN#0 (7)
H_NMI (14)
H_INTR (14)
VRD_VIDSEL (28)
CPU_GTLREF0 (4)
CPU_GTLREF1 (4)
TP10TP10
MCH_GTLREF_CPU (7)
PECI (14)
H_REQ#[0..4] (7)
H_RS#[0..2] (7)
H_TESTHI8
H_TESTHI9
H_TEST_C9
TP_CPU_G1 (5)
Connect PECI to SB pin AF26
and use SB to do the Fan- control
for processor with digital thermometers on die.
V_FSB_VTT
VTT_OUT_RIGHT (4,5)
VTT_OUT_LEFT (4,5)
FORCEPH (28)
H_BR#0 (4,7)
VTT_OUT_LEFT (4,5)
C82
C82
X_C0.1U16Y0402
X_C0.1U16Y0402
RN6
RN6
8P4R-680R
8P4R-680R
VID2
VID0
VID5
VID4
VID7
VID3
VID6
VID1
RN9 8P4R-51R0402RN9 8P4R-51R0402
H_BPM#1
H_BPM#5
H_BPM#3
RN12 8P4R-51R0402RN12 8P4R-51R0402
H_TDI
H_BPM#2
H_TMS
H_BPM#4
H_TDO
H_TRST#
H_TCK
1
3
5
7
RN7
RN7
8P4R-680R
8P4R-680R
1
3
5
7
1
2
3
4
5
6
7
8
1
2
3
4
5
6
7
8
R553 51R0402R553 51R0402
R554 X_51R0402R554 X_51R0402
R556 51R0402R556 51R0402
R555 51R0402R555 51R0402
VTT_OUT_RIGHT
2
4
6
C65 C0.1U16Y2C65 C0.1U16Y2
8
C61 C0.1U16Y2C61 C0.1U16Y2
2
4
6
8
VTT_OUT_RIGHTH_BPM#0
PLACE BPM TERMINATION NEAR CPU
RN14 8P4R-51R0402RN14 8P4R-51R0402
H_TESTHI12
H_TESTHI11
H_TESTHI9
H_TESTHI10
H_TESTHI8
H_TESTHI1
H_SLP#
1
3
5
7
R116 51R0402R116 51R0402
R97 51R0402R97 51R0402
R104 51R0402R104 51R0402
2
4
6
8
VTT_OUT_LEFT
C70 C0.1U16Y2C70 C0.1U16Y2
Thermal Sense Select From IC8 or SST
CPU_TMPA_A
VTIN_GND_C
BSEL
1
2
0
0
0
1
0
0
R62 0R0402R62 0R0402
R64 X_0R0402R64 X_0R0402
R63 0R0402R63 0R0402
R65 X_0R0402R65 X_0R0402
FSB FREQUENCY
0
267 MHZ (1067)
0
0
200 MHZ (800)
133 MHZ (533)
1
TABLE
CPU_TMPA (23)
CPU_TMPA_SST (15)
VTIN_GND (23)
VTIN_GND_SST (15)
MICRO-START INT'L CO.,LTD.
MICRO-START INT'L CO.,LTD.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
5
4
3
2
Date: Sheet
MICRO-START INT'L CO.,LTD.
INTEL LGA775 CPU SIGNAL
INTEL LGA775 CPU SIGNAL
INTEL LGA775 CPU SIGNAL
MS-7263N1
MS-7263N1
MS-7263N1
1
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332Thursday, August 24, 2006
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332Thursday, August 24, 2006
1.1
1.1
1.1
5
VCCP
AF9
AF8
AF22
AF21
U8B
AF19
AF18
AF15
AF14
AF12
AF11
AE9
AE23
AE22
AE21
AE19
AE18
AE15
AE14
AE12
AE11
AD8
AD30
AD29
AD28
AD27
AD26
AD25
AD24
AD23
AC8
AC30
AC29
AC28
AC27
AC26
AC25
AC24
AC23
AB8
AA8
U8B
VCCP
VCC#AF19
VCC#AF18
VCC#AF15
VCC#AF14
VCC#AF12
VCC#AF11
VCC#AE9
VCC#AE23
VCC#AE22
VCC#AE21
VCC#AE19
VCC#AE18
VCC#AE15
VCC#AE14
VCC#AE12
VCC#AE11
VCC#AD8
VCC#AD30
VCC#AD29
VCC#AD28
VCC#AD27
VCC#AD26
VCC#AD25
VCC#AD24
VCC#AD23
VCC#AC8
VCC#AC30
VCC#AC29
VCC#AC28
VCC#AC27
VCC#AC26
VCC#AC25
VCC#AC24
VCC#AC23
VCC#AB8
VCC#AA8
VCC#AF22
VCC#AF21
VCC#Y30
VCC#Y8
Y8
Y29
Y30
VCC#AF9
VCC#AF8
VCC#Y28
VCC#Y29
Y28
VCCP
D D
C C
AG14
AG12
AG11
VCC#AG14
VCC#AG12
VCC#AG11
VCC#Y25
VCC#Y26
VCC#Y27
Y25
Y26
Y27
AG19
AG18
AG15
VCC#AG19
VCC#AG18
VCC#AG15
VCC#W8W8VCC#Y23
VCC#Y24
Y23
Y24
AG21
VCC#AG21
VCC#W30
W30
AG26
AG25
AG22
VCC#AG26
VCC#AG25
VCC#AG22
VCC#W27
VCC#W28
VCC#W29
W27
W28
W29
AG29
AG28
AG27
VCC#AG29
VCC#AG28
VCC#AG27
VCC#W24
VCC#W25
VCC#W26
W24
W25
W26
AG30
AG9
AG8
VCC#AG9
VCC#AG8
VCC#AG30
VCC#U8
VCC#V8
VCC#W23
V8
U8
W23
AH14
AH12
AH11
VCC#AH14
VCC#AH12
VCC#AH11
VCC#U28
VCC#U29
VCC#U30
U28
U29
U30
AH19
AH18
AH15
VCC#AH19
VCC#AH18
VCC#AH15
VCC#U25
VCC#U26
VCC#U27
U25
U26
U27
AH25
AH22
AH21
VCC#AH25
VCC#AH22
VCC#AH21
VCC#T8
VCC#U23
VCC#U24
T8
U23
U24
AH26
VCC#AH26
VCC#T30
T30
AH27
AH28
AH29
VCC#AH27
VCC#AH28
VCC#AH29
VCC#T27
VCC#T28
VCC#T29
T27
T28
T29
AH8
AH9
AH30
VCC#AH8
VCC#AH9
VCC#AH30
VCC#T24
VCC#T25
VCC#T26
T24
T25
T26
4
AJ11
AJ12
AJ14
VCC#AJ11
VCC#AJ12
VCC#R8
VCC#T23
P8
R8
T23
AJ15
AJ18
AJ19
VCC#AJ14
VCC#AJ15
VCC#AJ18
VCC#N30
VCC#N8
VCC#P8
N8
N29
N30
AJ21
AJ22
AJ25
VCC#AJ19
VCC#AJ21
VCC#AJ22
VCC#N27
VCC#N28
VCC#N29
N26
N27
N28
AJ8
AJ9
AJ26
VCC#AJ8
VCC#AJ25
VCC#AJ26
VCC#N24
VCC#N25
VCC#N26
N23
N24
N25
AK11
AK12
VCC#AJ9
VCC#AK11
VCC#AK12
VCC#M30
VCC#M8
VCC#N23
M8
M30
AK14
AK15
AK18
VCC#AK14
VCC#AK15
VCC#M28
VCC#M29
M27
M28
M29
AK19
AK21
AK22
VCC#AK18
VCC#AK19
VCC#AK21
VCC#M25
VCC#M26
VCC#M27
M24
M25
M26
AK25
AK26
AK8
VCC#AK22
VCC#AK25
VCC#AK26
VCC#L8
VCC#M23
VCC#M24
L8
K8
M23
AL11
AK9
VCC#AK8
VCC#AK9
VCC#AL11
VCC#K29
VCC#K30
VCC#K8
K29
K30
AL12
AL14
AL15
VCC#AL12
VCC#AL14
VCC#K27
VCC#K28
K26
K27
K28
AL18
AL19
AL21
VCC#AL15
VCC#AL18
VCC#AL19
VCC#K24
VCC#K25
VCC#K26
K23
K24
K25
AL22
AL25
AL26
VCC#AL21
VCC#AL22
VCC#AL25
VCC#J8
VCC#J9
VCC#K23
J8
J9
J30
3
AL29
AL30
AL8
VCC#AL26
VCC#AL29
VCC#AL30
VCC#J28
VCC#J29
VCC#J30
J27
J28
J29
AL9
AM11
VCC#AL8
VCC#AL9
VCC#AM11
VCC#J25
VCC#J26
VCC#J27
J25
J26
AM12
AM14
AM15
VCC#AM12
VCC#AM14
VCC#AM15
VCC#J22
VCC#J23
VCC#J24
J22
J23
J24
AM18
AM19
AM21
VCC#AM18
VCC#AM19
VCC#AM21
VCC#J19
VCC#J20
VCC#J21
J19
J20
J21
AM22
AM25
AM26
VCC#AM22
VCC#AM25
VCC#AM26
VCC#J14
VCC#J15
VCC#J18
J14
J15
J18
AM8
AM29
AM30
VCC#AM8
VCC#AM29
VCC#AM30
VCC#J11
VCC#J12
VCC#J13
J11
J12
J13
AM9
AN11
AN12
VCC#AM9
VCC#AN11
VCC#AN9
VCC#J10
J10
AN8
AN9
AN14
AN15
AN18
VCC#AN12
VCC#AN14
VCC#AN15
VCC#AN18
VTT_OUT_RIGHT
VCC#AN26
VCC#AN29
VCC#AN30
VCC#AN8
AN26
AN29
AN30
AN19
AN21
AN22
VCCA
VSSA
VCC#AN19
VCC#AN21
VCC#AN22
VCCPLL
VCC-IOPLL
VTT#A25
VTT#A26
VTT#A27
VTT#A28
VTT#A29
VTT#A30
VTT#B25
VTT#B26
VTT#B27
VTT#B28
VTT#B29
VTT#B30
VTT#C25
VTT#C26
VTT#C27
VTT#C28
VTT#C29
VTT#C30
VTT#D25
VTT#D26
VTT#D27
VTT#D28
VTT#D29
VTT#D30
VTTPWRGD
VTT_OUT_LEFT
VTT_SEL
RSVD#F29
VCC#AN25
1122334
AN25
ZIF-SOCK775-15u-in
ZIF-SOCK775-15u-in
4
A23
B23
D23
C23
A25
A26
A27
A28
A29
A30
B25
B26
B27
B28
B29
B30
C25
C26
C27
C28
C29
C30
D25
D26
D27
D28
D29
D30
VTT_PWG
AM6
VTT_OUT_RIGHT
AA1
VTT_OUT_LEFT
J1
F27
F29
2
H_VCCA
H_VSSA
H_VCCPLL
H_VCCIOPLL
1
V_FSB_VTT
V_FSB_VTT
C128 C10U10Y0805C128 C10U10Y0805
C133 C10U10Y0805C133 C10U10Y0805
C139 C10U10Y0805C139 C10U10Y0805
CAPS FOR FSB GENERIC
LGA775 pin AM6 is VTT_PWRGD, But for Conroe,
AM6 is a reserved pin.(VTT_PWRGD didn't exist on Conroe)
VTT_OUT_LEFT
B B
VTT_OUT_LEFT
GTLREF VOLTAGE SHOULD BE
0.63*VTT = 0.756V
R113 124R1%0402R113 124R1%0402
R110 124R1%0402R110 124R1%0402
R115
R115
210R1%0402
210R1%0402
R109
R109
210R1%0402
210R1%0402
CPU_GTLR0
CPU_GTLR1
C77
C77
C1U10X3
C1U10X3
C76
C76
C1U10X3
C1U10X3
R114 10R0402R114 10R0402
R112 10R0402R112 10R0402
C84
C84
C220P16X2
C220P16X2
C83
C83
C220P16X2
C220P16X2
CPU_GTLREF0 (3)
CPU_GTLREF1 (3)
PLACE AT CPU END OF ROUTE
VTT_OUT_RIGHT(3,5)
VTT_OUT_LEFT(3,5)
A A
VTT_OUT_RIGHT
VTT_OUT_LEFT
R82 X_130R1%0402-LFR82 X_130R1%0402-LF
R80 62R0402R80 62R0402
R100 X_100R0402R100 X_100R0402
R118 62R0402R118 62R0402
R28 62R0402R28 62R0402
H_PROCHOT#
H_IERR#
H_PWRGD
H_BR#0
H_CPURST#
H_PROCHOT# (3,28)
H_IERR# (3)
H_PWRGD (3,15)
H_BR#0 (3,7)
H_CPURST# (3,7)
PLACE AT ICH END OF ROUTE
H_PROCHOT#
5
V_FSB_VTT
R321 62R0402R321 62R0402
R330 62R0402R330 62R0402
TRMTRIP# (3,14)
H_FERR# (3,14)
4
PLACE COMPONENTS AS CLOSE AS POSSIBLE TO PROCESSOR SOCKET
TRACE WIDTH TO CAPS MUST BE SMALLER THAN 12MILS
V_FSB_VTT
L5 10U125m_0805L5 10U125m_0805
R134
R134
0R0805
R383
R383
10KR0402
10KR0402
3
0R0805
C115
C115
X_C1U10X3
X_C1U10X3
H_VCCPLL
C136
C136
C10U10Y0805
C10U10Y0805
Q50
Q50
2N3904_SOT23
2N3904_SOT23
C121
C121
C22U6.3X50805
C22U6.3X50805
C141
C141
C0.1U16Y2
C0.1U16Y2
THERM# (15)
C117
C117
C1U10X3
C1U10X3
V_FSB_VTT
V_1P5_ICH
R374
R374
10KR0402
10KR0402
R384
R384
X_0R0402
X_0R0402
L8 10U125m_0805L8 10U125m_0805
CP3 X_COPPERCP3 X_COPPER
1 2
VCC3 VCC3
R373
R373
10KR0402
10KR0402
Q48
Q48
2N3904_SOT23
2N3904_SOT23
VTT_PWRGOOD
H_VCCA
H_VSSA
100mA
100mA
RN27
RN27
1
2
3
4
5
6
7
8
8P4R-470R0402
8P4R-470R0402
H_FSBSEL1
H_FSBSEL2
H_FSBSEL0
2
VID_GD#(26,28)
VTT_PWG SPEC :
High > 0.9V
Low < 0.3V
Trise < 150ns
H_FSBSEL1 (3,6,9)
H_FSBSEL2 (3,6,9)
H_FSBSEL0 (3,6,9)
H_VCCIOPLL
FSBSEL RESISTOR CAN BE REMOVED IF ONLY TEJAS
AND CEDAR MILL ARE SUPPORTED
V_FSB_VTT
VTT_OUT_RIGHT
VCC5_SB
R33 680R0402R33 680R0402
R47
R47
1KR0402
1KR0402
R46 4.7K0402R46 4.7K0402
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
Date: Sheet
VTT_PWG
Q6
Q6
2N3904_SOT23
2N3904_SOT23
MICRO-START INT'L CO.,LTD.
MICRO-START INT'L CO.,LTD.
MICRO-START INT'L CO.,LTD.
INTEL LGA775 POWER
INTEL LGA775 POWER
INTEL LGA775 POWER
MS-7263N1
MS-7263N1
MS-7263N1
C34
C34
X_C1U10X3
X_C1U10X3
432Thursday, August 24, 2006
432Thursday, August 24, 2006
1
432Thursday, August 24, 2006
1.1
1.1
1.1
of
of
of
5
4
3
2
1
TP11TP11
TP12TP12
VTT_OUT_RIGHT(3,4)
TP13TP13
2005 Perf FMB 0 0
2005 Value FMB 0 NC
MSID1 MSID0
R73
R73
R78
R78
49.9R1%0402
49.9R1%0402
49.9R1%0402
49.9R1%0402
D D
R108 51R0402R108 51R0402
RSVD#E5E5RSVD#E6E6RSVD#E7
RSVD#E23
VSS#AF16
VSS#AF17
VSS#AF20
AF17
AF20
AF23
F23
F6
E7
RSVD#F23
VSS#AF23
VSS#AF24
VSS#AF25
AF24
AF25
AF26
H_COMP8
B13
IMPSEL#
VSS#AF26
AF27
H_COMP7
H_COMP6
AE3
E23
D1
AE4
COMP6Y3COMP7
VSS#AE29
VSS#AE30
AE5
AE29
AE30
RSVD#D1
RSVD#AE4
VSS#AE5
VSS#AE7
VSS#AF10
AE7
AF10
D14
RSVD#D14
VSS#AF13
AF13
AF16
U8C
U8C
A12
VSS#A12
A15
VSS#A15
A18
VSS#A18
A2
VSS#A2
A21
VSS#A21
A24
VSS#A24
A6
VSS#A6
A9
R559
R559
1KR0402
1KR0402
C C
B B
AA23
AA24
AA25
AA26
AA27
AA28
AA29
AA3
AA30
AA6
AA7
AB1
AB23
AB24
AB25
AB26
AB27
AB28
AB29
AB30
AB7
AC3
AC6
AC7
AD4
AD7
AE10
AE13
AE16
AE17
AE2
AE20
AE24
AE25
AE26
AE27
AE28
VSS#A9
VSS#AA23
VSS#AA24
VSS#AA25
VSS#AA26
VSS#AA27
VSS#AA28
VSS#AA29
VSS#AA3
VSS#AA30
VSS#AA6
VSS#AA7
VSS#AB1
VSS#AB23
VSS#AB24
VSS#AB25
VSS#AB26
VSS#AB27
VSS#AB28
VSS#AB29
VSS#AB30
VSS#AB7
VSS#AC3
VSS#AC6
VSS#AC7
VSS#AD4
VSS#AD7
VSS#AE10
VSS#AE13
VSS#AE16
VSS#AE17
VSS#AE2
VSS#AE20
VSS#AE24
VSS#AE25
VSS#AE26
VSS#AE27
VSS#AE28
R140 24.9R1%0402R140 24.9R1%0402
J3
RSVD#B13
VSS#AF27
VSS#AF28
VSS#AF29
AF3
AF28
AF29
N4
P5
RSVD#J3
RSVD#P5
RSVD#N4
VSS#AF3
VSS#AF30
VSS#AF6
AF6
AF30
R93 51R0402R93 51R0402
MSID[1]V1MSID[0]
VSS#AF7
VSS#AG10
AF7
AG10
R89 51R0402R89 51R0402
W1
AC4
RSVD#AC4
VSS#AG13
VSS#AG16
AG13
AG16
AG17
VSS#Y7Y7VSS#Y5Y5VSS#Y2
VSS#AG17
VSS#AG20
VSS#AG23
AG20
AG23
AG24
Y2
W4
VSS#W7W7VSS#W4
VSS#AG24
VSS#AG7
VSS#AH1
AH1
AG7
AH10
V6
V30
VSS#V7V7VSS#V6
VSS#AH10
VSS#AH13
VSS#AH16
AH13
AH16
AH17
V3
V29
V28
VSS#V3
VSS#V30
VSS#V29
VSS#AH17
VSS#AH20
VSS#AH23
AH20
AH23
AH24
V27
V26
VSS#V28
VSS#V27
VSS#V26
VSS#AH24
VSS#AH3
VSS#AH6
AH3
AH6
V25
V24
VSS#V25
VSS#V24
VSS#AH7
VSS#AJ10
AH7
AJ10
V23
U1
VSS#U7U7VSS#U1
VSS#V23
VSS#AJ13
VSS#AJ16
AJ13
AJ16
AJ17
H_TESTHI12 (3)
T3
VSS#T7T7VSS#T6T6VSS#T3
VSS#AJ17
VSS#AJ20
VSS#AJ23
VSS#AJ24
AJ20
AJ23
AJ24
R30
R5
VSS#R7R7VSS#R5
VSS#AJ27
VSS#AJ28
AJ27
AJ28
AJ29
R29
R28
R27
VSS#R30
VSS#R29
VSS#R28
VSS#AJ29
VSS#AJ30
VSS#AJ4
AJ4
AJ7
AJ30
R26
R25
VSS#R27
VSS#R26
VSS#R25
VSS#AJ7
VSS#AK10
VSS#AK13
AK10
AK13
R24
VSS#R24
VSS#AK16
AK16
2006 65W FMB 0 NC
P4
R23
P30
P29
P28
P27
P26
P25
P24
VSS#P29
VSS#P28
VSS#AK27
VSS#AK28
AK27
AK28
AK29
VSS#P27
VSS#P26
VSS#P25
VSS#AK29
VSS#AK30
VSS#AK5
AK5
AK7
AK30
P23
VSS#N7N7VSS#N6N6VSS#N3
VSS#P24
VSS#P23
VSS#AK7
VSS#AL10
VSS#AL13
AL10
AL13
N3
VSS#AL16
VSS#AL17
AL16
AL17
R2
VSS#R2
VSS#R23
VSS#AK17
VSS#AK2
AK2
AK17
AK20
VSS#P7P7VSS#P4
VSS#P30
VSS#AK20
VSS#AK23
VSS#AK24
AK23
AK24
M1
VSS#L7L7VSS#L6
VSS#M7M7VSS#M1
VSS#AL20
VSS#AL23
VSS#AL24
AL20
AL23
AL24
L30
L6
L3
VSS#L30
VSS#AL27
VSS#AL28
AL3
AL27
AL28
L29
L28
VSS#L3
VSS#L29
VSS#L28
VSS#AL3
VSS#AL7
VSS#AM1
AL7
AM1
L27
L26
L25
VSS#L27
VSS#L26
VSS#L25
VSS#AM10
VSS#AM13
VSS#AM16
AM10
AM13
AM16
L24
L23
VSS#K7K7VSS#K5
VSS#L24
VSS#L23
VSS#AM17
VSS#AM20
VSS#AM23
AM17
AM20
AM23
K2
K5
J7
VSS#K2
VSS#AM24
VSS#AM27
VSS#AM28
AM24
AM27
AM28
H9
VSS#J4J4VSS#J7
VSS#H9
VSS#AM4
AM4
H7
H8
VSS#H7
VSS#H8
VSS#AN1
VSS#AN10
AN1
AN10
H3
H6
VSS#H3
VSS#H6
VSS#AN13
VSS#AN16
AN13
AN16
AN17
H26
H27
H28
VSS#H27
VSS#H28
VSS#AN17
VSS#AN2
VSS#AN20
AN2
AN20
AN23
H23
H24
H25
VSS#H24
VSS#H25
VSS#H26
VSS#AN23
VSS#AN24
VSS#AN27
AN24
AN27
AN28
H20
H21
H22
VSS#H21
VSS#H22
VSS#H23
VSS#AN28
VSS#B1B1VSS#B11
B11
H17
H18
H19
VSS#H14
VSS#H13
VSS#H17
VSS#H18
VSS#H19
VSS#H20
VSS#H12
VSS#H11
VSS#H10
VSS#G1
VSS#F7
VSS#F4
VSS#F22
VSS#F19
VSS#F16
VSS#F13
VSS#F10
VSS#E8
VSS#E29
VSS#E28
VSS#E27
VSS#E26
VSS#E25
VSS#E20
VSS#E2
VSS#E17
VSS#E14
VSS#E11
VSS#D9
VSS#D6
VSS#D5
VSS#D3
VSS#D24
VSS#D21
VSS#D18
VSS#D15
VSS#D12
VSS#C7
VSS#C4
VSS#C24
VSS#C22
VSS#C19
VSS#C16
VSS#C13
VSS#C10
VSS#B8
VSS#B5
VSS#B24
VSS#B20
VSS#B17
VSS#B14
ZIF-SOCK775-15u-in
ZIF-SOCK775-15u-in
B14
H14
H13
H12
H11
H10
G1
F7
F4
F22
F19
F16
F13
F10
E8
E29
E28
E27
E26
E25
E20
E2
E17
E14
E11
D9
D6
D5
D3
D24
D21
D18
D15
D12
C7
C4
C24
C22
C19
C16
C13
C10
B8
B5
B24
B20
B17
R558 51R0402R558 51R0402
TP_CPU_E29
TP_CPU_G1 (3)
VTT_OUT_LEFT (3,4)
TP17TP17
TP3TP3
CPU DECOUPLING CAPACITORS
22u/6.3V/X5R,1206,80/-20%
EC22
EC22
C22U6.3X51206
A A
C22U6.3X51206
EC20
EC20
C22U6.3X51206
C22U6.3X51206
EC32
EC32
C22U6.3X51206
C22U6.3X51206
EC21
EC21
C22U6.3X51206
C22U6.3X51206
EC17
EC17
C22U6.3X512066
C22U6.3X512066
EC31
EC31
C22U6.3X51206
C22U6.3X51206
VCCP VCCPVCCP VCCP
Place these caps within socket cavity
5
4
EC19
EC19
C22U6.3X51206
C22U6.3X51206
EC27
EC27
C22U6.3X51206
C22U6.3X51206
EC30
EC30
C22U6.3X51206
C22U6.3X51206
EC18
EC18
C22U6.3X51206
C22U6.3X51206
EC28
EC28
C22U6.3X51206
C22U6.3X51206
EC29
EC29
C22U6.3X51206
C22U6.3X51206
MICRO-START INT'L CO.,LTD.
MICRO-START INT'L CO.,LTD.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
3
2
Date: Sheet
MICRO-START INT'L CO.,LTD.
INTEL LGA775 GND
INTEL LGA775 GND
INTEL LGA775 GND
1.1
1.1
MS-7263N1
MS-7263N1
MS-7263N1
1
532Thursday, August 24, 2006
532Thursday, August 24, 2006
532Thursday, August 24, 2006
1.1
of
of
of
5
U16
VDD_CK
VDD_CLK_IO
D D
IO_VOUT
C285 C27P50N2C285 C27P50N2
C290 C27P50N2C290 C27P50N2
CK_PWRGD(15,19)
SMBDATA(15,17,18,23)
C C
SMBCLK(15,17,18,23)
SMBCLK_ISO(11,23,26)
SMBDATA_ISO(11,23,26)
PLL_XI
Y3
Y3
14.318MHZ32P_D-1
14.318MHZ32P_D-1
PLL_XO
FSB
R255 X_0R0402R255 X_0R0402
R254 X_0R0402R254 X_0R0402
R242 0R0402R242 0R0402
R243 0R0402R243 0R0402
U16
16
VDD
9
VDD48
2
VDDPCI
61
VDDREF
39
VDDSRC
55
VDDCPU
12
VDD96I/O
20
VDDPLL3I/O
26
VDDSRCI/O
45
VDDSRCI/O
36
VDDSRCI/O
49
VIN
48
VOUT
60
X1
59
X2
56
CK_PWRGD/PD#
57
FSLB/TEST_MODE
64
SCLK
63
SDATA
15
GND
19
GND
11
GND48
52
GNDCPU
8
GNDPCI
58
GNDREF
23
GNDSRC
29
GNDSRC
42
GNDSRC
CY505YC64CT
CY505YC64CT
4
CPUCLKT0
CPUCLKC0
CPUCLKT1
CPUCLKC1
CPUT2_ITP/SRCT8
CPUC2_ITP/SRCC8
DOTC_96/SRCC0
DOTT_96/SRCT0
SRCCLKT1/SE1
SRCCLKC1/SE2
SRCCLKT2/SATACL
SRCCLKC2/SATACL
SRCCLKT3/CR#_C
SRCCLKC3/CR#_D
SRCCLKT4
SRCCLKC4
PCI_STOP#/SRCT5
CPU_STOP#/SRCC5
SRCCLKT6
SRCCLKC6
SRCCLKT7/CR#_F
SRCCLKC7/CR#_E
SRCCLKT9
SRCCLKC9
SRCCLKT10
SRCCLKC10
SRCCLKT11/CR#_H
SRCCLKC11/CR#_G
PCICLK0/CR#_A
PCICLK1/CR#_B
PCICLK2/LTE
PCICLK3
PCICLK4/SRC5_EN
PCI_F5/ITP_EN
USB_48MHZ/FSLA
FSLC/TST_SL/REF
54
CPUCLK#
53
MCHCLK
51
MCHCLK#
50
47
46
CK_DOT96#
14
CK_DOT96
13
17
18
CK_PE_SRC2
21
CK_PE_SRC2#
22
24
25
CK_PE_SRC4
27
CK_PE_SRC4#
28
CK_PE_SRC5
38
CK_PE_SRC5#
37
CK_PE_SRC6
41
CK_PE_SRC6#
40
44
43
CK_PE_SRC3
30
CK_PE_SRC3# CK_PE_100M_PCIE1#
31
CK_PE_SRC7
34
CK_PE_SRC7# CK_PE_100M_PCIE2#
35
Don't use SRCCLK11 for diff signal(pin out not pair)
33
32
PCICLK0
1
PCICLK1
3
PCICLK2
4
PCICLK3
5
PCICLK4
6
PCICLK6 ICH_PCLK
7
USB_48M
10
CK_14M
62
C279
C279
C312
X_C10P50N2
X_C10P50N2
C312
X_C10P50N2
X_C10P50N2
R260 X_0R0402R260 X_0R0402
R258 X_0R0402R258 X_0R0402
R296 1KR0402R296 1KR0402
R244 1KR0402R244 1KR0402
R24733R0402 R24733R0402
R24833R0402 R24833R0402
R24933R0402 R24933R0402
R25033R0402 R25033R0402
R29533R0402 R29533R0402
R30433R0402 R30433R0402
R28647R0402 R28647R0402
R28747R0402 R28747R0402
R28233R0402 R28233R0402
R28333R0402 R28333R0402
R25633R0402 R25633R0402
R25733R0402 R25733R0402
R273X_33R0402 R273X_33R0402
R272X_33R0402 R272X_33R0402
R263X_33R0402 R263X_33R0402
R261X_33R0402 R261X_33R0402
R29922R0402 R29922R0402
R27533R0402 R27533R0402
R29733R0402 R29733R0402
R29833R0402 R29833R0402
R28822R0402 R28822R0402
R30033R0402 R30033R0402
R28533R0402 R28533R0402
R30133R0402 R30133R0402
R24633R0402 R24633R0402
R24533R0402 R24533R0402
CK_H_CPUCPUCLK
CK_H_CPU#
CK_H_MCH
CK_H_MCH#
CK_96M_DREF#
CK_96M_DREF
CK_ICHSATA
CK_ICHSATA#
CK_PE_100M_ICH
CK_PE_100M_ICH#
PCI_STOP#
CPU_STOP#
CK_PE_100M_MCH
CK_PE_100M_MCH#
CK_PE_100M_PCIE1
CK_PE_100M_PCIE2
TPM_PCLK
PCI_CLK0
PCI_CLK1
RAIDCLK
SIO_PCLK
PCI_CLK_LAN
CK_48M_USB_ICH
SIO_14
CK_14M_ICH
CK_FSBSEL0
CK_FSBSEL2
3
CK_H_CPU (3)
CK_H_CPU# (3)
CK_H_MCH (7)
CK_H_MCH# (7)
CK_96M_DREF# (9)
CK_96M_DREF (9)
CK_ICHSATA (15)
CK_ICHSATA# (15)
CK_PE_100M_ICH (14)
CK_PE_100M_ICH# (14)
PCI_STOP# (15)
CPU_STOP# (15)
CK_PE_100M_MCH (9)
CK_PE_100M_MCH# (9)
CK_PE_100M_PCIE1 (17)
CK_PE_100M_PCIE1# (17)
CK_PE_100M_PCIE2 (17)
CK_PE_100M_PCIE2# (17)
TPM_PCLK (12)
PCI_CLK0 (21)
PCI_CLK1 (21)
RAIDCLK (19)
SIO_PCLK (23)
PCI_CLK_LAN (18)
ICH_PCLK (14)
CK_48M_USB_ICH (15)
SIO_14 (23)
CK_14M_ICH (15)
2
1
VDD_CK Decoupling
Place near VDD_CK Pins
VDD_CK
C341
C341
C0.1U6.3Y2
C0.1U6.3Y2
C247
C247
C0.1U6.3Y2
C0.1U6.3Y2
C303
C303
C0.1U6.3Y2
C0.1U6.3Y2
C280
C280
C0.1U6.3Y2
C0.1U6.3Y2
C306
C306
C0.1U6.3Y2
C0.1U6.3Y2
C310
C310
C0.1U6.3Y2
C0.1U6.3Y2
C342
C342
C1U6.3X2
C1U6.3X2
1 2
C277
C277
C1U6.3X2
C1U6.3X2
1 2
C343
C343
C1U6.3X2
C1U6.3X2
1 2
C281
C281
C1U6.3X2
C1U6.3X2
1 2
C314
C314
C1U6.3X2
C1U6.3X2
1 2
C311
C311
C1U6.3X2
C1U6.3X2
1 2
Trace length less than 0.5inchs
B B
PCICLK4
VDD_CK
R314
VDD_CK & VDD_CLK_IO Power
Reserve for VCC3&VCC3_SB Select
R302
R302
15R0805
15R0805
C276
C276
C273
C273
C10U10Y0805
C10U10Y0805
C0.1U16Y2
C0.1U16Y2
VDD_CK
Q37
Q37
2N3904_SOT23
2N3904_SOT23
FB3 X_80L3_70_0805FB3 X_80L3_70_0805
IO_VOUT
R251 33R0402R251 33R0402
C266
C266
X_C10P50N
A A
FB2 80L3_70_0805FB2 80L3_70_0805
+
+
C299
C299
X_C10U6.3X51206
X_C10U6.3X51206
VDD_CLK_IO
C307
C307
C278
C278
C10U10Y0805
C10U10Y0805
C0.1U16Y2
C0.1U16Y2
C319
C319
C313
C313
C10U10Y0805
C10U10Y0805
C0.1U16Y2
C0.1U16Y2
VCC3VCC3_SB
C315
C315
C308
C308
C10U10Y0805
C10U10Y0805
C0.1U16Y2
C0.1U16Y2
H_FSBSEL0
H_FSBSEL2
VDD_CK VDD_CK
H_FSBSEL2 H_FSBSEL0
R314
10KR0402
10KR0402
SRC5/SRC5# enable :stuff R314
CPU_STOP#,PCI_STOP# :stuff R289
R313 X_0R0402R313 X_0R0402
R235 X_0R0402R235 X_0R0402
R227
R227
1KR0402
1KR0402
R236
R236
4.7K0402
4.7K0402
Place near VDD_CLK_IO Pins
5
4
R289 X_10KR0402R289 X_10KR0402
Q35
Q35
2N3904_SOT23
2N3904_SOT23
Q36
Q36
2N3904_SOT23
2N3904_SOT23
CK_FSBSEL0
CK_FSBSEL2
1KR0402
1KR0402
Q38
Q38
2N3904_SOT23
2N3904_SOT23
4.7K0402
4.7K0402
Q41
Q41
2N3904_SOT23
2N3904_SOT23
3
R308
R308
R315
R315
H_FSBSEL1(3,4,9)
H_FSBSEL0(3,4,9)
H_FSBSEL2(3,4,9)
VDD_CK
R310
R310
R234
R234
47KR0402
47KR0402
47KR0402
CK_14M_ICH
33KR0402
33KR0402
H_FSBSEL1 FSB
H_FSBSEL0 USB_48M
H_FSBSEL2
FSC FSB FSA CPU
Bit7 Bit6 Bit5 MHz
0 0 0 266.66
0 0 1 133.33
0 1 0 200.00
0 1 1 166.66
1 0 0 333.33
1 0 1 100.00
1 1 0 400.00
47KR0402
CK_48M_USB_ICH
R233
R233
R312
R312
33KR0402
33KR0402
R259 1KR0402R259 1KR0402
R311 X_10KR0402R311 X_10KR0402
R241 X_10KR0402R241 X_10KR0402
2
CK_14M
For EMI Reserver
PCI_CLK0
PCI_CLK1
RAIDCLK
SIO_PCLK
TPM_PCLK
PCI_CLK_LAN
ICH_PCLK
CK_48M_USB_ICH
SIO_14
CK_14M_ICH
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
Date: Sheet
Thursday, August 24, 2006
Thursday, August 24, 2006
Thursday, August 24, 2006
C316 C10P25N0402C316 C10P25N0402
C334 C10P25N0402C334 C10P25N0402
C335 X_C10P25N0402C335 X_C10P25N0402
C325 X_C10P25N0402C325 X_C10P25N0402
C332 X_C10P25N0402C332 X_C10P25N0402
C333 C10P25N0402C333 C10P25N0402
C326 C10P25N0402C326 C10P25N0402
C331 X_C10P25N0402C331 X_C10P25N0402
C264 X_C10P25N0402C264 X_C10P25N0402X_C10P50N
C263 X_C10P25N0402C263 X_C10P25N0402
MICRO-START INT'L CO.,LTD.
MICRO-START INT'L CO.,LTD.
MICRO-START INT'L CO.,LTD.
CLOCK Generator-ICSLP505-1
CLOCK Generator-ICSLP505-1
CLOCK Generator-ICSLP505-1
MS-7263N1
MS-7263N1
MS-7263N1
1
of
6
of
6
of
6
1.1
1.1
1.1
32
32
32
5
4
3
2
1
B27
A30
VTT_40
VCC_39
AB24
AB22
A28
R27
VTT_41
VTT_42
VCC_40
VCC_41
AB20
AA25
R26
R24
VTT_43
VTT_44
VCC_42
VCC_43
AA23
AA21
V_1P25_CORE
AG19
AG18
R23
VTT_45
VTT_46
VCC_84
VCC_44
VCC_45
VCC_46
VCC_47
Y24
AA3
AA19
AA13
AG17
AG15
VCC_85
VCC_86
VCC_48
VCC_49
Y22
Y20
AG14
AF26
VCC_87
VCC_88
VCC_50
VCC_51
Y13
AF25
AF24
AF22
VCC_89
VCC_90
VCC_91
VCC_52Y6VCC_53
VCC_54
V13
V12
V10
AF20
AF18
VCC_93
VCC_94
VCC_55
VCC_56V9VCC_57
U13
AF17
AF15
AF14
VCC_95
VCC_96
VCC_97
VCC_58
VCC_59U9VCC_60U6VCC_61U3VCC_62
U10
AE27
AE26
AE25
AE23
AE21
AE19
AE17
VCC_98
VCC_99
VCC_100
VCC_101
VCC_102
VCC_103
VCC_104
VCC_63
VCC_64N9VCC_65N8VCC_66N6VCC_67N3VCC_68L6VCC_69J6VCC_70J3VCC_71J2VCC_72G2VCC_73
N12
N11
AD27
AD26
VCC_105
VCC_106
VCC_107
AD18
AD17
VCC_108
VCC_109
AD15
AD14
VCC_110
VCC_111
F11
AC27
AC26
AC17
AC15
VCC_112
VCC_113
VCC_114
VCC_74F9VCC_75D4VCC_76
C13
AC14
AB27
AB26
VCC_115
VCC_116
VCC_117
VCC_77C9VCC_78
VCC_79
P20
Y11
AG25
AB18
AB17
VCC_118
VCC_119
VCC_120
VCC_81
VCC_82
VCC_83
AG21
AG20
AA27
AA26
HD0
HD1
HD2
HD3
VCC_121
VCC_122
HD4
HD5
HD6
HD7
HD8
HD9
HD10
HD11
HD12
HD13
HD14
HD15
HD16
HD17
HD18
HD19
HD20
HD21
HD22
HD23
HD24
HD25
HD26
HD27
HD28
HD29
HD30
HD31
HD32
HD33
HD34
HD35
HD36
HD37
HD38
HD39
HD40
HD41
HD42
HD43
HD44
HD45
HD46
HD47
HD48
HD49
HD50
HD51
HD52
HD53
HD54
HD55
HD56
HD57
HD58
HD59
HD60
HD61
HD62
HD63
HDINV#0
HDINV#1
HDINV#2
HDINV#3
HDSTBP0#
HDSTBN0#
HDSTBP1#
HDSTBN1#
HDSTBP2#
HDSTBN2#
HDSTBP3#
HDSTBN3#
Broadwater-GF
Broadwater-GF
R40
P41
R41
N40
R42
M39
N41
N42
L41
J39
L42
J41
K41
G40
F41
F42
C42
D41
F38
G37
E42
E39
E37
C39
B39
G33
A37
F33
E35
K32
H32
B34
J31
F32
M31
E31
K31
G31
K29
F31
J29
F29
L27
K27
H26
L26
J26
M26
C33
C35
E41
B41
D42
C40
D35
B40
C38
D37
B33
D33
C34
B35
A32
D32
M40
J33
G29
E33
L40
M43
G35
H33
G27
H27
B38
D38
H_D#0
H_D#1
H_D#2
H_D#3
H_D#4
H_D#5
H_D#6
H_D#7
H_D#8
H_D#9
H_D#10
H_D#11
H_D#12
H_D#13
H_D#14
H_D#15
H_D#16
H_D#17
H_D#18
H_D#19
H_D#20
H_D#21
H_D#22
H_D#23
H_D#24
H_D#25
H_D#26
H_D#27
H_D#28
H_D#29
H_D#30
H_D#31
H_D#32
H_D#33
H_D#34
H_D#35
H_D#36
H_D#37
H_D#38
H_D#39
H_D#40
H_D#41
H_D#42
H_D#43
H_D#44
H_D#45
H_D#46
H_D#47
H_D#48
H_D#49
H_D#50
H_D#51
H_D#52
H_D#53
H_D#54
H_D#55
H_D#56
H_D#57
H_D#58
H_D#59
H_D#60
H_D#61
H_D#62
H_D#63
H_DBI#0
H_DBI#1
H_DBI#2
H_DBI#3
H_DSTBP#0 (3)
H_DSTBN#0 (3)
H_DSTBP#1 (3)
H_DSTBN#1 (3)
H_DSTBP#2 (3)
H_DSTBN#2 (3)
H_DSTBP#3 (3)
H_DSTBN#3 (3)
H_D#[0..63] (3)
H_DBI#[0..3] (3)
V_FSB_VTT
P29
P27
P26
P24
P23
N29
N26
N24
N23
M29
M24
M23
L24
L23
K24
K23
J24
J23
H24
H23
G26
G24
G23
F26
F24
F23
E29
E27
E26
E23
D29
D28
D27
C30
C29
C27
B30
B29
VTT_33
VCC_32
AD20
AC25
VTT_34
VTT_35
VCC_80
VCC_34
AC23
AC21
VTT_36
VTT_37
VCC_35
VCC_36
AC19
AC13
B28
VTT_38
VTT_39
VCC_37
VCC_38
AC6
U12A
U12A
J42
L39
J40
L37
L36
K42
N32
N34
M38
N37
M36
R34
N35
N38
U37
N39
R37
P42
R39
V36
R38
U36
U33
R35
V33
V35
Y34
V42
V38
Y36
Y38
Y39
AA37
M34
U34
F40
L35
L38
G43
J37
W40
Y40
W41
T43
Y43
U42
V41
AA42
W42
G39
U40
U41
AA41
U39
R32
U32
AM17
C31
AM18
J13
D23
C25
D25
B25
D24
B24
V_1P25_CORE
HA3#
HA4#
HA5#
HA6#
HA7#
HA8#
HA9#
HA10#
HA11#
HA12#
HA13#
HA14#
HA15#
HA16#
HA17#
HA18#
HA19#
HA20#
HA21#
HA22#
HA23#
HA24#
HA25#
HA26#
HA27#
HA28#
HA29#
HA30#
HA31#
HA32#
HA33#
HA34#
HA35#
HADSTB0#
HADSTB1#
HREQ0#
HREQ1#
HREQ2#
HREQ3#
HREQ4#
HADS#
HTRDY#
HDRDY#
HDEFER#
HITM#
HHIT#
HLOCK#
HBREQ0#
HBNR#
HBPRI#
HDBSY#
HRS0#
HRS1#
HRS2#
HCLKP
HCLKN
PWROK
HCPURST#
RSTIN#
ICH_SYNC#
HRCOMP
HSCOMP
HSCOMP#
HSWING
HDVREF
HAVREF
VTT_1
AJ12
VTT_2
VTT_3
VCC_1
VCC_2
AJ11
VTT_4
VCC_3
AJ10
VTT_5
VCC_4
AJ9
VTT_6
VCC_5
AJ8
VTT_7
VCC_6
AJ7
VTT_8
VCC_7
AJ6
VTT_9
VCC_8
AJ5
VTT_10
VCC_9
AJ4
AJ3
VTT_11
VTT_12
VCC_10
VCC_11
AJ2
AH4
VTT_13
VTT_14
VCC_12
VCC_13
AH2
AH1
VTT_15
VTT_16
VCC_14
VCC_15
AG13
AG12
VTT_17
VTT_18
VCC_16
VCC_17
AG11
AG10
VTT_19
VTT_20
VCC_18
VCC_19
AG9
AG8
VTT_21
VTT_22
VCC_20
VCC_21
AG7
AG6
VTT_23
VTT_24
VCC_22
VCC_23
AG5
AG4
VTT_25
VTT_26
VCC_24
VCC_25
AG3
AG2
VTT_27
VTT_28
VCC_26
VCC_27
AF13
AF12
VTT_29
VTT_30
VCC_28
VCC_29
AF11
AD24
VTT_31
VTT_32
VCC_30
VCC_31
AD22
PLTRST#(14,23)
H_A#3
H_A#4
H_A#5
H_A#6
H_A#7
H_A#8
H_A#9
H_A#10
H_A#11
H_A#12
H_A#13
H_A#14
H_A#15
H_A#16
H_A#17
H_A#18
H_A#19
H_A#20
H_A#21
H_A#22
H_A#23
H_A#24
H_A#25
H_A#26
H_A#27
H_A#28
H_A#29
H_A#30
H_A#31
H_A#32
H_A#33
H_A#34
H_A#35
H_REQ#0
H_REQ#1
H_REQ#2
H_REQ#3
H_REQ#4
H_RS#0
H_RS#1
H_RS#2
HXRCOMP
HXSCOMP
HXSCOMPB
HXSWING
MCH_GTLREF
H_A#[3..35](3)
D D
H_ADSTB#0(3)
C C
B B
H_ADSTB#1(3)
H_REQ#[0..4](3)
H_ADS#(3)
H_TRDY#(3)
H_DRDY#(3)
H_DEFER#(3)
H_HITM#(3)
H_HIT#(3)
H_LOCK#(3)
H_BR#0(3,4)
H_BNR#(3)
H_BPRI#(3)
H_DBSY#(3)
H_RS#[0..2](3)
CK_H_MCH(6)
CK_H_MCH#(6)
PWRGD_3V(15,26)
H_CPURST#(3,4)
ICH_SYNC#(15)
R176 16.9R1%3R176 16.9R1%3
HD_SWING VOLTAGE "10 MIL TRACE , 7 MIL SPACE"
HD_SWING Should Be 1/4*VTT +/- 2%
V_FSB_VTT
V_FSB_VTT
R169 49.9R1%0402R169 49.9R1%0402
R168 49.9R1%0402R168 49.9R1%0402
A A
5
HXSCOMP
C188
C188
X_C2.7P25N0402
X_C2.7P25N0402
HXSCOMPB
C187
C187
X_C2.7P25N0402
X_C2.7P25N0402
Place Divider Resistor Near V_FSB_VTT
V_FSB_VTT
R166
R166
301R1%2
301R1%2
R165
R165
100R1%2
100R1%2
R167 51R0402R167 51R0402
C186
C186
C0.01U16X2
C0.01U16X2
4
HXSWING
GTLREF Voltage Should Be 0.63*VTT=0.756V
124 ohm Over 210 Resistors
V_FSB_VTT
R172
R172
124R1%0402
124R1%0402
R171
R171
210R1%0402
210R1%0402
MCH_GTLREF_CPU
R173 51R0402R173 51R0402
C190
C190
C0.1U16Y2
C0.1U16Y2
3
MCH_GTLREF_CPU (3)
MCH_GTLREF
C192
C192
C2200P10X2
C2200P10X2
C180
C180
C0.1U16Y2
C0.1U16Y2
V_FSB_VTT
C149
C149
C0.1U16Y2
C0.1U16Y2
2
C175
C175
C0.1U16Y2
C0.1U16Y2
MICRO-START INT'L CO.,LTD.
MICRO-START INT'L CO.,LTD.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
Date: Sheet
MICRO-START INT'L CO.,LTD.
INTEL Broaswater -CPU signal
INTEL Broaswater -CPU signal
INTEL Broaswater -CPU signal
MS-7263N1
MS-7263N1
MS-7263N1
1
of
732Thursday, August 24, 2006
of
732Thursday, August 24, 2006
of
732Thursday, August 24, 2006
1.1
1.1
1.1
5
4
3
2
1
DATA_B39
DATA_B38
AN35
AR37
SDQ_B38
SDQ_B39
SDQ_A38
SDQ_A39
AP41
AR42
DATA_A39
DATA_A38
DATA_B40
DATA_B41
AM35
AM38
SDQ_B40
SDQ_B41
SDQ_A40
SDQ_A41
AN41
AM39
DATA_A40
DATA_A41
DATA_B43
DATA_B42
AJ34
AL38
SDQ_B42
SDQ_B43
SDQ_A42
SDQ_A43
AK42
AK41
DATA_A43
DATA_A42
SCKE_B[0..1](11,12)
DATA_B44
DATA_B45
AR39
AM34
SDQ_B44
SDQ_B45
SDQ_A44
SDQ_A45
AN40
AN42
DATA_A45
DATA_A44
DATA_B47
DATA_B46
AL37
AL32
SDQ_B46
SDQ_B47
SDQ_A46
SDQ_A47
AL42
AL39
DATA_A47
DATA_A46
DATA_B49
DATA_B48
AG38
AJ38
SDQ_B48
SDQ_B49
SDQ_A48
SDQ_A49
AJ40
AH43
DATA_A49
DATA_A48
DATA_B50
DATA_B51
AF35
AF33
SDQ_B50
SDQ_B51
SDQ_A50
SDQ_A51
AF39
AE40
DATA_A50
DATA_A51
DATA_B[0..63](11)
DATA_B23
DATA_B22
AV15
AW17
SDQ_B21
SDQ_B22
SDQ_B23
SDQ_A21
SDQ_A22
SDQ_A23
BA10
BB10
DATA_A23
DATA_A22
DATA_B24
DATA_B25
AV24
AT23
SDQ_B24
SDQ_B25
SDQ_A24
SDQ_A25
AT18
AR18
DATA_A24
DATA_A25
DATA_B26
DATA_B27
AT26
AP26
SDQ_B26
SDQ_B27
SDQ_A26
SDQ_A27
AT21
AU21
DATA_A26
DATA_A27
DATA_B28
DATA_B29
AU23
AW23
SDQ_B28
SDQ_B29
SDQ_A28
SDQ_A29
AP17
AN17
DATA_A28
DATA_A29
DATA_B31
DATA_B30
AR24
AN26
SDQ_B30
SDQ_B31
SDQ_A30
SDQ_A31
AP20
AV20
DATA_A31
DATA_A30
DATA_B32
DATA_B33
AW37
AV38
SDQ_B32
SDQ_B33
SDQ_A32
SDQ_A33
AV42
AU40
DATA_A32
DATA_A33
DATA_B34
DATA_B35
AN36
AN37
SDQ_B34
SDQ_B35
SDQ_A34
SDQ_A35
AP42
AN39
DATA_A34
DATA_A35
DATA_B37
DATA_B36
AU35
AR35
SDQ_B36
SDQ_B37
SDQ_A36
SDQ_A37
AV40
AV41
DATA_A36
DATA_A37
DATA_B1
DATA_B6
DATA_B4
DATA_B7
DATA_B3
DATA_B5
DATA_B2
DATA_B0
D D
C C
B B
VCC_DDR
C0.1U16Y2
C0.1U16Y2
A A
SCS_A#[0..1](11,12)
RAS_A#(11,12)
CAS_A#(11,12)
WE_A#(11,12)
MAA_A[0..14](11,12)
ODT_A[0..1](11,12)
SBS_A[0..2](11,12)
DQS_A0(11)
DQS_A#0(11)
DQS_A1(11)
DQS_A#1(11)
DQS_A2(11)
DQS_A#2(11)
DQS_A3(11)
DQS_A#3(11)
DQS_A4(11)
DQS_A#4(11)
DQS_A5(11)
DQS_A#5(11)
DQS_A6(11)
DQS_A#6(11)
DQS_A7(11)
DQS_A#7(11)
P_DDR0_A(11)
N_DDR0_A(11)
P_DDR1_A(11)
N_DDR1_A(11)
P_DDR2_A(11)
N_DDR2_A(11)
R219 20R1%0402R219 20R1%0402 R231 1KR0402R231 1KR0402
R222 20R1%0402R222 20R1%0402
R157 20R1%0402R157 20R1%0402
C260
C260
R155 20R1%0402R155 20R1%0402
Place CAPs close to RCOMPXPU and
VOH/VOL resistors
SCS_A#0
SCS_A#1
RAS_A#
CAS_A#
WE_A#
MAA_A0
MAA_A1
MAA_A2
MAA_A3
MAA_A4
MAA_A5
MAA_A6
MAA_A7
MAA_A8
MAA_A9
MAA_A10
MAA_A11
MAA_A12
MAA_A13
MAA_A14
ODT_A0
ODT_A1
SBS_A0
SBS_A1
SBS_A2
DQS_A0
DQS_A#0
DQS_A1
DQS_A#1
DQS_A2
DQS_A#2
DQS_A3
DQS_A#3
DQS_A4
DQS_A#4
DQS_A5
DQS_A#5
DQS_A6
DQS_A#6
DQS_A7
DQS_A#7
P_DDR0_A
N_DDR0_A
P_DDR1_A
N_DDR1_A
P_DDR2_A
N_DDR2_A
SRCOMP0
SRCOMP1
SRCOMP2
SRCOMP3
DATA_A[0..63](11)
AW35
BA35
BA34
BB38
BB33
AY35
BB34
BA31
BB25
BA26
BA25
AY25
BA23
AY24
AY23
BB23
BA22
AY33
BB22
AW21
AY38
BA21
AY37
BA38
BB35
BA39
BA33
AW32
BB21
AU4
AR3
BB3
BA4
BB9
BA9
AT20
AU18
AR41
AR40
AL41
AL40
AG42
AG41
AC42
AC41
AU31
AR31
AP27
AN27
AV33
AW33
AP29
AP31
AM26
AM27
AT33
AU33
AN2
AN3
BB40
BA40
Broadwater-GF
Broadwater-GF
U12B
U12B
SCS_A0#
SCS_A1#
SCS_A2#
SCS_A3#
SRAS_A#
SCAS_A#
SWE_A#
SMA_A0
SMA_A1
SMA_A2
SMA_A3
SMA_A4
SMA_A5
SMA_A6
SMA_A7
SMA_A8
SMA_A9
SMA_A10
SMA_A11
SMA_A12
SMA_A13
SMA_A14
SODT_A0
SODT_A1
SODT_A2
SODT_A3
SBS_A0
SBS_A1
SBS_A2
SDQS_A0
SDQS_A0#
SDQS_A1
SDQS_A1#
SDQS_A2
SDQS_A2#
SDQS_A3
SDQS_A3#
SDQS_A4
SDQS_A4#
SDQS_A5
SDQS_A5#
SDQS_A6
SDQS_A6#
SDQS_A7
SDQS_A7#
SCLK_A0
SCLK_A0#
SCLK_A1
SCLK_A1#
SCLK_A2
SCLK_A2#
SCLK_A3
SCLK_A3#
SCLK_A4
SCLK_A4#
SCLK_A5
SCLK_A5#
SRCOMP0
SRCOMP1
SRCOMP2
SRCOMP3
AN7
AN8
SDQ_B0
SDQ_A0
AR5
AR4
DATA_A0
DATA_A1
AW5
AW7
SDQ_B1
SDQ_B2
SDQ_A1
SDQ_A2
AV3
AV2
DATA_A3
DATA_A2
AN5
AN6
SDQ_B3
SDQ_B4
SDQ_A3
SDQ_A4
AP3
AP2
DATA_A4
DATA_A5
AN9
AU7
SDQ_B5
SDQ_B6
SDQ_A5
SDQ_A6
AV4
AU1
DATA_A6
DATA_A7
DATA_B8
DATA_B9
AT11
AU11
SDQ_B7
SDQ_B8
SDQ_A7
SDQ_A8
AY2
AY3
DATA_A9
DATA_A8
DATA_B11
DATA_B10
AP13
AR13
SDQ_B9
SDQ_B10
SDQ_A9
SDQ_A10
BB5
AY6
DATA_A11
DATA_A10
DATA_B12
DATA_B13
AR11
AU9
SDQ_B11
SDQ_B12
SDQ_B13
SDQ_A11
SDQ_A12
SDQ_A13
AW2
AW3
DATA_A13
DATA_A12
DATA_B14
DATA_B15
AV12
AU12
SDQ_B14
SDQ_B15
SDQ_A14
SDQ_A15
BA5
BB4
DATA_A15
DATA_A14
DATA_B17
DATA_B16
AU15
AV13
SDQ_B16
SDQ_B17
SDQ_A16
SDQ_A17
AY7
BC7
DATA_A17
DATA_A16
DATA_B19
AU17
AT17
SDQ_B18
SDQ_B19
SDQ_A18
SDQ_A19
AY11
AW11
DATA_A18
DATA_A19
DATA_B20
DATA_B21
AU13
AM13
SDQ_B20
SDQ_A20
BB6
BA6
DATA_A20
DATA_A21
DATA_B18
DATA_B52
DATA_B53
AJ37
AJ35
SDQ_B52
SDQ_B53
SDQ_A52
SDQ_A53
AJ42
AJ41
DATA_A53
DATA_A52
DATA_B54
DATA_B55
AG33
AF34
SDQ_B54
SDQ_B55
SDQ_A54
SDQ_A55
AF41
AF42
DATA_A54
DATA_A55
SCKE_A[0..1](11,12)
DATA_B57
DATA_B56
AD36
AC33
SDQ_B56
SDQ_A56
AD40
AD43
DATA_A56
DATA_A57
DQM_A[0..7](11)
DQM_B[0..7](11)
DATA_B58
DATA_B59
AA34
AA36
SDQ_B57
SDQ_B58
SDQ_B59
SDQ_A57
SDQ_A58
SDQ_A59
AB41
AA40
DATA_A58
DATA_A59
DATA_B61
DATA_B60
AD34
AF38
SDQ_B60
SDQ_B61
SDQ_A60
SDQ_A61
AE42
AE41
DATA_A60
DATA_A61
DATA_B62
DATA_B63
AC34
AA33
SDQ_B62
SDQ_B63
SDQ_A62
SDQ_A63
AB42
AC39
DATA_A63
DATA_A62
SCKE_B0
SCKE_B1
AY12
AW12
SCKE_B0
SCKE_B1
SCKE_A0
SCKE_A1
AY20
BC20
SCKE_A1
SCKE_A0
BB11
BA11
SCKE_B2
SCKE_B3
SCKE_A2
SCKE_A3
AY21
BA19
DQM_B0
AR7
AW9
SDM_B0
SDM_A0
BA2
AR2
DQM_A0
DQM_A1
DQM_B1
DQM_B2
AW13
SDM_B1
SDM_B2
SDM_A1
SDM_A2
AY9
DQM_A3
DQM_A2
DQM_B4
DQM_B3
AP23
AU37
SDM_B3
SDM_B4
SDM_A3
SDM_A4
AN18
AU43
DQM_A4
DQM_B5
AM37
SDM_B5
SDM_A5
AM43
DQM_A5
DQM_B6
AG39
SDM_B6
SDM_A6
AG40
DQM_A6
DQM_B7
AD38
SCS_B0#
SCS_B1#
SCS_B2#
SDM_B7
SCS_B3#
SRAS_B#
SCAS_B#
SWE_B#
SMA_B10
SMA_B11
SMA_B12
SMA_B13
SMA_B14
SODT_B0
SODT_B1
SODT_B2
SODT_B3
SDQS_B0
SDQS_B0#
SDQS_B1
SDQS_B1#
SDQS_B2
SDQS_B2#
SDQS_B3
SDQS_B3#
SDQS_B4
SDQS_B4#
SDQS_B5
SDQS_B5#
SDQS_B6
SDQS_B6#
SDQS_B7
SDQS_B7#
SCLK_B0
SCLK_B0#
SCLK_B1
SCLK_B1#
SCLK_B2
SCLK_B2#
SCLK_B3
SCLK_B3#
SCLK_B4
SCLK_B4#
SCLK_B5
SCLK_B5#
SMRCOMPVOL
SMRCOMPVOH
SDM_A7
AC40
DQM_A7
SCS_B#0
BB27
SCS_B#1
BB30
AY27
AY31
RAS_B#
AW26
CAS_B#
AW29
WE_B#
BA27
MAA_B0
BB17
SMA_B0
SMA_B1
SMA_B2
SMA_B3
SMA_B4
SMA_B5
SMA_B6
SMA_B7
SMA_B8
SMA_B9
SBS_B0
SBS_B1
SBS_B2
SVREF
AY17
BA17
BC16
AW15
BA15
BB15
BA14
AY15
BB14
AW18
BB13
BA13
AY29
AY13
BA29
BA30
BB29
BB31
AY19
BA18
BC12
AV6
AU5
AR12
AP12
AP15
AR15
AT24
AU26
AW39
AU39
AL35
AL34
AG35
AG36
AC36
AC37
AV31
AW31
AU27
AT27
AV32
AT32
AU29
AR29
AV29
AW27
AN33
AP32
AM6
AM8
AM10
MAA_B1
MAA_B2
MAA_B3
MAA_B4
MAA_B5
MAA_B6
MAA_B7
MAA_B8
MAA_B9
MAA_B10
MAA_B11
MAA_B12
MAA_B13
MAA_B14
ODT_B0
ODT_B1
SBS_B0
SBS_B1
SBS_B2
DQS_B0
DQS_B#0
DQS_B1
DQS_B#1
DQS_B2
DQS_B#2
DQS_B3
DQS_B#3
DQS_B4
DQS_B#4
DQS_B5
DQS_B#5
DQS_B6
DQS_B#6
DQS_B7
DQS_B#7
P_DDR0_B
N_DDR0_B
P_DDR1_B
N_DDR1_B
P_DDR2_B
N_DDR2_B
MCH_VREF_A
SMRCOMPVOL
SMRCOMPVOH
C0.1U16Y2
C0.1U16Y2
PLACE 0.1UF CAP CLOSE TO MCH
RAS_B# (11,12)
CAS_B# (11,12)
WE_B# (11,12)
DQS_B0 (11)
DQS_B#0 (11)
DQS_B1 (11)
DQS_B#1 (11)
DQS_B2 (11)
DQS_B#2 (11)
DQS_B3 (11)
DQS_B#3 (11)
DQS_B4 (11)
DQS_B#4 (11)
DQS_B5 (11)
DQS_B#5 (11)
DQS_B6 (11)
DQS_B#6 (11)
DQS_B7 (11)
DQS_B#7 (11)
P_DDR0_B (11)
N_DDR0_B (11)
P_DDR1_B (11)
N_DDR1_B (11)
P_DDR2_B (11)
N_DDR2_B (11)
C261
C261
SCS_B#[0..1] (11,12)
MAA_B[0..14] (11,12)
ODT_B[0..1] (11,12)
SBS_B[0..2] (11,12)
VCC_DDR
R232
R232
1KR0402
1KR0402
1KR1%0402
1KR1%0402
3.01KR1%0402
3.01KR1%0402
1KR1%0402
1KR1%0402
VCC_DDR
R230
R230
R226
R226
R225
R225
C231
C231
C0.1U16Y2
C0.1U16Y2
SMRCOMPVOH
DDR_RCOMPVOH: 0.8*VRM
C259
C259
C0.1U16Y2
C0.1U16Y2
SMRCOMPVOL
DDR_RCOMPVOL: 0.2*VRM
C244
C244
C0.1U16Y2
C0.1U16Y2
MSI
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
5
4
3
2
Date: Sheet
MICRO-START INT'L CO.,LTD.
MICRO-START INT'L CO.,LTD.
MICRO-START INT'L CO.,LTD.
INTEL Broadwater-Memory
INTEL Broadwater-Memory
INTEL Broadwater-Memory
MS-7263N1
MS-7263N1
MS-7263N1
1
832Thursday, August 24, 2006
832Thursday, August 24, 2006
832Thursday, August 24, 2006
1.1
1.1
1.1
of
of
of
5
V_1P25_CORE
AL26
AL24
AL23
AL21
VCC_CL_1
VCC_CL_2
VCC_EXP_1
VCC_EXP_2
VCC_EXP_3
AD9
AD8
AD11
AD10
AL20
VCC_CL_3
VCC_CL_4
VCC_CL_5
VCC_EXP_4
VCC_EXP_5
VCC_EXP_6
AD7
AD6
U12C
U12C
F15
EXP_RXP0
G15
EXP_RXN0
K15
EXP_RXP1
J15
EXP_RXN1
F12
EXP_RXP2
E12
EXP_RXN2
SEL0
SEL1
SEL2
EXP_SLR
V_1P25_CORE
J12
EXP_RXP3
H12
EXP_RXN3
J11
EXP_RXP4
H11
EXP_RXN4
F7
EXP_RXP5
E7
EXP_RXN5
E5
EXP_RXP6
F6
EXP_RXN6
C2
EXP_RXP7
D2
EXP_RXN7
G6
EXP_RXP8
G5
EXP_RXN8
L9
EXP_RXP9
L8
EXP_RXN9
M8
EXP_RXP10
M9
EXP_RXN10
M4
EXP_RXP11
L4
EXP_RXN11
M5
EXP_RXP12
M6
EXP_RXN12
R9
EXP_RXP13
R10
EXP_RXN13
T4
EXP_RXP14
R4
EXP_RXN14
R6
EXP_RXP15
R7
EXP_RXN15
W2
DMI_RXP0
V1
DMI_RXN0
Y8
DMI_RXP1
Y9
DMI_RXN1
AA7
DMI_RXP2
AA6
DMI_RXN2
AB3
DMI_RXP3
AA4
DMI_RXN3
B12
GCLKP
B13
GCLKN
G17
SDV0_CTRLDATA
E17
SDVO_CTRLCLK
G20
BSEL0
J20
BSEL1
J18
BSEL2
G18
RESERVED
E18
EXP_SLR
J17
EXP_EN
Y32
VCC_CL_PLL
C23
VCCA_HPLL
A24
VCCA_MPLL
A22
VCCA_DPLLA
C22
VCCA_DPLLB
B15
VCCA_EXPPLL
C17
VCCA_DAC_17
B16
VCCA_DAC_18
A16
VCCA_EXP_19
C21
VCCD_CRT_20
B21
VCCDQ_CRT_21
D16
VSS_1
B17
VCC33
Broadwater-GF
Broadwater-GF
L23
L23
0R1206
0R1206
D D
DMI_ITP_MRP_0(14)
C C
B B
X_C0.022U25X0402
X_C0.022U25X0402
DMI_ITN_MRN_0(14)
DMI_ITN_MRN_1(14)
DMI_ITP_MRP_2(14)
DMI_ITN_MRN_2(14) DMI_MTN_IRN_2 (14)
DMI_ITP_MRP_3(14)
DMI_ITN_MRN_3(14)
CK_PE_100M_MCH(6)
CK_PE_100M_MCH#(6)
H_FSBSEL0(3,4,6)
H_FSBSEL1(3,4,6)
V_1P25_CORE
V_1P5_ICH
C208
C208
C205
C205
H_FSBSEL2(3,4,6)
V_1P25_CORE
Low:BTX
C1U16Y3
C1U16Y3
DMI_ITP_MRP_0
DMI_ITN_MRN_0
DMI_ITN_MRN_1
DMI_ITP_MRP_2
DMI_ITN_MRN_2
DMI_ITP_MRP_3
DMI_ITN_MRN_3
CK_PE_100M_MCH
CK_PE_100M_MCH#
R205 10KR0402R205 10KR0402
R203 10KR0402R203 10KR0402
R204 10KR0402R204 10KR0402
R202 X_1KR0402R202 X_1KR0402
R200 X_1KR0402R200 X_1KR0402
R197 0R0603R197 0R0603
V_3P3_DAC_FILTERED
R195 0R0805R195 0R0805
R188 1R0805R188 1R0805
VCCD_CRT
C209
C209
C0.1U16Y2
C0.1U16Y2
VCCDQ_CRT
C204
C204
C0.1U16Y2
C0.1U16Y2
VCC_CL_PLL
VCCA_HPLLVCCA_HPLL
VCCA_MPLL
VCCA_DPLLA
VCCA_DPLLB
VCCA_GPLL
VCCD_CRT
VCCDQ_CRT
VCC3
AL18
AL17
AL15
AK30
VCC_CL_6
VCC_CL_7
VCC_CL_8
VCC_EXP_7
VCC_EXP_8
VCC_EXP_9
AD5
AD4
AD2
AD1
4
AK29
AK27
AJ31
AG31
VCC_CL_9
VCC_CL_10
VCC_CL_11
VCC_CL_12
VCC_EXP_10
VCC_EXP_11
VCC_EXP_12
VCC_EXP_13
AE4
AC4
AC3
AC2
VCC_DDR
AF31
AD32
AC32
AA32
VCC_CL_13
VCC_CL_14
VCC_CL_15
VCC_CL_16
VCC_EXP_14
VCC_EXP_15
VCC_EXP_16
AE3
AE2
BC39
AJ30
AJ29
AJ27
VCC_CL_17
VCC_CL_18
VCC_CL_19
VCC_CL_20
VCCSM_1
VCCSM_2
VCCSM_3
VCCSM_4
BC34
BC30
BC26
AG30
AG29
AG27
AG26
VCC_CL_21
VCC_CL_22
VCC_CL_23
VCCSM_5
VCCSM_6
VCCSM_7
BB39
BC22
BC18
BC14
AF30
AF29
AF27
VCC_CL_24
VCC_CL_25
VCC_CL_26
VCC_CL_27
VCCSM_8
VCCSM_9
VCCSM_10
VCCSM_11
BB37
BB32
BB28
AD30
AD29
AC30
VCC_CL_28
VCC_CL_29
VCC_CL_30
VCCSM_12
VCCSM_13
VCCSM_14
BB26
BB24
BB20
AC29
AL12
AL11
VCC_CL_31
VCC_CL_32
VCC_CL_33
VCCSM_15
VCCSM_16
VCCSM_17
BB18
BB16
BB12
AL10
AL9
AL8
VCC_CL_34
VCC_CL_35
VCC_CL_36
VCCSM_18
VCCSM_19
VCCSM_20
AY32
AW24
AW20
C1U16Y3
C1U16Y3
AL7
AL6
AL5
VCC_CL_37
VCC_CL_38
VCC_CL_39
VCCSM_21
VCCSM_22
AV26
AV18
C169
C169
AL4
AL3
AL2
AK26
VCC_CL_40
VCC_CL_41
VCC_CL_42
VCC_SMCLK_2
VCC_SMCLK_1
AY42
BA42
BB41
3
AK24
AK23
AK21
AK20
AK18
VCC_CL_43
VCC_CL_44
VCC_CL_45
VCC_CL_46
VCC_CL_47
VCC_SMCLK_5
VCC_SMCLK_4
VCC_SMCLK_3
H18
BA43
BB42
V_CKDDR
R156 1R1%3R156 1R1%3
R154 1R1%3R154 1R1%3
AK17
AK15
AK3
AK2
AK1
AJ13
AD31
VCC_CL_48
VCC_CL_49
VCC_CL_50
VCC_CL_51
VCC_CL_52
VCC_CL_53
VCC_CL_54
VCC_CL_55
RESERVED_2
RESERVED_4
RESERVED_5
RESERVED_6
RESERVED_7
RESERVED_8
RESERVED_3
RESERVED_1
BB2
BB19
AN21
AN32
AG32
AM31
AW42
L10 600L-350m_450L10 600L-350m_450
C171 C10U10Y0805C171 C10U10Y0805
AC31
AA31
Y31
AJ26
VCC_CL_56
VCC_CL_57
VCC_CL_58
VCC_CL_59
RESERVED_9
RESERVED_10
RESERVED_11
RESERVED_12
AJ32
AL31
AF32
AM21
AJ24
AJ23
AJ21
AJ20
AJ18
VCC_CL_60
VCC_CL_61
VCC_CL_62
VCC_CL_63
RESERVED_13
RESERVED_14
RESERVED_15
RESERVED_16
Y12
U30
AA9
AA10
AA11
VCC_DDR
AJ17
AJ15
AJ14
AA30
AA29
VCC_CL_64
VCC_CL_65
VCC_CL_66
VCC_CL_67
VCC_CL_68
RESERVED_17
RESERVED_18
RESERVED_19
RESERVED_20
RESERVED_21
U31
R29
R30
U12
U11
Y30
Y29
V30
V29
U29
VCC_CL_69
VCC_CL_70
VCC_CL_71
VCC_CL_72
VCC_CL_73
RESERVED_25
RESERVED_22
RESERVED_23
RESERVED_24
RESERVED_26
F13
V31
R12
R13
AP21
U27
AL13
AK14
AL29
AL27
VCC_CL_74
VCC_CL_75
VCC_CL_76
VCC_CL_77
VCC_CL_78
TEST0
RESERVED_28
RESERVED_27
BC1
AA39
BC43
TP14TP14
EXP_TXP0
EXP_TXN0
EXP_TXP1
EXP_TXN1
VCC_CL_79
EXP_TXP2
EXP_TXN2
EXP_TXP3
EXP_TXN3
EXP_TXP4
EXP_TXN4
EXP_TXP5
EXP_TXN5
EXP_TXP6
EXP_TXN6
EXP_TXP7
EXP_TXN7
EXP_TXP8
EXP_TXN8
EXP_TXP9
EXP_TXN9
EXP_TXP10
EXP_TXN10
EXP_TXP11
EXP_TXN11
EXP_TXP12
EXP_TXN12
EXP_TXP13
EXP_TXN13
EXP_TXP14
EXP_TXN14
EXP_TXP15
EXP_TXN15
DMI_TXP0
DMI_TXN0
DMI_TXP1
DMI_TXN1
DMI_TXP2
DMI_TXN2
DMI_TXP3
DMI_TXN3
EXP_COMPO
EXP_COMPI
HSYNC
VSYNC
GREEN
BLUE
RED#
GREEN#
BLUE#
DDC_DATA
DDC_CLK
DREFCLKP
DREFCLKN
REFSET
CL_PWROK
CL_RST#
CL_VERF
CL_CLK
CL_DATA
ALLZTEST
XORTEST
RESERVED
TEST1
TEST2
A43
TP1TP1
TP2TP2
2
RED
D11
D12
B11
A10
C10
D9
B9
B7
D7
D6
B5
B6
B3
B4
F2
E2
F4
G4
J4
K3
L2
K1
N2
M2
P3
N4
R2
P1
U2
T2
V3
U4
V7
V6
W4
Y4
AC8
AC9
Y2
AA2
AC11
AC12
C15
D15
B18
C19
B20
C18
D19
D20
L13
M13
C14
D13
A20
AM15
AA12
AM5
AD13
AD12
K20
F20
A14
DMI_MTP_IRP_0
DMI_MTN_IRN_0
DMI_MTP_IRP_1DMI_ITP_MRP_1
DMI_MTN_IRN_1
DMI_MTP_IRP_2
DMI_MTN_IRN_2
DMI_MTP_IRP_3
DMI_MTN_IRN_3
GRCOMP
R221 24.9R1%0402R221 24.9R1%0402
N_HSYNC(VSYNC)<350mil
N_HSYNC
R135 30R0402R135 30R0402
N_VSYNC
R429 30R0402R429 30R0402
VGA_RED
VGA_GREEN
VGA_BLUE
MCH_DDC_DATA
MCH_DDC_CLK
CK_96M_DREF
CK_96M_DREF#
DACREFSET
R220 0R0402R220 0R0402
MCH_CLPOK
CL_VREF_MCH
V_1P25_CORE
TP15TP15
DMI_MTP_IRP_0 (14)
DMI_MTN_IRN_0 (14)
DMI_MTP_IRP_1 (14)DMI_ITP_MRP_1(14)
DMI_MTN_IRN_1 (14)
DMI_MTP_IRP_2 (14)
DMI_MTP_IRP_3 (14)
DMI_MTN_IRN_3 (14)
V_1P25_CORE
C517 X_C10P25N0402C517 X_C10P25N0402
C518 X_C10P25N0402C518 X_C10P25N0402
VGA_RED (13)
VGA_GREEN (13)
VGA_BLUE (13)
MCH_DDC_DATA (13)
MCH_DDC_CLK (13)
CK_96M_DREF (6)
CK_96M_DREF# (6)
R192 1.3KR1%0402R192 1.3KR1%0402
MCH_CLPWROK (15)
CL_RST (15)
CL_N_CLK (15)
CL_N_DATA (15)
MCH CL VREF:0.349V
R223
R223
1KR1%0402
1KR1%0402
CL_VREF_MCH
C242
R224
R224
392R1%0402
392R1%0402
C242
C0.1U16Y2
C0.1U16Y2
HSYNC (13)
VSYNC (13)
1
Place close to GMCH
MCH MEMORY DECOUPLING
VCC_DDR
C184 C2.2U6.3Y3C184 C2.2U6.3Y3
C215 C2.2U6.3Y3C215 C2.2U6.3Y3
C211 C2.2U6.3Y3C211 C2.2U6.3Y3
C206 C2.2U6.3Y3C206 C2.2U6.3Y3
C197 C2.2U6.3Y3C197 C2.2U6.3Y3
C191 C2.2U6.3Y3C191 C2.2U6.3Y3
MCH CORE DECOUPLING
V_1P25_CORE
Resever on solderside
C527
C527
C528
C528
C256
C256
C255
C255
C221
C221
C237
C237
C262
C262
C257
C257
C236
C236
C245
C245
C252
C252
C238
C238
C234
C234
C235
C235
C265
C265
C214
C214
C229
C229
C230
C230
C240
C240
C239
C239
X_C10U10Y0805
X_C10U10Y0805
X_C10U10Y0805
X_C10U10Y0805
C10U10Y0805
C10U10Y0805
C10U10Y0805
C10U10Y0805
C10U10Y0805
C10U10Y0805
C10U10Y0805
C10U10Y0805
C10U10Y0805
C10U10Y0805
C10U10Y0805
C10U10Y0805
C10U10Y0805
C10U10Y0805
C10U10Y0805
C10U10Y0805
C10U10Y0805
C10U10Y0805
C10U10Y0805
C10U10Y0805
C10U10Y0805
C10U10Y0805
C10U10Y0805
C10U10Y0805
X_C0.1U16Y0402
X_C0.1U16Y0402
X_C0.1U16Y0402
X_C0.1U16Y0402
C0.1U16Y2
C0.1U16Y2
C0.1U16Y2
C0.1U16Y2
C0.1U16Y2
C0.1U16Y2
C0.1U16Y2
C0.1U16Y2
EC54
EC54
EC52
EC52
VCCA_DPLLA
12
+
+
VCCA_DPLLB
12
+
+
C201
C201
C0.1U16Y2
C0.1U16Y2
C199
C199
C0.1U16Y2
C0.1U16Y2
V_1P25_CORE
L22 10U125m_0805L22 10U125m_0805
L17 0.1U400mL17 0.1U400m
VCC3
CD100U16EL11
CD100U16EL11
EC56
EC56
12
3
+
+
R210 1R1%3R210 1R1%3
R207 1R1%3R207 1R1%3
L16 10U125m_0805L16 10U125m_0805
CD470U6.3EL11
CD470U6.3EL11
L15 10U125m_0805L15 10U125m_0805
CD470U6.3EL11
CD470U6.3EL11
4
5
R189 1R1%3R189 1R1%3
R184 1R1%3R184 1R1%3
VCCA_HPLL
C193
C193
C10U10Y0805
C10U10Y0805
C194
C194
C2.2U6.3Y3
C2.2U6.3Y3
V_1P25_CORE
V_1P25_CORE
V_1P25_CORE
A A
V_1P25_CORE
L13 600L-350m_450L13 600L-350m_450
VCCA_MPLL
L14 10U125m_0805L14 10U125m_0805
C10U10Y0805
C10U10Y0805
V_3P3_DAC_FILTERED
C218
C218
C217
C217
C0.1U16Y2
C0.1U16Y2
C0.01U16X2
C0.01U16X2
VCCA_GPLL
C223
C223
C222
C222
C0.1U16Y2
C0.1U16Y2
MICRO-START INT'L CO.,LTD.
MICRO-START INT'L CO.,LTD.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
2
Date: Sheet
MICRO-START INT'L CO.,LTD.
INTEL Broadwater-PCIE
INTEL Broadwater-PCIE
INTEL Broadwater-PCIE
MS-7263N1
MS-7263N1
MS-7263N1
1
of
932Thursday, August 24, 2006
of
932Thursday, August 24, 2006
of
932Thursday, August 24, 2006
1.1
1.1
1.1
5
V_1P25_CORE
D D
BC37
BC32
BC28
BC24
BC10
BC5
BB7
AY41
AY4
AW43
AW41
AW1
AV37
AV35
AV27
AV23
AV21
AV17
AV11
AV9
AV7
AU42
AU38
AU32
C C
B B
AU24
AU20
AT31
AT29
AT15
AT13
AT12
AR38
AR33
AR32
AR27
AR26
AR23
AR21
AR20
AR17
AP43
AP24
AP18
AN38
AN31
AN29
AN24
AN23
AN20
AN15
AN13
AN12
AN11
AM42
AM40
AM36
AM33
AM29
AM24
AM23
AM20
AM11
AL36
AL33
AK43
AU6
AU2
AR9
AR6
AP1
AN4
AM9
AM7
AM4
AM2
AM1
U12D
U12D
VSS_1
VSS_2
VSS_3
VSS_4
VSS_5
VSS_6
VSS_7
VSS_8
VSS_9
VSS_10
VSS_11
VSS_12
VSS_13
VSS_14
VSS_15
VSS_16
VSS_17
VSS_18
VSS_19
VSS_20
VSS_21
VSS_22
VSS_23
VSS_24
VSS_25
VSS_26
VSS_27
VSS_28
VSS_29
VSS_30
VSS_31
VSS_32
VSS_33
VSS_34
VSS_35
VSS_36
VSS_37
VSS_38
VSS_39
VSS_40
VSS_41
VSS_42
VSS_43
VSS_44
VSS_45
VSS_46
VSS_47
VSS_48
VSS_49
VSS_50
VSS_51
VSS_52
VSS_53
VSS_54
VSS_55
VSS_56
VSS_57
VSS_58
VSS_59
VSS_60
VSS_61
VSS_62
VSS_63
VSS_64
VSS_65
VSS_66
VSS_67
VSS_68
VSS_69
VSS_70
VSS_71
VSS_72
VSS_73
VSS_74
VSS_75
VSS_76
AA17
AA15
VCC_123
VCC_124
AA14
Y27
VCC_125
VCC_126
Y26
Y18
VCC_127
VCC_128
Y17
Y15
VCC_129
VCC_130
Y14
W27
VCC_131
VCC_132
W26
W25
VCC_133
VCC_134
W23
W21
VCC_135
VCC_136
W19
W18
VCC_137
VCC_138
W17
V27
VCC_139
VCC_140
V26
V25
VCC_141
VCC_142
4
V24
V23
VCC_143
VCC_144
V22
V21
VCC_145
VCC_146
V20
V19
VCC_147
VCC_148
V18
V17
VCC_149
VCC_150
V15
V14
VCC_151
VCC_152
U26
U25
VCC_153
VCC_154
U24
U23
VCC_155
VCC_156
U22
U21
VCC_157
VCC_158
U20
U19
VCC_159
VCC_160
U18
U17
VCC_161
VCC_162
U15
U14
VCC_163
VCC_164
R20
R18
VCC_165
VCC_166
R17
R15
VCC_167
VCC_168
R14
P15
VCC_169
VCC_170
P14
AG24
VCC_171
VCC_172
AG23
AG22
VCC_173
VCC_174
3
M20
L17
N17
N18
N15
RESERVED_29
RESERVED_30
RESERVED_31
RESERVED_32
L15
L18
M18
F17
K17
RESERVED_33
RESERVED_34
RESERVED_35
RESERVED_36
RESERVED_37
N20
BC42
BC2
NC_1
NC_2
RESERVED_38
NC_3
BB43
NC_4
BB1
NC_5
B43
NC_6
B42
NC_7
A42
NC_8B2NC_9
2
M42
A41
C43
R21
W20
W22
W24
AA18
AC18
AE18
AE20
AE22
AE24
AF19
AF21
AF23
AY40
BA1
BC3
VSS_277
VSS_276
VSS_275
VSS_274
VSS_273
VSS_272
BC41
VSS_271
M11
L12
VSS
VCC
VSS_293A3VSS_292A5VSS_291
VSS_290C1VSS_289
VSS_288E1VSS_287
VSS_286
VSS_285
VSS_284
VSS_283
VSS_282
VSS_281
VSS_280
VSS_279
VSS_278
M33
M35
VSS_270
VSS_269
M37
VSS_267
VSS_268
N10
VSS_266N5VSS_265N7VSS_264
VSS_263
VSS_262
VSS_261
VSS_260
VSS_259
VSS_258
VSS_257
VSS_256
VSS_255
VSS_254
VSS_253
VSS_252
VSS_251
VSS_250
VSS_249
VSS_248
VSS_247
VSS_246
VSS_245
VSS_244
VSS_243
VSS_242
VSS_241
VSS_240
VSS_239
VSS_238
VSS_237
VSS_236
VSS_235
VSS_234
VSS_233
VSS_232
VSS_231
VSS_230
VSS_229
VSS_228
VSS_227
VSS_226
VSS_225
VSS_224
VSS_223
VSS_222
VSS_221
VSS_220
VSS_219
VSS_218
VSS_217
VSS_216
VSS_215
VSS_214
VSS_213
VSS_212
VSS_211
VSS_210
VSS_209
VSS_208
VSS_207
VSS_206
VSS_205
VSS_204
VSS_203
VSS_202
VSS_201
VSS_200
VSS_199
VSS_198
VSS_197
VSS_196
VSS_195
VSS_194
VSS_193
VSS_192
VSS_191
VSS_190
VSS_189
VSS_188
N13
N21
N27
N31
N33
N36
P2
P17
P18
P21
P30
P43
R3
R5
R8
R11
R31
R33
R36
T1
T42
U5
U7
U8
U35
U38
V2
V5
V8
V11
V32
V34
V37
V39
V43
W3
Y1
Y5
Y7
Y10
Y19
Y21
Y23
Y25
Y33
Y35
Y37
Y42
AA5
AA8
AA20
AA22
AA24
AA35
AA38
AB1
AB2
AB19
AB21
AB23
AB25
AB43
AC5
AC7
AC10
AC20
AC22
AC24
AC35
AC38
AD19
AD21
AD23
AD25
AD33
AD35
1
VSS_77
VSS_78
VSS_79
VSS_80
VSS_81
VSS_82
VSS_83
VSS_84
VSS_85
VSS_86
VSS_87
VSS_88
VSS_89
VSS_90
VSS_91
VSS_92
VSS_93
VSS_94
VSS_95
VSS_96M7VSS_97M1VSS_98
VSS_99
VSS_100
VSS_101
VSS_102
VSS_103
VSS_104
VSS_105L7VSS_106L5VSS_107L3VSS_108
VSS_109
VSS_110
VSS_111
VSS_112
VSS_113
VSS_114K2VSS_115
VSS_116
VSS_117
VSS_118
VSS_119
VSS_120J9VSS_121J7VSS_122J5VSS_123
VSS_124
VSS_125
VSS_126
VSS_127
VSS_128
VSS_129
VSS_130
VSS_131
VSS_132
VSS_133
VSS_134
VSS_135
VSS_136
VSS_137G9VSS_138G7VSS_139G1VSS_140
VSS_141
VSS_142
VSS_143
VSS_144
VSS_145F3VSS_146
VSS_147
VSS_148
VSS_149
VSS_150
VSS_151
VSS_152
VSS_153
VSS_154E9VSS_155E3VSS_156
VSS_157
VSS_158
VSS_159
VSS_160D3VSS_161
VSS_162
VSS_163C6VSS_164C5VSS_165C4VSS_166
VSS_167
VSS_168
VSS_169
VSS_170
VSS_171
VSS_172
VSS_173
VSS_174
VSS_175
VSS_176
VSS_177
VSS_178
VSS_179
VSS_180A7VSS_181
VSS_182
VSS_183
VSS_184
VSS_185
VSS_186
VSS_187
Broadwater-GF
J38
J35
J32
J27
L33
L32
L31
L29
L21
L20
L11
K43
K26
K21
K18
AF9
AF8
AF7
AF6
M27
M21
M17
M15
AJ39
AJ36
AJ33
AF43
AF37
AF36
AF10
AH42
AG37
AG34
A A
5
M10
4
K13
J21
K12
H31
H29
H21
H20
H17
H15
H13
G42
G38
G32
G21
3
F37
F35
F27
F21
F18
E43
E32
E24
E21
E20
E15
E13
E11
D40
D31
D21
G13
G12
G11
D17
B37
B32
B31
B26
B23
B22
B19
B14
B10
A39
A34
A26
A18
C26
C11
2
A12
AF5
AF3
Broadwater-GF
AF2
AF1
AD42
AD39
AD37
MICRO-START INT'L CO.,LTD.
MICRO-START INT'L CO.,LTD.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
Date: Sheet
MICRO-START INT'L CO.,LTD.
INTEL Broadwater-GND
INTEL Broadwater-GND
INTEL Broadwater-GND
MS-7263N1
MS-7263N1
MS-7263N1
1
10 32Thursday, August 24, 2006
10 32Thursday, August 24, 2006
10 32Thursday, August 24, 2006
1.1
1.1
1.1
of
of
of
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