MSI MS-7254 Schematics

1
1Cover Sheet CHANGE HISTORY Block Diagram/Clock Map/Power Map Intel LGA775 CPU IGP- RC410 - MCH DDR2 System Memory 1 & 2 VGA connector Clock Gen. - RTM865 SB450-PCI/CPU/LPC/RTC SB450-SATA/IDE SB450-PWR & DECOUPLING SB450-ACPI/GPIO/AC97/USB SB450-STRAPS
A A
PCIE X 16 & X1 PCI SLOTS 1 & 2 W83627EHF & FDD & KBMS & LPC USB CONNECTORS FAN & IDE Connectors & PARALLAL PORT Azalia ALC861 & Interanl SPK COM1 Realtek RTL8100C VRM10.1 Intersil 6566 3Phase MS7 ACPI CONTROLLER ATX CONN, FRONT PANEL
Manual Parts
2
3-5
6-8
9-13
14-15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34SB POWER GOOD & EMI DECOUPLING CAP
35
CPU
Pentium D Presler (9 series) V 800 2 x 2MB X V V
Pentium 4 Cedar Mill (6 series) X 800 2MB V V V
Celeron D
MS-7254H1
CPU: ( FMB = 05A )
Generation
Prescott (5 series) X 5 33/800 1MB V
Prescott (3 series) X 533 2 56KB X X X
System Chipset:
ATI RC410 - (North Bridge) ATI SB450 (South B ridge)
On Board Chipset:
BIOS -- LPC EEPROM Azalia ALC861 LPC Super I/O -- W83627EHG LAN--Realtek RT L8100C CLOCK -- RTM865
Main Memory:
DDR2 * 2 (M ax 2GB)
Expansion Slots:
PCI2.3 SLO T * 2 PCI EXPRESS X1 SLOT PCI EXPRESS X16 SLOT
Intersil PWM:
Controller: VRM10.1 Intersil 6566 3Phase
DUAL CORE EIST
V 800Smithfield (8 series) 2 x 1MB X V >=830
Version 0B
FSB
L2 Cache
HT
EM64T
"1" in last code
X
VT
V X
"2" in last code
X
X
PWOK MAP & RESET MAP & GPIO & JUMP PINS 36-38
39
MSI
T itle
Size Document Number Rev
1
MICRO-STAR INt'L CO., LTD.
COV ER SHEET
MS-7254
1 39Wednesday, November 23, 2005
0B
5
4
3
2
1
MS7254H1 Revision:0A
1.Initial
MS7254H1 Revision:0B
1. Add an 1000uF/6.3V cap at EC54, plus two new caps ( EC1,EC64 )to reduce +3.3V noise which will cause user really easy to see the noise on the desktop and in this version layout will fix it.
2. RN4, R72, R73 resistors change form 560 ohm to 680 ohm to solve system can't boot up when Cedar Mill CPU installed.
D D
3. Remove C129 cap to solve G_OUT signal rising time not meet spec.
4. Change SIO_CLK_48M source from CLK-GEN(U10) to S/B(U19) to improved EMI.
5. Connect the singal THERMDC_CPU and VTIN_GND together, to solve CPU temperature and CPU fan control malfunction.
6. Change FS5 component to FS4 used type, to reduce USB drop and droop voltage over spec.
7. Change RN24 to L12 used type for cost saving.
8. Modify audio codec regulator to solve leakage voltage from 5VSB to +12V.
9. Change the R258, R260, R268, R271 value from 49.9ohm to 5.49ohm and change the C277, C302 value from 103p to 104p to solve AOI eye diagram over spec.
10. Change LINK_100_C signal connect from U16.114 to U16.155 to solve lan led malfunction.
11. To meet Intel DC loadline and transient spec, C19, R11, R12 removed, R24, R13 mounted 0ohm, change R34, R50, R53 value from 51Kohm to 75.8K ohm.
12. Remove C284 to solve VCC#_SB and +1.8VSB oscillated.
13. Change Q40 component from 0703 to 0903 to solve voltage drop too much.
14. R299 removed to solve system can not boot up.
15. Add wake up by ring and lan function support.
C C
B B
A A
T itle
CHANGE HISTORY
Size Document Number R ev
MS-7254 0B
Custom
5
4
3
2
Date: Sh eet of
2 39Wednesday, N ovember 23, 2005
1
1
Block Diagram
x 1 DDR2 CHANNEL
EXTERNAL CLOCK GENERATOR
DESKTOP PRESCOTT SOCKET LGA775
4X DATA 2X ADDRESS
AGTL+ 200MHz
ATI NB - RC410
UNBUFFERED DDR2 DIMM
AGTL+ P4 CPU I/F
VGA CON
PCIE GFX x16 ATI TMDS
A A
CRT
PCIE x16
X1 DDR2 CHANNEL INTEGRATED GRAPHICS TVOUT/TMDS 1 X16 PCIE VIDEO
DDR2 667
A CHANNEL
UNBUFFERED DDR2 DIMM
ATI SB - SB450
USB-7 USB-6
RTL8100C
USB-4
USB-3
P CI SLOT 2
USB-1USB-2USB-5
P CI BUS
PCI SLOT 1
IDE1
USB-0
ATA 66/100/133
USB 2.0
U SB2.0 (4+4) S ATA (4 PORTS) A C97 2.3 AZALIA ATA 66/100/133 ACPI 1.1 LPC I/F INT RTC PCI/PCI BDGE
A C LINK
S ERIAL ATA
Azalia ALC861
SATA#0 SATA#1
SATA#2 SATA#3
CPU CORE POWER
RC410 CORE POWER
DDR2 DRAM POWER
PCIE & SB POWER
LPC SIO W83627EHG
FLOPPY
L PT
1
LPC BUS
K BD
MOUSE
SERIAL PORT
FLASH BIOS
MSI
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Size Document Number R ev
Date: Sh eet of
MICRO-STAR INt'L CO., LTD.
BLOCK DIAGRAM
MS-7254
3 39Wednesday, N ovember 23, 2005
0B
5
4
3
2
1
CLOC K MAP
HCLK
LGA775
D D
NBHCLK
DOTCLK
RC410
IGP
RTL865-300
96MHz PCI_E 100MHz
Clock Generator
SBHCLK SATACLK
C C
14.318MHz
USB48MHz
SB450
IXP
PCI_E 100MHz
PCI-Express X 16
PCI_E 100MHz
SIO
B B
48M
PCI-Express X 1
W83627EHG
LPC IO
SB450
IXP
PCI_LAN 33MHz
Realtek 8100C 10/100
Ethernet LAN
FW H_PCLK 33MHz
A A
PCI CLK[0..1]
33MHz
5
4
3
FWH
PCI1
PCI2
MSI
T itle
Size Document Number R ev
2
Date: Sh eet of
MICRO-STAR INt'L CO., LTD.
CLOCK MAP
MS-7254
4 39Wednesday, N ovember 23, 2005
1
0B
5
POWER MAP
4
3
2
1
ATX P/S WITH 2A STBY CURRENT
-12V
12V
3.3V
5V
5VSB
D D
+/-5%
+/-5%
+/-5%
+/-5%
+/-5%
CPU PW
12V +/-5%
VRM 10.1 SW REGUALTOR
VTT 1.2V MS7 LINEAR REGULATOR
VCCP (S0, S1)
V_FSB_VTT (S0, S1)
Intel LGA775 CPU
VCCCORE
0.84-1.6V 95W
VTT 1.2V 6A
NB RC410
FSB VTT 1.2V 1A NB CORE 5A PCI-E CORE
&VCO 2.25A
MEM CONTROLER PLL & DAC-Q 0.1A
1.9V MS11 SW REGULATOR
C C
0.95V VTT_DDR REGULATOR
1.8V MS7 Linear REGULATOR
VCC_DDR (S0, S1, S3)
VTT_DDR (S0, S1)
1.8VSB MS7 Linear REGULATOR
+1.8V_S0 (S0, S1)
+1.8VSB (S0, S1, S3, S4, S5)
DDRII DIMMX2
VDD MEM 3.5A
VTT_DDR 1.2A
VCC3 (S0, S1)
HD CODEC
5VAA LDO REGULATOR
+3.3VSB REGULATOR
B B
MS7 ACPI CONTROLLER
+5VDUAL REGULATOR MS7 ACPI CONTROLLER
+5VR (S0, S1)
VCC3_SB(S0, S1, S3, S4, S5)
USB_STR (S0, S1, S3, S4, S5)
3.3V CORE 0.3A 5V ANALOG 0.1A
ENTHENET
3.3V 0.1A (S3)
3.3V 0.5A (S0, S1)
PCI-E I/O 750mA TRANSFORMER
200mA
S B SB450
X4 PCI-E 0.8A ATA I/O 0.2A ATA PLL 0.01A PCI-E PVDD 80mA SB CORE 0.6A
1.8V S5 PW 0.22A
3.3V I/O 0.45A
3.3V S5 PW 0.01A U SB CORE I/O 0.2A
SUPER I/O
+3.3VDUAL (S3) 0.01A +3.3V (S0, S1) 0.01A +5V (S0, S1) 0.1A
USB X3 FR
V DD 5VDual
1.5A
0.5A
X 16 PCIEX1 PCIE per
3.3V
12V12V
3.0A3.0A
4.4A
4
PCI Slot (2 slot)
2.5A
5V
3.8A
A A
3.3V 12V
3.3Vaux
-12V
5
0.25A
0.1875A
0.05A
3.3V
3.3Vaux 0.1A
USB X5 RL 2XPS/2
V DD 5VDual
2.5A
5VDual
0.35A
VCC3_SB(S0, S1, S3, S4, S5)
VOLTAGE
+12V
+5V
+3.3V
+5V_SB
3
Total
15.14A
17.15A
10.59A
2.35A
AVERAGE
11.05A
10.8A
5.37A
1.5A
MSI
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Size Document Number Rev
2
D ate: S heet of
MICRO-STAR INt'L CO., LTD.
POWER MAP
MS- 7254
5
1
0B
39Wednesday, November 23, 2005
8
7
6
5
4
3
2
1
VID[0..5] 31
R118 62/4
R140 62/4 R100 62/4 R141 62/4 R66 X_62/4 R121 X_62/4
R102 62/4 R115 62/4 R107 62/4 R117 62/4 R104 62/4 R138 62/4
TP9 TP11 TP8 TP10
H_ADSTB#1 9 H_ADSTB#0 9 H_DSTBP#3 9 H_DSTBP#2 9 H_DSTBP#1 9 H_DSTBP#0 9 H_DSTBN#3 9 H_DSTBN#2 9 H_DSTBN#1 9 H_DSTBN#0 9 H_NMI 18 H_INTR 18
VCC_VRM_SENSE
VSS_VRM_SENSE
CPU_GTLREF0 7 CPU_GTLREF1 7
MCH_GTLREF_CPU 9
TP12
H_REQ#[0..4]
RN11 62/6/8P4R
H_RS#[0..2]
TP7 TP6
H_BR#0
CPU SIGNAL BLOCK
U4A
H_A# [3..31]
H_A#31
H_A#30
H_A#29
H_A#28
H_A#26
H_A#27
H_A#25
H_A#24
H_A#22
H_A#23
H_A#20
H_A#21
H_A#19
H_A#18
H_A#17
H_A#16
H_A#14
H_A#15
H_A#13
H_A#12
H_A#10
H_A#11
H_A#9
H_A#8
H_A#7
H_A#6
H_A#5
H_A#4
H_A#3
TP5
VID4
VID2
VID3
VID5
VID1
D D
H_DBI#09 H_DBI#19 H_DBI#29 H_DBI#39
VTT_OUT_LEFT
C C
V_FSB_VTT
H_SLP#18
B B
R114 62/4
H_IERR#7 H_FERR#7,18
H_STPCLK#18
H_INIT#18,25
H_DBSY#9 H_DRDY#9 H_TRDY#9
H_ADS#9 H_LOCK#9 H_BNR#9 H_HIT#9 H_HITM#9 H_BPRI#9 H_DEFER#9
THERMDA_CPU25 THERMDC_CPU25
R87
H_PROCHOT#7
200/4
ICH_H_SMI#18
H_FSBSEL07,8 H_FSBSEL17,8 H_FSBSEL27,8
CPUPWRGD7,18 H_CPURST#7,9
H_D#[0..63]9
H_D#[0..63]
THERMDA_CPU THERMDC_CPU TRMTRIP#
TRMTRIP#7,8
H_PROCHOT# H_IGNNE#
H_IGNNE#18
ICH_H_SMI# H_A20M#
H_A20M#18
H_FSBSEL0 H_FSBSEL1 H_FSBSEL2
CPUPWRGD H_CPURST#
H_DBI#0 H_DBI#1 H_DBI#2 H_DBI#3
H_IERR# H_FERR#
H_STPCLK# H_INIT#
H_DBSY# H_DRDY# H_TRDY#
H_ADS# H_LOCK# H_BNR# H_HIT# H_HITM# H_BPRI# H_DEFER#
H_TDI H_TDO H_TMS H_TRST# H_TCK
H_TESTHI13
H_D#63 H_D#62 H_D#61 H_D#60 H_D#59 H_D#58 H_D#57 H_D#56 H_D#55 H_D#54
H_A# [3..31]9
VID0
VID[0..5]
R62 62/4
CPU_GTLREF0 CPU_GTLREF1
MCH_GTLREF_CPU H_BPM#5 H_BPM#4 H_BPM#3 H_BPM#2 H_BPM#1 H_BPM#0
H_REQ#4 H_REQ#3 H_REQ#2 H_REQ#1 H_REQ#0
H_TESTHI12 H_TESTHI11 H_TESTHI10 H_TESTHI9 H_TESTHI8
H_RS#2 H_RS#1 H_RS#0
H_COMP5 H_COMP4 H_COMP3 H_COMP2 H_COMP1 H_COMP0
H_ADSTB#1 H_ADSTB#0 H_DSTBP#3 H_DSTBP#2 H_DSTBP#1 H_DSTBP#0 H_DSTBN#3 H_DSTBN#2 H_DSTBN#1 H_DSTBN#0 H_NMI H_INTR
EC6 10U/10V/1206/X5R
H_TESTHI2_7 H_TESTHI1 H_TESTHI0 RSVD_AK6 RSVD_G6
VCC_VRM_SENSE 31
VSS_ VRM_SENSE 31
H_REQ#[0..4] 9
VTT_OUT_LEFT
V_FSB_VTT
VTT_OUT_RIGHT 7,8
CK_H_CPU# 17 CK_H_CPU 17
H_RS#[0..2] 9
R120 X_0/4
H_BR#0 7
C62 X_0.1U/16V/4
CPU_BR0# 9
VTT_OUT_LEFT 7,17
Prescott / Cedar Mill LL_ID[1:0] = 00 GTLREF_SEL = 0 VTT_SEL = 1
VID3 VID1 VID4 VID2 VID0
R73 680/6
VID5
R72 680/6
BSEL
02
1
0
01 200 MHZ (800) 1
0 0 1 33 MHZ (533)
VTT_OUT_RIGHT
C44 0.1 U/16V/4
C49 0.1 U/16V/4
PLACE BPM TERMINATION NEAR CPU
RN4 680/6/8P4R
TABLE FSB FREQUENCY 267 MHZ (1067)000
RN6 62/6/8P4R
RN8 62/6/8P4R
R88 X_62/4
R89 62/4
R85 62/4
VTT_OUT_RIGHT
H_BPM#5 H_BPM#3 H_BPM#1 H_BPM#0
H_TMS H_BPM#2 H_TDI H_BPM#4
H_TDO
H_TRST#
H_TCK
ZIF-SOCK775-15u
H_D#36
H_D#49
H_D#50
H_D#48
H_D#47
H_D#46
H_D#45
H_D#44
H_D#43
H_D#42
H_D#41
H_D#40
H_D#39
H_D#38
H_D#37
H_D#53
H_D#52
A A
8
H_D#51
7
H_D#35
6
H_D#33
H_D#34
H_D#31
H_D#32
H_D#30
H_D#29
H_D#28
H_D#27
H_D#25
H_D#26
H_D#24
H_D#23
H_D#22
H_D#21
H_D#19
H_D#20
H_D#18
H_D#17
H_D#15
H_D#16
H_D#13
H_D#14
5
H_D#12
H_D#11
H_D#9
H_D#10
H_D#8
H_D#7
H_D#5
H_D#6
H_D#4
H_D#3
H_D#2
H_D#1
H_D#0
MSI
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Size Document Number Rev
4
3
D ate: S heet of
MICRO-STAR INt'L CO., LTD.
Intel LGA775 CPU - Signals
MS- 7254
2
0B
39Friday, November 25, 2005
6
1
8
VCCP
7
6
5
4
3
2
1
VCCP
D D
U4B
H_VCCA H_VSSA
H_VCCA
V_FSB_VTT
V_FSB_VTT
C131 10U/10V/8 C123 10U/10V/8 C116 10U/10V/8
CAPS FOR FSB GENERIC
VTT_PWG
C C
VCCP
VTT_OUT_RIGHT
R112 124/6/1
R113
B B
VTT_OUT_RIGHT
210/6/1
R106 124/6/1
R101 210/6/1
CPU_GTLREF0
R116 10/6
C77
0.1 U/16V/4
GTLREF VOLTAGE SHOULD BE
0.63*VTT = 0.756V
CPU_GTLREF1
R108 10/6
C67
0.1 U/16V/4
CPU_GTLREF0 6
C76 C220P50N0402
CPU_GTLREF1 6
C72 C220P50N0402
PLACE COMPONENTS AS CLOSE AS POSSIBLE TO PROCESSOR SOCKET
TRACE WIDTH TO CAPS MUST BE SMALLER THAN 12MILS
V_FSB_VTT
V_FSB_VTT
L6
10U125m_0805-1
L7
10U125m_0805-1
FSBSEL RESISTOR CAN BE REMOVED IF ONLY TEJAS AND CEDAR MILL ARE SUPPORTED
C112 X_C1U16Y
C127 10U/10V/1206
H_VCCA
C126 10U/10V/1206
H_VSSA
VTT_OUT_RIGHT VTT_OUT_LEFT
ZIF-SOCK775-15u
VTT_PWG SPEC : High > 0.9V Low < 0.3V Trise < 150ns
VTT_OUT_RIGHT
VCC5_SB
R57 1K/6
VID_GD#
VID_GD#31,32
R65 680/6
R54 1K/4
Q5
N-MMBT3904_SOT23
VTT_PWG
C43 X_C1U16Y
PLACE AT CPU END OF ROUTE
7
H_PROCHOT# H_CPURST#
CPUPWRGD H_BR#0
H_IERR#
TRMTRIP# H_FERR#
H_PROCHOT# 6 H_CPURST# 6,9
CPUPWRGD 6,18 H_BR#0 6
H_IERR# 6
TRMTRIP# 6,8 H_FERR# 6,18
6
VTT_OUT_RIGHT6,8
VTT_OUT_LEFT6,17
A A
VTT_OUT_RIGHT
VTT_OUT_LEFT
8
R79 62/4 R77 62/4
R98 300/4 R119 62/4
R92 62/4
PLACE AT ICH END OF ROUTE
V_FSB_VTT
R110 62/4 R109 62/4
V_FSB_VTT
5
RN23
680/6/8P4R
H_FSBSEL1
H_FSBSEL0
H_FSBSEL2
H_FSBSEL1 6,8 H_FSBSEL0 6,8 H_FSBSEL2 6,8
4
VCC3 VCC5
3
C22
0.1 U/16V/4
T itle
Size Document Number Rev
D ate: S heet of
MICRO-STAR INt'L CO., LTD.
MSI
Intel LGA775 CPU - Power
MS- 7254
2
7 39Friday, November 25, 2005
1
0B
8
7
6
5
4
3
2
1
V_FSB_VTT
MSID1 MSID0
2005 Perf FMB 0 0
TP15
D D
C C
VTT_OUT_RIGHT6,7
R91
R90
62/4
62/4 TP14
H_COMP7
H_COMP6
U4C
TP16
TP13
R99 62/4
R97 X_62/4
R95 X_62/4
2005 Value FMB 0 1 / NC
B B
ZIF-SOCK775-15u
VCC3
R196
R197
1K/4
1K/4
A A
Q21 N-MMBT3904_SOT23
8
7
Q22 N-MMBT3904_SOT23
V_FSB_VTT
6
R201
1K/4
VCC3
R200
1K/4
Q23 N-MMBT3904_SOT23 Q9 N-MMBT3904_SOT23
5
V_FSB_VTT
R223
4
VCC3
R222
1K/4
1K/4
H_FSBSEL2_C 12,17H_FSBSEL26,7 TRMTRIP_C# 21TRMTRIP#6,7H_FSBSEL0_C 12,17H_FSBSEL06,7 H_FSBSEL1_C 12,17H_FSBSEL16,7
3
VCC3
V_FSB_VTTV_FSB_VTT
R93
R86
1K/4
1K/4
MSI
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Size Document Number Rev
D ate: S heet of
MICRO-STAR INt'L CO., LTD.
Intel LGA775 CPU - GND
MS- 7254
2
0B
39Friday, November 25, 2005
8
1
5
4
3
2
1
U8A
PART 1 OF 6
DATA GROUP 0DATA GROUP 1DATA GROUP 2DATA GROUP 3
A DDR. GROUP 1 A DDR. GROUP 0CONTROLMISC.
AGTL+ I/F
ATI-RC410(215RPA4AKA21HK)-A11
3
H_D#0 H_D#1 H_D#2 H_D#3 H_D#4 H_D#5 H_D#6 H_D#7 H_D#8 H_D#9 H_D#10 H_D#11 H_D#12 H_D#13 H_D#14 H_D#15 H_DBI#0 H_DSTBN#0 H_DSTBP#0
H_D#16 H_D#17 H_D#18 H_D#19 H_D#20 H_D#21 H_D#22 H_D#23 H_D#24 H_D#25 H_D#26 H_D#27 H_D#28 H_D#29 H_D#30 H_D#31 H_DBI#1 H_DSTBN#1 H_DSTBP#1
H_D#32 H_D#33 H_D#34 H_D#35 H_D#36 H_D#37 H_D#38 H_D#39 H_D#40 H_D#41 H_D#42 H_D#43 H_D#44 H_D#45 H_D#46 H_D#47 H_DBI#2 H_DSTBN#2 H_DSTBP#2
H_D#48 H_D#49 H_D#50 H_D#51 H_D#52 H_D#53 H_D#54 H_D#55 H_D#56 H_D#57 H_D#58 H_D#59 H_D#60 H_D#61 H_D#62 H_D#63 H_DBI#3 H_DSTBN#3 H_DSTBP#3
H_AD STB#06
H_AD STB#16
H_ADS#6 H_BNR#6 H_BPRI#6 H_DEFER#6 H_DRDY#6 H_DBSY#6
CPU_BR0#6
H_LOCK#6 H_TRDY#6 H_HITM#6 H_HIT#6
H_RS#[0 ..2]6
H_CPURST#6,7
EDRDY#
NB_ RST#32 NB_PW RGD32,34
V_FSB_VTT
120L600m_250
NB_GTLREF
H_A#[3 ..31]
H_AD STB#1
H_ADS# H_BNR# H_BPRI# H_DEFER# H_DRDY# H_DBSY#
H_LOCK# H_TRDY# H_HITM# H_HIT#
H_RS#[0..2]
H_CPURST#
EDRDY#
R152 47.5 /6/1
R151 27.4 /6/1
C472 C2.2U6.3Y
C470 C220P50N0402
RC400 MODETESTMODE NORMAL MODE TEST MODE
H_A#3 H_A#4 H_A#5 H_A#6 H_A#7 H_A#8 H_A#9 H_A#10 H_A#11 H_A#12 H_A#13 H_A#14 H_A#15
H_A#16 H_REQ#0 H_REQ#1 H_REQ#2 H_REQ#3 H_REQ#4 H_AD STB#0
H_A#17
H_A#18
H_A#19
H_A#20
H_A#21
H_A#22
H_A#23
H_A#24
H_A#25
H_A#26
H_A#27
H_A#28
H_A#29
H_A#30
H_A#31
TP17
C471 1U/6.3V/4/X5RFB19
R164
4.7 K/4
H_RS#0 H_RS#1 H_RS#2
COMP_P
R219
4.7 K/4
+1.8 V_S0
H_A#[3 ..31]6
H_REQ#[0..4]
D D
H_REQ#[0..4]6
C C
VCC_DDR
B B
SUS_ STAT#21
MCH_GTLREF_CPU6
A A
R149 0/6
V_FSB_VTT
R147
49.9 /4/1
R154 100/4/1
SUS_STAT#
0.67*VTT
C157 1U/6.3 V/4/X5R
LOW HIGH
5
4
2
H_D#[0..63]
H_DBI#0 6 H_DSTBN#0 6 H_DSTBP#0 6
H_DBI#1 6 H_DSTBN#1 6 H_DSTBP#1 6
H_DBI#2 6 H_DSTBN#2 6 H_DSTBP#2 6
H_DBI#3 6 H_DSTBN#3 6 H_DSTBP#3 6
H_D#[0 ..63] 6
T itle
Size Document Number R ev
MSI
Date: Sh eet of
MICRO-STAR INt'L CO., LTD.
ATI RC410-A GTL+ I/F
MS-7254
9 39Friday, November 25, 2005
1
0B
5
4
3
2
1
MAA_A[0..17]14,15
D D
C C
DQS_A#[0..7]14
N_DDR0_A14
P_DDR0_A14
N_DDR1_A14
P_DDR1_A14
N_DDR2_A14
P_DDR2_A14
N_DDR3_A14
P_DDR3_A14
B B
N_DDR4_A14
P_DDR4_A14
N_DDR5_A14
P_DDR5_A14
SCKE_ A014,15 SCKE_ A114,15 SCKE_ A214,15 SCKE_ A314,15
ODT_A014,15 ODT_A114,15
MAA_A[0 ..17]
DQS_A#[0..7]
SCS_A#014,15 SCS_A#114,15 SCS_A#214,15 SCS_A#314,15
MAA_A0 MAA_A1 MAA_A2 MAA_A3 MAA_A4 MAA_A5 MAA_A6 MAA_A7 MAA_A8 MAA_A9 MAA_ A10 MAA_ A11 MAA_ A12 MAA_ A13 MAA_ A14 MAA_ A15 MAA_ A16 MAA_ A17
DQM_A[0 ..7]14
RAS_A#14,15 CAS_A#14,15
DQS_A[0..7]14
DQM_A0 DQM_A1 DQM_A2 DQM_A3 DQM_A4 DQM_A5 DQM_A6 DQM_A7
RAS_A# CAS_A# WE_ A#
WE_ A#14,15
DQS_A0 DQS_A1 DQS_A2 DQS_A3 DQS_A4 DQS_A5 DQS_A6 DQS_A7
DQS_A#0 DQS_A#1 DQS_A#2 DQS_A#3 DQS_A#4 DQS_A#5 DQS_A#6 DQS_A#7
U8C
PART 3 OF 6
MEM_ B I/F
DATA_A0 DATA_A1 DATA_A2 DATA_A3 DATA_A4 DATA_A5 DATA_A6 DATA_A7 DATA_A8 DATA_A9 DATA_A10 DATA_A11 DATA_A12 DATA_A13 DATA_A14 DATA_A15 DATA_A16 DATA_A17 DATA_A18 DATA_A19 DATA_A20 DATA_A21 DATA_A22 DATA_A23 DATA_A24 DATA_A25 DATA_A26 DATA_A27 DATA_A28 DATA_A29 DATA_A30 DATA_A31 DATA_A32 DATA_A33 DATA_A34 DATA_A35 DATA_A36 DATA_A37 DATA_A38 DATA_A39 DATA_A40 DATA_A41 DATA_A42 DATA_A43 DATA_A44 DATA_A45 DATA_A46 DATA_A47 DATA_A48 DATA_A49 DATA_A50 DATA_A51 DATA_A52 DATA_A53 DATA_A54 DATA_A55 DATA_A56 DATA_A57 DATA_A58 DATA_A59 DATA_A60 DATA_A61 DATA_A62 DATA_A63
MEM_COMPN MEM_COMPP
MEM_VREF
MEM_MODE
ATI-RC410(215RPA4AKA21HK)-A11
DATA_A[0 ..63]
R157 61.9 /6/1 R202 61.9 /6/1
R158 1K/6
DATA_A[0 ..63] 14
VCC_DDR
VCC_DDR
Pull high for DDR2
L9 0.082U300m
C486 1U/6.3 V/4/X5R
+1.8V_S0
R156
100/4/1
R155
100/4/1
VCC_DDR
C136
0.1U/16V/4/X7R
C138
0.1U/16V/4/X7R
A A
MSI
T itle
Size Document Number R ev
5
4
3
2
Date: Sh eet of
MICRO-STAR INt'L CO., LTD.
ATI RC410 - DDR I/F: x1 CHANNEL
MS-7254
MSI
10 39Friday, November 25, 2005
1
0B
5
4
3
2
1
D D
GFX_ RX0P23 GFX_ RX0N23 GFX_ RX1P23 GFX_ RX1N23 GFX_ RX2P23 GFX_ RX2N23 GFX_ RX3P23 GFX_ RX3N23 GFX_ RX4P23 GFX_ RX4N23 GFX_ RX5P23 GFX_ RX5N23 GFX_ RX6P23 GFX_ RX6N23 GFX_ RX7P23 GFX_ RX7N23 GFX_ RX8P23 GFX_ RX8N23 GFX_ RX9P23 GFX_ RX9N23 GFX_ RX10P23 GFX_ RX10N23 GFX_ RX11P23 GFX_ RX11N23 GFX_ RX12P23
C C
PCI_E x1
B B
GFX_ RX12N23 GFX_ RX13P23 GFX_ RX13N23 GFX_ RX14P23 GFX_ RX14N23 GFX_ RX15P23 GFX_ RX15N23
A_RX2P18 A_RX2N18 A_RX3P18 A_RX3N18
GPP_RX0P23 GPP_ RX0N23
A_RX0P18 A_RX0N18 A_RX1P18 A_RX1N18
SBLINK_ CLKP17 SBLINK_CLKN17
NBSRC_CLKP17 NBSRC_CLKN17
BMR EQ#12,18,21
U8B
PART 2 OF 6
A_TX2P_C
C208 0.1U/1 6V/4/X7R
A_TX2N_C
C217 0.1U/1 6V/4/X7R
A_TX3P_C A_TX3N_C
A_TX0P_C
C213 0.1U/1 6V/4/X7R
A_TX0N_C
C200 0.1U/1 6V/4/X7R
A_TX1P_C A_TX1N_C
R207 8.25K/6/1 R224 10K/4
R204 150/6/1
R203 82.5 /4/1
GFX_ TX0P 23 GFX_TX0N 23 GFX_ TX1P 23 GFX_TX1N 23 GFX_ TX2P 23 GFX_TX2N 23 GFX_ TX3P 23 GFX_TX3N 23 GFX_ TX4P 23 GFX_TX4N 23 GFX_ TX5P 23 GFX_TX5N 23 GFX_ TX6P 23 GFX_TX6N 23 GFX_ TX7P 23 GFX_TX7N 23 GFX_ TX8P 23 GFX_TX8N 23 GFX_ TX9P 23 GFX_TX9N 23 GFX_ TX10P 23 GFX_TX10N 23 GFX_ TX11P 23 GFX_TX11N 23 GFX_ TX12P 23 GFX_TX12N 23 GFX_ TX13P 23 GFX_TX13N 23 GFX_ TX14P 23 GFX_TX14N 23 GFX_ TX15P 23 GFX_TX15N 23
C207 0.1U/16V/4/X7R
C218 0.1U/16V/4/X7R
C214 0.1U/16V/4/X7R
C201 0.1U/16V/4/X7R
V_FSB_VTT
A_TX2P 18 A_TX2N 18 A_TX3P 18 A_TX3N 18
GPP_ TX0P 23 GPP_TX0N 23
A_TX0P 18 A_TX0N 18 A_TX1P 18 A_TX1N 18
ATI-RC410(215RPA4AKA21HK)-A11
A A
MSI
T itle
Size Document Number R ev
5
4
3
2
Date: Sh eet of
MICRO-STAR INt'L CO., LTD.
ATI RC410-PCIE I/F
MS-7254
11 39Friday, November 25, 2005
1
MSI
0B
5
4
VCC3 VCC3
3
2
1
VCC3
DAC VDD (3.3V)
AVDD AVDDDI D IGITAL VDD (1.8V)
D D
AVDDQ
DAC2 BANDGAP REF (1.8V)
PLLVDD PLL VDD (1.8V)
C C
B B
+1.8 V_S0
C153 C2.2U6.3Y
+
EC1
.CD1000U6.3EL11.5
C158 C2.2U6.3Y
FB7 120L600m_250
VCC3
R191
4.7 K/4
EC64
_CD100U16EL11
0B new ADD
+1.8 V_S0
FB9 120L600m_250
+1.8 V_S0
C480
C2.2U6.3Y
PLLVDD=(1.8V)
R198
4.7 K/4
I2C_DATA I2C_DATA
+
FB10 120L600m_250
AVDD=(1.8V)
FB8 120L600m_250
C159 C2.2U6.3Y
C176
C2.2U6.3Y
DDC_DATA23
VSYNC#16
HSYN C#16
R_OUT16 G_OUT16
B_OUT16
NB_OSC17
NB_ CLK17
NB_ CLK#17
TVCLKIN23
I2C_CLK23
FB11 120L600m_250
0B new ADD
TP22
DDC_DATA
VSYN C# HSYN C#
R403 _715R1%-LF
R_OUT G_OUT B_OUT
NB_ OSC
NB_ CLK NB_ CLK#
TVCLKIN
TP21
I2C_CLKI2C_CLK
U8D
PART 4 OF 6
CRT
C LK. GEN.
SVID
TP23 TP24 TP25
0B new ADD
DAC_SCL DAC_SDAT
STRP_ DATA
+1.8V_S0
DAC _SCL 16 DAC_SDAT 16
ATI-RC410(215RPA4AKA21HK)-A11
RS410 STRAPS
STRP_ DATA
4
R195 4.7 K/4
R190 4.7 K/4
R175 4.7 K/4
DAC_SCL
R189 X_4.7K/4
Q20 N-2N7002_SOT23
R192 4.7 K/4
BMR EQ#11,18,21
HSYN C#16
VSYNC#16
A A
SB_PW RGD#34
5
H_FSBSEL2_C 8,17
H_FSBSEL1_C 8,17
H_FSBSEL0_C 8,17
VCC3
VCC3
BMREQ#&HSYNC&VSYNC: FSB CLK SPEED DEFAULT: 010 (200MHz)
OTHER COMBINATIONS ARE RESERVED
DAC _SCL: CPU VCC DEFAULT:1
1: >=1.2V CPU_VTT 0: <=1.2V CPU_VTT
STRP_D ATA:Debug strap D EFAULT: 1
1: E2PROM STRAPING 0: MEMORY CHANNEL STRAPING
3
MSI
T itle
Size Document Number R ev
2
Date: Sh eet of
MICRO-STAR INt'L CO., LTD.
ATI RC410-VIDEO I/F, CLOCK & STRAPS
MS-7254
12 39Friday, November 25, 2005
1
0B
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