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MS-7248
Title
A A
B B
C C
COVER SHEET
BLOCK DIAGRAM
Intel LGA775
RC410
SB450
RTM865 Clock Gen.
FWH/FAN/SATA
LAN - RTL8100C/8110S(B)
IEEE1394 VT-6308P
Azalia CODEC-ALC882
VGA, S_OUT
USB CONNECTORS
DDR II DIMM 1 & 2 Channel A
DDR II VTT Decoupling
BTX ,Front Panel,IDE
PCI -Express X16 Slot & X1 Slot
MS7 ACPI Controller
Intersil 6316 4Phase
PCI Slot 1,2
LPC I/O - W83627EHF
Misc
PCIRST & POWER OK MAP
POWER MAP
EMI suggestions
History
Version 1.0A
Page
1
2
3 , 4 , 5
6 , 7 , 8 , 9, 10
11,12, 13, 14, 15
16
17
18
19
20
21
22
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24
25
26
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31
32
33
34
35
Intel LGA775 Processor
CPU:
Intel Prescott ( L2=2MB ) - 3.4G & Above
Intel Cendar Mill (65nm) - 3.73G & Above
Intel Smithfield (90nm Dual core)
System Chipset:
ATI RC410 - (North Bridge)
ATI SB450 (South Bridge)
On Board Chipset:
BIOS -- FWH EEPROM- 4M
Azalia Codec -- RLK- ALC861 7.1+2 channel
LPC Super I/O -- W83637EHF
LAN--RTL8100C/8110S(B)
1394 -- VIA- VT6307/8 with PHY
CLOCK --RTM865
Main Memory:
DDR II * 2 (Max 2GB)
Expansion Slots:
PCI EXPRESS X16 SLOT * 1
PCI EXPRESS X1 SLOT * 1
PCI 2.3 SLOT * 2
SATA *4
PCI Routing Table
PCI Device
D D
PCI Slot 2
PCI Slot 1
LAN
1394.
1
AD16 1 E
AD17
AD18
AD19 4 H
0F
2
INTERRUPTIDSEL REQ/GNT
G
2
PCI CLK
PCI_CLK1
PCI_CLK0
PCI_CLK3
PCI_CLK2
3
Intersil PWM:
Controller: HIP6566CRZ 3 Phase
MICRO-START INT'L CO.,LTD.
MICRO-START INT'L CO.,LTD.
Title
Title
Title
MS-7248
MS-7248
MS-7248
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A3
A3
A3
Date: Sheet of
Date: Sheet of
4
Date: Sheet of
MICRO-START INT'L CO.,LTD.
COVER SHEET 10A
COVER SHEET 10A
COVER SHEET 10A
136Friday, November 18, 2005
136Friday, November 18, 2005
136Friday, November 18, 2005
5
![](/html/9d/9d27/9d275db481486b3a8609577693b30d3f76522e3867ba807e94053a084b0060d1/bg2.png)
1
2
3
4
5
x1 DDR2
CHANNEL
A A
EXTERNAL CLOCK
GENERATOR
VGA CON
PCIE GFX x16
ATI TMDS
16
21
26
CRT
PCIE x16
DESKTOP PRESCOTT
SOCKET LGA775
4X DATA
2X ADDRESS
AGTL+
200MHz
ATI NB - RC410
AGTL+ P4 CPU I/F
X1 DDR2 CHANNEL
INTEGRATED GRAPHICS
TVOUT/TMDS
1 X16 PCIE VIDEO
3~5
DDR 400
A CHANNEL
UNBUFFERED
DDR2 DIMM
23,24
184-PIN DDR DIMM
UNBUFFERED
DDR2 DIMM
23,24
6~10
B B
ATI SB - SB450
USB-7 USB-6
22
22 22 22 22 22 22 22
IEEE 1394
C C
USB-4
19
USB-3
IDE1
PCI BUS
PCI SLOT 2
IDE2
USB-1USB-2USB-5
29
26 26
USB-0
PCI SLOT 1
29
ATA 66/100/133
USB 2.0
USB2.0 (4+4)
SATA (4 PORTS)
AZALIA
ATA 66/100/133
ACPI 1.1
LPC I/F
INT RTC
PCI/PCI BDGE
11~15
AC LINK
SERIAL ATA
Azalia ALC861
20
SATA#0 SATA#1
1717
SATA#2
17 17
SATA#3
LPC BUS
CPU CORE POWER
RC410 CORE POWER
DDR2 DRAM POWER
D D
PCIE & SB POWER
1
28
27
27
27
2
LPC SUPER I/O W83627EHF
FLOPPY
LPT
3
KBD
MOUSE
3030 30
FLASH
BIOS
30
17
MICRO-START INT'L CO.,LTD.
MICRO-START INT'L CO.,LTD.
Title
Title
Title
MS-7248
MS-7248
MS-7248
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A3
A3
A3
Date: Sheet of
Date: Sheet of
4
Date: Sheet of
MICRO-START INT'L CO.,LTD.
BLOCK DIAGRAM 10A
BLOCK DIAGRAM 10A
BLOCK DIAGRAM 10A
236Friday, November 18, 2005
236Friday, November 18, 2005
236Friday, November 18, 2005
5
![](/html/9d/9d27/9d275db481486b3a8609577693b30d3f76522e3867ba807e94053a084b0060d1/bg3.png)
1
CPU SIGNAL BLOCK
H_A#[3..31]6
H_A#29
H_A#31
H_A#30
AJ5
G22
AH5
A34#
D47#
D22
H_D#46
AH4
A33#
D46#
E22
H_D#45
AG5
A32#
D45#
G21
H_D#44
AG4
A31#
D44#
F21
H_D#43
AG6
A30#
D43#
E21
H_D#42
H_A#28
A29#
D42#
H_D#41
A A
B B
C C
D D
R275
R275
VTT_OUT_LEFT
EDRDY#6
H_IERR#4
H_FERR#4,11
H_LOCK#6
H_THERMDA30
VTIN_GND30
TRMTRIP#4,5
H_PROCHOT#4,28
H_SLP#11
V_FSB_VTT
H_FSBSEL04,5
H_FSBSEL14,5
H_FSBSEL24,5
H_D#[0..63]6
H_DBI#06
H_DBI#16
H_DBI#26
H_DBI#36
R284 0R0402R284 0R0402
H_STPCLK#11
H_INIT#11,17
H_DBSY#6
H_DRDY#6
H_TRDY#6
H_ADS#6
H_BNR#6
H_HIT#6
H_HITM#6
H_BPRI#6
H_DEFER#6
H_IGNNE#11
ICH_H_SMI#11
H_A20M#11
R285 0R0402R285 0R0402
R281 200/6R281 200/6
H_PWRGD4,11
H_CPURST#4,6
62R
62R
H_TDI
H_TDO
H_TMS
H_TRST#
H_TCK
H_TESTHI13
H_D#63
H_D#62
H_D#61
H_D#60
H_D#59
H_D#58
H_D#57
H_D#56
H_D#55
H_D#54
G11
D19
C20
AB2
AB3
AD3
AD1
AF1
AC1
AG1
AE1
AL1
AK1
AE8
AL2
AH2
AE6
G10
D16
A20
AA2
G29
H30
G30
G23
B22
A22
A19
B19
B21
C21
B18
A17
B16
C18
A8
F2
R3
M3
P3
H4
B2
C1
E3
D2
C3
C2
D4
E4
G8
G7
M2
N2
P2
K3
L2
N5
C9
Y1
V2
N1
U13A
U13A
DBI0#
DBI1#
DBI2#
DBI3#
EDRDY#
IERR#
MCERR#
FERR#/PBE#
STPCLK#
BINIT#
INIT#
RSP#
DBSY#
DRDY#
TRDY#
ADS#
LOCK#
BNR#
HIT#
HITM#
BPRI#
DEFER#
TDI
TDO
TMS
TRST#
TCK
THERMDA
THERMDC
THERMTRIP#
GND/SKTOCC#
PROCHOT#
IGNNE#
SMI#
A20M#
TESTI_13
RSVD
RESERVED0
RESERVED1
RESERVED2
RESERVED3
RESERVED4
RESERVED5
BOOTSELECT
LL_ID0
LL_ID1
BSEL0
BSEL1
BSEL2
PWRGOOD
RESET#
D63#
D62#
D61#
D60#
D59#
D58#
D57#
D56#
D55#
D54#
D53#
B15
H_D#53
AJ6
A35#
D52#
D51#
D50#
D49#
D48#
A14
C14
C15
D17
D20
H_D#49
H_D#47
H_D#50
H_D#52
H_D#51
H_D#48
AF4
F20
H_A#27
AF5
A28#
D41#
E19
H_D#40
H_A#26
AB4
A27#
D40#
E18
H_D#39
H_A#25
AC5
A26#
D39#
F18
H_D#38
H_A#24
AB5
A25#
D38#
F17
H_D#37
H_A#23
AA5
A24#
D37#
G17
H_D#36
2
H_A#22
AD6
A23#
D36#
G18
H_D#35
H_A#21
AA4
A22#
D35#
E16
H_D#34
H_A#20
H_A#19
A21#
A20#Y4A19#Y6A18#W6A17#
D34#
D33#
E15
G16
H_D#32
H_D#33
H_A#18
D32#
G15
H_D#31
H_A#17
AB6
D31#
F15
H_D#30
H_A#16
D30#
G14
H_D#29
H_A#10
H_A#15
H_A#11
H_A#12
H_A#13
H_A#14
U6
A16#W5A15#V4A14#V5A13#U4A12#U5A11#T4A10#
D29#
D28#
D27#
D26#
D25#
D24#
F14
F12
F11
E13
D13
G13
H_D#26
H_D#28
H_D#25
H_D#27
H_D#23
H_D#24
H_A#8
H_A#6
H_A#7
H_A#9
A9#T5A8#R4A7#M4A6#L4A5#M5A4#P6A3#
D23#
D22#
D21#
D20#D7D19#E9D18#F9D17#F8D16#G9D15#
E10
D10
H_D#22
H_D#20
H_D#21
H_D#19
3
4
5
VID Pull-Up Resistor
C364
C364
C10U6.3X51206
C10U6.3X51206
VID5
VID5 28
VID4
VID4 28
VID3
TP14TP14
VCC_VRM_SENSE
D11
VSS_VRM_SENSE
AN6
AN5
AN4
AC2
AN3
DBR#
VSS_SENSE
VCC_SENSE
VCC_MB_REGULATION
D14#
D13#
D12#D8D11#
D10#
B12
B10
A11
C12
C11
H_D#9
H_D#10
H_D#12
H_D#11
H_D#14
H_D#13
AM7
AJ3
AK3
RSVD
ITP_CLK1
ITP_CLK0
VSS_MB_REGULATION
D9#
D8#
D7#A7D6#B7D5#B6D4#A5D3#C6D2#A4D1#C5D0#
A10
H_D#6
H_D#5
H_D#7
H_D#8
H_D#4
AM5
AL4
VID6#
VID5#
GTLREF_SEL
H_D#1
H_D#2
H_D#3
AK4
AL6
VID4#
VID_SELECT
CS_GTLREF
FORCEPH
LINT0/INTR
B4
H_D#0
AM3
AL5
AM2
VID3#
VID2#
VID1#
VID0#
GTLREF0
GTLREF1
BPM5#
BPM4#
BPM3#
BPM2#
BPM1#
BPM0#
PCREQ#
REQ4#
REQ3#
REQ2#
REQ1#
REQ0#
TESTHI12
TESTHI11
TESTHI10
TESTHI9
TESTHI8
TESTHI7
TESTHI6
TESTHI5
TESTHI4
TESTHI3
TESTHI2
TESTHI1
TESTHI0
RSVD
BCLK1#
BCLK0#
RS2#
RS1#
RS0#
AP1#
AP0#
BR0#
COMP5
COMP4
COMP3
COMP2
COMP1
COMP0
DP3#
DP2#
DP1#
DP0#
ADSTB1#
ADSTB0#
DSTBP3#
DSTBP2#
DSTBP1#
DSTBP0#
DSTBN3#
DSTBN2#
DSTBN1#
DSTBN0#
LINT1/NMI
_ZIF-SOCK775-15u-in
_ZIF-SOCK775-15u-in
H_A#5
H_A#3
H_A#4
L5
H_D#17
H_D#15
H_D#18
H_D#16
VID2
VID1
VID0
AN7
H1
H2
H29
E24
AG3
AF2
AG2
AD2
AJ1
AJ2
G5
J6
K6
M6
J5
K4
W2
P1
H5
G4
G3
F24
G24
G26
G27
G25
F25
W3
F26
AK6
G6
G28
F28
A3
F5
B3
U3
U2
F3
T2
J2
R1
G2
T1
A13
J17
H16
H15
J16
AD5
R6
C17
G19
E12
B9
A16
G20
G12
C8
L1
K1
VID3 28
VID2 28
VID1 28
VID0 28
H_BPM#5
H_BPM#4
H_BPM#3
H_BPM#2
H_BPM#1
H_BPM#0
H_REQ#4
H_REQ#3
H_REQ#2
H_REQ#1
H_REQ#0
H_TESTHI12
H_TESTHI11
H_TESTHI10
H_TESTHI9
H_TESTHI8
H_TESTHI2_7
H_TESTHI1
H_TESTHI0
H_FORCEPH
RSVD_G6
H_COMP5
H_COMP4
H_COMP3
H_COMP2
H_COMP1
H_COMP0
VCC_VRM_SENSE 28
VSS_VRM_SENSE 28
R305 62R0402R305 62R0402
GTLREF_SEL
R308 62R0402R308 62R0402
R301 62R0402R301 62R0402
R276 62R0402R276 62R0402
R266 62R0402R266 62R0402
R269 62R0402R269 62R0402
R179 62R0402R179 62R0402
R314 62R0402R314 62R0402
R180 62R0402R180 62R0402
R297 X_62R0402R297 X_62R0402
R262 X_62R0402R262 X_62R0402
CK_H_CPU# 16
CK_H_CPU 16
H_RS#2 6
H_RS#1 6
H_RS#0 6
TP11TP11
TP13TP13
R304 60.4R1%0402R304 60.4R1%0402
R270 60.4R1%0402R270 60.4R1%0402
R286 100R1%0402R286 100R1%0402
R261 100R1%0402R261 100R1%0402
R292 60.4R1%0402R292 60.4R1%0402
R189 60.4R1%0402R189 60.4R1%0402
TP3TP3
TP4TP4
TP6TP6
TP5TP5
H_ADSTB#1 6
H_ADSTB#0 6
H_DSTBP#3 6
H_DSTBP#2 6
H_DSTBP#1 6
H_DSTBP#0 6
H_DSTBN#3 6
H_DSTBN#2 6
H_DSTBN#1 6
H_DSTBN#0 6
H_NMI 11
H_INTR 11
CPU_GTLREF0 4
CPU_GTLREF1 4
H_REQ#[0..4] 6
VTT_OUT_LEFT
V_FSB_VTT
VTT_OUT_RIGHT 4,5
H_FORCEPH 28
VID3
VID1
VID4
VID2
VID0
VID5
GTLREF_SEL 4,6
MCH_GTLREF_CPU 6
H_TESTHI0 : has not beed used in current CPU circuit
0R0402
0R0402
R287
R287
CPU_BR0# 6
C330
C330
C0.1U16Y0402
C0.1U16Y0402
VTT_OUT_RIGHT
X_C0.1U16Y0402
X_C0.1U16Y0402
H_BR#0 4
VTT_OUT_LEFT 4,16
PLACE RESISTORS OUTSIDE SOCKET
CAVITY IF NO ROOM FOR VARIABLE
RESISTOR DON'T PLACE
C370
C370
C337
C337
C0.1U16Y0402
C0.1U16Y0402
1
3
5
7
1
3
5
7
R319 62R0402R319 62R0402
R331 62R0402R331 62R0402
R318 62R0402R318 62R0402
PLACE BPM TERMINATION NEAR CPU
VTT_OUT_RIGHT
RN41
RN41
8P4R-680R
8P4R-680R
1 2
3 4
5 6
7 8
R329 680/6R329 680/6
R321 680/6R321 680/6
RN42
RN42
2
4
6
8
8P4R-62R0402
8P4R-62R0402
RN40
RN40
2
4
6
8
8P4R-62R0402
8P4R-62R0402
H_BPM#3
H_BPM#5
H_BPM#1
H_BPM#0
H_TMS
H_TDI
H_BPM#2
H_BPM#4
H_TDO
H_TRST#
H_TCK
The LL_ID[]1:0] signals are used to select the
correct loading slope for the processor.
ITPCLK[0:1] are copies of BCLK that are used only in processor systems where no debug
port is implemented on the system board.
The signal VID_SELECT(previously known as FC16, land number AN7) on the processor socket
should have a 62 ohm 5% pull-down resistor to ground.
1
LL_ID[]1:0]=00 for the P4 processor in the
775-land package.
2
BSEL
2
1
0
0
0
1 0 200 MHZ (800)
10133 MHZ (533)
0
0
3
TABLE
FSB FREQUENCY0
267 MHZ (1067)
4
MICRO-START INT'L CO.,LTD.
MICRO-START INT'L CO.,LTD.
Title
Title
Title
MS-7248
MS-7248
MS-7248
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A3
A3
A3
Date: Sheet of
Date: Sheet of
Date: Sheet of
MICRO-START INT'L CO.,LTD.
Intel LGA775 - Signals 10A
Intel LGA775 - Signals 10A
Intel LGA775 - Signals 10A
336Friday, November 18, 2005
336Friday, November 18, 2005
336Friday, November 18, 2005
5
![](/html/9d/9d27/9d275db481486b3a8609577693b30d3f76522e3867ba807e94053a084b0060d1/bg4.png)
1
VCCP
AH25
AH22
AH21
AH19
AH18
AH15
AH14
AH12
AH11
AG9
AG8
AG30
AG29
AG28
AG27
AG26
AG25
AG22
AG21
AG19
AG18
AG15
AG14
AG12
AG11
AF9
AF8
AF22
AF21
U13B
U13B
VCCP
AF19
AE23
AE22
AE21
AE19
AE18
AE15
AE14
AE12
AE11
AD30
AD29
AD28
AD27
AD26
AD25
AD24
AD23
AC30
AC29
AC28
AC27
AC26
AC25
AC24
AC23
VCCP
VCCP
AF18
AF15
AF14
AF12
AF11
AE9
AD8
AC8
AB8
AA8
VCCP
GTLREF_SEL3,6
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
R317
R317
825/4/1
825/4/1
R315
R315
825/4/1
825/4/1
GTLREF_SEL
A A
B B
C C
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
Y8
Y27
Y28
Y29
Y30
Q32 N-2N7002_SOT23Q32 N-2N7002_SOT23
D
Q34 N-2N7002_SOT23Q34 N-2N7002_SOT23
D
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCCW8VCC
VCC
VCC
VCC
Y23
Y24
Y25
Y26
W30
S
G
VTT_OUT_LEFT
S
G
NOTE: FOR NW EE CPU
VTT_OUT_RIGHT3,5
VTT_OUT_LEFT3,16
D D
VTT_OUT_RIGHT
R332 130R1%0402R332 130R1%0402
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
W24
W25
W26
W27
W28
W29
VTT_OUT_RIGHT
GTLREF VOLTAGE SHOULD BE
0.63*VTT = 0.756V
R178 62R0402R178 62R0402
R296 X_100R0402R296 X_100R0402
R298 62R0402R298 62R0402
R311 62R0402R311 62R0402
W23
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCCU8VCCV8VCC
U28
U29
U30
R278
R278
124R1%0402
124R1%0402
R288
R288
210R1%0402
210R1%0402
R312
R312
124R1%0402
124R1%0402
R280
210R1%0402
210R1%0402
VCC
VCC
VCC
VCC
VCC
VCC
VCCT8VCC
VCC
VCC
VCC
VCC
U23
U24
U25
U26
U27
R265
R265
10R0402
10R0402
C329
C329
C1U6.3Y50402/80-20%
C1U6.3Y50402/80-20%
R274
R274
10R0402
10R0402
C334
C334
C1U6.3Y50402/80-20%
C1U6.3Y50402/80-20%
H_PROCHOT#
H_CPURST#
H_PWRGDVTT_OUT_LEFT
H_BR#0
H_IERR#
AH27
AH26
VCC
VCC
VCC
VCC
T29
T30
AH28
AH29
AH30
AH8
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
T25
T26
T27
T28
CPU_GTLREF0
C319
C319
C220P25N0402
C220P25N0402
CPU_GTLREF1
C326
C326
C220P25N0402
C220P25N0402
2
AH9
AJ11
AJ12
AJ14
AJ15
AJ18
AJ19
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCCN8VCCP8VCCR8VCC
VCC
T23
T24
N29
N30
H_PROCHOT# 3,28
H_CPURST# 3,6
H_PWRGD 3,11
H_BR#0 3
H_IERR# 3
AJ21
AJ22
AJ25
AJ26
AJ8
AJ9
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
N23
N24
N25
N26
N27
N28
CPU_GTLREF0 3
CPU_GTLREF1 3
AK11
AK12
AK14
VCC
VCC
VCC
VCC
VCC
VCCM8VCC
M29
M30
AK15
AK18
AK19
AK21
AK22
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
M24
M25
M26
M27
M28
V_FSB_VTT
10uH/8/125mA/Rdc=0.7
10uH/8/125mA/Rdc=0.7
X_COPPER
X_COPPER
V_FSB_VTT
L8 10uH/8/125mA/Rdc=0.7L8 10uH/8/125mA/Rdc=0.7R280
X_COPPER
X_COPPER
V_FSB_VTT
3
AK25
AK26
AK8
AK9
AL11
AL12
AL14
AL15
AL18
AL19
AL21
AL22
AL25
AL26
AL29
AL30
AL8
AL9
AM11
AM12
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCCJ8VCCJ9VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCCK8VCCL8VCC
J24
J25
J26
J27
J28
J29
J30
K23
K24
K25
K26
K27
K28
K29
K30
M23
L7
L7
R187
CP5
CP5
CP6
CP6
FSBSEL RESISTOR CAN BE REMOVED IF ONLY TEJAS
AND CEDAR MILL ARE SUPPORTED
R187
0/8
0/8
C209
C209
X_1u/10V/6
X_1u/10V/6
RN11
RN11
1
2
3
4
5
6
7
8
8P4R-470R0402
8P4R-470R0402
AM14
AM15
VCC
VCC
VCC
VCC
J22
J23
AM18
J21
H_FSBSEL1
H_FSBSEL0
H_FSBSEL2
AM19
AM21
AM22
AM25
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
J15
J18
J19
J20
C208
C208
C22U6.3X50805
C22U6.3X50805
AM26
AM29
VCC
VCC
J13
J14
AM30
VCC
VCC
J12
AM8
AM9
VCC
VCC
VCC
VCC
J10
J11
X_10u/10V/8
X_10u/10V/8
AN11
AN12
AN14
AN15
AN18
VCC
VCC
VCC
VCC
VCC
VCC
VTT_OUT_RIGHT
VTT_OUT_LEFT
VCC
VCC
VCC
VCC
VCC
VCC
AN8
AN9
AN26
AN29
AN30
H_VCCIOPLL
H_VCCA
C210
C210
H_VSSA
H_FSBSEL1 3,5
H_FSBSEL0 3,5
H_FSBSEL2 3,5
AN19
AN21
AN22
VCC
VCC
VCC-IOPLL
VTTPWRGD
VCC
AN25
VCC
VCCA
VSSA
VCCPLL
VTT_SEL
RSVD
HS11HS22HS33HS4
4
A23
B23
D23
C23
A25
VTT
A26
VTT
A27
VTT
A28
VTT
A29
VTT
A30
VTT
B25
VTT
B26
VTT
B27
VTT
B28
VTT
B29
VTT
B30
VTT
C25
VTT
C26
VTT
C27
VTT
C28
VTT
C29
VTT
C30
VTT
D25
VTT
D26
VTT
D27
VTT
D28
VTT
D29
VTT
D30
VTT
AM6
AA1
J1
F27
F29
_ZIF-SOCK775-15u-in
_ZIF-SOCK775-15u-in
4
100mA
100mA
VccPLL for Ssmithfield define the support
future processor.
H_VCCA
H_VSSA
H_VCCIOPLL
V_FSB_VTT
CAPS FOR FSB GENERIC
V_FSB_VTT
C196
C196
C0.1U16Y0402
C0.1U16Y0402
VTT_PWG
VTT_OUT_RIGHT
VTT_OUT_LEFT
VTT_OUT_RIGHT
VID_GD#27,28
FSB GENERIC DECOUPLING
R334 680R0402R334 680R0402
VCC5_SB
R340
R340
1KR0402
1KR0402
R337 1KR0402R337 1KR0402
10u/10V/8
10u/10V/8
C390
C390
5
V_FSB_VTT
C198 10u/10V/8C198 10u/10V/8
C199 10u/10V/8C199 10u/10V/8
C200 10u/10V/8C200 10u/10V/8
C195
C195
C0.1U16Y0402
C0.1U16Y0402
VTT_PWG SPEC :
High > 0.9V
Low < 0.3V
Trise < 150ns
VTT_PWG
Q37
Q37
N-MMBT3904_NL_SOT23
N-MMBT3904_NL_SOT23
X_C1U6.3Y50402/80-20%
X_C1U6.3Y50402/80-20%
C197
C197
C0.1U16Y0402
C0.1U16Y0402
C384
C384
V_FSB_VTT
Title
Title
R289 62R0402R289 62R0402
R290 62R0402R290 62R0402
1
TRMTRIP#
H_FERR#
TRMTRIP# 3,5
H_FERR# 3,11
2
3
4
Title
MS-7248
MS-7248
MS-7248
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A3
A3
A3
Date: Sheet
Date: Sheet of
Date: Sheet of
MICRO-START INT'L CO.,LTD.
MICRO-START INT'L CO.,LTD.
MICRO-START INT'L CO.,LTD.
Intel LGA775 - Power 10A
Intel LGA775 - Power 10A
Intel LGA775 - Power 10A
5
of
436Friday, November 18, 2005
436Friday, November 18, 2005
436Friday, November 18, 2005
![](/html/9d/9d27/9d275db481486b3a8609577693b30d3f76522e3867ba807e94053a084b0060d1/bg5.png)
1
2
3
4
5
VTT_OUT_RIGHT3,4
A A
B B
C C
VTT_OUT_RIGHT
60.4R1%0402
60.4R1%0402
U13C
U13C
A12
VSS
A15
VSS
A18
VSS
A2
VSS
A21
VSS
A24
VSS
A6
VSS
A9
VSS
AA23
VSS
AA24
VSS
AA25
VSS
AA26
VSS
AA27
VSS
AA28
VSS
AA29
VSS
AA3
VSS
AA30
VSS
AA6
VSS
AA7
VSS
AB1
VSS
AB23
VSS
AB24
VSS
AB25
VSS
AB26
VSS
AB27
VSS
AB28
VSS
AB29
VSS
AB30
VSS
AB7
VSS
AC3
VSS
AC6
VSS
AC7
VSS
AD4
VSS
AD7
VSS
AE10
VSS
AE13
VSS
AE16
VSS
AE17
VSS
AE2
VSS
AE20
VSS
AE24
VSS
AE25
VSS
AE26
VSS
AE27
VSS
AE28
VSS
R307
R307
VSS
AE29
H_COMP7
H_COMP6
AE3
COMP6Y3COMP7
VSS
AE5
AE30
R322
R322
60.4R1%0402
60.4R1%0402
TP2TP2
AE4
D14
RSVD
RSVDD1RSVD
VSS
VSS
VSS
AE7
AF10
AF13
VSS
E23
RSVD
VSS
AF16
RSVDE5RSVDE6RSVDE7RSVD
VSS
VSS
VSS
AF17
AF20
AF23
R299 62R0402R299 62R0402
R303 62R0402R303 62R0402
TP8TP8
TP7TP7
TP1TP1
F23
B13
F6
IMPSEL#
VSS
VSS
VSS
AF24
AF25
AF26
AF27
RSVD
VSS
AF28
VSS
AF29
RSVDJ3RSVDN4RSVD
VSS
VSS
AF3
AF30
VSS
MSID1
MSID0
P5
AC4
W1
RSVD
MSID[1]V1MSID[0]
VSS
VSS
VSS
VSS
VSS
VSS
VSS
AF6
AF7
AG10
AG13
AG16
AG17
AG20
AG23
R310 X_62R0402R310 X_62R0402
V30
VSSY7VSSY5VSSY2VSSW7VSSW4VSSV7VSSV6VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
AH1
AG7
AH10
AH13
AH16
AH17
AG24
VSSV3VSS
VSS
AH20
V29
V28
V27
V26
VSS
VSS
VSS
VSS
VSS
VSS
VSS
AH3
AH6
AH23
AH24
V25
V24
V23
VSS
VSS
VSS
VSSU7VSSU1VSST7VSST6VSST3VSSR7VSSR5VSS
VSS
VSS
VSS
VSS
AH7
AJ10
AJ13
AJ16
VSS
AJ17
V_FSB_VTT
VSS
VSS
AJ20
AJ23
AJ24
VSS
R30
R29
R28
R27
R26
R25
R24
R23
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
AJ4
AJ7
AJ27
AJ28
AJ29
AJ30
AK10
AK13
AK16
AK17
2005 Performance
FMB platform
MSID1 0 0
MSID0 0 NC
P30
P29
P28
P27
P26
P25
VSS
VSSR2VSSP7VSSP4VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
AK2
AK20
AK5
AK23
AK24
AK27
AK28
AK29
AK30
P24
P23
VSS
VSS
VSS
VSSN7VSSN6VSSN3VSSM7VSSM1VSSL7VSSL6VSS
VSS
VSS
VSS
VSS
VSS
AK7
AL10
AL13
AL16
2005 Mainstream/Value
FMB platform
L30
VSS
VSS
VSS
VSS
VSS
VSS
AL17
AL20
AL23
AL24
AL27
AL28
VSSL3VSS
VSS
AL3
H28
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSSH3VSSH6VSSH7VSSH8VSSH9VSSJ4VSSJ7VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSSB1VSS
B11
AN1
AN2
AN10
AN13
AN16
AN17
AN20
AN23
B14
AN24
AN27
AN28
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
_ZIF-SOCK775-15u-in
_ZIF-SOCK775-15u-in
H14
H13
H12
H11
H10
G1
F7
F4
F22
F19
F16
F13
F10
E8
E29
E28
E27
E26
E25
E20
E2
E17
E14
E11
D9
D6
D5
D3
D24
D21
D18
D15
D12
C7
C4
C24
C22
C19
C16
C13
C10
B8
B5
B24
B20
B17
VSS
VSS
K2
L26
L25
L24
L23
K5
VSS
VSS
VSS
VSS
VSSK7VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
AM13
AM16
AM4
AM17
AM20
AM23
AM24
AM27
AM28
L29
L28
L27
VSS
VSS
VSS
AL7
AM1
AM10
H17
H18
H19
H20
H21
H22
H23
H24
H25
H26
H27
VCC3 VCC3
R173
R173
R169
R169
1KR0402
1KR0402
1KR0402
1KR0402
Q19 N-MMBT3904_NL_SOT23Q19 N-MMBT3904_NL_SOT23Q17 N-MMBT3904_NL_SOT23Q17 N-MMBT3904_NL_SOT23
2
V_FSB_VTT
3
R175
R175
1KR0402
1KR0402
R170
R170
1KR0402
1KR0402
V_FSB_VTT
Q35 N-MMBT3904_NL_SOT23Q35 N-MMBT3904_NL_SOT23
1
R176
R176
1KR0402
1KR0402
VCC3
R168
R168
1KR0402
1KR0402
V_FSB_VTT
D D
H_FSBSEL03,4 H_FSBSEL1_C 9,16H_FSBSEL13,4 H_FSBSEL2_C 9,16H_FSBSEL23,4 TRMTRIP_C# 14TRMTRIP#3,4H_FSBSEL0_C 9,16
Q18 N-MMBT3904_NL_SOT23Q18 N-MMBT3904_NL_SOT23
V_FSB_VTT
R316
R316
4
1KR0402
1KR0402
VCC3
R336
R336
1KR0402
1KR0402
MICRO-START INT'L CO.,LTD.
MICRO-START INT'L CO.,LTD.
Title
Title
Title
MS-7248
MS-7248
MS-7248
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet
Date: Sheet
MICRO-START INT'L CO.,LTD.
Intel LGA775- GND 10A
Intel LGA775- GND 10A
Intel LGA775- GND 10A
5
of
of
of
536Friday, November 18, 2005
536Friday, November 18, 2005
536Friday, November 18, 2005
![](/html/9d/9d27/9d275db481486b3a8609577693b30d3f76522e3867ba807e94053a084b0060d1/bg6.png)
1
A A
H_REQ#[0..4]3
VCC5
NOTE: TO Support northwood
EE,COMP_P=56 ohm
otherwise ,COMP_P=47 ohm
R224
R224
4.7KR1%
4.7KR1%
GTLREF_SEL
B B
C C
MCH_GTLREF_CPU3
D D
GTLREF_SEL3,4
DS
G
GTLREF_SEL
Q25
Q25
N-2N7002_SOT23
N-2N7002_SOT23
R238 X_0/6R238 X_0/6
G
1
VCCP
DS
R240 _280R1%-1R240 _280R1%-1
DS
Q27
Q27
G
N-2N7002_SOT23
N-2N7002_SOT23
SUS_STAT#14
V_FSB_VTT
R205
R205
365/4/1
365/4/1
Q26
Q26
N-2N7002_SOT23
N-2N7002_SOT23
C233
C233
0.01u/50V/6
0.01u/50V/6
SUS_STAT#
R236
R236
100R1%0402
100R1%0402
R241
R241
210R1%
210R1%
VCC_DDR
+1.8V_S0
C276
C276
1u/10V/6
1u/10V/6
COMP_P
R309
R309
4.7KR0402
4.7KR0402
NB_GTLREF
2
H_A#[3..31]3
LOW
HIGH
2
H_REQ#[0..4]
H_ADSTB#03
H_ADSTB#13
H_RS#[0..2]3
CPU_BR0#3
H_CPURST#3,4
EDRDY#3
NB_RST#26,27
V_FSB_VTT
H_A#[3..31]
H_ADS#3
H_BNR#3
H_BPRI#3
H_DEFER#3
H_DRDY#3
H_DBSY#3
H_LOCK#3
H_TRDY#3
H_HITM#3
H_HIT#3
NB_PWRGD27,31
RC400 MODETESTMODE
NORMAL MODE
TEST MODE
H_A#3
H_A#4
H_A#5
H_A#6
H_A#7
H_A#8
H_A#9
H_A#10
H_A#11
H_A#12
H_A#13
H_A#14
H_A#15
H_A#16
H_REQ#0
H_REQ#1
H_REQ#2
H_REQ#3
H_REQ#4
H_ADSTB#0
H_A#17
H_A#18
H_A#19
H_A#20
H_A#21
H_A#22
H_A#23
H_A#24
H_A#25
H_A#26
H_A#27
H_A#28
H_A#29
H_A#30
H_ADSTB#1
H_ADS#
H_BNR#
H_BPRI#
H_DEFER#
H_DRDY#
H_DBSY#
H_LOCK#
H_TRDY#
H_HITM#
H_HIT#
H_RS#[0..2]
H_CPURST#
EDRDY#
R246 47.5/6/1R246 47.5/6/1
R243 27.4R1%R243 27.4R1%
C257 C220P50NC257 C220P50N
H_A#31
C250 C2.2U6.3YC250 C2.2U6.3Y
R237
R237
4.7KR0402
4.7KR0402
H_RS#0
H_RS#1
H_RS#2
COMP_P
3
U18A
U18A
G28
CPU_A3#
H26
CPU_A4#
G27
CPU_A5#
G30
CPU_A6#
G29
CPU_A7#
G26
CPU_A8#
H28
CPU_A9#
J28
CPU_A10#
H25
CPU_A11#
K28
CPU_A12#
H29
CPU_A13#
J29
CPU_A14#
K24
CPU_A15#
K25
CPU_A16#
F29
CPU_REQ0#
G25
CPU_REQ1#
F26
CPU_REQ2#
F28
CPU_REQ3#
E29
CPU_REQ4#
H27
CPU_ADSTB0#
M28
CPU_A17#
K29
CPU_A18#
K30
CPU_A19#
J26
CPU_A20#
L28
CPU_A21#
L29
CPU_A22#
M30
CPU_A23#
K27
CPU_A24#
M29
CPU_A25#
K26
CPU_A26#
N28
CPU_A27#
L26
CPU_A28#
N25
CPU_A29#
L25
CPU_A30#
N24
CPU_A31#
L27
CPU_ADSTB1#
F25
CPU_ADS#
F24
CPU_BNR#
E23
CPU_BPRI#
E25
CPU_DEFER#
G24
CPU_DRDY#
F23
CPU_DBSY#
G22
CPU_BR0#
E27
CPU_LOCK#
F22
CPU_TRDY#
E24
CPU_HITM#
D26
CPU_HIT#
E26
CPU_RS0#
G23
CPU_RS1#
D23
CPU_RS2#
D25
RESERVED0
C11
CPU_CPURST#
E11
RESERVED1
AH14
SUS_STAT#
A3
SYSRESET#
E3
POWERGOOD
B11
CPU_COMP_P
D11
CPU_COMP_N
H21
CPVDD
H20
CPVSS
H22
CPU_VREF
AH13
THERMALDIODE_P
AJ13
THERMALDIODE_N
C4
TESTMODE
_ATI-RC410(215RPA4AKA21HK)-A11
_ATI-RC410(215RPA4AKA21HK)-A11
3
PART 1 OF 6
PART 1 OF 6
DATA GROUP 0DATA GROUP 1DATA GROUP 2DATA GROUP 3
DATA GROUP 0DATA GROUP 1DATA GROUP 2DATA GROUP 3
CPU_DBI0#
CPU_DSTB0N#
CPU_DSTB0P#
ADDR. GROUP 1 ADDR. GROUP 0CONTROLMISC.
ADDR. GROUP 1 ADDR. GROUP 0CONTROLMISC.
CPU_DBI1#
CPU_DSTB1N#
CPU_DSTB1P#
CPU_DBI2#
CPU_DSTB2N#
CPU_DSTB2P#
AGTL+ I/F
AGTL+ I/F
CPU_DBI3#
CPU_DSTB3N#
CPU_DSTB3P#
CPU_D0#
CPU_D1#
CPU_D2#
CPU_D3#
CPU_D4#
CPU_D5#
CPU_D6#
CPU_D7#
CPU_D8#
CPU_D9#
CPU_D10#
CPU_D11#
CPU_D12#
CPU_D13#
CPU_D14#
CPU_D15#
CPU_D16#
CPU_D17#
CPU_D18#
CPU_D19#
CPU_D20#
CPU_D21#
CPU_D22#
CPU_D23#
CPU_D24#
CPU_D25#
CPU_D26#
CPU_D27#
CPU_D28#
CPU_D29#
CPU_D30#
CPU_D31#
CPU_D32#
CPU_D33#
CPU_D34#
CPU_D35#
CPU_D36#
CPU_D37#
CPU_D38#
CPU_D39#
CPU_D40#
CPU_D41#
CPU_D42#
CPU_D43#
CPU_D44#
CPU_D45#
CPU_D46#
CPU_D47#
CPU_D48#
CPU_D49#
CPU_D50#
CPU_D51#
CPU_D52#
CPU_D53#
CPU_D54#
CPU_D55#
CPU_D56#
CPU_D57#
CPU_D58#
CPU_D59#
CPU_D60#
CPU_D61#
CPU_D62#
CPU_D63#
E28
D28
D29
C29
D30
C30
B29
C28
C26
B25
B27
C25
A27
C24
A24
B26
C27
A28
B28
C19
C23
C20
C22
B22
B23
C21
B24
E21
B21
B20
G19
F21
B19
E20
D21
A21
D22
E22
C18
F19
E19
A18
D19
B18
C17
B17
E17
B16
C15
A15
B15
F16
G18
F18
C16
D18
E18
E16
D16
C14
B14
E15
D15
C13
E14
F13
B13
A12
C12
E12
D13
D12
B12
E13
F15
G15
4
H_D#0
H_D#1
H_D#2
H_D#3
H_D#4
H_D#5
H_D#6
H_D#7
H_D#8
H_D#9
H_D#10
H_D#11
H_D#12
H_D#13
H_D#14
H_D#15
H_DBI#0
H_DSTBN#0
H_DSTBP#0
H_D#16
H_D#17
H_D#18
H_D#19
H_D#20
H_D#21
H_D#22
H_D#23
H_D#24
H_D#25
H_D#26
H_D#27
H_D#28
H_D#29
H_D#30
H_D#31
H_DBI#1
H_DSTBN#1
H_DSTBP#1
H_D#32
H_D#33
H_D#34
H_D#35
H_D#36
H_D#37
H_D#38
H_D#39
H_D#40
H_D#41
H_D#42
H_D#43
H_D#44
H_D#45
H_D#46
H_D#47
H_DBI#2
H_DSTBN#2
H_DSTBP#2
H_D#48
H_D#49
H_D#50
H_D#51
H_D#52
H_D#53
H_D#54
H_D#55
H_D#56
H_D#57
H_D#58
H_D#59
H_D#60
H_D#61
H_D#62
H_D#63
H_DBI#3
H_DSTBN#3
H_DSTBP#3
4
5
H_D#[0..63]
H_DBI#0 3
H_DSTBN#0 3
H_DSTBP#0 3
H_DBI#1 3
H_DSTBN#1 3
H_DSTBP#1 3
H_DBI#2 3
H_DSTBN#2 3
H_DSTBP#2 3
H_DBI#3 3
H_DSTBN#3 3
H_DSTBP#3 3
Title
Title
Title
MS-7248
MS-7248
MS-7248
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet
Date: Sheet
H_D#[0..63] 3
MICRO-START INT'L CO.,LTD.
MICRO-START INT'L CO.,LTD.
MICRO-START INT'L CO.,LTD.
RC410- AGTL+ I/F
RC410- AGTL+ I/F
RC410- AGTL+ I/F
636Friday, November 18, 2005
636Friday, November 18, 2005
636Friday, November 18, 2005
5
10A
10A
10A
of
of
of
![](/html/9d/9d27/9d275db481486b3a8609577693b30d3f76522e3867ba807e94053a084b0060d1/bg7.png)
1
2
3
4
5
MAA_A[0..17]23,24
A A
B B
SDQS_A#[0..7]23
SCLKA#023
SCLKA023
SCLKA#123
SCLKA123
SCLKA#223
SCLKA223
SCLKA#323
SCLKA323
SCLKA#423
SCLKA423
SCLKA#523
C C
SCLKA523
SCKE_A023,24
SCKE_A123,24
SCKE_A223,24
SCKE_A323,24
ODT_A023,24
ODT_A123,24
MAA_A[0..17]
SDQS_A#[0..7]
SCS_A#023,24
SCS_A#123,24
SCS_A#223,24
SCS_A#323,24
MAA_A0
MAA_A1
MAA_A2
MAA_A3
MAA_A4
MAA_A5
MAA_A6
MAA_A7
MAA_A8
MAA_A9
MAA_A10
MAA_A11
MAA_A12
MAA_A13
MAA_A14
MAA_A15
MAA_A16
MAA_A17
SDM_A[0..7]23
RAS_A#23,24
CAS_A#23,24
WE_A#23,24
SDQS_A[0..7]23
SDM_A0
SDM_A1
SDM_A2
SDM_A3
SDM_A4
SDM_A5
SDM_A6
SDM_A7
RAS_A#
CAS_A#
WE_A#
SDQS_A0
SDQS_A1
SDQS_A2
SDQS_A3
SDQS_A4
SDQS_A5
SDQS_A6
SDQS_A7
SDQS_A#0
SDQS_A#1
SDQS_A#2
SDQS_A#3
SDQS_A#4
SDQS_A#5
SDQS_A#6
SDQS_A#7
U18C
U18C
AK27
MEM_A0
PART 3 OF 6
AJ27
AH26
AJ26
AH25
AJ25
AH24
AH23
AJ24
AJ23
AH27
AH22
AJ22
AF28
AJ21
AG27
AJ28
AH21
AJ17
AG15
AE20
AF25
Y27
AB28
R26
R28
AJ29
AG28
AH30
AJ18
AE14
AF22
AE25
W27
AB29
P25
R29
AH17
AF15
AE22
AF26
W26
AB30
R25
R30
AC26
AC25
AF16
AE16
V29
V30
AC24
AC23
AG17
AF17
W29
W28
AH20
AJ20
AE24
AE21
AH29
AG29
AH28
AF29
AG30
AE28
PART 3 OF 6
MEM_A1
MEM_A2
MEM_A3
MEM_A4
MEM_A5
MEM_A6
MEM_A7
MEM_A8
MEM_A9
MEM_A10
MEM_A11
MEM_A12
MEM_A13
MEM_A14
MEM_A15
MEM_A16
MEM_A17
MEM_DM0
MEM_DM1
MEM_DM2
MEM_DM3
MEM_DM4
MEM_DM5
MEM_DM6
MEM_DM7
MEMB_RAS#
MEMB_CAS#
MEMB_WE#
MEM_DQS0P
MEM_DQS1P
MEM_DQS2P
MEM_DQS3P
MEM_DQS4P
MEM_DQS5P
MEM_DQS6P
MEM_DQS7P
MEM_DQS0N
MEM_DQS1N
MEM_DQS2N
MEM_DQS3N
MEM_DQS4N
MEM_DQS5N
MEM_DQS6N
MEM_DQS7N
MEM_CK0N
MEM_CK0P
MEM_CK1N
MEM_CK1P
MEM_CK2N
MEM_CK2P
MEM_CK3N
MEM_CK3P
MEM_CK4N
MEM_CK4P
MEM_CK5N
MEM_CK5P
MEM_CKE0
MEM_CKE1
MEM_CKE2
MEM_CKE3
MEM_CS0#
MEM_CS1#
MEM_CS2#
MEM_CS3#
MEM_ODT0
MEM_ODT1
_ATI-RC410(215RPA4AKA21HK)-A11
_ATI-RC410(215RPA4AKA21HK)-A11
MEM_DQ0
MEM_DQ1
MEM_DQ2
MEM_DQ3
MEM_DQ4
MEM_DQ5
MEM_DQ6
MEM_DQ7
MEM_DQ8
MEM_DQ9
MEM_DQ10
MEM_DQ11
MEM_DQ12
MEM_DQ13
MEM_DQ14
MEM_DQ15
MEM_DQ16
MEM_DQ17
MEM_DQ18
MEM_DQ19
MEM_DQ20
MEM_DQ21
MEM_DQ22
MEM_DQ23
MEM_DQ24
MEM_DQ25
MEM_DQ26
MEM_DQ27
MEM_DQ28
MEM_DQ29
MEM_DQ30
MEM_DQ31
MEM_DQ32
MEM_DQ33
MEM_DQ34
MEM_DQ35
MEM_DQ36
MEM_DQ37
MEM_DQ38
MEM_DQ39
MEM_DQ40
MEM_DQ41
MEM_DQ42
MEM_DQ43
MEM_DQ44
MEM_DQ45
MEM_DQ46
MEM_DQ47
MEM_DQ48
MEM_DQ49
MEM_DQ50
MEM_DQ51
MEM_DQ52
MEM_DQ53
MEM_DQ54
MEM_DQ55
MEM_DQ56
MEM_B I/F
MEM_B I/F
MEM_DQ57
MEM_DQ58
MEM_DQ59
MEM_DQ60
MEM_DQ61
MEM_DQ62
MEM_DQ63
MEM_COMPN
MEM_COMPP
MEM_CAP2
MEM_CAP1
MEM_VREF
MEM_VMODE
MPVDD
MPVSS
AJ16
AH16
AJ19
AH19
AH15
AK16
AH18
AK19
AF13
AF14
AE19
AF19
AE13
AG13
AF18
AE17
AF20
AF21
AG23
AF24
AG19
AG20
AG22
AF23
AD25
AG25
AE27
AD27
AE23
AD24
AE26
AD26
AA25
Y26
W24
U25
AA26
Y25
V26
W25
AC28
AC29
AA29
Y29
AD30
AD29
AA30
Y28
U27
T27
N26
M27
U26
T26
P27
P26
U29
T29
P29
N29
U28
T28
P28
N27
AE29
AJ15
N30
AJ14
AB27
AD28
AB26
AA27
SDQ_A0
SDQ_A1
SDQ_A2
SDQ_A3
SDQ_A4
SDQ_A5
SDQ_A6
SDQ_A7
SDQ_A8
SDQ_A9
SDQ_A10
SDQ_A11
SDQ_A12
SDQ_A13
SDQ_A14
SDQ_A15
SDQ_A16
SDQ_A17
SDQ_A18
SDQ_A19
SDQ_A20
SDQ_A21
SDQ_A22
SDQ_A23
SDQ_A24
SDQ_A25
SDQ_A26
SDQ_A27
SDQ_A28
SDQ_A29
SDQ_A30
SDQ_A31
SDQ_A32
SDQ_A33
SDQ_A34
SDQ_A35
SDQ_A36
SDQ_A37
SDQ_A38
SDQ_A39
SDQ_A40
SDQ_A41
SDQ_A42
SDQ_A43
SDQ_A44
SDQ_A45
SDQ_A46
SDQ_A47
SDQ_A48
SDQ_A49
SDQ_A50
SDQ_A51
SDQ_A52
SDQ_A53
SDQ_A54
SDQ_A55
SDQ_A56
SDQ_A57
SDQ_A58
SDQ_A59
SDQ_A60
SDQ_A61
SDQ_A62
SDQ_A63
MEM_COMPN
MEM_COMPP
MEM_CAP2
MEM_CAP1
MEM_VREF
MEM_MODE
SDQ_A[0..63]
R338 61.9R1%R338 61.9R1%
R300 61.9R1%R300 61.9R1%
C354 C0.47U16YC354 C0.47U16Y
C353 C0.47U16YC353 C0.47U16Y
R339 1KR1%R339 1KR1%
SDQ_A[0..63] 23
VCC_DDR
VCC_DDR
Pull high for DDR2
+1.8V_S0
C601
C601
1u/10V/6
1u/10V/6
R333
R333
100R1%0402
100R1%0402
R330
R330
100R1%0402
100R1%0402
VCC_DDR
C383
C383
C0.1U16X0402
C0.1U16X0402
C378
C378
C0.1U16X0402
C0.1U16X0402
D D
MICRO-START INT'L CO.,LTD.
MICRO-START INT'L CO.,LTD.
Title
Title
Title
MS-7248
MS-7248
MS-7248
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet
1
2
3
4
Date: Sheet
MICRO-START INT'L CO.,LTD.
RC410- DDR I/F:A CHANNEL
RC410- DDR I/F:A CHANNEL
RC410- DDR I/F:A CHANNEL
736Friday, November 18, 2005
736Friday, November 18, 2005
736Friday, November 18, 2005
5
10A
10A
10A
of
of
of
![](/html/9d/9d27/9d275db481486b3a8609577693b30d3f76522e3867ba807e94053a084b0060d1/bg8.png)
1
A A
B B
C C
EXP_A_RXP_026 EXP_A_TXP_0 26
EXP_A_RXN_026
EXP_A_RXP_126
EXP_A_RXN_126
EXP_A_RXP_226
EXP_A_RXN_226
EXP_A_RXP_326
EXP_A_RXN_326
EXP_A_RXP_426
EXP_A_RXN_426
EXP_A_RXP_526
EXP_A_RXN_526
EXP_A_RXP_626
EXP_A_RXN_626
EXP_A_RXP_726
EXP_A_RXN_726
EXP_A_RXP_826
EXP_A_RXN_826
EXP_A_RXP_926
EXP_A_RXN_926
EXP_A_RXP_1026
EXP_A_RXN_1026
EXP_A_RXP_1126
EXP_A_RXN_1126
EXP_A_RXP_1226
EXP_A_RXN_1226
EXP_A_RXP_1326
EXP_A_RXN_1326
EXP_A_RXP_1426
EXP_A_RXN_1426
EXP_A_RXP_1526
EXP_A_RXN_1526
A_RX2P11
A_RX2N11
A_RX3P11
A_RX3N11
HSI_P126
HSI_N126
A_RX0P11
A_RX0N11
A_RX1P11
A_RX1N11
SBLINK_CLKP16
SBLINK_CLKN16
NBSRC_CLKP16
NBSRC_CLKN16
PCI_E x1
AG10
AF10
2
U18B
U18B
PART 2 OF 6
J5
GFX_RX0P
J4
GFX_RX0N
K4
GFX_RX1P
L4
GFX_RX1N
L6
GFX_RX2P
L5
GFX_RX2N
M5
GFX_RX3P
M4
GFX_RX3N
N4
GFX_RX4P
P4
GFX_RX4N
P6
GFX_RX5P
P5
GFX_RX5N
R5
GFX_RX6P
R4
GFX_RX6N
T4
GFX_RX7P
T3
GFX_RX7N
U6
GFX_RX8P
U5
GFX_RX8N
V5
GFX_RX9P
V4
GFX_RX9N
W4
GFX_RX10P
W3
GFX_RX10N
Y6
GFX_RX11P
Y5
GFX_RX11N
AA5
GFX_RX12P
AA4
GFX_RX12N
AB4
GFX_RX13P
AB3
GFX_RX13N
AC6
GFX_RX14P
AC5
GFX_RX14N
AD5
GFX_RX15P
AD4
GFX_RX15N
AF8
GPP_RX0P
AG8
GPP_RX0N
AG6
GPP_RX1P
AG7
GPP_RX1N
AK7
GPP_RX2P
AJ7
GPP_RX2N
AG4
GPP_RX3P
AH4
GPP_RX3N
AG9
SB_RX0P
SB_RX0N
AE9
SB_RX1P
SB_RX1N
K2
SB_CLKP
L2
SB_CLKN
M2
GFX_CLKP
M1
GFX_CLKN
H2
BMREQ#
_ATI-RC410(215RPA4AKA21HK)-A11
_ATI-RC410(215RPA4AKA21HK)-A11
PART 2 OF 6
GFX_TX0P
GFX_TX0N
GFX_TX1P
GFX_TX1N
GFX_TX2P
GFX_TX2N
GFX_TX3P
GFX_TX3N
GFX_TX4P
GFX_TX4N
GFX_TX5P
GFX_TX5N
GFX_TX6P
GFX_TX6N
GFX_TX7P
GFX_TX7N
GFX_TX8P
GFX_TX8N
GFX_TX9P
GFX_TX9N
GFX_TX10P
GFX_TX10N
GFX_TX11P
GFX_TX11N
GFX_TX12P
GFX_TX12N
GFX_TX13P
GFX_TX13N
GFX_TX14P
GFX_TX14N
GFX_TX15P
GFX_TX15N
GPP_TX0P
GPP_TX0N
GPP_TX1P
GPP_TX1N
GPP_TX2P
GPP_TX2N
GPP_TX3P
GPP_TX3N
SB_TX0P
SB_TX0N
SB_TX1P
SB_TX1N
PCE_TXSET
PCE_ISET
PCE_PCAL
PCE_NCAL
3
N1
N2
P2
R2
R1
T1
T2
U2
V2
V1
W1
W2
Y2
AA2
AA1
AB1
AB2
AC2
AD2
AD1
AE1
AE2
AF2
AG2
AG1
AH1
AH2
AJ2
AJ3
AJ4
AK4
AJ5
A_TX2P_C
AJ8
A_TX2N_C
AJ9
A_TX3P_C
AE6
A_TX3N_C
AF6
HSO_P1C
AJ6
HSO_N1C
AK6
AE4
AF4
A_TX0P_C
AJ10
A_TX0N_C
AJ11
A_TX1P_C
AK9
A_TX1N_C
AK10
R306 8.25KR1%R306 8.25KR1%
AK13
R302 10KR0402R302 10KR0402
AJ12
R282 150R1%R282 150R1%
AH12
R291 82.5R1%0402R291 82.5R1%0402
AG12
C325 C0.1U16X0402C325 C0.1U16X0402
C309 C0.1U16X0402C309 C0.1U16X0402
C315 C0.1U16X0402C315 C0.1U16X0402
C318 C0.1U16X0402C318 C0.1U16X0402
C332 C0.1U16X0402C332 C0.1U16X0402
C328 C0.1U16X0402C328 C0.1U16X0402
V_FSB_VTTBMREQ#9,11
4
EXP_A_TXN_0 26
EXP_A_TXP_1 26
EXP_A_TXN_1 26
EXP_A_TXP_2 26
EXP_A_TXN_2 26
EXP_A_TXP_3 26
EXP_A_TXN_3 26
EXP_A_TXP_4 26
EXP_A_TXN_4 26
EXP_A_TXP_5 26
EXP_A_TXN_5 26
EXP_A_TXP_6 26
EXP_A_TXN_6 26
EXP_A_TXP_7 26
EXP_A_TXN_7 26
EXP_A_TXP_8 26
EXP_A_TXN_8 26
EXP_A_TXP_9 26
EXP_A_TXN_9 26
EXP_A_TXP_10 26
EXP_A_TXN_10 26
EXP_A_TXP_11 26
EXP_A_TXN_11 26
EXP_A_TXP_12 26
EXP_A_TXN_12 26
EXP_A_TXP_13 26
EXP_A_TXN_13 26
EXP_A_TXP_14 26
EXP_A_TXN_14 26
EXP_A_TXP_15 26
EXP_A_TXN_15 26
C327 C0.1U16X0402C327 C0.1U16X0402
C312 C0.1U16X0402C312 C0.1U16X0402
HSO_P1 26
HSO_N1 26
C335 C0.1U16X0402C335 C0.1U16X0402
C331 C0.1U16X0402C331 C0.1U16X0402
A_TX2P 11
A_TX2N 11
A_TX3P 11
A_TX3N 11
A_TX0P 11
A_TX0N 11
A_TX1P 11
A_TX1N 11
5
D D
MICRO-START INT'L CO.,LTD.
MICRO-START INT'L CO.,LTD.
Title
Title
Title
MS-7248
MS-7248
MS-7248
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet
Date: Sheet
1
2
3
4
MICRO-START INT'L CO.,LTD.
RC410-PCIE LINK I/F 10A
RC410-PCIE LINK I/F 10A
RC410-PCIE LINK I/F 10A
of
of
of
836Friday, November 18, 2005
836Friday, November 18, 2005
836Friday, November 18, 2005
5
![](/html/9d/9d27/9d275db481486b3a8609577693b30d3f76522e3867ba807e94053a084b0060d1/bg9.png)
AVDD
1
DAC VDD (3.3V)
2
VCC3
VCC3
3
4
5
AVDDDI DIGITAL VDD (1.8V)
AVDDQ
DAC2 BANDGAP REF (1.8V)
PLLVDD PLL VDD (1.8V)
A A
+1.8V_S0
C584
C584
C2.2U6.3Y
C2.2U6.3Y
+1.8V_S0
C564
C564
C2.2U6.3Y
C2.2U6.3Y
AVDD=(1.8V)
PLLVDD=(1.8V)
B B
U12
U12
1
A0
2
A1
3
R219 X_10K/6R219 X_10K/6
VCC3
C C
A2
7
WP
X_AT24C04N-10SI-2.7
X_AT24C04N-10SI-2.7
VCC3
R234
R234
4.7K/6
4.7K/6
5
SDA
6
SCL
8
VCC
4
GND
R218
R218
4.7K/6
4.7K/6
I2C_DATA I2C_DATA
VCC3
C226
C226
X_0.1u/25V/6
X_0.1u/25V/6
+1.8V_S0
C262
C262
C2.2U6.3Y
C2.2U6.3Y
C252
C252
C2.2U6.3Y
C2.2U6.3Y
DDC_DATA26
VSYNC#21
HSYNC#21
R_OUT21
G_OUT21
B_OUT21
NB_OSC16
NB_CLK16
NB_CLK#16
TVCLKIN26
I2C_CLK26
U18D
U18D
G5
G4
C9
C10
D8
C8
B8
B9
H10
H9
DDC_DATA
VSYNC#
HSYNC#
R239 _715R1%-LFR239 _715R1%-LF
R_OUTSTRP_DATA
G_OUTI2C_CLK
B_OUT
NB_OSC
NB_CLK
NB_CLK#
TVCLKIN
TP10TP10 TP12TP12
I2C_CLKI2C_CLK
J2
H3
B3
C3
B10
F10
E10
D10
G1
J1
K1
G2
F1
D2
C1
_ATI-RC410(215RPA4AKA21HK)-A11
_ATI-RC410(215RPA4AKA21HK)-A11
VDDR3_1
VDDR3_2
AVDD
AVSSN
AVDDDI
AVSSDI
AVDDQ
AVSSQ
PLLVDD
PLLVSS
TMDS_HPD
DDC_DATA
DACVSYNC
DACHSYNC
RSET
RED
GREEN
BLUE
OSCIN
CPU_CLKP
CPU_CLKN
TVCLKIN
OSCOUT
I2C_CLK
I2C_DATA
PART 4 OF 6
PART 4 OF 6
CRT
CRT
CLK. GEN.
CLK. GEN.
SVID
SVID
RSV1
RSV2
RSV3
RSV4
RSV5
RSV6
RSV7
RSV8
RSV9
RSV10
RSV11
RSV12
RSV13
RSV14
RSV15
RSV16
LPVDD
LPVSS
LVDDR18A_1
LVDDR18A_2
LVSSR_1
LVSSR_2
LVSSR_3
LVDDR18D
GPIO3
GPIO2
GPIO4
RSV26
RSV27
RSV28
RSV29
COMP
DACSCL
DACSDA
STRP_DATA
B4
A4
B5
C6
B6
A6
B7
A7
E5
F5
D5
C5
E6
D6
E7
E8
J8
J7
H8
H7
G9
G8
G7
C7
E2
G3
F2
F8
F7
F6
G6
D9
C
F9
Y
E9
DAC_SCL
B2
DAC_SDAT
C2
STRP_DATA
D1
+1.8V_S0
DAC_SCL 21
DAC_SDAT 21
RS410 STRAPS
BMREQ#8,11
HSYNC#21
VSYNC#21
SB_PWRGD#31
D D
1
R190 1KR0402R190 1KR0402
2
R242 4.7KR0402R242 4.7KR0402
R232 4.7KR0402R232 4.7KR0402
R235 4.7KR0402R235 4.7KR0402
DAC_SCL
STRP_DATA
R217 X_4.7KR0402R217 X_4.7KR0402
Q24
Q24
N-MMBT3904_NL_SOT23
N-MMBT3904_NL_SOT23
R216 4.7KR0402R216 4.7KR0402
H_FSBSEL2_C 5,16
H_FSBSEL1_C 5,16
H_FSBSEL0_C 5,16
VCC3
VCC3
BMREQ#&HSYNC&VSYNC: FSB CLK SPEED
DEFAULT: 010 (200MHz)
OTHER COMBINATIONS ARE RESERVED
DAC_SCL: CPU VCC
DEFAULT:1
1: RESERVED
0: REQUIRE SETTING
STRP_DATA:Debug strap
DEFAULT: 1
1: E2PROM STRAPING
0: MEMORY CHANNEL STRAPING
3
MICRO-START INT'L CO.,LTD.
MICRO-START INT'L CO.,LTD.
Title
Title
Title
MS-7248
MS-7248
MS-7248
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A3
A3
A3
Date: Sheet of
Date: Sheet of
4
Date: Sheet
MICRO-START INT'L CO.,LTD.
RC410 VIDEO I/F & STRAPS 10A
RC410 VIDEO I/F & STRAPS 10A
RC410 VIDEO I/F & STRAPS 10A
5
of
936Friday, November 18, 2005
936Friday, November 18, 2005
936Friday, November 18, 2005
![](/html/9d/9d27/9d275db481486b3a8609577693b30d3f76522e3867ba807e94053a084b0060d1/bga.png)
5
4
3
2
VCC_DDR
1
Y24
AC21
AD21
AC13
AD23
AC16
AD19
AD22
V23
AD13
AD16
AC19
AB24
AK24
T24
AK28
AB23
Y23
AK21
T23
V24
AC22
H11
H13
G20
L23
L24
P23
N23
H17
G17
H14
F17
G14
A10
H16
H23
H12
F12
G12
F11
P24
H19
G11
H24
G16
G13
AC8
K6
M8
T8
T7
M7
W8
W7
AD9
C591
C591
1u/10V/6
1u/10V/6
VCC_DDR
V_FSB_VTT
V_FSB_VTT
C361
C361
1u/10V/6
1u/10V/6
C10U6.3X50805
C10U6.3X50805
V_FSB_VTT
C217
C217
C10U6.3X50805
C10U6.3X50805
C381
C381
1u/10V/6
1u/10V/6
C597
C597
C363
C363
1u/10V/6
1u/10V/6
C600
C600
1u/10V/6
1u/10V/6
C594
C594
1u/10V/6
1u/10V/6
C570
C570
C2.2U6.3Y
C2.2U6.3Y
C589
C589
1u/10V/6
1u/10V/6
C577
C577
C2.2U6.3Y
C2.2U6.3Y
C571
C571
1u/10V/6
1u/10V/6
C598
C598
1u/10V/6
1u/10V/6
C368
C368
1u/10V/6
1u/10V/6
C590
C590
C2.2U6.3Y
C2.2U6.3Y
C599
C599
1u/10V/6
1u/10V/6
C380
C380
1u/10V/6
1u/10V/6
C270
C270
1u/10V/6
1u/10V/6
C596
C596
1u/10V/6
1u/10V/6
C386
C386
1u/10V/6
1u/10V/6
C244
C244
1u/10V/6
1u/10V/6
V_FSB_VTT
D D
U18F
U18F
W5
VSSA#U5
W6
VSSA#U6
AB5
VSSA#Y5
AB6
VSSA#Y6
V8
VSSA#P8
V7
VSSA#P7
AA8
VSSA#U8
AA7
VSSA#U7
AD7
VSSA#Y7
AD8
VSSA#Y8
R8
VSSA#L8
N8
VSSA#K7
R7
VSSA#AD7
N7
VSSA#A2
AF7
VSSA#AF5
AE8
VSSA#AC6
AG5
VSSA#AC5
T6
VSSA#P6
T5
VSSA#P5
N6
VSSA#L6
N5
VSSA#L5
AH5
VSSA#H6
K5
VSSA#H5
AH3
C C
B B
VSSA#P4
AH8
VSSA#AE3
AH7
VSSA#AD3
AH6
VSSA#AC3
AD3
VSSA#AA3
AC3
VSSA#Y3
AA3
VSSA#V3
Y3
VSSA#U3
V3
VSSA#R3
U3
VSSA#P3
R3
VSSA#M3
P3
VSSA#L3
M3
VSSA#J3
L3
VSSA#H3
AF5
VSSA#F3
AF3
VSSA#N3
AF9
VSSA#AG3
AH9
VSSA#AE9
AH10
VSSA#AH7
AC20
VSS#A15
J23
VSS#A24
A29
VSS#A29
W30
VSS#AA23
W23
VSS#AA24
AA28
VSS#AA30
AJ30
VSS#AB27
AC12
VSS#AC12
AC15
VSS#AC16
K8
VSS#AC8
AD12
VSS#AD12
AD15
VSS#AD16
AD18
VSS#AD19
AC17
VSS#AD23
AE30
VSS#AD30
AD14
VSS#AD8
AC11
VSS#AD9
AF12
VSS#AE12
AF27
VSS#AE27
AC18
VSS#AC19
AG14
VSS#AG12
F4
VSS#AF7
AG18
VSS#AG18
AG21
VSS#AG21
AK25
VSS#AG9
V27
VSS#AH28
AJ1
VSS#AJ1
AD20
VSS#AK10
AK12
VSS#AK13
AK15
VSS#AK16
AK18
VSS#AK19
AK2
VSS#AK2
AH11
VSS#AH11
J3
VSS#AJ11
AC27
VSS#AK25
_ATI-RC410(215RPA4AKA21HK)-A11
_ATI-RC410(215RPA4AKA21HK)-A11
PART 6 OF 6
PART 6 OF 6
GND
GND
VSS#M15
VSS#G14
VSS#G18
VSS#G27
VSS#G3
VSS#H13
VSS#H14
VSS#H18
VSS#H23
VSS#H4
VSS#J23
VSS#J24
VSS#J30
VSS#K27
VSS#V30
VSS#U19
VSS#M16
VSS#AD11
VSS#M30
VSS#N15
VSS#N16
VSS#N23
VSS#N27
VSS#G5
VSS#P15
VSS#P16
VSS#P23
VSS#P24
VSS#R12
VSS#R13
VSS#R14
VSS#R15
VSS#R16
VSS#R17
VSS#R18
VSS#R19
VSS#R23
VSS#R24
VSS#R30
VSS#T12
VSS#T13
VSS#T14
VSS#T15
VSS#T16
VSS#T17
VSS#T18
VSS#T19
VSS#T27
VSS#U15
VSS#U16
VSS#V15
VSS#V16
VSS#W16
VSS#W27
VSS#V12
VSS#W13
VSS#V14
VSS#W15
VSS#Y23
VSS#Y24
VSS#C19
VSS#C17
VSS#AH26
VSS#AH25
VSS#AG25
VSS#F30
VSS#F25
VSS#D27
VSS#D25
VSS#D23
VSS#D20
VSS#D17
VSS#C3
VSS#C28
VSS#B30
VSS#B1
VSS#AK29
VSS#AK22
M14
AC14
AG16
A22
A2
D27
AG26
H18
A16
A9
AD17
J24
R27
D24
T30
U19
M16
AD11
H15
N15
N19
D3
A25
F3
R15
P16
G10
M24
M12
R13
P12
P14
U13
R17
V18
R19
R23
R24
J30
T12
N13
T14
P18
T16
U17
T18
W19
J27
U15
N17
M18
V16
W17
M26
V12
W13
V14
W15
U23
U24
A13
V28
AG24
AA24
AA23
F30
K23
D20
A19
D17
D14
F27
D4
M23
B30
B1
AK29
AK22
V_FSB_VTT
V_FSB_VTT
C583
C583
1u/10V/6
1u/10V/6
+1.8V_S0
C259
C259
C10U6.3X50805
C10U6.3X50805
C574
C574
C10U6.3X50805
C10U6.3X50805
C569
C569
1u/10V/6
1u/10V/6
C240
C240
C10U6.3X50805
C10U6.3X50805
C350
C350
C10U6.3X50805
C10U6.3X50805
C592
C592
1u/10V/6
1u/10V/6
C573
C573
1u/10V/6
1u/10V/6
BOTTOM SIDE
C239
C239
1u/10V/6
1u/10V/6
C351
C351
1u/10V/6
1u/10V/6
C565
C565
1u/10V/6
1u/10V/6
C338
C338
1u/10V/6
1u/10V/6
C595
C595
1u/10V/6
1u/10V/6
C593
C593
1u/10V/6
1u/10V/6
C225
C225
1u/10V/6
1u/10V/6
C587
C587
1u/10V/6
1u/10V/6
C567
C567
1u/10V/6
1u/10V/6
C582
C582
1u/10V/6
1u/10V/6
C204
C204
1u/10V/6
1u/10V/6
C561
C561
1u/10V/6
1u/10V/6
+1.8V_S0
+1.8V_S0
V_FSB_VTT
C578
C578
C2.2U6.3Y
C2.2U6.3Y
U18E
U18E
U16
VDD_CORE#M12
M13
VDD_CORE#M13
M15
VDD_CORE#M14
M17
VDD_CORE#M17
R16
VDD_CORE#M18
V15
VDD_CORE#M19
N12
VDD_CORE#N12
T15
VDD_CORE#N13
N14
VDD_CORE#N14
N16
VDD_CORE#N17
N18
VDD_CORE#N18
M19
VDD_CORE#N19
R12
VDD_CORE#P12
P13
VDD_CORE#P13
P15
VDD_CORE#P14
P17
VDD_CORE#P17
P19
VDD_CORE#P19
U12
VDD_CORE#U12
T13
VDD_CORE#U13
U14
VDD_CORE#U14
T17
VDD_CORE#U17
U18
VDD_CORE#U18
T19
VDD_CORE#U19
V13
VDD_CORE#V13
R14
VDD_CORE#V14
V17
VDD_CORE#V17
R18
VDD_CORE#V18
V19
VDD_CORE#V19
W12
VDD_CORE#W12
W14
VDD_CORE#W14
W16
VDD_CORE#W17
W18
VDD_CORE#W18
J9
VDD_18
AB22
VDD_18#AF26
AB9
VDD_18#AF9
J22
VDD_18#J26
Y8
VDDA_18#U8
U8
VDDA_18#AD8
AB8
VDDA_18#W6
Y7
VDDA_18#AA8
U7
VDDA_18#AA7
AE11
VDDA_18#AE7
AC9
VDDA_18#AD7
AD10
VDDA_18#AC8
AC10
VDDA_18#AC7
AG11
VDDA_18#AG6
AF11
VDDA_18#AF6
H5
VDDA_12#K6
H4
VDDA_12#K4
P8
VDDA_12#F6
P7
VDDA_12#F5
L7
VDDA_12#B3
L8
VDDA_12#A3
J6
VDDA_12#B4
AC7
VDDA_12#M8
AB7
VDDA_12#W5
_ATI-RC410(215RPA4AKA21HK)-A11
_ATI-RC410(215RPA4AKA21HK)-A11
PART 5 OF 6
PART 5 OF 6
CORE POWER
CORE POWER
PCIE IF
PCIE IF
PCIE POWER
PCIE POWER
+1.8V_S0
MEM POWER
MEM POWER
CPU IF POWER
CPU IF POWER
VDD_MEM#AB30
VDD_MEM#AJ21
VDD_MEM#AK21
VDD_MEM#AC13
VDD_MEM#AC14
VDD_MEM#AC15
VDD_MEM#AC18
VDD_MEM#AC21
VDD_MEM#AD10
VDD_MEM#AD13
VDD_MEM#AD15
VDD_MEM#AD18
VDD_MEM#AD21
VDD_MEM#AE15
VDD_MEM#AE18
VDD_MEM#AE21
VDD_MEM#AG27
VDD_MEM#AJ30
VDD_MEM#AK18
VDD_MEM#AK24
VDD_MEM#AK9
VDD_MEM#W23
VDD_CPU#H17
VDD_CPU#H19
VDD_CPU#K23
VDD_CPU#L23
VDD_CPU#L24
VDD_CPU#M23
VDD_CPU#M24
VDD_CPU#T23
VDD_CPU#U23
VDD_CPU#U24
VDD_CPU#V23
VDD_CPU#V24
VDD_CPU#G16
VDD_CPU#G15
VDD_CPU#F22
VDD_CPU#F19
VDD_CPU#F16
VDD_CPU#F15
VDD_CPU#E15
VDD_CPU#A16
VDD_CPU#H16
VDD_CPU#H15
VDD_CPU#G22
VDD_CPU#G21
VDD_CPU#G19
VDDA_12#N8
VDDA_12#C3
VDDA_12#R7
VDDA_12#R8
VDDA_12#U7
VDDA_12#B2
VDDA_12#K8
VDDA_12#L7
VDDA_12#L8
C366
C366
CD470U10EL11.5
CD470U10EL11.5
A A
MSI
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
5
4
3
2
Date: Sheet
MICRO-STAR INt'L CO., LTD.
MICRO-STAR INt'L CO., LTD.
MICRO-STAR INt'L CO., LTD.
MS-7248
MS-7248
MS-7248
RC410- POWER
RC410- POWER
RC410- POWER
10 36Friday, November 18, 2005
10 36Friday, November 18, 2005
10 36Friday, November 18, 2005
1
10A
10A
10A
of
of
of
![](/html/9d/9d27/9d275db481486b3a8609577693b30d3f76522e3867ba807e94053a084b0060d1/bgb.png)
1
C579
C579
1u/10V/6
1u/10V/6
C229
C229
18p/50V/6
18p/50V/6
C348
C348
0.1u/25V/6
0.1u/25V/6
32K_X1
32K_X2
BOTTOM SIDE
C586
C586
0.1u/25V/6
0.1u/25V/6
+1.8V_S0
C580
C580
X_0.1u/25V/6
X_0.1u/25V/6
C575
C575
X_0.1u/25V/6
X_0.1u/25V/6
ICH_H_SMI#3
H_SLP#3
H_STPCLK#3
Y3
Y3
21
32.768KHZ12.5P_D
A A
B B
C C
+1.8V_S0
+1.8V_S0
R233
R233
20MR
20MR
WIDE TRACE TO SHORT
R223 20MRR223 20MR
C238
C238
18p/50V/6
18p/50V/6
X_C10U10Y1206
X_C10U10Y1206
C365
C365
C10U10Y1206
C10U10Y1206
32.768KHZ12.5P_D
3 4
C362
C362
C560
C560
X_1u/10V/6
X_1u/10V/6
C375
C375
1u/10V/6
1u/10V/6
C558
C558
CPU_STP#16
H_PWRGD3,4
H_IGNNE#3
H_A20M#3
H_FERR#3,4
A_RST#27
SBSRCCLK16
SBSRCCLK#16
A_RX0P8
A_RX0N8
A_RX1P8
A_RX1N8
A_RX2P8
A_RX2N8
A_RX3P8
A_RX3N8
A_TX2P8
A_TX2N8
A_TX3P8
A_TX3N8
X_0.1u/25V/6
X_0.1u/25V/6
H_INTR3
H_NMI3
H_INIT#3,17
BMREQ#8,9
A_TX0P8
A_TX0N8
A_TX1P8
A_TX1N8
PIRQ#A29
PIRQ#B29
PIRQ#C29
PIRQ#D29
PIRQ#E29
PIRQ#F29
PIRQ#G18,29
PIRQ#H19,29
2
+1.8V_S0
A_RST#
C341 0.01u/50V/6C341 0.01u/50V/6
C340 0.01u/50V/6C340 0.01u/50V/6
C343 0.01u/50V/6C343 0.01u/50V/6
C342 0.01u/50V/6C342 0.01u/50V/6
C345 0.01u/50V/6C345 0.01u/50V/6
C344 0.01u/50V/6C344 0.01u/50V/6
C347 0.01u/50V/6C347 0.01u/50V/6
C346 0.01u/50V/6C346 0.01u/50V/6
R294 150R1%R294 150R1%
150R1%
150R1%
R293
R293
R295 4.12KR1%R295 4.12KR1%
+1.8V_S0
PIRQ#A
PIRQ#B
PIRQ#C
PIRQ#D
PIRQ#E
PIRQ#F
PIRQ#G
PIRQ#H
32K_X1
32K_X2
R273 10KR0402R273 10KR0402
TP16TP16
R252
R252
10KR0402
10KR0402
A_RX0P_C
A_RX0N_C
A_RX1P_C
A_RX1N_C
A_RX2P_C
A_RX2N_C
A_RX3P_C
A_RX3N_C
LENGTH OF (PCI_CLK9_R + PCI_CLK9_FB) SHOULD
MATCH THE AVERAGE OF THE OTHER SPCI_CLKS
U14A
U14A
AH8
A_RST#
L27
PCIE_RCLKP
M27
PCIE_RCLKN
M30
PCIE_TX0P
N30
PCIE_TX0N
K30
PCIE_TX1P
L30
PCIE_TX1N
H30
PCIE_TX2P
J30
PCIE_TX2N
F30
PCIE_TX3P
G30
PCIE_TX3N
M29
PCIE_RX0P
N29
PCIE_RX0N
M28
PCIE_RX1P
N28
PCIE_RX1N
J29
PCIE_RX2P
K29
PCIE_RX2N
J28
PCIE_RX3P
K28
PCIE_RX3N
G27
PCIE_CALRP
H27
PCIE_CALRN
G28
PCIE_CALI
R30
PCIE_PVDD
F26
PCIE_VDDR_1
R29
PCIE_VDDR_2
G26
PCIE_VDDR_3
P26
PCIE_VDDR_4
K26
PCIE_VDDR_5
L26
PCIE_VDDR_6
P28
PCIE_VDDR_7
N26
PCIE_VDDR_8
P27
PCIE_VDDR_9
H28
PCIE_VSS_1
F29
PCIE_VSS_2
H29
PCIE_VSS_3
H26
PCIE_VSS_4
F27
PCIE_VSS_5
G29
PCIE_VSS_6
L29
PCIE_VSS_7
J26
PCIE_VSS_8
L28
PCIE_VSS_9
J27
PCIE_VSS_10
N27
PCIE_VSS_11
M26
PCIE_VSS_12
K27
PCIE_VSS_13
P29
PCIE_VSS_14
P30
PCIE_VSS_15
AJ8
CPU_STP#/DPSLP#
AK7
PCI_STP#
AG5
INTA#
AH5
INTB#
AJ5
INTC#
AH6
INTD#
AJ6
INTE#/GPIO33
AK6
INTF#/GPIO34
AG7
INTG#/GPIO35
AH7
INTH#/GPIO36
B2
X1
B1
X2
C29
CPU_PG
A28
INTR/LINT0
C28
NMI/LINT1
B29
INIT#
D29
SMI#
E4
SLP#/LDT_STP#
B30
IGNNE#
F28
A20M#
E28
FERR#
E29
STPCLK#/ALLOW_LDTSTP
D25
LDT_PG/SSMUXSEL/GPIO0
E27
DPRSLPVR
D27
BMREQ#
D28
LDT_RST#
ATI-SB450(218S4PASA12KS)-A12
ATI-SB450(218S4PASA12KS)-A12
SB400/450 SB
SB400/450 SB
PCI EXPRESS INTERFACE
PCI EXPRESS INTERFACE
XTAL
XTAL
3
PCICLK0
Part 1 of 4
Part 1 of 4
PCI INTERFACE
PCI INTERFACE
REQ4#/PLL_BP33/PDMA_REQ1#
GNT3#/PLL_BP66/PDMA_GNT0#
GNT4#/PLL_BP50/PDMA_GNT1#
CPU
CPU
RTC_IRQ#/ACPWR_STRAP
RTC
RTC
PCICLK1
PCICLK2
PCICLK3
PCICLK4
PCICLK5
PCICLK6
PCICLK7
PCICLK8
PCI CLKS
PCI CLKS
PCICLK9
PCICLK_FB
PCIRST#
AD0/ROMA18
AD1/ROMA17
AD2/ROMA16
AD3/ROMA15
AD4/ROMA14
AD5/ROMA13
AD6/ROMA12
AD7/ROMA11
AD8/ROMA9
AD9/ROMA8
AD10/ROMA7
AD11/ROMA6
AD12/ROMA5
AD13/ROMA4
AD14/ROMA3
AD15/ROMA2
AD16/ROMD0
AD17/ROMD1
AD18/ROMD2
AD19/ROMD3
AD20/ROMD4
AD21/ROMD5
AD22/ROMD6
AD23/ROMD7
CBE0#/ROMA10
CBE1#/ROMA1
CBE2#/ROMWE#
FRAME#
DEVSEL#/ROMA0
TRDY#/ROMOE#
PAR/ROMA19
REQ3#/PDMA_REQ0#
REQ5#/GPIO13
REQ6#/GPIO31
GNT5#/GPIO14
GNT6#/GPIO32
CLKRUN#
LFRAME#
LDRQ0#
LPC
LPC
LDRQ1#
SERIRQ
RTCCLK
RTC_GND
AD24
AD25
AD26
AD27
AD28
AD29
AD30
AD31
CBE3#
IRDY#
STOP#
PERR#
SERR#
REQ0#
REQ1#
REQ2#
GNT0#
GNT1#
GNT2#
LOCK#
LAD0
LAD1
LAD2
LAD3
VBAT
L4
L3
L2
L1
M4
M3
M2
M1
N4
N3
N2
AJ7
W3
Y2
W4
Y3
V1
Y4
V2
W2
AA4
V4
AA3
U1
AA2
U2
AA1
U3
T4
AC1
R2
AD4
R3
AD3
R4
AD2
P2
AE3
P3
AE2
P4
AF2
N1
AF1
V3
AB4
AC2
AE4
T3
AC4
AC3
T2
U4
T1
AB2
AB3
AF4
AF3
AG2
AG3
AH1
AH2
AH3
AJ2
AK2
AJ3
AK3
AG4
AH4
AJ4
AG1
AB1
AG25
AH25
AJ25
AH24
AG24
AH26
AG26
AK27
C2
F3
A2
A1
PCI_CLK0_R
PCI_CLK1_R
PCI_CLK2_R
PCI_CLK3_R
PCI_CLK4_R
PCI_CLK5_R
PCI_CLK6_R
PCI_CLK7_R
PCI_CLK8_R
PCI_CLK9_R
PCI_CLK9_FB
PCIRST#
LPC_DRQ#0
LDRQ#1_SB
SERIRQ
R225 22/4R225 22/4
R226 22/4R226 22/4
AD0
AD1
AD2
AD3
AD4
AD5
AD6
AD7
AD8
AD9
AD10
AD11
AD12
AD13
AD14
AD15
AD16
AD17
AD18
AD19
AD20
AD21
AD22
AD23
AD24
AD25
AD26
AD27
AD28
AD29
AD30
AD31
C_BE#0
C_BE#1
C_BE#2
C_BE#3
PCI_CLKRUN#
LPC_AD0
LPC_AD1
LPC_AD2
LPC_AD3
C246
C246
C0.1U16X0402
C0.1U16X0402
PCI_CLK3_R
PCI_CLK2_R
PCI_CLK1_R
PCI_CLK0_R
PCI_CLK4_R
PCI_CLK7_R
PCI_CLK6_R
PCI_CLK5_R
PCI_FRAME#
LPC_FRAME#
SERIRQ 30
RTC_CLK 15
AUTO_ON# 15
20mil
C245
C245
1u/10V/6
1u/10V/6
4
RN25
RN25
8P4R-22R0402
8P4R-22R0402
1 2
3 4
5 6
7 8
RN23
RN23
1 2
3 4
8P4R-22R0402
8P4R-22R0402
5 6
7 8
PCI_CLK8 15
X_C100P50N0402C236 X_C100P50N0402C236
AD[31..0] 18,19,29
PCIRST#
R249
R249
10KR0402
10KR0402
C_BE#[3..0] 18,19,29
FRAME# 18,19,29
DEVSEL# 18,19,29
IRDY# 18,19,29
TRDY# 18,19,29
PAR 18,19,29
STOP# 18,19,29
PERR# 18,19,29
SERR# 18,29
PREQ#0 29
PREQ#1 29
PREQ#2 18,29
PREQ#3 29
PREQ#4 19,29
PREQ#5 15,29
PREQ#6 29
PGNT#0 29
PGNT#1 29
PGNT#2 18,29
PGNT#3 29
PGNT#4 19,29
PGNT#5 15,29
PGNT#6 29
LOCK# 29
LPC_AD0 17,30
LPC_AD1 17,30
LPC_AD2 17,30
LPC_AD3 17,30
LPC_FRAME# 17,30
LPC_DRQ#0 30
VBAT_SB
PCI_CLK3 15,18
PCI_CLK2 15,19
PCI_CLK1 29
PCI_CLK0 29
PCI_CLK4 15,17
PCI_CLK7 15
PCI_CLK6 15
PCI_CLK5 15,30
PCIRST# 18
C282
C282
X_C100P100N
X_C100P100N
R68
R68
1KR0402
1KR0402
PCI_CLK1
PCI_CLK2
PCI_CLK3
PCI_CLK0
135
246
LPC_FRAME#
SERIRQ
LDRQ#1_SB
LPC_DRQ#0
PIRQ#E
PIRQ#F
PIRQ#G
PIRQ#H
LPC_AD0
LPC_AD1
LPC_AD2
LPC_AD3
PCI_CLKRUN#
VBAT
N31-1030151-H06+N33-1020271-H06
N31-1030151-H06+N33-1020271-H06
PCI_CLK6
PCI_CLK4
7
8
PCI_CLK7
135
CN2
CN2
8P4C-10P50N
8P4C-10P50N
246
R271 8.2KR0402R271 8.2KR0402
RN35 8P4R-10KRRN35 8P4R-10KR
RN28 8P4R-8.2KRRN28 8P4R-8.2KR
RN33 8P4R-100KRRN33 8P4R-100KR
1 2
3 4
5 6
7 8
R231 8.2KR0402R231 8.2KR0402
BAT2
BAT2
BAT-BCR2032P-RH
BAT-BCR2032P-RH
20mil
Normal --> 1-2
1
2
Clear CMOS
3
JCMOS
JCMOS
-->2-3
PCI_CLK5
7
CN1
CN1
8
5
8P4C-10P50N
8P4C-10P50N
78
56
34
12
12
34
56
78
PCI_CLK8
C224
C224
X_C10P50N
X_C10P50N
VCC3
D D
Note: Overlap common pads where
possible for dual-op resistors.
1
2
3
C242C242
1 2
MICRO-START INT'L CO.,LTD.
MICRO-START INT'L CO.,LTD.
Title
Title
Title
MS-7248
MS-7248
MS-7248
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet
4
Date: Sheet
MICRO-START INT'L CO.,LTD.
SB450- PCI/CPU/LPC/RTC 10A
SB450- PCI/CPU/LPC/RTC 10A
SB450- PCI/CPU/LPC/RTC 10A
5
of
of
of
11 36Friday, November 18, 2005
11 36Friday, November 18, 2005
11 36Friday, November 18, 2005