5
4
3
2
1
MSI
MS-7227 Ver:0A
D D
C C
B B
CPU:
AMD M2 Athlon 64/Athlon 64 FX
System Chipset:
ATI RS485 / RS690
ATI SB450 / SB600
On Board Chipset:
LPC Super I/O -- SMSC 47M997
LAN -- RTL8100C
HD Codec --ALC883
BIOS --LPC FLASH ROM 4M
Main Memory:
DDR * 4 (Max 4GB)
Expansion Slots:
PCI-E X 1 *1
PCI-E X 16 *1
PCI 2.2 Slot X 2
PCI Extender
PWM:
Controller--Intersil ISL6566CR 3 Phase
Clock Generator:
Controller--ICS 951412GLFT
Title Page
Cover Sheet 1
Block Diagram
AMD M2 940
System Memory
DDR Terminations
2
3,4,5
6,7
8
ATI RS485 9-12
CLOCK GENERATOR ICS951412GLFT 13
ATI SB460 14-18
PCI Slot 1,2 & PCI-EXTENDER
PCI-Express X 16 & PCI Extender
SIO-LPC47M997 / BIOS
LAN - RTL8100C
HD Audio - ALC883
1394 Controller-VT6307
USB connectors
PWM - ISL6566CR
MS-6 ACPI Controller & MS-6+
IDE & SATA & FDD & FAN
ATX Connector / Front Panel
TV-OUT & VGA Connector
MANUAL PARTS
GPIO SPEC
POWER OK MAP
POWER MAP
RESET MAP
History
19
20
21
22
23
24
25
26
27-28
29
30
31
32
33
34
35
36
37
A A
Micro Star Restricted Secret
Micro Star Restricted Secret
Micro Star Restricted Secret
Title
Title
Title
Document Number
Document Number
Document Number
MICRO-STAR INT'L CO.,LTD.
MICRO-STAR INT'L CO.,LTD.
MICRO-STAR INT'L CO.,LTD.
No. 69, Li-De St, Jung-He City,
No. 69, Li-De St, Jung-He City,
No. 69, Li-De St, Jung-He City,
Taipei Hsien, Taiwan
Taipei Hsien, Taiwan
Taipei Hsien, Taiwan
http://www.msi.com.tw
http://www.msi.com.tw
5
4
3
2
http://www.msi.com.tw
Cover Sheet
Cover Sheet
Cover Sheet
1
MS-7227H1
MS-7227H1
MS-7227H1
Last Revision Date:
Last Revision Date:
Last Revision Date:
Tuesday, October 04, 2005
Tuesday, October 04, 2005
Tuesday, October 04, 2005
Sheet
Sheet
Sheet
Rev
Rev
Rev
0A
0A
0A
13 8
13 8
13 8
of
of
of
5
4
3
2
1
BLOCK DIAGRAM
D D
POWER
SUPPLY
CONNECTOR
VREG
SOCKET 940
K9
DDR SDRAM CONN 0
128-BIT 400/533MHZ
HT 16X16 1GHZ
VGA CONN
PEX X16
C C
ATA 133
PRIMARY IDE
PEX X1
PCI EXPRESS
PCI EXPRESS
ATI
RS485/690
465 BGA
HT 8X8 1GHZ
ATI
SB460/600
S-VIDEO & COMPOSITE
PCI 33MHZ
AZAILIA/AC97
Realtek ALC 883 (HD, 7.1Channel)
DDR SDRAM CONN 2
DDR SDRAM CONN 1
DDR SDRAM CONN3
LAN-RTL8100C
IEEE1394-VT6307
564 BGA
PCI SLOT 1
X4 - SATA CONN
B B
FLOPPY CONN
PS2/KBRD CONN
PARALLEL CONN
INTEGRATED SATA 1/2
SIO
LPC SUPER I/O
47M997
LPC BUS 33MHZ
LPC HDR
4MB FLASH
X8 USB2.0 (SB460)
X10 USB2.0 (SB600)
BACK PANEL CONN
USB2 PORTS 0-1
DOUBLE STACK
USB2 PORTS 2-3
X2/GBIT LAN
FRONT PANEL HDR
USB2 PORTS 4-5
USB2 PORTS 6-7
PCI SLOT 2
PCI Extender
USB2 PORTS 8-9
A A
5
4
3
ONLY FOR SB600
2
Micro Star Restricted Secret
Micro Star Restricted Secret
Micro Star Restricted Secret
Title
Title
Title
Document Number
Document Number
Document Number
MICRO-STAR INT'L CO.,LTD.
MICRO-STAR INT'L CO.,LTD.
MICRO-STAR INT'L CO.,LTD.
No. 69, Li-De St, Jung-He City,
No. 69, Li-De St, Jung-He City,
No. 69, Li-De St, Jung-He City,
Taipei Hsien, Taiwan
Taipei Hsien, Taiwan
Taipei Hsien, Taiwan
http://www.msi.com.tw
http://www.msi.com.tw
http://www.msi.com.tw
Block Diagram
Block Diagram
Block Diagram
MS-7227H1
MS-7227H1
MS-7227H1
Last Revision Date:
Last Revision Date:
Last Revision Date:
Sheet
Sheet
Sheet
1
Rev
Rev
Rev
Tuesday, October 04, 2005
Tuesday, October 04, 2005
Tuesday, October 04, 2005
38
38
38
2
2
2
of
of
of
0A
0A
0A
5
4
3
2
1
VID(5)
VID(4)
VID(3)
VID(2)
VID(1)
VID(0)
THERMTRIP_L
PROCHOT_L
TDO
DBRDY
VDDIO_FB_H
VDDIO_FB_L
PSI_L
HTREF1
HTREF0
TEST29_H
TEST29_L
TEST24
TEST23
TEST22
TEST21
TEST20
TEST28_H
TEST28_L
TEST27
TEST26
TEST10
TEST8
VCC_DDR
D2
D1
C1
E3
E2
E1
AK7
AL7
AK10
B6
AK11
AL11
F1
V8
V7
C11
D11
AK8
AH8
AJ9
AL8
AJ8
J10
H9
AK9
AK5
G7
D4
RN3
RN3
1
3
5
7
8P4R-330R
8P4R-330R
VID4
VID3
VID2
VID1
VID0
CPU_THRIP#
CPU_TDO
CPU_DBRDY
CPU_PSI_L
R103 300R R103 300R
LDT_RST#
2
CPU_PWRGD
4
LDT_STOP#
6
CPU_THRIP#
8
TP15TP15
CPU_THRIP# 27
CPU_VDDIOFB_H
CPU_VDDIOFB_L
VCC_DDR
VCC_DDR
TP17TP17
TP25TP25
TP23TP23
TP24TP24
TP21TP21
R20
R20
300R
300R
TP26TP26
TP27TP27
R95
R95
300R
300R
TP11TP11
TP12TP12
C168
C168
224P
224P
R63
R63
80.6R1%
80.6R1%
C169
C169
102P
102P
VID[0..4] 26
VCC_DDR
R99
R99
R100
R100
44.2RST
44.2RST
44.2RST
44.2RST
VCC1_2HT
R94
R94
300R
300R
C178
C178
224P
224P
HT_CADIN_H[15..0]
HT_CADIN_L[15..0]
HT_CADOUT_H[15..0]
HT_CADOUT_L[15..0]
VCC1_2HT
C181
C181
C196
C196
224P
224P
224P
224P
C173
C173
475P/1206
475P/1206
N6
L0_CLKIN_H(1)
P6
L0_CLKIN_L(1)
N3
L0_CLKIN_H(0)
N2
L0_CLKIN_L(0)
V4
L0_CTLIN_H(1)
V5
L0_CTLIN_L(1)
U1
L0_CTLIN_H(0)
V1
L0_CTLIN_L(0)
U6
L0_CADIN_H(15)
V6
L0_CADIN_L(15)
T4
L0_CADIN_H(14)
T5
L0_CADIN_L(14)
R6
L0_CADIN_H(13)
T6
L0_CADIN_L(13)
P4
L0_CADIN_H(12)
P5
L0_CADIN_L(12)
M4
L0_CADIN_H(11)
M5
L0_CADIN_L(11)
L6
L0_CADIN_H(10)
M6
L0_CADIN_L(10)
K4
L0_CADIN_H(9)
K5
L0_CADIN_L(9)
J6
L0_CADIN_H(8)
K6
L0_CADIN_L(8)
U3
L0_CADIN_H(7)
U2
L0_CADIN_L(7)
R1
L0_CADIN_H(6)
T1
L0_CADIN_L(6)
R3
L0_CADIN_H(5)
R2
L0_CADIN_L(5)
N1
L0_CADIN_H(4)
P1
L0_CADIN_L(4)
L1
L0_CADIN_H(3)
M1
L0_CADIN_L(3)
L3
L0_CADIN_H(2)
L2
L0_CADIN_L(2)
J1
L0_CADIN_H(1)
K1
L0_CADIN_L(1)
J3
L0_CADIN_H(0)
J2
L0_CADIN_L(0)
VCC1_2HT VDDA25
CPU1A
CPU1A
HYPERTRANSPORT
HYPERTRANSPORT
L0_CLKOUT_H(1)
L0_CLKOUT_L(1)
L0_CLKOUT_H(0)
L0_CLKOUT_L(0)
L0_CTLOUT_H(1)
L0_CTLOUT_L(1)
L0_CTLOUT_H(0)
L0_CTLOUT_L(0)
L0_CADOUT_H(15)
L0_CADOUT_L(15)
L0_CADOUT_H(14)
L0_CADOUT_L(14)
L0_CADOUT_H(13)
L0_CADOUT_L(13)
L0_CADOUT_H(12)
L0_CADOUT_L(12)
L0_CADOUT_H(11)
L0_CADOUT_L(11)
L0_CADOUT_H(10)
L0_CADOUT_L(10)
L0_CADOUT_H(9)
L0_CADOUT_L(9)
L0_CADOUT_H(8)
L0_CADOUT_L(8)
L0_CADOUT_H(7)
L0_CADOUT_L(7)
L0_CADOUT_H(6)
L0_CADOUT_L(6)
L0_CADOUT_H(5)
L0_CADOUT_L(5)
L0_CADOUT_H(4)
L0_CADOUT_L(4)
L0_CADOUT_H(3)
L0_CADOUT_L(3)
L0_CADOUT_H(2)
L0_CADOUT_L(2)
L0_CADOUT_H(1)
L0_CADOUT_L(1)
L0_CADOUT_H(0)
L0_CADOUT_L(0)
SW1 X_TACTSW SW1 X_TACTSW
1
3
2
4
VCCA_1V2 VCC1_2HT
X_80L2_50_0805
X_80L2_50_0805
2 1
1 2
CP10 CP10
C191
C191
C167
C167
475P/1206
475P/1206
224P
224P
AD5
AD4
AD1
AC1
Y6
W6
W2
W3
Y5
Y4
AB6
AA6
AB5
AB4
AD6
AC6
AF6
AE6
AF5
AF4
AH6
AG6
AH5
AH4
Y1
W1
AA2
AA3
AB1
AA1
AC2
AC3
AE2
AE3
AF1
AE1
AG2
AG3
AH1
AG1
R42 X_100 R42 X_100
HT_CADOUT_H15
HT_CADOUT_L15
HT_CADOUT_H14
HT_CADOUT_L14
HT_CADOUT_H13
HT_CADOUT_L13
HT_CADOUT_H12
HT_CADOUT_L12
HT_CADOUT_H11
HT_CADOUT_L11
HT_CADOUT_H10
HT_CADOUT_L10
HT_CADOUT_H9
HT_CADOUT_L9
HT_CADOUT_H8
HT_CADOUT_L8
HT_CADOUT_H7
HT_CADOUT_L7
HT_CADOUT_H6
HT_CADOUT_L6
HT_CADOUT_H5
HT_CADOUT_L5
HT_CADOUT_H4
HT_CADOUT_L4
HT_CADOUT_H3
HT_CADOUT_L3 HT_CADIN_L3
HT_CADOUT_H2
HT_CADOUT_L2
HT_CADOUT_H1
HT_CADOUT_L1
HT_CADOUT_H0
HT_CADOUT_L0
LDT_RST#
HT_CLKOUT_H1 9
HT_CLKOUT_L1 9
HT_CLKOUT_H0 9
HT_CLKOUT_L0 9
HT_CTLOUT_H0 9
HT_CTLOUT_L0 9
C182
C182
224P
224P
VDDA_25
X_80S/0805
L12
L12
X_80S/0805
2 1
VDDA25
L2
L2
1 2
CP4CP4
C55
C198
C198
224P
224P
TP20TP20
TP19TP19
C193
C193
224P
224P
CPU_CLK 13
CPU_CLK# 13
VCC_DDR
C55
C3900P25X
C3900P25X
C54
C54
C3900P25X
C3900P25X
+1.8V_S0
R101
R101
39.2R1%
39.2R1%
CPU_STRAP_HI_E11
CPU_STRAP_LO_F11
R102
R102
39.2R1%
39.2R1%
LDT_RST# 14
CPU_SID 14
CPU_SIC 14
R73
R73
169R1%
169R1%
CPUCLKIN
CPUCLKIN#
CPU_PWRGD 14,15,27,28
LDT_STOP# 11,14,15
X_102P
X_102P
R93 300R1% R93 300R1%
R104 300R1% R104 300R1%
CPU_M_VREF
TP9TP9
R54 300R R54 300R
R52 300R R52 300R
TP10TP10
THERMDC_CPU 21
THERMDA_CPU 21
VCC_DDR
R65
R65
15R/8/1
15R/8/1
C64
C64
C56
224P
224P
CPU_PWRGD
LDT_STOP#
LDT_RST#
CPU_PRESENT_L
CPU_TDI
CPU_TRST_L
CPU_TCK
CPU_TMS
CPU_DBREQ_L
COREFB- 26
CPU_VTT_SENSE
CPU_TEST25_H
CPU_TEST25_L
CPU_M_VREF
C56
103P
103P
COREFB+
COREFB-
AK6
AL10
AJ10
AH10
AH11
AJ11
AH9
AG9
AG8
AH7
C10
D10
A8
B8
C9
D8
C7
AL3
AL6
AL9
A5
G2
G1
E12
F12
A10
B10
F10
E9
AJ7
F6
D6
E7
F8
C5
E5
AJ5
AJ6
CPU1D
CPU1D
MISC
MISC
VDDA1
VDDA2
CLKIN_H
CLKIN_L
PWROK
LDTSTOP_L
RESET_L
CPU_PRESENT_L
SIC
SID
TDI
TRST_L
TCK
TMS
DBREQ_L
VDD_FB_H
VDD_FB_L
VTT_SENSE
M_VREF
M_ZN
M_ZP
TEST25_H
TEST25_L
TEST19
TEST18
TEST13
TEST9
TEST17
TEST16
TEST15
TEST14
TEST12
TEST7
TEST6
TEST5
TEST4
TEST3
TEST2
C48
C48
475P/1206
475P/1206
C40
C40
COREFB+ 26
TP1TP1
TP3TP3
TP2TP2
TP14TP14
TP16TP16
TP18TP18
TP13TP13
TP22TP22
HT_CADIN_H[15..0] 9
HT_CADIN_L[15..0] 9
HT_CADOUT_H[15..0] 9
HT_CADOUT_L[15..0] 9
D D
C187
C187
224P
224P
HT_CLKIN_H1 9
HT_CLKIN_L1 9
VCC1_2HT
C C
B B
HT_CLKIN_H0 9
HT_CLKIN_L0 9
R109 49.9R1% R109 49.9R1%
R110 47.5R1%0402 R110 47.5R1%0402
HT_CTLIN_H0 9
HT_CTLIN_L0 9
HT_CADIN_H15
HT_CADIN_L15
HT_CADIN_H14
HT_CADIN_L14
HT_CADIN_H13
HT_CADIN_L13
HT_CADIN_H12
HT_CADIN_L12
HT_CADIN_H11
HT_CADIN_L11
HT_CADIN_H10
HT_CADIN_L10
HT_CADIN_H9
HT_CADIN_L9
HT_CADIN_H8
HT_CADIN_L8
HT_CADIN_H7
HT_CADIN_L7
HT_CADIN_H6
HT_CADIN_L6
HT_CADIN_H5
HT_CADIN_L5
HT_CADIN_H4
HT_CADIN_L4
HT_CADIN_H3
HT_CADIN_H2
HT_CADIN_L2
HT_CADIN_H1
HT_CADIN_L1
HT_CADIN_H0
HT_CADIN_L0
CPU_PRESENT_L
CPU_TEST25_H
CPU_TEST25_L
VCC_DDR
1
3
CPU_DBREQ_L
CPU_DBRDY
CPU_TCK
CPU_TMS
CPU_TDI
A A
CPU_TRST_L
CPU_TDO
5
5
7
9
11
13
15
17
19
21
23
X_hdr_k8_hdt
X_hdr_k8_hdt
J1
J1
KEY
KEY
2
4
6
8
10
12
14
16
18
20
22
LDT_RST#
24
26
4
R111 1K/6 R111 1K/6
R71 510R R71 510R
R72 510R R72 510R
VCC_DDR
R67
R67
15R/8/1
15R/8/1
3
C65
C65
C0.1U16X
C0.1U16X
C57
C57
C1000P16X
C1000P16X
Micro Star Restricted Secret
Micro Star Restricted Secret
Micro Star Restricted Secret
Title
Title
Title
ATHLON64 HT I/F CTRL & DEBUG
ATHLON64 HT I/F CTRL & DEBUG
ATHLON64 HT I/F CTRL & DEBUG
Document Number
Document Number
Document Number
MICRO-STAR INT'L CO.,LTD.
MICRO-STAR INT'L CO.,LTD.
MICRO-STAR INT'L CO.,LTD.
No. 69, Li-De St, Jung-He City,
No. 69, Li-De St, Jung-He City,
No. 69, Li-De St, Jung-He City,
Taipei Hsien, Taiwan
Taipei Hsien, Taiwan
Taipei Hsien, Taiwan
http://www.msi.com.tw
http://www.msi.com.tw
2
http://www.msi.com.tw
MS-7227H1
MS-7227H1
MS-7227H1
Last Revision Date:
Last Revision Date:
Last Revision Date:
Sheet
Sheet
Sheet
1
Wednesday, October 05, 2005
Wednesday, October 05, 2005
Wednesday, October 05, 2005
33 8
33 8
33 8
Rev
Rev
Rev
0A
0A
0A
of
of
of
5
4
3
2
1
MEM_MA_DQS_L[7..0] 6,7
MEM_MA_DQS_H[7..0] 6,7
MEM_MA_DM[7..0] 6,7
MEM_MB_DQS_L[7..0] 6,7
MEM_MB_DQS_H[7..0] 6,7
MEM_MB_DM[7..0] 6,7
D D
CPU1B
CPU1B
MEMORY INTERFACE A
MEM_MA0_CLK_H2 6,8
MEM_MA0_CLK_L2 6,8
MEM_MA0_CLK_H1 6,8
MEM_MA0_CLK_L1 6,8
MEM_MA0_CLK_H0 6,8
MEM_MA0_CLK_L0 6,8
MEM_MA0_CS_L1 6,8
MEM_MA0_CS_L0 6,8
MEM_MA0_ODT0 6,8
MEM_MA1_CLK_H2 7,8
MEM_MA1_CLK_L2 7,8
MEM_MA1_CLK_H1 7,8
MEM_MA1_CLK_L1 7,8
MEM_MA1_CLK_H0 7,8
MEM_MA1_CLK_L0 7,8
MEM_MA1_CS_L1 7,8
MEM_MA1_CS_L0 7,8
MEM_MA1_ODT0 7,8
C C
MEM_MA_CAS_L 6,7,8
MEM_MA_WE_L 6,7,8
MEM_MA_RAS_L 6,7,8
MEM_MA_BANK2 6,7,8
MEM_MA_BANK1 6,7,8
MEM_MA_BANK0 6,7,8
MEM_MA_CKE1 7,8
MEM_MA_CKE0 6,8
MEM_MA_ADD[15..0] 6,7,8
B B
MEM_MA0_CLK_H2
MEM_MA0_CLK_L2
MEM_MA0_CLK_H1
MEM_MA0_CLK_L1
MEM_MA0_CLK_H0
MEM_MA0_CLK_L0
MEM_MA0_CS_L1
MEM_MA0_CS_L0
MEM_MA0_ODT0
MEM_MA1_CLK_H2
MEM_MA1_CLK_L2
MEM_MA1_CLK_H1
MEM_MA1_CLK_L1
MEM_MA1_CLK_H0
MEM_MA1_CLK_L0
MEM_MA1_CS_L1
MEM_MA1_CS_L0
MEM_MA1_ODT0
MEM_MA_CAS_L
MEM_MA_WE_L
MEM_MA_RAS_L
MEM_MA_BANK2
MEM_MA_BANK1
MEM_MA_BANK0
MEM_MA_CKE1
MEM_MA_CKE0
MEM_MA_ADD15
MEM_MA_ADD14
MEM_MA_ADD13
MEM_MA_ADD12
MEM_MA_ADD11
MEM_MA_ADD10
MEM_MA_ADD9
MEM_MA_ADD8
MEM_MA_ADD7
MEM_MA_ADD6
MEM_MA_ADD5
MEM_MA_ADD4
MEM_MA_ADD3
MEM_MA_ADD2
MEM_MA_ADD1
MEM_MA_ADD0
MEM_MA_DQS_H7
MEM_MA_DQS_L7
MEM_MA_DQS_H6
MEM_MA_DQS_L6
MEM_MA_DQS_H5
MEM_MA_DQS_L5
MEM_MA_DQS_H4
MEM_MA_DQS_L4
MEM_MA_DQS_H3
MEM_MA_DQS_L3
MEM_MA_DQS_H2
MEM_MA_DQS_L2
MEM_MA_DQS_H1
MEM_MA_DQS_L1
MEM_MA_DQS_H0
MEM_MA_DQS_L0
MEM_MA_DM7
MEM_MA_DM6
MEM_MA_DM5
MEM_MA_DM4
MEM_MA_DM3
MEM_MA_DM2
MEM_MA_DM1
MEM_MA_DM0
AG21
AG20
G19
H19
U27
U26
AC25
AA24
AC28
AE20
AE19
G20
G21
V27
W27
AD27
AA25
AC27
AB25
AB27
AA26
N25
Y27
AA27
M25
M27
N24
AC26
N26
P25
Y25
N27
R24
P27
R25
R26
R27
U25
W24
AD15
AE15
AG18
AG19
AG24
AG25
AG27
AG28
D29
C29
C25
D25
E19
G15
AF15
AF19
AJ25
AH29
B29
E24
E18
H15
L27
T25
T27
F19
F15
MEMORY INTERFACE A
MA0_CLK_H(2)
MA0_CLK_L(2)
MA0_CLK_H(1)
MA0_CLK_L(1)
MA0_CLK_H(0)
MA0_CLK_L(0)
MA0_CS_L(1)
MA0_CS_L(0)
MA0_ODT(0)
MA1_CLK_H(2)
MA1_CLK_L(2)
MA1_CLK_H(1)
MA1_CLK_L(1)
MA1_CLK_H(0)
MA1_CLK_L(0)
MA1_CS_L(1)
MA1_CS_L(0)
MA1_ODT(0)
MA_CAS_L
MA_WE_L
MA_RAS_L
MA_BANK(2)
MA_BANK(1)
MA_BANK(0)
MA_CKE(1)
MA_CKE(0)
MA_ADD(15)
MA_ADD(14)
MA_ADD(13)
MA_ADD(12)
MA_ADD(11)
MA_ADD(10)
MA_ADD(9)
MA_ADD(8)
MA_ADD(7)
MA_ADD(6)
MA_ADD(5)
MA_ADD(4)
MA_ADD(3)
MA_ADD(2)
MA_ADD(1)
MA_ADD(0)
MA_DQS_H(7)
MA_DQS_L(7)
MA_DQS_H(6)
MA_DQS_L(6)
MA_DQS_H(5)
MA_DQS_L(5)
MA_DQS_H(4)
MA_DQS_L(4)
MA_DQS_H(3)
MA_DQS_L(3)
MA_DQS_H(2)
MA_DQS_L(2)
MA_DQS_H(1)
MA_DQS_L(1)
MA_DQS_H(0)
MA_DQS_L(0)
MA_DM(7)
MA_DM(6)
MA_DM(5)
MA_DM(4)
MA_DM(3)
MA_DM(2)
MA_DM(1)
MA_DM(0)
MA_DATA(63)
MA_DATA(62)
MA_DATA(61)
MA_DATA(60)
MA_DATA(59)
MA_DATA(58)
MA_DATA(57)
MA_DATA(56)
MA_DATA(55)
MA_DATA(54)
MA_DATA(53)
MA_DATA(52)
MA_DATA(51)
MA_DATA(50)
MA_DATA(49)
MA_DATA(48)
MA_DATA(47)
MA_DATA(46)
MA_DATA(45)
MA_DATA(44)
MA_DATA(43)
MA_DATA(42)
MA_DATA(41)
MA_DATA(40)
MA_DATA(39)
MA_DATA(38)
MA_DATA(37)
MA_DATA(36)
MA_DATA(35)
MA_DATA(34)
MA_DATA(33)
MA_DATA(32)
MA_DATA(31)
MA_DATA(30)
MA_DATA(29)
MA_DATA(28)
MA_DATA(27)
MA_DATA(26)
MA_DATA(25)
MA_DATA(24)
MA_DATA(23)
MA_DATA(22)
MA_DATA(21)
MA_DATA(20)
MA_DATA(19)
MA_DATA(18)
MA_DATA(17)
MA_DATA(16)
MA_DATA(15)
MA_DATA(14)
MA_DATA(13)
MA_DATA(12)
MA_DATA(11)
MA_DATA(10)
MA_DATA(9)
MA_DATA(8)
MA_DATA(7)
MA_DATA(6)
MA_DATA(5)
MA_DATA(4)
MA_DATA(3)
MA_DATA(2)
MA_DATA(1)
MA_DATA(0)
MA_DQS_H(8)
MA_DQS_L(8)
MA_DM(8)
MA_CHECK(7)
MA_CHECK(6)
MA_CHECK(5)
MA_CHECK(4)
MA_CHECK(3)
MA_CHECK(2)
MA_CHECK(1)
MA_CHECK(0)
MEM_MA_DATA63
AE14
MEM_MA_DATA62
AG14
MEM_MA_DATA61
AG16
MEM_MA_DATA60
AD17
MEM_MA_DATA59
AD13
MEM_MA_DATA58
AE13
MEM_MA_DATA57
AG15
MEM_MA_DATA56
AE16
MEM_MA_DATA55
AG17
MEM_MA_DATA54
AE18
MEM_MA_DATA53
AD21
MEM_MA_DATA52
AG22
MEM_MA_DATA51
AE17
MEM_MA_DATA50
AF17
MEM_MA_DATA49
AF21
MEM_MA_DATA48
AE21
MEM_MA_DATA47
AF23
MEM_MA_DATA46
AE23
MEM_MA_DATA45
AJ26
MEM_MA_DATA44
AG26
MEM_MA_DATA43
AE22
MEM_MA_DATA42
AG23
MEM_MA_DATA41
AH25
MEM_MA_DATA40
AF25
MEM_MA_DATA39
AJ28
MEM_MA_DATA38
AJ29
MEM_MA_DATA37
AF29
MEM_MA_DATA36
AE26
MEM_MA_DATA35
AJ27
MEM_MA_DATA34
AH27
MEM_MA_DATA33
AG29
MEM_MA_DATA32
AF27
MEM_MA_DATA31
E29
MEM_MA_DATA30
E28
MEM_MA_DATA29
D27
MEM_MA_DATA28
C27
MEM_MA_DATA27
G26
MEM_MA_DATA26
F27
MEM_MA_DATA25
C28
MEM_MA_DATA24
E27
MEM_MA_DATA23
F25
MEM_MA_DATA22
E25
MEM_MA_DATA21
E23
MEM_MA_DATA20
D23
MEM_MA_DATA19
E26
MEM_MA_DATA18
C26
MEM_MA_DATA17
G23
MEM_MA_DATA16
F23
MEM_MA_DATA15
E22
MEM_MA_DATA14
E21
MEM_MA_DATA13
F17
MEM_MA_DATA12
G17
MEM_MA_DATA11
G22
MEM_MA_DATA10
F21
MEM_MA_DATA9
G18
MEM_MA_DATA8
E17
MEM_MA_DATA7
G16
MEM_MA_DATA6
E15
MEM_MA_DATA5
G13
MEM_MA_DATA4
H13
MEM_MA_DATA3
H17
MEM_MA_DATA2
E16
MEM_MA_DATA1
E14
MEM_MA_DATA0
G14
MEM_MA_DQS_H8
J28
MEM_MA_DQS_L8
J27
MEM_MA_DM8
J25
MEM_MA_CHECK7
K25
MEM_MA_CHECK6
J26
MEM_MA_CHECK5
G28
MEM_MA_CHECK4
G27
MEM_MA_CHECK3
L24
MEM_MA_CHECK2
K27
MEM_MA_CHECK1
H29
MEM_MA_CHECK0
H27
MEM_MA_DATA[63..0] 6,7
MEM_MA_DQS_H8 6,7
MEM_MA_DQS_L8 6,7
MEM_MA_DM8 6,7
MEM_MB0_CLK_H2 6,8
MEM_MB0_CLK_L2 6,8
MEM_MB0_CLK_H1 6,8
MEM_MB0_CLK_L1 6,8
MEM_MB0_CLK_H0 6,8
MEM_MB0_CLK_L0 6,8
MEM_MB0_CS_L1 6,8
MEM_MB0_CS_L0 6,8
MEM_MB0_ODT0 6,8
MEM_MB1_CLK_H2 7,8
MEM_MB1_CLK_L2 7,8
MEM_MB1_CLK_H1 7,8
MEM_MB1_CLK_L1 7,8
MEM_MB1_CLK_H0 7,8
MEM_MB1_CLK_L0 7,8
MEM_MB1_CS_L1 7,8
MEM_MB1_CS_L0 7,8
MEM_MB1_ODT0 7,8
MEM_MB_CAS_L 6,7,8
MEM_MB_WE_L 6,7,8
MEM_MB_RAS_L 6,7,8
MEM_MB_BANK2 6,7,8
MEM_MB_BANK1 6,7,8
MEM_MB_BANK0 6,7,8
MEM_MB_CKE1 7,8
MEM_MB_CKE0 6,8
MEM_MB_ADD[15..0] 6,7,8
MEM_MB0_CLK_H2
MEM_MB0_CLK_L2
MEM_MB0_CLK_H1
MEM_MB0_CLK_L1
MEM_MB0_CLK_H0
MEM_MB0_CLK_L0
MEM_MB0_CS_L1
MEM_MB0_CS_L0
MEM_MB0_ODT0
MEM_MB1_CLK_H2
MEM_MB1_CLK_L2
MEM_MB1_CLK_H1
MEM_MB1_CLK_L1
MEM_MB1_CLK_H0
MEM_MB1_CLK_L0
MEM_MB1_CS_L1
MEM_MB1_CS_L0
MEM_MB1_ODT0
MEM_MB_CAS_L
MEM_MB_WE_L
MEM_MB_RAS_L
MEM_MB_BANK2
MEM_MB_BANK1
MEM_MB_BANK0
MEM_MB_CKE1
MEM_MB_CKE0
MEM_MB_ADD15
MEM_MB_ADD14
MEM_MB_ADD13
MEM_MB_ADD12
MEM_MB_ADD11
MEM_MB_ADD10
MEM_MB_ADD9
MEM_MB_ADD8
MEM_MB_ADD7
MEM_MB_ADD6
MEM_MB_ADD5
MEM_MB_ADD4
MEM_MB_ADD3
MEM_MB_ADD2
MEM_MB_ADD1
MEM_MB_ADD0
MEM_MB_DQS_H7
MEM_MB_DQS_L7
MEM_MB_DQS_H6
MEM_MB_DQS_L6
MEM_MB_DQS_H5
MEM_MB_DQS_L5
MEM_MB_DQS_H4
MEM_MB_DQS_L4
MEM_MB_DQS_H3
MEM_MB_DQS_L3
MEM_MB_DQS_H2
MEM_MB_DQS_L2
MEM_MB_DQS_H1
MEM_MB_DQS_L1
MEM_MB_DQS_H0
MEM_MB_DQS_L0
MEM_MB_DM7
MEM_MB_DM6
MEM_MB_DM5
MEM_MB_DM4
MEM_MB_DM3
MEM_MB_DM2
MEM_MB_DM1
MEM_MB_DM0
AJ19
AK19
AE30
AC31
AD29
AL19
AL18
W29
W28
AE29
AB31
AD31
AC29
AC30
AB29
AA31
AA28
M31
M29
N28
N29
AE31
N30
AA29
R29
R28
R31
R30
U29
U28
AA30
AK13
AJ13
AK17
AJ17
AK23
AL23
AL28
AL29
D31
C31
C24
C23
D17
C17
C14
C13
AJ14
AH17
AJ23
AK29
C30
A18
A19
U31
U30
C19
D19
N31
P29
P31
T31
T29
A23
B17
B13
MB0_CLK_H(2)
MB0_CLK_L(2)
MB0_CLK_H(1)
MB0_CLK_L(1)
MB0_CLK_H(0)
MB0_CLK_L(0)
MB0_CS_L(1)
MB0_CS_L(0)
MB0_ODT(0)
MB1_CLK_H(2)
MB1_CLK_L(2)
MB1_CLK_H(1)
MB1_CLK_L(1)
MB1_CLK_H(0)
MB1_CLK_L(0)
MB1_CS_L(1)
MB1_CS_L(0)
MB1_ODT(0)
MB_CAS_L
MB_WE_L
MB_RAS_L
MB_BANK(2)
MB_BANK(1)
MB_BANK(0)
MB_CKE(1)
MB_CKE(0)
MB_ADD(15)
MB_ADD(14)
MB_ADD(13)
MB_ADD(12)
MB_ADD(11)
MB_ADD(10)
MB_ADD(9)
MB_ADD(8)
MB_ADD(7)
MB_ADD(6)
MB_ADD(5)
MB_ADD(4)
MB_ADD(3)
MB_ADD(2)
MB_ADD(1)
MB_ADD(0)
MB_DQS_H(7)
MB_DQS_L(7)
MB_DQS_H(6)
MB_DQS_L(6)
MB_DQS_H(5)
MB_DQS_L(5)
MB_DQS_H(4)
MB_DQS_L(4)
MB_DQS_H(3)
MB_DQS_L(3)
MB_DQS_H(2)
MB_DQS_L(2)
MB_DQS_H(1)
MB_DQS_L(1)
MB_DQS_H(0)
MB_DQS_L(0)
MB_DM(7)
MB_DM(6)
MB_DM(5)
MB_DM(4)
MB_DM(3)
MB_DM(2)
MB_DM(1)
MB_DM(0)
MEM_MA_CHECK[7..0] 6,7
CPU1C
CPU1C
MEMORY INTERFACE B
MEMORY INTERFACE B
MB_DATA(63)
MB_DATA(62)
MB_DATA(61)
MB_DATA(60)
MB_DATA(59)
MB_DATA(58)
MB_DATA(57)
MB_DATA(56)
MB_DATA(55)
MB_DATA(54)
MB_DATA(53)
MB_DATA(52)
MB_DATA(51)
MB_DATA(50)
MB_DATA(49)
MB_DATA(48)
MB_DATA(47)
MB_DATA(46)
MB_DATA(45)
MB_DATA(44)
MB_DATA(43)
MB_DATA(42)
MB_DATA(41)
MB_DATA(40)
MB_DATA(39)
MB_DATA(38)
MB_DATA(37)
MB_DATA(36)
MB_DATA(35)
MB_DATA(34)
MB_DATA(33)
MB_DATA(32)
MB_DATA(31)
MB_DATA(30)
MB_DATA(29)
MB_DATA(28)
MB_DATA(27)
MB_DATA(26)
MB_DATA(25)
MB_DATA(24)
MB_DATA(23)
MB_DATA(22)
MB_DATA(21)
MB_DATA(20)
MB_DATA(19)
MB_DATA(18)
MB_DATA(17)
MB_DATA(16)
MB_DATA(15)
MB_DATA(14)
MB_DATA(13)
MB_DATA(12)
MB_DATA(11)
MB_DATA(10)
MB_DATA(9)
MB_DATA(8)
MB_DATA(7)
MB_DATA(6)
MB_DATA(5)
MB_DATA(4)
MB_DATA(3)
MB_DATA(2)
MB_DATA(1)
MB_DATA(0)
MB_DQS_H(8)
MB_DQS_L(8)
MB_DM(8)
MB_CHECK(7)
MB_CHECK(6)
MB_CHECK(5)
MB_CHECK(4)
MB_CHECK(3)
MB_CHECK(2)
MB_CHECK(1)
MB_CHECK(0)
AH13
AL13
AL15
AJ15
AF13
AG13
AL14
AK15
AL16
AL17
AK21
AL21
AH15
AJ16
AH19
AL20
AJ22
AL22
AL24
AK25
AJ21
AH21
AH23
AJ24
AL27
AK27
AH31
AG30
AL25
AL26
AJ30
AJ31
E31
E30
B27
A27
F29
F31
A29
A28
A25
A24
C22
D21
A26
B25
B23
A22
B21
A20
C16
D15
C21
A21
A17
A16
B15
A14
E13
F13
C15
A15
A13
D13
J31
J30
J29
K29
K31
G30
G29
L29
L28
H31
G31
MEM_MB_DATA63
MEM_MB_DATA62
MEM_MB_DATA61
MEM_MB_DATA60
MEM_MB_DATA59
MEM_MB_DATA58
MEM_MB_DATA57
MEM_MB_DATA56
MEM_MB_DATA55
MEM_MB_DATA54
MEM_MB_DATA53
MEM_MB_DATA52
MEM_MB_DATA51
MEM_MB_DATA50
MEM_MB_DATA49
MEM_MB_DATA48
MEM_MB_DATA47
MEM_MB_DATA46
MEM_MB_DATA45
MEM_MB_DATA44
MEM_MB_DATA43
MEM_MB_DATA42
MEM_MB_DATA41
MEM_MB_DATA40
MEM_MB_DATA39
MEM_MB_DATA38
MEM_MB_DATA37
MEM_MB_DATA36
MEM_MB_DATA35
MEM_MB_DATA34
MEM_MB_DATA33
MEM_MB_DATA32
MEM_MB_DATA31
MEM_MB_DATA30
MEM_MB_DATA29
MEM_MB_DATA28
MEM_MB_DATA27
MEM_MB_DATA26
MEM_MB_DATA25
MEM_MB_DATA24
MEM_MB_DATA23
MEM_MB_DATA22
MEM_MB_DATA21
MEM_MB_DATA20
MEM_MB_DATA19
MEM_MB_DATA18
MEM_MB_DATA17
MEM_MB_DATA16
MEM_MB_DATA15
MEM_MB_DATA14
MEM_MB_DATA13
MEM_MB_DATA12
MEM_MB_DATA11
MEM_MB_DATA10
MEM_MB_DATA9
MEM_MB_DATA8
MEM_MB_DATA7
MEM_MB_DATA6
MEM_MB_DATA5
MEM_MB_DATA4
MEM_MB_DATA3
MEM_MB_DATA2
MEM_MB_DATA1
MEM_MB_DATA0
MEM_MB_DQS_H8
MEM_MB_DQS_L8
MEM_MB_DM8
MEM_MB_CHECK7
MEM_MB_CHECK6
MEM_MB_CHECK5
MEM_MB_CHECK4
MEM_MB_CHECK3
MEM_MB_CHECK2
MEM_MB_CHECK1
MEM_MB_CHECK0
MEM_MB_DQS_H8 6,7
MEM_MB_DQS_L8 6,7
MEM_MB_DM8 6,7
MEM_MB_CHECK[7..0] 6,7
MEM_MB_DATA[63..0] 6,7
A A
Micro Star Restricted Secret
Micro Star Restricted Secret
Micro Star Restricted Secret
Title
Title
Title
ATHLON64 DDR MEMORY I/F
ATHLON64 DDR MEMORY I/F
ATHLON64 DDR MEMORY I/F
Document Number
Document Number
Document Number
MICRO-STAR INT'L CO.,LTD.
MICRO-STAR INT'L CO.,LTD.
MICRO-STAR INT'L CO.,LTD.
No. 69, Li-De St, Jung-He City,
No. 69, Li-De St, Jung-He City,
No. 69, Li-De St, Jung-He City,
Taipei Hsien, Taiwan
Taipei Hsien, Taiwan
Taipei Hsien, Taiwan
http://www.msi.com.tw
http://www.msi.com.tw
5
4
3
2
http://www.msi.com.tw
MS-7227H1
MS-7227H1
MS-7227H1
Last Revision Date:
Last Revision Date:
Last Revision Date:
Sheet
Sheet
Sheet
1
Wednesday, October 05, 2005
Wednesday, October 05, 2005
Wednesday, October 05, 2005
43 8
43 8
43 8
Rev
Rev
Rev
0A
0A
0A
of
of
of
5
VCCP
CPU1F
CPU1F
VDD1
VDD1
A4
VDD1
A6
VDD2
AA8
VDD3
AA10
VDD4
AA12
VDD5
AA14
VDD6
AA16
VDD7
AA18
VDD8
AB7
VDD9
D D
C C
B B
AB11
AC10
AE10
AB9
AC4
AC5
AC8
AD2
AD3
AD7
AD9
AF7
AF9
AG4
AG5
AG7
AH2
AH3
E10
G10
G12
H11
H23
K11
K13
K15
K17
K19
K21
K23
Y17
Y19
VDD10
VDD11
VDD12
VDD13
VDD14
VDD15
VDD16
VDD17
VDD18
VDD19
VDD20
VDD21
VDD22
VDD23
VDD24
VDD25
VDD26
VDD27
B3
VDD28
B5
VDD29
B7
VDD30
C2
VDD31
C4
VDD32
C6
VDD33
C8
VDD34
D3
VDD35
D5
VDD36
D7
VDD37
D9
VDD38
E4
VDD39
E6
VDD40
E8
VDD41
VDD42
F5
VDD43
F7
VDD44
F9
VDD45
F11
VDD46
G6
VDD47
G8
VDD48
VDD49
VDD50
H7
VDD51
VDD52
VDD53
J8
VDD54
J12
VDD55
J14
VDD56
J16
VDD57
J18
VDD58
J20
VDD59
J22
VDD60
J24
VDD61
K7
VDD62
K9
VDD63
VDD64
VDD65
VDD66
VDD67
VDD68
VDD69
VDD70
L4
VDD71
L5
VDD72
L8
VDD73
L10
VDD74
L12
VDD75
VDD150
VDD151
VSS1
VSS2
VSS3
VSS4
VSS5
VSS6
VSS7
VSS8
VSS9
VSS10
VSS11
VSS12
VSS13
VSS14
VSS15
VSS16
VSS17
VSS18
VSS19
VSS20
VSS21
VSS22
VSS23
VSS24
VSS25
VSS26
VSS27
VSS28
VSS29
VSS30
VSS31
VSS32
VSS33
VSS34
VSS35
VSS36
VSS37
VSS38
VSS39
VSS40
VSS41
VSS42
VSS43
VSS44
VSS45
VSS46
VSS47
VSS48
VSS49
VSS50
VSS51
VSS52
VSS53
VSS54
VSS55
VSS56
VSS57
VSS58
VSS59
VSS60
VSS61
VSS62
VSS63
VSS64
VSS65
VSS66
VSS67
VSS68
VSS69
VSS70
VSS71
VSS72
VSS73
VSS74
VSS240
VSS241
A3
A7
A9
A11
AA4
AA5
AA7
AA9
AA11
AA13
AA15
AA17
AA19
AA21
AA23
AB2
AB3
AB8
AB10
AB12
AB14
AB16
AB18
AB20
AB22
AC7
AC9
AC11
AC13
AC15
AC17
AC19
AC21
AC23
AD8
AD10
AD12
AD14
AD16
AD20
AD22
AD24
AE4
AE5
AE9
AE11
AF2
AF3
AF8
AF10
AF12
AF14
AF16
AF18
AF20
AF22
AF24
AF26
AF28
AG10
AG11
AH14
AH16
AH18
AH20
AH22
AH24
AH26
AH28
AH30
AK2
AK14
AK16
AK18
Y14
Y16
VCCP
M11
M13
M15
M17
M19
W10
W12
W14
W16
W18
W20
L14
VDD1
L16
VDD2
L18
VDD3
M2
VDD4
M3
VDD5
M7
VDD6
M9
VDD7
VDD8
VDD9
VDD10
VDD11
VDD12
N8
VDD13
N10
VDD14
N12
VDD15
N14
VDD16
N16
VDD17
N18
VDD18
P7
VDD19
P9
VDD20
P11
VDD21
P13
VDD22
P15
VDD23
P17
VDD24
P19
VDD25
R4
VDD26
R5
VDD27
R8
VDD28
R10
VDD29
R12
VDD30
R14
VDD31
R16
VDD32
R18
VDD33
R20
VDD34
T2
VDD35
T3
VDD36
T7
VDD37
T9
VDD38
T11
VDD39
T13
VDD40
T15
VDD41
T17
VDD42
T19
VDD43
T21
VDD44
U8
VDD45
U10
VDD46
U12
VDD47
U14
VDD48
U16
VDD49
U18
VDD50
U20
VDD51
V9
VDD52
V11
VDD53
V13
VDD54
V15
VDD55
V17
VDD56
V19
VDD57
V21
VDD58
W4
VDD59
W5
VDD60
W8
VDD61
VDD62
VDD63
VDD64
VDD65
VDD66
VDD67
Y2
VDD68
Y3
VDD69
Y7
VDD70
Y9
VDD71
Y11
VDD72
Y13
VDD73
Y15
VDD74
Y21
VDD75
CPU1G
CPU1G
VDD2
VDD2
4
VSS1
VSS2
VSS3
VSS4
VSS5
VSS6
VSS7
VSS8
VSS9
VSS10
VSS11
VSS12
VSS13
VSS14
VSS15
VSS16
VSS17
VSS18
VSS19
VSS20
VSS21
VSS22
VSS23
VSS24
VSS25
VSS26
VSS27
VSS28
VSS29
VSS30
VSS31
VSS32
VSS33
VSS34
VSS35
VSS36
VSS37
VSS38
VSS39
VSS40
VSS41
VSS42
VSS43
VSS44
VSS45
VSS46
VSS47
VSS48
VSS49
VSS50
VSS51
VSS52
VSS53
VSS54
VSS55
VSS56
VSS57
VSS58
VSS59
VSS60
VSS61
VSS62
VSS63
VSS64
VSS65
VSS66
VSS67
VSS68
VSS69
VSS70
VSS71
VSS72
VSS73
VSS74
VSS75
AK20
AK22
AK24
AK26
AK28
AK30
AL5
B4
B9
B11
B14
B16
B18
B20
B22
B24
B26
B28
B30
C3
D14
D16
D18
D20
D22
D24
D26
D28
D30
E11
F4
F14
F16
F18
F20
F22
F24
F26
F28
F30
G9
G11
H8
H10
H12
H14
H16
H18
H22
H24
H26
H28
H30
J4
J5
J7
J9
J11
J13
J15
J17
J19
J21
J23
K2
K3
K8
K10
K12
K14
K16
K18
K20
K22
Y18
VCCP
AA20
AA22
AB13
AB15
AB17
AB19
AB21
AB23
AC12
AC14
AC16
AC18
AC20
AC22
AD11
AD23
AE12
AF11
W22
M21
M23
N20
N22
R22
U22
3
VCC_DDR
VCC1_2HT
VTT_DDR
VCCP
C631
C631
X_C0.22U16X/B
X_C0.22U16X/B
AJ4
AJ3
AJ2
AJ1
D12
C12
B12
A12
AB24
AB26
AB28
AB30
AC24
AD26
AD28
AD30
AF30
M24
M26
M28
M30
P24
P26
P28
P30
T24
T26
T28
T30
V25
V26
V28
V30
Y24
Y26
Y28
Y29
C613
C613
X_C0.22U16X/B
X_C0.22U16X/B
CPU1H
CPU1H
VDD3
VDD3
VDD1
VDD2
VDD3
VDD4
VDD5
VDD6
VDD7
VDD8
VDD9
VDD10
VDD11
VDD12
VDD13
VDD14
VDD15
VDD16
VDD17
VDD18
L20
VDD19
L22
VDD20
VDD21
VDD22
VDD23
VDD24
P21
VDD25
P23
VDD26
VDD27
T23
VDD28
VDD29
V23
VDD30
VDD31
Y23
VDD32
5
GND
6
GND
7
GND
8
GND
VSS1
VSS2
VSS3
VSS4
VSS5
VSS6
VSS7
VSS8
VSS9
VSS10
VSS11
VSS12
VSS13
VSS14
VSS15
VSS16
VSS17
VSS18
VSS19
VSS20
VSS21
VSS22
VSS23
VSS24
VSS25
VSS26
VSS27
VSS28
VSS29
VSS30
VSS31
VSS32
VSS33
VSS34
VSS35
VSS36
VSS37
VSS38
VSS39
VSS40
VSS41
VSS42
VSS43
VSS44
VSS45
VSS46
VSS47
VSS48
VSS49
VSS50
VSS51
VSS52
VSS53
VSS54
VSS55
VSS56
VSS57
VSS58
VSS59
VSS60
VSS61
VSS62
VSS63
VSS64
VSS65
VCCP
N17
N19
N21
N23
P2
P3
P8
P10
P12
P14
P16
P18
P20
P22
R7
R9
R11
R13
R15
R17
R19
R21
R23
T8
T10
T12
T14
T16
T18
T20
T22
U4
U5
U7
U9
U11
U13
U15
U17
U19
U21
U23
V2
V3
V10
V12
V14
V16
V18
V20
V22
W9
W11
W13
W15
W17
W19
W21
W23
Y8
Y10
Y12
W7
Y20
Y22
VLDT_A1
VLDT_A2
VLDT_A3
VLDT_A4
VTT1
VTT2
VTT3
VTT4
VDDIO1
VDDIO2
VDDIO3
VDDIO4
VDDIO5
VDDIO6
VDDIO7
VDDIO8
VDDIO9
VDDIO10
VDDIO11
VDDIO12
VDDIO13
VDDIO14
VDDIO15
VDDIO16
VDDIO17
VDDIO18
VDDIO19
VDDIO20
VDDIO21
VDDIO22
VDDIO23
VDDIO24
VDDIO25
VDDIO26
VDDIO27
VDDIO28
VDDIO29
C611
C611
224P
224P
CPU1I
CPU1I
VDDIO
VDDIO
VLDT_B1
VLDT_B2
VLDT_B3
VLDT_B4
VTT5
VTT6
VTT7
VTT8
VTT9
VSS1
VSS2
VSS3
VSS4
VSS5
VSS6
VSS7
VSS8
VSS9
VSS10
VSS11
VSS12
VSS13
VSS14
VSS15
VSS16
VSS17
VSS18
VSS19
VSS20
VSS21
VSS22
VSS23
VSS24
VSS25
VSS26
VSS27
VSS28
2
H6
H5
H2
H1
AK12
AJ12
AH12
AG12
AL12
K24
K26
K28
K30
L7
L9
L11
L13
L15
L17
L19
L21
L23
M8
M10
M12
M14
M16
M18
M20
M22
N4
N5
N7
N9
N11
N13
N15
C612
C612
C0.01U50X/B
C0.01U50X/B
VLDT_RUN_B
VTT_DDR
C44
C44
4.7u/10V/8
4.7u/10V/8
C33
C33
C46
C46
X_C10000P50Y5
X_C10000P50Y5
C39
C39
X_C10000P50Y5
X_C10000P50Y5
X_C10000P50Y5
X_C10000P50Y5
1
C619
C619
C626
C626
C622
X_C22U6.3X1206/B
X_C22U6.3X1206/B
X_C22U6.3X1206/B
X_C22U6.3X1206/B
4
VCC_DDR
C620
C620
224P
224P
C624
C624
224P
224P
C201
C201
224P
224P
C235
C235
C4.7U10Y0805
C4.7U10Y0805
C63
C63
C4.7U10Y0805
C4.7U10Y0805
3
VTT_DDR
C200
C200
C192
X_C4.7U10Y0805
X_C4.7U10Y0805
C279
C279
C4.7U10Y0805
C4.7U10Y0805
C192
C10P16N
C10P16N
C188
C188
X_C10P16N
X_C10P16N
C165
224P
224P
A A
VTT_DDR
C221
C221
224P
224P
224P
224P
C194
C194
224P
224P
C4.7U10Y0805
C4.7U10Y0805
C203
C203
X_C4.7U10Y0805
X_C4.7U10Y0805
5
C202
C202
C226
C226
C165
C185
C185
C10P16N
C10P16N
C214
C214
C10P16N
C10P16N
C58
C58
C1000P50X
C1000P50X
C189
C189
C1000P50X
C1000P50X
C213
C213
C1000P50X
C1000P50X
C208
C208
C1000P50X
C1000P50X
C622
C22U6.3X1206/B
C22U6.3X1206/B
C628
C628
X_C22U6.3X1206/B
X_C22U6.3X1206/B
C22U6.3X1206/B
C22U6.3X1206/B
C614
C614
C623
C623
C22U6.3X1206/B
C22U6.3X1206/B
VCC_DDR
C22U6.3X1206/B
C22U6.3X1206/B
C630
C630
C22U6.3X1206/B
C22U6.3X1206/B
C210
C210
C627
C627
C22U6.3X1206/B
C22U6.3X1206/B
2
C621
C621
C22U6.3X1206/B
C22U6.3X1206/B
X_C22U6.3X1206/B
X_C22U6.3X1206/B
C68
C68
C4.7U10Y0805
C4.7U10Y0805
C615
C615
C67
C67
C4.7U10Y0805
C4.7U10Y0805
C625
C625
X_C22U6.3X1206/B
X_C22U6.3X1206/B
C22U6.3X1206
C22U6.3X1206
C616
C616
224P
224P
C617
C617
C70
C70
X_C22U6.3X1206/B
X_C22U6.3X1206/B
C164
C164
C149
C149
C207
C207
224P
224P
Title
Title
Title
Document Number
Document Number
Document Number
MICRO-STAR INT'L CO.,LTD.
MICRO-STAR INT'L CO.,LTD.
MICRO-STAR INT'L CO.,LTD.
No. 69, Li-De St, Jung-He City,
No. 69, Li-De St, Jung-He City,
No. 69, Li-De St, Jung-He City,
Taipei Hsien, Taiwan
Taipei Hsien, Taiwan
Taipei Hsien, Taiwan
http://www.msi.com.tw
http://www.msi.com.tw
http://www.msi.com.tw
C0.01U50X/B
C0.01U50X/B
224P
224P
Micro Star Restricted Secret
Micro Star Restricted Secret
Micro Star Restricted Secret
ATHLON64 PWR & GND
ATHLON64 PWR & GND
ATHLON64 PWR & GND
C629
C629
C22U6.3X1206
C22U6.3X1206
C78
C78
_C10P25N0402/0.25
_C10P25N0402/0.25
MS-7227H1
MS-7227H1
MS-7227H1
Last Revision Date:
Last Revision Date:
Last Revision Date:
Sheet
Sheet
Sheet
1
X_C22U6.3X1206/B
X_C22U6.3X1206/B
C128
C128
C618
C618
C22U6.3X1206
C22U6.3X1206
Rev
Rev
Rev
Wednesday, October 05, 2005
Wednesday, October 05, 2005
Wednesday, October 05, 2005
of
of
of
53 8
53 8
53 8
0A
0A
0A
5
4
3
2
1
MEM_MA_DQS_H[7..0] 4,7
MEM_MA_DQS_L[7..0] 4,7
D D
5
MEM_MA_DM8
MEM_MA_DM7
MEM_MA_DM6
MEM_MA_DM5
MEM_MA_DM4
MEM_MA_DM3
MEM_MA_DM2
MEM_MA_DM1
MEM_MA_DM0
MEM_MA_DQS_H8
MEM_MA_DQS_L8
MEM_MA_DQS_H7
MEM_MA_DQS_L7
MEM_MA_DQS_H6
MEM_MA_DQS_L6
MEM_MA_DQS_H5
MEM_MA_DQS_L5
MEM_MA_DQS_H4
MEM_MA_DQS_L4
MEM_MA_DQS_H3
MEM_MA_DQS_L3
MEM_MA_DQS_H2
MEM_MA_DQS_L2
MEM_MA_DQS_H1
MEM_MA_DQS_L1
MEM_MA_DQS_H0
MEM_MA_DQS_L0
SCL
SDA
MEM_MA_BANK2
MEM_MA_BANK1
MEM_MA_BANK0
MEM_MA_ADD15
MEM_MA_ADD14
MEM_MA_ADD13
MEM_MA_ADD12
MEM_MA_ADD11
MEM_MA_ADD10
MEM_MA_ADD9
MEM_MA_ADD8
MEM_MA_ADD7
MEM_MA_ADD6
MEM_MA_ADD5
MEM_MA_ADD4
MEM_MA_ADD3
MEM_MA_ADD2
MEM_MA_ADD1
MEM_MA_ADD0
MEM_MA_CHECK6
MEM_MA_CHECK5
MEM_MA_CHECK4
MEM_MA_CHECK3
MEM_MA_CHECK2
MEM_MA_CHECK1
MEM_MA_CHECK0
MEM_MA0_CLK_H0
MEM_MA0_CLK_L0
MEM_MA0_CLK_H1
MEM_MA0_CLK_L1
MEM_MA0_CLK_H2
MEM_MA0_CLK_L2
MEM_MA_CKE0
MEM_MA_RAS_L
MEM_MA_CAS_L
MEM_MA0_CS_L0
MEM_MA0_CS_L1
MEM_MA_DM8 4,7
MEM_MA_DM[7..0] 4,7
MEM_MA_DQS_H8 4,7
MEM_MA_DQS_L8 4,7
C C
SCL 7,15
SDA 7,15
MEM_MA_BANK2 4,7,8
MEM_MA_BANK1 4,7,8
MEM_MA_BANK0 4,7,8
MEM_MA_ADD[15..0] 4,7,8
B B
MEM_MA_CHECK[7..0] 4,7
MEM_MA0_CLK_H0 4,8
MEM_MA0_CLK_L0 4,8
MEM_MA0_CLK_H1 4,8
MEM_MA0_CLK_L1 4,8
MEM_MA0_CLK_H2 4,8
MEM_MA0_CLK_L2 4,8
MEM_MA_CKE0 4,8
MEM_MA_RAS_L 4,7,8
MEM_MA_CAS_L 4,7,8
A A
MEM_MA0_CS_L0 4,8
MEM_MA0_CS_L1 4,8
VCC_DDR
170
175
184
187
189
197
VDD2
VDD3
VDD4
VDD5
VDD6
69
64
VDD753VDD859VDD9
VDD1067VDD11
VDDQ1
VDDQ2
DIMM 1
ADDR=1010000B
172
178
VDD1
164
DQS17_H
165
DQS17_L
232
DQS16_H
233
DQS16_L
223
DQS15_H
224
DQS15_L
211
DQS14_H
212
DQS14_L
202
DQS13_H
203
DQS13_L
155
DQS12_H
156
DQS12_L
146
DQS11_H
147
DQS11_L
134
DQS10_H
135
DQS10_L
125
DQS9_H
126
DQS9_L
46
DQS8_H
45
DQS8_L
114
DQS7_H
113
DQS7_L
105
DQS6_H
104
DQS6_L
93
DQS5_H
92
DQS5_L
84
DQS4_H
83
DQS4_L
37
DQS3_H
36
DQS3_L
28
DQS2_H
27
DQS2_L
16
DQS1_H
15
DQS1_L
7
DQS0_H
6
DQS0_L
101
SA2
240
SA1
239
SA0
120
SCL
119
SDA
54
BA2
190
BA1
71
BA0
173
A15
174
A14
196
A13
176
A12
57
A11
70
A10
177
A9
179
A8
58
A7
180
A6
60
A5
61
A4
182
A3
63
A2
183
A1
188
A0
168
CB7
167
CB6
162
CB5
161
CB4
49
CB3
48
CB2
43
CB1
42
CB0
185
CK0_H
186
CK0_L
137
CK1_H
138
CK1_L
220
CK2_H
221
CK2_L
18
RESET_L
52
CKE0
171
CKE1
192
RAS_L
74
CAS_L
193
S0_L
76
S1_L
VCC3
181
191
194
72
238
78
DIMM1 DIMM1
VDDQ3
VDDQ4
VDDQ5
VDDQ651VDDQ756VDDQ862VDDQ9
VDDQ1075VDDQ11
VDDSPD
ERR_OUT_L
PAR_IN
DQ63
DQ62
DQ61
DQ60
DQ59
DQ58
DQ57
DQ56
DQ55
DQ54
DQ53
DQ52
DQ51
DQ50
DQ49
DQ48
DQ47
DQ46
DQ45
DQ44
DQ43
DQ42
DQ41
DQ40
DQ39
DQ38
DQ37
DQ36
DQ35
DQ34
DQ33
DQ32
DQ31
DQ30
DQ29
DQ28
DQ27
DQ26
DQ25
DQ24
DQ23
DQ22
DQ21
DQ20
DQ19
DQ18
DQ17
DQ16
DQ15
DQ14
DQ13
DQ12
DQ11
DQ10
WE_L
VREF
TEST
ODT0
ODT1
MEM_MA_DATA63
236
MEM_MA_DATA62
235
MEM_MA_DATA61
230
MEM_MA_DATA60
229
MEM_MA_DATA59
117
MEM_MA_DATA58
116
MEM_MA_DATA57
111
MEM_MA_DATA56
110
MEM_MA_DATA55
227
MEM_MA_DATA54
226
MEM_MA_DATA53
218
MEM_MA_DATA52
217
MEM_MA_DATA51
108
MEM_MA_DATA50
107
MEM_MA_DATA49
99
MEM_MA_DATA48
98
MEM_MA_DATA47
215
MEM_MA_DATA46
214
MEM_MA_DATA45
209
MEM_MA_DATA44
208
MEM_MA_DATA43
96
MEM_MA_DATA42
95
MEM_MA_DATA41
90
MEM_MA_DATA40
89
MEM_MA_DATA39
206
MEM_MA_DATA38
205
MEM_MA_DATA37
200
MEM_MA_DATA36
199
MEM_MA_DATA35
87
MEM_MA_DATA34
86
MEM_MA_DATA33
81
MEM_MA_DATA32
80
MEM_MA_DATA31
159
MEM_MA_DATA30
158
MEM_MA_DATA29
153
MEM_MA_DATA28
152
MEM_MA_DATA27
40
MEM_MA_DATA26
39
MEM_MA_DATA25
34
MEM_MA_DATA24
33
MEM_MA_DATA23
150
MEM_MA_DATA22
149
MEM_MA_DATA21
144
MEM_MA_DATA20
143
MEM_MA_DATA19
31
MEM_MA_DATA18
30
MEM_MA_DATA17
25
MEM_MA_DATA16
24
MEM_MA_DATA15
141
MEM_MA_DATA14
140
MEM_MA_DATA13
132
MEM_MA_DATA12
131
MEM_MA_DATA11
22
MEM_MA_DATA10
21
MEM_MA_DATA9
13
DQ9
MEM_MA_DATA8
12
DQ8
MEM_MA_DATA7
129
DQ7
MEM_MA_DATA6
128
DQ6
MEM_MA_DATA5
123
DQ5
MEM_MA_DATA4
122
DQ4
MEM_MA_DATA3
10
DQ3
MEM_MA_DATA2
9
DQ2
MEM_MA_DATA1
4
DQ1
MEM_MA_DATA0 MEM_MA_CHECK7
3
DQ0
MEM_MA_WE_L
73
VDDR_VREF
1
102
MEM_MA0_ODT0
195
77
55
68
19
NC1
4
MEM_MA_DATA[63..0] 4,7
MEM_MA_WE_L 4,7,8
MEM_MA0_ODT0 4,8
VDDR_VREF
C610
C610
104P
104P
MEM_MB_DQS_H[7..0] 4,7
MEM_MB_DQS_L[7..0] 4,7
VCC3
MEM_MB_DM8
MEM_MB_DM7
MEM_MB_DM6
MEM_MB_DM5
MEM_MB_DM4
MEM_MB_DM3
MEM_MB_DM2
MEM_MB_DM1
MEM_MB_DM0
MEM_MB_DQS_H8
MEM_MB_DQS_L8
MEM_MB_DQS_H7
MEM_MB_DQS_L7
MEM_MB_DQS_H6
MEM_MB_DQS_L6
MEM_MB_DQS_H5
MEM_MB_DQS_L5
MEM_MB_DQS_H4
MEM_MB_DQS_L4
MEM_MB_DQS_H3
MEM_MB_DQS_L3
MEM_MB_DQS_H2
MEM_MB_DQS_L2
MEM_MB_DQS_H1
MEM_MB_DQS_L1
MEM_MB_DQS_H0
MEM_MB_DQS_L0
SCL
SDA
MEM_MB_BANK2
MEM_MB_BANK1
MEM_MB_BANK0
MEM_MB_ADD15
MEM_MB_ADD14
MEM_MB_ADD13
MEM_MB_ADD12
MEM_MB_ADD11
MEM_MB_ADD10
MEM_MB_ADD9
MEM_MB_ADD8
MEM_MB_ADD7
MEM_MB_ADD6
MEM_MB_ADD5
MEM_MB_ADD4
MEM_MB_ADD3
MEM_MB_ADD2
MEM_MB_ADD1
MEM_MB_ADD0
MEM_MB_CHECK7
MEM_MB_CHECK6
MEM_MB_CHECK5
MEM_MB_CHECK4
MEM_MB_CHECK3
MEM_MB_CHECK2
MEM_MB_CHECK1
MEM_MB_CHECK0
MEM_MB0_CLK_H0
MEM_MB0_CLK_L0
MEM_MB0_CLK_H1
MEM_MB0_CLK_L1
MEM_MB0_CLK_H2
MEM_MB0_CLK_L2
MEM_MB_CKE0
MEM_MB_RAS_L
MEM_MB_CAS_L
MEM_MB0_CS_L0
MEM_MB0_CS_L1
3
MEM_MB_DM8 4,7
MEM_MB_DM[7..0] 4,7
MEM_MB_DQS_H8 4,7
MEM_MB_DQS_L8 4,7
MEM_MB_BANK2 4,7,8
MEM_MB_BANK1 4,7,8
MEM_MB_BANK0 4,7,8
MEM_MB_ADD[15..0] 4,7,8
MEM_MB_CHECK[7..0] 4,7
MEM_MB0_CLK_H0 4,8
MEM_MB0_CLK_L0 4,8
MEM_MB0_CLK_H1 4,8
MEM_MB0_CLK_L1 4,8
MEM_MB0_CLK_H2 4,8
MEM_MB0_CLK_L2 4,8
MEM_MB_CKE0 4,8
MEM_MB_RAS_L 4,7,8
MEM_MB_CAS_L 4,7,8
MEM_MB0_CS_L0 4,8
MEM_MB0_CS_L1 4,8
VCC_DDR
170
175
184
187
189
197
VDD2
VDD3
VDD4
VDD5
VDD6
VDD753VDD859VDD9
DIMM 2
ADDR=1010001B
69
64
VDD1067VDD11
VDDQ1
VDDQ2
172
178
VDD1
164
DQS17_H
165
DQS17_L
232
DQS16_H
233
DQS16_L
223
DQS15_H
224
DQS15_L
211
DQS14_H
212
DQS14_L
202
DQS13_H
203
DQS13_L
155
DQS12_H
156
DQS12_L
146
DQS11_H
147
DQS11_L
134
DQS10_H
135
DQS10_L
125
DQS9_H
126
DQS9_L
46
DQS8_H
45
DQS8_L
114
DQS7_H
113
DQS7_L
105
DQS6_H
104
DQS6_L
93
DQS5_H
92
DQS5_L
84
DQS4_H
83
DQS4_L
37
DQS3_H
36
DQS3_L
28
DQS2_H
27
DQS2_L
16
DQS1_H
15
DQS1_L
7
DQS0_H
6
DQS0_L
101
SA2
240
SA1
239
SA0
120
SCL
119
SDA
54
BA2
190
BA1
71
BA0
173
A15
174
A14
196
A13
176
A12
57
A11
70
A10
177
A9
179
A8
58
A7
180
A6
60
A5
61
A4
182
A3
63
A2
183
A1
188
A0
168
CB7
167
CB6
162
CB5
161
CB4
49
CB3
48
CB2
43
CB1
42
CB0
185
CK0_H
186
CK0_L
137
CK1_H
138
CK1_L
220
CK2_H
221
CK2_L
18
RESET_L
52
CKE0
171
CKE1
192
RAS_L
74
CAS_L
193
S0_L
76
S1_L
VCC3
181
191
194
72
238
78
DIMM2 DIMM2
VDDQ3
VDDQ4
VDDQ5
VDDQ651VDDQ756VDDQ862VDDQ9
VDDQ1075VDDQ11
VDDSPD
MEM_MB_DATA63
236
DQ63
MEM_MB_DATA62
235
DQ62
MEM_MB_DATA61
230
DQ61
MEM_MB_DATA60
229
DQ60
MEM_MB_DATA59
117
DQ59
MEM_MB_DATA58
116
DQ58
MEM_MB_DATA57
111
DQ57
MEM_MB_DATA56
110
DQ56
MEM_MB_DATA55
227
DQ55
MEM_MB_DATA54
226
DQ54
MEM_MB_DATA53
218
DQ53
MEM_MB_DATA52
217
DQ52
MEM_MB_DATA51
108
DQ51
MEM_MB_DATA50
107
DQ50
MEM_MB_DATA49
99
DQ49
MEM_MB_DATA48
98
DQ48
MEM_MB_DATA47
215
DQ47
MEM_MB_DATA46
214
DQ46
MEM_MB_DATA45
209
DQ45
MEM_MB_DATA44
208
DQ44
MEM_MB_DATA43
96
DQ43
MEM_MB_DATA42
95
DQ42
MEM_MB_DATA41
90
DQ41
MEM_MB_DATA40
89
DQ40
MEM_MB_DATA39
206
DQ39
MEM_MB_DATA38
205
DQ38
MEM_MB_DATA37
200
DQ37
MEM_MB_DATA36
199
DQ36
MEM_MB_DATA35
87
DQ35
MEM_MB_DATA34
86
DQ34
MEM_MB_DATA33
81
DQ33
MEM_MB_DATA32
80
DQ32
MEM_MB_DATA31
159
DQ31
MEM_MB_DATA30
158
DQ30
MEM_MB_DATA29
153
DQ29
MEM_MB_DATA28
152
DQ28
MEM_MB_DATA27
40
DQ27
MEM_MB_DATA26
39
DQ26
MEM_MB_DATA25
34
DQ25
MEM_MB_DATA24
33
DQ24
MEM_MB_DATA23
150
DQ23
MEM_MB_DATA22
149
DQ22
MEM_MB_DATA21
144
DQ21
MEM_MB_DATA20
143
DQ20
MEM_MB_DATA19
31
DQ19
MEM_MB_DATA18
30
DQ18
MEM_MB_DATA17
25
DQ17
MEM_MB_DATA16
24
DQ16
MEM_MB_DATA15
141
DQ15
MEM_MB_DATA14
140
DQ14
MEM_MB_DATA13
132
DQ13
MEM_MB_DATA12
131
DQ12
MEM_MB_DATA11
22
DQ11
MEM_MB_DATA10
21
DQ10
MEM_MB_DATA9
13
DQ9
MEM_MB_DATA8
12
DQ8
MEM_MB_DATA7
129
DQ7
MEM_MB_DATA6
128
DQ6
MEM_MB_DATA5
123
DQ5
MEM_MB_DATA4
122
DQ4
MEM_MB_DATA3
10
DQ3
MEM_MB_DATA2
9
DQ2
MEM_MB_DATA1
4
DQ1
MEM_MB_DATA0
3
DQ0
MEM_MB_WE_L
73
WE_L
VDDR_VREF
1
VREF
102
TEST
MEM_MB0_ODT0
195
ODT0
77
ODT1
55
ERR_OUT_L
68
PAR_IN
19
NC1
2
MEM_MB_DATA[63..0] 4,7
MEM_MB_WE_L 4,7,8
VDDR_VREF
C608
C608
104P
104P
MEM_MB0_ODT0 4,8
R66
R66
56.2R1%
56.2R1%
R70
R70
56.2R1%
56.2R1%
VCC_DDR
SCL
SCL 7,15
SDA
SDA 7,15
SCL
SDA
C49
C49
0.1u/25V/6
0.1u/25V/6
VDDR_VREF
C606
C606
0.1u/25V/6
0.1u/25V/6
Micro Star Restricted Secret
Micro Star Restricted Secret
Micro Star Restricted Secret
Title
Title
Title
FIRST LOGICAL DDR DIMM
FIRST LOGICAL DDR DIMM
FIRST LOGICAL DDR DIMM
Document Number
Document Number
Document Number
MICRO-STAR INT'L CO.,LTD.
MICRO-STAR INT'L CO.,LTD.
MICRO-STAR INT'L CO.,LTD.
No. 69, Li-De St, Jung-He City,
No. 69, Li-De St, Jung-He City,
No. 69, Li-De St, Jung-He City,
Taipei Hsien, Taiwan
Taipei Hsien, Taiwan
Taipei Hsien, Taiwan
http://www.msi.com.tw
http://www.msi.com.tw
http://www.msi.com.tw
VDDR_VREF
1
VCC_DDR
3
VCC_DDR
3
2
D16
D16
BAV99
BAV99
1
2
D15
D15
BAV99
BAV99
1
C605
C605
C1000P50X
C1000P50X
MS-7227H1
MS-7227H1
MS-7227H1
Last Revision Date:
Last Revision Date:
Last Revision Date:
Wednesday, October 05, 2005
Wednesday, October 05, 2005
Wednesday, October 05, 2005
Sheet
Sheet
Sheet
63 8
63 8
63 8
Rev
Rev
Rev
0A
0A
0A
of
of
of
5
4
3
2
1
MEM_MA_DQS_H[7..0] 4,6
MEM_MA_DQS_L[7..0] 4,6
D D
MEM_MA_DM8 4,6
MEM_MA_DM[7..0] 4,6
MEM_MA_DQS_H8 4,6
C C
B B
MEM_MA_DQS_L8 4,6
SCL 6,15
SDA 6,15
MEM_MA_BANK2 4,6,8
MEM_MA_BANK1 4,6,8
MEM_MA_BANK0 4,6,8
MEM_MA_ADD[15..0] 4,6,8
MEM_MA_CHECK[7..0] 4,6
MEM_MA1_CLK_H0 4,8
MEM_MA1_CLK_L0 4,8
MEM_MA1_CLK_H1 4,8
MEM_MA1_CLK_L1 4,8
MEM_MA1_CLK_H2 4,8
MEM_MA1_CLK_L2 4,8
MEM_MA_CKE1 4,8
A A
MEM_MA_RAS_L 4,6,8
MEM_MA_CAS_L 4,6,8
MEM_MA1_CS_L0 4,8
MEM_MA1_CS_L1 4,8
MEM_MA_DM8
MEM_MA_DM7
MEM_MA_DM6
MEM_MA_DM5
MEM_MA_DM4
MEM_MA_DM3
MEM_MA_DM2
MEM_MA_DM1
MEM_MA_DM0
MEM_MA_DQS_H8
MEM_MA_DQS_L8
MEM_MA_DQS_H7
MEM_MA_DQS_L7
MEM_MA_DQS_H6
MEM_MA_DQS_L6
MEM_MA_DQS_H5
MEM_MA_DQS_L5
MEM_MA_DQS_H4
MEM_MA_DQS_L4
MEM_MA_DQS_H3
MEM_MA_DQS_L3
MEM_MA_DQS_H2
MEM_MA_DQS_L2
MEM_MA_DQS_H1
MEM_MA_DQS_L1
MEM_MA_DQS_H0
VCC3
SCL
SDA
MEM_MA_BANK2
MEM_MA_BANK1
MEM_MA_BANK0
MEM_MA_ADD15
MEM_MA_ADD14
MEM_MA_ADD13
MEM_MA_ADD12
MEM_MA_ADD11
MEM_MA_ADD10
MEM_MA_ADD9
MEM_MA_ADD8
MEM_MA_ADD7
MEM_MA_ADD6
MEM_MA_ADD5
MEM_MA_ADD4
MEM_MA_ADD3
MEM_MA_ADD2
MEM_MA_ADD1
MEM_MA_ADD0
MEM_MA_CHECK7
MEM_MA_CHECK6
MEM_MA_CHECK5
MEM_MA_CHECK4
MEM_MA_CHECK3
MEM_MA_CHECK2
MEM_MA_CHECK1
MEM_MA_CHECK0
MEM_MA1_CLK_H0
MEM_MA1_CLK_L0
MEM_MA1_CLK_H1
MEM_MA1_CLK_L1
MEM_MA1_CLK_H2
MEM_MA1_CLK_L2
MEM_MA_CKE1 MEM_MB_CKE1
MEM_MA_RAS_L
MEM_MA_CAS_L
MEM_MA1_CS_L0
MEM_MA1_CS_L1
5
VCC_DDR VCC3
170
172
178
VDD1
VDD2
164
DQS17_H
165
DQS17_L
232
DQS16_H
233
DQS16_L
223
DQS15_H
224
DQS15_L
211
DQS14_H
212
DQS14_L
202
DQS13_H
203
DQS13_L
155
DQS12_H
156
DQS12_L
146
DQS11_H
147
DQS11_L
134
DQS10_H
135
DQS10_L
125
DQS9_H
126
DQS9_L
46
DQS8_H
45
DQS8_L
114
DQS7_H
113
DQS7_L
105
DQS6_H
104
DQS6_L
93
DQS5_H
92
DQS5_L
84
DQS4_H
83
DQS4_L
37
DQS3_H
36
DQS3_L
28
DQS2_H
27
DQS2_L
16
DQS1_H
15
DQS1_L
7
DQS0_H
6
DQS0_L
101
SA2
240
SA1
239
SA0
120
SCL
119
SDA
54
BA2
190
BA1
71
BA0
173
A15
174
A14
196
A13
176
A12
57
A11
70
A10
177
A9
179
A8
58
A7
180
A6
60
A5
61
A4
182
A3
63
A2
183
A1
188
A0
168
CB7
167
CB6
162
CB5
161
CB4
49
CB3
48
CB2
43
CB1
42
CB0
185
CK0_H
186
CK0_L
137
CK1_H
138
CK1_L
220
CK2_H
221
CK2_L
18
RESET_L
52
CKE0
171
CKE1
192
RAS_L
74
CAS_L
193
S0_L
76
S1_L
69
184
187
189
197
64
VDD3
VDD4
VDD5
VDD6
VDD753VDD859VDD9
VDD1067VDD11
DIMM 3
ADDR=1010010B
175
181
191
194
72
238
78
DIMM3 DIMM3
VDDQ1
VDDQ2
VDDQ3
VDDQ4
VDDQ5
VDDQ651VDDQ756VDDQ862VDDQ9
VDDQ1075VDDQ11
VDDSPD
ERR_OUT_L
PAR_IN
4
DQ63
DQ62
DQ61
DQ60
DQ59
DQ58
DQ57
DQ56
DQ55
DQ54
DQ53
DQ52
DQ51
DQ50
DQ49
DQ48
DQ47
DQ46
DQ45
DQ44
DQ43
DQ42
DQ41
DQ40
DQ39
DQ38
DQ37
DQ36
DQ35
DQ34
DQ33
DQ32
DQ31
DQ30
DQ29
DQ28
DQ27
DQ26
DQ25
DQ24
DQ23
DQ22
DQ21
DQ20
DQ19
DQ18
DQ17
DQ16
DQ15
DQ14
DQ13
DQ12
DQ11
DQ10
WE_L
VREF
TEST
ODT0
ODT1
MEM_MA_DATA63
236
MEM_MA_DATA62
235
MEM_MA_DATA61
230
MEM_MA_DATA60
229
MEM_MA_DATA59
117
MEM_MA_DATA58
116
MEM_MA_DATA57
111
MEM_MA_DATA56
110
MEM_MA_DATA55
227
MEM_MA_DATA54
226
MEM_MA_DATA53
218
MEM_MA_DATA52
217
MEM_MA_DATA51
108
MEM_MA_DATA50
107
MEM_MA_DATA49
99
MEM_MA_DATA48
98
MEM_MA_DATA47
215
MEM_MA_DATA46
214
MEM_MA_DATA45
209
MEM_MA_DATA44
208
MEM_MA_DATA43
96
MEM_MA_DATA42
95
MEM_MA_DATA41
90
MEM_MA_DATA40
89
MEM_MA_DATA39
206
MEM_MA_DATA38
205
MEM_MA_DATA37
200
MEM_MA_DATA36
199
MEM_MA_DATA35
87
MEM_MA_DATA34
86
MEM_MA_DATA33
81
MEM_MA_DATA32
80
MEM_MA_DATA31
159
MEM_MA_DATA30
158
MEM_MA_DATA29
153
MEM_MA_DATA28
152
MEM_MA_DATA27
40
MEM_MA_DATA26
39
MEM_MA_DATA25
34
MEM_MA_DATA24
33
MEM_MA_DATA23
150
MEM_MA_DATA22
149
MEM_MA_DATA21
144
MEM_MA_DATA20
143
MEM_MA_DATA19
31
MEM_MA_DATA18
30
MEM_MA_DATA17
25
MEM_MA_DATA16
24
MEM_MA_DATA15
141
MEM_MA_DATA14
140
MEM_MA_DATA13
132
MEM_MA_DATA12
131
MEM_MA_DATA11
22
MEM_MA_DATA10
21
MEM_MA_DATA9
13
DQ9
MEM_MA_DATA8
12
DQ8
MEM_MA_DATA7
129
DQ7
MEM_MA_DATA6
128
DQ6
MEM_MA_DATA5
123
DQ5
MEM_MA_DATA4
122
DQ4
MEM_MA_DATA3
10
DQ3
MEM_MA_DATA2
9
DQ2
MEM_MA_DATA1
4
DQ1
MEM_MA_DATA0
3
DQ0
MEM_MA_WE_L
73
1
102
MEM_MA1_ODT0
195
77
55
68
19
NC1
MEM_MA_WE_L 4,6,8
MEM_MA1_ODT0 4,8
MEM_MA_DATA[63..0] 4,6
VDDR_VREF VDDR_VREF
C607
C607
104P
104P
3
MEM_MB_DM[7..0] 4,6
MEM_MB_DQS_L[7..0] 4,6
MEM_MB_DQS_H[7..0] 4,6
VCC_DDR VCC3
170
175
181
191
194
72
172
178
VDD1
MEM_MB_DM8 4,6
MEM_MB_DQS_H8 4,6
MEM_MB_DQS_L8 4,6
VCC3
SCL 6,15
SDA 6,15
MEM_MB_BANK2 4,6,8
MEM_MB_BANK1 4,6,8
MEM_MB_BANK0 4,6,8
MEM_MB_ADD[15..0] 4,6,8
MEM_MB_CHECK[7..0] 4,6
MEM_MB1_CLK_H0 4,8
MEM_MB1_CLK_L0 4,8
MEM_MB1_CLK_H1 4,8
MEM_MB1_CLK_L1 4,8
MEM_MB1_CLK_H2 4,8
MEM_MB1_CLK_L2 4,8
MEM_MB_CKE1 4,8
MEM_MB_RAS_L 4,6,8
MEM_MB_CAS_L 4,6,8
MEM_MB1_CS_L0 4,8
MEM_MB1_CS_L1 4,8
MEM_MB_DM8
MEM_MB_DM7
MEM_MB_DM6
MEM_MB_DM5
MEM_MB_DM4
MEM_MB_DM3
MEM_MB_DM2
MEM_MB_DM1
MEM_MB_DM0
MEM_MB_DQS_H8
MEM_MB_DQS_L8
MEM_MB_DQS_H7
MEM_MB_DQS_L7
MEM_MB_DQS_H6
MEM_MB_DQS_L6
MEM_MB_DQS_H5
MEM_MB_DQS_L5
MEM_MB_DQS_H4
MEM_MB_DQS_L4
MEM_MB_DQS_H3
MEM_MB_DQS_L3
MEM_MB_DQS_H2
MEM_MB_DQS_L2
MEM_MB_DQS_H1
MEM_MB_DQS_L1
MEM_MB_DQS_H0
MEM_MB_DQS_L0 MEM_MA_DQS_L0
SCL
SDA
MEM_MB_BANK2
MEM_MB_BANK1
MEM_MB_BANK0
MEM_MB_ADD15
MEM_MB_ADD14
MEM_MB_ADD13
MEM_MB_ADD12
MEM_MB_ADD11
MEM_MB_ADD10
MEM_MB_ADD9
MEM_MB_ADD8
MEM_MB_ADD7
MEM_MB_ADD6
MEM_MB_ADD5
MEM_MB_ADD4
MEM_MB_ADD3
MEM_MB_ADD2
MEM_MB_ADD1
MEM_MB_ADD0
MEM_MB_CHECK7
MEM_MB_CHECK6
MEM_MB_CHECK5
MEM_MB_CHECK4
MEM_MB_CHECK3
MEM_MB_CHECK2
MEM_MB_CHECK1
MEM_MB_CHECK0
MEM_MB1_CLK_H0
MEM_MB1_CLK_L0
MEM_MB1_CLK_H1
MEM_MB1_CLK_L1
MEM_MB1_CLK_H2
MEM_MB1_CLK_L2
MEM_MB_RAS_L
MEM_MB_CAS_L
MEM_MB1_CS_L0
MEM_MB1_CS_L1
VDD2
164
DQS17_H
165
DQS17_L
232
DQS16_H
233
DQS16_L
223
DQS15_H
224
DQS15_L
211
DQS14_H
212
DQS14_L
202
DQS13_H
203
DQS13_L
155
DQS12_H
156
DQS12_L
146
DQS11_H
147
DQS11_L
134
DQS10_H
135
DQS10_L
125
DQS9_H
126
DQS9_L
46
DQS8_H
45
DQS8_L
114
DQS7_H
113
DQS7_L
105
DQS6_H
104
DQS6_L
93
DQS5_H
92
DQS5_L
84
DQS4_H
83
DQS4_L
37
DQS3_H
36
DQS3_L
28
DQS2_H
27
DQS2_L
16
DQS1_H
15
DQS1_L
7
DQS0_H
6
DQS0_L
101
SA2
240
SA1
239
SA0
120
SCL
119
SDA
54
BA2
190
BA1
71
BA0
173
A15
174
A14
196
A13
176
A12
57
A11
70
A10
177
A9
179
A8
58
A7
180
A6
60
A5
61
A4
182
A3
63
A2
183
A1
188
A0
168
CB7
167
CB6
162
CB5
161
CB4
49
CB3
48
CB2
43
CB1
42
CB0
185
CK0_H
186
CK0_L
137
CK1_H
138
CK1_L
220
CK2_H
221
CK2_L
18
RESET_L
52
CKE0
171
CKE1
192
RAS_L
74
CAS_L
193
S0_L
76
S1_L
2
69
184
187
189
197
64
VDD3
VDD4
VDD5
VDD6
VDD753VDD859VDD9
VDD1067VDD11
DIMM 4
ADDR=1010011B
VDDQ1
VDDQ2
VDDQ3
238
78
DIMM4 DIMM4
VDDQ4
VDDQ5
VDDQ651VDDQ756VDDQ862VDDQ9
VDDQ1075VDDQ11
VDDSPD
MEM_MB_DATA63
236
DQ63
MEM_MB_DATA62
235
DQ62
MEM_MB_DATA61
230
DQ61
MEM_MB_DATA60
229
DQ60
MEM_MB_DATA59
117
DQ59
MEM_MB_DATA58
116
DQ58
MEM_MB_DATA57
111
DQ57
MEM_MB_DATA56
110
DQ56
MEM_MB_DATA55
227
DQ55
MEM_MB_DATA54
226
DQ54
MEM_MB_DATA53
218
DQ53
MEM_MB_DATA52
217
DQ52
MEM_MB_DATA51
108
DQ51
MEM_MB_DATA50
107
DQ50
MEM_MB_DATA49
99
DQ49
MEM_MB_DATA48
98
DQ48
MEM_MB_DATA47
215
DQ47
MEM_MB_DATA46
214
DQ46
MEM_MB_DATA45
209
DQ45
MEM_MB_DATA44
208
DQ44
MEM_MB_DATA43
96
DQ43
MEM_MB_DATA42
95
DQ42
MEM_MB_DATA41
90
DQ41
MEM_MB_DATA40
89
DQ40
MEM_MB_DATA39
206
DQ39
MEM_MB_DATA38
205
DQ38
MEM_MB_DATA37
200
DQ37
MEM_MB_DATA36
199
DQ36
MEM_MB_DATA35
87
DQ35
MEM_MB_DATA34
86
DQ34
MEM_MB_DATA33
81
DQ33
MEM_MB_DATA32
80
DQ32
MEM_MB_DATA31
159
DQ31
MEM_MB_DATA30
158
DQ30
MEM_MB_DATA29
153
DQ29
MEM_MB_DATA28
152
DQ28
MEM_MB_DATA27
40
DQ27
MEM_MB_DATA26
39
DQ26
MEM_MB_DATA25
34
DQ25
MEM_MB_DATA24
33
DQ24
MEM_MB_DATA23
150
DQ23
MEM_MB_DATA22
149
DQ22
MEM_MB_DATA21
144
DQ21
MEM_MB_DATA20
143
DQ20
MEM_MB_DATA19
31
DQ19
MEM_MB_DATA18
30
DQ18
MEM_MB_DATA17
25
DQ17
MEM_MB_DATA16
24
DQ16
MEM_MB_DATA15
141
DQ15
MEM_MB_DATA14
140
DQ14
MEM_MB_DATA13
132
DQ13
MEM_MB_DATA12
131
DQ12
MEM_MB_DATA11
22
DQ11
MEM_MB_DATA10
21
DQ10
MEM_MB_DATA9
13
DQ9
MEM_MB_DATA8
12
DQ8
MEM_MB_DATA7
129
DQ7
MEM_MB_DATA6
128
DQ6
MEM_MB_DATA5
123
DQ5
MEM_MB_DATA4
122
DQ4
MEM_MB_DATA3
10
DQ3
MEM_MB_DATA2
9
DQ2
MEM_MB_DATA1
4
DQ1
MEM_MB_DATA0
3
DQ0
MEM_MB_WE_L
73
WE_L
1
VREF
102
TEST
MEM_MB1_ODT0
ERR_OUT_L
PAR_IN
ODT0
ODT1
195
77
55
68
19
NC1
MEM_MB1_ODT0 4,8
Title
Title
Title
Document Number
Document Number
Document Number
MICRO-STAR INT'L CO.,LTD.
MICRO-STAR INT'L CO.,LTD.
MICRO-STAR INT'L CO.,LTD.
No. 69, Li-De St, Jung-He City,
No. 69, Li-De St, Jung-He City,
No. 69, Li-De St, Jung-He City,
Taipei Hsien, Taiwan
Taipei Hsien, Taiwan
Taipei Hsien, Taiwan
http://www.msi.com.tw
http://www.msi.com.tw
http://www.msi.com.tw
MEM_MB_DATA[63..0] 4,6
MEM_MB_WE_L 4,6,8
C609
C609
104P
104P
Micro Star Restricted Secret
Micro Star Restricted Secret
Micro Star Restricted Secret
SECOND LOGICAL DDR DIMM
SECOND LOGICAL DDR DIMM
SECOND LOGICAL DDR DIMM
MS-7227H1
MS-7227H1
MS-7227H1
Last Revision Date:
Last Revision Date:
Last Revision Date:
Wednesday, October 05, 2005
Wednesday, October 05, 2005
Wednesday, October 05, 2005
Sheet
Sheet
Sheet
73 8
73 8
1
73 8
Rev
Rev
Rev
0A
0A
0A
of
of
of
5
4
3
2
1
VTT_DDR
MEM_MB_ADD15
RN7 8P4R-47R0402 RN7 8P4R-47R0402
1
MEM_MB_ADD15 4,6,7
MEM_MB_ADD14 4,6,7
MEM_MB_BANK2 4,6,7
MEM_MA_ADD9 4,6,7
MEM_MA_ADD11 4,6,7
MEM_MB_ADD12 4,6,7
D D
C C
MEM_MB_ADD9 4,6,7
MEM_MA_ADD7 4,6,7
MEM_MA_ADD6 4,6,7
MEM_MB_ADD6 4,6,7
MEM_MB_ADD5 4,6,7
MEM_MA_ADD5 4,6,7
MEM_MB_ADD1 4,6,7
MEM_MB_ADD2 4,6,7
MEM_MA_ADD1 4,6,7
MEM_MA_ADD2 4,6,7
MEM_MB_ADD10 4,6,7
MEM_MB_BANK0 4,6,7
MEM_MB_RAS_L 4,6,7
MEM_MB0_CS_L0 4,6
MEM_MA_BANK0 4,6,7
MEM_MB_BANK1 4,6,7
MEM_MA_RAS_L 4,6,7
MEM_MA0_CS_L0 4,6
MEM_MA_ADD13 4,6,7
MEM_MB1_CS_L1 4,7
MEM_MA0_CS_L1 4,6
MEM_MA1_CS_L1 4,7
MEM_MA1_CS_L0 4,7
MEM_MA1_ODT0 4,7
MEM_MB_ADD14
MEM_MB_BANK2
MEM_MA_ADD9
MEM_MA_ADD11
MEM_MB_ADD12
MEM_MB_ADD9
MEM_MA_ADD7
MEM_MA_ADD6
MEM_MB_ADD6
MEM_MB_ADD5
MEM_MA_ADD5
MEM_MB_ADD1
MEM_MB_ADD2
MEM_MA_ADD1
MEM_MA_ADD2
MEM_MB_ADD10
MEM_MB_BANK0
MEM_MB_RAS_L
MEM_MB0_CS_L0
MEM_MA_BANK0
MEM_MB_BANK1
MEM_MA_RAS_L
MEM_MA0_CS_L0
MEM_MA_ADD13
MEM_MB1_CS_L1
MEM_MA0_CS_L1
MEM_MA1_CS_L1
MEM_MA1_CS_L0
MEM_MA1_ODT0
RN8 8P4R-47R0402 RN8 8P4R-47R0402
RN11 8P4R-47R0402 RN11 8P4R-47R0402
RN13 8P4R-47R0402 RN13 8P4R-47R0402
RN17 8P4R-47R0402 RN17 8P4R-47R0402
RN15 8P4R-47R0402 RN15 8P4R-47R0402
RN21 8P4R-47R0402 RN21 8P4R-47R0402
2
3
4
5
6
7
8
1
2
3
4
5
6
7
8
1
2
3
4
5
6
7
8
1
2
3
4
5
6
7
8
1
2
3
4
5
6
7
8
1
2
3
4
5
6
7
8
1
2
3
4
5
6
7
8
R107 47R0402 R107 47R0402
R116 47R0402 R116 47R0402
MEM_MA0_CLK_H2 4,6
MEM_MA0_CLK_L2 4,6
MEM_MA0_CLK_H1 4,6
MEM_MA0_CLK_L1 4,6
MEM_MA0_CLK_H0 4,6
MEM_MA0_CLK_L0 4,6
MEM_MB0_CLK_H2 4,6
MEM_MB0_CLK_L2 4,6
MEM_MB0_CLK_H1 4,6
MEM_MB0_CLK_L1 4,6
MEM_MB0_CLK_H0 4,6
MEM_MB0_CLK_L0 4,6
MEM_MA0_CLK_H2
MEM_MA0_CLK_L2
MEM_MA0_CLK_H1
MEM_MA0_CLK_L1
MEM_MA0_CLK_H0
MEM_MA0_CLK_L0
MEM_MB0_CLK_H2
MEM_MB0_CLK_L2
MEM_MB0_CLK_H1
MEM_MB0_CLK_L1
MEM_MB0_CLK_H0
MEM_MB0_CLK_L0
C183
C183
C1.5P50N0402
C1.5P50N0402
C62
C62
C1.5P50N0402
C1.5P50N0402
C125
C125
C1.5P50N0402
C1.5P50N0402
C176
C176
C1.5P50N0402
C1.5P50N0402
C45
C45
C1.5P50N0402
C1.5P50N0402
C129
C129
C1.5P50N0402
C1.5P50N0402
0.1u/25V/6
0.1u/25V/6
VTT_DDR
MEM_MA_ADD15
MEM_MA_ADD14
MEM_MA_ADD13
MEM_MA_ADD12
MEM_MA_ADD11
MEM_MA_ADD10
MEM_MA_ADD9
MEM_MA_ADD8
MEM_MA_ADD7
MEM_MA_ADD6
MEM_MA_ADD5
MEM_MA_ADD4
MEM_MA_ADD3
MEM_MA_ADD2
MEM_MA_ADD1
MEM_MA_ADD0
MEM_MA_CAS_L
MEM_MA_WE_L
MEM_MA_RAS_L
MEM_MA_BANK2
MEM_MA_BANK1
MEM_MA_BANK0
C195
C195
0.1u/25V/6
0.1u/25V/6
C22P50N0402 C93 C22P50N0402 C93
C22P50N0402 C88 C22P50N0402 C88
C22P50N0402 C177 C22P50N0402 C177
C22P50N0402 C96 C22P50N0402 C96
C22P50N0402 C99 C22P50N0402 C99
C22P50N0402 C155 C22P50N0402 C155
C22P50N0402 C105 C22P50N0402 C105
C22P50N0402 C112 C22P50N0402 C112
C22P50N0402 C106 C22P50N0402 C106
C22P50N0402 C120 C22P50N0402 C120
C22P50N0402 C113 C22P50N0402 C113
C22P50N0402 C122 C22P50N0402 C122
C22P50N0402 C130 C22P50N0402 C130
C22P50N0402 C131 C22P50N0402 C131
C22P50N0402 C140 C22P50N0402 C140
C22P50N0402 C150 C22P50N0402 C150
C22P50N0402 C156 C22P50N0402 C156
C22P50N0402 C161 C22P50N0402 C161
C22P50N0402 C151 C22P50N0402 C151
C22P50N0402 C94 C22P50N0402 C94
C22P50N0402 C160 C22P50N0402 C160
C22P50N0402 C154 C22P50N0402 C154
MEM_MB_ADD15
MEM_MB_ADD14
MEM_MB_ADD13
MEM_MB_ADD12
MEM_MB_ADD11
MEM_MB_ADD10
MEM_MB_ADD9
MEM_MB_ADD8
MEM_MB_ADD7
MEM_MB_ADD6
MEM_MB_ADD5
MEM_MB_ADD4
MEM_MB_ADD3
MEM_MB_ADD2
MEM_MB_ADD1
MEM_MB_ADD0
MEM_MB_CAS_L
MEM_MB_WE_L
MEM_MB_RAS_L
MEM_MB_BANK2
MEM_MB_BANK1
MEM_MB_BANK0
Decoupling Between Processor and DIMMs
Layout: Spread out on VTT pour
0.1u/25V/6
C171
C171
C209
C209
0.1u/25V/6
0.1u/25V/6
0.1u/25V/6
C158
C158
C300
C300
0.1u/25V/6
0.1u/25V/6
C89
C89
0.1u/25V/6
0.1u/25V/6
C114
C114
0.1u/25V/6
0.1u/25V/6
C152
C152
0.1u/25V/6
0.1u/25V/6
C142
C142
0.1u/25V/6
0.1u/25V/6
C148
C148
0.1u/25V/6
0.1u/25V/6
C199
C199
0.1u/25V/6
0.1u/25V/6
C205
C205
0.1u/25V/6
0.1u/25V/6
C22P50N0402 C101 C22P50N0402 C101
C22P50N0402 C95 C22P50N0402 C95
C22P50N0402 C180 C22P50N0402 C180
C22P50N0402 C110 C22P50N0402 C110
C22P50N0402 C111 C22P50N0402 C111
C22P50N0402 C170 C22P50N0402 C170
C22P50N0402 C117 C22P50N0402 C117
C22P50N0402 C126 C22P50N0402 C126
C22P50N0402 C119 C22P50N0402 C119
C22P50N0402 C133 C22P50N0402 C133
C22P50N0402 C127 C22P50N0402 C127
C22P50N0402 C136 C22P50N0402 C136
C22P50N0402 C143 C22P50N0402 C143
C22P50N0402 C144 C22P50N0402 C144
C22P50N0402 C147 C22P50N0402 C147
C22P50N0402 C153 C22P50N0402 C153
C22P50N0402 C166 C22P50N0402 C166
C22P50N0402 C174 C22P50N0402 C174
C22P50N0402 C162 C22P50N0402 C162
C22P50N0402 C102 C22P50N0402 C102
C22P50N0402 C163 C22P50N0402 C163
C22P50N0402 C157 C22P50N0402 C157
C86
C86
0.1u/25V/6
0.1u/25V/6
VCC_DDR VCC_DDR
C124
C124
0.1u/25V/6
0.1u/25V/6
C139
C139
0.1u/25V/6
0.1u/25V/6
C115
C115
0.1u/25V/6
0.1u/25V/6
VCC_DDR
VTT_DDR
MEM_MB_CKE1
RN6 8P4R-47R0402 RN6 8P4R-47R0402
1
MEM_MB_CKE1 4,7
MEM_MB_CKE0 4,6
MEM_MA_BANK2 4,6,7
MEM_MA_ADD12 4,6,7
MEM_MA_ADD8 4,6,7
MEM_MB_ADD11 4,6,7
MEM_MB_ADD7 4,6,7
MEM_MB_ADD8 4,6,7
B B
MEM_MB_ADD4 4,6,7
MEM_MB_ADD3 4,6,7
MEM_MA_ADD4 4,6,7
MEM_MA_ADD3 4,6,7
MEM_MA_ADD0 4,6,7
MEM_MA_ADD10 4,6,7
MEM_MB_ADD0 4,6,7
MEM_MA_BANK1 4,6,7
MEM_MB_WE_L 4,6,7
MEM_MB_CAS_L 4,6,7
MEM_MA_WE_L 4,6,7
MEM_MA_CAS_L 4,6,7
MEM_MA_CKE1 4,7
MEM_MA_CKE0 4,6
MEM_MA_ADD15 4,6,7
MEM_MA_ADD14 4,6,7
MEM_MA0_ODT0 4,6
MEM_MB0_ODT0 4,6
MEM_MB_ADD13 4,6,7
MEM_MB0_CS_L1 4,6
MEM_MB1_CS_L0 4,7
MEM_MB1_ODT0 4,7
MEM_MB_CKE0
MEM_MA_BANK2
MEM_MA_ADD12
MEM_MA_ADD8
MEM_MB_ADD11
MEM_MB_ADD7
MEM_MB_ADD8
MEM_MB_ADD4
MEM_MB_ADD3
MEM_MA_ADD4
MEM_MA_ADD3
MEM_MA_ADD0
MEM_MA_ADD10
MEM_MB_ADD0
MEM_MA_BANK1
MEM_MB_WE_L
MEM_MB_CAS_L
MEM_MA_WE_L
MEM_MA_CAS_L
MEM_MA_CKE1
MEM_MA_CKE0
MEM_MA_ADD15
MEM_MA_ADD14
MEM_MA0_ODT0
MEM_MB0_ODT0
MEM_MB_ADD13
MEM_MB0_CS_L1
MEM_MB1_CS_L0
MEM_MB1_ODT0
RN9 8P4R-47R0402 RN9 8P4R-47R0402
RN12 8P4R-47R0402 RN12 8P4R-47R0402
RN14 8P4R-47R0402 RN14 8P4R-47R0402
RN19 8P4R-47R0402 RN19 8P4R-47R0402
RN5 8P4R-47R0402 RN5 8P4R-47R0402
RN20 8P4R-47R0402 RN20 8P4R-47R0402
2
3
4
5
6
7
8
1
2
3
4
5
6
7
8
1
2
3
4
5
6
7
8
1
2
3
4
5
6
7
8
1
2
3
4
5
6
7
8
1
2
3
4
5
6
7
8
1
2
3
4
5
6
7
8
R112 47R0402 R112 47R0402
R113 47R0402 R113 47R0402
MEM_MA1_CLK_H2 4,7
MEM_MA1_CLK_L2 4,7
MEM_MA1_CLK_H1 4,7
MEM_MA1_CLK_L1 4,7
MEM_MA1_CLK_H0 4,7
MEM_MA1_CLK_L0 4,7
MEM_MB1_CLK_H2 4,7
MEM_MB1_CLK_L2 4,7
MEM_MB1_CLK_H1 4,7
MEM_MB1_CLK_L1 4,7
A A
MEM_MB1_CLK_H0 4,7
MEM_MB1_CLK_L0 4,7
5
4
MEM_MA1_CLK_H2
MEM_MA1_CLK_L2
MEM_MA1_CLK_H1
MEM_MA1_CLK_L1
MEM_MA1_CLK_H0
MEM_MA1_CLK_L0
MEM_MB1_CLK_H2
MEM_MB1_CLK_L2
MEM_MB1_CLK_H1
MEM_MB1_CLK_L1
MEM_MB1_CLK_H0
MEM_MB1_CLK_L0
C184
C184
C1.5P50N0402
C1.5P50N0402
C53
C53
C1.5P50N0402
C1.5P50N0402
C134
C134
C1.5P50N0402
C1.5P50N0402
C179
C179
C1.5P50N0402
C1.5P50N0402
C47
C47
C1.5P50N0402
C1.5P50N0402
C141
C141
C1.5P50N0402
C1.5P50N0402
3
VTT_DDR
0.1u/25V/6
0.1u/25V/6
C100
C100
C104
C104
0.1u/25V/6
0.1u/25V/6
C73
C73
0.1u/25V/6
0.1u/25V/6
C77
C77
0.1u/25V/6
0.1u/25V/6
C71
C71
0.1u/25V/6
0.1u/25V/6
C75
C75
0.1u/25V/6
0.1u/25V/6
2
C243
C243
0.1u/25V/6
0.1u/25V/6
C255
C255
0.1u/25V/6
0.1u/25V/6
C239
C239
0.1u/25V/6
0.1u/25V/6
C109
0.1u/25V/6
0.1u/25V/6
0.1u/25V/6
0.1u/25V/6
0.1u/25V/6
0.1u/25V/6
Micro Star Restricted Secret
Micro Star Restricted Secret
Micro Star Restricted Secret
Title
Title
Title
KB/MS/LPT/COM Port
KB/MS/LPT/COM Port
KB/MS/LPT/COM Port
Document Number
Document Number
Document Number
MICRO-STAR INT'L CO.,LTD.
MICRO-STAR INT'L CO.,LTD.
MICRO-STAR INT'L CO.,LTD.
No. 69, Li-De St, Jung-He City,
No. 69, Li-De St, Jung-He City,
No. 69, Li-De St, Jung-He City,
Taipei Hsien, Taiwan
Taipei Hsien, Taiwan
Taipei Hsien, Taiwan
http://www.msi.com.tw
http://www.msi.com.tw
http://www.msi.com.tw
C293
C293
C225
C225
C109
C294
C294
0.1u/25V/6
0.1u/25V/6
MS-7227H1
MS-7227H1
MS-7227H1
C145
C145
C132
C132
0.1u/25V/6
0.1u/25V/6
0.1u/25V/6
0.1u/25V/6
Last Revision Date:
Last Revision Date:
Last Revision Date:
Wednesday, October 05, 2005
Wednesday, October 05, 2005
Wednesday, October 05, 2005
Sheet
Sheet
Sheet
1
Rev
Rev
Rev
0A
0A
0A
of
of
of
83 8
83 8
83 8
5
D D
C C
B B
VDDHT_PKG
HT_CADOUT_H15
HT_CADOUT_L15
HT_CADOUT_H14
HT_CADOUT_L14
HT_CADOUT_H13
HT_CADOUT_L13
HT_CADOUT_H12
HT_CADOUT_L12
HT_CADOUT_H11
HT_CADOUT_L11
HT_CADOUT_H10
HT_CADOUT_L10
HT_CADOUT_H9
HT_CADOUT_L9
HT_CADOUT_H8
HT_CADOUT_L8
HT_CADOUT_H7
HT_CADOUT_L7
HT_CADOUT_H6
HT_CADOUT_L6
HT_CADOUT_H5
HT_CADOUT_L5
HT_CADOUT_H4
HT_CADOUT_L4
HT_CADOUT_H3
HT_CADOUT_L3
HT_CADOUT_H2
HT_CADOUT_L2
HT_CADOUT_H1
HT_CADOUT_L1
HT_CADOUT_H0
HT_CADOUT_L0
HT_CLKOUT_H1 3
HT_CLKOUT_L1 3
HT_CLKOUT_H0 3
HT_CLKOUT_L0 3
HT_CTLOUT_H0 3
HT_CTLOUT_L0 3
R146 49.9/6/1% R146 49.9/6/1%
HT_RXCALN
HT_RXCALP
4
R19
R18
R21
R22
U22
U21
U18
U19
W19
W20
AC21
AB22
AB20
AA20
AA19
R25
U25
U24
U23
AA25
AA24
AB23
AA23
AB24
AB25
AC24
AC25
W21
W22
W25
C24
U13A
U13A
HT_RXCAD15P
HT_RXCAD15N
HT_RXCAD14P
HT_RXCAD14N
HT_RXCAD13P
HT_RXCAD13N
HT_RXCAD12P
HT_RXCAD12N
HT_RXCAD11P
HT_RXCAD11N
HT_RXCAD10P
HT_RXCAD10N
HT_RXCAD9P
HT_RXCAD9N
HT_RXCAD8P
Y19
HT_RXCAD8N
T24
HT_RXCAD7P
HT_RXCAD7N
HT_RXCAD6P
HT_RXCAD6N
V23
HT_RXCAD5P
HT_RXCAD5N
V24
HT_RXCAD4P
V25
HT_RXCAD4N
HT_RXCAD3P
HT_RXCAD3N
HT_RXCAD2P
HT_RXCAD2N
HT_RXCAD1P
HT_RXCAD1N
HT_RXCAD0P
HT_RXCAD0N
HT_RXCLK1P
HT_RXCLK1N
Y24
HT_RXCLK0P
HT_RXCLK0N
P24
HT_RXCTLP
P25
HT_RXCTLN
A24
HT_RXCALP
HT_RXCALN
RS485
RS485
3
PART 1 OF 5
PART 1 OF 5
HYPER TRANSPORT I/F
HYPER TRANSPORT I/F
HT_TXCAD15P
HT_TXCAD15N
HT_TXCAD14P
HT_TXCAD14N
HT_TXCAD13P
HT_TXCAD13N
HT_TXCAD12P
HT_TXCAD12N
HT_TXCAD11P
HT_TXCAD11N
HT_TXCAD10P
HT_TXCAD10N
HT_TXCAD9P
HT_TXCAD9N
HT_TXCAD8P
HT_TXCAD8N
HT_TXCAD7P
HT_TXCAD7N
HT_TXCAD6P
HT_TXCAD6N
HT_TXCAD5P
HT_TXCAD5N
HT_TXCAD4P
HT_TXCAD4N
HT_TXCAD3P
HT_TXCAD3N
HT_TXCAD2P
HT_TXCAD2N
HT_TXCAD1P
HT_TXCAD1N
HT_TXCAD0P
HT_TXCAD0N
HT_TXCLK1P
HT_TXCLK1N
HT_TXCLK0P
HT_TXCLK0N
HT_TXCTLP
HT_TXCTLN
HT_TXCALP
HT_TXCALN
P21
P22
P18
P19
M22
M21
M18
M19
L18
L19
G22
G21
J20
J21
F21
F22
N24
N25
L25
M24
K25
K24
J23
K23
G25
H24
F25
F24
E23
F23
E24
E25
L21
L22
J24
J25
N23
P23
C25
D24
HT_TXCALP
HT_TXCALN
2
HT_CADIN_H15
HT_CADIN_L15
HT_CADIN_H14
HT_CADIN_L14
HT_CADIN_H13
HT_CADIN_L13
HT_CADIN_H12
HT_CADIN_L12
HT_CADIN_H11
HT_CADIN_L11
HT_CADIN_H10
HT_CADIN_L10
HT_CADIN_H9
HT_CADIN_L9
HT_CADIN_H8
HT_CADIN_L8
HT_CADIN_H7
HT_CADIN_L7
HT_CADIN_H6
HT_CADIN_L6
HT_CADIN_H5
HT_CADIN_L5
HT_CADIN_H4
HT_CADIN_L4
HT_CADIN_H3
HT_CADIN_L3
HT_CADIN_H2
HT_CADIN_L2
HT_CADIN_H1
HT_CADIN_L1
HT_CADIN_H0
HT_CADIN_L0
R139 100/6/1% R139 100/6/1% R149 49.9/6/1% R149 49.9/6/1%
HT_CLKIN_H1 3
HT_CLKIN_L1 3
HT_CLKIN_H0 3
HT_CLKIN_L0 3
HT_CTLIN_H0 3
HT_CTLIN_L0 3
1
HT_CADIN_H[15..0] 3
HT_CADIN_L[15..0] 3
HT_CADOUT_H[15..0] 3
HT_CADOUT_L[15..0] 3
A A
5
HT_CADIN_H[15..0]
HT_CADIN_L[15..0]
HT_CADOUT_H[15..0]
HT_CADOUT_L[15..0]
Micro Star Restricted Secret
Micro Star Restricted Secret
Micro Star Restricted Secret
Rev
Rev
Title
Title
Title
Document Number
Document Number
Document Number
MICRO-STAR INT'L CO.,LTD.
MICRO-STAR INT'L CO.,LTD.
MICRO-STAR INT'L CO.,LTD.
No. 69, Li-De St, Jung-He City,
No. 69, Li-De St, Jung-He City,
No. 69, Li-De St, Jung-He City,
Taipei Hsien, Taiwan
Taipei Hsien, Taiwan
Taipei Hsien, Taiwan
http://www.msi.com.tw
http://www.msi.com.tw
4
3
http://www.msi.com.tw
2
C51G-1/ HT CPU & MCP
C51G-1/ HT CPU & MCP
C51G-1/ HT CPU & MCP
MS-7227H1
MS-7227H1
MS-7227H1
Last Revision Date:
Last Revision Date:
Last Revision Date:
Wednesday, October 05, 2005
Wednesday, October 05, 2005
Wednesday, October 05, 2005
Sheet
Sheet
Sheet
93 8
93 8
93 8
1
Rev
0A
0A
0A
of
of
of
A
AB7
AB6
W11
W12
AA11
AB11
AA7
AB9
AA9
W14
W15
AA12
AB12
AA14
AB14
G5
G4
J8
J7
J4
J5
L8
L7
L4
L5
M8
M7
M4
M5
P8
P7
P4
P5
R4
R5
R7
R8
U4
U5
W4
W5
Y4
Y5
V9
W9
Y7
PED_RX0 20
PED_RX0* 20
PED_RX1 20
PED_RX1* 20
PED_RX2 20
PED_RX2* 20
4 4
3 3
2 2
A_RX2P 14
A_RX2N 14
A_RX3P 14
A_RX3N 14
PE0_RX 20
PE0_RX* 20
A_RX0P 14
A_RX0N 14
A_RX1P 14
A_RX1N 14
PED_RX3 20
PED_RX3* 20
PED_RX4 20
PED_RX4* 20
PED_RX5 20
PED_RX5* 20
PED_RX6 20
PED_RX6* 20
PED_RX7 20
PED_RX7* 20
PED_RX8 20
PED_RX8* 20
PED_RX9 20
PED_RX9* 20
PED_RX10 20
PED_RX10* 20
PED_RX11 20
PED_RX11* 20
PED_RX12 20
PED_RX12* 20
PED_RX13 20
PED_RX13* 20
PED_RX14 20
PED_RX14* 20
PED_RX15 20
PED_RX15* 20
A_RX2P
A_RX2N
A_RX3P
A_RX3N
PE0_RX
PE0_RX*
R174 10K R174 10K
*
R177 8.25K/6/1% R177 8.25K/6/1%
*
U13B
U13B
GFX_RX0P
GFX_RX0N
GFX_RX1P
GFX_RX1N
GFX_RX2P
GFX_RX2N
GFX_RX3P
GFX_RX3N
GFX_RX4P
GFX_RX4N
GFX_RX5P
GFX_RX5N
GFX_RX6P
GFX_RX6N
GFX_RX7P
GFX_RX7N
GFX_RX8P
GFX_RX8N
GFX_RX9P
GFX_RX9N
GFX_RX10P
GFX_RX10N
GFX_RX11P
GFX_RX11N
GFX_RX12P
GFX_RX12N
GFX_RX13P
GFX_RX13N
GFX_RX14P
GFX_RX14N
GFX_RX15P
GFX_RX15N
GPP_RX0P
GPP_RX0N
GPP_RX1P
GPP_RX1N
GPP_RX2P
GPP_RX2N
GPP_RX3P
GPP_RX3N
SB_RX0P
SB_RX0N
SB_RX1P
SB_RX1N
PCEH_ISET
PCEH_TXISET
RS485
RS485
B
PART 2 OF 5
PART 2 OF 5
PCIE GFX I/F
PCIE GFX I/F
PCIE I/F GPP
PCIE I/F GPP
PCIE I/F SB
PCIE I/F SB
GFX_TX0P
GFX_TX0N
GFX_TX1P
GFX_TX1N
GFX_TX2P
GFX_TX2N
GFX_TX3P
GFX_TX3N
GFX_TX4P
GFX_TX4N
GFX_TX5P
GFX_TX5N
GFX_TX6P
GFX_TX6N
GFX_TX7P
GFX_TX7N
GFX_TX8P
GFX_TX8N
GFX_TX9P
GFX_TX9N
GFX_TX10P
GFX_TX10N
GFX_TX11P
GFX_TX11N
GFX_TX12P
GFX_TX12N
GFX_TX13P
GFX_TX13N
GFX_TX14P
GFX_TX14N
GFX_TX15P
GFX_TX15N
GPP_TX0P
GPP_TX0N
GPP_TX1P
GPP_TX1N
GPP_TX2P
GPP_TX2N
GPP_TX3P
GPP_TX3N
SB_TX0P
SB_TX0N
SB_TX1P
SB_TX1N
PCEH_PCAL
PCEH_NCAL
J1
H2
K2
K1
K3
L3
L1
L2
N2
N1
P2
P1
P3
R3
R1
R2
T2
U1
V2
V1
V3
W3
W1
W2
Y2
AA1
AA2
AB2
AB1
AC1
AE3
AE4
AD8
AE8
AD7
AE7
AD4
AE5
AD5
AD6
AE9
AD10
AC8
AD9
AD11
AE11
GPP_TX0P_C
GPP_TX0N_C
GPP_TX1P_C
GPP_TX1N_C
PE0_TX
PE0_TX*
A_TX0P_C
A_TX0N_C
A_TX1P_C
A_TX1N_C
R183 150/6/1% R183 150/6/1%
R186 82.5/6/1% R186 82.5/6/1%
C329 X_0.1u/16V/4 C329 X_0.1u/16V/4
C325 X_0.1u/16V/4 C325 X_0.1u/16V/4
C344 X_0.1u/16V/4 C344 X_0.1u/16V/4
C340 X_0.1u/16V/4 C340 X_0.1u/16V/4
*
*
C
PED_TX0 20
PED_TX0* 20
PED_TX1 20
PED_TX1* 20
PED_TX2 20
PED_TX2* 20
PED_TX3 20
PED_TX3* 20
PED_TX4 20
PED_TX4* 20
PED_TX5 20
PED_TX5* 20
PED_TX6 20
PED_TX6* 20
PED_TX7 20
PED_TX7* 20
PED_TX8 20
PED_TX8* 20
PED_TX9 20
PED_TX9* 20
PED_TX10 20
PED_TX10* 20
PED_TX11 20
PED_TX11* 20
PED_TX12 20
PED_TX12* 20
PED_TX13 20
PED_TX13* 20
PED_TX14 20
PED_TX14* 20
PED_TX15 20
PED_TX15* 20
VDDA12_PKG2
C315 0.1u/16V/4 C315 0.1u/16V/4
C309 0.1u/16V/4 C309 0.1u/16V/4
C321 0.1u/16V/4 C321 0.1u/16V/4
C318 0.1u/16V/4 C318 0.1u/16V/4
A_TX2P 14
A_TX2N 14
A_TX3P 14
A_TX3N 14
PE0_TX 20
PE0_TX* 20
A_TX0P 14
A_TX0N 14
A_TX1P 14
A_TX1N 14
D
E
AVIOD STUB
RS690/485 2/4-LANE ALINK CONFIGURATION
AVIOD STUB
RS690/485 2/4-LANE ALINK CONFIGURATION
RS690/RS485 CHANGE TABLE
1 1
RS690
RS485
R213 NB/DIFF
DNI
8.25K
A
R214
10K
R215 R216
2K 562R 1.47K
150R 82.5R
Micro Star Restricted Secret
Micro Star Restricted Secret
Micro Star Restricted Secret
Title
Title
Title
Document Number
Document Number
Document Number
MICRO-STAR INT'L CO.,LTD.
MICRO-STAR INT'L CO.,LTD.
MICRO-STAR INT'L CO.,LTD.
No. 69, Li-De St, Jung-He City,
No. 69, Li-De St, Jung-He City,
No. 69, Li-De St, Jung-He City,
Taipei Hsien, Taiwan
Taipei Hsien, Taiwan
Taipei Hsien, Taiwan
http://www.msi.com.tw
http://www.msi.com.tw
B
C
D
http://www.msi.com.tw
C51G-3/PWR/GND
C51G-3/PWR/GND
C51G-3/PWR/GND
MS-7227H1
MS-7227H1
MS-7227H1
Last Revision Date:
Last Revision Date:
Last Revision Date:
Sheet
Sheet
Sheet
E
Wednesday, October 05, 2005
Wednesday, October 05, 2005
Wednesday, October 05, 2005
10 38
10 38
10 38
Rev
Rev
Rev
0A
0A
0A
of
of
of