Page 1
1
COVER SHEET
BLOCK DIAGRAM
CLOCK MAP
POWER MAP
01
02
03
04
MS-7195
CPU:
Version 100
Intel Prescott ( L2=2MB ) - 3.4G & Above
GPIO & JUMPER SETTING
Intel LGA775-CPU
Intel Lakeport -GMCH
DDR II DIMM 1and DIMM2 1 & 2
DDR II Termination & MCH2.5V
SDVO CX25902
05
06-08
09-12
13
14
15
Intel Cendar Mill (65nm) - 3.73G & Above
Intel Smithfield (90nm Dual core)
System Chipset:
Intel Lakeport - GMCH (North Bridge)
Intel ICH7 (South Bridge)
On Board Chipset:
VGA CONNECTOR
ICH7
Clock Generator - ICS954101DF & FWH
16
17-19
20
BIOS -- FWH FLASH 4Mb
LAN - INTEL 82562GZ
1394 -- VIA VT-6307/6308
A A
VIA VT-6307/6308
ALC882 22
21
Clock Generator - ICS954101DF
SDVO CX25902
LAN-INTEL 82562GZ
PCI-E & PCI CONNECTOR
H/W Monitor & FAN CONTROLLER
IDE & SATA CONNECTOR
ATX & F_ PANEL
USB CONNECTORS
MS7 ACPI Controller
DVI-I & TV-OUT CONNECTOR
VRM10.1 Intersil 6566 3Phase
Decoupling CAP
23
24
25
26
27
28
29
30
31
32
Main Memory:
DDR II * 2 (Max 4GB)
Expansion Slots:
PCI-E16 * 1
Intersil PWM:
Controller:
1
INTERSIL 6566 3PHASE
Title
COVER SHEET
Size Document Number Rev
Custom
Date: Sheet
MICRO-START INT'L CO.,LTD.
MS-7195 100
of
13 3 Friday, September 09, 2005
Page 2
VRM_GD
1
VTT_PWG
DVI-I
S-VIDEO/RCA
P.31
HD_RST#
VRM 10.1
Intersil 6565
3-Phase PWM
PCIRST#1
SDVO
CX25902
IDE Primary
P.9
P.17
P.18
P.30
UltraDMA
33/66/100
Intel LGA775 Processor
FSB
H_PWRGD
H_CPURST#
Lakeport
GMCH
P.10~13
DMI
PLRST#
VRM_GD
P.6~8
DDRII
533/667MHz
PWR_GD
PWR_GD
Block Diagram
PWR_GD
4 DDR II
DIMM
Modules
P.14~16
VRM_GD
MS7
VID_GD
P.32
RSMRST#
HD_RST#
PWR_OK
PCIRST_ICH6#
SLP_S4#
SERIAL ATA1
A A
USB2.0
USB Port0~ 7
P.24
P.29
USB
RSMRST#
ICH7
P.20~22
LPC Bus
SLP_S3#
PS_ON#
PWR_OK
ATX1
P.23 P.23
PCIRST#2
LAN
INTEL
82562GZ
1394
VIA VT-6307
P.26
P.25
P.27
LCI
PCI
PWRBTN#
JFP1
FP_RST#
P.24
FWH
P.30
PCIRST#2
1
PWRBTN#
Title
BLOCK DIAGRAM
Size Document Number R e v
Custom
Date: Sheet
MICRO-START INT'L CO.,LTD.
MS-7195 100
23 3 Friday, Sept ember 09, 2005
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Page 3
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4
3
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HCLK
LGA775
CLOCK MAP
D D
ICS954101 1/2
Clock
Generator
C C
MCHCLK
DOTCLK
96MHz
ICHCLK
SATACLK
USB48MHz
ICH14.318MHz
SIO48MHz
FWH_PCLK
33MHz
Lakeport
MCH
ICH7
W83627THF
LPC IO
FWH
1394_PCLK
33MHz
B B
LAN_PCLK
33MHz
VT6307
1394
REALTEK
8100C/8100SB
PCI1
A A
5
PCICLK[0..3]
33MHz
PCI2
Title
CLOCK MAP
Size Document Number Re v
Custom
4
3
2
Date: Sheet
MICRO-START INT'L CO.,LTD.
MS-7195 100
1
of
33 3 Friday, September 09, 2005
Page 4
5
POWER MAP
4
3
2
1
D D
ATX POWER
+12V +5V +3.3V +5VSB
125A 5.3A
MSI
C C
ACPI
Controller
MS - 7
38.81*1.8/5/0.8 = 17.46A
5VDIMM
MSI
MS6 +
V_1P5_CORE
V_1P05_CORE
B B
V_FSB_VTT
4+9.4+15.3+2.6+1.31+6.2 = 38.81A
VCC_DDR
17.87A
1.31A
6.2A
LGA775 VRM 10.1
Lakeport
4A
MCH
13.8A + 1.5A
= 15.3A
9.4A
DDR2 X 2
1.2A
TBD (2.57A)
1.31A
ICH7
0.7A
0.9A
14mA
VLAN25
INTEL
3.775A
VCC3_SB VTT_DDR
W83310DS
1.2A
Tekoa
VLAN12
5VDUAL
A A
5
4A
4
4.0A
USB
Title
Size Docum e n t N u mb er Re v
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3
2
Date: Sheet
MICRO-START INT'L CO.,LTD.
POWER MAP
MS-7195 100
1
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7
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ICH7
GPIO Alt Func Pin I/O/NC Power PU SMI Tol Default Signal Name
GPIO[0] BM_BUSY# AB18 I/O VCC3
Y Y 3.3 Input SIO_SMI#
GPIO[1] PCIREQ[5]# C8 I/O VCC5 Y Y 5 Input PREQ#5
GPIO[2] PIRQE# G8 I/OD VCC5 Y Y 5 Input PIRQ#E
GPIO[3] PIRQF# F7 I/OD VCC5 Y Y 5 Input PIRQ#F
GPIO[4] PIRQG# F8 I/OD VCC5 Y Y 5 Input PIRQ#G
D D
GPIO[5] PIRQH# G7 I/OD VCC5 Y Y 5 Input PIRQ#H
FWH
GPIO Pin# Power Tol Signal Name
FPGI[0] 6 Main 3.3 pull-down
FPGI[1] 5 Main 3.3 pull-down
FPGI[2] 4 Main 3.3 pull-down
FPGI[3] 3 Main
FPGI[4] 30 Main 3.3 pull-down GPIO[6] unmuxed AC21 I/O VCC3 Y Y 3.3 Input strapped hi
GPIO[7] unmuxed AC18 I/O VCC3 Y Y 3.3 Input strapped hi
GPIO[8] unmuxed E21 I/O VCC3_SB
Y Y 3.3 Input SIO_PME#
GPIO[9] unmuxed E20 I/O VCC3_SB Y Y 3.3 Input strapped hi
GPIO[10] unmuxed A20 I/O VCC3_SB
Y Y 3.3 Input strapped hi
GPIO[11] SMBALERT# B23 I/O VCC3_SB Y Y 3.3 Input TEMP_THERM#
GPIO[12] unmuxed F19 I/O VCC3_SB Y Y 3.3 Input strapped hi
GPIO[13] unmuxed E19 I/O VCC3_SB Y Y 3.3 Input BRD_ID1
GPIO[14] unmuxed R4 I/O VCC3_SB Y Y 3.3 Input BRD_ID2
GPIO[15] unmuxed E22 I/O VCC3_SB Y Y 3.3 Input BRD_ID0
GPIO[16] unmuxed AC22 I/O VCC3 N N 3.3 Output NC
GPIO[17] PCIGNT[5]# D8 I/O VCC3 N N 3.3 Output PGNT#5
GPIO[18] unmuxed AC20 I/O VCC3 N N 3.3 Output TBL#
GPIO[19] SATA1GP AH18 I/O VCC3 Y N 3.3 Input strapped hi
GPIO[20] unmuxed AF21 I/O VCC3 N N 3.3 Output NC
GPIO[21] SATA0GP AF19 I/O VCC3 Y N 3.3 Input strapped hi
C C
GPIO[22] PCIREQ[4]# A13 I/O VCC3 N N 3.3 Native PREQ#4
GPIO[23] LDRQ1# AA5 I/O VCC3 Y N 3.3 Native strapped hi
GPIO[24] unmuxed R3 I/O VCC3_SB Y N 3.3 Output LAN_DISABLE#
GPIO[25] unmuxed D20 I/O VCC3_SB Y N 3.3 Output NC
GPIO[26] EL_RSVD A21 I/O VCC3_SB N N 3.3 Output NC
GPIO[27] EL_STATE0 B21 I/O VCC3_SB N N 3.3 Output NC
GPIO[28] EL_STATE1 E23 I/O VCC3_SB N N 3.3 Output ENET_DISABLE#
GPIO[29] OC5# C3 I/O VCC3_SB N N 3.3 Native OC#1
GPIO[30] OC6# A2 I/O VCC3_SB N N 3.3 Native OC#1
GPIO[31] OC7# B3 I/O VCC3_SB N N 3.3 Native OC#1
GPIO[32] unmuxed AG18 I/O VCC3 Y N 3.3 Output strapped hi#
GPIO[33] unmuxed AC19 I/O VCC3 N N 3.3 Output BIOS_WP#
GPIO[34] unmuxed U2 I/O VCC3 N N 3.3 Output RISER_DETECT_2
GPIO[35] SATACLKREQ# AD21 I/O VCC3 N N 3.3 Output RISER_DETECT_1
GPIO[36] SATA2GP AH19 I/O VCC3 Y N 3.3 Input strapped hi
GPIO[37] SATA3GP AE19 I/O VCC3 Y N 3.3 Input strapped hi
GPIO[38] unmuxed AD20 I/O VCC3 Y N 3.3 Input strapped hi
B B
GPIO[39] unmuxed AE20 I/O VCC3 Y N 3.3 Input strapped hi
GPIO[48] PCIGNT4# A14 I/O VCC3 N N 3.3 Native PGNT4#
GPIO[49] CPUPWRGD AG24 I/O V_CPU_IO N N CPU Native H_PWRGD
Following are the GPIOs that need to be terminated properly if not used:
GPIO[39:36,23:21,19,7:0]: default as inputs and should be pulled up to Vcc3_3 if unused.
GPIO[31:29,15:8]: default as inputs and should be pulled up to VccSus3_3 if unused.
Note: FWH GPs should only be used for static options,
do not put dynamic nets on these
3.3 pull-down
PCI Config.
DEVICE
PCI1
PIRQ#E 1394
PIRQ#E
PIRQ#F
PIRQ#G
PIRQ#H
REQ#/GNT# MCP1 INT Pin
PREQ#3
PGNT#3
PREQ#1
PREQ#2
PGNT#2
IDSEL
AD19
AD16
AD17
CLOCK
1394_PCLK
PCI_CLK1 PGNT#1
PCI_CLK2
DDRII DIMM Config.
DEVICE ADDRESS
DIMM 1
DIMM 2
DIMM 3
DIMM 4
A0H
A1H
A2H
A3H
CLOCK
P_DDR0_A/N_DDR0_A
P_DDR1_A/N_DDR1_A
P_DDR2_A/N_DDR2_A
P_DDR3_A/N_DDR3_A
P_DDR4_A/N_DDR4_A
P_DDR5_A/N_DDR5_A
P_DDR0_B/N_DDR0_B
P_DDR1_B/N_DDR1_B
P_DDR2_B/N_DDR2_B
P_DDR3_B/N_DDR3_B
P_DDR4_B/N_DDR4_B
P_DDR5_B/N_DDR5_B
A A
8
7
6
5
4
JUMPER SETTING
JBAT1
(1-2)NORMAL
3
(2-3)CLEAR
Title
Size Document Number Re v
Custom
Date: Sheet
2
MICRO-START INT'L CO.,LTD.
GPIO MAP
MS-7195 100
53 3 Friday, September 09, 2005
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CPU SIGNAL BLOCK
D D
H_DBI#[0..3] 9
H_IERR# 7
H_FERR# 7,17
H_STPCLK# 17
H_DBSY# 9
H_DRDY# 9
H_TRDY# 9
C C
VTT_OUT_LEFT
B B
A A
H_ADS# 9
H_BNR# 9
H_HITM# 9
H_DEFER# 9
CPU_TMPA 25
VTIN_GND 25
TRMTRIP# 7,17
H_PROCHOT# 7
H_IGNNE# 17
ICH_H_SMI# 17
R96 _62R0402
H_FSBSEL0 7,11,20
H_FSBSEL1 7,11,20
H_FSBSEL2 7,11,20
H_PWRGD 7,17
H_CPURST# 7,9
H_D#[0..63] 9
H_LOCK# 9
H_HIT# 9
H_DBI#0
H_DBI#1
H_DBI#2
H_DBI#3
H_INIT# 17
H_BPRI# 9
H_TDI
H_TDO
H_TMS
H_TRST#
H_TCK
H_A20M# 17
H_TESTHI13
H_D#63
H_D#62
H_D#61
H_D#60
H_D#59
H_D#58
H_D#57
H_D#56
H_D#55
H_D#54
G11
D19
C20
AB2
AB3
AD3
AD1
AF1
AC1
AG1
AE1
AL1
AK1
AE8
AL2
AH2
AE6
G10
D16
A20
AA2
G29
H30
G30
G23
B22
A22
A19
B19
B21
C21
B18
A17
B16
C18
A8
F2
R3
M3
P3
H4
B2
C1
E3
D2
C3
C2
D4
E4
G8
G7
M2
N2
P2
K3
L2
N5
C9
Y1
V2
N1
H_A#[3..31] 9
U6A
DBI0#
DBI1#
DBI2#
DBI3#
EDRDY#
IERR#
MCERR#
FERR#/PBE#
STPCLK#
BINIT#
INIT#
RSP#
DBSY#
DRDY#
TRDY#
ADS#
LOCK#
BNR#
HIT#
HITM#
BPRI#
DEFER#
TDI
TDO
TMS
TRST#
TCK
THERMDA
THERMDC
THERMTRIP#
GND/SKTOCC#
PROCHOT#
IGNNE#
SMI#
A20M#
TESTI_13
RSVD
RESERVED0
RESERVED1
RESERVED2
RESERVED3
RESERVED4
RESERVED5
BOOTSELECT
LL_ID0
LL_ID1
BSEL0
BSEL1
BSEL2
PWRGOOD
RESET#
D63#
D62#
D61#
D60#
D59#
D58#
D57#
D56#
D55#
D54#
B15
H_D#53
D53#
H_D#52
H_A#6
H_A#8
H_A#10
H_A#5
H_A#4
H_A#7
H_A#26
H_A#31
H_A#30
H_A#29
H_A#28
H_A#27
AJ6
AJ5
AH5
AH4
AG5
AG4
AG6
AF4
AF5
AB4
A35#
A34#
A33#
A32#
A31#
A30#
A29#
A28#
A27#
D52#
D51#
D50#
D49#
D48#
D47#
D46#
D45#
D44#
D43#
D42#
D41#
D40#
F21
G22
H_D#47
D22
H_D#46
E22
H_D#45
G21
H_D#44
H_D#43
E21
H_D#42
F20
H_D#41
E19
H_D#40
E18
H_D#39
A14
C14
C15
D17
D20
H_D#49
H_D#48
H_D#51
H_D#50
H_A#25
A26#
D39#
H_D#38
AC5
F18
A25#
D38#
H_A#24
AB5
F17
H_D#37
H_A#23
A24#
D37#
H_D#36
H_A#19
H_A#22
H_A#21
AA5
AD6
AA4
A23#
A22#
D36#
D35#
E16
G17
G18
H_D#34
H_D#35
H_A#20
A21#
A20#Y4A19#Y6A18#W6A17#
D34#
D33#
D32#
E15
G16
H_D#33
H_D#32
H_A#17
H_A#18
H_A#16
H_A#15
AB6
A16#W5A15#V4A14#V5A13#U4A12#U5A11#T4A10#
D31#
D30#
D29#
D28#
F15
F14
G15
G14
H_D#30
H_D#31
H_D#29
H_D#28
H_A#14
G13
H_D#27
H_A#13
D27#
H_D#26
H_A#12
H_A#11
U6
D26#
D25#
D24#
F12
F11
E13
D13
H_D#25
H_D#24
H_D#23
H_A#9
A9#T5A8#R4A7#M4A6#L4A5#M5A4#P6A3#
D23#
D22#
D21#
D20#D7D19#E9D18#F9D17#F8D16#G9D15#
E10
D10
H_D#19
H_D#22
H_D#18
H_D#21
H_D#20
H_D#17
H_A#3
L5
H_D#16
D11
H_D#15
AC2
C12
H_D#14
DBR#
D14#
B12
H_D#13
D13#
VCC_VRM_SENSE
VSS_VRM_SENSE
AJ3
AN4
AN3
AN6
AN5
ITP_CLK1
VSS_SENSE
VCC_SENSE
VSS_MB_REGULATION
VCC_MB_REGULATION
D12#D8D11#
D10#
D9#
D8#
D7#A7D6#B7D5#B6D4#A5D3#C6D2#A4D1#C5D0#
B10
A11
A10
C11
H_D#7
H_D#12
H_D#8
H_D#9
H_D#11
H_D#10
R79 X_1KR1%0402-1
TP1
VID5
VID4
AM5
AL4
AK4
AM7
AK3
VID6#
VID5#
VID4#
RSVD
VID_SELECT
ITP_CLK0
GTLREF_SEL
CS_GTLREF
LINT0/INTR
H_D#4
H_D#5
H_D#1
H_D#6
H_D#3
H_D#2
VID2
VID0
VID1
VID3
AL6
AM3
AL5
AM2
VID3#
VID2#
VID1#
VID0#
GTLREF0
GTLREF1
BPM5#
BPM4#
BPM3#
BPM2#
BPM1#
BPM0#
PCREQ#
REQ4#
REQ3#
REQ2#
REQ1#
REQ0#
TESTHI12
TESTHI11
TESTHI10
TESTHI9
TESTHI8
TESTHI7
TESTHI6
TESTHI5
TESTHI4
TESTHI3
TESTHI2
TESTHI1
TESTHI0
FORCEPH
RSVD
BCLK1#
BCLK0#
RS2#
RS1#
RS0#
AP1#
AP0#
BR0#
COMP5
COMP4
COMP3
COMP2
COMP1
COMP0
DP3#
DP2#
DP1#
DP0#
ADSTB1#
ADSTB0#
DSTBP3#
DSTBP2#
DSTBP1#
DSTBP0#
DSTBN3#
DSTBN2#
DSTBN1#
DSTBN0#
LINT1/NMI
ZIF-SOCK775-15u
B4
H_D#0
FP_RST# 18,27
C26
C10U6.3X51206
VID[0..5] 31
R61 _62R0402
AN7
CPU_GTLREF0
H1
CPU_GTLREF1
H2
TP_GTLREF_SEL
H29
MCH_GTLREF_CPU
E24
H_BPM#5
AG3
H_BPM#4
AF2
H_BPM#3
AG2
H_BPM#2
AD2
H_BPM#1
AJ1
H_BPM#0
AJ2
G5
H_REQ#4
J6
H_REQ#3
K6
H_REQ#2
M6
H_REQ#1
J5
H_REQ#0
K4
H_TESTHI12
W2
H_TESTHI11
P1
H_TESTHI10
H5
H_TESTHI9
G4
H_TESTHI8
G3
F24
G24
G26
G27
G25
H_TESTHI2_7
F25
H_TESTHI1
W3
H_TESTHI0
F26
RSVD_AK6
AK6
RSVD_G6
G6
G28
F28
H_RS#2
A3
H_RS#1
F5
H_RS#0
B3
U3
U2
F3
H_COMP5
T2
H_COMP4
J2
H_COMP3
R1
H_COMP2
G2
H_COMP1
T1
H_COMP0
A13
J17
H16
H15
J16
AD5
R6
C17
G19
E12
B9
A16
G20
G12
C8
L1
K1
RN5 8P4R-62R0402
1 2
3 4
5 6
7 8
R103 _62R0402
R115 _62R0402
R118 _62R0402
R114 _62R0402
R51 X_62R0402
R99 X_62R0402
CK_H_CPU# 20
CK_H_CPU 20
H_RS#[0..2] 9
TP2
TP3
R86 _60.4R1%0402-LF
R97 _60.4R1%0402-LF
R89 _60.4R1%0402-LF
R100 _60.4R1%0402-LF
R85 _60.4R1%0402-LF
R116 _60.4R1%0402-LF
TP5
TP8
TP6
TP4
H_ADSTB#1 9
H_ADSTB#0 9
H_DSTBP#3 9
H_DSTBP#2 9
H_DSTBP#1 9
H_DSTBP#0 9
H_DSTBN#3 9
H_DSTBN#2 9
H_DSTBN#1 9
H_DSTBN#0 9
H_NMI 17
H_INTR 17
VCC_VRM_SENSE 31
VSS_VRM_SENSE 31
CPU_GTLREF0 7
CPU_GTLREF1 7
TP7
MCH_GTLREF_CPU 9
H_REQ#[0..4] 9
VTT_OUT_LEFT
V_FSB_VTT
VTT_OUT_RIGHT 7,8
C41
X_C0.1U16Y0402
VTT_OUT_LEFT 7
0
0 0 133 MHZ (533)
H_BR#0 7,9
VTT_OUT_RIGHT
C28 C0.1U16Y0402
C37 C0.1U16Y0402
BSEL
1
0 2
FSB FREQUENCY
TABLE
267 MHZ (1067) 0 0 0
0 1 200 MHZ (800)
1
Prescott / Cedar Mill
LL_ID[1:0] = 00
GTLREF_SEL = 0
VTT_SEL = 1
RN1
8P4R-680R
VID3
1 2
VID1
3 4
VID4
5 6
VID2
7 8
VID0
R59 680R0402
VID5
R57 680R0402
RN2 8P4R-62R0402
1 2
3 4
5 6
7 8
1 2
3 4
5 6
7 8
RN4 8P4R-62R0402
R78 _62R0402
R76 _62R0402
R77 _62R0402
PLACE BPM TERM I N A T I O N NEAR CPU
VTT_OUT_RIGHT
H_BPM#3
H_BPM#5
H_BPM#1
H_BPM#0
H_TMS
H_TDI
H_BPM#2
H_BPM#4
H_TDO
H_TRST#
H_TCK
Title
INTEL LGA445 - Signals
Size Document Number Re v
Custom
8
7
6
5
4
3
Date: Sheet
2
MICRO-START INT'L CO.,LTD.
MS-7195 100
of
63 3 Friday, September 09, 2005
1
Page 7
8
VCCP
AG21
AG19
AG18
AG15
AG14
AG12
AG11
AF9
AF8
AF22
AF21
AF19
AF18
AF15
AF14
AF12
AF11
AE9
AE23
AE22
AE21
AE19
AE18
AE15
AE14
AE12
AE11
AD8
AD30
AD29
AD28
AD27
AD26
AD25
AD24
AD23
AC8
AC30
AC29
AC28
AC27
AC26
AC25
AC24
AC23
AB8
AA8
VCCP
U6B
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCCW8VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
Y8
Y30
Y23
Y24
Y25
Y26
Y27
Y28
Y29
W30
VCCP
D D
C C
AG22
VCC
VCC
W29
AG25
VCC
VCC
W28
AG26
VCC
VCC
W27
AG27
VCC
VCC
W26
AG28
VCC
VCC
W25
AG29
VCC
VCC
W24
7
AG30
VCC
W23
AG8
VCC
AG9
VCC
VCCU8VCCV8VCC
AH11
VCC
VCC
U30
AH12
VCC
VCC
U29
AH14
VCC
VCC
U28
AH15
VCC
VCC
U27
AH18
VCC
VCC
U26
AH19
VCC
VCC
U25
AH21
VCC
VCC
U24
AH22
VCC
U23
AH25
VCC
VCCT8VCC
AH26
VCC
VCC
T30
AH27
VCC
VCC
T29
AH28
VCC
VCC
T28
AH29
VCC
VCC
T27
AH30
VCC
VCC
T26
AH8
T25
VCC
VCC
AH9
T24
VCC
VCC
AJ11
T23
VCC
AJ12
VCC
AJ14
VCC
AJ15
VCC
VCCN8VCCP8VCCR8VCC
6
AJ18
AJ19
AJ21
AJ22
AJ25
AJ26
AJ8
AJ9
AK11
AK12
AK14
AK15
AK18
AK19
AK21
AK22
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCCM8VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
N23
N24
N25
N26
N27
N28
N29
N30
M24
M25
M26
M27
M28
M29
M30
VCC
VCC
AK25
VCC
M23
AK26
VCC
5
AK8
AK9
AL11
AL12
AL14
AL15
AL18
AL19
AL21
AL22
AL25
AL26
AL29
AL30
AL8
AL9
AM11
AM12
AM14
AM15
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCCJ8VCCJ9VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCCK8VCCL8VCC
J22
J23
J24
J25
J26
J27
J28
J29
J30
K23
K24
K25
K26
K27
K28
K29
K30
AM18
VCC
VCC
J21
AM19
VCC
VCC
J20
AM21
VCC
VCC
J19
AM22
VCC
VCC
J18
AM25
VCC
VCC
J15
AM26
VCC
VCC
J14
4
AM29
VCC
VCC
J13
AM30
VCC
VCC
J12
AM8
J11
VCC
VCC
AM9
VCC
VCC
J10
AN11
AN9
AN12
VCC
VCC
AN8
AN14
AN15
AN18
VCC
VCC
VCC
VCC
VTT_OUT_RIGHT
VCC
VCC
VCC
VCC
AN26
AN29
AN30
AN19
AN21
AN22
VCC
VCC
VCC
VCCA
VSSA
VCCPLL
VCC-IOPLL
VTTPWRGD
VTT_OUT_LEFT
VTT_SEL
RSVD
VCC
HS11HS22HS33HS4
AN25
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
4
3
H_VCCA
A23
H_VSSA
B23
D23
H_VCCA
C23
A25
A26
A27
A28
A29
A30
B25
B26
B27
B28
B29
B30
C25
C26
C27
C28
C29
C30
D25
D26
D27
D28
D29
D30
VTT_PWG
AM6
VTT_OUT_RIGHT
AA1
VTT_OUT_LEFT
J1
F27
F29
ZIF-SOCK775-15u
V_FSB_VTT
2
V_FSB_VTT
C74 C10U10Y0805
C72 C10U10Y0805
C69 C10U10Y0805
1
CAPS FOR FSB GENERIC
VTT_OUT_LEFT
GTLREF VOLTAGE SHOULD BE
0.63*VTT = 0.756V
B B
VTT_OUT_LEFT
R102 _124R1%0402-LF
R101
_210R1%0402
R91 _124R1%0402-LF
R88
_210R1%0402
R98 _10R0402-LF
C45
_C1U6.3Y50402/80-20%
R92 _10R0402-LF
C39
_C1U6.3Y50402/80-20%
C43
C220P25N0402
CPU_GTLREF1
C42
C220P25N0402
CPU_GTLREF0 6
CPU_GTLREF1 6
PLACE AT CPU END OF ROUTE
7
H_PROCHOT#
H_CPURST#
H_PWRGD
H_BR#0
H_IERR#
TRMTRIP#
H_FERR#
H_PROCHOT# 6
H_CPURST# 6,9
H_PWRGD 6,17
H_BR#0 6,9
H_IERR# 6
TRMTRIP# 6,17
H_FERR# 6,17
FSBSEL RESISTOR CAN BE REMOVED IF ONLY TEJAS
AND CEDAR MILL ARE SUPPORTED
V_FSB_VTT
RN6
1
3
5
7
_8P4R-470R0402-LF
6
5
VTT_OUT_RIGHT 6,8
VTT_OUT_LEFT 6
A A
VTT_OUT_RIGHT
VTT_OUT_LEFT
V_FSB_VTT
V_FSB_VTT
8
R60 _130R1%0402-LF
R58 _62R0402
R95 X_100R0402
R104 _62R0402
R117 _62R0402
PLACE AT ICH END OF ROUTE
R123 _62R0402
R119 _62R0402
PLACE COMPONENTS AS CLOSE AS POSSIBLE TO PROCESSOR SOCKET
TRACE WIDTH TO CAPS MUST BE SMALLER THAN 12MILS
V_FSB_VTT
L1 10U125m_0805-1
X_C1U6.3Y50402/80-20%
VID_GD# 29,31
H_FSBSEL1
2
H_FSBSEL0
4
H_FSBSEL2
6
8
4
C64
VTT_OUT_RIGHT
VCC5_SB
R7
1KR0402-1
R24 10KR0402-1
H_FSBSEL1 6 ,11 ,20
H_FSBSEL0 6 ,11 ,20
H_FSBSEL2 6 ,11 ,20
R50 680R0402
C61
C10U10Y0805
3
C62
C10U10Y0805
Q1
N-MMBT3904_NL_SOT23
H_VCCA
H_VSSA
VTT_PWG SPEC :
High > 0.9V
Low < 0.3V
Trise < 150ns
VTT_PWG
C29
X_C1U6.3Y50402/80-20%
Title
INTEL LGA775 - Power
Size Document Number Re v
Custom
Date: Sheet
2
MICRO-START INT'L CO.,LTD.
MS-7195 100
of
73 3 Friday, September 09, 2005
1
Page 8
8
7
6
5
4
3
2
1
V_FSB_VTT
D D
VTT_OUT_RIGHT 6,7
R83
_62R0402
R75
_62R0402
TP12
TP9
TP11 TP10
H_COMP6
H_COMP7
AE3
AE4
D14
E23
F23
AF16
RSVD
VSS
AF17
VSS
RSVDE5RSVDE6RSVDE7RSVD
VSS
VSS
VSS
AF20
AF23
AF24
AF25
F6
IMPSEL#
VSS
VSS
AF26
U6C
RSVD
RSVDD1RSVD
A12
A15
A18
A21
A24
AA23
AA24
AA25
AA26
AA27
C C
B B
AA28
AA29
AA3
AA30
AA6
AA7
AB1
AB23
AB24
AB25
AB26
AB27
AB28
AB29
AB30
AB7
AC3
AC6
AC7
AD4
AD7
AE10
AE13
AE16
AE17
AE2
AE20
AE24
AE25
AE26
AE27
AE28
COMP6Y3COMP7
VSS
VSS
VSS
A2
VSS
VSS
VSS
A6
VSS
A9
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
AE5
AE7
AF10
AF13
AE29
AE30
B13
RSVD
VSS
AF27
_62R0402
VSS
VSS
AF28
AF29
X_62R0402
R82
P5
RSVDJ3RSVDN4RSVD
VSS
VSS
AF3
AF6
AF30
VSS
R121
VSS
AF7
MSID[1]V1MSID[0]
VSS
AG10
R124
_62R0402
W1
AC4
VSS
AG13
AG16
RSVD
VSS
2005 Perf FMB 0 0
2005 Value FMB 0 1
V30
V29
V28
VSSY7VSSY5VSSY2VSSW7VSSW4VSSV7VSSV6VSS
VSS
VSS
VSS
VSS
AG17
AG20
AG23
AG24
AG7
VSS
AH1
VSS
VSS
AH10
VSS
AH13
VSS
AH16
VSS
AH17
VSSV3VSS
VSS
AH20
AH23
VSS
VSS
VSS
AH24
V27
AH3
VSS
VSS
V26
AH6
VSS
VSS
V25
VSS
VSS
AH7
MSID1 MSID0
V24
V23
VSS
VSS
VSSU7VSSU1VSST7VSST6VSST3VSSR7VSSR5VSS
VSS
VSS
VSS
VSS
VSS
VSS
AJ10
AJ13
AJ16
AJ17
AJ20
AJ23
AJ24
VSS
AJ27
VSS
AJ28
VSS
R30
AJ29
VSS
R29
AJ30
VSS
VSS
H17
H18
H19
H20
H21
H22
H23
H24
H25
H26
H27
AN1
VSS
VSS
AN10
VSS
AN13
AN16
VSSH3VSSH6VSSH7VSSH8VSSH9VSSJ4VSSJ7VSS
VSS
VSS
AN17
H28
AN2
VSS
VSS
VSS
VSS
AN20
VSS
VSS
AN23
AN24
VSS
VSS
VSS
VSS
AN27
VSS
VSS
AN28
VSS
VSS
VSSB1VSS
VSS
VSS
VSS
VSS
B11
B14
VSS
H14
VSS
H13
VSS
H12
VSS
H11
VSS
H10
VSS
G1
VSS
F7
VSS
F4
VSS
F22
VSS
F19
VSS
F16
VSS
F13
VSS
F10
VSS
E8
VSS
E29
VSS
E28
VSS
E27
VSS
E26
VSS
E25
VSS
E20
VSS
E2
VSS
E17
VSS
E14
VSS
E11
VSS
D9
VSS
D6
VSS
D5
VSS
D3
VSS
D24
VSS
D21
VSS
D18
VSS
D15
VSS
D12
VSS
C7
VSS
C4
VSS
C24
VSS
C22
VSS
C19
VSS
C16
VSS
C13
VSS
C10
VSS
B8
VSS
B5
VSS
B24
VSS
B20
VSS
B17
VSS
ZIF-SOCK775-15u
R28
R27
R26
R25
R24
R23
P30
P29
P28
P27
P26
P25
P24
P23
VSS
VSS
VSS
VSS
VSS
VSS
VSSR2VSSP7VSSP4VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSSN7VSSN6VSSN3VSSM7VSSM1VSSL7VSSL6VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
AJ4
AJ7
AK10
AK13
AK16
AK17
AK2
AK20
AK23
AK24
AK27
AK28
AK29
AK30
AK5
AK7
AL10
AL13
AL16
VSS
AL17
VSS
AL20
VSS
AL23
VSS
AL24
VSS
AL27
VSS
L30
AL28
VSS
VSSL3VSS
VSS
AL3
L29
L28
L27
VSS
VSS
VSS
VSS
VSS
AL7
AM1
AM10
L26
VSS
VSS
AM13
L25
VSS
VSS
AM16
L24
VSS
VSS
AM17
L23
VSS
VSS
AM20
VSSK7VSS
VSS
AM23
K5
VSS
AM24
K2
VSS
AM27
VSS
AM28
VSS
AM4
HEAT SINK Retention Module
U250
HEATSINK_RM
A A
Title
INTEL LGA775 - GND
Size Document Number Re v
Custom
8
7
6
5
4
3
Date: Sheet
2
MICRO-START INT'L CO.,LTD.
MS-7195 100
of
83 3 Friday, September 09, 2005
1
Page 9
8
7
6
5
4
3
2
1
V_1P5_CORE
N17
P17
P18
P20
P21
AA22
AB21
AB22
AB23
AC22
AD14
AF6
AF7
AF8
AF9
AF10
AF11
AF12
AF13
AF14
AF30
AG2
AG3
AG4
AG5
AG6
AG7
AG8
AG9
AG10
AG11
AG12
AG13
AG14
AH1
AH2
AH4
AJ5
AJ13
AJ14
AK2
AK3
AK4
AK14
AK15
AK20
R15
R17
R18
R20
R21
R23
R24
U15
U17
U18
U19
U20
U21
U22
U23
U24
U25
U26
V15
V17
V18
V19
V20
V21
V22
V23
V25
V27
W17
W18
W19
W20
W22
W24
W26
W27
Y15
VCC
VCC
AA17
VCC
VCC
AA18
VCC
VCC
AA19
VCC
VCC
AA20
VCC
VCC
HD_STBP0#
HD_STBN0#
HD_STBP1#
HD_STBN1#
HD_STBP2#
HD_STBN2#
HD_STBP3#
HD_STBN3#
M17
P41
HD0#
M39
HD1#
VCC
P42
HD2#
M42
HD3#
N41
HD4#
M40
HD5#
L40
HD6#
M41
HD7#
K42
HD8#
G39
HD9#
J41
HD10#
G42
HD11#
G40
HD12#
G41
HD13#
F40
HD14#
F43
HD15#
F37
HD16#
E37
HD17#
J35
HD18#
D39
HD19#
C41
HD20#
B39
HD21#
B40
HD22#
H34
HD23#
C37
HD24#
J32
HD25#
B35
HD26#
J34
HD27#
B34
HD28#
F32
HD29#
L32
HD30#
J31
HD31#
H31
HD32#
M33
HD33#
K31
HD34#
M27
HD35#
K29
HD36#
F31
HD37#
H29
HD38#
F29
HD39#
L27
HD40#
M24
HD41#
J26
HD42#
K26
HD43#
G26
HD44#
H24
HD45#
K24
HD46#
F24
HD47#
E31
HD48#
A33
HD49#
E40
HD50#
D37
HD51#
C39
HD52#
D38
HD53#
D33
HD54#
C35
HD55#
D34
HD56#
C34
HD57#
B31
HD58#
C31
HD59#
C32
HD60#
D32
HD61#
B30
HD62#
D30
HD63#
K40
KDINV_0#
A38
HDINV_1#
E29
HDINV_2#
B32
HDINV_3#
K41
L43
F35
G34
J27
M26
E34
B37
(INTEL-QG82945G-A2-LF)
H_D#1
H_D#2
H_D#3
H_D#4
H_D#5
H_D#6
H_D#7
H_D#8
H_D#9
H_D#10
H_D#11
H_D#12
H_D#13
H_D#14
H_D#15
H_D#16
H_D#17
H_D#18
H_D#19
H_D#20
H_D#21
H_D#22
H_D#23
H_D#24
H_D#25
H_D#26
H_D#27
H_D#28
H_D#29
H_D#30
H_D#31
H_D#32
H_D#33
H_D#34
H_D#35
H_D#36
H_D#37
H_D#38
H_D#39
H_D#40
H_D#41
H_D#42
H_D#43
H_D#44
H_D#45
H_D#46
H_D#47
H_D#48
H_D#49
H_D#50
H_D#51
H_D#52
H_D#53
H_D#54
H_D#55
H_D#56
H_D#57
H_D#58
H_D#59
H_D#60
H_D#61
H_D#62
H_D#63
H_DBI#0
H_DBI#1
H_DBI#2
H_DBI#3
H_DSTBP#0 6
H_DSTBN#0 6
H_DSTBP#1 6
H_DSTBN#1 6
H_DSTBP#2 6
H_DSTBN#2 6
H_DSTBP#3 6
H_DSTBN#3 6
H_D#[0..63] 6
H_DBI#[0..3] 6
AA37
AA41
AJ12
K38
K35
M34
N35
R33
N32
N34
M38
N42
N37
N38
R32
R36
U37
R35
R38
V33
U34
U32
V42
U35
Y36
Y38
V32
Y34
M36
V35
D42
U39
U40
W42
E41
D41
K36
G37
E42
U41
W41
P40
W40
U42
V41
Y40
Y43
M31
M29
C30
M18
A28
C27
B27
D27
D28
J39
J42
J37
F38
T40
T43
AJ9
U2A
HA3#
HA4#
HA5#
HA6#
HA7#
HA8#
HA9#
HA10#
HA11#
HA12#
HA13#
HA14#
HA15#
HA16#
HA17#
HA18#
HA19#
HA20#
HA21#
HA22#
HA23#
HA24#
HA25#
HA26#
HA27#
HA28#
HA29#
HA30#
HA31#
HAD_STB0#
HAD_STB1#
HPCREQ#
HBREQ0#
HBPRI#
HBNR#
HLOCK#
HADS#
HREQ0#
HREQ1#
HREQ2#
HREQ3#
HREQ4#
HHIT#
HHITM#
HDEFER#
HTRDY#
HDBSY#
HDRDY#
HEDRDY#
RS0#
RS1#
RS2#
HCLKP
HCLKN
PWROK
HCPURST#
RSTIN#
ICH_SYNC#
HRCOMP
HSCOMP
HSWING
HDVREF
HACCVREF
VCC
VCC
VCC
VCC
VCC
RSVRD
AA35
AA42
VCC
VCC
RSVRD
RSVRD
AA34
VCC
RSVRD
L15
AA38
VCC
VCC
RSVRD
RSVRD
M15
VCC
RSVRD
U27
VCC
RSVRD
A43
R27
VCC
VCC
RSVRD
RSVRD
M11
VCC
RSVRD
AG25
VCC
RSVRD
AG26
AG27
VCC
VCC
RSVRD
RSVRD
AJ24
VCC
RSVRD
AJ27
VCC
RSVRD
AL39
AK40
VCC
VCC
RSVRD
RSVRD
AW17
VCC
RSVRD
AW18
VCC
RSVRD
AY14
BC16
VCC
VCC
RSVRD
RSVRD
AD30
VCC
RSVRD
AC34
VCC
RSVRD
Y30
VCC
RSVRD
Y33
VCC
RSVRD
AF31
VCC
RSVRD
AD31
VCC
RSVRD
V31
U30
VCC
VCC
RSVRD
RSVRD
AA30
VCC
RSVRD
AK21
AC30
VCC
VCC
RSVRD
RSVRD
AJ23
VCC
RSVRD
AJ26
VCC
RSVRD
AL29
VCC
RSVRD
AL20
VCC
RSVRD
AJ21
AL26
VCC
VCC
RSVRD
RSVRD
AK27
VCC
RSVRD
AJ29
AG29
VCC
VCC
RSVRD
RSVRD
V30
VCC
BC43NCBC42
VCC
NC
VCC
VCC
NC
BC2NCBC1
VCC
VCC
NC
BB43
VCC
VCC
NC
BB2NCBB1NCBA2
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
NC
NC
NC
NC
NC
NCC2NC
NCB3NCB2NC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
E35
B43NCB42NCB41
A42
Y17
Y18
Y19
Y21
Y23
Y25
C42
AW2
AV27NCAV26
AW26
Y27
AA15
H_A#[3..31] 6
D D
H_ADSTB#0 6
H_ADSTB#1 6
C C
H_A#3 H_D#0
H_A#4
H_A#5
H_A#6
H_A#7
H_A#8
H_A#9
H_A#10
H_A#11
H_A#12
H_A#13
H_A#14
H_A#15
H_A#16
H_A#17
H_A#18
H_A#19
H_A#20
H_A#21
H_A#22
H_A#23
H_A#24
H_A#25
H_A#26
H_A#27
H_A#28
H_A#29
H_A#30
H_A#31
H_BR#0 6,7
H_BPRI# 6
H_BNR# 6
H_LOCK# 6
H_ADS# 6
H_REQ#[0..4] 6
H_HIT# 6
H_HITM# 6
H_DEFER# 6
H_TRDY# 6
H_DBSY# 6
H_DRDY# 6
H_RS#[0..2] 6
CK_H_MCH 20
CK_H_MCH# 20
B B
ICH_SYNC# 18
PWR_GD 18,29
H_CPURST# 6,7
PLTRST# 15,17,20
R142 16.9R1%-LF
ICH_SYNC#
HXRCOMP
HXSCOMP
HXSWING
H_REQ#0
H_REQ#1
H_REQ#2
H_REQ#3
H_REQ#4
H_RS#0
H_RS#1
H_RS#2
MCH_GTLREF
V_1P5_CORE
R153
V_FSB_VTT
A A
8
_60.4R1%0402-LF
HXSCOMP
C135
X_C2.2P25N0402
V_FSB_VTT
R150
_84.5R1%0402-LF
7
HD_SWING VOLTAGE "10 MIL TRACE , 7 MIL
SPACE" HD_SWING S/B 0.22*VTT +/- 2%
PLACE DIVIDER RESISTOR NEAR VTT
R140
_301R1%0402-1
R149 _62R0402
C134
C0.01U25X0402
HXSWING
6
V_FSB_VTT
R139
124R1%0402
R143
210R1%0402
CAPS SHOULD BE PLACED NEAR MCH PIN
5
GTLREF VOLTAGE SHOULD BE 0.63*VTT=0.756V
124 OHM OVER 210 RESISTORS
MCH_GTLREF
C122
_C1U6.3Y50402/80-20%
R145 _10R0402-LF
C128
X_C220P25N0402
4
MCH_GTLREF_CPU 6
Title
INTEL Lakeport - CPU
Size Document Number Re v
Custom
3
Date: Sheet
2
MICRO-START INT'L CO.,LTD.
MS-7195 100
of
93 3 Friday, September 09, 2005
1
Page 10
8
7
6
5
4
3
2
1
SCKE_A[0..1] 13,14
DQM_A[0..7] 13
DATA_A[0..63] 13
DQM_A6
DQM_A7
DQM_A2
DQM_A3
DQM_A4
DQM_A5
DATA_A11
DATA_A12
BB7
AV1
SADQ10
SADQ11
SBDQ8
SBDQ9
AV6
AV12
DATA_B9
DATA_B10
DATA_A13
DATA_A14
AW4
BC6
SADQ12
SADQ13
SBDQ10
SBDQ11
AR5
AM11
DATA_B11
DATA_B12
DATA_A15
DATA_A16
AY7
AW12
SADQ14
SADQ15
SBDQ12
SBDQ13
AR7
AR12
DATA_B14
DATA_B13
DATA_A17
DATA_A18
AY10
BA12
SADQ16
SADQ17
SBDQ14
SBDQ15
AR10
AM15
DATA_B16
DATA_B15
DATA_A19
DATA_A20
BB12
BA9
SADQ18
SADQ19
SBDQ16
SBDQ17
AV15
AM13
DATA_B17
DATA_B18
DATA_A5
DATA_A3
AV4
SADQ2
SADQ3
SBDQ0
SBDQ1
AL8
DATA_B1
DATA_A4
AN1
SADQ4
SBDQ2
AP8
DATA_B2
AP4
SADQ5
SBDQ3
AP9
DATA_B3
DATA_A6
AU5
SADQ6
SBDQ4
AJ11
DATA_B4
DATA_A7
AU2
SADQ7
SBDQ5
AL9
DATA_B5
DATA_A8
AW3
SADQ8
SBDQ6
AM10
DATA_B6
DATA_A9
AY3
SADQ9
SBDQ7
AP6
DATA_B7
DATA_A10
BA7
AU7
DATA_B8
DATA_A1
DATA_A0
D D
C C
B B
SCS_A#[0..1] 13,14
RAS_A# 13,14
CAS_A# 13,14
WE_A# 13,14
MAA_A[0..13] 13,14
ODT_A[0..1] 13,14
SBS_A[0..2] 13,14
DQS_A0 13
DQS_A#0 13
DQS_A1 13
DQS_A#1 13
DQS_A2 13
DQS_A#2 13
DQS_A3 13
DQS_A#3 13
DQS_A4 13
DQS_A#4 13
DQS_A5 13
DQS_A#5 13
DQS_A6 13
DQS_A#6 13
DQS_A7 13
DQS_A#7 13
P_DDR0_A 13
N_DDR0_A 13
P_DDR1_A 13
N_DDR1_A 13
P_DDR2_A 13
N_DDR2_A 13
SCS_A#0
SCS_A#1
RAS_A#
CAS_A#
WE_A#
MAA_A0
MAA_A1
MAA_A2
MAA_A3
MAA_A4
MAA_A5
MAA_A6
MAA_A7
MAA_A8
MAA_A9
MAA_A10
MAA_A11
MAA_A12
MAA_A13
ODT_A0
ODT_A1
SBS_A0
SBS_A1
SBS_A2
DQS_A0
DQS_A#0
DQS_A1
DQS_A#1
DQS_A2
DQS_A#2
DQS_A3
DQS_A#3
DQS_A4
DQS_A#4
DQS_A5
DQS_A#5
DQS_A6
DQS_A#6
DQS_A7
DQS_A#7
P_DDR0_A
N_DDR0_A
P_DDR1_A
N_DDR1_A
P_DDR2_A
N_DDR2_A
SMPCOMP_N
SMPCOMP_P
BB37
BA39
BA35
AY38
BA34
BA37
BB35
BA32
AW32
BB30
BA30
AY30
BA27
BC28
AY27
AY28
BB27
AY33
AW27
BB26
BC38
AW37
AY39
AY37
BB40
BC33
AY34
BA26
AU4
AR2
BA3
BB4
AY11
BA10
AU18
AR18
AU35
AV35
AP42
AP40
AG42
AG41
AC42
AC41
BB32
AY32
AY5
BB5
AK42
AK41
BA31
BB31
AY6
BA5
AH40
AH43
AM3
AL5
AJ6
AJ8
U2B
SACS0#
SACS1#
SACS2#
SACS3#
SARAS#
SACAS#
SAWE#
SAMA0
SAMA1
SAMA2
SAMA3
SAMA4
SAMA5
SAMA6
SAMA7
SAMA8
SAMA9
SAMA10
SAMA11
SAMA12
SAMA13
SAODT0
SAODT1
SAODT2
SAODT3
SABA0
SABA1
SABA2
SADQS0
SADQS0#
SADQS1
SADQS1#
SADQS2
SADQS2#
SADQS3
SADQS3#
SADQS4
SADQS4#
SADQS5
SADQS5#
SADQS6
SADQS6#
SADQS7
SADQS7#
SACLK0
SACLK0#
SACLK1
SACLK1#
SACLK2
SACLK2#
SACLK3
SACLK3#
SACLK4
SACLK4#
SACLK5
SACLK5#
MCH_SRCOMP0
MCH_SRCOMP1
SMOCDCOMP0
SMOCDCOMP1
(INTEL-QG82945G-A2-LF)
R182 _80.6R1%0402-LF
SMPCOMP_P
AP3
SADQ0
DATA_A2
AP2
SADQ1
AU3
AL6
DATA_B0
DATA_A22
DATA_A21
BB9
BC11
SADQ20
SADQ21
SBDQ18
SBDQ19
AN12
AM17
DATA_B20
DATA_B19
DATA_A24
DATA_A23
AY12
AM20
SADQ22
SADQ23
SBDQ20
SBDQ21
AP15
AR13
DATA_B21
DATA_B22
DATA_A26
DATA_A25
AM18
AV20
SADQ24
SADQ25
SBDQ22
SBDQ23
AT15
AM24
DATA_B23
DATA_B24
DATA_A27
AM21
SADQ26
SBDQ24
AM23
DATA_B25
DATA_A28
DATA_A29
AP17
AR17
SADQ27
SADQ28
SBDQ25
SBDQ26
AV24
AM26
DATA_B26
DATA_B27
DATA_A30
AP20
AT20
SADQ29
SADQ30
SBDQ27
SBDQ28
AP21
AR21
DATA_B28
DATA_B29
DATA_A33
DATA_A32
AP32
AV34
SADQ31
SADQ32
SBDQ29
SBDQ30
AT24
AP24
DATA_B30
DATA_B31
DATA_A34
DATA_A35
AV38
AU39
SADQ33
SADQ34
SBDQ31
SBDQ32
AU27
AN29
DATA_B32
DATA_B33
DATA_A36
DATA_A37
AV32
AT32
SADQ35
SADQ36
SBDQ33
SBDQ34
AR31
AM31
DATA_B34
DATA_B35
DATA_A38
DATA_A39
AR34
AU37
SADQ37
SADQ38
SBDQ35
SBDQ36
AP27
AR27
DATA_B37
DATA_B36
DATA_A40
DATA_A41
AR41
AR42
SADQ39
SADQ40
SBDQ37
SBDQ38
AP31
AU31
DATA_B38
DATA_B39
DATA_A42
DATA_A43
AN43
AM40
SADQ41
SADQ42
SBDQ39
SBDQ40
AP35
AP37
DATA_B40
DATA_B41
DATA_A45
DATA_A44
AU41
AU42
SADQ43
SADQ44
SBDQ41
SBDQ42
AL35
AN32
DATA_B42
DATA_B43
DATA_A46
DATA_A47
AP41
AN40
SADQ45
SADQ46
SBDQ43
SBDQ44
AR35
AU38
DATA_B44
DATA_B45
DATA_A48
AL41
SADQ47
SBDQ45
AM38
DATA_B46
DATA_A49
DATA_A50
AL42
AF39
SADQ48
SADQ49
SBDQ46
SBDQ47
AL34
AM34
DATA_B48
DATA_B47
DATA_A52
DATA_A51
AE40
AM41
SADQ50
SADQ51
SBDQ48
SBDQ49
AJ34
AF32
DATA_B50
DATA_B49
DATA_A54
DATA_A53
AM42
AF41
SADQ52
SADQ53
SBDQ50
SBDQ51
AL31
AF34
DATA_B51
DATA_B52
DATA_A55
DATA_A56
AF42
AD40
SADQ54
SADQ55
SBDQ52
SBDQ53
AJ32
AG35
DATA_B54
DATA_B53
DATA_A57
DATA_A58
AD43
AA39
SADQ56
SADQ57
SBDQ54
SBDQ55
AD32
AC32
DATA_B56
DATA_B55
DATA_A59
DATA_A60
AA40
AE42
SADQ58
SADQ59
SBDQ56
SBDQ57
Y32
AD34
DATA_B58
DATA_B57
DATA_A61
DATA_A62
AE41
AB41
SADQ60
SADQ61
SBDQ58
SBDQ59
AF35
AA32
DATA_B59
DATA_B60
DATA_A63
AB42
SADQ62
SADQ63
SBDQ60
SBDQ61
AF37
AC33
DATA_B62
DATA_B61
SCKE_A0
BB25
SBDQ62
AC35
DATA_B63
DATA_A31
DATA_B[0..63] 13
SCKE_B[0..1] 13,14
VCC_DDR
A A
R183 _80.6R1%0402-LF
C198
C0.1U16Y0402
8
SMPCOMP_N
7
6
5
DQM_B[0..7] 13
4
SCKE_A1
AY25
BC24
SACKE0
SACKE1
SBDQ63
BA14
SCKE_B0
BA25
SACKE2
SACKE3
SBCKE0
SBCKE1
AY16
BA13
SCKE_B1
DQM_A0
AR3
SBCKE2
SBCKE3
BB13
DQM_A1
AY2
SADM1
SADM0
SBDM7
AD39
DQM_B6
DQM_B7
AP18
BB10
SADM2
SBDM6
AJ39
AR38
DQM_B5
AT34
SADM4
SADM3
SBDM4
SBDM5
AR29
DQM_B3
DQM_B4
AG40
AP39
SADM5
SBDM3
AP13
AP23
DQM_B2
AC40
SADM7
SADM6
SBDM1
SBDM2
AW7
DQM_B1
SBCS0#
SBCS1#
SBCS2#
SBCS3#
SBRAS#
SBCAS#
SBWE#
SBMA0
SBMA1
SBMA2
SBMA3
SBMA4
SBMA5
SBMA6
SBMA7
SBMA8
SBMA9
SBMA10
SBMA11
SBMA12
SBMA13
SBODT0
SBODT1
SBODT2
SBODT3
SBBA0
SBBA1
SBBA2
SBDQS0
SBDQS0#
SBDQS1
SBDQS1#
SBDQS2
SBDQS2#
SBDQS3
SBDQS3#
SBDQS4
SBDQS4#
SBDQS5
SBDQS5#
SBDQS6
SBDQS6#
SBDQS7
SBDQS7#
SBCLK0
SBCLK0#
SBCLK1
SBCLK1#
SBCLK2
SBCLK2#
SBCLK3
SBCLK3#
SBCLK4
SBCLK4#
SBCLK5
SBCLK5#
SMVREF1
SMVREF0
SBDM0
AL11
DQM_B0
SCS_B#0
BA40
SCS_B#1
AW41
BA41
AW40
RAS_B#
BA23
CAS_B#
AY24
WE_B#
BB23
MAA_B0
BB22
MAA_B1
BB21
MAA_B2
BA21
MAA_B3
AY21
MAA_B4
BC20
MAA_B5
AY19
MAA_B6
AY20
MAA_B7
BA18
MAA_B8
BA19
MAA_B9
BB18
MAA_B10
BA22
MAA_B11
BB17
MAA_B12
BA17
MAA_B13
AW42
ODT_B0
AY42
ODT_B1
AV40
AV43
AU40
SBS_B0
AW23
SBS_B1
AY23
SBS_B2
AY17
DQS_B0
AM8
DQS_B#0
AM6
DQS_B1
AV7
DQS_B#1
AR9
DQS_B2
AV13
DQS_B#2
AT13
DQS_B3
AU23
DQS_B#3
AR23
DQS_B4
AT29
DQS_B#4
AV29
DQS_B5
AP36
DQS_B#5
AM35
DQS_B6
AG34
DQS_B#6
AG32
DQS_B7
AD36
DQS_B#7
AD38
P_DDR0_B
AM29
N_DDR0_B
AM27
P_DDR1_B
AV9
N_DDR1_B
AW9
P_DDR2_B
AL38
N_DDR2_B
AL36
AP26
AR26
AU10
AT10
AJ38
AJ36
MCH_VREF_B
AM2
MCH_VREF_A
AM4
PLACE 0.1UF CAP CLOSE TO MCH
3
SCS_B#[0..1] 13,14
RAS_B# 13,14
CAS_B# 13,14
WE_B# 13,14
MAA_B[0..13] 13,14
ODT_B[0..1] 13,14
SBS_B[0..2] 13,14
DQS_B0 13
DQS_B#0 13
DQS_B1 13
DQS_B#1 13
DQS_B2 13
DQS_B#2 13
DQS_B3 13
DQS_B#3 13
DQS_B4 13
DQS_B#4 13
DQS_B5 13
DQS_B#5 13
DQS_B6 13
DQS_B#6 13
DQS_B7 13
DQS_B#7 13
P_DDR0_B 13
N_DDR0_B 13
P_DDR1_B 13
N_DDR1_B 13
P_DDR2_B 13
N_DDR2_B 13
C187
C0.1U16Y0402
VCC_DDR
U2_X1
MCH
X1
X2
X3
X4
X5
X6
X7
X8
Heatsink
MCH_HS
MCH_VREF_A
PLACE 0.1UF CAP CLOSE TO MCH
C186
C0.1U16Y0402
CP10
X_COPPER
MCH_VREF_A
R189 X_0R-1
R188
1KR1%0402-1
Title
Size Document Number Re v
Date: Sheet
R190
1KR1%0402-1
MICRO-START INT'L CO.,LTD.
INTEL Lakeport - Memory
Custom
MS-7195 100
2
MCH_VREF_B
10 33 Friday, September 09, 2005
1
of
Page 11
8
D D
SDVOB_INT+ 15
SDVOB_INT- 15
SDVO_TVCLKIN+ 15
SDVO_TVCLKIN- 15
DMI_ITP_MRP_0 17
C C
B B
V_2P5_MCH
V_1P5_CORE
DMI_ITN_MRN_0 17
DMI_ITP_MRP_1 17
DMI_ITN_MRN_1 17
DMI_ITP_MRP_2 17
DMI_ITN_MRN_2 17
DMI_ITP_MRP_3 17
DMI_ITN_MRN_3 17
CK_PE_100M_MCH 20
CK_PE_100M_MCH# 20
SDVO_CTRL_DATA 15
SDVO_CTRL_CLK 15 HSYNC 16
H_FSBSEL0 6,7,20
H_FSBSEL1 6,7,20
H_FSBSEL2 6,7,20
L6 180L1500m_90
I = 70mA
C173
.CD100U16EL11
CP3 X_COPPER
L3
X_600L200m_500-1
1 2
C190 C0.1U16Y0402
C189 C0.1U16Y0402
C191 C0.1U16Y0402
C192 C0.1U16Y0402
EXP_EN
DMI_ITP_MRP_0
DMI_ITN_MRN_0
DMI_ITP_MRP_1
DMI_ITN_MRN_1
DMI_ITP_MRP_2
DMI_ITN_MRN_2
DMI_ITP_MRP_3
DMI_ITN_MRN_3
CK_PE_100M_MCH
CK_PE_100M_MCH#
R179 0R0402-1
R178 0R0402-1
R157 10KR0402-1
R155 10KR0402-1
R158 10KR0402-1
R154
X_1KR1%0402-1
VCCA_HPLL VCCA_HPLL
VCCA_MPLL
VCCA_DPLLA
VCCA_DPLLB
VCCA_GPLL
V_2P5_MCH
V_2P5_DAC_FILTERED
C163
C0.1U16Y0402
SEL0
SEL1
SEL2
NOA_6
C181
C0.01U25X0402
7
U2C
G12
EXPARXP0
F12
EXPARXN0
D11
EXPARXP1
D12
EXPARXN1
J13
EXPARXP2
H13
EXPARXN2
E10
EXPARXP3
F10
EXPARXN3
J9
EXPARXP4
H10
EXPARXN4
F7
EXPARXP5
F9
EXPARXN5
C4
EXPARXP6
D3
EXPARXN6
G6
EXPARXP7
J6
EXPARXN7
K9
EXPARXP8
K8
EXPARXN8
F4
EXPARXP9
G4
EXPARXN9
M6
EXPARXP10
M7
EXPARXN10
K2
EXPARXP11
L1
EXPARXN11
U11
EXPARXP12
U10
EXPARXN12
R8
EXPARXP13
R7
EXPARXN13
P4
EXPARXP14
N3
EXPARXN14
Y10
EXPARXP15
Y11
EXPARXN15
F20
EXP_EN
Y7
DMI RXP0
Y8
DMI RXN0
AA9
DMI RXP1
AA10
DMI RXN1
AA6
DMI RXP2
AA7
DMI RXN2
AC9
DMI RXP3
AC8
DMI RXN3
B14
GCLKP
B16
GCLKN
F15
SDVOCTRLDATA
E15
SDVOCTRLCLK
F21
BSEL0
H21
BSEL1
L20
BSEL2
AK17
RSV_TP[0]
AL17
RSV_TP[1]
K21
EXP_SLR
AK23
RSV_TP[2]
AK18
RSV_TP[3]
L21
RSV_TP[4]
L18
RSV_TP[5]
N21
RSV_TP[6]
C21
VCCAHPLL
B20
VCCAMPLL
C19
VCCADPLLA
B19
VCCADPLLB
B17
VCCA_EXPPLL
D19
VCC2
C18
VCCADAC
B18
VCCADAC
A18
VSSA_DAC
(INTEL-QG82945G-A2-LF)
V_FSB_VTT
I = 60mA
VCCA_MPLL
C151
_C1U6.3Y50402/80-20%
6
V_1P5_CORE
AA26
AB17
AB18
AB19
AB20
AB24
AB25
AB26
AB27
AC15
AC17
AC18
AC20
AD17
AD19
AC24
AC26
AC27
VCC
VCC
VCC
VCC
VCC
VTT
VTT
VTT
VTT
VTT
E27
E23
E24
E26
D25
L4
X_10U125m_0805-1
1 2
AD15
VCC
VCC
VCC
VCC
VTT
VTT
VTT
VTT
F23
F27
H23
G23
AA24
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VTT
VTT
VTT
B25
B26
C23
C25
VCC
VTT
VTT
VTT
VTT
D24
C26
D23
CP4 X_COPPER
VCC
VTT
VTT
VTT
B23
A24
B24
V_1P5_CORE V_1P5_CORE
AD23
AD25
AD26
AD21
VCC
VCC
VCC
VCC
VTT
VTT
VTT
VTT
J23
L23
K23
M23
V_1P5_CORE
VCCA_DPLLA
+
C152
.CD220U10EL7
AE20
AE17
AE18
VCC
VCC
VCC
VTT
VTT
P23
N23
I = 55mA
AE22
AE24
AE26
VCC
VCC
VCC
VCC
AF21
C158
C0.1U16Y0402
AE27
VCC
VCC
AF23
AF15
AF25
AF17
VCC
VCC
AF26
VCC
VCC
AF19
AF27
VCC
VCC
VCC
AF29
VCC_DDR
AV18
AV21
AY43
VCCSM
VCCSM
VCC
VCC
AG15
AG17
AG18
5
AV23
VCCSM
VCCSM
VCC
VCC
AG19
AV31
AV42
VCCSM
VCC
AG20
AG21
AW13
VCCSM
VCCSM
VCC
VCC
AG22
AW20
AW15
AW21
AW24
AW29
VCCSM
VCCSM
VCCSM
VCCSM
VCC
VCC
VCC
VCC
AJ15
AJ17
AJ18
AG23
AG24
CP6 X_COPPER
AY41
BB16
BB20
BB24
AW34
AW35
BB28
VCCSM
VCCSM
VCCSM
VCCSM
VCC_EXP
AE4
BB33
VCCSM
VCCSM
VCC_EXP
VCC_EXP
AE3
AE2
AD12
AW31
VCCSM
VCCSM
VCCSM
VCC
VCC
AJ20
L7 X_1U500m_0805
1 2
BB38
BB42
VCCSM
VCCSM
VCCSM
VCC_EXP
VCC_EXP
VCC_EXP
AD8
AD10
4
BC26
BC31
BC35
BC13
BC18
BC22
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCC_EXP
VCC_EXP
VCC_EXP
VCC_EXP
VCC_EXP
AD6
AD5
AD4
AD2
AD1
AC13
R172 _1R1%-1
R175 _1R1%-1
BC40
VCCSM
VCCSM
VCC_EXP
VCC_EXP
VCC_EXP
AC6
AC5
N9
N7
N5
VCC_EXP
VCC_EXP
VCC_EXP
VCC_EXP
Y13
AA5
AA13
N11
N10
VCC_EXP
VCC_EXP
VCC_EXP
VCC_EXP
VCC_EXP
VCC_EXPV9VCC_EXP
V13
R11
R10
R5
N12
VCC_EXP
VCC_EXP
VCC_EXP
VCC_EXPV7VCC_EXPV6VCC_EXP
V5
V10
VCCA_GPLL
C169
C10U10Y0805
U8
U7
U6
R13
VCC_EXP
VCC_EXP
VCC_EXP
VCC_EXP
VCC_EXP
EXP_COMPO
DREFCLKINP
DREFCLKINN
V_1P5_PCIEXPRESS
I = 45mA
3
V_1P5_PCIEXPRESS
U13
VCC_EXP
D14
EXPATXP0
C13
EXPATXN0
A13
EXPATXP1
B12
EXPATXN1
A11
EXPATXP2
B10
EXPATXN2
C10
EXPATXP3
C9
EXPATXN3
A9
EXPATXP4
B7
EXPATXN4
D7
EXPATXP5
D6
EXPATXN5
A6
EXPATXP6
B5
EXPATXN6
E2
EXPATXP7
F1
EXPATXN7
G2
EXPATXP8
J1
EXPATXN8
J3
EXPATXP9
K4
EXPATXN9
L4
EXPATXP10
M4
EXPATXN10
M2
EXPATXP11
N1
EXPATXN11
P2
EXPATXP12
T1
EXPATXN12
T4
EXPATXP13
U4
EXPATXN13
U2
EXPATXP14
V1
EXPATXN14
V3
EXPATXP15
W4
EXPATXN15
W2
DMI TXP0
Y1
DMI TXN0
AA2
DMI TXP1
AB1
DMI TXN1
Y4
DMI TXP2
AA4
DMI TXN2
AB3
DMI TXP3
AC4
DMI TXN3
AC12
AC11
EXP_COMPI
D17
HSYNC
C17
VSYNC
F17
RED
K17
GREEN
H18
BLUE
G17
RED#
J17
GREENB
J18
BLUE#
N18
DDC_DATA
N20
DDC_CLK
J15
H15
A20
IREF
J20
EXTTS#
H20
XORTEST
K18
ALLZTEST
C171
_C1U6.3Y50402/80-20%
SDVOC_CLK+
SDVOC_CLKÂSDVOC_BLUE+
SDVOC_BLUEÂSDVOC_GREEN+
SDVOC_GREENÂSDVOC_RED+
SDVOC_REDÂSDVOB_CLK+
SDVOB_CLKÂSDVOB_BLUE+
SDVOB_BLUEÂSDVOB_GREEN+
SDVOB_GREENÂSDVOB_RED+
SDVOB_RED-
DMI_MTP_IRP_0
DMI_MTN_IRN_0
DMI_MTP_IRP_1
DMI_MTN_IRN_1
DMI_MTP_IRP_2
DMI_MTN_IRN_2
DMI_MTP_IRP_3
DMI_MTN_IRN_3
GRCOMP
HSYNC
VSYNC
VGA_RED
VGA_GREEN
VGA_BLUE
MCH_DDC_DATA
MCH_DDC_CLK
CK_96M_DREF
CK_96M_DREF#
DACREFSET
R167 _255R1%-LF
EXTTS
TP13
TP14
C157
X_C10P50N0402
SDVOC_CLK+ 15
SDVOC_CLK- 15
SDVOC_BLUE+ 15
SDVOC_BLUE- 15
SDVOC_GREEN+ 15
SDVOC_GREEN- 15
SDVOC_RED+ 15
SDVOC_RED- 15
SDVOB_CLK+ 15
SDVOB_CLK- 15
SDVOB_BLUE+ 15
SDVOB_BLUE- 15
SDVOB_GREEN+ 15
SDVOB_GREEN- 15
SDVOB_RED+ 15
SDVOB_RED- 15
DMI_MTP_IRP_0 17
DMI_MTN_IRN_0 17
DMI_MTP_IRP_1 17
DMI_MTN_IRN_1 17
DMI_MTP_IRP_2 17
DMI_MTN_IRN_2 17
DMI_MTP_IRP_3 17
DMI_MTN_IRN_3 17
V_1P5_PCIEXPRESS
R185
24.9R1%
VSYNC 16
VGA_RED 16
VGA_GREEN 16
VGA_BLUE 16
MCH_DDC_DATA 16
MCH_DDC_CLK 16
CK_96M_DREF 20
CK_96M_DREF# 20
R171 10KR0402-1
2
V_2P5_MCH
V_1P5_CORE
C202
C168
C196 C0.1U16Y0402
C222 C0.1U16Y0402
VCC_DDR
C87 C10U10Y0805
C111 C10U10Y0805
C131 C0.1U16Y0402
VCC_DDR
C142 C10U10Y0805
C88 C0.1U16Y0402
C154 C10U10Y0805
MCH MEMORY DECOUPLING
V_FSB_VTT
C133
C0.1U16Y0402
FSB GENERIC DECOUPLING
EXP_EN
R386
300R0402
1
C10U10Y0805
C10U10Y0805
C141
C0.1U16Y0402
VCC3
R385
1.5KR1%0402
R166
4.7KR1%0402
C140
C0.1U16Y0402
A A
V_1P5_CORE V_1P5_CORE
L5
X_10U125m_0805-1
1 2
CP5 X_COPPER
8
I = 55mA
VCCA_DPLLB
+
C162
.CD220U10EL7
C161
C0.1U16Y0402
7
L2
X_600L200m_500-1
1 2
CP2 X_COPPER
6
VCCA_HPLL
C146
C0.1U16Y0402
I = 45mA
V_1P5_CORE
5
L12 X_0R1206
1 2
CP8 X_COPPER
1 2
CP9 X_COPPER
+
C208
X_.CD220U10EL7
4
I = 1.5A
V_1P5_PCIEXPRESS
C206 C10U10Y0805
C201 C10U10Y0805
C199
C0.1U16Y0402
3
Title
INTEL Lakeport - SDVO
Size Document Number Re v
Custom
Date: Sheet
2
MICRO-START INT'L CO.,LTD.
MS-7195 100
of
11 33 Friday, September 09, 2005
1
Page 12
5
AN42
AN31
AN27
AN26
AN24
AN23
AN21
AN20
AN18
AN17
AN15
AN13
AN4
AN2
AM39
AM37
AM36
AM33
AM9
AM7
AM5
AL43
AL37
D D
C C
B B
U2D
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
A16
VSS
A22
VSS
A26
VSS
A31
VSS
A35
VSS
B4
VSS
B6
VSS
B9
VSS
B11
VSS
B13
VSS
B21
VSS
B22
VSS
B28
VSS
B33
VSS
B38
VSS
C3
VSS
C5
VSS
C7
VSS
C12
VSS
C14
VSS
C22
VSS
C40
VSS
D2
VSS
D5
VSS
D10
VSS
D16
VSS
D20
VSS
D21
VSS
E3
VSS
E4
VSS
E7
VSS
E9
VSS
E12
VSS
E13
VSS
E17
VSS
E18
VSS
E20
VSS
E21
VSS
E32
VSS
F2
VSS
F6
VSS
F13
VSS
F18
VSS
F26
VSS
F34
VSS
F42
VSS
G3
VSS
G5
VSS
G7
VSS
G9
VSS
G10
VSS
G13
VSS
G15
VSS
G18
VSS
G20
VSS
G21
VSS
G24
VSS
G27
VSS
G29
VSS
G31
VSS
G32
VSS
G35
VSS
G38
VSS
H12
VSS
H17
VSS
H26
VSS
H27
VSS
H32
VSS
J2
VSS
J5
VSS
J7
VSS
J10
VSS
VSS
VSS
VSS
VSS
VSS
J12
J21
J24
J43
J38
J29
VSS
VSS
VSS
VSS
VSS
VSSK7VSSK6VSSK5VSSK3VSS
VSS
K20
K15
K13
K12
K10
K27
VSS
VSS
VSSL2VSS
VSS
VSS
VSS
L13
L12
K39
K37
K34
K32
4
AU32
AU29
AU26
AU24
AU21
AU20
AU17
AU15
AU13
AU12
AU9
AU6
AT31
AT27
AT26
AT23
AT21
AT18
AT17
AT12
AR43
AR39
AR37
AR32
AR24
AR20
AR15
AR6
AR1
AP38
AP34
AP29
AP12
AP10
AP7
AP5
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
L31
L29
L26
L24
L42
VSS
VSS
VSS
VSS
VSS
VSS
VSSM9VSSM8VSSM5VSSM3VSS
M21
M20
M13
M10
VSS
VSS
VSSN8VSSN6VSS
N2
N15
N13
M37
M35
VSS
VSS
VSS
VSS
VSS
VSS
VSS
N24
VSS
N36
N33
N31
N29
N27
N26
N43
N39
VSS
VSS
VSS
VSS
VSS
VSS
VSSP3VSS
P29
P27
P26
P24
P15
P14
AU34
VSS
P30
3
AA25
Y29
Y26
Y24
Y22
Y20
W25
W23
W21
V29
V26
V24
U29
R29
R26
D43
A40
BC9
BB41
BB39
BB34
BB19
BB14
BB11
BB6
BB3
BA42
BA4
AW10
AV37
AV17
AV10
AV2
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSSD1VSS
VSSA4VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSSR9VSSR6VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSST2VSS
VSSU3VSSU5VSSU9VSS
VSS
VSS
VSS
VSS
VSS
VSSV2VSSV8VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSSW3VSSY2VSSY5VSSY6VSSY9VSS
R12
R14
T42
R30
R31
R34
R37
R39
U12
U14
V11
V12
V14
V34
V36
V37
V38
V39
U31
U33
U36
U38
V43
VSS
AA27
VSS
AA29
VSS
Y12
AC19
VSS
VSS
Y14
AC25
VSS
VSS
Y31
AC29
VSS
VSS
Y35
AD18
VSS
VSS
Y37
2
AD20
Y39
VSS
VSS
AD22
VSS
VSS
Y42
AD24
VSS
VSS
AA3
AD27
VSS
VSS
AA8
AD29
VSS
VSS
AF18
AE19
AE21
VSS
VSS
AF20
VSS
VSS
AE23
AF22
VSS
VSS
AE25
AF24
AY1
BC4
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
(INTEL-QG82945G-A2-LF)
L17
AL33
AL32
AL27
AL24
AL23
AL21
AL18
AL15
AL13
AL12
AL10
AL7
AL3
AL2
AL1
AK30
AK29
AK26
AK24
AJ37
AJ35
AJ33
AJ31
AJ30
AJ10
AJ7
AH42
AG39
AG38
AG37
AG36
AG33
AG31
AG30
AF43
AF38
AF36
AF33
AF5
AF3
AF2
AF1
AD42
AD37
AD35
AD33
AD13
AD11
AD9
AD7
AC39
AC38
AC37
AC36
AC31
AC23
AC21
AC14
AC10
AC7
AC3
AC2
AB43
AB2
AA36
AA33
AA31
AA23
AA21
AA14
AA12
AA11
1
A A
Title
INTEL Lakeport - GND
Size Document Number Re v
Custom
5
4
3
2
Date: Sheet
MICRO-START INT'L CO.,LTD.
MS-7195 100
1
of
12 33 Friday, September 09, 2005
Page 13
8
7
6
5
4
3
2
1
VCC_DDR VCC3 VCC_DDR VCC3
DATA_A[0..63] 10 DATA_B[0..63] 10
D D
C C
B B
DIMM1
DATA_A0
3
DATA_A1
DATA_A2
DATA_A3
DATA_A4
DATA_A5
DATA_A6 DQS_A#2
DATA_A7
DATA_A8
DATA_A9
DATA_A10
DATA_A11
DATA_A12
DATA_A13
DATA_A14
DATA_A15
DATA_A16
DATA_A17
DATA_A18
DATA_A19
DATA_A20
DATA_A21
DATA_A22
DATA_A23
DATA_A24
DATA_A25
DATA_A26
DATA_A27
DATA_A28
DATA_A29
DATA_A30
DATA_A31
DATA_A32
DATA_A33
DATA_A34
DATA_A35
DATA_A36
DATA_A37
DATA_A38
DATA_A39
DATA_A40
DATA_A41
DATA_A42
DATA_A43
DATA_A44
DATA_A45
DATA_A46
DATA_A47
DATA_A48
DATA_A49
DATA_A50
DATA_A51
DATA_A52
DATA_A53
DATA_A54
DATA_A55
DATA_A56
DATA_A57
DATA_A58
DATA_A59
DATA_A60
DATA_A61
DATA_A62
DATA_A63
DQ0
4
DQ1
9
DQ2
10
DQ3
122
DQ4
123
DQ5
128
DQ6
129
DQ7
12
DQ8
13
DQ9
21
DQ10
22
DQ11
131
DQ12
132
DQ13
140
DQ14
141
DQ15
24
DQ16
25
DQ17
30
DQ18
31
DQ19
143
DQ20
144
DQ21
149
DQ22
150
DQ23
33
DQ24
34
DQ25
39
DQ26
40
DQ27
152
DQ28
153
DQ29
158
DQ30
159
DQ31
80
DQ32
81
DQ33
86
DQ34
87
DQ35
199
DQ36
200
DQ37
205
DQ38
206
DQ39
89
DQ40
90
DQ41
95
DQ42
96
DQ43
208
DQ44
209
DQ45
214
DQ46
215
DQ47
98
DQ48
99
DQ49
107
DQ50
108
DQ51
217
DQ52
218
DQ53
226
DQ54
227
DQ55
110
DQ56
111
DQ57
116
DQ58
117
DQ59
229
DQ60
230
DQ61
235
DQ62
236
DQ63
2
VSS
5
VSS
8
VSS
11
VSS
14
VSS
17
VSS
20
VSS
23
VSS
26
VSS
29
VSS
32
VSS
35
VSS
38
VSS
41
VSS
44
VSS
47
VSS
50
VSS
65
VSS
66
VSS
79
VSS
82
VSS
85
VSS
88
VSS
91
VSS
94
VSS
97
VSS
55
100
VSS
103
RC118RC0
VSS
19
NC
VSS
106
68
102
NC
NC/TEST
VSS
VSS
109
112
VSS
115
118
191
194
75
VDD051VDD156VDD262VDD372VDD478VDD5
VDD3
VSS
VSS
VSS
VSS
VSS
VSS
VSS
121
124
127
130
133
136
139
181
VDD6
VSS
142
175
VDD7
VSS
145
VDD8
VSS
170
VDDQ0
VDDQ153VDDQ259VDDQ364VDDQ4
VSS
VSS
VSS
148
151
154
197
172
VDDQ469VDDQ7
VSS
VSS
VSS
157
160
163
166
187
VDDQ5
VDDQ6
VSS
VSS
169
184
VDDQ7
VSS
198
189
67
178
VDDQ8
VDDQ9
VSS
VSS
VSS
VSS
201
204
207
210
238
VDDSPD
VSS
VSS
213
216
CB042CB143CB248CB349CB4
DM0/DQS9
NC/DQS9#
DM1/DQS10
NC/DQS10#
DM2/DQS11
NC/DQS11#
DM3/DQS12
NC/DQS12#
DM4/DQS13
NC/DQS13#
DM5/DQS14
NC/DQS14#
DM6/DQS15
NC/DQS15#
DM7/DQS16
NC/DQS16#
DM8/DQS17
NC/DQS17#
CK1#(CK0#)
VSS
VSS
VSS
VSS
219
222
225
228
161
162
167
168
CB5
CB6
CB7
DQS0
DQS0#
DQS1
DQS1#
DQS2
DQS2#
DQS3
DQS3#
DQS4
DQS4#
DQS5
DQS5#
DQS6
DQS6#
DQS7
DQS7#
DQS8
DQS8#
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10_AP
A11
A12
A13
A14
A15
A16/BA2
BA1
BA0
WE#
CAS#
RAS#
ODT0
ODT1
CKE0
CKE1
CS0#
CS1#
CK0(DU)
CK0#(DU)
CK1(CK0)
CK2(DU)
CK2#(DU)
SCL
SDA
VREF
SA0
SA1
SA2
VSS
VSS
VSS
DDRII-240_green
231
234
237
DQS_A0
7
DQS_A#0
6
DQS_A1
16
DQS_A#1
15
DQS_A2
28
27
DQS_A3
37
DQS_A#3
36
DQS_A4
84
DQS_A#4
83
DQS_A5
93
DQS_A#5
92
DQS_A6
105
DQS_A#6
104
DQS_A7
114
DQS_A#7
113
46
45
MAA_A0
188
MAA_A1
183
MAA_A2
63
MAA_A3
182
MAA_A4
61
MAA_A5
60
MAA_A6
180
MAA_A7
58
MAA_A8
179
MAA_A9
177
MAA_A10
70
MAA_A11
57
MAA_A12
176
MAA_A13
196
174
173
SBS_A2
54
SBS_A1
190
SBS_A0
71
WE_A#
73
CAS_A#
74
RAS_A#
192
DQM_A0
125
126
DQM_A1
134
135
DQM_A2
146
147
DQM_A3
155
156
DQM_A4
202
203
DQM_A5
211
212
DQM_A6
223
224
DQM_A7
232
233
164
165
ODT_A0
195
ODT_A1
77
SCKE_A0
52
SCKE_A1
171
SCS_A#0
193
SCS_A#1
76
P_DDR0_A
185
N_DDR0_A
186
P_DDR1_A
137
N_DDR1_A
138
P_DDR2_A
220
N_DDR2_A
221
SMBCLK_DDR
120
SMBDATA_DDR
119
DIMM_VREF_A
1
239
240
101
PLACE CLOSE TO DIMM PIN
ADDRESS: 000
0xA0
DDR2 DIMM1
DQS_A0 10
DQS_A#0 10
DQS_A1 10
DQS_A#1 10
DQS_A2 10
DQS_A#2 10
DQS_A3 10
DQS_A#3 10
DQS_A4 10
DQS_A#4 10
DQS_A5 10
DQS_A#5 10
DQS_A6 10
DQS_A#6 10
DQS_A7 10
DQS_A#7 10
MAA_A[0..13] 10,14 MAA_B[0..13] 10,14
SBS_A2 10,14
SBS_A1 10,14
SBS_A0 10,14
WE_A# 10,14
CAS_A# 10,14
RAS_A# 10,14
DQM_A[0..7] 10 DQM_B[0..7] 10
ODT_A0 10,14
ODT_A1 10,14
SCKE_A0 10,14
SCKE_A1 10,14
SCS_A#0 10,14
SCS_A#1 10,14
P_DDR0_A 10
N_DDR0_A 10
P_DDR1_A 10
N_DDR1_A 10
P_DDR2_A 10
N_DDR2_A 10
C266
C0.1U16Y0402
DATA_B0
DATA_B1
DATA_B2
DATA_B3
DATA_B4
DATA_B5
DATA_B6
DATA_B7
DATA_B8
DATA_B9
DATA_B10
DATA_B11
DATA_B12
DATA_B13
DATA_B14
DATA_B15
DATA_B16
DATA_B17
DATA_B18
DATA_B19
DATA_B20
DATA_B21
DATA_B22
DATA_B23
DATA_B24
DATA_B25
DATA_B26
DATA_B27
DATA_B28
DATA_B29
DATA_B30
DATA_B31
DATA_B32
DATA_B33
DATA_B34
DATA_B35
DATA_B36
DATA_B37
DATA_B38
DATA_B39
DATA_B40
DATA_B41
DATA_B42
DATA_B43
DATA_B44
DATA_B45
DATA_B46
DATA_B47
DATA_B48
DATA_B49
DATA_B50
DATA_B51
DATA_B52
DATA_B53
DATA_B54
DATA_B55
DATA_B56
DATA_B57
DATA_B58
DATA_B59
DATA_B60
DATA_B61
DATA_B62
DATA_B63
DIMM2
10
122
123
128
129
12
13
21
22
131
132
140
141
24
25
30
31
143
144
149
150
33
34
39
40
152
153
158
159
80
81
86
87
199
200
205
206
89
90
95
96
208
209
214
215
98
99
107
108
217
218
226
227
110
111
116
117
229
230
235
236
11
14
17
20
23
26
29
32
35
38
41
44
47
50
65
66
79
82
85
88
91
94
97
161
162
167
VSS
222
DM0/DQS9
NC/DQS9#
DM1/DQS10
NC/DQS10#
DM2/DQS11
NC/DQS11#
DM3/DQS12
NC/DQS12#
DM4/DQS13
NC/DQS13#
DM5/DQS14
NC/DQS14#
DM6/DQS15
NC/DQS15#
DM7/DQS16
NC/DQS16#
DM8/DQS17
NC/DQS17#
CK1#(CK0#)
VSS
VSS
225
228
231
168
CB5
CB6
DQS0
DQS0#
DQS1
DQS1#
DQS2
DQS2#
DQS3
DQS3#
DQS4
DQS4#
DQS5
DQS5#
DQS6
DQS6#
DQS7
DQS7#
DQS8
DQS8#
A10_AP
A11
A12
A13
A14
A15
A16/BA2
BA1
BA0
WE#
CAS#
RAS#
ODT0
ODT1
CKE0
CKE1
CS0#
CS1#
CK0(DU)
CK0#(DU)
CK1(CK0)
CK2(DU)
CK2#(DU)
SCL
SDA
VREF
SA0
SA1
SA2
VSS
VSS
VSS
DDRII-240_green
234
237
CB7
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
DQS_B0
7
DQS_B#0
6
DQS_B1
16
DQS_B#1
15
DQS_B2
28
DQS_B#2
27
DQS_B3
37
DQS_B#3
36
DQS_B4
84
DQS_B#4
83
DQS_B5
93
DQS_B#5
92
DQS_B6
105
DQS_B#6
104
DQS_B7
114
DQS_B#7
113
46
45
MAA_B0
188
MAA_B1
183
MAA_B2
63
MAA_B3
182
MAA_B4
61
MAA_B5
60
MAA_B6
180
MAA_B7
58
MAA_B8
179
MAA_B9
177
MAA_B10
70
MAA_B11
57
MAA_B12
176
MAA_B13
196
174
173
SBS_B2
54
SBS_B1
190
SBS_B0
71
WE_B#
73
CAS_B#
74
RAS_B#
192
DQM_B0
125
126
DQM_B1
134
135
DQM_B2
146
147
DQM_B3
155
156
DQM_B4
202
203
DQM_B5
211
212
DQM_B6
223
224
DQM_B7
232
233
164
165
ODT_B0
195
ODT_B1
77
SCKE_B0
52
SCKE_B1
171
SCS_B#0
193
SCS_B#1
76
P_DDR0_B
185
N_DDR0_B
186
P_DDR1_B
137
N_DDR1_B
138
P_DDR2_B
220
N_DDR2_B
221
SMBCLK_DDR
120
SMBDATA_DDR
119
DIMM_VREF_B
1
VCC3
239
240
101
PLACE CLOSE TO DIMM PIN
ADDRESS: 010
0xA4
DDR2 DIMM2
DQS_B0 10
DQS_B#0 10
DQS_B1 10
DQS_B#1 10
DQS_B2 10
DQS_B#2 10
DQS_B3 10
DQS_B#3 10
DQS_B4 10
DQS_B#4 10
DQS_B5 10
DQS_B#5 10
DQS_B6 10
DQS_B#6 10
DQS_B7 10
DQS_B#7 10
SBS_B2 10,14
SBS_B1 10,14
SBS_B0 10,14
WE_B# 10,14
CAS_B# 10,14
RAS_B# 10,14
ODT_B0 10,14
ODT_B1 10,14
SCKE_B0 10,14
SCKE_B1 10,14
SCS_B#0 10,14
SCS_B#1 10,14
P_DDR0_B 10
N_DDR0_B 10
P_DDR1_B 10
N_DDR1_B 10
P_DDR2_B 10
N_DDR2_B 10
C268
C0.1U16Y0402
68
19
102
55
NC
NC
3
RC118RC0
DQ0
4
DQ1
9
DQ2
NC/TEST
DQ3
DQ4
DQ5
DQ6
DQ7
DQ8
DQ9
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
DQ16
DQ17
DQ18
DQ19
DQ20
DQ21
DQ22
DQ23
DQ24
DQ25
DQ26
DQ27
DQ28
DQ29
DQ30
DQ31
DQ32
DQ33
DQ34
DQ35
DQ36
DQ37
DQ38
DQ39
DQ40
DQ41
DQ42
DQ43
DQ44
DQ45
DQ46
DQ47
DQ48
DQ49
DQ50
DQ51
DQ52
DQ53
DQ54
DQ55
DQ56
DQ57
DQ58
DQ59
DQ60
DQ61
DQ62
DQ63
2
VSS
5
VSS
8
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
100
103
106
109
112
115
191
75
VDD051VDD156VDD262VDD372VDD478VDD5
VDD3
VSS
VSS
VSS
VSS
VSS
VSS
118
121
124
127
130
133
136
VSS
194
139
181
VDD6
VSS
142
175
VDD7
VSS
145
VDD8
VSS
170
VDDQ0
VDDQ153VDDQ259VDDQ364VDDQ4
VSS
VSS
VSS
148
151
154
197
172
VDDQ469VDDQ7
VSS
VSS
VSS
157
160
163
166
VDDQ5
VSS
187
VDDQ6
VSS
169
184
VDDQ7
VSS
198
238
189
67
178
CB042CB143CB248CB349CB4
VDDQ8
VDDQ9
VDDSPD
VSS
VSS
VSS
VSS
VSS
VSS
VSS
201
204
207
210
213
216
219
A A
8
VCC_DDR
R244
1KR1%0402-1
DIMM_VREF_A
R248
1KR1%0402-1
7
SMBCLK_DDR
SMBDATA_DDR
6
R2 33R0402-2
R1 33R0402-2
SMBCLK 18,23,24,25
SMBDATA 18,23,24,25
5
DIMM_VREF_B DIMM_VREF_A
1 2
CP15
X_COPPER
Title
DDR II DIMM 1 & 2
Size Document Number Re v
Custom
4
3
Date: Sheet
2
MICRO-START INT'L CO.,LTD.
MS-7195 100
of
13 33 Friday, September 09, 2005
1
Page 14
8
7
6
5
4
3
2
1
CHANNEL A V_SM_VTT DECOULPING CAPS CHANNEL B V_SM_VTT DECOULPING CAPS
VTT_DDR
C85
C0.1U16Y0402
C93
C0.1U16Y0402
C82
D D
C4.7U35Y1206
C164
X_C4.7U35Y1206
VTT_DDR
C89
C0.1U16Y0402
C116
C0.1U16Y0402
C126
C0.1U16Y0402
C137
C0.1U16Y0402
C149
C0.1U16Y0402
VTT_DDR
VTT_DDR VTT_DDR
VTT_DDR
C83
C4.7U35Y1206
C165
X_C4.7U35Y1206
C86
C0.1U16Y0402
C90
C0.1U16Y0402
C107
C0.1U16Y0402
C121
C0.1U16Y0402
C132
C0.1U16Y0402
C143
C0.1U16Y0402
C153
C0.1U16Y0402
C110
C0.1U16Y0402
VTT_DDR VTT_DDR
MAA_A4
MAA_A2
MAA_A3
MAA_A1
MAA_A9
MAA_A5
MAA_A6
MAA_A8
SBS_A2
MAA_A12
MAA_A11
MAA_A7
RAS_A# 10,13
WE_A# 10,13
CAS_A# 10,13
RAS_A#
WE_A#
CAS_A#
MAA_A13
MAA_A0
SBS_A0
MAA_A10
SBS_A1
SCS_A#0
ODT_A0
SCS_A#1
ODT_A1
SCKE_A1
SCKE_A0
1 2
RN13
3 4
5 6
8P4R-33R0402
7 8
1 2
RN15
3 4
5 6
8P4R-33R0402
7 8
1 2
RN17
3 4
5 6
8P4R-33R0402
7 8
1 2
RN9
3 4
5 6
8P4R-33R0402
7 8
1 2
RN11
3 4
5 6
8P4R-33R0402
7 8
1 2
RN7
3 4
_8P4R-43R0402-LF
5 6
7 8
1 2
3 4
RN19
5 6
_8P4R-43R0402-LF
7 8
CAS_B# 10,13
WE_B# 10,13
RAS_B# 10,13
MAA_B1
MAA_B2
MAA_B3
MAA_B4
MAA_B6
MAA_B8
MAA_B5
MAA_B9
MAA_B7
MAA_B11
MAA_B12
SBS_B2
SBS_B0
SBS_B1
MAA_B10
MAA_B0
MAA_B13
CAS_B#
WE_B#
RAS_B#
ODT_B1
SCS_B#1
ODT_B0
SCS_B#0
SCKE_B0
SCKE_B1
1 2
RN14
3 4
5 6
8P4R-33R0402
7 8
1 2
RN16
3 4
5 6
8P4R-33R0402
7 8
1 2
RN18
3 4
5 6
8P4R-33R0402
7 8
1 2
RN12
3 4
5 6
8P4R-33R0402
7 8
1 2
RN10
3 4
5 6
8P4R-33R0402
7 8
1 2
RN8
3 4
5 6
_8P4R-43R0402-LF
7 8
1 2
RN20
3 4
5 6
_8P4R-43R0402-LF
7 8
EMI
VTT_DDR
C C
C68
X_C0.1U16Y0402
C66
X_C0.1U16Y0402
MAA_A[0..13] 10,13
SBS_A[0..2] 10,13
SCS_A#[0..1] 10,13
SCKE_A[0..1] 10,13
ODT_A[0..1] 10,13
MAA_B[0..13] 10,13
SBS_B[0..2] 10,13
SCS_B#[0..1] 10,13
SCKE_B[0..1] 10,13
ODT_B[0..1] 10,13
Grantsdale GMCH Po we r Seq ue ncing Requirement
Between 1.5V Core and 2.5V DAC
VCC_DDR VCC_DDR
+
EC42
.CD1000U6.3EL15
+
EC49
B B
.CD1000U6.3EL15
EMI
VCC_DDR
C49
X_C0.1U16Y0402
C264
X_C0.1U16Y0402
C52
X_C0.1U16Y0402
C53
X_C0.1U16Y0402
C265
X_C0.1U16Y0402
A A
VCC_DDR
C159
C1U16Y
C100
C1U16Y
C95
C1U16Y
C130
C1U16Y
C148
C1U16Y
C114
C1U16Y
C91
C1U16Y
C84
C1U16Y
C99
C1U16Y
C160
C1U16Y
C193
C1U16Y
C112
C1U16Y
C50
C1U16Y
C57
C1U16Y
C259
C1U16Y
C216
C1U16Y
CT1
X_.CD100U16EL11
VCC3
+
1 2
Q31
_N-NDS351AN_SOT23
D S
G
LM358MX_SOIC8
C217
X_C100P50N0402
U3A
V_2P5_MCH
+
1 2
R203
120R1%
EC47
.CD100U16EL11
1P2VREF 29
C230
C0.1U25X
V_1P5_CORE
D7
V_2P5_MCH
9VSB
R211
130R1%
3
+
1
2
-
4 8
1N4001_DO214AC
Title
DDR II VTT DECOUPLING
Size Document Number Re v
Custom
8
7
6
5
4
3
Date: Sheet
2
MICRO-START INT'L CO.,LTD.
MS-7195 100
of
14 33 Friday, September 09, 2005
1
Page 15
5
3_3VAA
D D
CVBS 30
SVIDEO_Y 30
SVIDEO_C 30
C178
C248
C0.1U16X0402
SIC_LPD
SID_LPD
SDVO_CTRL_DATA
SDVO_CTRL_CLK
R208 0R0402-1
R387 X_0R0402-1
VDDIO
CVBS
SVIDEO_Y
SVIDEO_C
Y
Y 30
Pr
Pr 30
Pb
Pb 30
R187
_374R1%-LF
3_3VAA_BG
XTALOUT
R177 _75KR0402-LF
X1
_27MHZ20P_D
25pF+-25PPM
C207
C0.1U16X0402
C200
C0.1U16X0402
C177
C33P50N0402
X_150L300m_500_0805
V_2P5_MCH
C218
C0.1U16X0402
SDVO_CTRL_DATA 11
SDVO_CTRL_CLK 11
PCIRST#1 21,24,29
PLTRST# 9,17,20
VCC3
C215
C0.1U16X0402
C C
VCC3 +12V
D S
G
_N-MMBF0201NLT1_SOT23
B B
A A
Q29
S3 X_COPPER
L11 X_150L300m_500_0805
VDDIO
C226
C1000P16X0402
1 2
U13
1
2
3
4
_AT24C16AN-10SI-2.7
A0
A1
A2
GND
VCC
SCL
SDA
8
7
WP
6
5
5
C188
C0.1U16X0402
C33P50N0402
3_3DVI
VCC3
VCC1_25VDD
4.7KR0402-1
VCC1_25
L8
+12V
4
R205
U12
1
VSS
2
VDD
3
ALT_ADDR
4
TEST
5
VDDIO
6
VSSIO
7
VSS
8
VDD
9
VSS_VDAC1
10
CVBS
11
SVIDEO_Y
12
SVIDEO_C
13
VAA_VDAC1
14
VDAC_SUB1
15
VDAC_COMP1
16
VSS_VDAC2
17
Y
18
PR
19
PB
20
VAA_VDAC2
21
VDAC_SUB2
22
VDAC_COMP2
23
VDAC_FSADJ
24
VDAC_VREF
25
VAA_VDAC_BG
26
VSS_VDAC_BG
27
VSS_PLL
28
VDD_PLL
29
VAA_OSC
30
XTAL_OUT
31
XTAL_IN
32
VSS_OSC
VCC1_25SDVO
CP7
X_COPPER
1 2
C176
C0.1U16X0402
C182
C0.1U16X0402
4
V_2P5_MCH
R206
4.7KR0402-1
128
VDD
VSS_SDVOBIAS
33
R176
_3.01KR1%0402-LF
C223
C0.1U16X0402
125
124
123
122
127
126
SIC
JP_TX
SDVO_PERST
SDVO_CTRL_CLK
SDVO_CTRL_DATA
SDVO_RSET
VDD_SDVOBIAS
SDVOB_RED_P
SDVOB_RED_N
VDD_SDVOB
34
35
36
37
38
39
VCC5
VDDIO
116
119
120
118
117
121
SID
VIO
VDD
VSSIO
VDDIO
VGA_VSYNC
VGA_HSYNC
LEOPARD
128-PIN ETQFP
SDVOB_GREEN_P
SDVOB_GREEN_N
VSS_SDVOB
SDVOB_BLUE_P
SDVOB_BLUE_N
VDD_SDVOB
SDVOB_CLK_P
40
41
42
43
44
45
113
111
115
112
114
DDC1_CLK
DDC0_DATA
DDC1_DATA1
HOTPLUGDET1
HOTPLUGDET0
_
SDVOB_CLK_N
SDVOC_RED_P
SDVOC_RED_N
VDD_SDVOC
SDVOC_GREEN_P
46
47
48
49
50
3_3VGAB
108
110
104
107
106
105
109
VDD
VSSIO
DDC0_CLK
VAA_VGAB
VSS_VGAB
VGA_VREF
SDVOC_GREEN_N
VSS_SDVOC
SDVOC_BLUE_P
SDVOC_BLUE_N
VDD_SDVOC
SDVOC_CLK_P
51
52
53
54
55
56
57
3
4.7KR0402-1
103
99
102
101
100
VAA_VGA
VGA_SUB
VGA_BLUE
VGA_COMP
VGA_FSADJ
SDVOC_CLK_N
VDD_SDVOTX
SDVO_TV_CLK_P
SDVO_TV_CLK_N
VSS_SDVOTX
58
59
60
61
62
3
R210
98
97
VSS_VGA
VGA_RED
VDD_DVI1
VGA_GREEN
L1TXCP
L1TXCN
VAA_DVI1
L1TX2P
L1TX2N
VSS_DVI1
L1TX1P
L1TX1N
VAA_DVI1
L1TX0P
L1TX0N
VDD_DVI1
VDD_DVI_P1
VSS_DVI_P1
DVI_RSET
VAA_DVIBIAS
VSS_DVI_P0
VDD_DVI_P0
VDD_DVI0
L0TX2P
L0TX2N
VAA_DVI0
L0TX1P
L0TX1N
VSS_DVI0
L0TX0P
L0TX0N
VAA_DVI0
L0TXCP
L0TXCN
VDD_DVI0
SDVO_INT_P
SDVO_INT_N
VDD_SDVOTX
63
64
VCC3
GND
R209
4.7KR0402-1
SIC_LPD
SID_LPD
HTPLG0_DVI
DDC_DATA
DDC_CLK
C220
C0.1U16X0402
96
95
94
93
92
91
90
89
88
87
86
85
84
83
82
81
80
79
78
77
76
75
74
73
72
71
70
69
68
67
66
65
129
SDVOB_INTÂSDVOB_INT+
SDVO_TVCLKINÂSDVO_TVCLKIN+
SDVOC_CLKÂSDVOC_CLK+
SDVOC_BLUEÂSDVOC_BLUE+
SDVOC_GREENÂSDVOC_GREEN+
SDVOC_REDÂSDVOC_RED+
SDVOB_CLKÂSDVOB_CLK+
SDVOB_BLUEÂSDVOB_BLUE+
SDVOB_GREENÂSDVOB_GREEN+
SDVOB_REDÂSDVOB_RED+
2
C0.1U16X0402
C0.1U16X0402
C205
C0.1U16X0402
R200
_1.21KR1%0402-LF
TX2P 30
TX2N 30
TX1P 30
TX1N 30
TX0P 30
TX0N 30
TXCP 30
TXCN 30
3_3VAA_BG
VCC1_25
HTPLG0_DVI 30
DDC_DATA 16,30
DDC_CLK 16,30
R173
X_10KR0402-1
3_3VGA
3_3DVI
3_3VAA_BIAS
3_3VGAB
C219
C0.1U16X0402
Place near Pin107 Place near Pin25
SDVOB_INT- 11
SDVOB_INT+ 11
SDVO_TVCLKIN- 11
SDVO_TVCLKIN+ 11
SDVOC_CLK- 11
SDVOC_CLK+ 11
SDVOC_BLUE- 11
SDVOC_BLUE+ 11
SDVOC_GREEN- 11
SDVOC_GREEN+ 11
SDVOC_RED- 11
SDVOC_RED+ 11
SDVOB_CLK- 11
SDVOB_CLK+ 11
SDVOB_BLUE- 11
SDVOB_BLUE+ 11
SDVOB_GREEN- 11
SDVOB_GREEN+ 11
SDVOB_RED- 11
SDVOB_RED+ 11
2
VCC1_25
C214
VCC1_25VDD
C221
3_3VAA
C185
C0.1U16X0402
C203
C1000P16X0402
C225
C0.1U16X0402
C211
C210
C0.1U16X0402
C0.1U16X0402
VCC1_25 200mA
1
VCC1_25SDVO
C212
C179
C184
C1000P16X0402
C0.1U16X0402
3_3VGA
C227
C1U16Y
C204
C1U16Y
VCC3
VCC1_25
VCC3
Title
SDVO CX25905
Size Document Number Re v
Custom
Date: Sheet
VCC1_25SDVO
3_3DVI
C194
C0.1U16X0402
S8 X_COPPER
L17 X_150L300m_500_0805
S7 X_COPPER
L16 X_150L300m_500_0805
S5 X_COPPER
L14 X_150L300m_500_0805
S2 X_COPPER
L10 X_150L300m_500_0805
S4 X_COPPER
L13 X_150L300m_500_0805
S1 X_COPPER
L9 X_150L300m_500_0805
S6 X_COPPER
L15 X_150L300m_500_0805
U11
VIN3VOUT
C166
C10U10X1206
MICRO-START INT'L CO.,LTD.
MS-7195 100
C0.1U16X0402
C180
C0.1U16X0402
C197
C0.1U16X0402
1 2
1 2
1 2
1 2
1 2
1 2
1 2
VOUT
ADJ
_RC1117S_SOT223
1
1
C175
C1000P16X0402
C174
C0.1U16X0402
C213
C0.1U16X0402
VCC1_25
2
4
15 33 Friday, September 09, 2005
3_3VGAB
3_3VGA
3_3VAA
3_3VAA_BG
3_3VAA_BIAS
VCC1_25SDVO
VCC1_25VDD
+
1 2
EC43
C22U6.3EL
of
Page 16
5
4
3
2
1
Video Connector
D D
VGA_RED 11
VGA_GREEN 11
VGA_BLUE 11
C C
B B
V_2P5_MCH
R342
_2.7KR0402-1
MCH_DDC_CLK 11
MCH_DDC_CLK
PLACE CLOSE TO MCH,
WITHIN 750 MIL OF
PIN
VGA_RED
VGA_GREEN
VGA_BLUE
5VDDCCL
VSYNC_L
HSYNC_L
5VDDCDA
VCC5
R348
2.2KR0402-1
5VDDCCL
D
Q38
N-2N7002_SOT23
D
GS
S
G
VCC5
SOT23SGD
R193
X_150R1%
R192
X_150R1%
R194
X_150R1%
R363 _33R-1
R362 _33R-1
V_2P5_MCH
V_2P5_MCH
V_2P5_MCH
C377
C0.1U16Y0402
1PS226
3
D19
1PS226_SOT23
1PS226
3
D18
1PS226_SOT23
1PS226
3
D17
1PS226_SOT23
1PS226
3
D16
1PS226_SOT23
VCC5 VC C5
1PS226
2
3
1
D20
1PS226_SOT23
VSYNC
VSYNC 11
2
1
2
1
2
1
2
1
R365 _100R-1
R369 _100R-1
1
2
135
246
VCC5
14 7
U17A
ACT08DR_SOIC14
R358
_75R1%-1
R357
_75R1%-1
R359
_75R1%-1
7
8
3
CN1
8P4C-33P50N
VSYNC_L
C408
C22P50N
C406
C22P50N
C407
C22P50N
4
5
L36
0.12U300m-1
L37
0.12U300m-1
L35
0.12U300m-1
DDC_CLK 15,30
VGA_VSYNC 30
VGA_HSYNC 30
DDC_DATA 15,30
VCC5
14 7
U17B
ACT08DR_SOIC14
6
C412
C33P50N
C413
C33P50N
C411
C33P50N
D_VGA_RED 30
D_VGA_GREEN 30
D_VGA_BLUE 30
R347
_2.2KR0402-1
5VDDCDA
D
A A
MCH_DDC_DATA 11
V_2P5_MCH
R338
_2.7KR0402-1
MCH_DDC_DATA
5
Q37
N-2N7002_SOT23
D
GS
S
G
SOT23SGD
HSYNC
HSYNC 11
4
13
12
VCC5
14 7
U17D
ACT08DR_SOIC14
3
VCC5
14 7
U17C
HSYNC_L
11
10
9
8
ACT08DR_SOIC14
Title
VIDEO Connector
Size Document Number Re v
Custom
2
Date: Sheet of
MICRO-START INT'L CO.,LTD.
MS-7195 100
1
16 33 Friday, September 09, 2005
Page 17
8
D D
AD[0..31] 21,24
C_BE#[3:0] 21,24
C C
B B
A A
8
AD[0..31]
C_BE#[3:0]
VCC3_SB
7
DEVSEL# 21,24
FRAME# 21,24
IRDY# 21,24
TRDY# 21,24
STOP# 21,24
PAR 21,24
LOCK# 24
SERR# 24
PERR# 21,24
PCI_PME# 21,24
ICH_PCLK 20
PCIRST_ICH7# 29
PREQ#0 24
PREQ#1 24
PREQ#2 24
PREQ#3 21,24
PREQ#4 24
PREQ#5 24
PGNT#1 24
PGNT#2 24
PGNT#3 21
PIRQ#A 24
PIRQ#B 24
PIRQ#C 24
PIRQ#D 24
PIRQ#E 21,24
PIRQ#F 24
PIRQ#G 24
PIRQ#H 24
IDE_IRQ 26
R324 X_10KR0402-1
R321 X_10KR0402-1
R323 X_10KR0402-1
7
AD0
AD1
AD2
AD3
AD4
AD5
AD6
AD7
AD8
AD9
AD10
AD11
AD12
AD13
AD14
AD15
AD16
AD17
AD18
AD19
AD20
AD21
AD22
AD23
AD24
AD25
AD26
AD27
AD28
AD29
AD30
AD31
C_BE#0
C_BE#1
C_BE#2
C_BE#3
PREQ#0
PREQ#1
PREQ#2
PREQ#3
PREQ#4
PREQ#5
PGNT#1
PGNT#2
PGNT#3
SERIRQ
6
U18A
(INTEL-NH82801GB-A1-LF)
E18
AD0
C18
AD1
A16
AD2
F18
AD3
E16
AD4
A18
AD5
E17
AD6
A17
AD7
A15
AD8
C14
AD9
E14
AD10
D14
AD11
B12
AD12
C13
AD13
G15
AD14
G13
AD15
E12
AD16
C11
AD17
D11
AD18
A11
AD19
A10
AD20
F11
AD21
F10
AD22
E9
AD23
D9
AD24
B9
AD25
A8
AD26
A6
AD27
C7
AD28
B6
AD29
E6
AD30
D6
AD31
B15
C/BE0#
C12
C/BE1#
D12
C/BE2#
C15
C/BE3#
A12
DEVSEL#
F16
FRAME#
A7
IRDY#
F14
TRDY#
F15
STOP#
E10
PAR
E11
PLOCK#
B10
SERR#
C9
PERR#
B19
PME#
A9
PCICLK
B18
PCIRST#
D7
REQ0#
C16
REQ1#
C17
REQ2#
E13
REQ3#
A13
GPIO22/REQ4#
C8
GPIO1/REQ5#
E7
GNT0#
D16
GNT1#
D17
GNT2#
F13
GNT3#
A14
GPIO48/GNT4#
D8
GPIO17/GNT5#
A3
PIRQA#
B4
PIRQB#
C5
PIRQC#
B5
PIRQD#
G8
GPIO2/PIRQE#
F7
GPIO3/PIRQF#
F8
GPIO4/PIRQG#
G7
GPIO5/PIRQH#
AH21
SERIRQ
AH16
IDEIRQ
P5
SPI_MOSI
P2
SPI_MISO
P6
SPI_CS#
R2
SPI_CLK
P1
SPI_ARB
VSS_0A4VSS_1
A23
6
VSS_2B1VSS_3B8VSS_4
VSS_5
B11
B14
VSS_6
B17
B20
PCI INTERFACE INTERRUPT
ICH 7
PART 1/3
SPI
VSS_7
VSS_8
VSS_9
VSS_10C2VSS_11C6VSS_12
VSS_13
VSS_14
VSS_15
VSS_16
B26
B28
D10
D13
D18
D21
D24
5
VSS_17E1VSS_18E2VSS_19E8VSS_20
VSS_21F3VSS_22F4VSS_23F5VSS_24
E15
5
F12
VSS_25
F27
F28
VSS_26
CPU LAN PCI EXPRESS DIRECT MEDIA
VSS_27G1VSS_28G2VSS_29G5VSS_30G6VSS_31G9VSS_32
G14
VSS_33
G18
G21
4
THRMTRIP#
GPO49/CPUPWRGD
DMI_0RXN
DMI_0RXP
DMI_0TXN
DMI_1RXN
DMI_1RXP
DMI_1TXN
DMI_2RXN
DMI_2RXP
DMI_2TXN
DMI_3RXN
DMI_3RXP
DMI_3TXN
DMI_CLKN
DMI_CLKP
DMI_ZCOMP
DMI_IRCOMP
LAN_RSTSYNC
LAN_RXD0
LAN_RXD1
LAN_RXD2
LAN_TXD0
LAN_TXD1
LAN_TXD2
EE_SHCLK
VSS_34
VSS_35
VSS_36
VSS_37
VSS_38H3VSS_39H4VSS_40
H5
G24
G25
G26
4
A20M#
CPUSLP#
FERR#
IGNNE#
INIT#
INIT3_3V#
INTR
NMI
SMI#
STPCLK#
RCIN#
A20GATE
PLTRST#
PERN_1
PERP_1
PETN_1
PETP_1
PERN_2
PERP_2
PETN_2
PETP_2
PERN_3
PERP_3
PETN_3
PETP_3
PERN_4
PERP_4
PETN_4
PETP_4
PERN_5
PERP_5
PETN_5
PETP_5
PERN_6
PERP_6
PETN_6
PETP_6
DMI_0TXP
DMI_1TXP
DMI_2TXP
DMI_3TXP
LAN_CLK
EE_CS
EE_DIN
EE_DOUT
3
AH28
AG27
AG26
AG22
AF22
AG21
AF25
AH24
AF23
AH22
AG23
AE22
AF26
AG24
C26
F26
F25
E28
E27
H26
H25
G28
G27
K26
K25
J28
J27
M26
M25
L28
L27
P26
P25
N28
N27
T25
T24
R28
R27
V26
V25
U28
U27
Y26
Y25
W28
W27
AB26
AB25
AA28
AA27
AD25
AD24
AC28
AC27
AE28
AE27
C25
D25
V3
U3
U5
V4
T5
U7
V6
V7
W1
W3
Y2
Y1
EE_CS
EE_SHCLK
EE_DOUT
EE_DIN
KBRST#
A20GATE
R219 22R0402
ICHPETP_1 ICH_PETP_1
DMI_BIAS
LAN_CLK_PHY
LAN_RSTSYNC
LAN_RXD0
LAN_RXD1
LAN_RXD2
LAN_TXD0
LAN_TXD1
LAN_TXD2
EE_CS
EE_DIN
EE_DOUT
EE_SHCLK
C238 C0.1U16Y0402
C237 C0.1U16Y0402
R218 24.9R1%
U23
1
CS
2
SK
3
DI
4
DO
_AT93C46-10SU-2.7-LF
DMI_MTN_IRN_0 11
DMI_MTP_IRP_0 11
DMI_ITN_MRN_0 11
DMI_ITP_MRP_0 11
DMI_MTN_IRN_1 11
DMI_MTP_IRP_1 11
DMI_ITN_MRN_1 11
DMI_ITP_MRP_1 11
DMI_MTN_IRN_2 11
DMI_MTP_IRP_2 11
DMI_ITN_MRN_2 11
DMI_ITP_MRP_2 11
DMI_MTN_IRN_3 11
DMI_MTP_IRP_3 11
DMI_ITN_MRN_3 11
DMI_ITP_MRP_3 11
CK_PE_100M_ICH# 20
CK_PE_100M_ICH 20
VCC
ORG
GND
for 82562 EEPROM
3
H_A20M# 6
H_FERR# 6,7
H_IGNNE# 6
H_INIT# 6
FWH_INIT# 20
H_INTR 6
H_NMI 6
ICH_H_SMI# 6
H_STPCLK# 6
TRMTRIP# 6,7
H_PWRGD 6,7
ICH_PERN_1
ICH_PERP_1
ICH_PETN_1 ICHPETN_1
V_DMI 19
LAN_CLK_PHY 23
LAN_RSTSYNC 23
LAN_RXD0 23
LAN_RXD1 23
LAN_RXD2 23
LAN_TXD0 23
LAN_TXD1 23
LAN_TXD2 23
VCC3_SB
8
7
NC
6
5
2
PLTRST# 9,15,20
ICH_PERN_1 24
ICH_PERP_1 24
ICH_PETN_1 24
ICH_PETP_1 24
DMI Differential impedance
100ohm +-20%
KBRST#
R270 10KR0402
A20GATE
R259 10KR0402
SERIRQ
R257 10KR0402
VCC3
CB10 X_C0.1U25Y
CB12 X_C0.1U25Y
CB11 X_C0.1U16Y0402
CB9 C0.1U25Y
1
VCC3
PLACE 1 EACH NEAR A3 & F1
PLACE REMAINDER ANUWHERE
U8_X1
ICH
Heatsink
ICH_HS
Title
ICH7 - PCI, DM I, CPU, IRQ
Size Document Number Re v
Custom
Date: Sheet
MICRO-START INT'L CO.,LTD.
MS-7195 100
2
of
17 33 Friday, Sept em be r 09, 2005
1
Page 18
8
LPC_AD[0..3] 20
D D
C C
B B
A A
LPC_FRAME# 20
AC_RST# 22
AC_SDOUT 22
AC_SYNC 22
AC_BITCLK 22
AC_SDIN0 22
C335
X_C10P25N0402/0.5
SMBCLK 13,23,24,25
SMBDATA 13,23,24,25
RSMRST# 23,29
LPC_AD0
LPC_AD1
LPC_AD2
LPC_AD3
LPC_DRQ#0
GPI23
RN39 _8P4R-33R0402-1
7 8
5 6
3 4
1 2
C339
X_C10P25N0402/0.5
USB0- 28
USB0+ 28
USB1- 28
USB1+ 28
USB2- 28
USB2+ 28
USB3- 28
USB3+ 28
USB4- 28
USB4+ 28
USB5- 28
USB5+ 28
USB6- 28
USB6+ 28
USB7- 28
USB7+ 28
C340
C0.1U16Y0402
OC#0 28
C341
C0.1U16Y0402
OC#2 28
OC#1 28
C337
C0.1U16Y0402
R326 22.6R1%
R237 33R0402-2
R242 33R0402-2
TEMP_THERM#
RSMRST#
PWRBTN# 27
PWR_GD 9,29
VRM_GD 29,31
FP_RST# 6,27
SLP_S3# 27,29
SLP_S4# 29
ICH_WAKE# 24
OVT# 25
ICH_SYNC# 9
SPKR 27
TEST_U2
TEST_U1
TEST_U3
CK_14M_ICH 20
CK_48M_USB_ICH 20
USB_BIAS
SMBCLK_ICH
SMBDATA_ICH
SM_LINK0
SM_LINK1
LINK_ALERT#
SUS_STAT#
INTRUDER#
ICH_WAKE#
RI#
OVT#
BATTLOW#
TP_1
TP_2
TP_3
AC4
AC3
AD22
AF20
AH20
AF24
AH25
AC1
U18B
(INTEL-NH82801GB-A1-LF)
AA6
LAD0
AB5
LAD1
LAD2
Y6
LAD3
LDRQ_0#
AA5
LDRQ_1#/GPI023
AB3
LFRAME#
U1
ACZ_BCLK
R5
ACZ_RST#
T2
ACZ_SDIN_0
T3
ACZ_SDIN_1
T1
ACZ_SDIN_2
T4
ACZ_SDOUT
R6
ACZ_SYNC
F1
USBP_0N
F2
USBP_0P
G4
USBP_1N
G3
USBP_1P
H1
USBP_2N
H2
USBP_2P
J4
USBP_3N
J3
USBP_3P
K1
USBP_4N
K2
USBP_4P
L4
USBP_5N
L5
USBP_5P
M1
USBP_6N
M2
USBP_6P
N4
USBP_7N
N3
USBP_7P
D3
OC_0#
C4
OC_1#
D5
OC_2#
D4
OC_3#
E5
OC_4#
C3
GPIO29/OC_5#
A2
GPIO30/OC_6#
B3
GPIO31/OC_7#
D1
USBRBIAS
D2
USBRBIAS#
C22
SMBCLK
B22
SMBDATA
B23
GPIO11/SMBALERT#
B25
SMLINK_0
A25
SMLINK_1
A26
LINKALERT#
Y4
RSMRST#
C19
LAN_RST#
C23
PWRBTN#
AA4
PWROK
VRMPWRGD
A22
SYS_RESET#
B24
SLP_S3#
D23
SLP_S4#
F22
SLP_S5#
A27
SUS_STAT#
C20
SUSCLK
Y5
INTRUDER#
F20
WAKE#
A28
RI#
THRM#
MCH_SYNC#
A19
SPKR
C21
BATLOW#/TP_0
DPRSTP#/TP_1
DPSLP#/TP_2
F21
TP_3
CLK14
B2
CLK48
7
VSS_41
H24
H27
VSS_42
VSS_43
VSS_44J1VSS_45J2VSS_46J5VSS_47
H28
J24
VSS_48
J25
J26
PART 2/3
MISC POWER MGNT SM BUS USB AC-LINK LPC
VSS_49
VSS_50
VSS_51
VSS_52
VSS_53
VSS_54
VSS_55
L13
L15
L24
L25
K24
K27
K28
ICH 7
VSS_56
VSS_57
VSS_58M3VSS_59M4VSS_60M5VSS_61
VSS_62
L26
M12
M13
VSS_63
M14
6
VSS_64
M15
M16
VSS_65
VSS_66
M17
M24
VSS_67
VSS_68
M27
VSS_69
M28
P-ATA S-ATA
GPIO RTC
VSS_70N1VSS_71N2VSS_72N5VSS_73N6VSS_74
VSS_75
N11
N12
GPIO21/SATA_0GP
GPIO19/SATA_1GP
GPIO36/SATA_2GP
GPIO37/SATA_3GP
GPIO16/DPRSLPVR
GPIO20/STPCPU#
EL_RSVD/GPIO26
EL_STATE0/GPIO27
EL_STATE1/GPIO28
GPIO32/CLKRUN#
GPIO33/AZ_DOCK_EN#
GPIO34/AZ_DOCK_RST#
GPIO35/SATACLKREQ#
VSS_76
VSS_77
VSS_78
VSS_79
VSS_80
VSS_81
N13
N14
N15
N16
N17
N18
N24
DDACK#
DDREQ
DIOR#
DIOW#
IORDY
DA0
DA1
DA2
DCS1#
DCS3#
DD_0
DD_1
DD_2
DD_3
DD_4
DD_5
DD_6
DD_7
DD_8
DD_9
DD_10
DD_11
DD_12
DD_13
DD_14
DD_15
SATA_0RXN
SATA_0RXP
SATA_0TXN
SATA_0TXP
SATA_1RXN
SATA_1RXP
SATA_1TXN
SATA_1TXP
SATA_2RXN
SATA_2RXP
SATA_2TXN
SATA_2TXP
SATA_3RXN
SATA_3RXP
SATA_3TXN
SATA_3TXP
SATA_CLKN
SATA_CLKP
SATARBIASN
SATARBIASP
SATALED#
BMBUSY#/GPIO0
GPIO6
GPIO7
GPIO8
GPIO9
GPIO10
GPIO12
GPIO13
GPIO14
GPIO15
GPIO18/STPPCI#
GPIO24
GPIO25
GPIO38
GPIO39
VCCRTC
INTVRMEN
RTCRST#
RTCX1
RTCX2
VSS_82
VSS_83
VSS_84
VSS_85
P3
N25
N26
5
AF16
AE15
AF15
AH15
AG16
AH17
AE17
AF17
AE16
AD16
PDD0
AB15
PDD1
AE14
PDD2
AG13
PDD3
AF13
PDD4
AD14
PDD5
AC13
PDD6
AD12
PDD7
AC12
PDD8
AE12
PDD9
AF12
PDD10
AB13
PDD11
AC14
PDD12
AF14
PDD13
AH13
PDD14
AH14
PDD15
AC15
AF3
AE3
AG2
AH2
AE5
AD5
AG4
AH4
AF7
AE7
AG6
AH6
AD9
AE9
AG8
AH8
AF1
AE1
SATA_BIAS
200MILS
SIO_SMI#
ATADET0
GPI7
SIO_PME#
GPI9
GPI10
GPI12
BRD_ID1
BRD_ID2
BRD_ID0
TBL#
LAN_DISABLE#
ENET_DISABLE#
CLEAR_CMOS#
BIOS_WP#
GPI38
GPI39
INTVRMEN
RTC_RST#
RTC_XI
Y2
32.768KHZ12.5P_D
RTC_XO
R283 24.9R1%
1 2
3 4
5 6
7 8
R318 330KR0402
AH10
AG10
AF18
AF19
AH18
AH19
AE19
AB18
AC21
AC18
E21
E20
A20
F19
E19
R4
E22
AC22
AC20
AF21
R3
D20
A21
B21
E23
AG18
AC19
U2
AD21
AD20
AE20
W5
W4
AA3
AB1
AB2
4
PD_DACK# 26
PD_DREQ 26
PD_IOR# 26
PD_IOW# 26
PD_IORDY 26
PD_A0 26
PD_A1 26
PD_A2 26
PD_CS#1 26
PD_CS#3 26
PDD[0..15] 26
SATA_RX#0 26
SATA_RX0 26
SATA_TX#0 26
SATA_TX0 26
CK_ICHSATA# 20
CK_ICHSATA 20
PLACE THE RESISTOR WHIN 500MILS
SATALED# 27
RN32
8P4R-10KR0402
SIO_SMI# 25
ATADET0 26
TBL# 20
LAN_DISABLE# 23
BAY_ATTACH# 26
BAY_IS_HDD 26
BIOS_WP# 20
RISER_DETECT_2 24
RISER_DETECT_1 24
VBAT
VBAT
C347 C18P50N0402
R332
_10MR1%0402-LF
C348 C18P50N0402
VCC3
For Ultrabay Slim and
Ultrabay Enhanced IDE
GPIO
3
ICH7 STRAPPING RESISTORS
RI#
SM_LINK0
SM_LINK1
ENET_DISABLE#
LINK_ALERT#
GPI10
GPI9
BATTLOW#
GPI12
SIO_PME#
ICH_WAKE#
SUS_STAT#
SMBCLK_ICH
SMBDATA_ICH
GPI7
GPI39
GPI38
ATADET0
GPI23
LPC_DRQ#0
CLEAR_CMOS#
INTRUDER#
RSMRST#
PWR_GD
AC_BITCLK
TEMP_THERM#
R228 10KR0402-1
R245 10KR0402-1
R266 10KR0402-1
R267 1KR0402-1
R220 10KR0402-1
R234 2.2KR0402
R239 2.2KR0402
R300 10KR0402-1
R298 10KR0402-1
R272 10KR0402-1
R328 1MR0402
R319 X_4.7KR
R325 4.7 KR
R329 10KR0402-1
R315 20KR1%0402
R233 10KR0402-1
R249 X_10KR0402-1
1 2
3 4
5 6
7 8
1 2
3 4
5 6
7 8
1 2
3 4
5 6
7 8
VCC3_SB
VCC3_SB
RN25
8P4R-10KR0402
RN28
8P4R-10KR0402
VCC3
RN31
8P4R-10KR0402
VCC3
VBAT
VCC5_SB
VCC3_SB
2
D6
S-BAT54C_SOT23
BAT1
VCC3_SB
2
1
BRD_ID1
BRD_ID2
BRD_ID0
GPI13 :BRD_ID1
GPI14 :BRD_ID2
GPI15 :BRD_ID0
VBAT
3
R146
_1KR-1
R268 1KR0402-1
R322 1KR0402-1
R258 1KR0402-1
Deflault Instead
GPIO0
GPIO1
GPIO[5:2]
GPIO17
GPIO19 SATA[1]GP
REQ4#
LDRQ1# GPIO23
GPIO[37:36] SATA[3:2]GP
GPIO48
RTC BLOCK
R156
_20KR-LF
C127
C1U16Y0805
RTC_RST#
C145
C0.1U25Y
1
VCC3_SB
BM_BUST# / PMSYNC#
REQ[5]#
PREQ[H:E]#
GPIO11 SMBALERT#
SATA[0]GP GPIO21
GPIO22
GPIO[31:29] OC[7:5]#
GPIO49 CPUPWRGD
CLR_CMOS
2
1
_H1X2_red
R170
100R
Title
INTEL ICH7 LPC & ATA & USB & GPIO
Size Documen t N u m b e r R ev
Custom
8
7
6
5
4
3
Date: Sheet
2
MICRO-START INT'L CO.,LTD.
MS-7195 100
of
18 33 Monday, September 12, 2005
1
Page 19
8
CP12
V_1P5_CORE
D D
V_DMI 17
C C
X_COPPER
CP11
X_COPPER
L19 X_80L4_30_1206
_CD470U6.3EL11
C236
C0.01U25X0402
C240
_C1U6.3Y50402/80-20%
C239
C0.1U16Y0402
C235
C10U10Y0805
EC48
V_DMI
+
7
U18C
(INTEL-NH82801GB-A1-LF)
D26
VCC1_5_B
D27
VCC1_5_B
D28
VCC1_5_B
E24
VCC1_5_B
E25
VCC1_5_B
E26
VCC1_5_B
F23
VCC1_5_B
F24
VCC1_5_B
G22
VCC1_5_B
G23
VCC1_5_B
H22
VCC1_5_B
H23
VCC1_5_B
J22
VCC1_5_B
J23
VCC1_5_B
K22
VCC1_5_B
K23
VCC1_5_B
L22
VCC1_5_B
L23
VCC1_5_B
M22
VCC1_5_B
M23
VCC1_5_B
N22
VCC1_5_B
N23
VCC1_5_B
P22
VCC1_5_B
P23
VCC1_5_B
R22
VCC1_5_B
R23
VCC1_5_B
R24
VCC1_5_B
R25
VCC1_5_B
R26
VCC1_5_B
T22
VCC1_5_B
T23
VCC1_5_B
T26
VCC1_5_B
T27
VCC1_5_B
T28
VCC1_5_B
U22
VCC1_5_B
U23
VCC1_5_B
V22
VCC1_5_B
V23
VCC1_5_B
W22
VCC1_5_B
W23
VCC1_5_B
Y22
VCC1_5_B
Y23
VCC1_5_B
AA22
VCC1_5_B
AA23
VCC1_5_B
AB22
VCC1_5_B
AB23
VCC1_5_B
AC23
VCC1_5_B
AC24
VCC1_5_B
AC25
VCC1_5_B
AC26
VCC1_5_B
AD26
VCC1_5_B
AD27
VCC1_5_B
AD28
VCC1_5_B
6
1.5V DMI POWER 1.5V CORE WELL POWER
AD4
AD7
VSS_169
VSS_170
AD8
AD11
VSS_171
VSS_172
AD15
AD19
AD23
AE2
AE4
AE8
AE11
AE13
AE18
VSS_173
VSS_174
VSS_175
VSS_176
VSS_177
VSS_178
VSS_179
VSS_180
VSS_181
ICH 7
PART 3/3
AE21
AE24
VSS_182
VSS_183
AE25
AF2
VSS_184
VSS_185
AF4
AF8
VSS_186
VSS_187
5
AF11
AF27
VSS_188
VSS_189
AF28
AG1
VSS_190
VSS_191
AG3
AG7
VSS_192
VSS_193
AG14
AG17
VSS_194
VSS_195
AG20
AG25
VSS_196
AH1
AH3
VSS_197
VSS_198
VSS_199
AH7
AH23
VSS_200
VSS_201
AH27
AH12
VSS_202
VSS_203
4
S0 POWER S5 POWER
V5REF1
V5REF2
VCC3_3-1
VCC3_3-2
VCC3_3-3
VCC3_3-4
VCC3_3-5
VCC3_3-6
VCC3_3-7
VCC3_3-8
VCC3_3-9
VCC3_3-10
VCC3_3-11
VCC3_3-12
VCC3_3-13
VCC3_3-14
VCC3_3-15
VCC3_3-16
VCC3_3-17
VCC3_3-18
VCC3_3-19
VCC3_3-20
VCC3_3-21
VCC3_3-22
VCC_CPU_IO-1
VCC_CPU_IO-2
VCC_CPU_IO-3
VCCDMIPLL
VCCSATAPLL
VCCUSBPLL
VCC1_05-1
VCC1_05-2
VCC1_05-3
VCC1_05-4
VCC1_05-5
VCC1_05-6
VCC1_05-7
VCC1_05-8
VCC1_05-9
VCC1_05-10
VCC1_05-11
VCC1_05-12
VCC1_05-13
VCC1_05-14
VCC1_05-15
VCC1_05-16
VCC1_05-17
VCC1_05-18
VCC1_05-19
VCC1_05-20
AD17
G10
A5
AA7
AB12
AB20
AC16
AD13
AD18
AG12
AG15
AG19
AH11
B13
B16
B27
B7
C10
D15
F9
G11
G12
G16
U6
AE23
AE26
AH26
AG28
AD2
C1
L11
L12
L14
L16
L17
L18
M11
M18
P11
P18
T11
T18
U11
U18
V11
V12
V14
V16
V17
V18
3
2
1
5VREF Sequencing Circuit
5VREF
VCC3
V_FSB_VTT
C254
C0.1U16Y0402
C231
C0.01U25X0402
C309
C232
C0.1U16Y0402
C234
C0.1U16Y0402
C233
C0.01U25X0402
V_1P05_CORE
C322
C10U10Y0805
C0.01U25X0402
DZ2
S-1N5817_DO214AC
VCC3
L18
1U500m_0805
L22
10U100m_0805
5VREF
C167
C0.1U16Y0402
R217
_1R1%-1
R296
0R0402-1
V_1P5_CORE
R287 1KR0402-1
C294 C0.1U16Y0402
C253
C0.1U16Y0402
V_1P5_CORE
V_1P5_CORE
VCC5 VCC3
VSS_98
AD1
AC11
VSS_96
VSS_97
AD3
F6
C336 C0.1U16Y0402
A24
C24
D19
D22
E3
G19
K3
K4
K5
K6
L1
L2
L3
L6
L7
M6
M7
N7
P7
R7
V1
V5
W2
W7
TP1_VCCSUS1_05
AA2
TP2_VCCSUS1_05
C28
TP3_VCCSUS1_05
G20
TP4_VCCSUS1_05
K7
TP5_VCCSUS1_05
Y7
3
VSS_103
VSS_104
VSS_105
AB27
AB24
VCCSUS3_3-1
VCCSUS3_3-2
VCCSUS3_3-3
VCCSUS3_3-4
VCCSUS3_3-5
VCCSUS3_3-6
VCCSUS3_3-7
VCCSUS3_3-8
VCCSUS3_3-9
VCCSUS3_3-10
VCCSUS3_3-11
VCCSUS3_3-12
VCCSUS3_3-13
VCCSUS3_3-14
VCCSUS3_3-15
VCCSUS3_3-16
VCCSUS3_3-17
VCCSUS3_3-18
VCCSUS3_3-19
VCCSUS3_3-20
VCCSUS3_3-21
VCCSUS3_3-22
VCCSUS3_3-23
VCCSUS3_3-24
VCCSUS1_05-1
VCCSUS1_05-2
VCCSUS1_05-3
VCCSUS1_05-4
VCCSUS1_05-5
VSS_100
VSS_101
VSS_102
AC9
AC5
AC2
AB28
V5REF_SUS
VSS_99
V_1P5_CORE VCC3_SB
B B
V_1P5_CORE
C293
C10U10Y0805
C276
C0.1U16Y0402
C346
C10U10Y0805
C338
C0.1U16Y0402
C299
C0.1U16Y0402
A A
8
AB10
AB17
AB7
AB8
AB9
AC10
AC17
AC6
AC7
AC8
AD10
AD6
AE10
AE6
AF10
AF5
AF6
AF9
AG5
AG9
AH5
AH9
G17
F17
A1
H6
H7
J6
J7
T7
VCC1_5-1
VCC1_5-2
VCC1_5-3
VCC1_5-4
VCC1_5-5
VCC1_5-6
VCC1_5-7
VCC1_5-8
VCC1_5-9
VCC1_5-10
VCC1_5-11
VCC1_5-12
VCC1_5-13
VCC1_5-14
VCC1_5-15
VCC1_5-16
VCC1_5-17
VCC1_5-18
VCC1_5-19
VCC1_5-20
VCC1_5-21
VCC1_5-22
VCC1_5-23
VCC1_5-24
VCC1_5-25
VCC1_5-26
VCC1_5-27
VCC1_5-28
VCC1_5-29
VCC1_5-30
7
VSS_168
P4
P12
VSS_165
VSS_166
VSS_167
P14
P13
VSS_163
VSS_164
P16
P15
VSS_161
VSS_162
P24
P17
VSS_159
VSS_160
P28
P27
VSS_157
VSS_158
R1
R11
VSS_155
VSS_156
R13
R12
6
VSS_153
VSS_154
E4
AG11
VSS_151
VSS_152
R14
C27
VSS_149
VSS_150
R16
R15
VSS_147
VSS_148
R18
R17
VSS_146
T6
T12
VSS_143
VSS_144
VSS_145
T14
T13
VSS_141
VSS_142
T16
T15
VSS_139
VSS_140
U4
T17
VSS_137
VSS_138
U13
U12
VSS_135
VSS_136
U15
U14
VSS_133
VSS_134
U17
U16
5
VSS_131
VSS_132
U25
U24
VSS_129
VSS_130
V2
U26
VSS_127
VSS_128
V15
V13
VSS_126
V27
V24
VSS_123
VSS_124
VSS_125
W6
V28
VSS_121
VSS_122
W26
W25
W24
VSS_118
VSS_119
VSS_120
Y3
Y24
VSS_116
VSS_117
Y28
Y27
VSS_114
VSS_115
AA1
AA24
VSS_112
VSS_113
AA26
AA25
VSS_111
AB4
4
VSS_109
VSS_110
AB6
AB11
VSS_107
VSS_108
AB16
AB14
VSS_106
AB21
AB19
VCC5_SB
C257
C0.1U16Y0402
C345
C0.01U25X0402
C342
C0.01U25X0402
TP19
TP15
TP16
TP18
TP17
Title
INTEL ICH7 POWER
Size Document Number Rev
Custom
Date: Sheet
2
MICRO-START INT'L CO.,LTD.
MS-7195 100
19 33 Friday, September 09, 2005
of
1
Page 20
8
C245
C0.1U16Y0402
C273
C10U6.3X50805-1
SMBCLK_ISO 24,29
SMBDATA_ISO 24,29
TBL# 18
V3_SRC_CPU_CLKGEN
PLTRST#
PRES3 PRES4
PRES2
PRES1
PRES0
BIOS_WP#
TBL#
10KR0402-1
VCC3
D D
VCC3
C C
B B
L20 600L200m_500-1
C277
C0.1U16Y0402
C261
C0.1U16Y0402
L21 600L200m_500-1
C284
C0.1U16Y0402
BIOS_WP1
H1X2_black
LPC_AD[0..3] 18
+
C262
C0.1U16Y0402
C267
C10U6.3X50805-1
+
1
2
R236
1KR0402-1
PLTRST# 9,15,17
BIOS_WP# 18
C246
C0.1U16Y0402
V_3P3_CLKPWR_L
SMBCLK_ISO
SMBDATA_ISO
FSA
FSB
FSC
VCC3
R195
FWH_ID0
LPC_AD0
LPC_AD1
LPC_AD2
7
Clock Generator - ICS954101
U15
42
C272
C0.1U16Y0402
C269
C0.1U16Y0402
C244
C0.1U16Y0402
C263
C0.1U16Y0402
C270
C0.1U16Y0402
C271
C0.1U16Y0402
C243
C0.1U16Y0402
CPU_VDD
45
CPU_GND
21
SRC_VDD
28
SRC_VDD
34
SRC_VDD
29
SRC_GND
37
VDDA
38
VSSA
1
PCI_VDD
2
PCI_GND
7
PCI_VDD
6
PCI_GND
11
48_VDD
13
48_GND
48
REF_VDD
51
REF_GND
46
SCLK
47
SDATA
18
FSA
16
FSB/TEST_MODE
53
FSC/TEST_SEL
ICS954101DF_SSOP56
Firware Hub (FWH)
BIOS1
1
VPP
2
RST#
3
FGPI3
4
FGPI2
5
FGPI1
6
R198
10KR0402-1
FGPI0
7
WP#
8
TBL#
9
ID3
10
ID2
11
ID1
12
ID0
13
FWH0
14
FWH1
15
FWH2
16
GND
W39V040FBP
<Priority>
6
CPU0
CPU0#
CPU1
CPU1#
CPU2_ITP/SRC7
CPU2_ITP#/SRC7#
SRC1
SRC1#
SRC2
SRC2#
SRC3
SRC3#
SRC4_SATA
SRC4_SATA#
SRC5
SRC5#
SRC6
SRC6#
DOT96
DOT96#
PCIF0/ITP_EN
PCIF1
PCIF2
PCI0
PCI1
PCI2
PCI3
PCI4
PCI5
USB_48M
REF
VTT_PWRGD#/PD
IREF
32
VCC
31
CLK
30
FGPI4
29
IC(VIL)
28
GNDA
27
VCCA
26
GND
25
VCC
24
INIT#
23
FWH4
22
RFU
21
RFU
20
RFU
19
RFU
18
RFU
17
FWH3
44
43
41
40
36
35
19
20
22
23
CK_PE_SRC3
24
CK_PE_SRC3#
25
CK_PE_SRC4
26
CK_PE_SRC4#
27
CK_PE_SRC5
31
CK_PE_SRC5#
30
CK_PE_SRC6
33
CK_PE_SRC6#
32
DOT_96M_L
14
DOT_96M_L#
15
PCIF0 V_3P3_CLKPWR_L PCIF0
8
FWHPCLK
9
ICHPCLK
10
PCICLK0
54
PCICLK1
55
1394CLK
56
3
4
5
12
52
CK410_XTAL_OUT
50
X1
49
X2
CK410_XTAL_IN
17
39
VCC3
FWH_PCLK
FWH_INIT#
LPC_FRAME#
LPC_AD3
Trace length less than 0.5inchs
CPUCLK
CPUCLK#
MCHCLK
MCHCLK#
ICH14M
CK_VID_GD#
IREF
R222 33R0402
R223 33R0402
R224 33R0402
R225 33R0402
CK_PE_SRC4#
CK_PE_SRC4
CK_PE_SRC3#
CK_PE_SRC3
CK_PE_SRC6 CK_PE_100M_16X
CK_PE_SRC6#
CK_PE_SRC5
CK_PE_SRC5#
DOT_96M_L CK_96M_DREF
PCICLK1 PCI_CLK1
PCICLK0 PCI_CLK0
FWHPCLK FWH_PCLK
1394CLK
R263 33R0402
R221 _15R0402-1
C242 C56P50N0402
X14MHZ1
_14.318MHZ32P_D
C241 C56P50N0402
R226 475R1%0402
FWH_INIT# 17
LPC_FRAME# 18
5
RN29 8P4R-33R0402
RN24 8P4R-33R0402
R264 33R0402
R265 33R0402
R260 8.2KR0402
R230 33R0402
R229 33R0402
R261 33R0402
R262 33R0402
R232 33R0402
CK_48M_USB_ICH USB48
CK_H_CPU
CK_H_CPU#
CK_H_MCH
CK_H_MCH#
7 8
5 6
3 4
1 2
7 8
5 6
3 4
1 2
CK_14M_ICH
FWH_INIT#
PRES1
PRES2
PRES3
PRES4
PRES0
BIOS_WP#
TBL#
4
CK_PE_100M_16X#
CK_PE_100M_16X
CK_ICHSATA#
CK_ICHSATA
CK_PE_100M_ICH
CK_PE_100M_ICH#
CK_PE_100M_MCH
CK_PE_100M_MCH#
CK_96M_DREF# DOT_96M_L#
ICH_PCLK ICHPCLK
CK_48M_USB_ICH 18
CK_14M_ICH 18
R240
X_8.2KR0402
RN22
8P4R-1KR0402
1 2
3 4
5 6
7 8
R199 1KR0402-1
R197 1KR0402-1
R196 1KR0402-1
CK_H_CPU 6
CK_H_CPU# 6
CK_H_MCH 9
CK_H_MCH# 9
CK_PE_100M_16X# 24
CK_PE_100M_16X 24
CK_ICHSATA# 18
CK_ICHSATA 18
CK_PE_100M_ICH 17
CK_PE_100M_ICH# 17
CK_PE_100M_MCH 11
CK_PE_100M_MCH# 11
CK_96M_DREF 11
CK_96M_DREF# 11
PCI_CLK1 24
PCI_CLK0 24
ICH_PCLK 17
1394_PCLK 21
VCC3
VCC3
VCC3
3
CK_H_CPU
CK_H_CPU#
CK_H_MCH
CK_H_MCH#
CK_96M_DREF
CK_96M_DREF#
CK_PE_100M_MCH#
CK_PE_100M_MCH
CK_PE_100M_ICH#
CK_PE_100M_ICH
CK_ICHSATA
CK_ICHSATA#
CK_PE_100M_16X#
2
R212 49.9R1%0402
R213 49.9R1%0402
R214 49.9R1%0402
R215 49.9R1%0402
R274 49.9R1%0402
R275 49.9R1%0402
7 8
RN23
5 6
_8P4R-51R0402-LF
3 4
1 2
7 8
RN33
5 6
_8P4R-51R0402-LF
3 4
1 2
CK_96M_DREF
CK_96M_DREF#
PCI_CLK1
PCI_CLK0
FWH_PCLK
ICH_PCLK
CK_48M_USB_ICH
CK_14M_ICH
EMC HF filter capacitors, located close to PLL
CLOCK GENERATOR VTT POWER DOWN BLOCK
R277
10KR0402-1
CK_VID_GD#
SOT23EBC
Q34
N-MMBT3904_NL_SOT23
ECB
VCCP
R68 220R0402
R276
X_0R0402
VIDGD
BSEL[0..2] Level Shift
H_FSBSEL1 6, 7, 11
H_FSBSEL2 6, 7, 11
H_FSBSEL0 6, 7, 11
1 2
3 4
5 6
7 8
RN30 8P4R-10KR0402
FSB
FSC
FSA
1
C282 C10P50N0402
C278 C10P50N0402
C252 X_C10P50N0402
C249 X_C10P50N0402
C279 X_C10P50N0402
C280 X_C10P50N0402
C281 X_C10P50N0402
C247 X_C10P50N0402
V_3P3_CLKPWR_L
H_FSB_SEL
2 1 0
0 133
100
01200
CPU
FWH DECOUPLING CAPACITORS
Place Cap. as Close to FWH< 350 mil
A A
8
VCC3
C260
C0.1U16Y0402
C224
C0.1U16Y0402
7
If you place the jumper very closed to FWH bios socket,
please use the same clock with FWH. But if you can not
place it so close, please use another clock to support it.
R184 _10R-1
6
PCLK_LPC_HDR FWH_PCLK
5
PLTRST#
LPC_AD0
LPC_AD1
LPC_AD2
LPC_AD3
LPC_FRAME#
VCC3 VCC5
JLPC1
1
2
3
4
5
6
7
8
9
11
12
13
14
JLPC1
FWH_ID0
Title
ICS954101 & FWH
Size Document Number R e v
Custom
4
3
Date: Sheet
MICRO-START INT'L CO.,LTD.
MS-7195 100
2
20 33 Friday, September 09, 2005
of
1
Page 21
5
IEEE-1394
BUS_PWR
BUS_PWR
D13
S-MBRS340_SMC
D D
P3VA
C286
X_C0.1U16Y0402
C360
C0.1U16Y0402
+12V
A C
C349
C0.1U16Y0402
C297
C0.1U16Y0402
C359
C0.1U16Y0402
P3VA P3VD
C289
C0.1U16Y0402
NEAR EACH POWER PIN
C350
X_C0.1U16Y0402
FRONT 1394 PORT 1
BUS_PWR
TPBIAS1
R301
R297
C C
54.9R1%
R330
49.9KR1%
54.9R1%
R307
54.9R1%
C321
C0.1U16X0402
TPA1+
TPA1ÂTPB1+
TPB1-
1394_VCC2
C410
X_C1000P50X
FS2
F-MINISMDM150/24
(T/S/S=7/10/10)
C330
C270P50X
Place close to pin 97
(Less then 500 mils)
TPBIAS2
B B
54.9R1%
R285
49.9KR1%
R286
R304
54.9R1%
R280
54.9R1%
R293
54.9R1%
C291
C0.1U16X0402
TPA2+
TPA2-
TPB2+
TPB2-
S-MBRS340_SMC
+12V
A C
D22
(T/S/S=7/10/10)
P3VD
R289
54.9R1%
5
CP19
1 2
FB1
X_120R0805
C0.1U16Y0402
C307
C270P50X
Place close to pin 111
(Less then 500 mils)
VCC3
R255
A A
0R1206
FB2
X_120R0805
C288
C0.1U16Y0402
C285
C0.1U16Y0402
C397
C0.1U16Y0402
1394_VCC2
TPB2ÂTPA2-
FS4
F-MINISMDM150/24
TPB1ÂTPA1-
CB13
4
1394_CONN
POWER1GND
3
TPB-
5
TPA-
7
SHIELD
H2X4(8)_black
4
C364
X_C0.1U16Y0402
C369
C0.1U16Y0402
TPB+
TPA+
CONN1
1394-6Mstraight_black
7
1 2
3 4
5 6
8 9
C354
X_C0.1U16Y0402
2
TPB2+
4
TPA2+
6
TPB1+
TPA1+
R235
X_4.7KR0402-1
EEDI
EECK
3
PAR 17,24
FRAME# 17,24
IRDY# 17,24
TRDY# 17,24
STOP# 17,24
DEVSEL# 17,24
PREQ#3 17,24
PGNT#3 17
PERR# 17,24
PIRQ#E 17,24
1394_PCLK 20
PCIRST#1 15,24,29
PCI_PME# 17,24
AD[0..31] 17,24
C_BE#[3:0] 17,24
1394-EEPROM 24C02
VCC3 P3VA VCC3
R238
X_4.7KR0402-1
R243
510R0402
3
Add when used VT6308
R302
X_4.7KR0402-1
C_BE#3
C_BE#2
C_BE#1
C_BE#0
PAR
FRAME#
IRDY#
TRDY#
STOP#
AD19
DEVSEL#
PREQ#3
PGNT#3
PERR#
PIRQ#E
1394_PCLK
PCIRST#1
AD[0..31]
C_BE#[3:0]
3
2
1
7
5
6
AD31
AD30
AD29
AD28
AD27
AD26
AD25
AD24
AD23
AD22
AD21
AD20
AD19
AD18
AD17
AD16
AD15
AD14
AD13
AD12
AD11
AD10
AD9
AD8
AD7
AD6
AD5
AD4
AD3
AD2
AD1
AD0
U16
_AT24C02N-10SI-2.5
100
101
104
105
106
109
110
112
116
117
118
119
120
107
122
123
124
126
128
R246
108
100R0402
127
C283
X_C0.1U16Y0402
A2
A1
A0
GND
WP
VCC
SDA
SCL
97
98
99
5
6
7
10
11
12
13
14
17
18
19
21
22
23
27
28
4
15
3
96
95
2
91
93
92
37
AD31
AD30
AD29
AD28
AD27
AD26
AD25
AD24
AD23
AD22
AD21
AD20
AD19
AD18
AD17
AD16
AD15
AD14
AD13
AD12
AD11
AD10
AD9
AD8
AD7
AD6
AD5
AD4
AD3
AD2
AD1
AD0
CBE3#
CBE2#
CBE1#
CBE0#
PAR
FRAME#
IRDY#
TRDY#
STOP#
IDSEL
DEVSEL#
REQ#
GNT#
PERR#
INTA#
PCICLK
PCIRST#
PME#
4
VCC3
8
VCC3
35
VDDC2
94
VSS1
103
VSS2
R309
0R
VSS3
111
VSS4
121
2
P3VD P3VA
62
76
65
49
VDD6
PVDD2
VDDATX0
VDDARX0
VSSC1
RAMVSS
GNDATX2
GNDARX2
25
83
115
VCC3 P3VD
B
C E
R278 X_4.7KR0402-1
VDDATX1
VSSC2
36
Q32
X_P-2SB1197K(R)_SOT23-RH
1
VSS5
102
VDD1
VSS6
9
113
16
125
VDD2
VSS7
26
8
VDD3
VSS8
34
20
VDD4
VSS9
39
VDD5
PVDD1
GNDATX0
59
64
REG_OUT
REG_FB
BJT_CTL
24
33
114
VDDC1
RAMVDD
GNDARX0
GNDATX1
GNDARX1
82
69
68
Add this circuit when used VT6308
Title
VIA VT6307
Size Document Number Rev
Custom
2
Date: Sheet
1
90
89
75
VDDARX1
XTPBIAS0
XTPA0P
XTPA0M
VDDATX2
VDDARX2
XTPB0P
XTPB0M
XTPBIAS1
XTPA1P
XTPA1M
XTPB1P
XTPB1M
XTPBIAS2
XTPA2P
XTPA2M
XTPB2P
XTPB2M
XREXT
D6/CMCJMP
PHYRESET
CTL0/PC0JMP
CTL1/PC1JMP
D7/PC2JMP
LINKON/TSIJMP
LREQ/TSOJMP
MODE0
MODE1
LPS/CMC
SCL/EECK
SDA/EEDI
PGND1
PGND2
41
50
U19
74
73
72
71
70
81
80
79
78
77
88
87
86
85
84
63
XCPS
66
52
58
54
55
53
57
56
51
D5
48
D4
47
D3
46
D2
45
D1
44
D0
43
42
40
SCLK
38
67
NC
32
31
30
EEDO
29
EECS
60
XI
61
XO
_VT6307-CD
REG_OUT
REG_FB
BJT_CTL
R334 11KR1%
R317 1KR1%
R314 6.34KR1%
C331 C47P50N
C351 C0.1U16Y0402
R331 4.7KR0402-1
I2C EEPROM ENABLE
EECK
EEDI
R295 X_4.7KR0402-1
R333
1MR0402
TPBIAS1
TPA1+
TPA1ÂTPB1+
TPB1-
TPBIAS2
TPA2+
TPA2ÂTPB2+
TPB2-
BUS_PWR
C352 C12P50N0402
C353 C12P50N0402
Y3
24.576MHZ16P_D
P3VD
P3VD
AD19
PIRQ#E
VCC3
MICRO-START INT'L CO.,LTD.
MS-7195 100
1
of
21 33 Monday, September 12, 2005
Page 22
5
JD resistors and front microphone input cap. should be placed
as close as possible to the sense pin of CODEC.
SIDESURR-JD
R381 5 .1KR1%0402
CEN-JD
D D
Reference resistor for Jack
Detection(close to the codec)
R368 10KR 1%0402
EC53
C10U6.3X51206
AVDD5
C318
C0.1U16Y0402
R294 20 KR1%0402
Spilt by DGND
VCC3_SB
C C
B B
X_0R0805-LF
VCC3
R303
SURR-L
SURR-R
CEN
LFE
SIDESURR-L
SIDESURR-R
SPDIF_OUT
CP18
X_COPPER
.CD100U16EL11
1 2
Sense B
EC54
FRONT-L
FRONT-R
37
38
39
40
41
42
43
44
45
46
47
48
VCC3_CODEC
1 2
+
MONO-OUT
AVDD2
SURR-OUT-L
NC#40
SURR-OUT-R
AVSS2
GEN-OUT
LEF-OUT
JD0/GPIO0
XTLSEL
SPDIFI/EAPD
SPDIFO
C332
C0.1U16Y0402
36
C366
C0.1U16Y0402
AVDD5
35
FRONT-OUT-L
FRONT-OUT-R
DVDD11XTL-IN2XTL-OUT3DVSS14SDATA-OUT5BIT-CLK6DVSS27SDATA-IN8DVDD29SYNC10RESET#11PC-BEEP
4
CEN/LFE OUT
SURR OUT
MIC1-VREFO-R
MIC1-VREFO-L
EC57 C10U6.3X51206
AVDD5
C373
C0.1U16Y0402
32
34
33
NC
FRONT-MIC1
U21
30
31
26
27
28
25
ALC882
VREF
VRDA
AVSS1
AFILT129AFILT2
AVDD1
VREFOUT
FRONT-MIC2
LINE-IN-R
LINE-IN-L
MIC2
MIC1
CD-R
CD-GND
CD-L
JD1/GPIO1
AUX-R
AUX-L
PHONE
12
EC55
C10U6.3X51206
LINE1-IN-R
24
LINE1-IN-L
23
MIC1-IN-R
22
MIC1-IN-L
21
CD-R
20
CD-GND
19
CD-L
18
C381 C1U16Y0805
17
C382 C1U16Y0805
16
JD2
15
LINE2-IN-R
14
LINE2-IN-L
13
Sense A
JD resistors should be placed as close as possible to the sense pin of CODEC.
AC_RST# 18
AC_SYNC 18
AC_SDIN0 18
AC_BITCLK 18
AC_SDOUT 18
C355
C22P50N0402
R337 2 2R0402
R316 2 2R0402
AUD-RET_R
SIDE-SURR OUT
SURR KIT for 880/882
MIC2_L
R380 5 .1KR1%0402
R379 1 0KR1%0402
R366 2 0KR1%0402
R367 3 9.2KR1%0402
AUDIO2
FRONT-JD
LINE1-JD
MIC1-JD
SURR-JD
SPDIF_OUT
3
Digital Area
Analog Area
C439
C0.1U25Y
1 2
1 2
AUDIO PANEL
AUDIO1
CD-L
CD-R
CD-GND
R382
_100R-1
R383
_220R-1
CP24
CP21
LINE IN(C)
LINE OUT(B)
MIC IN(A)
LINE1-IN-R
C432 C1U16Y0805
LINE1-IN-L
C440 C1U16Y0805
C393 C1U16Y0805
C396 C1U16Y0805
C385 C1U16Y0805
C442
C680P50X
SPDIF_OUT
C0.1U25Y
Trace Width 40mils.
U22
LT1087S_SOT89
VIN3VOUT
C329
C1U16Y
AUX_IN
1
2
3
4
AUDIO-AUX
RN35 8P4R-0R0402
1
3
5
7
1
3
5
7
RN43X_8P4R-47KR0402
J5
5
4
_JACK-RCAX2-3P_w-r
SPDIF OUT CONNECTOR
OPTO+RCA SPDIF OUT
3N
2S
VCC5
C444
2
4
6
8
2
4
6
8
A
B
C
ADJ
1
5
5
3N
2S
GND
VCC
VIN
R346
_0R0805-LF
2
R311
_200R1%-1
R335
680R1%
CDL1 26
CDR1 26
CDG1 26
1
2
3
LED
DRIVE
IC
TX
CONN-RCA_SPDIF_og
2
S-1N5817_DO214AC
LINE2_R
LINE2_L
J1
AVDD5 +12V
D14
MIC1-VREFO-L
MIC1-VREFO-R
MIC1-IN-R
MIC1-IN-L
2.2uF for D/A (low-freq)
frequence response.
VCC5_SB
D10 X_S-1N5817_DO214AC
C378
C10U10Y0805
LFE
CEN
SURR-R
SURR-L
SIDESURR-R
SIDESURR-L
LINE1-IN-R
LINE1-IN-L
FRONT-R
FRONT-L
C298 C 10U 6.3X50805-1
C315 C 10U 6.3X50805-1
2.2uF for D/A (low-freq)
frequence response.
C296 C 10U 6.3X50805-1
C314 C 10U 6.3X50805-1
2.2uF for D/A (low-freq)
frequence response.
C302 C 10U 6.3X50805-1
C316 C 10U 6.3X50805-1
2.2uF for D/A (low-freq)
frequence response.
C392 C 10U 6.3X50805-1
C384 C 10U 6.3X50805-1
2.2uF for D/A (low-freq)
frequence response.
+
1 2
EC52 .CD100U16EL11
+
1 2
EC59 .CD100U16EL11
C398 C 10U 6.3X50805-1
C383 C 10U 6.3X50805-1
FOR ALC880/882 R? Change to 2.2KR
1
AUDIO2A
(Upper)
10
CEN-JD
L30 80L700m_200
L32 80L700m_200
C427
C429
C100P16X0402
L29 80L700m_200
L33 80L700m_200
C100P16X0402
L31 80L700m_200
L34 80L700m_200
C100P16X0402
L25 80L700m_200
L27 80L700m_200
C100P16X0402
L24 80L700m_200
L26 80L700m_200
C100P16X0402
R320
R312
4.7KR0402-1
4.7KR0402-1
L23 80L700m_200
L28 80L700m_200
C100P16X0402
C100P16X0402
C426
C430
C100P16X0402
SIDESURR-JD
C428
C431
C100P16X0402
C424
C422
C100P16X0402
C423
C421
C100P16X0402
C420
C425
C100P16X0402
11
12
13
18
JACK-AUDIOX6-26P_L-obg_R-blgp
AUDIO2B
(Middle)
6
SURR-JD
7
8
9
17
JACK-AUDIOX6-26P_L-obg_R-blgp
AUDIO2C
(Down)
1
2
4
5
3
JACK-AUDIOX6-26P_L-obg_R-blgp
AUDIO1A
(Upper)
10
LINE1-JD
11
12
13
18
JACK-AUDIOX6-26P_L-obg_R-blgp
AUDIO1B
(Middle)
6
FRONT-JD
7
8
9
17
JACK-AUDIOX6-26P_L-obg_R-blgp
AUDIO1C
(Down)
1
MIC1-JD
2
4
5
3
JACK-AUDIOX6-26P_L-obg_R-blgp
14
15
16
14
15
16
PIN 8
塞å”
R336
2.2KR0402
MIC2_L
LINE2-IN-L
A A
5
EC51 C1U16Y0805
EC58 C1U16Y0805
R341 2.2KR0402
C371
C4700P25X0402
Accroding to placement of this onboard header, change to DGND when
the header above digital ground or replace as AGND when the header
above analog ground.
R33/R36/C55/R39/R40 are for MUTE backpanel function
of ALC880 using AC97 front panel daughter card.
LINE2_R
LINE2_L
R308
R305
10KR0402-1
10KR0402-1
4
DGND
1 2
3 4
_H2X4(1)_orange
R327
1.5KR0402
C363
C4.7U10Y0805
675
F_AUDIO1
MICGND
RET-R LINE2-IN-R
AVDD5
R310 10KR0402-1
AVDD5
R313
100KR0402
AUD-RET_R
C326
C4.7U10Y0805
For EMI
MIC2_L
LINE2_R
LINE2_L
C310
C374
X_C1000P50X0402
C319
X_C1000P50X0402
3
X_C1000P50X0402
Tied at one point only under the
codec or near the codec
1 2
1 2
1 2
1 2
2
CP20
CP22
CP17
CP16
ALC880/882 Desktop Configuation (7.1 Channel Solution)
(6 Jacks at rear panel , 2 jacks at front panel)
Pin Assignment Re-tasking
FRONT(pin-35/36)
SURR (pin-39/41) Back Panel Line output
SIDE-SURR (pin-45/46) Line output
Location
Back Panel AMP output
Back Panel
Back Panel
Back Panel
Back Panel
Line output CEN/LFE (pin-43/44)
line input LINE1 (pin-23/24)
MIC input MIC1 (pin-21/22)
AMP output LINE2 (pin-14/15) Front Panel
Stereo MIC input FMIC (pin-16/17) Front Panel
Title
Size Document Number Rev
Custom
Date: Sheet
MICRO-START INT'L CO.,LTD.
ALC882
MS-7195 100
1
22 33 Monday, September 12, 2005
of
Page 23
5
Tekoa(82573E)/EKronR(82562GZ)
4
3
2
1
VCC3_SB
U20
A2
A7
D D
TEST_J9
TEST_J13
TEST_J7
TEST_J5
TEST_J6
TEST_J4
TEST_J3
TEST_J2
SMBDATA 13,18,24,25
SMBCLK 13,18,24,25
C C
B B
C328
C20P50N0402
C324
C20P50N0402
A A
VCC3
R284 1KR0402-1
TEST_J15
TEST_J14
TEST_J12
TEST_J11
TEST_J10
TEST_J16
TEST_J8
TEST_J18
XTALO
Y1
25MHZ18P_D-1
XTALI
5
A3
IREG25/NC
IREG25/VCC
D1
PETP0/NC
C1
PETN0/NC
F1
PERN0/NC
F2
PERP0/NC
G1
PECLKP/NC
G2
PECLKN/NC
P10
PEWAKE#/NC
P7
PERST#/NC
M11
SMB_DATA/NC
P11
SMB_CLK/NC
N11
SMB_ALRT#--ASF_PGD/NC
A9
NVM_SI/NC
B9
NVM_SO/NC
B10
NVM_CS#/NC
C9
NVM_SK/NC
B4
NVM_REQ/NC
A5
NVM_PROT/NC
D3
NVM_SHRD/NC
A6
NVM_TYPE/NC
P4
JTDI/NC
P6
JTDO/NC
N4
JTMS/NC
N5
JTCK/NC
L3
THRMDP/NC
L2
THRMDN/NC
A8
SDP0/NC
B8
SDP1/NC
C8
SDP2/NC
C7
SDP3/NC
C3
DOCK_IND/NC
N10
ALT_CLK125/NC
H1
TESTPT_0/NC
H2
TESTPT_1/NC
H3
TESTPT_2/NC
J1
TESTPT_3/NC
J2
TESTPT_4/NC
J3
TESTPT_5/NC
K1
TESTPT_6/NC
L1
TESTPT_7/NC
M1
TESTPT_8/NC
M3
TESTPT_9/NC
N2
TESTPT_10/NC
P1
TESTPT_11/NC
N3
TESTPT_12/NC
M8
TESTPT_13/NC
P9
TESTPT_14/NC
E3
TESTPT_15/NC
A14
TESTPT_16/NC
I82562GZ
VCC33/NCD9VCC33/NCF3VCC33/NC
VCC33/VCC
VCC3_SB VCC3_SB
M2
J4
FUSEV/NC
M10
VCC33/NC
VCC33/VCCN6VCC33/VCCN8VCC33/VCCP2VCC33/VCC
P12
A11
G5
G3
H4
VCC25/NCB6VCC25/NC
VCC25/NC
VCC25/VCC
VCC25/VCCR
VSS/NCA1VSSB3VSS
VSS
VSS/NCC2VSS
VSS/NCD2VSSD4VSSD5VSSD6VSSD7VSSD8VSSE2VSSE4VSSE5VSSE6VSSE7VSSE8VSSE9VSS
C10
C12
D13
H5
J12
VCC25/NC
VCC25/VCCR
4
J5
K13
L12
VCC25/NC
VCC25/NCM4VCC25/NC
VCC25/VCC
VCC25/VCC33
B2
N7
VCC25_OUT/NCB1VCC25_OUT/NC
A10
VCC12/NC
VCC12/NCC4VCC12/NCC5VCC12/NC
E10
TR_D0+
TR_D0-
TR_D1+
TR_D1-
VSSF4VSSF5VSSF6VSSF7VSSF8VSSF9VSS
G13
G6
H11
H6
F12
H7
G12
H12
VCC12/NC
VCC12/NC
VCC12/VCC33
VCC12/VCC33
VCC12/VCC33
VCC12/VCC33
VSS
F10
F11
R345 54.9R1%0402
R343 54.9R1%0402
R340 54.9R1%0402
R339 54.9R1%0402
100_LED#
LI_LED#
ACT_LED#
H8
J10
J11
J6
VCC12/VCC33
VCC12/VCC33
VCC12/VCC33
VCC12/VCC33
VCC12/VCC33
VSS/NCG4VSSG7VSSG8VSSG9VSS
G10
J7
J8
J9
K10
VCC12/VCC33
VCC12/VCC33
VCC12/VCC33
VSS
VSS
VSSH9VSS
H10
G11
G14
C375 C0.1U16Y0402
C357 C0.1U16Y0402
C402 C0.01U16X
C391 C0.01U16X
C390 C0.01U16X
K11
K5
K4
VCC12/VCCK3VCC12/VCC
VCC12/VCC33
VCC12/VCC33
VCC12/VCC33
HS_DACN/RBIAS100
PHY_TSTPT/RBIAS10
CLK_VIEW/LAN_TXD2
VSSK2VSSN1VSS
VSS
P8
N12
K6
K7
K8
K9
L5
L9
L10
VCC12/VCC33
VCC12/VCC33
VCC12/VCC33
VCC12/VCC33
VCC12/VCC33
VCC12/VCC33
VCC12/VCC33
MDIP0/TDP
MDIN0/TDN
MDIP1/RDP
MDIN1/RDN
MDIP2/NC
MDIN2/NC
MDIP3/NC
MDIN3/NC
LED0#/SPDLED
LED1#/ACTLED
LED2#/LINKLED
XTAL1
XTAL2
EN25_REG/NC
CTRL_25/NC
CTRL_12/NC
DEV_OFF#/ADV10
LAN_PWRGOOD/NC
AUX_PRESENT/NC
HS_DACP/TOUT
TEST_EN
PHY_REF/ISOL_T1
NC/ISOL_TEX
NC/ISOL_TEK
NC/LAN_TXD0
NC/LAN_TXD1
NC/LAN_RXD0
NC/LAN_RXD1
NC/LAN_RXD2
NC/LAN_RSTSYNC
NC/LAN_CLK
NC/VSS
NC/VCC
NC/VSS
NC/VSS
NC/VSS
NC/VSS
NC/VCC
NC/VCCT
NC/VCCT
3
TR_D0+
C13
TR_D0-
C14
TR_D1+
E13
TR_D1-
E14
F13
F14
H13
H14
100_LED#
B11
ACT_LED#
C11
LI_LED#
A12
XTALI
K14
XTALO
J14
R351 X_2.2KR-1
B5
TEST_J17
A4
TEST_J1
P3
LAN_DISABLE#
L7
P5
R349 1KR0402-1
C6
B12
R356 _649R1%-LF
B13
R353 _619R1%-1
B14
LAN_DISABLE_A13
A13
LAN_DISABLE_D12
D12
LAN_DISABLE_D10
D10
LAN_DISABLE_D14
D14
M14
L13
L14
P13
N13
M12
M13
N14
D11
NC
J13
NC
L8
NC
M5
NC
M7
NC
M9
NC
N9
NC
P14
NC
B7
E1
K12
L11
L6
M6
L4
E11
E12
C1U10Y
VCC3_SB
RN36 8P4R-0R0402
1
2
3
4
5
6
7
1
3
5
7
0R0402-1
ACT_LED#
LI_LED#
8
2
4
6
8
VCC3_SB
RN37 8P4R-0R0402
C409
LAN_RSTSYNC
LAN_RXD1
LAN_RXD0
LAN_RXD2
LAN_CLK_PHY
VCC3_SB
R364
330R
LAN_DISABLE# 18
R282 X_1KR0402-1
R281 0R0402-1
RN44
8P4R-200R
1
2
3
4
5
6
7
8
LAN_TXD2
LAN_TXD1
LAN_TXD0
VCC3_SB
R355
330R
TR_D0+
TR_D0ÂTR_D1+
TR_D1-
LGND
100_LED#
RSMRST# 18,29
LAN_TXD2 17
LAN_TXD1 17
LAN_TXD0 17
LAN_RSTSYNC 17
LAN_RXD1 17
LAN_RXD0 17
LAN_RXD2 17
LAN_CLK_PHY 17
LAN CONNECTOR
USB2B
GREEN
19
ORANGE
20
POWER
13
TD1+
18
TD1-
12
TD2+
17
TD2-
11
TD3+
16
TD3-
10
TD4+
15
TD4-
9
GND
14
AMBER
21
22
_CONN-RJ45_USBX2_LEDX2_TX-2
2
LEFT RIGHT
VCC3_SB
C327
C4.7U10Y0805
VCC3_SB
C306
C4.7U10Y0805
VCC3_SB
C305
C10U10Y0805
VCC3_SB
A13 D14 D12 D10
0000
00
11
0
1111
1
11
11 1
11
11 1
111
C365
C295
C4.7U10Y0805
C311
C4.7U10Y0805
C334
C10U10Y0805
C0.1U16Y0402
C320
C0.1U16Y0402
C333
C0.1U16Y0402
C362
C0.1U16Y0402
C303
C0.1U16Y0402
C313
C0.1U16Y0402
C376
C10U10Y0805
C300
C0.1U16Y0402
C358
C0.1U16Y0402
For 82562 only
R373 X_200R-2
R370 X_200R-2
R372 X_200R-2 R292
R371 X_200R-2
11
00
111
000
00
0
00
0
Title
LAN INTEL Tekoa/EKronR
Size Document Number Re v
Custom
Date: Sheet
LAN_DISABLE_A13
LAN_DISABLE_D14
LAN_DISABLE_D12
LAN_DISABLE_D10
Mode
82562G family mode0
82562G family mode1
Testing mode
Isolate, tri-state and power down mode
Power down mode
XOR tree
82562G family mode2
82562G family mode3
82562G family mode4
Reserved
Reserved, Testing
0
MICRO-START INT'L CO.,LTD.
MS-7195 100
1
C386
C0.1U16Y0402
C304
C0.1U16Y0402
C301
C0.1U16Y0402
23 33 Friday, September 09, 2005
C372
C0.1U16Y0402
of
Page 24
8
VCC3_SB VCC5
D D
ICH_WAKE# 18
ICH_PETP_1 17
ICH_PETN_1 17
ICH_PERP_1 17
ICH_PERN_1 17
C C
PCI_CLK1 20
PCI_CLK0 20
PREQ#2 17
AD31 17,21
AD29 17,21
AD27 17,21
AD25 17,21
C_BE#3 17,21
AD23 17,21
B B
A A
AD21 17,21
AD19 17,21
AD17 17,21
C_BE#2 17,21
IRDY# 17,21
DEVSEL# 17,21
LOCK# 17
PERR# 17,21
SERR# 17
C_BE#1 17,21
AD14 17,21
AD12 17,21
AD10 17,21
AD8 17,21
AD7 17,21
AD5 17,21
AD3 17,21
AD1 17,21
PGNT#1 17
8
ICH_WAKE#
ICH_PETP_1
ICH_PETN_1
ICH_PERP_1 PIRQ#B
ICH_PERN_1
PIRQ#F
PIRQ#H
7
VCC3
+12V
-12V VCC3
PCIE_1
B1
+12V1
B2
+12V2
B3
GND1
B4
GND2
B5
VCC3_1
B6
VCC3AUX
B7
WAKE-
B8
GND4
B9
PETP0_1
B10
PETN0_1
B11
GND6
B12
GND8
B13
PERP0_1
B14
PERN0_1
B15
GND10
B16
GND12
B17
SDVOB_BLUE+
B18
SDVOB_BLUE-
B19
GND14
B20
GND16
B21
SDVOB_GREEN+
B22
SDVOB_GREEN-
B23
GND18
B24
GND20
B25
SDVOB_RED+
B26
SDVOB_RED-
B27
GND22
B28
-12V
B29
GND24
B30
VCC5_2
B31
VCC5_3
B32
INT2_N
B33
INT4_N
B34
GND25
B35
PCI_CLK_2
B36
GND28
B37
GND29
B38
PCI_CLK_1
B39
GND30
B40
REQ_SLOT1_N
B41
VCC5_7
B42
AD31
B43
AD29
B44
GND32
B45
AD27
B46
AD25
B47
VCC3_5
B48
CBE_N3
B49
AD23
B50
GND35
B51
AD21
B52
AD19
B53
VCC3_6
B54
AD17
B55
CBE_N2
B56
GND37
B57
IRDY_N
B58
VCC3_8
B59
DEVSEL_N
B60
GND40
B61
PCILOCK_N
B62
PERR_N
B63
VCC3_10
B64
SERR_N
B65
VCC3_11
B66
CBE_N1
B67
AD14
B68
GND42
B69
AD12
B70
AD10
B71
GND44
B72
AD8
B73
AD7
B74
VCC3_14
B75
AD5
B76
AD3
B77
GND46
B78
AD1
B79
VCC5_8
B80
GNT_SLOT2_N
B81
VCC5_10
B82
VCC5_12
SLOT-PCI164_black- 1pitch
7
6
PRSNT1-
VCC3_2
VCC3_3
PERST-
REFCLK+
REFCLK-
SDVOB_CLK+
SDVOB_CLK-
GND11
GND13
SDVO_STALL+
SDVO_STALL-
GND15
GND17
SDVOB_INT+
SDVOB_INT-
GND19
GND21
SDVO_CTR_CLK
SDVO_CTR_DATA
GND23
VCC5_1
INT1_N
INT3_N
VCC5_4
VCC5_5
GND26
GND27
PCIRST_N
VCC5_6
GNT_SLOT1_N
GND31
PCI_PME_N
VCC3_4
GND33
TP_EDGECONN_A26
GND34
GND36
VCC3_7
FRAME_N
GND38
TRDY_N
GND39
STOP_N
VCC3_9
SM BCLK
SM BDATA
GND41
PCIPAR
VCC3_12
GND43
CBE_N0
VCC3_13
GND45
VCC5_9
REQ_SLOT2_N
VCC5_11
VCC5_13
C_BE#[0..3] 17,21
6
12V3
12V4
GND3
GND5
GND7
GND9
+12V5
SB3V
AD30
AD28
AD26
AD24
AD22
AD20
AD18
AD16
AD15
AD13
AD11
AD9
AD6
AD4
AD2
AD0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10
A11
A12
A13
A14
A15
A16
A17
A18
A19
A20
A21
A22
A23
A24
A25
A26
A27
A28
A29
A30
A31
A32
A33
A34
A35
A36
A37
A38
A39
A40
A41
A42
A43
A44
A45
A46
A47
A48
A49
A50
A51
A52
A53
A54
A55
A56
A57
A58
A59
A60
A61
A62
A63
A64
A65
A66
A67
A68
A69
A70
A71
A72
A73
A74
A75
A76
A77
A78
A79
A80
A81
A82
+12V
VCC5
RISER_DETECT_1
PCIRST#2
CK_PE_100M_16X
CK_PE_100M_16X#
5
R137
10KR0402-1
VCC3_SB
5
PIRQ#E
PIRQ#G
VCC3_SB
RISER_DETECT_1 18
PCIRST#2 29
CK_PE_100M_16X 20
CK_PE_100M_16X# 20
PCIRST#1 15,21,29
PGNT#2 17
RISER_DETECT_2 18
R227
10KR0402-1
VCC3_SB
SMBCLK
SMBDATA
PCI_PME# 17,21
AD30 17,21
AD28 17,21
AD26 17,21
AD24 17,21
AD22 17,21
AD20 17,21
AD18 17,21
AD16 17,21
FRAME# 17,21
TRDY# 17,21
STOP# 17,21
PAR 17,21
AD15 17,21
AD13 17,21
AD11 17,21
AD9 17,21
C_BE#0 17,21
AD6 17,21
AD4 17,21
AD2 17,21
AD0 17,21
PREQ#1 17
4
3
2
1
PCI PULL-UP / DOWN RESISTORS
RN34
_8P4R-2.7KR0402-LF
1
2
3
4
5
6
7
8
R273 8.2KR0402
R279 8.2KR0402
7 8
5 6
3 4
1 2
7 8
5 6
3 4
1 2
VCC5
VCC3
VCC3
RN38
_8P4R-8.2KR
RN21
_8P4R-8.2KR
FRAME#
TRDY#
DEVSEL#
STOP#
LOCK#
PERR#
SERR#
PCI_PME#
RN26
8P4R-2.7KR0402
1 2
3 4
5 6
7 8
RN27
8P4R-2.7KR0402
1 2
3 4
5 6
7 8
R201
4.7KR0402-1
VCC5
VCC5
VCC3_SB
PREQ#3
PREQ#3 17,21
PREQ#2
PREQ#1
PREQ#0
PREQ#0 17
PREQ#4
PREQ#4 17
PREQ#5 I RDY#
PREQ#5 17
PIRQ#B 17
PIRQ#A 17
PIRQ#C 17
PIRQ#D 17
PIRQ#F 17
PIRQ#G 17
PIRQ#E 17,21
PIRQ#H 17
PIRQ#A
PIRQ#C
PIRQ#D
PIRQ#F
PIRQ#G
PIRQ#E
PIRQ#H
SMBus Isolation
SMBCLK
CP13
R241
CP14
1 2
1 2
X_0R0402-1
R256
X_0R0402-1
SMBCLK_ISO
SMBDATA
SMBDATA_ISO
DECOUPLING CAPACITORS
VCC3_SB
X_CD100U6.3EL11.5-RH
C117
C0.1U16Y0402
4
EC2
+12V
+
.CD470U16EL11.5
3
EC38
C209
X_C0.1U16Y0402
C109
X_C0.1U16Y0402
Title
Size Document Number R e v
Custom
Date: Sheet
SMBCLK 13,18,23,25
SMBCLK_ISO 20,29
SMBDATA 13,18,23,25
SMBDATA_ISO 20,29
VCC3
+
C138
X_C0.1U16Y0402
C172
X_C0.1U16Y0402
EC41
.CD1000U6.3EL15
VCC5
C195
C0.1U16Y0402
C251
C0.1U16Y0402
MICRO-START INT'L CO.,LTD.
PCI-E & PCI
MS-7195 100
2
C274
C0.1U16Y0402
C394
C0.1U16Y0402
24 33 Friday, September 09, 2005
of
1
Page 25
5
4
3
2
1
VCC3
R19 4.7KR
R6 4.7KR
R29 X_10KR
D D
SIO_SMI#
OVT#
R36
X_100KR
I2C ADDRESS 0X5A
DAC MODE 60% INITIAL SPEED
FANIN1
FANIN2
PWMOUT1
SIO_SMI# 18
OVT# 18
SMBCLK 13,18,23,24
SMBDATA 13,18,23,24
SIO_SMI#
OVT#
U4
1
FANIN1
2
GPIO0/FAININ2/VOLT_FAULT#
3
PWM1/DAC1/ADDR_TRAP
4
GPIO1/PWM2/DAC2/FAN_FAULT#
5
GPIO2/SMI#/FAN_FAULT#/LED
6
OVT#/VOLT_FAULT#GPIO3/CLKIN
7
SCLK
8
SDATA
F75388GS
VCC
D1+
D2+
VREF
VIN1
VIN2
VIN3
GND
I2C ADDRESS 0X5C
PWM MODE 60% INITIAL SPEED
U14
1
FANIN1
2
GPIO0/FAININ2/VOLT_FAULT#
3
PWM1/DAC1/ADDR_TRAP
4
GPIO1/PWM2/DAC2/FAN_FAULT#
5
GPIO2/SMI#/FAN_FAULT#/LED
6
OVT#/VOLT_FAULT#GPIO3/CLKIN
7
SCLK
8
SDATA
SIO_SMI# SIO_SMI#2
14
13
12
11
10
9
8
F75388GS
G
C19
X_C0.1U16Y0402
VCC
D1+
D2+
VREF
VIN1
VIN2
VIN3
GND
D S
Q6
N-P3057LD_TO252
R30
10KR
FAN1_IN
FAN2_IN
VCC12
C1
C2
CHRPMP
GND
FANIN3
FANIN4
PWMOUT2
SIO_SMI#2
GPIO3
R247 0R0402-1
FAN1_DRV
FAN1_SEN
FAN2_DRV
FAN2_SEN
FAN3_DRV
FAN3_SEN
FAN3_IN
W83391TS
VCC3
R251 4.7KR
C C
B B
R254 10KR
GPIO3
PWMOUT2
R250
X_100KR
PWMOUT1
+12V
C11
C0.1U16Y0402
C6
C0.1U16Y0402
C2
C0.1U16Y0402
SMBCLK 13,18,23,24
SMBDATA 13,18,23,24
U1
1
2
3
4
5
6
7
VCC3
R42
_33R0805-LF
C17
C25
C4.7U10Y0805
C0.1U16Y0402
16
CPU_TMPA
15
14
13
VIN1
12
VIN2
11
VIN3
10
VTIN_GND
9
CP1
1 2
16
SYS_TMP
15
14
VREF
13
12
11
10
9
C13
C0.1U16Y0402
C15
C3300P50X
VCC3
R231
_33R0805-LF
C250
C0.1U16Y0402
+12V
D1 X_BAS32L_LL34
R37 4.7KR
EC1
X_CD100U6.3EL11.5-RH
VBAT +12V VCC5
R3
2MR
VIN3 VIN2 VIN1
R4
_1MR-1
CPU_TMPA 6
VTIN_GND 6
C258
C4.7U10Y0805
CPU_FAN
R28
10KR
FANIN1
R20 27KR
CPU_FAN1
3
2
1
BH1X3BF_brown
R8
_10KR1%-1
R9
_1KR1%-1
+12V
R74
4.7KR
R22
_4.7KR1%-LF
R23
_1KR1%-1
D3
X_BAS32L_LL34
CPU_FAN2
3
2
1
BH1X3BF_brown
R73 27KR
VREF
R216
10KR1%
SYS_TMP PWMOUT1
RT1
10KRT1%
R72
10KR
FANIN2
R21
_3.9KR-LF
+12V
R269
4.7KR
R271 4.7KR
PWMOUT2
FAN initial Speed setting
FAN Speed rate R272
A A
I2C Address
FAN Type
R253
300R
G
D S
Q33
N-2N7002_SOT23
X_C0.1U16Y0402
C343
D8 X_BAS32L_LL34
R290 4.7KR
Q35
_P-MJD45H11_TO252
EC56
CD100U6.3EL11.5-RH
SYS_FAN1
R288 27KR
SYS_FAN1
3
2
1
BH1X3B_white-2
R252
10KR
FANIN3
+12V
R291
4.7KR
D9
X_BAS32L_LL34
R299 27KR
SYS_FAN2
3
2
1
BH1X3B_white-2
R306
10KR
FANIN4
60% 0x5A DAC NC
4
200K
10K
2.2K
Title
H/W MONITO R & FAN CONTROL
Size Document Number R e v
Custom
3
2
Date: Sheet
MICRO-START INT'L CO.,LTD.
MS-7195 100
25 33 Friday, September 09, 2005
1
of
100%
60%
100%
0x5C
0x5C
0x5A
5
DAC
PWM
PWM
Page 26
8
7
6
5
4
3
2
1
PRIMARY SLIME IDE
D D
IBM Ultrabay Slim and Ultrabay Enhanced
SERIAL ATA CONNECTOR BLOCK
C183
IDE1
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
_BH2X25S_black-2pitch_
C228
X_C4700P50X
CDR1
CDG1
PDD8
PDD9
PDD10
PDD11
PDD12
PDD13
PDD14
PDD15
VCC5
PD_DREQ
PD_IOR#
PD_DACK#
ATADET0
PD_A2
PD_CS#3
BAY_ATTACH#
BAY_IS_HDD
R174 X_47KR
R181 X_10KR0402-1
R180 X_10KR0402-1
R207
10KR0402-1
CDR1 22
PDD[8..15] 18
PD_DREQ 18
PD_IOR# 18
PD_DACK# 18
ATADET0 18
PD_A2 18
PD_CS#3 18
BAY_ATTACH# 18
BAY_IS_HDD 18
VCC3
VCC5
VCC3_SB
SATA1
CONN-SATA1P_orange
1
SATA_TX0 18
SATA_TX#0 18
SATA_RX#0 18
SATA_RX0 18
C325 C0.01U16X0402
C323 C0.01U16X0402
C317 C0.01U16X0402
C312 C0.01U16X0402
Default 10nF ,
Option 0 ohm
ST_TX0
ST_TX#0
ST_RX#0
ST_RX0
GND
2
HT+
3
HT-
4
GND
5
HR-
6
HR+
9
GND
G7G
8
20:5:7:5:20<5"
CDL1 22
CDG1 22
HD_RST# 29
PDD[0..7] 18
PD_IOW# 18
PD_IORDY 18
IDE_IRQ 17
PD_A1 18
PD_A0 18
VCC5
PD_CS#1 18
IDEACTP# 27
R191
8.2KR0402
R202
8.2KR0402
C C
B B
CDL1
CDG1
HD_RST#
PDD7
PDD6
PDD5
PDD4
PDD3
PDD2
PDD1
PDD0
PD_IOW#
PD_IORDY
IDE_IRQ
PD_A1
PD_A0
PD_CS#1
IDEACTP#
VCC5
R204
4.7KR0402-1
VCC3
R186 100KR
X_C4700P50X
A A
Title
IDE & SATA CONN
Size Document Number Rev
B
8
7
6
5
4
3
Date: Sheet
MICRO-START INT'L CO.,LTD.
MS-7195 100
2
26 33 Friday, September 09, 2005
of
1
MSI
Page 27
8
D D
SLP_S3# 18,29
R108 47KR
N-MMBT3904_NL_SOT23
Q17
7
C E
B
R106 0R0402-1
AGP_PRT 29
6
ATX CONNECTOR
VCC5_SB
R_PSON#
D S
G
Q16
X_N-2N7002_SOT23
R105 1KR
C48
C1000P50X
5
VCC3
-12V
R_PSON#
C44
C0.1U25Y
C0.1U25Y
CB7
ATX1
11
12
13
14
15
16
17
18
19
20
POWER
PWR-ATX20
3.3V
-12V
GND
PSON
GND
GND
GND
-5V
5V
5V
3.3V
3.3V
GND
GND
GND
POK
5VSB
12V
4
1
2
3
4
5V
5
6
5V
7
8
9
10
CB8
C0.1U25Y
CB3
C0.1U25Y
CB4
C0.1U25Y
CB6
C0.1U25Y
CB2
C0.1U25Y
CB5
C0.1U25Y
VCC5_SB VCC5
+12V
VCC3
VCC5
VCC5
3
R111
4.7KR
C58
C1000P50X
PWR_OK 29
2
1
FOR LEGEND
C C
R67
X_0R-1
PWRSW+
X_N-MMBT3904_NL_SOT23
HDDLED#
B B
IDEACTP# 26
SUSLED
PWRLED
VCC3_SB
VCC3_SB
5
R388
X_330R
R389
X_330R
F_PANEL1
R27 330R
VCC5
VCC5_SB
A A
R70 330R
8
HDDLED
SUSLED
PWRLED
DPLED3
PWRSW+
PWRSW-
R53
300R
1
HDD+
2
GNDL
3
SLED2
4
PLED1
5
PWSW+
6
PWSW-
NC 7
H2X7(2)_yellow
HDD-
SPEAKER
BUZ+
BUZ-
VCCSPK
RESET
GNDR
7
HDDLED#
8
9
VCC5
10
VCC5_SB
11
12
13
14
VCC3_SB
6
R384
4.7KR
CB1
C0.1U25Y
FP_RST# 6,18
3
D4
S-BAT54A_SOT23
2
Q9
N-MMBT3904_NL_SOT23
Q7
N-MMBT3904_NL_SOT23
1
R71 4.7KR
R69 4.7KR
R93
4.7KR0402-1
SUS_LED 29
PWR_LED 29
4
VCC3
SATALED# 18
VCC5_SB
R62
X_8.2KR
Q3
R52 _0R-1
R48
X_1KR
3
POWER BUTTON
R46
X_10KR
C16
X_C1U16Y0805
BUZZERFOR LEGEND
SPKR 18
PWRBTN# 18
VCC5
R39 220R
R33 220R
R34 2.2KR
N-MMBT3904_NL_SOT23
Title
Size Document Number Rev
B
Date: Sheet
Q4
MICRO-START INT'L CO.,LTD.
ATX & FRONT PANEL & FAN
MS-7195 100
2
D2
BAS32L_LL34
C9
C0.1U25Y
27 33 Monday, September 12, 2005
1
1
2
BZ1
BUZZER
of
Page 28
E
D
C
B
A
POWER CIRCUIT FOR USB PORT 2,3 POWER CIRCUIT FOR USB PORT 6,7
R361
2.7KR
R360
5.1KR
SVCC1
C443
C470P50X
+
EC61
.CD1000U10EL15
FRONT PANE L USB CONNECTOR FOR USB PORT 6,7
USB4+ 18
USB4- 18
USB5+ 18
USB5- 18
SVCC0
USB4-_F
Protection
Diode close
to I/O
USB4+ USB4+_F USB5-_F
USB4ÂUSB5+
USB5-
5 2
6
1
4
3
D12
ESD-IP4220
SVCC2
SVCC0
USB0-_R
USB0+_R
+
EC10
.CD1000U10EL15
USB Controller 0
F_USB3
1 2
3 4
5 6
7 8
10
H2X5(9)_yellow
FS5
F-MINISMDC110
OC#0 18 OC#1 18
SVCC0
USB1-_R
USB1+_R
FS1
F-MINISMDC110
4 4
OC#2 18
R87
2.7KR
R84
5.1KR
C38
C470P50X
REAR PANEL USB CONNECTOR FOR USB PORT 0,1
USB0-_R
USB0+_R
USB0+
USB0ÂUSB1+
USB1-
SVCC0
USB0+ 18
USB0- 18
USB1+ 18
USB1- 18
3 3
Protection
6
1
RN41
1 2
3 4
5 6
7 8
CMC-L12-9007017
5 2
4
3
ESD-IP4220
D15
USB1+_R
USB1-_R
USB0+_R
USB0-_R
USB1+_R
USB1-_R
Diode close
to I/O
POWER CIRCUIT FOR USB PORT 0,1,4,5
USB_STR1 USB_STR USB_STR
RN40
1 2
3 4
5 6
7 8
CMC-L12-9007017
USB5-_F USB4+_F
USB5+_F
FS3
F-MINISMDM260
USB4-_F
USB5+_F
USB5-_F
R377
2.7KR
R376
5.1KR
SVCC0
USB4-_F
USB4+_F
C1U16Y0805
C416
SVCC0
C417
C470P50X
USB Controller 3
F_USB4
1 2
3 4
5 6
7 8
H2X5(9)_yellow
10
+
EC60
.CD1000U10EL15
SVCC0
USB5+_F
2 2
1 1
REAR PANEL USB CONNECTOR FOR USB PORT 2,3
5 2
USB3-_R
USB3+_R USB3+
USB2+_R
USB2-_R
4
3
D23
ESD-IP4220
USB3+_R USB 2-_R
USB3-_R
USB3- 18
USB3+ 18
USB2+ 18
USB2- 18
Protection
Diode close
USB2+_R
USB3-
1 2
3 4
USB2+
5 6
USB2-
7 8
RN42 CMC-L12-9007017
SVCC1
6
1
USB2-_R
USB2+_R
USB3-_R
USB3+_R
to I/O
E
D
USB Controller 1
USB2A
SVCC1
5
6
7
8
SVCC1
UP
1
2
3
4
DOWN
_CONN-RJ45_USBX2_LEDX2_TX-2
FRONT PANE L USB CONNECTOR FOR USB PORT 6,7
23
24
25
26
27
28
29
30
USB6- 18
USB6+ 18
USB7- 18
USB7+ 18
USB6-_F
SVCC2
USB6ÂUSB6+
USB7+
6
1
Protection
5 2
ESD-IP4220
RN3
1 2
3 4
5 6
7 8
CMC-L12-9007017
USB7-_F USB6+_F
4
USB7+_F
3
D5
USB6-_F
USB6+_F
USB7-_F USB7ÂUSB7+_F
Diode close
to I/O
C
B
Title
Size Document Number Rev
B
Date: Sheet
SVCC2
USB6-_F
USB6+_F
MICRO-START INT'L CO.,LTD.
USB CONNECTOR
MS-7195 100
USB Controller 3
F_USB1
1 2
3 4
5 6
7 8
10
H2X5(9)_yellow
A
SVCC2
USB7-_F
USB7+_F
28 33 Monday, September 12, 2005
of
Page 29
5
VCC5_SB
C E
B
VRM_GD 18,31
PWR_GD 9,18
PWR_OK 27
AGP_PRT 27
R169
330R
C E
B
Q27
N-MMBT3904_NL_SOT23
R159
4.7KR0402-1
R148
1KR0402-1
R168
330R
PWR_LED 27
D D
C C
SUS_LED 27
N-MMBT3904_NL_SOT23
Q28
SMBCLK_ISO 20,24
SMBDATA_ISO 20,24
DDR AND DDR II VOLT SELECT
DDRTYPE VDIMM
PULL LOW 2.5V
PULL HIGH 1.8V
VCC_VID / VID _GOOD
Place MOSFET near CPU
1.2V/2A
EC31
.CD1000U6.3EL11.5
B B
_N-IPD20N03L_TO252
THIS PIN IS OPEN DRAIN OUTPUT
V_FSB_VTT
+
1 2
Q25
V_1P5_CORE
3VSB MODE SELECT
3VSB MODE
SINGLE MOSFET
DUAL MOSFET
R160
4.7KR0402-1
R162
1KR0402-1
VCC5_SB
VCC3
R152
4.7KR0402-1
R144
1KR0402-1
PWR_GD
X7R
C120 C0.22U16Y
VCC5
C115
C0.1U16Y0402
VID_GD# 7,31
GDS
VCC5_SB
3VDLDEC#
EXTRAM
R161
1KR0402-1
R141
1KR0402-1
1
SCL
2
SDA
3
FP_RST#
4
CHIP_PWGD
5
CPU_PWGD
6
POK1
7
PWROK
8
PSOUT#
9
DDRTYPE
10
SS
11
GND
12
VCC5
C102 X_ C 0 . 1U 25Y
C103 X_ C 0 . 1U 25Y
R135
+
1 2
3.3R
EC34
CD470U10EL11-2
3VDLDEC#
PULL HIGH
PULL LOW
4
VDIMM LINEAR OR PWM SELECT
VDIMM MODE
LINEAR REGULATOR
PWM REGULATOR
ACPI Controller
VCC5
R163
330R
R165 10R
R164 10R
40
38
44
46
42
43
47
S3#45S5#
PCI_RST#
DEV_RST#
HDD_RST#
PLED0/3VDLDEC#
19
41
37
39
VCC3
AGND
RSMRST#
SLOT_RST#
CHARPMP
PCIRST_BUF#
VLR1_DRV
VLR2_SEN
5VUSB_DRV
VLR2_DRV
VLR2_SEN
VAGP_DRV
RAM_HSEN20SVRAM_DRV/DMSB
3VSB223VSB_DRV23VAGP_SEN
21
24
48
PLED1/EXTRAM
VIDGD#13VID_SEN14VID_DRV155VSB16RAM_SEN17RAM_DRV18RAM_HDRV/DMV
C156 C2 0 P50N
C150
C0.1U25Y
U9
36
35
C2
34
C1
33
5VSB
32
31
30
29
5V_DRV
28
27
26
GND
25
EXTRAM
PULL LOW
PULL HIGH
VCC3
VCC5_SB
MS-7-RBC
Wide Trace
C104
RAMDRV
C101
C1U10Y
X_C0.1U25Y
Wide Trace
C105
X_C1000P16X
VCC3_SB
CD470U10EL11-2
VCC3
SLP_S4# 18
SLP_S3# 18,27
PCIRST_ICH7# 17
HD_RST# 26
PCIRST#2 24
PCIRST#1 15,21,24
C155
C22P50N
RSMRST# 18,23
EC37 CD470U10EL11-2
+
1 2
C129 C1U10Y
9VSB
C144 C1U16Y0805
C136 C1U16Y0805
V1P2_DRV
V1P2_SEN
C125 C1000P50X
5VUSB_DRV PWR_OK
5V_DRV
R136 33R0402
C106
C1000P50X
+
1 2
EC40
3
MCH CORE POWER
R129
5.1KR1%
R132 51KR1%
C77 X_C0.1U25Y
R125
200R
C119
C1U10Y
AGP_VREF
C73 C2200P16X
VCC5
1P2VREF 14
R130
X_33R1%
Please connect device with tree mode, not daisy chain mode.
Please refer attached file. Noticed that one of push-pull
reset#(PCIRST_BUF#, SLOT_RST#) at most can connect 5
devices.
CHARGE PUMP VOLTAGE
OUTPUT
C123 C2200P16X
R138 33R0402
C113
C1000P50X
AGP_VREF
C98
C1000P50X
Close to MS6+
C96
X_C2200P16X
5V_DRV
VCC3
C118
X_C0.1U25Y
Q26
NN-P07D03LV_SO8
4 5
3
2
1
R133
49.9KR1%
C71
C0.1U25Y
6
7
8
U8
ISET7BOOT
6
VREF_IN
5
FB
4
COMP
3
SS
2
GND
1
PWROK
MS-6+_SOP14
VCC5_SB
VCC3_SB
H_DRV
PGND
ISEN
L_DRV
VDD
VDDA
C2.2U10X0805
+12V
R131
X_0R
8
9
10
11
12
13
14
C67
R122
10R1206
V1P2_DRV
V1P2_SEN
C2200P16X
5VUSB_DRV
5V_DRV
X_C2200P16X
5VUSB_DRV
5V_DRV
X_C2200P16X
2
S-1N5817_DO214AC
VCC5
X_C0.22U16Y
C80
R127 _10KR-1
C70 C 2.2U10X0805
CLOSE TO CHIP
VCC5
VCC3_SB
G
C124
X_C1U10X
C368
C395
C419
C94
X_C0.1U25Y
DZ1
C76 C0.22U16Y
N-P75N02LDG_TO252
C108 X_C1U16Y0805
D S
Q24
N-2N7002_SOT23
R147
150R1%0402
R151
1.05KR1%
Q39
4 5
3
2
1
NN-P07D03LV_SO8
VCC5
REAR
Q36
4 5
3
2
1
NN-P07D03LV_SO8
VCC5
FRONT
X_C1U10X
CHOKE2
C139
6
7
8
6
7
8
Q22
V1P05_REF
VCC5_SB
VCC5_SB
CH-1.2U8A
D
G
D
G
USB_STR
USB_STR1
+
1 2
EC33
C97
.CD2200U6.3EL20
X_C0.1U25Y
Q23
N-P75N02LDG_TO252
S
CHOKE1
CH-3U20A
R134
X__2.2R-1
S
C81
X_C1000P50X0402
9VSB
U10A
_AZ358MX_SOIC8
3
+
1
2
-
4 8
5V DUAL Power
Dual NMOS
D03-07D0303-N03
D03-0731303-A30
1
+
1 2
EC39
KZJ6.3VB2200MCC
CONFLICT WITH PCIE
1.05V POWER
V_1P5_CORE
12 34
ICH7=1.31A
Q30
N-APM2054N_SOT89
V_1P05_CORE
USB_STR
V_1P5_CORE
+
1 2
EC35
KZJ6.3VB2200MCC
1 2
+
EC46
CD470U10EL11-2
C441
X_C0.1U25Y
12 34
C47
X_C1000P16X
C46
C0.1U10Y
EC22
KZJ6.3VB2200MCC
Q10
N-APM2054N_SOT89
+
1 2
EC4
.CD1000U6.3EL11.5
G
+
1 2
+
1 2
EC36
KZJ6.3VB2200MCC
DDR VTT Power
VCC3_SB
A A
U7
W83310DS_SOIC8
8
VREF2
7
ENABLE
6
VCTRL
5
BOOT_SEL
C60
C0.1U16Y0402
GND2
VREF1
VOUT
GND9
9
5
VIN
VCC_DDR
1
2
3
4
.CD1000U6.3EL15
+
1 2
EC25
X_.CD1000U6.3EL15
VTT_DDR
+
1 2
+
1 2
EC44
.CD1000U6.3EL15
EC29
VCC_DDR
C59
C0.1U16Y0402
R113
1KR1%0402
R112
1KR1%0402
EC15
CD470U10EL11-2
1 2
RAM_HSEN
+
4
RAMDRV
G
D S
Q12
N-P0903BS_TO263
D S
Q14
N-P0903BS_TO263
KZJ6.3VB2200MCC
+
1 2
EC45
VCC_DDR
SWITCH:
D03-40N030B-A36
D03-20N030B-I14
D03-45N030B-P03
Regulator(TO-252)
D03-45N020B-N03
D03-40N030B-A36
D03-6530A0B-F01
Regulator(TO-263)
D03-50N034B-N03
D03-50N031B-P03
Dual NMOS
D03-07D0303-N03
D03-0731303-A30
3
Regulator(TO-252)
D03-45N020B-N03
D03-40N030B-A36
D03-6530A0B-F01
Regulator(TO-263)
D03-50N034B-N03
D03-50N031B-P03
VCC5
+
1 2
EC50
X_CD470U10EL11-2
Title
MS-7 ACPI CONTROLLER
Size Document Number Re v
Custom
2
Date: Sheet
MICRO-START INT'L CO.,LTD.
MS-7195 100
1
29 33 Friday, September 09, 2005
of
Page 30
5
FB30
DDC_DATA 15,16
D D
DDC_CLK 15,16
HTPLG0_DVI 15
0R
EMI Filter needed
to pass FCC
FB31
0R
EMI Filter needed
to pass FCC
FB3
_220L200m_600
EMI Filter needed
to pass FCC
R390
X_100KR1%-1
R391
X_100KR1%-1
R344
_100KR1%-1
C461
X_C220P50N
C462
X_C220P50N
C370
C220P50N
Combined Analog and Digital DVI-I Connector
J2
5
_CONN-D - S UB30P-2.38pitch
1
TMDS DATA2-
2
TMDS DATA2+
4
TMDS DATA4-
5
TMDS_DATA4+
9
TMDS DATA1-
10
TMDS DATA1+
12
TMDS DATA3-
13
TMDS DATA3+
17
TMDS DATA0-
18
TMDS DAT0+
20
TMDS DATA5-
21
TMDS DATA5+
23
TMDS CLOCK+
24
TMDS CLOCK-
C C
B B
A A
TX2N
TX2N 15
TX2P
TX2P 15
TX1N
TX1N 15
TX1P
TX1P 15
TX0N
TX0N 15
TX0P
TX0P 15
TXCP
TXCP 15
TXCN
TXCN 15
VGAGND
TVGND
DVI-I
C5b
C2C3C4
C1
16
9 1
CP27
X_COPPER
1 2
1 2
CP23
X_COPPER
C5a
24 8
17
HOT PLUG DET.
Analog Vertical Sync
Analog Horizontal Sync
Analog Ground1
Analog Ground2
GROUND (+5V)
DATA 2/4 SHLD
DATA 1/3 SHLD
DATA 0/5 SHLD
1
1
1
DDC CLK
DDC DATA
Analog Red
Analog Green
Analog Blue
+5V POWER
CLOCK SHLD
4
DDC_DATA_C
VCC5
3
2
D29
X_1PS226_SOT23
DDC_CLK_C
VCC5
3
2
D30
X_1PS226_SOT23
LINK0_HTPLG
3
2
D11
1PS226_SOT23
16
6
7
8
C4
C1
C2
C3
C5
C6
VGAGND
14
15
22
3
11
19
4
VCC5
DDC_CLK_C
DDC_DATA_C
VGA_VSYNC
VGA_HSYNC
D_VGA_RED
D_VGA_GREEN
D_VGA_BLUE
F1
F-MINISMDC110
FROM 945G
VGA_VSYNC 16
VGA_HSYNC 16
D_VGA_RED 16
D_VGA_GREEN 16
D_VGA_BLUE 16
VCC5
TVGND
J4
_CONN-RCA_MINI
4
3
2
6
345
3
TVGND
3
1
5
JACK-EARX3-13P-RH
CVBS_D
7
8
9
TVGND
6
Y_OUT
C_OUT
C438
C75P50N
CONN2
4
3
2
1
S-VIDEO & COMPOSITE
C436 C33 P50N
FB7 60L500m_100
C435
C75P50N
TVGND
TVGND
C437 C33P 50N
FB9 60L500m_100
FB8 60L500m_100
C434 C33P 50N
C433
C75P50N
COMPONENT OUT Y Pr Pb
C_Pr
C_Pb
C_Y
VGAGND
C415
C62P50N
SVIDEO_Y
SVIDEO_C
C414
C62P50N
VCC5
C_Pr
VCC5
C_Pb
VCC5
CVBS
R375
_75R-1
C418
C62P50N
2
3
2
1PS226_SOT23
D25
3
2
1PS226_SOT23
D27
3
2
1PS226_SOT23
D26
R374
_75R-1
2
1
VGAGND
1
VGAGND
1
VGAGND
R378
_75R-1
CVBS 15
SVIDEO_Y 15
SVIDEO_C 15
C400 C33P50N
FB5 60L500m_100
C405
C75P50N
C399 C33P50N
FB4 60L500m_100
C401
C75P50N
C403 C33P50N
FB6 60L500m_100
C404
C75P50N
Y_OUT CVBS_D
C_OUT
Title
Size Document Number Re v
Date: Sheet of
1
Y C_Y
C389
C62P50N
C387
C62P50N
C388
C62P50N
1PS226_SOT23
1PS226_SOT23
R354
_75R-1
Pr
R352
_75R-1
Pb
R350
_75R-1
VCC5 VCC5
D21
2
3
1
VCC5
D28
2
3
1
Y1 5
Pr 15
Pb 15
VGAGND
VGAGND
D24
2
1PS226_SOT23
3
1
MICRO-START INT'L CO.,LTD.
DVI_I & TV-OUT CONNETCOR
Custom
MS-7195 100
1
1 2
1 2
1 2
CP26
CP28
CP25
TVGND
30 33 Friday, September 09, 2005
Page 31
5
4
3
2
1
VCC5
R47
D D
VID[0..5] 6
VCC3
1KR
R64
VRM_GD 18,29
R45 30KR1%
C C
C21 X_C560P50X
VCCP
VCC_VRM_SENSE 6
VSS_VRM_SENSE 6
VCC5
B B
R16 _0R-1
R15
R14
X_4.7KR
X_1.65KR1%
+12V_POWER
A A
N-MMBT3904_NL_SOT23
ENLL
Q2
COP
C22 X_C47P50N
R40 2.2KR
R25 0R
C12 X_C1000P50X
R32 0R
R56 200KR
R55 X_47KR
R18 2.2KR
R13 32.4KR1%0402
C4 C0.022U16X
R5
5.6KR
R10 1KR
R26 10KR
5
VID4
VID3
VID2
VID1
VID0
VID5
C24 C680P16X
R38
X_750R
C8
X_C0.1U25Y
OFS
R66 100KR1%
C31 C0.01U50X
VCCP
X_C0.01U50X
VID_GD# 7,29
ENLL
COMP
FB
VDIFF
FS
REF
C7
U5
38
VID4
39
VID3
40
VID2
1
VID1
2
VID0
3
DACSEL/VID5
35
PGOOD
37
ENLL
8
COMP
9
FB
10
VDIFF
12
VSEN
11
RGND
6
OFST
36
FS
5
REF
4
VRM10
13
OCSET
14
ICOMP
15
ISUM
16
IREF
C3
C0.01U50X
R49 _40.2KR1%-LF
R44 _40.2KR1%-LF
R35 _40.2KR1%-LF
2.2R0805
C27
C4.7U10Y0805
7
VCC
GND
41
33
PVCC1
BOOT1
UGATE1
PHASE1
ISEN1
LGATE1
PVCC2
BOOT2
UGATE2
PHASE2
ISEN2
LGATE2
PVCC3
BOOT3
UGATE3
PHASE3
ISEN3
LGATE3
_ISL6566CR_QFN40
BOTTOM PAD CONNECT TO GND
THROUGH 10 vias
PHASE1
PHASE2
PHASE3
30
31
29
32
34
24
26
27
28
25
23
18
21
20
22
19
17
4
BOOT1
U_G1
PHASE1
R65 2.4KR1%
L_G1
BOOT2
U_G2
PHASE2
R41 2.4KR1%
L_G2
BOOT3
U_G3
PHASE3
R31 2.4KR1%
L_G3
R54
2.2R0805
R43
2.2R0805
R12
2.2R0805
C32 C 1U16Y0805
12VP1
R63 2.2R0805
C30
C0.1U25X
C20 C 1U16Y0805
12VP2
R11 2.2R0805
C18
C0.1U25X
C5 C1U16Y0805
12VP3
R17 2.2R0805
C10
C0.1U25X
VCCP
EC19
C10U10Y1206
EC17
C10U10Y1206
EC18
C10U10Y1206
EC28
C10U10Y1206
EC3
C10U10Y1206
EC16
C10U10Y1206
+12V_POWER
+12V_POWER
+12V_POWER
R126
10KR
R110
10KR
R81
10KR
CD1000U16EL20-1
U_G1
L_G1
U_G2
L_G2
U_G3
L_G3
3
+12VP_FET
+
1 2
EC27
PHASE1
PHASE2
PHASE3
VCCP
R128 1R0805
N-P75N02LD_TO252
R109 1R0805
N-P75N02LD_TO252
N-IPD09N03LA_TO252-LF
R80 1R0805
N-P75N02LD_TO252
+
EC13
1 2
C100U2SP
+
EC21
1 2
C100U2SP
+12V_POWER
CD1000U16EL20-1
UG1
CD1000U16EL20-1
UG2
CD1000U16EL20-1
UG3
C78
C0.01U50X
+12VP_FET
EC30
G
Q20
G
+12VP_FET
EC12
+
G
Q15
G
+12VP_FET
EC23
+
G
Q11
Q8
G
1 2
+
D S
D S
1 2
D S
D S
1 2
D S
D S
JPW1
3
12V
4
12V
PWR-2X2M
C75 C4 .7U35Y1206
C65 C1U16Y0805
Q21
N-IPD09N03LA_TO252-LF
G
C55 C4 .7U35Y1206
C51 C1U16Y0805
Q18
N-IPD09N03LA_TO252-LF
G
C36 C 4.7U35Y1206
C35 C 1U16Y0805
G
1
GND
2
GND
Q19
N-P75N02LD_TO252
D S
N-P75N02LD_TO252
Q13
D S
N-P75N02LD_TO252
Q5
D S
2
COIL4
CH-1.2U18A
R120
2.2R0805
C63
C1000P50X
R107
2.2R0805
C54
C1000P50X
R90
2.2R0805
C40
C1000P50X
+12V_POWER
C79
X_C4.7U35Y1206
COIL3
CH-0.6U40A-RH-1
HS3
E31-0500261-K08
112
2
MOSFET Heatsinks
COIL2
CH-0.6U40A-RH-1
HS2
E31-0500261-K08
112
2
COIL1
CH-0.6U40A-RH-1
HS1
E31-0500261-K08
112
2
Title
Size Document Number Re v
Custom
Date: Sheet
VCCP
+
EC8
1 2
+
1 2
+
1 2
+
1 2
+
1 2
+
1 2
+
1 2
+
1 2
+
1 2
+
1 2
CD560U4OS-2
EC7
CD560U4OS-2
EC6
CD560U4OS-2
EC5
X_CD560U4OS-2
EC26
X_CD560U4OS-2
EC9
CD560U4OS-2
EC14
CD560U4OS-2
EC20
CD560U4OS-2
EC11
CD560U4OS-2
EC24
CD560U4OS-2
VCCP
VCCP
VCCP
MICRO-START INT'L CO.,LTD.
VRM10.1 I ntersi l 6566 3Phase
MS-7195 100
1
31 33 Friday, September 09, 2005
of
Page 32
8
7
6
5
4
3
2
1
EMI Decoupling CAP
VCC3
C229
D D
X_C0.1U25Y
C255
X_C0.1U25Y
C275
X_C0.1U25Y
VCC5
C361
X_C0.1U25Y
C380
X_C0.1U25Y
VCC5 VBAT VCC5_SB VCC3_SB
C256
X_C0.1U25Y
C170
X_C0.1U25Y
C1
X_C0.1U25Y
C344
X_C0.1U25Y
C367
X_C0.1U25Y
VCCP
C56
X_C0.1U25Y
C33
X_C0.1U25Y
+12V
C14
X_C4.7U16Y1206
C292
X_C4.7U16Y1206
C92
X_C4.7U16Y1206
VCC3
Vcc3 & Vcc5 Bridge
Decoupling CAP
C C
VCC5
C308
X_C0.1U25Y
B B
C379
X_C0.1U25Y
C23
X_C0.1U25Y
VCC3
C147
X_C0.1U25Y
C287
X_C0.1U16X0402
C356
X_C0.1U25Y
C290
X_C0.1U25Y
C34
X_C0.1U25Y
C445
X_C0.1U25Y
VCC5
SIM1 SIM2
T1
1
2
Impedance Test
X_H1X2_black
T2
1
2
X_H1X2_black
FM3
Mounting Holes
X
X_FM
FM2
MH2
1
2
3
A A
8
(NPTH)
4
5
6
7
8
9
MH1
1
2
3
(NPTH)
4
5
6
7
8
9
7
MH3
1
2
3
(NPTH)
4
5
6
7
8
9
MH4
1
2
3
6
(NPTH)
4
5
6
7
8
9
5
FM1
X
X_FM
X
X_FM
Title
Decoupling CAP
Size Document Number Rev
B
4
3
Date: Sheet
MICRO-START INT'L CO.,LTD.
MS-7195 100
2
32 33 Friday, September 09, 2005
of
1