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1
1Cover Sheet
Block Diagram/Clock Map/Power Map
Intel LGA775 CPU
Intel Lakeport - MCH
Intel ICH7 - PCI & DMI & CPU & IRQ
Intel ICH7 - LPC & ATA & USB & GPIO 13
Intel ICH7 - POWER
Clock - ICS954559
LPC I/O - W83627THF
Azalia - ALC882
LAN Tekoa/EKronR
DDR II System Memory 1 & 2
DDR II System Memory 3 & 4
DDR II VTT Decoupling
PCI EXPRESS X16 Slot
A A
PCI Slot 1 & 2 & 3 & PCI Express x1 Slot
ATA33/66/100 IDE & SATA Connectors
2-4
5-7
8-11
12
14
15
16
17
18
19
20
21
22
23-24
25
Version 100
MS-7176
CPU:
Intel Prescott ( L2=2MB ) - 3.4G & Above
Intel Cendar Mill (65nm) - 3.73G & Above
Intel Smithfield (90nm Dual core)
System Chipset:
Intel Lakeport - GMCH (North Bridge)
Intel ICH7R (South Bridge)
On Board Chipset:
BIOS -- FWH EEPROM
Aliza Codec -- ALC882
LPC Super I/O -- W83627THF
LAN-- Intel Tekoa(82573E)/EKronR(82562GZ)
CLOCK -- ICS954559
1394 Controller -- VT6307 2pots
IDE RAID Controller - - VT6410
VGA Connector
USB Connectors
ATX Connetcor & Front Panel
MS8 & FWH
ACPI CONTROLLER MS7
VRM 10.1 - RT8804
VT6410 IDE RAID
VT6307 1394-2 PORTS
GMCH POWER
26
27
28
29
30
31
32
33
34
35AutoBOM parts
36GPIO & Jumper Setting
37-38PWROK/RESET MAP
HISTORY 39
Main Memory:
DDR II * 4 (Max 4GB)
Expansion Slots:
PCI2.3 SLOT * 3
PCI EXPRESS X1 SLOT * 2
PCI EXPRESS X16 SLOT
RickTek PWM:
Controller: RT8804 5 Phases
opt A: 945P+ICH7R+VIA1394+VIA6410+giga LAN(Cfg-STD)
opt B: 945P+ICH7+ GIGA LAN (cfg-945P-ICH7-GL)
opt C: 945G+ICH7R+VIA1394+VIA6410+giga LAN(Cfg-945G-ICH7R-GL)
opt D: 945G+ICH7+ GIGA LAN (cfg-945G-ICH7-GL)
1
MSI
Title
Size Document Number Re v
Date: Sheet
MICRO-STAR INt'L CO., LTD.
COVER SHEET
MS-7176
135Monday, May 23, 2005
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0A
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Block Diagram
1
VRM 10.1
RT8804
5-Phase PWM
PCI EXPRESS
X16
Connector
Analog
PCI EXPRESS X16
RGB
Intel LGA775 Processor
FSB 533/800/1066
133/200/266
MHz
FSB
Lakeport
GMCH
DDR2 533/667
DDRII
266/333
MHz
4 DDR II
DIMM
Modules
VT6410
IDE RAID
IDE2
IDE3
Video
Out
J1394_1
DMI
UltraDMA
33/66/100
IDE Primary
A A
SATA 0~3
SATA
ICH7
USB
USB Port 0~7
ALC882
AC'97
PCI
PCI EXPRESS X1
LPC Bus
PCI Slot 1
PCI Slot 2
PCI Slot 3
PCI EXPRESS X1
PCI EXPRESS X1
VT6307
1394
J1394_2
Azalia Codec
PCI EXPRESS X1
GIGA LAN
Intel Tekoa
SPI
SPI
LPC SIO
Winbond
83627THF
EEPROM
MS8
FWH
Keyboard
Mouse
1
Floopy Parallel Serial
MSI
Title
Size Document Number Rev
Date: Sheet
MICRO-STAR INt'L CO., LTD.
BLOCK DIAGRAM
MS-7176
235Monday, May 23, 2005
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5
4
3
2
1
HCLK
LGA775
CLOCK MAP
D D
ICS 954519
1/2
Clock
Generator
C C
MCHCLK
DOTCLK
96MHz
ICHCLK
SATACLK
USB48MHz
ICH14.318MHz
SIO48MHz
FWH_PCLK
33MHz
Lakeport
MCH
ICH7
Winbon
LPC IO
FWH
ICS 954519
2/2
Clock
Generator
PCI_E1_100MHz
PCI_E2_100MHz
PCI_E_LAN
100MHz
PCI_E1
PCI-Express X 16
PCI_E2
PCI-Express X 1
PCI_E3PCI_E3_100MHz
PCI-Express X 1
INTEL Tekoa
PCI-Express LAN
1394_PCLK
33MHz
B B
RAID_PCLK
33MHz
VT6307
1394
VT6410
IDE RAID
MS8_PCLK
33MHz
MS8
PCI1
A A
5
PCICLK[0..3]
33MHz
PCI2
MSI
PCI3
4
3
2
Title
Size Document Number Rev
Date: Sheet
MICRO-STAR INt'L CO., LTD.
CLOCK MAP
MS-7176
1
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5
POWER MAP
4
3
2
1
D D
ATX POWER
+12V +5V +3.3V +5VSB
PCI_E1
1.875A
6.5A
5A
12.6A
125A 5.3A
PCI_E2
PCI_E3
PCI1
PCI2
PCI3
LGA775VRM 10.1
C C
B B
MSI
ACPI
Controller
MS - 7
5VDIMM
MSI
MS6 +
17.01+0.9+4.96 = 22.87A
V_1P5_CORE
4.96A
MSI
MS6 +
W83310DS
0.9A
4+9.4+0.6 = 14A14*1.8/5/0.8 = 6.3A
VCC_DDR
0.6A
VTT_DDR
17.01A
V_1P05_CORE
VR
1.31A
Lakeport
4A
MCH
13.8A + 1.5A
= 15.3A
9.4A
DDR2 X 4
1.2A
1.71A
1.31A
ICH7
0.7A
0.9A
14mA
VR
V_FSB_VTT
6.2A
VLAN25
INTEL
VCC3_SB
3.775A
VLAN12
Tekoa
MSI
MS8
A A
5VDUAL
5
4.1A
MSI
4.1A
USB+PS2
4
3
2
Title
Size Document Number Rev
Date: Sheet
MICRO-STAR INt'L CO., LTD.
POWER MAP
MS-7176
1
435Monday, May 23, 2005
0A
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8
D D
H_DBI#[0..3]8
H_IERR#6
H_FERR#6,12
H_STPCLK#12
H_DBSY#8
H_DRDY#8
H_TRDY#8
C C
VTT_OUT_LEFT
H_CPUSLP#12
VTT_OUT_RIGHT
B B
X_0.1u/25V/6
C515
A A
8
H_ADS#8
H_LOCK#8
H_BNR#8
H_HIT#8
H_HITM#8
H_DEFER#8
THERMDA16
THERMDC16
TRMTRIP#6,12
SKTOCC#29
H_PROCHOT#6
H_IGNNE#12
ICH_H_SMI#12
R110 X_62/6
R17 0/6
R634 X_1K/6
H_FSBSEL06,10,15,29
H_FSBSEL16,10,15,29
H_FSBSEL26,10,15
H_PWRGD6,12
H_CPURST#6,8
H_D#[0..63]8
H_DBI#0
H_DBI#1
H_DBI#2
H_DBI#3
TP15
H_INIT#12
H_BPRI#8
H_TDI
H_TDO
H_TMS
H_TRST#
H_TCK
H_A20M#12
H_TESTHI13
TP16
TP17
H_D#63
H_D#62
H_D#61
H_D#60
H_D#59
H_D#58
H_D#57
H_D#56
H_D#55
H_D#54
G11
D19
C20
AB2
AB3
AD3
AD1
AF1
AC1
AG1
AE1
AL1
AK1
AE8
AL2
AH2
AE6
G10
D16
A20
AA2
G29
H30
G30
G23
B22
A22
A19
B19
B21
C21
B18
A17
B16
C18
7
A8
F2
R3
M3
P3
H4
B2
C1
E3
D2
C3
C2
D4
E4
G8
G7
M2
N2
P2
K3
L2
N5
C9
Y1
V2
N1
7
H_A#[3..31]8
U5A
DBI0#
DBI1#
DBI2#
DBI3#
EDRDY#
IERR#
MCERR#
FERR#/PBE#
STPCLK#
BINIT#
INIT#
RSP#
DBSY#
DRDY#
TRDY#
ADS#
LOCK#
BNR#
HIT#
HITM#
BPRI#
DEFER#
TDI
TDO
TMS
TRST#
TCK
THERMDA
THERMDC
THERMTRIP#
GND/SKTOCC#
PROCHOT#
IGNNE#
SMI#
A20M#
TESTI_13
RSVD
RESERVED0
RESERVED1
RESERVED2
RESERVED3
RESERVED4
RESERVED5
BOOTSELECT
LL_ID0
LL_ID1
BSEL0
BSEL1
BSEL2
PWRGOOD
RESET#
D63#
D62#
D61#
D60#
D59#
D58#
D57#
D56#
D55#
D54#
B15
H_D#53
D53#
H_D#52
6
CPU SIGNAL BLOCK
H_A#7
H_A#8
H_A#25
A26#
D39#
H_D#38
AC5
F18
H_A#24
A25#
D38#
H_D#37
H_A#19
H_A#23
H_A#17
H_A#22
H_A#18
H_A#20
H_A#21
AB5
AA5
AD6
AA4
AB6
A24#
A23#
A22#
A21#
A20#Y4A19#Y6A18#W6A17#
D37#
D36#
D35#
D34#
D33#
D32#
D31#
F17
G17
H_D#36
H_D#35
6
F15
E16
E15
G18
G16
G15
H_D#30
H_D#32
H_D#33
H_D#34
H_D#31
H_A#26
H_A#31
H_A#30
H_A#28
H_A#29
H_A#27
AJ6
AJ5
AH5
AH4
AG5
AG4
AG6
AF4
AF5
AB4
A35#
A34#
A33#
A32#
A31#
A30#
A29#
A28#
A27#
D52#
D51#
D50#
D49#
D48#
D47#
D46#
D45#
D44#
D43#
D42#
D41#
D40#
F21
G22
H_D#47
D22
H_D#46
E22
H_D#45
G21
H_D#44
H_D#43
E21
H_D#42
F20
H_D#41
E19
H_D#40
E18
H_D#39
A14
C14
C15
D17
D20
H_D#51
H_D#48
H_D#50
H_D#49
H_A#14
H_A#15
H_A#16
H_A#12
H_A#13
A16#W5A15#V4A14#V5A13#U4A12#U5A11#T4A10#
D30#
D29#
D28#
D27#
D26#
D25#
F14
E13
D13
G14
G13
H_D#26
H_D#27
H_D#29
H_D#28
H_D#25
H_A#10
H_A#9
H_A#11
U6
A9#T5A8#R4A7#M4A6#L4A5#M5A4#P6A3#
D24#
D23#
D22#
F12
F11
E10
D10
H_D#21
H_D#23
H_D#22
H_D#24
D21#
H_D#20
H_A#6
H_A#4
H_A#5
H_A#3
L5
D20#D7D19#E9D18#F9D17#F8D16#G9D15#
D11
H_D#14
H_D#15
H_D#16
H_D#19
H_D#18
H_D#17
AC2
C12
5
DBR#
D14#
B12
H_D#13
5
AN4
AN3
VSS_SENSE
VCC_SENSE
D13#
D12#D8D11#
C11
H_D#11
H_D#10
H_D#12
R80 0/6
R81 0/6
TP1
VID5
AM5
AM7
AJ3
AK3
AN6
AN5
VID6#
RSVD
ITP_CLK1
ITP_CLK0
VSS_MB_REGULATION
VCC_MB_REGULATION
D10#
D9#
D8#
D7#A7D6#B7D5#B6D4#A5D3#C6D2#A4D1#C5D0#
B10
A11
A10
H_D#2
H_D#7
H_D#8
H_D#4
H_D#5
H_D#3
H_D#9
H_D#6
VID4
VID3
VID2
AL4
AK4
AL6
AM3
VID5#
VID4#
VID3#
VID_SELECT
GTLREF0
GTLREF1
GTLREF_SEL
CS_GTLREF
PCREQ#
TESTHI12
TESTHI11
TESTHI10
TESTHI9
TESTHI8
TESTHI7
TESTHI6
TESTHI5
TESTHI4
TESTHI3
TESTHI2
TESTHI1
TESTHI0
FORCEPH
BCLK1#
BCLK0#
COMP5
COMP4
COMP3
COMP2
COMP1
COMP0
ADSTB1#
ADSTB0#
DSTBP3#
DSTBP2#
DSTBP1#
DSTBP0#
DSTBN3#
DSTBN2#
DSTBN1#
DSTBN0#
LINT1/NMI
LINT0/INTR
LGA775
B4
H_D#0
H_D#1
VCC_VRM_SENSE
VSS_VRM_SENSE
VID[0..5] 29
VID0
VID1
AL5
AM2
VID2#
VID1#
VID0#
AN7
H1
H2
H29
E24
AG3
BPM5#
AF2
BPM4#
AG2
BPM3#
AD2
BPM2#
AJ1
BPM1#
AJ2
BPM0#
G5
J6
REQ4#
K6
REQ3#
M6
REQ2#
J5
REQ1#
K4
REQ0#
W2
P1
H5
G4
G3
F24
G24
G26
G27
G25
F25
W3
F26
AK6
G6
RSVD
G28
F28
A3
RS2#
F5
RS1#
B3
RS0#
U3
AP1#
U2
AP0#
F3
BR0#
T2
J2
R1
G2
T1
A13
J17
DP3#
H16
DP2#
H15
DP1#
J16
DP0#
AD5
R6
C17
G19
E12
B9
A16
G20
G12
C8
L1
K1
4
VCCP
R43 62/6
CPU_GTLREF
TP_GTLREF_SEL
MCH_GTLREF_CPU
H_BPM#5
H_BPM#4
H_BPM#3
H_BPM#2
H_BPM#1
H_BPM#0
H_REQ#4
H_REQ#3
H_REQ#2
H_REQ#1
H_REQ#0
H_TESTHI12
H_TESTHI11
H_TESTHI10
H_TESTHI9
H_TESTHI8
H_TESTHI2_7
H_TESTHI1
H_TESTHI0
RSVD_AK6
RSVD_G6
H_RS#2
H_RS#1
H_RS#0
TP3
TP2
H_COMP5
H_COMP4
H_COMP3
H_COMP2
H_COMP1
H_COMP0
Be closed to CPU socket
4
R83
X_0/6
R84
X_0/6
RN11 62/6/8P4R
1 2
3 4
5 6
7 8
R99 62/6
R151 62/6
R90 62/6
R145 62/6
R53 X_62/6
R102 X_62/6
CK_H_CPU# 15
CK_H_CPU 15
H_RS#[0..2] 8
R94 1 00/6
R95 1 00/6
R101 X_60.4/6
R112 X_60.4/6
R96 60.4/6
R150 60.4/6
TP4
TP8
TP7
TP5
H_ADSTB#1 8
H_ADSTB#0 8
H_DSTBP#3 8
H_DSTBP#2 8
H_DSTBP#1 8
H_DSTBP#0 8
H_DSTBN#3 8
H_DSTBN#2 8
H_DSTBN#1 8
H_DSTBN#0 8
H_NMI 12
H_INTR 12
RT2
10K/8/1/thermistor
VCC_VRM_SENSE 31
VSS_VRM_SENSE 31
CPU_GTLREF 6
MCH_GTLREF_CPU 8
H_REQ#[0..4] 8
CPU_TMPA 16
VTIN_GND 16
3
Reserved for new dual-core CPU used(TBD)
R45
X_10K/6
TP_GTLREF_SEL
VTT_OUT_LEFT
V_FSB_VTT
VTT_OUT_RIGHT 6
H_BR#0 6,8
VTT_OUT_RIGHT
C32
1u/10V/6
C43
3
VTT_OUT_LEFT 6
X_0.1u/25V/6
2
VCC3+12V
DS
G
X_YFET-NDS7002AS
R46
X_249/6/1
Q5
H_TESTHIO
BSEL
1
02
FSB FREQUENCY
VCC3
TABLE
R48
X_110/6/1
R49
X_60.4/6
1
C1
X_0.1u/25V/6
267 MHZ (1067)000
0
01 200 MHZ (800)
1
0 0 133 MHZ (533)
Prescott / Cedar Mill
LL_ID[1:0] = 00
GTLREF_SEL = 0
VTT_SEL = 1
RN8
680/6/8P4R
VID4
1
VID3
3
VID1
5
VID2
7
VID0
R75 680/6
VID5
R72 680/6
RN7 62/6/8P4R
1 2
3 4
5 6
7 8
1 2
3 4
5 6
7 8
RN10 62/6/8P4R
R73 62/6
R77 62/6
R88 62/6
PLACE BPM/TCK/TDI/TMS TERMINATION NEAR CPU
PLACE TDO TERMINATION NEAR CONNECTOR
MSI
Title
Size Document Number Rev
Date: Sheet
MICRO-STAR INt'L CO., LTD.
Intel LGA775 CPU - Signals
2
2
4
6
8
VTT_OUT_RIGHT
H_BPM#3
H_BPM#5
H_BPM#0
H_BPM#1
H_TMS
H_BPM#2
H_TDI
H_BPM#4
H_TRST#
MS-7176
H_TDO
H_TCK
535Monday, May 23, 2005
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8
VCCP
AG21
AG19
AG18
AG15
AG14
AG12
AG11
AF9
AF8
AF22
AF21
AF19
AF18
AF15
AF14
AF12
AF11
AE23
AE22
AE21
AE19
AE18
AE15
AE14
AE12
AE11
AD30
AD29
AD28
AD27
AD26
AD25
AD24
AD23
AC30
AC29
AC28
AC27
AC26
AC25
AC24
AC23
AE9
AD8
AC8
AB8
AA8
U5B
VCCP
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCCW8VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
Y8
Y30
Y23
Y24
Y25
Y26
Y27
Y28
Y29
W30
VCCP
D D
C C
AG22
VCC
VCC
W29
AG25
VCC
VCC
W28
AG26
VCC
VCC
W27
AG27
VCC
VCC
W26
AG28
VCC
VCC
W25
AG29
VCC
VCC
W24
7
AG30
VCC
W23
AG8
VCC
AG9
VCC
VCCU8VCCV8VCC
AH11
VCC
VCC
U30
AH12
VCC
VCC
U29
AH14
VCC
VCC
U28
AH15
VCC
VCC
U27
AH18
VCC
VCC
U26
AH19
VCC
VCC
U25
AH21
VCC
VCC
U24
AH22
VCC
U23
AH25
VCC
VCCT8VCC
AH26
VCC
VCC
T30
AH27
VCC
VCC
T29
AH28
VCC
VCC
T28
AH29
VCC
VCC
T27
AH30
VCC
VCC
T26
AH8
T25
VCC
VCC
AH9
T24
VCC
VCC
AJ11
T23
VCC
AJ12
VCC
AJ14
VCC
AJ15
VCC
VCCN8VCCP8VCCR8VCC
6
AJ18
AJ19
AJ21
AJ22
AJ25
AJ26
AJ8
AJ9
AK11
AK12
AK14
AK15
AK18
AK19
AK21
AK22
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCCM8VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
N23
N24
N25
N26
N27
N28
N29
N30
M24
M25
M26
M27
M28
M29
M30
VCC
VCC
AK25
VCC
M23
AK26
VCC
5
AK8
AK9
AL11
AL12
AL14
AL15
AL18
AL19
AL21
AL22
AL25
AL26
AL29
AL30
AL8
AL9
AM11
AM12
AM14
AM15
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCCJ8VCCJ9VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCCK8VCCL8VCC
J22
J23
J24
J25
J26
J27
J28
J29
J30
K23
K24
K25
K26
K27
K28
K29
K30
AM18
VCC
VCC
J21
AM19
VCC
VCC
J20
AM21
VCC
VCC
J19
AM22
VCC
VCC
J18
AM25
VCC
VCC
J15
AM26
VCC
VCC
J14
4
AM29
VCC
VCC
J13
AM30
VCC
VCC
J12
AM8
J11
VCC
VCC
AM9
VCC
VCC
J10
AN11
AN9
AN12
VCC
VCC
AN8
AN14
AN15
AN18
VCC
VCC
VCC
VCC
VTT_OUT_RIGHT
VCC
VCC
VCC
VCC
AN26
AN29
AN30
AN19
AN21
AN22
VCC
VCC
VCC
VCCA
VSSA
VCCPLL
VCC-IOPLL
VTTPWRGD
VTT_OUT_LEFT
VTT_SEL
RSVD
VCC
HS11HS22HS33HS4
AN25
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
4
A23
B23
D23
C23
A25
A26
A27
A28
A29
A30
B25
B26
B27
B28
B29
B30
C25
C26
C27
C28
C29
C30
D25
D26
D27
D28
D29
D30
VTT_PWG
AM6
VTT_OUT_RIGHT
AA1
VTT_OUT_LEFT
J1
F27
F29
LGA775
H_VCCA
H_VSSA
H_VCCA
3
V_FSB_VTT
R635X_1K/6
R564
X_1K/6
01TEJ/PSC
VCC3
2
V_FSB_VTT
C90 10u/10V/8
C139 10u/10V/8
C105 10u/10V/8
1
CAPS FOR FSB GENERIC
RSVD
VTT_OUT_RIGHT
GTLREF VOLTAGE SHOULD BE
0.63*VTT = 0.756V
B B
VTT_OUT_RIGHT5
A A
VCC3 VCC5
X_1u/10V/6
VTT_OUT_LEFT5
C304
0.1u/25V/6
C40
8
R109 124/6/1
VTT_OUT_RIGHT
R111 10/6
R108
210/6/1
C47
1u/10V/6
C50
X_220p/50V/6
PLACE AT CPU END OF ROUTE
R66 130/6
R153 62/6
VTT_OUT_LEFT
VTT_OUT_RIGHT H_IERR#
R93 62/6
R651 X_100/6
R86 62/6
H_PROCHOT#
H_CPURST#
H_BR#0
H_PWRGD
PLACE AT ICH END OF ROUTE
V_FSB_VTT
R283 62/6
R286 62/6
TRMTRIP#
H_FERR#
7
CPU_GTLREF 5
H_PROCHOT# 5
H_CPURST# 5,8
H_BR#0 5,8
H_PWRGD 5,12
H_IERR# 5VTT_OUT_RIGHT5
TRMTRIP# 5,12
H_FERR# 5,12
V_FSB_VTT
VTT_OUT_LEFT
VCC5_SB
VID_GD#15,30,31
FSBSEL RESISTOR CAN BE REMOVED IF ONLY TEJAS
AND CEDAR MILL ARE SUPPORTED
6
5
R76
1K/6
R87 10K/6
V_FSB_VTT
R79 680/6
RN30
1
3
5
7
470/6/8P4R
PLACE COMPONENTS AS CLOSE AS POSSIBLE TO PROCESSOR SOCKET
TRACE WIDTH TO CAPS MUST BE SMALLER THAN 12MILS
L4 10uH/8/125mA/Rdc=0.7
L20 10uH/8/125mA/Rdc=0.7
CP18 X_COPPER
VTT_PWG
Q14
2N3904S
H_FSBSEL1
2
H_FSBSEL0
4
H_FSBSEL2
6
8
4
C516
X_1u/10V/6
H_FSBSEL1 5,10,1 5,29
H_FSBSEL0 5,10,1 5,29
H_FSBSEL2 5,10,15
VTT_PWG SPEC :
High > 0.9V
Low < 0.3V
Trise < 150ns
3
C96
10u/10V/8
H_VCCA
C97
10u/10V/12
H_VSSA
MICRO-STAR INt'L CO., LTD.
MSI
Title
Size Document Number Rev
Date: Sheet
2
Intel LGA775 CPU - Power
MS-7176
635Monday, May 23, 2005
1
of
0A

8
7
6
5
4
3
2
1
MSID1 MSID0
AJ20
VSS
AJ23
VSS
AJ24
VSS
AJ27
VSS
AJ28
VSS
R30
AJ29
VSS
0
0
R29
VSS
VSS
AJ30
VSS
AH10
VSS
AH13
VSS
AH16
V30
VSS
AH17
VSSV3VSS
VSS
AH20
V29
VSS
AH23
05 Per FMB
05 Value FMB
V28
V27
V26
V25
V24
V23
VSS
VSS
VSS
VSS
VSS
VSS
VSSU7VSSU1VSST7VSST6VSST3VSSR7VSSR5VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
AH3
AH6
AH7
AJ10
AJ13
AJ16
AH24
AJ17
VTT_OUT_RIGHT
R57
E23
VSS
AF16
RSVD
VSS
AF17
VSS
AF20
X_22/6
TP12
TP9
TP10
F23
F6
RSVDE5RSVDE6RSVDE7RSVD
VSS
VSS
VSS
VSS
AF23
AF24
AF25
AF26
B13
RSVD
IMPSEL#
VSS
VSS
VSS
AF27
AF28
AF29
VSS
AF3
D D
C C
B B
AA23
AA24
AA25
AA26
AA27
AA28
AA29
AA3
AA30
AA6
AA7
AB1
AB23
AB24
AB25
AB26
AB27
AB28
AB29
AB30
AB7
AC3
AC6
AC7
AD4
AD7
AE10
AE13
AE16
AE17
AE2
AE20
AE24
AE25
AE26
AE27
AE28
R50
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
AE29
AE3
COMP6Y3COMP7
VSS
VSS
AE5
AE30
AE4
AE7
R55
60.4/6
RSVD
VSS
AF10
TP11
D14
RSVDD1RSVD
VSS
AF13
60.4/6
U5C
A12
A15
A18
A2
A21
A24
A6
A9
R41
62/6
P5
RSVDJ3RSVDN4RSVD
VSS
VSS
VSS
AF6
AF7
AF30
VSS
AG10
MSID[1]V1MSID[0]
VSS
W1
VSS
AG13
AC4
AG16
R42
62/6
VSSY7VSSY5VSSY2VSSW7VSSW4VSSV7VSSV6VSS
RSVD
VSS
VSS
VSS
VSS
AG17
AG20
AG23
AG24
VSS
AG7
VSS
VSS
AH1
0
1
H17
H18
H19
H20
H21
H22
H23
H24
H25
H26
H27
AN1
VSS
AN10
VSS
VSS
AN13
VSSH3VSSH6VSSH7VSSH8VSSH9VSSJ4VSSJ7VSS
VSS
AN16
VSS
AN17
H28
AN2
VSS
VSS
VSS
VSS
AN20
VSS
VSS
AN23
VSS
VSS
AN24
VSS
VSS
AN27
VSS
VSS
AN28
VSS
VSS
VSS
VSSB1VSS
B11
VSS
VSS
VSS
H14
VSS
H13
VSS
H12
VSS
H11
VSS
H10
VSS
G1
VSS
F7
VSS
F4
VSS
F22
VSS
F19
VSS
F16
VSS
F13
VSS
F10
VSS
E8
VSS
E29
VSS
E28
VSS
E27
VSS
E26
VSS
E25
VSS
E20
VSS
E2
VSS
E17
VSS
E14
VSS
E11
VSS
D9
VSS
D6
VSS
D5
VSS
D3
VSS
D24
VSS
D21
VSS
D18
VSS
D15
VSS
D12
VSS
C7
VSS
C4
VSS
C24
VSS
C22
VSS
C19
VSS
C16
VSS
C13
VSS
C10
VSS
B8
VSS
B5
VSS
B24
VSS
B20
VSS
B17
VSS
VSS
LGA775
B14
R28
R27
R26
R25
R24
R23
P30
P29
P28
P27
P26
P25
P24
P23
VSS
VSS
VSS
VSS
VSS
VSS
VSSR2VSSP7VSSP4VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSSN7VSSN6VSSN3VSSM7VSSM1VSSL7VSSL6VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
AJ4
AJ7
AK10
AK13
AK16
AK17
AK2
AK20
AK23
AK24
AK27
AK28
AK29
AK30
AK5
AK7
AL10
AL13
AL16
VSS
AL17
VSS
AL20
VSS
AL23
VSS
AL24
VSS
AL27
VSS
L30
AL28
VSS
VSSL3VSS
VSS
AL3
L29
L28
L27
VSS
VSS
VSS
VSS
VSS
AL7
AM1
AM10
L26
VSS
VSS
AM13
L25
VSS
VSS
AM16
L24
VSS
VSS
AM17
L23
VSS
VSS
AM20
VSSK7VSS
VSS
AM23
K5
VSS
AM24
K2
VSS
AM27
VSS
AM28
VSS
AM4
A A
MSI
Title
Size Document Number Rev
8
7
6
5
4
3
Date: Sheet
MICRO-STAR INt'L CO., LTD.
Intel LGA775 CPU - GND
MS-7176
2
735Monday, May 23, 2005
1
0A
of

8
H_A#[3..31]5
D D
H_ADSTB#05
H_ADSTB#15
H_REQ#[0..4]5
H_LOCK#5
H_RS#[0..2]5
H_BR#05,6
H_BPRI#5
H_BNR#5
H_ADS#5
H_HIT#5
H_HITM#5
H_DEFER#5
H_TRDY#5
H_DBSY#5
H_DRDY#5
CK_H_MCH15
CK_H_MCH#15
PWRGD_3V13,30
H_CPURST#5,6
ICH_SYNC#
MCH_GTLREF_CPU
HXRCOMP
HXSCOMP
HXSWING
C C
B B
PLTRST#12,16,29
ICH_SYNC#13
R161 16.9/6/1
7
N17
P17
P18
P20
P21
AA22
AB21
AB22
AB23
AC22
AD14
VCC
RSVRD
AA42
VCC
RSVRD
AA34
AA38
VCC
VCC
RSVRD
RSVRD
L15
VCC
RSVRD
U27
M15
AF6
VCC
RSVRD
R27
AA37
AA41
AJ12
K38
K35
M34
N35
R33
N32
N34
M38
N42
N37
N38
R32
R36
U37
R35
R38
V33
U34
U32
V42
U35
Y36
Y38
V32
Y34
M36
V35
D42
U39
U40
W42
E41
D41
K36
G37
E42
U41
W41
P40
W40
U42
V41
Y40
Y43
M31
M29
C30
M18
A28
C27
B27
D27
D28
J39
J42
J37
F38
T40
T43
AJ9
U8A
HA3#
HA4#
HA5#
HA6#
HA7#
HA8#
HA9#
HA10#
HA11#
HA12#
HA13#
HA14#
HA15#
HA16#
HA17#
HA18#
HA19#
HA20#
HA21#
HA22#
HA23#
HA24#
HA25#
HA26#
HA27#
HA28#
HA29#
HA30#
HA31#
HAD_STB0#
HAD_STB1#
HPCREQ#
HBREQ0#
HBPRI#
HBNR#
HLOCK#
HADS#
HREQ0#
HREQ1#
HREQ2#
HREQ3#
HREQ4#
HHIT#
HHITM#
HDEFER#
HTRDY#
HDBSY#
HDRDY#
HEDRDY#
RS0#
RS1#
RS2#
HCLKP
HCLKN
PWROK
HCPURST#
RSTIN#
ICH_SYNC#
HRCOMP
HSCOMP
HSWING
HDVREF
HACCVREF
VCC
VCC
VCC
VCC
VCC
RSVRD
AA35
H_A#3 H_D#0
H_A#4
H_A#5
H_A#6
H_A#7
H_A#8
H_A#9
H_A#10
H_A#11
H_A#12
H_A#13
H_A#14
H_A#15
H_A#16
H_A#17
H_A#18
H_A#19
H_A#20
H_A#21
H_A#22
H_A#23
H_A#24
H_A#25
H_A#26
H_A#27
H_A#28
H_A#29
H_A#30
H_A#31
H_REQ#0
H_REQ#1
H_REQ#2
H_REQ#3
H_REQ#4
TP18
H_RS#0
H_RS#1
H_RS#2
AF7
VCC
VCC
RSVRD
RSVRD
A43
AF8
VCC
RSVRD
M11
AF9
AF10
VCC
RSVRD
AG25
AG26
AF11
VCC
VCC
RSVRD
RSVRD
AG27
6
AF12
AF13
VCC
RSVRD
AJ24
AJ27
AF14
VCC
VCC
RSVRD
RSVRD
AK40
AF30
VCC
RSVRD
AL39
AG2
VCC
RSVRD
AW17
AG3
AW18
V_1P5_CORE
AG4
AG5
AG6
VCC
VCC
VCC
RSVRD
RSVRD
RSVRD
AY14
BC16
AD30
AG7
VCC
VCC
RSVRD
RSVRD
AC34
AG8
AG9
VCC
RSVRD
Y30
Y33
AG10
VCC
VCC
RSVRD
RSVRD
AF31
AG11
VCC
RSVRD
AD31
AG12
VCC
RSVRD
U30
AG13
AG14
VCC
RSVRD
V31
AA30
AH1
VCC
VCC
RSVRD
RSVRD
AC30
AH2
AH4
VCC
RSVRD
AJ23
AK21
AJ5
VCC
VCC
RSVRD
RSVRD
AJ26
AJ13
AJ14
VCC
RSVRD
AL29
AL20
5
AK2
VCC
VCC
RSVRD
RSVRD
AJ21
AK3
VCC
RSVRD
AL26
AK4
VCC
RSVRD
AK27
AK14
AK15
VCC
RSVRD
AJ29
AG29
AK20
VCC
VCC
RSVRD
RSVRD
V30
R15
VCC
R17
R18
VCC
VCC
NC
BC43NCBC42
R20
R21
VCC
NC
BC2NCBC1
VCC
R23
VCC
NC
BB43
R24
U15
VCC
VCC
NC
BB2NCBB1NCBA2
4
U17
U18
U19
U20
U21
U22
U23
U24
U25
U26
V15
V17
V18
V19
V20
V21
V22
V23
V25
V27
W17
W18
W19
W20
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
NC
NC
NC
NC
NC
NCC2NC
NCB3NCB2NC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
E35
B43NCB42NCB41
A42
Y17
Y18
Y19
Y21
Y23
Y25
C42
AW2
AV27NCAV26
AW26
Y27
AA15
AA17
W22
VCC
VCC
AA18
W24
VCC
VCC
AA19
W26
VCC
VCC
AA20
W27
Y15
M17
VCC
VCC
VCC
KDINV_0#
HDINV_1#
HDINV_2#
HDINV_3#
HD_STBP0#
HD_STBN0#
HD_STBP1#
HD_STBN1#
HD_STBP2#
HD_STBN2#
HD_STBP3#
HD_STBN3#
3
HD0#
HD1#
HD2#
HD3#
HD4#
HD5#
HD6#
HD7#
HD8#
HD9#
HD10#
HD11#
HD12#
HD13#
HD14#
HD15#
HD16#
HD17#
HD18#
HD19#
HD20#
HD21#
HD22#
HD23#
HD24#
HD25#
HD26#
HD27#
HD28#
HD29#
HD30#
HD31#
HD32#
HD33#
HD34#
HD35#
HD36#
HD37#
HD38#
HD39#
HD40#
HD41#
HD42#
HD43#
HD44#
HD45#
HD46#
HD47#
HD48#
HD49#
HD50#
HD51#
HD52#
HD53#
HD54#
HD55#
HD56#
HD57#
HD58#
HD59#
HD60#
HD61#
HD62#
HD63#
Lakeport
V_1P5_CORE
P41
M39
P42
M42
N41
M40
L40
M41
K42
G39
J41
G42
G40
G41
F40
F43
F37
E37
J35
D39
C41
B39
B40
H34
C37
J32
B35
J34
B34
F32
L32
J31
H31
M33
K31
M27
K29
F31
H29
F29
L27
M24
J26
K26
G26
H24
K24
F24
E31
A33
E40
D37
C39
D38
D33
C35
D34
C34
B31
C31
C32
D32
B30
D30
K40
A38
E29
B32
K41
L43
F35
G34
J27
M26
E34
B37
H_D#1
H_D#2
H_D#3
H_D#4
H_D#5
H_D#6
H_D#7
H_D#8
H_D#9
H_D#10
H_D#11
H_D#12
H_D#13
H_D#14
H_D#15
H_D#16
H_D#17
H_D#18
H_D#19
H_D#20
H_D#21
H_D#22
H_D#23
H_D#24
H_D#25
H_D#26
H_D#27
H_D#28
H_D#29
H_D#30
H_D#31
H_D#32
H_D#33
H_D#34
H_D#35
H_D#36
H_D#37
H_D#38
H_D#39
H_D#40
H_D#41
H_D#42
H_D#43
H_D#44
H_D#45
H_D#46
H_D#47
H_D#48
H_D#49
H_D#50
H_D#51
H_D#52
H_D#53
H_D#54
H_D#55
H_D#56
H_D#57
H_D#58
H_D#59
H_D#60
H_D#61
H_D#62
H_D#63
H_DBI#0
H_DBI#1
H_DBI#2
H_DBI#3
H_DSTBP#0 5
H_DSTBN#0 5
H_DSTBP#1 5
H_DSTBN#1 5
H_DSTBP#2 5
H_DSTBN#2 5
H_DSTBP#3 5
H_DSTBN#3 5
2
H_D#[0..63] 5
U8_X1
H_DBI#[0..3] 5
X5
X6
X7
X8
MCH
Heatsink
MCH_HS
1
X1
X2
X3
X4
V_FSB_VTT
R165
60.4/6
A A
HXSCOMP
C136
X_2.2P/50V/6
V_FSB_VTT
HD_SWING VOLTAGE "10 MIL TRACE , 7 MIL
SPACE" HD_SWING S/B 1/3*VTT +/- 2%
PLACE DIVIDER RESISTOR NEAR VTT
R162
301/6/1
R164
84.5/6/1
R163 62/6
C135
0.01u/50V/6
HXSWING
V_FSB_VTT
R160
124/6/1
R157
210/6/1
CAPS SHOULD BE PLACED NEAR MCH PIN
8
7
6
5
GTLREF VOLTAGE SHOULD BE 0.63*VTT=0.756V
124 OHM OVER 210 RESISTORS
C130
0.1u/25V/6
R156 10/6
C131
X_220p/50V/6
4
MCH_GTLREF_CPU
MCH_GTLREF_CPU 5
3
MSI
Title
Size Document Number Rev
Date: Sheet
MICRO-STAR INt'L CO., LTD.
Intel Lakeport - CPU Signals
MS-7176
2
835Monday, May 23, 2005
of
1
0A

8
7
6
5
4
3
2
1
SCKE_A[0..3]19,21
DQM_A[0..7]19
DATA_A[0..63]19
DQM_A6
DQM_A1
DQM_A4
DQM_A2
DQM_A7
DQM_A3
DATA_A16
DATA_A21
DATA_A6
DATA_A4
AN1
SADQ3
SADQ4
SBDQ1
SBDQ2
AP8
DATA_B2
DATA_A5
AP4
SADQ5
SBDQ3
AP9
DATA_B3
AU5
SADQ6
SBDQ4
AJ11
DATA_B4
DATA_A7
AU2
SADQ7
SBDQ5
AL9
DATA_B5
DATA_A8
AW3
SADQ8
SBDQ6
AM10
DATA_B6
DATA_A9
AY3
SADQ9
SBDQ7
AP6
DATA_B7
DATA_A10
DATA_A11
BA7
BB7
SADQ10
SBDQ8
AV6
AU7
DATA_B8
DATA_B9
DATA_A12
DATA_A13
AV1
AW4
SADQ11
SADQ12
SBDQ9
SBDQ10
AV12
AM11
DATA_B11
DATA_B10
DATA_A14
DATA_A15
BC6
AY7
SADQ13
SADQ14
SBDQ11
SBDQ12
AR5
AR7
DATA_B12
DATA_B13
DATA_A17
AW12
AY10
SADQ15
SADQ16
SBDQ13
SBDQ14
AR12
AR10
DATA_B14
DATA_B15
DATA_A0
DATA_A1
DATA_A3
D D
C C
B B
does it need to connect to GND through a 40 ohm resister?
SCS_A#[0..3]19,21
RAS_A#19,21
CAS_A#19,21
WE_A#19,21
MAA_A[0..13]19,21
ODT_A[0..3]19,21
SBS_A[0..2]19,21
DQS_A019
DQS_A#019
DQS_A119
DQS_A#119
DQS_A219
DQS_A#219
DQS_A319
DQS_A#319
DQS_A419
DQS_A#419
DQS_A519
DQS_A#519
DQS_A619
DQS_A#619
DQS_A719
DQS_A#719
P_DDR0_A19
N_DDR0_A19
P_DDR1_A19
N_DDR1_A19
P_DDR2_A19
N_DDR2_A19
P_DDR3_A19
N_DDR3_A19
P_DDR4_A19
N_DDR4_A19
P_DDR5_A19
N_DDR5_A19
SCS_A#0
SCS_A#1
SCS_A#2
SCS_A#3
RAS_A#
CAS_A#
WE_A#
MAA_A0
MAA_A1
MAA_A2
MAA_A3
MAA_A4
MAA_A5
MAA_A6
MAA_A7
MAA_A8
MAA_A9
MAA_A10
MAA_A11
MAA_A12
ODT_A0
ODT_A1
ODT_A2
ODT_A3
SBS_A0
SBS_A1
SBS_A2
DQS_A0
DQS_A#0
DQS_A1
DQS_A#1
DQS_A2
DQS_A#2
DQS_A3
DQS_A#3
DQS_A4
DQS_A#4
DQS_A5
DQS_A#5
DQS_A6
DQS_A#6
DQS_A7
DQS_A#7
P_DDR0_A
N_DDR0_A
P_DDR1_A
N_DDR1_A
P_DDR2_A
N_DDR2_A
P_DDR3_A
N_DDR3_A
P_DDR4_A
N_DDR4_A
P_DDR5_A
N_DDR5_A
SMPCOMP_N
SMPCOMP_P MCH_VREF_AMCH_VREF_B
BB37
BA39
BA35
AY38
BA34
BA37
BB35
BA32
AW32
BB30
BA30
AY30
BA27
BC28
AY27
AY28
BB27
AY33
AW27
BB26
BC38
AW37
AY39
AY37
BB40
BC33
AY34
BA26
AU4
AR2
BA3
BB4
AY11
BA10
AU18
AR18
AU35
AV35
AP42
AP40
AG42
AG41
AC42
AC41
BB32
AY32
AY5
BB5
AK42
AK41
BA31
BB31
AY6
BA5
AH40
AH43
AM3
AL5
AJ6
AJ8
U8B
SACS0#
SACS1#
SACS2#
SACS3#
SARAS#
SACAS#
SAWE#
SAMA0
SAMA1
SAMA2
SAMA3
SAMA4
SAMA5
SAMA6
SAMA7
SAMA8
SAMA9
SAMA10
SAMA11
SAMA12
SAMA13
SAODT0
SAODT1
SAODT2
SAODT3
SABA0
SABA1
SABA2
SADQS0
SADQS0#
SADQS1
SADQS1#
SADQS2
SADQS2#
SADQS3
SADQS3#
SADQS4
SADQS4#
SADQS5
SADQS5#
SADQS6
SADQS6#
SADQS7
SADQS7#
SACLK0
SACLK0#
SACLK1
SACLK1#
SACLK2
SACLK2#
SACLK3
SACLK3#
SACLK4
SACLK4#
SACLK5
SACLK5#
MCH_SRCOMP0
MCH_SRCOMP1
SMOCDCOMP0
SMOCDCOMP1
AP3
SADQ0
DATA_A2
AP2
SADQ1
AU3
SADQ2
AV4
SBDQ0
R202 80.6/6/1
SMPCOMP_P
Lakeport
AL6
AL8
DATA_B0
DATA_B1
DATA_A18
DATA_A19
BA12
BB12
SADQ17
SADQ18
SBDQ15
SBDQ16
AM15
AM13
DATA_B17
DATA_B16
DATA_A20
BA9
BB9
SADQ19
SADQ20
SBDQ17
SBDQ18
AV15
AM17
DATA_B18
DATA_B19
DATA_A22
DATA_A23
BC11
AY12
SADQ21
SADQ22
SBDQ19
SBDQ20
AN12
AR13
DATA_B21
DATA_B20
DATA_A24
DATA_A25
AM20
AM18
SADQ23
SADQ24
SBDQ21
SBDQ22
AT15
AP15
DATA_B23
DATA_B22
DATA_A26
DATA_A27
AV20
AM21
SADQ25
SADQ26
SBDQ23
SBDQ24
AM24
AM23
DATA_B24
DATA_B25
DATA_A29
DATA_A28
AP17
AR17
SADQ27
SADQ28
SBDQ25
SBDQ26
AV24
AM26
DATA_B27
DATA_B26
DATA_A30
AP20
SADQ29
SBDQ27
AP21
DATA_B28
DATA_B[0..63]20
DATA_A32
DATA_A31
AT20
AP32
SADQ30
SADQ31
SBDQ28
SBDQ29
AP24
AR21
DATA_B30
DATA_B29
DATA_A34
DATA_A33
AV34
AV38
SADQ32
SADQ33
SBDQ30
SBDQ31
AT24
AU27
DATA_B32
DATA_B31
DATA_A35
DATA_A36
AU39
AV32
SADQ34
SADQ35
SBDQ32
SBDQ33
AN29
AR31
DATA_B34
DATA_B33
DATA_A37
DATA_A38
AT32
AR34
SADQ36
SADQ37
SBDQ34
SBDQ35
AP27
AM31
DATA_B35
DATA_B36
DATA_A40
DATA_A39
AU37
AR41
SADQ38
SADQ39
SBDQ36
SBDQ37
AP31
AR27
DATA_B37
DATA_B38
DATA_A41
DATA_A42
AR42
AN43
SADQ40
SADQ41
SBDQ38
SBDQ39
AP35
AU31
DATA_B40
DATA_B39
DATA_A43
DATA_A44
AM40
AU41
SADQ42
SADQ43
SBDQ40
SBDQ41
AP37
AN32
DATA_B42
DATA_B41
DATA_A45
DATA_A46
AU42
AP41
SADQ44
SADQ45
SBDQ42
SBDQ43
AL35
AR35
DATA_B43
DATA_B44
DATA_A48
DATA_A47
AN40
AL41
SADQ46
SADQ47
SBDQ44
SBDQ45
AU38
AM38
DATA_B46
DATA_B45
DATA_A49
DATA_A50
AL42
AF39
SADQ48
SADQ49
SBDQ46
SBDQ47
AL34
AM34
DATA_B47
DATA_B48
DATA_A52
DATA_A51
AE40
AM41
SADQ50
SADQ51
SBDQ48
SBDQ49
AJ34
AF32
DATA_B49
DATA_B50
DATA_A53
DATA_A54
AM42
AF41
SADQ52
SADQ53
SBDQ50
SBDQ51
AL31
AF34
DATA_B52
DATA_B51
DATA_A56
DATA_A55
AF42
AD40
SADQ54
SADQ55
SBDQ52
SBDQ53
AJ32
AG35
DATA_B54
DATA_B53
DATA_A57
DATA_A58
AD43
AA39
SADQ56
SADQ57
SBDQ54
SBDQ55
AD32
AC32
DATA_B55
DATA_B56
DATA_A60
DATA_A59
AA40
AE42
SADQ58
SADQ59
SBDQ56
SBDQ57
Y32
AD34
DATA_B57
DATA_B58
DATA_A61
DATA_A62
AE41
AB41
SADQ60
SADQ61
SBDQ58
SBDQ59
AF35
AA32
DATA_B60
DATA_B59
DATA_A63
AB42
SADQ62
SADQ63
SBDQ60
SBDQ61
AF37
AC33
DATA_B61
DATA_B62
SCKE_A1
SCKE_A0
BB25
AY25
SACKE0
SBDQ62
SBDQ63
AC35
DATA_B63
SCKE_A3
SCKE_A2
BC24
BA25
SACKE1
SACKE2
SBCKE0
BA14
AY16
SCKE_B0
SCKE_B1
SACKE3
SBCKE1
BA13
SCKE_B2
SCKE_B[0..3]20,21
VCC_DDR
A A
R203 80.6/6/1
C187
0.1u/25V/6
8
SMPCOMP_N
7
6
5
DQM_B[0..7]20
4
DQM_A0
AR3
SBCKE2
SBCKE3
BB13
SCKE_B3
AY2
SADM1
SADM0
SBDM7
AD39
DQM_B7
DQM_B6
BB10
SADM2
SBDM6
AJ39
DQM_B5
AP18
SADM3
SBDM5
AR38
DQM_B4
DQM_A5
AT34
SADM4
SBDM4
AR29
DQM_B3
AG40
AP39
SADM5
SBDM3
AP13
AP23
DQM_B2
AC40
SADM7
SADM6
SBDM1
SBDM2
AW7
DQM_B1
DQM_B0
SBCS0#
SBCS1#
SBCS2#
SBCS3#
SBRAS#
SBCAS#
SBWE#
SBMA0
SBMA1
SBMA2
SBMA3
SBMA4
SBMA5
SBMA6
SBMA7
SBMA8
SBMA9
SBMA10
SBMA11
SBMA12
SBMA13
SBODT0
SBODT1
SBODT2
SBODT3
SBBA0
SBBA1
SBBA2
SBDQS0
SBDQS0#
SBDQS1
SBDQS1#
SBDQS2
SBDQS2#
SBDQS3
SBDQS3#
SBDQS4
SBDQS4#
SBDQS5
SBDQS5#
SBDQS6
SBDQS6#
SBDQS7
SBDQS7#
SBCLK0
SBCLK0#
SBCLK1
SBCLK1#
SBCLK2
SBCLK2#
SBCLK3
SBCLK3#
SBCLK4
SBCLK4#
SBCLK5
SBCLK5#
SMVREF1
SMVREF0
SBDM0
AL11
BA40
AW41
BA41
AW40
BA23
AY24
BB23
BB22
BB21
BA21
AY21
BC20
AY19
AY20
BA18
BA19
BB18
BA22
BB17
BA17
AW42
AY42
AV40
AV43
AU40
AW23
AY23
AY17
AM8
AM6
AV7
AR9
AV13
AT13
AU23
AR23
AT29
AV29
AP36
AM35
AG34
AG32
AD36
AD38
AM29
AM27
AV9
AW9
AL38
AL36
AP26
AR26
AU10
AT10
AJ38
AJ36
AM2
AM4
SCS_B#0
SCS_B#1
SCS_B#2
SCS_B#3
RAS_B#
CAS_B#
WE_B#
MAA_B0
MAA_B1
MAA_B2
MAA_B3
MAA_B4
MAA_B5
MAA_B6
MAA_B7
MAA_B8
MAA_B9
MAA_B10
MAA_B11
MAA_B12
MAA_B13MAA_A13
ODT_B0
ODT_B1
ODT_B2
ODT_B3
SBS_B0
SBS_B1
SBS_B2
DQS_B0
DQS_B#0
DQS_B1
DQS_B#1
DQS_B2
DQS_B#2
DQS_B3
DQS_B#3
DQS_B4
DQS_B#4
DQS_B5
DQS_B#5
DQS_B6
DQS_B#6
DQS_B7
DQS_B#7
P_DDR0_B
N_DDR0_B
P_DDR1_B
N_DDR1_B
P_DDR2_B
N_DDR2_B
P_DDR3_B
N_DDR3_B
P_DDR4_B
N_DDR4_B
P_DDR5_B
N_DDR5_B
MCH_VREF_A
3
SCS_B#[0..3] 20,21
RAS_B# 20,21
CAS_B# 20,21
WE_B# 20,21
MAA_B[0..13] 20,21
ODT_B[0..3] 20,21
SBS_B[0..3] 20,21
DQS_B0 20
DQS_B#0 20
DQS_B1 20
DQS_B#1 20
DQS_B2 20
DQS_B#2 20
DQS_B3 20
DQS_B#3 20
DQS_B4 20
DQS_B#4 20
DQS_B5 20
DQS_B#5 20
DQS_B6 20
DQS_B#6 20
DQS_B7 20
DQS_B#7 20
P_DDR0_B 20
N_DDR0_B 20
P_DDR1_B 20
N_DDR1_B 20
P_DDR2_B 20
N_DDR2_B 20
P_DDR3_B 20
N_DDR3_B 20
P_DDR4_B 20
N_DDR4_B 20
P_DDR5_B 20
N_DDR5_B 20
C180
0.1u/25V/6
VCC_DDR
PLACE CLOSE TO MCH
PLACE 0.1UF CAP CLOSE TO MCH
C179
0.1u/25V/6
CP8
X_COPPER
R211 1K/6/1
R210 X_0/6
MCH_VREF_A
MCH_VREF_B
R209
1K/6/1
MSI
Title
Size Document Number Rev
Date: Sheet
MICRO-STAR INt'L CO., LTD.
Intel Lakeport - Memory Signals
MS-7176
2
935Monday, May 23, 2005
of
1
0A

8
EXP_A_RXP_022
EXP_A_RXN_022
EXP_A_RXP_122
EXP_A_RXN_122
DMI_ITP_MRP_012
DMI_ITN_MRN_012
DMI_ITP_MRP_112
DMI_ITN_MRN_112
DMI_ITP_MRP_212
DMI_ITN_MRN_212
DMI_ITP_MRP_312
DMI_ITN_MRN_312
CK_PE_100M_MCH15
CK_PE_100M_MCH#15
MS8_BSEL029
MS8_BSEL129
H_FSBSEL05,6,15,29
H_FSBSEL15,6,15,29
H_FSBSEL25,6,15
CP19
X_COPPER
L9
X_FB180/6/1.5A
EXP_A_RXP_222
EXP_A_RXN_222
EXP_A_RXP_322
EXP_A_RXN_322
EXP_A_RXP_422
EXP_A_RXN_422
EXP_A_RXP_522
EXP_A_RXN_522
EXP_A_RXP_622
EXP_A_RXN_622
EXP_A_RXP_722
EXP_A_RXN_722
EXP_A_RXP_822
EXP_A_RXN_822
EXP_A_RXP_922
EXP_A_RXN_922
EXP_A_RXP_1022
EXP_A_RXN_1022
EXP_A_RXP_1122
EXP_A_RXN_1122
EXP_A_RXP_1222
EXP_A_RXN_1222
EXP_A_RXP_1322
EXP_A_RXN_1322
EXP_A_RXP_1422
EXP_A_RXN_1422
EXP_A_RXP_1522
EXP_A_RXN_1522
EXP_EN_HDR22
SDVO_CTRL_DATA
SDVO_CTRL_CLK
D D
C C
SDVO_CTRL_DATA22
SDVO_CTRL_CLK22
B B
V_2P5_MCH
I = 70mA
220u/10V
CP20
X_COPPER
V_1P5_CORE
A A
V_1P5_CORE V_1P5_CORE
L7
CP22
X_COPPER
L8
X_10uH/8/125mA/Rdc=0.7
8
EXP_A_RXP_0
EXP_A_RXN_0
EXP_A_RXP_1
EXP_A_RXN_1
EXP_A_RXP_2
EXP_A_RXN_2
EXP_A_RXP_3
EXP_A_RXN_3
EXP_A_RXP_4
EXP_A_RXN_4
EXP_A_RXP_5
EXP_A_RXN_5
EXP_A_RXP_6
EXP_A_RXN_6
EXP_A_RXN_7
EXP_A_RXN_8
EXP_A_RXP_9
EXP_A_RXN_9
EXP_A_RXP_10
EXP_A_RXN_10
EXP_A_RXP_11
EXP_A_RXN_11
EXP_A_RXP_12
EXP_A_RXN_12
EXP_A_RXP_13
EXP_A_RXN_13
EXP_A_RXP_14
EXP_A_RXN_14
EXP_A_RXP_15
EXP_A_RXN_15
EXP_EN_HDR
DMI_ITP_MRP_0
DMI_ITN_MRN_0
DMI_ITP_MRP_1
DMI_ITN_MRN_1
DMI_ITP_MRP_2
DMI_ITN_MRN_2
DMI_ITP_MRP_3
DMI_ITN_MRN_3
CK_PE_100M_MCH
CK_PE_100M_MCH#
for 945G only
R690 220/6
R691 220/6
R560 0/6
R561 0/6
R170 X_10K/6
R171 X_10K/6
R167 10K/6
R168 X_1K/6/1
VCCA_HPLLVCCA_HPLL
VCCA_MPLL
VCCA_DPLLA
VCCA_DPLLB
VCCA_GPLL
V_2P5_MCH
V_2P5_DAC_FILTERED
+
C151
0.1u/25V/6
C157
X_FB600/6
+
NOA_6
C152
VCCA_DPLLB
C147
220u/10V
G12
F12
D11
D12
J13
H13
E10
F10
J9
H10
F7
F9
C4
D3
G6
J6
K9
K8
F4
G4
M6
M7
K2
L1
U11
U10
R8
R7
P4
N3
Y10
Y11
F20
Y7
Y8
AA9
AA10
AA6
AA7
AC9
AC8
B14
B16
F15
E15
SEL0
F21
SEL1
H21
SEL2
L20
AK17
AL17
K21
AK23
AK18
L21
L18
N21
C21
B20
C19
B19
B17
D19
C18
B18
A18
V_FSB_VTT
I = 60mA
VCCA_MPLL
C143
1u/10V/6
I = 55mA
7
U8C
EXPARXP0
EXPARXN0
EXPARXP1
EXPARXN1
EXPARXP2
EXPARXN2
EXPARXP3
EXPARXN3
EXPARXP4
EXPARXN4
EXPARXP5
EXPARXN5
EXPARXP6
EXPARXN6
EXPARXP7
EXPARXN7
EXPARXP8
EXPARXN8
EXPARXP9
EXPARXN9
EXPARXP10
EXPARXN10
EXPARXP11
EXPARXN11
EXPARXP12
EXPARXN12
EXPARXP13
EXPARXN13
EXPARXP14
EXPARXN14
EXPARXP15
EXPARXN15
EXP_EN
DMI RXP0
DMI RXN0
DMI RXP1
DMI RXN1
DMI RXP2
DMI RXN2
DMI RXP3
DMI RXN3
GCLKP
GCLKN
SDVOCTRLDATA
SDVOCTRLCLK
BSEL0
BSEL1
BSEL2
RSV_TP[0]
RSV_TP[1]
EXP_SLR
RSV_TP[2]
RSV_TP[3]
RSV_TP[4]
RSV_TP[5]
RSV_TP[6]
VCCAHPLL
VCCAMPLL
VCCADPLLA
VCCADPLLB
VCCA_EXPPLL
VCC2
VCCADAC
VCCADAC
VSSA_DAC
Lakeport
C148
0.1u/25V/6
7
6
V_1P5_CORE
AA26
AB17
AB18
AB19
AB20
AB24
AB25
AB26
AB27
AC15
AC17
AC18
AC20
AD17
AD19
AC24
AC26
AC27
VCC
VCC
VCC
VTT
VTT
VTT
E23
E24
E26
D25
CP21
X_COPPER
CP23
X_COPPER
X_FB600/6
VCC
VTT
AD15
VCC
VCC
VCC
VCC
VTT
VTT
VTT
VTT
F23
F27
E27
H23
G23
6
AA24
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VTT
VTT
VTT
VTT
B25
B26
C23
C25
C26
VCC
VTT
VTT
VTT
D24
D23
L5
X_10uH/8/125mA/Rdc=0.7
L6
VCC
VTT
VTT
VTT
B23
A24
B24
V_1P5_CORE V_1P5_CORE
VCC
VTT
AD21
VCC
VTT
J23
+
AD23
VCC
VTT
K23
C140
220u/10V
C141
0.1u/25V/6
AD25
AD26
AE17
AE18
VCC
VCC
VCC
VCC
VTT
VTT
VTT
VTT
L23
P23
N23
M23
V_1P5_CORE
VCCA_DPLLA
VCCA_HPLL
AE20
AE22
AE24
AE26
AE27
VCC
VCC
VCC
VCC
VCC
VCC
VCC
AF21
AF23
I = 55mA
C145
0.1u/25V/6
I = 45mA
AF15
VCC
VCC
AF25
AF17
AF26
VCC
VCC
AF19
AF27
VCC
VCC
VCC
AF29
VCC_DDR
AV18
AY43
VCCSM
VCCSM
VCC
VCC
AG15
AG17
5
AV23
AV21
AV31
AV42
VCCSM
VCCSM
VCCSM
VCC
VCC
VCC
AG18
AG19
AG20
AG21
V_1P5_CORE
5
AW13
VCCSM
VCCSM
VCC
VCC
AG22
AW20
AW15
VCCSM
VCC
AG23
AG24
AW21
VCCSM
VCC
AJ15
AW24
AW29
AW34
AW31
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCC
VCC
VCC
VCC
AJ17
AJ18
AJ20
L10 1uH/8/0.5A
CP24
X_COPPER
L11 X_0/1206
CP25
X_COPPER
AY41
AW35
VCCSM
BB16
BB20
VCCSM
VCCSM
AE4
BB24
BB28
VCCSM
VCCSM
VCCSM
VCC_EXP
VCC_EXP
VCC_EXP
AE3
AE2
BB33
BB38
BB42
VCCSM
VCCSM
VCC_EXP
VCC_EXP
AD8
AD12
AD10
+
C192
X_220u/10V
BC13
BC18
BC22
VCCSM
VCCSM
VCCSM
VCC_EXP
VCC_EXP
VCC_EXP
AD6
AD5
AD4
R179 1/6/1
R183 1/6/1
4
BC26
VCCSM
VCCSM
VCC_EXP
VCC_EXP
AD2
4
BC31
BC35
BC40
N11
N10
N9
N7
N5
VCCSM
VCCSM
VCCSM
VCC_EXP
VCC_EXP
VCC_EXP
VCC_EXP
VCC_EXP
VCC_EXP
VCC_EXP
VCC_EXP
VCC_EXP
VCC_EXP
VCC_EXP
VCC_EXP
VCC_EXP
VCC_EXPV9VCC_EXP
Y13
V13
AA5
AD1
AC6
AC5
AA13
AC13
V_1P5_PCIEXPRESS
C178
C185 10u/10V/8
R11
R10
R5
N12
VCC_EXP
VCC_EXP
VCC_EXP
VCC_EXPV7VCC_EXPV6VCC_EXP
V5
V10
VCCA_GPLL
C155
10u/10V/8
I = 1.5A
10u/10V/8
U8
U7
U6
R13
VCC_EXP
VCC_EXP
VCC_EXP
VCC_EXP
VCC_EXP
EXP_COMPO
DREFCLKINP
DREFCLKINN
V_1P5_PCIEXPRESS
I = 45mA
V_1P5_PCIEXPRESS
U13
VCC_EXP
EXPATXP0
EXPATXN0
EXPATXP1
EXPATXN1
EXPATXP2
EXPATXN2
EXPATXP3
EXPATXN3
EXPATXP4
EXPATXN4
EXPATXP5
EXPATXN5
EXPATXP6
EXPATXN6
EXPATXP7
EXPATXN7
EXPATXP8
EXPATXN8
EXPATXP9
EXPATXN9
EXPATXP10
EXPATXN10
EXPATXP11
EXPATXN11
EXPATXP12
EXPATXN12
EXPATXP13
EXPATXN13
EXPATXP14
EXPATXN14
EXPATXP15
EXPATXN15
DMI TXP0
DMI TXN0
DMI TXP1
DMI TXN1
DMI TXP2
DMI TXN2
DMI TXP3
DMI TXN3
EXP_COMPI
HSYNC
VSYNC
RED
GREEN
BLUE
RED#
GREENB
BLUE#
DDC_DATA
DDC_CLK
IREF
EXTTS#
XORTEST
ALLZTEST
C154
1u/10V/6
C173
0.1u/25V/6
3
3
D14
C13
A13
B12
A11
B10
C10
C9
A9
B7
D7
D6
A6
B5
E2
F1
G2
J1
J3
K4
L4
M4
M2
N1
P2
T1
T4
U4
U2
V1
V3
W4
W2
Y1
AA2
AB1
Y4
AA4
AB3
AC4
AC12
AC11
D17
C17
F17
K17
H18
G17
J17
J18
N18
N20
J15
H15
A20
J20
H20
K18
EXP_A_TXP_0
EXP_A_TXN_0
EXP_A_TXP_1
EXP_A_TXN_1
EXP_A_TXP_2
EXP_A_TXN_2
EXP_A_TXP_3
EXP_A_TXN_3
EXP_A_TXP_4
EXP_A_TXN_4
EXP_A_TXP_5
EXP_A_TXN_5EXP_A_RXP_7
EXP_A_TXP_6
EXP_A_TXN_6EXP_A_RXP_8
EXP_A_TXP_7
EXP_A_TXN_7
EXP_A_TXP_8
EXP_A_TXN_8
EXP_A_TXP_9
EXP_A_TXN_9
EXP_A_TXP_10
EXP_A_TXN_10
EXP_A_TXP_11
EXP_A_TXN_11
EXP_A_TXP_12
EXP_A_TXN_12
EXP_A_TXP_13
EXP_A_TXN_13
EXP_A_TXP_14
EXP_A_TXN_14
EXP_A_TXP_15
EXP_A_TXN_15
DMI_MTP_IRP_0
DMI_MTN_IRN_0
DMI_MTP_IRP_1
DMI_MTN_IRN_1
DMI_MTP_IRP_2
DMI_MTN_IRN_2
DMI_MTP_IRP_3
DMI_MTN_IRN_3
GRCOMP
HSYNC
VSYNC
VGA_RED
VGA_GREEN
VGA_BLUE
C545 5p/50V/4
MCH_DDC_DATA
MCH_DDC_CLK
CK_96M_DREF
CK_96M_DREF#
DACREFSET
EXTTS
TP13
C520
X_10p/16V/6
EXP_A_TXP_0 22
EXP_A_TXN_0 22
EXP_A_TXP_1 22
EXP_A_TXN_1 22
EXP_A_TXP_2 22
EXP_A_TXN_2 22
EXP_A_TXP_3 22
EXP_A_TXN_3 22
EXP_A_TXP_4 22
EXP_A_TXN_4 22
EXP_A_TXP_5 22
EXP_A_TXN_5 22
EXP_A_TXP_6 22
EXP_A_TXN_6 22
EXP_A_TXP_7 22
EXP_A_TXN_7 22
EXP_A_TXP_8 22
EXP_A_TXN_8 22
EXP_A_TXP_9 22
EXP_A_TXN_9 22
EXP_A_TXP_10 22
EXP_A_TXN_10 22
EXP_A_TXP_11 22
EXP_A_TXN_11 22
EXP_A_TXP_12 22
EXP_A_TXN_12 22
EXP_A_TXP_13 22
EXP_A_TXN_13 22
EXP_A_TXP_14 22
EXP_A_TXN_14 22
EXP_A_TXP_15 22
EXP_A_TXN_15 22
DMI_MTP_IRP_0 12
DMI_MTN_IRN_0 12
DMI_MTP_IRP_1 12
DMI_MTN_IRN_1 12
DMI_MTP_IRP_2 12
DMI_MTN_IRN_2 12
DMI_MTP_IRP_3 12
DMI_MTN_IRN_3 12
R198
24.9/6/1
HSYNC 26
VSYNC 26
R15 0/6
MCH_DDC_DATA 26
MCH_DDC_CLK 26
CK_96M_DREF 15
CK_96M_DREF# 15
R172 255/6/1
R175 10K/6
HSYNC
VSYNC
CK_96M_DREF#
CK_PE_100M_MCH#
2
V_1P5_CORE
C184
C189
VCC_DDR
C120 10u/10V/8
C122 10u/10V/8
C128 0.1u/25V/6
VCC_DDR
C124 10u/10V/8
C138 0.1u/25V/6
C144 10u/10V/8
1
10u/10V/8
10u/10V/8
MCH MEMORY DECOUPLING
V_FSB_VTT
C311
C127
V_1P5_PCIEXPRESS
0.1u/25V/6
0.1u/25V/6
C137
0.1u/25V/6
FSB GENERIC DECOUPLING
VGA_BLUE 26
for 945G only
V_2P5_MCH
for 945P only
R4 10K/60.01u/50V/6
R5 10K/6
R6 0/6
R7 X_0/6
C544 5p/50V/4
for 945G only
R14 0/6
V_2P5_MCH
for 945P only
VGA_RED
VGA_GREEN
VGA_BLUE
DACREFSET
CK_96M_DREF
CK_PE_100M_MCH
C146
X_10p/16V/6
R24 0/6
R25 X_0/6
VGA_RED 26
VGA_GREEN 26
C546
5p/50V/4
V_2P5_MCH
R9 0/6
R10 0/6
R11 0/6
R23 0/6
for 945P only
V_1P5_CORE
for 945P only
MICRO-STAR INt'L CO., LTD.
MSI
Title
Intel Lakeport PCI-Express & RBG Signals
Size Document Number Rev
Date: Sheet
2
MS-7176
10 35Monday, May 23, 2005
of
1
0A

5
AN42
AN31
AN27
AN26
AN24
AN23
AN21
AN20
AN18
AN17
AN15
AN13
AN4
AN2
AM39
AM37
AM36
AM33
AM9
AM7
AM5
AL43
AL37
D D
C C
B B
U8D
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
A16
VSS
A22
VSS
A26
VSS
A31
VSS
A35
VSS
B4
VSS
B6
VSS
B9
VSS
B11
VSS
B13
VSS
B21
VSS
B22
VSS
B28
VSS
B33
VSS
B38
VSS
C3
VSS
C5
VSS
C7
VSS
C12
VSS
C14
VSS
C22
VSS
C40
VSS
D2
VSS
D5
VSS
D10
VSS
D16
VSS
D20
VSS
D21
VSS
E3
VSS
E4
VSS
E7
VSS
E9
VSS
E12
VSS
E13
VSS
E17
VSS
E18
VSS
E20
VSS
E21
VSS
E32
VSS
F2
VSS
F6
VSS
F13
VSS
F18
VSS
F26
VSS
F34
VSS
F42
VSS
G3
VSS
G5
VSS
G7
VSS
G9
VSS
G10
VSS
G13
VSS
G15
VSS
G18
VSS
G20
VSS
G21
VSS
G24
VSS
G27
VSS
G29
VSS
G31
VSS
G32
VSS
G35
VSS
G38
VSS
H12
VSS
H17
VSS
H26
VSS
H27
VSS
H32
VSS
J2
VSS
J5
VSS
J7
VSS
J10
VSS
VSS
VSS
VSS
VSS
VSS
J12
J21
J24
J43
J38
J29
VSS
VSS
VSS
VSS
VSS
VSSK7VSSK6VSSK5VSSK3VSS
VSS
K20
K15
K13
K12
K10
K27
VSS
VSS
VSSL2VSS
VSS
VSS
VSS
L13
L12
K39
K37
K34
K32
4
AU32
AU29
AU26
AU24
AU21
AU20
AU17
AU15
AU13
AU12
AU9
AU6
AT31
AT27
AT26
AT23
AT21
AT18
AT17
AT12
AR43
AR39
AR37
AR32
AR24
AR20
AR15
AR6
AR1
AP38
AP34
AP29
AP12
AP10
AP7
AP5
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
L31
L29
L26
L24
L42
VSS
VSS
VSS
VSS
VSS
VSS
VSSM9VSSM8VSSM5VSSM3VSS
M21
M20
M13
M10
VSS
VSS
VSSN8VSSN6VSS
N2
N15
N13
M37
M35
VSS
VSS
VSS
VSS
VSS
VSS
VSS
N24
VSS
N36
N33
N31
N29
N27
N26
N43
N39
VSS
VSS
VSS
VSS
VSS
VSS
VSSP3VSS
P29
P27
P26
P24
P15
P14
AU34
VSS
P30
3
AA25
Y29
Y26
Y24
Y22
Y20
W25
W23
W21
V29
V26
V24
U29
R29
R26
D43
A40
BC9
BB41
BB39
BB34
BB19
BB14
BB11
BB6
BB3
BA42
BA4
AW10
AV37
AV17
AV10
AV2
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSSD1VSS
VSSA4VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSSR9VSSR6VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSST2VSS
VSSU3VSSU5VSSU9VSS
VSS
VSS
VSS
VSS
VSS
VSSV2VSSV8VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSSW3VSSY2VSSY5VSSY6VSSY9VSS
R12
R14
T42
R30
R31
R34
R37
R39
U12
U14
V11
V12
V14
V34
V36
V37
V38
V39
U31
U33
U36
U38
V43
VSS
AA27
VSS
AA29
Y12
VSS
AC19
VSS
VSS
Y14
AC25
VSS
VSS
Y31
AC29
Y35
VSS
VSS
AD18
VSS
VSS
Y37
2
AD20
VSS
VSS
Y39
AD22
VSS
VSS
Y42
AD24
VSS
VSS
AA3
AD27
VSS
VSS
AA8
AD29
VSS
VSS
AF18
AE19
VSS
VSS
AE21
AF20
VSS
VSS
AE23
AF22
AE25
VSS
VSS
AF24
L17
VSS
VSS
1
AY1
BC4
VSS
VSS
AL33
VSS
AL32
VSS
AL27
VSS
AL24
VSS
AL23
VSS
AL21
VSS
AL18
VSS
AL15
VSS
AL13
VSS
AL12
VSS
AL10
VSS
AL7
VSS
AL3
VSS
AL2
VSS
AL1
VSS
AK30
VSS
AK29
VSS
AK26
VSS
AK24
VSS
AJ37
VSS
AJ35
VSS
AJ33
VSS
AJ31
VSS
AJ30
VSS
AJ10
VSS
AJ7
VSS
AH42
VSS
AG39
VSS
AG38
VSS
AG37
VSS
AG36
VSS
AG33
VSS
AG31
VSS
AG30
VSS
AF43
VSS
AF38
VSS
AF36
VSS
AF33
VSS
AF5
VSS
AF3
VSS
AF2
VSS
AF1
VSS
AD42
VSS
AD37
VSS
AD35
VSS
AD33
VSS
AD13
VSS
AD11
VSS
AD9
VSS
AD7
VSS
AC39
VSS
AC38
VSS
AC37
VSS
AC36
VSS
AC31
VSS
AC23
VSS
AC21
VSS
AC14
VSS
AC10
VSS
AC7
VSS
AC3
VSS
AC2
VSS
AB43
VSS
AB2
VSS
AA36
VSS
AA33
VSS
AA31
VSS
AA23
VSS
AA21
VSS
AA14
VSS
AA12
VSS
AA11
VSS
Lakeport
A A
MSI
Title
Size Document Number Rev
5
4
3
2
Date: Sheet
MICRO-STAR INt'L CO., LTD.
Intel Lakeport - GND
MS-7176
1
11 35Monday, May 23, 2005
of
0A