MSI MS-7176 Schematics
1
1Cover Sheet
Block Diagram/Clock Map/Power Map 2-4
Intel LGA775 CPU
Intel Lakeport - MCH
Intel ICH7 - PCI & DMI & CPU & IRQ
Intel ICH7 - LPC & ATA & USB & GPIO 13
Intel ICH7 - POWER
Clock - ICS954559
LPC I/O - W83627THF
Azalia - ALC882
LAN Tekoa/EKronR
DDR II System Memory 1 & 2
DDR II System Memory 3 & 4
DDR II VTT Decoupling
PCI EXPRESS X16 Slot
A A
PCI Slot 1 & 2 & 3 & PCI Express x1 Slot
ATA33/66/100 IDE & SATA Connectors
VGA Connector
USB Connectors
ATX Connetcor & Front Panel
MS8 & FWH
ACPI CONTROLLER MS7
VRM 10.1 - RT8804
VT6410 IDE RAID
VT6307 1394-2 PORTS
GMCH POWER
HISTORY 39
5-7
8-11
12
14
15
16
17
18
19
20
21
22
23-24
25
26
27
28
29
30
31
32
33
34
35AutoBOM parts
36GPIO & Jumper Setting
37-38PWROK/RESET MAP
MS-7176
CPU:
Intel Prescott ( L2=2MB ) - 3.4G & Above
Intel Cendar Mill (65nm) - 3.73G & Above
Intel Smithfield (90nm Dual core)
System Chipset:
Intel Lakeport - GMCH (North Bridge)
Intel ICH7R (South Bridge)
On Board Chipset:
BIOS -- FWH EEPROM
Aliza Codec -- ALC882
LPC Super I/O -- W83627THF
LAN-- Intel Tekoa(82573E)/EKronR(82562GZ)
CLOCK -- ICS954559
1394 Controller -- VT6307 2pots
IDE RAID Controller -- VT6410
Main Memory:
DDR II * 4 (Max 4GB)
Expansion Slots:
PCI2.3 SLOT * 3
PCI EXPRESS X1 SLOT * 2
PCI EXPRESS X16 SLOT
RickTek PWM:
Controller: RT8804 5 Phases
opt A: 945P+ICH7R+VIA1394+VIA6410+giga LAN(Cfg-STD)
opt B: 945P+ICH7+ GIGA LAN (cfg-945P-ICH7-GL)
opt C: 945G+ICH7R+VIA1394+VIA6410+giga LAN(Cfg-945G-ICH7R-GL)
opt D: 945G+ICH7+ GIGA LAN (cfg-945G-ICH7-GL)
1
Version 100
MSI
Title
Size Document Number Rev
Date: Sheet of
MICRO-STAR INt'L CO., LTD.
COVER SHEET
MS-7176
1 38Tuesday, April 26, 2005
0A
Block Diagram
1
VRM 10.1
RT8804
5-Phase PWM
PCI EXPRESS
X16
Connector
Analog
Video
PCI EXPRESS X16
RGB
Intel LGA775 Processor
FSB 533/800/1066
200/266
MHz
FSB
Lakeport
GMCH
DDR2 533/667
DDRII
266/333
MHz
4 DDR II
DIMM
Modules
VT6410
IDE RAID
IDE2
IDE3
Out
J1394_1
DMI
UltraDMA
33/66/100
IDE Primary
A A
SATA 0~3
SATA
ICH7
USB
USB Port 0~7
ALC882
AC'97
PCI
PCI EXPRESS X1
LPC Bus
PCI Slot 1
PCI Slot 2
PCI Slot 3
PCI EXPRESS X1
VT6307
1394
PCI EXPRESS X1
J1394_2
Azalia Codec
PCI EXPRESS X1
GIGA LAN
Intel Tekoa
SPI
SPI
LPC SIO
Winbond
83627THF
EEPROM
MS8
FWH
Keyboard
Mouse
1
Floopy Parallel Serial
MSI
Title
Size Document Number Rev
Date: Sheet of
MICRO-STAR INt'L CO., LTD.
BLOCK DIAGRAM
MS-7176
2 38Tuesday, April 26, 2005
0A
5
4
3
2
1
HCLK
LGA775
CLOCK MAP
D D
ICS 954519
1/2
Clock
Generator
C C
B B
MCHCLK
DOTCLK
96MHz
ICHCLK
SATACLK
USB48MHz
ICH14.318MHz
SIO48MHz
FWH_PCLK
33MHz
1394_PCLK
33MHz
RAID_PCLK
33MHz
Lakeport
MCH
ICH7
Winbon
LPC IO
FWH
VT6307
1394
VT6410
IDE RAID
ICS 954519
2/2
Clock
Generator
PCI_E1_100MHz
PCI_E2_100MHz
PCI_E_LAN
100MHz
PCI_E1
PCI-Express X 16
PCI_E2
PCI-Express X 1
PCI_E3PCI_E3_100MHz
PCI-Express X 1
INTEL Tekoa
PCI-Express LAN
MS8_PCLK
33MHz
MS8
PCI1
A A
5
PCICLK[0..3]
33MHz
PCI2
MSI
PCI3
4
3
2
Title
Size Document Number Rev
Date: Sheet of
MICRO-STAR INt'L CO., LTD.
CLOCK MAP
MS-7176
3 38Tuesday, April 26, 2005
1
0A
5
POWER MAP
4
3
2
1
D D
C C
B B
ATX POWER
+12V +5V +3.3V +5VSB
MSI
ACPI
Controller
5VDIMM VCC_DDR
MS - 7
MSI
MS6 +
17.01+0.9+4.96 = 22.87A
V_1P5_CORE
4.96A
VR
MSI
MS6 +
W83310DS
0.9A
VR
V_FSB_VTT
125A 5.3A
4+9.4+0.6 = 14A14*1.8/5/0.8 = 6.3A
0.6A
VTT_DDR
17.01A
1.31A
V_1P05_CORE
1.875A
6.5A
5A
12.6A
6.2A
PCI_E1
LGA775VRM 10.1
Lakeport
4A
MCH
13.8A + 1.5A
= 15.3A
9.4A
DDR2 X 4
1.2A
1.71A
1.31A
ICH7
0.7A
PCI_E2
PCI_E3
0.9A
14mA
PCI1
PCI2
PCI3
VLAN25
INTEL
VCC3_SB
3.775A
VLAN12
Tekoa
MSI
A A
5VDUAL
5
4.1A
4
3
MS8
4.1A
USB+PS2
MSI
Title
Size Document Number Rev
Date: Sheet of
2
MICRO-STAR INt'L CO., LTD.
POWER MAP
MS-7176
1
4 38Tuesday, April 26, 2005
0A
8
D D
H_DBI#[0..3]8
H_IERR#6
H_STPCLK#12
H_DBSY#8
H_DRDY#8
H_TRDY#8
C C
VTT_OUT_LEFT
H_CPUSLP#12
VTT_OUT_RIGHT
B B
X_0.1u/25V/6
C515
A A
R110 X_62/6
R17 0/6
R634 X_1K/6
H_D#[0..63]8
8
H_LOCK#8
H_BNR#8
H_HITM#8
H_DEFER#8
THERMDA16
THERMDC16
TRMTRIP#6,12
SKTOCC#29
H_PROCHOT#6
H_IGNNE#12
ICH_H_SMI#12
H_FSBSEL06,10,15,29
H_FSBSEL16,10,15,29
H_FSBSEL26,10,15
H_PWRGD6,12
H_CPURST#6,8
H_DBI#0
H_DBI#1
H_DBI#2
H_DBI#3
TP15
H_FERR#6,12
H_INIT#12
H_ADS#8
H_HIT#8
H_BPRI#8
H_TDI
H_TDO
H_TMS
H_TRST#
H_TCK
H_A20M#12
H_TESTHI13
TP16
TP17
H_D#63
H_D#62
H_D#61
H_D#60
H_D#59
H_D#58
H_D#57
H_D#56
H_D#55
H_D#54
A8
G11
D19
C20
F2
AB2
AB3
R3
M3
AD3
P3
H4
B2
C1
E3
D2
C3
C2
D4
E4
G8
G7
AD1
AF1
AC1
AG1
AE1
AL1
AK1
M2
AE8
AL2
N2
P2
K3
L2
AH2
N5
AE6
C9
G10
D16
A20
Y1
V2
AA2
G29
H30
G30
N1
G23
B22
A22
A19
B19
B21
C21
B18
A17
B16
C18
7
U5A
DBI0#
DBI1#
DBI2#
DBI3#
EDRDY#
IERR#
MCERR#
FERR#/PBE#
STPCLK#
BINIT#
INIT#
RSP#
DBSY#
DRDY#
TRDY#
ADS#
LOCK#
BNR#
HIT#
HITM#
BPRI#
DEFER#
TDI
TDO
TMS
TRST#
TCK
THERMDA
THERMDC
THERMTRIP#
GND/SKTOCC#
PROCHOT#
IGNNE#
SMI#
A20M#
TESTI_13
RSVD
RESERVED0
RESERVED1
RESERVED2
RESERVED3
RESERVED4
RESERVED5
BOOTSELECT
LL_ID0
LL_ID1
BSEL0
BSEL1
BSEL2
PWRGOOD
RESET#
D63#
D62#
D61#
D60#
D59#
D58#
D57#
D56#
D55#
D54#
7
H_A#[3..31]8
B15
H_D#53
D53#
D52#
C14
H_D#52
D51#
C15
A14
H_D#51
H_D#50
CPU SIGNAL BLOCK
H_A#31
H_A#30
H_A#29
AJ6
AJ5
AH5
AH4
AG5
AG4
AG6
A35#
A34#
A33#
A32#
A31#
A30#
D50#
D49#
D48#
D47#
D46#
D45#
D44#
D43#
D17
D20
G22
D22
E22
G21
F21
E21
H_D#46
H_D#44
H_D#47
H_D#48
H_D#43
H_D#45
H_D#42
H_D#49
H_A#28
AF4
A29#
A28#
D42#
D41#
F20
H_D#41
6
H_A#26
H_A#27
AF5
AB4
A27#
D40#
E19
E18
H_D#39
H_D#40
H_A#19
H_A#23
H_A#17
H_A#22
H_A#18
H_A#20
H_A#21
H_A#24
H_A#25
AC5
AB5
AA5
AD6
AA4Y4Y6W6AB6W5V4V5U4U5T4U6T5R4M4L4M5P6L5
A26#
A25#
A24#
A23#
A22#
A21#
A20#
A19#
A18#
A17#
D39#
D38#
D37#
D36#
D35#
D34#
D33#
D32#
D31#
G17
G18
H_D#35
H_D#36
6
E16
H_D#34
E15
G16
H_D#32
H_D#33
G15
F15
H_D#30
H_D#31
D30#
F18
F17
H_D#38
H_D#37
H_A#16
A16#
D29#
G14
H_D#29
H_A#14
H_A#15
A15#
D28#
F14
G13
H_D#27
H_D#28
H_A#13
A14#
A13#
D27#
D26#
E13
H_D#26
H_A#11
H_A#12
A12#
D25#
D13
F12
H_D#24
H_D#25
A11#
D24#
H_A#7
H_A#8
H_A#10
H_A#9
A9#
A8#
A7#
A10#
D23#
D22#
D21#
D20#
F11
D10
E10D7E9F9F8G9D11
H_D#21
H_D#20
H_D#23
H_D#22
H_A#6
H_D#19
H_A#5
A6#
A5#
D19#
D18#
H_D#18
H_A#4
A4#
D17#
H_D#17
H_A#3
A3#
D16#
H_D#15
H_D#16
D15#
5
AC2
DBR#
D14#
C12
B12D8C11
H_D#14
H_D#13
5
AN3
AN4
AN5
VSS_SENSE
VCC_SENSE
D13#
D12#
D11#
B10
H_D#11
H_D#10
H_D#12
R80 0/6
R81 0/6
TP1
VID5
AN6
AJ3
AK3
AM5
AL4
AM7
VID6#
VID5#
RSVD
ITP_CLK1
ITP_CLK0
VSS_MB_REGULATION
VCC_MB_REGULATION
D10#
D9#
D8#
D7#
D6#
D5#
D4#
D3#
A11
H_D#9
D2#
A10A7B7B6A5C6A4C5B4
H_D#2
H_D#7
H_D#8
H_D#4
H_D#5
H_D#3
H_D#6
VCC_VRM_SENSE
VID1
VID4
VID3
VID2
AK4
AL6
AM3
AL5
VID4#
VID3#
VID2#
VID1#
VID_SELECT
GTLREF0
GTLREF1
GTLREF_SEL
CS_GTLREF
BPM5#
BPM4#
BPM3#
BPM2#
BPM1#
BPM0#
PCREQ#
REQ4#
REQ3#
REQ2#
REQ1#
REQ0#
TESTHI12
TESTHI11
TESTHI10
TESTHI9
TESTHI8
TESTHI7
TESTHI6
TESTHI5
TESTHI4
TESTHI3
TESTHI2
TESTHI1
TESTHI0
FORCEPH
RSVD
BCLK1#
BCLK0#
RS2#
RS1#
RS0#
AP1#
AP0#
BR0#
COMP5
COMP4
COMP3
COMP2
COMP1
COMP0
DP3#
DP2#
DP1#
DP0#
ADSTB1#
ADSTB0#
DSTBP3#
DSTBP2#
DSTBP1#
DSTBP0#
DSTBN3#
DSTBN2#
DSTBN1#
DSTBN0#
LINT1/NMI
LINT0/INTR
D1#
D0#
LGA775
H_D#0
H_D#1
VSS_VRM_SENSE
VID[0..5] 29
VID0
AM2
VID0#
AN7
H1
H2
H29
E24
AG3
AF2
AG2
AD2
AJ1
AJ2
G5
J6
K6
M6
J5
K4
H_TESTHI12
W2
H_TESTHI11
P1
H_TESTHI10
H5
H_TESTHI9
G4
H_TESTHI8
G3
F24
G24
G26
G27
G25
F25
W3
F26
AK6
G6
G28
F28
A3
F5
B3
U3
U2
F3
T2
J2
R1
G2
T1
A13
J17
H16
H15
J16
AD5
R6
C17
G19
E12
B9
A16
G20
G12
C8
L1
K1
4
VCCP
R83
X_0/6
R84
X_0/6
R43 62/6
CPU_GTLREF
TP_GTLREF_SEL
MCH_GTLREF_CPU
H_BPM#5
H_BPM#4
H_BPM#3
H_BPM#2
H_BPM#1
H_BPM#0
H_REQ#4
H_REQ#3
H_REQ#2
H_REQ#1
H_REQ#0
H_TESTHI2_7
H_TESTHI1
H_TESTHI0
RSVD_AK6
RSVD_G6
H_RS#2
H_RS#1
H_RS#0
TP3
TP2
H_COMP5
H_COMP4
H_COMP3
R101 X_60.4/6
H_COMP2
R112 X_60.4/6
H_COMP1
R96 60.4/6
H_COMP0
R150 60.4/6
TP4
TP8
TP7
TP5
RT2
10K/8/1/thermistor
Be closed to CPU socket
4
H_REQ#[0..4] 8
RN11 62/6/8P4R
1 2
3 4
5 6
7 8
R99 62/6
R151 62/6
R90 62/6
R145 62/6
R53 X_62/6
R102 X_62/6
CK_H_CPU# 15
CK_H_CPU 15
H_RS#[0..2] 8
R94 100/6
R95 100/6
H_ADSTB#1 8
H_ADSTB#0 8
H_DSTBP#3 8
H_DSTBP#2 8
H_DSTBP#1 8
H_DSTBP#0 8
H_DSTBN#3 8
H_DSTBN#2 8
H_DSTBN#1 8
H_DSTBN#0 8
H_NMI 12
H_INTR 12
VCC_VRM_SENSE 31
VSS_VRM_SENSE 31
CPU_GTLREF 6
MCH_GTLREF_CPU 8
VTT_OUT_LEFT
V_FSB_VTT
CPU_TMPA 16
VTIN_GND 16
3
2
Reserved for new dual-core CPU used(TBD)
VCC3+12V
R46
TP_GTLREF_SEL
R45
X_10K/6
DS
G
X_249/6/1
Q5
X_YFET-NDS7002AS
BSEL
0
0 0 133 MHZ (533)
VTT_OUT_RIGHT 6
VTT_OUT_LEFT 6
C43
X_0.1u/25V/6
H_BR#0 6,8
VTT_OUT_RIGHT
C32
1u/10V/6
VID4
VID3
VID1
VID2
VID0
VID5
PLACE BPM/TCK/TDI/TMS TERMINATION NEAR CPU
PLACE TDO TERMINATION NEAR CONNECTOR
MSI
Title
Size Document Number Rev
3
Date: Sheet of
2
VCC3
R48
X_110/6/1
H_TESTHIO
R49
X_60.4/6
TABLE
02
1
FSB FREQUENCY
267 MHZ (1067)000
01 200 MHZ (800)
1
Prescott / Cedar Mill
LL_ID[1:0] = 00
GTLREF_SEL = 0
VTT_SEL = 1
RN8
680/6/8P4R
1
3
5
7
R75 680/6
R72 680/6
RN7 62/6/8P4R
1 2
3 4
5 6
7 8
1 2
3 4
5 6
7 8
RN10 62/6/8P4R
R73 62/6
R77 62/6
R88 62/6
2
4
6
8
VTT_OUT_RIGHT
H_BPM#3
H_BPM#5
H_BPM#0
H_BPM#1
H_TMS
H_BPM#2
H_TDI
H_BPM#4
H_TDO
H_TRST#
H_TCK
MICRO-STAR INt'L CO., LTD.
Intel LGA775 CPU - Signals
MS-7176
1
C1
X_0.1u/25V/6
5 38Tuesday, April 26, 2005
1
0A
8
VCCP
AG21
AG19
AG18
AG15
AG14
AG12
AG11
AF9
AF8
AF22
AF21
AF19
AF18
AF15
AF14
AF12
AF11
AE23
AE22
AE21
AE19
AE18
AE15
AE14
AE12
AE11
AD30
AD29
AD28
AD27
AD26
AD25
AD24
AD23
AC30
AC29
AC28
AC27
AC26
AC25
AC24
AC23
U5B
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
AE9
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
AD8
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
AC8
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
AB8
VCC
AA8
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCCP
VCC
Y28
Y29
Y30
Y8
W30W8Y23
Y24
Y25
Y26
Y27
VCCP
D D
C C
AG22
VCC
VCC
W29
AG25
VCC
VCC
W28
AG26
VCC
VCC
W27
AG27
VCC
VCC
W26
AG28
W25
VCC
VCC
AG29
VCC
VCC
W24
7
AG30
VCC
VCC
W23
6
AH27
AH26
AH25
AH22
AH21
AH19
AH18
AH15
AH14
AH12
AH11
AG9
AG8
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
U26
U27
U28
U29
U30U8V8
VCC
VCC
AH28
AH29
AH30
AH8
AH9
AJ11
AJ12
AJ14
AJ15
AJ18
AJ19
AJ21
AJ22
AJ25
AJ26
AJ8
AJ9
AK11
AK12
AK14
AK15
AK18
AK19
AK21
AK22
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
U24
U25
T24
T25
T26
T27
T28
T29
T30T8U23
N24
N25
N26
N27
N28
N29
N30N8P8R8T23
M24
M25
M26
M27
M28
M29
M30M8N23
VCC
VCC
AK25
M23
VCC
VCC
AK26
VCC
VCC
5
AK8
AK9
AL11
AL12
AL14
AL15
AL18
AL19
AL21
AL22
AL25
AL26
AL29
AL30
AL8
AL9
AM11
AM12
AM14
AM15
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
J29
J30J8J9
K23
K24
K25
K26
K27
K28
K29
K30K8L8
J22
J23
J24
J25
J26
J27
J28
VCC
VCC
AM18
VCC
VCC
J21
AM19
VCC
VCC
J20
AM21
J19
VCC
VCC
AM22
VCC
VCC
J18
AM25
VCC
VCC
J15
AM26
VCC
VCC
J14
4
AM29
VCC
VCC
J13
AM30
VCC
VCC
J12
AM8
J11
VCC
VCC
AM9
VCC
VCC
J10
AN11
AN9
AN12
VCC
VCC
AN8
AN14
AN15
AN18
VCC
VCC
VCC
VTT_OUT_RIGHT
VCC
VCC
VCC
AN26
AN29
AN30
AN19
AN21
AN22
VCC
VCC
VCC
VCC
VCCA
VSSA
VCCPLL
VCC-IOPLL
VTTPWRGD
VTT_OUT_LEFT
VTT_SEL
RSVD
VCC
VCC
HS1
HS2
AN25
123
3
H_VCCA
A23
H_VSSA
B23
D23
H_VCCA
C23
A25
VTT
A26
VTT
A27
VTT
A28
VTT
A29
VTT
A30
VTT
B25
VTT
B26
VTT
B27
VTT
B28
VTT
B29
VTT
B30
VTT
C25
VTT
C26
VTT
C27
VTT
C28
VTT
C29
VTT
C30
VTT
D25
VTT
D26
VTT
D27
VTT
D28
VTT
D29
VTT
D30
VTT
VTT_PWG
AM6
VTT_OUT_RIGHT
AA1
VTT_OUT_LEFT
J1
F27
F29
HS3
HS4
LGA775
4
R564
X_1K/6
V_FSB_VTT
R635X_1K/6
01TEJ/PSC
RSVD
VCC3
2
V_FSB_VTT
C90 10u/10V/8
C139 10u/10V/8
C105 10u/10V/8
1
CAPS FOR FSB GENERIC
PLACE COMPONENTS AS CLOSE AS POSSIBLE TO PROCESSOR SOCKET
VTT_OUT_RIGHT
GTLREF VOLTAGE SHOULD BE
0.63*VTT = 0.756V
B B
VTT_OUT_RIGHT5
A A
VCC3 VCC5
X_1u/10V/6
VTT_OUT_LEFT5
C304
0.1u/25V/6
C40
8
R109 124/6/1
VTT_OUT_RIGHT
R111 10/6
R108
210/6/1
C47
1u/10V/6
C50
X_220p/50V/6
PLACE AT CPU END OF ROUTE
R66 130/6
R153 62/6
VTT_OUT_LEFT
VTT_OUT_RIGHT H_IERR#
R93 62/6
R651 X_100/6
R86 62/6
H_PROCHOT#
H_CPURST#
H_BR#0
H_PWRGD
PLACE AT ICH END OF ROUTE
V_FSB_VTT
R283 62/6
R286 62/6
TRMTRIP#
H_FERR#
7
CPU_GTLREF 5
H_PROCHOT# 5
H_CPURST# 5,8
H_BR#0 5,8
H_PWRGD 5,12
H_IERR# 5VTT_OUT_RIGHT5
TRMTRIP# 5,12
H_FERR# 5,12
V_FSB_VTT
VTT_OUT_LEFT
VCC5_SB
VID_GD#15,30,31
FSBSEL RESISTOR CAN BE REMOVED IF ONLY TEJAS
AND CEDAR MILL ARE SUPPORTED
6
5
R76
1K/6
R87 10K/6
V_FSB_VTT
R79 680/6
RN30
1
3
5
7
470/6/8P4R
TRACE WIDTH TO CAPS MUST BE SMALLER THAN 12MILS
L4 10uH/8/125mA/Rdc=0.7
L20 10uH/8/125mA/Rdc=0.7
CP18 X_COPPER
VTT_PWG
Q14
2N3904S
H_FSBSEL1
2
H_FSBSEL0
4
H_FSBSEL2
6
8
4
C516
X_1u/10V/6
H_FSBSEL1 5,10,15,29
H_FSBSEL0 5,10,15,29
H_FSBSEL2 5,10,15
C96
10u/10V/8
VTT_PWG SPEC :
High > 0.9V
Low < 0.3V
Trise < 150ns
3
C97
10u/10V/12
H_VCCA
H_VSSA
Title
Size Document Number Rev
Date: Sheet of
MICRO-STAR INt'L CO., LTD.
MSI
Intel LGA775 CPU - Power
2
MS-7176
6 38Tuesday, April 26, 2005
1
0A
8
7
6
5
4
3
2
1
MSID1 MSID0
VSS
VSS
VSS
VSS
AH10
AH13
VSS
VSS
VSS
VSS
AH16
AH17
05 Per FMB
05 Value FMB
V28
V27
V26
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
AH20
AH23
AH24
AH3
AH6
V25
V24
V23U7U1T7T6T3R7R5R30
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
AH7
AJ10
AJ13
AJ16
AJ17
VTT_OUT_RIGHT
R57
D D
C C
B B
AA23
AA24
AA25
AA26
AA27
AA28
AA29
AA30
AB23
AB24
AB25
AB26
AB27
AB28
AB29
AB30
AE10
AE13
AE16
AE17
AE20
AE24
AE25
AE26
AE27
AE28
R50
R55
60.4/6
60.4/6
Y3
AE3
AE4D1D14
U5C
RSVD
RSVD
COMP6
A12
A15
A18
A2
A21
A24
A6
A9
AA3
AA6
AA7
AB1
AB7
AC3
AC6
AC7
AD4
AD7
AE2
COMP7
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
AE29
AE30
AE5
AE7
AF10
X_22/6
TP12
TP9
TP11
AF13
TP10
E23E5E6E7F23F6B13J3N4P5V1W1AC4Y7Y5Y2W7W4V7V6V30V3V29
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
IMPSEL#
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
AF23
AF24
AF25
AF26
AF27
AF28
VSS
AF29
AF16
AF17
AF20
AF3
R41
62/6
RSVD
VSS
AF30
RSVD
VSS
AF6
RSVD
VSS
AF7
VSS
AG10
MSID[1]
MSID[0]
VSS
VSS
AG13
AG16
R42
62/6
RSVD
VSS
AG17
VSS
AG20
VSS
AG23
VSS
VSS
AG24
VSS
VSS
VSS
VSS
AG7
AH1
VSS
VSS
AJ20
VSS
VSS
AJ23
VSS
VSS
AJ24
VSS
VSS
AJ27
VSS
VSS
AJ28
VSS
VSS
AJ29
0
0
R29
VSS
VSS
AJ30
VSS
VSS
0
1
H17
H18
H19
H20
H21
H22
H23
H24
H25
H26
H27
H28
VSS
VSS
L26
AM13
VSS
VSS
L25
VSS
VSS
AM16
L24
VSS
VSS
AM17
L23K7K5
VSS
VSS
AM20
AM23
VSS
VSS
VSS
VSS
AM24
K2
AM27
R28
R27
R26
R25
R24
R23R2P7P4P30
P29
P28
P27
P26
P25
P24
P23N7N6N3M7M1L7L6L30L3L29
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
AJ4
AJ7
AK10
AK13
AK16
AK17
AK2
AK20
AK23
AK24
AK27
AK28
AK29
AK30
VSS
AK5
AK7
AL10
AL13
AL16
AL17
AL20
VSS
VSS
AL23
VSS
VSS
AL24
VSS
VSS
AL27
VSS
VSS
AL28
VSS
VSS
L28
L27
VSS
VSS
VSS
VSS
VSS
VSS
AL3
AL7
AM1
AM10
VSS
VSS
VSS
VSS
AM28
AM4
VSS
VSS
VSS
H3H6H7H8H9J4J7
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
AN1
AN10
AN13
AN16
AN17
AN2
AN20
AN23
AN24
AN27
AN28B1B11
VSS
B14
VSS
LGA775
H14
VSS
H13
VSS
H12
VSS
H11
VSS
H10
VSS
G1
VSS
F7
VSS
F4
VSS
F22
VSS
F19
VSS
F16
VSS
F13
VSS
F10
VSS
E8
VSS
E29
VSS
E28
VSS
E27
VSS
E26
VSS
E25
VSS
E20
VSS
E2
VSS
E17
VSS
E14
VSS
E11
VSS
D9
VSS
D6
VSS
D5
VSS
D3
VSS
D24
VSS
D21
VSS
D18
VSS
D15
VSS
D12
VSS
C7
VSS
C4
VSS
C24
VSS
C22
VSS
C19
VSS
C16
VSS
C13
VSS
C10
VSS
B8
VSS
B5
VSS
B24
VSS
B20
VSS
B17
VSS
A A
MSI
Title
Size Document Number Rev
8
7
6
5
4
3
Date: Sheet of
MICRO-STAR INt'L CO., LTD.
Intel LGA775 CPU - GND
2
MS-7176
7 38Tuesday, April 26, 2005
1
0A
8
H_A#[3..31]5
D D
H_ADSTB#05
H_ADSTB#15
H_REQ#[0..4]5
H_LOCK#5
H_RS#[0..2]5
H_BR#05,6
H_BPRI#5
H_BNR#5
H_ADS#5
H_HIT#5
H_HITM#5
H_DEFER#5
H_TRDY#5
H_DBSY#5
H_DRDY#5
CK_H_MCH15
CK_H_MCH#15
PWRGD_3V13,30
H_CPURST#5,6
ICH_SYNC#
MCH_GTLREF_CPU
HXRCOMP
HXSCOMP
HXSWING
C C
B B
PLTRST#12,16,29
ICH_SYNC#13
R161 16.9/6/1
7
N17
P17
P18
P20
P21
AA22
AB21
AB22
AB23
AC22
VCC
VCC
RSVRD
AA35
AA42
VCC
VCC
RSVRD
RSVRD
AA34
VCC
RSVRD
AA38
VCC
RSVRD
L15
AD14
VCC
RSVRD
M15
U27
VCC
RSVRD
AA37
AA41
W42
W41
W40
AJ12
J39
K38
J42
K35
J37
M34
N35
R33
N32
N34
M38
N42
N37
N38
R32
R36
U37
R35
R38
V33
U34
U32
V42
U35
Y36
Y38
V32
Y34
M36
V35
F38
D42
U39
U40
E41
D41
K36
G37
E42
U41
P40
U42
V41
Y40
T40
Y43
T43
M31
M29
AJ9
C30
M18
A28
C27
B27
D27
D28
U8A
HA3#
HA4#
HA5#
HA6#
HA7#
HA8#
HA9#
HA10#
HA11#
HA12#
HA13#
HA14#
HA15#
HA16#
HA17#
HA18#
HA19#
HA20#
HA21#
HA22#
HA23#
HA24#
HA25#
HA26#
HA27#
HA28#
HA29#
HA30#
HA31#
HAD_STB0#
HAD_STB1#
HPCREQ#
HBREQ0#
HBPRI#
HBNR#
HLOCK#
HADS#
HREQ0#
HREQ1#
HREQ2#
HREQ3#
HREQ4#
HHIT#
HHITM#
HDEFER#
HTRDY#
HDBSY#
HDRDY#
HEDRDY#
RS0#
RS1#
RS2#
HCLKP
HCLKN
PWROK
HCPURST#
RSTIN#
ICH_SYNC#
HRCOMP
HSCOMP
HSWING
HDVREF
HACCVREF
VCC
VCC
VCC
H_A#3 H_D#0
H_A#4
H_A#5
H_A#6
H_A#7
H_A#8
H_A#9
H_A#10
H_A#11
H_A#12
H_A#13
H_A#14
H_A#15
H_A#16
H_A#17
H_A#18
H_A#19
H_A#20
H_A#21
H_A#22
H_A#23
H_A#24
H_A#25
H_A#26
H_A#27
H_A#28
H_A#29
H_A#30
H_A#31
H_REQ#0
H_REQ#1
H_REQ#2
H_REQ#3
H_REQ#4
TP18
H_RS#0
H_RS#1
H_RS#2
AF6
AF7
VCC
RSVRD
R27
A43
AF8
VCC
VCC
RSVRD
RSVRD
M11
AF9
AF10
VCC
RSVRD
AG25
AG26
AF11
VCC
VCC
RSVRD
RSVRD
AG27
6
AF12
VCC
RSVRD
AJ24
AF13
VCC
RSVRD
AJ27
AF14
AF30
VCC
RSVRD
AK40
AL39
AG2
AG3
VCC
VCC
RSVRD
RSVRD
AW17
AW18
V_1P5_CORE
AG4
AG5
VCC
VCC
VCC
RSVRD
RSVRD
RSVRD
AY14
BC16
AG6
VCC
RSVRD
AD30
AG7
AG8
VCC
RSVRD
AC34
Y30
AG9
VCC
VCC
RSVRD
RSVRD
Y33
AG10
VCC
RSVRD
AF31
AG11
VCC
RSVRD
AD31
AG12
VCC
RSVRD
U30
AG13
VCC
RSVRD
V31
AG14
VCC
RSVRD
AA30
AH1
VCC
RSVRD
AC30
AH2
VCC
RSVRD
AK21
AH4
AJ5
VCC
RSVRD
AJ23
AJ26
AJ13
VCC
VCC
RSVRD
RSVRD
AL29
5
AJ14
AK2
VCC
RSVRD
AL20
AJ21
AK3
VCC
VCC
RSVRD
RSVRD
AL26
AK4
AK14
AK15
AK20
R15
R17
R18
R20
R21
R23
R24
U15
U17
U18
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
RSVRD
RSVRD
RSVRD
RSVRD
NCNCNCNCNCNCNCNCNCNCNCNCNCNCNCNCNCNCNCNCNC
AK27
AJ29
AG29
V30
BC43
BC42
BC2
BC1
BB43
BB2
BB1
BA2
AW26
U19
AW2
VCC
U20
AV27
VCC
U21
AV26
VCC
U22
VCC
E35
U23
U24
VCC
VCC
C42C2B43
4
U25
U26
V15
V17
V18
V19
V20
V21
V22
V23
V25
V27
W17
W18
W19
W20
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
B42
B41B3B2
A42
Y17
Y18
VCC
Y19
Y21
Y23
Y25
Y27
AA15
AA17
W22
AA18
VCC
VCC
W24
AA19
VCC
VCC
W26
VCC
VCC
AA20
W27
Y15
VCC
VCC
HD_STBP0#
HD_STBN0#
HD_STBP1#
HD_STBN1#
HD_STBP2#
HD_STBN2#
HD_STBP3#
HD_STBN3#
3
M17
HD0#
HD1#
VCC
HD2#
HD3#
HD4#
HD5#
HD6#
HD7#
HD8#
HD9#
HD10#
HD11#
HD12#
HD13#
HD14#
HD15#
HD16#
HD17#
HD18#
HD19#
HD20#
HD21#
HD22#
HD23#
HD24#
HD25#
HD26#
HD27#
HD28#
HD29#
HD30#
HD31#
HD32#
HD33#
HD34#
HD35#
HD36#
HD37#
HD38#
HD39#
HD40#
HD41#
HD42#
HD43#
HD44#
HD45#
HD46#
HD47#
HD48#
HD49#
HD50#
HD51#
HD52#
HD53#
HD54#
HD55#
HD56#
HD57#
HD58#
HD59#
HD60#
HD61#
HD62#
HD63#
KDINV_0#
HDINV_1#
HDINV_2#
HDINV_3#
Lakeport
V_1P5_CORE
P41
H_D#1
M39
H_D#2
P42
H_D#3
M42
H_D#4
N41
H_D#5
M40
H_D#6
L40
H_D#7
M41
H_D#8
K42
H_D#9
G39
H_D#10
J41
H_D#11
G42
H_D#12
G40
H_D#13
G41
H_D#14
F40
H_D#15
F43
H_D#16
F37
H_D#17
E37
H_D#18
J35
H_D#19
D39
H_D#20
C41
H_D#21
B39
H_D#22
B40
H_D#23
H34
H_D#24
C37
H_D#25
J32
H_D#26
B35
H_D#27
J34
H_D#28
B34
H_D#29
F32
H_D#30
L32
H_D#31
J31
H_D#32
H31
H_D#33
M33
H_D#34
K31
H_D#35
M27
H_D#36
K29
H_D#37
F31
H_D#38
H29
H_D#39
F29
H_D#40
L27
H_D#41
M24
H_D#42
J26
H_D#43
K26
H_D#44
G26
H_D#45
H24
H_D#46
K24
H_D#47
F24
H_D#48
E31
H_D#49
A33
H_D#50
E40
H_D#51
D37
H_D#52
C39
H_D#53
D38
H_D#54
D33
H_D#55
C35
H_D#56
D34
H_D#57
C34
H_D#58
B31
H_D#59
C31
H_D#60
C32
H_D#61
D32
H_D#62
B30
H_D#63
D30
K40
A38
E29
B32
K41
L43
F35
G34
J27
M26
E34
B37
H_DBI#0
H_DBI#1
H_DBI#2
H_DBI#3
H_DSTBP#0 5
H_DSTBN#0 5
H_DSTBP#1 5
H_DSTBN#1 5
H_DSTBP#2 5
H_DSTBN#2 5
H_DSTBP#3 5
H_DSTBN#3 5
2
H_D#[0..63] 5
U8_X1
H_DBI#[0..3] 5
X5
X6
X7
X8
MCH
Heatsink
MCH_HS
1
X1
X2
X3
X4
V_FSB_VTT
A A
R165
60.4/6
HXSCOMP
C136
X_2.2P/50V/6
V_FSB_VTT
HD_SWING VOLTAGE "10 MIL TRACE , 7 MIL
SPACE" HD_SWING S/B 1/3*VTT +/- 2%
PLACE DIVIDER RESISTOR NEAR VTT
R162
301/6/1
R164
84.5/6/1 C135
0.01u/50V/6
R163 62/6
HXSWING
V_FSB_VTT
R160
124/6/1
R157
210/6/1
CAPS SHOULD BE PLACED NEAR MCH PIN
8
7
6
5
GTLREF VOLTAGE SHOULD BE 0.63*VTT=0.756V
124 OHM OVER 210 RESISTORS
C130
0.1u/25V/6
R156 10/6
C131
X_220p/50V/6
4
MCH_GTLREF_CPU
MCH_GTLREF_CPU 5
3
MSI
Title
Size Document Number Rev
Date: Sheet of
MICRO-STAR INt'L CO., LTD.
Intel Lakeport - CPU Signals
MS-7176
2
8 38Tuesday, April 26, 2005
1
0A
8
7
6
5
4
3
2
1
SCKE_A[0..3]19,21
DQM_A[0..7]19
DATA_A[0..63]19
DQM_A6
DQM_A1
DQM_A4
DQM_A2
DQM_A7
DQM_A3
DATA_A16
DATA_A21
DATA_A24
DATA_A12
DATA_A13
AV1
AW4
SADQ11
SADQ12
SBDQ9
SBDQ10
AV12
AM11
DATA_B11
DATA_B10
DATA_A14
DATA_A15
BC6
AY7
SADQ13
SADQ14
SBDQ11
SBDQ12
AR5
AR7
DATA_B12
DATA_B13
DATA_A17
AW12
AY10
SADQ15
SADQ16
SBDQ13
SBDQ14
AR12
AR10
DATA_B14
DATA_B15
DATA_A18
BA12
SADQ17
SBDQ15
AM15
DATA_B16
D D
C C
B B
does it need to connect to GND through a 40 ohm resister?
SCS_A#[0..3]19,21
MAA_A[0..13]19,21
ODT_A[0..3]19,21
SBS_A[0..2]19,21
DQS_A019
DQS_A#019
DQS_A119
DQS_A#119
DQS_A219
DQS_A#219
DQS_A319
DQS_A#319
DQS_A419
DQS_A#419
DQS_A519
DQS_A#519
DQS_A619
DQS_A#619
DQS_A719
DQS_A#719
P_DDR0_A19
N_DDR0_A19
P_DDR1_A19
N_DDR1_A19
P_DDR2_A19
N_DDR2_A19
P_DDR3_A19
N_DDR3_A19
P_DDR4_A19
N_DDR4_A19
P_DDR5_A19
N_DDR5_A19
SCS_A#0
SCS_A#1
SCS_A#2
SCS_A#3
RAS_A#
RAS_A#19,21
CAS_A#
CAS_A#19,21
WE_A#
WE_A#19,21
MAA_A0
MAA_A1
MAA_A2
MAA_A3
MAA_A4
MAA_A5
MAA_A6
MAA_A7
MAA_A8
MAA_A9
MAA_A10
MAA_A11
MAA_A12
ODT_A0
ODT_A1
ODT_A2
ODT_A3
SBS_A0
SBS_A1
SBS_A2
DQS_A0
DQS_A#0
DQS_A1
DQS_A#1
DQS_A2
DQS_A#2
DQS_A3
DQS_A#3
DQS_A4
DQS_A#4
DQS_A5
DQS_A#5
DQS_A6
DQS_A#6
DQS_A7
DQS_A#7
P_DDR0_A
N_DDR0_A
P_DDR1_A
N_DDR1_A
P_DDR2_A
N_DDR2_A
P_DDR3_A
N_DDR3_A
P_DDR4_A
N_DDR4_A
P_DDR5_A
N_DDR5_A
SMPCOMP_N
SMPCOMP_P MCH_VREF_AMCH_VREF_B
BB37
BA39
BA35
AY38
BA34
BA37
BB35
BA32
AW32
BB30
BA30
AY30
BA27
BC28
AY27
AY28
BB27
AY33
AW27
BB26
BC38
AW37
AY39
AY37
BB40
BC33
AY34
BA26
AY11
BA10
AU18
AR18
AU35
AV35
AP42
AP40
AG42
AG41
AC42
AC41
BB32
AY32
AK42
AK41
BA31
BB31
AH40
AH43
AU4
AR2
BA3
BB4
AY5
BB5
AY6
BA5
AL5
AJ6
AJ8
AM3
U8B
SACS0#
SACS1#
SACS2#
SACS3#
SARAS#
SACAS#
SAWE#
SAMA0
SAMA1
SAMA2
SAMA3
SAMA4
SAMA5
SAMA6
SAMA7
SAMA8
SAMA9
SAMA10
SAMA11
SAMA12
SAMA13
SAODT0
SAODT1
SAODT2
SAODT3
SABA0
SABA1
SABA2
SADQS0
SADQS0#
SADQS1
SADQS1#
SADQS2
SADQS2#
SADQS3
SADQS3#
SADQS4
SADQS4#
SADQS5
SADQS5#
SADQS6
SADQS6#
SADQS7
SADQS7#
SACLK0
SACLK0#
SACLK1
SACLK1#
SACLK2
SACLK2#
SACLK3
SACLK3#
SACLK4
SACLK4#
SACLK5
SACLK5#
MCH_SRCOMP0
MCH_SRCOMP1
SMOCDCOMP0
SMOCDCOMP1
DATA_A1
AP3
AP2
SADQ0
Lakeport
R202 80.6/6/1
SMPCOMP_P
DATA_A2
AU3
SADQ1
SADQ2
SBDQ0
AL6
DATA_B0
DATA_A3
DATA_A4
DATA_A5
AV4
AN1
AP4
SADQ3
SADQ4
SBDQ1
SBDQ2
AL8
AP8
AP9
DATA_B3
DATA_B2
DATA_B1
DATA_A7
AU5
AU2
SADQ5
SADQ6
SBDQ3
SBDQ4
AJ11
AL9
DATA_B4
DATA_B5
DATA_A8
DATA_A9
AW3
AY3
SADQ7
SADQ8
SBDQ5
SBDQ6
AM10
AP6
DATA_B7
DATA_B6
BA7
BB7
SADQ9
SADQ10
SBDQ7
SBDQ8
AU7
AV6
DATA_B8
DATA_B9
DATA_A10
DATA_A11
DATA_A6
DATA_A0
DATA_A20
DATA_A19
BB12
BA9
SADQ18
SADQ19
SBDQ16
SBDQ17
AM13
AV15
DATA_B17
DATA_B18
DATA_A22
BB9
BC11
SADQ20
SADQ21
SBDQ18
SBDQ19
AM17
AN12
DATA_B20
DATA_B19
DATA_A23
AY12
AM20
SADQ22
SADQ23
SBDQ20
SBDQ21
AR13
AP15
DATA_B21
DATA_B22
DATA_A25
DATA_A26
AM18
AV20
SADQ24
SADQ25
SBDQ22
SBDQ23
AT15
AM24
DATA_B23
DATA_B24
DATA_A27
DATA_A28
AM21
AP17
SADQ26
SADQ27
SBDQ24
SBDQ25
AM23
AV24
DATA_B25
DATA_B26
DATA_A29
DATA_A30
AR17
AP20
SADQ28
SADQ29
SBDQ26
SBDQ27
AM26
AP21
DATA_B27
DATA_B28
DATA_B[0..63]20
DATA_A32
DATA_A31
AT20
AP32
SADQ30
SADQ31
SBDQ28
SBDQ29
AR21
AP24
DATA_B30
DATA_B29
DATA_A34
DATA_A33
AV34
AV38
SADQ32
SADQ33
SBDQ30
SBDQ31
AT24
AU27
DATA_B32
DATA_B31
DATA_A35
DATA_A36
AU39
AV32
SADQ34
SADQ35
SBDQ32
SBDQ33
AN29
AR31
DATA_B34
DATA_B33
DATA_A37
DATA_A38
AT32
AR34
SADQ36
SADQ37
SBDQ34
SBDQ35
AM31
AP27
DATA_B35
DATA_B36
DATA_A40
DATA_A39
AU37
AR41
SADQ38
SADQ39
SBDQ36
SBDQ37
AR27
AP31
DATA_B37
DATA_B38
DATA_A41
DATA_A42
AR42
AN43
SADQ40
SADQ41
SBDQ38
SBDQ39
AU31
AP35
DATA_B40
DATA_B39
DATA_A43
DATA_A44
AM40
AU41
SADQ42
SADQ43
SBDQ40
SBDQ41
AP37
AN32
DATA_B42
DATA_B41
DATA_A45
DATA_A46
AU42
AP41
SADQ44
SADQ45
SBDQ42
SBDQ43
AL35
AR35
DATA_B43
DATA_B44
DATA_A48
DATA_A47
AN40
AL41
SADQ46
SADQ47
SBDQ44
SBDQ45
AU38
AM38
DATA_B46
DATA_B45
DATA_A49
DATA_A50
AL42
AF39
SADQ48
SADQ49
SBDQ46
SBDQ47
AM34
AL34
DATA_B47
DATA_B48
DATA_A52
DATA_A51
AE40
AM41
SADQ50
SADQ51
SBDQ48
SBDQ49
AJ34
AF32
DATA_B49
DATA_B50
DATA_A53
DATA_A54
AM42
AF41
SADQ52
SADQ53
SBDQ50
SBDQ51
AF34
AL31
DATA_B52
DATA_B51
DATA_A56
DATA_A55
AF42
AD40
SADQ54
SADQ55
SBDQ52
SBDQ53
AJ32
AG35
DATA_B54
DATA_B53
DATA_A57
DATA_A58
AD43
AA39
SADQ56
SADQ57
SBDQ54
SBDQ55
AD32
AC32
DATA_B55
DATA_B56
DATA_A60
DATA_A59
AA40
AE42
SADQ58
SADQ59
SBDQ56
SBDQ57
AD34
Y32
DATA_B57
DATA_B58
DATA_A61
DATA_A62
AE41
AB41
SADQ60
SADQ61
SBDQ58
SBDQ59
AA32
AF35
DATA_B60
DATA_B59
DATA_A63
AB42
SADQ62
SADQ63
SBDQ60
SBDQ61
AF37
AC33
DATA_B61
DATA_B62
SCKE_A1
SCKE_A0
BB25
AY25
SACKE0
SBDQ62
SBDQ63
AC35
DATA_B63
SCKE_A3
SCKE_A2
BC24
BA25
SACKE1
SACKE2
SBCKE0
BA14
AY16
SCKE_B0
SCKE_B1
SACKE3
SBCKE1
BA13
SCKE_B2
SCKE_B[0..3]20,21
VCC_DDR
A A
R203 80.6/6/1
C187
0.1u/25V/6
8
SMPCOMP_N
7
6
5
DQM_B[0..7]20
4
DQM_A0
AR3
SBCKE2
SBCKE3
BB13
SCKE_B3
AY2
SADM1
SADM0
SBDM7
AD39
DQM_B7
AP18
BB10
SADM3
SADM2
SBDM5
SBDM6
AR38
AJ39
DQM_B6
DQM_B5
DQM_A5
AP39
AT34
SADM5
SADM4
SBDM3
SBDM4
AP23
AR29
DQM_B3
DQM_B4
AG40
SADM6
SBDM2
AP13
DQM_B2
AC40
SADM7
SBDQS0
SBDQS0#
SBDQS1
SBDQS1#
SBDQS2
SBDQS2#
SBDQS3
SBDQS3#
SBDQS4
SBDQS4#
SBDQS5
SBDQS5#
SBDQS6
SBDQS6#
SBDQS7
SBDQS7#
SBCLK0#
SBCLK1#
SBCLK2#
SBCLK3#
SBCLK4#
SBCLK5#
SMVREF1
SMVREF0
SBDM0
SBDM1
AL11
AW7
DQM_B1
DQM_B0
SBCS0#
SBCS1#
SBCS2#
SBCS3#
SBRAS#
SBCAS#
SBWE#
SBMA0
SBMA1
SBMA2
SBMA3
SBMA4
SBMA5
SBMA6
SBMA7
SBMA8
SBMA9
SBMA10
SBMA11
SBMA12
SBMA13
SBODT0
SBODT1
SBODT2
SBODT3
SBBA0
SBBA1
SBBA2
SBCLK0
SBCLK1
SBCLK2
SBCLK3
SBCLK4
SBCLK5
BA40
AW41
BA41
AW40
BA23
AY24
BB23
BB22
BB21
BA21
AY21
BC20
AY19
AY20
BA18
BA19
BB18
BA22
BB17
BA17
AW42
AY42
AV40
AV43
AU40
AW23
AY23
AY17
AM8
AM6
AV7
AR9
AV13
AT13
AU23
AR23
AT29
AV29
AP36
AM35
AG34
AG32
AD36
AD38
AM29
AM27
AV9
AW9
AL38
AL36
AP26
AR26
AU10
AT10
AJ38
AJ36
AM2
AM4
SCS_B#0
SCS_B#1
SCS_B#2
SCS_B#3
RAS_B#
CAS_B#
WE_B#
MAA_B0
MAA_B1
MAA_B2
MAA_B3
MAA_B4
MAA_B5
MAA_B6
MAA_B7
MAA_B8
MAA_B9
MAA_B10
MAA_B11
MAA_B12
MAA_B13MAA_A13
ODT_B0
ODT_B1
ODT_B2
ODT_B3
SBS_B0
SBS_B1
SBS_B2
DQS_B0
DQS_B#0
DQS_B1
DQS_B#1
DQS_B2
DQS_B#2
DQS_B3
DQS_B#3
DQS_B4
DQS_B#4
DQS_B5
DQS_B#5
DQS_B6
DQS_B#6
DQS_B7
DQS_B#7
P_DDR0_B
N_DDR0_B
P_DDR1_B
N_DDR1_B
P_DDR2_B
N_DDR2_B
P_DDR3_B
N_DDR3_B
P_DDR4_B
N_DDR4_B
P_DDR5_B
N_DDR5_B
MCH_VREF_A
3
SCS_B#[0..3] 20,21
RAS_B# 20,21
CAS_B# 20,21
WE_B# 20,21
MAA_B[0..13] 20,21
ODT_B[0..3] 20,21
SBS_B[0..3] 20,21
DQS_B0 20
DQS_B#0 20
DQS_B1 20
DQS_B#1 20
DQS_B2 20
DQS_B#2 20
DQS_B3 20
DQS_B#3 20
DQS_B4 20
DQS_B#4 20
DQS_B5 20
DQS_B#5 20
DQS_B6 20
DQS_B#6 20
DQS_B7 20
DQS_B#7 20
P_DDR0_B 20
N_DDR0_B 20
P_DDR1_B 20
N_DDR1_B 20
P_DDR2_B 20
N_DDR2_B 20
P_DDR3_B 20
N_DDR3_B 20
P_DDR4_B 20
N_DDR4_B 20
P_DDR5_B 20
N_DDR5_B 20
C180
0.1u/25V/6
PLACE CLOSE TO MCH
PLACE 0.1UF CAP CLOSE TO MCH
C179
0.1u/25V/6
CP8
VCC_DDR
R211 1K/6/1
X_COPPER
R210 X_0/6
MCH_VREF_A
R209
1K/6/1
MSI
Title
Size Document Number Rev
Date: Sheet of
MICRO-STAR INt'L CO., LTD.
Intel Lakeport - Memory Signals
MS-7176
2
MCH_VREF_B
9 38Tuesday, April 26, 2005
1
0A
8
EXP_A_RXP_022
EXP_A_RXN_022
EXP_A_RXP_122
EXP_A_RXN_122
DMI_ITP_MRP_012
DMI_ITN_MRN_012
DMI_ITP_MRP_112
DMI_ITN_MRN_112
DMI_ITP_MRP_212
DMI_ITN_MRN_212
DMI_ITP_MRP_312
DMI_ITN_MRN_312
CK_PE_100M_MCH15
CK_PE_100M_MCH#15
MS8_BSEL029
MS8_BSEL129
H_FSBSEL05,6,15,29
H_FSBSEL15,6,15,29
H_FSBSEL25,6,15
CP19
X_COPPER
L9
X_FB180/6/1.5A
EXP_A_RXP_222
EXP_A_RXN_222
EXP_A_RXP_322
EXP_A_RXN_322
EXP_A_RXP_422
EXP_A_RXN_422
EXP_A_RXP_522
EXP_A_RXN_522
EXP_A_RXP_622
EXP_A_RXN_622
EXP_A_RXP_722
EXP_A_RXN_722
EXP_A_RXP_822
EXP_A_RXN_822
EXP_A_RXP_922
EXP_A_RXN_922
EXP_A_RXP_1022
EXP_A_RXN_1022
EXP_A_RXP_1122
EXP_A_RXN_1122
EXP_A_RXP_1222
EXP_A_RXN_1222
EXP_A_RXP_1322
EXP_A_RXN_1322
EXP_A_RXP_1422
EXP_A_RXN_1422
EXP_A_RXP_1522
EXP_A_RXN_1522
EXP_EN_HDR22
SDVO_CTRL_DATA
SDVO_CTRL_CLK
D D
C C
SDVO_CTRL_DATA22
SDVO_CTRL_CLK22
B B
V_2P5_MCH
I = 70mA
220u/10V
CP20
X_COPPER
V_1P5_CORE
A A
V_1P5_CORE V_1P5_CORE
L7
CP22
X_COPPER
L8
X_10uH/8/125mA/Rdc=0.7
8
EXP_A_RXP_0
EXP_A_RXN_0
EXP_A_RXP_1
EXP_A_RXN_1
EXP_A_RXP_2
EXP_A_RXN_2
EXP_A_RXP_3
EXP_A_RXN_3
EXP_A_RXP_4
EXP_A_RXN_4
EXP_A_RXP_5
EXP_A_RXN_5
EXP_A_RXP_6
EXP_A_RXN_6
EXP_A_RXN_7
EXP_A_RXN_8
EXP_A_RXP_9
EXP_A_RXN_9
EXP_A_RXP_10
EXP_A_RXN_10
EXP_A_RXP_11
EXP_A_RXN_11
EXP_A_RXP_12
EXP_A_RXN_12
EXP_A_RXP_13
EXP_A_RXN_13
EXP_A_RXP_14
EXP_A_RXN_14
EXP_A_RXP_15
EXP_A_RXN_15
EXP_EN_HDR
DMI_ITP_MRP_0
DMI_ITN_MRN_0
DMI_ITP_MRP_1
DMI_ITN_MRN_1
DMI_ITP_MRP_2
DMI_ITN_MRN_2
DMI_ITP_MRP_3
DMI_ITN_MRN_3
CK_PE_100M_MCH
CK_PE_100M_MCH#
for 945G only
R560 10K/6
R561 10K/6
R170 X_10K/6
R171 X_10K/6
R167 10K/6
R168 X_1K/6/1
VCCA_HPLLVCCA_HPLL
VCCA_MPLL
VCCA_DPLLA
VCCA_DPLLB
VCCA_GPLL
V_2P5_MCH
V_2P5_DAC_FILTERED
+
C151
0.1u/25V/6
C157
X_FB600/6
R690 220/6
R691 220/6
NOA_6
C152
VCCA_DPLLB
+
C147
220u/10V
G12
F12
D11
D12
J13
H13
E10
F10
J9
H10
F7
F9
C4
D3
G6
J6
K9
K8
F4
G4
M6
M7
K2
L1
U11
U10
R8
R7
P4
N3
Y10
Y11
F20
Y7
Y8
AA9
AA10
AA6
AA7
AC9
AC8
B14
B16
F15
E15
SEL0
F21
SEL1
H21
SEL2
L20
AK17
AL17
K21
AK23
AK18
L21
L18
N21
C21
B20
C19
B19
B17
D19
C18
B18
A18
V_FSB_VTT
I = 60mA
VCCA_MPLL
C143
1u/10V/6
I = 55mA
7
V_1P5_CORE
AA26
AB17
AB18
AB19
AB20
AB24
AB25
AB26
VCC
VTT
VCC
VTT
B24
B25
VCC
VTT
VCC
VCC
VCC
VTT
VTT
VTT
B26
C23
C25
C26
AB27
VCC
VCC
VTT
VTT
D23
X_10uH/8/125mA/Rdc=0.7
U8C
Lakeport
C148
0.1u/25V/6
AA24
EXPARXP0
EXPARXN0
EXPARXP1
EXPARXN1
EXPARXP2
EXPARXN2
EXPARXP3
EXPARXN3
EXPARXP4
EXPARXN4
EXPARXP5
EXPARXN5
EXPARXP6
EXPARXN6
EXPARXP7
EXPARXN7
EXPARXP8
EXPARXN8
EXPARXP9
EXPARXN9
EXPARXP10
EXPARXN10
EXPARXP11
EXPARXN11
EXPARXP12
EXPARXN12
EXPARXP13
EXPARXN13
EXPARXP14
EXPARXN14
EXPARXP15
EXPARXN15
EXP_EN
DMI RXP0
DMI RXN0
DMI RXP1
DMI RXN1
DMI RXP2
DMI RXN2
DMI RXP3
DMI RXN3
GCLKP
GCLKN
SDVOCTRLDATA
SDVOCTRLCLK
BSEL0
BSEL1
BSEL2
RSV_TP[0]
RSV_TP[1]
EXP_SLR
RSV_TP[2]
RSV_TP[3]
RSV_TP[4]
RSV_TP[5]
RSV_TP[6]
VCCAHPLL
VCCAMPLL
VCCADPLLA
VCCADPLLB
VCCA_EXPPLL
VCC2
VCCADAC
VCCADAC
VSSA_DAC
7
VCC
VCC
VTT
B23
A24
V_1P5_CORE V_1P5_CORE
AC15
AC17
AC18
VCC
VCC
VTT
VTT
D24
D25
E23
CP21
X_COPPER
L5
CP23
X_COPPER
L6
AC20
VCC
VTT
E24
AC24
AC26
VCC
VCC
VTT
VTT
E27
E26
X_FB600/6
VCC
VTT
AC27
F23
VCC
VTT
6
6
AD15
F27
VCC
VTT
AD17
G23
AD19
VCC
VTT
H23
VCC
VTT
AD21
J23
+
AD23
VCC
VTT
K23
AD25
AD26
AE17
VCC
VCC
VCC
VTT
VTT
VTT
L23
M23
N23
V_1P5_CORE
VCCA_DPLLA
C140
220u/10V
VCCA_HPLL
C141
0.1u/25V/6
AE20
AE18
AE22
VCC
VCC
VCC
VTT
VTT
P23
I = 55mA
I = 45mA
AE24
VCC
AE26
AE27
VCC
VCC
VCC
AF21
AF23
C145
0.1u/25V/6
VCC
VCC
AF15
AF25
VCC
VCC
AF17
AF26
VCC
VCC
AF19
AF27
VCC
VCC
AF29
AY43
VCC
AG15
VCC_DDR
AV18
AV21
VCCSM
VCCSM
VCC
VCC
AG17
AG18
5
AV23
AV31
AV42
AW13
VCCSM
VCCSM
VCCSM
VCCSM
VCC
VCC
VCC
VCC
AG19
AG20
AG21
AG22
V_1P5_CORE
5
AW15
VCCSM
VCCSM
VCC
VCC
AG23
AW20
AW21
VCCSM
VCC
AG24
AJ15
AW24
VCCSM
VCCSM
VCC
VCC
AJ17
AY41
BB16
AW29
AW34
AW35
AW31
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCC
VCC
AJ18
AJ20
L10 1uH/8/0.5A
CP24
X_COPPER
L11 X_0/1206
CP25
X_COPPER
BB20
BB24
VCCSM
VCCSM
VCC_EXP
AE4
AE3
BB28
BB33
BB38
VCCSM
VCCSM
VCCSM
VCC_EXP
VCC_EXP
VCC_EXP
AE2
AD12
AD10
BB42
BC13
VCCSM
VCCSM
VCCSM
VCC_EXP
VCC_EXP
VCC_EXP
AD8
AD6
+
C192
X_220u/10V
4
BC26
BC31
BC18
BC22
VCCSM
VCCSM
VCCSM
VCCSM
VCC_EXP
VCC_EXP
VCC_EXP
VCC_EXP
AD5
AD4
AD2
AD1
R179 1/6/1
R183 1/6/1
4
BC35
VCCSM
VCC_EXP
AC13
R10R5N12
N11
N10N9N7
N5
BC40
VCCSM
VCC_EXP
VCC_EXP
AC6
AC5
VCC_EXP
VCC_EXP
AA13
VCC_EXP
VCC_EXP
VCC_EXP
VCC_EXP
AA5
Y13
VCC_EXP
VCC_EXP
VCC_EXP
VCC_EXP
VCC_EXP
VCC_EXP
V13V9V10V7V6
VCC_EXP
VCC_EXP
VCC_EXP
VCC_EXP
VCCA_GPLL
C155
10u/10V/8
I = 1.5A
V_1P5_PCIEXPRESS
C178
C185 10u/10V/8
10u/10V/8
R11
VCC_EXP
VCC_EXP
VCC_EXP
VCC_EXP
VCC_EXP
V5
V_1P5_PCIEXPRESS
I = 45mA
U13U8U7U6R13
VCC_EXP
VCC_EXP
EXPATXP0
EXPATXN0
EXPATXP1
EXPATXN1
EXPATXP2
EXPATXN2
EXPATXP3
EXPATXN3
EXPATXP4
EXPATXN4
EXPATXP5
EXPATXN5
EXPATXP6
EXPATXN6
EXPATXP7
EXPATXN7
EXPATXP8
EXPATXN8
EXPATXP9
EXPATXN9
EXPATXP10
EXPATXN10
EXPATXP11
EXPATXN11
EXPATXP12
EXPATXN12
EXPATXP13
EXPATXN13
EXPATXP14
EXPATXN14
EXPATXP15
EXPATXN15
DMI TXP0
DMI TXN0
DMI TXP1
DMI TXN1
DMI TXP2
DMI TXN2
DMI TXP3
DMI TXN3
EXP_COMPO
EXP_COMPI
HSYNC
VSYNC
GREEN
GREENB
BLUE#
DDC_DATA
DDC_CLK
DREFCLKINP
DREFCLKINN
EXTTS#
XORTEST
ALLZTEST
C154
1u/10V/6
C173
0.1u/25V/6
3
V_1P5_PCIEXPRESS
D14
C13
A13
B12
A11
B10
C10
C9
A9
B7
D7
D6
A6
B5
E2
F1
G2
J1
J3
K4
L4
M4
M2
N1
P2
T1
T4
U4
U2
V1
V3
W4
W2
Y1
AA2
AB1
Y4
AA4
AB3
AC4
AC12
AC11
D17
C17
F17
RED
K17
H18
BLUE
G17
RED#
J17
J18
N18
N20
J15
H15
A20
IREF
J20
H20
K18
3
EXP_A_TXP_0
EXP_A_TXN_0
EXP_A_TXP_1
EXP_A_TXN_1
EXP_A_TXP_2
EXP_A_TXN_2
EXP_A_TXP_3
EXP_A_TXN_3
EXP_A_TXP_4
EXP_A_TXN_4
EXP_A_TXP_5
EXP_A_TXN_5EXP_A_RXP_7
EXP_A_TXP_6
EXP_A_TXN_6EXP_A_RXP_8
EXP_A_TXP_7
EXP_A_TXN_7
EXP_A_TXP_8
EXP_A_TXN_8
EXP_A_TXP_9
EXP_A_TXN_9
EXP_A_TXP_10
EXP_A_TXN_10
EXP_A_TXP_11
EXP_A_TXN_11
EXP_A_TXP_12
EXP_A_TXN_12
EXP_A_TXP_13
EXP_A_TXN_13
EXP_A_TXP_14
EXP_A_TXN_14
EXP_A_TXP_15
EXP_A_TXN_15
DMI_MTP_IRP_0
DMI_MTN_IRN_0
DMI_MTP_IRP_1
DMI_MTN_IRN_1
DMI_MTP_IRP_2
DMI_MTN_IRN_2
DMI_MTP_IRP_3
DMI_MTN_IRN_3
GRCOMP
HSYNC
VSYNC
VGA_RED
VGA_GREEN
VGA_BLUE
C545 5p/50V/4
MCH_DDC_DATA
MCH_DDC_CLK
CK_96M_DREF
CK_96M_DREF#
DACREFSET
EXTTS
TP13
C520
X_10p/16V/6
EXP_A_TXP_0 22
EXP_A_TXN_0 22
EXP_A_TXP_1 22
EXP_A_TXN_1 22
EXP_A_TXP_2 22
EXP_A_TXN_2 22
EXP_A_TXP_3 22
EXP_A_TXN_3 22
EXP_A_TXP_4 22
EXP_A_TXN_4 22
EXP_A_TXP_5 22
EXP_A_TXN_5 22
EXP_A_TXP_6 22
EXP_A_TXN_6 22
EXP_A_TXP_7 22
EXP_A_TXN_7 22
EXP_A_TXP_8 22
EXP_A_TXN_8 22
EXP_A_TXP_9 22
EXP_A_TXN_9 22
EXP_A_TXP_10 22
EXP_A_TXN_10 22
EXP_A_TXP_11 22
EXP_A_TXN_11 22
EXP_A_TXP_12 22
EXP_A_TXN_12 22
EXP_A_TXP_13 22
EXP_A_TXN_13 22
EXP_A_TXP_14 22
EXP_A_TXN_14 22
EXP_A_TXP_15 22
EXP_A_TXN_15 22
DMI_MTP_IRP_0 12
DMI_MTN_IRN_0 12
DMI_MTP_IRP_1 12
DMI_MTN_IRN_1 12
DMI_MTP_IRP_2 12
DMI_MTN_IRN_2 12
DMI_MTP_IRP_3 12
DMI_MTN_IRN_3 12
R198
24.9/6/1
HSYNC 26
VSYNC 26
R15 0/6
MCH_DDC_DATA 26
MCH_DDC_CLK 26
CK_96M_DREF 15
CK_96M_DREF# 15
R172 255/6/1
R175 10K/6
HSYNC
VSYNC
CK_96M_DREF#
CK_PE_100M_MCH#
2
V_1P5_CORE
C184
C189
VCC_DDR
C120 10u/10V/8
C122 10u/10V/8
C128 0.1u/25V/6
VCC_DDR
C124 10u/10V/8
C138 0.1u/25V/6
C144 10u/10V/8
1
10u/10V/8
10u/10V/8
MCH MEMORY DECOUPLING
V_FSB_VTT
C311
C127
V_1P5_PCIEXPRESS
0.1u/25V/6
0.1u/25V/6
C137
0.1u/25V/6
FSB GENERIC DECOUPLING
VGA_BLUE 26
for 945G only
V_2P5_MCH
for 945P only
R4 10K/60.01u/50V/6
R5 10K/6
R6 0/6
R7 0/6
C544 5p/50V/4
for 945G only
R14 0/6
V_2P5_MCH
for 945P only
CK_96M_DREF
CK_PE_100M_MCH
VGA_RED
VGA_GREEN
VGA_BLUE
DACREFSET
C146
X_10p/16V/6
R24 0/6
R25 0/6
VGA_RED 26
VGA_GREEN 26
C546
5p/50V/4
V_2P5_MCH
R9 0/6
R10 0/6
R11 0/6
R23 0/6
for 945P only
V_1P5_CORE
for 945P only
Title
Size Document Number Rev
Date: Sheet of
MICRO-STAR INt'L CO., LTD.
MSI
Intel Lakeport PCI-Express & RBG Signals
MS-7176
2
10 38Tuesday, April 26, 2005
1
0A
5
AN42
AN31
AN27
AN26
AN24
AN23
AN21
AN20
AN18
AN17
AN15
AN13
AN4
AN2
AM39
AM37
AM36
AM33
AM9
AM7
AM5
AL43
AL37
D D
C C
B B
U8D
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
A16
VSS
A22
VSS
A26
VSS
A31
VSS
A35
VSS
B4
VSS
B6
VSS
B9
VSS
B11
VSS
B13
VSS
B21
VSS
B22
VSS
B28
VSS
B33
VSS
B38
VSS
C3
VSS
C5
VSS
C7
VSS
C12
VSS
C14
VSS
C22
VSS
C40
VSS
D2
VSS
D5
VSS
D10
VSS
D16
VSS
D20
VSS
D21
VSS
E3
VSS
E4
VSS
E7
VSS
E9
VSS
E12
VSS
E13
VSS
E17
VSS
E18
VSS
E20
VSS
E21
VSS
E32
VSS
F2
VSS
F6
VSS
F13
VSS
F18
VSS
F26
VSS
F34
VSS
F42
VSS
G3
VSS
G5
VSS
G7
VSS
G9
VSS
G10
VSS
G13
VSS
G15
VSS
G18
VSS
G20
VSS
G21
VSS
G24
VSS
G27
VSS
G29
VSS
G31
VSS
G32
VSS
G35
VSS
G38
VSS
H12
VSS
H17
VSS
H26
VSS
H27
VSS
H32
VSS
J2
VSS
J5
VSS
J7
VSS
J10
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
J12
J21
J24
J43
J38
J29
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
K20
K15
K13
K12
K10K7K6K5K3
K27
VSS
VSS
VSS
VSS
VSS
VSS
VSS
L13
L12L2K39
K37
K34
K32
4
AU32
AU29
AU26
AU24
AU21
AU20
AU17
AU15
AU13
AU12
AU9
AU6
AT31
AT27
AT26
AT23
AT21
AT18
AT17
AT12
AR43
AR39
AR37
AR32
AR24
AR20
AR15
AR6
AR1
AP38
AP34
AP29
AP12
AP10
AP7
AP5
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
L24
VSS
VSS
VSS
VSS
L31
L29
L26
L42
VSS
VSS
VSS
VSS
VSS
VSS
VSS
M21
M20
M13
M10M9M8M5M3
VSS
VSS
VSS
VSS
VSS
M37
M35
N15
N13N8N6
N2
VSS
VSS
VSS
VSS
VSS
VSS
VSS
N24
VSS
N36
N33
N31
N29
N27
N26
N39
VSS
VSS
VSS
VSS
VSS
VSS
VSS
P29
P27
P26
P24
P15
P14P3N43
VSS
VSS
AU34
VSS
VSS
3
Y29
Y26
Y24
Y22
Y20
W25
W23
W21
V29
V26
V24
U29
R29
R26
D43D1A40A4BC9
BB41
BB39
BB34
BB19
BB14
BB11
BB6
BB3
BA42
BA4
AW10
AV37
AV17
AV10
AV2
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
R9R6P30
R12
R14
R30
R31
R34
R37
R39T2T42U3U5U9U12
U14
U31
U33
U36
U38V2V8
V11
V12
V14
V34
V36
V37
V38
V39
VSS
V43W3Y2Y5Y6Y9Y12
AA25
VSS
VSS
AA27
VSS
VSS
AA29
VSS
VSS
AC19
Y14
VSS
VSS
AC25
VSS
VSS
Y31
AC29
Y35
VSS
VSS
AD18
VSS
VSS
Y37
2
AD20
VSS
VSS
Y39
AD22
VSS
VSS
Y42
AD24
VSS
VSS
AA3
AD27
AA8
VSS
VSS
AD29
AF18
VSS
VSS
AE19
AE21
VSS
VSS
AF20
AE23
VSS
VSS
AF22
AE25
VSS
VSS
AF24
L17
VSS
VSS
1
AY1
BC4
VSS
VSS
AL33
VSS
AL32
VSS
AL27
VSS
AL24
VSS
AL23
VSS
AL21
VSS
AL18
VSS
AL15
VSS
AL13
VSS
AL12
VSS
AL10
VSS
AL7
VSS
AL3
VSS
AL2
VSS
AL1
VSS
AK30
VSS
AK29
VSS
AK26
VSS
AK24
VSS
AJ37
VSS
AJ35
VSS
AJ33
VSS
AJ31
VSS
AJ30
VSS
AJ10
VSS
AJ7
VSS
AH42
VSS
AG39
VSS
AG38
VSS
AG37
VSS
AG36
VSS
AG33
VSS
AG31
VSS
AG30
VSS
AF43
VSS
AF38
VSS
AF36
VSS
AF33
VSS
AF5
VSS
AF3
VSS
AF2
VSS
AF1
VSS
AD42
VSS
AD37
VSS
AD35
VSS
AD33
VSS
AD13
VSS
AD11
VSS
AD9
VSS
AD7
VSS
AC39
VSS
AC38
VSS
AC37
VSS
AC36
VSS
AC31
VSS
AC23
VSS
AC21
VSS
AC14
VSS
AC10
VSS
AC7
VSS
AC3
VSS
AC2
VSS
AB43
VSS
AB2
VSS
AA36
VSS
AA33
VSS
AA31
VSS
AA23
VSS
AA21
VSS
AA14
VSS
AA12
VSS
AA11
VSS
Lakeport
A A
MSI
Title
Size Document Number Rev
5
4
3
2
Date: Sheet of
MICRO-STAR INt'L CO., LTD.
Intel Lakeport - GND
MS-7176
11 38Tuesday, April 26, 2005
1
0A
8
D D
C C
ICH_PCLK15
PCIRST#30
R362 X_10K/6
R361 X_10K/6
R363 X_10K/6
SPI_MOSI18
SPI_MISO18
SPI_CS#18
SPI_CLK18
SPI_ARB18
VCC3
Stuff if share
SPI.
B B
PGNT#4
PGNT#5
PGNT#4
PGNT#5
A A
R104 2.2K/6
R105 2.2K/6
R106 X_2.2K/6
R115 X_2.2K/6
VCC3_SB
8
AD[0..31]23,32,33
C_BE#[0..3]23,32,33
PREQ#[0..5]23,32,33
PGNT#[0..5]23,32,33
R372 X_0/6
R371 X_0/6
R373 X_0/6
R365 X_0/6
7
DEVSEL#23,32,33
FRAME#23,32,33
IRDY#23,32,33
TRDY#23,32,33
STOP#23,32,33
PAR23,32,33
LOCK#23
SERR#23
PERR#23,33
PCI_PME#23
R324 33/6
PIRQ#A23
PIRQ#B23
PIRQ#C23
PIRQ#D23,33
PIRQ#E23,32
PIRQ#F23
PIRQ#G23
PIRQ#H23
SERIRQ16
IDE_IRQ25
7
AD0
AD1
AD2
AD3
AD4
AD5
AD6
AD7
AD8
AD9
AD10
AD11
AD12
AD13
AD14
AD15
AD16
AD17
AD18
AD19
AD20
AD21
AD22
AD23
AD24
AD25
AD26
AD27
AD28
AD29
AD30
AD31
C_BE#0
C_BE#1
C_BE#2
C_BE#3
PREQ#0
PREQ#1
PREQ#2
PREQ#3
PREQ#4
PREQ#5
PGNT#0
PGNT#1
PGNT#2
PGNT#3
PGNT#4
PGNT#5
AH21
AH16
E18
C18
A16
F18
E16
A18
E17
A17
A15
C14
E14
D14
B12
C13
G15
G13
E12
C11
D11
A11
A10
F11
F10
B15
C12
D12
C15
A12
F16
F14
F15
E10
E11
B10
B19
B18
C16
C17
E13
A13
D16
D17
F13
A14
G8
G7
E9
D9
B9
A8
A6
C7
B6
E6
D6
A7
C9
A9
D7
C8
E7
D8
A3
B4
C5
B5
F7
F8
P5
P2
P6
R2
P1
AD0
AD1
AD2
AD3
AD4
AD5
AD6
AD7
AD8
AD9
AD10
AD11
AD12
AD13
AD14
AD15
AD16
AD17
AD18
AD19
AD20
AD21
AD22
AD23
AD24
AD25
AD26
AD27
AD28
AD29
AD30
AD31
C/BE0#
C/BE1#
C/BE2#
C/BE3#
DEVSEL#
FRAME#
IRDY#
TRDY#
STOP#
PAR
PLOCK#
SERR#
PERR#
PME#
PCICLK
PCIRST#
REQ0#
REQ1#
REQ2#
REQ3#
GPIO22/REQ4#
GPIO1/REQ5#
GNT0#
GNT1#
GNT2#
GNT3#
GPIO48/GNT4#
GPIO17/GNT5#
PIRQA#
PIRQB#
PIRQC#
PIRQD#
GPIO2/PIRQE#
GPIO3/PIRQF#
GPIO4/PIRQG#
GPIO5/PIRQH#
SERIRQ
IDEIRQ
SPI_MOSI
SPI_MISO
SPI_CS#
SPI_CLK
SPI_ARB
VSS_0
VSS_1
VSS_2
A4
A23B1B8
VSS_3
VSS_4
B11
B14
6
PCI INTERFACE INTERRUPT
PART 1/3
SPI
VSS_5
VSS_6
VSS_7
VSS_8
VSS_9
VSS_10
VSS_11
B17
B20
B26
B28C2C6
D10
6
ICH 7
VSS_12
VSS_13
VSS_14
VSS_15
VSS_16
VSS_17
D13
D18
D21
D24E1E2E8E15F3F4F5F12
VSS_18
VSS_19
VSS_20
VSS_21
VSS_22
VSS_23
VSS_24
VSS_25
VSS_26
VSS_27
VSS_28
F27
F28G1G2G5G6G9G14
5
CPULAN PCI EXPRESSDIRECT MEDIA
VSS_29
VSS_30
5
VSS_31
VSS_32
G18
VSS_33
GPO49/CPUPWRGD
DMI_IRCOMP
LAN_RSTSYNC
VSS_34
VSS_35
VSS_36
VSS_37
VSS_38
G21
G24
G25
G26H3H4
A20M#
CPUSLP#
FERR#
IGNNE#
INIT#
INIT3_3V#
STPCLK#
RCIN#
A20GATE
THRMTRIP#
PLTRST#
PERN_1
PERP_1
PETN_1
PETP_1
PERN_2
PERP_2
PETN_2
PETP_2
PERN_3
PERP_3
PETN_3
PETP_3
PERN_4
PERP_4
PETN_4
PETP_4
PERN_5
PERP_5
PETN_5
PETP_5
PERN_6
PERP_6
PETN_6
PETP_6
DMI_0RXN
DMI_0RXP
DMI_0TXN
DMI_0TXP
DMI_1RXN
DMI_1RXP
DMI_1TXN
DMI_1TXP
DMI_2RXN
DMI_2RXP
DMI_2TXN
DMI_2TXP
DMI_3RXN
DMI_3RXP
DMI_3TXN
DMI_3TXP
DMI_CLKN
DMI_CLKP
DMI_ZCOMP
LAN_CLK
LAN_RXD0
LAN_RXD1
LAN_RXD2
LAN_TXD0
LAN_TXD1
LAN_TXD2
EE_CS
EE_DIN
EE_DOUT
EE_SHCLK
VSS_39
VSS_40
H5
INTR
SMI#
4
U16A
AH28
AG27
AG26
AG22
AF22
AG21
AF25
AH24
NMI
AF23
AH22
AG23
AE22
AF26
AG24
C26
F26
F25
E28
E27
H26
H25
G28
G27
K26
K25
J28
J27
M26
M25
L28
L27
P26
P25
N28
N27
T25
T24
R28
R27
V26
V25
U28
U27
Y26
Y25
W28
W27
AB26
AB25
AA28
AA27
AD25
AD24
AC28
AC27
AE28
AE27
C25
D25
V3
U3
U5
V4
T5
U7
V6
V7
W1
W3
Y2
Y1
ICH7R
R284 33/6
HSO_N1_C
HSO_P1_C
HSO_N2_C HSO_N2
HSO_P2_C
HSO_N3_C
HSO_P3_C
DMI_BIAS
LAN_CLK
LAN_RSTSYNC
LAN_RXD0
LAN_RXD1
LAN_RXD2
LAN_TXD0
LAN_TXD1
LAN_TXD2
EE_CS
EE_DIN
EE_DOUT
EE_SHCLK
4
H_A20M# 5
H_CPUSLP# 5
H_FERR# 5,6
H_IGNNE# 5
H_INIT# 5
FWH_INIT 29
H_INTR 5
H_NMI 5
ICH_H_SMI# 5
H_STPCLK# 5
KBRST# 16
A20GATE 16
H_PWRGD 5,6
C297 0.1u/25V/6
C296 0.1u/25V/6
C285 0.1u/25V/6
C283 0.1u/25V/6
C286 0.1u/25V/6
C287 0.1u/25V/6
R279 24.9/6/1
LAN_CLK 18
LAN_RSTSYNC 18
LAN_RXD0 18
LAN_RXD1 18
LAN_RXD2 18
LAN_TXD0 18
LAN_TXD1 18
LAN_TXD2 18
TRMTRIP# 5,6
HSI_N1
HSI_P1
HSO_N1
HSO_P1
HSI_N2
HSI_P2
HSO_P2
HSI_N3
HSI_P3
HSO_N3
HSO_P3
DMI_MTN_IRN_0 10
DMI_MTP_IRP_0 10
DMI_ITN_MRN_0 10
DMI_ITP_MRP_0 10
DMI_MTN_IRN_1 10
DMI_MTP_IRP_1 10
DMI_ITN_MRN_1 10
DMI_ITP_MRP_1 10
DMI_MTN_IRN_2 10
DMI_MTP_IRP_2 10
DMI_ITN_MRN_2 10
DMI_ITP_MRP_2 10
DMI_MTN_IRN_3 10
DMI_MTP_IRP_3 10
DMI_ITN_MRN_3 10
DMI_ITP_MRP_3 10
CK_PE_100M_ICH# 15
CK_PE_100M_ICH 15
EE_CS
EE_SHCLK
EE_DOUT
EE_DIN
3
PLTRST# 8,16,29
HSI_N1 24
HSI_P1 24
HSO_N1 24
HSO_P1 24
HSI_N2 24
HSI_P2 24
HSO_N2 24
HSO_P2 24
HSI_N3 18
HSI_P3 18
HSO_N3 18
HSO_P3 18
V_DMI 14
U29
1
CS
2
SK
3
DI
4
DO
X_M33-93C4653
for 82562 EEPROM
3
VCC
ORG
GND
2
SERIRQ
R303 10K/6
KBRST#
R296 10K/6
A20GATE
R300 10K/6
VCC3_SB
8
7
NC
6
5
MSI
Title
Size Document Number Rev
Date: Sheet of
MICRO-STAR INt'L CO., LTD.
Intel ICH7 - PCI & DMI & CPU & IRQ
2
VCC3
MS-7176
1
12 38Tuesday, April 26, 2005
1
0A
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