MSI MS-7174 Schematic 1B
1
Cover Sheet, Block diagram
Intel LGA775 CPU - Signals
Intel LGA775 CPU - Power
Intel LGA775 CPU- GND
Intel Grantsdale - CPU
Intel Grantsdale - Memory
Intel Grantsdale - PCI Express
Intel Grantsdale - GND
ICH6
Clock Generator - CY28416 & FWH
LPC I/O - SMSC 47M997 & KB/MS & COM1 & LPT
Azalia CODEC & Interanl SPK 15
ANTI-POP
A A
LAN - LAN KINNERITH
DDRII DIMM 1 , 2 & Termination & MCH1.8V
PCI - Express x16 port
PCI SLOT 1 & 2 & 3
USB Connectors
ATX & Front Panel & VGA Connector
1-2
3
4
5
6
7
8
9
10-12
13
14
16
17
18-19
20
21
22
23
MS-7174H1
Version 1B
Intel (R) Grantsdale (GMCH) + ICH6 Chipset
Intel Prescott LGA775 Processor
CPU:
Intel Prescott Celeron D 350J (3.2GHz), P4 550J (3.4GHz)
System Chipset:
Intel Grantsdale - GMCH (North Bridge 915GV or 910GE)
Intel ICH6 (South Bridge)
On Board Chipset:
BIOS -- FWH FLASH 4Mb
AC97 AUDIO -- ALC880
LPC Super I/O -- SMSC47M997
LAN -- Intel 82562GT
1394 -- VIA VT-6307
CLOCK -- Cypress CY28416
Main Memory:
2 CHANNEL DDR II * 1 (Max 2GB)
Expansion Slots:
MS7 ACPI Controller
VRM 10 - Intersil HIP 6566 3 phase
FAN Controller & IDE & SATA
VIA VT-6307 IEEE1394 Controller
Manual Parts
GPIO & JUMPER SETTING
POWER MAP
Revision History
24
25
26
27
28
29
30
31
PCI 2.3 SLOT * 3
Intersil PWM:
Controller:
1
INTERSIL 6566 3PHASE
MSI
Title
Size Document Number Re v
Date: Sheet
MICRO-STAR INt'L CO., LTD.
COVER SHEET
MS-7174H1
131Thursday, June 30, 2005
of
1B
1
VRM_GD
VRM 10.1
Intersil 6566
3-Phase PWM
P.25
CLOCK
Intel LGA775 Processor
H_PWRGD
GENERATOR
PCIRST#1
CY28416
PCI EXPRESS
P.13
X16
Connector
P.15
Analog
Video Out
HD_RST#
IDE Primary
SERIAL ATA1
A A
SERIAL ATA2
USB2.0
P.23
P.26
P.18
P.18
UltraDMA
33/66/100
USB
VRM_GD
USB Port0~ 7
P.22
RSMRST#
ALC880
Azallia Codec
P.15~16
i910GE
ICH6
VTT_PWG
FSB
DMI
PLRST#
P.10~12
H_CPURST#
P.6~9
PWR_GD
LPC Bus
P.3~5
CHANNEL A
CHANNEL B
SLP_S4#
SLP_S3#
LPC SIO
47M997
Block Diagram
DDR2
DIMM 1
Module
P.18~19
DDR2
DIMM 2
Module
P.18~19
PCIRST_ICH6#
PCI
PWR_OK
PCIRST#
ATX1
P.14
PWR_GD
PCIRST_SLT#
PCI Slot 2
PCI Slot 1
MS7
PCI Slot 3
P.21P.21P.21
VID_GD
RSMRST#
HD_RST#
P.24
PCIRST#
LAN
Intel 82562 GT
PCIRST_ICH6#
P.17
1394
VIA VT-6307
P.27
PCI
SW_ON#
FWH Floopy
P.13
FP_RST#
Keyboard
Mouse
P.14
P.14
Parallel
Serial
P.14P.14P.14
JFP1
P.23
PCIRST#
1
MICRO-STAR INt'L CO., LTD.
MSI
Title
Size Document Number Re v
Date: Sheet
BLOCK DIAGRAM
MS-7174H1
231Thursday, June 30, 2005
of
1B
VTT_OUT_RIGHT
VTT_OUT_RIGHT
H_DBI#[0..3]6
H_EDRDY#6
H_STPCLK#10
H_DRDY#6
H_DEFER#6
RN8B
RN5A
RN8A
RN5C
RN8D
H_TEMP_RET14
H_TEMP_SRC14
TRMTRIP#4, 10
H_PROCHOT#4
H_IGNNE#10
ICH_H_SMI#10
C45 X_C0.1U25Y
R69 X_1KR0402
H_D#[0..63]6
CPU SIGNAL BLOCK
H_A#[3..31]6
H_A#6
H_A#8
H_A#14
H_A#12
H_A#11
H_A#13
H_A#15
A16#W5A15#V4A14#V5A13#U4A12#U5A11#T4A10#
D29#
D28#
D27#
D26#
D25#
D24#
F14
F12
E13
D13
G14
G13
H_D#28
H_D#25
H_D#26
H_D#27
H_D#24
H_A#10
H_D#23
AD6
A22#
D35#
G18
H_A#21
AA4
A21#
D34#
E16
H_D#34
H_A#20
E15
H_D#33
H_A#19
H_A#17
H_A#18
AB6
A20#Y4A19#Y6A18#W6A17#
D33#
D32#
D31#
F15
G16
G15
H_D#32
H_D#30
H_D#31
H_A#16
D30#
H_D#29
H_A#25
AF4
F20
H_A#27
AF5
A28#
D41#
E19
H_D#40
H_A#26
AB4
A27#
D40#
E18
H_D#39
AC5
A26#
D39#
F18
H_D#38
H_A#24
AB5
A25#
D38#
F17
H_D#37
H_A#23
AA5
A24#
D37#
G17
H_D#36
H_A#22
A23#
D36#
H_D#35
H_A#30
H_A#31
H_A#29
AJ6
AJ5
AH5
AH4
AG5
AG4
A35#
D48#
G22
H_D#47
A34#
D47#
D22
H_D#46
A33#
D46#
E22
H_D#45
A32#
D45#
G21
H_D#44
A31#
D44#
F21
H_D#43
A30#
D43#
H_D#42
AG6
A29#
D42#
E21
H_D#41 H_A#28
U5A
H_DBI#0
H_DBI#1
H_DBI#2
H_DBI#3
H_IERR#4
H_FERR#4,10
H_INIT#10
H_DBSY#6
H_TRDY#6
H_ADS#6
H_LOCK#6
H_BNR#6
H_HIT#6
H_HITM#6
H_BPRI#6
H_TDI
H_TDO
H_TMS
H_TRST#
H_TCK
H_TEMP_RET
H_TEMP_SRC
CPU_BOOT
H_SLP#10
CPU_BSEL013
CPU_BSEL113
CPU_BSEL213
3 4
1 2
1 2
5 6
7 8
H_PWRGD4,10
H_D#63
H_D#62
H_D#61
H_D#60
H_D#59
H_D#58
H_D#57
H_D#56
H_D#55
H_D#54
G11
D19
C20
AB2
AB3
AD3
AD1
AF1
AC1
AG1
AE1
AL1
AK1
AE8
AL2
AH2
AE6
G10
D16
A20
AA2
G29
H30
G30
G23
B22
A22
A19
B19
B21
C21
B18
A17
B16
C18
A8
F2
R3
M3
P3
H4
B2
C1
E3
D2
C3
C2
D4
E4
G8
G7
M2
N2
P2
K3
L2
N5
C9
Y1
V2
N1
DBI0#
DBI1#
DBI2#
DBI3#
EDRDY#
IERR#
MCERR#
FERR#/PBE#
STPCLK#
BINIT#
INIT#
RSP#
DBSY#
DRDY#
TRDY#
ADS#
LOCK#
BNR#
HIT#
HITM#
BPRI#
DEFER#
TDI
TDO
TMS
TRST#
TCK
THERMDA
THERMDC
THERMTRIP#
GND/SKTOCC#
PROCHOT#
IGNNE#
SMI#
A20M#
SLP#
RSVD
RESERVED0
RESERVED1
RESERVED2
RESERVED3
RESERVED4
RESERVED5
BOOTSELECT
LL_ID0
LL_ID1
BSEL0
BSEL1
BSEL2
PWRGOOD
RESET#
D63#
D62#
D61#
D60#
D59#
D58#
D57#
D56#
D55#
D54#
D53#
D52#
B15
C14
H_D#53
H_D#52
D51#
C15
H_D#51
D50#
A14
H_D#50
D49#
D17
H_D#49
D20
H_D#48
H_A#7
H_A#9
U6
A9#T5A8#R4A7#M4A6#L4A5#M5A4#P6A3#
D23#
D22#
D21#
D20#D7D19#E9D18#F9D17#F8D16#G9D15#
F11
E10
D10
H_D#20
H_D#21
H_D#22
H_D#19
H_A#5
H_D#18
H_A#4
H_D#17
H_A#3
L5
H_D#16
D11
H_D#15
AC2
DBR#
D14#
C12
H_D#14
D13#
B12
H_D#13
AN4
AN3
VCC_SENSE
D12#D8D11#
C11
H_D#12
H_D#11
VSS_SENSE
AN5
RSVD
D10#
B10
H_D#10
AN6
RSVD
D9#
D8#
A11
A10
H_D#8
H_D#9
AJ3
AK3
ITP_CLK1
ITP_CLK0
D7#A7D6#B7D5#B6D4#A5D3#C6D2#A4D1#C5D0#
H_D#7
H_D#6
H_D#5
VCC_SENSE
VSS_SENSE
VID[0..5] 25
VID0
VID1
VID3
VID5
VID2
VID4
AM5
AL4
AK4
AL6
AM3
AL5
AM2
RSVD
VID5#
VID4#
VID3#
VID2#
VID1#
VID0#
H1
GTLREF
AG3
BPM5#
AF2
BPM4#
AG2
BPM3#
AD2
BPM2#
AJ1
BPM1#
AJ2
BPM0#
G5
PCREQ#
J6
REQ4#
K6
REQ3#
M6
REQ2#
J5
REQ1#
K4
REQ0#
W2
TESTHI12
P1
TESTHI11
H5
TESTHI10
G4
TESTHI9
G3
TESTHI8
F24
TESTHI7
G24
TESTHI6
G26
TESTHI5
G27
TESTHI4
G25
TESTHI3
F25
TESTHI2
W3
TESTHI1
F26
TESTHI0
AK6
RSVD
G6
RSVD
G28
BCLK1#
F28
BCLK0#
A3
RS2#
F5
RS1#
B3
RS0#
U3
AP1#
U2
AP0#
F3
BR0#
R1
COMP3
G2
COMP2
T1
COMP1
A13
COMP0
J17
DP3#
H16
DP2#
H15
DP1#
J16
DP0#
AD5
ADSTB1#
R6
ADSTB0#
C17
DSTBP3#
G19
DSTBP2#
E12
DSTBP1#
B9
DSTBP0#
A16
DSTBN3#
G20
DSTBN2#
G12
DSTBN1#
C8
DSTBN0#
L1
LINT1/NMI
B4
K1
TEJAS
LINT0/INTR
H_D#0
H_D#3
H_D#2
H_D#4
H_D#1
CPU_GTLREF
H_BPM#5
H_BPM#4
H_BPM#3
H_BPM#2
H_BPM#1
H_BPM#0
H_PCREQ#
H_REQ#4
H_REQ#3
H_REQ#2
H_REQ#1
H_REQ#0
H_TESTHI12
H_TESTHI11
H_TESTHI10
H_TESTHI9
H_TESTHI8
H_TESTHI2_7
H_TESTHI1
H_TESTHI0
RSVD_AK6
RSVD_G6
H_RS#2
H_RS#1
H_RS#0
TEST-U3
TEST-U2
H_COMP3
H_COMP2
H_COMP1
H_COMP0
TEST-J17
TEST-H16
TEST-H15
TEST-J16
R55 0R
R52 0R
VID3
VID1
VID2
VID4
VID0
VID5
RN5B 8P4R-51R
RN5D 8P4R-51R
RN8C 8P4R-51R
RN4B 8P4R-51R
RN4C 8P4R-51R
H_PCREQ# 6
H_REQ#[0..4] 6
R72 62
1 2
3 4
5 6
7 8
R110 62R
R70 62R
R111 62R
R64 X_62R
R74 X_62R
CK_H_CPU# 13
CK_H_CPU 13H_A20M#10
H_RS#[0..2] 6
T2
T1
H_BR#0 4,6
R75 100R1%
R84 100R1%
R71 60.4R1%
R113 60.4R1%
T4
T7
PLACE RESISTORS OUTSIDE SOCKET
T6
CAVITY IF NO ROOM FOR VARIABLE
T3
RESISTOR DON'T PLACE
H_ADSTB#1 6
H_ADSTB#0 6H_CPURST#4,6
H_DSTBP#3 6
H_DSTBP#2 6
H_DSTBP#1 6
H_DSTBP#0 6
H_DSTBN#3 6
H_DSTBN#2 6
H_DSTBN#1 6
H_DSTBN#0 6
H_NMI 10
H_INTR 10
VCC_VRM_SENSE 25
VSS_VRM_SENSE 25
RN3
8P4R-680R
1
3
5
7
R59 680R
R56 680R
CPU_GTLREF 4
RN4A
12
34
78
56
34
56
VTT_OUT_RIGHT
RN14
8P4R-62
VTT_OUT_LEFT
2
4
6
8
VTT_OUT_RIGHT
C35
C0.1U25Y
V_FSB_VTT 4,6,8,12,13,24
VTT_OUT_RIGHT 4
VTT_OUT_LEFT 4,5
C57
X_C0.1U25Y
C41
C0.1U25Y
MSI
Title
Size Document Number Rev
Date: Sheet
MICRO-STAR INt'L CO., LTD.
Intel LGA775 CPU - Signals
MS-7174H1
331Thursday, June 30, 2005
of
1B
VCCP
AF19
AF18
AF15
AF14
AF12
AF11
AE9
AE23
AE22
AE21
AE19
AE18
AE15
AE14
AE12
AE11
AD8
AD30
AD29
AD28
AD27
AD26
AD25
AD24
AD23
AC8
AC30
AC29
AC28
AC27
AC26
AC25
AC24
AC23
AB8
AA8
U5B
VCCP
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCCP
AF22
AF21
VCC
VCC
Y8
Y30
V_FSB_VTT
C140 C10U10Y0805
C121 C10U10Y0805
AF8
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCCU8VCCV8VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCCW8VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
Y23
Y24
Y25
Y26
Y27
Y28
Y29
W30
W29
W28
W27
W26
W25
W24
W23
U30
U29
U28
U27
U26
U25
AH28
AH29
AH30
AH8
AH9
AJ11
AJ12
AJ14
AJ15
AJ18
AJ19
AJ21
AJ22
AJ25
AJ26
AJ8
AJ9
AK11
AK12
AK14
AK15
AK18
AK19
AK21
AK22
AK25
AK26
AK8
AK9
AL11
AL12
AL14
AL15
AL18
AL19
AL21
AL22
AL25
AL26
AL29
AL30
AL8
AL9
AM11
AM12
AM14
AM15
AM18
AM19
AM21
AM22
AM25
AM26
AM29
AM30
AM8
AM9
AN11
AN12
AN14
AN15
AN18
AN19
AN21
AN22
VCC
VCC
VCC
VCC
VCC
VCC
VCC
U24
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCCA
VSSA
RSVD
VCC-IOPLL
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTTPWRGD
VTT_OUT
VTT_OUT
VTT_SEL
RSVD/VTT_PKGSENSE
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCCJ8VCCJ9VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCCK8VCCL8VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCCM8VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCCN8VCCP8VCCR8VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCCT8VCC
VCC
J10
J11
J12
J13
J14
J15
J18
J19
J20
J21
J22
J23
J24
J25
J26
J27
J28
J29
U23
T30
N30
N29
N28
N27
N26
N25
N24
N23
M30
M29
M28
M27
M26
M25
M24
M23
K26
K27
K28
K29
K30
T23
T24
T25
T26
T27
T28
T29
J30
K23
K24
K25
AN8
AN9
HS11HS22HS33HS4
4
AN25
AN26
AN29
AN30
A23
B23
D23
C23
A25
A26
A27
A28
A29
A30
B25
B26
B27
B28
B29
B30
C25
C26
C27
C28
C29
C30
D25
D26
D27
D28
D29
D30
VTT_PWG
AM6
VTT_OUT_RIGHT
AA1
VTT_OUT_LEFT
J1
F27
F29
TEJAS
V_FSB_VTT
H_VSSA
V_FSB_VTT
AH27
AH26
AH25
AH22
AH21
AH19
AH18
AH15
AH14
AH12
AH11
AG9
AG8
AG30
AG29
AG28
AG27
AG26
AG25
AG22
AG21
AG19
AG18
AG15
AG14
AG12
AG11
AF9
C92 X_22u-1206_X5R
CAPS FOR FSB GENERIC
V_FSB_VTT
VTT_OUT_LEFT CPU_GTLREF
GTLREF VOLTAGE SHOULD BE
0.67*VTT = 0.8V
R83 49.9R1%
R82
100R1%
PLACE AT CPU END OF ROUTE
VTT_OUT_RIGHT3
VTT_OUT_LEFT3,5
VTT_OUT_RIGHT
VTT_OUT_LEFT
R63 62R
R61 X_120R
R80 100R
R85 62R
PLACE AT ICH END OF ROUTE
V_FSB_VTT3,6,8,12,13,24
V_FSB_VTT
R250 62R
R252 62R
R115 62R
PLACE COMPONENTS AS CLOSE AS POSSIBLE TO PROCESSOR SOCKET
TRACE WIDTH TO CAPS MUST BE SMALLER THAN 12MILS
V_FSB_VTT V_FSB_VTT
CPU_GTLREF 3
C54
C0.1U25Y C89
TRMTRIP#
H_FERR#
H_IERR#
C53
C220P50N
H_CPURST#
H_PROCHOT#
H_PWRGD
H_BR#0
H_CPURST# 3,6
H_PROCHOT# 3
H_PWRGD 3,10
H_BR#0 3,6
TRMTRIP# 3,10
H_FERR# 3,10
H_IERR# 3
VTT_OUT_LEFT
VCC5_SB
R12
1KR
VID_GD#24,25
R7 1KR
C88
C1U10Y
C1U10Y
R58
1.25V VTT_PWRGOOD
680R
VTT_PWG
Q4
2N3904S
H_VSSA
V_FSB_VTT
Title
Size Document Number Rev
Date: Sheet
MICRO-STAR INt'L CO., LTD.
MSI
Intel LGA775 CPU - Power
MS-7174H1
431Thursday, June 30, 2005
1B
of
VTT_OUT_LEFT3,4
U5C
A12
VSS
A15
VSS
A18
VSS
A2
VSS
A21
VSS
A24
VSS
A6
VSS
A9
VSS
AA23
VSS
AA24
VSS
AA25
VSS
AA26
VSS
AA27
VSS
AA28
VSS
AA29
VSS
AA3
VSS
AA30
VSS
AA6
VSS
AA7
VSS
AB1
VSS
AB23
VSS
AB24
VSS
AB25
VSS
AB26
VSS
AB27
VSS
AB28
VSS
AB29
VSS
AB30
VSS
AB7
VSS
AC3
VSS
AC6
VSS
AC7
VSS
AD4
VSS
AD7
VSS
AE10
VSS
AE13
VSS
AE16
VSS
AE17
VSS
AE2
VSS
AE20
VSS
AE24
VSS
AE25
VSS
AE26
VSS
AE27
VSS
AE28
VSS
R73 X_60.4R1%
R76 X_60.4R1%
T10
TEST-E23
AC4
AE3
AE4
D14
E23
RSVD
RSVD
RSVD
RSVDD1RSVD
VSS
VSS
VSS
VSS
VSS
VSS
AE5
AE7
AF10
AF13
AE29
AF16
AE30
E24
RSVD
RSVD
VSS
VSS
AF17
AF20
T9
T8
T5
TEST-E7
TEST-F23
TEST-F6
F23
RSVDE5RSVDE6RSVDE7RSVD
RSVDF6RSVD
VSS
VSS
VSS
VSS
VSS
AF23
AF24
AF25
AF26
B13
RSVDH2RSVDJ2RSVDJ3RSVDN4RSVDP5RSVDT2RSVDV1RSVDW1RSVD
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
AF3
AF6
AF27
AF7
AF28
AF29
AF30
AG10
AG13
VSS
Y3
VSS
VSS
AG16
AG17
VSSY7VSSY5VSSY2VSSW7VSSW4VSSV7VSSV6VSS
VSS
VSS
VSS
VSS
VSS
VSS
AH1
AG7
AH10
AG20
AG23
AG24
V30
V29
V28
V27
V26
V25
V24
V23
VSSV3VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSSU7VSSU1VSST7VSST6VSST3VSSR7VSSR5VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
AH3
AH6
AH7
AJ10
AJ13
AJ16
AH13
AH16
AH17
AH20
AH23
AH24
AJ17
R30
R29
R28
R27
R26
R25
R24
R23
P30
P29
P28
P27
P26
P25
P24
P23
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSSR2VSSP7VSSP4VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSSN7VSSN6VSSN3VSSM7VSSM1VSSL7VSSL6VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
AJ4
AJ7
AJ20
AJ23
AJ24
AJ27
AJ28
AJ29
AJ30
AK2
AK10
AK13
AK16
AK17
AK20
AK23
AK5
AK7
AL10
AL13
AK24
AK27
AK28
AK29
AL16
AK30
AL17
VSS
AL20
VSS
AL23
VSS
AL24
VSS
AL27
VSS
L30
AL28
VSS
VSSL3VSS
VSS
AL3
L29
AL7
VSS
L28
AM1
VSS
VSS
L27
AM10
VSS
VSS
L26
VSS
VSS
AM13
L25
AM16
VSS
VSS
L24
AM17
VSS
VSS
L23
AM20
VSS
VSS
K5
VSSK7VSS
VSS
AM23
AM24
VSS
K2
VSS
VSS
VSS
AM4
AM27
AM28
H29
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSSH3VSSH6VSSH7VSSH8VSSH9VSSJ4VSSJ7VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSSB1VSS
VSS
B11
AN1
AM7
AN2
AN10
AN13
AN16
AN17
AN20
AN23
AN24
B14
AN7
AN27
AN28
TEJAS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
H14
H13
H12
H11
H10
G1
F7
F4
F22
F19
F16
F13
F10
E8
E29
E28
E27
E26
E25
E20
E2
E17
E14
E11
D9
D6
D5
D3
D24
D21
D18
D15
D12
C7
C4
C24
C22
C19
C16
C13
C10
B8
B5
B24
B20
B17
H17
H18
H19
H20
H21
H22
H23
H24
H25
H26
H27
H28
MSI
Title
Size Document Number R ev
Date: Sheet
MICRO-STAR INt'L CO., LTD.
Intel LGA775 CPU - GND
MS-7174H1
531Thursday, June 30, 2005
of
1B
H_A#[3..31]3
H_REQ#[0..4]3
ICH_SYNC#
H_ADSTB#03
H_ADSTB#13
H_PCREQ#3
H_BR#03,4
H_BPRI#3
H_BNR#3
H_LOCK#3
H_ADS#3
H_HIT#3
H_HITM#3
H_DEFER#3
H_TRDY#3
H_DBSY#3
H_DRDY#3
H_EDRDY#3
H_RS#[0..2]3
CK_H_MCH13
CK_H_MCH#13
H_CPURST#3,4
ICH_SYNC#11
R216 8.2KR
R134
20R1%
V_FSB_VTT3,4,8,12,13,24
PWRGD11,24
PLTRST#10,24
V_2P5_MCH
HXRCOMP
H_A#3
H_A#4
H_A#5
H_A#6
H_A#7
H_A#8
H_A#9
H_A#10
H_A#11
H_A#12
H_A#13
H_A#14
H_A#15
H_A#16
H_A#17
H_A#18
H_A#19
H_A#20
H_A#21
H_A#22
H_A#23
H_A#24
H_A#25
H_A#26
H_A#27
H_A#28
H_A#29
H_A#30
H_A#31
H_REQ#0
H_REQ#1
H_REQ#2
H_REQ#3
H_REQ#4
H_RS#0
H_RS#1
H_RS#2
HXRCOMP
HXSCOMP
HXSWING
MCH_GTLREF
AC11
AB11
U7A
H29
HA3#
K29
HA4#
J29
HA5#
G30
HA6#
VCCNCTF
HA7#
HA8#
HA9#
HA10#
HA11#
HA12#
HA13#
HA14#
HA15#
HA16#
HA17#
HA18#
HA19#
HA20#
HA21#
HA22#
HA23#
HA24#
HA25#
HA26#
HA27#
HA28#
HA29#
HA30#
HA31#
HAD_STB0#
HAD_STB1#
HPCREQ#
BREQ0#
BPRI#
BNR#
HLOCK#
ADS#
HREQ0#
HREQ1#
HREQ2#
HREQ3#
HREQ4#
HIT#
HITM#
DEFER#
HTRDY#
DBSY#
DRDY#
HEDRDY#
RS0#
RS1#
RS2#
HCLKP
HCLKN
PWROK
CPURST#
RSTIN#
ICH_SYNC#
HDRCOMP
HDSCOMP
HDSWING
HDVREF
HS11HS33HS55HS7
VCCNCTF
7
C144
X_C2.2P50N
G32
K30
L29
M30
L31
L28
J28
K27
K33
M28
R29
L26
N26
M26
N31
P26
N29
P28
R28
N33
T27
T31
U28
T26
T29
J31
N27
E31
R33
E30
M35
L33
M31
F33
E32
H31
G31
F31
L34
N35
J35
N34
L35
M32
P33
K34
P34
J32
M23
M22
AG7
G24
AF7
M14
B23
D24
A23
A24
R127 60.4R1%/04
V_1P5_CORE
Y20
Y19
Y17
Y16
W20
W16
U20
U16
T20
T19
T17
T16
AA13
AA14
AA16
AA18
AA20
AA21
AA22
AA23
AA24
AB13
AB14
AB15
AB16
AB17
AB18
AB19
AB20
AB21
AB22
AB23
AB24
N13
N14
N15
N16
N18
N20
N21
P13
P14
P15
P17
P19
P21
P22
R13
R14
R15
R16
R18
R20
R22
R23
T13
T14
T15
T21
T23
T24
U13
U14
U22
U24
V13
V14
V15
V21
V23
V24
W13
W14
W22
W24
Y13
Y14
Y15
Y21
Y23
Y24
HD0#
HD1#
HD2#
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
AP1
AR2NCAR1
AP35
HXSWING
C146
C0.01U50X
NCB1NC
B35
A34
RSVRD
RSVRD
RSVRD
RSVRD
RSVRD
RSVRD
RSVRD
RSVRD
RSVRD
RSVRD
RSVRD
RSVRD
RSVRD
RSVRD
RSVRD
RSVRD
RSVRD
RSVRD
RSVRD
RSVRD
RSVRD
RSVRD
RSVRD
RSVRD
RSVRD
RSVRD
RSVRD
RSVRD
RSVRD
RSVRD
V31
V30
V32
Y30
U30
R31
AJ24
AJ23
AJ18
AL20
AK18
HXSCOMP
AJ20
AJ21
AL21
AK21
AK24
AB29
V_FSB_VTT
R30
AA31
AA30
AC12
AC13
AC14
AC15
AC16
R125
49.9R1%
R124
100R1%
RSVRD
J12
T12
P12NCP23NCP24
AC17
AC18
N12NCN22NCN23NCN24
AC19
AC20
AC21
AC22
GTLREF VOLTAGE SHOULD BE 0.67*VTT=0.8V
100 OHM OVER 210 RESISTORS HD_SWING VOLTAGE "10 MIL TRACE , 7 MIL
MCH_GTLREF
C138
C0.1U25Y
C141
X_C220P16X0603
R12NCR24
U12
V12
Y12
W12
AL28
AA12NCAB12
AC23NCAC24NCAN19
AG6
AJ14
AH24
V_FSB_VTT
L19NCL12
P30
K12
AD30
H17NCH15NCH12
G12
F24NCF12
E16
C16
AR35NCAR34
SPACE" HD_SWING S/B 1/3*VTT +/- 2%
PLACE DIVIDER RESISTOR NEAR VTT
R130
301R1%
R133
102R1%
VCCNCTF
VCCNCTF
VCCNCTF
HD_STBP0#
HD_STBN0#
HD_STBP1#
HD_STBN1#
HD_STBP2#
HD_STBN2#
HD_STBP3#
HD_STBN3#
NC
GRANTSDALE
A2
VCCNCTF
HD3#
HD4#
HD5#
HD6#
HD7#
HD8#
HD9#
HD10#
HD11#
HD12#
HD13#
HD14#
HD15#
HD16#
HD17#
HD18#
HD19#
HD20#
HD21#
HD22#
HD23#
HD24#
HD25#
HD26#
HD27#
HD28#
HD29#
HD30#
HD31#
HD32#
HD33#
HD34#
HD35#
HD36#
HD37#
HD38#
HD39#
HD40#
HD41#
HD42#
HD43#
HD44#
HD45#
HD46#
HD47#
HD48#
HD49#
HD50#
HD51#
HD52#
HD53#
HD54#
HD55#
HD56#
HD57#
HD58#
HD59#
HD60#
HD61#
HD62#
HD63#
DINV_0#
DINV_1#
DINV_2#
DINV_3#
CAPS SHOULD BE PLACED NEAR MCH PIN
H_D#0
J33
H_D#1
H33
H_D#2
J34
H_D#3
G35
H_D#4
H35
H_D#5
G34
H_D#6
F34
H_D#7
G33
H_D#8
D34
H_D#9
C33
H_D#10
D33
H_D#11
B34
H_D#12
C34
H_D#13
B33
H_D#14
C32
H_D#15
B32
H_D#16
E28
H_D#17
C30
H_D#18
D29
H_D#19
H28
H_D#20
G29
H_D#21
J27
H_D#22
F28
H_D#23
F27
H_D#24
E27
H_D#25
E25
H_D#26
G25
H_D#27
J25
H_D#28
K25
H_D#29
L25
H_D#30
L23
H_D#31
K23
H_D#32
J22
H_D#33
J24
H_D#34
K22
H_D#35
J21
H_D#36
M21
H_D#37
H23
H_D#38
M19
H_D#39
K21
H_D#40
H20
H_D#41
H19
H_D#42
M18
H_D#43
K18
H_D#44
K17
H_D#45
G18
H_D#46
H18
H_D#47
F17
H_D#48
A25
H_D#49
C27
H_D#50
C31
H_D#51
B30
H_D#52
B31
H_D#53
A31
H_D#54
B27
H_D#55
A29
H_D#56
C28
H_D#57
A28
H_D#58
C25
H_D#59
C26
H_D#60
D27
H_D#61
A27
H_D#62
E24
H_D#63
B25
H_DBI#0
E34
H_DBI#1
J26
H_DBI#2
K19
H_DBI#3
B26
E33
E35
H26
F26
J19
F19
B29
C29
MSI
Title
Size Document Number Rev
Date: Sheet
H_DSTBP#0 3
H_DSTBN#0 3
H_DSTBP#1 3
H_DSTBN#1 3
H_DSTBP#2 3
H_DSTBN#2 3
H_DSTBP#3 3
H_DSTBN#3 3
MICRO-STAR INt'L CO., LTD.
Intel Grantsdale - CPU Signals
H_D#[0..63] 3
MS-7174H1
H_DBI#[0..3] 3
631Thursday, June 30, 2005
of
1B
SCS_A#[0..1]18,19
RAS_A#18,19
CAS_A#18,19
WE_A#18,19
MAA_A[0..13]18,19
ODT_A[0..1]18,19
SBS_A[0..2]18,19
DQS_A018
DQS_A#018
DQS_A118
DQS_A#118
DQS_A#218
DQS_A318
DQS_A#318
DQS_A418
DQS_A#418
DQS_A518
DQS_A#518
DQS_A618
DQS_A#618
DQS_A718
DQS_A#718
P_DDR0_A18
N_DDR0_A18
P_DDR1_A18
N_DDR1_A18
P_DDR2_A18
N_DDR2_A18
SM_XSLEWIN
MCH_VREF_A
SMPCOMP_P
SMPCOMP_N
R20240.2R1%
R20340.2R1%
MCH_VREF_A
PLACE 0.1UF CAP CLOSE TO MCH
DATA_A[0..63]18
SCS_A#0
SCS_A#1
RAS_A#
CAS_A#
WE_A#
MAA_A1
MAA_A2
MAA_A3
MAA_A4
MAA_A5
MAA_A6
MAA_A7
MAA_A8
MAA_A9
MAA_A10
MAA_A11
MAA_A12
MAA_A13
ODT_A0
ODT_A1
SBS_A0
SBS_A1
SBS_A2
DQS_A0
DQS_A#0
DQS_A1
DQS_A#1
DQS_A2
DQS_A#2
DQS_A3
DQS_A#3
DQS_A4
DQS_A#4
DQS_A5
DQS_A#5
DQS_A6
DQS_A#6
DQS_A7
DQS_A#7
P_DDR0_A
N_DDR0_A
P_DDR1_A
N_DDR1_A
P_DDR2_A
N_DDR2_A
SOCOMP1
SOCOMP0
SMPCOMP_P
AR29
AP32
AR28
AN31
AP27
AN29
AN28
AP26
AR24
AL24
AP23
AR23
AP22
AN23
AP21
AN22
AN21
AM27
AM21
AR20
AP31
AP30
AN32
AP29
AP33
AR27
AN27
AN20
AG1
AG2
AL3
AL2
AP7
AR7
AF17
AG17
AM30
AL29
AG35
AG33
AA34
AA35
U34
U35
AN26
AP25
AM2
AM3
AC34
AC35
AN25
AM24
AN3
AN2
AC33
AB34
AB33
AH15
AE16
AJ12
AK12
AE7
AG8
AG4
AE5
AF5
C262
C0.1U25Y
DATA_B[0..63]18
U7B
SACS0#
SACS1#
SACS2#
SACS3#
SARAS#
SACAS#
SAWE#
SAMA0
SAMA1
SAMA2
SAMA3
SAMA4
SAMA5
SAMA6
SAMA7
SAMA8
SAMA9
SAMA10
SAMA11
SAMA12
SAMA13
SAODT0
SAODT1
SAODT2
SAODT3
SABA0
SABA1
SABA2
SADQS0
SADQS0#
SADQS1
SADQS1#
SADQS2
SADQS2#
SADQS3
SADQS3#
SADQS4
SADQS4#
SADQS5
SADQS5#
SADQS6
SADQS6#
SADQS7
SADQS7#
SACK0
SACK0#
SACK1
SACK1#
SACK2
SACK2#
SACK3
SACK3#
SACK4
SACK4#
SACK5
SACK5#
SADDR1MA13
SARCVENOUT#
SARCVENIN#
SMSLEWIN0
SMSLEWOUT0
SMVREF0
SMRCOMP1
SMRCOMP0
SMOCDCOMP1
SMOCDCOMP0
VCC_DDR
R208 80.6R1%R210 80.6R1%
C0.1U25Y
C263
DATA_A0
AE3
DATA_A1
AF3
SADQ0
SADQ1
DATA_A2
AH3
AH4
DATA_B0
DATA_A3
AJ2
SADQ2
SADQ3
SBDQ0
SBDQ1
AJ6
DATA_B1
DATA_A4
AE2
SADQ4
SBDQ2
AL6
DATA_B2
DATA_A5
AE1
SADQ5
SBDQ3
AN6
DATA_B3
DATA_A6
AG3
SADQ6
SBDQ4
AG9
DATA_B4
DATA_A7
AH2
AH7
DATA_B5
DATA_A9
DATA_A8
DATA_A10
AK2
AK3
AN4
SADQ7
SADQ8
SADQ9
SADQ10
SBDQ5
SBDQ6
SBDQ7
SBDQ8
AJ8
AL5
AM5
DATA_B6
DATA_B7
DATA_B8
SMPCOMP_N
DATA_A12
DATA_A11
AP4
AJ1
SADQ11
SBDQ9
AL8
AF11
DATA_B9
DATA_B10
DATA_A14
DATA_A13
AJ3
AP2
SADQ12
SADQ13
SBDQ10
SBDQ11
AJ7
AE11
DATA_B11
DATA_B12
DATA_A15
DATA_A16
AP3
AR5
SADQ14
SADQ15
SBDQ12
SBDQ13
AL7
AG10
DATA_B13
DATA_B14
DATA_A17
DATA_A18
AP6
AP9
SADQ16
SADQ17
SBDQ14
SBDQ15
AF13
AG11
DATA_B16
DATA_B15
DATA_A19
DATA_A20
AN9
AN5
SADQ18
SADQ19
SBDQ16
SBDQ17
AH12
AD14
DATA_B18
DATA_B17
DATA_A21
DATA_A22
AP5
AN8
SADQ20
SADQ21
SBDQ18
SBDQ19
AD15
AD12
DATA_B19
DATA_B20
DATA_A24
DATA_A23
AR8
AL17
SADQ22
SADQ23
SBDQ20
SBDQ21
AE13
AG14
DATA_B21
DATA_B22
DATA_A25
DATA_A26
AJ17
AF19
SADQ24
SADQ25
SBDQ22
SBDQ23
AF14
AK19
DATA_B23
DATA_B24
DATA_A27
DATA_A28
AH18
AK16
SADQ26
SADQ27
SBDQ24
SBDQ25
AH19
AH21
DATA_B25
DATA_B26
DATA_A29
DATA_A30
AF16
AD17
SADQ28
SADQ29
SBDQ26
SBDQ27
AD21
AD18
DATA_B27
DATA_B28
DATA_A32
DATA_A31
AE19
AK27
SADQ30
SADQ31
SADQ32
SBDQ28
SBDQ29
SBDQ30
AL18
AE22
DATA_B29
DATA_B30
DATA_A33
AJ28
SADQ33
SBDQ31
AF22
DATA_B31
DATA_A35
DATA_A34
AL31
AK31
SADQ34
SBDQ32
AF24
AF25
DATA_B32
DATA_B33
DATA_A37
DATA_A36
AH27
AL27
SADQ35
SADQ36
SBDQ33
SBDQ34
AJ26
AL26
DATA_B34
DATA_B35
DATA_A39
DATA_A38
AN30
AL30
SADQ37
SADQ38
SBDQ35
SBDQ36
AF23
AD23
DATA_B36
DATA_B37
SCKE_A[0..1]18,19
DATA_A40
DATA_A41
AH33
AH35
SADQ39
SADQ40
SBDQ37
SBDQ38
AJ25
AL25
DATA_B38
DATA_B39
DATA_A43
DATA_A42
AF33
AE33
SADQ41
SADQ42
SBDQ39
SBDQ40
AJ31
AK32
DATA_B41
DATA_B40
DATA_A45
DATA_A44
AJ33
AJ34
SADQ43
SADQ44
SBDQ41
SBDQ42
AF28
AG31
DATA_B42
DATA_B43
DATA_A46
DATA_A47
AG32
AF34
SADQ45
SADQ46
SBDQ43
SBDQ44
AJ29
AK33
DATA_B44
DATA_B45
DATA_A49
DATA_A48
AD31
AD35
SADQ47
SADQ48
SBDQ45
SBDQ46
AG30
AG27
DATA_B47
DATA_B46
DATA_A51
DATA_A50
Y33
W34
SADQ49
SADQ50
SBDQ47
SBDQ48
AF27
AE27
DATA_B48
DATA_B49
SCKE_B[0..1]18,19
DATA_A52
DATA_A53
AE35
AE34
SADQ51
SADQ52
SBDQ49
SBDQ50
AB26
AC26
DATA_B50
DATA_B51
DQM_A[0..7]18
DATA_A55
DATA_A54
AA32
Y35
SADQ53
SADQ54
SBDQ51
SBDQ52
AE31
AE29
DATA_B52
DATA_B53
DQM_B[0..7]18
DATA_A56
DATA_A57
V34
V33
SADQ55
SADQ56
SBDQ53
SBDQ54
AB27
AC28
DATA_B54
DATA_B55
DATA_A59
DATA_A58
R32
R34
SADQ57
SADQ58
SBDQ55
SBDQ56
W29
AA28
DATA_B56
DATA_B57
DATA_A60
DATA_A61
W35
W33
SADQ59
SADQ60
SBDQ57
SBDQ58
V28
V29
DATA_B58
DATA_B59
DATA_A63
DATA_A62
T33
T35
SADQ61
SADQ62
SBDQ59
SBDQ60
Y26
AA29
DATA_B60
DATA_B61
SCKE_A0
AP19
SADQ63
SBDQ61
SBDQ62
U26
W26
DATA_B62
DATA_B63
SCKE_A1
AM18
AN18
SACKE0
SACKE1
SBDQ63
AP10
SCKE_B0
AR19
SACKE2
SACKE3
SBCKE0
SBCKE1
AR9
AN10
SCKE_B1
DQM_A1
DQM_A0
AF2
AL1
SADM0
SBCKE2
SBCKE3
AM9
DQM_A2
AN7
SADM1
SADM2
SBDM7
W31
DQM_B7
DQM_A4
DQM_A3
AH16
SADM3
SBDM6
AD24
DQM_B6
DQM_B5
AK29
AH31
DQM_A5
DQM_A6
DQM_A7
AG34
AA33
U33
SADM4
SADM5
SADM6
SBRCVENOUT#
SMSLEWOUT1
SBDM3
SBDM4
SBDM5
AH13
AG20
AG24
DQM_B3
DQM_B4
DQM_B2
SBCS0#
SBCS1#
SBCS2#
SADM7
SBCS3#
SBRAS#
SBCAS#
SBWE#
SBMA0
SBMA1
SBMA2
SBMA3
SBMA4
SBMA5
SBMA6
SBMA7
SBMA8
SBMA9
SBMA10
SBMA11
SBMA12
SBMA13
SBODT0
SBODT1
SBODT2
SBODT3
SBBA0
SBBA1
SBBA2
SBDQS0
SBDQS0#
SBDQS1
SBDQS1#
SBDQS2
SBDQS2#
SBDQS3
SBDQS3#
SBDQS4
SBDQS4#
SBDQS5
SBDQS5#
SBDQS6
SBDQS6#
SBDQS7
SBDQS7#
SBCK0
SBCK0#
SBCK1
SBCK1#
SBCK2
SBCK2#
SBCK3
SBCK3#
SBCK4
SBCK4#
SBCK5
SBCK5#
SBDDR1MA13
SBRCVENIN#
SMSLEWIN1
SMVREF1
SBDM0
SBDM1
SBDM2
AJ5
AH9
DQM_B1
DQM_B0
SCS_B#0
AN33
SCS_B#1
AM34
AP34
AN34
RAS_B#
AN17
CAS_B#
AP18
WE_B#
AP17
MAA_B0MAA_A0
AM15
MAA_B1
AR15
MAA_B2
AN15
MAA_B3
AL15
MAA_B4
AP14
MAA_B5
AM12
MAA_B6
AP13
MAA_B7
AL12
MAA_B8
AN13
MAA_B9
AR12
MAA_B10
AP15
MAA_B11
AP11
MAA_B12
AR11
MAA_B13
AL33
ODT_B0
AM33
ODT_B1
AL34
AL35
AK34
SBS_B0
AR16
SBS_B1
AN16
SBS_B2
AN11
DQS_B0
AK5
DQS_B#0
AL4
DQS_B1
AK10
DQS_B#1
AH10
DQS_B2
AK13
DQS_B#2
AL14
DQS_B3
AD20
DQS_B#3
AF20
DQS_B4
AH25
DQS_B#4
AG26
DQS_B5
AH28
DQS_B#5
AH30
DQS_B6
AB31
DQS_B#6
AC30
DQS_B7
W27
DQS_B#7
Y28
P_DDR0_B
AH22
N_DDR0_B
AG23
P_DDR1_B
AK9
N_DDR1_B
AL9
P_DDR2_B
AE26
N_DDR2_B
AE25
AL23
AK22
AJ11
AL11
AD28
AD29
AD32
AK15
AN14
SM_YSLEWIN
AF9
AE10
MCH_VREF_A
AE8
PLACE 0.1UF CAP CLOSE TO MCH
GRANTSDALE
SCS_B#[0..1] 18,19
RAS_B# 18,19
CAS_B# 18,19
WE_B# 18,19
MAA_B[0..13] 1 8,19
ODT_B[0..1] 18,19
SBS_B[0..2] 18,19
DQS_B0 18
DQS_B#0 18
DQS_B1 18
DQS_B#1 18
DQS_B2 18DQS_A218
DQS_B#2 18
DQS_B3 18
DQS_B#3 18
DQS_B4 18
DQS_B#4 18
DQS_B5 18
DQS_B#5 18
DQS_B6 18
DQS_B#6 18
DQS_B7 18
DQS_B#7 18
P_DDR0_B 18
N_DDR0_B 18
P_DDR1_B 18
N_DDR1_B 18
P_DDR2_B 18
N_DDR2_B 18
C221
C0.1U25Y
VCC_DDR
R207 1KR1%
MCH_VREF_A
R209
1KR1%
MSI
Title
Size Document Number Re v
Date: Sheet
MICRO-STAR INt'L CO., LTD.
Intel Grantsdale - Memory Signals
MS-7174H1
731Thursday, June 30, 2005
of
1B
V_1P5_CORE
EXP_A_RXP_020
EXP_A_RXN_020
EXP_A_RXP_120
EXP_A_RXN_120
EXP_A_RXP_220
EXP_A_RXN_220
EXP_A_RXP_320
EXP_A_RXN_320
EXP_A_RXP_420
EXP_A_RXN_420
EXP_A_RXP_520
EXP_A_RXN_520
EXP_A_RXP_620
EXP_A_RXN_620
EXP_A_RXP_720
EXP_A_RXN_720
EXP_A_RXP_820
EXP_A_RXN_820
EXP_A_RXP_920
EXP_A_RXN_920
EXP_A_RXP_1020
EXP_A_RXN_1020
EXP_A_RXP_1120
EXP_A_RXN_1120
EXP_A_RXP_1220
EXP_A_RXN_1220
EXP_A_RXP_1320
EXP_A_RXN_1320
EXP_A_RXP_1420
EXP_A_RXN_1420
EXP_A_RXP_1520
EXP_A_RXN_1520
DMI_ITP_MRP_010
DMI_ITN_MRN_010
DMI_ITP_MRP_110
DMI_ITN_MRN_110
DMI_ITP_MRP_210
DMI_ITN_MRN_210
DMI_ITP_MRP_310
DMI_ITN_MRN_310
CK_PE_100M_MCH13
CK_PE_100M_MCH#13
SDVO_CTRL_DATA20
SDVO_CTRL_CLK20
R143 1KR1%
R148 X_1KR1%
V_2P5_DAC_FILTERED23
CP14
FSB GENERIC DECOUPLING
X_COPPER
L7 X_10U100m_0805
C171
X_C0.22U16Y
H_BSL013
H_BSL113
H_BSL213
V_1P5_CORE
V_2P5_MCH
V_FSB_VTT3,4,6,12,13,24
C167
X_C10U10Y0805
EXP_A_TXP_[0..15] 20
EXP_A_TXN_[0..15] 20
EXP_A_RXP_[0..15] 20
EXP_A_RXN_[0..15] 20
EXP_A_RXP_0
EXP_A_RXN_0
EXP_A_RXP_1
EXP_A_RXN_1
EXP_A_RXP_2
EXP_A_RXN_2
EXP_A_RXP_3
EXP_A_RXN_3
EXP_A_RXP_4
EXP_A_RXN_4
EXP_A_RXP_5
EXP_A_RXN_5
EXP_A_RXP_6
EXP_A_RXN_6
EXP_A_RXN_7
EXP_A_RXN_8
EXP_A_RXP_9
EXP_A_RXN_9
EXP_A_RXP_10
EXP_A_RXN_10
EXP_A_RXP_11
EXP_A_RXN_11
EXP_A_RXP_12
EXP_A_RXN_12
EXP_A_RXP_13
EXP_A_RXN_13
EXP_A_RXP_14
EXP_A_RXN_14
EXP_A_RXP_15
EXP_A_RXN_15
DMI_ITP_MRP_0
DMI_ITN_MRN_0
DMI_ITP_MRP_1
DMI_ITN_MRN_1
DMI_ITP_MRP_2
DMI_ITN_MRN_2
DMI_ITP_MRP_3
DMI_ITN_MRN_3
CK_PE_100M_MCH
CK_PE_100M_MCH#
SDVO_CTRL_DATA
SDVO_CTRL_CLK
H_BSL0
H_BSL1
H_BSL2
MTYPE
EXP_SLR
VCCA_HPLLVCCA_HPLL
VCCA_MPLL
VCCA_DPLLA
VCCA_DPLLB
VCCA_GPLL
C148
C0.1U25Y
VCCA_MPLL
V_1P5_CORE
AD9
AD8
AD7
AD6
AD5
AD4
AD3
AD2
AD1
AC10
AC9
AC8
AC7
AC2
AC6
AC5
AC4
EXPARXP0
EXPARXN0
EXPARXP1
EXPARXN1
EXPARXP2
EXPARXN2
EXPARXP3
EXPARXN3
EXPARXP4
EXPARXN4
EXPARXP5
EXPARXN5
EXPARXP6
EXPARXN6
EXPARXP7
EXPARXN7
EXPARXP8
EXPARXN8
EXPARXP9
EXPARXN9
EXPARXP10
EXPARXN10
EXPARXP11
EXPARXN11
EXPARXP12
EXPARXN12
EXPARXP13
EXPARXN13
EXPARXP14
EXPARXN14
EXPARXP15
EXPARXN15
DMI RXP0
DMI RXN0
DMI RXP1
DMI RXN1
DMI RXP2
DMI RXN2
DMI RXP3
DMI RXN3
GCLKINP
GCLKINN
SDVOCTRLDATA
SDVOCTRLCLK
BSEL0
BSEL1
BSEL2
RSVRD
RSVRD
MTYPE
EXP_SLR
RSVRD
RSVRD
RSVRD
DREFSSCLKINP
DREFSSCLKINN
VCCAHPLL
VCCAMPLL
VCCADPLLA
VCCADPLLB
VCCA3GPLL
VCCHV
VCCACRTDAC
VCCACRTDAC
VSSACRTDAC
C159
C0.1U25Y
AD10
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VTT
VTT
VTT
VTT
VTT
VTT
VTT
F22
F21
F20
E22
H22
G22
G21
CP6
X_COPPER
L11 X_10U100m_0805
VCC
VCC
VCC
VTT
VTT
VTT
E19
E21
E20
U7C
E11
F11
J11
H11
F9
E9
F7
E7
B3
B4
D5
E5
G6
G5
H8
H7
J6
J5
K8
K7
L6
L5
P10
R10
M8
M7
N6
N5
P7
P8
R6
R5
U5
U6
T9
T8
V7
V8
V10
U10
A11
B11
K13
J13
H16
E15
D17
M16
F15
C15
A16
B15
C14
K15
L10
M10
A17
B17
A12
B13
A14
A13
E13
D13
F13
V_FSB_VTT
C158
C0.1U25Y
V_1P5_CORE V_1P5_CORE
C168
C0.1U25Y
VCC
VCC
VCC
VCC
VTT
VTT
VTT
VTT
D22
D21
D20
D19
VCCA_DPLLA
C195
X_C10U10Y0805
AC3
VCC
VCC
VCC
VCC
VTT
VTT
VTT
VTT
C22
C21
C20
C19
AC1
VCC
VTT
B22
AB9
AB10
VCC
VCC
VTT
VTT
B21
B20
C196
C0.1U25Y
VCC_DDR
AR26
AR31
AR22
VCCSM
VCCSM
VCCSM
VSSNCTF
VSSNCTF
VSSNCTF
V25
V20
W11
AR18
AR14
VCCSM
VCCSM
VCCSM
VSSNCTF
VSSNCTF
VSSNCTF
V16
V11
AP28
AR10
VCCSM
VCCSM
VSSNCTF
VSSNCTF
U25
U11
R155 0R
AB4
AB8
AB7
AB6
AB5
AB3
AB2
AB1
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VTT
VTT
VTT
VTT
VTT
B19
A22
A21
A20
A19
AC25
AR33
U18
W18
V19
V17
VCC
VCC
VCC
VCC
VCC
VSSNCTF
VSSNCTF
VSSNCTF
VSSNCTF
VSSNCTF
VSSNCTF
VSSNCTF
Y25
Y18
Y11
W25
AB25
AA25
AA11
L8 10U100m_0805
AP24
AP20
VCCSM
VCCSM
VSSNCTF
VSSNCTF
T25
T18
AM28
AM26
AM25
AP16
VCCSM
VSSNCTF
T11
AM23
AN35
AM32
AM22
AM20
AM19
AM11
AM10
AK35
AM17
AM16
AM14
VCCSM
VCCSM
VCCSM
VSSNCTF
VSSNCTF
VSSNCTF
M11
AA15
VCCSM
VCCSM
VSSNCTF
VSSNCTF
N17
AA17
AA19
C179
C0.1U25Y
AM13
VCCSM
VCCSM
VCCSM
VSSNCTF
VSSNCTF
VSSNCTF
P16
N19
V_2P5_MCH
VCCSM
VCCSM
VSSNCTF
VSSNCTF
P18
P20
W1
VCCSM
VSSNCTF
VSSNCTF
R17
R19
R21
VSSNCTF
VSSNCTF
VSSNCTF
VSSNCTF
T22
U15
U21
L10 0.1U50m
VSSNCTF
VSSNCTF
V22
U23
W15
VSSNCTF
VSSNCTF
VSSNCTF
VSSNCTF
Y22
W21
W23
C194
C10U10Y0805
AP12
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VSSNCTF
VSSNCTF
VSSNCTF
VSSNCTF
VSSNCTF
VSSNCTF
P25
P11
R25
R11
N25
N11
AD25
VCCA_GPLL V_2P5_DAC_FILTERED
C181
X_C10U10Y0805
V_1P5_CORE
VCC3GY9VCC3GY8VCC3GY7VCC3GY6VCC3GY5VCC3GY4VCC3GY3VCC3GY2VCC3GY1VCC3GW9VCC3GW8VCC3GW7VCC3GW6VCC3GW4VCC3GW3VCC3GW2VCC3G
EXPATXP0
EXPATXN0
EXPATXP1
EXPATXN1
EXPATXP2
EXPATXN2
EXPATXP3
EXPATXN3
EXPATXP4
EXPATXN4
EXPATXP5
EXPATXN5
EXPATXP6
EXPATXN6
EXPATXP7
EXPATXN7
EXPATXP8
EXPATXN8
EXPATXP9
EXPATXN9
EXPATXP10
EXPATXN10
EXPATXP11
EXPATXN11
EXPATXP12
EXPATXN12
EXPATXP13
EXPATXN13
EXPATXP14
EXPATXN14
EXPATXP15
EXPATXN15
DMI TXP0
DMI TXN0
DMI TXP1
DMI TXN1
DMI TXP2
DMI TXN2
DMI TXP3
DMI TXN3
EXPACOMPO
EXPACOMPI
CRTHSYNC
CRTVSYNC
CRTRED
CRTGREEN
CRTBLUE
CRTREDB
CRTGREENB
CTRBLUEB
CRTDDCDATA
CRTDDCCLK
DREFCLKINP
DREFCLKINN
CRTIREF
PMEXTTS
PMBMBUSY#
TESTIN#
MCHDETECT
GRANTSDALE
C169
C0.1U25Y
EXP_A_TXP_0
C10
EXP_A_TXN_0
C9
EXP_A_TXP_1
A9
EXP_A_TXN_1
A8
EXP_A_TXP_2
C8
EXP_A_TXN_2
C7
EXP_A_TXP_3
A7
EXP_A_TXN_3
A6
EXP_A_TXP_4
C6
EXP_A_TXN_4
C5
EXP_A_TXP_5
C2
EXP_A_TXN_5EXP_A_RXP_7
D2
EXP_A_TXP_6
E3
EXP_A_TXN_6EXP_A_RXP_8
F3
EXP_A_TXP_7
F1
EXP_A_TXN_7
G1
EXP_A_TXP_8
G3
EXP_A_TXN_8
H3
EXP_A_TXP_9
H1
EXP_A_TXN_9
J1
EXP_A_TXP_10
J3
EXP_A_TXN_10
K3
EXP_A_TXP_11
K1
EXP_A_TXN_11
L1
EXP_A_TXP_12
L3
EXP_A_TXN_12
M3
EXP_A_TXP_13
M1
EXP_A_TXN_13
N1
EXP_A_TXP_14
N3
EXP_A_TXN_14
P3
EXP_A_TXP_15
P1
EXP_A_TXN_15
R1
DMI_MTP_IRP_0
R3
DMI_MTN_IRN_0
T3
DMI_MTP_IRP_1
T1
DMI_MTN_IRN_1
U1
DMI_MTP_IRP_2
U3
DMI_MTN_IRN_2
V3
DMI_MTP_IRP_3
V5
DMI_MTN_IRN_3
W5
GRCOMP V_1P5_CORE
Y10
W10
E12
D12
F14
D14
H14
G14
E14
J14
L14
M15
M13
M12
A15
K16
G16
R35
A35
HSYNC
VSYNC
VGA_RED
VGA_GREEN
VGA_BLUE
MCH_DDC_DATA
MCH_DDC_CLK
CK_96M_DREF
CK_96M_DREF#
DACREFSET
EXTTS
C187
C10000P50Y5
R205 24.9RST
R179 10KR
EXP_A_TXP_0 20
EXP_A_TXN_0 20
EXP_A_TXP_1 20
EXP_A_TXN_1 20
EXP_A_TXP_2 20
EXP_A_TXN_2 20
EXP_A_TXP_3 20
EXP_A_TXN_3 20
EXP_A_TXP_4 20
EXP_A_TXN_4 20
EXP_A_TXP_5 20
EXP_A_TXN_5 20
EXP_A_TXP_6 20
EXP_A_TXN_6 20
EXP_A_TXP_7 20
EXP_A_TXN_7 20
EXP_A_TXP_8 20
EXP_A_TXN_8 20
EXP_A_TXP_9 20
EXP_A_TXN_9 20
EXP_A_TXP_10 20
EXP_A_TXN_10 20
EXP_A_TXP_11 20
EXP_A_TXN_11 20
EXP_A_TXP_12 20
EXP_A_TXN_12 20
EXP_A_TXP_13 20
EXP_A_TXN_13 20
EXP_A_TXP_14 20
EXP_A_TXN_14 20
EXP_A_TXP_15 20
EXP_A_TXN_15 20
DMI_MTP_IRP_0 10
DMI_MTN_IRN_0 10
DMI_MTP_IRP_1 10
DMI_MTN_IRN_1 10
DMI_MTP_IRP_2 10
DMI_MTN_IRN_2 10
DMI_MTP_IRP_3 10
DMI_MTN_IRN_3 10
HSYNC 23
VSYNC 23
VGA_RED 23
VGA_GREEN 23
VGA_BLUE 23
MCH_DDC_DATA 23
MCH_DDC_CLK 23
CK_96M_DREF 13
CK_96M_DREF# 13
R154 255R1%
V_2P5_MCH
BSEL
2
1
0
0
0
0
0
1
V_1P5_CORE
C265
C367
VCC_DDR
C123 C10U10Y0805
C125 C10U10Y0805
C139 C10U10Y0805
VCC_DDR
C129 C 10U10Y0805
C175 C 10U10Y0805
C161 C 10U10Y0805
MCH MEMORY DEC OUPLING
TABLE
PSB FREQUENCY
0
RESERVED
0
133 MHZ (533)
1
200 MHZ (800)
0
X_C10U10Y0805
C10U10Y0805
CP15
X_COPPER
V_1P5_CORE V_1P5_CORE
L9 X_10U100m_0805
VCCA_DPLLB
C188
X_C10U10Y0805
C185
C0.1U25Y
CP4
X_COPPER
L6 X_10U100m_0805
VCCA_HPLL
C160
X_C10U10Y0805
C165
C0.1U25Y
V_1P5_CORE
C220
C260
C10U10Y0805
X_C10U10Y0805
MSI
Title
Size Document Number Re v
Date: Sheet
MICRO-STAR INt'L CO., LTD.
Intel Grantsdale PCI-Express & RBG Signals
MS-7174H1
831Thursday, June 30, 2005
of
1B
A10
A18
A26
A30
A33
B10
B12
B14
B16
B18
B24
B28
C11
C13
C17
C18
C23
C35
D10
D11
D15
D16
D18
D23
D25
D26
D28
D30
D31
D32
E10
E17
E18
E23
E26
E29
F10
F16
F18
F23
F25
F29
F30
F32
F35
AD19
AD22
AD26
AD27
AD34
AE4
AE6
AE9
AE12
AE14
AE15
AE17
AE18
AE20
AE21
AE23
AE24
AE28
AE30
AE32
AF1
AF4
AF6
AF8
AF10
AF12
AF15
AF18
AF21
AF26
AF29
AF30
AF31
AF32
AF35
AG5
AG12
AG13
AG15
AG16
AG18
AG19
AG21
AG22
AG25
AG28
AG29
AH1
AH5
AH6
AH8
AH11
AH14
AH17
AH20
AH23
AH26
AH29
AH32
AH34
AJ4
AJ9
AJ10
AJ13
AJ15
AJ16
AJ19
AJ22
AJ27
AJ30
AJ32
AJ35
AK1
AK4
AK6
AK7
AK8
AK11
AK14
AK17
AK20
AK23
AK25
AK28
AK30
AL10
AL13
AL16
AL19
AL22
AL32
AM4
AM6
AM7
AM8
AM29
AM31
AN1
AP8
AR3
AR6
AR13
AR17
AR21
AR25
AR30
U7D
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
A3
VSS
A5
VSS
VSS
VSS
VSS
VSS
VSS
B2
VSS
B5
VSS
B6
VSS
B7
VSS
B8
VSS
B9
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
C1
VSS
C3
VSS
C4
VSS
VSS
VSS
VSS
VSS
VSS
VSS
D3
VSS
D4
VSS
D6
VSS
D7
VSS
D8
VSS
D9
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
E1
VSS
E2
VSS
E4
VSS
E6
VSS
E8
VSS
VSS
VSS
VSS
VSS
VSS
VSS
F2
VSS
F4
VSS
F5
VSS
F6
VSS
F8
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSSG2VSSG4VSS
G7
VSS
VSS
VSS
VSS
VSSG9VSS
G8
G15
G13
G11
G10
G17
VSS
G19
VSS
G20
VSS
G23
VSS
G26
VSS
G27
VSS
G28
VSSH9VSSH6VSSH5VSSH4VSSH2VSS
H13
H10
H21
H24
H25
H27
H30
VSS
H32
VSS
H34
VSS
VSS
VSS
VSSJ9VSSJ8VSSJ7VSSJ4VSSJ2VSS
J10
VSS
VSS
VSS
VSS
J16
J15
J30
J23
J20
J18
J17
VSS
VSS
VSSK9VSSK6VSSK5VSSK4VSSK2VSS
K11
K10
VSS
VSS
VSS
VSS
VSS
VSS
K31
K28
K26
K24
K20
K14
VSSL8VSSL7VSSL4VSSL2VSS
VSS
K32
VSSL9VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSSM2VSSM4VSSM5VSSM6VSSM9VSS
L11
L13
L15
L16
L17
L18
L20
L21
L22
L24
L27
L30
K35
L32
M17
M20
VSS
M24
VSS
VSS
M25
M27
VSS
VSS
M29
VSS
VSSN2VSSN4VSSN7VSSN8VSSN9VSS
M34
N10
N28
VSS
VSS
N30
VSS
VSSP2VSSP4VSSP5VSSP6VSSP9VSS
N32
P27
P29
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
GRANTSDALE
P31
AD16
AD13
AD11
AC32
AC31
AC29
AC27
AB35
AB32
AB30
AB28
AA27
AA26
AA10
AA9
AA8
AA7
AA6
AA5
AA4
AA3
AA2
AA1
Y34
Y32
Y31
Y29
Y27
W32
W30
W28
W19
W17
V35
V27
V26
V18
V9
V6
V4
V2
V1
U32
U31
U29
U27
U19
U17
U9
U8
U7
U4
U2
T34
T32
T30
T28
T10
T7
T6
T5
T4
T2
R27
R26
R9
R8
R7
R4
R2
P35
P32
MSI
Title
Size Document Number Rev
Date: Sheet
MICRO-STAR INt'L CO., LTD.
Intel Grantsdale - GND
MS-7174H1
931Thursday, June 30, 2005
of
1B
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