MSI MS-7172 Schematics
1
2
3
4
5
MS-7172
A A
B B
C C
Title
Cover Sheet
Block Diagram
AMD K8-754
VIA K8M800
VT8237R
Clock Synthesizer-ICS950405
DDR Damping Resister
DDR DIMM1&2
DDR Terminations
AGP SLOT
PCI Slot 1,2,3
IEEE1394 VIA VT 6307
VIA LAN PHY VT6103L
AC97 Codec ALC655
VGA Port
USB Port
ATA 66/100 & SATA & CPU Fan
LPC W83627THF & ROM & Floppy
K/B,M/S,LPT,COM
MS6 ACPI Power Controller
VCORE ISL6568
System Regulator & Front Panel
EMI parts
Misc
MANUAL PARTS
Power Delivery
Version 0.A
Page
1
2
3 , 4 , 5
6 , 7 , 8
9,10,11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
PCI Routing Table
PCI Device
PCI Slot 1
PCI Slot 2
(Add MEDION SPEC)
PCI Slot 3
EEE1394 VT6307
INTERRUPTIDSEL REQ/GNT
AD19
AD20
AD22
AD21
AD24 5 G
0
1
3
4FAD23
2
A
B
E
C
GPIO List 33
HISTORY
D D
34
Title
Cover Sheet
Size Document Number Rev
A3
1
2
3
4
Date: Sheet
MICRO-START INT'L CO.,LTD .
MS-7172 0A
134Friday, March 04, 2005
5
of
1
2
3
4
5
A A
B B
C C
VRM
Intersil ISL6568
2-Phase PWM
P.27
AGP 8X
Connector
P.16
Analog
Video
Out
IDE Primary
IDE Secendary
SERIAL ATA1
SERIAL ATA2
P.21
P.23
P.23
P.18
P.18
USB2.0
USB Port0~ 7
P.22
UltraDMA
33/66/100
USB
AMD K8 754 pin Process or
HT
VIA K8M800
/ K8T800
P.6~8
V-LINK
VT8237R
P.9~11
LPC Bus
P.3~5
DDR 400
PCI
Block Diagram
2 DDR1
DIMM
Modules
P.13-15
PCI Slot 1
PCI Slot 2
PCI Slot 3
P.17 P.17
P.17
Realtek
AC'97 Codec
P.20
LPC SIO
W83627THF
P.24
LAN PHY
VT6103L
P.19
PCI
1394
VIA VT-6307
D D
1
P.18
2
LPC ROM
P.24
Keyboard
Mouse
3
Floopy Parallel Serial
P.25
P.25
P.24
P.25 P.25
Title
Size Document Number Rev
4
Date: Sheet
MICRO-START INT'L CO.,LTD .
Block Diagram
A3
MS-7172 0A
5
234Friday, March 04, 2005
of
1
2
3
4
5
VDD_12_A
C191
VREF routed as 40~50
mils trace wide ,
A A
B B
C C
D D
Space>25 mils
DDR_VREF13
VDD_25_SUS
Place near CPU in 1" ,
Routed => 5:10/Trace:Space ,
Same Length
R94 15R/1%
R95 15R/1%
1
C54 X_0.1uF
C67 1000pF
MEMZN
MEMZP
MD6315
MD6215
MD6115
MD6015
MD5915
MD5815
MD5715
MD5615
MD5515
MD5415
MD5315
MD5215
MD5115
MD5015
MD4915
MD4815
MD4715
MD4615
MD4515
MD4415
MD4315
MD4215
MD4115
MD4015
MD3915
MD3815
MD3715
MD3615
MD3515
MD3415
MD3315
MD3215
MD3115
MD3015
MD2915
MD2815
MD2715
MD2615
MD2515
MD2415
MD2315
MD2215
MD2115
MD2015
MD1915
MD1815
MD1715
MD1615
MD1515
MD1415
MD1315
MD1215
MD1115
MD1015
MD915
MD815
MD715
MD615
MD515
MD415
MD315
MD215
MD115
MD015
DM715
DM615
DM515
DM415
DM315
DM215
DM115
DM015
-MDQS715
-MDQS615
-MDQS515
-MDQS415
-MDQS315
-MDQS215
-MDQS115
-MDQS015
MD63
MD62
MD61
MD60
MD59
MD58
MD57
MD56
MD55
MD54
MD53
MD52
MD51
MD50
MD49
MD48
MD47
MD46
MD45
MD44
MD43
MD42
MD41
MD40
MD39
MD38
MD37
MD36
MD35
MD34
MD33
MD32
MD31
MD30
MD29
MD28
MD27
MD26
MD25
MD24
MD23
MD22
MD21
MD20
MD19
MD18
MD17 MAA3
MD16
MD15
MD14
MD13
MD12
MD11
MD10
MD9
MD8
MD7
MD6
MD5
MD4
MD3
MD2
MD1
MD0
DM7
DM6
DM5
DM4
DM3
DM2
DM1
DM0
-MDQS7
-MDQS6
-MDQS5
-MDQS4
-MDQS3
-MDQS2
-MDQS1
-MDQS0
AE13
AG12
D14
C14
A16
B15
A12
B11
A17
A15
C13
A11
A10
C11
AC1
AC3
AC2
AD1
AE1
AE3
AG3
AJ4
AE2
AF1
AH3
AJ3
AJ5
AJ6
AJ7
AH9
AG5
AH5
AJ9
AJ10
AH11
AJ11
AH15
AJ15
AG11
AJ12
AJ14
AJ16
A13
AA1
AG1
AH7
AH13
A14
AB1
AJ2
AJ8
AJ13
G2
G1
G3
M1
W1
W3
W2
B9
C7
A6
A9
A5
B5
C5
A4
E2
E1
A3
B3
E3
F1
L3
L1
J2
L2
Y1
R1
A7
C2
H1
T1
A8
D1
J1
VTT_SENSE
MEMVREF1
MEMZN
MEMZP
MEMDATA63
MEMDATA62
MEMDATA61
MEMDATA60
MEMDATA59
MEMDATA58
MEMDATA57
MEMDATA56
MEMDATA55
MEMDATA54
MEMDATA53
MEMDATA52
MEMDATA51
MEMDATA50
MEMDATA49
MEMDATA48
MEMDATA47
MEMDATA46
MEMDATA45
MEMDATA44
MEMDATA43
MEMDATA42
MEMDATA41
MEMDATA40
MEMDATA39
MEMDATA38
MEMDATA37
MEMDATA36
MEMDATA35
MEMDATA34
MEMDATA33
MEMDATA32
MEMDATA31
MEMDATA30
MEMDATA29
RSVD_MEMADDA15
MEMDATA28
RSVD_MEMADDA14
MEMDATA27
MEMDATA26
MEMDATA25
MEMDATA24
MEMDATA23
MEMDATA22
MEMDATA21
MEMDATA20
MEMDATA19
MEMDATA18
MEMDATA17
MEMDATA16
MEMDATA15
MEMDATA14
MEMDATA13
MEMDATA12
MEMDATA11
MEMDATA10
MEMDATA9
MEMDATA8
MEMDATA7
MEMDATA6
MEMDATA5
RSVD_MEMADDB15
MEMDATA4
RSVD_MEMADDB14
MEMDATA3
MEMDATA2
MEMDATA1
MEMDATA0
MEMDQS17
MEMDQS16
MEMDQS15
MEMDQS14
MEMDQS13
MEMDQS12
MEMDQS11
MEMDQS10
MEMDQS9
MEMDQS8
MEMDQS7
MEMDQS6
MEMDQS5
MEMDQS4
MEMDQS3
MEMDQS2
MEMDQS1
MEMDQS0
MEMORY INTERFACE
VTT_A4
VTT_A1
VTT_A2
VTT_A3
VTT_B1
VTT_B2
VTT_B3
VTT_B4
MEMRESET_L
MEMCKEA
MEMCKEB
MEMCLK_H7
MEMCLK_L7
MEMCLK_H6
MEMCLK_L6
MEMCLK_H5
MEMCLK_L5
MEMCLK_H4
MEMCLK_L4
MEMCLK_H3
MEMCLK_L3
MEMCLK_H2
MEMCLK_L2
MEMCLK_H1
MEMCLK_L1
MEMCLK_H0
MEMCLK_L0
MEMCS_L7
MEMCS_L6
MEMCS_L5
MEMCS_L4
MEMCS_L3
MEMCS_L2
MEMCS_L1
MEMCS_L0
MEMRASA_L
MEMCASA_L
MEMWEA_L
MEMBANKA1
MEMBANKA0
MEMADDA13
MEMADDA12
MEMADDA11
MEMADDA10
MEMADDA9
MEMADDA8
MEMADDA7
MEMADDA6
MEMADDA5
MEMADDA4
MEMADDA3
MEMADDA2
MEMADDA1
MEMADDA0
MEMRASB_L
MEMCASB_L
MEMWEB_L
MEMBANKB1
MEMBANKB0
MEMADDB13
MEMADDB12
MEMADDB11
MEMADDB10
MEMADDB9
MEMADDB8
MEMADDB7
MEMADDB6
MEMADDB5
MEMADDB4
MEMADDB3
MEMADDB2
MEMADDB1
MEMADDB0
MEMCHECK7
MEMCHECK6
MEMCHECK5
MEMCHECK4
MEMCHECK3
MEMCHECK2
MEMCHECK1
MEMCHECK0
2
D17
A18
B17
C17
AF16
AG16
AH16
AJ17
AG10
AE8
AE7
D10
C10
E12
E11
AF8
AG8
AF10
AE10
V3
V4
K5
K4
R5
P5
P3
P4
D8
C8
E8
E7
D6
E6
C4
E5
H5
D4
G5
K3
H3
E13
C12
E10
AE6
AF3
M5
AE5
AB5
AD3
Y5
AB4
Y3
V5
T5
T3
N5
H4
F5
F4
L5
J5
E14
D12
E9
AF6
AF4
M4
AD5
AC5
AD4
AA5
AB3
Y4
W5
U5
T4
M3
N3
N1
U3
V1
N2
P1
U1
U2
U6B
VTT_DDR_SUS
MCKE0
MCKE1
MEMCLK_H7
MEMCLK_L7
MEMCLK_H6
MEMCLK_L6
MEMCLK_H5
MEMCLK_L5
MEMCLK_H4
MEMCLK_L4
MEMCLK_H1
MEMCLK_L1
MEMCLK_H0
MEMCLK_L0
-MCS3
-MCS2
-MCS1
-MCS0
-MSRASA
-MSCASA
-MSWEA
MEMBANKA1
MEMBANKA0
MAA13
MAA12
MAA11
MAA10
MAA9
MAA8
MAA7
MAA6
MAA5
MAA4
MAA2
MAA1
MAA0
-MSRASB
-MSCASB
-MSWEB
MEMBAKB1
MEMBAKB0
MAB13
MAB12
MAB11
MAB10
MAB9
MAB8
MAB7
MAB6
MAB5
MAB4
MAB3
MAB2
MAB1
MAB0
MCKE0 13,14
MCKE1 13,14
MEMCLK_H7 13,14
MEMCLK_L7 13,14
MEMCLK_H6 13,14
MEMCLK_L6 13,14
MEMCLK_H5 13,14
MEMCLK_L5 13,14
MEMCLK_H4 13,14
MEMCLK_L4 13,14
MEMCLK_H1 13,14
MEMCLK_L1 13,14
MEMCLK_H0 13,14
MEMCLK_L0 13,14
-MCS3 13,14
-MCS2 13,14
-MCS1 13,14
-MCS0 13,14
-MSRASA 13,14
-MSCASA 13,14
-MSWEA 13,14
MEMBANKA1 13,14
MEMBANKA0 13,14
MAA13 13,14
MAA12 13,14
MAA11 13,14
MAA10 13,14
MAA9 13,14
MAA8 13,14
MAA7 13,14
MAA6 13,14
MAA5 13,14
MAA4 13,14
MAA3 13,14
MAA2 13,14
MAA1 13,14
MAA0 13,14
-MSRASB 13,14
-MSCASB 13,14
-MSWEB 13,14
MEMBAKB1 13,14
MEMBAKB0 13,14
MAB13 13,14
MAB12 13,14
MAB11 13,14
MAB10 13,14
MAB9 13,14
MAB8 13,14
MAB7 13,14
MAB6 13,14
MAB5 13,14
MAB4 13,14
MAB3 13,14
MAB2 13,14
MAB1 13,14
MAB0 13,14
CADIP156
CADIN156
CADIP146
CADIN146
CADIP136
CADIN136
CADIP126
CADIN126
CADIP116
CADIN116
CADIP106
CADIN106
CADIP96
CADIN96
CADIP86
CADIN86
CADIP76
CADIN76
CADIP66
CADIN66
CADIP56
CADIN56
CADIP46
CADIN46
CADIP36
CADIN36
CADIP26
CADIN26
CADIP16
CADIN16
CADIP06
CLKIP16
CLKIN16
CLKIP06
CLKIN06
CTLIP06
CTLIN06
3
CADIN06
VLDT0
C147
X_0.22uF
VDD_12_A
CADIP15
CADIN15
CADIP14
CADIN14
CADIP13
CADIN13
CADIP12
CADIN12
CADIP11
CADIN11
CADIP10
CADIN10
CADIP9
CADIN9
CADIP8
CADIN8
CADIP7
CADIN7
CADIP6
CADIN6
CADIP5
CADIN5
CADIP4
CADIN4
CADIP3
CADIN3
CADIP2
CADIN2
CADIP1
CADIN1
CADIP0
CADIN0
R41 49.9R/1%
R45 49.9R/1%
0.22uF
CTLIP1
CTLIN1
D29
D27
D25
C28
C26
B29
B27
T25
R25
U27
U26
V25
U25
W27
W26
AA27
AA26
AB25
AA25
AC27
AC26
AD25
AC25
T27
T28
V29
U29
V27
V28
Y29
W29
AB29
AA29
AB27
AB28
AD29
AC29
AD27
AD28
Y25
W25
Y27
Y28
R27
R26
T29
R29
C146
C163
X_0.22uF
0.22uF
U6A
N12-7540010-F02
VLDT0_A6
VLDT0_A5
VLDT0_A4
VLDT0_A3
VLDT0_A2
VLDT0_A1
VLDT0_A0
L0_CADIN_H15
L0_CADIN_L15
L0_CADIN_H14
L0_CADIN_L14
L0_CADIN_H13
L0_CADIN_L13
L0_CADIN_H12
L0_CADIN_L12
L0_CADIN_H11
L0_CADIN_L11
L0_CADIN_H10
L0_CADIN_L10
L0_CADIN_H9
L0_CADIN_L9
L0_CADIN_H8
L0_CADIN_L8
L0_CADIN_H7
L0_CADIN_L7
L0_CADIN_H6
L0_CADIN_L6
L0_CADIN_H5
L0_CADIN_L5
L0_CADIN_H4
L0_CADIN_L4
L0_CADIN_H3
L0_CADIN_L3
L0_CADIN_H2
L0_CADIN_L2
L0_CADIN_H1
L0_CADIN_L1
L0_CADIN_H0
L0_CADIN_L0
L0_CLKIN_H1
L0_CLKIN_L1
L0_CLKIN_H0
L0_CLKIN_L0
L0_CTLIN_H1
L0_CTLIN_L1
L0_CTLIN_H0
L0_CTLIN_L0
HYPER TRANSPORT - LINK0
U6_X1
CPU_RM
4
L0_CADOUT_H15
L0_CADOUT_H14
L0_CADOUT_H13
L0_CADOUT_H12
L0_CADOUT_H11
L0_CADOUT_H10
1
2
C174
0.22uF
C184
0.22uF
C164
0.22uF
VLDT0
AH29
VLDT0_B6
AH27
VLDT0_B5
AG28
VLDT0_B4
AG26
VLDT0_B3
AF29
VLDT0_B2
AE28
VLDT0_B1
AF25
VLDT0_B0
L0_CADOUT_L15
L0_CADOUT_L14
L0_CADOUT_L13
L0_CADOUT_L12
L0_CADOUT_L11
L0_CADOUT_L10
L0_CADOUT_H9
L0_CADOUT_L9
L0_CADOUT_H8
L0_CADOUT_L8
L0_CADOUT_H7
L0_CADOUT_L7
L0_CADOUT_H6
L0_CADOUT_L6
L0_CADOUT_H5
L0_CADOUT_L5
L0_CADOUT_H4
L0_CADOUT_L4
L0_CADOUT_H3
L0_CADOUT_L3
L0_CADOUT_H2
L0_CADOUT_L2
L0_CADOUT_H1
L0_CADOUT_L1
L0_CADOUT_H0
L0_CADOUT_L0
L0_CLKOUT_H1
L0_CLKOUT_L1
L0_CLKOUT_H0
L0_CLKOUT_L0
L0_CTLOUT_H1
L0_CTLOUT_L1
L0_CTLOUT_H0
L0_CTLOUT_L0
Title
Size Document Number Rev
A3
Date: Sheet
CADOP15
N26
N27
L25
M25
L26
L27
J25
K25
G25
H25
G26
G27
E25
F25
E26
E27
N29
P29
M28
M27
L29
M29
K28
K27
H28
H27
G29
H29
F28
F27
E29
F29
J26
J27
J29
K29
N25
P25
P28
P27
CADON15
CADOP14
CADON14
CADOP13
CADON13
CADOP12
CADON12
CADOP11
CADON11
CADOP10
CADON10
CADOP9
CADON9
CADOP8
CADON8
CADOP7
CADON7
CADOP6
CADON6
CADOP5
CADON5
CADOP4
CADON4
CADOP3
CADON3
CADOP2
CADON2
CADOP1
CADON1
CADOP0
CADON0
CLKOP1
CLKON1
CLKOP0
CLKON0
CTLOP0
CTLON0
CADOP15 6
CADON15 6
CADOP14 6
CADON14 6
CADOP13 6
CADON13 6
CADOP12 6
CADON12 6
CADOP11 6
CADON11 6
CADOP10 6
CADON10 6
CADOP9 6
CADON9 6
CADOP8 6
CADON8 6
CADOP7 6
CADON7 6
CADOP6 6
CADON6 6
CADOP5 6
CADON5 6
CADOP4 6
CADON4 6
CADOP3 6
CADON3 6
CADOP2 6
CADON2 6
CADOP1 6
CADON1 6
CADOP0 6
CADON0 6
CLKOP1 6
CLKON1 6
CLKOP0 6
CLKON0 6
CTLOP0 6
CTLON0 6
MICRO-START INT'L CO.,LTD .
AMD K8-754 DDR & HT
MS-7172 0A
5
VLDT0 4
C61
4.7uF/10V/0805
334Friday, March 04, 2005
of
1
A A
2
VDDA_25
LAYOUT: Route VDDA trace approx. 50 mils wide (use 2x25 mil
traces to exit ball field) and 500 mils long.
FB6 300L700m_250_0805
CPU_VDDA_25
3
C62
4.7uF/10V/0805
C46
0.22uF
1000pF
C59
4
THERMDC_CPU
FB7
X_120S/0603
5
C36
VDDA_25
B B
-LDTSTOP
PS_OUT#26,28
R23
680R
DS
Q2
2N7002
G
Place near CPU in 1" ,
Routed => 5:10/Trace:Space ,
Same Length
CPU_GD26
VLDT0
VLDT03
R40 44.2R/1%
R39 44.2R/1%
C66
1000pF
X_1000pF/NPO
C65
1000pF
Near CPU in 0.5" .
HDT Test Port Signal .
C C
VDDA_25
DBREQ_L
DBRDY
TCK
TMS
TDI
TRST_L
NC_AJ18
D D
NC_AG17
NC_D18
NC_B19
NC_C19
NC_D20
1
R30 X_1K
R31 X_1K
RN38 X_8P4R-1KR
R43 680R
R42 680R
1 2
3 4
5 6
7 8
1 2
3 4
5 6
7 8
680R-8P4R
RN36
C192
4.7uF/10V/0805
VDDA_25 VDD_25_SUS
NC_C18
NC_A19
NC_C21
TDO
2
RN40
1 2
3 4
5 6
7 8
680R-8P4R
-CPURST28
-LDTSTOP6,11
COREFB_H27
COREFB_L27
Differential , "10:10:5:10:10" .
CPUCLK0_H12
CPUCLK0_L12
VDD_25_SUS
3
CPU_GD
L0_REF1
L0_REF0
C55 X_1000pF/NPO
C57 3900pF
R49
C56 3900pF
R29 820R
R46 820R
VDDIO_SENSE
169R/1%
CLKIN_H
CLKIN_L
NC_AJ23
NC_AH23
VTT_DDR_SUS
DBRDY
TMS
TCK
TRST_L
TDI
NC_C18
NC_A19
AH25
AJ25
AF20
AE18
AJ27
AF27
AE26
A23
A24
B23
AE12
AF12
AE11
AJ21
AH21
AJ23
AH23
AE24
AF24
C16
AG15
AH17
C15
E20
E17
B21
A21
C18
A19
A28
AJ28
AE23
AF23
AF22
AF21
AA2
AG2
B18
AH1
AE21
C20
AG4
AG6
AE9
AG9
C1
J3
R3
D3
C6
VDDA1
VDDA2
RESET_L
PWROK
LDTSTOP_L
L0_REF1
L0_REF0
COREFB_H
COREFB_L
CORE_SENSE
VDDIOFB_H
VDDIOFB_L
VDDIO_SENSE
CLKIN_H
CLKIN_L
NC_AJ23
NC_AH23
NC_AE24
NC_AF24
VTT_A5
VTT_B5
DBRDY
NC_C15
TMS
TCK
TRST_L
TDI
NC_C18
NC_A19
KEY1
KEY0
NC_AE23
NC_AF23
NC_AF22
NC_AF21
FREE29
FREE31
FREE33
FREE35
FREE1
FREE37
FREE4
FREE38
FREE41
FREE7
FREE11
FREE12
FREE13
FREE14
FREE40
THERMTRIP_L
G_FBCLKOUT_H
G_FBCLKOUT_L
4
U6C
THERMDA
THERMDC
VID4
VID3
VID2
VID1
VID0
NC_AG18
NC_AH18
NC_AG17
NC_AJ18
DBREQ_L
NC_D20
NC_C21
NC_D18
NC_C19
NC_B19
TDO
NC_AF18
RSVD_SCL
RSVD_SDA
FREE26
FREE28
FREE30
FREE32
FREE34
FREE36
FREE10
FREE18
FREE19
FREE42
FREE24
FREE25
FREE27
A20
A26
A27
AG13
AF14
AG14
AF15
AE15
AG18
AH18
AG17
AJ18
AH19
AJ19
AE19
D20
C21
D18
C19
B19
A22
AF18
D22
C22
B13
B7
C3
K1
R2
AA3
F3
C23
AG7
AE22
C24
A25
C9
THRM#
THERMDA_CPU
THERMDC_CPU
VID4
VID3
VID2
VID1
VID0
NC_AG17
NC_AJ18
FBCLKOUT_H
R48
80.6R/1%
FBCLKOUT_L
Zdiff = 80 ohm
DBREQ_L
NC_D20
NC_C21
NC_D18
NC_C19
NC_B19
TDO
VDD_25_SUS
Title
AMD K8-754 HDT & MISC
Size Document Number Rev
A3
Date: Sheet
MS-7172 0A
THRM# 26
THERMDA_CPU 24
THERMDC_CPU 24
VID4 27
VID3 27
VID2 27
VID1 27
VID0 27
LAYOUT: Route
FBCLKOUT_H/L differentially
with 20/8/5/8/20 spacing and
trace width. ( In CPU
breakout => routed 5:5:5 )
MICRO-START INT'L CO.,LTD .
434Friday, March 04, 2005
5
of
1
B2
VSS1
AH20
VSS3
AB21
VSS4
W22
VSS5
M23
VSS6
L24
VSS7
AG25
VSS8
AG27
VSS9
D2
VSS10
AF2
VSS11
W6
VSS12
Y7
VSS13
AA8
A A
B B
C C
D D
GND GND
AB9
AA10
B14
Y15
AE16
G20
R20
U20
W20
AA20
AC20
AE20
AG20
AJ20
D21
F21
H21
K21
M21
P21
V21
Y21
AD21
AG21
B22
E22
G22
N22
R22
U22
AG29
AA22
AC22
AG22
AH22
AJ22
D23
F23
H23
K23
P23
V23
Y23
AB23
AD23
AG23
E24
G24
N24
R24
U24
W24
AA24
AC24
AG24
AJ24
B25
C25
B26
D26
H26
M26
Y26
AD26
AF26
AH26
C27
B28
D28
G28
F15
H15
AB17
AD17
B16
G18
AA18
AC18
D19
F19
H19
K19
Y19
AB19
AD19
AF19
N20
VSS14
VSS15
VSS16
J12
VSS17
VSS18
VSS19
VSS20
J18
VSS21
VSS22
VSS23
VSS24
VSS25
VSS26
VSS27
VSS28
VSS29
VSS30
VSS31
VSS32
VSS33
VSS34
VSS35
VSS36
T21
VSS37
VSS38
VSS39
VSS40
VSS41
VSS42
VSS43
VSS44
J22
VSS45
L22
VSS46
VSS47
VSS48
VSS49
VSS50
VSS51
VSS52
VSS53
VSS54
VSS55
VSS56
VSS57
VSS58
VSS59
VSS60
T23
VSS61
VSS62
VSS63
VSS64
VSS65
VSS66
VSS67
VSS68
J24
VSS69
VSS70
VSS71
VSS72
VSS73
VSS74
VSS75
VSS76
VSS77
VSS78
VSS79
VSS80
VSS81
VSS82
VSS83
T26
VSS84
VSS85
VSS86
VSS87
VSS88
VSS89
VSS90
VSS91
VSS92
VSS187
VSS188
VSS206
VSS207
VSS208
VSS209
VSS210
VSS211
VSS212
VSS213
VSS214
VSS215
VSS216
VSS217
VSS218
VSS219
J20
VSS220
L20
VSS221
VSS222
GROUND
VSS93
VSS94
VSS95
VSS96
VSS97
VSS98
VSS99
VSS100
VSS101
VSS102
VSS103
VSS104
VSS105
VSS106
VSS107
VSS108
VSS109
VSS110
VSS111
VSS112
VSS113
VSS114
VSS115
VSS116
VSS117
VSS118
VSS119
VSS120
VSS121
VSS122
VSS123
VSS124
VSS125
VSS126
VSS127
VSS128
VSS129
VSS130
VSS131
VSS132
VSS133
VSS134
VSS135
VSS136
VSS137
VSS138
VSS139
VSS140
VSS141
VSS142
VSS143
VSS144
VSS145
VSS146
VSS147
VSS148
VSS149
VSS150
VSS151
VSS152
VSS153
VSS155
VSS156
VSS157
VSS158
VSS159
VSS160
VSS161
VSS162
VSS163
VSS164
VSS165
VSS166
VSS167
VSS168
VSS169
VSS170
VSS171
VSS172
VSS173
VSS174
VSS175
VSS176
VSS177
VSS178
VSS179
VSS180
VSS181
VSS182
VSS183
VSS184
VSS185
VSS186
VSS189
VSS190
VSS191
VSS192
VSS194
VSS195
VSS196
VSS197
VSS198
VSS199
VSS223
VSS201
VSS202
VSS203
VSS204
VSS205
1
L28
R28
W28
AC28
AF28
AH28
C29
F2
H2
K2
M2
P2
T2
V2
Y2
AB2
AD2
AH2
B4
AH4
B6
G6
J6
L6
N6
R6
U6
AA6
AC6
AH6
F7
H7
K7
M7
P7
T7
V7
AB7
AD7
B8
G8
J8
L8
N8
R8
U8
W8
AC8
AH8
F9
H9
K9
M9
P9
T9
V9
Y9
AD9
B10
G10
J10
L10
N10
R10
U10
W10
AC10
AH10
F11
H11
K11
Y11
AB11
AD11
B12
G12
AA12
AC12
AH12
F13
H13
K13
Y13
AB13
AD13
AF17
G14
J14
AA14
AC14
AE14
D16
E15
K15
AB15
AD15
AH14
E16
G16
J16
AA16
AC16
AE29
AJ26
E18
F17
H17
K17
Y17
U6E
VCORE
AC15
H18
B20
E21
H22
H24
F26
V10
G13
K14
Y14
AB14
G15
AA15
H16
K16
Y16
AB16
G17
AA17
AC17
AE17
F18
K18
Y18
AB18
AD18
AG19
E19
G19
AC19
AA19
F20
H20
K20
M20
P20
T20
V20
Y20
AB20
AD20
G21
N21
R21
U21
W21
AA21
AC21
F22
K22
M22
P22
T22
V22
Y22
AB22
AD22
E23
G23
N23
R23
U23
W23
AA23
AC23
B24
D24
F24
K24
M24
P24
T24
V24
Y24
AB24
AD24
AH24
AE25
K26
P26
V26
L7
VDD1
VDD2
VDD3
VDD4
VDD5
VDD6
J23
VDD7
VDD8
VDD9
N7
VDD10
L9
VDD11
VDD12
VDD13
VDD14
VDD15
VDD16
VDD17
J15
VDD18
VDD19
VDD20
VDD21
VDD22
VDD23
VDD24
J17
VDD25
VDD26
VDD27
VDD28
VDD29
VDD30
VDD31
VDD32
VDD33
VDD34
VDD35
VDD36
VDD39
VDD38
J19
VDD37
VDD40
VDD41
VDD42
VDD43
VDD44
VDD45
VDD46
VDD47
VDD48
VDD49
VDD50
J21
VDD51
L21
VDD52
VDD53
VDD54
VDD55
VDD56
VDD57
VDD58
VDD59
VDD60
VDD61
VDD62
VDD63
VDD64
VDD65
VDD66
VDD67
VDD68
VDD69
L23
VDD70
VDD71
VDD72
VDD73
VDD74
VDD75
VDD76
VDD77
VDD78
VDD79
VDD80
VDD81
VDD82
VDD83
VDD84
VDD85
VDD86
VDD87
VDD88
VDD89
VDD90
VDD91
VDD92
POWER
VDDIO1
VDDIO2
VDDIO3
VDDIO4
VDDIO5
VDDIO7
VDDIO8
VDDIO9
VDDIO10
VDDIO11
VDDIO12
VDDIO13
VDDIO14
VDDIO15
VDDIO16
VDDIO17
VDDIO18
VDDIO19
VDDIO20
VDDIO21
VDDIO22
VDDIO23
VDDIO24
VDDIO25
VDDIO26
VDDIO27
VDDIO28
VDDIO29
VDDIO30
VDDIO31
VDDIO32
VDDIO33
VDDIO34
VDDIO35
VDDIO36
VDDIO37
VDDIO38
VDDIO39
VDDIO40
VDDIO41
VDDIO42
VDDIO43
VDDIO44
VDDIO45
VDDIO46
VDDIO47
VDDIO48
VDDIO49
VDDIO50
VDDIO6
VDD96
VDD97
VDD98
VDD99
VDD100
VDD101
VDD102
VDD103
VDD104
VDD105
VDD106
VDD107
VDD108
VDD109
VDD110
VDD111
VDD112
VDD113
VDD114
VDD115
VDD116
VDD117
VDD118
VDD119
VDD120
VDD121
VDD122
VDD123
VDD124
VDD125
VDD126
VDD127
VDD128
VDD129
VDD130
VDD131
VDD132
VDD133
VDD93
VDD94
VDD95
VDD_25_SUS
E4
G4
J4
L4
N4
U4
W4
AA4
AC4
AE4
D5
AF5
F6
H6
K6
M6
P6
T6
V6
Y6
AB6
AD6
D7
G7
J7
AA7
AC7
AF7
F8
H8
AB8
AD8
D9
G9
AC9
AF9
F10
AD10
D11
AF11
F12
AD12
D13
AF13
F14
AD14
F16
AD16
D15
R4
N28
U28
AA28
AE27
R7
U7
W7
K8
M8
P8
T8
V8
Y8
J9
N9
R9
U9
W9
AA9
H10
K10
M10
P10
T10
Y10
AB10
G11
J11
AA11
AC11
H12
K12
Y12
AB12
J13
AA13
AC13
H14
AB26
E28
J28
U6D
2
Bottom Side of CPU
3
4
5
VDD_25_SUS
VTT_DDR_SUS
C442
X_0.1uF
C445
X_0.1uF
C446
X_0.1uF
C93
4.7uF/1206
C460
X_0.1uF
C98
4.7uF/1206
C108
4.7uF/1206
Bottom Side of CPU
VDD_25_SUS
C448
X_1uF
C454
X_1uF
C459
1uF
C449
1uF
C457
1uF
C450
X_1uF
C451
1uF
CPU SOCKET Inside
VCORE
2
VCORE
VCORE
VCORE
C89
0.22uF
C91
0.22uF
C90
180pF
C95
180pF
C101
180pF
C94
0.22uF
C96
8.2pF
C103
X_0.22uF
C110
X_0.22uF
C112
0.22uF
C97
8.2pF
3
C104
0.22uF
C109
X_0.22uF
C113
8.2pF
Title
AMD K8-754 POWER & GND
Size Document Number Rev
A3
4
Date: Sheet
MICRO-START INT'L CO.,LTD .
MS-7172 0A
534Friday, March 04, 2005
5
of
1
2
VDD_12_A
3
FOR K8M800
4
5
A A
HCLK-12
C22
AVDD2
AGND2
C21
A23
VSS
A10
A8
A24
VLDT
VSS
B8
A25
VLDT
VSS
B13
HCLK+12
A26A9B10
VLDT
VLDT
VSS
VSS
B15
U11A
VLDT
VSS
B17
VLDT
VSS
B19
B23
B24
VLDT
VSS
B21
B22C8D8
B25
VLDT
VSS
B26B9C10
VLDT
VSS
D6
VLDT
VSS
VLDT
VSS
D12
C11
VLDT
VSS
D14
C23
VLDT
VSS
D16
AVDD2
From Claw Hammer
CADOP03
CADOP13
CADOP23
CADOP33
CADOP43
CADOP53
CADOP63
CADOP73
CADOP83
CADOP93
B B
C C
D D
CADOP103
CADOP113
CADOP123
CADOP133
CADOP143
CADOP153
CLKOP03
CLKOP13
CTLOP03
CADON03
CADON13
CADON23
CADON33
CADON43
CADON53
CADON63
CADON73
CADON83
CADON93
CADON103
CADON113
CADON123
CADON133
CADON143
CADON153
CLKON03
CLKON13
CTLON03
-LDTRST28
-LDTSTOP4,11
CADOP0
CADOP1
CADOP2
CADOP3
CADOP4
CADOP5
CADOP6
CADOP7
CADOP8
CADOP9
CADOP10
CADOP11
CADOP12
CADOP13
CADOP14
CADOP15
CLKOP0
CLKOP1
CTLOP0
CADON0
CADON1
CADON2
CADON3
CADON4
CADON5
CADON6
CADON7
CADON8
CADON9
CADON10
CADON11
CADON12
CADON13
CADON14
CADON15
CLKON0
CLKON1
CTLON0
-LDTRST
-LDTSTOP
RPCOMP
PNCOMP
RTCOMP
VDD_12_A
T26
P24
P26
M24
K24
K26
H24
H26
R24
R22
N24
N22
L22
J24
J22
G24
M26
L24
F24
R26
P25
N26
M25
K25
J26
H25
G26
R23
P22
N23
M22
K22
J23
H22
G23
L26
L23
F25
B11
A12
D25
D26
C26
U24
U25
U26
V21
V22
V23
V24
V25
V26
RCADP0
RCADP1
RCADP2
RCADP3
RCADP4
RCADP5
RCADP6
RCADP7
RCADP8
RCADP9
RCADP10
RCADP11
RCADP12
RCADP13
RCADP14
RCADP15
RCLKP0
RCLKP1
RCTLP
RCADN0
RCADN1
RCADN2
RCADN3
RCADN4
RCADN5
RCADN6
RCADN7
RCADN8
RCADN9
RCADN10
RCADN11
RCADN12
RCADN13
RCADN14
RCADN15
RCLKN0
RCLKN1
RCTLN
LDTRST
LDTSTP
RPCOMP
RNCOMP
RTCOMP
VLDT
VLDT
VLDT
VLDT
VLDT
VLDT
VLDT
VLDT
VLDT
R318
M_0R
C24
VLDT
VSS
D18
VLDT
VSS
C25C9D10
VLDT
VLDT
VLDT
VSS
VSS
VSS
D20
E5E6E8F7F8
D11
D22
VLDT
VSS
R319
M_0R
D23
VLDT
VSS
D24D9E10
VLDT
VLDT
VSS
VSS
F12
F13
VLDT
VSS
F14
E11
VLDT
VSS
F17
E21
VLDT
VSS
F18
E22
VLDT
VSS
F26
E23
VLDT
VSS
E24E9F10
VLDT
VLDT
VSS
VSS
G25H1H23
R123
M_0R
VLDT
VSS
HCKGND
F11
F15
VLDT
VLDT
VSS
VSS
J18
F16
VLDT
VSS
J2
F19
VLDT
VSS
J3
F20
VLDT
VSS
J21
F21
VLDT
VSS
J25
R320
M_0R
F22
VLDT
VSS
K4G1K10
F23
VLDT
VSS
G21
VLDT
VSS
K11
G22
VLDT
VSS
K12
VDD_12_AVCC3HCK
H21
VLDT
VSS
K13
J10
VLDT
VSS
K14
J11
VLDT
VSS
K15
J12
VLDT
VSS
K16
J13
VLDT
VSS
K17
J14
VLDT
VSS
K23H2L10
J15
VLDT
VSS
J16
VLDT
VLDT
TCADP10
TCADP11
TCADP12
TCADP13
TCADP14
TCADP15
TCADN10
TCADN11
TCADN12
TCADN13
TCADN14
TCADN15
VSS
VSS
L11
J17
K18
K21
VLDT
VLDT
TCADP0
TCADP1
TCADP2
TCADP3
TCADP4
TCADP5
TCADP6
TCADP7
TCADP8
TCADP9
TCLKP0
TCLKP1
TCTLP
TCADN0
TCADN1
TCADN2
TCADN3
TCADN4
TCADN5
TCADN6
TCADN7
TCADN8
TCADN9
TCLKN0
TCLKN1
TCTLN
VLDT
VLDT
VLDT
VLDT
VLDT
VLDT
VLDT
VLDT
VLDT
VLDT
VLDT
VLDT
VLDT
VLDT
VLDT
VLDT
VLDT
VSS
VSS
L13
L12
L14
To Claw Hammer
L18
VLDT
VLDT
CADIP0
B12
CADIP1
A13
CADIP2
B14
CADIP3
A15
CADIP4
A17
CADIP5
B18
CADIP6
A19
CADIP7
B20
CADIP8
E12
CADIP9
D13
CADIP10
E14
CADIP11
D15
CADIP12
D17
CADIP13
E18
CADIP14
D19
CADIP15
E20
CLKIP0
B16
CLKIP1
E16
CTLIP0
A21
CADIN0
C12
CADIN1
A14
CADIN2
C14
CADIN3
A16
CADIN4
A18
CADIN5
C18
CADIN6
A20
CADIN7
C20
CADIN8
E13
CADIN9
C13
CADIN10
E15
CADIN11
C15
CADIN12
C17
CADIN13
E19
CADIN14
C19
CADIN15
D21
CLKIN0
C16
CLKIN1
E17
CTLIN0
A22
VDD_12_A
L21
M18
N18
N21
P18
P21
R18
T18
T21
T22
T23
T24
T25
U18
U21
U22
U23
VSS
VSS
L15
VIA-K8M800-VT8380
CADIP0 3
CADIP1 3
CADIP2 3
CADIP3 3
CADIP4 3
CADIP5 3
CADIP6 3
CADIP7 3
CADIP8 3
CADIP9 3
CADIP10 3
CADIP11 3
CADIP12 3
CADIP13 3
CADIP14 3
CADIP15 3
CLKIP0 3
CLKIP1 3
CTLIP0 3
CADIN0 3
CADIN1 3
CADIN2 3
CADIN3 3
CADIN4 3
CADIN5 3
CADIN6 3
CADIN7 3
CADIN8 3
CADIN9 3
CADIN10 3
CADIN11 3
CADIN12 3
CADIN13 3
CADIN14 3
CADIN15 3
CLKIN0 3
CLKIN1 3
CTLIN0 3
FOR K8T800pro
VCC3
FB13 XT_0R
HCKGND
R321 XT_0R
PNCOMP
RTCOMP
C195 0.1uF
Around NB
R111 49.9R/1%
R113 100R/1%
RPCOMP
R112 49.9R/1%
VCC3HCK
C219
XT_C1000P50X
VDD_12_A
C217
X_C1U10Y
CB13
X_C1000P50X
5020
VDD_12_A
Title
VIA K8M800 PART1
Size Document Number Rev
A3
1
2
3
4
Date: Sheet
MICRO-START INT'L CO.,LTD .
MS-7172 0A
634Friday, March 04, 2005
5
of
1
2
3
4
5
K8M800:0Ohm;K8T800 pro:bead
VCCA3
C238
C241
1uF
VLAD0 11
VLAD1 11
VLAD2 11
VLAD3 11
VLAD4 11
VLAD5 11
VLAD6 11
VLAD7 11
C233
X_C1000P50N
PWROK_NB# 10
PCIDEVRST# 18,24,26
SUSST# 10
R128 10K
AR 21
AG 21
AB 21
HSYNC 21
VSYNC 21
GUICLK 12
PIRQ#A 9,16,17
DDCCLK 21
DDCDATA 21
VCC3
CB14
X_C1000P50X
For K8M800.
TYPEDET# 16
4
K8M800 and K8T800pro will be 0.625V
VCC2_5
R137
3K/1%
C228
0.1uF
LVREF_NB
R136
1K/1%
C230
0.1uF
LAYOUT: Place caps on the bottom of N B
VDDQ
C466
X_C0.1U25Y
C480
X_C0.1U25Y
LAYOUT: Place caps as close NB as possible
FOR K8M800 -- AN307B
R135 M_100K
AGPVREF_GC
TESTIN
VPAR
AGPNCOMP
AGPPCOMP
LCOMPP
Title
VIA K8M800 PART2
Size Document Number Rev
A3
Date: Sheet
MS-7172 0A
C475 10uF/10V/0805
C229 0.1uF
R132 4.7K
R238 X_8.2K
R151 60.4R/1%
R150 60.4R/1%
R131 360R/1%
VCC2_5
VDDQ
MICRO-START INT'L CO.,LTD .
734Friday, March 04, 2005
5
of
AD20
AD21
AF24
AE24
AE19
AF20
AD24
AF25
AE21
AF19
AE23
AF23
AF22
AD22
AF26
AD23
AF21
AD19
AE26
AD25
AC26
AD26
AC17
B3
A3
A2
C4
A1
B1
C6
E7
D3
P2
C2
P1
C1
J1
K2
K3
L4
K1
L2
L3
M4
L1
M2
M3
M1
P4
N1
N4
N3
P3
N2
D2
VSS
L16
FOR K8T800pro
VCC3
FB18
XT_0R
M_1000pF/X7R
VLAD0
VLAD1
VLAD2
VLAD3
VLAD4
VLAD5
VLAD6
VLAD7
VBE0# 11
VPAR 11
UPSTB 11
UPSTB# 11
DNSTB 11
DNSTB# 11
UPCMD 11
LVREF_NB
DNCMD 11
LCOMPP
TESTIN
DEBUG
RSET
R143 M_90.9R/1%
R141 M_1K
For K8M800 strapping pin
R168 4.7K
R169 4.7K
R170 4.7K
Configuration:
Both TMDS trasmitter and / or TV
encoder are on AGP riser.
3C5.12[5]==0
3C5.3E[0]==1
K8M800/K8T800pro AGP 8X ,V-Link, Misc. Control
VDDQ
A A
ST016
ST116
ST216
GAD0
GAD1
GAD2
GAD3
GAD4
GAD5
GAD6
GAD7
GAD8
GAD9
GAD10
GAD11
GAD12
GAD13
GAD14
GAD15
GAD16
GAD17
GAD18
GAD19
GAD20
GAD21
GAD22
GAD23
GAD24
GAD25
GAD26
GAD27
GAD28
GAD29
GAD30
GAD31
GC/BE#0
GC/BE#1
GC/BE#2
GC/BE#3
AD_STBS0
AD_STBF0
AD_STBS1
AD_STBF1
GFRAME
GIRDY
GTRDY
GDEVSEL
GSTOP
GPAR
RBF
WBF
GREQ
GGNT
GSERR
SBA0
SBA1
SBA2
SBA3
SBA4
SBA5
SBA6
SBA7
SB_STBS
SB_STBF
ST0
ST1
ST2
AGPPCOMP
AGPNCOMP
AGPVREF_GC
DBIL
DBIH
GAD016
GAD116
GAD216
GAD316
GAD416
GAD516
GAD616
GAD716
GAD816
GAD916
GAD1016
GAD1116
GAD1216
GAD1316
GAD1416
GAD1516
GAD1616
GAD1716
GAD1816
GAD1916
GAD2016
GAD2116
GAD2216
GAD2316
B B
C C
D D
GAD2416
GAD2516
GAD2616
GAD2716
GAD2816
GAD2916
GAD3016
GAD3116
GC/BE#016
GC/BE#116
GC/BE#216
GC/BE#316
AD_STBS016
AD_STBF016
AD_STBS116
AD_STBF116
GFRAME16
GIRDY16
GTRDY16
GDEVSEL16
GSTOP16
GPAR16
RBF16
WBF16
GREQ16
GGNT16
GSERR16
GCLK_NB12
SBA016
SBA116
SBA216
SBA316
SBA416
SBA516
SBA616
SBA716
SB_STBS16
SB_STBF16
AGPVREF_GC16
AGP8XDET#16
DBIL16
DBIH16
1
AF18
GD0/FPD10
AD18
GD1/FPD11
AE18
GD2/FPDVICLK
AF17
GD3/FPD09
AD17
GD4/FPD08
AD16
GD5/FPD07
AE16
GD6/FPD06
AF16
GD7/FPD05
AF14
GD8/FPDVIDET
AD14
GD9/FPDVIHS
AD13
GD10/FPD01
AE13
GD11/FPD23
AF13
GD12/FPD00
AD12
GD13/FPD22
AF12
GD14/FPD21
AE12
GD15/FPD20
AD10
GD16/FPD18
AE10
GD17/FPD17
AF10
GD18/FPD16
AD9
GD19/FPDE
AF9
GD20/FPD14
AF8
GD21/FPCLK
AE9
GD22/FPD13
AD8
GD23/FPD15
AF6
GD24/DVP1D09
AD7
GD25
AE6
GD26/DVP1D10
AD5
GD27
AF5
GD28/DVP1D07
AF4
GD29/DVP1D06
AE4
GD30/DVP1D08
AD4
GD31/DVP1D04
AD15
GCBE0/FPD03
AF11
GCBE1/SB_DA
AD11
GCBE2/FPD19
AC7
GCBE3/DVP1D11
AF15
ADSTB0S/FPD02
AE15
ADSTB0F/FPD04
AF7
ADSTB1S/FPDET
AE7
ADSTB1F/FPD12
AC9
GFRAME/FPHS
AC10
GIRDY/SB_CK
AC14
GTRDY
AC11
GDEVSEL/FPVS
AC12
GSTOP/FPDVICLK_N
AC16
GPAR/FPDVIVS
AD6
RBF
AC1
WBF/FPCLK_N
Y1
GREQ/DVI_DDCCK
AA3
GGNT/DVI_DDCDA
AC15
GSERR/FPDVIDE
A11
GCLK
AC2
SBA0/DVP1VS
AC3
SBA1/DVP1DE
AD1
SBA2/DVP1D00
AD2
SBA3/DVP1HS
AF2
SBA4/DVP1D05
AD3
SBA5/DVP1D03
AE3
SBA6/DVP1CLK
AF3
SBA7/DVP1CLK_N
AE1
SB_STBS/DVP1D02
AF1
SB_STBF/DVP1D01
AA2
ST0
AA1
ST1/DVP1DET
AB1
ST2
V1
AGPPCOMP
W1
AGPNCOMP
AC13
AGPVREF0
AC6
AGPVREF1
Y2
AGP8XDET
AC4
DBIL
AC5
DBIH
VSSQQ
T1
U1
VCCQQ
VSS
VSS
VSS
VSS
VSS
VSS
R11
R12
R13
R14
R15
2
VSS
VCC4/NC
VSS
VCC4/NC
VSS
VCC4/NC
VSS
M5K8M9L8N9P9R9
N5
L5K9L9
J9
VCC4/NC
VCC4/NC
VCC4/NC
VCC4/NC
VSS
VCC4/NC
VCC4/NC
VCC4/NC
VCC4/NC
VCC4/NC
VCC4/NC
VCC4/NC
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
P11
P12
P13
P14
P15
P16
P17
P23R1R2R3R4R5R10
VCC4/NC
VCC4/NC
VCC4/NC
VCC4/NC
VCC4/NC
VCC4/NC
VSS
VSS
VSS
VSS
VSS
VSS
N13
N14
N15
N16
N17
N25P5P10
F6F2F5E1F4
G2G3G4G5H3H4H5J4J5
VCC4/NC
VCC4/NC
VSS
VSS
N10
N11
N12
VCCA3VDD3
F1K5E4E2E3
F3
VCC4/NC
VCC4/NC
VCC4/NC
VCC4/NC
VCC4/NC
TVD00/DVP0D00/NC
TVD01/DVP0D01/NC
TVD02/DVP0D02/NC
TVD03/DVP0D03/NC
TVD04/DVP0D04/NC
TVD05/DVP0D05/NC
TVD06/DVP0D06/NC
TVD07/DVP0D07/NC
TVD08/DVP0D08/NC
TVD09/DVP0D09/NC
TVD10/DVP0D10/NC
TVD11/DVP0D11/NC
TVCLKIN/DVP0DET/NC
TVCLK/DVP0DCLK/NC
VSS
VSS
VSS
VSS
VSS
M15
M16
M17
M21
M23
D1
VCC4/NC
VCC4/NC
VCC4/NC
VCC4/NC
VCC4/NC
VCC4/NC
VPAR
UPSTB
UPSTB
DNSTB
DNSTB
UPCMD
DNCMD
LVREF
LCOMPP
PWRGD
PCIRST
TESTIN
SUSTAT
DEBUG
AR/NC
AG/NC
AB/NC
RSET/NC
HSYNC/NC
VSYNC/NC
XIN/NC
INTA/NC
BISTIN/NC
SPCLK1/NC
SPCLK2/NC
SPD1/NC
SPD2/NC
TVDE/DVP0DE/NC
TVHS/DVP0HS/NC
TVVS/DVP0VS/NC
GPO0/NC
GPOUT/NC
VSS
VSS
VSS
VSS
VSS
VSS
VSS
M10
L25
M11
M12
M13
M14
VIA-K8M800-VT8380
3
U11B
VD0
VD1
VD2
VD3
VD4
VD5
VD6
VD7
VBE
L17
VSS
1
2
3
4
5
VCC1
VCC1
VCC1
VCC1
VCC1
VCC1
VCC1
VCC1
VCC1
VCC1
VCC1
VCC1
VCC1
VCC1
VCC1
VCC1
VCC1
VCC1
VCC1
VCC1
VCC1
VCC1
VCC1
VCC1
VCC1
VCC1
VCC1
VCC1
VCC1
VCC1
VCC1
VCC1
VCC1
VCC1
VCC1
VCC1
VCC1
VCC1
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
AA4
AA5
AB11
AB12
AB13
AB14
AB7
AB8
M8
N8
T2
T3
T4
T5
T8
T9
U2
U3
U4
U5
U8
U9
V10
V11
V12
V13
V2
V3
V4
V8
V9
W2
W3
W4
W9
Y3
Y4
Y5
AA21
AA22
AA23
AA24
AA25
AA26
AB21
AB22
AB23
AB24
AB25
AB26
F9
H10
H11
H12
H15
H16
H8
H9
J8
K19
L19
M19
P8
R19
R8
T19
U19
V18
V19
W10
W11
W12
W13
W14
W19
Y20
Y21
Y22
Y23
Y24
Y25
Y26
AB16
AC8
AC22
AC23
AC24
AE2
AE5
AE8
AE11
AE14
AE17
AE20
AE22
AE25
VDDQ
VDDQ
Power and Ground Connections
LAYOUT : Popualte caps on the bottom side of NB.
VDD_12_A
C463
CB12
X_C1U10Y
10uF/10V/0805
VDDQ
C467
X_C1U10Y
VDDQ
C280
0.1uF
VDDQ
C295
1uF
VDDQ
C276
X_C0.1U25Y
2
C469
X_C1U10Y
C464
X_C0.22U16Y
C474
X_C1U10Y
C292
X_C0.1U25Y
C293
1uF
C274
X_C0.1U25Y
C465
X_C1U10Y
C479
X_C1U16Y
C279
0.1uF
C254
1uF
C296
X_C1U10Y
C468
X_C1U10Y
C470
X_C1000P50N
C268
X_C1U10Y
C264
X_C1U10Y
C275
X_C1U10Y
3
C473
X_C1000P50N
VDDQ
C471
C476
X_4.7uF/10V/0805
X_4.7uF/10V/0805
VDD3
C477
C472
X_4.7uF/10V/0805
X_4.7uF/10V/0805
LAYOUT: Place caps on the bottom of SB
VCC2_5
C481
X_C0.1U25Y
VCC2_5
C336
C332
1uF
0.1uF
4
For K8M800 Only
CP5
X_COPPER
X_COPPER
1
3
5
7
RGBPLL
C234
M_1000pF/X7R
GND_RGBPLL
DAC_PLL
C235
M_1000pF/X7R
GND_DAC
R146
M_0R/0805
2
4
RN65
6
M_0R-8P4R
8
C231
M_1uF/10V
C242
M_1uF/10V
CB3
M_1uF/0805
CB4
M_1000pF/X7R
5020
VDDQ
FB17
M_0R
FB14 X_0R
VDD3
FB15 M_0R
FB16 X_0R
CP6
VCC3 VDD3
Note: When use K8T800,
these power circuit for
GFX analog power should be
NOPOPed.
For K8M800/K8T800 Pro Only
VCC3
FB12
X_0R
CP4
X_COPPER
VCC3
Title
Size Document Number Rev
A3
Date: Sheet
AVDD1
C200
1000pF
FB11 X_0R
CP3
X_COPPER
C199
21
1000pF
1uF
AVDD2
C201
AGND2
CB9
X_C1000P50X
5020
C202
1uF
MICRO-START INT'L CO.,LTD .
VIA K8M800 PART3
MS-7172 0A
834Friday, March 04, 2005
5
of
VSUSNB
C225
1uF
A A
B B
C C
D D
AVDD1
RGBPLL
GND_RGBPLL
RGBPLL
GND_RGBPLL
DAC_PLL
GND_DAC
DAC_PLL
GND_DAC
R129 22R
VDDQ
1
U11C
AC25
VSUS15/VSUS25
E25
AVDD1
E26
AGND1
D5
VCCPLL1/NC
A5
VCCPLL2/NC
C5
GNDPLL1/NC
B5
GNDPLL2/NC
A6
VCCPLL3/NC
B6
GNDPLL3/NC
B2
DACVDD/NC
C3
GNDDAC1/NC
D4
GNDDAC2/NC
A4
VCCRGB/NC
B4
GNDRGB/NC
A7
NC
D7
NC
AB17
VCC2
AB18
VCC2
AB19
VCC2
AB20
VCC2
AC18
VCC2
AC19
VCC2
AC20
VCC2
AC21
VCC2
V14
VCC2
V15
VCC2
V16
VCC2
V17
VCC2
W15
VCC2
W16
VCC2
W17
VCC2
W18
VCC2
B7
VSS/NC
C7
VSS/NC
R16
VSS
R17
VSS
R21
VSS
R25
VSS
T10
VSS
T11
VSS
T12
VSS
T13
VSS
T14
VSS
T15
VSS
T16
VSS
T17
VSS
U10
VSS
U11
VSS
U12
VSS
U13
VSS
U14
VSS
U15
VSS
U16
VSS
U17
VSS
V5
VSS
W5
VSS
W21
VSS
W22
VSS
W23
VSS
W24
VSS
W25
VSS
W26
VSS
AB2
VSS
AB3
VSS
AB4
VSS
AB5
VSS
AB6
VSS
AB9
VSS
AB10
VSS
AB15
VSS
VIA-K8M800-VT8380
1
2
3
4
5
VCC3
USBN1
USBP1
USBN0
H9
H10
H12J8K8L8M8N8P8R8R19
GND
GND
E8
GND
GND
F25
H23
H11
VCC33
VCC33
VCC33
GND
GND
GND
J21
J25B2A17
VCC33
VCC33
USBGND
A13
VCC33
USBGND
A15
AD017,18
AD117,18
AD217,18
A A
B B
C C
AD317,18
AD417,18
AD517,18
AD617,18
AD717,18
AD817,18
AD917,18
AD1017,18
AD1117,18
AD1217,18
AD1317,18
AD1417,18
AD1517,18
AD1617,18
AD1717,18
AD1817,18
AD1917,18
AD2017,18
AD2117,18
AD2217,18
AD2317,18
AD2417,18
AD2517,18
AD2617,18
AD2717,18
AD2817,18
AD2917,18
AD3017,18
AD3117,18
C_BE#017,18
C_BE#117,18
C_BE#217,18
C_BE#317,18
FRAME#17,18
DEVSEL#17,18
IRDY#17,18
TRDY#17,18
STOP#17,18
SERR#17
PAR17,18
PERR#17,18
PCIRST#16,26
PIRQ#A7,16,17
PIRQ#B16,17
PIRQ#C17
PIRQ#D17
PIRQ#E17
PIRQ#F17
PIRQ#G18
PREQ#017
PREQ#117
PREQ#217
PREQ#317
PREQ#417
PREQ#518
PGNT#017
PGNT#117
PGNT#217
PGNT#317
PGNT#417
PGNT#518
AD0
AD1
AD2
AD3
AD4
AD5
AD6
AD7
AD8
AD9
AD10
AD11
AD12
AD13
AD14
AD15
AD16
AD17
AD18
AD19
AD20
AD21
AD22
AD23
AD24
AD25
AD26
AD27
AD28
AD29
AD30
AD31
C_BE#0
C_BE#1
C_BE#2
C_BE#3
FRAME#
DEVSEL#
IRDY#
TRDY#
STOP#
SERR#
PAR
PERR#
PCIRST#
PIRQ#A
PIRQ#B
PIRQ#C
PIRQ#D
PIRQ#E
PIRQ#F
PIRQ#G
INTH#
PREQ#0
PREQ#1
PREQ#2
PREQ#3
PREQ#4
PREQ#5
PGNT#0
PGNT#1
PGNT#2
PGNT#3
PGNT#4
PGNT#5
G2
AD0
J4
AD1
J3
AD2
H3
AD3
F1
AD4
G1
AD5
H4
AD6
F2
AD7
E1
AD8
G3
AD9
E3
AD10
D1
AD11
G4
AD12
D2
AD13
D3
AD14
F3
AD15
K3
AD16
L3
AD17
K2
AD18
K1
AD19
M4
AD20
L2
AD21
N4
AD22
L1
AD23
M2
AD24
M1
AD25
P4
AD26
N3
AD27
N2
AD28
N1
AD29
P1
AD30
P2
AD31
E2
CBE0
C1
CBE1
L4
CBE2
M3
CBE3
J1
FRAME
H2
DEVSEL
J2
IRDY
H1
TRDY
K4
STOP
C2
SERR
F4
PAR
C3
PERR
R1
PCIRST
A4
INTA
B4
INTB
B5
INTC
C4
INTD
D4
INTE
E4
INTF
A3
INTG
B3
INTH
A5
REQ0
B6
REQ1
C5
REQ2
D5
REQ3
P3
REQ4
R3
REQ5
A6
GNT0
D6
GNT1
C6
GNT2
E5
GNT3
R4
GNT4
R2
GNT5
GND
GND
A1A2B1
VCC33
VCC33
VCC33
USBGND
USBGND
USBGND
A19
A21
VCC33
VCC33
USBGND
USBGND
B13
B15
T8
VCC33
VCC33
USBGND
USBGND
B17
B19
T19
U8
VCC33
VCC33
USBGND
USBGND
B21
C13
U19V8V19
VCC33
VCC33
USBGND
USBGND
C14
C15
C16
V21W9W10
VCC33
VCC33
VCC33
USBGND
USBGND
USBGND
C17
C18
W11
VCC33
VCC33
USBGND
USBGND
C19
C20
W17
W18
VCC33
VCC33
USBGND
USBGND
C21
D13
W19
W21
VCC33
VCC33
USBGND
USBGND
D15
D17
Y21
W8
VCC33
VCC33
USBGND
USBGND
D19
D21
USBGND
USBGND
E13
E15
USBGND
USBGND
E17
E19
USBVDD
USBVDD
USBVDD
USBVDD
USBVDD
USBVDD
USBVDD
USBVDD
USBVDD
USBVDD
USBVDD
USBVDD
USBSUS25
PLLVDDA
PLLVDDA
PLLGNDA
PLLGNDA
USBP0+
USBP1+
USBP2+
USBP3+
USBP4+
USBP5+
USBP6+
USBP7+
USBOC0
USBOC1
USBOC2
USBOC3
USBOC4
USBOC5
USBOC6
USBOC7
USBCLK
USB REXT
UDPWR
UDPWREN
KBCK/KA20G
KBDT/KBRC
MSCK/IRQ1
MSDT/IRQ12
USBGND
USBGND
USBGND
E21
H13
H15
H14
USBP0ÂUSBP1ÂUSBP2ÂUSBP3ÂUSBP4ÂUSBP5ÂUSBP6ÂUSBP7-
USBGND
USBGND
H16
H17
U16A
USBGND
USBGND
VIA-VT8237R
H18
A22
B22
C22
D22
E22
F22
J13
J14
J15
J16
J17
J18
C24
A23
B23
D23
C23
E20
D20
A20
B20
E18
D18
A18
B18
D16
E16
A16
B16
D14
E14
A14
B14
C26
D24
B26
C25
B24
A24
A26
A25
E23
B25
D26
D25
W3
V1
W1
W2
3VDUAL
C347
CB7
10uF/10V/1206
0.1uF
VSUS2_5
C346
0.1uF
near SB
USBVCCA
VCC2_5
CB8
X_C1U10Y
USBGNDA
USBP0
USBN0
USBP1
USBN1
USBP2
USBN2
USBP3
USBN3
USBP4
USBN4
USBP5
USBN5
USBP6
USBN6
USBP7
USBN7
USB_OC#1
C333 X_C0.1U25Y RN92
USB_OC#5
C337 X_C0.1U25Y
USBCLK_SB
USBREXT
R245 6.04K/1%
USBP0 22
USBN0 22
USBP1 22
USBN1 22
USBP2 22
USBN2 22
USBP3 22
USBN3 22
USBP4 22
USBN4 22
USBP5 22
USBN5 22
USBP6 22
USBN6 22
USBP7 22
USBN7 22
USB_OC#1 22
USB_OC#5 22
USBCLK_SB 12
R239 10K
KBCLK# 25
KBDAT# 25
MSCLK# 25
MSDAT# 25
LAYOUT: Place caps on the bottom of SB
VSUS2_53VDUAL VCC2_5 VCC3
DEVSEL#
TRDY#
IRDY#
FRAME#
SERR#
PERR#
INTH#
STOP#
PREQ#1
PREQ#0
PREQ#4
PREQ#2
PREQ#5
PREQ#3
RN91
2.7K-8P4R
1 2
3 4
5 6
7 8
1 2
3 4
5 6
7 8
2.7K-8P4R
2.7K-10P8R
RN89
1
1
2
2
3
3
4
4
6
6
7
7
8
8
9
9510
USBP0
USBN7
USBP7
USBN6
USBP6
USBP3
USBN3
USBP2
USBN2
USBP5
USBN5
USBP4
USBN4
Near Connector
VCC3
VCC
5
10
RN64
1 2
3 4
5 6
7 8
15K-8P4R
RN101 15K-8P4R
7 8
5 6
3 4
1 2
7 8
5 6
3 4
1 2
RN49 15K-8P4R
RN102
1 2
3 4
5 6
7 8
15K-8P4R
PGNT#2
PGNT#5
PGNT#4
PGNT#3
PGNT#1
PGNT#0
PIRQ#G
PIRQ#F
PIRQ#E
PIRQ#B
PIRQ#A
PIRQ#C
PIRQ#D
2.7K-10P8R
RN96
1
1
2
2
3
3
4
4
6
6
7
7
8
8
9
9510
2.7K-10P8R
RN88
1
1
2
2
3
3
4
4
6
6
7
7
8
8
9
9510
VCC3
5
10
VCC
5
10
CB17
X_C0.1U25Y
D D
1
2
3
CB22
X_C0.01U50X
C482
X_C1U10Y
4
CB16
X_C1U10Y
CB18
X_C1U10Y
Title
VT8237R Part1
Size Document Number Rev
A3
Date: Sheet
CB19
X_C1U10Y
CB20
X_C1U10Y
MICRO-START INT'L CO.,LTD .
MS-7172 0A
934Friday, March 04, 2005
5
of
1
J9
J10
J11
PDD0
PDD023
PDD123
PDD223
PDD323
A A
B B
Using external PHY
C C
D D
STXP_123
STXN_123
SRXN_123
SRXP_123
STXP_223
STXN_223
SRXN_223
SRXP_223
VCC2_5
CP10
FB22
X_601S
PDD423
PDD523
PDD623
PDD723
PDD823
PDD923
PDD1023
PDD1123
PDD1223
PDD1323
PDD1423
PDD1523
PDREQ23
PDDACK#23
PDIOR#23
PDIOW#23
PIORDY23
PDCS#123
PDCS#323
PDA023
PDA123
PDA223
IRQ1423
SDD023
SDD123
SDD223
SDD323
SDD423
SDD523
SDD623
SDD723
SDD823
SDD923
SDD1023
SDD1123
SDD1223
SDD1323
SDD1423
SDD1523
SDREQ23
SDDACK#23
SDIOR#23
SDIOW#23
SIORDY23
SDCS#123
SDCS#323
SDA023
SDA123
SDA223
IRQ1523
X_C0.1U25YC349
R220 X_360R1%
1000pFC364
near chipset
near chipset
12
C358
0.1uF
1
1000pFC365
1200pF/X7RC366
1200pF/X7RC367
1000pFC354
1000pFC355
1200pF/X7RC356
1200pF/X7RC357
+2.5VSATA
C353
1uF
SRXN_1
SRXP_1
STXP_2 STXP2
PDD1
PDD2
PDD3
PDD4
PDD5
PDD6
PDD7
PDD8
PDD9
PDD10
PDD11
PDD12
PDD13
PDD14
PDD15
PDREQ
PDDACK#
PDIOR#
PDIOW#
PIORDY
PDCS#1
PDCS#3
PDA0
PDA1
PDA2
IRQ14
SDD0
SDD1
SDD2
SDD3
SDD4
SDD5
SDD6
SDD7
SDD8
SDD9
SDD10
SDD11
SDD12
SDD13
SDD14
SDD15
SDREQ
SDDACK#
SDIOR#
SDIOW#
SIORDY
SDCS#1
SDCS#3
SDA0
SDA1
SDA2
IRQ15
SIDEVREF
SIDECOMP
STXP1STXP_1
STXN1STXN_1
SRXN1
SRXP1
STXN2STXN_2
SRXN2SRXN_2
SRXP2SRXP_2
GNDSATA
AA22
Y24
AA26
AA25
AB26
AC26
AC23
AD25
AD26
AC24
AC25
AB24
AB23
AA24
Y26
AA23
Y23
V24
W26
Y25
Y22
V22
V23
W23
V25
W24
AD24
AC20
AB20
AC21
AE18
AF18
AD18
AD19
AF19
AE20
AF20
AD20
AE21
AF21
AD21
AD22
AF22
AD17
AD23
AF23
AE23
AF17
AF25
AF26
AF24
AC22
AE24
AE26
AC19
AB21
AB13
AC13
AF13
AE13
AB15
AC15
AF15
AE15
W12
W13
W14
W15
W16
AC17
AC11
AB17
AB11
PDD0
PDD1
PDD2
PDD3
PDD4
PDD5
PDD6
PDD7
PDD8
PDD9
PDD10
PDD11
PDD12
PDD13
PDD14
PDD15
PDDREQ
PDDACK
PDIOR
PDIOW
PDRDY
PDCS1
PDCS3
PDA0
PDA1
PDA2
IRQ14
SDD0/TBC1
SDD1/VALID
SDD2
SDD3/RXD2
SDD4/RXD3
SDD5/RXD4
SDD6/RBC0
SDD7/RBC1
SDD8/RXD5
SDD9/RXD6
SDD10/RXD7
SDD11/RXD8
SDD12/RXD9
SDD13/TXD0
SDD14/TXD1
SDD15/TXD2
SDDRQ/RXD1
SDDACK/TBC0
SDIOR/TXD4
SDIOW/TXD3
SDRDY/RXD0
SDCS1/TXD8
SDCS3/TXD9
SDA0/TXD6
SDA1/TXD5
SDA2/TXD7
IRQ15
SVREF
SCOMPP
STXP1
STXN1
SRXN1
SRXP1
STXP2
STXN2
SRXN2
SRXP2
VDDATS
VDDATS
VDDATS
VDDATS
VDDATS
VDDAS
VDDAS
VDDAS
VDDAS
VDD
VDD
GNDATS
GNDATS
AB14
AC14
VDD
VDD
GNDATS
GNDATS
AD12
AD13
K9L9J12
VDD
GNDATS
AD14
2
L18
M9
M18N9N18P9P18R9R18T9T18U9U18V9V10
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
GNDATS
GNDATS
GNDATS
GNDATS
GNDATS
GNDATS
GNDATS
GNDATS
AF14
AD15
AD16
AE12
AE14
AE16
AF12
AF16
AC16
2
VCC2_5
V11
V12
V13
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
GND
GND
GNDAS
GNDAS
AC12
AB16
VT8237
VT8237
GND
GNDAS
GNDAS
AB12
F6F7J5K5P5
PDDACK#
1 - Disable external SATA PHY
PDCS#1
SATA master/slave mode
1 - Disable 0 - Enable
V14
V15
V16
VDD
VDD
VDD
VDD
GND
GND
GND
GND
L11
R5
R230 10K
R208 10K
R207 X_10K
3VDUAL
AA4
V17
V18
VDD
VDD
ACSDIN3/SLP_BTN
GND
GND
GND
L13
L14
L15
L12
AB4
AB5
VSUS33
VSUS33
VSUS33
AOLGP/THRM
GPIOB/Strap2
GPIOC/Strap0
GPIOD/Strap3
GND
GND
GND
L16
M11
VSUS2_5
AB6
T4
U4
VSUS25
VSUS25
VSUS33
ACBITCLK
ACSDIN0
ACSDIN1
ACSDIN2
ACSYNC
ACSDO
ACRST
PME
BATLOW
CPUMISS
RING
SUSST1
EXTSMI
SMBALRT
LID
PWRBTN
PWROK
CLKRUN
CPUSTP
PCISTP
INTRUDER
SUSCLK
SMBCK1
SMBDT1
SMBCK2
SMBDT2
SUSA
SUSB
SUSC
GPI0
GPI1
GPO0
GPO1
GPIOA/Strap1
SERIRQ
SPKR
OSC
TPO
TEST
VDDA0
GNDA0
SREXT
SXO/Strap4
SXI/Strap5
VDDA33
GNDA33
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
M12
M13
M14
M15
K18
VCC3
VCC3
U16B
T1
U3
V2
U1
V3
T2
U2
T3
W4
V4
Y1
Y2
Y3
Y4
AA1
AB1
AC1
AD2
AF1
AB7
AC7
AD6
AE1
AB3
AC4
AB2
AC3
AD1
AA2
AD3
AF2
AE2
AC2
AA3
AE3
AE5
AD5
AF5
AC6
AD9
AF8
AB8
AF9
AE9
AC10
AB10
AD11
AE10
AF10
AE11
AF11
W5
V5
M16
N11
N12
N13
N14
N15
N16
GND
VIA-VT8237R
3
AC_BITCLK
ACSDIN0
AC_SDIN1
AC_SDIN2
AC_SDIN3
ACSYNC
ACSDO
ACRST
PCI_PME#
BATLOW#
CPUMISS
RI#
SUSST#
THRMS#
EXTSMI#
SMBALRT#
ATADET1
PWRBTN#
PWROK_NB#
CLKRUN#
CPUSTP#
PCISTP#
INTRUDER
SUSCLK
SMBCLK1
SMBDATA1
SMBCLK2
SMBDATA2
SUSA#
SUSB#
SUSC#
GPI0
ATADET0
GPO0
GPO1
GPIOA
GPIOB
GPIOC
GPIOD
SERIRQ
SPKR
APICCLK
TPO
TEST
SREXT
VDDA33
3
VDDA0
SXO
SXI
AC_BITCLK 20
PCI_PME# 16,17,18
SUSST# 7
THRMS# 24
ATADET1 23
PWBTIN# 28
PWROK_NB# 7
SMBCLK1 12,13,26
SMBDATA1 12,13,26
SUSB# 16,24,26
SUSC# 26
ATADET0 23
SERIRQ 24
SPKR 28
APICCLK 11,12
R257
4.7K/1%
FB24 X_601S
C360
0.1uF
SXO
SXI
C370
15pF
VCC2_5
1 2
Y3 25MHz/18pF
1 2
C331
0.1uF
CP11
VCC3
C371
15pF
VT8237
*"ACSYNC" = > L P C F WH Command
0 - Enable FWH
1 - Disable FWH(Default)
ACSYNC
GPI0
INTRUDER
RN97
7
ACSYNC
5
ACSDO
3
ACRST
1
22R-8P4R
AC_SDIN2
AC_SDIN3
SUSCLK
EXTSMI#
RI#
CPUMISS
PCI_PME#
BATLOW#
THRMS#
SUSST#
PWBTIN#
PWROK_NB#
GPO1
SMBALRT#
GPO0
SUSB#
SUSC#
ATADET0
ATADET1
SUSA#
AC_SDIN1
CLKRUN#
PCISTP#
CPUSTP#
SERIRQ
TPO
TEST
SPKR
*"SPKR" => CPU Freq. Adjust Setting
1 - Disable (Default)
0 - Enable
SMBCLK1
SMBDATA1
SMBDATA2
SMBCLK2
4
R283 4.7K
R280 1M
R282 1M
AC_SDIN0ACSDIN0
8
AC_SYNC
6
AC_SDOUT
4
AC_RST#
2
R285 4.7K
R286 4.7K
RN100
4.7K-8P4R
1 2
3 4
5 6
7 8
1 2
3 4
5 6
7 8
1 2
3 4
5 6
7 8
R294 X_4.7K
R297 X_4.7K
R287 X_4.7K
RN98
1 2
3 4
5 6
7 8
4.7K-8P4R
RN95
7 8
5 6
3 4
1 2
1 2
3 4
5 6
7 8
RN93 4.7K-8P4R
RN104
1K-8P4R
4
VCC3
VBAT
AC_SDIN0 20
AC_SYNC 20
AC_SDOUT 20
AC_RST# 20
4.7K-8P4R
VCC3
12
34
56
78
5
*"GPIO[A,C]" => LDT Frequency
00 - 200MHz (Default)
01 - 400MHz
*"GPIOB" => LDT Width
0 - 8-Bit (Default)
1 - 16-Bit
*"GPIOD" => Fast command
0 - Disable (Default)
1 - Enable
GPIOA
GPIOD
GPIOB
GPIOC
3VDUAL
Strapping
RN103
4.7K-8P4R
RN99
4.7K-8P4R
*"PDA0/SDA0" => LDT Transmit Control
0 - Disable (Default)
1 - Enable
*"PDA1/SDA1" => External loop test mode
0 - Disable (Default)
1 - Enable
*"PDA2/SDA2" => ROMSIP Select
0 - Disable
1 - Enable(Default)
*"-PDCS3" => T est Mode Select
VCC3
0 - Disable (Default)
1 - Enable
*"EEDI/-SDCS1" => EEPROM Select
0 - BIOS Porting - ACR
1 - External EEPROM (On-board)(Default)
R232 1K
R223 4.7K
VCC3
R198 2.7K
3VDUAL
VCC3
Title
Size Document Number Rev
A3
Date: Sheet
R244 X_4.7K
R243 4.7K
For K8T800Pro
0:External HCLK enable
1:Internal HCLK enable
R284 4.7K
ACSDO
0/1:Enable/disable auto reboot
MICRO-START INT'L CO.,LTD .
VT8237R Part2
MS-7172 0A
10 - 600MHz
11 - 800MHz
1 2
3 4
5 6
7 8
RN94
4.7K-8P4R
R213 X_2.7K
PDA1
PDA2
PDCS#3
PDA0
VT8237
5
VT8237
VT8237
VT8237
VT8237
10 34Friday, March 04, 2005
of
1
2
3
4
5
MTXD0
MTXD1
MTXD3
MTXD2
R262 33R
R265 33R
R266 33R
VCC2_5
VCC2_5
RN87 33R-8P4R
7 8
5 6
3 4
1 2
SEEDI
R260 4.7K
R259
X_4.7K
-LDTSTOP 4,6
VCC2_5
MIITXD0 19
MIITXD1 19
MIITXD3 19
MIITXD2 19
MIITXEN 19
MIIMDCK 19
MIIMDIO 19
R174 1.5K
LAN MAC
SEEDI
EEPROM
0
BIOS1
VCC3
5VSB
3VDUAL
R272 1K
R271 2.7K
VBAT1
BAT-2P_SO41
FERR#
APICD0#
APICD1#
APICCLK
ROMLOCK
GHI#
AGPBZ#
VGATE
VRDSLP
R250 1K
12
GND
GND
AE17
D12
E12
MIISUS25
MIISUS25
GND
GND
AE19
AE22
GND
AE25
GND
AA9
3VDUALVSUS2_5VCC2_5
E11E9E10
D9
MIIVCC
MIIVCC
MIIVCC
MIIVCC
APICD0/APICCS
APICD1/APICACK
GND
GND
GND
GND
T21
AA10
AB18
K19
MCRS
MCOL
MTXENA
MTXD0
MTXD1
MTXD2
MTXD3
MTXCLK
MRXER
MRXCLK
MRXDV
MRXD0
MRXD1
MRXD2
MRXD3
MDCK
MDIO
PHYRST
EECS
EEDO
EEDI
EECK
RAMVCC
RAMGND
FERR
A20M
IGNNE
INTR
STPCLK
DPSLP
VGATE
VIDSEL
VRDSLP
AGPBZ/GPI6
PCICLK
APICCLK
PLLVCC
PLLGND
INIT
NMI
SMI
SLP
GHI
U16C
A11
B11
C11
A10
B10
B9
A9
C10
D10
C9
D8
C8
B8
A8
C7
A7
B7
D7
D11
B12
A12
C12
E7
E6
U24
U26
T24
R26
T25
T26
U25
R24
V26
R22
P21
AC9
AC8
AB9
AD10
R23
U23
R25
T23
T22
U22
VIA-VT8237R
MTXEN
MTXD0
MTXD1
MTXD2
MTXD3
MDCK
MDIO
MIIRST
SEECS
SEEDO
SEEDI
SEECK
+2.5VRAM
FERR#
GHI#
ROMLOCK
VGATE
VRDSLP
AGPBZ#
SBPCLK
APICCLK
APICD0#
APICD1#
+2.5VSBPLL
MIICRS 19
MIICOL 19
MIITXCK 19
MIIRXER 19
MIIRXCK 19
MIIRXDV 19
MIIRXD0 19
MIIRXD1 19
MIIRXD2 19
MIIRXD3 19
MIIRST 19
SEECS 19
SEEDO 19
SEEDI 19
SEECK 19
C338 X_10pF
CB6
0.1uF
MTXEN
MDCK
MDIO
R322 2.2R
CB21
1uF
VIA AN258
SATALED 28
SBPCLK 12
APICCLK 10,12
CP9
12
A A
N21
N22
N23
N24
N25
N26
P22
P23
VCCVK
GND
P15
P16
VCCVK
VCCVK
GND
GND
R11
VCCVK
GND
R13
R12
VCCVK
VCCVK
GND
GND
R14
P24
R15
L21
K21
VLAD0
VLAD07
VLAD17
VLAD27
VLAD37
VLAD47
VLAD57
VLAD67
VLAD77
VBE0#7
UPCMD7
B B
DNCMD7
UPSTB7
UPSTB#7
DNSTB7
DNSTB#7
VPAR7
R246 360R/1%
VLREF_SB
VCOMPP_SB
VCLK12
VLAD1
VLAD2
VLAD3
VLAD4
VLAD5
VLAD6
VLAD7
VCLK
VBE0#
UPCMD
DNCMD
UPSTB
UPSTB#
DNSTB
DNSTB#
VPAR
H25
G26
G25
G23
M26
G24
H26
H24
H22
K26
F26
K22
K24
E24
L26
L25
E26
E25
L24
K23
K25
F24
L22
J23
J26
J24
J22
F23
G22
LPC_AD0
LPC_AD024
LPC_AD124
LPC_AD224
LPC_AD324
C C
LPC_FRAME#24
LPC_REQ#24
ALL_PWRGD26,28
RSMRST#26
LPC_FRAME#
LPC_REQ#
ALL_PWRGD
RSMRST#
VBAT
X1
LPC_AD1
LPC_AD2
LPC_AD3
AD8
AF7
AE7
AD7
AF6
AE6
AE8
AC5
AD4
AF4
AE4
X2
AF3
Y4
32.768KHz/12.5pF
VD0
VD1
VD2
VD3
VD4
VD5
VD6
VD7
VD8
VD9
VD10
VD11
VD12
VD13
VD14
VD15
VBE
UPCMD
DNCMD
UPSTB
UPSTB
DNSTB
DNSTB
VPAR
VLREF
VCOMPP
VCLK
VIOUT
VIIN
LAD0
LAD1
LAD2
LAD3
LFRM
LREQ0
LREQ1
PWRGD
RSMRST
VBAT
RTCX1
RTCX2
L23
VCCVK
P11
VCCVK
VCCVK
GND
GND
P12
VCCVK
GND
P13
P14
VCCVK
GND
P25
VCCVK
VCCVK
GND
GND
R16
P26
M21
VCCVK
GND
R21
T11
M22
VCCVK
VCCVK
GND
GND
T12
M24
M23
VCCVK
GND
T14
T13
M25
VCCVK
VCCVK
GND
GND
T15
L19
M19
VCCVK
GND
T16
W22
N19
VCCVK
VCCVK
GND
GND
W25
P19AA21
VCCVKGND
GND
AB19
GND
AB22
GND
AB25
AC18
0.1uF CB5
R242 1K
R241 330R
R235 330R
R222 X_4.7K
R236 4.7K
R226 4.7K
1 2
3 4
5 6
7 8
RN86
12
D9
BAT54C
VBAT
4.7K-8P4R
3
C400
10uF/10V/1206
VCC3
VBAT
C394
0.01uF
VCC3
JBAT1
1
2
3
H1X3_black
R292
1K
C393
D D
10pF
1
C402
10pF
C335
CB15
0.1uF
C334
0.1uF
VLREF_SB
Under SB Bottom
X_C0.1U25Y
2
3
R225
3K/1%
R224
412R/1%
Title
VT8237R Part3
Size Document Number Rev
A3
4
Date: Sheet
MICRO-START INT'L CO.,LTD .
MS-7172 0A
11 34Friday, March 04, 2005
5
of
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