1
2
3
4
5
MS-7172
A A
B B
C C
Title
Cover Sheet
Block Diagram
AMD K8-754
VIA K8M800
VT8237R
Clock Synthesizer-ICS950405
DDR Damping Resister
DDR DIMM1&2
DDR Terminations
AGP SLOT
PCI Slot 1,2,3
IEEE1394 VIA VT 6307
VIA LAN PHY VT6103L
AC97 Codec ALC655
VGA Port
USB Port
ATA 66/100 & SATA & CPU Fan
LPC W83627THF & ROM & Floppy
K/B,M/S,LPT,COM
MS6 ACPI Power Controller
VCORE ISL6568
System Regulator & Front Panel
EMI parts
Misc
MANUAL PARTS
Power Delivery
Version 0.A
Page
1
2
3 , 4 , 5
6 , 7 , 8
9,10,11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
PCI Routing Table
PCI Device
PCI Slot 1
PCI Slot 2
(Add MEDION SPEC)
PCI Slot 3
EEE1394 VT6307
INTERRUPT IDSEL REQ/GNT
AD19
AD20
AD22
AD21
AD24 5 G
0
1
3
4F AD23
2
A
B
E
C
GPIO List 33
HISTORY
D D
34
Title
Cover Sheet
Size Document Number Rev
A3
1
2
3
4
Date: Sheet
MICRO-START INT'L CO.,LTD .
MS-7172 0A
13 4 Friday, March 04, 2005
5
of
1
2
3
4
5
A A
B B
C C
VRM
Intersil ISL6568
2-Phase PWM
P.27
AGP 8X
Connector
P.16
Analog
Video
Out
IDE Primary
IDE Secendary
SERIAL ATA1
SERIAL ATA2
P.21
P.23
P.23
P.18
P.18
USB2.0
USB Port0~ 7
P.22
UltraDMA
33/66/100
USB
AMD K8 754 pin Process or
HT
VIA K8M800
/ K8T800
P.6~8
V-LINK
VT8237R
P.9~11
LPC Bus
P.3~5
DDR 400
PCI
Block Diagram
2 DDR1
DIMM
Modules
P.13-15
PCI Slot 1
PCI Slot 2
PCI Slot 3
P.17 P.17
P.17
Realtek
AC'97 Codec
P.20
LPC SIO
W83627THF
P.24
LAN PHY
VT6103L
P.19
PCI
1394
VIA VT-6307
D D
1
P.18
2
LPC ROM
P.24
Keyboard
Mouse
3
Floopy Parallel Serial
P.25
P.25
P.24
P.25 P.25
Title
Size Document Number Rev
4
Date: Sheet
MICRO-START INT'L CO.,LTD .
Block Diagram
A3
MS-7172 0A
5
23 4 Friday, March 04, 2005
of
1
2
3
4
5
VDD_12_A
C191
VREF routed as 40~50
mils trace wide ,
A A
B B
C C
D D
Space>25 mils
DDR_VREF 13
VDD_25_SUS
Place near CPU in 1" ,
Routed => 5:10/Trace:Space ,
Same Length
R94 15R/1%
R95 15R/1%
1
C54 X_0.1uF
C67 1000pF
MEMZN
MEMZP
MD63 15
MD62 15
MD61 15
MD60 15
MD59 15
MD58 15
MD57 15
MD56 15
MD55 15
MD54 15
MD53 15
MD52 15
MD51 15
MD50 15
MD49 15
MD48 15
MD47 15
MD46 15
MD45 15
MD44 15
MD43 15
MD42 15
MD41 15
MD40 15
MD39 15
MD38 15
MD37 15
MD36 15
MD35 15
MD34 15
MD33 15
MD32 15
MD31 15
MD30 15
MD29 15
MD28 15
MD27 15
MD26 15
MD25 15
MD24 15
MD23 15
MD22 15
MD21 15
MD20 15
MD19 15
MD18 15
MD17 15
MD16 15
MD15 15
MD14 15
MD13 15
MD12 15
MD11 15
MD10 15
MD9 15
MD8 15
MD7 15
MD6 15
MD5 15
MD4 15
MD3 15
MD2 15
MD1 15
MD0 15
DM7 15
DM6 15
DM5 15
DM4 15
DM3 15
DM2 15
DM1 15
DM0 15
-MDQS7 15
-MDQS6 15
-MDQS5 15
-MDQS4 15
-MDQS3 15
-MDQS2 15
-MDQS1 15
-MDQS0 15
MD63
MD62
MD61
MD60
MD59
MD58
MD57
MD56
MD55
MD54
MD53
MD52
MD51
MD50
MD49
MD48
MD47
MD46
MD45
MD44
MD43
MD42
MD41
MD40
MD39
MD38
MD37
MD36
MD35
MD34
MD33
MD32
MD31
MD30
MD29
MD28
MD27
MD26
MD25
MD24
MD23
MD22
MD21
MD20
MD19
MD18
MD17 MAA3
MD16
MD15
MD14
MD13
MD12
MD11
MD10
MD9
MD8
MD7
MD6
MD5
MD4
MD3
MD2
MD1
MD0
DM7
DM6
DM5
DM4
DM3
DM2
DM1
DM0
-MDQS7
-MDQS6
-MDQS5
-MDQS4
-MDQS3
-MDQS2
-MDQS1
-MDQS0
AE13
AG12
D14
C14
A16
B15
A12
B11
A17
A15
C13
A11
A10
C11
AC1
AC3
AC2
AD1
AE1
AE3
AG3
AJ4
AE2
AF1
AH3
AJ3
AJ5
AJ6
AJ7
AH9
AG5
AH5
AJ9
AJ10
AH11
AJ11
AH15
AJ15
AG11
AJ12
AJ14
AJ16
A13
AA1
AG1
AH7
AH13
A14
AB1
AJ2
AJ8
AJ13
G2
G1
G3
M1
W1
W3
W2
B9
C7
A6
A9
A5
B5
C5
A4
E2
E1
A3
B3
E3
F1
L3
L1
J2
L2
Y1
R1
A7
C2
H1
T1
A8
D1
J1
VTT_SENSE
MEMVREF1
MEMZN
MEMZP
MEMDATA63
MEMDATA62
MEMDATA61
MEMDATA60
MEMDATA59
MEMDATA58
MEMDATA57
MEMDATA56
MEMDATA55
MEMDATA54
MEMDATA53
MEMDATA52
MEMDATA51
MEMDATA50
MEMDATA49
MEMDATA48
MEMDATA47
MEMDATA46
MEMDATA45
MEMDATA44
MEMDATA43
MEMDATA42
MEMDATA41
MEMDATA40
MEMDATA39
MEMDATA38
MEMDATA37
MEMDATA36
MEMDATA35
MEMDATA34
MEMDATA33
MEMDATA32
MEMDATA31
MEMDATA30
MEMDATA29
RSVD_MEMADDA15
MEMDATA28
RSVD_MEMADDA14
MEMDATA27
MEMDATA26
MEMDATA25
MEMDATA24
MEMDATA23
MEMDATA22
MEMDATA21
MEMDATA20
MEMDATA19
MEMDATA18
MEMDATA17
MEMDATA16
MEMDATA15
MEMDATA14
MEMDATA13
MEMDATA12
MEMDATA11
MEMDATA10
MEMDATA9
MEMDATA8
MEMDATA7
MEMDATA6
MEMDATA5
RSVD_MEMADDB15
MEMDATA4
RSVD_MEMADDB14
MEMDATA3
MEMDATA2
MEMDATA1
MEMDATA0
MEMDQS17
MEMDQS16
MEMDQS15
MEMDQS14
MEMDQS13
MEMDQS12
MEMDQS11
MEMDQS10
MEMDQS9
MEMDQS8
MEMDQS7
MEMDQS6
MEMDQS5
MEMDQS4
MEMDQS3
MEMDQS2
MEMDQS1
MEMDQS0
MEMORY INTERFACE
VTT_A4
VTT_A1
VTT_A2
VTT_A3
VTT_B1
VTT_B2
VTT_B3
VTT_B4
MEMRESET_L
MEMCKEA
MEMCKEB
MEMCLK_H7
MEMCLK_L7
MEMCLK_H6
MEMCLK_L6
MEMCLK_H5
MEMCLK_L5
MEMCLK_H4
MEMCLK_L4
MEMCLK_H3
MEMCLK_L3
MEMCLK_H2
MEMCLK_L2
MEMCLK_H1
MEMCLK_L1
MEMCLK_H0
MEMCLK_L0
MEMCS_L7
MEMCS_L6
MEMCS_L5
MEMCS_L4
MEMCS_L3
MEMCS_L2
MEMCS_L1
MEMCS_L0
MEMRASA_L
MEMCASA_L
MEMWEA_L
MEMBANKA1
MEMBANKA0
MEMADDA13
MEMADDA12
MEMADDA11
MEMADDA10
MEMADDA9
MEMADDA8
MEMADDA7
MEMADDA6
MEMADDA5
MEMADDA4
MEMADDA3
MEMADDA2
MEMADDA1
MEMADDA0
MEMRASB_L
MEMCASB_L
MEMWEB_L
MEMBANKB1
MEMBANKB0
MEMADDB13
MEMADDB12
MEMADDB11
MEMADDB10
MEMADDB9
MEMADDB8
MEMADDB7
MEMADDB6
MEMADDB5
MEMADDB4
MEMADDB3
MEMADDB2
MEMADDB1
MEMADDB0
MEMCHECK7
MEMCHECK6
MEMCHECK5
MEMCHECK4
MEMCHECK3
MEMCHECK2
MEMCHECK1
MEMCHECK0
2
D17
A18
B17
C17
AF16
AG16
AH16
AJ17
AG10
AE8
AE7
D10
C10
E12
E11
AF8
AG8
AF10
AE10
V3
V4
K5
K4
R5
P5
P3
P4
D8
C8
E8
E7
D6
E6
C4
E5
H5
D4
G5
K3
H3
E13
C12
E10
AE6
AF3
M5
AE5
AB5
AD3
Y5
AB4
Y3
V5
T5
T3
N5
H4
F5
F4
L5
J5
E14
D12
E9
AF6
AF4
M4
AD5
AC5
AD4
AA5
AB3
Y4
W5
U5
T4
M3
N3
N1
U3
V1
N2
P1
U1
U2
U6B
VTT_DDR_SUS
MCKE0
MCKE1
MEMCLK_H7
MEMCLK_L7
MEMCLK_H6
MEMCLK_L6
MEMCLK_H5
MEMCLK_L5
MEMCLK_H4
MEMCLK_L4
MEMCLK_H1
MEMCLK_L1
MEMCLK_H0
MEMCLK_L0
-MCS3
-MCS2
-MCS1
-MCS0
-MSRASA
-MSCASA
-MSWEA
MEMBANKA1
MEMBANKA0
MAA13
MAA12
MAA11
MAA10
MAA9
MAA8
MAA7
MAA6
MAA5
MAA4
MAA2
MAA1
MAA0
-MSRASB
-MSCASB
-MSWEB
MEMBAKB1
MEMBAKB0
MAB13
MAB12
MAB11
MAB10
MAB9
MAB8
MAB7
MAB6
MAB5
MAB4
MAB3
MAB2
MAB1
MAB0
MCKE0 13,14
MCKE1 13,14
MEMCLK_H7 13,14
MEMCLK_L7 13,14
MEMCLK_H6 13,14
MEMCLK_L6 13,14
MEMCLK_H5 13,14
MEMCLK_L5 13,14
MEMCLK_H4 13,14
MEMCLK_L4 13,14
MEMCLK_H1 13,14
MEMCLK_L1 13,14
MEMCLK_H0 13,14
MEMCLK_L0 13,14
-MCS3 13,14
-MCS2 13,14
-MCS1 13,14
-MCS0 13,14
-MSRASA 13,14
-MSCASA 13,14
-MSWEA 13,14
MEMBANKA1 13,14
MEMBANKA0 13,14
MAA13 13,14
MAA12 13,14
MAA11 13,14
MAA10 13,14
MAA9 13,14
MAA8 13,14
MAA7 13,14
MAA6 13,14
MAA5 13,14
MAA4 13,14
MAA3 13,14
MAA2 13,14
MAA1 13,14
MAA0 13,14
-MSRASB 13,14
-MSCASB 13,14
-MSWEB 13,14
MEMBAKB1 13,14
MEMBAKB0 13,14
MAB13 13,14
MAB12 13,14
MAB11 13,14
MAB10 13,14
MAB9 13,14
MAB8 13,14
MAB7 13,14
MAB6 13,14
MAB5 13,14
MAB4 13,14
MAB3 13,14
MAB2 13,14
MAB1 13,14
MAB0 13,14
CADIP15 6
CADIN15 6
CADIP14 6
CADIN14 6
CADIP13 6
CADIN13 6
CADIP12 6
CADIN12 6
CADIP11 6
CADIN11 6
CADIP10 6
CADIN10 6
CADIP9 6
CADIN9 6
CADIP8 6
CADIN8 6
CADIP7 6
CADIN7 6
CADIP6 6
CADIN6 6
CADIP5 6
CADIN5 6
CADIP4 6
CADIN4 6
CADIP3 6
CADIN3 6
CADIP2 6
CADIN2 6
CADIP1 6
CADIN1 6
CADIP0 6
CLKIP1 6
CLKIN1 6
CLKIP0 6
CLKIN0 6
CTLIP0 6
CTLIN0 6
3
CADIN0 6
VLDT0
C147
X_0.22uF
VDD_12_A
CADIP15
CADIN15
CADIP14
CADIN14
CADIP13
CADIN13
CADIP12
CADIN12
CADIP11
CADIN11
CADIP10
CADIN10
CADIP9
CADIN9
CADIP8
CADIN8
CADIP7
CADIN7
CADIP6
CADIN6
CADIP5
CADIN5
CADIP4
CADIN4
CADIP3
CADIN3
CADIP2
CADIN2
CADIP1
CADIN1
CADIP0
CADIN0
R41 49.9R/1%
R45 49.9R/1%
0.22uF
CTLIP1
CTLIN1
D29
D27
D25
C28
C26
B29
B27
T25
R25
U27
U26
V25
U25
W27
W26
AA27
AA26
AB25
AA25
AC27
AC26
AD25
AC25
T27
T28
V29
U29
V27
V28
Y29
W29
AB29
AA29
AB27
AB28
AD29
AC29
AD27
AD28
Y25
W25
Y27
Y28
R27
R26
T29
R29
C146
C163
X_0.22uF
0.22uF
U6A
N12-7540010-F02
VLDT0_A6
VLDT0_A5
VLDT0_A4
VLDT0_A3
VLDT0_A2
VLDT0_A1
VLDT0_A0
L0_CADIN_H15
L0_CADIN_L15
L0_CADIN_H14
L0_CADIN_L14
L0_CADIN_H13
L0_CADIN_L13
L0_CADIN_H12
L0_CADIN_L12
L0_CADIN_H11
L0_CADIN_L11
L0_CADIN_H10
L0_CADIN_L10
L0_CADIN_H9
L0_CADIN_L9
L0_CADIN_H8
L0_CADIN_L8
L0_CADIN_H7
L0_CADIN_L7
L0_CADIN_H6
L0_CADIN_L6
L0_CADIN_H5
L0_CADIN_L5
L0_CADIN_H4
L0_CADIN_L4
L0_CADIN_H3
L0_CADIN_L3
L0_CADIN_H2
L0_CADIN_L2
L0_CADIN_H1
L0_CADIN_L1
L0_CADIN_H0
L0_CADIN_L0
L0_CLKIN_H1
L0_CLKIN_L1
L0_CLKIN_H0
L0_CLKIN_L0
L0_CTLIN_H1
L0_CTLIN_L1
L0_CTLIN_H0
L0_CTLIN_L0
HYPER TRANSPORT - LINK0
U6_X1
CPU_RM
4
L0_CADOUT_H15
L0_CADOUT_H14
L0_CADOUT_H13
L0_CADOUT_H12
L0_CADOUT_H11
L0_CADOUT_H10
1
2
C174
0.22uF
C184
0.22uF
C164
0.22uF
VLDT0
AH29
VLDT0_B6
AH27
VLDT0_B5
AG28
VLDT0_B4
AG26
VLDT0_B3
AF29
VLDT0_B2
AE28
VLDT0_B1
AF25
VLDT0_B0
L0_CADOUT_L15
L0_CADOUT_L14
L0_CADOUT_L13
L0_CADOUT_L12
L0_CADOUT_L11
L0_CADOUT_L10
L0_CADOUT_H9
L0_CADOUT_L9
L0_CADOUT_H8
L0_CADOUT_L8
L0_CADOUT_H7
L0_CADOUT_L7
L0_CADOUT_H6
L0_CADOUT_L6
L0_CADOUT_H5
L0_CADOUT_L5
L0_CADOUT_H4
L0_CADOUT_L4
L0_CADOUT_H3
L0_CADOUT_L3
L0_CADOUT_H2
L0_CADOUT_L2
L0_CADOUT_H1
L0_CADOUT_L1
L0_CADOUT_H0
L0_CADOUT_L0
L0_CLKOUT_H1
L0_CLKOUT_L1
L0_CLKOUT_H0
L0_CLKOUT_L0
L0_CTLOUT_H1
L0_CTLOUT_L1
L0_CTLOUT_H0
L0_CTLOUT_L0
Title
Size Document Number Rev
A3
Date: Sheet
CADOP15
N26
N27
L25
M25
L26
L27
J25
K25
G25
H25
G26
G27
E25
F25
E26
E27
N29
P29
M28
M27
L29
M29
K28
K27
H28
H27
G29
H29
F28
F27
E29
F29
J26
J27
J29
K29
N25
P25
P28
P27
CADON15
CADOP14
CADON14
CADOP13
CADON13
CADOP12
CADON12
CADOP11
CADON11
CADOP10
CADON10
CADOP9
CADON9
CADOP8
CADON8
CADOP7
CADON7
CADOP6
CADON6
CADOP5
CADON5
CADOP4
CADON4
CADOP3
CADON3
CADOP2
CADON2
CADOP1
CADON1
CADOP0
CADON0
CLKOP1
CLKON1
CLKOP0
CLKON0
CTLOP0
CTLON0
CADOP15 6
CADON15 6
CADOP14 6
CADON14 6
CADOP13 6
CADON13 6
CADOP12 6
CADON12 6
CADOP11 6
CADON11 6
CADOP10 6
CADON10 6
CADOP9 6
CADON9 6
CADOP8 6
CADON8 6
CADOP7 6
CADON7 6
CADOP6 6
CADON6 6
CADOP5 6
CADON5 6
CADOP4 6
CADON4 6
CADOP3 6
CADON3 6
CADOP2 6
CADON2 6
CADOP1 6
CADON1 6
CADOP0 6
CADON0 6
CLKOP1 6
CLKON1 6
CLKOP0 6
CLKON0 6
CTLOP0 6
CTLON0 6
MICRO-START INT'L CO.,LTD .
AMD K8-754 DDR & HT
MS-7172 0A
5
VLDT0 4
C61
4.7uF/10V/0805
33 4 Friday, March 04, 2005
of
1
A A
2
VDDA_25
LAYOUT: Route VDDA trace approx. 50 mils wide (use 2x25 mil
traces to exit ball field) and 500 mils long.
FB6 300L700m_250_0805
CPU_VDDA_25
3
C62
4.7uF/10V/0805
C46
0.22uF
1000pF
C59
4
THERMDC_CPU
FB7
X_120S/0603
5
C36
VDDA_25
B B
-LDTSTOP
PS_OUT# 26,28
R23
680R
D S
Q2
2N7002
G
Place near CPU in 1" ,
Routed => 5:10/Trace:Space ,
Same Length
CPU_GD 26
VLDT0
VLDT0 3
R40 44.2R/1%
R39 44.2R/1%
C66
1000pF
X_1000pF/NPO
C65
1000pF
Near CPU in 0.5" .
HDT Test Port Signal .
C C
VDDA_25
DBREQ_L
DBRDY
TCK
TMS
TDI
TRST_L
NC_AJ18
D D
NC_AG17
NC_D18
NC_B19
NC_C19
NC_D20
1
R30 X_1K
R31 X_1K
RN38 X_8P4R-1KR
R43 680R
R42 680R
1 2
3 4
5 6
7 8
1 2
3 4
5 6
7 8
680R-8P4R
RN36
C192
4.7uF/10V/0805
VDDA_25 VDD_25_SUS
NC_C18
NC_A19
NC_C21
TDO
2
RN40
1 2
3 4
5 6
7 8
680R-8P4R
-CPURST 28
-LDTSTOP 6,11
COREFB_H 27
COREFB_L 27
Differential , "10:10:5:10:10" .
CPUCLK0_H 12
CPUCLK0_L 12
VDD_25_SUS
3
CPU_GD
L0_REF1
L0_REF0
C55 X_1000pF/NPO
C57 3900pF
R49
C56 3900pF
R29 820R
R46 820R
VDDIO_SENSE
169R/1%
CLKIN_H
CLKIN_L
NC_AJ23
NC_AH23
VTT_DDR_SUS
DBRDY
TMS
TCK
TRST_L
TDI
NC_C18
NC_A19
AH25
AJ25
AF20
AE18
AJ27
AF27
AE26
A23
A24
B23
AE12
AF12
AE11
AJ21
AH21
AJ23
AH23
AE24
AF24
C16
AG15
AH17
C15
E20
E17
B21
A21
C18
A19
A28
AJ28
AE23
AF23
AF22
AF21
AA2
AG2
B18
AH1
AE21
C20
AG4
AG6
AE9
AG9
C1
J3
R3
D3
C6
VDDA1
VDDA2
RESET_L
PWROK
LDTSTOP_L
L0_REF1
L0_REF0
COREFB_H
COREFB_L
CORE_SENSE
VDDIOFB_H
VDDIOFB_L
VDDIO_SENSE
CLKIN_H
CLKIN_L
NC_AJ23
NC_AH23
NC_AE24
NC_AF24
VTT_A5
VTT_B5
DBRDY
NC_C15
TMS
TCK
TRST_L
TDI
NC_C18
NC_A19
KEY1
KEY0
NC_AE23
NC_AF23
NC_AF22
NC_AF21
FREE29
FREE31
FREE33
FREE35
FREE1
FREE37
FREE4
FREE38
FREE41
FREE7
FREE11
FREE12
FREE13
FREE14
FREE40
THERMTRIP_L
G_FBCLKOUT_H
G_FBCLKOUT_L
4
U6C
THERMDA
THERMDC
VID4
VID3
VID2
VID1
VID0
NC_AG18
NC_AH18
NC_AG17
NC_AJ18
DBREQ_L
NC_D20
NC_C21
NC_D18
NC_C19
NC_B19
TDO
NC_AF18
RSVD_SCL
RSVD_SDA
FREE26
FREE28
FREE30
FREE32
FREE34
FREE36
FREE10
FREE18
FREE19
FREE42
FREE24
FREE25
FREE27
A20
A26
A27
AG13
AF14
AG14
AF15
AE15
AG18
AH18
AG17
AJ18
AH19
AJ19
AE19
D20
C21
D18
C19
B19
A22
AF18
D22
C22
B13
B7
C3
K1
R2
AA3
F3
C23
AG7
AE22
C24
A25
C9
THRM#
THERMDA_CPU
THERMDC_CPU
VID4
VID3
VID2
VID1
VID0
NC_AG17
NC_AJ18
FBCLKOUT_H
R48
80.6R/1%
FBCLKOUT_L
Zdiff = 80 ohm
DBREQ_L
NC_D20
NC_C21
NC_D18
NC_C19
NC_B19
TDO
VDD_25_SUS
Title
AMD K8-754 HDT & MISC
Size Document Number Rev
A3
Date: Sheet
MS-7172 0A
THRM# 26
THERMDA_CPU 24
THERMDC_CPU 24
VID4 27
VID3 27
VID2 27
VID1 27
VID0 27
LAYOUT: Route
FBCLKOUT_H/L differentially
with 20/8/5/8/20 spacing and
trace width. ( In CPU
breakout => routed 5:5:5 )
MICRO-START INT'L CO.,LTD .
43 4 Friday, March 04, 2005
5
of
1
B2
VSS1
AH20
VSS3
AB21
VSS4
W22
VSS5
M23
VSS6
L24
VSS7
AG25
VSS8
AG27
VSS9
D2
VSS10
AF2
VSS11
W6
VSS12
Y7
VSS13
AA8
A A
B B
C C
D D
GND GND
AB9
AA10
B14
Y15
AE16
G20
R20
U20
W20
AA20
AC20
AE20
AG20
AJ20
D21
F21
H21
K21
M21
P21
V21
Y21
AD21
AG21
B22
E22
G22
N22
R22
U22
AG29
AA22
AC22
AG22
AH22
AJ22
D23
F23
H23
K23
P23
V23
Y23
AB23
AD23
AG23
E24
G24
N24
R24
U24
W24
AA24
AC24
AG24
AJ24
B25
C25
B26
D26
H26
M26
Y26
AD26
AF26
AH26
C27
B28
D28
G28
F15
H15
AB17
AD17
B16
G18
AA18
AC18
D19
F19
H19
K19
Y19
AB19
AD19
AF19
N20
VSS14
VSS15
VSS16
J12
VSS17
VSS18
VSS19
VSS20
J18
VSS21
VSS22
VSS23
VSS24
VSS25
VSS26
VSS27
VSS28
VSS29
VSS30
VSS31
VSS32
VSS33
VSS34
VSS35
VSS36
T21
VSS37
VSS38
VSS39
VSS40
VSS41
VSS42
VSS43
VSS44
J22
VSS45
L22
VSS46
VSS47
VSS48
VSS49
VSS50
VSS51
VSS52
VSS53
VSS54
VSS55
VSS56
VSS57
VSS58
VSS59
VSS60
T23
VSS61
VSS62
VSS63
VSS64
VSS65
VSS66
VSS67
VSS68
J24
VSS69
VSS70
VSS71
VSS72
VSS73
VSS74
VSS75
VSS76
VSS77
VSS78
VSS79
VSS80
VSS81
VSS82
VSS83
T26
VSS84
VSS85
VSS86
VSS87
VSS88
VSS89
VSS90
VSS91
VSS92
VSS187
VSS188
VSS206
VSS207
VSS208
VSS209
VSS210
VSS211
VSS212
VSS213
VSS214
VSS215
VSS216
VSS217
VSS218
VSS219
J20
VSS220
L20
VSS221
VSS222
GROUND
VSS93
VSS94
VSS95
VSS96
VSS97
VSS98
VSS99
VSS100
VSS101
VSS102
VSS103
VSS104
VSS105
VSS106
VSS107
VSS108
VSS109
VSS110
VSS111
VSS112
VSS113
VSS114
VSS115
VSS116
VSS117
VSS118
VSS119
VSS120
VSS121
VSS122
VSS123
VSS124
VSS125
VSS126
VSS127
VSS128
VSS129
VSS130
VSS131
VSS132
VSS133
VSS134
VSS135
VSS136
VSS137
VSS138
VSS139
VSS140
VSS141
VSS142
VSS143
VSS144
VSS145
VSS146
VSS147
VSS148
VSS149
VSS150
VSS151
VSS152
VSS153
VSS155
VSS156
VSS157
VSS158
VSS159
VSS160
VSS161
VSS162
VSS163
VSS164
VSS165
VSS166
VSS167
VSS168
VSS169
VSS170
VSS171
VSS172
VSS173
VSS174
VSS175
VSS176
VSS177
VSS178
VSS179
VSS180
VSS181
VSS182
VSS183
VSS184
VSS185
VSS186
VSS189
VSS190
VSS191
VSS192
VSS194
VSS195
VSS196
VSS197
VSS198
VSS199
VSS223
VSS201
VSS202
VSS203
VSS204
VSS205
1
L28
R28
W28
AC28
AF28
AH28
C29
F2
H2
K2
M2
P2
T2
V2
Y2
AB2
AD2
AH2
B4
AH4
B6
G6
J6
L6
N6
R6
U6
AA6
AC6
AH6
F7
H7
K7
M7
P7
T7
V7
AB7
AD7
B8
G8
J8
L8
N8
R8
U8
W8
AC8
AH8
F9
H9
K9
M9
P9
T9
V9
Y9
AD9
B10
G10
J10
L10
N10
R10
U10
W10
AC10
AH10
F11
H11
K11
Y11
AB11
AD11
B12
G12
AA12
AC12
AH12
F13
H13
K13
Y13
AB13
AD13
AF17
G14
J14
AA14
AC14
AE14
D16
E15
K15
AB15
AD15
AH14
E16
G16
J16
AA16
AC16
AE29
AJ26
E18
F17
H17
K17
Y17
U6E
VCORE
AC15
H18
B20
E21
H22
H24
F26
V10
G13
K14
Y14
AB14
G15
AA15
H16
K16
Y16
AB16
G17
AA17
AC17
AE17
F18
K18
Y18
AB18
AD18
AG19
E19
G19
AC19
AA19
F20
H20
K20
M20
P20
T20
V20
Y20
AB20
AD20
G21
N21
R21
U21
W21
AA21
AC21
F22
K22
M22
P22
T22
V22
Y22
AB22
AD22
E23
G23
N23
R23
U23
W23
AA23
AC23
B24
D24
F24
K24
M24
P24
T24
V24
Y24
AB24
AD24
AH24
AE25
K26
P26
V26
L7
VDD1
VDD2
VDD3
VDD4
VDD5
VDD6
J23
VDD7
VDD8
VDD9
N7
VDD10
L9
VDD11
VDD12
VDD13
VDD14
VDD15
VDD16
VDD17
J15
VDD18
VDD19
VDD20
VDD21
VDD22
VDD23
VDD24
J17
VDD25
VDD26
VDD27
VDD28
VDD29
VDD30
VDD31
VDD32
VDD33
VDD34
VDD35
VDD36
VDD39
VDD38
J19
VDD37
VDD40
VDD41
VDD42
VDD43
VDD44
VDD45
VDD46
VDD47
VDD48
VDD49
VDD50
J21
VDD51
L21
VDD52
VDD53
VDD54
VDD55
VDD56
VDD57
VDD58
VDD59
VDD60
VDD61
VDD62
VDD63
VDD64
VDD65
VDD66
VDD67
VDD68
VDD69
L23
VDD70
VDD71
VDD72
VDD73
VDD74
VDD75
VDD76
VDD77
VDD78
VDD79
VDD80
VDD81
VDD82
VDD83
VDD84
VDD85
VDD86
VDD87
VDD88
VDD89
VDD90
VDD91
VDD92
POWER
VDDIO1
VDDIO2
VDDIO3
VDDIO4
VDDIO5
VDDIO7
VDDIO8
VDDIO9
VDDIO10
VDDIO11
VDDIO12
VDDIO13
VDDIO14
VDDIO15
VDDIO16
VDDIO17
VDDIO18
VDDIO19
VDDIO20
VDDIO21
VDDIO22
VDDIO23
VDDIO24
VDDIO25
VDDIO26
VDDIO27
VDDIO28
VDDIO29
VDDIO30
VDDIO31
VDDIO32
VDDIO33
VDDIO34
VDDIO35
VDDIO36
VDDIO37
VDDIO38
VDDIO39
VDDIO40
VDDIO41
VDDIO42
VDDIO43
VDDIO44
VDDIO45
VDDIO46
VDDIO47
VDDIO48
VDDIO49
VDDIO50
VDDIO6
VDD96
VDD97
VDD98
VDD99
VDD100
VDD101
VDD102
VDD103
VDD104
VDD105
VDD106
VDD107
VDD108
VDD109
VDD110
VDD111
VDD112
VDD113
VDD114
VDD115
VDD116
VDD117
VDD118
VDD119
VDD120
VDD121
VDD122
VDD123
VDD124
VDD125
VDD126
VDD127
VDD128
VDD129
VDD130
VDD131
VDD132
VDD133
VDD93
VDD94
VDD95
VDD_25_SUS
E4
G4
J4
L4
N4
U4
W4
AA4
AC4
AE4
D5
AF5
F6
H6
K6
M6
P6
T6
V6
Y6
AB6
AD6
D7
G7
J7
AA7
AC7
AF7
F8
H8
AB8
AD8
D9
G9
AC9
AF9
F10
AD10
D11
AF11
F12
AD12
D13
AF13
F14
AD14
F16
AD16
D15
R4
N28
U28
AA28
AE27
R7
U7
W7
K8
M8
P8
T8
V8
Y8
J9
N9
R9
U9
W9
AA9
H10
K10
M10
P10
T10
Y10
AB10
G11
J11
AA11
AC11
H12
K12
Y12
AB12
J13
AA13
AC13
H14
AB26
E28
J28
U6D
2
Bottom Side of CPU
3
4
5
VDD_25_SUS
VTT_DDR_SUS
C442
X_0.1uF
C445
X_0.1uF
C446
X_0.1uF
C93
4.7uF/1206
C460
X_0.1uF
C98
4.7uF/1206
C108
4.7uF/1206
Bottom Side of CPU
VDD_25_SUS
C448
X_1uF
C454
X_1uF
C459
1uF
C449
1uF
C457
1uF
C450
X_1uF
C451
1uF
CPU SOCKET Inside
VCORE
2
VCORE
VCORE
VCORE
C89
0.22uF
C91
0.22uF
C90
180pF
C95
180pF
C101
180pF
C94
0.22uF
C96
8.2pF
C103
X_0.22uF
C110
X_0.22uF
C112
0.22uF
C97
8.2pF
3
C104
0.22uF
C109
X_0.22uF
C113
8.2pF
Title
AMD K8-754 POWER & GND
Size Document Number Rev
A3
4
Date: Sheet
MICRO-START INT'L CO.,LTD .
MS-7172 0A
53 4 Friday, March 04, 2005
5
of
1
2
VDD_12_A
3
FOR K8M800
4
5
A A
HCLK- 12
C22
AVDD2
AGND2
C21
A23
VSS
A10
A8
A24
VLDT
VSS
B8
A25
VLDT
VSS
B13
HCLK+ 12
A26A9B10
VLDT
VLDT
VSS
VSS
B15
U11A
VLDT
VSS
B17
VLDT
VSS
B19
B23
B24
VLDT
VSS
B21
B22C8D8
B25
VLDT
VSS
B26B9C10
VLDT
VSS
D6
VLDT
VSS
VLDT
VSS
D12
C11
VLDT
VSS
D14
C23
VLDT
VSS
D16
AVDD2
From Claw Hammer
CADOP0 3
CADOP1 3
CADOP2 3
CADOP3 3
CADOP4 3
CADOP5 3
CADOP6 3
CADOP7 3
CADOP8 3
CADOP9 3
B B
C C
D D
CADOP10 3
CADOP11 3
CADOP12 3
CADOP13 3
CADOP14 3
CADOP15 3
CLKOP0 3
CLKOP1 3
CTLOP0 3
CADON0 3
CADON1 3
CADON2 3
CADON3 3
CADON4 3
CADON5 3
CADON6 3
CADON7 3
CADON8 3
CADON9 3
CADON10 3
CADON11 3
CADON12 3
CADON13 3
CADON14 3
CADON15 3
CLKON0 3
CLKON1 3
CTLON0 3
-LDTRST 28
-LDTSTOP 4,11
CADOP0
CADOP1
CADOP2
CADOP3
CADOP4
CADOP5
CADOP6
CADOP7
CADOP8
CADOP9
CADOP10
CADOP11
CADOP12
CADOP13
CADOP14
CADOP15
CLKOP0
CLKOP1
CTLOP0
CADON0
CADON1
CADON2
CADON3
CADON4
CADON5
CADON6
CADON7
CADON8
CADON9
CADON10
CADON11
CADON12
CADON13
CADON14
CADON15
CLKON0
CLKON1
CTLON0
-LDTRST
-LDTSTOP
RPCOMP
PNCOMP
RTCOMP
VDD_12_A
T26
P24
P26
M24
K24
K26
H24
H26
R24
R22
N24
N22
L22
J24
J22
G24
M26
L24
F24
R26
P25
N26
M25
K25
J26
H25
G26
R23
P22
N23
M22
K22
J23
H22
G23
L26
L23
F25
B11
A12
D25
D26
C26
U24
U25
U26
V21
V22
V23
V24
V25
V26
RCADP0
RCADP1
RCADP2
RCADP3
RCADP4
RCADP5
RCADP6
RCADP7
RCADP8
RCADP9
RCADP10
RCADP11
RCADP12
RCADP13
RCADP14
RCADP15
RCLKP0
RCLKP1
RCTLP
RCADN0
RCADN1
RCADN2
RCADN3
RCADN4
RCADN5
RCADN6
RCADN7
RCADN8
RCADN9
RCADN10
RCADN11
RCADN12
RCADN13
RCADN14
RCADN15
RCLKN0
RCLKN1
RCTLN
LDTRST
LDTSTP
RPCOMP
RNCOMP
RTCOMP
VLDT
VLDT
VLDT
VLDT
VLDT
VLDT
VLDT
VLDT
VLDT
R318
M_0R
C24
VLDT
VSS
D18
VLDT
VSS
C25C9D10
VLDT
VLDT
VLDT
VSS
VSS
VSS
D20
E5E6E8F7F8
D11
D22
VLDT
VSS
R319
M_0R
D23
VLDT
VSS
D24D9E10
VLDT
VLDT
VSS
VSS
F12
F13
VLDT
VSS
F14
E11
VLDT
VSS
F17
E21
VLDT
VSS
F18
E22
VLDT
VSS
F26
E23
VLDT
VSS
E24E9F10
VLDT
VLDT
VSS
VSS
G25H1H23
R123
M_0R
VLDT
VSS
HCKGND
F11
F15
VLDT
VLDT
VSS
VSS
J18
F16
VLDT
VSS
J2
F19
VLDT
VSS
J3
F20
VLDT
VSS
J21
F21
VLDT
VSS
J25
R320
M_0R
F22
VLDT
VSS
K4G1K10
F23
VLDT
VSS
G21
VLDT
VSS
K11
G22
VLDT
VSS
K12
VDD_12_A VCC3HCK
H21
VLDT
VSS
K13
J10
VLDT
VSS
K14
J11
VLDT
VSS
K15
J12
VLDT
VSS
K16
J13
VLDT
VSS
K17
J14
VLDT
VSS
K23H2L10
J15
VLDT
VSS
J16
VLDT
VLDT
TCADP10
TCADP11
TCADP12
TCADP13
TCADP14
TCADP15
TCADN10
TCADN11
TCADN12
TCADN13
TCADN14
TCADN15
VSS
VSS
L11
J17
K18
K21
VLDT
VLDT
TCADP0
TCADP1
TCADP2
TCADP3
TCADP4
TCADP5
TCADP6
TCADP7
TCADP8
TCADP9
TCLKP0
TCLKP1
TCTLP
TCADN0
TCADN1
TCADN2
TCADN3
TCADN4
TCADN5
TCADN6
TCADN7
TCADN8
TCADN9
TCLKN0
TCLKN1
TCTLN
VLDT
VLDT
VLDT
VLDT
VLDT
VLDT
VLDT
VLDT
VLDT
VLDT
VLDT
VLDT
VLDT
VLDT
VLDT
VLDT
VLDT
VSS
VSS
L13
L12
L14
To Claw Hammer
L18
VLDT
VLDT
CADIP0
B12
CADIP1
A13
CADIP2
B14
CADIP3
A15
CADIP4
A17
CADIP5
B18
CADIP6
A19
CADIP7
B20
CADIP8
E12
CADIP9
D13
CADIP10
E14
CADIP11
D15
CADIP12
D17
CADIP13
E18
CADIP14
D19
CADIP15
E20
CLKIP0
B16
CLKIP1
E16
CTLIP0
A21
CADIN0
C12
CADIN1
A14
CADIN2
C14
CADIN3
A16
CADIN4
A18
CADIN5
C18
CADIN6
A20
CADIN7
C20
CADIN8
E13
CADIN9
C13
CADIN10
E15
CADIN11
C15
CADIN12
C17
CADIN13
E19
CADIN14
C19
CADIN15
D21
CLKIN0
C16
CLKIN1
E17
CTLIN0
A22
VDD_12_A
L21
M18
N18
N21
P18
P21
R18
T18
T21
T22
T23
T24
T25
U18
U21
U22
U23
VSS
VSS
L15
VIA-K8M800-VT8380
CADIP0 3
CADIP1 3
CADIP2 3
CADIP3 3
CADIP4 3
CADIP5 3
CADIP6 3
CADIP7 3
CADIP8 3
CADIP9 3
CADIP10 3
CADIP11 3
CADIP12 3
CADIP13 3
CADIP14 3
CADIP15 3
CLKIP0 3
CLKIP1 3
CTLIP0 3
CADIN0 3
CADIN1 3
CADIN2 3
CADIN3 3
CADIN4 3
CADIN5 3
CADIN6 3
CADIN7 3
CADIN8 3
CADIN9 3
CADIN10 3
CADIN11 3
CADIN12 3
CADIN13 3
CADIN14 3
CADIN15 3
CLKIN0 3
CLKIN1 3
CTLIN0 3
FOR K8T800pro
VCC3
FB13 XT_0R
HCKGND
R321 XT_0R
PNCOMP
RTCOMP
C195 0.1uF
Around NB
R111 49.9R/1%
R113 100R/1%
RPCOMP
R112 49.9R/1%
VCC3HCK
C219
XT_C1000P50X
VDD_12_A
C217
X_C1U10Y
CB13
X_C1000P50X
5020
VDD_12_A
Title
VIA K8M800 PART1
Size Document Number Rev
A3
1
2
3
4
Date: Sheet
MICRO-START INT'L CO.,LTD .
MS-7172 0A
63 4 Friday, March 04, 2005
5
of
1
2
3
4
5
K8M800:0Ohm;K8T800 pro:bead
VCCA3
C238
C241
1uF
VLAD0 11
VLAD1 11
VLAD2 11
VLAD3 11
VLAD4 11
VLAD5 11
VLAD6 11
VLAD7 11
C233
X_C1000P50N
PWROK_NB# 10
PCIDEVRST# 18,24,26
SUSST# 10
R128 10K
AR 21
AG 21
AB 21
HSYNC 21
VSYNC 21
GUICLK 12
PIRQ#A 9,16,17
DDCCLK 21
DDCDATA 21
VCC3
CB14
X_C1000P50X
For K8M800.
TYPEDET# 16
4
K8M800 and K8T800pro will be 0.625V
VCC2_5
R137
3K/1%
C228
0.1uF
LVREF_NB
R136
1K/1%
C230
0.1uF
LAYOUT: Place caps on the bottom of N B
VDDQ
C466
X_C0.1U25Y
C480
X_C0.1U25Y
LAYOUT: Place caps as close NB as possible
FOR K8M800 -- AN307B
R135 M_100K
AGPVREF_GC
TESTIN
VPAR
AGPNCOMP
AGPPCOMP
LCOMPP
Title
VIA K8M800 PART2
Size Document Number Rev
A3
Date: Sheet
MS-7172 0A
C475 10uF/10V/0805
C229 0.1uF
R132 4.7K
R238 X_8.2K
R151 60.4R/1%
R150 60.4R/1%
R131 360R/1%
VCC2_5
VDDQ
MICRO-START INT'L CO.,LTD .
73 4 Friday, March 04, 2005
5
of
AD20
AD21
AF24
AE24
AE19
AF20
AD24
AF25
AE21
AF19
AE23
AF23
AF22
AD22
AF26
AD23
AF21
AD19
AE26
AD25
AC26
AD26
AC17
B3
A3
A2
C4
A1
B1
C6
E7
D3
P2
C2
P1
C1
J1
K2
K3
L4
K1
L2
L3
M4
L1
M2
M3
M1
P4
N1
N4
N3
P3
N2
D2
VSS
L16
FOR K8T800pro
VCC3
FB18
XT_0R
M_1000pF/X7R
VLAD0
VLAD1
VLAD2
VLAD3
VLAD4
VLAD5
VLAD6
VLAD7
VBE0# 11
VPAR 11
UPSTB 11
UPSTB# 11
DNSTB 11
DNSTB# 11
UPCMD 11
LVREF_NB
DNCMD 11
LCOMPP
TESTIN
DEBUG
RSET
R143 M_90.9R/1%
R141 M_1K
For K8M800 strapping pin
R168 4.7K
R169 4.7K
R170 4.7K
Configuration:
Both TMDS trasmitter and / or TV
encoder are on AGP riser.
3C5.12[5]==0
3C5.3E[0]==1
K8M800/K8T800pro AGP 8X ,V-Link, Misc. Control
VDDQ
A A
ST0 16
ST1 16
ST2 16
GAD0
GAD1
GAD2
GAD3
GAD4
GAD5
GAD6
GAD7
GAD8
GAD9
GAD10
GAD11
GAD12
GAD13
GAD14
GAD15
GAD16
GAD17
GAD18
GAD19
GAD20
GAD21
GAD22
GAD23
GAD24
GAD25
GAD26
GAD27
GAD28
GAD29
GAD30
GAD31
GC/BE#0
GC/BE#1
GC/BE#2
GC/BE#3
AD_STBS0
AD_STBF0
AD_STBS1
AD_STBF1
GFRAME
GIRDY
GTRDY
GDEVSEL
GSTOP
GPAR
RBF
WBF
GREQ
GGNT
GSERR
SBA0
SBA1
SBA2
SBA3
SBA4
SBA5
SBA6
SBA7
SB_STBS
SB_STBF
ST0
ST1
ST2
AGPPCOMP
AGPNCOMP
AGPVREF_GC
DBIL
DBIH
GAD0 16
GAD1 16
GAD2 16
GAD3 16
GAD4 16
GAD5 16
GAD6 16
GAD7 16
GAD8 16
GAD9 16
GAD10 16
GAD11 16
GAD12 16
GAD13 16
GAD14 16
GAD15 16
GAD16 16
GAD17 16
GAD18 16
GAD19 16
GAD20 16
GAD21 16
GAD22 16
GAD23 16
B B
C C
D D
GAD24 16
GAD25 16
GAD26 16
GAD27 16
GAD28 16
GAD29 16
GAD30 16
GAD31 16
GC/BE#0 16
GC/BE#1 16
GC/BE#2 16
GC/BE#3 16
AD_STBS0 16
AD_STBF0 16
AD_STBS1 16
AD_STBF1 16
GFRAME 16
GIRDY 16
GTRDY 16
GDEVSEL 16
GSTOP 16
GPAR 16
RBF 16
WBF 16
GREQ 16
GGNT 16
GSERR 16
GCLK_NB 12
SBA0 16
SBA1 16
SBA2 16
SBA3 16
SBA4 16
SBA5 16
SBA6 16
SBA7 16
SB_STBS 16
SB_STBF 16
AGPVREF_GC 16
AGP8XDET# 16
DBIL 16
DBIH 16
1
AF18
GD0/FPD10
AD18
GD1/FPD11
AE18
GD2/FPDVICLK
AF17
GD3/FPD09
AD17
GD4/FPD08
AD16
GD5/FPD07
AE16
GD6/FPD06
AF16
GD7/FPD05
AF14
GD8/FPDVIDET
AD14
GD9/FPDVIHS
AD13
GD10/FPD01
AE13
GD11/FPD23
AF13
GD12/FPD00
AD12
GD13/FPD22
AF12
GD14/FPD21
AE12
GD15/FPD20
AD10
GD16/FPD18
AE10
GD17/FPD17
AF10
GD18/FPD16
AD9
GD19/FPDE
AF9
GD20/FPD14
AF8
GD21/FPCLK
AE9
GD22/FPD13
AD8
GD23/FPD15
AF6
GD24/DVP1D09
AD7
GD25
AE6
GD26/DVP1D10
AD5
GD27
AF5
GD28/DVP1D07
AF4
GD29/DVP1D06
AE4
GD30/DVP1D08
AD4
GD31/DVP1D04
AD15
GCBE0/FPD03
AF11
GCBE1/SB_DA
AD11
GCBE2/FPD19
AC7
GCBE3/DVP1D11
AF15
ADSTB0S/FPD02
AE15
ADSTB0F/FPD04
AF7
ADSTB1S/FPDET
AE7
ADSTB1F/FPD12
AC9
GFRAME/FPHS
AC10
GIRDY/SB_CK
AC14
GTRDY
AC11
GDEVSEL/FPVS
AC12
GSTOP/FPDVICLK_N
AC16
GPAR/FPDVIVS
AD6
RBF
AC1
WBF/FPCLK_N
Y1
GREQ/DVI_DDCCK
AA3
GGNT/DVI_DDCDA
AC15
GSERR/FPDVIDE
A11
GCLK
AC2
SBA0/DVP1VS
AC3
SBA1/DVP1DE
AD1
SBA2/DVP1D00
AD2
SBA3/DVP1HS
AF2
SBA4/DVP1D05
AD3
SBA5/DVP1D03
AE3
SBA6/DVP1CLK
AF3
SBA7/DVP1CLK_N
AE1
SB_STBS/DVP1D02
AF1
SB_STBF/DVP1D01
AA2
ST0
AA1
ST1/DVP1DET
AB1
ST2
V1
AGPPCOMP
W1
AGPNCOMP
AC13
AGPVREF0
AC6
AGPVREF1
Y2
AGP8XDET
AC4
DBIL
AC5
DBIH
VSSQQ
T1
U1
VCCQQ
VSS
VSS
VSS
VSS
VSS
VSS
R11
R12
R13
R14
R15
2
VSS
VCC4/NC
VSS
VCC4/NC
VSS
VCC4/NC
VSS
M5K8M9L8N9P9R9
N5
L5K9L9
J9
VCC4/NC
VCC4/NC
VCC4/NC
VCC4/NC
VSS
VCC4/NC
VCC4/NC
VCC4/NC
VCC4/NC
VCC4/NC
VCC4/NC
VCC4/NC
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
P11
P12
P13
P14
P15
P16
P17
P23R1R2R3R4R5R10
VCC4/NC
VCC4/NC
VCC4/NC
VCC4/NC
VCC4/NC
VCC4/NC
VSS
VSS
VSS
VSS
VSS
VSS
N13
N14
N15
N16
N17
N25P5P10
F6F2F5E1F4
G2G3G4G5H3H4H5J4J5
VCC4/NC
VCC4/NC
VSS
VSS
N10
N11
N12
VCCA3 VDD3
F1K5E4E2E3
F3
VCC4/NC
VCC4/NC
VCC4/NC
VCC4/NC
VCC4/NC
TVD00/DVP0D00/NC
TVD01/DVP0D01/NC
TVD02/DVP0D02/NC
TVD03/DVP0D03/NC
TVD04/DVP0D04/NC
TVD05/DVP0D05/NC
TVD06/DVP0D06/NC
TVD07/DVP0D07/NC
TVD08/DVP0D08/NC
TVD09/DVP0D09/NC
TVD10/DVP0D10/NC
TVD11/DVP0D11/NC
TVCLKIN/DVP0DET/NC
TVCLK/DVP0DCLK/NC
VSS
VSS
VSS
VSS
VSS
M15
M16
M17
M21
M23
D1
VCC4/NC
VCC4/NC
VCC4/NC
VCC4/NC
VCC4/NC
VCC4/NC
VPAR
UPSTB
UPSTB
DNSTB
DNSTB
UPCMD
DNCMD
LVREF
LCOMPP
PWRGD
PCIRST
TESTIN
SUSTAT
DEBUG
AR/NC
AG/NC
AB/NC
RSET/NC
HSYNC/NC
VSYNC/NC
XIN/NC
INTA/NC
BISTIN/NC
SPCLK1/NC
SPCLK2/NC
SPD1/NC
SPD2/NC
TVDE/DVP0DE/NC
TVHS/DVP0HS/NC
TVVS/DVP0VS/NC
GPO0/NC
GPOUT/NC
VSS
VSS
VSS
VSS
VSS
VSS
VSS
M10
L25
M11
M12
M13
M14
VIA-K8M800-VT8380
3
U11B
VD0
VD1
VD2
VD3
VD4
VD5
VD6
VD7
VBE
L17
VSS
1
2
3
4
5
VCC1
VCC1
VCC1
VCC1
VCC1
VCC1
VCC1
VCC1
VCC1
VCC1
VCC1
VCC1
VCC1
VCC1
VCC1
VCC1
VCC1
VCC1
VCC1
VCC1
VCC1
VCC1
VCC1
VCC1
VCC1
VCC1
VCC1
VCC1
VCC1
VCC1
VCC1
VCC1
VCC1
VCC1
VCC1
VCC1
VCC1
VCC1
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
AA4
AA5
AB11
AB12
AB13
AB14
AB7
AB8
M8
N8
T2
T3
T4
T5
T8
T9
U2
U3
U4
U5
U8
U9
V10
V11
V12
V13
V2
V3
V4
V8
V9
W2
W3
W4
W9
Y3
Y4
Y5
AA21
AA22
AA23
AA24
AA25
AA26
AB21
AB22
AB23
AB24
AB25
AB26
F9
H10
H11
H12
H15
H16
H8
H9
J8
K19
L19
M19
P8
R19
R8
T19
U19
V18
V19
W10
W11
W12
W13
W14
W19
Y20
Y21
Y22
Y23
Y24
Y25
Y26
AB16
AC8
AC22
AC23
AC24
AE2
AE5
AE8
AE11
AE14
AE17
AE20
AE22
AE25
VDDQ
VDDQ
Power and Ground Connections
LAYOUT : Popualte caps on the bottom side of NB.
VDD_12_A
C463
CB12
X_C1U10Y
10uF/10V/0805
VDDQ
C467
X_C1U10Y
VDDQ
C280
0.1uF
VDDQ
C295
1uF
VDDQ
C276
X_C0.1U25Y
2
C469
X_C1U10Y
C464
X_C0.22U16Y
C474
X_C1U10Y
C292
X_C0.1U25Y
C293
1uF
C274
X_C0.1U25Y
C465
X_C1U10Y
C479
X_C1U16Y
C279
0.1uF
C254
1uF
C296
X_C1U10Y
C468
X_C1U10Y
C470
X_C1000P50N
C268
X_C1U10Y
C264
X_C1U10Y
C275
X_C1U10Y
3
C473
X_C1000P50N
VDDQ
C471
C476
X_4.7uF/10V/0805
X_4.7uF/10V/0805
VDD3
C477
C472
X_4.7uF/10V/0805
X_4.7uF/10V/0805
LAYOUT: Place caps on the bottom of SB
VCC2_5
C481
X_C0.1U25Y
VCC2_5
C336
C332
1uF
0.1uF
4
For K8M800 Only
CP5
X_COPPER
X_COPPER
1
3
5
7
RGBPLL
C234
M_1000pF/X7R
GND_RGBPLL
DAC_PLL
C235
M_1000pF/X7R
GND_DAC
R146
M_0R/0805
2
4
RN65
6
M_0R-8P4R
8
C231
M_1uF/10V
C242
M_1uF/10V
CB3
M_1uF/0805
CB4
M_1000pF/X7R
5020
VDDQ
FB17
M_0R
FB14 X_0R
VDD3
FB15 M_0R
FB16 X_0R
CP6
VCC3 VDD3
Note: When use K8T800,
these power circuit for
GFX analog power should be
NOPOPed.
For K8M800/K8T800 Pro Only
VCC3
FB12
X_0R
CP4
X_COPPER
VCC3
Title
Size Document Number Rev
A3
Date: Sheet
AVDD1
C200
1000pF
FB11 X_0R
CP3
X_COPPER
C199
2 1
1000pF
1uF
AVDD2
C201
AGND2
CB9
X_C1000P50X
5020
C202
1uF
MICRO-START INT'L CO.,LTD .
VIA K8M800 PART3
MS-7172 0A
83 4 Friday, March 04, 2005
5
of
VSUSNB
C225
1uF
A A
B B
C C
D D
AVDD1
RGBPLL
GND_RGBPLL
RGBPLL
GND_RGBPLL
DAC_PLL
GND_DAC
DAC_PLL
GND_DAC
R129 22R
VDDQ
1
U11C
AC25
VSUS15/VSUS25
E25
AVDD1
E26
AGND1
D5
VCCPLL1/NC
A5
VCCPLL2/NC
C5
GNDPLL1/NC
B5
GNDPLL2/NC
A6
VCCPLL3/NC
B6
GNDPLL3/NC
B2
DACVDD/NC
C3
GNDDAC1/NC
D4
GNDDAC2/NC
A4
VCCRGB/NC
B4
GNDRGB/NC
A7
NC
D7
NC
AB17
VCC2
AB18
VCC2
AB19
VCC2
AB20
VCC2
AC18
VCC2
AC19
VCC2
AC20
VCC2
AC21
VCC2
V14
VCC2
V15
VCC2
V16
VCC2
V17
VCC2
W15
VCC2
W16
VCC2
W17
VCC2
W18
VCC2
B7
VSS/NC
C7
VSS/NC
R16
VSS
R17
VSS
R21
VSS
R25
VSS
T10
VSS
T11
VSS
T12
VSS
T13
VSS
T14
VSS
T15
VSS
T16
VSS
T17
VSS
U10
VSS
U11
VSS
U12
VSS
U13
VSS
U14
VSS
U15
VSS
U16
VSS
U17
VSS
V5
VSS
W5
VSS
W21
VSS
W22
VSS
W23
VSS
W24
VSS
W25
VSS
W26
VSS
AB2
VSS
AB3
VSS
AB4
VSS
AB5
VSS
AB6
VSS
AB9
VSS
AB10
VSS
AB15
VSS
VIA-K8M800-VT8380
1
2
3
4
5
VCC3
USBN1
USBP1
USBN0
H9
H10
H12J8K8L8M8N8P8R8R19
GND
GND
E8
GND
GND
F25
H23
H11
VCC33
VCC33
VCC33
GND
GND
GND
J21
J25B2A17
VCC33
VCC33
USBGND
A13
VCC33
USBGND
A15
AD0 17,18
AD1 17,18
AD2 17,18
A A
B B
C C
AD3 17,18
AD4 17,18
AD5 17,18
AD6 17,18
AD7 17,18
AD8 17,18
AD9 17,18
AD10 17,18
AD11 17,18
AD12 17,18
AD13 17,18
AD14 17,18
AD15 17,18
AD16 17,18
AD17 17,18
AD18 17,18
AD19 17,18
AD20 17,18
AD21 17,18
AD22 17,18
AD23 17,18
AD24 17,18
AD25 17,18
AD26 17,18
AD27 17,18
AD28 17,18
AD29 17,18
AD30 17,18
AD31 17,18
C_BE#0 17,18
C_BE#1 17,18
C_BE#2 17,18
C_BE#3 17,18
FRAME# 17,18
DEVSEL# 17,18
IRDY# 17,18
TRDY# 17,18
STOP# 17,18
SERR# 17
PAR 17,18
PERR# 17,18
PCIRST# 16,26
PIRQ#A 7,16,17
PIRQ#B 16,17
PIRQ#C 17
PIRQ#D 17
PIRQ#E 17
PIRQ#F 17
PIRQ#G 18
PREQ#0 17
PREQ#1 17
PREQ#2 17
PREQ#3 17
PREQ#4 17
PREQ#5 18
PGNT#0 17
PGNT#1 17
PGNT#2 17
PGNT#3 17
PGNT#4 17
PGNT#5 18
AD0
AD1
AD2
AD3
AD4
AD5
AD6
AD7
AD8
AD9
AD10
AD11
AD12
AD13
AD14
AD15
AD16
AD17
AD18
AD19
AD20
AD21
AD22
AD23
AD24
AD25
AD26
AD27
AD28
AD29
AD30
AD31
C_BE#0
C_BE#1
C_BE#2
C_BE#3
FRAME#
DEVSEL#
IRDY#
TRDY#
STOP#
SERR#
PAR
PERR#
PCIRST#
PIRQ#A
PIRQ#B
PIRQ#C
PIRQ#D
PIRQ#E
PIRQ#F
PIRQ#G
INTH#
PREQ#0
PREQ#1
PREQ#2
PREQ#3
PREQ#4
PREQ#5
PGNT#0
PGNT#1
PGNT#2
PGNT#3
PGNT#4
PGNT#5
G2
AD0
J4
AD1
J3
AD2
H3
AD3
F1
AD4
G1
AD5
H4
AD6
F2
AD7
E1
AD8
G3
AD9
E3
AD10
D1
AD11
G4
AD12
D2
AD13
D3
AD14
F3
AD15
K3
AD16
L3
AD17
K2
AD18
K1
AD19
M4
AD20
L2
AD21
N4
AD22
L1
AD23
M2
AD24
M1
AD25
P4
AD26
N3
AD27
N2
AD28
N1
AD29
P1
AD30
P2
AD31
E2
CBE0
C1
CBE1
L4
CBE2
M3
CBE3
J1
FRAME
H2
DEVSEL
J2
IRDY
H1
TRDY
K4
STOP
C2
SERR
F4
PAR
C3
PERR
R1
PCIRST
A4
INTA
B4
INTB
B5
INTC
C4
INTD
D4
INTE
E4
INTF
A3
INTG
B3
INTH
A5
REQ0
B6
REQ1
C5
REQ2
D5
REQ3
P3
REQ4
R3
REQ5
A6
GNT0
D6
GNT1
C6
GNT2
E5
GNT3
R4
GNT4
R2
GNT5
GND
GND
A1A2B1
VCC33
VCC33
VCC33
USBGND
USBGND
USBGND
A19
A21
VCC33
VCC33
USBGND
USBGND
B13
B15
T8
VCC33
VCC33
USBGND
USBGND
B17
B19
T19
U8
VCC33
VCC33
USBGND
USBGND
B21
C13
U19V8V19
VCC33
VCC33
USBGND
USBGND
C14
C15
C16
V21W9W10
VCC33
VCC33
VCC33
USBGND
USBGND
USBGND
C17
C18
W11
VCC33
VCC33
USBGND
USBGND
C19
C20
W17
W18
VCC33
VCC33
USBGND
USBGND
C21
D13
W19
W21
VCC33
VCC33
USBGND
USBGND
D15
D17
Y21
W8
VCC33
VCC33
USBGND
USBGND
D19
D21
USBGND
USBGND
E13
E15
USBGND
USBGND
E17
E19
USBVDD
USBVDD
USBVDD
USBVDD
USBVDD
USBVDD
USBVDD
USBVDD
USBVDD
USBVDD
USBVDD
USBVDD
USBSUS25
PLLVDDA
PLLVDDA
PLLGNDA
PLLGNDA
USBP0+
USBP1+
USBP2+
USBP3+
USBP4+
USBP5+
USBP6+
USBP7+
USBOC0
USBOC1
USBOC2
USBOC3
USBOC4
USBOC5
USBOC6
USBOC7
USBCLK
USB REXT
UDPWR
UDPWREN
KBCK/KA20G
KBDT/KBRC
MSCK/IRQ1
MSDT/IRQ12
USBGND
USBGND
USBGND
E21
H13
H15
H14
USBP0USBP1USBP2USBP3USBP4USBP5USBP6USBP7-
USBGND
USBGND
H16
H17
U16A
USBGND
USBGND
VIA-VT8237R
H18
A22
B22
C22
D22
E22
F22
J13
J14
J15
J16
J17
J18
C24
A23
B23
D23
C23
E20
D20
A20
B20
E18
D18
A18
B18
D16
E16
A16
B16
D14
E14
A14
B14
C26
D24
B26
C25
B24
A24
A26
A25
E23
B25
D26
D25
W3
V1
W1
W2
3VDUAL
C347
CB7
10uF/10V/1206
0.1uF
VSUS2_5
C346
0.1uF
near SB
USBVCCA
VCC2_5
CB8
X_C1U10Y
USBGNDA
USBP0
USBN0
USBP1
USBN1
USBP2
USBN2
USBP3
USBN3
USBP4
USBN4
USBP5
USBN5
USBP6
USBN6
USBP7
USBN7
USB_OC#1
C333 X_C0.1U25Y RN92
USB_OC#5
C337 X_C0.1U25Y
USBCLK_SB
USBREXT
R245 6.04K/1%
USBP0 22
USBN0 22
USBP1 22
USBN1 22
USBP2 22
USBN2 22
USBP3 22
USBN3 22
USBP4 22
USBN4 22
USBP5 22
USBN5 22
USBP6 22
USBN6 22
USBP7 22
USBN7 22
USB_OC#1 22
USB_OC#5 22
USBCLK_SB 12
R239 10K
KBCLK# 25
KBDAT# 25
MSCLK# 25
MSDAT# 25
LAYOUT: Place caps on the bottom of SB
VSUS2_5 3VDUAL VCC2_5 VCC3
DEVSEL#
TRDY#
IRDY#
FRAME#
SERR#
PERR#
INTH#
STOP#
PREQ#1
PREQ#0
PREQ#4
PREQ#2
PREQ#5
PREQ#3
RN91
2.7K-8P4R
1 2
3 4
5 6
7 8
1 2
3 4
5 6
7 8
2.7K-8P4R
2.7K-10P8R
RN89
1
1
2
2
3
3
4
4
6
6
7
7
8
8
9
9510
USBP0
USBN7
USBP7
USBN6
USBP6
USBP3
USBN3
USBP2
USBN2
USBP5
USBN5
USBP4
USBN4
Near Connector
VCC3
VCC
5
10
RN64
1 2
3 4
5 6
7 8
15K-8P4R
RN101 15K-8P4R
7 8
5 6
3 4
1 2
7 8
5 6
3 4
1 2
RN49 15K-8P4R
RN102
1 2
3 4
5 6
7 8
15K-8P4R
PGNT#2
PGNT#5
PGNT#4
PGNT#3
PGNT#1
PGNT#0
PIRQ#G
PIRQ#F
PIRQ#E
PIRQ#B
PIRQ#A
PIRQ#C
PIRQ#D
2.7K-10P8R
RN96
1
1
2
2
3
3
4
4
6
6
7
7
8
8
9
9510
2.7K-10P8R
RN88
1
1
2
2
3
3
4
4
6
6
7
7
8
8
9
9510
VCC3
5
10
VCC
5
10
CB17
X_C0.1U25Y
D D
1
2
3
CB22
X_C0.01U50X
C482
X_C1U10Y
4
CB16
X_C1U10Y
CB18
X_C1U10Y
Title
VT8237R Part1
Size Document Number Rev
A3
Date: Sheet
CB19
X_C1U10Y
CB20
X_C1U10Y
MICRO-START INT'L CO.,LTD .
MS-7172 0A
93 4 Friday, March 04, 2005
5
of
1
J9
J10
J11
PDD0
PDD0 23
PDD1 23
PDD2 23
PDD3 23
A A
B B
Using external PHY
C C
D D
STXP_1 23
STXN_1 23
SRXN_1 23
SRXP_1 23
STXP_2 23
STXN_2 23
SRXN_2 23
SRXP_2 23
VCC2_5
CP10
FB22
X_601S
PDD4 23
PDD5 23
PDD6 23
PDD7 23
PDD8 23
PDD9 23
PDD10 23
PDD11 23
PDD12 23
PDD13 23
PDD14 23
PDD15 23
PDREQ 23
PDDACK# 23
PDIOR# 23
PDIOW# 23
PIORDY 23
PDCS#1 23
PDCS#3 23
PDA0 23
PDA1 23
PDA2 23
IRQ14 23
SDD0 23
SDD1 23
SDD2 23
SDD3 23
SDD4 23
SDD5 23
SDD6 23
SDD7 23
SDD8 23
SDD9 23
SDD10 23
SDD11 23
SDD12 23
SDD13 23
SDD14 23
SDD15 23
SDREQ 23
SDDACK# 23
SDIOR# 23
SDIOW# 23
SIORDY 23
SDCS#1 23
SDCS#3 23
SDA0 23
SDA1 23
SDA2 23
IRQ15 23
X_C0.1U25Y C349
R220 X_360R1%
1000pF C364
near chipset
near chipset
1 2
C358
0.1uF
1
1000pF C365
1200pF/X7R C366
1200pF/X7R C367
1000pF C354
1000pF C355
1200pF/X7R C356
1200pF/X7R C357
+2.5VSATA
C353
1uF
SRXN_1
SRXP_1
STXP_2 STXP2
PDD1
PDD2
PDD3
PDD4
PDD5
PDD6
PDD7
PDD8
PDD9
PDD10
PDD11
PDD12
PDD13
PDD14
PDD15
PDREQ
PDDACK#
PDIOR#
PDIOW#
PIORDY
PDCS#1
PDCS#3
PDA0
PDA1
PDA2
IRQ14
SDD0
SDD1
SDD2
SDD3
SDD4
SDD5
SDD6
SDD7
SDD8
SDD9
SDD10
SDD11
SDD12
SDD13
SDD14
SDD15
SDREQ
SDDACK#
SDIOR#
SDIOW#
SIORDY
SDCS#1
SDCS#3
SDA0
SDA1
SDA2
IRQ15
SIDEVREF
SIDECOMP
STXP1 STXP_1
STXN1 STXN_1
SRXN1
SRXP1
STXN2 STXN_2
SRXN2 SRXN_2
SRXP2 SRXP_2
GNDSATA
AA22
Y24
AA26
AA25
AB26
AC26
AC23
AD25
AD26
AC24
AC25
AB24
AB23
AA24
Y26
AA23
Y23
V24
W26
Y25
Y22
V22
V23
W23
V25
W24
AD24
AC20
AB20
AC21
AE18
AF18
AD18
AD19
AF19
AE20
AF20
AD20
AE21
AF21
AD21
AD22
AF22
AD17
AD23
AF23
AE23
AF17
AF25
AF26
AF24
AC22
AE24
AE26
AC19
AB21
AB13
AC13
AF13
AE13
AB15
AC15
AF15
AE15
W12
W13
W14
W15
W16
AC17
AC11
AB17
AB11
PDD0
PDD1
PDD2
PDD3
PDD4
PDD5
PDD6
PDD7
PDD8
PDD9
PDD10
PDD11
PDD12
PDD13
PDD14
PDD15
PDDREQ
PDDACK
PDIOR
PDIOW
PDRDY
PDCS1
PDCS3
PDA0
PDA1
PDA2
IRQ14
SDD0/TBC1
SDD1/VALID
SDD2
SDD3/RXD2
SDD4/RXD3
SDD5/RXD4
SDD6/RBC0
SDD7/RBC1
SDD8/RXD5
SDD9/RXD6
SDD10/RXD7
SDD11/RXD8
SDD12/RXD9
SDD13/TXD0
SDD14/TXD1
SDD15/TXD2
SDDRQ/RXD1
SDDACK/TBC0
SDIOR/TXD4
SDIOW/TXD3
SDRDY/RXD0
SDCS1/TXD8
SDCS3/TXD9
SDA0/TXD6
SDA1/TXD5
SDA2/TXD7
IRQ15
SVREF
SCOMPP
STXP1
STXN1
SRXN1
SRXP1
STXP2
STXN2
SRXN2
SRXP2
VDDATS
VDDATS
VDDATS
VDDATS
VDDATS
VDDAS
VDDAS
VDDAS
VDDAS
VDD
VDD
GNDATS
GNDATS
AB14
AC14
VDD
VDD
GNDATS
GNDATS
AD12
AD13
K9L9J12
VDD
GNDATS
AD14
2
L18
M9
M18N9N18P9P18R9R18T9T18U9U18V9V10
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
GNDATS
GNDATS
GNDATS
GNDATS
GNDATS
GNDATS
GNDATS
GNDATS
AF14
AD15
AD16
AE12
AE14
AE16
AF12
AF16
AC16
2
VCC2_5
V11
V12
V13
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
GND
GND
GNDAS
GNDAS
AC12
AB16
VT8237
VT8237
GND
GNDAS
GNDAS
AB12
F6F7J5K5P5
PDDACK#
1 - Disable external SATA PHY
PDCS#1
SATA master/slave mode
1 - Disable 0 - Enable
V14
V15
V16
VDD
VDD
VDD
VDD
GND
GND
GND
GND
L11
R5
R230 10K
R208 10K
R207 X_10K
3VDUAL
AA4
V17
V18
VDD
VDD
ACSDIN3/SLP_BTN
GND
GND
GND
L13
L14
L15
L12
AB4
AB5
VSUS33
VSUS33
VSUS33
AOLGP/THRM
GPIOB/Strap2
GPIOC/Strap0
GPIOD/Strap3
GND
GND
GND
L16
M11
VSUS2_5
AB6
T4
U4
VSUS25
VSUS25
VSUS33
ACBITCLK
ACSDIN0
ACSDIN1
ACSDIN2
ACSYNC
ACSDO
ACRST
PME
BATLOW
CPUMISS
RING
SUSST1
EXTSMI
SMBALRT
LID
PWRBTN
PWROK
CLKRUN
CPUSTP
PCISTP
INTRUDER
SUSCLK
SMBCK1
SMBDT1
SMBCK2
SMBDT2
SUSA
SUSB
SUSC
GPI0
GPI1
GPO0
GPO1
GPIOA/Strap1
SERIRQ
SPKR
OSC
TPO
TEST
VDDA0
GNDA0
SREXT
SXO/Strap4
SXI/Strap5
VDDA33
GNDA33
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
M12
M13
M14
M15
K18
VCC3
VCC3
U16B
T1
U3
V2
U1
V3
T2
U2
T3
W4
V4
Y1
Y2
Y3
Y4
AA1
AB1
AC1
AD2
AF1
AB7
AC7
AD6
AE1
AB3
AC4
AB2
AC3
AD1
AA2
AD3
AF2
AE2
AC2
AA3
AE3
AE5
AD5
AF5
AC6
AD9
AF8
AB8
AF9
AE9
AC10
AB10
AD11
AE10
AF10
AE11
AF11
W5
V5
M16
N11
N12
N13
N14
N15
N16
GND
VIA-VT8237R
3
AC_BITCLK
ACSDIN0
AC_SDIN1
AC_SDIN2
AC_SDIN3
ACSYNC
ACSDO
ACRST
PCI_PME#
BATLOW#
CPUMISS
RI#
SUSST#
THRMS#
EXTSMI#
SMBALRT#
ATADET1
PWRBTN#
PWROK_NB#
CLKRUN#
CPUSTP#
PCISTP#
INTRUDER
SUSCLK
SMBCLK1
SMBDATA1
SMBCLK2
SMBDATA2
SUSA#
SUSB#
SUSC#
GPI0
ATADET0
GPO0
GPO1
GPIOA
GPIOB
GPIOC
GPIOD
SERIRQ
SPKR
APICCLK
TPO
TEST
SREXT
VDDA33
3
VDDA0
SXO
SXI
AC_BITCLK 20
PCI_PME# 16,17,18
SUSST# 7
THRMS# 24
ATADET1 23
PWBTIN# 28
PWROK_NB# 7
SMBCLK1 12,13,26
SMBDATA1 12,13,26
SUSB# 16,24,26
SUSC# 26
ATADET0 23
SERIRQ 24
SPKR 28
APICCLK 11,12
R257
4.7K/1%
FB24 X_601S
C360
0.1uF
SXO
SXI
C370
15pF
VCC2_5
1 2
Y3 25MHz/18pF
1 2
C331
0.1uF
CP11
VCC3
C371
15pF
VT8237
*"ACSYNC" = > L P C F WH Command
0 - Enable FWH
1 - Disable FWH(Default)
ACSYNC
GPI0
INTRUDER
RN97
7
ACSYNC
5
ACSDO
3
ACRST
1
22R-8P4R
AC_SDIN2
AC_SDIN3
SUSCLK
EXTSMI#
RI#
CPUMISS
PCI_PME#
BATLOW#
THRMS#
SUSST#
PWBTIN#
PWROK_NB#
GPO1
SMBALRT#
GPO0
SUSB#
SUSC#
ATADET0
ATADET1
SUSA#
AC_SDIN1
CLKRUN#
PCISTP#
CPUSTP#
SERIRQ
TPO
TEST
SPKR
*"SPKR" => CPU Freq. Adjust Setting
1 - Disable (Default)
0 - Enable
SMBCLK1
SMBDATA1
SMBDATA2
SMBCLK2
4
R283 4.7K
R280 1M
R282 1M
AC_SDIN0 ACSDIN0
8
AC_SYNC
6
AC_SDOUT
4
AC_RST#
2
R285 4.7K
R286 4.7K
RN100
4.7K-8P4R
1 2
3 4
5 6
7 8
1 2
3 4
5 6
7 8
1 2
3 4
5 6
7 8
R294 X_4.7K
R297 X_4.7K
R287 X_4.7K
RN98
1 2
3 4
5 6
7 8
4.7K-8P4R
RN95
7 8
5 6
3 4
1 2
1 2
3 4
5 6
7 8
RN93 4.7K-8P4R
RN104
1K-8P4R
4
VCC3
VBAT
AC_SDIN0 20
AC_SYNC 20
AC_SDOUT 20
AC_RST# 20
4.7K-8P4R
VCC3
1 2
3 4
5 6
7 8
5
*"GPIO[A,C]" => LDT Frequency
00 - 200MHz (Default)
01 - 400MHz
*"GPIOB" => LDT Width
0 - 8-Bit (Default)
1 - 16-Bit
*"GPIOD" => Fast command
0 - Disable (Default)
1 - Enable
GPIOA
GPIOD
GPIOB
GPIOC
3VDUAL
Strapping
RN103
4.7K-8P4R
RN99
4.7K-8P4R
*"PDA0/SDA0" => LDT Transmit Control
0 - Disable (Default)
1 - Enable
*"PDA1/SDA1" => External loop test mode
0 - Disable (Default)
1 - Enable
*"PDA2/SDA2" => ROMSIP Select
0 - Disable
1 - Enable(Default)
*"-PDCS3" => T est Mode Select
VCC3
0 - Disable (Default)
1 - Enable
*"EEDI/-SDCS1" => EEPROM Select
0 - BIOS Porting - ACR
1 - External EEPROM (On-board)(Default)
R232 1K
R223 4.7K
VCC3
R198 2.7K
3VDUAL
VCC3
Title
Size Document Number Rev
A3
Date: Sheet
R244 X_4.7K
R243 4.7K
For K8T800Pro
0:External HCLK enable
1:Internal HCLK enable
R284 4.7K
ACSDO
0/1:Enable/disable auto reboot
MICRO-START INT'L CO.,LTD .
VT8237R Part2
MS-7172 0A
10 - 600MHz
11 - 800MHz
1 2
3 4
5 6
7 8
RN94
4.7K-8P4R
R213 X_2.7K
PDA1
PDA2
PDCS#3
PDA0
VT8237
5
VT8237
VT8237
VT8237
VT8237
10 34 Friday, March 04, 2005
of
1
2
3
4
5
MTXD0
MTXD1
MTXD3
MTXD2
R262 33R
R265 33R
R266 33R
VCC2_5
VCC2_5
RN87 33R-8P4R
7 8
5 6
3 4
1 2
SEEDI
R260 4.7K
R259
X_4.7K
-LDTSTOP 4,6
VCC2_5
MIITXD0 19
MIITXD1 19
MIITXD3 19
MIITXD2 19
MIITXEN 19
MIIMDCK 19
MIIMDIO 19
R174 1.5K
LAN MAC
SEEDI
EEPROM
0
BIOS 1
VCC3
5VSB
3VDUAL
R272 1K
R271 2.7K
VBAT1
BAT-2P_SO41
FERR#
APICD0#
APICD1#
APICCLK
ROMLOCK
GHI#
AGPBZ#
VGATE
VRDSLP
R250 1K
1 2
GND
GND
AE17
D12
E12
MIISUS25
MIISUS25
GND
GND
AE19
AE22
GND
AE25
GND
AA9
3VDUAL VSUS2_5 VCC2_5
E11E9E10
D9
MIIVCC
MIIVCC
MIIVCC
MIIVCC
APICD0/APICCS
APICD1/APICACK
GND
GND
GND
GND
T21
AA10
AB18
K19
MCRS
MCOL
MTXENA
MTXD0
MTXD1
MTXD2
MTXD3
MTXCLK
MRXER
MRXCLK
MRXDV
MRXD0
MRXD1
MRXD2
MRXD3
MDCK
MDIO
PHYRST
EECS
EEDO
EEDI
EECK
RAMVCC
RAMGND
FERR
A20M
IGNNE
INTR
STPCLK
DPSLP
VGATE
VIDSEL
VRDSLP
AGPBZ/GPI6
PCICLK
APICCLK
PLLVCC
PLLGND
INIT
NMI
SMI
SLP
GHI
U16C
A11
B11
C11
A10
B10
B9
A9
C10
D10
C9
D8
C8
B8
A8
C7
A7
B7
D7
D11
B12
A12
C12
E7
E6
U24
U26
T24
R26
T25
T26
U25
R24
V26
R22
P21
AC9
AC8
AB9
AD10
R23
U23
R25
T23
T22
U22
VIA-VT8237R
MTXEN
MTXD0
MTXD1
MTXD2
MTXD3
MDCK
MDIO
MIIRST
SEECS
SEEDO
SEEDI
SEECK
+2.5VRAM
FERR#
GHI#
ROMLOCK
VGATE
VRDSLP
AGPBZ#
SBPCLK
APICCLK
APICD0#
APICD1#
+2.5VSBPLL
MIICRS 19
MIICOL 19
MIITXCK 19
MIIRXER 19
MIIRXCK 19
MIIRXDV 19
MIIRXD0 19
MIIRXD1 19
MIIRXD2 19
MIIRXD3 19
MIIRST 19
SEECS 19
SEEDO 19
SEEDI 19
SEECK 19
C338 X_10pF
CB6
0.1uF
MTXEN
MDCK
MDIO
R322 2.2R
CB21
1uF
VIA AN258
SATALED 28
SBPCLK 12
APICCLK 10,12
CP9
1 2
A A
N21
N22
N23
N24
N25
N26
P22
P23
VCCVK
GND
P15
P16
VCCVK
VCCVK
GND
GND
R11
VCCVK
GND
R13
R12
VCCVK
VCCVK
GND
GND
R14
P24
R15
L21
K21
VLAD0
VLAD0 7
VLAD1 7
VLAD2 7
VLAD3 7
VLAD4 7
VLAD5 7
VLAD6 7
VLAD7 7
VBE0# 7
UPCMD 7
B B
DNCMD 7
UPSTB 7
UPSTB# 7
DNSTB 7
DNSTB# 7
VPAR 7
R246 360R/1%
VLREF_SB
VCOMPP_SB
VCLK 12
VLAD1
VLAD2
VLAD3
VLAD4
VLAD5
VLAD6
VLAD7
VCLK
VBE0#
UPCMD
DNCMD
UPSTB
UPSTB#
DNSTB
DNSTB#
VPAR
H25
G26
G25
G23
M26
G24
H26
H24
H22
K26
F26
K22
K24
E24
L26
L25
E26
E25
L24
K23
K25
F24
L22
J23
J26
J24
J22
F23
G22
LPC_AD0
LPC_AD0 24
LPC_AD1 24
LPC_AD2 24
LPC_AD3 24
C C
LPC_FRAME# 24
LPC_REQ# 24
ALL_PWRGD 26,28
RSMRST# 26
LPC_FRAME#
LPC_REQ#
ALL_PWRGD
RSMRST#
VBAT
X1
LPC_AD1
LPC_AD2
LPC_AD3
AD8
AF7
AE7
AD7
AF6
AE6
AE8
AC5
AD4
AF4
AE4
X2
AF3
Y4
32.768KHz/12.5pF
VD0
VD1
VD2
VD3
VD4
VD5
VD6
VD7
VD8
VD9
VD10
VD11
VD12
VD13
VD14
VD15
VBE
UPCMD
DNCMD
UPSTB
UPSTB
DNSTB
DNSTB
VPAR
VLREF
VCOMPP
VCLK
VIOUT
VIIN
LAD0
LAD1
LAD2
LAD3
LFRM
LREQ0
LREQ1
PWRGD
RSMRST
VBAT
RTCX1
RTCX2
L23
VCCVK
P11
VCCVK
VCCVK
GND
GND
P12
VCCVK
GND
P13
P14
VCCVK
GND
P25
VCCVK
VCCVK
GND
GND
R16
P26
M21
VCCVK
GND
R21
T11
M22
VCCVK
VCCVK
GND
GND
T12
M24
M23
VCCVK
GND
T14
T13
M25
VCCVK
VCCVK
GND
GND
T15
L19
M19
VCCVK
GND
T16
W22
N19
VCCVK
VCCVK
GND
GND
W25
P19 AA21
VCCVK GND
GND
AB19
GND
AB22
GND
AB25
AC18
0.1uF CB5
R242 1K
R241 330R
R235 330R
R222 X_4.7K
R236 4.7K
R226 4.7K
1 2
3 4
5 6
7 8
RN86
1 2
D9
BAT54C
VBAT
4.7K-8P4R
3
C400
10uF/10V/1206
VCC3
VBAT
C394
0.01uF
VCC3
JBAT1
1
2
3
H1X3_black
R292
1K
C393
D D
10pF
1
C402
10pF
C335
CB15
0.1uF
C334
0.1uF
VLREF_SB
Under SB Bottom
X_C0.1U25Y
2
3
R225
3K/1%
R224
412R/1%
Title
VT8237R Part3
Size Document Number Rev
A3
4
Date: Sheet
MICRO-START INT'L CO.,LTD .
MS-7172 0A
11 34 Friday, March 04, 2005
5
of
1
2
3
4
5
Clock Synthesizer
VCC3
FB20 X_120S/0805
C263
A A
X_4.7uF/10V/0805
B B
C C
C267
C277
X_0.1uF
X_C0.1U25Y
AC_14 20
APICCLK 10,11
GUICLK 7
CP7
X_COPPER
APICCLK
GUICLK
CLKVCC3
CLKVCC3
R158 10K
R177 22R
R152 22R
R145 22R
C278
4.7uF/10V/0805
FS0 AC_14
FS1
FS2
2
9
16
19
29
35
38
43
46
32
5
10
15
20
27
30
33
34
39
42
47
1
48
45
C258
0.1uF
U12
VDDHTT
VDDPCI
VDDPCI
VDDPCI
AVDD48
VDDCPU
VDDCPU
VDDA
VDDREF
PD#*
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
*FS0/REF0
*FS1/REF1
*FS2/REF2
ICS950405
33pF
C260
0.1uF
PCICLK8/HTTCLK1/ModeB*
X1
3
CLKX1
14.318MHZ
C285
C262
C261
0.1uF
0.1uF
CPUCLKT0
CPUCLKC0
CPUCLKT1
CPUCLKC1
PCICLK0
PCICLK1
PCICLK2
PCICLK3
PCICLK4
PCICLK5
PCICLK6
PCICLK7
PCICLK10
HTTCLK0/ModeA*
PCICLK9/HTTCLK2
PCICLK11/HTTCLK3
24_48M/24_48SEL#
48MHz/FS3**
X2
4
CLKX2
Y1
C281
33pF
SCLK
SDATA
RESET#
C290
C289
C291
0.1uF
0.1uF
41
R_HCLK-
40
37
R_CPUCLK0_L
36
R_PCICLK5
13
R_PCICLK3
14
R_PCICLK4 PCICLK4
17
R_PCICLK1
18
R_PCICLK2
21
R_SBPCLK
22
R_SIOPCLK
23
R_LPC_PCLK
24
R_1394CLK
12
MODEA
6
MODEB
7
HT_66_2
8
11
SEL_24
28
31
SMBCLK1
25
SMBDATA1
26
R148 10K
44
C259
0.1uF
0.1uF
FOR K8T800 Pro
R154 XT_15RST
R155 XT_15RST
R156 15R/1%
R157 15R/1%
7 8
5 6
3 4
1 2
7 8
5 6
3 4
1 2
7 8
5 6
3 4
1 2
R161 33R
R144 22R
RN69
22R-8P4R
RN70
22R-8P4R
R178
22R
RN68
22R-8P4R
SMBCLK1 10,13,26
SMBDATA1 10,13,26
CLK_RESET# 28
HCLK+ R_HCLK+
HCLKCPUCLK0_H R_CPUCLK0_H
CPUCLK0_L
PCICLK5
PCICLK3
PCICLK1
PCICLK2
SBPCLK
SIOPCLK
LPC_PCLK
1394CLK
VCLK
GCLK_SLOT
GCLK_NB
SIO48M
USBCLK_SB FS3
HCLK+ 6
HCLK- 6
CPUCLK0_H 4
CPUCLK0_L 4
PCICLK5 17
PCICLK3 17
PCICLK4 17
PCICLK1 17
PCICLK2 17
SBPCLK 11
SIOPCLK 24
LPC_PCLK 24
1394CLK 18
VCLK 11
GCLK_SLOT 16
GCLK_NB 7
SIO48M 24
USBCLK_SB 9
APICCLK
VCLK
GCLK_SLOT
GCLK_NB
USBCLK_SB
SIO48M
AC_14
GUICLK
PCICLK2
SBPCLK
SIOPCLK
LPC_PCLK
PCICLK1
PCICLK4
PCICLK3
PCICLK5
C257 X_10pF
7 8
5 6
3 4
1 2
C251 X_10pF
C256 X_10pF
C301 X_10pF
C248 X_10pF
C307 X_10pF
C308 X_10pF
C309 X_10pF
C310 X_10pF
CN9 X_8P4C-10P
1 2
3 4
5 6
7 8
CPUCLK0_H
CPUCLK0_L
HCLK+
C252 XT_C10P50N
HCLK-
C253 XT_C10P50N
For K8T800 Pro
CN8
X_8P4C-10P
C249 X_5pF
C250 X_5pF
R184 10K
MODEA
R193 10K
"FS0~FS3" are all internal
pull-up via 100K ohm ..
FS0
FS2
FS1
FS3
D D
1
R175 10K
R149 10K
R153 10K
R147 10K
CLKVCC3
FS(3:0)
0000
100.90
0001
133.90
0010
168.00
0011
202.00
0100
100.20
0101
133.50
0110
166.70
0111
200.40
1000
150.00
1001
180.00
1010
210.00
1011
240.00
1100
270.00
1101
233.33
1110
266.67
1111
300.00
2
67.27 33.63
66.95
67.20
67.33
66.80
66.75
66.68
60.00
60.00
70.00
60.00
67.50
66.67
66.67
75.00
PCI HTT CPU
33.48
33.60
33.67
33.40
33.38
33.34
33.40 66.80
30.00
30.00
35.00
30.00
33.75
33.33
33.33
37.50
3
MODEB
MODE B MODE A
HTTCLK1
0 0
0
1
1
0
1 1
HTTCLK1
PCICLK8
HTTCLK1
HTTCLK2
HTTCLK2
PCICLK9
PCICLK9
4
PIN11 PIN8 PIN7
PCICLK11
HTTCLK3
PCICLK11
PCICLK11
Title
Clock Synthesizer-ICS950405
Size Document Number Rev
A3
Date: Sheet
SEL_24
R159 X_10K
SEL_24
PIN28
48M
0
24M
1
MICRO-START INT'L CO.,LTD .
MS-7172 0A
12 34 Friday, March 04, 2005
5
of
1
DDR Damping Resister
2
3
4
5
RN5
MD0
A A
MD0 3
MD4 3
MD5 3
MD1 3
-MDQS0 3 -DR_MDQS0 13,14
DM0 3
MD2 3
MD7 3
MD6 3
MD3 3
MD8 3
MD9 3
MD12 3
B B
-MDQS1 3
MD13 3
DM1 3
MD14 3
MD15 3
MD10 3
MD20 3
MD11 3
MD16 3
MD17 3
-MDQS2 3
MD21 3
DM2 3
C C
MD18 3
MD22 3
MD23 3
MD19 3
MD24 3
MD28 3
MD29 3
MD25 3
-MDQS3 3
DM3 3
MD26 3
MD30 3
MD31 3
D D
MD27 3
1 2
MD4
3 4
MD5
5 6
MD1
7 8
10R0402-8P4R
R34
-MDQS0 -DR_MDQS0
10R/0402
RN8
DM0 DR_DM0
1 2
3 4
MD7
5 6
MD6
7 8
10R0402-8P4R
RN10
1 2
MD8
3 4
MD9 DR_MD9
5 6
7 8
10R0402-8P4R
RN12
1 2
MD13 DR_MD13
3 4
DM1
5 6
MD14 DR_MD14
7 8
10R0402-8P4R
R58 10R/0402
MD15
RN16
1 2
MD20 DR_MD20
3 4
MD11
5 6
MD16 DR_MD16
7 8
10R0402-8P4R
RN20
MD17
1 2
-MDQS2
3 4
MD21 DR_MD21
5 6
7 8
10R0402-8P4R
R63 10R/0402
MD18
RN24
1 2
MD23 DR_MD23
3 4
5 6
7 8
10R0402-8P4R
RN30
1 2
3 4
5 6
7 8
10R0402-8P4R
R68 10R/0402
DM3
RN33
MD26
1 2
3 4
MD31
5 6
MD27
7 8
10R0402-8P4R
DR_MD0
DR_MD4
DR_MD5
DR_MD1
DR_MD2 MD2
DR_MD7
DR_MD6
DR_MD3 MD3
DR_MD8
DR_MD12 MD12
-DR_MDQS1 -MDQS1
DR_DM1
DR_MD15
DR_MD10 MD10
DR_MD11
DR_MD17
-DR_MDQS2
DR_DM2 DM2
DR_MD18
DR_MD22 MD22
DR_MD19 MD19
DR_MD24 MD24
DR_MD28 MD28
DR_MD29 MD29
DR_MD25 MD25
-DR_MDQS3 -MDQS3
DR_DM3
DR_MD26
DR_MD30 MD30
DR_MD31
DR_MD27
DR_MD0 13,14
DR_MD4 13,14
DR_MD5 13,14
DR_MD1 13,14
DR_DM0 13,14
DR_MD2 13,14
DR_MD7 13,14
DR_MD6 13,14
DR_MD3 13,14
DR_MD8 13,14
DR_MD9 13,14
DR_MD12 13,14
-DR_MDQS1 13,14
DR_MD13 13,14
DR_DM1 13,14
DR_MD14 13,14
DR_MD15 13,14
DR_MD10 13,14
DR_MD20 13,14
DR_MD11 13,14
DR_MD16 13,14
DR_MD17 13,14
-DR_MDQS2 13,14
DR_MD21 13,14
DR_DM2 13,14
DR_MD18 13,14
DR_MD22 13,14
DR_MD23 13,14
DR_MD19 13,14
DR_MD24 13,14
DR_MD28 13,14
DR_MD29 13,14
DR_MD25 13,14
-DR_MDQS3 13,14
DR_DM3 13,14
DR_MD26 13,14
DR_MD30 13,14
DR_MD31 13,14
DR_MD27 13,14
MD32 3
MD36 3
MD33 3
MD37 3
-MDQS4 3
DM4 3
MD34 3
MD38
MD38 3
MD39 3
MD40 3
MD35 3
MD44 3
MD45 3
-MDQS5 3
MD41 3
DM5 3
MD42 3
MD43 3
MD46 3
MD47 3
MD49 3
MD48 3
MD52 3
MD53 3
DM6 3
-MDQS6 3
MD54 3
MD50 3
MD55 3
MD51 3
MD56 3
MD60 3
MD61 3
MD57 3
DM7 3
-MDQS7 3
MD58 3
MD62 3
MD63 3
MD59 3
RN42
1 2
3 4
5 6
7 8
DR_MD32 MD32
DR_MD36 MD36
DR_MD33 MD33
10R0402-8P4R
RN43
1 2
-MDQS4 -DR_MDQS4
3 4
5 6
MD34 DR_MD34
7 8
DR_MD37 MD37
DR_DM4 DM4
10R0402-8P4R
R114 10R/0402
RN46
MD39
1 2
MD40
3 4
MD35
5 6
MD44 DR_MD44
7 8
DR_MD38
DR_MD39
DR_MD40
DR_MD35
10R0402-8P4R
RN50
1 2
-MDQS5
3 4
MD41
5 6
DM5 DR_DM5
7 8
DR_MD45 MD45
-DR_MDQS5
DR_MD41
10R0402-8P4R
MD42
R119 10R/0402
RN53
MD43 DR_MD43
1 2
MD46 DR_MD46
3 4
MD47 DR_MD47
5 6
MD49 DR_MD49
7 8
DR_MD42
10R0402-8P4R
RN56
MD48 DR_MD48
1 2
MD52
3 4
MD53 DR_MD53
5 6
7 8
DR_MD52
DR_DM6 DM6
10R0402-8P4R
MD55
RN58
1 2
3 4
5 6
7 8
-DR_MDQS6 -MDQS6
DR_MD54 MD54
DR_MD50 MD50
DR_MD55
10R0402-8P4R
R130 10R/0402
MD51
RN60
MD56
1 2
MD60
3 4
MD61 DR_MD61
5 6
MD57 DR_MD57
7 8
DR_MD51
DR_MD56
DR_MD60
10R0402-8P4R
RN62
DM7
1 2
-MDQS7
3 4
MD58 DR_MD58
5 6
7 8
DR_DM7
-DR_MDQS7
DR_MD62 MD62
10R0402-8P4R
R138 10R/0402
MD63
R139 10R/0402
DR_MD63
DR_MD59 MD59
DR_MD32 13,14
DR_MD36 13,14
DR_MD33 13,14
DR_MD37 13,14
-DR_MDQS4 13,14
DR_DM4 13,14
DR_MD34 13,14
DR_MD38 13,14
DR_MD39 13,14
DR_MD40 13,14
DR_MD35 13,14
DR_MD44 13,14
DR_MD45 13,14
-DR_MDQS5 13,14
DR_MD41 13,14
DR_DM5 13,14
DR_MD42 13,14
DR_MD43 13,14
DR_MD46 13,14
DR_MD47 13,14
DR_MD49 13,14
DR_MD48 13,14
DR_MD52 13,14
DR_MD53 13,14
DR_DM6 13,14
-DR_MDQS6 13,14
DR_MD54 13,14
DR_MD50 13,14
DR_MD55 13,14
DR_MD51 13,14
DR_MD56 13,14
DR_MD60 13,14
DR_MD61 13,14
DR_MD57 13,14
DR_DM7 13,14
-DR_MDQS7 13,14
DR_MD58 13,14
DR_MD62 13,14
DR_MD63 13,14
DR_MD59 13,14
VTT_DDR_SUS
C203
X_C4.7U16Y1206
C51
4.7uF/1206
C157
4.7uF/1206
VTT_DDR_SUS
C7
C32
X_C1U16Y0805
C204
X_4.7uF/10V/0805
X_4.7uF/10V/0805
C246
X_C1U16Y0805
VTT_DDR_SUS
C206
C239
1uF
C149
0.1uF
C43
0.1uF
1uF
VDD_25_SUS VDD_25_SUS
C158
C177
0.1uF
C224
X_C0.1U25Y
0.1uF
VTT_DDR_SUS
EC27
VTT_DDR_SUS
C28
X_C0.1U25Y
C49
X_C0.1U25Y
EC5
470uF/6.3V
EC1
470uF/6.3V
C39
X_C0.1U25Y
1 2
+
EC23
1000uF/6.3V
C6
X_C0.1U25Y
+
1000uF/6.3V
Title
DDR Damping Resister
Size Document Number Rev
A3
1
2
3
4
Date: Sheet
MICRO-START INT'L CO.,LTD .
MS-7172 0A
13 34 Friday, March 04, 2005
5
of
1
2
3
4
5
VDD_25_SUS
738467085
108
120
148
168223054627796
VDD0
VDD1
VDD2
VDD3
VDD4
VDD5
VDD6
VDD7
VDD8
VSS0
VSS1
VSS2
VSS3
VSS4
VSS5
3111826344250586674818993
0.1uF
C31
DR_MD0
DR_MD1
DR_MD2
DR_MD3
DR_MD4
DR_MD5
DR_MD6
DR_MD7
DR_MD8
DR_MD9
DR_MD10
DR_MD11
DR_MD12
DR_MD13
DR_MD14
DR_MD15
DR_MD16
DR_MD17
DR_MD18
DR_MD19
DR_MD20
DR_MD21
DR_MD22
DR_MD23
DR_MD24
DR_MD25
DR_MD26
DR_MD27
DR_MD28
DR_MD29
DR_MD30
DR_MD31
DR_MD32
DR_MD33
DR_MD34
DR_MD35
DR_MD36
DR_MD37
DR_MD38
DR_MD39
DR_MD40
DR_MD41
DR_MD42
DR_MD43
DR_MD44
DR_MD45
DR_MD46
DR_MD47
DR_MD48
DR_MD49
DR_MD50
DR_MD51
DR_MD52
DR_MD53
DR_MD54
DR_MD55
DR_MD56
DR_MD57
DR_MD58
DR_MD59
DR_MD60
DR_MD61
DR_MD62
DR_MD63
WP1
-MSWEA
2
DQ0
4
DQ1
6
DQ2
8
DQ3
94
DQ4
95
DQ5
98
DQ6
99
DQ7
12
DQ8
13
DQ9
19
DQ10
20
DQ11
105
DQ12
106
DQ13
109
DQ14
110
DQ15
23
DQ16
24
DQ17
28
DQ18
31
DQ19
114
DQ20
117
DQ21
121
DQ22
123
DQ23
33
DQ24
35
DQ25
39
DQ26
40
DQ27
126
DQ28
127
DQ29
131
DQ30
133
DQ31
53
DQ32
55
DQ33
57
DQ34
60
DQ35
146
DQ36
147
DQ37
150
DQ38
151
DQ39
61
DQ40
64
DQ41
68
DQ42
69
DQ43
153
DQ44
155
DQ45
161
DQ46
162
DQ47
72
DQ48
73
DQ49
79
DQ50
80
DQ51
165
DQ52
166
DQ53
170
DQ54
171
DQ55
83
DQ56
84
DQ57
87
DQ58
88
DQ59
174
DQ60
175
DQ61
178
DQ62
179
DQ63
90
WP(NC)
63
WE#
1
VREF
9
NC2
101
NC3
102
NC4
A A
B B
C C
VDD_25_SUS
DR_MD0 14,15
DR_MD1 14,15
DR_MD2 14,15
DR_MD3 14,15
DR_MD4 14,15
DR_MD5 14,15
DR_MD6 14,15
DR_MD7 14,15
DR_MD8 14,15
DR_MD9 14,15
DR_MD10 14,15
DR_MD11 14,15
DR_MD12 14,15
DR_MD13 14,15
DR_MD14 14,15
DR_MD15 14,15
DR_MD16 14,15
DR_MD17 14,15
DR_MD18 14,15
DR_MD19 14,15
DR_MD20 14,15
DR_MD21 14,15
DR_MD22 14,15
DR_MD23 14,15
DR_MD24 14,15
DR_MD25 14,15
DR_MD26 14,15
DR_MD27 14,15
DR_MD28 14,15
DR_MD29 14,15
DR_MD30 14,15
DR_MD31 14,15
DR_MD32 14,15
DR_MD33 14,15
DR_MD34 14,15
DR_MD35 14,15
DR_MD36 14,15
DR_MD37 14,15
DR_MD38 14,15
DR_MD39 14,15
DR_MD40 14,15
DR_MD41 14,15
DR_MD42 14,15
DR_MD43 14,15
DR_MD44 14,15
DR_MD45 14,15
DR_MD46 14,15
DR_MD47 14,15
DR_MD48 14,15
DR_MD49 14,15
DR_MD50 14,15
DR_MD51 14,15
DR_MD52 14,15
DR_MD53 14,15
DR_MD54 14,15
DR_MD55 14,15
DR_MD56 14,15
DR_MD57 14,15
DR_MD58 14,15
DR_MD59 14,15
DR_MD60 14,15
DR_MD61 14,15
DR_MD63 14,15
R140 4.7K
-MSWEA 3,14
DDR_VREF
VREF routed as 40~50
mils trace wide ,
Space>25 mils
Place 104p and 1000p Cap. near the DIMM
104
VDDQ0
VDDQ1
VDDQ2
VDDQ3
VDDQ4
VDDQ5
VDDQ6
DDR DIMM
VSS6
VSS7
VSS8
VSS9
VSS10
VSS11
VSS12
Place near the DIMM
D D
1
DIMM1 SLAVE ADDRESS
= (1010000X)B = A0
SYSTEM MEMORY
112
128
136
143
156
164
172
1801582
184
VDDQ11
VDDQ12
VSS17
VSS18
145
VDDQ13
VDDQ14
VDDQ15
PIN
CK1#(CK0#)
NC(RESET#)
VSS19
VSS20
VSS21
152
160
176
VDDID
VDDSPD
CS0#
CS1#
CS2#
CS3#
DQS0
DQS1
DQS2
DQS3
DQS4
DQS5
DQS6
DQS7
DQS8
FETEN
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10_AP
A11
A12
A13
BA0
BA1
BA2
SCL
SDA
SA0
SA1
SA2
CB0
CB1
CB2
CB3
CB4
CB5
CB6
CB7
CK0(DU)
CK0#(DU)
CK1(CK0)
CK2(DU)
CK2#(DU)
NC5
CKE0
CKE1
CAS#
RAS#
DM0
DM1
DM2
DM3
DM4
DM5
DM6
DM7
DM8
DDR1
DIMM-184_Green
N13-1840061-A10
157
158
71
163
5
14
25
36
56
67
78
86
47
103
48
43
41
130
37
32
125
29
122
27
141
118
115
167
59
52
113
92
91
181
182
183
44
45
49
51
134
135
142
144
16
17
137
138
76
75
173
10
21
111
65
154
97
107
119
129
149
159
169
177
140
-MCS0
-MCS1
-DR_MDQS0
-DR_MDQS1
-DR_MDQS2
-DR_MDQS3
-DR_MDQS4
-DR_MDQS5
-DR_MDQS6
-DR_MDQS7
MAA0
MAA1
MAA2
MAA3
MAA4
MAA5
MAA6
MAA7
MAA8
MAA9
MAA10
MAA11
MAA12
MAA13
SMBCLK1
SMBDATA1
MEMCLK_H5
MEMCLK_L5
MEMCLK_H0
MEMCLK_L0
MEMCLK_H7
MEMCLK_L7
MCKE1
-MSCASA
-MSRASA
DR_DM0
DR_DM1
DR_DM2
DR_DM3
DR_DM4
DR_DM5
DR_DM6
DR_DM7
VDDQ7
VDDQ8
VDDQ9
VDDQ10
184
SOCKET
VSS13
VSS14
VSS15
VSS16
100
116
124
132
139
2
738467085
-MCS0 3,14
-MCS1 3,14
-DR_MDQS0 14,15
-DR_MDQS1 14,15
-DR_MDQS2 14,15
-DR_MDQS3 14,15
-DR_MDQS4 14,15
-DR_MDQS5 14,15
-DR_MDQS6 14,15
-DR_MDQS7 14,15
MAA0 3,14
MAA1 3,14
MAA2 3,14
MAA3 3,14
MAA4 3,14
MAA5 3,14
MAA6 3,14
MAA7 3,14
MAA8 3,14
MAA9 3,14
MAA10 3,14
MAA11 3,14
MAA12 3,14
MAA13 3,14 MAB13 3,14
MEMBANKA0 3,14
MEMBANKA1 3,14
SMBCLK1 10,12,26
SMBDATA1 10,12,26
MEMCLK_H5 3,14
MEMCLK_L5 3,14
MEMCLK_H0 3,14
MEMCLK_L0 3,14
MEMCLK_H7 3,14
MEMCLK_L7 3,14
MCKE0 3,14
MCKE1 3,14
-MSCASA 3,14 DR_MD62 14,15
-MSRASA 3,14
VDD_25_SUS
R19
1K/1%
R20
1K/1%
3
C443
X_C0.1U25Y
DDR_VREF
C30
1uF
VDD_25_SUS
R142 4.7K
-MSWEB 3,14
VREF routed as
40~50 mils trace
wide , Space>25
mils
DR_MD0
DR_MD1
DR_MD2
DR_MD3
DR_MD4
DR_MD5
DR_MD6
DR_MD7
DR_MD8
DR_MD9
DR_MD10
DR_MD11
DR_MD12
DR_MD13
DR_MD14
DR_MD15
DR_MD16
DR_MD17
DR_MD18
DR_MD19
DR_MD20
DR_MD21
DR_MD22
DR_MD23
DR_MD24
DR_MD25
DR_MD26
DR_MD27
DR_MD28
DR_MD29
DR_MD30
DR_MD31
DR_MD32
DR_MD33
DR_MD34
DR_MD35
DR_MD36
DR_MD37
DR_MD38
DR_MD39
DR_MD40
DR_MD41
DR_MD42
DR_MD43
DR_MD44
DR_MD45
DR_MD46
DR_MD47
DR_MD48
DR_MD49
DR_MD50
DR_MD51
DR_MD52
DR_MD53
DR_MD54
DR_MD55
DR_MD56
DR_MD57
DR_MD58
DR_MD59
DR_MD60
DR_MD61
DR_MD62
DR_MD63
DDR_VREF
DDR_VREF 3
WP2
-MSWEB
2
DQ0
4
DQ1
6
DQ2
8
DQ3
94
DQ4
95
DQ5
98
DQ6
99
DQ7
12
DQ8
13
DQ9
19
DQ10
20
DQ11
105
DQ12
106
DQ13
109
DQ14
110
DQ15
23
DQ16
24
DQ17
28
DQ18
31
DQ19
114
DQ20
117
DQ21
121
DQ22
123
DQ23
33
DQ24
35
DQ25
39
DQ26
40
DQ27
126
DQ28
127
DQ29
131
DQ30
133
DQ31
53
DQ32
55
DQ33
57
DQ34
60
DQ35
146
DQ36
147
DQ37
150
DQ38
151
DQ39
61
DQ40
64
DQ41
68
DQ42
69
DQ43
153
DQ44
155
DQ45
161
DQ46
162
DQ47
72
DQ48
73
DQ49
79
DQ50
80
DQ51
165
DQ52
166
DQ53
170
DQ54
171
DQ55
83
DQ56
84
DQ57
87
DQ58
88
DQ59
174
DQ60
175
DQ61
178
DQ62
179
DQ63
90
WP(NC)
63
WE#
1
VREF
9
NC2
101
NC3
102
NC4
VDD_25_SUS
108
120
148
168223054627796
VDD0
VDD1
VDD2
VDD3
VDD4
VDD5
VDD6
VDD7
VDD8
VSS0
VSS1
VSS2
VSS3
VSS4
VSS5
3111826344250586674818993
DIMM2 SLAVE ADDRESS
= (1010001X)B = A2
4
104
112
128
VDDQ0
VDDQ1
VDDQ2
VDDQ3
VDDQ4
VDDQ5
VDDQ6
VDDQ7
VDDQ8
DDR DIMM
SOCKET
VSS6
VSS7
VSS8
VSS9
VSS10
VSS11
VSS12
VSS13
VSS14
100
116
136
143
156
164
172
1801582
184
VDDQ9
VSS15
124
132
VDDQ10
VSS16
139
VDDID
VDDQ11
VDDQ12
VDDQ13
VDDQ14
VDDQ15
VDDSPD
CS0#
CS1#
CS2#
CS3#
DQS0
DQS1
DQS2
DQS3
DQS4
DQS5
DQS6
DQS7
DQS8
FETEN
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10_AP
A11
A12
A13
BA0
BA1
BA2
SCL
SDA
PIN
CK0(DU)
CK0#(DU)
CK1(CK0)
CK1#(CK0#)
CK2(DU)
CK2#(DU)
NC(RESET#)
VSS19
VSS20
VSS21
152
160
176
DDR DIMM1&2
A3
SA0
SA1
SA2
CB0
CB1
CB2
CB3
CB4
CB5
CB6
CB7
NC5
CKE0
CKE1
CAS#
RAS#
DM0
DM1
DM2
DM3
DM4
DM5
DM6
DM7
DM8
MS-7172 0A
184
VSS17
VSS18
145
Title
Size Document Number Rev
Date: Sheet
-MCS2
157
158
71
163
-DR_MDQS0
5
-DR_MDQS1
14
-DR_MDQS2
25
-DR_MDQS3
36
-DR_MDQS4
56
-DR_MDQS5
67
-DR_MDQS6
78
-DR_MDQS7
86
47
103
MAB0
48
MAB1
43
MAB2
41
MAB3
130
MAB4
37
MAB5
32
MAB6
125
MAB7
29
MAB8
122
MAB9
27
MAB10
141
MAB11
118
MAB12
115
MAB13
167
MEMBAKB0
59
MEMBAKB1
52
113
SMBCLK1
92
SMBDATA1
91
181
182
183
44
45
49
51
134
135
142
144
16
17
137
138
76
75
173
10
MCKE0 MCKE0
21
MCKE1
111
-MSCASB
65
-MSRASB
154
DR_DM0
97
DR_DM1
107
DR_DM2
119
DR_DM3
129
DR_DM4
149
DR_DM5
159
DR_DM6
169
DR_DM7
177
140
DDR2
DIMM-184_Green
N13-1840061-A10
-MCS3
-MCS2 3,14
-MCS3 3,14
MAB0 3,14
MAB1 3,14
MAB2 3,14
MAB3 3,14
MAB4 3,14
MAB5 3,14
MAB6 3,14
MAB7 3,14
MAB8 3,14
MAB9 3,14
MAB10 3,14
MAB11 3,14
MAB12 3,14
MEMBAKB0 3,14
MEMBAKB1 3,14
VDD_25_SUS
MEMCLK_H4 3,14
MEMCLK_L4 3,14
MEMCLK_H1 3,14
MEMCLK_L1 3,14
MEMCLK_H6 3,14
MEMCLK_L6 3,14
-MSCASB 3,14
-MSRASB 3,14
DR_DM0 14,15
DR_DM1 14,15
DR_DM2 14,15
DR_DM3 14,15
DR_DM4 14,15
DR_DM5 14,15
DR_DM6 14,15
DR_DM7 14,15
MICRO-START INT'L CO.,LTD .
14 34 Friday, March 04, 2005
5
of
1
DDR Terminations
2
3
4
5
VTT_DDR_SUS VTT_DDR_SUS VTT_DDR_SUS
RN4
A A
B B
C C
DR_MD0 13,15
DR_MD4 13,15
DR_MD5 13,15
DR_MD1 13,15
-DR_MDQS0 13,15
DR_DM0 13,15
DR_MD2 13,15
DR_MD7 13,15
DR_MD6 13,15
DR_MD3 13,15
DR_MD8 13,15
DR_MD9 13,15
DR_MD12 13,15
-DR_MDQS1 13,15
DR_MD13 13,15
DR_DM1 13,15
DR_MD14 13,15
DR_MD15 13,15
DR_MD10 13,15
DR_MD11 13,15
MCKE1 3,13
MCKE0 3,13
DR_MD20 13,15
DR_MD16 13,15
MAB12 3,13
MAA12 3,13
DR_MD17 13,15
-DR_MDQS2 13,15
DR_MD0
DR_MD4
DR_MD5
DR_MD1
-DR_MDQS0
DR_DM0
DR_MD2
DR_MD7
DR_MD6
DR_MD3
DR_MD8
DR_MD9
DR_MD12
-DR_MDQS1
DR_MD13
DR_DM1
DR_MD14
DR_MD15
DR_MD10
DR_MD11
MCKE1
MCKE0
DR_MD20
DR_MD16
MAB12
MAA12
DR_MD17
-DR_MDQS2
47R-8P4R
1 2
3 4
5 6
7 8
RN7
47R-8P4R
1 2
3 4
5 6
7 8
RN9
47R-8P4R
1 2
3 4
5 6
7 8
RN11
47R-8P4R
1 2
3 4
5 6
7 8
RN14
47R-8P4R
1 2
3 4
5 6
7 8
RN15
47R-8P4R
1 2
3 4
5 6
7 8
RN17
47R-8P4R
1 2
3 4
5 6
7 8
C33
1uF
C52
1uF
C64
X_C1U10Y
C76
1uF
C78
1uF
C80
1uF
DR_DM2 13,15
MAA9 3,13
MAA7 3,13
DR_MD18 13,15
DR_MD22 13,15
MAB7 3,13
MAB8 3,13
DR_MD23 13,15
DR_MD19 13,15
MAB5 3,13
MAA8 3,13
MAA5 3,13
DR_MD24 13,15
MAB6 3,13
MAA6 3,13
DR_MD28 13,15
MAB4 3,13
MAA4 3,13
DR_MD29 13,15
DR_MD25 13,15
-DR_MDQS3 13,15
DR_DM3 13,15
MAB3 3,13
DR_MD26 13,15
MAA3 3,13
DR_MD30 13,15
DR_MD31 13,15
DR_MD27 13,15
DR_DM2
MAA9
MAA7
DR_MD18
DR_MD22
MAB7
MAB8
DR_MD23
DR_MD19
MAB5
MAA8
MAA5
DR_MD24
MAB6
MAA6
DR_MD28
MAB4
MAA4
DR_MD29
DR_MD25
-DR_MDQS3
DR_DM3
MAB3
DR_MD26
MAA3
DR_MD30
DR_MD31
DR_MD27
RN21
47R-8P4R
1 2
3 4
5 6
7 8
RN22
47R-8P4R
1 2
3 4
5 6
7 8
RN25
47R-8P4R
1 2
3 4
5 6
7 8
RN29
47R-8P4R
1 2
3 4
5 6
7 8
RN31
47R-8P4R
1 2
3 4
5 6
7 8
RN32
47R-8P4R
1 2
3 4
5 6
7 8
RN34
47R-8P4R
1 2
3 4
5 6
7 8
C100
1uF
C118
1uF
C124
1uF
RN37
MAA0 3,13
MAA10 3,13
MAB10 3,13
MAB0 3,13
MEMBANKA1 3,13
MEMBAKB1 3,13
DR_MD32 13,15
DR_MD36 13,15
DR_MD33 13,15
MEMBANKA0 3,13
MEMBAKB0 3,13
DR_MD37 13,15
-DR_MDQS4 13,15
DR_DM4 13,15
DR_MD34 13,15
DR_MD38 13,15
DR_MD39 13,15
DR_MD40 13,15
DR_MD35 13,15
DR_MD44 13,15
-MSRASA 3,13
-MSRASB 3,13
DR_MD45 13,15
-MSWEB 3,13
-MSCASA 3,13
DR_MD41 13,15
-MCS0 3,13
-MCS2 3,13
MAA0
MAA10
MAB10
MAB0
MEMBANKA1
MEMBAKB1
DR_MD32
DR_MD36
DR_MD33
MEMBANKA0
MEMBAKB0
DR_MD37
-DR_MDQS4
DR_DM4
DR_MD34
DR_MD38
DR_MD39
DR_MD40
DR_MD35
DR_MD44
-MSRASA
-MSRASB
DR_MD45
-MSWEB
-MSCASA
DR_MD41
-MCS0
-MCS2
47R-8P4R
1 2
3 4
5 6
7 8
RN39
47R-8P4R
1 2
3 4
5 6
7 8
RN41
47R-8P4R
1 2
3 4
5 6
7 8
RN44
47R-8P4R
1 2
3 4
5 6
7 8
RN45
47R-8P4R
1 2
3 4
5 6
7 8
RN47
47R-8P4R
1 2
3 4
5 6
7 8
RN48
47R-8P4R
1 2
3 4
5 6
7 8
C141
1uF
C167
1uF
C189
1uF
C196
1uF
C205
1uF
-DR_MDQS5 13,15
DR_DM5 13,15
DR_MD42 13,15
DR_MD43 13,15
DR_MD46 13,15
DR_MD47 13,15
DR_MD49 13,15
DR_MD48 13,15
DR_MD52 13,15
DR_MD53 13,15
MAB13 3,13
MAA13 3,13
DR_DM6 13,15
-DR_MDQS6 13,15
DR_MD54 13,15
DR_MD50 13,15
DR_MD55 13,15
DR_MD51 13,15
DR_MD56 13,15
DR_MD60 13,15
DR_MD61 13,15
DR_MD57 13,15
DR_DM7 13,15
-DR_MDQS7 13,15
DR_MD58 13,15
DR_MD62 13,15
DR_MD63 13,15
DR_MD59 13,15
-DR_MDQS5
DR_DM5
DR_MD42
DR_MD43
DR_MD46
DR_MD47
DR_MD49
DR_MD48
DR_MD52
DR_MD53
MAB13
MAA13
DR_DM6
-DR_MDQS6
DR_MD54
DR_MD50
DR_MD55
DR_MD51
DR_MD56
DR_MD60
DR_MD61
DR_MD57
DR_DM7
-DR_MDQS7
DR_MD58
DR_MD62
DR_MD63
DR_MD59
RN52
47R-8P4R
1 2
3 4
5 6
7 8
RN54
47R-8P4R
1 2
3 4
5 6
7 8
RN55
47R-8P4R
1 2
3 4
5 6
7 8
RN57
47R-8P4R
1 2
3 4
5 6
7 8
RN59
47R-8P4R
1 2
3 4
5 6
7 8
RN61
47R-8P4R
1 2
3 4
5 6
7 8
RN63
47R-8P4R
1 2
3 4
5 6
7 8
VTT_DDR_SUS
C210
1uF
C216
1uF
C226
1uF
C227
1uF
C232
1uF
RN19
DR_MD21 13,15
MAB9 3,13
MAB11 3,13
MAA11 3,13
D D
DR_MD21
MAB9
MAB11
MAA11
For DIMM2 Clock
MEMCLK_H4 3,13 MEMCLK_L5 3,13
MEMCLK_H1 3,13
MEMCLK_H6 3,13
1
47R-8P4R
1 2
3 4
5 6
7 8
C69 X_C10P50N
C105 X_C10P50N
C155 X_C10P50N
C85
1uF
MEMCLK_L4 3,13
MEMCLK_L1 3,13
MEMCLK_L6 3,13
MAB2 3,13
MAB1 3,13
MAA2 3,13
MAA1 3,13
2
MAB2
MAB1
MAA2
MAA1
RN35
47R-8P4R
1 2
3 4
5 6
7 8
For DIMM1 Clock
MEMCLK_H5 3,13
MEMCLK_H7 3,13
MEMCLK_H0 3,13
C139
1uF
C70 X_C10P50N
C156 X_C10P50N
C106 X_C10P50N
3
-MSWEA 3,13
-MSCASB 3,13
-MCS1 3,13
-MCS3 3,13
MEMCLK_L7 3,13
MEMCLK_L0 3,13
-MSWEA
-MSCASB
-MCS1
-MCS3
RN51
47R-8P4R
1 2
3 4
5 6
7 8
Title
DDR Terminations
Size Document Number Rev
A3
4
Date: Sheet
MICRO-START INT'L CO.,LTD .
MS-7172 0A
15 34 Friday, March 04, 2005
5
of
1
AGP PRO Connector
A A
EC33
1000uF/16V
VCC
C294
0.1uF
+12V
+
1 2
B B
C C
2
Medion AGP
B1 == 12V
A4 == 12V
VCC3
PIRQ#B 9,17
GCLK_SLOT 12
GREQ 7
ST0 7 ST1 7
ST2 7
RBF 7
DBIL 7
SBA0 7 SBA1 7
SBA2 7 SBA3 7
SB_STBF 7
SBA4 7 SBA5 7
SBA6 7 SBA7 7
AD_STBF1 7 AD_STBS1 7
GAD23 7
GAD21 7 GAD22 7
GAD19 7 GAD20 7
GAD17 7 GAD18 7
GC/BE#2 7
GIRDY 7
GDEVSEL 7
GSERR 7
GC/BE#1 7
GAD8 7
AD_STBF0 7
GREQ
ST0
ST2
RBF
DBIL
SBA0
SBA2
SB_STBF
SBA4
SBA6
3VDUAL
GAD31
GAD29
GAD27
GAD25
AD_STBF1
GAD23
GAD21
GAD19
GAD17
GC/BE#2
GIRDY
GDEVSEL
GPERR
GSERR
GAD14
GAD12
GAD10
GAD8
AD_STBF0 AD_STBS0
GAD7
GAD5
GAD3
GAD1
VREF_CG
+12V
VCC
B4 == 5V
AGP1
SLOT-AGP1.5LATCH_red
N11-1240131-K06
B1
-OVRCNT
B2
5V
B3
5V
B4
USB+
B5
GND
B6
-INTB
B7
CLK
B8
-REQ
B9
3.3V
B10
ST0
B11
ST2
B12
-RBF
B13
GND
B14
RESERVED
B15
SBA0
B16
3.3V
B17
SBA2
B18
SB_STB
B19
GND
B20
SBA4
B21
SBA6
B22
RSVD/KEY
B23
GND/KEY
B24
AUX3V/KEY
B25
3.3V/KEY
B26
AD31
B27
AD29
B28
3.3V
B29
AD27
B30
AD25
B31
GND
B32
AD_STB1
B33
AD23
B34
VDDQ
B35
AD21
B36
AD19
B37
GND
B38
AD17
B39
C/-BE2
B40
VDDQ
B41
-IRDY
B42
AUX3V/KEY
B43
GND/KEY
B44
RSVD/KEY
B45
3.3V/KEY
B46
-DEVSEL
B47
VDDQ
B48
-PERR
B49
GND
B50
-SERR
B51
C/-BE1
B52
VDDQ
B53
AD14
B54
AD12
B55
GND
B56
AD10
B57
AD8
B58
VDDQ
B59
AD_STB0
B60
AD7
B61
GND
B62
AD5
B63
AD3
B64
VDDQ
B65
AD1
B66
VREF_CG
3
-TYPEDET
RESERVED
USBGND
-INTA
-RST
-GNT
3.3V
RESERVED
-PIPE
GND
-WBF
SBA1
3.3V
SBA3
-SB_STB
GND
SBA5
SBA7
RSVD/KEY
GND/KEY
RSVD/KEY
3.3V/KEY
AD30
AD28
3.3V
AD26
AD24
GND
-AD_STB1
C/-BE3
VDDQ
AD22
AD20
GND
AD18
AD16
VDDQ
-FRAME
RSVD/KEY
GND/KEY
RSVD/KEY
3.3V/KEY
-TRDY
-STOP
-PME
GND
PAR
AD15
VDDQ
AD13
AD11
GND
AD9
C/-BE0
VDDQ
-AD_STB0
AD6
GND
AD4
AD2
VDDQ
AD0
VREF_GC
ST1
12V
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10
A11
A12
A13
A14
A15
A16
A17
A18
A19
A20
A21
A22
A23
A24
A25
A26
A27
A28
A29
A30
A31
A32
A33
A34
A35
A36
A37
A38
A39
A40
A41
A42
A43
A44
A45
A46
A47
A48
A49
A50
A51
A52
A53
A54
A55
A56
A57
A58
A59
A60
A61
A62
A63
A64
A65
A66
4
3VDUAL 3VDUAL
R197
+12V VCC3 VDDQ VDDQ
TYPEDET#
AGP8XDET_GC#
AGPGND
GGNT
ST1
WBF
SBA1
SBA3
SB_STBS
SBA5
SBA7
GAD30
GAD28
GAD26
GAD24
AD_STBS1
GC/BE#3
GAD22
GAD20
GAD18
GAD16
GFRAME
GTRDY
GSTOP
R182 0R
AGP_PME#
GPAR
GAD15 GC/BE#1
GAD13
GAD11
GAD9
GC/BE#0
GAD6
GAD4
GAD2
GAD0
AGPVREF_GC
X_4K7R2
C E
B
PIRQ#A 7,9,17
PCIRST# 9,26
GGNT 7
DBIH 7
WBF 7
SB_STBS 7
GAD30 7 GAD31 7
GAD28 7 GAD29 7
GAD26 7 GAD27 7
GAD24 7 GAD25 7
GC/BE#3 7
GAD16 7
GFRAME 7
GTRDY 7
GSTOP 7
PCI_PME# 10,17,18
GPAR 7
GAD15 7
GAD13 7 GAD14 7
GAD11 7 GAD12 7
GAD9 7 GAD10 7
GC/BE#0 7
AD_STBS0 7
GAD6 7 GAD7 7
GAD4 7 GAD5 7
GAD2 7 GAD3 7
GAD0 7 GAD1 7
AGPVREF_GC 7
R196
X_4K7R2
Q26
X_2N3904S
5
TYPEDET# 7
SUSB# 10,24,26
AGP "Vref" => 4X : 0.5*1.5V=0.75 Volt ,
8X : 0.23*1.5 =0.345 Volt
VDDQ
4X : 0.75V
D D
8X : 0.35V
VREF_CG
1uF
C299
1
R188
3.32K/1%
C298
0.1uF
R180
1.47K/1%
R187
1.02K/1%
+12V
Q23
2N7002
G
R190
1K
AGP8XDET_GC#
1 : 4X
D S
0 : 8X 1 : 4X
"AGP8XDET_GC#"
=>4X=High,8X=Low
VCC3
R189
4.7K
D S
Q22
2N7002
G
AGP8XDET#
R186
10K
2
AGP8XDET# 7
0 : 8X
AGP8XDET_GC#
1 : 4X
0 : 8X
3
R185
10K
+12V
R183
1K
Q25
MMBT3904
VDDQ
R179
8.2K
GPERR
D S
Q24
2N7002
G
R181
200R/1%
4
Title
Size Document Number Rev
Date: Sheet
Add-in Card Power
VDDQ
VCC3
3VDUAL
VCC5
VCC12
Imax
2.0A
6.0A
0.75A
2.0A
1.0A
V_Min V_MaxVUnits
1.425 1.575
3.15 3.45
3.15 3.45
4.75 5.25
11.4 12.6
MICRO-START INT'L CO.,LTD .
AGP SLOT
A3
MS-7172 0A
5
V
V
V
V
16 34 Friday, March 04, 2005
of
1
2
3
4
5
PCI Connectors
VCC3 VCC3 VCC3
IDSEL#=AD19
INT#=A,B,C,D
VCC VCC VCC VCC
A A
PIRQ#B 9,16
PIRQ#D 9
PCICLK1 12 PCICLK2 12
PREQ#0 9
B B
C C
C_BE#3 9,18
C_BE#2 9,18
IRDY# 9,18
DEVSEL# 9,18
PERR# 9,18
SERR# 9
C_BE#1 9,18
-12V
PIRQ#B PIRQ#C
PIRQ#D
PCICLK1
PREQ#0
AD31 AD30
AD29
AD29 9,18
AD27 AD26
AD25
AD25 9,18
C_BE#3
AD23
AD23 9,18
AD21 AD20
AD19
AD19 9,18
AD17 AD16
C_BE#2
IRDY#
DEVSEL#
PLOCK#
PERR# SDONE
SERR#
C_BE#1 AD15
AD14
AD14 9,18
AD12 AD11
AD10
AD10 9,18
AD8 C_BE#0
AD8 9,18
AD7
AD7 9,18
AD5 AD4
AD3
AD3 9,18
AD1 AD0
B10
B11
B12
B13
B14
B15
B16
B17
B18
B19
B20
B21
B22
B23
B24
B25
B26
B27
B28
B29
B30
B31
B32
B33
B34
B35
B36
B37
B38
B39
B40
B41
B42
B43
B44
B45
B46
B47
B48
B49
B52
B53
B54
B55
B56
B57
B58
B59
B60
B61
B62
B1
B2
B3
B4
B5
B6
B7
B8
B9
PCI1
-12V
TCK
GND
TDO
+5V
+5V
INTB#
INTD#
PRSNT1#
RSVD2
PRSNT2#
GND
GND
RSVD5
GND
CLK
GND
REQ#
+5V
AD31
AD29
GND
AD27
AD25
+3.3V
C/BE3#
AD23
GND
AD21
AD19
+3.3V
AD17
C/BE2#
GND
IRDY#
+3.3V
DEVSEL#
GND
LOCK#
PERR#
+3.3V
SERR#
+3.3V
C/BE1#
AD14
GND
AD12
AD10
GND
AD8
AD7
+3.3V
AD5
AD3
GND
AD1
+5V
ACK64#
+5V
+5V
TRST#
+12V
TMS
INTA#
INTC#
RSVD1
RSVD3
GND
GND
RSVD4
RST#
GNT#
GND
RSVD6
AD30
+3.3V
AD28
AD26
GND
AD24
IDSEL#
+3.3V
AD22
AD20
GND
AD18
AD16
+3.3V
FRAME#
GND
TRDY#
GND
STOP#
+3.3V
SDONE
SBO#
GND
PAR
AD15
+3.3V
AD13
AD11
GND
AD9
C/BE0#
+3.3V
AD6
AD4
GND
AD2
AD0
REQ64#
+5V
+5V
+5V
+5V
+5V
+5V
+5V
A1
A2
A3
A4
TDI
A5
A6
A7
A8
A9
A10
A11
A12
A13
A14
A15
A16
A17
A18
A19
A20
A21
A22
A23
A24
A25
A26
A27
A28
A29
A30
A31
A32
A33
A34
A35
A36
A37
A38
A39
A40
A41
A42
A43
A44
A45
A46
A47
A48
A49
A52
A53
A54
A55
A56
A57
A58
A59
A60
A61
A62
+12V
-12V
PCICLK5 12
PIRQ#A
PIRQ#A 7,9,16
PIRQ#C 9
3VDUAL
PCISLOTRST#
PGNT#0
PCI_PME#
AD28
AD24
AD22
AD18
FRAME#
TRDY#
STOP#
SBO#
PAR
AD13
AD9
AD6
AD2
REQ64# ACK64# PGNT#4 PREQ#4
PCISLOTRST# 26
PGNT#0 9
FRAME# 9,18
TRDY# 9,18
STOP# 9,18
PAR 9,18
PCICLK4 12
AD19 AD20
PCICLK5
PIRQ#F
PIRQ#F 9
PIRQ#C
PIRQ#A
PREQ#3
PREQ#3 9
PCICLK2
PREQ#1
PREQ#1 9
AD31
AD29
AD27
AD25
C_BE#3
AD23
AD21
AD19
AD17
C_BE#2
IRDY#
DEVSEL#
PLOCK#
PERR#
SERR#
C_BE#1
AD14
AD12
AD10
AD8
AD7
AD5
AD3
AD1
PGNT#4 9 PREQ#4 9
IDSEL#=AD20,22,23
INT#=B,C,D,A
INT#=E,F,G,H
VCC3
INT#=F,G,H,E
Medion 3rd Master
PCI2
B10
B11
B12
B13
B14
B15
B16
B17
B18
B19
B20
B21
B22
B23
B24
B25
B26
B27
B28
B29
B30
B31
B32
B33
B34
B35
B36
B37
B38
B39
B40
B41
B42
B43
B44
B45
B46
B47
B48
B49
B52
B53
B54
B55
B56
B57
B58
B59
B60
B61
B62
B1
B2
B3
B4
B5
B6
B7
B8
B9
-12V
TCK
GND
TDO
+5V
+5V
INTB#
INTD#
PRSNT1#
RSVD2
PRSNT2#
GND
GND
RSVD5
GND
CLK
GND
REQ#
+5V
AD31
AD29
GND
AD27
AD25
+3.3V
C/BE3#
AD23
GND
AD21
AD19
+3.3V
AD17
C/BE2#
GND
IRDY#
+3.3V
DEVSEL#
GND
LOCK#
PERR#
+3.3V
SERR#
+3.3V
C/BE1#
AD14
GND
AD12
AD10
GND
AD8
AD7
+3.3V
AD5
AD3
GND
AD1
+5V
ACK64#
+5V
+5V
TRST#
+12V
TMS
+5V
INTA#
INTC#
+5V
RSVD1
+5V
RSVD3
GND
GND
RSVD4
RST#
+5V
GNT#
GND
RSVD6
AD30
+3.3V
AD28
AD26
GND
AD24
IDSEL#
+3.3V
AD22
AD20
GND
AD18
AD16
+3.3V
FRAME#
GND
TRDY#
GND
STOP#
+3.3V
SDONE
SBO#
GND
PAR
AD15
+3.3V
AD13
AD11
GND
AD9
C/BE0#
+3.3V
AD6
AD4
GND
AD2
AD0
+5V
REQ64#
+5V
+5V
A1
A2
A3
A4
TDI
A5
A6
A7
A8
A9
A10
A11
A12
A13
A14
PCISLOTRST#
A15
A16
PGNT#1
A17
A18
A19
A20
A21
A22
A23
A24
A25
A26
A27
A28
A29
A30
A31
A32
A33
A34
A35
A36
A37
A38
A39
R254 100R
A40
R253 100R
A41
A42
A43
A44
A45
A46
A47
A48
A49
A52
A53
A54
A55
A56
A57
A58
A59
A60
A61
A62
+12V
PIRQ#B
PIRQ#D
PIRQ#E
PGNT#3
PCI_PME#
AD30
AD28
AD26
AD24
R248 100R R204 100R
AD22
AD20
AD18
AD16
FRAME#
TRDY#
STOP#
PAR
AD15
AD13
AD11
AD9
C_BE#0
AD6
AD4
AD2
AD0
PIRQ#E 9
PGNT#3 9
3VDUAL
PGNT#1 9
AD22
AD23
VCC3 VCC3
IDSEL#=AD21
INT#=C,D,A,B
VCC VCC
-12V
PIRQ#D PIRQ#A
PIRQ#D 9
PIRQ#B
PIRQ#B 9,16
PCICLK3 12
DEVSEL# 9,18
PCICLK3
PREQ#2
PREQ#2 9
IRDY# 9,18
PERR# 9,18
SERR# 9
AD31 AD30
AD29
AD27 AD26
AD25
C_BE#3
AD23
AD21 AD20
AD19
AD17 AD16
C_BE#2
IRDY#
DEVSEL#
PLOCK#
PERR#
SERR#
C_BE#1 AD15
AD14
AD12 AD11
AD10
AD8 C_BE#0
AD7
AD5 AD4
AD3
AD1 AD0
B10
B11
B12
B13
B14
B15
B16
B17
B18
B19
B20
B21
B22
B23
B24
B25
B26
B27
B28
B29
B30
B31
B32
B33
B34
B35
B36
B37
B38
B39
B40
B41
B42
B43
B44
B45
B46
B47
B48
B49
B52
B53
B54
B55
B56
B57
B58
B59
B60
B61
B62
B1
B2
B3
B4
B5
B6
B7
B8
B9
PCI3
-12V
TCK
GND
TDO
+5V
+5V
INTB#
INTD#
PRSNT1#
RSVD2
PRSNT2#
GND
GND
RSVD5
GND
CLK
GND
REQ#
+5V
AD31
AD29
GND
AD27
AD25
+3.3V
C/BE3#
AD23
GND
AD21
AD19
+3.3V
AD17
C/BE2#
GND
IRDY#
+3.3V
DEVSEL#
GND
LOCK#
PERR#
+3.3V
SERR#
+3.3V
C/BE1#
AD14
GND
AD12
AD10
GND
AD8
AD7
+3.3V
AD5
AD3
GND
AD1
+5V
ACK64#
+5V
+5V
TRST#
+12V
TMS
+5V
INTA#
INTC#
+5V
RSVD1
+5V
RSVD3
GND
GND
RSVD4
RST#
+5V
GNT#
GND
RSVD6
AD30
+3.3V
AD28
AD26
GND
AD24
IDSEL#
+3.3V
AD22
AD20
GND
AD18
AD16
+3.3V
FRAME#
GND
TRDY#
GND
STOP#
+3.3V
SDONE
SBO#
GND
PAR
AD15
+3.3V
AD13
AD11
GND
AD9
C/BE0#
+3.3V
AD6
AD4
GND
AD2
AD0
+5V
REQ64#
+5V
+5V
A1
A2
A3
A4
TDI
A5
A6
A7
A8
A9
A10
A11
A12
A13
A14
A15
A16
A17
A18
A19
A20
A21
A22
A23
A24
A25
A26
A27
A28
A29
A30
A31
A32
A33
A34
A35
A36
A37
A38
A39
A40
A41
A42
A43
A44
A45
A46
A47
A48
A49
A52
A53
A54
A55
A56
A57
A58
A59
A60
A61
A62
+12V
PIRQ#C
3VDUAL
PCISLOTRST#
PGNT#2
PCI_PME#
AD28
AD24
AD22
AD18
FRAME#
TRDY#
STOP#
SDONE
SBO#
PAR
AD13
AD9
AD6
AD2
REQ64# ACK64#
PIRQ#C 9
PIRQ#A 7,9,16
PGNT#2 9
PCI_PME# 10,16,18
AD30 9,18 AD31 9,18
AD28 9,18
AD26 9,18 AD27 9,18
AD24 9,18
R276
100R
AD22 9,18
AD20 9,18 AD21 9,18
AD18 9,18
AD16 9,18 AD17 9,18
FRAME# 9,18
TRDY# 9,18
STOP# 9,18
PAR 9,18
AD15 9,18
AD13 9,18
AD11 9,18 AD12 9,18
AD9 9,18
C_BE#0 9,18
AD6 9,18
AD4 9,18 AD5 9,18
AD2 9,18
AD0 9,18 AD1 9,18
AD21
SLOT-PCI
N11-1200031-A10
PCISLOT-Green
N11-1200221-K06
SLOT-PCI
N11-1200031-A10
2nd Master(A9,A11,B10,B14,A40)
3rd Master(B2,B4,B60,A41,A60)
VCC
PLOCK#
R264 2.7K
D D
ACK64#
7 8
REQ64#
5 6
SDONE
3 4
SBO#
1 2
RN74
4.7K-8P4R
1
3VDUAL
C237
X_C0.1U25Y
2
VCC3
X_C0.1U25Y
C317
C369
X_C0.1U25Y
C339
X_C0.1U25Y
3VDUAL
C368
X_C0.1U25Y
Title
PCI 1 & 2 & 3
Size Document Number Rev
A3
3
4
Date: Sheet
MICRO-START INT'L CO.,LTD .
MS-7172 0A
17 34 Friday, March 04, 2005
5
of
1
IEEE-1394
NEAR EACH POWER PIN
A A
B B
C C
D D
BUS_PWR
C223
0.1uF
TPBIAS1
R216
R217
54.9R/1%
54.9R/1%
R202
4.99K/1%
C315
270pF
Place close to pin 97
(Less then 500 mils)
TPBIAS2
R209
R212
54.9R/1%
54.9R/1%
R203
4.99K/1%
C321
270pF
Place close to pin 111
(Less then 500 mils)
BUS_PWR
R214
54.9R/1%
R218
54.9R/1%
R211
54.9R/1%
R210
54.9R/1%
1
C215
X_1000pF
C314
0.33uF
TPA1+
TPA1TPB1+
TPB1-
(T/S/S=7/10/10)
C316
(T/S/S=7/10/10)
0.33uF
TPA2+
TPA2-
TPB2+
TPB2-
C311
X_104P
+12V
VCC3
C361
0.1uF
8
7
6
5
X_90ohm_0603
MBRS340
TPA1+
TPA1TPB1+
TPB1-
TPA2+
TPB2+
1394_VCC2
L8
1
2
3
4
CLOSE TO CONNECTOR
D7
A C
2
P3VD VCC3 P3VA VCC3
S2 X_COPPER
C255
0.1uF
FB23
X_120/8
1 2
C328
X_104P
S1 X_COPPER
C362
0.1uF
FRONT 1394 PORT 1
FS3
1.5A_miniSMDM150/24
BUS_PWR 1394_VCC2
JFW1
1 2
TPA+ TPA-
3 4
GND GND
5 6
TPB+ TPB-
7 8
POWER POWER
9 10
KEY GND
C221
MEDION-FW-IF
X_0.1uF
EMI SUGGESTION 3/15
FS2
BUS_PWR
0.1uF CB2
L5
8
7
6
5
X_90ohm_0603
CLOSE TO CONNECTOR
2
1.5A_miniSMDM150/24
1
2
3
4
1394_VCC2
I1394_USB1B
9
PWR
14
TPA+
13
TPA-
12
TPB+
11
TPB-
10
GND
I1394+USB*2
FB21
X_120/8
TPA2TPB2-
1 2
C363
0.1uF
3
C_BE#3 9,17
C_BE#2 9,17
C_BE#1 9,17
C_BE#0 9,17
AD24
DEVSEL# 9,17
PREQ#5 9
PGNT#5 9
PERR# 9,17
PIRQ#G 9
1394CLK 12
PCIDEVRST# 7,24,26
PCI_PME# 10,16,17
1394-EEPROM
24C02
3
FRAME# 9,17
AD31 9,17
AD30 9,17
AD29 9,17
AD28 9,17
AD27 9,17
AD26 9,17
AD25 9,17
AD24 9,17
AD23 9,17
AD22 9,17
AD21 9,17
AD20 9,17
AD19 9,17
AD18 9,17
AD17 9,17
AD16 9,17
AD15 9,17
AD14 9,17
AD13 9,17
AD12 9,17
AD11 9,17
AD10 9,17
AD9 9,17
AD8 9,17
AD7 9,17
AD6 9,17
AD5 9,17
AD4 9,17
AD3 9,17
AD2 9,17
AD1 9,17
AD0 9,17
IRDY# 9,17
TRDY# 9,17
STOP# 9,17
X_2.7K
EEDI
EECK
PAR 9,17
DEVSEL#
PERR#
1394_PCLK
PCIDEVRST#
PCI_PME#
R258
AD31
AD30
AD29
AD28
AD27
AD26
AD25
AD24
AD23
AD22
AD21
AD20
AD19
AD18
AD17
AD16
AD15
AD14
AD13
AD12
AD11
AD10
AD9
AD8
AD7
AD6
AD5
AD4
AD3
AD2
AD1
AD0
C_BE#3
C_BE#2
C_BE#1
C_BE#0
PAR
FRAME#
IRDY#
TRDY#
STOP#
R219 100R
C326
X_10pF
VCC3
R261
X_2.7K
R263
510R
EC36
470uF/6.3V
97
98
99
100
101
104
105
106
109
110
112
116
117
118
119
120
5
6
7
10
11
12
13
14
17
18
19
21
22
23
27
28
107
122
4
15
3
123
124
126
128
108
127
96
95
2
91
93
92
37
VCC3
AD31
AD30
AD29
AD28
AD27
AD26
AD25
AD24
AD23
AD22
AD21
AD20
AD19
AD18
AD17
AD16
AD15
AD14
AD13
AD12
AD11
AD10
AD9
AD8
AD7
AD6
AD5
AD4
AD3
AD2
AD1
AD0
CBE3#
CBE2#
CBE1#
CBE0#
PAR
FRAME#
IRDY#
TRDY#
STOP#
IDSEL
DEVSEL#
REQ#
GNT#
PERR#
INTA#
PCICLK
PCIRST#
PME#
U17
3
A2
2
A1
1
A0
7
WP
5
SDA
6
SCL
AT24C02/2M/SOIC8
102
94
113
VDD1
VSS1
103
125
VDD2
VSS2
111
GND
VCC
8
VDD3
VSS3
121
20
VDD4
VSS4
1
33
VDD5
VSS5
9
4
8
VDD6
VSS6
16
114
VSS7
26
VCC3
4
VDDC1
VSS8
VSS9 VDDC2
34 35
4
P3VD
24
RAMVDD
GNDATX0
59
64
C348
0.1uF
GNDARX0
GNDATX1
GNDARX1
82
69
68
5
P3VA
P3VD P3VA
39
49
62
PVDD1
PVDD2
VDDATX0
GNDATX2
GNDARX2
RAMVSS
25
83
76
75
65
VDDATX1
VDDARX0
VSSC1
VSSC2
115
36
90
89
XTPBIAS0
VDDATX2
VDDARX2
VDDARX1
XTPBIAS1
XTPBIAS2
D6/CMCJMP
PHYRESET
CTL0/PC0JMP
CTL1/PC1JMP
D7/PC2JMP
LINKON/TSIJMP
LREQ/TSOJMP
LPS/CMC
SCL/EECK
SDA/EEDI
PGND1
PGND2
41
50
XTPA0P
XTPA0M
XTPB0P
XTPB0M
XTPA1P
XTPA1M
XTPB1P
XTPB1M
XTPA2P
XTPA2M
XTPB2P
XTPB2M
XREXT
MODE0
MODE1
EEDO
C322
0.1uF
U15
74
73
72
71
70
81
80
79
78
77
88
87
86
85
84
63
XCPS
66
52
C344 0.1uF
58
54
55
53
57
56
51
D5
48
D4
47
D3
46
D2
45
D1
44
D0
43
42
40
SCLK
38
67
NC
32
31
30
29
EECS
60
XI
61
XO
VT6307-CD/PQFP128
B07-0630704-V01
TPBIAS1
TPA1+
TPA1TPB1+
TPB1-
TPBIAS2
TPA2+
TPA2TPB2+
TPB2-
R233 11K/1%
R221 1K/1%
R215 6.34K/1%
C330 47pF
R255 4.7K
I2C EEPROM ENABLE
EECK
EEDI
R256 X_2.7K
R206
1M
1 2
Y2
24.576MHz/16pF
AD19
PIRQ#D
Title
IEEE1394 VIA VT 6307
Size Document Number Rev
A3
Date: Sheet
MICRO-START INT'L CO.,LTD .
MS-7172 0A
5
C324
0.1uF
BUS_PWR
P3VD
P3VD
C329 12pF
C325 12pF
18 34 Friday, March 04, 2005
C323
X_104P
of
1
A A
2
3
4
5
TXD+
7mil
8mil
7mil
TXDRXIN+
RXIN-
R166
49.9R/1%
R167
49.9R/1%
C266
0.1uF
R164
49.9R/1%
R165
49.9R/1%
FB19 X_L120RD6A3D25
C265
0.1uF
3VDUAL
Near PHY
3VDUAL 3VDUAL
B B
C C
MIIRST 11
RN66
1 2
3 4
5 6
7 8
10K-8P4R
RXIN-
RXIN+
TXD-
TXD+
XLOUT
XLIN
MIIRST
TX/RX_LED
100/10_LED
LAN_LED2
LAN_LED3
3VDUAL
LAN_REXT
R160
6.49K/1%
R173 X_0R
C287
X_C1U10VY5V
25
26
27
28
29
30
31
32
33
34
35
36
U13
VDDRX
RXRX+
FXSD
GNDRX
GNDPLL
REXT
VDDPLL
GNDTXC
TXTX+
VDDTX
24
PD
INT
CRS
LED0
LED1
LED2
LED3
VDD2
GND2
VT6103L
GNDTX
GNDOSCXOXI
VDDOSC
RST
MDIO
MDC
RXD3
3738394041424344454647
C286
X_C1U10VY5V
COL
RXD2
1314151617181920212223
TXD3
RXD1
48
TXD2
TXD1
TXD0
TXEN
TXC
TXER
VDDC
GNDC
RXER
RXC
RXDV
GND1
VDD1
RXD0
VT6103L
R_MIICOL
12
11
10
9
8
7
6
5
4
3
2
1
3VDUAL
EC30 X_CE470U10VD25A400RO
C271 0.1uF
C273 0.1uF
C272 0.1uF
C288 0.1uF
C305 0.1uF
C304 0.1uF
C284 0.1uF
R176 33R
R192 33R
R_MIITXCK
R_MIIRXER
R_MIIRXCK
R_MIIRXDV
R_MIIRXD0
R_MIIRXD1
R_MIIRXD2
R_MIIRXD3
MIICRS R_MIICRS
MIICOL
MIITXD3
MIITXD2
MIITXD1
MIITXD0
MIITXEN
R191 X_10K
RN71
1 2
3 4
5 6
7 8
33R-8P4R
RN67
1 2
3 4
5 6
7 8
33R-8P4R
MIIMDCK
MIIMDIO
MIICRS 11
MIICOL 11
MIITXD3 11
MIITXD2 11
MIITXD1 11
MIITXD0 11
MIITXEN 11
MIIMDCK 11
MIIMDIO 11
MIITXCK 11
MIIRXER 11
MIIRXCK 11
MIIRXDV 11
MIIRXD0 11
MIIRXD1 11
MIIRXD2 11
MIIRXD3 11
3VDUAL
C188
0.1uF/X7R
Strap Options
LED0 / LINK
LED1 / SPD100
LED2 / DUPLEX
LED3 / NWAYEN
TX+
17
18
13
14
15
RX+
16
19
20
Green
LAN_USB1B
AMBER+
17
AMBER-
18
VCC
NC
NC
GND
X1
25MHz/18pF
9
13
10
14
11
15
12
16
19
20
8
7
6
5
RCT
RXINTCT
RXIN+
TXDTXD+
C185
0.1uF/X7R
U18
1
CS
2
SK
3
DI
4
DO
X_AT93C46
C302
18pF
XLIN
XLOUT
SEECS
SEECK
SEEDI
SEEDO
SEECS 11
SEECK 11
SEEDI 11
SEEDO 11
0 1
Enable Disable
Speed10 Speed100
Half Full
Disable Enable
NC
NC
RDN
NC
NC
RDP
TDN
TDP
GREEN+
GREEN-
USBLAN-TR
VCC3
C374
X_C0.1U16VY5V
C303
18pF
Description
Test Mode Enable
Speed Select
Duplex Mode Select
N-Way Enable
9
10
RX-
11
12
TX-
LAN&USB Layout
D D
Title
VIA LAN PHY VT6103L
Size Document Number Rev
A3
1
2
3
4
Date: Sheet
MICRO-START INT'L CO.,LTD .
MS-7172 0A
19 34 Friday, March 04, 2005
5
of
1
2
3
4
5
1
2
4
5
3
6
7
8
9
17
10
11
12
13
14
15
16
18
JACK-EARX3-13P-1
AUDIO2
AZ AUDIO+SPDIF
5
5
N
N
S
S
5A
5A
24
24
21
21
2P
2P
2Q
2Q
5A
5A
14
14
11
11
1P
1P
1Q
1Q
C395
X_C1U16Y0805
R309 X_10R
R312
X_10K
20 34 Friday, March 04, 2005
of
AUDIO1
U20
SMC
VRDA
VRAD
VREF
C391
1uF/0805
C390
1uF/0805
C392
1uF/0805
C386
1uF/0805
C387
1uF/0805
C436 1uF/0805
C435 1uF/0805
C434 1uF/0805
C433 1uF/0805
AVDD5
36
35
34
33
32
31
30
29
28
27
26
25
C384
X_0.01uF
TV_GND
TV_L
AVDD5
R310
8.2K
R311
X_4.7K
C403
0.1uF
JD4
C438 0.1uF
C398 10uF/10V/0805
C383
1uF/0805
C376
1uF/0805
C385
X_0.01uF
1 2
AUDIO CODEC
VCC3
A A
B B
C C
C416
X_104P
AC_SDOUT 10
AC_BITCLK 10
AC_SDIN0 10
AC_SYNC 10
AC_RST# 10
C401
10uF/10V/0805
AC_14 12
REGULATOR
+12V
D D
C396
0.1uF
CODEC VCC3_3 NEED CAP AS
CLOSE AS POSSIBLE.
R293 0R
R298 22R
R295 22R
C410
X_12pF
JL_IN1
YJ104-B
EC39
10uF/16V
1
2
3
4
3 2
1
R269 4.7K
R268 4.7K
U19
YLT1087S-0.8A
VIN VOUT
V OUT
ADJ
1
VCC3
For EMI
DVDD1
XTL_IN
XTL_OUT
DVSS1
SDATA_OUT
BIT_CLK
DVSS2
SDATA_IN
DVDD2
SYNC
RESET#
PC_BEEP
C389
C388
D8
1N5817
4847464544424140394338
NC
ID1#
ID0#
SPDIFO
PHONE
AUXL
AUXR
JS1
1314151617181920212223
5VSB
AVDD5
EC37
10uF/16V
2
LFE_OUT
JS0
C405
0.1uF
1
2
3
4
5
6
7
8
9
10
11
C413
X_22pF
R277
4.7K
4
12
1uF/0805
1uF/0805
R278
4.7K
D10 1N5817
R289
100R/1%
R288
324R/1%
CEN_OUT
CDL
C378
0.1uF
NC
SROUT_R
CD_GND
CDR
CDR
CD_GND
CDL
AVSS2
SROUT_L
MIC1
MIC2
37
MONO
AVDD2
AVSS4/JS2
VREF_OUT
LINL
LINR
24
LOUTR
LOUTL
AFILT2
AFILT1
AVSS1
AVDD1
ALC655
LFE-OUT
CEN-OUT
SROUT_R
SROUT_L
SPDIFO
SPDIFI LINE_OUT_R
C418
1uF/0805
VREFOUT
1 2
AGND
FR_MIC2
LINE_OUT_R
LINE_OUT_L
C440
X_180pF
C397
10uF/10V/0805
R172
22K
246
135
C437
X_180pF
R171
22K
R274
22K
AGND
R313 4.7K
R315 4.7K
R317 4.7K
8
RN90
47K-8P4R
7
3
C404
0.1uF
1 2
3 4
5 6
7
9 10
+
EC43 100uF/16V
+
EC40 100uF/16V
R314
22K
MICIN2
C430 1uF
R270
X_5.6K
AGND
MICIN
VID_R
VID_GND
VID_L
C406
1uF
LINE_IN_R
LINE_IN_L
FR_MIC2
4
3
2
1
FRONT AUDIO
JAUD1
MIC_IN GND
MIC_BIAS VCC
FRONT_R RETURN_R
HP_ON
FRONT_L RETURN_L
MEDION-FAUDIO
LINE_OUT_L
R316
22K
C409
1000pF
JVID1
TV-CARD
N_LINE_OUT_R
N_LINE_OUT_L
C424
X_180pF
MIC2_IN
R279
22K
AGND TV_R
X_YJUMPER-MG
X_YJUMPER-MG
C419
X_180pF
C415
C411
1uF
1000pF
J1
X_JACK-RCA2P_red
Co-Layout with
VGA
JAUD1(5-6)1
JAUD1(9-10)1
VCC
C427
X_104P
4
N_LINE_OUT_R
N_LINE_OUT_L
SROUT_R
SROUT_L
LFE-OUT
CEN-OUT
C313
X_180pF
LINE_IN_R
C306
C300
C425
C312
X_180pF
X_180pF
R305 220R
SPDIFO
VREFOUT
MICIN2
MICIN
VREFOUT
LINE_IN_L
C282
X_180pF
X_180pF
R_SPDIFO
R307 100R
R301 4.7K
mount
R275 4.7K
C283
C245
X_180pF
X_180pF
SPDIF IN
L2
SPDIF_I
2
-
1
-
X_60L600m_300
C132
X_180pF
Title
AC97 Codec ALC655
Size Document Number Rev
A3
Date: Sheet
MS-7172 0A
C420
X_180pF
X_180pF
C421
0.01uF
C428
X_100pF
SPDIF_O
C244
X_180pF
VCC3
R306
X_10K
SPDIF_IN SPDIFI
2 1
CP8 X_COPPER
CP12 X_COPPER
CP17 X_COPPER
X_0.01uF
C140
R_SPDIF_IN
MICRO-START INT'L CO.,LTD .
5
1
VGA CONNECTOR
2
3
4
5
C159
VVSYNC
VHSYNC
CB1
M_0.1uF
CRT_R
CRT_G
CRT_B
C152
M_22pF
VCC
F2
M_F-MICROSMD110
POLY SWITCH
M_0.082U300m
M_0.082U300m
R88
R90
JVGA1
16
6
1
7
2
8
3
9
4
10
5
17
M_CONN-VGA
R_VVSYNC
R_VHSYNC
C143
M_22pF
R86
M_1.8K
11
12
13
14
15
C145
M_22pF
VCC
R76
M_1.8K
DDCCLK 7
VCC
0.1uF C77
A A
AB
AR VHSYNC
B B
D5
3
1
2
4 5
AR 7
AG 7 DDCDATA 7
AB 7
VSYNC 7
HSYNC 7
7
3
7
8
1
8
6
2
6
45
M_Z-PACDND006M_MSOP8
R99
M_75R
R125
M_4.7K
R127
M_22R
R124
M_22R
Use K8T800Pro remove all
components
VVSYNC AG
C169
R93
R96
M_75R
VCC
M_75R
VCC
C175
X_C22P50N
R126
M_4.7K
R_VSYNC
R_HSYNC
X_C22P50N
FB10 M_30L500m_200
FB9 M_30L500m_200
FB8 M_30L500m_200
C165
X_C22P50N
M_22pF
R121
10K
U10
1
2
74NC7SZ08S
U9
1
2
74NC7SZ08S
C168
M_22pF
VCC
5
4 3
5
4 3
Trace Note:
1.The 5V traces should be 20 mils to VGA/DFP
C C
D D
Title
VGA Port
Size Document Number Rev
A3
1
2
3
4
Date: Sheet
MICRO-START INT'L CO.,LTD .
MS-7172 0A
21 34 Friday, March 04, 2005
5
of
1
USB_OC#5 9
USB5VDUAL1
FS4
Fuse2.6A
USB_OC#5
C407
X_C0.1U25Y
FRONT USB PORT
A A
2
USBVCC1
R300
47K
R299
56K
3
REAR USB PORT
USB5VDUAL2
USB_OC#1 9
USB_OC#1
4
FS1
Fuse2.6A
C187
X_C0.1U25Y
R107
47K
R104
56K
5
USBVCC2
USBVCC1
L3
X_CMC_90ohm_0603
L12
USBN4
USBN4 9
USBP4
USBP4 9
USBN5
USBN5 9
USBP5
USBP5 9
B B
USBN6
USBN6 9
USBP6
USBP6 9
USBN7
USBN7 9
USBP7
USBP7 9
C C
1 2
1 2
1 2
1 2
X_CMC_90ohm_0603
4 3
L11
X_CMC_90ohm_0603
4 3
L9
X_CMC_90ohm_0603
4 3
L10
X_CMC_90ohm_0603
4 3
JUSB1
1 2
VCC VCC
3 4
USB0- USB1-
5 6
USB0+ USB1+
7 8
GND GND
9 10
KEY USBOC
MEDION-USB-IF-Y
JUSB2
1 2
VCC VCC
3 4
USB0- USB1-
5 6
USB0+ USB1+
7 8
GND GND
9 10
KEY USBOC
MEDION-USB-IF
USBVCC1
C412
X_C0.1U25Y
C417
X_C0.1U25Y
+
EC41
X_1000uF/6.3V
+
EC42
1000uF/6.3V
USBN2 9
USBP2 9
USBN3 9
USBP3 9
L4
X_CMC_90ohm_0603
USBN1 9
USBP1 9
USBN0 9
USBP0 9
4 3
1 2
4 3
1 2
L6
X_CMC_90ohm_0603
4 3
1 2
L7
X_CMC_90ohm_0603
4 3
1 2
LAN_USB1A
5
6
7
8
UP
1
2
3
4
DOWN
USBLAN-TR
I1394_USB1A
5
6
7
8
UP
1
2
3
4
DOWN
I1394+USB*2
CP15 X_COPPER
CP16 X_COPPER
21
22
23
24
25
26
27
28
USBVCC2
C198
X_C0.1U25Y
USBVCC2
15
16
17
18
19
20
21
22
C208
X_C0.1U25Y
EC22
+
1000uF/6.3V
D D
Title
USB Port
Size Document Number Rev
A3
1
2
3
4
Date: Sheet
MICRO-START INT'L CO.,LTD .
MS-7172 0A
22 34 Friday, March 04, 2005
5
of
1
2
3
4
5
ATA 33/66/100 Connector
PRIMARY IDE CONN.
R162
A A
B B
C C
HDDRST# 26
IDEACTP# 28
HDDRST# 26
IDEACTS# 28
HDDRST#
33R
PDD_7
PDD_6
PDD_5
PDD_4
PDD_3
PDD_2
PDD_1
PDD_0
PDREQ_R
PDIOW#_R
PDIOR#_R
PIORDY_R
PDDACK#_R
IRQ14_R
PDA1_R
PDA0_R PDA2_R
PDCS#1_R
IDEACTP#
IDE1
12
34
56
78
91 0
11 12
13 14
15 16
17 18
19 20
21 22
23 24
25 26
27 28
29 30
31 32
33 34
35 36
37 38
39 40
IDE-Blue
ATADET0
PDCS#3_R
SECONDARY IDE CONN.
R163
HDDRST#
33R
SDD_7
SDD_6
SDD_5
SDD_4 SDD_11
SDD_3 SDD_12
SDD_2
SDD_1 SDD_14
SDD_0 SDD_15
SDREQ_R
SDIOW#_R
SDIOR#_R
SIORDY_R
SDDACK#_R
IRQ15_R
SDA1_R
SDA0_R
SDCS#1_R
IDEACTS#
IDE2
12
34
56
78
91 0
11 12
13 14
15 16
17 18
19 20
21 22
23 24
25 26
27 28
29 30
31 32
33 34
35 36
37 38
39 40
IDE-White
N32-2201071-H06
ATADET1
SDA2_R
SDCS#3_R
PDD_8
PDD_9
PDD_10
PDD_11
PDD_12
PDD_13
PDD_14
PDD_15
SDD_8
SDD_9
SDD_10
SDD_13
R120
470R
R122
470R
ATADET0 10
ATADET1 10
Near SB < 1" ( or Damping Rs)
VCC
IDEACTP#
IDEACTS#
IRQ14_R
IRQ15_R
PIORDY_R
SIORDY_R
PDREQ_R
SDREQ_R
PDD7
SDD7
R290 10K
R291 10K
R194 10K
R227 10K
R195 4.7K
R228 4.7K
R231 5.6K
R229 5.6K
R240 10K
R252 10K
VCC3
FAN CONTROL
CPU FAN
SATA connector
SATA1
8
STXP_1 10
STXN_1 10
D D
SRXN_1 10
SRXP_1 10
STXP_1
STXN_1
SRXN_1
SRXP_1
1
1
2
3
4
5
6
7
9
CONN-SATA_white
STXP_2 10
STXN_2 10
SRXN_2 10
SRXP_2 10
STXP_2
STXN_2
SRXN_2
SRXP_2
SATA2
8
1
2
3
4
5
6
7
9
CONN-SATA_white
2
CPU-FANPWM 24
+12V
0.1uF
CPU-FANPWM
C26
C34
0.1uF
C44
0.1uF
3
NEAR S.B SIDE
SDA0
SDA2
SDCS#1
SIORDY
SDDACK#
IRQ15
SDA1
SDD15
SDD0
SDD14
SDD13
SDD9
SDD6
SDD8
SDD7
SDD11
SDD4
SDD10
SDD5
SDIOR#
SDIOW#
SDREQ
SDD1
SDD2
SDD12
SDD3
FAN1_DRV
FAN1_SEN
FAN2_DRV
FAN2_SEN
FAN3_DRV
FAN3_SEN
FAN3_IN
W83391TS
14
13
12
11
10
9
8
1
2
3
4
5
6
7
SDCS#1 10
SDCS#3 10
SIORDY 10
SDDACK# 10
SDD15 10
SDD0 10
SDD14 10
SDD13 10
SDD9 10
SDD6 10
SDD8 10
SDD7 10
SDD11 10
SDD4 10
SDD10 10
SDD5 10
SDIOR# 10
SDIOW# 10
SDREQ 10
SDD1 10
SDD2 10
SDD12 10
SDD3 10
U3
FAN1_IN
FAN2_IN
VCC12
C1
C2
CHRPMP
GND
SDA0 10
SDA2 10
IRQ15 10
SDA1 10
RN77
22R0402-8P4R
RN80
22R0402-8P4R
RN82
22R0402-8P4R
RN85
22R0402-8P4R
RN84
22R0402-8P4R
RN78
22R0402-8P4R
RN83
22R0402-8P4R
1
C209
X_C0.1U25Y
R24
6.49K/1%
1 2
3 4
5 6
7 8
1 2
3 4
5 6
7 8
7 8
5 6
3 4
1 2
7 8
5 6
3 4
1 2
7 8
5 6
3 4
1 2
7 8
5 6
3 4
1 2
7 8
5 6
3 4
1 2
2 3
4
R17
10K
4
SDA0_R
SDA2_R
SDCS#1_R
SDCS#3_R SDCS#3
SIORDY_R
SDDACK#_R
IRQ15_R
SDA1_R
SDD_15
SDD_0
SDD_14
SDD_13
SDD_9
SDD_6
SDD_8
SDD_7
SDD_11
SDD_4
SDD_10
SDD_5
SDIOR#_R
SDIOW#_R
SDREQ_R
SDD_1
SDD_2
SDD_12
SDD_3
Q16
APM2054N
EC21
100uF/25V
IRQ14 10
PDDACK# 10
PIORDY 10
PDIOR# 10
PDIOW# 10
PDREQ 10
PDD0 10
PDD15 10
PDCS#1 10
PDCS#3 10
PDD14 10
PDD1 10
PDD13 10
PDD2 10
PDD10 10
PDD5 10
PDD9 10
PDD6 10
PDD12 10
PDD3 10
PDD11 10
PDD4 10
PDA2 10
PDA0 10
PDA1 10
PDD7 10
PDD8 10
+12V
D6 X_1N4148
R117 4.7K R116 27K
C207
0.1uF
R118
X_0R0805
Title
Size Document Number Rev
A3
Date: Sheet
IRQ14
PDDACK#
PIORDY
PDIOR#
PDIOW#
PDREQ
PDD0
PDD15
PDD14
PDD1
PDD13
PDD2
PDD10
PDD5
PDD9
PDD6
PDD12
PDD3
PDD11
PDD4
PDA2
PDA0
PDA1
ATA 66/100 & SATA & CPU Fan
MS-7172 0A
RN73 22R0402-8P4R
7 8
5 6
3 4
1 2
RN79 22R0402-8P4R
7 8
5 6
3 4
1 2
R200 22R/0402
PDCS#1
R199 22R/0402
PDCS#3 PDCS#3_R
RN75 22R0402-8P4R
7 8
5 6
3 4
1 2
RN81 22R0402-8P4R
7 8
5 6
3 4
1 2
RN76 22R0402-8P4R
7 8
5 6
3 4
1 2
RN72
7 8
5 6
3 4
1 2
22R0402-8P4R
R237 22R/0402
PDD7
R234 22R/0402
PDD8
CPU-FAN
R115
10K
CPUFAN1
3
2
1
YJ103-BO
MICRO-START INT'L CO.,LTD .
5
IRQ14_R
PDDACK#_R
PIORDY_R
PDIOR#_R
PDIOW#_R
PDREQ_R
PDD_0
PDD_15
PDCS#1_R
PDD_14
PDD_1
PDD_13
PDD_2
PDD_10
PDD_5
PDD_9
PDD_6
PDD_12
PDD_3
PDD_11
PDD_4
PDA2_R
PDA0_R
PDA1_R
PDD_7
PDD_8
CPU-FAN 24
23 34 Friday, March 04, 2005
of
1
2
3
4
5
Super I/O
A A
B B
C C
D D
LPC_REQ# 11
THERMDC_CPU 4
Distribute near the VCC
power pin of the LPC
VCC
THERMDA_CPU 4
C8
0.1uF
C3
X_C0.1U25Y
VCC3
R26
4.7K
CPU-FANPWM 23
5VSB
C351
X_C0.1U25Y
CPU-FAN 23
THRMS# 10
C11
X_C0.1U25Y
1
PCIDEVRST# 7,18,26
LPC_FRAME# 11
VCC
R51 X_30K/1%
C72
3300pF
VCC3
VBAT
VBAT
C53
X_C0.1U25Y
SIOPCLK 12
SERIRQ 10
LPC_AD0 11
LPC_AD1 11
LPC_AD2 11
LPC_AD3 11
VCORE
R10
2M
SUSB# 10,16,26
SIO48M 12
VCC
R56 X_10K
VREF
THERMDA_CPU
CPU_TMP
VTIN1
-12VIN
+12VIN
CPU-FANPWM
CPU-FAN
CHASISS
R11 1K
VCC3
C29
0.1uF
Power-on strap, enable 48MHz
VCC
U4
30
LRESET#
21
LCLK
23
SERIRQ
22
LDRQ#
29
LFRAME#
27
LAD0
26
LAD1
25
LAD2
24
LAD3
125
GPX2/GP13
123
GPY1/GP15
128
GPSA1/GP10
121
GPSA2/GP17
126
GPX1/GP12
124
GPY2/GP14
127
GPSB1/GP11
122
GPSB2/GP16
120
MSO/IRQIN0/GP20
119
MSI/GP21
101
VREF
102
VTIN
103
CPUTIN
104
SYSTIN
93
GP26
94
GP25
95
GP24
96
GP23
97
VIN3
98
VIN2
99
VIN1
100
CPU_VCORE
106
GP54
107
GP53
108
GP52
109
GP51
110
GP50
116
FANPWM1
113
FANIN1
115
FANPWM2
112
FANIN2
111
OVT#
105
GP55
118
GP22
76
CASEOPEN#
19
PME#
89
WDTO/GP33
91
GP31
92
GP30
67
PSOUT#/GP47
68
PSIN/GP46
64
SUSLED/GP37
90
PLED/GP32
72
PWRCTL#/GP42
73
SLP_SX#/GP41
18
CLKIN
61
VSB
74
VBAT
28
VCC3
12
VCC_1
48
VCC_2
77
GP36
114
VCC_4
W83627THF
VTIN_VCC
R13
X_4.7K
C79 0.1uF R57 0R
SIO
SOUTB
2
DRVDEN0
SMI#/IRQIN1
INDEX#
MOA#
FANIN3
DSA#
FANOUT3
DIR#
STEP#
WRDATA#
WE#
TRACK0#
WP#
RDDATA#
HEAD#
DSKCHG#
PD0
PD1
PD2
PD3
PD4
PD5
PD6
PD7
SLCT
BUSY
ACK#
SLIN#
INIT#
ERR#
AFD#
STB#
IRRX/GP34
GP45
IRTX
GP40
DCDA#
DSRA#
SINA
RTSA#
SOUTA
CTSA#
DTRA#
RIA#
DCDB#
DSRB#
SINB
RTSB#
SOUTB
CTSB#
DTRB#
RIB#
GA20M
KBRST
KBDATA
KBCLK
MSDATA
MSCLK
BEEP
RSMRST#/GP44
PWROK/GP43
VSS1
VSS2
GP35
VSS4(AGND)
1
2
3
4
5
6
7
8
9
10
11
13
14
15
16
17
42
41
40
39
38
37
36
35
31
32
PE
33
34
43
44
45
46
47
88
69
87
75
56
50
53
51
54
49
52
57
84
79
82
80
83
78
81
85
59
60
63
62
66
65
58
70
71
20
55
86
117
SOUTA L: Disable KBC
SOUTB
DTRA#
RTSA#
DTRA#
SOUTA
DRVDEN0
INDEX#
MOA#
DSA#
DIR#
STEP#
WRDATA#
WE#
TRACK0#
WP#
RDDATA#
HEAD#
DSKCHG#
PD0
PD1
PD2
PD3
PD4
PD5
PD6
PD7
GP40
RTSA#
SOUTA
DTRA#
DCDB#
DSRB#
SOUTB
CTSB#
RIB#
BIOS_WP#
VCC
BEEP
THERMDC_CPU
CP2
X_COPPER
L: 24MHZ
L: CFAD=2E
L: PNP Default
RN1 4.7K-8P4R
7 8
5 6
3 4
1 2
FLOPPY DISK HEADER
FDD1
PD0 25
PD1 25
PD2 25
PD3 25
PD4 25
PD5 25
PD6 25
PD7 25
RSLCT 25
RPE 25
RBUSY 25
RACK# 25
RSLIN# 25
RINIT# 25
RERR# 25
RAFD# 25
RSTB# 25
DCDA# 25
DSRA# 25
SINA 25
RTSA# 25
SOUTA 25
CTSA# 25
DTRA# 25
RIA# 25
CTSB#
DSRB#
DCDB#
RIB#
TRACK0#
WP#
RDDATA#
DSKCHG#
INDEX#
H: Enable KBC
H: 48MHZ
H: CFAD=4E RTSA#
H: PNP no Default
CONN-FDD(4)(5)(6)V
7 8
5 6
3 4
1 2
RN3 X_8P4R-4.7KR
RN6 X_8P4R-1K
7 8
5 6
3 4
1 2
1 2
R50 X_1K
GP40
3
1 2
3 4
5 6
7 8
9 10
11 12
13 14
15 16
17 18
19 20
21 22
23 24
25 26
27 28
29 30
31 32
33 34
VCC
VREF
VCC
VCC3
VCC
R4
10K
BEEP
SYSTEM ROM
VCC3
EC13
470uF/6.3V
R59 10K
default is high
PRES4
PRES3
PRES2
PRES1
If you place the jumper very closed to FWH bios socket,
please use the same clock with FWH. But if you c an n ot
place it so close, please use another clock to support it.
C107
X_C0.1U25Y
RN27 1K-8P4R
PCIDEVRST#
PRES3
PRES2
PRES1
PRES0
BIOS_WP#
TBL#
LPC_ID0
LPC_AD0
LPC_AD1
LPC_AD2
R60 10R
1 2
3 4
5 6
7 8
U5
1
VPP
2
RST#
3
FGPI3
4
FGPI2
5
FGPI1
6
FGPI0
7
WP#
8
TBL#
9
ID3
10
ID2
11
ID1
12
ID0
13
FWH0
14
FWH1
15
FWH2
16 17
GND FWH3
PLCC-32
{Priority}
VCC3 VCC3
PCLK_LPC_HDR LPC_PCLK
PCIDEVRST#
LPC_AD0
LPC_AD1
LPC_AD2
LPC_AD3
LPC_FRAME#
Hardware Monitor
Near SIO
SYSTEM Thermal
R55
10K/1%
C50
0.1uF
ALARM 28
Q1
MMBT3904
R53
30K/1%
RT1
10KRT/1%
SMD
VTIN1
THERMDA_CPU
R54
10K/1%
RT2
X_10K/1%
THERMDC_CPU
Near CPU
4
VREF
CPU_TMP
THERMDC_CPU
Title
LPC W83627THF & ROM & Floppy
Size Document Number Rev
A3
Date: Sheet
VCC
CLK
FGPI4
IC(VIL)
GNDA
VCCA
GND
VCC
INIT#
FWH4
RFU
RFU
RFU
RFU
RFU
PRES0
BIOS_WP#
TBL#
LPC_INIT#
JLPC1
1
3
5
7
9
11
13
JLPC1
Voltage Detect
R44 28K/1%
+12V
R28 X_232K
-12V
MICRO-START INT'L CO.,LTD .
MS-7172 0A
VCC3
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
RN28 1K-8P4R
VCC3 VCC
2
4
6
8
12
14
1 2
1 2
10K/1%
THERMDC_CPU
C84 X_C0.1U25Y
LPC_PCLK
PRES4
C83 0.1uF
LPC_INIT#
LPC_FRAME#
LPC_AD3
1 2
3 4
5 6
7 8
LPC_ID0
1 2
R47
24 34 Friday, March 04, 2005
5
LPC_PCLK 12
+12VIN
-12VIN
1 2
R36
X_56K/1%
VREF
of
1
2
3
4
5
Keyboard/Mouse Ports
F1
1.1A-MICROSMD110
USBVCC2
A A
B B
1 2
MSDAT#
KBDAT#
MSCLK#
KBCLK#
PGND
KBDAT# 9
KBCLK# 9
MSCLK# 9
MSDAT# 9
RN2
1 2
3 4
5 6
7 8
4.7K-8P4R
C2
X_C0.1U25Y
USBVCC2
C9
0.1uF
PGND
X_120-600mA
FB5
X_120-600mA
R7
X_330R
FB3
XKBCLK1
FB4
X_120-600mA
FB2
X_120-600mA
STACKED PS2 CONNECTOR
JKBMS1
14
4
6
2
XKBDAT1
13
1
5
3
15 17
PGND PGND
CONN-KB_MS
N56-12F0031-F02
XKBCLK1
XMSCLK1
XKBDAT1
XMSDAT1
XMSCLK1
XMSDAT1
CN1
1 2
3 4
5 6
7 8
180pF-8P4C
16
10
12
8
7
11
9
COM PORTS
C340
0.1uF
+12V
C13
X_C0.1U25Y
1
2
3
4
5
PGND
LPT1
11 10
D3
1N4148S
COM1
CONN-COM
N51-09M0021-F02
-12V
NDCDA#
NSINA
NSOUTA NCTSA#
NDTRA
1N4148S
6
7
8
9
D1
RTSA# 24
DTRA# 24
SOUTA 24
CTSA# 24
DSRA# 24
DCDA# 24
RIA# 24
SINA 24
-12VCOM
NDSRA#
NRTSA
NRIA#
+12VCOM
RTSA#
DTRA#
SOUTA
RIA#
CTSA#
DSRA#
SINA
DCDA#
U1
1
VDD(12V)
16
DA1
15
DA2
13
DA3
19
RA1
18
RA2
17
RA3
14
RA4
12
RA5
10
VSS(-12V)
GD75232S
I95-7523212-T07
VCC(5V)
DY1
DY2
DY3
RY1
RY2
RY3
RY4
RY5
GND
Multiple RS232 Drivers and Receivers
20
5
6
8
2
3
4
7
9
11
NRTSA
NDSRA#
NCTSA#
NRIA#
NDCDA#
NSOUTA
NSINA
NDTRA
RESVD
C12 0.1uF
VCC
NRTSA
NDTRA
NSOUTA
NRIA#
NCTSA#
NDSRA#
NSINA
NDCDA#
CN2
1 2
3 4
5 6
7 8
180pF-8P4C
CN3
1 2
3 4
5 6
7 8
180pF-8P4C
L1 X_80S/1206
1 2
PGND
PGND
PGND
51
CP1 X_COPPER
PGND
RSLCT
RPE
RBUSY
RACK#
PD7
PD6
PD5
PD4
PD3
RSLIN#_
PD2
RINIT#
PD1
RERR#
PD0
RAFD#
RSTB#
PGND
For EMI
FB1
RSLIN# RSLIN#_
0R
Title
K/B,M/S,LPT,COM
Size Document Number Rev
A3
4
Date: Sheet
MICRO-START INT'L CO.,LTD .
MS-7172 0A
5
RSLIN# 24
CP13 X_COPPER
CP14 X_COPPER
25 34 Friday, March 04, 2005
of
PGND
C C
LPT PORTS
RSLIN#_
RACK# 24
RBUSY 24
RPE 24
RSLCT 24
RAFD# 24
RINIT# 24
RERR# 24
RSTB# 24
PD0 24
D D
PD1 24
PD2 24
PD3 24
PD4 24
PD5 24
PD6 24
PD7 24
RACK#
RBUSY
RPE
RSLCT
RAFD#
RINIT#
RERR#
RSTB#
PD0
PD1
PD2
PD3
PD4
PD5
PD6
PD7
R69 4.7K
7 8
5 6
3 4
1 2
7 8
5 6
3 4
1 2
7 8
5 6
3 4
1 2
7 8
5 6
3 4
1 2
RN13
4.7K-8P4R
RN26
4.7K-8P4R
RN23
4.7K-8P4R
RN18
4.7K-8P4R
1N4148S
VCC
D4
For EMI
RACK#
RBUSY
RPE
RSLCT
RAFD#
RINIT#
RERR#
RSLIN#_
PD0
PD1
PD2
PD3
PD4
PD5
PD6
PD7
RSTB#
CN4
1 2
3 4
5 6
7 8
180pF-8P4C
CN7
1 2
3 4
5 6
7 8
180pF-8P4C
CN6
1 2
3 4
5 6
7 8
180pF-8P4C
CN5
1 2
3 4
5 6
7 8
180pF-8P4C
C122 180pF
48
CONN-LPT
N51-25F0041-F02
13
25
12
24
11
23
10
22
9
21
8
20
7
19
6
18
5
17
4
16
3
15
2
14
1
52
PGND
1
2
3
1
LINEAR MODE
PLED1 28
SUSLED 28
C127
33pF
R80
4.7K
G
C134
0.1uF/X7R
PCIDEVRST# PCISLOTRST#
MMBT3904
MMBT3904
FP_RST# 28
PCIRST# 9,16
HDDRST# 23
PCIDEVRST# 7,18,24
PG_VCORE 27
VCORE_EN 27
5VSB
5VSB
CLOSE TO CHIP
R82
10K
C150
0.1uF
D S
Q10
2N7002
VTT_DDR_SUS
1 2
+
EC17
1000uF/6.3V
VDDA_25
A A
VDIMM LINEAR OR PWM SELECT
VDIMM MODE
LINEAR REGULATOR
PWM REGULATOR
B B
FRONT PANEL RESET BUTTON
PCIRST# INPUT
EXTRAM
PULL LOW
PULL HIGH
C128
22pF
PCIRST# BUFFER OUTPUT
PCI SOLT PCIRST# BUFFER OUTPUT
C C
CONNECT TO SOUTH BRIDGE SUSB# SIGNAL
SUSB# 10,16,24
THE TWO BLOCK CHOICE ONE
SUPPORT SYSTEM POWER
CONTROL
VDD_25_SUS
DDR TERMINATION
3VDUAL
U7
D D
7
6
5
W83310DS_SOIC8
C123
0.1uF
ENABLE
VCNTL
BOOT_SEL
1
C114
X_C0.1U25Y
VIN VREF2
GND
VREF1
VOUT
GND
9
1 8
2
3
4
PS_OUT# 4,28
R67 1K/1%
+
PCISLOTRST# 17
R77
4.7K
R64 1K/1%
EC8
1000uF/6.3V
2
5VSB
Q28
5VSB
R70
330R
Q8
VCC
R74
330R
R72 33R
VCC3
EC20
X_100uF/16V
DDR AND DDR II VOLT SELECT
C117
0.1uF
2
R267
330R
R85
4.7K
R75
4.7K
VCC3
R73
220R/0805
VCC
1 2
C135
C137
+
4.7uF/10V/0805
0.1uF
R92 4.7K
DDRTYPE
PULL LOW
PULL HIGH
5VSB
5VSB
5VSB
C136
0.1uF
R78
X_1K
R81
10K
R71
X_1K
R79
10K
10
11
12
X_C10U10Y1206
VDIMM
2.5V
1.8V
3VDLDEC#
EXTRAM
1
FP_RST#
2
PCIRST#
3
HDD_RST#
4
DEV_RST#
5
VDD_GD
6
VDD_EN
7
1.25VREF
8
VCC5
9
SLOT_RST#
VCC3
2.5VDDA
AGND0
C154 0.22uF/10V/X7R
C153
VCC2_5 3VDUAL 3VDUAL
R89
R109
330R
680R
48
S3#
S5#
RSMRST#
I2C_DATA
DDRTYPE
VDIMM_LSEN
C220
VDIMM_LDRV
VDIMM_HSEN
EC24
1uF/0805
5VSB
PWR_OK
1.2VLDT_DRV
1.2VLDT_SEN
TMP_FAULT#
VDIMM_HDRV
3VSB_SEN
+
I2C_CLK
CPU_PWGD
CHIP_PWGD
PLED1/EXTRAM
PLED0/3VDLDEC#
PSIN#
PSOUT#
MEMBTSS5VSB
1314151617181920212223
0.1uF
C162
R98
75R/1%
C171
0.1uF
3
R91
THESE OUTPUT AND INPUT PIN MUST
BE PULL HIGH
10K
CPU_GD 4
ALL_PWRGD 11,28
SMBCLK1 10,12,13
SMBDATA1 10,12,13
RSMRST# 11
SUSC# 10
SUSB# 10,16,24
+
R105
X_10K
5VSB
PW_OK 28
9VSB
1uF/0805
R103
10K
TIMER
VCC
CHARGE PUMP
VOLTAGE
OUTPUT
C182
C408
X_C1U10Y
5VSB
C173
0.1uF
3738394041424344454647
GND
5VUSB_DRV
VAGP_DRV
VAGP_SEN
3VSB_DRV
24
EC16
1000uF/6.3V
U8
C172
36
C1
35
C2
CHRPMP
AGND1
5V_DRV
WD_DET
WATCHING DOG TIMER SELECT
34
33
32
31
30
29
28
27
26
25
MS6
R102
680R
VCC2_5
WD_DET
0.1uF/X7R
OFF PULL LOW
PULL HIGH
ON
THE VDIMM_HSEN IN LINEAR MODE
DDRTYPE
DDR
DDR II
THIS POINT VOLT CAN'T SETTING
BELOW 2.9V
G
R100
75R/1%
G
EC2
1000uF/6.3V
3
3VDUAL
+
1000uF/6.3V
S
Q20
P3055LD
D
D
S
Q19
P3055LD
VDD_25_SUS
4
CPU PWR_GD OUTPUT
CHIP PWR_GD OUTPUT
I2C BUS
I2C BUS
CONNECT TO SOUTH BRIDGE RSMRST# SIGNAL
SOUTH BRIDGE POWER CONTROL(SLP_S4# OR SUSB#) SIGNAL
SOUTH BRIDGE POWER CONTROL(SLP_S3# OR SUSC#) SIGNAL
ATX POWER OK INPUT
Q30
2 3
Q18
4
APM2054N
1
2
3
4 5
P07D03LV
Q17
1
2
3
4 5
P07D03LV
P3055LD
VDD_12_A
EC25
470uF/6.3V
+
EC38
X_1000uF/6.3V
THRM# 4
CONNECT TO CPU
C429
X_222P
C218
X_222P
C439
X_222P
C214
X_222P
5V_DRV
5VSB_DRV
5V_DRV
5VSB_DRV
VDDQ
1
THE TWO MODE ONLY ONE MODE PRESENT
SINGLE MODE DUAL MODE
THIS MODE SELECT BY PIN
47 PULL HIGH 5VSB
VDIMM_HSEN
VREF
2.0V
1.7V
4
3VDUAL
THIS MODE SELECT BY
PIN 47 PULL LOW
3VSB REGULATE BY 5VSB AND VCC3
5V_DRV
3VSB_DRV
+
EC28
1000uF/6.3V
C270
+
X_222P
EC29
1000uF/6.3V
Title
MS6 ACPI POWER CONTROLLER
Size Document Number Rev
A3
Date: Sheet
5
USB5VDUAL1 VCC
5VSB
8
7
6
8
7
6
Q27
G
C269
X_222P
VCC3
USB5VDUAL2
VCC3
D
S
C327
X_C0.1U25Y
P07D03LV
C422
X_C0.1U25Y
C212
X_C0.1U25Y
C342
0.1uF
Q21
1
2
3
4 5
EC35
470uF/6.3V
+
5VSB
8
7
6
VDDQ
EC34
1000uF/6.3V
+
EC26
1000uF/6.3V
MICRO-START INT'L CO.,LTD .
MS-7172 0A
26 34 Friday, March 04, 2005
5
of
1
2
3
4
5
ISL6568CR FOR AMD K8 754 POWER CKT
C19
X_C0.1U25Y
D S
Q7
IPD09N03LAG
D S
D S
Q6
IPD09N03LAG
D S
CHOK1
CH-1.2U18A
1uF/0805
R66
2.2R/0805
C116
1000pF
R52
2.2R/0805
C74
1000pF
+
1 2
+
1 2
EC10
1000uF/16V
CHOK3
PMC1015-R80M-M1
CHOK2
PMC1015-R80M-M1
EC4
1000uF/16V
EC6
+
1 2
EC3
1000uF/16V
EC15
1800uF/6.3V
EC7
+
1 2
EC19
1000uF/16V
EC12
1800uF/6.3V
EC18
1800uF/6.3V
+
1 2
EC9
1000uF/16V
EC11
1800uF/6.3V
EC14
1800uF/6.3V
C86
C73
C148
4.7uF/1206
4.7uF/1206
VCORE
C126
X_C0.1U25Y
X_C0.1U25Y
0.8V~1.55V/80A
1800uF/6.3V
VCORE
1800uF/6.3V
C88
X_C100U2SP
Near CPU Socket
C75
X_C100U2SP
ATX12V POWER CONNECTOR
+12VA
JPW1
3
12V
4
C17
12V
PWR-2X2M
C23
33pF 0.01uF
R83
10K
G
Q13
G
R108
X_10K
R62
10K
G
Q4
G
C35
0.047uF/16V/X7R
R37 39K
R38 39K
+12VA
VIN
D S
Q9
IPD09N03LAG
D S
IPD06N03LAG
VIN
D S
Q5
IPD09N03LAG
D S
IPD06N03LAG
C15
C115 1uF/0805
G
Q14
G
C87 1uF/0805
G
Q3
G
A A
VID4 4
VID3 4
VID2 4
VID1 4
VID0 4
PG_VCORE 26
VCORE_EN 26
VRM_EN > 0.6V ENABLE
B B
VCORE
R22
R21
51R
51R
COREFB_H 4
COREFB_L 4
C C
R12
1K
VCC
C42
X_C1000P50X
VCC VCC
R2
R3
4.7K
1K
32PIN 5x5QFN
C4
0.1uF
R14 10K
C41
X_C1000P50X
VCC
C24 330pF
R15 1K
R5
X_150K
R1
150K
C22
0.1uF
C20
5600pF/X7R
R9
+20mV
OFFSET
24K/1%
C5
0.01uF
BOTTOM PAD CONNECT TO
GND THROUGH 10vias
U2
ISL6568CR
22
VID4
21
VID3
30
VID2
31
VID1
32
VID0
1
VID12.5
28
PGOOD
20
ENLL
5
COMP
6
FB
7
VDIFF
9
VSEN
8
RGND
3
OFST
29
FS
2
REF
4
VCC
GND
33
D2
1N5817
C10
4.7uF/1206
PVCC
BOOT1
UGATE1
PHASE1
ISEN1
LGATE1
BOOT2
UGATE2
PHASE2
ISEN2
LGATE2
OCSET
ICOMP
ISUM
IREF
R6
15
24
2.2R/0805
25
23
R8 3K/1%
26
27
R16
18
2.2R/0805
17
19
R18
16
3K/1%
14
10
11
12
13
C37
0.01uF
0.1uF
C14
C27
0.1uF
+12VA
R35
4.7R/0805
C47
1uF/0805
R101
R25 1K/1%
R84
1R/0805
IPD06N03LAG
0R/0805
R61
1R/0805
IPD06N03LAG
R33
0R/0805
R32
X_10K
R27 17.4K/1%
GND
GND
VIN
C40
X_C0.1U25Y
1
2
Buck-decoupling Mid-Freq. decoupling Cap.
( 7 * 4.7uF / 0805 , 4*10uF/1206)
D D
VCORE
C120
10uF/10V/1206
C82
10uF/10V/1206
1
C166
X_C1U25Y1206
C99
10uF/10V/1206
C131
X_C10U10Y1206
C63
0.01uF
Bottom Side of CPU
VCORE
C452
X_C10U10Y1206
2
C455
X_C10U10Y1206
C458
X_C10U10Y1206
PH1
1 2
MOS-HS-TO252x2
3
1 2
PH2
1 2
1 2
MOS-HS-TO252x2
PH4
1 2
1 2
MOS-HS-TO252x2
PH3
1 2
1 2
MOS-HS-TO252x2
4
Title
VCORE ISL6568
Size Document Number Rev
A3
Date: Sheet
MICRO-START INT'L CO.,LTD .
MS-7172 0A
27 34 Friday, March 04, 2005
5
of
1
2
3
4
5
FRONT PANEL
JF_P1
1
PWSW-
PWSW+
PLED1
SLED2
A A
B B
HDD-
HDD+
RESET
GND
MEDION-FP
BUZZER
2
3
4
5
6
7
8
FP_RST# 26
C423
X_C0.1U25Y
ALARM 24
SPKR 10
PWRSW
PLED1
SUSLED
HDDLED
HDD+
R296 330R
FPRST#
VCC3
R304
4.7K
R302 2.2K
R273 22R
PLED1 26
SUSLED 26
VCC
R303 100R
R308 X_0R
SOT23EBC
ECB
Q29
MMBT3904
PWBTIN# 10
C377
0.1uF
HDDLED
1N4148S
CLK_RESET# 12
RN105
7 8
5 6
3 4
1 2
220R-8P4R
D12
3
BAT54A
SOT23
D11
D13 1N4148S
C431
X_104P
1
2
IDEACTP# 23
IDEACTS# 23
SATALED 11
R281 4.7K
VCC
1
2
BZ1
BUZZER
MEDION Front Panel
JF_P1
1-2 PS-ON
3-4 PWR LED
5-6 HDD LED (6+)
7-8 RESET
VCC
R251
X_49.9R1%
VCC
3VDUAL
System Voltage Regulator
U14
RC1117S
3 2
C320
X_C0.1U25Y
VSUS2_5
R249
49.9R/1%
R247
200R/1%
VIN VOUT
C343
10uF/10V/0805
VOUT
ADJ
1
REF.=1.25V
SOT-223
4
3VDUAL
R134
200R/1%
R133
390R/1%
R201
360R/1%
R205
390R/1%
VSUSNB
VCC3
VCC2_5
+
EC32
+
1000uF/6.3V
EC31
1000uF/6.3V
C C
PS_OUT# 4,26
D D
PS_OUT#
X_C1000P50N
ATX Power Connector
VCC
1
2
3
4
5
6
7
8
9
10
11
12
C130
-5V
VCC
VCC3 VCC3
-12V
1
ATX1
13
3.3V
14
-12V
15
GND
16
PSON
17
GND
18
GND
19
GND
20
-5V
21
5V
22
5V
23
5V
24
GND
PWRCONN2*12
POWER
3.3V
3.3V
GND
5V
GND
5V
GND
POK
5VSB
12V
12V
DET
+12V
5VSB
C92
0.1uF
VCC
R65
4.7K
0.1uF
C119
2
PW_OK 26
5VSB
C247
0.1uF
VCC3
C178
X_C0.1U25Y
3VDUAL
C414
X_C0.1U25Y
C183
X_C0.1U25Y
C399
0.1uF
C350
X_C0.1U25Y
C161
C432
X_C0.1U25Y
X_C0.1U25Y
+12V -12V
C375
0.1uF
3
VCC
C160
0.1uF
C176
X_C0.1U25Y
C359
0.1uF
-5V
C372
X_C0.1U25Y
C102
X_C0.1U25Y
C426
X_C0.1U25Y
+12V
C81
0.1uF
4
POWER OK Circuits
3VDUAL VSUS2_5
R110
R106
ALL_PWRGD 11,26
-LDTRST 6
Title
Size Document Number Rev
Date: Sheet
R87
1K
R97
1K
System Regulator&Front Panel
A3
MS-7172 0A
Q11
MMBT3904
Q12
MMBT3904
MICRO-START INT'L CO.,LTD .
680R
1K
Q15
MMBT3904
5
-CPURST 4
28 34 Friday, March 04, 2005
of
1
2
3
4
5
For EMI
VCC3
A A
B B
C379
C151
X_C0.1U25Y
X_C0.1U25Y
3VDUAL -12V
C111
X_C0.1U25Y
C38
VCC
C129
C125
C341
C180
C352
C318
X_0.1uF
X_C102P
X_C0.1U25Y
X_C0.1U25Y
VDDA_25
C193
X_C0.1U25Y
X_C0.1U25Y
+12V -12V
C441
X_C0.1U25Y
X_0.1uF
C1
X_C0.1U25Y
X_0.1uF
C380
X_C0.1U25Y
C319
X_0.1uF
C21
X_0.1uF
3VDUAL
C297
X_C0.1U25Y
VCC VCC
VCORE
C181
X_C0.1U25Y
C60
X_C6.8P50N
C58
X_C6.8P50N
C68
PGND
VTT_DDR_SUS
X_C0.1U25Y
PGND
C179
X_C0.1U25Y
C121
X_C0.1U25Y
LAYOUT: Place caps on the bottom of N B
VDD3
C478
X_C0.1U25Y
VDDQ
Bottom Side of CPU
VCORE
C444
X_C6.8P50N
VDD_25_SUS
C453
X_C6.8P50N
C447
X_C0.22U16Y
C456
X_C1U16Y
C462
X_C1U16Y
VTT_DDR_SUS
C461
X_C0.1U
C197
C18
X_0.1uF
X_0.1uF
Title
Size Document Number Rev
A3
Date: Sheet
C222
C211
X_0.1uF
X_C0.22U16Y
MICRO-START INT'L CO.,LTD .
EMI parts
MS-7172 0A
29 34 Friday, March 04, 2005
5
of
VCC3
C373
X_C0.1U25Y
VCC
C C
C144
X_C1U25Y
C240
D D
0.1uF
C345
X_C0.1U25Y
1
C142
C381
C133
X_C0.1U25Y
X_C0.1U25Y
VTT_DDR_SUS VDD_25_SUS VTT_DDR_SUS
C138
X_C1U10Y
GND
VDD_25_SUS
VDD_25_SUS
C382
X_C0.1U25Y
X_C0.1U25Y
X_C0.1U25Y C236
X_C0.1U25Y C48
CB10 X_C1000P50N
CB11 X_C1000P50N
2
VTT_DDR_SUS
VCC3
VCC
VDD_12_A VDDQ
VCC
C16
X_C0.1U25Y
VDD_25_SUS VTT_DDR_SUS
VDD_25_SUS
C170
X_C0.1U25Y
VCC3
1000pF C186
X_C0.22U16Y C213
VDD_25_SUS VCC3
C25
VCC
X_C0.1U25Y
VDDQ VCORE
3
C243
X_C0.1U25Y
VDD_25_SUS
VCC
C190
X_C0.1U25Y
C45
X_C0.1U25Y
C71
X_1000pF
C194
X_C0.22U16Y
4
1
2
3
4
5
MH1
2
9
3
8
(NPTH)
4
7
1
5
A A
6
MH2
2
9
3
8
(NPTH)
4
7
1
5
6
MH3
2
9
3
8
(NPTH)
4
7
1
5
6
PGND
MH4
2
9
3
8
(NPTH)
4
7
1
5
6
FM4
FM1
B B
X
X_FM
F_PAD_M120
VCC
X
X_FM
T2
1
2
X_YJ102
FM5
X
X_FM
Impedance Test
FM3
X
X_FM
MH5
2
3
4
FM2
T1
1
2
X_YJ102
X
(NPTH)
5
X_FM
FM7
X
X_FM
MH6
2
9
3
8
(NPTH)
4
7
1
5
6
9
8
7
1
6
FM8
FM6
X
X
X_FM
X_FM
C C
D D
Title
Misc
Size Document Number Rev
A3
1
2
3
4
Date: Sheet
MICRO-START INT'L CO.,LTD .
MS-7172 0A
30 34 Friday, March 04, 2005
5
of
1
Model option table
2
3
4
5
Model type Function BOM Config ERP BOM No.
A A
B B
MS7172-0A VT8380 +VT8237R + VT6307 2005/02/05 601-7172-01S-001
Cfg7172-0A + VT6103L
Date
NB FAN/HEAT-SINK
PCB1
VBAT1_X1
U11_X1
MSI
C C
MS-7172-0A
P00-071720A-G37
BAT-BCR2032P
D06-0100101-P01
DDR
NB-HEATSINK-W/O Fan
E31-0401520-E25
U11_X2
MSI
DDR
X_NB-HEATSINK-W/Fan
_
U5_X1
U6_X2
BIOS FLASH ROM
LPC Flash ROM-4M
D D
1
CPU_RM
U6_X3
SCREW
U6_X4
SCREW
Title
Manual Parts
Size Document Number Rev
A3
2
3
4
Date: Sheet
MICRO-START INT'L CO.,LTD .
MS-7172 0A
31 34 Friday, March 04, 2005
5
of
1
ATX Power
Supply
2
3
4
5
K8 CPU Power
DDR Side CPU Side
A A
+5VSB
5VDUAL 3VDUAL
VSUS2_5
-> SB
( Q17,Q30) ( Q21 ) ( U14 )
VCC
K8 Vcore ->
"VCORE"
(60A)
VDDA_2.5 Power ->
"VDDA_25" (0.11A)
HT Power ->
"VDD_12_A"&"VLDT0"
DDR Power ->
"VDD_25_SUS"
(9.5A)
DDR-VTTPower ->
"VTT_DDR_SUS"
(5.21A)
(2A)
Charge Pump
-> 9VSB
MS-6.34
B B
+12V
VCORE ->
K8 CPU
( CHOK2/2 )
+5VR ->
Audio
DDR_25_SUS
-> DDR
( Q19 )
NB & SB & AGP Power
NB & SB Core-Power
-> "VCC2_5" (?A)
( U19 )
NB & SB Core-Suspend
Power -> "VSUS2_5"
(?A)
VTT_DDR_SUS
-> DDR
VDDA_25 ->
VCC3
C C
K8 CPU(I/O)
FB6
( U7 )
NB AGP8X Power ->
"VDDQ" (1.5A)
VDDQ ->
-12V
AGP
( Q27 )
VCC1_5 ->
NB & SB
( VLINK )
( Q27 )
VDD_12_A
-> HT
( Q18 )
Other Power
5VDUL
DDR_3VDUAL
3VDUL
D D
Title
Size Document Number Rev
A3
1
2
3
4
Date: Sheet
9VSB
MICRO-START INT'L CO.,LTD .
Power Delivery
MS-7172 0A
32 34 Friday, March 04, 2005
5
of
1
GPIO FUNCTION
2
3
4
5
PIN NAME Function define
GPO0 (VDDS)
A A
GPO1(VDDS)
GPO2/SUSA#
(VDDS)
GPO3/SUSST#(VDDS)
GPO4/SUSCLK(VDDS)
GPO5/CPUSTP#
GPO6/PCISTP#
GPO7/GNT5
GPO8/GPI8/VGATE
*
GPO9/GPI9/UDPWREN
*
GPO10/GPI10/PICD0
*
B B
GPO11/GPI11/PICD1
*
GPO12/GPI12/INTE#
*
GPO13/GPI13/INTF#
*
GPO14/GPI14/INTG#
*
GPO15/GPI15/INTH#
*
GPO20/GPI20
/ACSDIN2/PCS0#
GPO21/GPI21/ACSDIN3
/PCS1#/SLPBTN#
GPO22/GPI22/GHI#
GPO23/GPI23/DPSLP
C C
GPO25/GPI25
GPO26/GPI26/SMBDT2
(VDDS)
GPO27/GPI27/SMBCK2
(VDDS)
GPO28/GPI28/VIDSEL
GPO29/GPI29/VRDSLP
GPO30/GPI30
GPO31/GPI31
/GPIOAGPO24/GPI24
/GPIOB
/GPIOC
/GPIOD
Default
Function
GPO0
GPO1
SUSA#
SUSST#
SUSCLK
CPUSTP#
PCISTP#
GPO7
GPI8
UDPWREN
GPI10
GPI11
GPI12
GPI13
GPI14
GPI15
GPI20/ACSDIN2
GPI21/ACSDIN3
GPI22
GPI23
GPI24
GPI25
SMBDT2
SMBCK2
GPO28
/VIDSEL
GPO29
/VRDSLP
GPI30
GPI31
NA
NA
4.7K ohm Pull up to 3VDUAL
SUSST#
4.7K ohm Pull up to 3VDUAL
4.7K ohm Pull up to 3VDUAL
4.7K ohm Pull up to VCC3
4.7K ohm Pull up to VCC3
2.7K ohm Pull up to VCC3
4.7K ohm Pull up to VCC3
NA
330 ohm Pull up to VCC3
330 ohm Pull up to VCC3
NA
NA
NA
2.7K ohm Pull up to VCC3INTH#
4.7K ohm Pull down
4.7K ohm Pull down
4.7K ohm Pull up to VCC3
4.7K ohm Pull up to VCC3
4.7K ohm Pull down
4.7K ohm Pull down
4.7K ohm Pull up to 3VDUAL
4.7K ohm Pull up to 3VDUAL
SATA_LED
4.7K ohm Pull down
4.7K ohm Pull down
4.7K ohm Pull down
PIN NAME Function define
GPI0
(VBAT)
GPI1
(VSUS3)
GPI2/EXTSMI#
(VSUS3)
GPI3/RING#
(VSUS3)
GPI4/LID#
(VSUS3)
GPI5/BATLOW# (VDDS)
GPI6/AGPBZ
GPI7/REQ5
GPI8/VGATE
*
GPI9/UDPWREN
*
GPI10/PICD0
*
GPI11/PICD1
*
GPI12/INTE#
*
GPI13/INTF#
*
GPI14/INTG#
*
GPI15/INTH# GPI15
*
GPI16/INTRUDER#
(VBAT)
GPI17/CPUMISS
GPI18/AOLGP1/THRM#
GPI19/APICCLK
PCI Config.
DEVICE
PCI Slot 1
PCI Slot 2
PCI Slot 3
D D
Default
Function
GPI0
GPI1
EXTSMI#
RING#
LID#
BATLOW#
AGPBZ
GPI7
GPI8
UDPWREN
GPI10
GPI11
GPI12
GPI13
GPI14
INTRUDER#
CPUMISS
AOLGP1
APICCLK
4.7K ohm Pull up to VBAT
ATADET0=>Detect IDE1 ATA100/66
4.7K ohm Pull up to 3VDUAL
4.7K ohm Pull up to 3VDUAL
ATADET1=>Detect IDE2 ATA100/66
4.7K ohm Pull up to 3VDUAL
4.7K ohm Pull up to VCC3
2.7K ohm Pull up to VCC3
4.7K ohm Pull up to VCC3
NA
NA
NA
NA
2.7K ohm Pull up to VCC3INTH#
1M ohm Pull up to VBAT
4.7K ohm Pull up to 3VDUAL
THRMS#
4.7K ohm Pull up to 3VDUAL
APICCLK
INTA#
INTB#
INTC#
PREQ#0
PGNT#0
INTD#
INTB#
INTC#
INTD#
PREQ#1
PGNT#1
INTA#
INTC#
INTD#
PREQ#2
INTA# PGNT#2
INTB#
330 ohm Pull up to VCC3
330 ohm Pull up to VCC3
IDSEL
AD19
AD20
AD21
CLOCK REQ#/GNT#
PCICLK1
PCICLK2
PCICLK3
USB
Rear
Front
Port DATA +/-
USB1
LAN_USB1
JUSB1
JUSB2
USB1USB1+
USB0USB0+
USB2USB2+
USB3USB3+
USB4USB4+
USB5USB5+
USB6USB6+
USB7USB7+
PCI RESET DEVICE
Signals Target
PCISLOTRST#
PCIDEVRST#
HD_RST#
PCI slot 1-3
NB , Super I/O
Primary, Scondary IDE
PCIRST# AGP SLOT
DDR DIMM Config.
DEVICE
DIMM 1
DIMM 2
CLK GEN PIN OUT MCP1 INT Pin
22 (PCICLK5)
23 (PCICLK6)
21 (PCICLK4)
1010000XB
1010001XB
CLOCK ADDRESS
MEMCLK_H5/MEMCLK_L5
MEMCLK_H0/MEMCLK_L0
MEMCLK_H7/MEMCLK_L7
MEMCLK_H4/MEMCLK_L4
MEMCLK_H1/MEMCLK_L1
MEMCLK_H6/MEMCLK_L6
OC#
USB_OC#1
( OC#0~1 )
USB_OC#2
( OC#2~3 )
USB_OC#5
( OC#4~7 )
Title
GPIO List
Size Document Number Rev
A3
1
2
3
4
Date: Sheet
MICRO-START INT'L CO.,LTD .
MS-7172 0A
33 34 Friday, March 04, 2005
5
of
1
2
3
4
5
MS-7172
Rev Date Description
0A 2005/02/01
A A
B B
Page
SCHEMATIC HISTORY
first version be released.
●
Rev Date Description Page
C C
D D
Title
History
Size Document Number Rev
A3
1
2
3
4
Date: Sheet
MICRO-START INT'L CO.,LTD .
MS-7172 0A
34 34 Friday, March 04, 2005
5
of