MSI MS-7164 Schematics

Page 1
1
Cover Sheet
1
MS-7164 VER:0D
Block Diagram Intel LGA775 CPU - Signals Intel LGA775 CPU - Power Intel LGA775 CPU- GND Intel Lakeport - CPU Intel Lakeport - Memory Intel Lakeport - PCI Express Intel Lakeport - GND ICH7 Signal, Power, GND 10-12 Clock - CLOCK ICS954101DF & FWH SIO NS PC8375L/K/T & I/O CONNECTOR SERIAL PORT & VGA CONNECTOR AC97 Audio Codec- AD1888
A A
LAN Intel Tekoa 82573E DDR2 System Memory 1 , 2 DDR VTT DECPUPLING IBM Slim IDE & SATA Conn. ATX & FRONT PANEL & FAN
13 14 15 16 17PCI-E X1 & PCI & ADD2R-N SLOT 18 20 21 22 23
2 3 4 5 6 7 8 9
CPU:
Intel Prescott ( L2=2MB ) Intel Cendar Mill (65nm) Intel Smithfield
System Chipset:
Intel Lakeport - GMCH (North Bridge) Intel ICH7 South Bridge
On Board Chipset:
Main Memory:
2 CHANNEL DDR2 * 2 (Max 2GB)
PCI-E Slots:
Rear Side I/O
USB USB
Line_Out
Line_In
LAN USB USB
LPT Port
COM B Port
.............
............
.....
....
VGA Port
.....
.....
.....
MS
KB
.
.
.
.
...
.
.
.
.
.
PCI-E X1 & PCI & ADD2-N SLOT
Intersil PWM: 4-phase
Controller: HIP6556BCR
Front Side I/O
Line_Out Mic_In USB USB
Driver: HIP6602BCR *2
USB Connectors MS-7 ACPI CONTROLLER VRM10.1 - INTERSIL 6556 4PHASE Decoupling CAP GPIO & Jumper setting Power Delivery Mapping Revision History Manual Parts
24 25 26 27 28 29 30
BOM Config
Option ERP NumberMODEL Config. ORCAD Config.
MSI
1
Title
Size Document Number Rev
Date: Sheet of
MICRO-STAR INt'L CO., LTD .
COVER SHEET
(MS-7164)
131Tuesday, August 16, 2005
0D
Page 2
VRM_GD
VTT_PWG
VRM 10.1 Intersil 6556 4-Phase PWM
P.27
VTT_PWG
Intel LGA775 Processor
FSB
533/800/1066
H_CPURST#
P.3~5
CHANNEL A CHANNEL B
533/667
1
2 DDR2 DIMM Modules
VID_GD
VTT_PWG
MS-7164
System Block Diag ram
P.20-21
1
P.25
Intel 82573E
PCIRST_ICH6#
SLP_S4#
SLP_S3#
ATX1
PCIRST#2
PCI-E Slot
P.18
PWR_OK
PCIRST#2
PCIRST#1
RSMRST#
PWR_GD
MS7
RSMRST#
HD_RST#
P.27
P.6~9
PWR_GD
ADD2
PWR_GD
PCI + PCI-E x1
PCI-E x1
Analog Video Out
HD_RST#
A A
UltraBay Silm Enhance
SERIAL ATA1
P.15
P.23
P.22
H_PWRGD
VRM_GD
UltraDMA 33/66/100
Lakeport GMCH
DMI
ICH7
PLTRST#
USB2.0 USB Port 0~ 7
P.24
JFP1
P.24
RSMRST#
PWRBTN#
P.10~12
LPC Bus
FWH
AD1888
AC'97 Codec
AC-LINK
P.16
8M Flash
P.14
LPC SIO NS
PC8374L/K/T
Keyboard
Mouse
P.14
P.14
Parallel Port
P.14
Serial Port
COM B
P.15P.14
CPU_FAN1
REAR_FAN1
SYS_FAN1
MICRO-STAR INt'L CO., LTD.
MSI
P.23
1
Title
Size Document Number Rev
Date: Sheet
BLOCK DIAGRAM
(MS-7164)
231Tuesday, August 16, 2005
of
0D
Page 3
8
7
6
5
4
DBRESET#
3
DBRESET# [11,19]
2
1
CPU SIGNAL BLOCK
H_VID1
AL5
VID2#
VID1#
BPM5# BPM4# BPM3# BPM2# BPM1# BPM0#
REQ4# REQ3# REQ2# REQ1# REQ0#
RSVD
RS2# RS1# RS0#
AP1# AP0# BR0#
DP3# DP2# DP1# DP0#
H_VID0
AM2
VID0#
VCC_VRM_SENSE [26] VSS_VRM_SENSE [26]
H_VID[0..5] [26]
VID_SELECT L--VRD10.1 H--VRD11
AN7
CPU_GTLREF0
H1
CPU_GTLREF1
H2
TEST_H29
H29
MCH_GTLREF_CPU
E24
H_BPM#5
AG3
H_BPM#4
AF2
H_BPM#3
AG2
H_BPM#2
AD2
H_BPM#1
AJ1
H_BPM#0
AJ2 G5
H_REQ#4
J6
H_REQ#3
K6
H_REQ#2
M6
H_REQ#1
J5
H_REQ#0
K4
H_TESTHI12
W2
H_TESTHI11
P1
H_TESTHI10
H5
H_TESTHI9
G4
H_TESTHI8
G3 F24 G24 G26 G27 G25
H_TESTHI2_7
F25
H_TESTHI1
W3
H_TESTHI0
F26
RSVD_AK6
AK6
RSVD_G6
G6
CK_H_CPU#
G28
CK_H_CPU
F28
H_RS#2
A3
H_RS#1
F5
H_RS#0
B3
TEST_U3
U3
TEST_U2
U2
H_BR#0
F3
H_COMP5
T2
H_COMP4
J2
H_COMP3
R1
H_COMP2
G2
H_COMP1
T1
H_COMP0
A13
TEST_J17
J17
TEST_H16
H16
TEST_H15
H15
TEST_J16
J16 AD5
R6 C17 G19 E12 B9 A16 G20 G12 C8 L1 K1
3
R14 62R0402
TEST_H29
MCH_GTLREF_CPU [6] H_BPM#[0..5] [19]
For ITP Port
H_REQ#[0..4] [6]
0D Lenovo Request
RSVD_AK6
R8 62R0402 R9 62R0402 R10 62R0402
R12 X_62R0402
CK_H_CPU# [13] CK_H_CPU [13]
H_RS#[0..2] [6]
TEST_U3 TEST_U2
R22 60.4R1%0402 R23 60.4R1%0402 R13 60.4R1%0402 R15 60.4R1%0402 R16 60.4R1%0402 R17 60.4R1%0402
TEST_J17 TEST_H16 TEST_H15 TEST_J16
H_ADSTB#1 [6] H_ADSTB#0 [6] H_DSTBP#3 [6] H_DSTBP#2 [6] H_DSTBP#1 [6] H_DSTBP#0 [6] H_DSTBN#3 [6] H_DSTBN#2 [6] H_DSTBN#1 [6] H_DSTBN#0 [6] H_NMI [10] H_INTR [10]
VID Pull-Up Resistor
VTT_OUT_RIGHT
RN1
8P4R-680R
H_VID3
1 2
H_VID1
3 4
H_VID4
5 6
H_VID2
7 8
H_VID0
R2 680R0402 R3 680R0402
H_VID5
VTT_OUT_RIGHT
R6 49.9R1%0402
H_TMS
H_BPM#4 H_TDO H_BPM#2
H_TDI
H_BPM#3 H_BPM#5 H_BPM#1 H_BPM#0
VTT_OUT_LEFT
H_TESTHI12 H_TESTHI10 H_TESTHI9 H_TESTHI8 H_TESTHI11
R846 0R0402
V_FSB_VTT VTT_OUT_LEFT V_FSB_VTT VTT_OUT_RIGHT VTT_OUT_LEFT
H_BR#0 [6]
PLACE RESISTORS OUTSIDE SOCKET CAVITY IF NO ROOM FOR VARIABLE RESISTOR DON'T PLACE
COMP5 Rt COMP4 Rt COMP3 Rt COMP2 Rt COMP1 Rt COMP0 Rt
Lakeport Design Guide Define COMP[7:4] Rpu=60.4ohm +- 1% COMP[3:0] Rpd=60.4ohm +- 1%
MSI
Title
Size Document Number Rev
Date: Sheet
2
V_FSB_VTT VTT_OUT_LEFT VTT_OUT_RIGHT
Prescott Celeron-D CedarMill Smithfield
NC NC NC NC VSS VSS
MICRO-STAR INt'L CO., LTD.
RN2 _8P4R-51R0402-LF
1 2 3 4 5 6 7 8
7 8 5 6 3 4 1 2
R7 62R0402
7 8 5 6 3 4 1 2
RN4 _8P4R-62R0402-LF
VTT
VTT
VTT
VTT
VTT
NC
VTT
NC VSS
VSS
VSS
VSS
C1 C0.1U25Y RN3 _8P4R-51R0402-LF
C2 C0.1U25Y
C520 C0.1U25Y
H_FORCEPH_IO [14] V_FSB_VTT [4,6,8,12,25]
VTT_OUT_LEFT [4,5]
VTT_OUT_RIGHT [4,5,19]
VTT_OUT_RIGHT
C5
X_C0.1U25Y
NC NC VSS VSS VSS VSS
Intel LGA775 CPU - Signals
(MS-7164)
1
331Tuesday, August 16, 2005
0D
of
TEST_AN4
TEST_AN3
H_A#[3..31][6]
D D
H_A#5
H_A#9
H_A#10
H_A#8
H_A#31
H_A#26
H_A#25
H_A#30
H_A#29
AJ6
AJ5
AH5
AH4
AG5
AG4
AG6
A35#
A34#
A33#
A32#
A31#
A30#
D49#
D48#
D47#
D46#
D45#
D44#
D43#
D20
G22
D22
E22
G21
F21
E21
H_D#42
H_D#43
H_D#45
H_D#46
H_D#44
H_D#47
H_D#48
100 OHMS OVER 210 OHMS RESISTORS
GTLREF VOLTAGE SHOULD BE
0.67*VTT = 0.8V
VTT_OUT_LEFT
VTT_OUT_LEFT
C C
R20
49.9R1%0402
R18
49.9R1%0402
R21 100R1%0402
R19 100R1%0402
CPU_GTLREF0
C6 C1U10Y
CPU_GTLREF1
C3 C1U10Y
C7
X_C2200P16X
C4
X_C2200P16X
PLACE AT CPU END OF ROUTE
VTT_OUT_RIGHT
VTT_OUT_LEFT VTT_OUT_LEFT
R24 62R0402 R25 120R0402
R27 100R1%0402 R28 62R0402 R29 62R0402
R4 49.9R1%0402 R5 49.9R1%0402 R11 X_62R0402
H_CPURST# H_PROCHOT#
H_PWRGD H_BR#0 H_TESTHI13
H_TRST# H_TCK
H_DBI#[0..3][6]
H_IERR#[4]
H_FERR#[4,10]
H_STPCLK#[10]
H_INIT#[10]
H_DBSY#[6] H_DRDY#[6] H_TRDY#[6]
H_ADS#[6] H_LOCK#[6]
H_BNR#[6]
H_HIT#[6]
H_HITM#[6]
H_BPRI#[6] H_DEFER#[6]
H_TDI[19]
H_TDO[19] H_TMS[19] H_TRST#[19] H_TCK[19]
THERMDP#[14] THERMDN#[14]
TRMTRIP#[4,10,14]
H_IGNNE#[10]
ICH_H_SMI#[10,14]
H_A20M#[10]
H_DBI#0 H_DBI#1 H_DBI#2 H_DBI#3
H_TDI H_TDO H_TMS H_TRST# H_TCK
H_PROCHOT#
H_TESTHI13
LL_ID[1:0] = TBD for the Smithfield
VTT_OUT_RIGHT VTT_OUT_RIGHT
B B
FSBSEL RESISTOR CAN BE REMOVED IF ONLY TEAJS AND CEDAR MILL ARE SUPPORTED
V_FSB_VTT
BSEL
1
2
0
0
1
0
0
01
A A
R30 X_62R0402 R31 X_62R0402
RN6 8P4R-470R
12 34 56 78
TABLE
0 FSB FREQUENCY
267 MHZ (1067)
0
0
200 MHZ (800)
133 MHZ (533)
8
H_FSBSEL1 H_FSBSEL2 H_FSBSEL0
LL_ID0 LL_ID1
LL_ID0 LL_ID1
H_FSBSEL0[8,13] H_FSBSEL1[8,13] H_FSBSEL2[8,13]
H_PWRGD[10,19]
H_CPURST#[6,19]
H_D#[0..63][6]
7
H_D#63 H_D#62 H_D#61 H_D#60 H_D#59 H_D#58 H_D#57 H_D#56 H_D#55 H_D#54
G11 D19 C20
AB2 AB3
AD3
AD1 AF1 AC1 AG1 AE1 AL1 AK1
AE8 AL2
AH2 AE6 G10
D16 A20
AA2 G29
H30 G30
G23 B22
A22 A19 B19 B21 C21 B18 A17 B16 C18
6
U1A
A8
F2
R3 M3
P3 H4
B2 C1 E3
D2 C3 C2 D4 E4 G8 G7
M2
N2 P2 K3
L2
N5 C9
Y1 V2
N1
DBI0# DBI1# DBI2# DBI3#
EDRDY# IERR# MCERR# FERR#/PBE# STPCLK# BINIT# INIT# RSP#
DBSY# DRDY# TRDY#
ADS# LOCK# BNR# HIT# HITM# BPRI# DEFER#
TDI TDO TMS TRST# TCK THERMDA THERMDC THERMTRIP# GND/SKTOCC# PROCHOT# IGNNE# SMI# A20M# TESTI_13
RSVD RESERVED0 RESERVED1 RESERVED2 RESERVED3 RESERVED4 RESERVED5
BOOTSELECT LL_ID0 LL_ID1
BSEL0 BSEL1 BSEL2
PWRGOOD RESET# D63#
D62# D61# D60# D59# D58# D57# D56# D55# D54#
D53#
B15
C14
H_D#52
H_D#53
D52#
D51#
D50#
C15
A14
D17
H_D#50
H_D#49
H_D#51
H_A#22
H_A#23
H_A#27
H_A#28
AF4
AF5
AB4
A29#
A28#
A27#
D42#
D41#
D40#
F20
E19
E18
H_D#41
H_D#39
H_D#40
H_A#19
H_A#24
H_A#20
H_A#21
H_A#18
AC5
AB5
AA5
AD6
AA4Y4Y6W6AB6W5V4V5U4U5T4U6T5R4M4L4M5P6L5
A26#
A25#
A24#
A23#
A22#
A21#
A20#
A19#
D39#
D38#
D37#
D36#
D35#
D34#
D33#
D32#
F18
F17
G17
G18
E16
E15
G16
G15
H_D#38
H_D#34
H_D#31
H_D#36
H_D#33
H_D#37
H_D#35
H_D#32
5
H_A#11
H_A#16
H_A#15
H_A#12
H_A#14
H_A#13
H_A#17
A18#
A17#
A16#
D31#
D30#
D29#
F15
G14
H_D#30
H_D#29
A9#
A15#
A14#
A13#
A12#
A11#
A10#
D28#
D27#
D26#
D25#
D24#
D23#
D22#
F14
G13
E13
D13
F12
F11
D10
E10D7E9F9F8G9D11
H_D#28
H_D#23
H_D#24
H_D#21
H_D#26
H_D#25
H_D#27
H_D#22
DBRESET#
H_A#7
H_A#3
VSS_SENSE
VCC_VRM_SENSE
H_A#6
H_A#4
A8#
A7#
A6#
A5#
A4#
D21#
D20#
D19#
D18#
D17#
H_D#16
H_D#19
H_D#17
H_D#20
H_D#18
VSS_VRM_SENSE
VCC_SENSE
AC2
AN3
AN4
AN5
AN6
A3#
DBR#
VSS_SENSE
VCC_SENSE
VSS_MB_REGULATION
VCC_MB_REGULATION
D16#
D15#
D14#
D13#
D12#
D11#
D10#
D9#
C12
B12D8C11
B10
A11
A10A7B7B6A5C6A4C5B4
H_D#14
H_D#13
H_D#15
H_D#12
H_D#10
H_D#11
H_D#8
H_D#9
4
H_VID4
H_VID2
H_VID3
H_VID5
AJ3
AK3
AM5
AL4
AK4
AL6
AM3
AM7
VID6#
VID5#
VID4#
VID3#
RSVD
VID_SELECT
ITP_CLK1
ITP_CLK0
GTLREF0 GTLREF1
GTLREF_SEL
CS_GTLREF
PCREQ#
TESTHI12 TESTHI11 TESTHI10
TESTHI9 TESTHI8 TESTHI7 TESTHI6 TESTHI5 TESTHI4 TESTHI3 TESTHI2 TESTHI1 TESTHI0
FORCEPH
BCLK1# BCLK0#
COMP5 COMP4 COMP3 COMP2 COMP1 COMP0
ADSTB1# ADSTB0# DSTBP3# DSTBP2# DSTBP1# DSTBP0# DSTBN3# DSTBN2# DSTBN1# DSTBN0#
LINT1/NMI
D8#
H_D#7
LINT0/INTR
D7#
D6#
D5#
D4#
D3#
D2#
D1#
D0#
ZIF-SOCK775-15u
H_D#0
H_D#6
H_D#5
H_D#3
H_D#1
H_D#4
H_D#2
Page 4
8
7
6
5
4
3
2
1
VCCP
AF21
U1B
VCCP
D D
C C
AF19 AF18 AF15 AF14 AF12 AF11
AE9 AE23 AE22 AE21 AE19 AE18 AE15 AE14 AE12 AE11
AD8
AD30 AD29 AD28 AD27 AD26 AD25 AD24 AD23
AC8
AC30 AC29 AC28 AC27 AC26 AC25 AC24 AC23
AB8
AA8
VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC
VCC
VCC
VCC
VCC
Y30
Y8
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
Y23
Y24
Y25
Y26
Y27
Y28
Y29
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
W27
W28
W29
W30
W8
VCC
VCC
W26
W25
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
W23
W24
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
U25
U26
U27
U28
U29
U30U8V8
AH28
AH29
AH30
AH8
AH9
AJ11
AJ12
AJ14
AJ15
AJ18
AJ19
AJ21
AJ22
AJ25
AJ26
AJ8
AJ9
AK11
AK12
AK14
AK15
AK18
AK19
AK21
AK22
AK25
AK26
AK8
AK9
AL11
AL12
AL14
AL15
AL18
AL19
AL21
AL22
AL25
AL26
AL29
AL30
AL8
AL9
AM11
AM12
AM14
AM15
AM18
AM19
AM21
AM22
AM25
AM26
AM29
AM30
AM8
AM9
AN11
AN12
AN14
AN15
AN18
AN19
AN21
AN22
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCCA
VSSA
VCCPLL
VCC-IOPLL
VTT VTT VTT VTT VTT VTT VTT VTT VTT VTT VTT VTT VTT VTT VTT VTT VTT VTT VTT VTT VTT VTT VTT VTT
VTTPWRGD
VTT_OUT_RIGHT
VTT_OUT_LEFT
VTT_SEL
RSVD
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
AN9
J10
J11
J12
J13
J14
J15
J18
J19
J20
J21
J22
J23
J24
J25
J26
J27
J28
J29
J30J8J9
K23
K24
K25
K26
K27
K28
K29
K30K8L8
M23
M24
M25
M26
M27
M28
M29
M30M8N23
N24
N25
N26
N27
N28
N29
N30N8P8R8T23
T24
T25
T26
T27
T28
T29
T30T8U23
U24
AN30
AN8
ZIF-SOCK775-15u
AN25
AN26
AN29
H_VCCA
A23
H_VSSA
B23 D23
H_VCCIOPLL
C23
A25 A26 A27 A28 A29 A30 B25 B26 B27 B28 B29 B30 C25 C26 C27 C28 C29 C30 D25 D26 D27 D28
VCCFUSEPRG
D29
VIDFUSEPRG
D30
VTT_PWG
AM6
VTT_OUT_RIGHT
AA1
VTT_OUT_LEFT
J1 F27
F29
D23 VCCPLL Smithfield define the
support future processor.
V_FSB_VTT
VTT_OUT_RIGHT [3,5,19] VTT_OUT_LEFT [3,5]
R521 X_1KR0402
R522
VTT_SEL
X_0R0402
V_FSB_VTT [3,6,8,12]
V_FSB_VTT
AH27
AH26
AH25
AH22
AH21
AH19
AH18
AH15
AH14
AH12
AH11
AG9
AG8
AG30
AG29
AG28
AG27
AG26
AG25
AG22
AG21
AG19
AG18
AG15
AG14
AG12
AG11
AF9
AF8
AF22
VCCP
B B
It must close bulk caps.
V_FSB_VTT H_VCCIOPLL
DC voltage drop should be less than 70mV.
It support DC current if 125mA.
L1 X_10U100m_0805
CP15 X_COPPER
L2 X_10U100m_0805
EC1
C22U6.3X1206
EC2
X_C10U10Y0805
H_VSSA
C11
C1U10Y
H_VCCA
PLACE AT ICH END OF ROUTE
RN5 _8P4R-62R0402-LF
TRMTRIP#VTT_OUT_RIGHT
12
H_FERR#
34 56
H_IERR#
78
TRMTRIP# [3,10,14] H_FERR# [3,10]
H_IERR# [3]
MSI
VTT_OUT_RIGHT
R524
A A
VCC5_SB
R523 1KR0402
VID_GD#[25,26]
R525 10KR0402
8
7
1.25V VTT_PWRGOOD
680R0402
VTT_PWG
SOT23EBC
Q1
N-MMBT3904_NL_SOT23
ECB
6
V_FSB_VTT
5
C8 X_C10U10Y0805 C9 C10U10Y0805 C10 C10U10Y0805
4
Title
MICRO-STAR INt'L CO., LTD.
Intel LGA775 CPU - Power
Size Document Number Rev
(MS-7164)
431Tuesday, August 16, 2005
3
Date: Sheet
2
of
1
0D
Page 5
8
3
]
R526
VTT_OUT_RIGHT
,4,19
D D
C C
B B
62R0402 TEST_F6
R527 62R0402
U1C
A12
VSS
A15
VSS
A18
VSS
A2
VSS
A21
VSS
A24
VSS
A6
VSS
A9
VSS
AA23
VSS
AA24
VSS
AA25
VSS
AA26
VSS
AA27
VSS
AA28
VSS
AA29
VSS
AA3
VSS
AA30
VSS
AA6
VSS
AA7
VSS
AB1
VSS
AB23
VSS
AB24
VSS
AB25
VSS
AB26
VSS
AB27
VSS
AB28
VSS
AB29
VSS
AB30
VSS
AB7
VSS
AC3
VSS
AC6
VSS
AC7
VSS
AD4
VSS
AD7
VSS
AE10
VSS
AE13
VSS
AE16
VSS
AE17
VSS
AE2
VSS
AE20
VSS
AE24
VSS
AE25
VSS
AE26
VSS
AE27
VSS
AE28
VSS
AE29
7
TEST_F23
TEST_E23
TEST_E7
TEST_F23
TEST_F6
TEST_E7
TEST_E23
Y3
AE3
AE4D1D14
E23E5E6E7F23F6B13J3N4P5V1W1AC4Y7Y5Y2W7W4V7V6V30V3V29
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
IMPSEL#
VSS
VSS
VSS
VSS
VSS
VSS
VSS
AF20
AF23
AF24
AF25
AF26
AF27
AF28
AF29
VSS
COMP6
COMP7
VSS
VSS
VSS
VSS
VSS
VSS
VSS
AE30
AE5
AE7
AF10
AF13
AF16
AF17
VSS
R529X_62R0402
R528 62R0402
RSVD
RSVD
RSVD
MSID[1]
MSID[0]
VSS
VSS
VSS
VSS
VSS
VSS
AF3
AF30
AF6
AF7
AG10
AG13
AG16
RSVD
VSS
6
0D
R530 62R0402
VSS
VSS
VSS
VSS
VSS
VSS
AG17
AG20
AG23
AG24
AG7
VTT_OUT_LEFT [3,4]
V28
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
AH1
AH10
AH13
AH16
AH17
AH20
AH23
AH24
V27
V26
V25
VSS
VSS
VSS
VSS
VSS
VSS
AH3
AH6
AH7
5
MSID1 MSID0 2005 Perf FMB 0 0 2005 Value FMB 0 1
V24
V23U7U1T7T6T3R7R5R30
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
AJ10
AJ13
AJ16
AJ17
AJ20
VSS
VSS
R29
R28
R27
R26
R25
R24
R23R2P7P4P30
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
AJ23
AJ24
AJ27
AJ28
AJ29
AJ30
AJ4
AJ7
AK10
AK13
AK16
AK17
AK2
4
P29
P28
P27
P26
P25
P24
P23N7N6N3M7M1L7L6L30L3L29
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
AK20
AK23
AK24
AK27
AK28
AK29
AK30
AK5
AK7
AL10
AL13
AL16
AL17
AL20
AL23
AL24
AL27
AL28
AL3
AL7
L28
AM1
VSS
VSS
L27
AM10
VSS
VSS
L26
AM13
VSS
VSS
L25
AM16
VSS
VSS
L24
VSS
VSS
AM17
3
L23K7K5
VSS
VSS
VSS
VSS
AM20
AM23
2
H17
H18
H19
H20
H21
H22
H23
H24
H25
H26
H27
H28H3H6H7H8H9J4J7K2
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
AM24
AM27
AM28
AM4
AN1
AN10
AN13
AN16
AN17
AN2
AN20
AN23
AN24
AN27
AN28B1B11
B14
H14
VSS
H13
VSS
H12
VSS
H11
VSS
H10
VSS
G1
VSS
F7
VSS
F4
VSS
F22
VSS
F19
VSS
F16
VSS
F13
VSS
F10
VSS
E8
VSS
E29
VSS
E28
VSS
E27
VSS
E26
VSS
E25
VSS
E20
VSS
E2
VSS
E17
VSS
E14
VSS
E11
VSS
D9
VSS
D6
VSS
D5
VSS
D3
VSS
D24
VSS
D21
VSS
D18
VSS
D15
VSS
D12
VSS
C7
VSS
C4
VSS
C24
VSS
C22
VSS
C19
VSS
C16
VSS
C13
VSS
C10
VSS
B8
VSS
B5
VSS
B24
VSS
B20
VSS
B17
VSS
ZIF-SOCK775-15u
1
HEAT SINK Retention Module
U25
HEATSINK_RM
8
1
5 6 7
A A
16 15 14
13
3
8
7
6
5
9
2
10 11 12
18 19 20
4
17
4
3
MSI
Title
Size Document Number Rev
Date: Sheet
MICRO-STAR INt'L CO., LTD.
Intel LGA775 CPU - GND
(MS-7164)
2
531Thursday, August 18, 2005
of
1
0D
Page 6
8
7
6
V_1P5_CORE
5
4
3
2
1
M34
M38
AA37
M36
AA41
W42
W41
W40
M31 M29
AJ12
M18
J39
K38
J42
K35
J37
N35 R33 N32 N34
N42 N37 N38 R32 R36 U37 R35 R38 V33 U34 U32 V42 U35 Y36 Y38
V32 Y34
V35
F38
D42 U39 U40
E41 D41 K36 G37 E42
U41 P40
U42 V41 Y40
T40
Y43
T43
AJ9 C30
A28 C27 B27
D27 D28
U2A
HA3# HA4# HA5# HA6# HA7# HA8# HA9# HA10# HA11# HA12# HA13# HA14# HA15# HA16# HA17# HA18# HA19# HA20# HA21# HA22# HA23# HA24# HA25# HA26# HA27# HA28# HA29# HA30# HA31#
HAD_STB0# HAD_STB1# HPCREQ#
HBREQ0# HBPRI#
HBNR# HLOCK# HADS# HREQ0#
HREQ1# HREQ2# HREQ3# HREQ4#
HHIT# HHITM# HDEFER#
HTRDY# HDBSY# HDRDY# HEDRDY#
RS0# RS1# RS2#
HCLKP HCLKN
PWROK HCPURST#
RSTIN# ICH_SYNC#
HRCOMP HSCOMP HSWING
HDVREF HACCVREF
N17
P17
P18
P20
P21
AA22
AB21
AB22
AB23
AC22
AD14
AF6
AF7
AF8
AF9
AF10
AF11
AF12
AF13
AF14
AF30
AG2
AG3
AG4
AG5
AG6
AG7
AG8
AG9
AG10
AG11
AG12
AG13
AG14
AH1
AH2
AH4
AJ5
AJ13
AJ14
AK2
AK3
AK4
AK14
AK15
AK20
R15
R17
R18
R20
R21
R23
R24
U15
U17
U18
U19
U20
U21
U22
U23
U24
U25
U26
V15
V17
V18
V19
V20
V21
V22
V23
V25
V27
W17
W18
W19
W20
W22
W24
W26
W27
Y15
VCC
VCC
VCC
VCC
VCC
RSVRD
AA35
AA42
VCC
VCC
RSVRD
RSVRD
AA34
VCC
RSVRD
AA38
VCC
RSVRD
L15
M15
VCC
VCC
RSVRD
RSVRD
U27
R27
VCC
VCC
RSVRD
RSVRD
A43
M11
VCC
VCC
RSVRD
RSVRD
AG25
VCC
RSVRD
AG26
AG27
VCC
VCC
RSVRD
RSVRD
AJ24
VCC
RSVRD
AJ27
AK40
VCC
VCC
RSVRD
RSVRD
AL39
AW17
VCC
VCC
RSVRD
RSVRD
AW18
VCC
RSVRD
AY14
BC16
VCC
VCC
RSVRD
RSVRD
AD30
VCC
RSVRD
AC34
VCC
RSVRD
Y30
Y33
VCC
VCC
RSVRD
RSVRD
AF31
VCC
RSVRD
AD31
U30
VCC
VCC
RSVRD
RSVRD
V31
VCC
RSVRD
AC30
AA30
VCC
VCC
RSVRD
RSVRD
AK21
AJ23
VCC
VCC
RSVRD
RSVRD
AJ26
VCC
RSVRD
AL29
VCC
RSVRD
AL20
VCC
RSVRD
AJ21
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
RSVRD
RSVRD
RSVRD
RSVRD
RSVRD
NCNCNCNCNCNCNCNCNCNCNCNCNCNCNCNCNCNCNCNCNC
AL26
AK27
AJ29
AG29
V30
BC43
BC42
BC2
BC1
BB43
BB2
BB1
BA2
VCC
M17
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
KDINV_0# HDINV_1# HDINV_2# HDINV_3#
HD_STBP0# HD_STBN0#
HD_STBP1# HD_STBN1#
HD_STBP2# HD_STBN2#
HD_STBP3#
VCC
VCC
VCC
VCC
VCC
VCC
VCC
AW26
AW2
AV27
AV26
E35
C42C2B43
B42
B41B3B2
A42
Y17
Y18
Y19
Y21
Y23
Y25
Y27
HD_STBN3#
VCC
VCC
VCC
VCC
VCC
AA15
AA17
AA18
AA19
AA20
V_1P5_CORE
HD0# HD1# HD2# HD3# HD4# HD5# HD6# HD7# HD8#
HD9# HD10# HD11# HD12# HD13# HD14# HD15# HD16# HD17# HD18# HD19# HD20# HD21# HD22# HD23# HD24# HD25# HD26# HD27# HD28# HD29# HD30# HD31# HD32# HD33# HD34# HD35# HD36# HD37# HD38# HD39# HD40# HD41# HD42# HD43# HD44# HD45# HD46# HD47# HD48# HD49# HD50# HD51# HD52# HD53# HD54# HD55# HD56# HD57# HD58# HD59# HD60# HD61# HD62# HD63#
P41 M39 P42 M42 N41 M40 L40 M41 K42 G39 J41 G42 G40 G41 F40 F43 F37 E37 J35 D39 C41 B39 B40 H34 C37 J32 B35 J34 B34 F32 L32 J31 H31 M33 K31 M27 K29 F31 H29 F29 L27 M24 J26 K26 G26 H24 K24 F24 E31 A33 E40 D37 C39 D38 D33 C35 D34 C34 B31 C31 C32 D32 B30 D30
K40 A38 E29 B32
K41 L43
F35 G34
J27 M26
E34 B37
H_D#0 H_D#1 H_D#2 H_D#3 H_D#4 H_D#5 H_D#6 H_D#7 H_D#8 H_D#9 H_D#10 H_D#11 H_D#12 H_D#13 H_D#14 H_D#15 H_D#16 H_D#17 H_D#18 H_D#19 H_D#20 H_D#21 H_D#22 H_D#23 H_D#24 H_D#25 H_D#26 H_D#27 H_D#28 H_D#29 H_D#30 H_D#31 H_D#32 H_D#33 H_D#34 H_D#35 H_D#36 H_D#37 H_D#38 H_D#39 H_D#40 H_D#41 H_D#42 H_D#43 H_D#44 H_D#45 H_D#46 H_D#47 H_D#48 H_D#49 H_D#50 H_D#51 H_D#52 H_D#53 H_D#54 H_D#55 H_D#56 H_D#57 H_D#58 H_D#59 H_D#60 H_D#61 H_D#62 H_D#63
H_DBI#0 H_DBI#1 H_DBI#2 H_DBI#3
H_DSTBP#0 [3] H_DSTBN#0 [3]
H_DSTBP#1 [3] H_DSTBN#1 [3]
H_DSTBP#2 [3] H_DSTBN#2 [3]
H_DSTBP#3 [3] H_DSTBN#3 [3]
H_D#[0..63] [3]
H_DBI#[0..3] [3]
(INTEL-QG82945G-A2-LF)
HRCOMP HSCOMP HSWING
MCH_GTLREF
C10U10Y0805
C10U10Y0805
H_A#3 H_A#4 H_A#5 H_A#6 H_A#7 H_A#8 H_A#9 H_A#10 H_A#11 H_A#12 H_A#13 H_A#14 H_A#15 H_A#16 H_A#17 H_A#18 H_A#19 H_A#20 H_A#21 H_A#22 H_A#23 H_A#24 H_A#25 H_A#26 H_A#27 H_A#28 H_A#29 H_A#30 H_A#31
H_REQ#0 H_REQ#1 H_REQ#2 H_REQ#3 H_REQ#4
H_RS#0 H_RS#1 H_RS#2
H_A#[3..31][3]
D D
H_ADSTB#0[3] H_ADSTB#1[3]
C C
0D change Remove the HPCREQ# and HEDRDY#
B B
V_2P5_MCH
16.9R1%0603 R509
16.9ohm
H_REQ#[0..4][3]
H_DEFER#[3]
H_RS#[0..2][3]
CK_H_MCH#[13]
V_1P5_CORE
C13 C12
H_BR#0[3]
H_BPRI#[3]
H_BNR#[3]
H_LOCK#[3]
H_ADS#[3]
H_HIT#[3]
H_HITM#[3]
H_TRDY#[3] H_DBSY#[3] H_DRDY#[3]
CK_H_MCH[13]
PWR_GD[11,14,25]
H_CPURST#[3,19]
PLTRST#[10,13]
ICH_SYNC#[11]
R508 X_4.7KR
5 mils trace 8 mils space rout in
A A
8
same layer within 750 mils
V_FSB_VTT[3,4,8,12,25]
R507 60.4R1%0402
7
C16 X_C2.2P50N
HD_SWING VOLTAGE "20 MIL TRACE , 10MIL SPACE" HD_SWING S/B 0.22*VTT +/- 2%n
R503 301R1%0402
R504
84.5R1%0603
R502 62R0402
C14 C0.01U50X
PLACE DIVIDER RESISTOR NEAR VTT
6
5
HSWING MCH_GTLREFHSCOMP
0D Change R505 -->124R 0402 R506 -->210R 0402 R500 -->10R 0402 R501 -->0R 0402 R504 -->84.5R 0603 R509 -->16.9R 0603
GTLREF VOLTAGE SHOULD BE 0.63*VTT=0.756V 124 OHM OVER 210 RESISTORS
V_FSB_VTTV_FSB_VTT
R505 124R1%0402
4
R501 0R0402
R506 210R1%0402
C15
R500 10R0402
C0.1U25Y
3
MCH_GTLREF_CPU [3]
MSI
Title
Size Document Number Rev
Date: Sheet
MICRO-STAR INt'L CO., LTD.
Intel Lakeport - CPU Signals
(MS-7164)
2
631Tuesday, August 16, 2005
of
1
0D
Page 7
8
7
6
5
4
3
2
1
M_CHA_DQ[0..63][20]
D D
~M_CHA_CS[0..1]
0,21]
~M_CHA_RAS[20,21] ~M_CHA_CAS[20,21]
~M_CHA_WE[20,21]
M_CHA_MA[0..13]
0,21]
C C
M_CHA_ODT[0..1]
0,21]
M_CHA_BA[0..2][20,21]
M_CHA_DQS0[20]
~M_CHA_DQS0[20]
M_CHA_DQS1[20]
~M_CHA_DQS1[20]
M_CHA_DQS2[20]
~M_CHA_DQS2[20]
M_CHA_DQS3[20]
~M_CHA_DQS3[20]
M_CHA_DQS4[20]
~M_CHA_DQS4[20]
M_CHA_DQS5[20]
~M_CHA_DQS5[20]
M_CHA_DQS6[20]
~M_CHA_DQS6[20]
M_CHA_DQS7[20]
~M_CHA_DQS7[20]
M_CHA_SCK0[20]
~M_CHA_SCK0[20]
B B
M_CHA_SCK1[20]
~M_CHA_SCK1[20]
M_CHA_SCK2[20]
~M_CHA_SCK2[20]
~M_CHA_CS0 ~M_CHA_CS1
~M_CHA_RAS ~M_CHA_CAS ~M_CHA_WE
M_CHA_MA0 M_CHA_MA1 M_CHA_MA2 M_CHA_MA3 M_CHA_MA4 M_CHA_MA5 M_CHA_MA6 M_CHA_MA7 M_CHA_MA8 M_CHA_MA9 M_CHA_MA10 M_CHA_MA11 M_CHA_MA12 M_CHA_MA13
M_CHA_ODT0 M_CHA_ODT1
M_CHA_BA0 M_CHA_BA1 M_CHA_BA2
M_CHA_DQS0 ~M_CHA_DQS0 M_CHA_DQS1 ~M_CHA_DQS1 M_CHA_DQS2 ~M_CHA_DQS2 M_CHA_DQS3 ~M_CHA_DQS3 M_CHA_DQS4 ~M_CHA_DQS4 M_CHA_DQS5 ~M_CHA_DQS5 M_CHA_DQS6 ~M_CHA_DQS6 M_CHA_DQS7 ~M_CHA_DQS7
M_CHA_SCK0 ~M_CHA_SCK0 M_CHA_SCK1
~M_CHA_SCK1 M_CHA_SCK2 ~M_CHA_SCK2
SM_RCOMP_P SM_RCOMP_N SMOCDCOMP1 SMOCDCOMP0
U2B
(INTEL-QG82945G-A2-LF)
BB37 BA39 BA35 AY38
BA34 BA37 BB35
BA32
AW32
BB30 BA30 AY30 BA27 BC28 AY27 AY28 BB27 AY33
AW27
BB26 BC38
AW37
AY39 AY37 BB40
BC33 AY34 BA26
AU4 AR2 BA3
BB4 AY11 BA10 AU18 AR18 AU35 AV35 AP42 AP40 AG42 AG41 AC42 AC41
BB32 AY32
AY5
BB5 AK42 AK41 BA31 BB31
AY6
BA5 AH40 AH43
AL5
AJ6
AJ8
AM3
SACS0# SACS1# SACS2# SACS3#
SARAS# SACAS# SAWE#
SAMA0 SAMA1 SAMA2 SAMA3 SAMA4 SAMA5 SAMA6 SAMA7 SAMA8 SAMA9 SAMA10 SAMA11 SAMA12 SAMA13
SAODT0 SAODT1 SAODT2 SAODT3
SABA0 SABA1 SABA2
SADQS0 SADQS0# SADQS1 SADQS1# SADQS2 SADQS2# SADQS3 SADQS3# SADQS4 SADQS4# SADQS5 SADQS5# SADQS6 SADQS6# SADQS7 SADQS7#
SACLK0 SACLK0# SACLK1 SACLK1# SACLK2 SACLK2# SACLK3 SACLK3# SACLK4 SACLK4# SACLK5 SACLK5#
MCH_SRCOMP0 MCH_SRCOMP1 SMOCDCOMP0 SMOCDCOMP1
M_CHA_DQ0
AP3
M_CHA_DQ3
M_CHA_DQ1
M_CHA_DQ5
M_CHA_DQ8
M_CHA_DQ2
M_CHA_DQ6
M_CHA_DQ4
M_CHA_DQ7
AP2
AU3
AV4
AN1
AP4
AU5
AU2
AW3
SADQ0
SADQ1
SADQ2
SADQ3
SADQ4
SADQ5
SADQ6
SADQ7
SBDQ0
SBDQ1
SBDQ2
SBDQ3
SBDQ4
SBDQ5
AL6
AL8
AP8
AP9
AJ11
AL9
AM10
M_CHA_DQ15
M_CHA_DQ12
M_CHA_DQ14
M_CHA_DQ16
M_CHA_DQ10
M_CHA_DQ9
AY3
BA7
SADQ8
SADQ9
SBDQ6
SBDQ7
AP6
AU7
M_CHA_DQ17
M_CHA_DQ13
M_CHA_DQ18
M_CHA_DQ11
BB7
AV1
SADQ10
SADQ11
SBDQ8
SBDQ9
AV6
AV12
M_CHA_DQ19
AW4
BC6
AY7
AW12
AY10
BA12
BB12
SADQ12
SADQ13
SADQ14
SADQ15
SADQ16
SADQ17
SADQ18
SBDQ10
SBDQ11
SBDQ12
SBDQ13
SBDQ14
SBDQ15
SBDQ16
AM11
AR5
AR7
AR12
AR10
AM15
AM13
M_CHA_DQ26
M_CHA_DQ20
M_CHA_DQ23
M_CHA_DQ22
M_CHA_DQ21
M_CHA_DQ24
M_CHA_DQ25
BA9
BB9
BC11
AY12
AM20
AM18
AV20
SADQ19
SADQ20
SADQ21
SADQ22
SADQ23
SADQ24
SADQ25
SBDQ17
SBDQ18
SBDQ19
SBDQ20
SBDQ21
SBDQ22
SBDQ23
AV15
AM17
AN12
AR13
AP15
AT15
AM24
M_CHA_DQ33
M_CHA_DQ31
M_CHA_DQ28
M_CHA_DQ29
M_CHA_DQ27
AM21
SADQ26
SBDQ24
AM23
M_CHA_DQ34
M_CHA_DQ30
M_CHA_DQ32
AP17
AR17
AP20
AT20
AP32
AV34
AV38
SADQ27
SADQ28
SADQ29
SADQ30
SADQ31
SADQ32
SADQ33
SADQ34
SBDQ25
SBDQ26
SBDQ27
SBDQ28
SBDQ29
SBDQ30
SBDQ31
SBDQ32
AV24
AM26
AP21
AR21
AP24
AT24
AU27
M_CHA_CKE[0..1][20,21]
M_CHA_DQ42
M_CHA_DQ40
M_CHA_DQ37
M_CHA_DQ36
M_CHA_DQ38
M_CHA_DQ35
AU39
AV32
AT32
AR34
SADQ35
SADQ36
SADQ37
SBDQ33
SBDQ34
SBDQ35
AN29
AR31
AM31
AP27
M_CHA_DQ45
M_CHA_DQ44
M_CHA_DQ39
M_CHA_DQ41
AU37
AR41
AR42
AN43
SADQ38
SADQ39
SADQ40
SADQ41
SBDQ36
SBDQ37
SBDQ38
SBDQ39
AR27
AP31
AU31
AP35
M_CHA_DQ49
M_CHA_DQ46
M_CHA_DQ47
M_CHA_DQ43
M_CHA_DQ48
AM40
AU41
AU42
AP41
AN40
AL41
AL42
SADQ42
SADQ43
SADQ44
SADQ45
SADQ46
SADQ47
SADQ48
SBDQ40
SBDQ41
SBDQ42
SBDQ43
SBDQ44
SBDQ45
SBDQ46
AP37
AN32
AL35
AR35
AU38
AM38
AM34
M_CHA_DM[0..7][20]
M_CHA_DM2
M_CHA_DM6
M_CHA_DM1
M_CHA_DM7
M_CHA_DM4
M_CHA_DM5
BA25
SACKE3
SBCKE1
AY16
BA13
M_CHA_DM0
AR3
SBCKE2
SBCKE3
BB13
M_CHA_DM3
AC40
AG40
AP39
AT34
AP18
BB10
AY2
SADM2
SADM1
SADM0
SBDM6
SBDM7
AJ39
AD39
SBCS0# SBCS1# SBCS2#
SADM7
SADM6
SADM5
SADM4
SADM3
SBCS3#
SBRAS# SBCAS#
SBWE#
SBMA0 SBMA1 SBMA2 SBMA3 SBMA4 SBMA5 SBMA6 SBMA7 SBMA8
SBMA9 SBMA10 SBMA11 SBMA12 SBMA13
SBODT0 SBODT1 SBODT2 SBODT3
SBBA0
SBBA1
SBBA2 SBDQS0
SBDQS0#
SBDQS1
SBDQS1#
SBDQS2
SBDQS2#
SBDQS3
SBDQS3#
SBDQS4
SBDQS4#
SBDQS5
SBDQS5#
SBDQS6
SBDQS6#
SBDQS7
SBDQS7#
SBCLK0
SBCLK0#
SBCLK1
SBCLK1#
SBCLK2
SBCLK2#
SBCLK3
SBCLK3#
SBCLK4
SBCLK4#
SBCLK5
SBCLK5#
SMVREF1 SMVREF0
SBDM0
SBDM1
SBDM2
SBDM3
SBDM4
SBDM5
AL11
AW7
AP13
AP23
AR29
AR38
~M_CHB_CS0
BA40
~M_CHB_CS1
AW41 BA41 AW40
~M_CHB_RAS
BA23
~M_CHB_CAS
AY24
~M_CHB_WE
BB23
M_CHB_MA0
BB22
M_CHB_MA1
BB21
M_CHB_MA2
BA21
M_CHB_MA3
AY21
M_CHB_MA4
BC20
M_CHB_MA5
AY19
M_CHB_MA6
AY20
M_CHB_MA7
BA18
M_CHB_MA8
BA19
M_CHB_MA9
BB18
M_CHB_MA10
BA22
M_CHB_MA11
BB17
M_CHB_MA12
BA17
M_CHB_MA13
AW42
M_CHB_ODT0
AY42
M_CHB_ODT1
AV40 AV43 AU40
M_CHB_BA0
AW23
M_CHB_BA1
AY23
M_CHB_BA2
AY17
M_CHB_DQS0
AM8
~M_CHB_DQS0
AM6
M_CHB_DQS1
AV7
~M_CHB_DQS1
AR9
M_CHB_DQS2
AV13
~M_CHB_DQS2
AT13
M_CHB_DQS3
AU23
~M_CHB_DQS3
AR23
M_CHB_DQS4
AT29
~M_CHB_DQS4
AV29
M_CHB_DQS5
AP36
~M_CHB_DQS5
AM35
M_CHB_DQS6
AG34
~M_CHB_DQS6
AG32
M_CHB_DQS7
AD36
~M_CHB_DQS7
AD38
M_CHB_SCK0
AM29
~M_CHB_SCK0
AM27
M_CHB_SCK1
AV9
~M_CHB_SCK1
AW9
M_CHB_SCK2
AL38
~M_CHB_SCK2
AL36 AP26 AR26 AU10 AT10 AJ38 AJ36
SM_VREF SM_VREF
AM2
SM_VREF
AM4
PLACE 0.1UF CAP CLOSE TO MCH
~M_CHB_RAS [20,21] ~M_CHB_CAS [20,21] ~M_CHB_WE [20,21]
~M_CHB_CS[0..1] [20,21]
M_CHB_MA[0..13] [20,21]
M_CHB_ODT[0..1] [20,21]
M_CHB_BA[0..2] [20,21]
M_CHB_DQS0 [20] ~M_CHB_DQS0 [20] M_CHB_DQS1 [20] ~M_CHB_DQS1 [20] M_CHB_DQS2 [20] ~M_CHB_DQS2 [20] M_CHB_DQS3 [20] ~M_CHB_DQS3 [20] M_CHB_DQS4 [20] ~M_CHB_DQS4 [20] M_CHB_DQS5 [20] ~M_CHB_DQS5 [20] M_CHB_DQS6 [20] ~M_CHB_DQS6 [20] M_CHB_DQS7 [20] ~M_CHB_DQS7 [20]
M_CHB_SCK0 [20] ~M_CHB_SCK0 [20] M_CHB_SCK1 [20] ~M_CHB_SCK1 [20] M_CHB_SCK2 [20] ~M_CHB_SCK2 [20]
C19 C0.1U25Y
M_CHA_DQ53
M_CHA_DQ58
M_CHA_DQ57
M_CHA_DQ55
M_CHA_DQ51
M_CHA_DQ50
M_CHA_DQ54
M_CHA_DQ59
M_CHA_DQ56
M_CHA_DQ52
AF39
AE40
AM41
AM42
AF41
AF42
AD40
AD43
AA39
AA40
SADQ49
SADQ50
SADQ51
SADQ52
SADQ53
SADQ54
SADQ55
SADQ56
SADQ57
SADQ58
SBDQ47
SBDQ48
SBDQ49
SBDQ50
SBDQ51
SBDQ52
SBDQ53
SBDQ54
SBDQ55
SBDQ56
AL34
AJ34
AF32
AF34
AL31
AJ32
AG35
AD32
AC32
AD34
M_CHA_CKE1
M_CHA_DQ63
M_CHA_CKE0
M_CHA_DQ60
M_CHA_DQ61
M_CHA_DQ62
AE42
AE41
AB41
AB42
BB25
AY25
BC24
SADQ59
SADQ60
SADQ61
SADQ62
SADQ63
SACKE0
SACKE1
SACKE2
SBDQ57
SBDQ58
SBDQ59
SBDQ60
SBDQ61
SBDQ62
SBDQ63
SBCKE0
Y32
AA32
AF35
AF37
AC33
AC35
BA14
U41
X1
MCH
X7 X8
Heatsink
X2
E31-0401730-K08
CPU STRAPPING RESISTORS
ALL COMPONENTS CLOSE TO CPU
R37
80.6R1%0402
C17
0D change
C0.1U25Y
Swap SM_RCOMP_P and SM_RCOMP_N
R41 80.6R1%0402
R38 40.2R1%0402
R42 40.2R1%0402
R40 1KR1%0402
SM_RCOMP_P
SM_RCOMP_N
SMOCDCOMP1
SMOCDCOMP0
R39 1KR1%0402
PLACE CLOSE TO MCH
C18 C0.1U25Y
V_SM
V_SM
M_CHB_DQ24
M_CHB_DQ20
M_CHB_DQ10
M_CHB_DQ14
M_CHB_DQ11
M_CHB_DQ13
M_CHB_DQ5
M_CHB_DQ4
M_CHB_DQ1
M_CHB_DQ2
M_CHB_DQ3
A A
8
M_CHB_DQ[0..63][20]
M_CHB_DQ0
7
M_CHB_DQ12
M_CHB_DQ9
M_CHB_DQ7
M_CHB_DQ8
M_CHB_DQ6
M_CHB_DQ21
M_CHB_DQ18
M_CHB_DQ15
M_CHB_DQ16
M_CHB_DQ23
M_CHB_DQ17
M_CHB_DQ25
M_CHB_DQ22
M_CHB_DQ19
6
M_CHB_DQ32
M_CHB_DQ28
M_CHB_DQ27
M_CHB_DQ26
M_CHB_DQ31
M_CHB_DQ29
M_CHB_DQ33
M_CHB_DQ30
M_CHB_DQ40
M_CHB_DQ34
M_CHB_DQ39
M_CHB_DQ38
M_CHB_DQ37
M_CHB_DQ35
M_CHB_DQ36
M_CHB_DQ46
M_CHB_DQ42
M_CHB_DQ44
M_CHB_DQ43
M_CHB_DQ41
5
M_CHB_DQ48
M_CHB_DQ47
M_CHB_DQ45
M_CHB_DQ55
M_CHB_DQ52
M_CHB_DQ53
M_CHB_DQ49
M_CHB_DQ50
M_CHB_CKE[0..1][20,21]
M_CHB_DQ57
M_CHB_DQ56
M_CHB_DQ51
M_CHB_DQ58
M_CHB_DQ54
M_CHB_DM[0..7][20]
M_CHB_CKE0
M_CHB_DQ61
M_CHB_DQ59
M_CHB_CKE1
M_CHB_DQ63
M_CHB_DQ60
M_CHB_DQ62
4
M_CHB_DM1
M_CHB_DM0
M_CHB_DM3
M_CHB_DM2
M_CHB_DM7
M_CHB_DM6
M_CHB_DM5
M_CHB_DM4
Title
Size Document Number Rev
3
Date: Sheet
MICRO-STAR INt'L CO., LTD .
Intel Lakeport - CPU Signals
(MS-7164)
2
731Tuesday, August 16, 2005
1
0D
of
Page 8
8
D D
V_1P5_CORE
EXP_EN
State Description
C C
0D Add R847,R848 for SDVO function
B B
Only SDVO or PCI-e
LOW
operating SDVO and PCI-e
HIGH
operating simultaneously
SDVO_CTRL_DATA[17] SDVO_CTRL_CLK[17]
BSEL
2
1
0
0
0
0
1
V_2P5_MCH
V_2P5_MCH
V_2P5_MCH
0
00
1
0
SDVO_CTRL_DATA SDVO_CTRL_CLK
H_FSBSEL0[3,13] H_FSBSEL1[3,13]
H_FSBSEL2[3,13]
TABLE
PSB FREQUENCY
RESERVED
133 MHZ (533)
200 MHZ (800)
R840 0R0805
CK_PE_100M_MCH[13] CK_PE_100M_MCH#[13]
R847 X_4.7KR0402 R44 _220R0402-1 R45 _220R0402-1 R848 X_4.7KR0402
H_FSBSEL0 H_FSBSEL1 BSEL1
H_FSBSEL2
EXP_SLR (R46 and Normal high)
State Description
GMCH's PCI-E lane
LOW
Numbers are reversed(for BTX)
Normal operation(for ATX)HIGH
V_1P5_CORE
A A
V_1P5_CORE
8
7
V_1P5_CORE
+
C31 C36 C10U10Y0805 C44 C0.1U25Y
C57 X_C0.01U50X
EXP_A_RXP_13[17] EXP_A_RXN_13[17] EXP_A_RXP_14[17] EXP_A_RXN_14[17]
DMI_ITP_MRP_0[10] DMI_ITN_MRN_0[10] DMI_ITP_MRP_1[10] DMI_ITN_MRN_1[10] DMI_ITP_MRP_2[10] DMI_ITN_MRN_2[10] DMI_ITP_MRP_3[10] DMI_ITN_MRN_3[10]
R46 X_1KR0402
VCCADAC
C529 X_C10U10Y0805
R53 X_1KR0402 R54 1KR0402
7 8 5 6 3 4 1 2
8P4R-10KR0402
C30 C0.1U25Y
R841 0R0805
R843 0R0805
7
V_1P5_CORE
EC3 _CD470U10EL11-2
C10U10Y0805
C58 X_C0.1U25Y
EXP_A_RXP_13 EXP_A_RXN_13 EXP_A_RXP_14 EXP_A_RXN_14
DMI_ITP_MRP_0 DMI_ITN_MRN_0 DMI_ITP_MRP_1 DMI_ITN_MRN_1 DMI_ITP_MRP_2 DMI_ITN_MRN_2 DMI_ITP_MRP_3 DMI_ITN_MRN_3
CK_PE_100M_MCH CK_PE_100M_MCH#
RN7
V_2P5_MCH
C530 C0.1U25Y
(INTEL-QG82945G-A2-LF)
BSEL0 BSEL2
EXP_SLR
VCCA_HPLLVCCA_HPLL VCCA_MPLL VCCA_DPLLA VCCA_DPLLB VCCA_GPLL
V_FSB_VTT
C37 X_C0.22U16Y
U2C
G12
EXPARXP0
F12
EXPARXN0
D11
EXPARXP1
D12
EXPARXN1
J13
EXPARXP2
H13
EXPARXN2
E10
EXPARXP3
F10
EXPARXN3
J9
EXPARXP4
H10
EXPARXN4
F7
EXPARXP5
F9
EXPARXN5
C4
EXPARXP6
D3
EXPARXN6
G6
EXPARXP7
J6
EXPARXN7
K9
EXPARXP8
K8
EXPARXN8
F4
EXPARXP9
G4
EXPARXN9
M6
EXPARXP10 / SDVOC_INT+
M7
EXPARXN10 / SDVOC_INT-
K2
EXPARXP11
L1
EXPARXN11
U11
EXPARXP12
U10
EXPARXN12
R8
EXPARXP13 / SDVO_STALL+
R7
EXPARXN13 / SDVO_STALL-
P4
EXPARXP14 / SDVOB_INT+
N3
EXPARXN14 / SDVOB_INT-
Y10
EXPARXP15 / SDVO_TVCLKIN+
Y11
EXPARXN15 / SDVO_TVCLKIN+
F20
EXP_EN
Y7
DMI RXP0
Y8
DMI RXN0
AA9
DMI RXP1
AA10
DMI RXN1
AA6
DMI RXP2
AA7
DMI RXN2
AC9
DMI RXP3
AC8
DMI RXN3
B14
GCLKP
B16
GCLKN
F15
SDVOCTRLDATA
E15
SDVOCTRLCLK
F21
BSEL0
H21
BSEL1
L20
BSEL2
AK17
RSV_TP[0]
AL17
RSV_TP[1]
K21
EXP_SLR
AK23
RSV_TP[2]
AK18
RSV_TP[3]
L21
RSV_TP[4]
L18
RSV_TP[5]
N21
RSV_TP[6]
C21
VCCAHPLL
B20
VCCAMPLL
C19
VCCADPLLA
B19
VCCADPLLB
B17
VCCA_EXPPLL
D19
VCC2
C18
VCCADAC
B18
VCCADAC
A18
VSSA_DAC
C29
C28
C0.1U25Y
X_C0.1U25Y
C32 X_C10U10Y0805
C38 X_C10U10Y0805
I=45mA
VCCA_HPLL
I=60mA
VCCA_MPLL
6
V_1P5_CORE
AA26
AB17
AA24
VCC
VCC
VCC
VTT
VTT
B23
A24
C33 C0.1U25Y
C39 C0.1U25Y
6
AB18
AB19
AB20
AB24
VCC
VCC
VCC
VTT
VTT
VTT
B24
B25
B26
C23
V_FSB_VTT[3,4,6,12,25]
V_1P5_CORE
V_1P5_CORE
VCC
VTT
AB25
C25
AB26
VCC
VTT
C26
VCC
VTT
AB27
AC15
VCC
VTT
D24
D23
AC17
AC18
AC20
AC24
VCC
VCC
VCC
VCC
VTT
VTT
VTT
VTT
D25
E23
E24
E26
R842 0R0805
R844 0R0805
VCC
VTT
AC26
E27
AC27
VCC
VTT
F23
AD17
AD15
VCC
VCC
VTT
VTT
F27
G23
V_FSB_VTT
VCC
VTT
5
V_SM
AE20
AD23
AD25
AD26
AE17
AE18
AE22
AE24
AE26
AE27
VCC
VTT
AF15
VCC
VCC
VCC
VCC
VCC
VCC
VTT
VCC
VCC
P23
AF21
AF23
AF25
AD19
AD21
VCC
VCC
VCC
VCC
VCC
VTT
VTT
VTT
VTT
VTT
J23
K23
L23
M23
N23
H23
VCC
VCC
AF17
VCC
VCC
AF26
AY43
AF19
VCC
VCCSM
VCC
VCC
VCC
AF27
AF29
AG15
V_1P5_CORE
AV18
VCCSM
VCC
AG17
AV21
VCCSM
VCC
AG18
AV23
VCCSM
VCC
AG19
I=55mA
VCCA_DPLLA
C34
X_C10U10Y0805
VCCA_DPLLB
C40
X_C10U10Y0805
5
I=55mA
C35 C0.1U25Y
C41 C0.1U25Y
V_1P5_CORE
ANALOG FILTERS
V_1P5_CORE
AV31
VCCSM
VCC
AG20
AV42
AW13
VCCSM
VCC
AG21
AG22
AW20
AW15
VCCSM
VCCSM
VCC
VCC
AG23
AG24
AW21
VCCSM
VCCSM
VCC
VCC
AJ15
4
AW24
VCCSM
VCC
AJ17
4
AY41
AW29
AW34
AW35
AW31
VCCSM
VCCSM
VCCSM
VCCSM
VCC
VCC
AJ18
AJ20
R51 1R1% R52 1R1%
L21
0R1210
BB16
BB20
BB24
BB28
VCCSM
VCCSM
VCCSM
VCCSM
VCC_EXP
VCC_EXP
AE4
AE3
AE2
C521
C10U10Y0805
BB33
BB38
BB42
BC13
VCCSM
VCCSM
VCCSM
VCCSM
VCC_EXP
VCC_EXP
VCC_EXP
VCC_EXP
AD12
AD10
AD8
AD6
I=45mA
VCCA_GPLL
C42
X_C10U10Y0805
Ver 0C
BC26
BC31
BC18
BC22
VCCSM
VCCSM
VCCSM
VCCSM
VCC_EXP
VCC_EXP
VCC_EXP
VCC_EXP
AD5
AD4
AD2
AD1
VCC_EXP
C522
C10U10Y0805
3
VCC_EXP
BC35
N5
BC40
VCCSM
VCCSM
VCCSM
VCC_EXP
SDVOB_ALPHA+ / SDVOC_R+ / EXPATXP11
SDVOB_ALPHA- / SDVOC_R- / EXPATXN11
VCC_EXP
VCC_EXP
VCC_EXP
VCC_EXP
VCC_EXP
AC13
AC6
AC5
AA13
AA5
C43 C0.1U25Y
C523
C10U10Y0805
N10N9N7
VCC_EXP
VCC_EXP
VCC_EXP
VCC_EXP
Y13
V13V9V10V7V6
3
VCC_EXP
VCC_EXP
N11
VCC_EXP
VCC_EXP
VCC_EXP
VCC_EXP
R11
R10R5N12
VCC_EXP
VCC_EXP
VCC_EXP
SDVOC_CLK+ / EXPATXP8 SDVOC_CLK+ / EXPATXN8
SDVOC_B+ / EXPATXP9
SDVOC_B- / EXPATXN9 SDVOC_G+ / EXPATXP10 SDVOC_G- / EXPATXN10
SDVOB_CLK+ / EXPATXP12 SDVOB_CLK- / EXPATXN12
SDVOB_B+ / EXPATXP13
SDVOB_B- / EXPATXN13 SDVOB_G+ / EXPATXP14 SDVOB_G- / EXPATXN14 SDVOB_R+ / EXPATXP15
SDVOB_R- / EXPATXN15
VCC_EXP
VCC_EXP
VCC_EXP
V5
VCC_EXP
VCC_EXP
VCC_EXP
VCC_EXP
U13U8U7U6R13
VCC_EXP
VCC_EXP
EXPATXP0 EXPATXN0 EXPATXP1 EXPATXN1 EXPATXP2 EXPATXN2 EXPATXP3 EXPATXN3 EXPATXP4 EXPATXN4 EXPATXP5 EXPATXN5 EXPATXP6 EXPATXN6 EXPATXP7 EXPATXN7
DMI TXP0 DMI TXN0 DMI TXP1 DMI TXN1 DMI TXP2 DMI TXN2 DMI TXP3 DMI TXN3
EXP_COMPO
EXP_COMPI
HSYNC VSYNC
GREEN
GREENB
DDC_DATA
DDC_CLK
DREFCLKINP DREFCLKINN
EXTTS#
XORTEST
ALLZTEST
2
V_SM
C20 C10U10Y0805 C22 C10U10Y0805 C24 C10U10Y0805 C26 C10U10Y0805
V_SM
C21 C10U10Y0805 C23 C10U10Y0805 C25 X_C10U10Y0805 C27 X_C10U10Y0805
R43 24.9R1%
CRT_HSYNC CRT_VSYNC
CRT_R CRT_G CRT_B
R48 255R1% R49 10KR
EXP_A_TXP_12 [17] EXP_A_TXN_12 [17] EXP_A_TXP_13 [17] EXP_A_TXN_13 [17] EXP_A_TXP_14 [17] EXP_A_TXN_14 [17] EXP_A_TXP_15 [17] EXP_A_TXN_15 [17]
DMI_MTP_IRP_0 [10] DMI_MTN_IRN_0 [10] DMI_MTP_IRP_1 [10] DMI_MTN_IRN_1 [10] DMI_MTP_IRP_2 [10] DMI_MTN_IRN_2 [10] DMI_MTP_IRP_3 [10] DMI_MTN_IRN_3 [10]
V_1P5_CORE
CRT_HSYNC [15] CRT_VSYNC [15]
CRT_R [15] CRT_G [15] CRT_B [15]
3VDDCDA [15] 3VDDCCL [15]
DOT_96M [13]
-DOT_96M [13]
V_2P5_MCH
TESTIN# [19]
RED BLUE RED#
BLUE#
IREF
D14 C13 A13 B12 A11 B10 C10 C9 A9 B7 D7 D6 A6 B5 E2 F1 G2 J1 J3 K4 L4 M4 M2 N1 P2 T1 T4 U4 U2 V1 V3 W4
W2 Y1 AA2 AB1 Y4 AA4 AB3 AC4
AC12 AC11
D17 C17
F17 K17 H18
G17 J17 J18
N18 N20
J15 H15
A20 J20 H20 K18
EXP_A_TXP_12 EXP_A_TXN_12 EXP_A_TXP_13 EXP_A_TXN_13 EXP_A_TXP_14 EXP_A_TXN_14 EXP_A_TXP_15 EXP_A_TXN_15
DMI_MTP_IRP_0 DMI_MTN_IRN_0 DMI_MTP_IRP_1 DMI_MTN_IRN_1 DMI_MTP_IRP_2 DMI_MTN_IRN_2 DMI_MTP_IRP_3 DMI_MTN_IRN_3
GRCOMP
3VDDCDA 3VDDCCL
DOT_96M
-DOT_96M
EXTTS
MICRO-STAR INt'L CO., LTD.
Title
Intel Lakeport - CPU Signals
Size Document Number Rev
Date: Sheet
2
(MS-7164)
1
DMI Differential impedance 100ohm +-20%
GROMP trace 20mils
831Wednesday, August 17, 2005
of
1
0D
Page 9
8
7
6
5
4
3
2
1
(INTEL-QG82945G-A2-LF)
D D
C C
B B
U2D
G10 G13 G15 G18 G20 G21 G24 G27 G29 G31 G32 G35 G38 H12 H17 H26 H27 H32
A16 A22 A26 A31 A35
B11 B13 B21 B22 B28 B33 B38
C12 C14 C22 C40
D10 D16 D20 D21
E12 E13 E17 E18 E20 E21 E32
F13 F18 F26 F34 F42
J10
AL37
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS VSS VSS VSS VSS VSS
B4
VSS
B6
VSS
B9
VSS VSS VSS VSS VSS VSS VSS VSS
C3
VSS
C5
VSS
C7
VSS VSS VSS VSS VSS
D2
VSS
D5
VSS VSS VSS VSS VSS
E3
VSS
E4
VSS
E7
VSS
E9
VSS VSS VSS VSS VSS VSS VSS VSS
F2
VSS
F6
VSS VSS VSS VSS VSS VSS
G3
VSS
G5
VSS
G7
VSS
G9
VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS
J2
VSS
J5
VSS
J7
VSS VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
J12
J21
J24
J43
J38
J29
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
K20
K15
K13
K12
K10K7K6K5K3
K34
K32
K27
VSS
VSS
AP5
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
L29
L26
L24
L13
L12L2K39
K37
VSS
VSS
VSS
VSS
VSS
L31
L42
VSS
VSS
VSS
VSS
VSS
VSS
M35
M21
M20
M13
M10M9M8M5M3
VSS
VSS
VSS
VSS
VSS
M37
N24
N15
N13N8N6
N2
VSS
VSS
VSS
VSS
VSS
VSS
VSS
N36
N33
N31
N29
N27
N26
VSS
VSS
VSS
VSS
VSS
VSS
P24
P15
P14P3N43
N39
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
R9R6P30
P29
P27
P26
R12
R14
R30
R31
R34
R37
R39T2T42U3U5U9U12
U14
U31
U33
U36
U38V2V8
V11
V12
V14
V34
V36
V37
V38
V39
V43W3Y2Y5Y6Y9Y12
Y14
Y31
Y35
Y37
Y39
VSS
VSS
AF20
AF22
AF24
AY1
BC4
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
AL33
VSS
AL32
VSS
AL27
VSS
AL24
VSS
AL23
VSS
AL21
VSS
AL18
VSS
AL15
VSS
AL13
VSS
AL12
VSS
AL10
VSS
AL7
VSS
AL3
VSS
AL2
VSS
AL1
VSS
AK30
VSS
AK29
VSS
AK26
VSS
AK24
VSS
AJ37
VSS
AJ35
VSS
AJ33
VSS
AJ31
VSS
AJ30
VSS
AJ10
VSS
AJ7
VSS
AH42
VSS
AG39
VSS
AG38
VSS
AG37
VSS
AG36
VSS
AG33
VSS
AG31
VSS
AG30
VSS
AF43
VSS
AF38
VSS
AF36
VSS
AF33
VSS
AF5
VSS
AF3
VSS
AF2
VSS
AF1
VSS
AD42
VSS
AD37
VSS
AD35
VSS
AD33
VSS
AD13
VSS
AD11
VSS
AD9
VSS
AD7
VSS
AC39
VSS
AC38
VSS
AC37
VSS
AC36
VSS
AC31
VSS
AC23
VSS
AC21
VSS
AC14
VSS
AC10
VSS
AC7
VSS
AC3
VSS
AC2
VSS
AB43
VSS
AB2
VSS
AA36
VSS
AA33
VSS
AA31
VSS
AA23
VSS
AA21
VSS
AA14
VSS
AA12
VSS
AA11
VSS
VSS
VSS
VSS
VSS
AA8
VSS
VSS
AF18
AE21
AE23
AE25
L17
VSS
VSS
Y42
AA3
AE19
AD29
AD27
AD24
AD22
AD20
AD18
AC29
AC25
AC19
AA29
AA27
AA25
Y29
Y26
Y24
Y22
Y20
W25
W23
W21
V29
V26
V24
U29
R29
R26
D43D1A40A4BC9
BB41
BB39
BB34
BB19
BB14
BB11
BB6
BB3
BA42
BA4
AW10
AV37
AV17
AV10
AV2
AU34
AU32
AU29
AU26
AU24
AU21
AU20
AU17
AU15
AU13
AU12
AU9
AU6
AT31
AT27
AT26
AT23
AT21
AT18
AT17
AT12
AR43
AR39
AR37
AR32
AR24
AR20
AR15
AR6
AR1
AP38
AP34
AP29
AP12
AP10
AP7
AN42
AN31
AN27
AN26
AN24
AN23
AN21
AN20
AN18
AN17
AN15
AN13
AN4
AN2
AM39
AM37
AM36
AM33
AM9
AM7
AM5
AL43
A A
MSI
Title
Size Document Number Rev
8
7
6
5
4
3
Date: Sheet
MICRO-STAR INt'L CO., LTD.
Intel Lakeport - CPU Signals
(MS-7164)
2
931Tuesday, August 16, 2005
0D
of
1
Page 10
8
D D
C C
ICH_PCLK[13]
PCIRST_ICH7#[25]
B B
TP1Testing Point TP2Testing Point
VCC3_SB
SPI_MOSI[18]
A A
SPI_MISO[18] SPI_CS#[18]
SPI_CLK[18] SPI_ARB[18]
8
7
AD[0..31][17]
C_BE#[0..3][17]
DEVSEL#[17]
FRAME#[17]
TRDY#[17]
STOP#[17] LOCK#[17]
SERR#[17] PERR#[17]
PCI_PME#[17]
PREQ#0[17] PREQ#1[17] PREQ#2[17] PREQ#3[17] PREQ#4[17] PREQ#5[17]
PGNT#1[17] PGNT#2[17]
R838 X_10KR0402 R839 X_10KR0402
PIRQ#A[17] PIRQ#B[17] PIRQ#C[17] PIRQ#D[17] PIRQ#E[17] PIRQ#F[17] PIRQ#G[17] PIRQ#H[17]
SERIRQ[14] IDE_IRQ[22]
R540 X_10KR R541 X_10KR R542 X_10KR
SPI_MOSI
R543 X_0R0402
SPI_MISO
R544 X_0R0402 R545 X_0R0402
SPI_CS# SPI_CLK
R546 X_0R0402
SPI_ARB
7
6
U3A (INTEL-NH82801GB-A1-LF)
AD0
E18 C18 A16 F18 E16 A18 E17 A17 A15 C14 E14 D14 B12 C13 G15 G13 E12 C11 D11 A11 A10 F11 F10
B15 C12 D12 C15
A12 F16
F14 F15 E10 E11 B10
B19
B18
C16 C17 E13 A13
D16 D17 F13 A14
AH21 AH16
E9 D9 B9 A8 A6 C7 B6 E6 D6
A7
C9
A9
D7
C8
E7
D8 A3
B4 C5 B5 G8 F7 F8 G7
P5 P2 P6 R2 P1
AD0 AD1 AD2 AD3 AD4 AD5 AD6 AD7 AD8 AD9 AD10 AD11 AD12 AD13 AD14 AD15 AD16 AD17 AD18 AD19 AD20 AD21 AD22 AD23 AD24 AD25 AD26 AD27 AD28 AD29 AD30 AD31
C/BE0# C/BE1# C/BE2# C/BE3#
DEVSEL# FRAME# IRDY# TRDY# STOP# PAR PLOCK# SERR# PERR# PME#
PCICLK PCIRST#
REQ0# REQ1# REQ2# REQ3# GPIO22/REQ4# GPIO1/REQ5#
GNT0# GNT1# GNT2# GNT3# GPIO48/GNT4# GPIO17/GNT5#
PIRQA# PIRQB# PIRQC# PIRQD# GPIO2/PIRQE# GPIO3/PIRQF# GPIO4/PIRQG# GPIO5/PIRQH#
SERIRQ IDEIRQ
SPI_MOSI SPI_MISO SPI_CS# SPI_CLK SPI_ARB
VSS_0
VSS_1
VSS_2
A4
A23B1B8
6
PCI INTERFACE INTERRUPT
PART 1/3
SPI
VSS_3
VSS_4
VSS_5
VSS_6
VSS_7
VSS_8
VSS_9
VSS_10
VSS_11
VSS_12
B11
B14
B17
B20
B26
B28C2C6
D10
D13
AD1 AD2 AD3 AD4 AD5 AD6 AD7 AD8 AD9 AD10 AD11 AD12 AD13 AD14 AD15 AD16 AD17 AD18 AD19 AD20 AD21 AD22 AD23 AD24 AD25 AD26 AD27 AD28 AD29 AD30 AD31
C_BE#0 C_BE#1 C_BE#2 C_BE#3
IRDY#[17]
PAR[17]
PREQ#0 PREQ#1 PREQ#2 PREQ#3 PREQ#4 PREQ#5
PGNT#1 PGNT#2
GPIO48 GPIO17
5
ICH 7
VSS_13
VSS_14
VSS_15
VSS_16
VSS_17
VSS_18
VSS_19
D18
D21
D24E1E2E8E15F3F4F5F12
5
4
AH28
A20M#
AG27
CPUSLP#
AG26
FERR#
AG22
IGNNE#
AF22
INIT#
AG21
INIT3_3V#
AF25
INTR
AH24
NMI
AF23
SMI#
AH22
STPCLK#
AG23
RCIN#
AE22
CPULAN PCI EXPRESSDIRECT MEDIA
VSS_20
VSS_21
VSS_22
VSS_23
VSS_24
VSS_25
VSS_26
VSS_27
VSS_28
VSS_29
VSS_30
VSS_31
VSS_32
VSS_33
VSS_34
F27
F28G1G2G5G6G9G14
G18
G21
A20GATE
THRMTRIP#
GPO49/CPUPWRGD
PLTRST#
PERN_1
PERP_1 PETN_1 PETP_1
PERN_2 PERP_2 PETN_2
PETP_2
PERN_3 PERP_3 PETN_3
PETP_3
PERN_4 PERP_4 PETN_4
PETP_4
PERN_5 PERP_5 PETN_5
PETP_5
PERN_6 PERP_6 PETN_6
PETP_6
DMI_0RXN DMI_0RXP DMI_0TXN
DMI_0TXP
DMI_1RXN DMI_1RXP DMI_1TXN
DMI_1TXP
DMI_2RXN DMI_2RXP DMI_2TXN
DMI_2TXP
DMI_3RXN DMI_3RXP DMI_3TXN
DMI_3TXP
DMI_CLKN DMI_CLKP
DMI_ZCOMP
DMI_IRCOMP
LAN_CLK
LAN_RSTSYNC
LAN_RXD0 LAN_RXD1 LAN_RXD2
LAN_TXD0 LAN_TXD1 LAN_TXD2
EE_DIN
EE_DOUT
EE_SHCLK
VSS_35
VSS_36
VSS_37
VSS_38
VSS_39
VSS_40
G24
G25
G26H3H4
H5
4
EE_CS
AF26 AG24
C26 F26
F25 E28
ICHPETP_1 ICH_PETP_1
E27 H26
H25
ICHPETN_2
G28
ICHPETP_2
G27 K26
K25 J28 J27
M26 M25 L28 L27
P26 P25 N28 N27
T25 T24 R28 R27
V26 V25 U28 U27
Y26 Y25 W28 W27
AB26 AB25 AA28 AA27
AD25 AD24 AC28 AC27
AE28 AE27
DMI_BIAS
C25 D25
PLACE THE RESISTOR WHIN 5MILS
V3 U3 U5 V4 T5
U7 V6 V7
W1 W3 Y2 Y1
3
R548 22R0402
C471 C0.1U16X C472 C0.1U16X
C473 C0.1U16X C474 C0.1U16X
R547 24.9R1%
3
2
H_A20M# [3] H_FERR# [3,4]
H_IGNNE# [3] H_INIT# [3] FWH_INIT# [13] H_INTR [3] H_NMI [3] ICH_H_SMI# [3,14] H_STPCLK# [3] KBRST# [14] A20GATE [14] TRMTRIP# [3,4,14] H_PWRGD [3,19]
ICH_PERN_1 ICH_PERP_1 ICH_PETN_1ICHPETN_1
ICH_PERN_2 ICH_PERP_2 ICH_PETN_2 ICH_PETP_2
DMI_MTN_IRN_0 [8] DMI_MTP_IRP_0 [8] DMI_ITN_MRN_0 [8] DMI_ITP_MRP_0 [8]
DMI_MTN_IRN_1 [8] DMI_MTP_IRP_1 [8] DMI_ITN_MRN_1 [8] DMI_ITP_MRP_1 [8]
DMI_MTN_IRN_2 [8] DMI_MTP_IRP_2 [8] DMI_ITN_MRN_2 [8] DMI_ITP_MRP_2 [8]
DMI_MTN_IRN_3 [8] DMI_MTP_IRP_3 [8] DMI_ITN_MRN_3 [8] DMI_ITP_MRP_3 [8]
CK_PE_100M_ICH# [13] CK_PE_100M_ICH [13]
V_1P5_CORE
MSI
Title
Size Document Number Rev
Date: Sheet
PLTRST# [6,13] ICH_PERN_1 [17]
ICH_PERP_1 [17] ICH_PETN_1 [17] ICH_PETP_1 [17]
ICH_PERN_2 [18] ICH_PERP_2 [18] ICH_PETN_2 [18] ICH_PETP_2 [18]
VCC3
CB1 X_C0.1U25Y CB2 X_C0.1U25Y CB3 X_C0.1U25Y CB4 C0.1U25Y
PLACE 1 EACH NEAR A3 & F1
PLACE REMAINDER ANUWHERE
DMI Differential impedance 100ohm +-20%
U26
XX1
XX1
MICRO-STAR INt'L CO., LTD .
Intel ICH7 - PCI & DMI & CPU & I RQ
(MS-7164)
2
XX2
XX2
1
XX3
XX3
E31-0401760-K08
of
10 31Tuesday, August 16, 2005
1
XX4
XX4
0D
Page 11
8
LPC_AD[0..3][13,14]
D D
C C
B B
A A
LPC_DRQ#0[14]
LPC_FRAME#[13,14]
AC_BITCLK[16] AC_SDIN0[16]
AC_SDOUT[16] AC_SYNC[16]
OC#0[24]
PLACE THE RESISTOR WHIN 500MILS
OC#1[24]
PLACE THE RESISTOR WHIN 500MILS
SMBCLK[14,17,18,27] SMBDATA[14,17,18,27]
RSMRST#[14,18,25]
CK_48M_USB_ICH[13]
SMBCLK SMBDATA
LPC_AD0 LPC_AD1 LPC_AD2 LPC_AD3
C46 X_C10P50N
AC_BITCLK AC_RST#
AC_SDOUT AC_SYNC
USB0-[24]
USB0+[24]
USB1-[24]
USB1+[24]
USB2-[24]
USB2+[24]
USB3-[24]
USB3+[24]
USB5-[24]
USB5+[24]
USB6-[24]
USB6+[24]
USB7-[24]
USB7+[24]
TEMP_THERM#
SPKR[16,23]
USB_BIAS
SM_LINK0 SM_LINK1
LNK_ALERT#
LPCPD# SIO_CLK32
INTRUDER# ICH_WAKE# RI# THERM#
BATTLOW#
TP_1 TP_2 TP_3
AD22
AF20
AH20
AF24 AH25
SM_LINK0 SM_LINK1
R73 22.6R1%
PWRBTN#[23]
PWR_GD[6,14,25] SIO_PME# [14]
VRM_GD[25,26]
DBRESET#[3,19]
SLP_S3#[14,21,23,25] SLP_S4#[14,25] SLP_S5#[14]
SIO_CLK32[14]
ICH_WAKE#[17,18]
RI#[14]
ICH_SYNC#[6]
CK_14M_ICH[13]
R90 X_0R0402 R91 X_0R0402
8
U3B (INTEL-NH82801GB-A1-LF)
AA6
LAD0
AB5
LAD1
AC4
LAD2
Y6
LAD3
AC3
LDRQ_0#
AA5
LDRQ_1#/GPI023
AB3
LFRAME#
U1
ACZ_BCLK
R5
ACZ_RST#
T2
ACZ_SDIN_0
T3
ACZ_SDIN_1
T1
ACZ_SDIN_2
T4
ACZ_SDOUT
R6
ACZ_SYNC
F1
USBP_0N
F2
USBP_0P
G4
USBP_1N
G3
USBP_1P
H1
USBP_2N
H2
USBP_2P
J4
USBP_3N
J3
USBP_3P
K1
USBP_4N
K2
USBP_4P
L4
USBP_5N
L5
USBP_5P
M1
USBP_6N
M2
USBP_6P
N4
USBP_7N
N3
USBP_7P
D3
OC_0#
C4
OC_1#
D5
OC_2#
D4
OC_3#
E5
OC_4#
C3
GPIO29/OC_5#
A2
GPIO30/OC_6#
B3
GPIO31/OC_7#
D1
USBRBIAS
D2
USBRBIAS#
C22
SMBCLK
B22
SMBDATA
B23
GPIO11/SMBALERT#
B25
SMLINK_0
A25
SMLINK_1
A26
LINKALERT#
Y4
RSMRST#
C19
LAN_RST#
C23
PWRBTN#
AA4
PWROK VRMPWRGD
A22
SYS_RESET#
B24
SLP_S3#
D23
SLP_S4#
F22
SLP_S5#
A27
SUS_STAT#
C20
SUSCLK
Y5
INTRUDER#
F20
WAKE#
A28
RI# THRM#
MCH_SYNC#
A19
SPKR
C21
BATLOW#/TP_0 DPRSTP#/TP_1 DPSLP#/TP_2
F21
TP_3
AC1
CLK14
B2
CLK48
7
VSS_41
H24
H27
7
VSS_42
VSS_43
VSS_44
H28J1J2J5J24
6
P-ATAS-ATA
ICH 7
PART 2/3
GPIORTC
EL_STATE0/GPIO27 EL_STATE1/GPIO28
GPIO33/AZ_DOCK_EN#
VSS_72
VSS_73
VSS_74
N11
GPIO34/AZ_DOCK_RST#
GPIO35/SATACLKREQ#
VSS_75
VSS_76
VSS_77
VSS_78
VSS_79
N12
N13
N14
N15
N16
VSS_80
N17
N18
MISCPOWER MGNTSM BUSUSBAC-LINKLPC
VSS_45
VSS_46
VSS_47
VSS_48
VSS_49
VSS_50
VSS_51
VSS_52
VSS_53
VSS_54
VSS_55
VSS_56
VSS_57
VSS_58
VSS_59
VSS_60
VSS_61
VSS_62
VSS_63
VSS_64
VSS_65
VSS_66
VSS_67
VSS_68
VSS_69
VSS_70
J25
J26
K24
K27
K28
L13
L15
L24
L25
L26M3M4M5M12
EMI SOLUTION
VCC5
VCC3
C45 X_C0.1U25Y
M13
M14
M15
VSS_71
M16
M17
M24
M27
M28N1N2N5N6
6
5
AF16
DDACK#
AE15
DDREQ
AF15
DIOR#
AH15
DIOW#
AG16
IORDY
AH17
DA0
AE17
DA1
AF17
DA2
AE16
DCS1#
AD16
DCS3#
AB15
DD_0
AE14
DD_1
AG13
DD_2
AF13
DD_3
AD14
DD_4
AC13
DD_5
AD12
DD_6
AC12
DD_7
AE12
DD_8
AF12
DD_9
AB13
DD_10
AC14
DD_11
AF14
DD_12
AH13
DD_13
AH14
DD_14
AC15
DD_15
AF3
SATA_0RXN
AE3
SATA_0RXP
AG2
SATA_0TXN
AH2
SATA_0TXP
AE5
SATA_1RXN
AD5
SATA_1RXP
AG4
SATA_1TXN
AH4
SATA_1TXP
AF7
SATA_2RXN
AE7
SATA_2RXP
AG6
SATA_2TXN
AH6
SATA_2TXP
AD9
SATA_3RXN
AE9
SATA_3RXP
AG8
SATA_3TXN
AH8
SATA_3TXP
AF1
SATA_CLKN
AE1
SATA_CLKP
AH10
SATARBIASN
AG10
SATARBIASP
AF18
SATALED#
VCCRTC
INTVRMEN
RTCRST#
VSS_84
VSS_85
N26
P3
GPIO6 GPIO7 GPIO8
GPIO9 GPIO10 GPIO12 GPIO13 GPIO14 GPIO15
GPIO24 GPIO25
GPIO38 GPIO39
RTCX1 RTCX2
AF19 AH18 AH19 AE19
AB18 AC21 AC18 E21 E20 A20 F19 E19 R4 E22 AC22 AC20 AF21 R3 D20 A21 B21 E23 AG18 AC19 U2 AD21 AD20 AE20
W5 W4 AA3 AB1 AB2
GPIO21/SATA_0GP GPIO19/SATA_1GP GPIO36/SATA_2GP GPIO37/SATA_3GP
BMBUSY#/GPIO0
GPIO16/DPRSLPVR
GPIO18/STPPCI#
GPIO20/STPCPU#
EL_RSVD/GPIO26
GPIO32/CLKRUN#
VSS_81
VSS_82
VSS_83
N24
N25
SATA FILTER
PLACE AT ENDS OF POWER
CORRIDORS
5
PDD0 PDD1 PDD2 PDD3 PDD4 PDD5 PDD6 PDD7 PDD8 PDD9 PDD10 PDD11 PDD12 PDD13 PDD14 PDD15
SATA_BIAS
R78 24.9R1%
200MILS
ATADET0 POV_ID#0 POV_ID#1 SIO_PME# GPIO9 GPIO10 GPI12 BRD_ID0 BRD_ID1 BRD_ID2
ENET_DISABLE# CTRL_GPI25
CLEAR_CMOS#
INTVRMEN
R88 390KR
RTC_RST#
RTC_XI
Y1
32.768KHZ12.5P_D
RTC_XO
V_1P5_CORE
C56
C55
C0.1U25Y
C0.1U25Y
4
PD_DACK# [22] PD_DREQ [22] PD_IOR# [22] PD_IOW# [22] PD_IORDY [22] PD_A0 [22] PD_A1 [22] PD_A2 [22] PD_CS#1 [22] PD_CS#3 [22]
PDD[0..15] [22]AC_RST#[16]
SATA_RX#0 [22] SATA_RX0 [22] SATA_TX#0 [22] SATA_TX0 [22]
CK_ICHSATA# [13] CK_ICHSATA [13]
PLACE THE RESISTOR WHIN 500MILS
SATALED# [23]
12
RN10
34
8P4R-10KR0402
56 78
ATADET0 [22]
ENET_DISABLE# [18]
RISER_DETECT_1 [17] RISER_DETECT_2 [17]
BAY_IS_HDD [22]
VBAT VBAT
C18P50NC53
R89 10MR
C18P50NC54
USB HI-SPEED FILTER
4
VCC3
3
ICH7 STRAPPING RESIS T ORS
ALL COMPONENTS CLOSE TO ICH6 Trace length is less than 3inchs to ICH6.
RN8 8P4R-10KR
SIO_SMI#
1 2
SM_LINK1
3 4
SM_LINK0
5 6 7 8
RN9 8P4R-10KR0402
BATTLOW#
1 2
DBRESET#
3 4
TEMP_THERM#
5 6
LNK_ALERT#
7 8
J4 _BH1X2_black-30u-in-2
1
INTRUDER#
ENET_DISABLE#
RI# SIO_PME#
CTRL_GPI25
SMBDATA_ISO[13,14,17,20,25]
PWR_GD:POWER OK of ICH7 must be pull-down
DEMO BOARD NO
GPI12
R837 X_0R0402
GPIO9 GPIO10 GPI12
LPCPD#
SMBCLK_ISO[13,14,17,20,25]
2
R61 1MR
R84 X_10KR0402 R64 10KR0402 R68 10KR0402 R60 1KR0402
SMBDATA SMBCLK
X_C100P50N0402C49
X_C100P50N0402C50
ICH_WAKE#
ATADET0
POV_ID#1 THERM# POV_ID#0 PWR_GD
RSMRST#
SIO_SMI#
R83 10KR0402 R85 10KR0402 R59 4.7KR
R62 X_10KR0402
3
VCC3_SB
INTRUDER
R69 2.2KR R70 2.2KR
R71 1KR0402 R72 1KR0402
R76 1KR0402
R74 X_10KR
RN11
8P4R-10KR0402
7 8 5 6 3 4 1 2
R86 10KR0402 R87 4.7KR
VBAT
VCC3_SB
VCC3
VCC3_SB
VCC3
VCC3
VCC5_SB
SIO_SMI# [14]
VCC3_SB
VCC3
2
1
CLEAR CMOS J U MPER
R57 4.7KR
VCC3
CLEAR_CMOS#
CMOS CLEAR
JBAT1 (1-2)
VBAT
S-BAT54C_SOT23D1
2 1
VCC3_SB
RTC_RST#
C48 C0.1U25X0805
3
1PS226
R67 180KR
C47 C1U16Y0805
Close to Pin AA2 of ICH6.
IBM Request Broad ID
BRD_ID1 BRD_ID2 BRD_ID0
GPI13 :BRD_ID1 GPI14 :BRD_ID2 GPI15 :BRD_ID0
Deflault Instead GPIO0 GPIO1 GPIO[5:2]
GPIO17 GPIO19 SATA[1]GP
REQ4# LDRQ1# GPIO23
GPIO[37:36] SATA[3:2]GP GPIO48
MSI
Title
Size Document Number Rev
Date: Sheet of
2
MICRO-STAR INt'L CO., LTD.
Intel ICH7 - LPC & ATA & USB & GPIO
N31-1030011+N33-1020031
1 2 3
JBAT1
BATTERY
Ver:0B
R63 3KR
R75 10KR0402 R77 X_10KR0402 R79 X_10KR0402
R80 1KR0402 R81 1KR0402 R82 X_1KR0402
BM_BUST# / PMSYNC# REQ[5]# PREQ[H:E]# GPIO11SMBALERT#
SATA[0]GPGPIO21 GPIO22
GPIO[31:29]OC[7:5]#
GPIO49CPUPWRGD
(MS-7164)
CLEARNORMAL
(2-3)
BAT1VBAT_DZ
BAT1
1
VCC3_SB
11 31Tuesday, August 16, 2005
0D
Page 12
8
7
6
5
4
3
2
1
U3C
X_0R1210
CP17
+
12
KZJ6.3VB2200MCC
C464 C0.1U25Y
C463 C0.1U25Y
Decoupling Cap
V_PCIE_PWR
CB5 C0.1U25Y
CB6 C0.01U50X
EC7
V_1P5_CORE
V_1P5_CORE
D D
C C
B B
FB1
1 2
ATTETION
PCI EXPRESS DECOUPLING FILTER PLACE THESE CAPS AT ENDS OF POWER
CORRIDORS
VCC3 V_1P5_CORE
(INTEL-NH82801GB-A1-LF)
D26
VCC1_5_B
D27
VCC1_5_B
D28
VCC1_5_B
E24
VCC1_5_B
E25
VCC1_5_B
E26
VCC1_5_B
F23
VCC1_5_B
F24
VCC1_5_B
G22
VCC1_5_B
G23
VCC1_5_B
H22
VCC1_5_B
H23
VCC1_5_B
J22
VCC1_5_B
J23
VCC1_5_B
K22
VCC1_5_B
K23
VCC1_5_B
L22
VCC1_5_B
L23
VCC1_5_B
M22
VCC1_5_B
M23
VCC1_5_B
N22
VCC1_5_B
N23
VCC1_5_B
P22
VCC1_5_B
P23
VCC1_5_B
R22
VCC1_5_B
R23
VCC1_5_B
R24
VCC1_5_B
R25
VCC1_5_B
R26
VCC1_5_B
T22
VCC1_5_B
T23
VCC1_5_B
T26
VCC1_5_B
T27
VCC1_5_B
T28
VCC1_5_B
U22
VCC1_5_B
U23
VCC1_5_B
V22
VCC1_5_B
V23
VCC1_5_B
W22
VCC1_5_B
W23
VCC1_5_B
Y22
VCC1_5_B
Y23
VCC1_5_B
AA22
VCC1_5_B
AA23
VCC1_5_B
AB22
VCC1_5_B
AB23
VCC1_5_B
AC23
VCC1_5_B
AC24
VCC1_5_B
AC25
VCC1_5_B
AC26
VCC1_5_B
AD26
VCC1_5_B
AD27
VCC1_5_B
AD28
VCC1_5_B
A1
VCC1_5-1
AB10
VCC1_5-2
AB17
VCC1_5-3
AB7
VCC1_5-4
AB8
VCC1_5-5
AB9
VCC1_5-6
AC10
VCC1_5-7
AC17
VCC1_5-8
AC6
VCC1_5-9
AC7
VCC1_5-10
AC8
VCC1_5-11
AD10
VCC1_5-12
AD6
VCC1_5-13
AE10
VCC1_5-14
AE6
VCC1_5-15
AF10
VCC1_5-16
AF5
VCC1_5-17
AF6
VCC1_5-18
AF9
VCC1_5-19
AG5
VCC1_5-20
AG9
VCC1_5-21
AH5
VCC1_5-22
AH9
VCC1_5-23
F17
VCC1_5-24
G17
VCC1_5-25
H6
VCC1_5-26
H7
VCC1_5-27
J6
VCC1_5-28
J7
VCC1_5-29
T7
VCC1_5-30
AD4
AD7
AD8
AD11
AD15
AD19
AD23
AE2
AE4
AE8
AE11
AE13
AE18
AE21
AE24
AE25
AF2
AF4
AF8
VSS_169
VSS_170
VSS_171
VSS_172
VSS_173
VSS_174
VSS_175
VSS_176
VSS_177
VSS_178
VSS_179
VSS_180
VSS_181
VSS_182
VSS_183
VSS_184
VSS_185
VSS_186
VSS_187
1.5V DMI POWER 1.5V CORE WELL POWER
ICH 7
PART 3/3
AF11
AF27
VSS_188
VSS_189
AF28
AG1
VSS_190
VSS_191
AG3
AG7
VSS_192
VSS_193
AG14
AG17
AG20
VSS_194
VSS_195
AG25
AH1
VSS_196
VSS_197
VSS_198
AH3
AH7
VSS_199
VSS_200
AH23
AH27
VSS_201
VSS_202
AH12
VSS_203
S0 POWERS5 POWER
V5REF1
V5REF2 VCC3_3-1 VCC3_3-2 VCC3_3-3 VCC3_3-4 VCC3_3-5 VCC3_3-6 VCC3_3-7 VCC3_3-8 VCC3_3-9
VCC3_3-10 VCC3_3-11 VCC3_3-12 VCC3_3-13 VCC3_3-14 VCC3_3-15 VCC3_3-16 VCC3_3-17 VCC3_3-18 VCC3_3-19 VCC3_3-20 VCC3_3-21 VCC3_3-22
VCC_CPU_IO-1 VCC_CPU_IO-2 VCC_CPU_IO-3
VCCDMIPLL
VCCSATAPLL
VCCUSBPLL
VCC1_05-1 VCC1_05-2 VCC1_05-3 VCC1_05-4 VCC1_05-5 VCC1_05-6 VCC1_05-7 VCC1_05-8
VCC1_05-9 VCC1_05-10 VCC1_05-11 VCC1_05-12 VCC1_05-13 VCC1_05-14 VCC1_05-15 VCC1_05-16 VCC1_05-17 VCC1_05-18 VCC1_05-19 VCC1_05-20
V5REF_SUS
VCCSUS3_3-1 VCCSUS3_3-2 VCCSUS3_3-3 VCCSUS3_3-4 VCCSUS3_3-5 VCCSUS3_3-6 VCCSUS3_3-7 VCCSUS3_3-8
VCCSUS3_3-9 VCCSUS3_3-10 VCCSUS3_3-11 VCCSUS3_3-12 VCCSUS3_3-13 VCCSUS3_3-14 VCCSUS3_3-15 VCCSUS3_3-16 VCCSUS3_3-17 VCCSUS3_3-18 VCCSUS3_3-19 VCCSUS3_3-20 VCCSUS3_3-21 VCCSUS3_3-22 VCCSUS3_3-23 VCCSUS3_3-24
VCCSUS1_05-1 VCCSUS1_05-2 VCCSUS1_05-3 VCCSUS1_05-4 VCCSUS1_05-5
AD17 G10 A5 AA7 AB12 AB20 AC16 AD13 AD18 AG12 AG15 AG19 AH11 B13 B16 B27 B7 C10 D15 F9 G11 G12 G16 U6
V_FSB_VTT
AE23 AE26 AH26
DMIPLL DMIPLL
AG28
SATAPLL
AD2 C1
L11 L12 L14 L16 L17 L18 M11 M18 P11 P18 T11 T18 U11 U18 V11 V12 V14 V16 V17 V18
F6 A24
C24 D19 D22 E3 G19 K3 K4 K5 K6 L1 L2 L3 L6 L7 M6 M7 N7 P7 R7 V1 V5 W2 W7
VCCSUS_1_5-1
AA2
VCCSUS_1_5-2
C28
VCCSUS_1_5-3
G20 K7 Y7
5VREF Sequencing Circuit
5VREF
VCC3
CB21 X_C0.1U25Y CB11 X_C0.1U25Y
CB10 X_C0.1U25Y
CB9 C0.1U25Y
L10 1U500m_0805 L13 X_1U500m_0805 CP9 X_COPPER CB15
V_1P05_CORE
V5REF_SUS
R518 X_0R CB16 C0.1U25Y
VCC3_SB
PLACE NEAR E3
CB12 C0.01U50X
CB18 C0.01U50X CB19 C0.01U50X CB20 C0.01U50X
V_FSB_VTT [3,4,6,8,25]
PLACE NEAR ONE OF PINS: AB22,AD26,AG23
VCC3_SB
CB17
C0.1U25Y
5VREF
DZ1 S-1N5817_DO214AC R520 1KR C462 C1U16Y0805
5VREF [14]
VCC3
VCC5
PLACE NEAR AG15 P-ATA FILTER
PLACE NEAR AH11
PLACE NEAR B7
VCC3
R519 1R1%
V_1P5_CORE
CB13 X_C0.01U50X
V5REF_SUS [14]
VCC5_SB
CB14 C0.1U25Y
SATAPLL
CB8 C0.1U25Y
USB CLASSIC FILTER
PLACE (2) 0.1uF NEAR A17
MSI
CB7 C0.1U25Y
X_C10U10Y0805
CB22 X_C10U10Y0805
VCC3_SB
C460
C0.1U25Y
C461 C0.1U25Y
A A
VSS_96
VSS_97
VSS_98
VSS_99
VSS_100
VSS_101
VSS_102
VSS_103
VSS_104
VSS_105
VSS_106
VSS_107
VSS_108
VSS_109
VSS_110
VSS_111
VSS_112
VSS_113
VSS_114
VSS_115
VSS_116
VSS_117
VSS_118
VSS_119
VSS_120
VSS_121
VSS_122
VSS_123
VSS_124
VSS_125
VSS_126
VSS_127
VSS_128
VSS_129
VSS_130
VSS_131
VSS_132
VSS_133
VSS_134
VSS_135
VSS_136
VSS_137
VSS_138
VSS_139
VSS_140
VSS_141
VSS_142
VSS_143
VSS_144
VSS_145
VSS_146
VSS_147
VSS_148
VSS_149
VSS_150
VSS_151
VSS_152
VSS_153
VSS_154
VSS_155
VSS_156
VSS_157
VSS_158
VSS_159
VSS_160
VSS_161
VSS_162
VSS_163
VSS_164
VSS_165
VSS_166
VSS_167
VSS_168
AD3
AD1
AC11
AC9
AC5
AC2
AB28
AB27
AB24
AB21
AB19
AB16
AB14
AB11
AB6
AB4
AA26
AA25
AA24
AA1
Y28
Y27
Y24Y3W26
W25
W24W6V28
V27
V24
V15
V13V2U26
U25
U24
U17
U16
U15
U14
U13
U12U4T17
T16
T15
T14
T13
T12T6R18
R17
R16
R15
R14
C27
AG11
E4
R13
R12
R11R1P28
P27
P24
P17
P16
P15
P14
P13
P12
P4
8
7
6
5
4
3
Title
Size Document Number Rev
Date: Sheet
MICRO-STAR INt'L CO., LTD.
Intel ICH7 - POWE R
(MS-7164)
2
0D
of
12 31Tuesday, August 16, 2005
1
Page 13
8
VCC3
D D
VCC3
C C
L11 600L200m_500-1
C70 C0.1U16Y0402
C76 C0.1U16Y0402
L12 600L200m_500-1
C87 C0.1U16Y0402
+
C77 C0.1U16Y0402
C78
C10U6.3X50805-1
+
SMBDATA_ISO[11,14,17,20,25]
C83 C0.1U16Y0402
C88 C10U6.3X50805-1
SMBCLK_ISO[11,14,17,20,25]
V3_SRC_CPU_CLKGEN
FIRMWARE HUB (FWH) TSOP Package 40 Pi n s
VCC3
PCIRST#2[14,17,18,25]
FWH_WP#[14]
X_C10P50N0402
VCC3
R119 X_10KR
B B
C84 C0.1U16Y0402
V_3P3_CLKPWR_L
SMBCLK_ISO SMBDATA_ISO
FSA FSB
FSC
C72
FWH_PCLK
REV3 REV2
REV0
FWH_WP#
CB52
C10U10Y0805
7
Clock Generator - ICS954101
U4
42 43
C71 C0.1U16Y0402
C85 C0.1U16Y0402
C86 C0.1U16Y0402
C89 C0.1U16Y0402
C90 C0.1U16Y0402
C91 C0.1U16Y0402
C92 C0.1U16Y0402
FGPI4
CPU_VDD CPU0#
45
CPU_GND
21 19
SRC_VDD SRC1
28 22
SRC_VDD SRC2
34
SRC_VDD
29
SRC_GND
37
VDDA
38
VSSA
1
PCI_VDD
2
PCI_GND
7
PCI_VDD
6
PCI_GND
11
48_VDD
13
48_GND
48
REF_VDD
51
REF_GND
46
SCLK
47
SDATA
18
FSA
16
FSB/TEST_MODE
53
FSC/TEST_SEL
ICS954101DF_SSOP56
BIOS1
1
NC
2
IC(VIL)
3
NC
4
NC
5
NC
6
NC
7
FGPI4
8
NC
9
CLK
10
VCC
11
NC(VPP)
12
RST#
13
NC
14
NC
15
FGPI3
16
FGPI2
17
FGPI1
18
FGPI0
19
WP#
20
TBL#
_M31-4900812-SXE CB53 C1U10Y
6
CPU0 CPU1
CPU1#
CPU2_ITP/SRC7
CPU2_ITP#/SRC7#
SRC1# SRC2#
SRC3
SRC3#
SRC4_SATA
SRC4_SATA#
SRC5
SRC5#
SRC6
SRC6#
DOT96
DOT96#
PCIF0/ITP_EN
PCIF1 PCIF2
PCI0 PCI1 PCI2 PCI3 PCI4 PCI5
USB_48M
REF
VTT_PWRGD#/PD
IREF
40
GNDA
39
VCCA
38
FWH4
37
INIT#
36
NC(RY/BY)
35
RFU
34
RFU
33
RFU
32
RFU
31
NC(VCC)
30
GND
29
GND
28
FWH3
27
FWH2
26
FWH1
25
FWH0
24
ID0
23
ID1
22
ID2
21
ID3
5
Trace length less than 0.5inchs
CPUCLK
44
CPUCLK# MCHCLK
41
MCHCLK#
40
CPU2ITP
36
CPU2ITP#
35
20
CK_PE_SRC2 CK_PE_SRC2# CK_PE_100M_LAN
23
CK_PE_SRC3
24
CK_PE_SRC3#
25
CK_PE_SRC4
26
CK_PE_SRC4#
27
CK_PE_SRC5
31
CK_PE_SRC5#
30
CK_PE_SRC6
33
CK_PE_SRC6#
32
DOT_96M_L
14
-DOT_96M_L
15
PCICLK0 V_3P3_CLKPWR_LPCICLK0
8
FWHPCLK
9
ICHPCLK
10 54 55 56
SIOPCLK
3 4
PCICLK1
5
12
52
CK410_XTAL_OUT
50
X1
49
X2
CK410_XTAL_IN
CK_VID_GD#
17
IREF
39
VCC3
R99 33R0402 R101 33R0402 R102 33R0402 R103 33R0402 R122 X_33R0402 R123 X_33R0402
PCICLK1 PCI_CLK1 PCICLK0 PCI_CLK0 FWHPCLK FWH_PCLK
SIOPCLK SIO_PCLK
R110 33R0402
ICH14M
X14MHZ1
14.318MHZ32P_D
R118 475R1%0402
CB51 C0.1U25Y
FWH_INIT#
CK_H_CPU CK_H_CPU# CK_H_MCH CK_H_MCH# CPU2_ITP CPU2_ITP#
CK_PE_SRC2# CK_PE_SRC2 CK_PE_SRC4# CK_PE_SRC4 CK_PE_SRC3# CK_PE_SRC3 CK_PE_SRC6 CK_PE_100M_16X CK_PE_SRC6# CK_PE_SRC5 CK_PE_SRC5#
DOT_96M_L DOT_96M
R112 _15R0402-1 R113 _15R0402-1 R114 _15R0402-1
R104 33R0402 RN19 R105 33R0402
R120 33R0402 R121 33R0402
R106 8.2KR0402
R109 33R0402
C56P50N0402C93
C56P50N0402C94
LPC_FRAME# [11,14] FWH_INIT# [10]
CK_48M_USB_ICHUSB48
RN13
78
8P4R-33R0402
56 34 12 78 56 34 12
RN158P4R-33R0402
12
RN18
34
8P4R-33R0402
56 78
AC_14 SIO_14 CK_14M_ICH
0D Remove R133, R132
LPC_AD3 [11,14] LPC_AD2 [11,14] LPC_AD1 [11,14]
FWH_ID0REV1
LPC_AD0 [11,14]
R138 10KR0402
4
CK_PE_100M_LAN# CK_PE_100M_16X#
CK_PE_100M_16X CK_ICHSATA# CK_ICHSATA CK_PE_100M_ICH CK_PE_100M_ICH# CK_PE_100M_MCH CK_PE_100M_MCH#
-DOT_96M-DOT_96M_L
ICH_PCLKICHPCLK
CK_48M_USB_ICH [11] AC_14 [16]
SIO_14 [14] CK_14M_ICH [11]
CK_H_CPU [3] CK_H_CPU# [3] CK_H_MCH [6] CK_H_MCH# [6] CPU2_ITP [19] CPU2_ITP# [19]
CK_PE_100M_LAN# [18] CK_PE_100M_LAN [18] CK_PE_100M_16X# [17] CK_PE_100M_16X [17] CK_ICHSATA# [11] CK_ICHSATA [11] CK_PE_100M_ICH [10] CK_PE_100M_ICH# [10] CK_PE_100M_MCH [8] CK_PE_100M_MCH# [8]
DOT_96M [8]
-DOT_96M [8]
PCI_CLK1 [17] PCI_CLK0 [17]
ICH_PCLK [10] SIO_PCLK [14]
3
CK_H_CPU CK_H_CPU# CK_H_MCH CK_H_MCH#
CPU2_ITP CPU2_ITP#
DOT_96M
-DOT_96M CK_PE_100M_MCH#
CK_PE_100M_MCH CK_PE_100M_ICH# CK_PE_100M_ICH
CK_ICHSATA CK_ICHSATA#
CK_PE_100M_16X# CK_PE_100M_LAN#
CK_PE_100M_LAN
2
R96 49.9R1%0402 R97 49.9R1%0402 R98 49.9R1%0402 R100 49.9R1%0402
R134 49.9R1%0402 R135 49.9R1%0402
R136 49.9R1%0402 R137 49.9R1%0402
7 8 5 6
_8P4R-51R0402-LF
3 4 1 2
7 8
RN14
5 6
_8P4R-51R0402-LF
3 4 1 2
R115 _51.1R1%0402 R117 _51.1R1%0402
DOT_96M
-DOT_96M
PCI_CLK1
PCI_CLK0 FWH_PCLK ICH_PCLK
SIO_PCLK CK_48M_USB_ICH SIO_14
CK_14M_ICH AC_14
EMC HF filter capacitors, located close to PLL
CLOCK GENERATOR VTT POWER DOWN BLOCK
CK_VID_GD#
SOT23EBC
Q2
N-MMBT3904_NL_SOT23
ECB
VCCP
R116 220R
R111 X_0R0402
VIDGD
BSEL[0..2] Level Sh i f t
8P4R-0R0402
H_FSBSEL0[3,8] H_FSBSEL2[3,8]
H_FSBSEL1[3,8]
1 2 3 4 5 6 7 8
RN20
FSA FSC
FSB
R107
V_3P3_CLKPWR_L
10KR
H_FSB_SEL 2 1 0
1
C10P50N0402C64 C10P50N0402C65
X_C10P50N0402C69 X_C10P50N0402C68 X_C10P50N0402C74 X_C10P50N0402C73
C15P50N0402C75 X_C10P50N0402C79 X_C10P50N0402C80
X_C10P50N0402C81 X_C10P50N0402C82
CPU
0 133
100
01200
LPC DEBUG PORT
A A
FWH_PCLK
PLTRST#[6,10]
Place the LPC DEBUG PORT close to FWH
PLTRST# LPC_AD0 LPC_AD1 LPC_AD2 LPC_AD3
LPC_FRAME#
8
JLPC1
1 3 5 7 9
11 13
H2X7(10)_black-2pitch
VCC5VCC3
2 4
FWH_ID0
6 8
12 14
7
PCB REVISION ID
REV0
R124 X_10KR0402
REV1
R125 X_10KR0402
REV2
R126 X_10KR0402
REV3
R127 X_10KR0402
REV0
R128 10KR0402 R129 10KR0402
REV1 REV2
R130 10KR0402
REV3
R131 10KR0402
6
VCC3
R836 10KR0402
5
FGPI4
MSI
Title
Size Document Number Rev
4
3
Date: Sheet
MICRO-STAR INt'L CO., LTD.
ICS954101 & FWH
(MS-7164)
2
13 31Tuesday, August 16, 2005
0D
of
1
Page 14
8
SIO_PCLK[13]
LPC_FRAME#[11,13]
LPC_DRQ#0[11]
PCIRST#2[13,17,18,25]
D D
KBDAT#
C101
KBCLK#
C1U10Y
MSDAT#
MSCLK#
C100
H_FORCEPH_IO[3]
VCC3
VCC3_SB
PWR_OK
BAY_ATTACH#[22]
SIO_CLK32[11]
CPU_FAN[23] REAR_FAN[23] SYS_FAN[23]
C1U10Y
R421 X_0R0402
FWH_WP#
CB25
C0.1U25Y
C105
C0.1U25Y
REF5V KBCLK# REF5V_STBY
CB23
C0.1U25Y
H_FORCEPH_IO SIO_CLK32
GPO11
R804 0R0402 CN6
CB26
C0.1U25Y
C106
C0.1U25Y
C1U10Y
C C
B B
5VREF[12] V5REF_SUS[12]
PWR_OK[23,25] PWR_GD[6,11,25]
VCC5_SB
For Ultrabay Slim and Ultrabay Enhanced IDE
GPIO
FWH_WP#[13]
SINA DSRA# CTSA#
RIA# DCDA# DTRA# RTSA# SOUTA
RSTB# RAFD# RINIT# RSLIN#
RERR# RACK# RBUSY RPE RSLCT
SWD
CB24
X_C0.1U25Y
CB27 C0.1U25Y
C107
C0.1U25Y
C108
7
NS SUPER I/O PC8375S
U5
55
PCI_CLK
56
LFRAME
54
LDRQ
63
PCI_RESET
73
PCIRST_OUT
74
PCIRST_OUT2
64
IDE_RSTDRV
25
SIN1
24 28 32 23 30 26 27
51 50 48 47
45 36 35 34 33
22 21
19 18 17 16
103
70 72
82 84 71
83 77 79
67 68 69 66
75 101 100
80
91
111 112 104 105
123
117
31
49
60
76
93 107
102
DSR1 CTS1 RI1 DCD1 DTR_BOUT1/BADDR/XOR RTS1/TRIS SOUT1/TEST
STB_WRITE AFD_DSTRB INIT SLIN_ASTRB
ERR ACK BUSY_WAIT PE SLCT
DENSEL DRATE0
MTR0 DR0 DIR STEP
4
KBDAT
3
KBCLK
2
MDAT
1
MCLK
SWD/GPIOE00 REF5V
REF5V_STBY PWRGD_PS
PWRGD_3V VSB5
CPU_PRESENT BKFD_CUT LATCHED_BF_CUT
PRIMARY_HD SECONDARY_HD SCSI HD_LED
GPIOE13 GPIOE14/IOPA0 GPIOE16 GPIOE17
GPIO15/CLOCKI32/IOPA1
GPIOE06/FANTACH1 GPIOE07/FANTACH2 GPIOE01/FANTACH3 GPIOE02/FANTACH4
NC/TPM__PP/IOPA6
GPO11/VsbStrap1
6
VDD3 VDD3 VDD3 VDD3
VSB3 VSB3 VSB3
NC/VCORF2
COM1 PORT
LPC BUS SIGNALS
GPIOE03/DSR2/SIN2
COM2
GPIOE04/CTS2/DSR2
GPIOE05/DCD2/CTS2
PORT
GPIOE06/IRRX/DTR_BOUT2
GPO13/DTR_OUT2/VddStrap2/RTS2
GPO12/RTS2/VddStrap1/SOUT2
PARALLEL PORT
FLOPPY DISK INTERFACE
KeyBoard & Mouse
ClocksSWIF
GLUE Logic Functions
CC_DDCSCL/GPIOE13 CC_DDCSDA/GPIOE12
5V_DDCSCL/GPIOE11
5V_DDCSDA/GPIOE10
System Wake Up control (SWC)
FAN Control Monitoring
Other Signals
POWER & GND
GPIOE02/SOUT2/IRRX
PC8375S
6
SER_IRQ
LAD0 LAD1 LAD2 LAD3
GPIOE01/SIN2/RI2
GPIOE07IRTX/DCD2
WDATA WGATE
TRK0INDEX
RDATA HDSEL
DSKCHG
KBRST
GA20
CLOCKI14
RSMRST
SMB1_SCL SMB1_SDA
HMSCL/SMB2_SCL HMSDA/SMB2_SDA
PS_ON
SIOPME
SLP_S3 SLP_S5
GRN_LED YLW_LED
GPIOE03/FANPWM1 GPIOE04/FANPWM2 GPIOE05/FANPWM3
GPIOE00/R12/IRTX
VBAT
VCORF
5
R142 X_0R0402
IO_SMI#
52
SMI
53
LPC_AD0
62
LPC_AD1
61
LPC_AD2
59
LPC_AD3
57
121 124 126 119 128 127
RTS2#
125
SOUT2
122
PRD0
44
PD0
PRD1
43
PD1
PRD2
42
PD2
PRD3
41
PD3
PRD4
40
PD4
PRD5
39
PD5
PRD6
38
PD6
PRD7
37
PD7
15 14 1320 12
WP
11 10 9
7 5
65 92
SMBCLK
87
SMBDATA
89
R140 X_0R0402
88
R141 X_0R0402
90 113
115 114
116 81
SIO_PME#
99 85 86
R423 0R0402
SIO_GRN_LED
94 95
106 108 109
GPIOE00
118 120
R834 0R0402
98 97
8
VSS VSS VSS VSS VSS VSS VSS
C103
29
C0.1U25Y
46 58 78 96 110
ICH_H_SMI# [3,10]
SIO_SMI# [11] SERIRQ [10]
LPC_AD[0..3] [11,13]
TPM circuit from IBM
KBRST# [10] A20GATE [10]
SIO_14 [13]
RSMRST# [11,18,25]
SMBCLK [11,17,18,27] SMBDATA [11,17,18,27]
SMBCLK_ISO SMBDATA_ISO
PSON# [23]
SIO_PME# [11] SLP_S3# [11,21,23,25] SLP_S4# [11,25] SLP_S5# [11]
SIO_GRN_LED [23]
PWM_CPU [23] PWM_REAR [23] PWM_SYS [23]
TPM circuit from IBM
TRMTRIP#
C104 C0.1U25Y
R806 470R
RTS2#
R807 470R
SOUT2
R805 X_0R0402
GPO11
SMBCLK_ISO [11,13,17,20,25] SMBDATA_ISO [11,13,17,20,25]
TRMTRIP# [3,4,10]
VBAT
Eliminate excessive voltage drop caused by devices that draw excessive amounts of current from the control lines.
GPIOE00
1 2
H1X2_black
1 2
H1X2_black
4
7 8 5 6 3 4 1 2
RN21 8P4R-33R
7 8 5 6 3 4 1 2
RN22 8P4R-33R
RN24 8P4R-0R
7 8 5 6 3 4 1 2
7 8 5 6 3 4 1 2
RN26 8P4R-0R
R144 0R0402
PRND6 PRND5 PRND4 PRND3
PRND7 PRND0 PRND2 PRND1
PRD6 PRD5 PRD4 PRD3
PRD7 PRD0 PRD2 PRD1
RPE
RBUSY
J5
J6
RACK#
RERR# RSLIN# RAFD# RSTB#
PE BUSY ACK# PINIT#RINIT#
ERR# SLIN#
STB#
SLCTRSLCT
3
VCC5
PRND6 PRND5
PRND3 PE BUSY ACK# PRND7
PRND0 PINIT# PRND2
PRND1
ERR#
AFD#
STB# SLIN#
SLCT
D3 BAS32L_L L34 C96 C0.1U25Y
D4
1
1
2
2
3
3
RN23
4
4
10P8R-2.7KR
6
6
7
7
8
8
9510
9510
1
1
2
2
3
3
RN25
4
4
10P8R-2.7KR
6
6
7
7
8
8
9510
9510
R143 2.7KR
PRND7 ACK# BUSY PE
PRND3 PRND4 PRND5 PRND6
PRND1 PRND2 PINIT# SLIN#
STB# AFD# PRND0AFD# ERR#
SLCT
2
1
2
3
4
5
6
7
8
1
2
3
4
5
6
7
8
1
2
3
4
5
6
7
8
1
2
3
4
5
6
7
8
C97 C220P50N
CN1 8P4C-180P50N
CN2 8P4C-180P50N
CN3 8P4C-180P50N
CN4 8P4C-180P50N
51
STB#
1
PRND0
2
PRND1
3
PRND2
4
PRND3
5
PRND4
6
PRND5
7
PRND6PRND4
8
PRND7
9
ACK#
10
BUSY
11
PE
12
SLCT
13
52
CONN-LPT
CP1 X_COPPER FB2 X_120L60 0m_150
KBGND1
14 15 16 17 18 19 20 21 22 23 24 25 48
LPT1A
AFD# ERR# PINIT# SLIN#
1
KBGND1
PS2 KEYBOARD & MOUSE CONNECTOR
L1
MSDAT# MSCLK#
KBDAT#
RN27 8P4R-4.7KR
1 2
3 4
5 6
7 8
FB3 240L400m_ 250 FB4 240L400m_ 250
FB5 240L400m_ 250 FB6 240L400m_ 250
0D change for EFT
C0.1U25Y
MS_DT MS_CK
KB_DT KB_CK
CN5
8P4C-330P50N
C98
R145 1KR
JKBMS1
7
135
246
7
8
8 11 12
1
2
5
6
CONN-KB_MS
MS
KB
KBGND
10
9 4
3
C99
C0.1U25Y
CP2 X_COPPER
KBGND
USB_STR
FS1 F-MICROSMD110
POLY SWITCH
SERIAL PORT 1
EMI FILTER NOTES:
1. PLACE CLOSE TO CONNECTORS
2. CONNECT THE CAPACITOES TO SHIELD.
3. ON THIS BOARD, DUE TO LAYOUT LIMITATIONS, THE CAPACITORS ARE CONNECTED TO GND.
CP3 X_COPPER
R153 X_2R0805
VCC5
NRTSA NDSRA# NCTSA# RIA
NDCDA# NSOUTA NSINA NDTRA
CB28 C0.1U25Y
RIA NCTSA# NDSRA# NSINA NDCDA#
RTSA# DTRA# SOUTA
1
2
3
4
5
6
7
8
1
2
3
4
5
6
7
8
U8
20
VCC
2
RIN1
3
RIN2
4
RIN3
7
RIN4
9
RIN5
16
DIN1
15
DIN2
13
DIN3
11
GND
GD75232_SSOP20
8P4C-180P50N
CN7 8P4C-180P50N
ROUT1 ROUT2 ROUT3 ROUT4 ROUT5
DOUT1 DOUT2 DOUT3
NDCDA# NSINA NSOUTA NDTRA
D4 BAS32L_LL34 C112 C0.1U25Y
+12COM
1
V+
RIA#
19
CTSA#
18
DSRA#
17
SINA
14
DCDA#
12
NRTSA
5
NDTRA
6
NSOUTA
8
D5 BAS32L_LL34
-12COM
10
V-
C114 C0.1U25Y
4749
NDSRA#
26
31
NRTSA
27
32
NCTSA#
28
33
RIA
29
34
30
LPT1B CONN-LPT
KBGND1
+12V
-12V
KBGND1
SENSORPath SENSOR LM32
SWD
A A
THERMDP#[3]
CPU Temp.
THERMDN#[3]
N-MMBT3904_NL_SOT23
System Temp.
8
C109
C100P50N
CE
Q5
B
C100P50N
VCC3_SB VCC3_SB
R146
U7
1KR
4
SWD
5
ADD
9
D1+
8
D1-
11
D2+
10
D2-
_D0F-LM32C12-N X4
C111
C330P50N
IBM suggestion
C113
7
3.3V_SBY_IN
3 6
NC
7
NC
12
NC
13
NC
1
NC
14
NC
GND
C110
2
C0.1U25Y
IBM suggestion
6
SIO Strappi n g S i g n a l P i n Wake On Ri ng
D6 BAS32L_LL34
VCC3
R148 8.2KR0402
IO_SMI#
R149 10KR0402
KBRST#
R150 10KR0402
A20GATE
R151 8.2KR0402
SERIRQ
R424 8.2KR0402
LPC_DRQ#0
R425 10KR0402
DTRA#
5
4
RIA
3
R154 10KR0402
R155
10KR0402
B
VCC3_SB
CE
R152
8.2KR0402
RI# [11]
Q6 N-MMBT3904_NL_SOT23
Title
Size Document Number Rev
Date: Sheet
2
MICRO-STAR INt' L C O . , L T D .
NS PC8374L/K/T & I/O Conn.
(MS-7164)
14 31Thursday, August 18, 2005
1
0D
of
Page 15
8
D D
C C
B B
VIDEO CONNECTOR
V_2P5_MCH
3VDDCCL[8]
3VDDCDA[8]
CRT_HSYNC[8]
CRT_VSYNC[8]
R167 33R0402
NEAR CHIPSET
R170 33R0402
<500MILS
NEAR CHIPSET
R158
4.7KR
R159
4.7KR Q7 N-2N7002_SOT23
DDC_G
Q8 N-2N7002_SOT23
R166 4.7KR
1 2
LVC1G08_SOT23-5
1 2
LVC1G08_SOT23-5
7
R163 X_4.7KR R407 4.7KR
VCC5
VCC3
U9
5 43
U10
5 43
VCC5
VCC5
D34 1N4001_DO214AC
R160
2.2KR
V_2P5_MCH
VCC3
C123 C0.1U16Y0402
D11 _D01-BAV9909-V02
<500MILS<500MILS
<500MILS
6
FS2
VGAPWR VGA_PWR
F-MICROSMD110
POLY SWITCH
C137 C0.1U16Y0402
D18 _D01-BAV9909-V02
R161
2.2KR
VCC5
CP4 X_COPPER FB8
X_80L3_100_0805
VCC5VCC5
D17 _D01-BAV9909-V02
C118 C0.1U16Y0402
D10 _D01-BAV9909-V02
C0.1U25Y
C136 C0.1U16Y0402
R162 33R0402 R164 33R0402
C47P50N
5
C117
C130
5VDDCCL
V_SYNC H_SYNC
C131
C47P50N
R156 X_47KR
FOR ESD
C132
C47P50N
C47P50N
C133
15 10 14
9
13
8
12
7
11
6
4
VGA1
CONN-VGA
3
Near VGA connector
FB9 _70L200m_350
CRTB
C3.3P25N0402
C119 C3.3P25N0402
BLUE "rount ed GND" , use one via to GND.
17
5 4 3
FB11 _70L200m_350
2 1
16
CRTG5VDDCDA
C126
C3.3P25N0402
C3.3P25N0402
GREEN "rounted GND", use one via to GND.
FB13 _70L200m_350
CRTR
C138
C3.3P25N0402
C3.3P25N0402
RED "r o unted GND", use one via to GND.
C120
C127
C139
FB21 0R
C121
X_C3.3P25N0402
FB22 0R
C128
X_C3.3P25N0402
FB23 0R
C140
X_C3.3P25N0402
2
R404 150R1%0402
R405 150R1%0402
R406 150R1%0402
1
12 Mils7 Mils5 Mils
Near North-Bridge150ohm to 150ohm
R169 150R1%0402
Close VGA
V_2P5_MCH
CRT_B [8]
Close VGA
V_2P5_MCH
CRT_G [8]
Close VGA
V_2P5_MCH
CRT_R [8]
C116 C0.1U16Y0402
D8 _D01-BAV9909-V02
R157 150R1%0402
C125 C0.1U16Y0402
D13 _D01-BAV9909-V02
R165 150R1%0402
C135 C0.1U16Y0402
D16 _D01-BAV9909-V02
Optics Orientation HolesSimulation
FM2
SM3
2
SM1
SM2
1
2
J2
1
2
J3
1
7
6
A A
8
LP1
LP3
LP2J1
LP4
FM1
FM3
FM5
FM4
FM6
5
4
3
MSI
Title
Size Document Number Rev
Date: Sheet
MICRO-STAR INt'L CO., LTD.
VGA CONNECTORS
(MS-7164)
2
15 31Tuesday, August 16, 2005
1
of
0D
Page 16
8
7
6
5
4
3
2
1
AUDIO CODE REGULATORS
+5VR
CB44
CODEC AD1888
C_R
C_L C_G
R198
2.7KR
ID0# ID1#
484746
U11
1
DVDD1
9
4 7
2 3
11
8 5
10
6
12
C169 C1U10Y
C172 C1U10Y C170 C1U10Y
EAPD
DVDD2
SPDIF_O
DVSS1 DVSS2
XTL_IN XTL_OUT
RESET# SDATA_IN SDATA_OUT SYNC BIT_CLK
NC
PHONE
AUX_IN_L
1314151617181920212223
R196
X_2.2KR
VIDEOLMONO_L
R172 1KR0402 R173 1KR0402
C144
C0.1U16Y0402
R175 47R
R176 47R
R174 2.2KR
D D
VCC3
C143
C0.1U16Y0402
AC_14[13]
AC_RST#[11]
AC_SDIN0[11]
AC_SDOUT[11]
AC_SYNC[11] AC_BITCLK[11]
C145
X_C47P50N
C C
Reserve for Jack Sense
R197 X_2.2KR
CD IN
CDR1[22]
CDL1[22]
CDG1[22]
B B
CDR1
CDL1
CDG1 CD_GND
8P4R-4.7KR
7 8 5 6 3 4 1 2
GND_AUDIO
RN52
R195
2.7KR
C0.1U16Y0402
45444241403943
38
NC
ID1#
ID0#
AVDD3
AVDD2
AD1888
AUX_IN_R
JS1
JS0
CD_IN_L
CD_GND
CD_R
CD_L
CB45 C0.1U16Y0402
AVSS3
AVSS2
CD_IN_R
MIC1
37
LOUT_R
LOUT_L
AVDD4
MONO_OUT
AVSS4
SURR_OUT_L
SURR_OUT_R
LFE_OUT
CEN_OUT
AFILT2 AFILT1
VREFOUT
VREF
AVDD1
AVSS1
MIC2
LINE_IN_L
LINE_IN_R
_AD1888-1
24
IN_R
IN_L
VREF_OUT
+5VR
C166 C0.1U25Y
HP_ROUT HP_LOUT MONO
+5VR
36 35
34 33
32 31
30 29
VREF_OUT
28
AC_VREF
27 25
C146
C0.1U16Y0402
26
C154 C1U16Y0805
C157 C1U16Y0805
C160 X_C0.1U25Y
R186 47R
R188 X_750R C164 X_C0.1U25Y C178 X_C10U16X51206
C167
X_C0.01U16X
C142 C0.1U25Y
+5VR
C147 C1U10Y
RN51
8P4R-4.7KR
C161 X_C0.01U16X
R193 100R1%0402
C148
C0.1U16Y0402
78 56 34 12
R191 X_100R
R187 2.2KR
C163 C470P50X
R190 X_2.2KR
GND_AUDIO
C149
X_C0.1U25Y
C159 C470P50X
C470P50X
C270P50X
C155 C470P50X
C168
C150
C270P50X
INR
INL
MIC_PWR
MIC_IN
C151
C152 X_C270P50X
C153
X_C270P50X
0D: no-poped for ADI suggestion
EC86_CD100U16EL11
HP_ROUT
EC87_CD100U16EL11
HP_LOUT
IBM suggestion
C4.7U35Y1206
R183 20R
R189 20R
+12V
U40 LT1087S_SOT89
3 2
CB46
VIN VOUT
CB47
_C10U16X51206
4
VOUT
ADJ
1
R178
100R1%0402
R177 300R1%
REAR AUDIO (LINE OUT & MIC)
SPEAKER_L MONO_L MONO_R SPEAKER_R
INL
C445
GND_AUDIO
C444 X_C0.01U16X
X_C0.01U16X
INR
GND_AUDIO
C173 C470P50X
C171 C470P50X
FRONT AUDIO CONNECTOR (LINE O U T & MIC )
C165 C470P50X
HP_ROUT_F
HP_ROUT_REAR HP_LOUT_REAR
HP_LOUT_F
C162 C470P50X
MIC_PWR
MIC_IN
HP_ROUTF SPEAKER_R SPEAKER_L HP_LOUTF
R192 10KR1%
GND_AUDIO
GND_AUDIO
FB16 0R FB18 0R FB19 0R FB17 0R
R185 10KR1%
C156 X_C0.1U25Y
IBM suggestion
C158 X_C0.1U25Y
Ver:0B
+5VR
CB42 C10U10Y1206
CB41 C0.1U25Y
AUDIO2
2 3 4 5
22 23 24 25 14
1 6 7 8 9
JACK-AUDIOX2-9P_blue-green-1
AUDIO1
1
1
2
2
3
3
4
4
5
5
123
45
678
JACK-EAR5P_green
678
AUDIO3
1
1
2
2
3
3
4
4
5
5
123
45
678
JACK-MIC5P_pink
678
Internal Speaker
C141
X_C2200P16X
MONO
A A
PC_BEEP
8
R194 X_20KR1%
R202 20KR1%
SPKR[11,23]
0D: ADI suggestion
R200 15KR1%
R201 15KR1%
C177 C0.1U25Y
R204 100KR
7
C175 C1UY5V0805
C176 C1UY5V0805
1
SD
2
BYPASS
3
+IN
4
-IN
SSM2211S
R205 10KR
MONO_R
MONO_L
U12
VOUT_B
VOUT_A
R203 33KR1%
R_SPKR
8 7
-V
6
+V
5
C181 C0.01U16X
C0.01U16XC180
6
X_C1U16Y0805
GND_AUDIO
PC_R
C179
PC_N
CB43
C0.1U16Y0402
PC_BEEP
SPKR1
2 1
BH1X2BF_white
+5VR
CB48
C10U10Y1206
EMI COPPER
CP5 X_COPPER
GND_AUDIO
C443 X_C1000P50X
GND_AUDIO
COPPER
FB20 C1000P50X
GND_AUDIO
MSI
5
4
3
X_C0.01U16XC446
CP6 X_COPPER
X_C0.01U16XC447
GND_AUDIO
Title
Size Document Number Rev
Date: Sheet
MICRO-STAR INt'L CO., LTD.
AC97 AUDIO - AD1888
(MS-7164)
2
of
16 31Tuesday, August 16, 2005
1
0D
Page 17
8
VCC3_SB VCC5
D D
ICH_WAKE#[11,18] ICH_PETP_1[10]
ICH_PETN_1[10]
ICH_PERP_1[10] ICH_PERN_1[10]
EXP_A_TXP_13[8]
EXP_A_TXN_13[8]
EXP_A_TXP_14[8]
EXP_A_TXN_14[8]
EXP_A_TXP_15[8]
C C
B B
A A
EXP_A_TXN_15[8]
PCI_CLK1[13]
PCI_CLK0[13]
PREQ#2[10]
AD31[10] AD29[10]
AD27[10] AD25[10]
C_BE#3[10]
AD23[10]
AD21[10] AD19[10]
AD17[10]
C_BE#2[10]
IRDY#[10]
DEVSEL#[10]
LOCK#[10] PERR#[10]
SERR#[10]
C_BE#1[10]
AD14[10] AD12[10]
AD10[10]
PGNT#1[10]
8
ICH_WAKE# ICH_PETP_1
ICH_PETN_1
ICH_PERP_1 PIRQ#B ICH_PERN_1
EXP_A_TXP_13 EXP_A_TXN_13
EXP_A_TXP_14 EXP_A_TXN_14
EXP_A_TXP_15 EXP_A_TXN_15
PIRQ#F
PIRQ#H
AD8[10] AD7[10]
AD5[10] AD3[10]
AD1[10] AD0 [10]
AD[0..31][10] C_BE#[0..3][10]
7
VCC3
+12V
-12V VCC3
PCIE_1
B1
+12V1
B2
+12V2
B3
GND1
B4
GND2
B5
VCC3_1
B6
VCC3AUX
B7
WAKE-
B8
GND4
B9
PETP0_1
B10
PETN0_1
B11
GND6
B12
GND8
B13
PERP0_1
B14
PERN0_1
B15
GND10
B16
GND12
B17
SDVOB_BLUE+
B18
SDVOB_BLUE-
B19
GND14
B20
GND16
B21
SDVOB_GREEN+
B22
SDVOB_GREEN-
B23
GND18
B24
GND20
B25
SDVOB_RED+
B26
SDVOB_RED-
B27
GND22
B28
-12V
B29
GND24
B30
VCC5_2
B31
VCC5_3
B32
INT2_N
B33
INT4_N
B34
GND25
B35
PCI_CLK_2
B36
GND28
B37
GND29
B38
PCI_CLK_1
B39
GND30
B40
REQ_SLOT1_N
B41
VCC5_7
B42
AD31
B43
AD29
B44
GND32
B45
AD27
B46
AD25
B47
VCC3_5
B48
CBE_N3
B49
AD23
B50
GND35
B51
AD21
B52
AD19
B53
VCC3_6
B54
AD17
B55
CBE_N2
B56
GND37
B57
IRDY_N
B58
VCC3_8
B59
DEVSEL_N
B60
GND40
B61
PCILOCK_N
B62
PERR_N
B63
VCC3_10
B64
SERR_N
B65
VCC3_11
B66
CBE_N1
B67
AD14
B68
GND42
B69
AD12
B70
AD10
B71
GND44
B72
AD8
B73
AD7
B74
VCC3_14
B75
AD5
B76
AD3
B77
GND46
B78
AD1
B79
VCC5_8
B80
GNT_SLOT2_N
B81
VCC5_10
B82
VCC5_12
SLOT-PCI164_black-1pitch
7
6
PRSNT1-
12V3 12V4
GND3 VCC3_2 VCC3_3
PERST-
GND5
REFCLK+
REFCLK-
GND7
GND9
SDVOB_CLK+
SDVOB_CLK-
GND11 GND13
SDVO_STALL+
SDVO_STALL-
GND15 GND17
SDVOB_INT+
SDVOB_INT-
GND19 GND21
SDVO_CTR_CLK
SDVO_CTR_DATA
GND23
+12V5 VCC5_1
INT1_N INT3_N
VCC5_4
VCC5_5
GND26 GND27
SB3V
PCIRST_N
VCC5_6
GNT_SLOT1_N
GND31
PCI_PME_N
AD30
VCC3_4
AD28 AD26
GND33
TP_EDGECONN_A26
AD24
GND34
AD22 AD20
GND36
AD18 AD16
VCC3_7
FRAME_N
GND38
TRDY_N
GND39
STOP_N
VCC3_9
SM BCLK
SM BDATA
GND41
PCIPAR
AD15
VCC3_12
AD13 AD11
GND43
AD9
CBE_N0
VCC3_13
AD6 AD4
GND45
AD2 AD0
VCC5_9
REQ_SLOT2_N
VCC5_11 VCC5_13
6
A1 A2 A3 A4 A5 A6 A7 A8 A9 A10 A11
A12 A13 A14 A15 A16 A17 A18
A19 A20 A21 A22 A23 A24 A25 A26 A27 A28 A29 A30 A31 A32
A33 A34 A35 A36 A37 A38 A39 A40 A41 A42 A43 A44 A45 A46 A47 A48 A49
A50 A51 A52 A53 A54 A55 A56 A57 A58 A59 A60 A61 A62 A63 A64 A65 A66 A67 A68 A69 A70 A71 A72 A73 A74 A75 A76 A77 A78 A79 A80 A81 A82
+12V
VCC5
R206 10KR
RISER_DETECT_1
PCIRST#2 CK_PE_100M_16X
CK_PE_100M_16X#
EXP_A_TXP_12 EXP_A_TXN_12
EXP_A_RXP_13 EXP_A_RXN_13
EXP_A_RXP_14 EXP_A_RXN_14
SDVO_CTRL_CLK SDVO_CTRL_DATA
5
VCC3_SB
5
PIRQ#E PIRQ#G
R211 10KR
VCC3_SB
RISER_DETECT_1 [11]
PCIRST#2 [13,14,18,25] CK_PE_100M_16X [13]
CK_PE_100M_16X# [13]
EXP_A_TXP_12 [8] EXP_A_TXN_12 [8]
EXP_A_RXP_13 [8] EXP_A_RXN_13 [8]
EXP_A_RXP_14 [8] EXP_A_RXN_14 [8]
SDVO_CTRL_CLK [8] SDVO_CTRL_DATA [8]
PCIRST#1 [25] PGNT#2 [10] PCI_PME# [10]
AD30 [10] AD28 [10]
AD26 [10] AD24 [10]
RISER_DETECT_2 [11]
VCC3_SB
AD22 [10] AD20 [10]
AD18 [10] AD16 [10]
FRAME# [10] TRDY# [10] STOP# [10]
SMBCLK SMBDATA
PAR [10] AD15 [10]
AD13 [10] AD11 [10]
AD9 [10] C_BE#0 [10]
AD6 [10] AD4 [10]
AD2 [10]
PREQ#1 [10]
4
3
2
1
PCI PULL-UP / DOWN RESISTORS
R774 2.7KR
FRAME# TRDY#
DEVSEL#
STOP# LOCK# PERR# SERR#
PCI_PME#
RN29
8P4R-2.7KR
12 34 56 78
RN31
8P4R-2.7KR
12 34 56 78
R773 4.7KR
VCC5
VCC5
VCC3_SB
PREQ#3[10] PREQ#0[10]
PREQ#4[10] PREQ#5[10]
PIRQ#B[10] PIRQ#A[10] PIRQ#C[10] PIRQ#D[10] PIRQ#H[10] PIRQ#F[10] PIRQ#E[10] PIRQ#G[10]
PREQ#3 PREQ#2 PREQ#0 PREQ#1
PREQ#4 PREQ#5IRDY#
PIRQ#A PIRQ#C PIRQ#D PIRQ#H PIRQ#F PIRQ#E PIRQ#G
R775 2.7KR R776 2.7KR R777 2.7KR
R207 2.7KR R208 2.7KR
78 56 34 12 78 56 34 12
VCC5
VCC3
RN30 _8P4R-8.2KR
RN32 _8P4R-8.2KR
SMBus Isolation
SMBCLK
R772
SMBCLK_ISO
0R
0D
SMBDATA
R771
SMBDATA_ISO
0R
DECOUPLING CAPACITORS
VCC3_SB
EC4
_CD470U10EL11-2
+12V
C186
X_C0.1U25Y
4
3
C184 X_C0.1U25Y
+
EC5
.CD470U16EL11.5
C185 X_C0.1U25Y
C187 X_C0.1U25Y
Title
Size Document Number Rev
Date: Sheet
C188 X_C0.1U25Y
2
SMBCLK [11,14,18,27]
SMBCLK_ISO [11,13,14,20,25]
SMBDATA [11,14,18,27]
SMBDATA_ISO [11,13,14,20,25]
VCC3
EC6
_CD470U10EL11-2
VCC5
C190 X_C0.1U25Y
C182 C0.1U25Y
C191 X_C0.1U25Y
MICRO-STAR INt'L CO., LTD.
PCI-E & PCI & ADD2 - N
(MS-7164)
17 31Thursday, August 18, 2005
of
1
C183 C0.1U25Y
0D
Page 18
5
4
3
2
1
Gigabit LAN Tekoa
VCC3_SB
PLACE CAPACITORS AS CLOSE TO
POWER PINS AS POSSIBLE
C193
EC81
_CD100U16EL11
D D
C C
Depopulate Q9,Q10 and I82573E PIN:A2,A3
ICH_PERN_2[10] ICH_PERP_2[10]
ICH_PETN_2[10] ICH_PETP_2[10]
VCC3
C192 C0.1U25Y
SPI_MOSI[10] SPI_MISO[10]
SPI_CS#[10] SPI_CLK[10] SPI_ARB[10]
Removed at 0D
ICH_PERN_2 ICH_PERP_2 ICH_PETN_2 ICH_PETP_2
SPI_MOSI SPI_MISO SPI_CS# SPI_CLK SPI_ARB
R229 STUFF FOR SPI FLASH , NO STUFF FOR SPI EEPROM
C194
C0.1U25Y
X_C0.1U25Y
C212 C0.1U16X C0.1U25YC228
CK_PE_100M_LAN[13] CK_PE_100M_LAN#[13]
ICH_WAKE#[11,17] PCIRST#2[13,14,17,25]
SMBDATA[11,14,17,27] SMBCLK[11,14,17,27]
VCC3
R484 X_0R0402 R485 X_0R0402 R486 X_0R0402 R487 X_0R0402 R488 X_0R0402
R481 10KR0402 R482 X_1KR0402 R229 1KR0402
NVM Protection
NVM_PROT Protection
R481 N/A Enable
R481 3.3Kohm Disable
B B
NVM Shared
NVM_SHRD Share
R482 N/A Disable
R482 3.3Kohm Enable
NVM Device Type
NVMT Type
R229 N/A EEPROM
R229 3.3Kohm Flash
Internal Pull-up of NVM_PROT,NVM_SHRD,NVMT
R234
U14 _Pm25LV512-25SC
R225
2.2KR
4
GND
5
A A
S_MOSI S_CLK
R227 33R0402 R226 33R0402
10KR0402
AVDD2_5
PLACE CAPACITORS AS CLOSE TO
POWER PINS AS POSSIBLE
C198
C195 C1U10Y
R483 1KR
VCCHOLD#
WP#SI
SOSCK
CS#
C196
C197
C1U10Y
C0.1U25Y
VCC3_SB
U13
A2A3A7D9F3J4M2
VCC33-1
VCC33-2
VCC33-3
VCC33-4
VCC33-5
VCC33-6
VCC33-7
ICH_PERN2 ICH_PERP2
CK_PE_100M_LAN CK_PE_100M_LAN# TR_D3-
SMBDATA SMBCLK
TP_LAN_JTDI TP_LAN_JTDO TP_LAN_JTMS TP_LAN_JTCK
TP_U12_L3 TP_U12_L2
TP_U12_A8 TP_U12_B8 TP_U12_C8 TP_U12_C7
TP_U12_C3 TP_U12_N10
TP_U12_H1 TP_U12_H2 TP_U12_H3 TP_U12_J1 TP_U12_J2 TP_U12_J3 TP_U12_K1 TP_U12_L1 TP_U12_M1 TP_U12_M3 TP_U12_N2 TP_U12_P1 TP_U12_N3 TP_U12_M8 TP_U12_P9 TP_U12_E3 TP_U12_A14
87 35 26 1
D1
PETP0
C1
PETN0
F1
PERN0
F2
PERP0
G1
PECLKP
G2
PECLKN
P10
PEWAKE#
P7
PERST#
M11
SMB_DATA
P11
SMB_CLK
N11
S_MOSI S_MISO S_CS# CTRL2_5 S_CLK S_ARB
R233
2.2KR
SMB_ALRT#
A9
NVM_SI
B9
NVM_SO
B10
NVM_CS#
C9
NVM_SK
B4
NVM_REQ
A5
NVM_PROT
D3
NVM_SHRD
A6
NVMT
P4
JTDI
P6
JTDO
N4
JTMS
N5
JTCK
L3
THRMDP
L2
THRMDN
A8
SDP0
B8
SDP1
C8
SDP2
C7
SDP3
C3
DOCK_IND
N10
ALT_CLK125
H1
TESTPT_0
H2
TESTPT_1
H3
TESTPT_2
J1
TESTPT_3
J2
TESTPT_4
J3
TESTPT_5
K1
TESTPT_6
L1
TESTPT_7
M1
TESTPT_8
M3
TESTPT_9
N2
TESTPT_10
P1
TESTPT_11
N3
TESTPT_12
M8
TESTPT_13
P9
TESTPT_14
E3
TESTPT_15
A14
TESTPT_16
C230 C0.1U25Y
R232 33R0402
(82573E-LF)
VCC3_SB
S_MISO S_CS#
C199
C0.1U25Y
X_C0.1U25Y
AVDD2_5 AVDD12
VCC3_SB
M10N6N8P2P12
A11B6G3G5H4H5J12J5K13
VCC33-8
VCC33-9
VCC25-1
VCC25-2
VCC33-10
VCC33-11
VCC33-12
VSS
VSS
VSS
VSS
VSS
A1B3C10
C12C2D13D2D4D5D6D7D8E2E4E5E6E7E8E9E10F4F5F6F7F8F9
VCC3_SB
4
VCC25-3
VCC25-4
VSS
VSS
C525 C0.1U25Y
CTRL2_5
VCC25-5
VSS
VCC25-6
VCC25-7
VSS
VSS
C200 X_C1U10Y
L12M4N7B1B2
VCC25-8
VCC25-9
VSS
VSS
C526 C10U10Y0805
3 2
1
VCC25-10
VSS
A10C4C5
VCC12-1
VCC25-11
VCC25-12
VCC25-13
VCC25-14
VSS
VSS
VSS
VSS
VSS
VSS
Add at 0D
4
Q9 P-BCP69_SOT223
AVDD12
F12
G12
VCC12-2
VCC12-3
VCC12-4
VCC12-5
VSS
VSS
VSS
VSS
C527 C4.7U10Y0805
EC83
_CD100U16EL11
PLACE CAPACITORS AS CLOSE TO POWER PINS AS POSSIBLE
C206
C204 C0.1U25Y
G13G6H11
VCC12-6
VCC12-7
VSS
VSS
H12H6H7H8J10
VCC12-8
VCC12-9
VSS
VSS
F10
F11G4G7G8G9
C205 C1U10Y
VCC12-10
VCC12-11
VCC12-12
VCC12-13
VSS
VSS
VSS
VSS
C528 C2.2U10Y0805
C221 C0.1U25Y
J11J6J7J8J9
VCC12-14
VCC12-15
VSS
VSS
G10
C0.1U25Y
K10
K11K3K4K5K6K7K8K9L5L9L10
VCC12-16
VCC12-17
VCC12-18
VCC12-19
VCC12-20
VCC12-21
VSS
VSS
VSS
VSS
VSS
VSS
G11
G14H9H10K2N1
R831 1R0603
C220
C4.7U10Y0805
3
C207 C0.1U25Y
VCC12-22
VCC12-23
VSS
VSS
N12
P8
VCC12-24
C209
C208
C0.1U25Y
C1U10Y
VCC12-25
VCC12-26
VCC12-27
VCC12-28
VCC12-29
VCC12-30
C13
MDIP0
C14
MDIN0
E13
MDIP1
E14
MDIN1
F13
MDIP2
F14
MDIN2
H13
MDIP3
H14
MDIN3
B11
LED0#
C11
LED1#
A12
LED2#
K14
XTAL1
J14
XTAL2
B5
EN25_REG
A4
CTRL_25
P3
CTRL_12
L7
DEV_OFF#
HS_DACP HS_DACN
PHY_TSTPT
TEST
PHY_REF
RSVD RSVD
RSVD RSVD
CLK_VIEW
RSVD RSVD RSVD RSVD RSVD
P5 C6
B12 B13 B14 A13 D12 D10 D14
M14 L13 L14 P13 N13 M12 M13 N14
D11
NC
J13
NC
L8
NC
M5
NC
M7
NC
M9
NC
N9
NC
P14
NC
B7
NC
E1
NC
K12
NC
L11
NC
L6
NC
M6
NC
L4
NC
E11
NC
E12
NC
LAN_PWRGOOD
AUX_PRESENT
0C for Intel AP note
VCC3_SB
R490 1R1206
C222 C0.1U25Y
R491 X_2.2R1206
C210 C0.1U25Y
TR_D0+ TR_D0­TR_D1+ TR_D1­TR_D2+ TR_D2­TR_D3+
R236 X_2.2KR R235 2.2KR
ENET_DISABLE#
R489 1KR
LAN_KIN_DISABLE_3 LAN_KIN_DISABLE_1
CTRL1_2
XTALI
XTALO
100_LED# ACT_LED# 1G_LED#
XTALI XTALO
CTRL1_2
LAN_GBE_RBIAS_DP
TP_U12_C3
VCC3_SB
4
3 2
Q10 P-BCP69_SOT223
1
C223
C22P50N
X1
25MHZ18P_D-1
C224 C22P50N
VCC3_SB
R237 X_2.2KR
VCC3_SB
R230 1KR R228 4.99KR1%
R832
RSMRST#
0R0603
0C
R833 X_1KR
_CD100U16EL11
C524
0R_X_C0.1U25Y
TR_D0+ TR_D0-
TR_D1+ TR_D1-
TR_D2+ TR_D2-
TR_D3+ TR_D3-
R213 X_330R R214 X_330R R215 0R
CP16 X_COPPER
VCC3_SB AVDD2_5
Add at 0D
Internal 2.5V regulator
EN25_REG REG
PULL LOW Disable
PULL HIGH Enable
ENET_DISABLE# [11]
RSMRST# [11,14,25]
AVDD12AVDD2_5
EC82
C202 C0.1U25Y
2
C231
C0.1U25Y
VCC3_SB
ACT_LED#
Integrated Gigabit LAN Transform
N58-22F0041-S42
Check P/N:
R218 49.9R1%0402 R217 49.9R1%0402 C0.01U16XC217
R220 49.9R1%0402 C0.1U25YC227 C0.01U16XC218 R219 49.9R1%0402
R222 49.9R1%0402 R221 49.9R1%0402
R224 49.9R1%0402 R223 49.9R1%0402
C203
R830 1R0603
C0.1U25Y C201 C4.7U10Y0805
LAN CONNECTOR
USB3B
1G_LED# 100_LED# LPWR TR_D0+ TR_D0­TR_D1+ TR_D1­TR_D2+ TR_D2­TR_D3+ TR_D3-
LGND
R216 330R
C0.1U25YC226
C0.1U25YC229
Title
Size Document Number Rev
Date: Sheet of
GREEN
19
ORANGE
20 13 18 12 17 11 16 10 15
9
14
AMBER
21
TR_LED
22
CONN-RJ45_USBX2_LEDX2-22P-30u
100_LED# 1G_LED# TR_LED
MICRO-STAR INt'L CO., LTD.
LEFT RIGHT
POWER
TD1+ TD1­TD2+ TD2­TD3+ TD3­TD4+ TD4-
GND
C0.01U16XC219C211 C0.1U16X
LAN Intel Tekoa 82573E
(MS-7164)
1
18 31Thursday, August 18, 2005
0D
Page 19
5
4
3
2
1
eXDP Port
NOPOP
D D
DBRESET#[3,11] CPU2_ITP#[13] CPU2_ITP[13]
H_PWRGD[3,10]
H_CPURST#[3,6]
TESTIN#[8]
H_TDO[3] H_TDI[3] H_TMS[3]
C C
VTT_OUT_RIGHT
B B
H_TCK[3] H_TRST#[3]
R812 X_100R0402 R816 X_49.9R1%0603 R809 62R0402
R817 X_49.9R1%0603
R810 X_150R5%0603
H_TDO H_TDI H_TMS H_TCK H_TRST#
DBRESET# TESTIN#
H_CPURST#_R
H_TRST#
DBRESET# H_BPM#5
H_CPURST#_R
TESTIN#
48 42 40 39 46 41
53 51
52 56 58 57 54
1 2 7
8 13 14 19 20 25 26 31 32 37 38 49 50 59 60
DBR ITP_CLKN ITP_CLKP PWRGD RESET# TESTIN#
SCL SDA
TDO TDI TMS TCK TRST#
VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS
NOA_PILOTCLK
NOA_PILOTCLK#
NOA_PILOT0 NOA_PILOT1 NOA_PILOT2 NOA_PILOT3 NOA_PILOT4 NOA_PILOT5 NOA_PILOT6 NOA_PILOT7
JXDP1
BPM5# BPM4# BPM3# BPM2# BPM1# BPM0#
VTT VTT
NC NC NC NC NC NC NC NC NC NC NC
3 5 9 11 15 17
43 44
4 6 10 12 16 18 28 30 34 36
21 22 23 24 27 29 33 35 45 47 55
H_BPM#4CPU2_ITP# H_BPM#3CPU2_ITP H_BPM#2H_PWRGD H_BPM#1 H_BPM#0
C448 C0.1U16Y0402
H_BPM#[0..5] [3]
VTT_OUT_RIGHT [3,4,5]
C449
C0.1U16Y0402
X_eXDP
MSI
A A
Title
MICRO-STAR INt'L CO., LTD.
BLANK Page
Size Document Number Rev
(MS-7164)
5
4
3
Date: Sheet of
2
19 31Tuesday, August 16, 2005
1
0D
Page 20
5
DDR2 DIMM1
M_CHA_DQ[0..63][7]
D D
C C
B B
M_CHA_DQ0 M_CHA_DQ1 M_CHA_DQ2 M_CHA_DQ3 M_CHA_DQ4 M_CHA_DQ5 M_CHA_DQ6 M_CHA_DQ7 M_CHA_DQ8 M_CHA_DQ9 M_CHA_DQ10
M_CHA_DQ12 M_CHA_DQ13 M_CHA_DQ14 M_CHA_DQ15 M_CHA_DQ16 M_CHA_DQ17 M_CHA_DQ18 M_CHA_DQ19 M_CHA_DQ20 M_CHA_DQ21 M_CHA_DQ22 M_CHA_DQ23 M_CHA_DQ24 M_CHA_DQ25 M_CHA_DQ26 M_CHA_DQ27 M_CHA_DQ28 M_CHA_DQ29 M_CHA_DQ30 M_CHA_DQ31 M_CHA_DQ32 M_CHA_DQ33 M_CHA_DQ34 M_CHA_DQ35 M_CHA_DQ36 M_CHA_DQ37 M_CHA_DQ38 M_CHA_DQ39 M_CHA_DQ40 M_CHA_DQ41 M_CHA_DQ42 M_CHA_DQ43 M_CHA_DQ44 M_CHA_DQ45 M_CHA_DQ46 M_CHA_DQ47 M_CHA_DQ48 M_CHA_DQ49 M_CHA_DQ50 M_CHA_DQ51 M_CHA_DQ52 M_CHA_DQ53 M_CHA_DQ54 M_CHA_DQ55 M_CHA_DQ56 M_CHA_DQ57 M_CHA_DQ58 M_CHA_DQ59 M_CHA_DQ60 M_CHA_DQ61 M_CHA_DQ62 M_CHA_DQ63
DIMM1
3 4 9
10 122 123 128 129
12
13
21
22 131 132 140 141
24
25
30
31 143 144 149 150
33
34
39
40 152 153 158 159
80
81
86
87 199 200 205 206
89
90
95
96 208 209 214 215
98
99 107 108 217 218 226 227 110 111 116 117 229 230 235 236
2 5
8 11 14 17 20 23 26 29 32 35 38 41 44 47 50 65 66 79 82 85 88 91 94 97
DQ0 DQ1 DQ2 DQ3 DQ4 DQ5 DQ6 DQ7 DQ8 DQ9 DQ10 DQ11 DQ12 DQ13 DQ14 DQ15 DQ16 DQ17 DQ18 DQ19 DQ20 DQ21 DQ22 DQ23 DQ24 DQ25 DQ26 DQ27 DQ28 DQ29 DQ30 DQ31 DQ32 DQ33 DQ34 DQ35 DQ36 DQ37 DQ38 DQ39 DQ40 DQ41 DQ42 DQ43 DQ44 DQ45 DQ46 DQ47 DQ48 DQ49 DQ50 DQ51 DQ52 DQ53 DQ54 DQ55 DQ56 DQ57 DQ58 DQ59 DQ60 DQ61 DQ62 DQ63
VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS
102195156627278
18
55
NC
RC1
RC0
NC/TEST
VSS
VSS
VSS
VSS
100
103
106
109
V_SM
68
NC
VSS
112
191
194
181
175
170535964197
75
VDD0
VDD1
VDD2
VDD3
VDD4
VDD5
VDD6
VDD3
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
115
118
VSS
121
124
127
130
133
136
139
69
VDD7
VDD8
VDDQ0
VDDQ1
VDDQ2
VDDQ3
VDDQ4
VDDQ4
VSS
VSS
VSS
VSS
VSS
VSS
VSS
142
VSS
145
148
151
154
157
160
163
4
VCC3 VCC3
42434849161
162
167
172
187
184
18967238
178
VDDQ5
VDDQ6
VDDQ7
VDDQ8
VDDQ9
VDDQ7
VDDSPD
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
166
169
VSS
198
201
204
207
210
213
216
168
CB0
CB1
CB2
CB3
CB4
CB5
CB6
CB7
M_CHA_DQS0
7
DQS0
~M_CHA_DQS0
6
DQS0# DQS1# DQS2# DQS3# DQS4# DQS5# DQS6# DQS7# DQS8#
A10_AP
A16/BA2
DM0/DQS9
NC/DQS9# DM1/DQS10 NC/DQS10# DM2/DQS11 NC/DQS11# DM3/DQS12 NC/DQS12# DM4/DQS13 NC/DQS13# DM5/DQS14 NC/DQS14# DM6/DQS15 NC/DQS15# DM7/DQS16 NC/DQS16# DM8/DQS17 NC/DQS17#
CK0(DU)
CK0#(DU)
CK1(CK0)
CK1#(CK0#)
CK2(DU)
CK2#(DU)
VSS
VSS
VSS
VSS
VSS
VSS
219
222
225
228
231
234
DQS1 DQS2 DQS3 DQS4 DQS5 DQS6 DQS7 DQS8
A0 A1 A2 A3 A4 A5 A6 A7 A8 A9
A11 A12 A13 A14 A15
BA1 BA0
WE# CAS# RAS#
ODT0 ODT1
CKE0 CKE1
CS0#
CS1#
SCL
SDA
VREF
SA0 SA1 SA2
VSS
DDR2/BLACK
237
16 15 28 27 37 36 84 83 93 92 105 104 114 113 46 45
188 183 63 182 61 60 180 58 179 177 70 57 176 196 174 173
54 190 71
~M_CHA_WE
73
~M_CHA_CAS
74
~M_CHA_RAS
192
M_CHA_DM0
125 126
M_CHA_DM1
134 135
M_CHA_DM2
146 147
M_CHA_DM3
155 156
M_CHA_DM4
202 203
M_CHA_DM5
211 212
M_CHA_DM6
223 224
M_CHA_DM7
232 233 164 165
195 77
52 171
~M_CHA_CS0
193
~M_CHA_CS1
76 185
186 137 138 220 221
120 119
M_DIMM_VREF
1
239 240 101
M_CHA_DQS1 ~M_CHA_DQS1 M_CHA_DQS2 ~M_CHA_DQS2 M_CHA_DQS3 ~M_CHA_DQS3 M_CHA_DQS4 ~M_CHA_DQS4 M_CHA_DQS5M_CHA_DQ11 ~M_CHA_DQS5 M_CHA_DQS6 ~M_CHA_DQS6 M_CHA_DQS7 ~M_CHA_DQS7
M_CHA_MA0 M_CHA_MA1 M_CHA_MA2 M_CHA_MA3 M_CHA_MA4 M_CHA_MA5 M_CHA_MA6 M_CHA_MA7 M_CHA_MA8 M_CHA_MA9 M_CHA_MA10 M_CHA_MA11 M_CHA_MA12 M_CHA_MA13
M_CHA_BA2 M_CHA_BA1 M_CHA_BA0
M_CHA_ODT0 M_CHA_ODT1
M_CHA_CKE0 M_CHA_CKE1
M_CHA_SCK0 ~M_CHA_SCK0 M_CHA_SCK1 ~M_CHA_SCK1 M_CHA_SCK2 ~M_CHA_SCK2
SMBCLK_ISO SMBDATA_ISO
M_CHA_DQS0 [7] ~M_CHA_DQS0 [7] M_CHA_DQS1 [7] ~M_CHA_DQS1 [7] M_CHA_DQS2 [7] ~M_CHA_DQS2 [7] M_CHA_DQS3 [7] ~M_CHA_DQS3 [7] M_CHA_DQS4 [7] ~M_CHA_DQS4 [7] M_CHA_DQS5 [7] ~M_CHA_DQS5 [7] M_CHA_DQS6 [7] ~M_CHA_DQS6 [7] M_CHA_DQS7 [7] ~M_CHA_DQS7 [7]
M_CHA_MA[0..13] [7,21]
M_CHA_BA[0..2] [7,21]
~M_CHA_WE [7,21] ~M_CHA_CAS [7,21] ~M_CHA_RAS [7,21] M_CHA_DM[0..7] [7]
M_CHA_ODT[0..1] [7,21]
M_CHA_CKE[0..1] [7,21]
~M_CHA_CS[0..1] [7,21]
M_CHA_SCK0 [7] ~M_CHA_SCK0 [7] M_CHA_SCK1 [7] ~M_CHA_SCK1 [7] M_CHA_SCK2 [7] ~M_CHA_SCK2 [7]
SMBCLK_ISO [11,13,14,17,25] SMBDATA_ISO [11,13,14,17,25]
3
DDR2 DIMM2
M_CHB_DQ[0..63][7]
M_CHB_DQ0 M_CHB_DQ1 M_CHB_DQ2 M_CHB_DQ3 M_CHB_DQ4 M_CHB_DQ5 M_CHB_DQ6 M_CHB_DQ7 M_CHB_DQ8
M_CHB_DQ9 M_CHB_DQ10 M_CHB_DQ11 M_CHB_DQ12 M_CHB_DQ13 M_CHB_DQ14 M_CHB_DQ15 M_CHB_DQ16 M_CHB_DQ17 M_CHB_DQ18 M_CHB_DQ19 M_CHB_DQ20 M_CHB_DQ21 M_CHB_DQ22 M_CHB_DQ23 M_CHB_DQ24 M_CHB_DQ25 M_CHB_DQ26 M_CHB_DQ27 M_CHB_DQ28 M_CHB_DQ29 M_CHB_DQ30 M_CHB_DQ31 M_CHB_DQ32 M_CHB_DQ33 M_CHB_DQ34 M_CHB_DQ35 M_CHB_DQ36 M_CHB_DQ37 M_CHB_DQ38 M_CHB_DQ39 M_CHB_DQ40 M_CHB_DQ41 M_CHB_DQ42 M_CHB_DQ43 M_CHB_DQ44 M_CHB_DQ45 M_CHB_DQ46 M_CHB_DQ47 M_CHB_DQ48 M_CHB_DQ49 M_CHB_DQ50 M_CHB_DQ51 M_CHB_DQ52 M_CHB_DQ53 M_CHB_DQ54 M_CHB_DQ55 M_CHB_DQ56 M_CHB_DQ57 M_CHB_DQ58 M_CHB_DQ59 M_CHB_DQ60 M_CHB_DQ61 M_CHB_DQ62 M_CHB_DQ63
DIMM2
3 4 9
10 122 123 128 129
12
13
21
22 131 132 140 141
24
25
30
31 143 144 149 150
33
34
39
40 152 153 158 159
80
81
86
87 199 200 205 206
89
90
95
96 208 209 214 215
98
99 107 108 217 218 226 227 110 111 116 117 229 230 235 236
2 5
8 11 14 17 20 23 26 29 32 35 38 41 44 47 50 65 66 79 82 85 88 91 94 97
DQ0 DQ1 DQ2 DQ3 DQ4 DQ5 DQ6 DQ7 DQ8 DQ9 DQ10 DQ11 DQ12 DQ13 DQ14 DQ15 DQ16 DQ17 DQ18 DQ19 DQ20 DQ21 DQ22 DQ23 DQ24 DQ25 DQ26 DQ27 DQ28 DQ29 DQ30 DQ31 DQ32 DQ33 DQ34 DQ35 DQ36 DQ37 DQ38 DQ39 DQ40 DQ41 DQ42 DQ43 DQ44 DQ45 DQ46 DQ47 DQ48 DQ49 DQ50 DQ51 DQ52 DQ53 DQ54 DQ55 DQ56 DQ57 DQ58 DQ59 DQ60 DQ61 DQ62 DQ63
VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS
102195156627278
18
55
NC
RC1
RC0
NC/TEST
VSS
VSS
VSS
VSS
100
103
106
109
2
V_SM
68
NC
VSS
112
191
194
181
175
170535964197
75
VDD0
VDD1
VDD2
VDD3
VDD4
VDD5
VDD6
VDD7
VDD8
VDD3
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
115
118
121
124
VSS
127
130
133
136
139
142
145
148
1
42434849161
162
167
172
187
184
18967238
69
178
VDDQ0
VDDQ1
VDDQ2
VDDQ3
VDDQ4
VDDQ5
VDDQ6
VDDQ7
VDDQ8
VDDQ9
VDDQ4
VDDQ7
VDDSPD
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
151
154
157
160
163
166
169
VSS
198
201
204
207
210
213
216
168
CB0
CB1
CB2
CB3
CB4
CB5
CB6
CB7
M_CHB_DQS0
7
DQS0
~M_CHB_DQS0
6
DQS0#
M_CHB_DQS1
16
DQS1
~M_CHB_DQS1
15
DQS1#
M_CHB_DQS2
28
DQS2
~M_CHB_DQS2
27
DQS2#
M_CHB_DQS3
37
DQS3
~M_CHB_DQS3
36
DQS3#
M_CHB_DQS4
84
DQS4
~M_CHB_DQS4
83
DQS4#
M_CHB_DQS5
93
DQS5
~M_CHB_DQS5
92
DQS5#
M_CHB_DQS6
105
DQS6
~M_CHB_DQS6
104
DQS6#
M_CHB_DQS7
114
DQS7
~M_CHB_DQS7
113
DQS7#
46
DQS8
45
DQS8#
A10_AP
A16/BA2
DM0/DQS9
NC/DQS9# DM1/DQS10 NC/DQS10# DM2/DQS11 NC/DQS11# DM3/DQS12 NC/DQS12# DM4/DQS13 NC/DQS13# DM5/DQS14 NC/DQS14# DM6/DQS15 NC/DQS15# DM7/DQS16 NC/DQS16# DM8/DQS17 NC/DQS17#
CK0(DU) CK0#(DU) CK1(CK0)
CK1#(CK0#)
CK2(DU) CK2#(DU)
VSS
VSS
VSS
VSS
VSS
VSS
219
222
225
228
231
234
A0 A1 A2 A3 A4 A5 A6 A7 A8 A9
A11 A12 A13 A14 A15
BA1 BA0
WE# CAS# RAS#
ODT0 ODT1
CKE0 CKE1
CS0# CS1#
SCL
SDA
VREF
SA0 SA1 SA2
VSS
DDR2/BLACK
237
188 183 63 182 61 60 180 58 179 177 70 57 176 196 174 173
M_CHB_BA2
54
M_CHB_BA1
190
M_CHB_BA0
71
~M_CHB_WE
73
~M_CHB_CAS
74
~M_CHB_RAS
192
M_CHB_DM0
125 126
M_CHB_DM1
134 135
M_CHB_DM2
146 147
M_CHB_DM3
155 156
M_CHB_DM4
202 203
M_CHB_DM5
211 212
M_CHB_DM6
223 224
M_CHB_DM7
232 233 164 165
M_CHB_ODT0
195
M_CHB_ODT1
77
M_CHB_CKE0
52
M_CHB_CKE1
171
~M_CHB_CS0
193
~M_CHB_CS1
76 185
186 137 138 220 221
120 119
M_DIMM_VREF
1
VCC3 239 240 101
M_CHB_MA0 M_CHB_MA1 M_CHB_MA2 M_CHB_MA3 M_CHB_MA4 M_CHB_MA5 M_CHB_MA6 M_CHB_MA7 M_CHB_MA8 M_CHB_MA9 M_CHB_MA10 M_CHB_MA11 M_CHB_MA12 M_CHB_MA13
M_CHB_SCK0 ~M_CHB_SCK0 M_CHB_SCK1 ~M_CHB_SCK1 M_CHB_SCK2 ~M_CHB_SCK2
SMBCLK_ISO SMBDATA_ISO
Ver:0B
M_CHB_DQS0 [7] ~M_CHB_DQS0 [7] M_CHB_DQS1 [7] ~M_CHB_DQS1 [7] M_CHB_DQS2 [7] ~M_CHB_DQS2 [7] M_CHB_DQS3 [7] ~M_CHB_DQS3 [7] M_CHB_DQS4 [7] ~M_CHB_DQS4 [7] M_CHB_DQS5 [7] ~M_CHB_DQS5 [7] M_CHB_DQS6 [7] ~M_CHB_DQS6 [7] M_CHB_DQS7 [7] ~M_CHB_DQS7 [7]
M_CHB_MA[0..13] [7,21]
M_CHB_BA[0..2] [7,21]
~M_CHB_WE [7,21] ~M_CHB_CAS [7,21] ~M_CHB_RAS [7,21]
M_CHB_DM[0..7] [7]
M_CHB_ODT[0..1] [7,21]
M_CHB_CKE[0..1] [7,21]
~M_CHB_CS[0..1] [7,21]
M_CHB_SCK0 [7] ~M_CHB_SCK0 [7] M_CHB_SCK1 [7] ~M_CHB_SCK1 [7] M_CHB_SCK2 [7] ~M_CHB_SCK2 [7]
ADDR.=1010000B(A0H)
A A
5
4
PLACE 0.1UF CAP CLOSE TO RESISTOR DIVIDER
V_SM
R239 1KR1%0402
R240 1KR1%0402
C233 CLOSE TO CH_A DIMMS
M_DIMM_VREF
C233 C0.1U16Y0402
3
C234 C0.1U16Y0402
C234 CLOSE TO CH_B DIMMS
2
ADDR.=1010001B(A2H)
Title
Size Document Number Rev
Date: Sheet
MSI
MICRO-STAR INt'L CO., LTD.
DDR II 2-Channel DIMM 1,2
(MS-7164)
1
0D
of
20 31Tuesday, August 16, 2005
Page 21
8
7
6
5
4
3
2
1
CH A +0_9V DECOULPING CAPS
V_SM_VTT V_SM_VTT
C236 C0.1U16Y0402
D D
C C
B B
C238 C0.1U16Y0402 C240 C0.1U16Y0402 C242 C0.1U16Y0402 C244 C0.1U16Y0402 C246 C0.1U16Y0402 C248 C0.1U16Y0402
PLACED AT LEFT AND RIGHT ENDS OF
VTT ISLAND
C249 C4.7U10Y0805 C251 C4.7U10Y0805
CH B +0_9V DECOULPING CAPS
V_SM_VTT
V_SM V_SM
C253 C0.1U16Y0402 C255 C0.1U16Y0402 C257 C0.1U16Y0402 C259 C0.1U16Y0402 C261 C0.1U16Y0402 C263 C0.1U16Y0402 C265 C0.1U16Y0402
C267 C1U10Y C270 C1U10Y C272 C1U10Y C274 C1U10Y
V_SM
V_SM_VTTV_SM_VTT
V_SM_VTT
V_SM
C235 C0.1U16Y0402 C237 C0.1U16Y0402 C239 C0.1U16Y0402 C241 C0.1U16Y0402 C243 C0.1U16Y0402 C245 C0.1U16Y0402 C247 C0.1U16Y0402
C250 C4.7U10Y0805 C252 C4.7U10Y0805
C254 C0.1U16Y0402 C256 C0.1U16Y0402 C258 C0.1U16Y0402 C260 C0.1U16Y0402 C262 C0.1U16Y0402 C264 C0.1U16Y0402 C266 C0.1U16Y0402
C268 C1U10Y C271 C1U10Y C273 C1U10Y C275 C1U10Y
~M_CHA_RAS[7,20] ~M_CHA_CAS[7,20]
~M_CHA_WE[7,20]
M_CHA_MA[0..13][7,20]
M_CHA_BA[0..2][7,20] ~M_CHA_CS[0..1][7,20] M_CHA_CKE[0..1][7,20] M_CHA_ODT[0..1][7,20]
Grantsdale GMCH Power Sequencing Requirement Between 1.5V Core and 2.5V DAC
R826 X_1KR
M_CHA_MA13 ~M_CHA_RAS ~M_CHA_CAS ~M_CHA_WE
M_CHA_BA1 M_CHA_MA10 M_CHA_BA0 M_CHA_MA0
M_CHA_MA1 M_CHA_MA3 M_CHA_MA2 M_CHA_MA4
M_CHA_MA8 M_CHA_MA6 M_CHA_MA5 M_CHA_MA9
M_CHA_MA7 M_CHA_MA11 M_CHA_MA12 M_CHA_BA2
M_CHA_ODT1 ~M_CHA_CS1 ~M_CHA_CS0 M_CHA_CKE0 M_CHA_ODT0 M_CHA_CKE1
9VSBVCC5_SB
R820 1KR
VCC3
C277
C4.7U10Y0805
1 2 3 4 5 6 7 8
1 2 3 4 5 6 7 8
1 2 3 4 5 6 7 8
1 2 3 4 5 6 7 8
SOT23EBC
A A
8
7
6
SLP_S3#[11,14,23,25]
V_1P5_CORE
R822
4.7KR
R823
4.7KR
5
Q70
N-MMBT3904_NL_SOT23
ECB
SOT23EBC
Q71
N-MMBT3904_NL_SOT23
ECB
V_SM_VTT
R243 33R0402 R244 33R0402 R245 33R0402 R246 33R0402
RN34
RN36
RN38
RN40
R247 40.2R1%0402 R249 40.2R1%0402 R251 40.2R1%0402 R253 40.2R1%0402 R255 40.2R1%0402 R257 40.2R1%0402
D S
G
R821
4.7KR
4
8P4R-33R0402
8P4R-33R0402
8P4R-33R0402
8P4R-33R0402
Q11 N-2N7002_SOT23
1
LM358/SOIC8 C276 X_C100P50N
Q69
N-2N7002_SOT23
9VSB
M_CHB_MA10
~M_CHB_WE[7,20]
~M_CHB_CAS[7,20]
~M_CHB_RAS[7,20]
M_CHB_MA[0..13][7,20]
M_CHB_BA[0..2][7,20] ~M_CHB_CS[0..1][7,20] M_CHB_CKE[0..1][7,20] M_CHB_ODT[0..1][7,20]
+
R824 130R1%
U16A
3
+
2
-
4 8
3
R825 120R1%
EC80
_CD470U10EL11-2
~M_CHB_WE M_CHB_MA13 ~M_CHB_CAS
M_CHB_MA0 M_CHB_BA1 M_CHB_BA0 ~M_CHB_RAS
M_CHB_MA1 M_CHB_MA4 M_CHB_MA3 M_CHB_MA2
M_CHB_MA7 M_CHB_MA8 M_CHB_MA5 M_CHB_MA6
M_CHB_BA2 M_CHB_MA12 M_CHB_MA9 M_CHB_MA11
M_CHB_CKE1 M_CHB_CKE0 ~M_CHB_CS1
~M_CHB_CS0 M_CHB_ODT1 M_CHB_ODT0
V_2P5_MCH
C278
X_C2.2U6.3Y
MSI
Title
Size Document Number Rev
Date: Sheet
1 2 3 4 5 6 7 8
1 2 3 4 5 6 7 8
1 2 3 4 5 6 7 8
1 2 3 4 5 6 7 8
1 2 3 4 5 6 7 8
C269 C0.1U25Y
MICRO-STAR INt'L CO., LTD.
DDR 2 VTT DECOU PLI NG
2
V_SM_VTT
RN33
RN35
RN37
RN39
RN41
R248 40.2R1%0402 R250 40.2R1%0402 R252 40.2R1%0402 R254 40.2R1%0402 R256 40.2R1%0402 R258 40.2R1%0402
1P2VREF [25]
V_1P5_CORE
D27
1N4001_DO214AC
(MS-7164)
8P4R-33R0402
8P4R-33R0402
8P4R-33R0402
8P4R-33R0402
8P4R-33R0402
V_2P5_MCH
21 31Tuesday, August 16, 2005
1
0D
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Page 22
8
7
6
5
4
3
2
1
D D
C C
B B
PRIMARY SLIME IDE
IBM Ultrabay Slim and Ultrabay Enhance d
CDL1[16] CDG1[16]
HD_RST#[25]
PDD[0..7][11]
R273
X_4.7KR
PD_IOW# PD_IORDY
R274
8.2KR0402
PD_IOW#[11]
PD_IORDY[11] PD_DACK# [11]
IDE_IRQ[10]
PD_A1[11] PD_A0[11]
PD_CS#1[11] PD_CS#3 [11]
IDEACTP#[23]
VCC3 VCC5
CDL1 CDR1 CDG1 HD_RST# PDD7 PDD6 PDD5 PDD4 PDD3 PDD2 PDD1 PDD0
R432 0R0402
R431 0R0402
IDE_IRQ PD_A1 PD_A0 PD_A2 PD_CS#1 PD_CS#3 IDEACTP#
VCC5
R275
4.7KR
R278 100KR
IDE1
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
_BH2X25S_black-2pitch
C286 X_C4700P50X
CDG1 PDD8 PDD9 PDD10 PDD11 PDD12 PDD13 PDD14 PDD15
R433 0R0402 R434 0R0402
VCC5
C287 X_C4700P50X
PD_DREQ PD_IOR#
PD_DACK# ATADET0
BAY_ATTACH# BAY_IS_HDD
R276 47KR R277 X_10KR0402
R279 10KR0402
R280 10KR0402
CDR1 [16] PDD[8..15] [11]
PD_DREQ [11] PD_IOR# [11]
ATADET0 [11] PD_A2 [11]
BAY_ATTACH# [14]
BAY_IS_HDD [11] VCC3 VCC5
VCC3
SERIAL ATA CONNECTOR BLOCK
SATA_TX0[11]
SATA_TX#0[11]
SATA_RX#0[11]
SATA_RX0[11]
C281 C0.01U16X0402 C282 C0.01U16X0402
C283 C0.01U16X0402 C284 C0.01U16X0402
Default 10nF , Option 0 ohm
20:5:7:5:20<5"
ST_TX0 ST_TX#0
ST_RX#0 ST_RX0
SATA1 _CONN-SATA11_black
1
GND
2
HT+
3
HT-
4
GND
5
HR-
6
HR+
9
GND
G
G
7
8
A A
MSI
Title
Size Document Number Rev
8
7
6
5
4
3
Date: Sheet
MICRO-STAR INt'L CO., LTD.
IBM Slim IDE & SA T A C O N N .
(MS-7164)
2
22 31Tuesday, August 16, 2005
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8
D D
PSON#[14]
SLP_S3#[11,14,21,25]
AGP_PRT[25]
R291 47KR
FRONT PANEL
C C
JFP1
9
10
_BH1X8P_black-15u-in
C298 C470P50X
HDDLED
1
R304 330R
2 3 4 5 6 7 8
P_LED2 PWRSW
R307 330R
VCC5
7
CE
USB_STR
VCC3_SB
R293 0R
R303 330R
C299 C1000P50X
R305
4.7KR
C300 X_C0.1U25Y
PSON#
B
Q20
N-MMBT3904_NL_SOT23
R_PSON#
DS
Q21 X_N-2N7002_SOT23
G
POWER LE D
R306 470R
6
ATX CONNECTOR
VCC5_SB
SIO_GRN_LED [14]
PWRBTN# [11]
C301 C1U16Y0805
R290 1KR
C292
C1000P50X
5
ATX1
11
3.3V
VCC3
-12V
R_PSON#
C291
C0.1U25Y
-5V
CB37
C1U10V
12 13 14 15 16 17 18 19 20
POWER
PWR-ATX20
-12V GND PSON GND GND GND
-5V 5V 5V
3.3V
3.3V
GND
5V
GND
5V
GND
POK
5VSB
12V
4
1 2 3 4 5 6 7 8 9 10
CB38 C0.1U25Y
CB33 C0.1U25Y
CB35 C1U10V
CB39 C1U10V
0D change for EFT
HDDLED
3
D31
IDEACTP#[22]
S-BAT54A_SOT23
2
R302
4.7KR
1
IDE LED SATA LED
VCC3
CB34 C1U10V
0D change for EFT
VCC5
CB36 C1U10V
VCC5_SBVCC5 +12V
0D change for EFT
VCC3
SATALED# [11]
3
VCC5
R292
4.7KR
C296 C1000P50X
BUZZER
SPKR[11,16]
PWR_OK [14,25]
R301 2.2KR
N-MMBT3904_NL_SOT23
2
B
R299 220R R300 220R
CE
Q23
VCC5
D30 BAS32L_LL34
C297 C0.1U25Y
1
1 2
BZ1
BUZZER
CPU FAN1REAR FAN1FRONT FAN1
B B
A A
D28 RLS4148N
R281 4.7KR
R285
X_0R0805
C421
C0.1U25Y
+
EC71 .CD470U16EL11.5
PWM_CPU[14]
8
R282 27KR
VCC3 VCC3
PWM_CPU PWM_REAR
D43 RLS4148N
R828 220R
7
R283
10KR
CPU_FAN [14]
FRONT_FAN1
1 2 3 4
BH1X4BFP_white
6
+12V +12V+12V
D35 RLS4148N
R410 4.7KR R414
X_0R0805
C420
C0.1U25Y
+
EC72 .CD470U16EL11.5
PWM_REAR[14]
5
R411 27KR
D44 RLS4148N
R829 220R
R412
10KR
REAR_FAN [14]
REAR_FAN1
1 2 3 4
BH1X4BFP_white
4
D36 RLS4148N
R416 4.7KR R429
X_0R0805
C423
C0.1U25Y
+
EC73 .CD470U16EL11.5
PWM_SYS[14]
3
R428 27KR
R430
VCC3
PWM_SYS
Title
Size Document Number Rev
MSI
Date: Sheet
D42 RLS4148N
R827 220R
MICRO-STAR INt'L CO., LTD.
ATX & FRONT PANEL & FAN
(MS-7164)
2
10KR
SYS_FAN [14]
CPU_FAN1
1 2 3 4
BH1X4BFP_white
23 31Thursday, August 18, 2005
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E
D
C
B
A
POWER CIRCUIT FOR USB PORT 4,5,6,7
FS3 F-MINISMDM260
R450
4 4
OC#0[11]
C305
C0.1U25Y
2.7KR
R451
5.1KR
REAR PANEL USB CONNECTOR FOR USB PORT 0,1
USB0+[11]
USB0-[11]
USB1+[11]
3 3
USB1-[11]
USB0+ USB0­USB1+ USB1-
RN43
1 2 3 4 5 6 7 8
_CMC-L12-121D017
0D Chage to 120ohm ,DCR=0.7ohm
SVCC1
USB0-_R USB0+_R
52
6 1
Protection Diode close to I/O
4 3
D38
ESD-IP4220
USB0+_R USB0-_R USB1+_R USB1-_R
USB1+_R USB1-_R
SVCC1
C304
C470P50X
Close to USB4 (EMI)
USB0-_R USB0+_R
USB1-_R USB1+_R
SVCC1
+
EC91 .CD1000U10EL15
SVCC1
SVCC1
C308 C0.1U25Y
USB Controller 0
USB4
P
5
D-
6
UP
D+
7
G
8
P
1
D-
2
D+
3
DOWN
G
4
CONN-USBX2
USB_STR1USB_STR
OC#1[11]
G
11
G
12
G
9
G
10
USB5+[11]
USB5-[11]
POWER CIRCUIT FOR USB PORT 0,1,2,3
FS4 F-MINISMDM260
C306 C0.1U25Y
R452
2.7KR
R453
5.1KR
C302
C1U16Y0805
SVCC0
C303
C470P50X
+
EC90 .CD1000U10EL15
FRONT PANEL USB CONNECTOR FOR USB PORT 4,5
R454 X_0R0402
43
12
R455 X_0R0402
L20 CMC-L02-9008014-T34
USB5+_F
USB5-_F
USB5-_F USB5+_F
Protection Diode close to I/O
SVCC0
SVCC0
6 1
USB Controller 2
JUSB1
1 3
4 5
H1X5(2)_black
USB Card Reader
52
4 3
ESD-IP4220
1 3
4 5
D39
2 2
REAR PANEL USB CONNECTOR FOR USB PORT 2,3
USB2+[11]
USB2-[11]
USB3+[11]
USB3-[11]
USB2+ USB2­USB3+ USB3-
RN44
1 2 3 4 5 6 7 8
_CMC-L12-121D017
USB2+_R USB2-_R USB3+_R USB3-_R
0D Chage to 120ohm ,DCR=0.7ohm
SVCC1
USB2-_R USB2+_R
1 1
Protection Diode close
52
6 1
4 3
D40
ESD-IP4220
USB3+_R USB3-_R
to I/O
E
D
USB Controller 1
USB3A
SVCC1
5 6 7 8
SVCC1
UP
1 2 3 4
DOWN
CONN-RJ45_USBX2_LEDX2-22P-30u
FRONT PANEL USB CONNECTOR FOR USB PORT 6,7
23 24 25 26 27 28 29 30
USB6-[11]
USB6+[11]
USB7-[11]
USB7+[11]
USB6- USB7+_F
1 2
USB6+
3 4 5 6
USB7+
7 8
RN45 _CMC-L12-121D017
USB6-_F USB6+_F USB7-_FUSB7­USB7+_F
0D Chage to 120ohm ,DCR=0.7ohm
SVCC0
52
6
USB6-_F USB7+_F
1
Protection Diode close to I/O
C
4 3
D41
ESD-IP4220
USB7-_FUSB6+_F
Title
Size Document Number Rev
B
Date: Sheet
SVCC0 USB7-_F
SVCC0 USB6-_F USB6+_F
MICRO-STAR INt'L CO., LTD.
USB Connectors
USB Controller 3
USB2 _CONN-USBX1#
1 2 3 4
USB5 _CONN-USBX1#
1 2 3 4
(MS-7164)
5
6
5
6
24 31Tuesday, August 16, 2005
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4
3
2
1
Ver 0C change the footprint of the Choke1, Choke2
3VSB MODE SELECT
ACPI Controller
D D
VCC3
R336
C C
DDR AND DDR II VOLT SELECT
SMBCLK_ISO[11,13,14,17,20]
SMBDATA_ISO[11,13,14,17,20]
VRM_GD[11,26] PWR_GD[6,11,14]
PWR_OK[14,23] AGP_PRT[23]
DDRTYPE VDIMM
PULL LOW 2.5V
PULL HIGH 1.8V
VCC_VID / VID_GOOD
Place MOSFET near CPU
V_FSB_VTT[3,6,8,12]
1.2V/2A
EC19
.CD1000U6.3EL11.5
B B
N-IPD20N03L_TO252
DDR VTT Power
VCC3_SB
A A
C351
C0.1U25Y
8 7 6
U21 W83310DS_SOIC8
VREF2 ENABLE VCTRL
5
1KR
THIS PIN IS OPEN DRAIN OUTPUT
+
12
Q33
V_1P5_CORE
1
VIN
2
GND2
3
VREF1
45
VOUTBOOT_SEL
GND9
9
3VSB MODE
SINGLE MOSFET
DUAL MOSFET
VCC5_SB
R353 X_1KR0402
R320 1KR0402
VCC5_SB
R337
X_4.7KR
PWR_GD
X7R
C333 C0.22U16Y
VCC5
C338
C0.1U25Y
VID_GD#[4,26]
GDS
VCC5_SB
VCC3
DZ3
S-1N5817_DO214AC
EC25
+
1 2
_CD470U10EL11-2
V_SM_VTT
+
12
EC29 _CD470U10EL11-2
R338 1KR
+
12
EC10 _CD470U10EL11-2
3VDLDEC#
PULL HIGH
PULL LOW
3VDLDEC#
EXTRAM
R327 1KR0402
R350
4.7KR
1
SCL
2
SDA
3
FP_RST#
4
CHIP_PWGD
5
CPU_PWGD
6
POK1
7
PWROK
8
PSOUT#
9
DDRTYPE
10
SS
11
GND
12
VCC5
C339 X_C0.1U25Y
C343 X_C0.1U25Y
R343
+
12
3.3R EC28 _CD470U10EL11-2
V_SM
C350 C0.1U25Y
VDIMM LINEAR OR PWM SELECT
VDIMM MODE
LINEAR REGULATOR
PWM REGULATOR
VCC5
R325 330R
R331 10R R332 10R
C352 C20P50N
C325 C0.1U25Y
HDD_RST#
RAM_DRV
DEV_RST#
RAM_HDRV/DMV
SLOT_RST#
RAM_HSEN
VCC3
SVRAM_DRV/DMSB
PCIRST_BUF#
3VSB
3738394041424344454647
AGND
RSMRST#
CHARPMP
VLR1_DRV VLR2_SEN
5VUSB_DRV
5V_DRV VLR2_DRV VLR2_SEN
VAGP_DRV
3VSB_DRV
VAGP_SEN
24
5VSB
GND
48
S3#
S5#
PCI_RST#
PLED1/EXTRAM
PLED0/3VDLDEC#
VIDGD#
VID_SEN
VID_DRV
5VSB
RAM_SEN
1314151617181920212223
Wide Trace
C344 X_C0.1U25Y
C355 X_C1000P16X
VCC3_SB
1234
Q58
N-APM2054N_SOT89
+
12
EC26
C356
.CD1000U6.3EL11.5
X_C1000P16X
+
12
C357 C0.1U10Y
EC24
KZJ6.3VB2200MCC
C1U10Y
R349 1KR1%0402
R354 1KR1%0402
EC18 _CD470U10EL11-2
C346
+
12
RAMDRV
RAM_HSEN
4
EXTRAM
PULL LOW
PULL HIGH
C324 C22P50N
VCC3
U19
MS-7-RBC
36 35
C2
34
C1
33 32 31 30 29 28 27 26 25
Wide Trace
G
EC22
KZJ6.3VB2200MCC
SLP_S4# [11,14] SLP_S3# [11,14,21,23]
PCIRST_ICH7# [10]
HD_RST# [22] PCIRST#2 [13,14,17,18] PCIRST#1 [17]
RSMRST# [11,14,18]
VCC5_SB
EC17 _CD470U10EL11-2
+
1 2
C326 C1U10Y
9VSB
C330 C1U16Y0805
V1P2_DRV V1P2_SEN 5VUSB_DRVPWR_OK
5V_DRV
C341
C1000P50X
+
12
EC20
VCC3
_CD470U10EL11-2
RAMDRV
G
D S
Q59 N-P0903BS_TO263
DS
Q61 N-P0903BS_TO263
+
12
KZJ6.3VB2200MCC
MCH CORE POWER
R316
5.1KR1%
R323 51KR1%
C319 X_C0.1U25Y
R329 200R
C337
C1U10Y
AGP_VREF
C318 C2200P16X
VCC5
R321
X_33R1%
Please connect device with tree mode, not daisy chain mode. Please refer attached file. Noticed that one of push-pull reset#(PCIRST_BUF#, SLOT_RST#) at most can connect 5 devices.
CHARGE PUMP VOLTAGE OUTPUT
C328 C1U16Y0805
C332 C1000P50X
C342 C2200P16X
R340 33R0402
C336 C1000P50X
R342 33R0402
AGP_VREF
C340 C1000P50X
Close to MS6+
C347 X_C2200P16X
+
12
EC21
_CD470U10EL11-2
5V_DRV
C349
VCC3
X_C0.1U25Y
SWITCH:
D03-40N030B-A36 D03-20N030B-I14 D03-45N030B-P03
Regulator(TO-252)
D03-45N020B-N03 D03-40N030B-A36 D03-6530A0B-F01
+
12
EC23
V_SM
Regulator(TO-263)
D03-50N034B-N03 D03-50N031B-P03
Dual NMOS
D03-07D0303-N03 D03-0731303-A30
3
C320
1P2VREF [21]
Q34 NN-P07D03LV_SO8
4 5 3
6 7
2
8
1
R317
49.9KR1% U18
7 8
ISET BOOT
6
VREF_IN
5
FB
4
COMP
3
SS
2
GND
1
PWROK
MS-6+_SOP14
C0.1U25Y
VCC5_SB VCC3_SB
Regulator(TO-252)
D03-45N020B-N03 D03-40N030B-A36 D03-6530A0B-F01
Regulator(TO-263)
D03-50N034B-N03 D03-50N031B-P03
H_DRV
PGND
ISEN
L_DRV
VDD
VDDA
C2.2U10X0805
+12V
R319 X_0R
9 10 11 12 13 14
C321
R330
10R1206
V1P2_DRV
V1P2_SEN
C2200P16X
5VUSB_DRV 5V_DRV
X_C2200P16X
5VUSB_DRV 5V_DRV
X_C2200P16X
S-1N5817_DO214AC
VCC5
X_C0.22U16Y
C316
R324 2KR1%
C322 C2.2U10X0805
CLOSE TO CHIP
VCC5
VCC3_SB
G
C312
C1U10X
C331
C334
C345
2
DZ2
C317 C0.22U16Y
C354 C1U16Y0805
DS
Q29
N-2N7002_SOT23
R351
150R1%0402
R352
1.05KR1%
Q31
4 5 3 2 1
NN-P07D03LV_SO8
VCC5
REAR
Q32
4 5 3 2 1
NN-P07D03LV_SO8
VCC5
FRONT
VCC3
+
12
EC16
.CD1000U6.3EL11.5
CH-1.2U8A
CHOKE1 C315 X_C0.1U25Y
C353
C1U10X
6 7 8
6 7 8
VCC5
+
12
EC11
.CD2200U6.3EL20
GDS
GDS
Q25 N-FDD6676_TO252
CHOKE2 CH-1.3U20A
Q27 N-FDD6676_TO252
V_1P5_CORE
CONFLICT WITH PCIE
1.05V POWER
ICH7=1.31A
Q60 N-APM2054N_SOT89
V_1P05_CORE
+
12
USB_STR
C335 X_C0.1U25Y
MS-7 ACPI control le r
(MS-7164)
1
V1P05_REF
USB_STR
9VSB
5 6
U16B LM358/SOIC8
+
-
4 8
7
V_1P5_CORE
1234
5V DUAL Power
VCC5_SB
Dual NMOS
D03-07D0303-N03
USB_STR1
VCC5_SB
+
12
EC15 _CD470U10EL11-2
Title
Size Document Number Rev
Date: Sheet
D03-0731303-A30
MICRO-STAR INt'L CO., LTD.
+
12
EC14
KZJ6.3VB2200MCC
EC27 _CD470U10EL11-2
of
25 31Tuesday, August 16, 2005
0D
Page 26
8
IPF06N03LA
Voltage Regul a r Module
C100U2SP
.CD3300U6.3EL25
560u_2.5V
1800UF/6.3V
0.6uH/40A
D D
C371 C1U16Y0805
R363 1KR1%
H_VID[0..5][3]
VRM_GD[11,25]
VCC3
VCCP
R398 X_0R
C C
B B
N-MMBT3904_NL_SOT23
N-MMBT3904_NL_SOT23
R367 1KR C377 C0.1U25Y
R368 150KR1%
C0.01U16XC379
R373 15KR1%
R375
1.69KR1%
R380 X_4.7KRT
R382 X_1.65KR1%
VCC5
VREG_12V_POWER
Q48
VRM_GD PHASE3
COP
C385 X_C15P50N
R399 0R
R381 0R
R385 _249KR1%-1 R386 X_47KR
R388
5.6KR1% R400 1KR1%
CE
R392 10KR
B
CE
Q72
B
0D reduce the glitch of the VRM_GG
CH-1.2U18A
H_VID0 H_VID1 H_VID2 H_VID3
VRM_GD
FS
REF
R396 X_2KR1%
C380 C5600P50X
R377 X_750R
OFS
VCC_VRM_SENSE[3]
R845 10KR
VSS_VRM_SENSE[3]
R362
10KR1%-1
DAC
COMP
C381 X_C15P50N
FB
VDIFF
7
+12V
U23
27
ENLL
4
VID0
3
VID1
2
VID2
1
VID3
32
VID4
5
VID12.5
31
PGOOD
30
OVP
29
FS
8
REF
11
COMP
9
OFSOUT
10
FB
12
VDIFF
6
OFS
26
EN
151828
R387 100R1%0805
R390 100R1%0805
VCCP
CHECK THIS! CONNECT TO BULK CAPACITOR
VID_GD# [4,25]
6
5
4
Rds(on)=5.7m(@10V,30A),Vgs(on)=1.2~2V,Id=50A,Ciss=2832pf,Qg=24.9nC,Vds=25V,Vgs=±20V,Lead Free
ESR<13m,Ripple cur.<2.7A,LC<12uA,105C
ESR<12m,Ripplecur.<2800mA,105C,longlife3000hrs,KZGSeries
ESR=6m,Ripplecur.=4400mA,Lc.<500uA,105C/2000hrs
+12VP_FET
ESR<12m, Ripplecur<2350mA,105C, longlife change from 2000hrs to 3000hrs ,KZJ series
0.6u/20%, Isat=40A,Rdc=1.2m ohm,PEW wire
1.2u/20%,Dip-2/vertical7.5mm,1.2ψ/5.5turns,18A
GND
GND
GND
VCC
PWM1 ISEN1
PWM2 ISEN2
PWM3 ISEN3
PWM4 ISEN4
TCOMP
VSEN
RGND
GND_PAD
33
ISL6556BCR_QFN32
VSS_SENSE
C389 X_C0.1U25Y
VCC_SENSE
VCC5
25
20 19
21 22
16 17
24 23
7 13
14
C388
X_C0.01U16X
C374 C1U16Y0805
R365
2.7KR1%
R369
2.7KR1%
R372
2.7KR1%
PWM4
R376 4.7KR1%
DAC
PWM1H_VID4 PHASE1H_VID5
PWM2 PHASE2
PWM3 PHASE3
R566 10KR
C390 X_C0.01U16X
VREG_12V_POWER
C386
C1U16Y0805
VREG_12V_POWER
R357
2.2R0805
12VP1
VCC5
R378
2.2R0805
PWM3
C368 C0.1U25Y
PWM1
12VP1
C375 C1U16Y0805
VREG_12V_POWER
U22A
14
VCC
BOOT1
PHASE1
3
GND
1
PWM1
ISL6614ACBZ-T_SOIC14
UG1
R560 10KR R561 X_10KR
LG1
Closed to MOSFET
U22B
5 9
PVCC U_G2
6
PGND
PWM2
2
PWM2
ISL6614ACBZ-T_SOIC14
UG2
R562 10KR
LG2
R563 X_10KR
Closed to MOSFET
R374 4.7R
U24
2
BOOT
UGATE
7
PVCC
PHASE
6
VCC
3
PWM
LGATEGND
ISL6612ACBZ*_SOIC8-LF
U_G1
L_G1
PHASE2
COIL1 CH-1.1U25A-1
C367 C0.01U50X
U_G1
12
R359
11
4.7R
PHASE1
13
L_G1 LG1
4
10
BOOT2
R366 4.7R
8
7
L_G2
BOOT3
1 8
54
U_G2
PHASE2
L_G2
L_G3
BOOT1
C369 C0.1U25X7R
BOOT2
C376 C0.1U25X7R
U_G3
C384 C0.1U25X7R
R361 0R0805
R371 0R0805
EC43
.CD1800U16EL23
12
+
EC32
.CD1800U16EL23
12
+
Q38 N-IPD09N03LA_TO252 R358 1R0805
UG1
G
Q39 N-IPD06N03LA_TO252
N-IPD09N03LA_TO252 1R0805 R364
N-IPD06N03LA_TO252
.CD1800U16EL23
N-IPD09N03LA_TO252 R393 1R0805
N-IPD06N03LA_TO252
R394 0R0805
EC33
.CD1800U16EL23
12
+
UG2
LG2
EC38
12
+
UG3
LG3
G
G
G
G
G
+12VP_FET
Q41
Q42
+12VP_FET
Q44
Q45
VREG_12V_POWER
C365 C4.7U16Y1206
C366 C1U16Y0805
DS
UG1
G
DS
G
N-IPD06N03LA_TO252
C372 C4.7U16Y1206 C373 C1U16Y0805
DS
UG2
G
DS
G
N-IPD06N03LA_TO252
C382 C4.7U16Y1206 C383 C1U16Y0805
DS
UG3
G
DS
G
N-IPD06N03LA_TO252
3
CB40 C0.01U50X
DS
X_N-IPD09N03LA_TO252 Q51
DS
2.2R0805
Q40
C1000P50X
DS
Q52 X_N-IPD09N03LA_TO252
DS
R370
2.2R0805
C378 C1000P50X
Q53
DS
Q54 X_N-IPD09N03LA_TO252
DS
R395
2.2R0805
Q46
C387 C1000P50X
COIL5 CH-0.6U40A-RH
R360
C370
COIL6 CH-0.6U40A-RH
COIL7 CH-0.6U40A-RH
JPW1
3
12V
4
12V
PWR-2X2M
VCCP
VCCP
VCCP
2
1
GND
2
GND
VCCP
CD560U2.5FP
CD560U2.5FP
CD560U2.5FP
CD560U2.5FP
CD560U2.5FP
CD560U2.5FP
CD560U2.5FP
CD560U2.5FP
CD560U2.5FP
X_CD560U2.5FP
PLACE INSIDE OF SOCKET
EC35
+
1 2
EC37
+
1 2
EC39
+
1 2
EC40
+
1 2
EC41
+
1 2
EC42
+
1 2
EC44
+
1 2
EC45
+
1 2
EC48
+
1 2
EC75
+
1 2
1
R564 10KR
UG3
VCCP
EC30
+
1 2
C100U2SP-2
EC31
+
1 2
X_C100U2SP-2
EC34
+
A A
1 2
X_C100U2SP-2
EC36
+
1 2
X_C100U2SP-2
EC68
+
1 2
X_C100U2SP-2
VCCP
8
EC49 C10U10Y1206 EC52 C10U10Y1206 EC55 X_C10U10Y1206 EC58 X_C10U10Y1206 EC61 X_C10U10Y1206 EC64 X_C10U10Y1206
PLACE ONE INSIDE OF DOCKET,THREE IN SOLDER SIDE
7
VCCP
EC50 X_C10U10Y1206 EC53 X_C10U10Y1206 EC56 C10U10Y1206 EC59 C10U10Y1206 EC62 C10U10Y1206 EC65 X_C10U10Y1206
VCCP
need 10 pcs of 22u
EC51 X_C10U10Y1206 EC54 C10U10Y1206 EC57 X_C10U10Y1206 EC60 X_C10U10Y1206 EC63 X_C10U10Y1206 EC66 X_C10U10Y1206
6
HEAT SINK
HS1
MOS-HEATSINK
LG3
R565 X_10KR
Closed to MOSFET
HS2
MOS-HEATSINK
5
HS3
MOS-HEATSINK
4
MSI
MICRO-STAR INt'L CO., LTD.
Title
VRM 10.1 - Intersil 6556BCR 4 P ha s e
Size Document Number Rev
3
Date: Sheet
2
(MS-7164)
26 31Tuesday, August 16, 2005
1
0D
of
Page 27
8
7
6
5
4
3
2
1
EMI Decoupling CAP
VCC3
C500
D D
X_C0.1U25Y
C501
X_C0.1U25Y
C502 X_C0.1U25Y
VCC5
C503
X_C0.1U25Y
C504
X_C0.1U25Y
VCC5 VBAT VCC5_SBVCC3_SB
C505
X_C0.1U25Y
C506
X_C0.1U25Y
C507
X_C0.1U25Y
C516
X_C0.1U25Y
C517
X_C0.1U25Y
VCCP
C518
X_C0.1U25Y
C519
X_C0.1U25Y
VCC3
Vcc3 & Vcc5 Bridge
Decoupling CAP
C C
VCC5
C508
X_C0.1U25Y
B B
C509 X_C0.1U25Y
SMBDATA[11,14,17,18]
SMBCLK[11,14,17,18]
C510 X_C0.1U25Y
VCC3
C511
X_C0.1U25Y
R401 X_4.7KR R402 X_4.7KR
C512 X_C0.1U25Y
VCC3_SB
C513 X_C0.1U25Y
C514 X_C0.1U25Y
C515 X_C0.1U25Y
Mounting Holes
MH1
1 2 3
A A
(NPTH)
4
5 6 7
8
9
MH2
1 2 3
(NPTH)
4
5 6 7
8
9
MH3
1 2 3
(NPTH)
4
5 6 7
8
9
KBGND GND_AUDIO
MH4
1 2 3
(NPTH)
4
5 6 7
8
9
MSI
Title
Decoupling CA P
MICRO-STAR INt'L CO., LTD.
Size Document Number Rev
(MS-7164)
27 31Tuesday, August 16, 2005
8
7
6
5
4
3
Date: Sheet
2
of
1
0D
Page 28
1
ICH7
Pin
GPIO Pin
GPIO 0 GPIO 1 / PREQ5# GPIO 2 / PIRQE# GPIO 3 / PIRQF# GPIO 4 / PIRQG#
Type
I I I I
I GPIO 5 / PIRQH# GPIO 6 GPIO 7 GPIO 8 GPIO 9 GPIO 10 GPIO 11 / SMBALERT# GPIO 12 GPIO 13 GPIO 14 GPIO 15 GPIO 16 GPIO 17 / GNT5# GPIO 18 / STP_PCI# GPIO 19 / SATA1GP GPIO 20 / STP_CPU# GPIO 21 / SATA0GP GPIO 22 / PREQ4#
I
I
I
I
I
I
I
I
I
I
O
O
O
I
O
I
I/O GPIO 23 / LDRQ1# GPIO 24 GPIO 25
A A
GPIO 26 / EL_RSVD GPIO 27 / EL_STATE0 GPIO 28 / EL_STATE1 GPIO 29 / OC5# GPIO 30 / OC6# GPIO 31 / OC7# GPIO 32 / CLKRUN# GPIO 33 / AZ_DOCK_EN# GPIO 34 / AZ_DOCK_RST# GPIO 35 / STATCLKREQ# GPIO 36 / STAT3GP GPIO 37 / STAT2GP GPIO 38 GPIO 39 GPIO [47:40] GPIO 48 / GNT4# GPIO 49 / CPUPWRGD
O I/O I/O
I
O
I
I
I
I I/O I/O I/O
I
I I/O I/O N/A I/O
O
Function
ATADET0
AB18 C08
Unused
PIRQ#E
G08
PIRQ#F
F07 F08
PIRQ#G PIRQ#HI
G07
-RISER1 (Pull-up)
AC21
GPI7 (Pull-up)
AC18
SIO_PME#
F21
Unused
E20 A20
Unused
GPIO:TEMP_THERM# (Pull -up)
B23
GPI12 (Pull-up)
F19 E19
GPIO:BRD_ID1 GPIO:BRD_ID2
R04 E22
GPIO:BRD_ID0
Unused
AC22
Unused
D08 AC20
Unused
AH18
SATA_1GP (Pull-up)
Unused
AF21 AF19
SATA_0GP (Pull-up)
Unused
A13
UnusedI/O
AA05
POWER_LED#
R03
CTRL_GPI25
D20
Unused
A21
GPIO:SIO_SMI#
B21
GPIO:ENET_DISABLE# (Exte rnal LAN)
E23
OC_5#
C03
OC_6#
A02
OC_7#
B08
GPIO:CLEAR_CMOS#
AG18
GPIO:Riser_DETECT_1 (A1)
AC19
GPIO:Riser_DETECT_2 (A48)
U02
Unused
AD21
SATA_3GP (Pull-up)
AH19
SATA_2GP (Pull-up)
AE19
Unused
AD20
Unused
AE20
N/A
N/A
Unused
A14
H_PWRGD
AG24
PCI Config.
DEVICE MCP1 INT Pin IDSEL
PIRQ#E
PCI Riser Slot
PIRQ#G PIRQ#H
REQ#/GNT#
PREQ#1 PGNT#1 PREQ#2 PGNT#2
AD28PIRQ#F
CLOCK
PCICLK1
PCICLK2
LPC SIO NS PC8374L/K/T
GPIO Pin Function
GPIOE00 / SWD GPIOE01 / FANTACH3 GPIOE02 / FANTACH4 GPIOE03 / FANPWM1 GPIOE04 / FANPWM2 GPIOE05 / FANPWM3 GPIOE06 / FANTACH1 GPIOE07 / FANTACH2 GPIOE00/RI2#/IRTX GPIOE01/SIN2/RI2# GPIOE02/SOUT2/IRRX GPIOE03/DSR2/SIN2# GPIOE04/DSR2#/CTS2# GPIOE05/DCD2#/CTS2# GPIOE06/IRRX/DTR_BOUT2 GPIOE07/IRTX/DCD2# 5V_DDCSDA/GPIOE10 5V_DDCSCL/GPIOE11 CC_DDCSDA/GPIOE12 CC_DDCSCL/GPIOE 13 PCIRST_OUT2#/GPIOE12 GPIOE13 GPIOE14 GPIOE16 GPIOE17 GPIO11/VsbStrap1 GPIO12/RTS2#/SOUT2/VddStrap1 GPIO13/DTR_BOUT2#/RTS2#/VddStrap2 GPIO15
Type
I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O
O O O O
Pin
SWD
103
SYS_FAN
104 105
Unused PWM_CPU
106
PWM_REAR
108
PWM_SYS
109
CPU_FAN
111
REAR_FAN
112 118
GPIO00
119
Unused Unused
120 121
Unused
124
Unused
126
Unused
127
Unused
128
Unused
116
Unused
114
Unused
115
Unused
113
Unused
74
Unused
75
Unused
101
Unused BAY_ATTACH#
100 80 BAY_IS_HDD
GPIO:FWH_WP#
117
SOUT2
122
RTS2#
125 91
Unused
CLK GEN PIN OUT
Pin-56
Pin-4
DDR DIMM Config.
DEVICE
DIMM 1
DIMM 2
PCI RESET DEVICE
Signals PCIRST#1 PCIRST#2
PCIRST_ICH6#
HDDRST#
JUMPER SETTING
JBAT1
CLOCKADDRESS
AOH
MCLK_A0/MCLK_A#0 MCLK_A1/MCLK_A#1 MCLK_A2/MCLK_A#2
A2H
MCLK_B0/MCLK_B#0 MCLK_B1/MCLK_B#1 MCLK_B2/MCLK_B#2
Target PCI-E Slot Super I/O, FWH, PCI-E, LAN Northbridge , MS-7 Primary IDE
(1-2)NORMAL (2-3)CLEAR
Flash ROM(PCB REVISION I D)
GPIO Pin
GPI 0 GPI 1
GPI 4
Type 0A
I
0
I
0
IGPI 2
0 0
IGPI 3 INC
0B 0C
1
MSI
Title
Size Document Number Rev
Date: Sheet
MICRO-STAR INt'L CO., LTD.
General Purpose Spec & JUMPER SETTING
(MS-7164)
28 31Tuesday, August 16, 2005
of
0D
Page 29
8
POWER DELIVERY MAP
ATX 12V POWER Supply
3.3V 5V 5VSB
1.5A
12V
12V POWER
12VP-12V
7
6
5
4
3
2
1
D D
MS6+
Switching
1.5V/12.9A
LDO 100mA
1.8V/9.5A
W83310DS
0.9V/1.2A
C C
MS-7 Q34
MS-7
5V/4.19A
USB_STR (Q31)
USB_STR1 (Q32)
+5VR/50mA
B B
VRD10.1 2005 Mainstream
0.8375V~1.6V 100A
MS-7
1.2V/5A
LDO
MS-7
1.05V/1.31A
BAT
V_SMMS7 REG
V_SM_VTT
VCCP
V_FSB_VTT
V_1P5_CORE 1.5V GMCH Core 1.5V Icc(max)=13.8A
V_2P5_MCH 2.5V
DDRVREF
0.9V
V_1P05_CORE 1.05V
V_1P5_CORE 1.5V
VCC3_SB3.3V/2.56A VCC3_SB
VBAT_3.3V
Processor Core Icc(max)=100A
1.2V FSB_Vtt 0.8A
GMCH PCI_E 1.5V (SDVO) Icc(max)=1.5A
GMCH 1.2 FSB Vtt Icc(max)=0.9A
GMCH DAC 2.5V Icc(max)=70mA GMCH HV 2.5V Icc(max)=25mA
GMCH DDR 1.8V I/O Icc(max)=4.0A
2 CHANNEL DDR2 1.8V (S0,S1) Icc(max)=4.7A 2 CHANNEL DDR2 1.8V (S3) Icc(max)=200mA
2 CHANNEL DDR2 Vtt 0.9V Icc(max)=1.2A 2 CHANNEL DDR2 Vtt 0.9 (S3) Icc(max)=210mA
ICH Core 1.05V Icc(max)=1.31A
ICH CPU IO 1.2V Icc(max)=14mA
ICH 1.5V total Icc(max)=1.8mA
ICH PCI-E Icc(max)=TBDmA ICH USB Icc(max)=TBDmA ICH SATA Icc(max)=TBDmA
ICH VCC3_SB Icc(max)=0.7A
ICH 3.3V Icc(max)=0.58A
ICH VCCRTC Icc(max)=TBDµA
ICH 5VREF Icc(max)=6mA
ICH 5VREF_SUS Icc(max)=10mA
LPC FWH 3.3V Icc(max)=107mA
Rear USB 0~3 PORT
PS2
Front USB 5~7 PORT
+5VR
VCC3_SB
VCC3_SB
4 PORT USB 5V Icc(max)=2A(S0/S1),20mA(S3/S5)
PS2(MS/KB) Icc(max)=345mA(S0/S1),2mA(S3/S5)
3 PORT USB 5V Icc(max)=1.5A(S0/S1)
Codec Analog 5V (50mA)LT1087S REG
Codec Digital 3.3V (200mA)
VCC12V Icc(max)=0.5A/2=0.25A
VCC3.3 Icc(max)=3A/2=1.5A
VCC3SUS Icc(max)=375mA
VCC5V Icc(max)= 1.25A
VCC12V Icc(max)= 0.125A
VCC3.3 Icc(max)= 1.9A
PCI 3.3V_SUS Icc(max)=375mA
-12V Icc(max)=0.1A
VCC3.3 Icc(max)= 560mA
VBAT_3.3V
VCC3_SB
VBAT Icc(max)=0.9mA
VCC3.3 Icc(max)=200mA
VCC3_SB Icc(max)=100mA
Processor LGA 775
GMCH-Lakeport
DDR2 MODULE
ICH7
LPC FWH FLASH
USB PORT & PS2 KB/MS
AD1888
PCI_E x 1
PCI CON *1 + EXPANSION
ICS 954101DF
SIO NS P8375T
VRM SPEC
VRM9.0 mPG 478
VRM10.0 mPG 478
VRM10.1 LGA 775
FMB1.0 60A
FMB2.0
FMB1.0
FMB1.5
2004
Performance
2004
Mainstream
2005
Performance
2005
Mainstream
Transition
Sustain
Power Consumption
50A
70A
60A
78A
91A
119A 101A 115W/XX
78A 68A 84W/XX
125A 115A 130W/XX
100A 85A 95W/XX
89W/69
68A
103W/74
81A
℃ ℃
VCC3_SB
Q10
VCC3_SB
Q9
A A
8
7
6
VCC3_SUS Icc(max)=8mA
VCC3.3 Icc(max) = 12mA
VCC1.2V Icc(max) = 630mA
VCC 2.5V Icc(max) = 301mA
5
LAN Intel Tekoa 82573E
4
Title
Size Document Number Rev
3
Date: Sheet
2
Power delivery map
(MS-7164)
29 31Tuesday, August 16, 2005
1
0D
of
MICRO-STAR INt'L CO., LTD .
MSI
Page 30
5
4
3
2
1
MS-7164 Revision History List
DATEVer. Schematic Change List
2005.030B1. Create MS-7164 Project for IBM design.
D D
0D
C C
2005.05.17 2. MS-7164-0B Gerber out.
0C
2005.06.15
2005.06.17
1. Correct the VCC_EXP that is connected to VCC from GND.
2. Implement the Intel Tekao AP note to addthe R830,R831 snubber resistor .
3.Add diode 4148 at D42,D 43,D44 and resistor 220R at R827,R828,R829 for FAN proection soluiton.
4.Add L21,C521,C522,C523 for VCC_EXP filter.
5.Change CHOKE1, CHOKE2 footprint and P/N.
2005.07
2005.08.15
1. Add GPIO assignment for Lenovo Int'l request
2. Change the VRM solution from 2005B to 2005A for support Cedar Mill CPU only.
3. Swap the DDRSRCOMP_P and DDRSRCOMP_N.
4. Delete the GPIO25 pull low resistor for non-CPU reset
5. modify the PLL circuit for GMCH, VCCA_HPLL,VCCA_MPLL....
6. Change the SI/O from PC8375T to PC8375S
Page
B B
A A
MICRO-STAR INt'L CO., LTD.
MSI
Title
Size Document Number Rev
5
4
3
2
Date: Sheet
REVISION HIST OR Y
(MS-7164)
1
30 31Tuesday, August 16, 2005
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8
7
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5
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D D
PCB1
P40-071640D-E48
P40-071640D-E48 P40-071640D-G37
C C
NB HeatSink and Hook
U2_1
NB H.S.
E31-0401940-K08
U2_X7
HS_HOOK
B B
Manual Parts
U2_X1
HS_HOOK
BAT1_X1
+
COM1
SB HeatSink and Hook
U3_X12
U26_1
E31-0401760-K08
U3_X34
HS_HOOK
HS_HOOK
SB H.S.
A A
MSI
Title
Size Document Number Rev
8
7
6
5
4
3
Date: Sheet
MICRO-STAR INt'L CO., LTD.
Manual Parts & decoupling
(MS-7164)
2
31 31Thursday, August 18, 2005
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