MSI MS-7159 Schematics
8
MS-7159
7
6
5
4
3
2
1
Version 30
2005.8.24 Update
Cover Sheet
1
D D
* Intel LGA775 Processor
*SIS 649 / 662 + 965 / 965L
*BCM4401/5788
*Winbond 83627EHF I/O
*USB 2.0 support x8
*ALC 655 AC97 CODEC
Block Diagram
MAIN CLOCK GEN & DDR CLOCK BUFFER
LGA775 INTEL CPU Sockets
SIS 649 / 662
DDR SLOT
DDR TERMINATOR
SIS 965 / 965L
1394 VT6307
LAN RTL8100C/8110SB
C C
PCI SLOT 1,2,3
ERP BOM Function Description
Opt :STD501/601-7159 SiS 649+965 W/O 1394, W/ SATA
IDE CONNECTOR
PCI EXPRESS X 16
AC'97 CODEC (ALC655)
USB CONNECTOR
AUDIO CONNECTOR & VGA
FAN
2
3
4 - 6
7 - 10
11
12
13 - 16
17
18
19
20
21
22
23
24
25
B B
LAN CONNECTOR & PS/2 CONNECTOR
LPC I/O (W83627EHF)
PARALLEL & SERIAL PORT
ACPI CONTROLLER
FRONT PANEL & ATX POWER CONNECOTR
VRM 10
Decoupling Capacitor
A A
Micro-Star
Document Number
Last Revision Date:
8
7
6
5
4
3
Wednesday, September 21, 2005
2
26
27
28
29
30
31
32
Title
MS7159
Cover Sheet
Sheet of
1
Rev
30
134
5
System Block Diagram
D D
P
C
I
|
C C
E
PCI-Express X 16
Graphic Interface
4
LGA775
SIS 649
/
SIS 662
HOST BUS
MuTIOL
System Bus
800MHz
Data Bus
up to 1GHz
MEMORY BUS
DDR
333/400MHz
3
D
D
I
I
M
M
M
M
1
2
2
GPIO Table on SIS965
GPIO_0
GPIO_1
GPIO_2
GPIO_3 EXTSMI#
GPIO_4
GPIO_5
GPIO_6
GPI_7 RESUME
GPI_8 RING
GPI_9
GPI_10
GPIO_11
GPIO_13
GPIO_14
GPIO_15
GPIO_16
GPIO_17
GPIO_18
GPIO_19
GPIO_20
GPIO_21
GPIO_22
GPIO_23
GPIO_24
MAIN
I/O
MAIN
I/O
MAIN
I/O
MAIN
I/O
MAIN
I/O
MAIN
I/O
MAIN
I/O
I/O
I/O
RESUME
I/O
RESUME
I/O
RESUME
I/O
RESUME
I/O
I/O
RESUME
I/O
RESUME
I/O
RESUME
O
RESUME
O
RESUME
O
RESUME
MAIN
I/O
MAIN
I/O
I
RESUME
I
RESUME
I
RESUME
I RESUME
Flash Rom protection
Boot Block protection
THERM#
Pull-Up
RESERVED
RESERVED
RESERVED
RESERVED
RESERVED
Pull-Down
Pull-DownGPIO_12 RESUME
Pull-Up
Pull-Down
KBDAT
KBCLK
MSDAT
MSCLK
SMBCLK
SMBDAT
RESERVED
RESERVED
RESERVED
RESERVED
1
USB 2.0 X 8 USB 2.0 AC-LINK
PCI 1, 2,3
BCM4401/5788
VT6307
KEYBOARD/
B B
MOUSE
PCI BUS
ATA133
SIS 965
SATA SATA 1,2,3,4
AC'97
AUDIO CODEC
IDE 1,2
PCI Config.
DEVICE
PCI Slot 2
PIRQ#B
PIRQ#C
PIRQ#D
PIRQ#A
PIRQ#C
PIRQ#D
PCI_REQ#0PCI Slot 1
AD19
IDSEL
CLOCKREQ#/GNT#MCP1 INT Pin
PCICLK1
PCI_GNT#0
PCI_REQ#1 AD20 PCICLK2
PCI_GNT#1
PIRQ#A
PIRQ#B
PCI Slot 3 PCI_REQ#2 AD21
PIRQ#D
PIRQ#A
PCI_GNT#2
PCICLK3
PIRQ#B
LPC BUS
LAN PIRQ#C PCI_REQ#3
PIRQ#C
AD22 LAN_PCLK
PCI_GNT#3
CPU_FAN SYS_FAN PWR_FAN
FAN CONTROL
H/W MONITOR
LPC SUPER I/O
LPC ROM
A A
GPIOS IR/CIR
5
W83627EHF
COM1,2 PRINT ER FLOPPY
4
FAN SPEED,VOTLAGE,TEMPERATURE
3
1394 PIRQ#D
PCI RESET DEVICE
Signals
PCIRST#1
HDDRST#
PCIRST#3
PCIRST#4
2
Northbridge,PCI E
PCI1~3PCIRST#2
Primary, Sco n dary IDE
LAN,1394
S/IO,Flash Rom
Target
PCI_REQ#4
PCI_GNT#4
Micro-Star
Title
Document Number
Last Revision Date:
Wednesday, September 21, 2005
AD23 1394_PCLK
MS7159
System Block Diagram
Sheet of
1
234
Rev
30
5
VCC3
VCC3
L39
X_80_0805
D D
VCC3 VCC3
VCCP
R230
C C
10K
C246
103p
1 2
CB88
X_0.1u
CP41
X_COPPER
R229
10K
Q47
2N3904S
C271
X_4.7U/0805
CB92
0.1u
CB87
0.1u
R241
10K
Q48
2N3904S
CB96
0.1u
CB90
0.01u
CB86
0.1u
R234
FP_RST#29,30,31
VCC3
102p
CB95
0.1u
475RST
CB85
4
Main Clock Generator
U17
ICS953401CF_SSOP56
1
VDDREF
11
VDDZ
12
VDDPCI
18
VDDPCI
25
VDD48
29
VDDPE
34
VDDPE
37
VDDPE
56
VDDCPU
5
GNDREF
8
GNDZ
17
GNDPCI
23
GNDPCI
28
GND48
42
GNDPE
53
GNDCPU
50
Vtt_PwrGd/PD#*/(CLK_Stop#)*
44
IREF
24
*(CPU_Stop#)/RESET#
48
VDDA
45
GNDA
CPUCLKT0
CPUCLKC0
CPUCLKT1
CPUCLKC1
PECLK3T_F
PECLK3C_F
PECLK4T_F
PECLK4C_F
**FS2/PCICLK5
**FS3/PCICLK6
**FS4/PCICLK7
*(PCI_Stop#)/PCICLK4
**Mode/PCICLK3
PCICLK2/PECLKREQ#
PCICLK1_F
PCICLK0_F
*FS0/REF1
**FS1/REF2
24_48MHz/SEL24_48#*
SATACLKT
SATACLKC
12_48MHz/SEL12_48#**
PECLK0T
PECLK0C
PECLK1T
PECLK1C
PECLK2T
PECLK2C
ZCLK0
ZCLK1
REF0
SCLK
SDATA
3
FS0
FS1FS4
0 133
0
0
0
55
54
52
51
41
40
39
38
36
35
33
32
31
30
9
10
13
14
15
16
19
20
21
22
3
4
2
27
43
49
47
46
26
CK_PE_SRC1
CK_PE_SRC1#
CK_PE_SRC2
CK_PE_SRC2#
R247
R248
R249
R250
1 2
3 4
5 6
7 8
RN50
8P4R-33
R282
R283
RN53
FS2
FS3
FS4
PCLK
MODE
PECLKREQ# SIOPCLK
FS0
FS1
REF0
R284
SEL12_48 OSC12
8P4R-33
PCLK
1 2
FS4
3 4
FS3
5 6
FS2
7 8
7 8
5 6
3 4
1 2
RN52 8P4R-33
7 8
REF0
5 6
FS0
3 4
FS1
1 2
R285
R245
R246
0100
CPUCLK1
33
CPUCLK-1
33
CPUCLK0
33
CPUCLK-0
33
CK_PE_100M_MCH
CK_PE_100M_MCH#
CK_PE_100M_16PORT
CK_PE_100M_16PORT#
ZCLK0
22
ZCLK1
22
96XPCLK
SIOPCLK
FWH_CLK
LAN_PCLK LAN_PCLK
1394_PCLK
PCICLK1
PCICLK2
PCICLK3
RN54 8P4R-33
DCLK
REFCLK1
REFCLK2 DCLK
SIO48MMULTISEL
22
SMBCLK
SMBDAT
SATACLK
33
SATACLK-
33
22
CPU
12MHz
48MHz
CPUCLK1 7
CPUCLK-1 7
CPUCLK0 4
CPUCLK-0 4
ZCLK0 9
ZCLK1 13
96XPCLK 13
SIOPCLK 27
FWH_CLK 27
LAN_PCLK 18
1394_PCLK 17
PCICLK1 19
PCICLK2 19
PCICLK3 19
OSC12 15
SRC
ZCLK
AGP
66
133
1001
133 66 33100200
CK_PE_100M_MCH 7
CK_PE_100M_MCH# 7
CK_PE_100M_16PORT 21
CK_PE_100M_16PORT# 21
DCLK 9
REFCLK1 14
REFCLK2 22
SIO48M 27
SMBCLK 11,14,18,21,27,29
SMBDAT 11,14,18,21,27,29
SATACLK 15
SATACLK- 15
PCIFS30FS2
33
FS3
FS4
PECLKREQ#
2
VCC3
CB48
X_0.1u
EMI
MULTISEL internal Pull-Up 120K
MULTISEL
SEL12_48
R293
R291
R289
R1013
MODE
F0~F4 internal Pull-Down 120K
R286 4.7K
0=48MHZ,1=24MHZ
R290 4.7K
0=48MHZ,1=12MHZ
10K
10K
10K
1K
VCC3
CPUCLK0
CPUCLK-0
CPUCLK1
CPUCLK-1
SATACLK
SATACLK-
CK_PE_100M_MCH
CK_PE_100M_MCH#
CK_PE_100M_16PORT
CK_PE_100M_16PORT#
PCICLK3
PCICLK2
PCICLK1
1394_PCLK
FWH_CLK
96XPCLK
REFCLK2
REFCLK1
SIO48M
OSC12
ZCLK0
ZCLK1
1
R239
R240
R237
R238
R232
R233
49.9RST
49.9RST
49.9RST
49.9RST
49.9RST
49.9RST
RN48
1 2
3 4
5 6
7 8
8P4R-51R
CN9 X_8P4C_10p
1 2
3 4
5 6
7 8
CN8 8P4C_10p
7 8
5 6
3 4
1 2
CN7 8P4C_10p
1 2
3 4
5 6
7 8
C294 X_10p
C293 X_10p
C291 X_10p
C292 X_10p
X1
6
C274
14M-32pf-HC49S-D
47p
B B
VCCM
C72
CB42
0.1u
4.7U/0805
VCCM
A A
VCC3
FWDSDCLKO8
R86 X_4.7K
option mounted
for RTM680-627
CB46
0.1u
SMBCLK
SMBDAT
5
CB51
0.1u
CB52
0.1u
FWDSDCLKO
D2#/D6_SEL
CB53
0.1u
CBVDD
U7
ICS93732
3
VDD
12
VDD
23
VDD
10
AVDD
7
SCLK
22
SDATA
8
CLK_IN
20
FB_IN
9
NC
18
NC
21
NC
GND11GND15GND
GND
6
2
CLK0
4
CLK1
13
CLK2
17
CLK3
24
CLK4
26
CLK5
1
CLK#0
5
CLK#1
14
CLK#2
16
CLK#3
25
CLK#4
27
CLK#5
19
FB_OUT
28
4
X2
7
Y2
C261
47p
Clock Buffer (DDR)
DDRCLK0
DDRCLK2
DDRCLK3
DDRCLK7
DDRCLK8
DDRCLK1
DDRCLK-0
DDRCLK-2
DDRCLK-3
DDRCLK-7
DDRCLK-8
DDRCLK-1
R87
DDRCLK0 11
DDRCLK2 11
DDRCLK3 11
DDRCLK7 11
DDRCLK8 11
DDRCLK1 11
DDRCLK-0 11
DDRCLK-2 11
DDRCLK-3 11
DDRCLK-7 11
DDRCLK-8 11
DDRCLK-1 11
10
FB_OUT
C67
10p
CPUCLK0
CPUCLK-0
CPUCLK1
CPUCLK-1
ZCLK0
DCLK
ZCLK1
R459
X_0
R460
R461
R462
R463
R464
R465
3
DDRCLK0
FS0
R9501K
R9511K
CB50
X_0.1u
KBCLK
MSCLK
PCICLK3
SIO48M
SIOPCLK
FWH_CLK
FOR EMI
CB40
X_0.1u
H_FSBSEL0 4,5
H_FSBSEL1 4,5,9
R473
X_0
R474
X_0
R475
X_0
R476
X_0
R477
X_0
R478
X_0
CB56
X_0.1u
C609
X_10p
C610
X_10p
C611
X_10p
C612
X_10p
C613
X_10p
C614
X_10p
FS1
R937 10K
FS2
EMI
C595
X_10p
C596
X_10p
X_0
C597
X_10p
X_0
C598
X_0
X_10p
C599
X_10p
X_0
C600
X_10p
X_0
C601
X_10p
X_0
96XPCLK
SATACLK
SATACLK-
1394_PCLK
LAN_PCLK
PCICLK1
PCICLK2
R466
R467
R468
R469
R470
R471
R472
C602
X_10p
X_0
C603
X_10p
X_0
C604
X_0
X_10p
C605
X_0
X_10p
C606
X_10p
X_0
C607
X_10p
X_0
C608
X_10p
X_0
KBCLK14,26
MSCLK14,26
VCC3
CB43
X_0.1u
2
DDRCLK1
DDRCLK2
DDRCLK3
DDRCLK8
DDRCLK7
DDRCLK-0
DDRCLK-1
DDRCLK-2
DDRCLK-3
DDRCLK-8
DDRCLK-7
Micro-Star
Document Number
Last Revision Date:
Wednesday, September 21, 2005
C96 X_10p
C68 X_10p
C74 X_10p
C98 X_10p
C66 X_10p
C64 X_10p
C97 X_10p
C69 X_10p
C75 X_10p
C99 X_10p
C65 X_10p
C63 X_10p
Title
MS7159
MAIN CLOCK GEN & BUFFER
Sheet of
1
334
Rev
30
8
7
6
5
4
3
2
1
+12V
R155
10K
GTLREF_SEL 7
HVREF 7
VTT_OUT_LEFT
C49
X_C0.1U25Y
3
VCCP
R1024
X_0R
VCC_VRM_SENSE
VSS_VRM_SENSE
R1025
X_0R
V_FSB_VTT 5,7,10,16,29
VTT_OUT_RIGHT 5,6
VTT_OUT_LEFT 5
VCC_VRM_SENSE 31
VSS_VRM_SENSE 31
CLOSED TO 965
STPCLK#
HINIT#
SMI#
CPUSLP#
IGNNE#
INTR
A20M#
NMI
H_TESTHI9
H_TESTHI10
H_TESTHI11
H_TESTHI12
VTT_OUT_RIGHT
C41 1u/10V/6
C45 C0.1U16VX7R
R73 62R
R71 62R
R69 62R
R75 62R
RN15
7 8
5 6
3 4
1 2
8P4R-62R
RN12
8P4R-62R
1 2
3 4
5 6
7 8
VID3
VID1
VID4
VID2
VID0
VID5
VTT_OUT_LEFT
RN2
8P4R-680R
1
3
5
7
R51 680R
R50 680R
RN4 62/6/8P4R
1 2
3 4
5 6
7 8
1 2
3 4
5 6
7 8
RN6 62/6/8P4R
R61 62/6
R57 62/6
R56 62/6
2
4
6
8
PLACE BPM TERM I N A T I O N NEAR CPU
Micro-Star
Document Number
Last Revision Date:
Wednesday, September 21, 2005
2
Title
MS7159
LGA775 CPU-1
For 965
VTT_OUT_RIGHT
H_BPM#3
H_BPM#5
H_BPM#1
H_BPM#0
H_TDI
H_BPM#2
H_BPM#4
H_TDO
H_TMS
H_TCK
H_TRST#
Sheet of
1
VCCP
Rev
30
434
1.18V
H_TDI
H_TDO
H_TMS
H_TRST#
H_TCK
HA#[3..31]7
VCC3
G11
D19
C20
AB2
AB3
M3
AD3
AD1
AF1
AC1
AG1
AE1
AL1
AK1
M2
AE8
AL2
AH2
AE6
G10
D16
A20
AA2
G29
H30
G30
G23
B22
A22
A19
B19
B21
C21
B18
A17
B16
C18
A8
F2
R3
P3
H4
B2
C1
E3
D2
C3
C2
D4
E4
G8
G7
N2
P2
K3
L2
N5
C9
Y1
V2
N1
U6A
DBI0#
DBI1#
DBI2#
DBI3#
EDRDY#
IERR#
MCERR#
FERR#/PBE#
STPCLK#
BINIT#
INIT#
RSP#
DBSY#
DRDY#
TRDY#
ADS#
LOCK#
BNR#
HIT#
HITM#
BPRI#
DEFER#
TDI
TDO
TMS
TRST#
TCK
THERMDA
THERMDC
THERMTRIP#
GND/SKTOCC#
PROCHOT#
IGNNE#
SMI#
A20M#
TESTI_13
RSVD
RESERVED0
RESERVED1
RESERVED2
RESERVED3
RESERVED4
RESERVED5
BOOTSELECT
LL_ID0
LL_ID1
BSEL0
BSEL1
BSEL2
PWRGOOD
RESET#
D63#
D62#
D61#
D60#
D59#
D58#
D57#
D56#
D55#
D54#
7
D53#
B15
HD#53
HA#[3..31]
D52#
D51#
C14
C15
HD#52
HD#51
CPU SIGNAL BLOCK
T15
AN7
H1
H2
H29
E24
AG3
AF2
AG2
AD2
AJ1
AJ2
G5
J6
K6
M6
J5
K4
W2
P1
H5
G4
G3
F24
G24
G26
G27
G25
F25
W3
F26
AK6
G6
G28
F28
A3
F5
B3
U3
U2
F3
T2
J2
R1
G2
T1
A13
J17
H16
H15
J16
AD5
R6
C17
G19
E12
B9
A16
G20
G12
C8
L1
K1
VID[0..5] 31
R45 62/6
CPU_GTLREF
H_BPM#5
H_BPM#4
H_BPM#3
H_BPM#2
H_BPM#1
H_BPM#0
PCREQ#
HREQ#4
HREQ#3
HREQ#2
HREQ#1
HREQ#0
H_TESTHI12
H_TESTHI11
H_TESTHI10
H_TESTHI9
H_TESTHI8
H_TESTHI2_7
H_TESTHI1
H_TESTHI0
RSVD_AK6
RSVD_G6
HRS#2
HRS#1
HRS#0
T1
T2
BREQ#0
H_COMP3
H_COMP2
H_COMP1
H_COMP0
HADSTB#1
HADSTB#0
HDSTB3
HDSTB2
HDSTB1
HDSTB0
HDSTB#3
HDSTB#2
HDSTB#1
HDSTB#0
NMI
INTR
4
T7
T8
T6
T5
VSS_SENSE
HA#27
HA#26
HA#25
HA#31
AJ6
AJ5
AH5
AH4
AG5
A35#
A34#
A33#
A32#
D50#
D49#
D48#
D47#
D46#
D45#
A14
E22
D17
D20
D22
G22
G21
HD#50
HD#49
HD#48
HD#47
HD#46
HD#45
HD#44
A31#
D44#
HA#30
AG4
F21
HD#43
HA#29
A30#
D43#
HD#42
AG6
E21
HA#28
A29#
D42#
HD#41
HA#24
HA#23
HA#22
HA#21
HA#20
HA#19
HA#18
HA#17
HA#16
HA#13
HA#12
HA#14
HA#15
AF4
AF5
AB4
AC5
AB5
AA5
AD6
AA4
AB6
A28#
A27#
A26#
A25#
A24#
A23#
A22#
A21#
A20#Y4A19#Y6A18#W6A17#
A16#W5A15#V4A14#V5A13#U4A12#U5A11#T4A10#
D41#
D40#
D39#
D38#
D37#
D36#
D35#
D34#
D33#
D32#
D31#
D30#
D29#
D28#
D27#
D26#
F20
F18
F17
E19
E18
HD#39
HD#38
HD#37
HD#40
F15
F14
E16
E15
G17
G18
HD#36
HD#35
HD#34
HD#33
6
E13
G16
HD#32
D13
G15
G14
G13
HD#28
HD#30
HD#29
HD#31
HD#27
HD#26
HD#25
D25#
HA#11
HA#10
HA#9
U6
D24#
D23#
F12
F11
D10
HD#24
HD#23
HD#22
HA#5
HA#8
HA#7
HA#6
HA#4
A9#T5A8#R4A7#M4A6#L4A5#M5A4#P6A3#
D22#
D21#
D20#D7D19#E9D18#F9D17#F8D16#G9D15#
E10
HD#19
HD#18
HD#21
HD#20
HD#17
VCC_SENSE
HA#3
AC2
L5
AN4
AN3
DBR#
VSS_SENSE
VCC_SENSE
D14#
D13#
D12#D8D11#
B12
D11
C12
C11
HD#15
HD#14
HD#13
HD#12
HD#11
HD#16
5
AM7
AN5
AJ3
AK3
AN6
ITP_CLK1
ITP_CLK0
VSS_MB_REGULATION
VCC_MB_REGULATION
D10#
D9#
D8#
D7#A7D6#B7D5#B6D4#A5D3#C6D2#A4D1#C5D0#
B10
A11
A10
HD#10
HD#7
HD#6
HD#5
HD#9
HD#8
HD#4
AM5
RSVD
HD#3
VID5
AL4
VID6#
HD#2
VID1
VID3
VID2
VID4
AK4
AL6
AM3
AL5
VID5#
VID4#
VID3#
VID2#
VID_SELECT
GTLREF0
GTLREF1
GTLREF_SEL
CS_GTLREF
BPM5#
BPM4#
BPM3#
BPM2#
BPM1#
BPM0#
PCREQ#
REQ4#
REQ3#
REQ2#
REQ1#
REQ0#
TESTHI12
TESTHI11
TESTHI10
TESTHI9
TESTHI8
TESTHI7
TESTHI6
TESTHI5
TESTHI4
TESTHI3
TESTHI2
TESTHI1
TESTHI0
FORCEPH
RSVD
BCLK1#
BCLK0#
COMP5
COMP4
COMP3
COMP2
COMP1
COMP0
ADSTB1#
ADSTB0#
DSTBP3#
DSTBP2#
DSTBP1#
DSTBP0#
DSTBN3#
DSTBN2#
DSTBN1#
DSTBN0#
LINT1/NMI
LINT0/INTR
LGA775
B4
HD#0
HD#1
VID1#
RS2#
RS1#
RS0#
AP1#
AP0#
BR0#
DP3#
DP2#
DP1#
DP0#
VID0
AM2
VID0#
VCC_SENSE
VSS_SENSE
R1020 0R
PCREQ# 7
HREQ#4 7
HREQ#3 7
HREQ#2 7
HREQ#1 7
HREQ#0 7
R80 62R
R95 62R
R63 62R
R99 62R
R53 X_62R
R79 X_62R
CPUCLK-0 3
CPUCLK0 3
HRS#2 7
HRS#1 7
HRS#0 7
BREQ#0 5,7
R101 100R1%
R98 100R 1%
R67 X_60.4R1%
R81 X_60.4R1%
R66 6 0 . 4R1%
R89 6 0 . 4R1%
PLACE RESISTORS OUTSIDE SOCKET
CAVITY IF NO ROOM FOR VARIABLE
RESISTOR DON'T PLACE
HADSTB#1 7
HADSTB#0 7
HDSTB3 7
HDSTB2 7
HDSTB1 7
HDSTB0 7
HDSTB#3 7
HDSTB#2 7
HDSTB#1 7
HDSTB#0 7
NMI 14
INTR 14
R959 0R
R960 0R
CPU_GTLREF 5
HVREF
R952 X_249R1%
D
D
Q87
GS
GTLREF_SEL7
VCC3
D D
C C
B B
A A
R953 X_110R1%
HDBI#[0..3]7
VTT_OUT_LEFT5
CPUSLP#14
VTT_OUT_RIGHT
H_FSBSEL03,5
H_FSBSEL13, 5,9
H_FSBSEL25
HD#[0..63]7
8
S
G
THERMTRIP#5,14
PROCHOT#5,14
6/24/2005
C35 X_C0.1U25Y
R65 X_1KR
H_PWRGD5,7
HD#[0..63]
X_N-2N7002_SOT23
R954
X_60.4R1%
EDRDY#7
IERR#5
FERR#5,14
STPCLK#14
HINIT#14
HDBSY#7
HDRDY#7
HTRDY#7
HADS#7
HLOCK#7
HBNR#7
HIT#7
HITM#7
HBPRI#7
HDEFER#7
CPU_TMPA27
VTIN_GND27
IGNNE#14
SMI#14
A20M#14,27
R118 X_62/6
R17 0/6
TP1
TP2
6/24/2005
H_PWRGD
CPURST#5,7
H_TESTHI0
C634
X_0.1u
HDBI#0
HDBI#1
HDBI#2
HDBI#3
EDRDY#
CPU_BOOT
HD#63
HD#62
HD#61
HD#60
HD#59
HD#58
HD#57
HD#56
HD#55
HD#54
8
VCCP
AG21
AG19
AG18
AG15
AG14
AG12
AG11
AF9
AF8
AF22
AF21
AF19
AF18
AF15
AF14
AF12
AF11
AE9
AE23
AE22
AE21
AE19
AE18
AE15
AE14
AE12
AE11
AD8
AD30
AD29
AD28
AD27
AD26
AD25
AD24
AD23
AC8
AC30
AC29
AC28
AC27
AC26
AC25
AC24
AC23
AB8
AA8
U6B
VCCP
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCCW8VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
Y8
Y30
Y23
Y24
Y25
Y26
Y27
Y28
Y29
W30
VCCP
D D
C C
AG22
VCC
VCC
W29
AG25
VCC
VCC
W28
AG26
VCC
VCC
W27
AG27
VCC
VCC
W26
AG28
VCC
VCC
W25
AG29
VCC
VCC
W24
7
AG30
VCC
W23
AG8
VCC
AG9
VCC
VCCU8VCCV8VCC
AH11
VCC
VCC
U30
AH12
VCC
VCC
U29
AH14
VCC
VCC
U28
AH15
VCC
VCC
U27
AH18
VCC
VCC
U26
AH19
VCC
VCC
U25
AH21
VCC
VCC
U24
AH22
U23
VCC
AH25
VCC
VCCT8VCC
AH26
VCC
VCC
T30
AH27
VCC
VCC
T29
AH28
VCC
VCC
T28
AH29
T27
VCC
VCC
AH30
VCC
VCC
T26
AH8
T25
VCC
VCC
AH9
T24
VCC
VCC
AJ11
T23
VCC
AJ12
VCC
AJ14
VCC
AJ15
VCC
VCCN8VCCP8VCCR8VCC
6
AJ18
AJ19
AJ21
AJ22
AJ25
AJ26
AJ8
AJ9
AK11
AK12
AK14
AK15
AK18
AK19
AK21
AK22
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCCM8VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
N23
N24
N25
N26
N27
N28
N29
N30
M24
M25
M26
M27
M28
M29
M30
VCC
VCC
AK25
VCC
M23
AK26
VCC
5
AK8
AK9
AL11
AL12
AL14
AL15
AL18
AL19
AL21
AL22
AL25
AL26
AL29
AL30
AL8
AL9
AM11
AM12
AM14
AM15
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCCJ8VCCJ9VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCCK8VCCL8VCC
J22
J23
J24
J25
J26
J27
J28
J29
J30
K23
K24
K25
K26
K27
K28
K29
K30
AM18
VCC
VCC
J21
AM19
VCC
VCC
J20
AM21
VCC
VCC
J19
AM22
VCC
VCC
J18
AM25
VCC
VCC
J15
AM26
VCC
VCC
J14
4
AM29
VCC
VCC
J13
AM30
VCC
VCC
J12
AM8
J11
VCC
VCC
AM9
VCC
VCC
J10
AN11
VCC
VCC
AN9
AN12
VCC
VCC
AN8
AN14
AN15
AN18
AN19
VCC
VCC
VCC
VCC
VTT_OUT_RIGHT
VTT_OUT_LEFT
VCC
VCC
VCC
VCC
AN25
AN26
AN29
AN30
AN21
AN22
VCC
VCC
VCCA
VSSA
VCCPLL
VCC-IOPLL
VTTPWRGD
VTT_SEL
RSVD
HS11HS22HS33HS4
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
4
A23
B23
D23
C23
A25
A26
A27
A28
A29
A30
B25
B26
B27
B28
B29
B30
C25
C26
C27
C28
C29
C30
D25
D26
D27
D28
D29
D30
VTT_PWG
AM6
VTT_OUT_RIGHT
AA1
VTT_OUT_LEFT
J1
F27
F29
LGA775
H_VCCA
H_VSSA
H_VCCA
3
VTT_SEL
R103 X_1KR
R132
X_1KR
V_FSB_VTT
TEJ/PSC
0
1
VCC3
RSVD
2
V_FSB_VTT
C71 C1U16Y0805
C81 10u/0805
C80 10u/1206
1
CAPS FOR FSB GE NERIC
PLACE COMPONENTS AS CLOSE AS POSSIBLE TO PROCESSOR SOCKET
TRACE WIDTH TO CAPS MUST BE SMALLER THAN 12MILS
100 OHMS OVER 210 OHMS RESISTORS
VTT_OUT_RIGHT CPU_GTLREF
B B
GTLREF VOLTAGE SHOULD BE
0.67*VTT = 0.8V
R78 56.2/912
R74
100R1%
R127 10/6
C55
0.1u/16V/X7R
C57
1U/10V/X7R
CPU_GTLREF 4
V_FSB_VTT
PLACE AT CPU END OF ROUTE
FERR#
THERMTRIP#
7
PROCHOT#
CPURST#
BREQ#0VTT_OUT_LEFT
H_PWRGD
IERR#VTT_OUT_RIGHT
PROCHOT# 4,14
CPURST# 4,7
BREQ#0 4,7VTT_OUT_LEFT4
H_PWRGD 4,7
IERR# 4VTT_OUT_RIGHT4,6
FERR# 4,14
THERMTRIP# 4,14
VID_GD#29
VID_GD#131
FSBSEL RESISTOR CAN BE REMOVED IF ONLY TEJAS
AND CEDAR MILL ARE SUPPORTED
V_FSB_VTT
6
5
1
3
5
7
8P4R-470R
2
4
6
8
VTT_OUT_RIGHT4,6
VTT_OUT_RIGHT
R52 130/6/1
R107 62R
R82 62R
R72 100R
R84 62R
PLACE AT ICH END OF ROUTE
A A
V_FSB_VTT4,7,10,16,29
V_FSB_VTT
8
R92 62R RN27
R97 62R
L9 X_10U100m_0805
CP6
X_COPPER
RN68
7 8
5 6
3 4
1 2
8P4R-4.7K
H_FSBSEL1
H_FSBSEL2
H_FSBSEL0
4
H_FSBSEL1 3,4,9
H_FSBSEL2 4
H_FSBSEL0 3,4
5VSB
VTT_OUT_LEFT
C101
C10U10Y1206
3
C10U10Y1206
C70
R42
1.25V VTT_PWRGOOD
680R
VTT_PWG
Q13
N-MMBT3904_SOT23
H_VCCA
X_C1U10Y
C76
H_VSSA
Micro-Star
Title
Document Number
Last Revision Date:
Wednesday, September 21, 2005
2
LGA775 CPU-1
MS7159
Sheet of
Rev
30
534
1
5
4
3
2
1
MSID1 MSID0
V23
VSS
VSSU7VSSU1VSST7VSST6VSST3VSSR7VSSR5VSS
VSS
VSS
VSS
VSS
VSS
VSS
AJ13
AJ16
AJ17
AJ20
AJ23
AJ24
0
0
VSS
AJ27
05 Per FMB
D D
VTT_OUT_RIGHT4,5
C C
B B
VTT_OUT_RIGHT
R54
60.4/6
U6C
A12
VSS
A15
VSS
A18
VSS
A2
VSS
A21
VSS
A24
VSS
A6
VSS
A9
VSS
AA23
VSS
AA24
VSS
AA25
VSS
AA26
VSS
AA27
VSS
AA28
VSS
AA29
VSS
AA3
VSS
AA30
VSS
AA6
VSS
AA7
VSS
AB1
VSS
AB23
VSS
AB24
VSS
AB25
VSS
AB26
VSS
AB27
VSS
AB28
VSS
AB29
VSS
AB30
VSS
AB7
VSS
AC3
VSS
AC6
VSS
AC7
VSS
AD4
VSS
AD7
VSS
AE10
VSS
AE13
VSS
AE16
VSS
AE17
VSS
AE2
VSS
AE20
VSS
AE24
VSS
AE25
VSS
AE26
VSS
AE27
VSS
AE28
VSS
VSS
AE29
AE3
COMP6Y3COMP7
VSS
VSS
AE5
AE30
AE4
AE7
R55
60.4/6
RSVD
VSS
AF10
TP11
D14
E23
RSVDD1RSVD
VSS
VSS
AF13
AF16
RSVD
VSS
AF17
VSS
AF20
R59
X_22/6
TP12
TP9
TP10
F23
F6
RSVDE5RSVDE6RSVDE7RSVD
VSS
VSS
VSS
VSS
AF23
AF24
AF25
AF26
B13
RSVD
IMPSEL#
VSS
VSS
AF27
AF28
VSS
AF29
R41
62/6
RSVDJ3RSVDN4RSVD
VSS
VSS
AF3
AF30
VSS
R46
62/6
W1
P5
AC4
RSVD
MSID[1]V1MSID[0]
VSS
VSS
VSS
VSS
VSS
VSS
VSS
AF6
AF7
AG10
AG13
AG16
AG17
AG20
AG23
05 Value FMB
V30
VSSY7VSSY5VSSY2VSSW7VSSW4VSSV7VSSV6VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
AH1
AG7
AH10
AH13
AH16
AH17
AG24
VSSV3VSS
VSS
AH20
V29
VSS
AH23
V28
VSS
VSS
AH24
V27
AH3
VSS
VSS
V26
AH6
VSS
VSS
V25
AH7
VSS
VSS
V24
VSS
VSS
AJ10
AJ28
VSS
R30
AJ29
VSS
R29
AJ30
VSS
VSS
0
1
H17
H18
H19
H20
H21
H22
H23
H24
H25
H26
H27
AN1
VSS
AN10
VSS
VSS
AN13
AN16
VSSH3VSSH6VSSH7VSSH8VSSH9VSSJ4VSSJ7VSS
VSS
VSS
AN17
H28
AN2
VSS
VSS
VSS
VSS
AN20
VSS
VSS
AN23
VSS
VSS
AN24
VSS
VSS
AN27
VSS
VSS
AN28
VSS
VSS
VSS
VSSB1VSS
B11
VSS
VSS
VSS
H14
VSS
H13
VSS
H12
VSS
H11
VSS
H10
VSS
G1
VSS
F7
VSS
F4
VSS
F22
VSS
F19
VSS
F16
VSS
F13
VSS
F10
VSS
E8
VSS
E29
VSS
E28
VSS
E27
VSS
E26
VSS
E25
VSS
E20
VSS
E2
VSS
E17
VSS
E14
VSS
E11
VSS
D9
VSS
D6
VSS
D5
VSS
D3
VSS
D24
VSS
D21
VSS
D18
VSS
D15
VSS
D12
VSS
C7
VSS
C4
VSS
C24
VSS
C22
VSS
C19
VSS
C16
VSS
C13
VSS
C10
VSS
B8
VSS
B5
VSS
B24
VSS
B20
VSS
B17
VSS
VSS
LGA775
B14
R28
R27
R26
R25
R24
R23
P30
P29
P28
P27
P26
P25
P24
P23
VSS
VSS
VSS
VSS
VSS
VSS
VSSR2VSSP7VSSP4VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSSN7VSSN6VSSN3VSSM7VSSM1VSSL7VSSL6VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
AJ4
AJ7
AK10
AK13
AK16
AK17
AK2
AK20
AK23
AK24
AK27
AK28
AK29
AK30
AK5
AK7
AL10
AL13
VSS
AL16
AL17
VSS
AL20
VSS
AL23
VSS
AL24
VSS
VSS
AL27
L30
AL28
VSS
VSSL3VSS
VSS
AL3
L29
L28
L27
VSS
VSS
VSS
VSS
VSS
AL7
AM1
AM10
L26
VSS
VSS
AM13
L25
VSS
VSS
AM16
L24
VSS
VSS
AM17
L23
VSS
VSS
AM20
VSSK7VSS
VSS
AM23
K5
VSS
AM24
K2
VSS
AM27
VSS
AM28
VSS
AM4
A A
Micro-Star
Document Number
Last Revision Date:
5
4
3
2
Wednesday, September 21, 2005
Title
MS7159
LGA775 CPU-1
Sheet of
1
Rev
30
634
5
HVREF
C1XAVSS
C4XAVSS
C1XAVDD
C4XAVDD
P25
M23
M21
M19
C13
HVREF0
HVREF1
HVREF2
C4XAVSS
C4XAVDD
Host
HD57#
HD56#
HD55#
HD54#
HD53#
HD52#
A22
E20
B23
A23
D22
C23
HD#51
HD#54
HD#56
HD#55
HD#52
HD#53
R1185
24.3 1%
D S
2N7002S
Q41
R1190
383 1%
HVREF3
HD51#
HD#50
M17
HVREF4
HD50#
A24
B21
HD#49
AP2303N
Q107
F12
D13
E12
C1XAVSS
C1XAVDD
HD63#
HD62#
HD61#
HD60#
HD59#
HD58#
A18
A20
A19
E18
A21
D18
D20
HD#59
HD#62
HD#57
HD#58
HD#61
HD#60
HD#63
D D
CPUCLK13
CPUCLK-13
HLOCK#4
HDEFER#4
HTRDY#4
CPURST#4,5
H_PWRGD4,5
HDRDY#4
HDBSY#4
HREQ#04
HREQ#14
HREQ#24
HREQ#34
HREQ#44
HADSTB#04
HADSTB#14
C C
HA#[3..31]4
B B
CPUCLK1
CPUCLK-1
HLOCK#
HDEFER#
HTRDY#
CPURST#
H_PWRGD
HBPRI#
HBPRI#4
BREQ#0
BREQ#04,5
HRS#0
HRS#04
HRS#1
HRS#14
HRS#2
HRS#24
HADS#
HADS#4
HITM#
HITM#4
HIT#
HIT#4
HDRDY#
HDBSY#
HBNR#
HBNR#4
HREQ#0
HREQ#1
HREQ#2
HREQ#3
HREQ#4
HADSTB#0
HADSTB#1
HA#31
HA#30
HA#29
HA#28
HA#27
HA#26
HA#25
HA#24
HA#23
HA#22
HA#21
HA#20
HA#19
HA#18
HA#17
HA#16
HA#15
HA#14
HA#13
HA#12
HA#11
HA#10
HA#9
HA#8
HA#7
HA#6
HA#5
HA#4
HA#3
HD#[0..63]4
A12
B12
B31
J28
A34
B17
D34
J27
B35
A31
B34
E30
B33
C33
A33
D32
C31
A32
D35
C36
G29
E29
D29
D33
J33
K28
L28
L29
J36
K29
H36
K30
H35
K32
H34
J31
J30
H32
J32
G36
G33
H30
G32
H33
G31
F36
F33
F35
F32
F34
F31
E32
E36
E33
D36
F30
D31
H29
649/662
U12A
CPUCLK
CPUCLK#
HLOCK#
DEFER#
HTRDY#
CPURST#
CPUPWRGD
BPRI#
BREQ0#
RS0#
RS1#
RS2#
ADS#
HITM#
HIT#
DRDY#
DBSY#
BNR#
HREQ0#
HREQ1#
HREQ2#
HREQ3#
HREQ4#
HASTB0#
HASTB1#
HA35#
HA34#
HA33#
HA32#
HA31#
HA30#
HA29#
HA28#
HA27#
HA26#
HA25#
HA24#
HA23#
HA22#
HA21#
HA20#
HA19#
HA18#
HA17#
HA16#
HA15#
HA14#
HA13#
HA12#
HA11#
HA10#
HA9#
HA8#
HA7#
HA6#
HA5#
HA4#
HA3#
Northwood EE CPU ONLY
Q55
R1186
4.7k
2N7002S
Q44
X_2N7002S
G
VCC3
GTLREF_SEL
A A
5
4
HPCOMP
HNCOMP
A16
B16
HPCOMP
HNCOMP
PCIEAVSS
EXP_A_RXN_0
EXP_A_RXN_1
PCIEAVDD
EXP_A_RXP_0
AJ2
AJ1
PCIEAVSS
PCIEAVDD
EXP_A_RXN_3
EXP_A_RXN_2
EXP_A_RXP_1
EXP_A_RXP_2
EXP_A_RXP_3
PERp0L7PERn0L8PERp1M5PERn1M6PERp2N7PERn2N8PERp3P5PERn3P6PERp4R7PERn4R8PERp5T5PERn5T6PERp6U7PERn6U8PERp7V5PERn7V6PERp8W7PERn8W8PERp9Y5PERn9
EXP_A_RXN_6
EXP_A_RXN_7
EXP_A_RXN_8
EXP_A_RXN_4
EXP_A_RXN_5
EXP_A_RXP_4
EXP_A_RXP_5
EXP_A_RXP_6
EXP_A_RXN_9
EXP_A_RXP_7
EXP_A_RXP_8
EXP_A_RXP_9
PCI Express
HD49#
HD48#
HD47#
HD46#
HD45#
HD44#
HD43#
HD42#
HD41#
HD40#
HD39#
HD38#
HD37#
HD36#
HD35#
HD34#
HD33#
HD32#
HD31#
HD30#
HD29#
HD28#
HD27#
HD26#
HD25#
HD24#
HD23#
HD22#
HD21#
HD20#
HD19#
HD18#
HD17#
HD16#
HD15#
HD14#
J16
J18
J20
J19
J21
J22
J25
B19
E16
E17
H16
D16
H18
G17
HD#39
HD#44
HD#45
HD#40
HD#46
HD#41
HD#42
HD#47
HD#48
HD#43
4
H20
H19
HD#37
HD#36
HD#38
E21
H21
H22
G19
G21
HD#31
HD#35
HD#33
HD#29
HD#34
HD#32
HD#30
V_FSB_VTT 4,5,10,16,29
E23
HD#28
R133
10 1%
R146
174 1%
E25
H23
H24
G23
HD#23
HD#24
HD#25
HD#27
HD#26
H25
HD#22
HNCOMP
HPCOMP
J26
E27
A25
H26
H28
H27
D24
G27
HD#19
HD#20
HD#15
HD#21
HD#13
HD#18
HD#14
HD#17
HD#16
3
EXP_A_RXP_[0..15] 21
EXP_A_RXN_[0..15] 21
EXP_A_RXP_10
EXP_A_RXP_11
EXP_A_RXP_13
EXP_A_RXP_14
EXP_A_RXP_15
EXP_A_RXP_12
EXP_A_RXN_10
EXP_A_RXN_11
EXP_A_RXN_13
EXP_A_RXN_14
EXP_A_RXN_15
EXP_A_RXN_12
Y6
AA7
AA8
AB5
AB6
AC7
AC8
AD5
AD6
AF5
AF6
AH4
AH5
EXP_A_TXP_0
PERp10
PERn10
PERp11
PERn11
PERp12
PERn12
PERp13
PERn13
PERp14
HD13#
HD12#
HD11#
HD10#
HD9#
HD8#
HD7#
HD6#
HD5#
HD4#
E24
A27
B25
A26
A28
A29
C25
D26
D28
C29
HD#12
HD#11
HD#10
HD#5
HD#8
HD#9
HD#4
HD#6
HD#7
GTLREF_SEL4
3
PERn14
PERp15
HD3#
HD2#
E28
B29
D30
HD#2
HD#1
HD#3
V_FSB_VTT4,5,10,16,29
GTLREF_SEL
PERn15
HD1#
HD0#
A30
HD#0
PETp0
PETn0
PETp1
PETn1
PETp2
PETn2
PETp3
PETn3
PETp4
PETn4
PETp5
PETn5
PETp6
PETn6
PETp7
PETn7
PETp8
PETn8
PETp9
PETn9
PETp10
PETn10
PETp11
PETn11
PETp12
PETn12
PETp13
PETn13
PETp14
PETn14
PETp15
PETn15
REFCLK+
REFCLK-
PCIERSET0
PCIERSET1
PME#
INTX#
PCREQ#
EDRDY#
HDSTBN3#
HDSTBN2#
HDSTBN1#
HDSTBN0#
HDSTBP3#
HDSTBP2#
HDSTBP1#
HDSTBP0#
DBI3#
DBI2#
J23
E19
C19
HDBI#2
HDBI#1
HDBI#3
DBI1#
NC0
C27
HDBI#0
DBI0#
N3
N1
P1
P3
R3
R1
T1
T3
U3
U1
V1
V3
W3
W1
Y1
Y3
AA3
AA1
AB1
AB3
AC3
AC1
AD1
AD3
AE3
AE1
AF1
AF3
AG3
AG1
AH1
L1
L2
AH3
AJ3
E11
F11
C35
C34
A17
E22
H17
J24
B27
C21
J17
G25
E26
R104
143R1%
2N7002S
Q27
EXP_A_TXN_0
EXP_A_TXP_1
EXP_A_TXN_1
EXP_A_TXP_2
EXP_A_TXN_2
EXP_A_TXP_3
EXP_A_TXN_3
EXP_A_TXP_4
EXP_A_TXN_4
EXP_A_TXP_5
EXP_A_TXN_5
EXP_A_TXP_6
EXP_A_TXN_6
EXP_A_TXP_7
EXP_A_TXN_7
EXP_A_TXP_8
EXP_A_TXN_8
EXP_A_TXP_9
EXP_A_TXN_9
EXP_A_TXP_10
EXP_A_TXN_10
EXP_A_TXP_11
EXP_A_TXN_11
EXP_A_TXP_12
EXP_A_TXN_12
EXP_A_TXP_13
EXP_A_TXN_13
EXP_A_TXP_14
EXP_A_TXN_14
EXP_A_TXP_15
EXP_A_TXN_15
CK_PE_100M_MCH
CK_PE_100M_MCH#
R207 680R1%
R208 150R1%
R480 0R
H_PCREQ#
H_EDRDY#
HDSTB#3
HDSTB#2
HDSTB#1
HDSTB#0
HDSTB3
HDSTB2
HDSTB1
HDSTB0
HDBI#[0..3] 4
M3
R93
100R1%
R102
169R1%
EXP_A_TXP_0 21
EXP_A_TXN_0 21
EXP_A_TXP_1 21
EXP_A_TXN_1 21
EXP_A_TXP_2 21
EXP_A_TXN_2 21
EXP_A_TXP_3 21
EXP_A_TXN_3 21
EXP_A_TXP_4 21
EXP_A_TXN_4 21
EXP_A_TXP_5 21
EXP_A_TXN_5 21
EXP_A_TXP_6 21
EXP_A_TXN_6 21
EXP_A_TXP_7 21
EXP_A_TXN_7 21
EXP_A_TXP_8 21
EXP_A_TXN_8 21
EXP_A_TXP_9 21
EXP_A_TXN_9 21
EXP_A_TXP_10 21
EXP_A_TXN_10 21
EXP_A_TXP_11 21
EXP_A_TXN_11 21
EXP_A_TXP_12 21
EXP_A_TXN_12 21
EXP_A_TXP_13 21
EXP_A_TXN_13 21
EXP_A_TXP_14 21
EXP_A_TXN_14 21
EXP_A_TXP_15 21
EXP_A_TXN_15 21
CK_PE_100M_MCH 3
CK_PE_100M_MCH# 3
PME# 14,18,19,21
INTA# 9,13,19
PCREQ# 4
EDRDY# 4
HDSTB#3 4
HDSTB#2 4
HDSTB#1 4
HDSTB#0 4
HDSTB3 4
HDSTB2 4
HDSTB1 4
HDSTB0 4
C100
0.01u
2
C89
0.01u
HVREF
C377
0.1uX7R
Please this capacitor
under 649/662 solder side.
2
1
VCC1_8 VCC1_8
L20
X_80S/0603
C124
X_103P
L21
X_80S/0603
CP13
X_COPPER
C1XAVDD
CB68
0.1u
C1XAVSS
CP14
X_COPPER
CB197
10u/1206
VCC1_8
L17
X_80S/0603
C118
X_103P
L15
X_80S/0603
L36
X_80S/0603
C223
X_103P
L35
X_80S/0603
PCIEAVDD
CB84
0.1u
PCIEAVSS
CP9
X_COPPER
C4XAVDD
CB63
0.1u
C4XAVSS
CP8
X_COPPER
CP29
X_COPPER
CP28
X_COPPER
Closed to SIS649
478 CPU 775 CPU
0.63*VCCP
R91:100 1%
HVREF
R92:169 1%
GTL_SEL x 0 1
HNCOMP
10 1%
to VCCP
HPCOMP
100 1%
to GND
Note 1: The table details the setting of each CPUs
Note 2: To support all 775 CPUs (Prescott &
Northwood EE & Smithfield), please follow the
recommend circuit as shown in left (including the
10ohm for HNCOMP and 174ohm for HPCOMP)
HVREF 4
Micro-Star
Document Number
Last Revision Date:
Wednesday, September 21, 2005
Title
SIS 649-Host & AGP
PSC&SFD
0.67*VCCP
R91:49.9 1%
R92:100 1%
10 1%
to VCCP
120 1%
to GND
MS7159
1
775 CPU
NWD EE
0.89V
R91:49.9 1%
R92:100 1%
7 1%
to VCCP
170 1%
to GND
Sheet of
Rev
30
734
5
M34
M36
M35
W36
AB35
AB34
W33
W32
AA32
AB36
AA33
AA36
AH30
AJ32
AM30
AN30
AG29
AH32
AM32
AN32
AJ30
AL32
AK32
AH24
AH23
AH21
AM20
AJ24
AJ23
AJ21
AH22
AM22
AJ22
AK22
AM19
AT18
AT16
AR16
AT19
AN19
AN17
AM17
AR18
AT17
AP18
AN15
AM15
AM13
AT12
AP16
AT15
AT13
AN13
AT14
AP14
AR14
AT11
AN11
AR9
AR12
AP12
AP10
AM11
AR10
AT10
U12B
MD0A
N36
MD1A
R36
MD2A
R33
MD3A
MD4A
MD5A
P35
MD6A
P34
MD7A
N33
DQM0A
P36
DQS0A
N32
DQS0A#
T35
MD8A
T34
MD9A
V34
MD10A
MD11A
R32
MD12A
T36
MD13A
V36
MD14A
V35
MD15A
U36
DQM1A
U32
DQS1A
U33
DQS1A#
Y36
MD16A
Y35
MD17A
MD18A
MD19A
MD20A
MD21A
MD22A
MD23A
Y34
DQM2A
DQS2A
DQS2A#
MD24A
MD25A
MD26A
MD27A
MD28A
MD29A
MD30A
MD31A
DQM3A
DQS3A
DQS3A#
MD32A
MD33A
MD34A
MD35A
MD36A
MD37A
MD38A
MD39A
DQM4A
DQS4A
DQS4A#
MD40A
MD41A
MD42A
MD43A
MD44A
MD45A
MD46A
MD47A
DQM5A
DQS5A
DQS5A#
MD48A
MD49A
MD50A
MD51A
MD52A
MD53A
MD54A
MD55A
DQM6A
DQS6A
DQS6A#
MD56A
MD57A
MD58A
AP9
MD59A
MD60A
MD61A
MD62A
AT9
MD63A
DQM7A
DQS7A
DQS7A#
649/662
RMD0
RMD1
RMD2
RMD3
RMD4
RMD5
RMD6
RMD7
RDQM0
D D
C C
B B
RDQS0
RMD8
RMD9
RMD10
RMD11
RMD12
RMD13
RMD14
RMD15
RDQM1
RDQS1
RMD16
RMD17
RMD18
RMD19
RMD20
RMD21
RMD22
RMD23
RDQM2
RDQS2
RMD24
RMD25
RMD26
RMD27
RMD28
RMD29
RMD30
RMD31
RDQM3
RDQS3
RMD32
RMD33
RMD34
RMD35
RMD36
RMD37
RMD38
RMD39
RDQM4
RDQS4
RMD40
RMD41
RMD42
RMD43
RMD44
RMD45
RMD46
RMD47
RDQM5
RDQS5
RMD48
RMD49
RMD50
RMD51
RMD52
RMD53
RMD54
RMD55
RDQM6
RDQS6
RMD56
RMD57
RMD58
RMD59
RMD60
RMD61
RMD62
RMD63
RDQM7
RDQS7
4
MA0A
MA1A
MA2A
MA3A
MA4A
MA5A
MA6A
MA7A
MA8A
MA9A
MA10A
MA11A
MA12A
MA13A
MA14A
MA15A
RASA#
CASA#
WEA#
FWDSDCLKOA
FWDSDCLKOA#
CS0A#
CS1A#
CS2A#
CS3A#
ODT0A
ODT1A
ODT2A
ODT3A
CKE0A
CKE1A
CKE2A
CKE3A
D1XAVDD
D1XAVSS
D4XAVDD
D4XAVSS
DDRVREF0
DDRVREF1
DDRVREF2
DDRVREF3
DDRCOMP
DDRCOMN
OCDVREFP
OCDVREFN
S3AUXSW#
DRAM_SEL
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
3
RMD[0..63]
RDQM[0..7]
C84
X_0.1u
RDQS[0..7]
RMA[0..16]
RCS-[0..3]
CKE[0..3]
C139
0.1u
C153
0.1u
C44
0.1u
RMA0
AP33
RMA1
AN33
RMA2
AT34
RMA3
AR34
RMA4
AR35
RMA5
AP34
RMA6
AP35
RMA7
AM33
RMA8
AP36
RMA9
AN36
RMA10
AT33
RMA11
AR32
RMA12
AP32
AM35
RMA14
AN34
RMA15
AM34
RMA16
AM29
AM36
RSRAS#
AT32
RSCAS#
AP30
RSWE#
AT31
K36
K35
K34
L36
RCS-0
AM31
RCS-1
AN29
RCS-2
AN31
RCS-3
AT29
AR30
AP28
AT30
AR28
AJ33
CKE0
AH34
CKE1
AJ36
CKE2
AL34
CKE3
AL33
AH36
AH35
AK34
AL36
AJ34
AK35
AK36
DLLAVDD
A13
DLLAVSS
B13
DDRAVDD
AH28
DDRAVSS
AJ28
DDRVREF0
AE19
AE23
AC25
V25
R124 3 6R 1% C378
AJ29
R123 3 6R 1%
AH29
AR8
AT8
R164 22
F13
R171 4 .7K
B11
R117 22
S3AUXSW#
VCC3
RSRAS# 11,12
RSCAS# 11,12
RSWE# 11,12
VCCM
S3AUXSW# 29
FWDSDCLKOFWDSDCLKA
C108
10p
FWDSDCLKO 3
DIMM DECOUPLING
VCCM
VCCM
C159
0.1u
RMD[0..63] 11,12
RDQM[0..7] 11,12
RDQS[0..7] 11,12
RMA[0..16] 11,12
RCS-[ 0..3] 11,12
CKE[0..3] 11
C122
X_1u
C125
X_1u
2
VCC1_8 VCC1_8
VCCM
R109
150RST
R108
150RST
C103
X_4.7U/0805
C22
C168
0.1u
0.1u
Place these capacitors under SIS649 solder side
VCCM VCC1_8
C380
0.1u
CP12
X_COPPER
L19
DLLAVDD DDRAVDD
X_80S/0603
C120
CB66
0.1u
X_103P
DLLAVSS
CP10
X_COPPER
L18
X_80S/0603
C107
X_103P
C111
C376
0.01uF
0.1u
place under 649/662 solder side
C381
0.1u
1u
C2365
X_0.1u
1
L30
X_80S/0603
C175
X_103P
L29
X_80S/0603
DDRVREF0
DDRAVSS
C384
1u
CP22
X_COPPER
CB82
0.1u
CP20
X_COPPER
C383
1u
A A
Micro-Star
Document Number
Last Revision Date:
5
4
3
2
Wednesday, September 21, 2005
Title
MS7159
SIS 649-Memory
Sheet of
1
Rev
30
834
5
4
3
2
1
VCC1_8 VCC1_8
ZCLK0
ZCLK03
CP27
L34
X_80S/0603
D D
X_80S/0603
VCC1_8
C C
VCC1_8
X_COPPER
Z1XAVDD
CB83
C184
0.1u
X_0.1u
Z1XAVSS Z4XAVSS
L33
CP26
X_COPPER
R202 56R
R199 56R
C170
R205
150RST
X_0.1u
ZVREF
C186
R212
49.9RST
0.1u
L32
X_80S/0603
C172
X_0.1u
L31
X_80S/0603
ZCMP_N
ZCMP_P
CP25
X_COPPER
Z4XAVDD
CB81
0.1u
CP23
X_COPPER
Open for 649/662 co-layout
Short for 662
ROUT24
GOUT24
BOUT24
C664
C665
C663
X_103P
X_103P
X_103P
VCC3
Enable Disable
RSYNC
LSYNC
B B
CSYNC VB
VGA
panel link
1
1
1
0
0
0
ZUREQ13
ZDREQ13
ZSTB013
ZSTB-013
ZSTB113
ZSTB-113
ZAD[16..0]13
R1014 X_0R
R1015 X_0R
R1016 X_0R
HSYNC24
VSYNC24
DDC1CLK24
DDC1DATA24
R130 G _4.7K
R134 G _4.7K
R135 G _4.7K
DCLK3
INTA#7,13,19
Short for 662
open for 649
R957
R153
VCOMP
VVBWN
VRSET
LSYNC
RSYNC
CSYNC
DACAVDD
DACAVSS
DACAVDD
DACAVSS
DCLKAVDD
DCLKAVSS
ECLKAVDD
ECLKAVSS
ZUREQ
ZDREQ
ZSTB0
ZSTB-0
ZSTB1
ZSTB-1
ZAD0
ZAD1
ZAD2
ZAD3
ZAD4
ZAD5
ZAD6
ZAD7
ZAD8
ZAD9
ZAD10
ZAD11
ZAD12
ZAD13
ZAD14
ZAD15
ZAD16
ZVREF
ZCMP_N
ZCMP_P
Z1XAVDD
Z1XAVSS
Z4XAVDD
Z4XAVSS
AK1
ZCLK
AN6
ZUREQ
AM6
ZDREQ
AL3
ZSTB0
AK3
ZSTB0#
AT4
ZSTB1
AT3
ZSTB1#
AL5
ZAD0
AP5
ZAD1
AK5
ZAD2
AM4
ZAD3
AR5
ZAD4
AL4
ZAD5
AN4
ZAD6
AP4
ZAD7
ZAD8
ZAD9
ZAD10
ZAD11
ZAD12
ZAD13
ZAD14
ZAD15
ZAD16
ZVREF
ZCMP_N
ZCMP_P
Z1XAVDD
Z1XAVSS
Z4XAVDD
Z4XAVSS
ROUT
GOUT
BOUT
HSYNC
VSYNC
VGPIO0
VGPIO1
VCOMP
VVBWN
VRSET
LSYNC
RSYNC
CSYNC
VOSCI
INTA#
DACAVDD1
DACAVSS1
DACAVDD2
DACAVSS2
DCLKAVDD
DCLKAVSS
ECLKAVDD
ECLKAVSS
649/662
MuTIOL
VGA
VB
VSSB5VSSB6VSSC3VSSD1VSSE5VSSF3VSSG1VSSH5VSSJ3VSS
C12
AM2
AP3
AL2
AN1
AN3
AM1
AR2
AP2
AP6
AP7
AP8
AN8
AT6
AR6
AT7
AR7
A6
C6
B7
A7
C7
D7
A8
B8
C8
B9
B10
C10
C9
G_0
E8
G_0
F10
D10
E10
D9
E9
D6
E6
E7
F7
ENTEST
TESTMODE0
TESTMODE1
TESTMODE2
TRAP0
TRAP1
TRAP2
AUXOK
PWROK
PCIRST#
VADE
VAD0
VAD1
VAD2
VAD3
VAD4
VAD5
VAD6
VAD7
VAD8
VAD9
VAD10
VAD11
VAGCLK
VAGCLKN
VAVSYNC
VAHSYNC
VBDE
VBD0
VBD1
VBD2
VBD3
VBD4
VBD5
VBD6
VBD7
VBD8
VBD9
VBD10
VBD11
VBGCLK
VBGCLKN
VBVSYNC
VBHSYNC
VBCTL0
VBCTL1
VBHCLK
VBCAD
VBCLK
AGPIO2
AGPIO3
U12C
ENTEST
TMODE0
TMODE2
R145 4.7KR
RSMRST#
RSMRST# 14,27,29
MS7_POK 14,29
PCIRST1# 21,29
MS7_POK
C161 X_C0.1U25Y
C119 X_C0.1U25Y
Reserved for SIS662
VCC1_8 VCC3 VCC3
L23
80S/0603
C135
G_0.1u
L22
80S/0603
C130 G_0.1u
C133 G_0.1u
C134
G_1u
R142 G_130RST
DACAVDD
DACAVSS
VVBWN
VCOMP
VRSET
L26
X_80S/0603
C144
X_0.1u
L27
X_80S/0603
CP17
X_COPPER
ECLKAVDD
CB75
G_0.1u
ECLKAVSS
CP18
X_COPPER
L24
X_80S/0603
C138
X_0.1u
L25
X_80S/0603
CP15
X_COPPER
DCLKAVDD
CB73
G_0.1u
DCLKAVSS
CP16
X_COPPER
F9
G6
G7
F6
G8
G9
F8
RSMRST#
E13
MS7_POK
C11
PCIRST1#
D12
D5
D2
C1
C2
B2
B3
G4
G5
E4
D3
D4
A3
C4
F5
K4
A4
B4
H4
J4
J1
J2
H2
H1
G3
F1
F2
F4
E1
E2
E3
G2
K6
H3
K2
K3
H6
A5
C5
J5
J6
K5
BSEL function for 775 CPU
A A
H_FSBSEL1
H_FSBSEL13,4,5
R150 10K
5
VCC3 VCC3
R151
10K
Q34
N-MMBT3904_SOT23
R176
10K
TMODE0
R159 33
Q35
N-MMBT3904_SOT23
VCCP
4
R152
N-MMBT3904_SOT23
VCC3
VCC3
R180
R165
10K
10K
TMODE2
R157 33
Q37
10K
Q36
N-MMBT3904_SOT23
Micro-Star
Document Number
Last Revision Date:
3
2
Wednesday, September 21, 2005
Title
MS7159
SIS 649-Power & HyperZip
Sheet of
1
Rev
30
934
5
4
3
2
1
VCCM
U12D
V23
VCCM
V24
VCCM
W23
VCCM
W24
VCCM
IVDD
AC19
AC20
AC21
AC22
AC23
AC24
AD19
AD20
AD21
AD22
AD23
AD24
AG34
AG35
AN35
AR21
AR23
AR25
AR27
AR29
AR31
AR33
AC16
AC17
AC18
AD16
AD17
AD18
AA23
AA24
AB23
AB24
AP31
AA22
AB16
AB17
AB18
AB19
AB20
AB21
AB22
Y23
VCCM
Y24
VCCM
VCCM
VCCM
VCCM
VCCM
VCCM
VCCM
VCCM
VCCM
VCCM
VCCM
VCCM
VCCM
VCCM
VCCM
VCCM
VCCM
VCCM
VCCM
VCCM
VCCM
VCCM
VCCM
VCCM
VCCM
VCCM
VCCM
VCCM
N20
IVDD
N21
IVDD
N22
IVDD
N23
IVDD
N24
IVDD
P20
IVDD
P21
IVDD
P22
IVDD
P23
IVDD
P24
IVDD
R22
IVDD
R23
IVDD
R24
IVDD
T22
IVDD
T23
IVDD
T24
IVDD
U22
IVDD
U23
IVDD
U24
IVDD
V22
IVDD
W22
IVDD
Y22
IVDD
IVDD
IVDD
IVDD
IVDD
IVDD
IVDD
IVDD
IVDD
IVDD
IVDD
IVDD
IVDD
IVDD
IVDD
H7
VDDVB1.8
H8
VDDVB1.8
H9
VDDVB1.8
J7
VDDVB1.8
J8
VDDVB1.8
J9
VDDVB1.8
K9
VDDVB1.8
A9
VDD3.3
A10
AUX1.8
A11
AUX3.3
649/662
Power
D D
C C
VDDPEX_N
(Reserved Pins
B B
A A
for SiS662)
VCC3
SB1.8V
VCC3SBY
V_FSB_VTT
V_FSB_VTT4,5,7,16,29
A14
VTT
A15
VTT
B14
VTT
B15
VTT
C14
VTT
C15
VTT
D14
VTT
D15
VTT
E14
VTT
E15
VTT
F14
VTT
F15
VTT
G14
VTT
G15
VTT
H14
VTT
H15
VTT
J14
VTT
J15
VTT
K14
VTT
K15
VTT
N15
VTT
N16
VTT
N17
VTT
N18
VTT
N19
VTT
P15
VTT
P16
VTT
P17
VTT
P18
VTT
P19
VCC1.8
VCC1.8
VCC1.8
VCC1.8
VCC1.8
VCC1.8
VCC1.8
VCC1.8
VCC1.8
VCC1.8
VCC1.8
VCC1.8
VCC1.8
VCC1.8
VCC1.8
VCC1.8
VCC1.8
VCC1.8
VCC1.8
VCC1.8
VCC1.8
VCC1.8
VCC1.8
VCC1.8
VCC1.8
VCC1.8
VCC1.8
VCC1.8
VCC1.8
VCC1.8
VCC1.8
VCC1.8
VCC1.8
VCC1.8
VCC1.8
VCC1.8
VCC1.8
VCC1.8
VCC1.8
VCC1.8
VCC1.8
VCC1.8
VCC1.8
VCC1.8
VCC1.8
VCC1.8
VCC1.8
PVDDH
PVDDH
PVDDH
PVDDH
PVDDH
PVDDH
PVDDH
PVDDH
PVDDH
PVDDH
PVDDH
VDDPEX
VDDPEX
VDDPEX
VDDPEX
VDDPEX
VDDPEX
VDDPEX
VDDPEX
VDDPEX
VDDPEX
VDDPEX
VDDPEX
VDDPEX
VDDPEX
VTT
Y13
Y14
Y15
AA13
AA14
AA15
AB13
AB14
AB15
AC13
AC14
AC15
AD13
AD14
AD15
AD9
AE8
AE9
AF8
AF9
AG7
AG8
AG9
AH7
AH8
AH9
AJ6
AJ7
AJ8
AJ9
AK6
AK7
AK8
AK9
AL6
AL7
AL8
AL9
AM7
AM8
AN2
AN5
AN7
AP1
AR3
AR4
AT5
R15
R16
R17
R18
R19
R20
R21
T15
U15
V15
W15
N13
N14
P13
P14
R13
R14
T13
T14
U13
U14
V13
V14
W13
W14
VCC1_8
VDDPEX_N
U12E
B18
VSS
B20
VSS
B22
VSS
B24
VSS
B26
VSS
B28
VSS
B30
VSS
B32
VSS
C17
VSS
E31
VSS
E35
VSS
F17
VSS
F19
VSS
F21
VSS
F23
VSS
F25
VSS
F27
VSS
F29
VSS
G16
VSS
G18
VSS
G20
VSS
G22
VSS
G24
VSS
G26
VSS
G28
VSS
G30
VSS
G35
VSS
H31
VSS
J29
VSS
J35
VSS
K1
VSS
K7
VSS
K8
VSS
K17
VSS
K19
VSS
K21
VSS
K23
VSS
K25
VSS
K27
VSS
K31
VSS
L3
VSS
L4
VSS
L5
VSS
L6
VSS
L9
VSS
L30
VSS
L32
VSS
L33
VSS
L35
VSS
M1
VSS
M2
VSS
M4
VSS
M7
VSS
M8
VSS
M9
VSS
M27
VSS
M31
VSS
M32
VSS
N2
VSS
N4
VSS
N5
VSS
N6
VSS
N9
VSS
N30
VSS
N35
VSS
P2
VSS
P4
VSS
P7
VSS
P8
VSS
P9
VSS
P27
VSS
P31
VSS
R2
VSS
R4
VSS
R5
VSS
R6
VSS
R9
VSS
R30
VSS
R35
VSS
T2
VSS
T4
VSS
T7
VSS
T8
VSS
T9
VSS
T27
VSS
T31
VSS
U2
VSS
U4
VSS
U5
VSS
U6
VSS
U9
VSS
U30
VSS
U35
VSS
V2
VSS
V4
VSS
V7
VSS
V8
VSS
V9
VSS
V27
VSS
V31
VSS
T16
VSS
T17
VSS
T18
VSS
T19
VSS
T20
VSS
T21
VSS
U16
VSS
U17
VSS
U18
VSS
U19
VSS
U20
VSS
U21
VSS
V16
VSS
V17
VSS
V18
VSS
V19
VSS
V20
VSS
V21
VSS
649/662
Ground
W2
VSS
W4
VSS
W5
VSS
W6
VSS
W9
VSS
W16
VSS
W17
VSS
W18
VSS
W19
VSS
W20
VSS
W21
VSS
W30
VSS
W35
VSS
Y2
VSS
Y4
VSS
Y7
VSS
Y8
VSS
Y9
VSS
Y16
VSS
Y17
VSS
Y18
VSS
Y19
VSS
Y20
VSS
Y21
VSS
Y27
VSS
Y31
VSS
AA2
VSS
AA4
VSS
AA5
VSS
AA6
VSS
AA9
VSS
AA16
VSS
AA17
VSS
AA18
VSS
AA19
VSS
AA20
VSS
AA21
VSS
AA30
VSS
AA35
VSS
AB2
VSS
AB4
VSS
AB7
VSS
AB8
VSS
AB9
VSS
AB27
VSS
AB31
VSS
AC2
VSS
AC4
VSS
AC5
VSS
AC6
VSS
AC9
VSS
AC30
VSS
AC35
VSS
AD2
VSS
AD4
VSS
AD7
VSS
AD8
VSS
AD27
VSS
AD31
VSS
AE2
VSS
AE4
VSS
AE5
VSS
AE6
VSS
AE7
VSS
AE30
VSS
AE35
VSS
AF2
VSS
AF4
VSS
AF7
VSS
AF28
VSS
AF31
VSS
AG2
VSS
AG4
VSS
AG5
VSS
AG6
VSS
AG12
VSS
AG14
VSS
AG16
VSS
AG18
VSS
AG20
VSS
AG22
VSS
AG24
VSS
AG26
VSS
AG30
VSS
AH2
VSS
AH6
VSS
AH31
VSS
AJ4
VSS
AJ5
VSS
AJ35
VSS
AK2
VSS
AK4
VSS
AK11
VSS
AK13
VSS
AK15
VSS
AK17
VSS
AK19
VSS
AK21
VSS
AK23
VSS
AK25
VSS
AK27
VSS
AK29
VSS
AK31
VSS
AL1
VSS
AL10
VSS
AL12
VSS
AL14
VSS
AL16
VSS
AL18
VSS
AL20
VSS
AL22
VSS
AL24
VSS
AL26
VSS
AL28
VSS
AL30
VSS
AL35
VSS
AM3
VSS
AM5
VSS
AR11
VSS
AR13
VSS
AR15
VSS
AR17
VSS
AR19
VSS
IVDD
C379 1u
C225 0.1u
V_FSB_VTT
CB113 0.1u
Please these capacitors under 649/662 solder side
VDDPEX_N
VDDPEX_N VCC1_8
CB115 1u
VCCM
CB189 1u
CB185 1u
CB190 1u
CB193 1u
CB194 0.1u
IVDD
C160
0.1u
CB118 1u
CB117 1u
CB123 X_0.1uCB114 1u
CB116 1u
CB112 1u
MSI
Title
Size Document Number Rev
5
4
3
2
Date: Sheet
MICRO-STAR INt'L CO., LTD.
SIS 649 POWER, GND
MS7159
1
10 34Wednesday, September 21, 2005
of
30
5
4
3
2
1
RMD[0..63]8,12
RMA[0..16]8,12
RDQM[0..7]8,12
D D
C C
VCCM
R44
75RST
R43
75RST
B B
A A
CB3
X_103P
DDRVREF GEN. & DECOUPLING
RDQS[0..7]8,12
NOTE:
VDDID IS A TRAP ON THE DIMM
MODULE TO INDICATE:
VDDID
OPEN
GND
MEMORY MUX TABLE:
SDR
CS0
CS1
CS2
CS3
CS4
CS5 CS5
CSB0
CSB1
CSB2
CSB3
CSB4
CSB5
CSB6
CSB7
CB6
0.1u
DDRVREF
CB4
0.1u
RMA[0..16]
RDQM[0..7] RDQM[0..7]
RDQS[0..7] RDQS[0..7]
DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQ8
DQ9
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
DQ16
DQ17
DQ18
DQ19
DQ20
DQ21
DQ22
DQ23
DQ24
DQ25
DQ26
DQ27
DQ28
DQ29
DQ30
DQ31
DQ32
DQ33
DQ34
DQ35
DQ36
DQ37
DQ38
DQ39
DQ40
DQ41
DQ42
DQ43
DQ44
DQ45
DQ46
DQ47
DQ48
DQ49
DQ50
DQ51
DQ52
DQ53
DQ54
DQ55
DQ56
DQ57
DQ58
DQ59
DQ60
DQ61
DQ62
DQ63
VREF
VDDID
SCL
SDA
VDDQ15VDDQ22VDDQ30VDDQ54VDDQ62VDDQ77VDDQ96VDDQ
WP
SA0
SA1
SA2
VSS3VSS11VSS18VSS26VSS34VSS42VSS50VSS58VSS66VSS74VSS81VSS89VSS93VSS
DDR1
RMD0
2
RMD1
4
RMD2
6
RMD3
8
RMD4
94
RMD5
95
RMD6
98
RMD7
99
RMD8
12
RMD9
13
RMD10
19
RMD11
20
RMD12
105
RMD13
106
RMD14
109
RMD15
110
RMD16
23
RMD17
24
RMD18
28
RMD19
31
RMD20
114
RMD21
117
RMD22
121
RMD23
123
RMD24
33
RMD25
35
RMD26
39
RMD27
40
RMD28
126
RMD29
127
RMD30
131
RMD31
133
RMD32
53
RMD33
55
RMD34
57
RMD35
60
RMD36
146
RMD37
147
RMD38
150
RMD39
151
RMD40
61
RMD41
64
RMD42
68
RMD43
69
RMD44
153
RMD45
155
RMD46
161
RMD47
162
RMD48
72
RMD49
73
RMD50
79
RMD51
80
RMD52
165
RMD53
166
RMD54
170
RMD55
171
RMD56
83
RMD57
84
RMD58
87
RMD59
88
RMD60
174
RMD61
175
RMD62
178
RMD63
179
DDRVREF D DRVREF
1
82
90
92
SMBDAT SMBDAT
91
181
182
183
DIMM-D184-BK
REQUIRED POWER
VDD=VDDQ
VDD!=VDDQ
DDR
CS0
CS1
CS2
CS3
CS4
DQS0
DQS1
DQS2
DQS3
DQS4
DQS5
DQS6
DQS7
RCS-[0..3]8,12
CKE[0..3]8
104
112
128
136
143
156
164
172
180
108
VDD7VDD38VDD46VDD70VDD85VDD
120
VDD
148
VDD
168
VDD
184
48
43
41
130
37
32
125
29
122
27
141
118
115
103
59
52
113
97
107
119
129
149
159
169
177
140
5
14
25
36
56
67
78
86
47
44
45
49
51
134
135
142
144
9
10
101
102
173
167
154
65
63
157
158
71
163
21
111
137
16
76
138
17
75
VDDSPD
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10
A11
A12
A13
BA0
BA1
BA2
DM0
DM1
DM2
DM3
DM4
DM5
DM6
DM7
DM8
DQS0
DQS1
DQS2
DQS3
DQS4
DQS5
DQS6
DQS7
DQS8
CB0
CB1
CB2
CB3
CB4
CB5
CB6
CB7
NC
NC(RESET#)
NC
NC
NC
NC(FETEN)
RAS#
CAS#
WE#
S0#
S1#
NC(S2#)
NC(S3#)
CKE0
CKE1
CK0
CK1
CK2
CK0#
CK1#
CK2#
RMA0
RMA1
RMA2
RMA3
RMA4
RMA6
RMA7
RMA8
RMA9
RMA14
RMA15
RMA16
RMA11
RDQM0 RMD23
RDQM1 RMD24
RDQM2 RMD25
RDQM3 RMD26
RDQM4 RMD27
RDQM5 RMD28
RDQM6 RMD29
RDQM7 RMD30
RDQS0 RMD33
RDQS1 RMD34
RDQS2 RMD35
RDQS3 RMD36
RDQS4 RMD37
RDQS5 RMD38
RDQS6 RMD39
RDQS7 RMD40
RSRAS#
RSRAS#8,12
RSCAS#
RSCAS#8,12
RSWE#
RSWE#8,12
RCS-0
RCS-1
CKE0 WP CKE2
CKE1 SMBCLK CKE3 SMBCLK
DDRCLK13
DDRCLK23 DDRCLK33
DDRCLK-23 DDRCLK-33
RCS-[0..3]
CKE[0..3]
DDRCLK1
DDRCLK8
DDRCLK-1
DDRCLK-8
DDRCLK-2
VDDQ
VSS
VSS
VSS
VSS
VSS
VSS
VSS
124
132
139
145
152
160
176
116
VDDQ
VDDQ
VSS
100
VDDQ
VDDQ
addr =
1010000b
VDDQ
VDDQ
VDDQ
RMD[0..63]
RMA[0..16]
VCCMVCCM
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
DQ16
DQ17
DQ18
DQ19
DQ20
DQ21
DQ22
DQ23
DQ24
DQ25
DQ26
DQ27
DQ28
DQ29
DQ30
DQ31
DQ32
DQ33
DQ34
DQ35
DQ36
DQ37
DQ38
DQ39
DQ40
DQ41
DQ42
DQ43
DQ44
DQ45
DQ46
DQ47
DQ48
DQ49
DQ50
DQ51
DQ52
DQ53
DQ54
DQ55
DQ56
DQ57
DQ58
DQ59
DQ60
DQ61
DQ62
DQ63
VREF
VDDID
DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQ8
DQ9
SCL
SDA
WP
SA0
SA1
SA2
DDR2
VDDQ15VDDQ22VDDQ30VDDQ54VDDQ62VDDQ77VDDQ96VDDQ
2
4
6
8
94
95
98
99
12
13
19
20
105
106
109
110
23
24
28
31
114
117
121
123
33
35
39
40
126
127
131
133
53
55
57
60
146
147
150
151
61
64
68
69
153
155
161
162
72
73
79
80
165
166
170
171
83
84
87
88
174
175
178
179
1
82
90
92
91
181
182
183
VSS3VSS11VSS18VSS26VSS34VSS42VSS50VSS58VSS66VSS74VSS81VSS89VSS93VSS
DIMM-D184-BK
RMD0
RMD1
RMD2
RMD3
RMD4
RMD5
RMD6
RMD7
RMD8
RMD9
RMD10
RMD11
RMD12
RMD13
RMD14
RMD15
RMD16
RMD17
RMD18
RMD19
RMD20
RMD21
RMD22
RMD31
RMD32
RMD41
RMD42
RMD43
RMD44
RMD45
RMD46
RMD47
RMD48
RMD49
RMD50
RMD51
RMD52
RMD53
RMD54
RMD55
RMD56
RMD57
RMD58
RMD62
R187 4.7K
WP
DIMM DECOUPLING
VCCM
CB71
0.1u
CB16
X_0.1u
CB25
0.1u
CB57
0.1u
CB5
X_0.1u
CB21
0.1u
VCCM
SMBCLK 3,14,18,21,27,29
SMBDAT 3,14,18,21,27,29
VCCM
104
112
128
136
143
156
164
172
180
108
VDD7VDD38VDD46VDD70VDD85VDD
120
VDD
148
VDD
168
VDD
184
RMA0
RMA1
RMA2
RMA3
RMA4
RMA5RMA5
RMA6
RMA7
RMA8
RMA9
RMA10RMA10
RMA14
RMA15
RMA16
RMA11
RMA12RMA12
RDQM0
RDQM1
RDQM2
RDQM3
RDQM4
RDQM5
RDQM6
RDQM7
RDQS0
RDQS1
RDQS2
RDQS3
RDQS4
RDQS5
RDQS6
RDQS7
RSRAS# RMD59
RSCAS# RMD60
RSWE# RMD61
RCS-2 RMD63
RCS-3
DDRCLK03
DDRCLK73DDRCLK83
DDRCLK-03DDRCLK-13
DDRCLK-73DDRCLK-83
DDRCLK0
DDRCLK7
DDRCLK3DDRCLK2
DDRCLK-0
DDRCLK-7
DDRCLK-3
48
43
41
130
37
32
125
29
122
27
141
118
115
103
59
52
113
97
107
119
129
149
159
169
177
140
5
14
25
36
56
67
78
86
47
44
45
49
51
134
135
142
144
9
10
101
102
173
167
154
65
63
157
158
71
163
21
111
137
16
76
138
17
75
VDDSPD
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10
A11
A12
A13
BA0
BA1
BA2
DM0
DM1
DM2
DM3
DM4
DM5
DM6
DM7
DM8
DQS0
DQS1
DQS2
DQS3
DQS4
DQS5
DQS6
DQS7
DQS8
CB0
CB1
CB2
CB3
CB4
CB5
CB6
CB7
NC
NC(RESET#)
NC
NC
NC
NC(FETEN)
RAS#
CAS#
WE#
S0#
S1#
NC(S2#)
NC(S3#)
CKE0
CKE1
CK0
CK1
CK2
CK0#
CK1#
CK2#
VDDQ
VSS
VSS
VSS
VSS
VSS
VSS
VSS
124
132
139
145
152
160
176
VDDQ
VSS
116
VDDQ
VDDQ
addr =
1010001b
100
VDDQ
VDDQ
VDDQ
VDDQ
Micro-Star
Document Number
Last Revision Date:
5
4
3
2
Wednesday, September 21, 2005
Title
MS7159
DDR1 & DDR2
Sheet of
1
Rev
30
11 34
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