Page 1
5
4
3
2
1
MS-7144 VER:100
Page Title
Cover Sheet 1
*AMD PGA 754 K8-Processor (DDR 400)
D D
*VIA K8T800B / K8M800
*VIA VT8237R
(AGP 8X / VLink 8X)
*Winbond 83627THF LPC I/O
*8201CL 100/10 Bit LAN Support
*USB 2.0 support (integrated into VT8237R)
*ALC655 6 channel S/W Audio
*DDR DIMM * 2
C C
*AGP SLOT * 1 ( 8X )
*PCI SLOT * 4
B B
Block Diagram 2
GPIO SPEC
3
AMD K8 -> 754 PGA Socket 4,5,6
Clock Synthesizer (ICS950410AF)
System Memory
DDR I DIMM 1 & 2
DDR Terminations R & C
DDR Damping R & Bypass Cap.
NB VIA K8T800B/K8M800 (HT)
K8 Vcore Power
AGP SLOT 8X
VT8237R
PCI Connectors * 4
ALC655 6 channel S/W Audio
IDE ATA 66/100 Connectors * 2
Front and Rear USB Port
LPC I/O W83627THF& ROM & Floppy&Fan
KeyBoard/Mouse/LPT/COM Connectors
10/100 LAN & VGA
ACPI Power CONTROLLER (MS-6)
System Regulator&Front Panel
Decoupling Cap.
Power Generation
History
OPTION PARTS
7
8
9
10
11,12,13
14
15
16,17,18
19,20
21
22
23
24
25
26
27
28
29
30
31
32
A A
Micro Star Restricted Secret
Title
Document Number
MICRO-STAR INT'L CO.,LTD.
No. 69, Li-De St, Jung-He City,
Taipei Hsien, Taiwan
5
4
3
2
http://www.msi.com.tw
Cover Sheet
MS-7144
1
Last Revision Date:
Wednesday, March 02, 2005
Sheet
Rev
100
13 2
of
Page 2
5
Block Diagram
4
3
2
1
D D
CPUCLK+ & CPUCLK-(100/133/166/200)
AMD K8 Socket 754
HCLK+ & HCLK-(100/133/166/200) / GCLK(66)
DDR400
VIA
HT
VLINK
Dual ATA 100/133
IDE Slot
==>ATA66,100,133 *2
SYSTEM CLOCK
Synthesizer
C C
AGPCLK(66)
A
G
P
AGP 8X /Fast Write
S
L
O
T
K8T800B/K8M800
VCLK(66) / OSC(14) / PCISB(33) / USBCLK(48) / APICCLK(14)
PCICLK[1~4]
PCI-33
DDR I * 2
B B
A A
AC_14(14)
SIOPCLK(33)/SIO48M(48)
5
4 PCI Slots
AC97 => S/W Audio
ALC655 / 6 channel
AC97
SERIAL ATA *2
4
VT8237R
Dual USB 1.1 OHCI
/2.0 EHCI 8 Ports
==> Front-Port *4 ,
Back-Port *4
3
USB
LPC BUS
MII
10/100 LAN
RTL8201CL
SUPER I/O
W83627THF
2
LPC
BUS
ROM
Micro Star Restricted Secret
Title
Document Number
MICRO-STAR INT'L CO.,LTD.
No. 69, Li-De St, Jung-He City,
Taipei Hsien, Taiwan
http://www.msi.com.tw
1
Block Diagram
MS-7144
Last Revision Date:
Sheet
Rev
100
Wednesday, March 02, 2005
23 2
of
Page 3
5
4
3
2
1
GPIO FUNCTION
VT8237 GPIO Function Define
PIN NAME
D D
GPO0 (VSUS33)
GPO1/SUSA#(VSUS33)
GPO2/SUSB#(VSUS33)
GPO3/SUSST1#(VSUS33)
GPO4/SUSCLK(VSUS33)
GPO5/CPUSTP#
GPO6/PCISTP#
GPO7/SLP#
GPO8/GPI8/IPBIN0
GPO9/GPI9/IPBIN1
C C
GPO10/GPI10/IPBRDFR
GPO11/GPI11/IPBRDCK
GPO12/GPI12/INTE#
GPO13/GPI13/INTF#
GPO14/GPI14/INTG#
GPO15/GPI15/INTH#
GPO16/SA16/STRAP
GPO17/SA17/STRAP
GPO18/SA18/STRAP
GPO19/SA19/STRAP
B B
GPO20/GPI20
/ACSDIN2/PCS0#/EI
GPO21/GPI21/ACSDIN3
/PCS1#/SLPBTN#
GPO22/GPI22/IOR#
GPO23/GPI23/DPSLP
GPO24/GPI24/GPIOA
GPO25/GPI25/GPIOC
GPO26/GPI26/SMBDT2
(VSUS33)
GPO27/GPI27/SMBCK2
(VSUS33)
GPO28/GPI28/
VIDSEL
GPO29/GPI29/
A A
VRDSLP
GPO30/GPI30/GPIOD
GPO31/GPI31/GPIOE
5
NA
NA
SUSB#
SUSST#
NA (Exteranl Pull up to 3VDUAL)
NA (Exteranl Pull up to VCC3)
NA (Exteranl Pull up to VCC3)
LDTSTOP#
NA
NA
NA
NA
VSET0
VSET1
VSET2
NA
LDT Freq Strapping Bit0
LDT Freq Strapping Bit1
LDT Width (Low=8 Bit)
Fast Command (Low=Disable)
POWERF1
POWERF2
NA
ROMLOCK
NA
NA
SMBDATA2/Slave SMBUS
SMBCLK2/Slave SMBUS
NA
NA
NA
NA
PIN NAME
GPI0
GPI1
GPI2/EXTSMI#
GPI3/RING#
GPI4/LID#
GPI5/BATLOW#
NA
GPI6/AGPBZ#
GPI7/REQ#5
GPI16/INTRUDER#
GPI17/CPUMISS
NA
NA
NA
GPI18/AOLGP1/THRM#
GPI19/IORDY
S/IO GPIO Function Define
PIN NAME Function define
GPBX/GP13
GPAY/GP15
GPAS1/GP10
GPAS2/GP17
GPAX/GP12
GPBY/GP14
GPBS1/GP11
GPBS2/GP16
4
Function define Function define
(Exteranl Pull up to VBAT) NA
ATADET0=>Detect IDE1 ATA100/66
EXTSMI#
RING#
ATADET1=>Detect IDE2 ATA100/66
(Exteranl Pull up to 3VDUAL)
POWERF3
(Exteranl Pull up to 3VDUAL)
(Exteranl Pull up to VBAT)
(Exteranl Pull up to 3VDUAL)
THRM#
(Exteranl Pull up to VCC3) NA
LED#4
LED#2
LED1
LED4
LED#3
LED#1
LED2
LED3
3
PCI Routing
DEVICES
PCI SLOT 1
PCI SLOT 2
PCI SLOT 3
PCI SLOT 4
PCI SLOT 5
Giga-Bit
LAN
INT#
INT#A
INT#B
INT#C
INT#D
INT#B
INT#C
INT#D
INT#A
INT#C
INT#D
INT#A
INT#B
INT#D
INT#A
INT#B
INT#C
INT#B
INT#C
INT#D
INT#A
INT#A AD22 GLAN_PCLK
2
IDSEL
AD16
AD17
AD18
AD19
AD21
REQ#/GNT#
PREQ#6
PGNT#6
PREQ#3
PGNT#3
PREQ#4
PGNT#4
PREQ#7
PGNT#7
PREQ#8
PGNT#8
PREQ#1
PGNT#1
Micro Star Restricted Secret
Title
Document Number
MICRO-STAR INT'L CO.,LTD.
No. 69, Li-De St, Jung-He City,
Taipei Hsien, Taiwan
http://www.msi.com.tw
CLOCK
PCICLK1
PCICLK2
PCICLK3
PCICLK4
PCICLK5
GPIO Spec.
MS-7144
Last Revision Date:
Sheet
Wednesday, March 02, 2005
33 2
1
Rev
100
of
Page 4
5
4
3
2
1
VREF routed as 40~50 mils trace wide ,
Space>25 mils
C64
D D
C C
B B
A A
DDR_VREF 8
MD[63..0] 10
DM[7..0] 10
-MDQS[7..0] 10
R60 15R1%
R59 15R1%
5
VDD_25_SUS
Place near CPU in 1" ,
Routed => 5:10/Trace:Space ,
Same Length
C1000P50X
C52
MEMZN
MEMZP
X_C1000P50N
AE13
AG12
D14
C14
VTT_SENSE
MEMVREF1
MEMZN
MEMZP
U2B
VTT_A4
VTT_A1
VTT_A2
VTT_A3
VTT_B1
VTT_B2
VTT_B3
VTT_B4
MEMRESET_L
MEMCKEA
MD63
A16
B15
A12
B11
A17
A15
C13
A11
A10
C11
AC1
AC3
AC2
AD1
AE1
AE3
AG3
AJ4
AE2
AF1
AH3
AJ3
AJ5
AJ6
AJ7
AH9
AG5
AH5
AJ9
AJ10
AH11
AJ11
AH15
AJ15
AG11
AJ12
AJ14
AJ16
A13
AA1
AG1
AH7
AH13
A14
AB1
AJ2
AJ8
AJ13
B9
C7
A6
A9
A5
B5
C5
A4
E2
E1
A3
B3
E3
F1
G2
G1
L3
L1
G3
J2
L2
M1
W1
W3
W2
Y1
R1
A7
C2
H1
T1
A8
D1
J1
MEMDATA63
MEMDATA62
MEMDATA61
MEMDATA60
MEMDATA59
MEMDATA58
MEMDATA57
MEMDATA56
MEMDATA55
MEMDATA54
MEMDATA53
MEMDATA52
MEMDATA51
MEMDATA50
MEMDATA49
MEMDATA48
MEMDATA47
MEMDATA46
MEMDATA45
MEMDATA44
MEMDATA43
MEMDATA42
MEMDATA41
MEMDATA40
MEMDATA39
MEMDATA38
MEMDATA37
MEMDATA36
MEMDATA35
MEMDATA34
MEMDATA33
MEMDATA32
MEMDATA31
MEMDATA30
MEMDATA29
MEMDATA28
MEMDATA27
MEMDATA26
MEMDATA25
MEMDATA24
MEMDATA23
MEMDATA22
MEMDATA21
MEMDATA20
MEMDATA19
MEMDATA18
MEMDATA17
MEMDATA16
MEMDATA15
MEMDATA14
MEMDATA13
MEMDATA12
MEMDATA11
MEMDATA10
MEMDATA9
MEMDATA8
MEMDATA7
MEMDATA6
MEMDATA5
MEMDATA4
MEMDATA3
MEMDATA2
MEMDATA1
MEMDATA0
MEMDQS17
MEMDQS16
MEMDQS15
MEMDQS14
MEMDQS13
MEMDQS12
MEMDQS11
MEMDQS10
MEMDQS9
MEMDQS8
MEMDQS7
MEMDQS6
MEMDQS5
MEMDQS4
MEMDQS3
MEMDQS2
MEMDQS1
MEMDQS0
MEMORY INTERFACE
MD62
MD61
MD60
MD59
MD58
MD57
MD56
MD55
MD54
MD53
MD52
MD51
MD50
MD49
MD48
MD47
MD46
MD45
MD44
MD43
MD42
MD41
MD40
MD39
MD38
MD37
MD36
MD35
MD34
MD33
MD32
MD31
MD30
MD29
MD28
MD27
MD26
MD25
MD24
MD23
MD22
MD21
MD20
MD19
MD18
MD17 MAA3
MD16
MD15
MD14
MD13
MD12
MD11
MD10
MD9
MD8
MD7
MD6
MD5
MD4
MD3
MD2
MD1
MD0
DM7
DM6
DM5
DM4
DM3
DM2
DM1
DM0
-MDQS7
-MDQS6
-MDQS5
-MDQS4
-MDQS3
-MDQS2
-MDQS1
-MDQS0
MEMCKEB
MEMCLK_H7
MEMCLK_L7
MEMCLK_H6
MEMCLK_L6
MEMCLK_H5
MEMCLK_L5
MEMCLK_H4
MEMCLK_L4
MEMCLK_H3
MEMCLK_L3
MEMCLK_H2
MEMCLK_L2
MEMCLK_H1
MEMCLK_L1
MEMCLK_H0
MEMCLK_L0
MEMCS_L7
MEMCS_L6
MEMCS_L5
MEMCS_L4
MEMCS_L3
MEMCS_L2
MEMCS_L1
MEMCS_L0
MEMRASA_L
MEMCASA_L
MEMWEA_L
MEMBANKA1
MEMBANKA0
RSVD_MEMADDA15
RSVD_MEMADDA14
MEMADDA13
MEMADDA12
MEMADDA11
MEMADDA10
MEMADDA9
MEMADDA8
MEMADDA7
MEMADDA6
MEMADDA5
MEMADDA4
MEMADDA3
MEMADDA2
MEMADDA1
MEMADDA0
MEMRASB_L
MEMCASB_L
MEMWEB_L
MEMBANKB1
MEMBANKB0
RSVD_MEMADDB15
RSVD_MEMADDB14
MEMADDB13
MEMADDB12
MEMADDB11
MEMADDB10
MEMADDB9
MEMADDB8
MEMADDB7
MEMADDB6
MEMADDB5
MEMADDB4
MEMADDB3
MEMADDB2
MEMADDB1
MEMADDB0
MEMCHECK7
MEMCHECK6
MEMCHECK5
MEMCHECK4
MEMCHECK3
MEMCHECK2
MEMCHECK1
MEMCHECK0
4
D17
A18
B17
C17
AF16
AG16
AH16
AJ17
AG10
AE8
AE7
D10
C10
E12
E11
AF8
AG8
AF10
AE10
V3
V4
K5
K4
R5
P5
P3
P4
D8
C8
E8
E7
D6
E6
C4
E5
H5
D4
G5
K3
H3
E13
C12
E10
AE6
AF3
M5
AE5
AB5
AD3
Y5
AB4
Y3
V5
T5
T3
N5
H4
F5
F4
L5
J5
E14
D12
E9
AF6
AF4
M4
AD5
AC5
AD4
AA5
AB3
Y4
W5
U5
T4
M3
N3
N1
U3
V1
N2
P1
U1
U2
VTT_DDR_SUS
MEMCLK_H7
MEMCLK_L7
MEMCLK_H6
MEMCLK_L6
MEMCLK_H5
MEMCLK_L5
MEMCLK_H4
MEMCLK_L4
MEMCLK_H1
MEMCLK_L1
MEMCLK_H0
MEMCLK_L0
-MSRASA
-MSCASA
MAA13
MAA12
MAA11
MAA10
MAA9
MAA8
MAA7
MAA6
MAA5
MAA4
MAA2
MAA1
MAA0
MAB13
MAB12
MAB11
MAB10
MAB9
MAB8
MAB7
MAB6
MAB5
MAB4
MAB3
MAB2
MAB1
MAB0
MCKE0
MCKE1
-MCS3
-MCS2
-MCS1
-MCS0
MCKE0 8,9
MCKE1 8,9
MEMCLK_H7 8,9
MEMCLK_L7 8,9
MEMCLK_H6 8,9
MEMCLK_L6 8,9
MEMCLK_H5 8,9
MEMCLK_L5 8,9
MEMCLK_H4 8,9
MEMCLK_L4 8,9
MEMCLK_H1 8,9
MEMCLK_L1 8,9
MEMCLK_H0 8,9
MEMCLK_L0 8,9
-MCS3 8,9
-MCS2 8,9
-MCS1 8,9
-MCS0 8,9
-MSRASA 8,9
-MSCASA 8,9
-MSWEA 8,9
MEMBANKA1 8,9
MEMBANKA0 8,9
MAA[13..0] 8,9
-MSRASB 8,9
-MSCASB 8,9
-MSWEB 8,9
MEMBAKB1 8,9
MEMBAKB0 8,9
MAB[13..0] 8,9
CADIP[0..15] 11
CLKIP1 11
CLKIN1 11
CLKIP0 11
CLKIN0 11
VLDT0
R21 49.9R1%
CTLIP0 11
CTLIN0 11
3
R28 49.9R1%
VDD_12_A
X_C0.22U16Y
VDD_12_A
CADIN15
CADIN14
CADIN13
CADIN12
CADIN11
CADIN10
CADIN9
CADIN8
CADIN7
CADIN6
CADIN5
CADIN4
CADIN3
CADIN2
CADIN1
CADIN0
C156
CADIP15
CADIP14
CADIP13
CADIP12
CADIP11
CADIP10
CADIP9
CADIP8
CADIP7
CADIP6
CADIP5
CADIP4
CADIP3
CADIP2
CADIP1
CADIP0
CTLIP1
CTLIN1
C0.22U16Y
C186
D29
D27
D25
C28
C26
B29
B27
T25
R25
U27
U26
V25
U25
W27
W26
AA27
AA26
AB25
AA25
AC27
AC26
AD25
AC25
T27
T28
V29
U29
V27
V28
Y29
W29
AB29
AA29
AB27
AB28
AD29
AC29
AD27
AD28
Y25
W25
Y27
Y28
R27
R26
T29
R29
C0.22U16Y
U2A
N12-7540031-L06
VLDT0_A6
VLDT0_A5
VLDT0_A4
VLDT0_A3
VLDT0_A2
VLDT0_A1
VLDT0_A0
L0_CADIN_H15
L0_CADIN_L15
L0_CADIN_H14
L0_CADIN_L14
L0_CADIN_H13
L0_CADIN_L13
L0_CADIN_H12
L0_CADIN_L12
L0_CADIN_H11
L0_CADIN_L11
L0_CADIN_H10
L0_CADIN_L10
L0_CADIN_H9
L0_CADIN_L9
L0_CADIN_H8
L0_CADIN_L8
L0_CADIN_H7
L0_CADIN_L7
L0_CADIN_H6
L0_CADIN_L6
L0_CADIN_H5
L0_CADIN_L5
L0_CADIN_H4
L0_CADIN_L4
L0_CADIN_H3
L0_CADIN_L3
L0_CADIN_H2
L0_CADIN_L2
L0_CADIN_H1
L0_CADIN_L1
L0_CADIN_H0
L0_CADIN_L0
L0_CLKIN_H1
L0_CLKIN_L1
L0_CLKIN_H0
L0_CLKIN_L0
L0_CTLIN_H1
L0_CTLIN_L1
L0_CTLIN_H0
L0_CTLIN_L0
X_C0.22U16Y
C155
C166
HYPER TRANSPORT - LINK0
2
C174
C0.22U16Y
L0_CADOUT_H15
L0_CADOUT_H14
L0_CADOUT_H13
L0_CADOUT_H12
L0_CADOUT_H11
L0_CADOUT_H10
C256
C0.22U16Y
VLDT0_B6
VLDT0_B5
VLDT0_B4
VLDT0_B3
VLDT0_B2
VLDT0_B1
VLDT0_B0
L0_CADOUT_L15
L0_CADOUT_L14
L0_CADOUT_L13
L0_CADOUT_L12
L0_CADOUT_L11
L0_CADOUT_L10
L0_CADOUT_H9
L0_CADOUT_L9
L0_CADOUT_H8
L0_CADOUT_L8
L0_CADOUT_H7
L0_CADOUT_L7
L0_CADOUT_H6
L0_CADOUT_L6
L0_CADOUT_H5
L0_CADOUT_L5
L0_CADOUT_H4
L0_CADOUT_L4
L0_CADOUT_H3
L0_CADOUT_L3
L0_CADOUT_H2
L0_CADOUT_L2
L0_CADOUT_H1
L0_CADOUT_L1
L0_CADOUT_H0
L0_CADOUT_L0
L0_CLKOUT_H1
L0_CLKOUT_L1
L0_CLKOUT_H0
L0_CLKOUT_L0
L0_CTLOUT_H1
L0_CTLOUT_L1
L0_CTLOUT_H0
L0_CTLOUT_L0
Title
Document Number
MICRO-STAR INT'L CO.,LTD.
No. 69, Li-De St, Jung-He City,
Taipei Hsien, Taiwan
http://www.msi.com.tw
C167
C0.22U16Y
VLDT0
AH29
AH27
AG28
AG26
AF29
AE28
AF25
CADOP15
N26
CADON15
N27
CADOP14
L25
CADON14
M25
CADOP13
L26
CADON13
L27
CADOP12
J25
CADON12
K25
CADOP11
G25
CADON11
H25
CADOP10
G26
CADON10
G27
CADOP9
E25
CADON9
F25
CADOP8
E26
CADON8
E27
CADOP7
N29
CADON7
P29
CADOP6
M28
CADON6
M27
CADOP5
L29
CADON5
M29
CADOP4
K28
CADON4
K27
CADOP3
H28
CADON3
H27
CADOP2
G29
CADON2
H29
CADOP1
F28
CADON1
F27
CADOP0
E29
CADON0
F29
CLKOP1
J26
J27
J29
K29
N25
P25
P28
P27
CLKON1
CLKOP0
CLKON0
CTLOP0
CTLON0
CLKOP1 11
CLKON1 11
CLKOP0 11
CLKON0 11
CTLOP0 11
CTLON0 11
Micro Star Restricted Secret
K8 DDR & HT
MS-7144
Last Revision Date:
Sheet
1
VLDT0 5
C58
C4.7U10Y0805
CADOP[0..15] 11
CADON[0..15] 11 CADIN[0..15] 11
Rev
100
Wednesday, March 02, 2005
43 2
of
Page 5
5
D D
4
C53
X_C1000P50N
VDDIO_SENSE
3
VCCA_PLL trace length from the VR1 to the
PGA must be 0.75".
2
1
Place al filters close to the PGA.
Keep all power and signal trce away from
the VR1.
Place a cut in the GND plane around the
VCCA_PLL regulator circuit.
VDDA_25
VDDA_25
C C
-LDTSTOP
R22
1KR
VLDT0 4
Place near CPU in 1" ,
Routed => 5:10/Trace:Space ,
Same Length
HDT Test Port Signal .
B B
DBREQ_L
DBRDY
TCK
TMS
TDI
TRST_L
NC_AH18
NC_AJ18
NC_AG18
A A
NC_AG17
NC_D18
NC_B19
NC_C19
NC_D20
5
R23 X_1KR
R24 X_1KR
1 2
3 4
5 6
7 8
RN50 X_8P4R-1KR
1 2
3 4
5 6
7 8
1 2
3 4
5 6
7 8
VDDA_25
C51
C4.7U10Y0805
RN20
8P4R-1KR
8P4R-1KR
RN47
LAYOUT: Route VDDA trace approx. 50 mils wide (use 2x25 mil
traces to exit ball field) and 500 mils long.
C60
C1000P50X
NC_C18
NC_A19
NC_C21
TDO
CPU_VDDA_25
C63
X_C1000P50N
VDD_25_SUS
1 2
3 4
5 6
7 8
C59
C1000P50X
VDDA_25 VDD_25_SUS
Differential , "10:10:5:10:10" .
Near CPU in 0.5" .
8P4R-1KR
RN54
C4.7U10Y0805
-CPURST 28
-LDTSTOP 11,18
COREFB_H 14
COREFB_L 14
CPUCLK0_H 7
CPUCLK0_L 7
3
C73
VTT_DDR_SUS
FB1 300L700m_250_0805
CPU_GD 27
VLDT0
R20 44.2R1%
R19 44.2R1%
4
C61
C0.22U16Y
CPU_GD
L0_REF1
L0_REF0
C67 C0.039U16X
C66 C0.039U16X
VDDIO_SENSE
169R1%
R31
R26 820R
R29 820R
5 6
7 8
C71
C1000P50X
RN18
X_8P4R-1KR
1 2
3 4
CLKIN_H
CLKIN_L
NC_AJ23
NC_AH23
DBRDY
TMS
TCK
TRST_L
TDI
NC_C18
NC_A19
NC_AE23
NC_AF23
NC_AF22
NC_AF21
AH25
AJ25
AF20
AE18
AJ27
AF27
AE26
AE12
AF12
AE11
AJ21
AH21
AJ23
AH23
AE24
AF24
C16
AG15
AH17
C15
E20
E17
B21
A21
C18
A19
A28
AJ28
AE23
AF23
AF22
AF21
AA2
AG2
B18
AH1
AE21
C20
AG4
AG6
AE9
AG9
A23
A24
B23
C1
R3
D3
C6
VDDA1
VDDA2
RESET_L
PWROK
LDTSTOP_L
L0_REF1
L0_REF0
COREFB_H
COREFB_L
CORE_SENSE
VDDIOFB_H
VDDIOFB_L
VDDIO_SENSE
CLKIN_H
CLKIN_L
NC_AJ23
NC_AH23
NC_AE24
NC_AF24
VTT_A5
VTT_B5
DBRDY
NC_C15
TMS
TCK
TRST_L
TDI
NC_C18
NC_A19
KEY1
KEY0
NC_AE23
NC_AF23
NC_AF22
NC_AF21
FREE29
J3
FREE31
FREE33
FREE35
FREE1
FREE37
FREE4
FREE38
FREE41
FREE7
FREE11
FREE12
FREE13
FREE14
FREE40
THERMDC_CPU
FB2
X_120S/0603
U2C
THERMTRIP_L
THERMDA
THERMDC
VID4
VID3
VID2
VID1
VID0
NC_AG18
NC_AH18
NC_AG17
NC_AJ18
G_FBCLKOUT_H
G_FBCLKOUT_L
DBREQ_L
NC_D20
NC_C21
NC_D18
NC_C19
NC_B19
TDO
NC_AF18
RSVD_SCL
RSVD_SDA
FREE26
FREE28
FREE30
FREE32
FREE34
FREE36
FREE10
FREE18
FREE19
FREE42
FREE24
FREE25
FREE27
2
THRM#
A20
THERMDA_CPU
A26
THERMDC_CPU
A27
VID4
AG13
AF14
AG14
AF15
AE15
AG18
AH18
AG17
AJ18
AH19
AJ19
AE19
D20
C21
D18
C19
B19
A22
VID4 14
VID3
VID3 14
VID2
VID2 14
VID1
VID1 14
VID0
VID0 14
NC_AG18
NC_AH18
NC_AG17
NC_AJ18
FBCLKOUT_H
R30
80.6R1%
FBCLKOUT_L
Zdiff = 80 ohm
DBREQ_L
NC_D20
NC_C21
NC_D18
NC_C19
NC_B19
TDO
AF18
D22
C22
B13
B7
C3
K1
R2
AA3
F3
C23
AG7
AE22
C24
A25
C9
Micro Star Restricted Secret
Title
Document Number
MICRO-STAR INT'L CO.,LTD.
No. 69, Li-De St, Jung-He City,
Taipei Hsien, Taiwan
http://www.msi.com.tw
THRM# 27
THERMDA_CPU 24
THERMDC_CPU 24
LAYOUT: Route
FBCLKOUT_H/L differentially
with 20/8/5/8/20 spacing and
trace width. ( In CPU
breakout => routed 5:5:5 )
K8 HDT & MISC
MS-7144
Last Revision Date:
Wednesday, March 02, 2005
Sheet
53 2
1
of
Rev
100
Page 6
5
U2E
B2
VSS1
AH20
VSS3
AB21
VSS4
W22
VSS5
M23
VSS6
L24
VSS7
AG25
VSS8
AG27
VSS9
AA8
AB9
AA10
AE16
G20
W20
AA20
AC20
AE20
AG20
AJ20
M21
AD21
AG21
G22
AG29
AA22
AC22
AG22
AH22
AJ22
AB23
AD23
AG23
G24
W24
AA24
AC24
AG24
AJ24
M26
AD26
AF26
AH26
G28
AB17
AD17
G18
AA18
AC18
AB19
AD19
AF19
D2
VSS10
AF2
VSS11
W6
VSS12
Y7
VSS13
VSS14
VSS15
VSS16
J12
VSS17
B14
VSS18
Y15
VSS19
VSS20
J18
VSS21
VSS22
R20
VSS23
U20
VSS24
VSS25
VSS26
VSS27
VSS28
VSS29
VSS30
D21
VSS31
F21
VSS32
H21
VSS33
K21
VSS34
VSS35
P21
VSS36
T21
VSS37
V21
VSS38
Y21
VSS39
VSS40
VSS41
B22
VSS42
E22
VSS43
VSS44
J22
VSS45
L22
VSS46
N22
VSS47
R22
VSS48
U22
VSS49
VSS50
VSS51
VSS52
VSS53
VSS54
VSS55
D23
VSS56
F23
VSS57
H23
VSS58
K23
VSS59
P23
VSS60
T23
VSS61
V23
VSS62
Y23
VSS63
VSS64
VSS65
VSS66
E24
VSS67
VSS68
J24
VSS69
N24
VSS70
R24
VSS71
U24
VSS72
VSS73
VSS74
VSS75
VSS76
VSS77
B25
VSS78
C25
VSS79
B26
VSS80
D26
VSS81
H26
VSS82
VSS83
T26
VSS84
Y26
VSS85
VSS86
VSS87
VSS88
C27
VSS89
B28
VSS90
D28
VSS91
VSS92
F15
VSS187
H15
VSS188
VSS206
VSS207
B16
VSS208
VSS209
VSS210
VSS211
D19
VSS212
F19
VSS213
H19
VSS214
K19
VSS215
Y19
VSS216
VSS217
VSS218
VSS219
J20
VSS220
L20
VSS221
N20
VSS222
GROUND
5
D D
C C
B B
A A
VSS93
VSS94
VSS95
VSS96
VSS97
VSS98
VSS99
VSS100
VSS101
VSS102
VSS103
VSS104
VSS105
VSS106
VSS107
VSS108
VSS109
VSS110
VSS111
VSS112
VSS113
VSS114
VSS115
VSS116
VSS117
VSS118
VSS119
VSS120
VSS121
VSS122
VSS123
VSS124
VSS125
VSS126
VSS127
VSS128
VSS129
VSS130
VSS131
VSS132
VSS133
VSS134
VSS135
VSS136
VSS137
VSS138
VSS139
VSS140
VSS141
VSS142
VSS143
VSS144
VSS145
VSS146
VSS147
VSS148
VSS149
VSS150
VSS151
VSS152
VSS153
VSS155
VSS156
VSS157
VSS158
VSS159
VSS160
VSS161
VSS162
VSS163
VSS164
VSS165
VSS166
VSS167
VSS168
VSS169
VSS170
VSS171
VSS172
VSS173
VSS174
VSS175
VSS176
VSS177
VSS178
VSS179
VSS180
VSS181
VSS182
VSS183
VSS184
VSS185
VSS186
VSS189
VSS190
VSS191
VSS192
VSS194
VSS195
VSS196
VSS197
VSS198
VSS199
VSS223
VSS201
VSS202
VSS203
VSS204
VSS205
L28
R28
W28
AC28
AF28
AH28
C29
F2
H2
K2
M2
P2
T2
V2
Y2
AB2
AD2
AH2
B4
AH4
B6
G6
J6
L6
N6
R6
U6
AA6
AC6
AH6
F7
H7
K7
M7
P7
T7
V7
AB7
AD7
B8
G8
J8
L8
N8
R8
U8
W8
AC8
AH8
F9
H9
K9
M9
P9
T9
V9
Y9
AD9
B10
G10
J10
L10
N10
R10
U10
W10
AC10
AH10
F11
H11
K11
Y11
AB11
AD11
B12
G12
AA12
AC12
AH12
F13
H13
K13
Y13
AB13
AD13
AF17
G14
J14
AA14
AC14
AE14
D16
E15
K15
AB15
AD15
AH14
E16
G16
J16
AA16
AC16
AE29
AJ26
E18
F17
H17
K17
Y17
VCORE
AC15
AB14
AA15
AB16
AA17
AC17
AE17
AB18
AD18
AG19
AC19
AA19
AB20
AD20
W21
AA21
AC21
AB22
AD22
W23
AA23
AC23
AB24
AD24
AH24
AE25
GND GND
H18
B20
E21
H22
H24
F26
V10
G13
K14
Y14
G15
H16
K16
Y16
G17
F18
K18
Y18
E19
G19
F20
H20
K20
M20
P20
T20
V20
Y20
G21
N21
R21
U21
F22
K22
M22
P22
T22
V22
Y22
E23
G23
N23
R23
U23
B24
D24
F24
K24
M24
P24
T24
V24
Y24
K26
P26
V26
U2D
L7
VDD1
VDD2
VDD3
VDD4
VDD5
VDD6
J23
VDD7
VDD8
VDD9
N7
VDD10
L9
VDD11
VDD12
VDD13
VDD14
VDD15
VDD16
VDD17
J15
VDD18
VDD19
VDD20
VDD21
VDD22
VDD23
VDD24
J17
VDD25
VDD26
VDD27
VDD28
VDD29
VDD30
VDD31
VDD32
VDD33
VDD34
VDD35
VDD36
VDD39
VDD38
J19
VDD37
VDD40
VDD41
VDD42
VDD43
VDD44
VDD45
VDD46
VDD47
VDD48
VDD49
VDD50
J21
VDD51
L21
VDD52
VDD53
VDD54
VDD55
VDD56
VDD57
VDD58
VDD59
VDD60
VDD61
VDD62
VDD63
VDD64
VDD65
VDD66
VDD67
VDD68
VDD69
L23
VDD70
VDD71
VDD72
VDD73
VDD74
VDD75
VDD76
VDD77
VDD78
VDD79
VDD80
VDD81
VDD82
VDD83
VDD84
VDD85
VDD86
VDD87
VDD88
VDD89
VDD90
VDD91
VDD92
POWER
VDDIO1
VDDIO2
VDDIO3
VDDIO4
VDDIO5
VDDIO7
VDDIO8
VDDIO9
VDDIO10
VDDIO11
VDDIO12
VDDIO13
VDDIO14
VDDIO15
VDDIO16
VDDIO17
VDDIO18
VDDIO19
VDDIO20
VDDIO21
VDDIO22
VDDIO23
VDDIO24
VDDIO25
VDDIO26
VDDIO27
VDDIO28
VDDIO29
VDDIO30
VDDIO31
VDDIO32
VDDIO33
VDDIO34
VDDIO35
VDDIO36
VDDIO37
VDDIO38
VDDIO39
VDDIO40
VDDIO41
VDDIO42
VDDIO43
VDDIO44
VDDIO45
VDDIO46
VDDIO47
VDDIO48
VDDIO49
VDDIO50
VDDIO6
VDD96
VDD97
VDD98
VDD99
VDD100
VDD101
VDD102
VDD103
VDD104
VDD105
VDD106
VDD107
VDD108
VDD109
VDD110
VDD111
VDD112
VDD113
VDD114
VDD115
VDD116
VDD117
VDD118
VDD119
VDD120
VDD121
VDD122
VDD123
VDD124
VDD125
VDD126
VDD127
VDD128
VDD129
VDD130
VDD131
VDD132
VDD133
VDD93
VDD94
VDD95
4
VDD_25_SUS
E4
G4
J4
L4
N4
U4
W4
AA4
AC4
AE4
D5
AF5
F6
H6
K6
M6
P6
T6
V6
Y6
AB6
AD6
D7
G7
J7
AA7
AC7
AF7
F8
H8
AB8
AD8
D9
G9
AC9
AF9
F10
AD10
D11
AF11
F12
AD12
D13
AF13
F14
AD14
F16
AD16
D15
R4
N28
U28
AA28
AE27
R7
U7
W7
K8
M8
P8
T8
V8
Y8
J9
N9
R9
U9
W9
AA9
H10
K10
M10
P10
T10
Y10
AB10
G11
J11
AA11
AC11
H12
K12
Y12
AB12
J13
AA13
AC13
H14
AB26
E28
J28
4
VCORE
3
LAYOUT: Place 6 EMI caps along bottom right side of Clawhammer,
2 in middle of HT link, and 12 along bottom left side of
Claw-hammer.
VCORE
C72
C428
C436
C70
X_C6.8P50N
C46
C114
C8.2P50N
C110
C0.22U16Y
<nopop>
X_C6.8P50N
C99
X_C0.22U16Y
X_C0.22U16Y
C122
C115
C8.2P50N
X_C6.8P50N
GND
C111
C0.22U16Y
C125
X_C0.22U16Y
C123
C0.22U16Y
X_C6.8P50N
C178
C4.7U10Y0805
Place between DIMN1 & 2
VDD_25_SUS
C138
C147
C0.1U50Y
C0.1U50Y
VDD_25_SUS
C91
C56
<nopop>
C1U10Y
C429
<nopop>
X_C1U10Y
C102
C0.1U50Y
<nopop>
X_C6.8P50N
C140
C0.1U50Y
X_C1U10Y
C142
C0.1U50Y
GND
C437
C432
LAYOUT: Place beside processor.
C33
C152
C160
<nopop>
C1U10Y
C105
C0.22U16Y
C106
C180P50N
C1000P50X
C109
C180P50N
C129
C180P50N
3
C4.7U10Y0805
VCORE
C4.7U10Y0805
In CPU.
C1U16Y0805
C159
C134
C0.22U16Y
C126
X_C0.22U16Y
X_C1U16Y0805
C164
2
VDD_25_SUS VTT_DDR_SUS
C154
C197
C176
C1U10Y
C0.22U16Y
X_C1U16Y0805
GND
C108
C0.22U16Y
C135
C8.2P50N
2
C85
X_C0.22U16Y
<nopop>
C0.22U16Y
C435
C1U10Y
VTT_DDR_SUS
C424
X_C0.1U50Y
VDD_25_SUS
C431
C426
C1U10Y
BACK
GND
C425
X_C0.1U50Y
GND
Micro Star Restricted Secret
Title
Document Number
MICRO-STAR INT'L CO.,LTD.
No. 69, Li-De St, Jung-He City,
Taipei Hsien, Taiwan
http://www.msi.com.tw
C1U10Y
K8 POWER & GND
MS-7144
1
VDD_25_SUS VCORE
C563
C0.1U50Y
Last Revision Date:
Sheet
1
Rev
100
Wednesday, March 02, 2005
of
63 2
Page 7
5
Clock Synthesizer
D D
U9
CLKVCC3
C285 C0.1U50Y
CLKVCC3
CLKVCC3
C287 C0.1U50Y
CLKVCC3
C288 X_C0.1U50Y
CLKVCC3
C290 C0.1U50Y
CLKVCC3
C310 C0.1U50Y
CLKVCC3
CLKVCC3
C311 C0.1U50Y
CLKVCC3
C312 C0.1U50Y
CLKVDDA
C286 C0.1U50Y
CLKVCC3
R151 10KR
C C
ICS950410AF_SSOP48
46
VDDREF
47
GND
2
VDDHTT
5
GND
9
VDDPCI
10
GND
16
VDDPCI
15
GND
19
VDDPCI
20
GND
28
AVDD48
29
GND
40
VDDCPU
37
GND
36
VDDCPU
33
GND
44
VDDA
43
GND
31
PD#
32
Turbo#
FS0/REF0
FS1/REF1
RESET#
XIN
XOUT
ModeA/HTT66_0
ModeB/PCI33_8/HTT66_1
PCI33_9/HT66_2
PCI33_11/HT66_3
FS2/PCI33_10
PCI33_0
PCI33_1
PCI33_2
PCI33_3
PCI33_4
PCI33_5
PCI33_6
PCI33_7
FS3/48M
24_48MHZ/SEL
SDATA
SCLK
CPUCLK8T0
CPUCLK8C0
CPUCLK8T1
CPUCLK8C1
CPUCLK8T2
CPUCLK8C2
1
48
45
3
4
6
7
8
11
12
13
14
17
18
21
22
23
24
30
27
26
25
42
41
39
38
35
34
4
FS0
FS1
CLKX1
CLKX2
MODEA
MODEB
FS2
SEL_24 USBCLK_SB
SMBDATA1
SMBCLK1
R135 33R
R150 33R
R126 X_33R
For K8M800
7 8
5 6
3 4
RN69 8P4R-22R
1 2
7 8
5 6
3 4
RN70 8P4R-22R
1 2
7 8
5 6
3 4
1 2
RN71 8P4R-22R
R127 33R
R141 33R
R137 15R1%
R138 15R1%
R139 15R1%
R140 15R1%
For K8T800 Pro
AC_14
APICCLK
GUICLK
C308 C27P50N
Y2 14.318MHZ32P_D
C305 C27P50N
VCLK
GCLK_NB
GCLK_SLOT
SIOPCLK
LPC_PCLK
PCICLK5
PCICLK4
PCICLK3
PCICLK1
PCICLK2
SBPCLK
SIO48M FS3
CPUCLK0_H
CPUCLK0_L
HCLK+
HCLK-
CPUCLK0_H 5
CPUCLK0_L 5
HCLK+ 11
HCLK- 11
AC_14 21
APICCLK 17,18
GUICLK 12
CLK_RESET# 27,28
VCLK 18
GCLK_NB 12
GCLK_SLOT 15
SIOPCLK 24
LPC_PCLK 24
PCICLK5 20
PCICLK4 20
PCICLK3 20
PCICLK1 19
PCICLK2 19
SBPCLK 18
SIO48M 24
USBCLK_SB 16
SMBDATA1 8,17,27
SMBCLK1 8,17,27
3
VCLK
C322 C10P50N
GCLK_NB
C323 C10P50N
GCLK_SLOT
C324 C10P50N
SIO48M
USBCLK_SB
AC_14
APICCLK
GUICLK
FS1
C279 C10P50N
C280 C10P50N
C284 X_C10P50N
C321 X_C10P50N
C274 X_C10P50N
C294 X_C10P50N
For K8M800
SIOPCLK
LPC_PCLK
PCICLK5
PCICLK4
PCICLK3
PCICLK1
PCICLK2
SBPCLK
HCLK+
HCLK-
CN10
7 8
5 6
3 4
1 2
8P4C-10P50N
CN11
7 8
5 6
3 4
1 2
8P4C-10P50N
C277 C10P50N
C278 C10P50N
For K8T800 Pro
2
ICS950410AF
Strapping CPU
FS0 FS2 FS3
FS1
0000
000
00 0
00
00 0
00
00
0
***
1
11
11
11 1
11
11 1
1
11
1
11
11
111
000
00
00
0
00
0
111
1111
ModeA ModeB
***
00
01
10
11
HTTCLK0
ModeA In
PCICLK7 PCICLK8 PCICLK9 PCICLK10
ModeA In
MHz
100.90
133.90
1
168.00
202.00
100.20
133.50
166.70
200.40
150.00
180.00
210.00
240.00
270.00
233.33
266.67
0
300.00
Pin6 Pin7
HTTCLK1 HTTCLK2 PCICLK10
HTTCLK1 HTTCLK2 HTTCLK3
PCICLK8 PCICLK9 PCICLK10
HTT
MHz
PCI
MHz
67.27 33.63
66.95
67.20
67.33
66.80
66.75
66.68
66.80
60.00
60.00
70.00
60.00
67.50
66.67
66.67
75.00
33.48
33.60
33.67
33.40
33.38
33.34
33.40
33.00
33.00
35.00
30.00
33.75
33.33
33.33
37.50
Pin8 Pin11
1
"FS0~FS3" are all internal
pull-up via 100K ohm ..
FS0
FS2
FS1
FS3
ModeA,B=0:0 ( Set Pin 7,8 clock
-> 66 MHz Pin11->33Mhz )
MODEB
MODEA
"24_48MHZ/SEL" Freq.-Out select
pin => Low->48MHz , Hi->24MHz .
( Internal pull-up via 100K ohm )
SEL_24
R149 10KR
R152 10KR
R136 10KR
R128 10KR
R166 10KR
R165 10KR
R142 10KR
CLKVCC3
VCC3
FB14 X_120S/0805
B B
CP10
X_COPPER
For EMI
VCC3 VCC
C364 C0.1U50Y
A A
CLKVDDA
C281
C1U16Y0805
C295
X_C0.1U50Y
VCC3
C291
C0.1U50Y
FB15 X_120S/0805
CP11
X_COPPER
C301
C1U16Y0805
CLKVCC3
C289
C0.1U50Y
VCC3
Decoupling Cap for CPU Clock
CPUCLK0_H
CPUCLK0_L
C309 C0.1U50Y
Near CK-Gen in 0.5" .
C275 C8.2P50N
C276 C8.2P50N
Micro Star Restricted Secret
Title
Document Number
MICRO-STAR INT'L CO.,LTD.
No. 69, Li-De St, Jung-He City,
Taipei Hsien, Taiwan
5
4
3
2
http://www.msi.com.tw
Clock Synthesizer
MS-7144
Last Revision Date:
Sheet
1
Wednesday, March 02, 2005
73 2
Rev
100
of
Page 8
5
VDD_25_SUS
4
SYSTEM MEMORY
3
2
VDD_25_SUS
1
156
164
VDDQ11
VDDQ12
VSS17
VSS18
139
145
172
VDDQ13
PIN
VSS19
152
180
160
82
15
VDDQ14
VDDQ15
A10_AP
CK0(DU)
CK0#(DU)
CK1(CK0)
CK1#(CK0#)
CK2(DU)
CK2#(DU)
NC(RESET#)
VSS20
VSS21
DDR1
DIMM-184_green
176
N13-1840061-K06
VDDID
CS0#
CS1#
CS2#
CS3#
DQS0
DQS1
DQS2
DQS3
DQS4
DQS5
DQS6
DQS7
DQS8
FETEN
A11
A12
A13
BA0
BA1
BA2
SCL
SDA
SA0
SA1
SA2
CB0
CB1
CB2
CB3
CB4
CB5
CB6
CB7
NC5
CKE0
CKE1
CAS#
RAS#
DM0
DM1
DM2
DM3
DM4
DM5
DM6
DM7
DM8
VDDSPD
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
108
120
148
168
VDD07VDD138VDD246VDD370VDD485VDD5
VDD6
VDD7
VDD8
-MCS0
157
-MCS1
158
71
163
-DR_MDQS0
5
-DR_MDQS1
14
-DR_MDQS2
25
-DR_MDQS3
36
-DR_MDQS4
56
-DR_MDQS5
67
-DR_MDQS6
78
-DR_MDQS7
86
47
103
MAA0
48
MAA1
43
MAA2
41
MAA3
130
MAA4
37
MAA5
32
MAA6
125
MAA7
29
MAA8
122
MAA9
27
MAA10
141
MAA11
118
MAA12 MAB12
115
MAA13
167
59
52
113
SMBCLK1
92
SMBDATA1
91
181
182
183
44
45
49
51
134
135
142
144
MEMCLK_H5
16
MEMCLK_L5
17
MEMCLK_H0
137
MEMCLK_L0
138
MEMCLK_H7
76
MEMCLK_L7
75
173
10
MCKE0
21
MCKE1
111
-MSCASA
65
-MSRASA
154
DR_DM0
97
DR_DM1
107
DR_DM2
119
DR_DM3
129
DR_DM4
149
DR_DM5
159
DR_DM6
169
DR_DM7
177
140
-MCS0 4,9
-MCS1 4,9
-DR_MDQS0 9,10
-DR_MDQS1 9,10
-DR_MDQS2 9,10
-DR_MDQS3 9,10
-DR_MDQS4 9,10
-DR_MDQS5 9,10
-DR_MDQS6 9,10
-DR_MDQS7 9,10
MAA[13..0]
MEMBANKA0 4,9
MEMBANKA1 4,9
SMBCLK1 7,17,27
SMBDATA1 7,17,27
MEMCLK_H5 4,9
MEMCLK_L5 4,9
MEMCLK_H0 4,9
MEMCLK_L0 4,9
MEMCLK_H7 4,9
MEMCLK_L7 4,9
MCKE0 4,9
MCKE1 4,9
-MSCASA 4,9
-MSRASA 4,9
MAA[13..0] 4,9
VDD_25_SUS
-MSWEB 4,9
R74 4.7KR
DDR_VREF
DR_MD0
DR_MD1
DR_MD2
DR_MD3
DR_MD4
DR_MD5
DR_MD6
DR_MD7
DR_MD8
DR_MD9
DR_MD10
DR_MD11
DR_MD12
DR_MD13
DR_MD14
DR_MD15
DR_MD16
DR_MD17
DR_MD18
DR_MD19
DR_MD20
DR_MD21
DR_MD22
DR_MD23
DR_MD24
DR_MD25
DR_MD26
DR_MD27
DR_MD28
DR_MD29
DR_MD30
DR_MD31
DR_MD32
DR_MD33
DR_MD34
DR_MD35
DR_MD36
DR_MD37
DR_MD38
DR_MD39
DR_MD40
DR_MD41
DR_MD42
DR_MD43
DR_MD44
DR_MD45
DR_MD46
DR_MD47
DR_MD48
DR_MD49
DR_MD50
DR_MD51
DR_MD52
DR_MD53
DR_MD54
DR_MD55
DR_MD56
DR_MD57
DR_MD58
DR_MD59
DR_MD60
DR_MD61
DR_MD62
DR_MD63
WP2
-MSWEB
2
DQ0
4
DQ1
6
DQ2
8
DQ3
94
DQ4
95
DQ5
98
DQ6
99
DQ7
12
DQ8
13
DQ9
19
DQ10
20
DQ11
105
DQ12
106
DQ13
109
DQ14
110
DQ15
23
DQ16
24
DQ17
28
DQ18
31
DQ19
114
DQ20
117
DQ21
121
DQ22
123
DQ23
33
DQ24
35
DQ25
39
DQ26
40
DQ27
126
DQ28
127
DQ29
131
DQ30
133
DQ31
53
DQ32
55
DQ33
57
DQ34
60
DQ35
146
DQ36
147
DQ37
150
DQ38
151
DQ39
61
DQ40
64
DQ41
68
DQ42
69
DQ43
153
DQ44
155
DQ45
161
DQ46
162
DQ47
72
DQ48
73
DQ49
79
DQ50
80
DQ51
165
DQ52
166
DQ53
170
DQ54
171
DQ55
83
DQ56
84
DQ57
87
DQ58
88
DQ59
174
DQ60
175
DQ61
178
DQ62
179
DQ63
90
WP(NC)
63
WE#
1
VREF
9
NC2
101
NC3
102
NC4
VDDQ022VDDQ130VDDQ254VDDQ362VDDQ477VDDQ596VDDQ6
VSS03VSS111VSS218VSS326VSS434VSS542VSS650VSS758VSS866VSS974VSS1081VSS1189VSS1293VSS13
108
120
148
168
2
4
6
8
94
95
98
99
12
13
19
20
105
106
109
110
23
24
28
31
114
117
121
123
33
35
39
40
126
127
131
133
53
55
57
60
146
147
150
151
61
64
68
69
153
155
161
162
72
73
79
80
165
166
170
171
83
84
87
88
174
175
178
179
90
63
1
9
101
102
VDD07VDD138VDD246VDD370VDD485VDD5
DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQ8
DQ9
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
DQ16
DQ17
DQ18
DQ19
DQ20
DQ21
DQ22
DQ23
DQ24
DQ25
DQ26
DQ27
DQ28
DQ29
DQ30
DQ31
DQ32
DQ33
DQ34
DQ35
DQ36
DQ37
DQ38
DQ39
DQ40
DQ41
DQ42
DQ43
DQ44
DQ45
DQ46
DQ47
DQ48
DQ49
DQ50
DQ51
DQ52
DQ53
DQ54
DQ55
DQ56
DQ57
DQ58
DQ59
DQ60
DQ61
DQ62
DQ63
WP(NC)
WE#
VREF
NC2
NC3
NC4
C20
C0.1U50Y
DR_MD0
DR_MD1
DR_MD2
DR_MD3
DR_MD4
DR_MD5
DR_MD6
DR_MD7
DR_MD8
DR_MD9
DR_MD10
DR_MD11
DR_MD12
DR_MD13
DR_MD14
DR_MD15
DR_MD16
DR_MD17
DR_MD18
DR_MD19
DR_MD20
DR_MD21
DR_MD22
DR_MD23
DR_MD24
DR_MD25
DR_MD26
DR_MD27
DR_MD28
DR_MD29
DR_MD30
DR_MD31
DR_MD32
DR_MD33
DR_MD34
DR_MD35
DR_MD36
DR_MD37
DR_MD38
DR_MD39
DR_MD40
DR_MD41
DR_MD42
DR_MD43
DR_MD44
DR_MD45
DR_MD46
DR_MD47
DR_MD48
DR_MD49
DR_MD50
DR_MD51
DR_MD52
DR_MD53
DR_MD54
DR_MD55
DR_MD56
DR_MD57
DR_MD58
DR_MD59
DR_MD60
DR_MD61
DR_MD62
DR_MD63
WP1
-MSWEA
DR_MD[63..0] 9,10
D D
C C
B B
VDD_25_SUS
R73 4.7KR
DDR_VREF
VREF routed as 40~50
mils trace wide ,
Space>25 mils
-MSWEA 4,9
VDD6
VDD7
VDD8
VDDQ022VDDQ130VDDQ254VDDQ362VDDQ477VDDQ596VDDQ6
VSS03VSS111VSS218VSS326VSS434VSS542VSS650VSS758VSS866VSS974VSS1081VSS1189VSS1293VSS13
Place 104p and 1000p Cap. near the DIMM
143
104
112
128
136
VDDQ7
VDDQ8
VDDQ9
VDDQ10
184
DDR DIMM
SOCKET
VSS14
VSS15
VSS16
100
116
124
132
143
104
112
128
136
VDDQ7
VDDQ8
VDDQ9
VDDQ10
184
DDR DIMM
SOCKET
VSS14
VSS15
VSS16
100
116
124
132
156
164
VDDQ11
VDDQ12
PIN
VSS17
VSS18
139
145
184
172
180
VDDQ13
VDDQ14
VSS19
VSS20
152
160
82
15
VDDID
VDDQ15
CS0#
CS1#
CS2#
CS3#
DQS0
DQS1
DQS2
DQS3
DQS4
DQS5
DQS6
DQS7
DQS8
FETEN
A10_AP
A11
A12
A13
BA0
BA1
BA2
SCL
SDA
SA0
SA1
SA2
CB0
CB1
CB2
CB3
CB4
CB5
CB6
CB7
CK0(DU)
CK0#(DU)
CK1(CK0)
CK1#(CK0#)
CK2(DU)
CK2#(DU)
NC5
NC(RESET#)
CKE0
CKE1
CAS#
RAS#
DM0
DM1
DM2
DM3
DM4
DM5
DM6
DM7
DM8
VSS21
176
184
VDDSPD
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
-MCS2
157
-MCS3
158
71
163
-DR_MDQS0
5
-DR_MDQS1
14
-DR_MDQS2
25
-DR_MDQS3
36
-DR_MDQS4
56
-DR_MDQS5
67
-DR_MDQS6
78
-DR_MDQS7
86
47
103
MAB0
48
MAB1
43
MAB2
41
MAB3
130
MAB4
37
MAB5
32
MAB6
125
MAB7
29
MAB8
122
MAB9
27
MAB10
141
MAB11
118
115
MAB13
167
MEMBAKB0
59
MEMBAKB1
52
113
SMBCLK1
92
SMBDATA1
91
181
182
183
44
45
49
51
134
135
142
144
16
17
137
138
76
75
173
10
MCKE0
21
MCKE1
111
-MSCASB
65
-MSRASB
154
97
107
119
129
149
159
169
177
140
DDR2
DIMM-184_green
N13-1840061-K06
-MCS2 4,9
-MCS3 4,9
MEMBAKB0 4,9
MEMBAKB1 4,9
VDD_25_SUS
-MSCASB 4,9
-MSRASB 4,9
DR_DM0
DR_DM1
DR_DM2
DR_DM3
DR_DM4
DR_DM5
DR_DM6
DR_DM7
MAB[13..0] 4,9
MEMCLK_H4 4,9
MEMCLK_L4 4,9
MEMCLK_H1 4,9
MEMCLK_L1 4,9
MEMCLK_H6 4,9
MEMCLK_L6 4,9
Place near the DIMM
VDD_25_SUS
R13
1KR1%
A A
R14
1KR1%
C423
X_C0.1U50Y
DDR_VREF
C19
C1U10Y
VREF routed as 40~50 mils trace wide ,
Space>25 mils
DDR_VREF 4
5
DIMM1 SLAVE ADDRESS
= (1010000X)B = A0
4
DR_DM[7..0]
DR_DM[7..0] 9,10
3
DIMM2 SLAVE ADDRESS
= (1010001X)B = A2
Title
Document Number
MICRO-STAR INT'L CO.,LTD.
No. 69, Li-De St, Jung-He City,
Taipei Hsien, Taiwan
2
http://www.msi.com.tw
Micro Star Restricted Secret
System Memory : DDR DIMM 1
MS-7144
Last Revision Date:
Wednesday, March 02, 2005
Sheet
83 2
1
Rev
100
of
Page 9
5
4
3
2
1
DDR Terminations
VTT_DDR_SUS VTT_DDR_SUS
DR_MD44
DR_MD35
DR_MD40
D D
DR_MD59
DR_MD63
DR_MD62
DR_MD58
-DR_MDQS7
DR_DM7
DR_MD57
DR_MD61
DR_MD60
DR_MD56
DR_MD51
DR_MD55
C C
B B
-MSCASA 4,8
-MSWEB 4,8
-MSRASB 4,8
-MSRASA 4,8
MEMBAKB0 4,8
MEMBANKA0 4,8
DR_MD50
DR_MD54
-DR_MDQS6
DR_DM6
MAA13
MAB13
DR_MD53
DR_MD52
DR_MD48
DR_MD49
DR_MD47
DR_MD46
DR_MD43
DR_MD42
DR_DM5
DR_MD41
-MCS1
-MCS1 4,8
-MCS0
-MCS0 4,8
-DR_MDQS5
-MSCASA
-MSWEB
DR_MD45
-MSRASB
-MSRASA
DR_MD37
DR_MD33
RN64 8P4R-47R0402
7 8
5 6
3 4
1 2
RN61 8P4R-47R0402
7 8
5 6
3 4
1 2
RN59 8P4R-47R0402
7 8
5 6
3 4
1 2
RN57 8P4R-47R0402
7 8
5 6
3 4
1 2
RN55 8P4R-47R0402
7 8
5 6
3 4
1 2
RN53 8P4R-47R0402
7 8
5 6
3 4
1 2
RN51 8P4R-47R0402
7 8
5 6
3 4
1 2
RN46 8P4R-47R0402
7 8
5 6
3 4
1 2
RN45 8P4R-47R0402
7 8
5 6
3 4
1 2
RN38 8P4R-47R0402
7 8
5 6
3 4
1 2
MEMBAKB1 4,8
MEMBANKA1 4,8
DR_MD39
DR_MD38
DR_MD34
DR_DM4
-DR_MDQS4
DR_MD36
DR_MD32
MAB0
MAB10
MAA10
MAA0
MAA2
MAB2
DR_MD30
MAA3
MAA4
MAA6
MAB6
MAB5
DR_MD26
DR_DM3
-DR_MDQS3
DR_MD25
DR_MD29
DR_MD28
MAB3
MAB4
MAA5
MAA8
DR_MD24
DR_MD19
VTT_DDR_SUS
RN44 8P4R-47R0402
7 8
5 6
3 4
1 2
RN40 8P4R-47R0402
7 8
5 6
3 4
1 2
RN37 8P4R-47R0402
7 8
5 6
3 4
1 2
RN36 8P4R-47R0402
7 8
5 6
3 4
1 2
RN34 8P4R-47R0402
7 8
5 6
3 4
1 2
RN29 8P4R-47R0402
7 8
5 6
3 4
1 2
RN32 8P4R-47R0402
7 8
5 6
3 4
1 2
RN31 8P4R-47R0402
7 8
5 6
3 4
1 2
RN28 8P4R-47R0402
7 8
5 6
3 4
1 2
DR_MD23
MAB8
MAB7
DR_MD22
MAA11
MAB11
MAB9
DR_MD21
DR_MD18
MAA7
MAA9
DR_DM2
-DR_MDQS2
DR_MD17
MAA12
MAB12
DR_MD16
DR_MD11
MCKE0 4,8
MCKE1 4,8
DR_MD20
DR_MD10
DR_MD15
DR_MD14
DR_DM1
DR_MD13
-DR_MDQS1
DR_MD12
DR_MD9
DR_MD8
DR_MD3
DR_MD6
DR_MD7
DR_MD2
DR_DM0
-DR_MDQS0
DR_MD1
DR_MD5
DR_MD4
DR_MD0
DR_MD27
DR_MD31
MAB1
MAA1
RN26 8P4R-47R0402
7 8
5 6
3 4
1 2
RN23 8P4R-47R0402
7 8
5 6
3 4
1 2
RN24 8P4R-47R0402
7 8
5 6
3 4
1 2
RN19 8P4R-47R0402
7 8
5 6
3 4
1 2
RN17 8P4R-47R0402
7 8
5 6
3 4
1 2
RN14 8P4R-47R0402
7 8
5 6
3 4
1 2
RN13 8P4R-47R0402
7 8
5 6
3 4
1 2
RN9 8P4R-47R0402
7 8
5 6
3 4
1 2
RN7 8P4R-47R0402
7 8
5 6
3 4
1 2
RN5 8P4R-47R0402
7 8
5 6
3 4
1 2
RN35 8P4R-47R0402
7 8
5 6
3 4
1 2
VTT_DDR_SUS
-MCS3
-MCS3 4,8
-MCS2
-MCS2 4,8
-MSCASB 4,8
-MSWEA 4,8
-MSCASB
-MSWEA
RN49 8P4R-47R0402
7 8
5 6
3 4
1 2
A A
For DIMM2 Clock
MEMCLK_H4
MEMCLK_H4 4,8 MEMCLK_L5 4,8
MEMCLK_H1 4,8
MEMCLK_H6 4,8
MEMCLK_H1
5
C75 X_C10P50N
C121 X_C10P50N
C163 X_C10P50N
MEMCLK_L4
MEMCLK_L1
MEMCLK_L6 MEMCLK_H6
MEMCLK_L4 4,8
MEMCLK_L1 4,8
MEMCLK_L6 4,8
4
For DIMM1 Clock
MEMCLK_H5 4,8
MEMCLK_H7 4,8
MEMCLK_H0 4,8
MEMCLK_H5
MEMCLK_H7
C76 X_C10P50N
C161 X_C10P50N
C128 X_C10P50N
MEMCLK_L5
MEMCLK_L7
MEMCLK_L0 MEMCLK_H0
3
MEMCLK_L7 4,8
MEMCLK_L0 4,8
DR_DM[7..0] 8,10
-DR_MDQS[7..0] 8,10
DR_MD[63..0] 8,10
MAB[13..0] 4,8
MAA[13..0] 4,8
DR_DM[7..0]
-DR_MDQS[7..0]
DR_MD[63..0]
MAB[13..0]
MAA[13..0]
2
Micro Star Restricted Secret
Title
DDR Terminations Bank 0
Document Number
MICRO-STAR INT'L CO.,LTD.
No. 69, Li-De St, Jung-He City,
Taipei Hsien, Taiwan
http://www.msi.com.tw
MS-7144
Last Revision Date:
Wednesday, March 02, 2005
Sheet
93 2
1
Rev
100
of
Page 10
5
MD38
DDR Terminations
-MDQS0 -DR_MDQS0
D D
C C
B B
-DR_MDQS[7..0] 8,9
A A
R15 10R0402
RN6 8P4R-10R0402
MD0
1 2
MD4
3 4
MD5
5 6
MD1
7 8
RN8 8P4R-10R0402
DM0
1 2
3 4
MD7
5 6
MD6
7 8
RN10 8P4R-10R0402
1 2
MD8 DR_MD8
3 4
MD9 DR_MD9
5 6
7 8
MD15
R18 10R0402
RN12 8P4R-10R0402
-MDQS1
1 2
MD13 DR_MD13
3 4
DM1
5 6
MD14 DR_MD14
7 8
RN21 8P4R-10R0402
MD17
1 2
-MDQS2
3 4
MD21 DR_MD21
5 6
DM2
7 8
MD18
R27 10R0402
RN16 8P4R-10R0402
MD10
1 2
MD20
3 4
MD11
5 6
MD16 DR_MD16
7 8
RN27 8P4R-10R0402
1 2
MD23 DR_MD23
3 4
5 6
MD24
7 8
RN30 8P4R-10R0402
1 2
MD29
3 4
5 6
-MDQS3
7 8
RN33 8P4R-10R0402
MD26
1 2
3 4
MD31
5 6
MD27
7 8
-MDQS[7..0] 4
DR_MD[63..0] 8,9
MD[63..0] 4
-DR_MDQS3
-MDQS[7..0]
-DR_MDQS[7..0]
DR_MD[63..0]
MD[63..0]
DR_MD0
DR_MD4
DR_MD5
DR_MD1
DR_DM0
DR_MD2 MD2
DR_MD7
DR_MD6
DR_MD3 MD3
DR_MD12 MD12
DR_MD15
-DR_MDQS1
DR_DM1
DR_MD17
-DR_MDQS2
DR_DM2
DR_MD18
DR_MD10
DR_MD20
DR_MD11
DR_MD22 MD22
DR_MD19 MD19
DR_MD24
DR_MD28 MD28
DR_MD29
DR_MD25 MD25
DR_MD26
DR_MD30 MD30
DR_MD31
DR_MD27
-MDQS4 -DR_MDQS4
DM4
MD34 DR_MD34
MD42
MD39
MD40
MD35
MD44 DR_MD44
-MDQS5
MD41
DM5 DR_DM5
MD43
MD46 DR_MD46
MD47 DR_MD47
MD49 DR_MD49
MD48 DR_MD48
MD53 DR_MD53
MD51
MD50
MD55
MD56
MD60
MD61 DR_MD61
MD57 DR_MD57
DM7
-MDQS7
MD58 DR_MD58
MD63
DM3
4
R54 10R0402
RN39 8P4R-10R0402
1 2
3 4
5 6
7 8
RN41 8P4R-10R0402
1 2
3 4
5 6
7 8
DR_MD32 MD32
DR_MD36 MD36
DR_MD33 MD33
DR_MD37 MD37
DR_DM4
R55 10R0402
RN43 8P4R-10R0402
1 2
3 4
5 6
7 8
RN48 8P4R-10R0402
1 2
3 4
5 6
7 8
RN52 8P4R-10R0402
1 2
3 4
5 6
7 8
RN56 8P4R-10R0402
1 2
3 4
5 6
7 8
DR_MD39
DR_MD40
DR_MD35
DR_MD45 MD45
-DR_MDQS5
DR_MD41
DR_MD43
DR_MD52 MD52
DR_DM6 DM6
R65 10R0402
RN58 8P4R-10R0402
1 2
3 4
5 6
7 8
RN60 8P4R-10R0402
1 2
3 4
5 6
7 8
RN62 8P4R-10R0402
1 2
3 4
5 6
7 8
R71 10R0402
R69 10R0402
R34 10R0402
-DR_MDQS6 -MDQS6
DR_MD54 MD54
DR_MD50
DR_MD55
DR_MD56
DR_MD60
DR_DM7
-DR_MDQS7
DR_MD62 MD62
DR_MD59 MD59
DR_MD63
DR_DM3
DR_MD38
DR_MD42
DR_MD51
3
C54
X_C0.1U50Y
C100
C55
X_C0.1U50Y
C194
X_C0.1U50Y
C149
X_C0.1U50Y
C42
C0.1U50Y
C172
X_C0.1U50Y
VTT_DDR_SUS
C57
C1U10Y
VTT_DDR_SUS
C90
C1U10Y
VTT_DDR_SUS
C0.22U16Y
C29
VTT_DDR_SUS
2
LAYOUT: Place on backside,
evenly spaced around VTT fill.
VTT_DDR_SUS VTT_DDR_SUS VDD_25_SUS VDD_25_SUS VDD_25_SUS VDD_25_SUS
C181
X_C0.1U50Y
C189
C0.1U50Y
C0.1U50Y
C136
X_C0.1U50Y
C48
X_C0.1U50Y
C30
X_C0.1U50Y
C198
X_C0.1U50Y
VTT_DDR_SUS VDD_25_SUS
C193
C1000P50X
<nopop>
C24
X_C0.22U16Y
<nopop>
C41
X_C0.22U16Y
<nopop>
X_C0.22U16Y
<nopop>
C107
C203
C0.1U50Y
C141
X_C0.1U50Y
C153
X_C0.1U50Y
C120
C0.1U50Y
C93
X_C0.1U50Y
C95
C0.1U50Y
C62
C0.1U50Y
LAYOUT: Locate close
to Clawhammer
socket.
VTT_DDR_SUS
+
EC21
X_.CD1000U6.3EL15
GND
C68
X_C0.1U50Y
GND GND
C182
C0.1U50Y
C34
X_C0.1U50Y
C81
X_C0.1U50Y
C145
C0.1U50Y
C158
C0.1U50Y
+
EC4
.CD1000U6.3EL15
LAYOUT: Place alternating caps to GND and VDD_2.5_SUS in a single line along VTT island.
C103
C1U10Y
C94
X_C0.1U50Y
C47
C1U16Y0805
C28
C17
X_C0.1U50Y
C27
X_C0.1U50Y
C23
X_C0.22U16Y
C88
C65
X_C0.1U50Y
C79
X_C0.1U50Y
X_C0.1U50Y
C32
X_C0.1U50Y
C1U10Y
C1U10Y
C45
C40
LAYOUT: Locate close to
Clawhammer socket.
C1000P50X
C35
C98
C11
C1U16Y0805
X_C4.7U10Y0805
GND
C177
C1U10Y
C80
C1U10Y
X_C100P50N
C185
C36
C191
X_C0.1U50Y
C82
X_C0.1U50Y
C170
X_C0.1U50Y
C165
C0.1U50Y
C127
X_C0.1U50Y
C195
X_C0.1U50Y
C50
C0.1U50Y
C146
C1U10Y
C200
X_C0.1U50Y
C150
C1U10Y
C202
X_C0.1U50Y
C151
X_C0.1U50Y
C139
C1U10Y
C157
X_C0.1U50Y
VDD_25_SUS
C39
C1U10Y
C1U10Y
C0.1U50Y
1
VDD_25_SUS VCC3
C462
X_C0.1U50Y
C463
X_C0.1U50Y
C464
VCC
X_C0.1U50Y
C465
X_C0.1U50Y
C466
X_C0.1U50Y
C467
Ver:00A modify
X_C0.1U50Y
VDD_25_SUS
C148
C0.1U50Y
C77
C0.1U50Y
C117
C0.1U50Y
C199
C0.1U50Y
C188
C0.1U50Y
C116
C0.1U50Y
C89
X_C0.1U50Y
C206
C0.1U50Y
GND
C143
C144
X_C0.1U50Y
X_C0.1U50Y
GND
C204
C209
C0.1U50Y
GND
C0.1U50Y
LAYOUT: Locate close to
Dimm2 socket.
C31
C0.1U50Y
C133
C0.1U50Y
GND
C0.1U50Y
C211
GND
DR_DM[7..0] 8,9
DM[8..0] 4
DR_DM[7..0]
DM[8..0]
5
X_C1000P50X
X_C1000P50N C113
C49
C13
X_C4.7U10Y0805
4
3
C22
C201
X_C4.7U10Y0805
X_C1000P50X
C225
C1000P50X
C212
C196
C1U16Y0805
C0.22U16Y
C183
GND
C1U16Y0805
2
Micro Star Restricted Secret
Title
DDR Terminations Bank 1
Document Number
MICRO-STAR INT'L CO.,LTD.
No. 69, Li-De St, Jung-He City,
Taipei Hsien, Taiwan
http://www.msi.com.tw
MS-7144
Last Revision Date:
Wednesday, March 02, 2005
Sheet
10 32
1
Rev
100
of
Page 11
A
B
C
D
E
VDD_12_A
VDD_12_A
VCC3
FB8 0R
HCKGND
R254 0R
To Claw Hammer
CADIP0
CADIP1
CADIP2
CADIP3
CADIP4
CADIP5
CADIP6
CADIP7
CADIP8
CADIP9
CADIP10
CADIP11
CADIP12
CADIP13
CADIP14
CADIP15
CLKIP0
CLKIP1
CTLIP0
CADIN0
CADIN1
CADIN2
CADIN3
CADIN4
CADIN5
CADIN6
CADIN7
CADIN8
CADIN9
CADIN10
CADIN11
CADIN12
CADIN13
CADIN14
CADIN15
CLKIN0
CLKIN1
CTLIN0
VDD_12_A
X_0R
C24
C25
VLDT
VLDT
VLDTC9VLDT
VSS
VSSE5VSSE6VSSE8VSSF7VSSF8VSS
D18
D20
R252
X_0R
D10
D11
D22
D23
D24
E10
VLDT
VLDT
VLDT
VLDT
VLDTD9VLDT
VSS
F13
F14
F12
VSS
R86
X_0R
E11
E21
E22
E23
E24
F10
F11
VLDT
VLDT
VLDT
VLDT
VLDT
VLDTE9VLDT
VSS
VSS
VSS
VSS
VSSH1VSS
VSS
VSS
H2
G1
F17
F18
F26
H23
G25
HCKGND
F15
F16
VLDT
VLDT
VLDT
VSS
VSS
J2
J18
R253
FOR K8M800
X_0R
FOR K8T800A
VDD_12_A VCC3HCK
F19
F20
F21
F22
F23
G21
G22
H21
J11
J12
J13
J14
J15
J16
J17
K18
K21
VLDT
VSS
VLDT
VSS
L10
L11
VLDT
VLDT
VLDT
TCADP0
TCADP1
TCADP2
TCADP3
TCADP4
TCADP5
TCADP6
TCADP7
TCADP8
TCADP9
TCADP10
TCADP11
TCADP12
TCADP13
TCADP14
TCADP15
TCLKP0
TCLKP1
TCTLP
TCADN0
TCADN1
TCADN2
TCADN3
TCADN4
TCADN5
TCADN6
TCADN7
TCADN8
TCADN9
TCADN10
TCADN11
TCADN12
TCADN13
TCADN14
TCADN15
TCLKN0
TCLKN1
TCTLN
VLDT
VLDT
VLDT
VLDT
VLDT
VLDT
VLDT
VLDT
VLDT
VLDT
VLDT
VLDT
VLDT
VLDT
VLDT
VLDT
VLDT
VSS
VSS
VSS
L13
L12
L18
VLDT
VLDT
B12
A13
B14
A15
A17
B18
A19
B20
E12
D13
E14
D15
D17
E18
D19
E20
B16
E16
A21
C12
A14
C14
A16
A18
C18
A20
C20
E13
C13
E15
C15
C17
E19
C19
D21
C16
E17
A22
L21
M18
N18
N21
P18
P21
R18
T18
T21
T22
T23
T24
T25
U18
U21
U22
U23
VSS
VSS
L14
L15
VIA-K8T800-CD(Rev-B)
J10
VLDT
VLDT
VLDT
VLDT
VLDT
VLDT
VLDT
VLDT
VLDT
VLDT
VLDT
VLDT
VSS
VSS
VSS
VSS
VSS
VSS
J3
K4
J21
J25
K10
VSS
VSS
VSS
VSS
VSS
VSS
K12
K16
K17
K23
K15
K13
K14
K11
B25
B26
C10
VLDT
VLDT
VLDTB9VLDT
VSSD6VSS
VSS
VSSC8VSS
D8
D12
R251
C11
C23
VLDT
VLDT
VSS
VSS
D14
D16
4 4
HCLK- 7
C22
AVDD2
AGND2
C21
A10
VLDT
VSSA8VSS
VSS
A23
A24
VLDT
VSSB8VSS
HCLK+ 7
A25
A26
B10
B23
B24
VLDT
VLDT
VLDTA9VLDT
VLDT
VLDT
VSS
VSS
VSS
VSS
B15
B21
B22
B13
B17
B19
AVDD2
U4A
From Claw Hammer
CADOP[0..15] 4
3 3
CLKOP0 4
CLKOP1 4
CTLOP0 4
CADON[0..15] 4
CLKON0 4
2 2
CLKON1 4
CTLON0 4
-LDTRST 28
-LDTSTOP 5,18
CADOP0
CADOP1
CADOP2
CADOP3
CADOP4
CADOP5
CADOP6
CADOP7
CADOP8
CADOP9
CADOP10
CADOP11
CADOP12
CADOP13
CADOP14
CADOP15
CLKOP0
CLKOP1
CTLOP0
CADON0
CADON1
CADON2
CADON3
CADON4
CADON5
CADON6
CADON7
CADON8
CADON9
CADON10
CADON11
CADON12
CADON13
CADON14
CADON15
CLKON0
CLKON1
CTLON0
-LDTRST
-LDTSTOP
RPCOMP
PNCOMP
RTCOMP
VDD_12_A
1 1
M24
G24
M26
R26
P25
N26
M25
K25
H25
G26
R23
P22
N23
M22
K22
H22
G23
A12
D25
D26
C26
U24
U25
U26
V21
V22
V23
V24
V25
V26
T26
P24
P26
K24
K26
H24
H26
R24
R22
N24
N22
L22
J24
J22
L24
F24
J26
J23
L26
L23
F25
B11
RCADP0
RCADP1
RCADP2
RCADP3
RCADP4
RCADP5
RCADP6
RCADP7
RCADP8
RCADP9
RCADP10
RCADP11
RCADP12
RCADP13
RCADP14
RCADP15
RCLKP0
RCLKP1
RCTLP
RCADN0
RCADN1
RCADN2
RCADN3
RCADN4
RCADN5
RCADN6
RCADN7
RCADN8
RCADN9
RCADN10
RCADN11
RCADN12
RCADN13
RCADN14
RCADN15
RCLKN0
RCLKN1
RCTLN
LDTRST
LDTSTP
RPCOMP
RNCOMP
RTCOMP
VLDT
VLDT
VLDT
VLDT
VLDT
VLDT
VLDT
VLDT
VLDT
VCC3HCK
C237
C1000P50X
CADIP[0..15] 4
CLKIP0 4
CLKIP1 4
CTLIP0 4
CADIN[0..15] 4
CLKIN0 4
CLKIN1 4
CTLIN0 4
C233
C1U10Y
CB16
X_C1000P50X
5020
PNCOMP
RTCOMP
RPCOMP
C213 C0.1U50Y
Around NB
C440
X_C0.1U50Y
Decoupling capacitors
at NB BGA Area (On
Solder Layer)
R70 49.9R1%
R68 100R1%
R72 49.9R1%
VDD_12_A
VDD_12_A
Micro Star Restricted Secret
Title
NORTH BRIDGE (HT)
Document Number
MICRO-STAR INT'L CO.,LTD.
No. 69, Li-De St, Jung-He City,
Taipei Hsien, Taiwan
A
B
C
D
http://www.msi.com.tw
MS-7144
Last Revision Date:
Wednesday, March 02, 2005
Sheet
11 32
E
Rev
100
of
Page 12
A
K8M800/K8T800A AGP 8X ,V-Link, Misc. Control
VDDQ VDD3 VCCA3
4 4
GAD[31..0] 15
3 3
GC/BE#[3..0] 15
AD_STBS0 15
AD_STBF0 15
AD_STBS1 15
AD_STBF1 15
GFRAME 15
GIRDY 15
GTRDY 15
GDEVSEL 15
GSTOP 15
GPAR 15
RBF 15
WBF 15
GREQ 15
2 2
GGNT 15
GSERR 15
GCLK_NB 7
SBA[7..0] 15
SB_STBS 15
SB_STBF 15
AGPVREF_GC 15
1 1
AGP8XDET# 15
DBIL 15
DBIH 15
GAD0
GAD1
GAD2
GAD3 VLAD2
GAD4
GAD5
GAD6
GAD7
GAD8
GAD9
GAD10
GAD11
GAD12
GAD13
GAD14
GAD15
GAD16
GAD17
GAD18
GAD19
GAD20
GAD21
GAD22
GAD23
GAD24
GAD25
GAD26
GAD27
GAD28
GAD29
GAD30
GAD31
GC/BE#0
GC/BE#1
GC/BE#2
GC/BE#3
AD_STBS0
AD_STBF0
AD_STBS1
AD_STBF1
SBA0
SBA1
SBA2
SBA3
SBA4
SBA5
SBA6
SBA7
SB_STBS
SB_STBF
ST0 15
ST1 15
ST2 15
ST0
ST1
ST2
AGPPCOMP
AGPNCOMP
AGPVREF_GC
DBIL
DBIH
A
AF18
GD0/FPD10
AD18
GD1/FPD11
AE18
GD2/FPDVICLK
AF17
GD3/FPD09
AD17
GD4/FPD08
AD16
GD5/FPD07
AE16
GD6/FPD06
AF16
GD7/FPD05
AF14
GD8/FPDVIDET
AD14
GD9/FPDVIHS
AD13
GD10/FPD01
AE13
GD11/FPD23
AF13
GD12/FPD00
AD12
GD13/FPD22
AF12
GD14/FPD21
AE12
GD15/FPD20
AD10
GD16/FPD18
AE10
GD17/FPD17
AF10
GD18/FPD16
AD9
GD19/FPDE
AF9
GD20/FPD14
AF8
GD21/FPCLK
AE9
GD22/FPD13
AD8
GD23/FPD15
AF6
GD24/DVP1D09
AD7
GD25
AE6
GD26/DVP1D10
AD5
GD27
AF5
GD28/DVP1D07
AF4
GD29/DVP1D06
AE4
GD30/DVP1D08
AD4
GD31/DVP1D04
AD15
GCBE0/FPD03
AF11
GCBE1/SB_DA
AD11
GCBE2/FPD19
AC7
GCBE3/DVP1D11
AF15
ADSTB0S/FPD02
AE15
ADSTB0F/FPD04
AF7
ADSTB1S/FPDET
AE7
ADSTB1F/FPD12
AC9
GFRAME/FPHS
AC10
GIRDY/SB_CK
AC14
GTRDY
AC11
GDEVSEL/FPVS
AC12
GSTOP/FPDVICLK_N
AC16
GPAR/FPDVIVS
AD6
RBF
AC1
WBF/FPCLK_N
Y1
GREQ/DVI_DDCCK
AA3
GGNT/DVI_DDCDA
AC15
GSERR/FPDVIDE
A11
GCLK
AC2
SBA0/DVP1VS
AC3
SBA1/DVP1DE
AD1
SBA2/DVP1D00
AD2
SBA3/DVP1HS
AF2
SBA4/DVP1D05
AD3
SBA5/DVP1D03
AE3
SBA6/DVP1CLK
AF3
SBA7/DVP1CLK_N
AE1
SB_STBS/DVP1D02
AF1
SB_STBF/DVP1D01
AA2
ST0
AA1
ST1/DVP1DET
AB1
ST2
V1
AGPPCOMP
W1
AGPNCOMP
AC13
AGPVREF0
AC6
AGPVREF1
Y2
AGP8XDET
AC4
DBIL
AC5
DBIH
VSSQQ
VSS
VSS
VSS
VSS
T1
R12
R13
R14
R15
U1
VCCQQ
VSS
R10
R11
B
K8
N5
VCC4/NCN9VCC4/NCP9VCC4/NC
VCC4/NC
L8
L9
VCC4/NCM5VCC4/NC
VCC4/NCM9VCC4/NC
VCC4/NC
K9
VCC4/NCL5VCC4/NC
K5
J9
VCC4/NC
F5
VCC4/NCF6VCC4/NC
VCC4/NC
VCC4/NCF4VCC4/NC
VCC4/NCG2VCC4/NCG3VCC4/NCG4VCC4/NCG5VCC4/NCH3VCC4/NCH4VCC4/NCH5VCC4/NCJ4VCC4/NCJ5VCC4/NC
F1
F2
F3
TVD00/DVP0D00/NC
TVD01/DVP0D01/NC
TVD02/DVP0D02/NC
TVD03/DVP0D03/NC
TVD04/DVP0D04/NC
TVD05/DVP0D05/NC
TVD06/DVP0D06/NC
TVD07/DVP0D07/NC
TVD08/DVP0D08/NC
TVD09/DVP0D09/NC
TVD10/DVP0D10/NC
TVD11/DVP0D11/NC
R9
TVCLKIN/DVP0DET/NC
TVCLK/DVP0DCLK/NC
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSSP5VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSSR1VSSR2VSSR3VSSR4VSSR5VSS
P10
P11
P12
P13
P14
P15
P16
P17
P23
B
N16
N17
N25
N10
N11
N12
N13
N14
N15
M15
M16
M17
M21
M23
C
E3
E1
D1
U4B
VCC4/NC
VCC4/NCE4VCC4/NCE2VCC4/NC
VCC4/NC
VCC4/NC
VPAR
UPSTB
UPSTB
DNSTB
DNSTB
UPCMD
DNCMD
LVREF
LCOMPP
PWRGD
PCIRST
TESTIN
SUSTAT
DEBUG
AR/NC
AG/NC
AB/NC
RSET/NC
HSYNC/NC
VSYNC/NC
XIN/NC
INTA/NC
BISTIN/NC
SPCLK1/NC
SPCLK2/NC
SPD1/NC
SPD2/NC
TVDE/DVP0DE/NC
TVHS/DVP0HS/NC
TVVS/DVP0VS/NC
GPO0/NC
GPOUT/NC
VSS
VSS
VSS
VSS
VSS
VSS
VSS
L25
M10
M11
M12
M13
M14
VIA-K8T800-CD(Rev-B)
C
VD0
VD1
VD2
VD3
VD4
VD5
VD6
VD7
VBE
D
FOR K8T800A
AD20
AD21
AF24
AE24
AE19
AF20
AD24
AF25
AE21
AF19
AE23
AF23
AF22
AD22
AF26
AD23
AF21
AD19
AE26
AD25
AC26
AD26
AC17
B3
A3
A2
C4
A1
B1
C6
E7
D3
P2
C2
P1
C1
J1
K2
K3
L4
K1
L2
L3
M4
L1
M2
M3
M1
P4
N1
N4
N3
P3
N2
D2
VCC3
LVREF_NB
LCOMPP
RSET
FB13
VLAD0
VLAD1
VLAD3
VLAD4
VLAD5
VLAD6
VLAD7
TESTIN
DEBUG
0R
VCCA3
C266
C1000P50X
VLAD[0..7] 18
VBE0# 18
VPAR 18
UPSTB 18
UPSTB# 18
DNSTB 18
DNSTB# 18
UPCMD 18
DNCMD 18
C231
X_C1000P50N
PWROK_NB# 17
PCIDEVRST# 24,27
SUSST# 17
R89 10KR
AR 26
AG 26
AB 26
R114
X_68R1%
HSYNC 26
VSYNC 26
GUICLK 7
PIRQ#A 15,16,19,20
X_1KR
R109
DDCCLK 26
DDCDATA 26
C1U10Y
C264
CB18
X_C1000P50X
5020
K8M800 and K8T800A will be 0.625V(R153=1KST,R11-0102T13-Y01)
LAYOUT: Place caps on the bottom of NB
C450 X_C0.1U50Y
C452 X_C1U10Y
C443 X_C0.1U50Y
C448 X_C1U10Y
C454 X_C0.1U50Y
C449 X_C1U10Y
C451 X_C0.1U50Y
For K8M800.
AGPVREF_GC
LAYOUT: Place caps as close NB as possible
TESTIN
VPAR
AGPNCOMP
AGPPCOMP
LCOMPP
VSS
VSS
L17
L16
Title
Micro Star Restricted Secret
NORTH BRIDGE (AGP & VLINK)
Document Number
MICRO-STAR INT'L CO.,LTD.
No. 69, Li-De St, Jung-He City,
Taipei Hsien, Taiwan
D
http://www.msi.com.tw
E
VCC2_5
R77
3KR1%
C227
C0.1U50Y
LVREF_NB
R79
1KR1%
C229
C0.1U50Y
VDDQ
FOR K8M800
R78 100KR
C455 C1U10Y
C228 C0.1U50Y
R97 4.7KR
R82 X_8.2KR
R130 60.4R1%
R129 60.4R1%
R90 360R1%
MS-7144
Last Revision Date:
Sheet
E
VCC2_5
VDDQ
Rev
100
Wednesday, March 02, 2005
12 32
of
Page 13
A
B
C
D
E
VCC1
VCC1
VCC1
VCC1
VCC1
VCC1
VCC1
VCC1
VCC1
VCC1
VCC1
VCC1
VCC1
VCC1
VCC1
VCC1
VCC1
VCC1
VCC1
VCC1
VCC1
VCC1
VCC1
VCC1
VCC1
VCC1
VCC1
VCC1
VCC1
VCC1
VCC1
VCC1
VCC1
VCC1
VCC1
VCC1
VCC1
VCC1
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
AA4
AA5
AB11
AB12
AB13
AB14
AB7
AB8
M8
N8
T2
T3
T4
T5
T8
T9
U2
U3
U4
U5
U8
U9
V10
V11
V12
V13
V2
V3
V4
V8
V9
W2
W3
W4
W9
Y3
Y4
Y5
AA21
AA22
AA23
AA24
AA25
AA26
AB21
AB22
AB23
AB24
AB25
AB26
F9
H10
H11
H12
H15
H16
H8
H9
J8
K19
L19
M19
P8
R19
R8
T19
U19
V18
V19
W10
W11
W12
W13
W14
W19
Y20
Y21
Y22
Y23
Y24
Y25
Y26
AB16
AC8
AC22
AC23
AC24
AE2
AE5
AE8
AE11
AE14
AE17
AE20
AE22
AE25
VDDQ
VDD
Power and Ground Connections
VDD
C292
X_C1U10Y
C273
C1U10Y
C453
X_C1U10Y
VDD_12_A
C438 X_C1U10Y
C442 X_C0.22U16Y
C444 X_C0.1U50Y
C445 X_C1U10Y
C441 X_C1U10Y
C439 X_C0.22U16Y
C
C456 X_C1U10Y
C458 X_C1000P50N
C446 X_C1U10Y
C457 X_C1U10Y
C447 X_C1000P50N
VDD
VDD_12_A
LAYOUT : Popualte caps on the bottom side
of NB.
VDDQ
VDDQ
C1U10Y
B
X_C1000P50N
CB14
X_C1000P50N
CB15
CB17 C10U10Y0805
C302
C0.1U50Y
C316
VDDQ
VDDQ
C300
C1U10Y
C315
C1U10Y
C283 X_C1U10Y
C298
X_C0.1U50Y
C314
X_C0.1U50Y
C299
C0.1U50Y
C297
X_C1U10Y
VDD_12_A
C296
C0.1U50Y
VDDQ
For K8M800 Only
CP7
X_COPPER
X_COPPER
1
3
5
7
RGBPLL
C253
X_C1000P50X
GND_RGBPLL
DAC_PLL
C258
X_C1000P50X
GND_DAC
R119
X_0R0805
2
4
RN67
6
X_8P4R-0R
8
C251
X_C1U10Y
C267
X_C1U10Y
CB5
X_C1U16Y0805
CB6
X_C1000P50X
5020
VDD
FB11
X_0R
FB9 X_0
VDD3
FB10 X_0R
FB12 X_0
CP9
VCC3 VDD3
Note: When use K8T800,
these power circuit for
GFX analog power should be
NOPOPed.
For K8M800/K8T800 Pro Only
VCC3
FB6
X_0
CP4
X_COPPER
VCC3
Micro Star Restricted Secret
Title
NORTH BRIDGE (POWER/GOUND)
Document Number
MICRO-STAR INT'L CO.,LTD.
No. 69, Li-De St, Jung-He City,
Taipei Hsien, Taiwan
D
http://www.msi.com.tw
AVDD1
C1000P50X
FB7 X_0
CP5
X_COPPER
MS-7144
C207
C210
C1U10Y
AVDD2
2 1
C221
C1000P50N
Last Revision Date:
Sheet
E
CB13
X_C1000P50X
5020
C220
C1U10Y
AGND2
Wednesday, March 02, 2005
13 32
of
Rev
100
VSUSNB
C240
C1U10Y
4 4
3 3
2 2
1 1
AVDD1
RGBPLL
GND_RGBPLL
RGBPLL
GND_RGBPLL
DAC_PLL
GND_DAC
DAC_PLL
GND_DAC
VDD
U4C
AC25
VSUS15/VSUS25
E25
AVDD1
E26
AGND1
D5
VCCPLL1/NC
A5
VCCPLL2/NC
C5
GNDPLL1/NC
B5
GNDPLL2/NC
A6
VCCPLL3/NC
B6
GNDPLL3/NC
B2
DACVDD/NC
C3
GNDDAC1/NC
D4
GNDDAC2/NC
A4
VCCRGB/NC
B4
GNDRGB/NC
A7
NC
D7
NC
AB17
VCC2
AB18
VCC2
AB19
VCC2
AB20
VCC2
AC18
VCC2
AC19
VCC2
AC20
VCC2
AC21
VCC2
V14
VCC2
V15
VCC2
V16
VCC2
V17
VCC2
W15
VCC2
W16
VCC2
W17
VCC2
W18
VCC2
B7
VSS/NC
C7
VSS/NC
R16
VSS
R17
VSS
R21
VSS
R25
VSS
T10
VSS
T11
VSS
T12
VSS
T13
VSS
T14
VSS
T15
VSS
T16
VSS
T17
VSS
U10
VSS
U11
VSS
U12
VSS
U13
VSS
U14
VSS
U15
VSS
U16
VSS
U17
VSS
V5
VSS
W5
VSS
W21
VSS
W22
VSS
W23
VSS
W24
VSS
W25
VSS
W26
VSS
AB2
VSS
AB3
VSS
AB4
VSS
AB5
VSS
AB6
VSS
AB9
VSS
AB10
VSS
AB15
VSS
VIA-K8T800-CD(Rev-B)
A
Page 14
ISL6568CR FOR AMD K8 754 POWER CKT
COREFB_H 5
COREFB_L 5
VID4 5
VID3 5
VID2 5
VID1 5
VID0 5
PG_VCORE 27
VCORE_EN 27
VRM_EN > 0.6V ENABLE
VCORE
R292
51R
R295
51R
R283
1KR
VCC
R284
1KR
C534
C0.1U50Y
C541
X_C1000P50X
VCC VCC
X_S-1N5817_DO214AC
R285
4.7KR
C540
X_C1000P50X
VCC
R289 10KR
C537 X_C10P50N
R290 1KR
R296
X_150KR
150KR
C536
C5600P50X
R297
24KR1%
R300
BOTTOM PAD CONNECT TO
GND THROUGH 10vias
ISL6568_QFN32
32PIN 5x5QFN
22
21
30
31
32
1
28
20
C535
C0.1U50Y
5
6
7
9
8
3
+20mV
OFFSET
29
2
C543
C0.01U50X
U1
VID4
VID3
VID2
VID1
VID0
VID12.5
PGOOD
ENLL
COMP
FB
VDIFF
VSEN
RGND
OFST
FS
REF
VCC
D1
4
VCC
GND
33
R2
4.7R0805
C2
C4.7U16Y1206
PVCC
BOOT1
UGATE1
PHASE1
ISEN1
LGATE1
BOOT2
UGATE2
PHASE2
ISEN2
LGATE2
OCSET
ICOMP
ISUM
IREF
+12VA
R8
R287
15
24
2.2R
C0.1U25X
25
23
3KR1%
R288
26
27
R291
18
2.2R
17
19
R294
16
3KR1%
14
10
11
12
13
C544
C0.01U50X
4.7R0805
C4
C533
C1U16Y0805
N-SUR50N024-06P_TO252-3
C539
C0.1U25X
R298 1KR1%
0R0805
1R0805
0R0805
10KR1%
+12VA VIN
C14
C21
C0.1U50Y
VIN
C532
C1U16Y0805
R36
1R0805
R43
R310
R46
R32
R312
R299 17.4KR1%
D S
Q12
G
N-P0903BR_TO252-3
R309
10KR1%
D S
Q14
G
VIN
10KR1%
D S
Q11
G
N-P0903BR_TO252-3
R311
10KR1%
D S
Q9
G
N-SUR50N024-06P_TO252-3
N-SUR50N024-06P_TO252-3
C542
C0.047U16X
R301 39KR
R302 39KR
G
N-SUR50N024-06P_TO252-3
C538
C1U16Y0805
G
CHOK2
+
1 2
CH-1.2U18A
C12
C4.7U16Y1206
D S
Q13
D S
Q10
C1U16Y0805
R258
2.2R0805
C119
C1000P50X
R257
2.2R0805
C44
C1000P50X
EC14
.CD1000U16EL20
CHOK3
CH-1.0U40A
CHOK1
CH-1.0U40A
+
+
1 2
1 2
EC10
EC12
.CD1000U16EL20
.CD1000U16EL20
EC20
EC18
X_.CD1500U6.3EL20
EC8
EC7
X_.CD3300U6.3EL25
+
+
1 2
1 2
C86
.CD1000U16EL20
0.8V~1.55V/80A
EC17
.CD1500U6.3EL20
.CD3300U6.3EL25
C4.7U16Y1206
C546
C4.7U16Y1206
VCORE
VCORE
C549
X_C100U2SP
Near CPU Socket
C550
X_C100U2SP
EC13
EC11
.CD1000U16EL20
EC19
.CD1500U6.3EL20
X_.CD1500U6.3EL20
EC5
EC6
.CD3300U6.3EL25
.CD3300U6.3EL25
ATX12V POWER CONNECTOR
+12VA
JPW1
3
4
C16
C0.01U50X
2
PWR-2X2M
PH2
C37
C33P50N
PH1
2
112
1
GND
12V
2
GND
12V
112
HS-0500410-K08
MSI
Title
Size Document Number Rev
Date: Sheet
MICRO-STAR INT'L CO.,LTD.
VRM 9.0
HS-0500410-K08
MS-7144
of
32 Wednesday, March 02, 2005
14
100
Page 15
5
4
3
2
1
AGP PRO Connector
VCC
D D
C C
B B
C313
C0.1U50Y
PIRQ#B 16,19,20
GCLK_SLOT 7
GREQ 12
ST0 12 ST1 12
ST2 12
RBF 12
DBIL 12
SB_STBF 12
3VDUAL
AD_STBF1 12 AD_STBS1 12
GIRDY 12
GDEVSEL 12
GSERR 12
AD_STBF0 12
VCC3
VDDQ
VCC
AGP1
SLOT-AGP1.5LATCH_red
N11-1240131-A10
B1
-OVRCNT
B2
5V
B3
5V
B4
USB+
B5
GND
B6
-INTB
B7
GREQ
ST0
ST2
RBF
DBIL
SBA0
SBA2
SB_STBF
SBA4
SBA6
GAD31
GAD29
GAD27
GAD25
AD_STBF1
GAD23
GAD21
GAD19
GAD17
GC/BE#2
GIRDY
GDEVSEL
GPERR
GSERR
GAD14
GAD12
GAD10
GAD8
AD_STBF0 AD_STBS0
GAD7
GAD5
GAD3
GAD1
VREF_CG
B8
B9
B10
B11
B12
B13
B14
B15
B16
B17
B18
B19
B20
B21
B22
B23
B24
B25
B26
B27
B28
B29
B30
B31
B32
B33
B34
B35
B36
B37
B38
B39
B40
B41
B42
B43
B44
B45
B46
B47
B48
B49
B50
B51
B52
B53
B54
B55
B56
B57
B58
B59
B60
B61
B62
B63
B64
B65
B66
CLK
-REQ
3.3V
ST0
ST2
-RBF
GND
RESERVED
SBA0
3.3V
SBA2
SB_STB
GND
SBA4
SBA6
RSVD/KEY
GND/KEY
AUX3V/KEY
3.3V/KEY
AD31
AD29
3.3V
AD27
AD25
GND
AD_STB1
AD23
VDDQ
AD21
AD19
GND
AD17
C/-BE2
VDDQ
-IRDY
AUX3V/KEY
GND/KEY
RSVD/KEY
3.3V/KEY
-DEVSEL
VDDQ
-PERR
GND
-SERR
C/-BE1
VDDQ
AD14
AD12
GND
AD10
AD8
VDDQ
AD_STB0
AD7
GND
AD5
AD3
VDDQ
AD1
VREF_CG
-TYPEDET
RESERVED
USB-
GND
-INTA
-RST
-GNT
3.3V
RESERVED
-PIPE
GND
-WBF
SBA1
3.3V
SBA3
-SB_STB
GND
SBA5
SBA7
RSVD/KEY
GND/KEY
RSVD/KEY
3.3V/KEY
AD30
AD28
3.3V
AD26
AD24
GND
-AD_STB1
C/-BE3
VDDQ
AD22
AD20
GND
AD18
AD16
VDDQ
-FRAME
RSVD/KEY
GND/KEY
RSVD/KEY
3.3V/KEY
-TRDY
-STOP
-PME
GND
PAR
AD15
VDDQ
AD13
AD11
GND
AD9
C/-BE0
VDDQ
-AD_STB0
AD6
GND
AD4
AD2
VDDQ
AD0
VREF_GC
12V
ST1
+12V
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10
A11
A12
A13
A14
A15
A16
A17
A18
A19
A20
A21
A22
A23
A24
A25
A26
A27
A28
A29
A30
A31
A32
A33
A34
A35
A36
A37
A38
A39
A40
A41
A42
A43
A44
A45
A46
A47
A48
A49
A50
A51
A52
A53
A54
A55
A56
A57
A58
A59
A60
A61
A62
A63
A64
A65
A66
VDDQ
VCC3
AGP_PME#
AGP8XDET_GC#
GGNT
ST1
WBF
SBA1
SBA3
SB_STBS
SBA5
SBA7
GAD30
GAD28
GAD26
GAD24
AD_STBS1
GC/BE#3
GAD22
GAD20
GAD18
GAD16
GFRAME
GTRDY
GSTOP
R158 0R
GPAR
GAD15 GC/BE#1
GAD13
GAD11
GAD9
GC/BE#0
GAD6
GAD4
GAD2
GAD0
AGPVREF_GC
PIRQ#A 12,16,19,20
PCIRST# 16,27
GGNT 12
DBIH 12
WBF 12
SB_STBS 12
GFRAME 12
GTRDY 12
GSTOP 12
PCI_PME# 17,19,20
GPAR 12
AD_STBS0 12
AGPVREF_GC 12
GAD[31..0] 12
SBA[7..0] 12
GC/BE#[3..0] 12
GAD[31..0]
SBA[7..0]
GC/BE#[3..0]
GAD31
GAD30
GAD29
GAD28
GAD27
GAD26
GAD25
GAD24
GAD23
GAD22
GAD21
GAD20
GAD19
GAD18
GAD17
GAD16
GAD15
GAD14
GAD13
GAD12
GAD11
GAD10
GAD9
GAD8
GAD7
GAD6
GAD5
GAD4
GAD3
GAD2
GAD1
GAD0
SBA0
SBA1
SBA2
SBA3
SBA4
SBA5
SBA6
SBA7
GC/BE#0
GC/BE#1
GC/BE#2
GC/BE#3
AGP "Vref" => 4X : 0.5*1.5V=0.75 Volt ,
8X : 0.23*1.5 =0.345 Volt
VCC3
VDDQ
4X : 0.75V
A A
8X : 0.35V
VREF_CG
C1U10Y
C318
R160
3.32KR1%
C317
C0.1U50Y
R159
1.47KR1%
R161
1.02KR1%
+12V
G
Q28
N-2N7002_SOT23
R157
1KR
AGP8XDET_GC#
1 : 4X
D S
0 : 8X 1 : 4X
"AGP8XDET_GC#"
G
R162
4.7KR
D S
Q29
N-2N7002_SOT23
AGP8XDET#
R163
10KR
AGP8XDET# 12
0 : 8X
AGP8XDET_GC#
1 : 4X
0 : 8X
+12V
R154
10KR
VDDQ
R155
R153
1KR
Q26
N-PMBS3904_SOT23-RH
G
D S
Q27
N-2N7002_SOT23
R156
200R1%
8.2KR
GPERR
VDDQ
VCC3
3VDUAL
VCC5
VCC12
=>4X=High,8X=Low
5
4
3
2
Add-in Card Power
Imax
2.0A
6.0A
0.75A
2.0A
1.0A
Micro Star Restricted Secret
Title
Document Number
MICRO-STAR INT'L CO.,LTD.
No. 69, Li-De St, Jung-He City,
Taipei Hsien, Taiwan
http://www.msi.com.tw
AGP PRO Slot
V_Min V_MaxVUnits
1.425 1.575
3.15 3.45
3.15 3.45
4.75 5.25
11.4 12.6
MS-7144
Last Revision Date:
Wednesday, March 02, 2005
Sheet
15 32
1
of
V
V
V
V
Rev
100
Page 16
A
AD[31..0] 19,20
4 4
3 3
C_BE#[3..0] 19,20
2 2
1 1
AD[31..0]
AD0
AD1
AD2
AD3
AD4
AD5
AD6
AD7
AD8
AD9
AD10
AD11
AD12
AD13
AD14
AD15
AD16
AD17
AD18
AD19
AD20
AD21
AD22
AD23
AD24
AD25
AD26
AD27
AD28
AD29
AD30
AD31
C_BE#0
C_BE#1
C_BE#2
C_BE#3
FRAME#
DEVSEL#
IRDY#
TRDY#
STOP#
SERR#
PAR
PERR#
PCIRST#
PIRQ#A
PIRQ#B
PIRQ#C
PIRQ#D
FRAME# 19,20
DEVSEL# 19,20
IRDY# 19,20
TRDY# 19,20
STOP# 19,20
SERR# 19,20
PERR# 19,20
PCIRST# 15,27
PIRQ#A 12,15,19,20
PIRQ#B 15,19,20
PIRQ#C 19,20
PIRQ#D 19,20
C_BE#[3..0]
PAR 19,20
INTH#
PREQ#0 19
PREQ#1 19
PREQ#2 20
PREQ#3 20
PREQ#4 20
PGNT#0 19
PGNT#1 19
PGNT#2 20
PGNT#3 20
PGNT#4 20
A
PREQ#0
PREQ#1
PREQ#2
PREQ#3
PREQ#4
PREQ#5
PGNT#0
PGNT#1
PGNT#2
PGNT#3
PGNT#4
PGNT#5
G2
AD0
J4
AD1
J3
AD2
H3
AD3
F1
AD4
G1
AD5
H4
AD6
F2
AD7
E1
AD8
G3
AD9
E3
AD10
D1
AD11
G4
AD12
D2
AD13
D3
AD14
F3
AD15
K3
AD16
L3
AD17
K2
AD18
K1
AD19
M4
AD20
L2
AD21
N4
AD22
L1
AD23
M2
AD24
M1
AD25
P4
AD26
N3
AD27
N2
AD28
N1
AD29
P1
AD30
P2
AD31
E2
CBE0
C1
CBE1
L4
CBE2
M3
CBE3
J1
FRAME
H2
DEVSEL
J2
IRDY
H1
TRDY
K4
STOP
C2
SERR
F4
PAR
C3
PERR
R1
PCIRST
A4
INTA
B4
INTB
B5
INTC
C4
INTD
D4
INTE
E4
INTF
A3
INTG
B3
INTH
A5
REQ0
B6
REQ1
C5
REQ2
D5
REQ3
P3
REQ4
R3
REQ5
A6
GNT0
D6
GNT1
C6
GNT2
E5
GNT3
R4
GNT4
R2
GNT5
GNDA1GNDA2GND
B
VCC3
H10
H12
H11
VCC33H9VCC33
VCC33
VCC33J8VCC33K8VCC33L8VCC33M8VCC33N8VCC33P8VCC33R8VCC33
VCC33
GNDE8GND
GND
GND
GND
GND
B2
B1
F25
USBGND
USBGND
J21
J25
A15
A13
H23
R19
T19
U19
V19
U8
V21
W10
W11
W17
VCC33T8VCC33
VCC33
VCC33V8VCC33
VCC33
VCC33
VCC33W9VCC33
VCC33
VCC33
USBGND
USBGND
USBGND
USBGND
USBGND
USBGND
USBGND
USBGND
USBGND
USBGND
USBGND
USBGND
USBGND
USBGND
USBGND
USBGND
USBGND
A17
A19
A21
B13
B15
B17
B19
B21
C13
C14
C15
C16
C17
C18
C19
C20
C21
W18
D13
C
USBN4
USBP4
USBN5
USBVDD
USBVDD
USBVDD
USBVDD
USBVDD
USBVDD
USBVDD
USBVDD
USBVDD
USBVDD
USBVDD
USBVDD
USBSUS25
PLLVDDA
PLLVDDA
PLLGNDA
PLLGNDA
USBP0+
USBP0-
USBP1+
USBP1-
USBP2+
USBP2-
USBP3+
USBP3-
USBP4+
USBP4-
USBP5+
USBP5-
USBP6+
USBP6-
USBP7+
USBP7-
USBOC0
USBOC1
USBOC2
USBOC3
USBOC4
USBOC5
USBOC6
USBOC7
USBCLK
USB REXT
UDPWR
UDPWREN
KBCK/KA20G
KBDT/KBRC
MSCK/IRQ1
MSDT/IRQ12
USBGND
USBGND
USBGND
USBGND
H13
H15
H16
H14
H17
USBP5
U13A
A22
B22
C22
D22
E22
F22
J13
J14
J15
J16
J17
J18
C24
A23
B23
D23
C23
E20
D20
A20
B20
E18
D18
A18
B18
D16
E16
A16
B16
D14
E14
A14
B14
C26
D24
B26
C25
B24
A24
A26
A25
E23
B25
D26
D25
W3
V1
W1
W2
USBGND
USBGND
VIA-VT8237R
H18
W19
W21
Y21
W8
VCC33
VCC33
VCC33
VCC33
VCC33
USBGND
USBGND
USBGND
USBGND
USBGND
USBGND
USBGND
USBGND
USBGND
USBGND
E13
E15
E17
E19
D15
D17
D19
E21
D21
1 2
3 4
5 6
7 8
USBVCCA
USBGNDA
USBP0
USBN0
USBP1
USBN1
USBP2
USBN2
USBP3
USBN3
USBP4
USBN4
USBP5
USBN5
USBP6
USBN6
USBP7
USBN7
USBCLK_SB
USBREXT
RN106
8P4R-15KR
CB10
C0.1U50Y
VCC2_5
USB_OC#1
USB_OC#5
R206 5KR
R201 10KR
C346
C10U10Y1206
C343
C0.1U50Y
near SB
CB9
X_C1U10Y
D
3VDUAL
CB11
X_C0.1U50Y
VSUS2_5
USBP0 23
USBN0 23
USBP1 23
USBN1 23
USBP2 23
USBN2 23
USBP3 23
USBN3 23
USBP4 23
USBN4 23
USBP5 23
USBN5 23
USBP6 23
USBN6 23
USBP7 23
USBN7 23
USB_OC#1 23
USB_OC#5 23
USBCLK_SB 7
KBCLK# 25
KBDAT# 25
MSCLK# 25
MSDAT# 25
USBN2
USBP2
USBN3
USBP3
USBP7
USBN7
USBP6
USBN6
USBP0
USBN0
USBP1
USBN1
PIRQ#B
PIRQ#A
PIRQ#C
PIRQ#D
RN42
1 2
3 4
5 6
7 8
8P4R-15KR
RN63 8P4R-15KR
7 8
5 6
3 4
1 2
7 8
5 6
3 4
1 2
RN105 8P4R-15KR
RN89
1 2
3 4
5 6
7 8
8P4R-2.7KR
VCC
PREQ#1
PREQ#2
PREQ#3
PREQ#4
PGNT#1
PGNT#2
PGNT#3
PGNT#4
PGNT#5
PREQ#5
PREQ#0
PGNT#0
E
VCC2_5
CB22 X_C1U10Y
CB21 X_C1U10Y
CB20 X_C1U10Y
VCC3
CB23 X_C1U10Y
3VDUAL
CB24 X_C0.01U50X
DEVSEL#
TRDY#
IRDY#
FRAME#
SERR#
PERR#
INTH#
STOP#
RN90
8P4R-2.7KR
1 2
3 4
5 6
7 8
RN88
8P4R-4.7KR
1 2
3 4
5 6
7 8
RN95
8P4R-2.7KR
1 2
3 4
5 6
7 8
RN98
8P4R-2.7KR
1 2
3 4
5 6
7 8
RN99
1 2
3 4
5 6
7 8
8P4R-2.7KR
VCC3
VCC3
VCC3
Micro Star Restricted Secret
Title
Document Number
MICRO-STAR INT'L CO.,LTD.
No. 69, Li-De St, Jung-He City,
Taipei Hsien, Taiwan
B
C
D
http://www.msi.com.tw
VT8235 Part 1
MS-7144
Last Revision Date:
Sheet
Wednesday, March 02, 2005
16 32
E
Rev
100
of
Page 17
A
J10
J11
J12
L18
PDD[15..0] 22
4 4
SDD[15..0] 22
3 3
Using external PHY
2 2
VCC2_5
1 1
PDD[15..0]
PDREQ 22
PDDACK# 22
PDIOR# 22
PDIOW# 22
PIORDY 22
PDCS#1 22
PDCS#3 22
PDA0 22
PDA1 22
PDA2 22
IRQ14 22
SDD[15..0]
SDREQ 22
SDDACK# 22
SDIOR# 22
SDIOW# 22
SIORDY 22
SDCS#1 22
SDCS#3 22
SDA0 22
SDA1 22
SDA2 22
IRQ15 22
X_C0.1U50Y C347
R171 X_360R1%
SRXN_1
SRXP_1
STXP_2 STXP2
near chipset
CP14
FB16
X_601S
near chipset
1 2
C350
C0.1U50Y
A
C1000P50X C361
C1000P50X C360
C1200P25X C359
C1200P25X C358
C1000P50X C356
C1000P50X C352
C1200P25X C353
C1200P25X C351
+2.5VSATA
SDREQ
SDDACK#
SDIOR#
SDIOW#
SIORDY
SDCS#1
SDCS#3
SDA0
SDA1
SDA2
IRQ15
SIDEVREF
SIDECOMP
C349
C1U10Y
PDD0
PDD1
PDD2
PDD3
PDD4
PDD5
PDD6
PDD7
PDD8
PDD9
PDD10
PDD11
PDD12
PDD13
PDD14
PDD15
PDREQ
PDDACK#
PDIOR#
PDIOW#
PIORDY
PDCS#1
PDCS#3
PDA0
PDA1
PDA2
IRQ14
SDD0
SDD1
SDD2
SDD3
SDD4
SDD5
SDD6
SDD7
SDD8
SDD9
SDD10
SDD11
SDD12
SDD13
SDD14
SDD15
STXP1 STXP_1
STXN1 STXN_1
SRXN1
SRXP1
STXN2 STXN_2
SRXN2 SRXN_2
SRXP2 SRXP_2
GNDSATA
AA22
Y24
AA26
AA25
AB26
AC26
AC23
AD25
AD26
AC24
AC25
AB24
AB23
AA24
Y26
AA23
Y23
V24
W26
Y25
Y22
V22
V23
W23
V25
W24
AD24
AC20
AB20
AC21
AE18
AF18
AD18
AD19
AF19
AE20
AF20
AD20
AE21
AF21
AD21
AD22
AF22
AD17
AD23
AF23
AE23
AF17
AF25
AF26
AF24
AC22
AE24
AE26
AC19
AB21
AB13
AC13
AF13
AE13
AB15
AC15
AF15
AE15
W12
W13
W14
W15
W16
AC17
AC11
AB17
AB11
PDD0
PDD1
PDD2
PDD3
PDD4
PDD5
PDD6
PDD7
PDD8
PDD9
PDD10
PDD11
PDD12
PDD13
PDD14
PDD15
PDDREQ
PDDACK
PDIOR
PDIOW
PDRDY
PDCS1
PDCS3
PDA0
PDA1
PDA2
IRQ14
SDD0/TBC1
SDD1/VALID
SDD2
SDD3/RXD2
SDD4/RXD3
SDD5/RXD4
SDD6/RBC0
SDD7/RBC1
SDD8/RXD5
SDD9/RXD6
SDD10/RXD7
SDD11/RXD8
SDD12/RXD9
SDD13/TXD0
SDD14/TXD1
SDD15/TXD2
SDDRQ/RXD1
SDDACK/TBC0
SDIOR/TXD4
SDIOW/TXD3
SDRDY/RXD0
SDCS1/TXD8
SDCS3/TXD9
SDA0/TXD6
SDA1/TXD5
SDA2/TXD7
IRQ15
SVREF
SCOMPP
STXP1
STXN1
SRXN1
SRXP1
STXP2
STXN2
SRXN2
SRXP2
VDDATS
VDDATS
VDDATS
VDDATS
VDDATS
VDDAS
VDDAS
VDDAS
VDDAS
AB14
VDDJ9VDD
GNDATS
AC14
M9
VDD
VDDK9VDDL9VDD
VDD
GNDATS
GNDATS
GNDATS
GNDATS
GNDATS
GNDATS
AE12
AD12
AD13
AD14
AD15
AD16
VDD
GNDATS
B
VCC2_5
M18
N18
P18
R18
T18
U18
V10
V11
V12
V13
V14
VDD
VDDN9VDD
VDDP9VDD
VDDR9VDD
VDDT9VDD
VDDU9VDD
VDDV9VDD
VDD
VDD
VDD
GNDATS
GNDATS
GNDATS
GNDATS
GNDATS
GNDAS
GNDAS
GNDAS
GNDAS
GNDF6GNDF7GNDJ5GNDK5GNDP5GND
AF14
AF12
AF16
AE14
AE16
B
AC16
AC12
VT8237
VT8237
AB16
AB12
PDDACK#
1 - Disable external SATA PHY
PDCS#1
SATA master/slave mode
1 - Disable 0 - Enable
3VDUAL
V15
V16
V17
V18
AA4
VDD
VDD
VDD
VDD
VDD
VSUS33
ACSDIN3/SLP_BTN
GND
GND
GND
GND
GND
R5
L13
L14
L15
L11
L12
R197 X_10KR
R180 10KR
R179 X_10KR
AB4
AB5
AB6
VSUS33
VSUS33
AOLGP/THRM
GPIOA/Strap1
GPIOB/Strap2
GPIOC/Strap0
GPIOD/Strap3
GND
GND
L16
M11
M12
VCC3
VCC3
VSUS2_5
U4
VSUS33
VSUS25T4VSUS25
ACBITCLK
ACSDIN0
ACSDIN1
ACSDIN2
ACSYNC
ACSDO
ACRST
BATLOW
CPUMISS
RING
SUSST1
EXTSMI
SMBALRT
PWRBTN
PWROK
CLKRUN
CPUSTP
PCISTP
INTRUDER
SUSCLK
SMBCK1
SMBDT1
SMBCK2
SMBDT2
SUSA
SUSB
SUSC
GPO0
GPO1
SERIRQ
SPKR
TEST
VDDA0
GNDA0
SREXT
SXO/Strap4
SXI/Strap5
VDDA33
GNDA33
GND
GND
GND
GND
M13
M14
M15
PME
LID
GPI0
GPI1
OSC
TPO
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
K18
VIA-VT8237R
U13B
T1
U3
V2
U1
V3
T2
U2
T3
W4
V4
Y1
Y2
Y3
Y4
AA1
AB1
AC1
AD2
AF1
AB7
AC7
AD6
AE1
AB3
AC4
AB2
AC3
AD1
AA2
AD3
AF2
AE2
AC2
AA3
AE3
AE5
AD5
AF5
AC6
AD9
AF8
AB8
AF9
AE9
AC10
AB10
AD11
AE10
AF10
AE11
AF11
W5
V5
M16
N11
N12
N13
N14
N15
N16
C
VSUS2_5
ACSDIN0
AC_SDIN1
POWERF1
ACSYNC
ACSDO
ACRST
PCI_PME#
BATLOW#
CPUMISS
RI#
SUSST#
THRMS#
EXTSMI#
SMBALRT#
ATADET1
PWRBTN#
PWROK_NB#
CLKRUN#
CPUSTP#
PCISTP#
INTRUDER
SUSCLK
SMBCLK1
SMBDATA1
SMBCLK2
SMBDATA2
SUSA#
SUSB#
SUSC#
GPI0
ATADET0
GPO0
GPO1
GPIOA
GPIOB
GPIOC
GPIOD
SERIRQ
SPKR
APICCLK
TPO
TEST
VDDA0
SREXT
VDDA33
C
VCC2_5
C461
X_C1U10Y
SXO
SXI
C337
C340
C1U10Y
C0.1U50Y
AC_BITCLK
PCI_PME# 15,19,20
SUSST# 12
THRMS# 24
ATADET1 22
PWBTIN# 28
PWROK_NB# 12
SMBCLK1 7,8,27
SMBDATA1 7,8,27
SUSB# 24,27
SUSC# 27
ATADET0 22
SERIRQ 24
SPKR 28
APICCLK 7,18
VCC2_5
C330
C0.1U50Y
R213
4.99KR1%
FB17 X_601S
1 2
C362
C0.1U50Y
SXO
SXI
1 2
C363
C15P50N
STXP_1
STXN_1
SRXN_1
SRXP_1
C460
X_C0.1U50Y
AC_BITCLK 21
C551
X_C10P50N
For EMI
VCC3
CP15
Y3 25MHZ18P_D-1
C367
C15P50N
SATA1
8
1
2
3
4
5
6
7
9
CONN-SATA_orange
D
VT8237
*"ACSYNC" => LPC FWH Command
0 - Enable FWH
1 - Disable FWH(Default)
ACSYNC
R223 4.7KR
GPI0
INTRUDER
RN101
7
5
3
1
8P4R-22R
SUSCLK
RI#
CPUMISS
EXTSMI#
SUSST#
THRMS#
BATLOW#
PCI_PME#
GPO1
SMBALRT#
PWROK_NB#
PWBTIN#
GPO0
SUSB#
SUSC#
ATADET0
ATADET1
SUSA#
AC_SDIN1
CLKRUN#
PCISTP#
CPUSTP#
SERIRQ
TPO
TEST
SPKR
8
6
4
2
8P4R-4.7KR
ACSYNC
ACSDO
ACRST
*"SPKR" => CPU Freq. Adjust Setting
1 - Disable (Default)
0 - Enable
SMBCLK1
SMBDATA1
SMBDATA2
SMBCLK2
SATA2
8
STXP_2
STXN_2
SRXN_2
SRXP_2
1
2
3
4
5
6
7
9
CONN-SATA_orange
D
R225 4.7KR
R222 1MR
AC_SDIN0 ACSDIN0
AC_SYNC
AC_SDOUT
AC_RST#
R235 X_4.7KR
R236 X_4.7KR
R231 X_4.7KR
RN97
RN94 8P4R-4.7KR
RN93 8P4R-4.7KR
RN104
8P4R-1KR
1 2
3 4
5 6
7 8
1 2
3 4
5 6
7 8
1 2
3 4
5 6
7 8
1 2
3 4
5 6
7 8
7 8
5 6
3 4
1 2
1 2
3 4
5 6
7 8
1 2
3 4
5 6
7 8
AC_SDAIN0 21
AC_SYNC 21
AC_SDOUT 21
AC_RST# 21
VCC3
VBAT
3VDUAL
RN103
8P4R-4.7KR
RN102
8P4R-4.7KR
RN100
8P4R-4.7KR
Strapping
VCC3
VCC3
3VDUAL
VCC3
Title
Document Number
MICRO-STAR INT'L CO.,LTD.
No. 69, Li-De St, Jung-He City,
Taipei Hsien, Taiwan
http://www.msi.com.tw
E
*"SA[17:16]" => LDT Frequency
00 - 200MHz (Default)
01 - 400MHz
*"SA18" => LDT Width
0 - 8-Bit (Default)
1 - 16-Bit
*"SA19" => Fast command
0 - Disable (Default)
1 - Enable
GPIOA
GPIOD
GPIOB
GPIOC
GPI
SET
R227
X_330R
X_1KR
Powerf1
0:10/100 LAN(Default Value)
1:GIGA LAN
*"PDA1/SDA1" => External loop test mode
0 - Disable (Default)
1 - Enable
*"PDA2/SDA2" => ROMSIP Select
0 - Disable
1 - Enable(Default)
*"-SDCS3" => Test Mode Select
0 - Disable (Default)
1 - Enable
*"EEDI/-SDCS1" => EEPROM Select
0 - BIOS Porting - ACR
1 - External EEPROM (On-board)(Default)
(VD[5])
VCC3
(VD[6])
(VD[7])
R196 1KR
R194 X_4.7KR
R181 4.7KR
R174 2.7KR
R204 X_4.7KR
R195 4.7KR
For K8T800Pro
0:External HCLK enable
1:Internal HCLK enable
ACSDO
R224 4.7KR
0/1:Enable/disable auto reboot
RN96
8P4R-4.7KR
1 2
3 4
5 6
7 8
VCC
R228
10 - 600MHz
11 - 800MHz
(VD[2])
(VD[3])
POWERF1
PDA1
PDA2
PDCS#3
PDA0
VT8237
Micro Star Restricted Secret
VT8235 Part 2
MS-7144
Last Revision Date:
Wednesday, March 02, 2005
Sheet
17 32
E
(VD[1:0])
SA19
SA17
SA18
SA16
VT8237
VT8237
VT8237
of
(VD[3])
(VD[1])
(VD[2])
(VD[0])
VT8237
(VD[4])
Rev
100
Page 18
A
N21
N22
N23
N24
N25
N26
L21
K21
VD0
VD1
VD2
VD3
VD4
VD5
VD6
VD7
VD8
VD9
VD10
VD11
VD12
VD13
VD14
VD15
VBE
UPCMD
DNCMD
UPSTB
UPSTB
DNSTB
DNSTB
VPAR
VLREF
VCOMPP
VCLK
VIOUT
VIIN
LAD0
LAD1
LAD2
LAD3
LFRM
LREQ0
LREQ1
PWRGD
RSMRST
VBAT
RTCX1
RTCX2
L23
VCCVK
VCCVK
VCCVK
VCCVK
GND
GND
GND
P11
P12
P13
VLAD[0..7] 12
4 4
VBE0# 12
UPCMD 12
DNCMD 12
UPSTB 12
UPSTB# 12
3 3
2 2
1 1
LPC_FRAME# 24
ALL_PWRGD 27,28
DNSTB 12
DNSTB# 12
VPAR 12
R172 360R1%
VCLK 7
LPC_AD0 24
LPC_AD1 24
LPC_AD2 24
LPC_AD3 24
LPC_REQ# 24
RSMRST# 26,27
C377
C10P50N
VLAD0
VLAD1
VLAD2
VLAD3
VLAD4
VLAD5
VLAD6
VLAD7
VBE0#
UPCMD
DNCMD
UPSTB
UPSTB#
DNSTB
DNSTB#
VPAR
VLREF_SB
VCOMPP_SB
VCLK
LPC_AD0
LPC_AD1
LPC_AD2
LPC_AD3
LPC_FRAME#
LPC_REQ#
ALL_PWRGD
RSMRST#
VBAT
X1
X2
Y4
32.768KHZ12.5P_D
C376
A
H25
G26
K26
J23
F26
G25
K22
K24
E24
G23
L26
L25
E26
E25
L24
M26
G24
K23
K25
J26
J24
H26
H24
F24
H22
J22
L22
F23
G22
AD8
AF7
AE7
AD7
AF6
AE6
AE8
AC5
AD4
AF4
AE4
AF3
C10P50N
P22
VCCVK
VCCVK
VCCVK
VCCVK
VCCVK
VCCVK
GND
GND
GND
GND
GND
GND
P14
P15
P16
R11
R13
R12
B
3VDUAL VSUS2_5 VCC2_5
D12
P23
P24
VCCVK
VCCVK
GND
GND
R15
R14
M24
P25
P26
M21
M22
M23
M25
L19
M19
N19
P19
VCCVK
VCCVK
VCCVK
VCCVK
VCCVK
VCCVK
VCCVK
VCCVK
VCCVK
VCCVK
VCCVK
GND
GND
GND
GND
GND
GND
GND
GND
T11
T12
T13
R16
R21
B
GND
GND
GND
GND
T16
T15
T14
W22
W25
AA21
AB19
E12
MIISUS25
MIISUS25
GND
GND
GND
GND
GND
GND
AB22
AB25
AE17
AE19
AE22
AC18
GND
GND
AA9
AE25
E11
E10
D9
MIIVCC
MIIVCCE9MIIVCC
MIIVCC
APICD0/APICCS
APICD1/APICACK
GND
GND
GND
GND
T21
K19
AA10
AB18
MCRS
MCOL
MTXENA
MTXD0
MTXD1
MTXD2
MTXD3
MTXCLK
MRXER
MRXCLK
MRXDV
MRXD0
MRXD1
MRXD2
MRXD3
MDCK
MDIO
PHYRST
EECS
EEDO
EEDI
EECK
RAMVCC
RAMGND
FERR
A20M
IGNNE
INTR
STPCLK
DPSLP
VGATE
VIDSEL
VRDSLP
AGPBZ/GPI6
PCICLK
APICCLK
PLLVCC
PLLGND
INIT
NMI
SMI
SLP
GHI
C
U13C
A11
B11
C11
A10
B10
B9
A9
C10
D10
C9
D8
C8
B8
A8
C7
A7
B7
D7
D11
B12
A12
C12
E7
E6
U24
U26
T24
R26
T25
T26
U25
R24
V26
R22
P21
AC9
AC8
AB9
AD10
R23
U23
R25
T23
T22
U22
VIA-VT8237R
C
MTXD0
MTXD1
MTXD2
MTXD3
EECS
EEDO
EEDI
EECK
+2.5VRAM
GND_RAM
FERR#
A20M#
IGNNE#
CPUINIT#
INTR
NMI_SB
SMI#
STPCLK#
GHI#
ROMLOCK
VGATE
VRDSLP
AGPBZ#
SBPCLK
APICCLK
APICD0#
APICD1#
+2.5VSBPLL
GND_SBPLL
MIICRS 26
MIICOL 26
MIITXEN 26
MIITXCLK 26
MIIRXER 26
MIIRXCLK 26
MIIRXDV 26
MIIRXD0 26
MIIRXD1 26
MIIRXD2 26
MIIRXD3 26
MIIMDC 26
MIIMDIO 26
VT8237
R219 X_2.2R
CB12
X_C1U10Y
VIA AN258
-LDTSTOP 5,11
SATALED 28
SBPCLK 7
APICCLK 7,17
CP12
CB8
C0.1U50Y
VLREF_SB =>
K8T800= 0.625V,
K8M800= 0.45V,
K8T800A= 0.45V
V-Link ->
LVREF=0.625
Volt
C339
C0.1U50Y
C338
C0.1U50Y
D
MIITXD0 26
MIITXD1 26
MIITXD3 26
MIITXD2 26
VCC2_5
R192
360R1%
R191
49.9R1%
D
3VDUAL
VCC3
5VSB
7 8
5 6
3 4
1 2
MIIMDIO
MIITXEN
EEDI
R210 4.7KR
VCC2_5
VCC2_5
VLREF_SB
CB19
X_C0.1U50Y
RN91
8P4R-33R
R216 X_1.5KR
R212 X_1KR
MTXD0
MTXD1
MTXD3
MTXD2
"EEDI"=>Eliminate Lan EEPROM 1/0:ENABLE/DISABLE
1 2
Under SB Bottom
FERR#
APICD0#
APICD1#
APICCLK
ROMLOCK
GHI#
AGPBZ#
VGATE
VRDSLP
R249 1KR
R248 2.7KR
S-BAT54C_SOT23
VBAT1
BAT-2P_SO41
R247 1KR
1 2
Micro Star Restricted Secret
Title
Document Number
MICRO-STAR INT'L CO.,LTD.
No. 69, Li-De St, Jung-He City,
Taipei Hsien, Taiwan
http://www.msi.com.tw
VT8235 Part 3
E
C0.1U50Y CB7
R205 1KR
R203 330R
R173 330R
R193 X_4.7KR
R169 4.7KR
R170 4.7KR
1 2
3 4
5 6
7 8
RN92
8P4R-4.7KR
1 2
D12
3
C419
X_C10U10Y0805
VBAT
C561
C0.01U50X
MS-7144
Last Revision Date:
Wednesday, March 02, 2005
Sheet
E
VCC3
VCC3
VBAT
C420
C0.01U50X
18 32
of
JBAT1
1
2
3
N31-1030011+N33-1
R250
1KR
Rev
100
Page 19
5
PCI Connectors
4
AD[31..0] 16,20
VCC3 VCC3 VCC3
VCC VCC VCC VCC
+12V
C_BE#[3..0] 16,20
3
AD[31..0]
C_BE#[3..0]
2
1
VCC3
+12V
D D
PIRQ#B 15,16,20
PIRQ#D 16,20
PCICLK1 7 PCICLK2 7
PREQ#0 16
C C
IRDY# 16,20
DEVSEL# 16,20
PLOCK# 20
PERR# 16,20
SERR# 16,20
B B
ACK64# 20
-12V
PIRQ#B PIRQ#C
PIRQ#D
PCICLK1
PREQ#0
AD31 AD30
AD29
AD27 AD26
AD25
C_BE#3
AD23
AD21 AD20
AD19
AD17 AD16
C_BE#2
IRDY#
DEVSEL#
PLOCK#
PERR# SDONE
SERR#
C_BE#1 AD15
AD14
AD12 AD11
AD10
AD8 C_BE#0
AD7
AD5 AD4
AD3
AD1 AD0
PCI1
B1
-12V
B2
TCK
B3
GND
B4
TDO
B5
+5V
B6
+5V
B7
INTB#
B8
INTD#
B9
PRSNT1#
B10
RSVD2
B11
PRSNT2#
B12
GND
B13
GND
B14
RSVD5
B15
GND
B16
CLK
B17
GND
B18
REQ#
B19
+5V
B20
AD31
B21
AD29
B22
GND
B23
AD27
B24
AD25
B25
+3.3V
B26
C/BE3#
B27
AD23
B28
GND
B29
AD21
B30
AD19
B31
+3.3V
B32
AD17
B33
C/BE2#
B34
GND
B35
IRDY#
B36
+3.3V
B37
DEVSEL#
B38
GND
B39
LOCK#
B40
PERR#
B41
+3.3V
B42
SERR#
B43
+3.3V
B44
C/BE1#
B45
AD14
B46
GND
B47
AD12
B48
AD10
B49
GND
B52
AD8
B53
AD7
B54
+3.3V
B55
AD5
B56
AD3
B57
GND
B58
AD1
B59
+5V
B60
ACK64#
B61
+5V
B62
+5V
TRST#
+12V
TMS
INTA#
INTC#
RSVD1
RSVD3
GND
GND
RSVD4
RST#
GNT#
GND
RSVD6
AD30
+3.3V
AD28
AD26
GND
AD24
IDSEL#
+3.3V
AD22
AD20
GND
AD18
AD16
+3.3V
FRAME#
GND
TRDY#
GND
STOP#
+3.3V
SDONE
SBO#
GND
PAR
AD15
+3.3V
AD13
AD11
GND
AD9
C/BE0#
+3.3V
AD6
AD4
GND
AD2
AD0
REQ64#
TDI
+5V
+5V
+5V
+5V
+5V
+5V
+5V
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10
A11
A12
A13
A14
A15
A16
A17
A18
A19
A20
A21
A22
A23
A24
A25
A26
A27
A28
A29
A30
A31
A32
A33
A34
A35
A36
A37
A38
A39
A40
A41
A42
A43
A44
A45
A46
A47
A48
A49
A52
A53
A54
A55
A56
A57
A58
A59
A60
A61
A62
PIRQ#A
PIRQ#A 12,15,16,20
PIRQ#C 16,20
PCISLOTRST#
PGNT#0
PCI_PME#
AD28
AD24
AD22
AD18
FRAME#
TRDY#
STOP#
SBO#
PAR
AD13
AD9
AD6
AD2
REQ64# ACK64# ACK64# REQ64#
PCISLOTRST# 20,27
PGNT#0 16
PCI_PME# 15,17,20
FRAME# 16,20
TRDY# 16,20
STOP# 16,20
SDONE 20
SBO# 20
PAR 16,20
REQ64# 20
PREQ#1 16
AD19 AD20
PIRQ#C
PIRQ#A
PCICLK2
PREQ#1
AD31
AD29
AD27
AD25
C_BE#3
AD23
AD21
AD19
AD17
C_BE#2
IRDY#
DEVSEL#
PLOCK#
PERR#
SERR#
C_BE#1
AD14
AD12
AD10
AD8
AD7
AD5
AD3
AD1
-12V
PCI2
B1
-12V
B2
TCK
B3
GND
B4
TDO
B5
+5V
B6
+5V
B7
INTB#
B8
INTD#
B9
PRSNT1#
B10
RSVD2
B11
PRSNT2#
B12
GND
B13
GND
B14
RSVD5
B15
GND
B16
CLK
B17
GND
B18
REQ#
B19
+5V
B20
AD31
B21
AD29
B22
GND
B23
AD27
B24
AD25
B25
+3.3V
B26
C/BE3#
B27
AD23
B28
GND
B29
AD21
B30
AD19
B31
+3.3V
B32
AD17
B33
C/BE2#
B34
GND
B35
IRDY#
B36
+3.3V
B37
DEVSEL#
B38
GND
B39
LOCK#
B40
PERR#
B41
+3.3V
B42
SERR#
B43
+3.3V
B44
C/BE1#
B45
AD14
B46
GND
B47
AD12
B48
AD10
B49
GND
B52
AD8
B53
AD7
B54
+3.3V
B55
AD5
B56
AD3
B57
GND
B58
AD1
B59
+5V
B60
ACK64#
B61
+5V
B62
+5V
TRST#
+12V
TMS
INTA#
INTC#
RSVD1
RSVD3
GND
GND
RSVD4
RST#
GNT#
GND
RSVD6
AD30
+3.3V
AD28
AD26
GND
AD24
IDSEL#
+3.3V
AD22
AD20
GND
AD18
AD16
+3.3V
FRAME#
GND
TRDY#
GND
STOP#
+3.3V
SDONE
SBO#
GND
PAR
AD15
+3.3V
AD13
AD11
GND
AD9
C/BE0#
+3.3V
AD6
AD4
GND
AD2
AD0
REQ64#
+5V
+5V
+5V
+5V
+5V
+5V
+5V
A1
A2
A3
A4
TDI
A5
A6
A7
A8
A9
A10
A11
A12
A13
A14
A15
A16
A17
A18
A19
A20
A21
A22
A23
A24
A25
A26
A27
A28
A29
A30
A31
A32
A33
A34
A35
A36
A37
A38
A39
A40
A41
A42
A43
A44
A45
A46
A47
A48
A49
A52
A53
A54
A55
A56
A57
A58
A59
A60
A61
A62
PIRQ#B
PIRQ#D
3VDUAL 3VDUAL
PCISLOTRST#
PGNT#1
PCI_PME#
AD30
AD28
AD26
AD24
AD22
AD20
AD18
AD16
FRAME#
TRDY#
STOP#
SDONE
SBO#
PAR
AD15
AD13
AD11
AD9
C_BE#0
AD6
AD4
AD2
AD0
PCISLOTRST# 20,27
PGNT#1 16
R184 100R R183 100R
SLOT-PCI
N11-1200031-A10
VCC
PLOCK#
R211 2.7KR
ACK64#
R221 2.7KR
REQ64#
A A
5
SDONE
SBO#
R220 2.7KR
R185 2.7KR
R186 2.7KR
4
3VDUAL
3
C389
X_C0.1U50Y
SLOT-PCI
N11-1200031-A10
2
Micro Star Restricted Secret
Title
Document Number
MICRO-STAR INT'L CO.,LTD.
No. 69, Li-De St, Jung-He City,
Taipei Hsien, Taiwan
http://www.msi.com.tw
PCI Connector 1 & 2
MS-7144
Last Revision Date:
Wednesday, March 02, 2005
Sheet
19 32
1
Rev
100
of
Page 20
5
4
3
2
1
PCI Connectors
VCC3 VCC3
VCC VCC
D D
PIRQ#D 16,19
PIRQ#B 15,16,19
PCICLK3 7
PREQ#2 16
C C
IRDY# 16,19
DEVSEL# 16,19
PLOCK# 19
PERR# 16,19
SERR# 16,19
B B
ACK64# 19 REQ64# 19
-12V
PIRQ#D PIRQ#A
PIRQ#B
PCICLK3
PREQ#2
AD31 AD30
AD29
AD27 AD26
AD25
C_BE#3
AD23
AD21 AD20
AD19
AD17 AD16
C_BE#2
IRDY#
DEVSEL#
PLOCK#
PERR#
SERR#
C_BE#1 AD15
AD14
AD12 AD11
AD10
AD8 C_BE#0
AD7
AD5 AD4
AD3
AD1 AD0
ACK64#
PCI3
B1
-12V
B2
TCK
B3
GND
B4
TDO
B5
+5V
B6
+5V
B7
INTB#
B8
INTD#
B9
PRSNT1#
B10
RSVD2
B11
PRSNT2#
B12
GND
B13
GND
B14
RSVD5
B15
GND
B16
CLK
B17
GND
B18
REQ#
B19
+5V
B20
AD31
B21
AD29
B22
GND
B23
AD27
B24
AD25
B25
+3.3V
B26
C/BE3#
B27
AD23
B28
GND
B29
AD21
B30
AD19
B31
+3.3V
B32
AD17
B33
C/BE2#
B34
GND
B35
IRDY#
B36
+3.3V
B37
DEVSEL#
B38
GND
B39
LOCK#
B40
PERR#
B41
+3.3V
B42
SERR#
B43
+3.3V
B44
C/BE1#
B45
AD14
B46
GND
B47
AD12
B48
AD10
B49
GND
B52
AD8
B53
AD7
B54
+3.3V
B55
AD5
B56
AD3
B57
GND
B58
AD1
B59
+5V
B60
ACK64#
B61
+5V
B62
+5V
TRST#
+12V
TMS
+5V
INTA#
INTC#
+5V
RSVD1
+5V
RSVD3
GND
GND
RSVD4
RST#
+5V
GNT#
GND
RSVD6
AD30
+3.3V
AD28
AD26
GND
AD24
IDSEL#
+3.3V
AD22
AD20
GND
AD18
AD16
+3.3V
FRAME#
GND
TRDY#
GND
STOP#
+3.3V
SDONE
SBO#
GND
PAR
AD15
+3.3V
AD13
AD11
GND
AD9
C/BE0#
+3.3V
AD6
AD4
GND
AD2
AD0
+5V
REQ64#
+5V
+5V
A1
A2
A3
A4
TDI
A5
A6
A7
A8
A9
A10
A11
A12
A13
A14
A15
A16
A17
A18
A19
A20
A21
A22
A23
A24
A25
A26
A27
A28
A29
A30
A31
A32
A33
A34
A35
A36
A37
A38
A39
A40
A41
A42
A43
A44
A45
A46
A47
A48
A49
A52
A53
A54
A55
A56
A57
A58
A59
A60
A61
A62
+12V
PIRQ#C
3VDUAL
PCISLOTRST#
PGNT#2
PCI_PME#
AD28
AD24
AD22
AD18
FRAME#
TRDY#
STOP#
SDONE
SBO#
PAR
AD13
AD9
AD6
AD2
REQ64#
PIRQ#C 16,19
PIRQ#A 12,15,16,19
PCISLOTRST# 19,27
PGNT#2 16
PCI_PME# 15,17,19
R214 100R
FRAME# 16,19
TRDY# 16,19
STOP# 16,19
SDONE 19
SBO# 19
PAR 16,19
AD[31..0] 16,19
C_BE#[3..0] 16,19
AD21
AD[31..0]
C_BE#[3..0]
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10
A11
A12
A13
A14
A15
A16
A17
A18
A19
A20
A21
A22
A23
A24
A25
A26
A27
A28
A29
A30
A31
A32
A33
A34
A35
A36
A37
A38
A39
A40
A41
A42
A43
A44
A45
A46
A47
A48
A49
A52
A53
A54
A55
A56
A57
A58
A59
A60
A61
A62
5VDUAL
VCC3
+12V
PIRQ#D
PIRQ#B
VCC
R232 100R
PCISLOTRST#
PGNT#3
PCI_PME#
AD30
AD28
AD26
AD24
AD22
AD20
AD18
AD16
FRAME#
TRDY#
STOP#
PAR
AD15
AD13
AD11
AD9
C_BE#0
AD6
AD4
AD2
AD0
REQ64#
PGNT#4 16
PIRQ#D 16,19
PIRQ#B 15,16,19
3VDUAL
PGNT#3 16
R233 100R
AD23
AD22
VCC3
5VDUAL
VCC
-12V
PREQ#4 16
PIRQ#A 12,15,16,19
PIRQ#C 16,19
AUXR 21
PCICLK5 7
PCICLK4 7
PREQ#3 16
PIRQ#A
PIRQ#C
AUXL 21
PREQ#3
AD31
AD29
AD27
AD25
C_BE#3
AD23
AD21
AD19
AD17
C_BE#2
IRDY#
DEVSEL#
PLOCK#
PERR#
SERR#
C_BE#1
AD14
AD12
AD10
AD8
AD7
AD5
AD3
AD1
ACK64#
PCI4
B1
-12V
B2
TCK
B3
GND
B4
TDO
B5
+5V
B6
+5V
B7
INTB#
B8
INTD#
B9
PRSNT1#
B10
RSVD2
B11
PRSNT2#
B12
GND
B13
GND
B14
RSVD5
B15
GND
B16
CLK
B17
GND
B18
REQ#
B19
+5V
B20
AD31
B21
AD29
B22
GND
B23
AD27
B24
AD25
B25
+3.3V
B26
C/BE3#
B27
AD23
B28
GND
B29
AD21
B30
AD19
B31
+3.3V
B32
AD17
B33
C/BE2#
B34
GND
B35
IRDY#
B36
+3.3V
B37
DEVSEL#
B38
GND
B39
LOCK#
B40
PERR#
B41
+3.3V
B42
SERR#
B43
+3.3V
B44
C/BE1#
B45
AD14
B46
GND
B47
AD12
B48
AD10
B49
GND
B52
AD8
B53
AD7
B54
+3.3V
B55
AD5
B56
AD3
B57
GND
B58
AD1
B59
+5V
B60
ACK64#
B61
+5V
B62
+5V
TRST#
+12V
TMS
INTA#
INTC#
RSVD1
RSVD3
GND
GND
RSVD4
RST#
GNT#
GND
RSVD6
AD30
+3.3V
AD28
AD26
GND
AD24
IDSEL#
+3.3V
AD22
AD20
GND
AD18
AD16
+3.3V
FRAME#
GND
TRDY#
GND
STOP#
+3.3V
SDONE
SBO#
GND
PAR
AD15
+3.3V
AD13
AD11
GND
AD9
C/BE0#
+3.3V
AD6
AD4
GND
AD2
AD0
REQ64#
+5V
+5V
+5V
+5V
+5V
+5V
+5V
TDI
SLOT-PCI
N11-1200031-A10
VCC3
C332
C263
A A
5
4
X_C0.1U50Y
C325
X_C0.1U50Y
X_C0.1U50Y
3VDUAL
3
C334
X_C0.1U50Y
2
SLOT-PCI_orange
N11-1200161-K06
Micro Star Restricted Secret
Title
Document Number
MICRO-STAR INT'L CO.,LTD.
No. 69, Li-De St, Jung-He City,
Taipei Hsien, Taiwan
http://www.msi.com.tw
PCI Connector 3 & 4
MS-7144
Last Revision Date:
Wednesday, March 02, 2005
Sheet
20 32
1
Rev
100
of
Page 21
5
4
3
2
1
AUDIO CODEC
VCC3
CODEC VCC3_3 NEED CAP
AS CLOSE AS POSSIBLE.
D D
C399
X_C10P50N
AC_SDOUT 17
AC_BITCLK 17
AC_SDAIN0 17
AC_SYNC 17
AC_RST# 17
C C
For EMI
R323
0R
C552
C553
X_C0.1U50Y
C0.1U50Y
R234
33R
C402
C0.1U50Y
+5VR
C405
36
35
34
33
32
31
30
29
28
27
26
25
C383
C1U16Y0805
C384
C1U16Y0805
C370
C1U16Y0805
C371
C1U16Y0805
C0.1U50Y
C386
C0.1U50Y
C401
EC33
+
C10U16EL
C1U10Y
VREFOUT
C387
C392
C1U10Y
X_C4.7U10Y0805
MICIN2
MICIN1
C403 C10U10Y0805
C404 C10U10Y0805
C394
C388
C1U10Y
C1000P50X
LINE_IN_R
LINE_IN_L
C396
C1000P50X
LINE_OUT_R
LINE_OUT_L
FR_MICIN
C397
C1U10Y
C400
X_C1U10Y
VREFOUT
MICIN2
MICIN1
VREFOUT
39
38
NC
37
MONO
AVDD2
24
LOUTR
LOUTL
VRDA
VRAD
AFILT2
AFILT1
VREF
AVSS1
AVDD1
ALC655
U15
NC
NC
NC
42
47
44
40
43
NC48NC
TEST646TEST545TEST4
TEST341TEST2
TEST1
AVSS2
1
DVDD1
AC_14 7
AUXR 20
2
XTL_IN
3
XTL_OUT
4
DVSS1
5
SDATA_OUT
6
BIT_CLK
7
DVSS2
8
SDATA_IN
9
DVDD2
10
SYNC
11
RESET#
12
PC_BEEP
PHONE13AUXL14AUXR15VIDEOL16VIDEOR17CDL18NC19CDR20MIC121MIC222LINL23LINR
AUXL 20
C382
C1U16Y0805
C381
C1U16Y0805
LINE_NEXT_R
LINE_NEXT_L
R76 4.7KR
R75 4.7KR
LINE_IN_R
LINE_IN_L
C216
C1000P50X
C218
C1000P50X
C214
C1000P50X
C215
C1000P50X
C217
C1000P50X
C219
C1000P50X
6
7
8
9
17
AUDIO1A
JACK-EARX3-13P
10
11
12
13
18
AUDIO1B
JACK-EARX3-13P
1
2
4
5
3
AUDIO1C
JACK-EARX3-13P
LINE_OUT
LINE_IN
MIC_IN
14
15
16
C372
C1U16Y0805
C373
B B
+12V +5VR
C554
X_C0.1U50Y
A A
5
U17
VIN3VOUT
GND
2
1
MC78L05ACP_TO92
C555
C10U10Y0805
C556
X_C0.1U50Y
4
C1U16Y0805
C374
C1U16Y0805
R324
X_0R
R307 X_0R
R308 X_0R
4
JCD1
3
AUDIO-CDIN1X4
2
1
JCD1
3
R246
4.7KR
R245
X_4.7KR
2
+5VR
FR_MICIN
LINE_OUT_R
LINE_OUT_L
C416
X_C1000P50N
R244 X_0R
C413
C1000P50N
S FR_MICIN
JAUDIO
JAUD1
1
MIC
S
3
MIC_BIAS
AUD_FPOUT_R5AUD_RET_R
7
HP_ON
AUD_FPOUT_L9AUD_RET_L
N31-2051021+N33-1020031
C417
X_C1000P50N
Title
Document Number
MICRO-STAR INT'L CO.,LTD.
No. 69, Li-De St, Jung-He City,
Taipei Hsien, Taiwan
http://www.msi.com.tw
2
AUD_GND
4
AUD_VCC
6
CUT
8
10
Micro Star Restricted Secret
C-MEDIA 9739A CODEC
MS-7144
Last Revision Date:
Wednesday, March 02, 2005
Sheet
1
C414
X_C1000P50N
+5VR
LINE_NEXT_R
LINE_NEXT_L
C418
X_C1000P50N
of
21 32
C415
X_C1000P50N
Rev
100
Page 22
5
4
3
2
1
ATA 33/66/100 Connector
PDD[15..0] 17
SDD[15..0] 17
PDD[15..0]
SDD[15..0]
PRIMARY IDE CONN.
R64
HDDRST# 27
D D
IDEACTP# 28
C C
B B
HDDRST# 27
IDEACTS# 28
HDDRST#
33R
PDD_7
PDD_6
PDD_5
PDD_4
PDD_3
PDD_2
PDD_1
PDD_0
PDREQ_R
PDIOW#_R
PDIOR#_R
PIORDY_R
PDDACK#_R
IRQ14_R
PDA1_R
PDA0_R PDA2_R
PDCS#1_R
IDEACTP#
IDE1
1 2
3 4
5 6
7 8
9 10
11 12
13 14
15 16
17 18
19 20
21 22
23 24
25 26
27 28
29 30
31 32
33 34
35 36
37 38
39 40
CONN-IDE(20)_yellow
N32-2201091-H06
SECONDARY IDE CONN.
R143
HDDRST#
IDEACTP#
IDEACTS#
PIORDY_R
SIORDY_R
IRQ14_R
IRQ15_R
33R
SDD_7
SDD_6
SDD_5
SDD_4 SDD_11
SDD_3 SDD_12
SDD_2
SDD_1 SDD_14
SDD_0 SDD_15
SDREQ_R
SDIOW#_R
SDIOR#_R
SIORDY_R
SDDACK#_R
IRQ15_R
SDA1_R
SDA0_R
SDCS#1_R
IDEACTS#
R35 10KR
R66 10KR
R53 4.7KR
R108 4.7KR
R48 10KR
R105 10KR
IDE2
1 2
3 4
5 6
7 8
9 10
11 12
13 14
15 16
17 18
19 20
21 22
23 24
25 26
27 28
29 30
31 32
33 34
35 36
37 38
39 40
CONN-IDE(20)_yellow
N32-2201091-H06
VCC
Near SB < 1" ( or Damping Rs)
PDREQ_R
SDREQ_R
PDD7
SDD7
PDD_8
PDD_9
PDD_10
PDD_11
PDD_12
PDD_13
PDD_14
PDD_15
ATADET0
PDCS#3_R
SDD_8
SDD_9
SDD_10
SDD_13
R81
ATADET1
SDA2_R
SDCS#3_R
R52
470R
470R
R198 5.6KR
R115 5.6KR
R202 10KR
R209 10KR
RN77
8P4R-22R0402
SDA0 17
SDCS#1 17
SDCS#3 17
SIORDY 17
SDDACK# 17
IRQ15 17
SDA1 17
SDIOR# 17
SDIOW# 17
SDREQ 17
ATADET1 17
ATADET0 17
SDA0
SDA2
SDCS#1
SIORDY
SDDACK#
IRQ15
SDA1
SDD15
SDD0
SDD14
SDD13
SDD9
SDD6
SDD8
SDD7
PDD7
PDD8
SDD11
SDD4
SDD10
SDD5
SDIOR#
SDIOW#
SDREQ
SDD1
SDD2
SDD12
SDD3
ATADET1
ATADET0
RN80 8P4R-22R0402
RN82 8P4R-22R0402
RN85 8P4R-22R0402
R200 22R0402
R199 22R0402
RN84 8P4R-22R0402
RN79 8P4R-22R0402
RN83 8P4R-22R0402
1 2
3 4
5 6
7 8
1 2
3 4
5 6
7 8
7 8
5 6
3 4
1 2
7 8
5 6
3 4
1 2
7 8
5 6
3 4
1 2
7 8
5 6
3 4
1 2
7 8
5 6
3 4
1 2
SDA0_R
SDA2_R
SDCS#1_R
SDCS#3_R SDCS#3
SIORDY_R
SDDACK#_R
IRQ15_R
SDA1_R
SDD_15
SDD_0
SDD_14
SDD_13
SDD_9
SDD_6
SDD_8
SDD_7
SDD_11
SDD_4
SDD_10
SDD_5
SDIOR#_R
SDIOW#_R
SDREQ_R
SDD_1
SDD_2
SDD_12
SDD_3
PDD_7
PDD_8
IRQ14 17
PDDACK# 17 SDA2 17
PIORDY 17
PDIOR# 17
PDIOW# 17
PDREQ 17
PDCS#1 17
PDCS#3 17
PDA2 17
PDA0 17
PDA1 17
IRQ14
PDDACK#
PIORDY
PDIOR#
PDIOW#
PDREQ
PDD0
PDD15
PDD14
PDD1
PDD13
PDD2
PDD10
PDD5
PDD9
PDD6
PDD12
PDD3
PDD11
PDD4
PDA2
PDA0
PDA1
RN74 8P4R-22R0402
RN78 8P4R-22R0402
PDCS#1
R176 22R0402
PDCS#3 PDCS#3_R
R175 22R0402
RN75 8P4R-22R0402
RN81 8P4R-22R0402
RN76 8P4R-22R0402
RN73
8P4R-22R0402
IRQ14_R
7 8
PDDACK#_R
5 6
PIORDY_R
3 4
PDIOR#_R
1 2
PDIOW#_R
7 8
PDREQ_R
5 6
PDD_0
3 4
PDD_15
1 2
PDCS#1_R
PDD_14
7 8
PDD_1
5 6
PDD_13
3 4
PDD_2
1 2
PDD_10
7 8
PDD_5
5 6
PDD_9
3 4
PDD_6
1 2
PDD_12
7 8
PDD_3
5 6
PDD_11
3 4
PDD_4
1 2
7 8
PDA2_R
5 6
PDA0_R
3 4
PDA1_R
1 2
A A
Micro Star Restricted Secret
Title
Document Number
5
4
3
2
ATA 33/66/100 Connector
MS-7144
MICRO-STAR INT'L CO.,LTD.
No. 69, Li-De St, Jung-He City,
Taipei Hsien, Taiwan
http://www.msi.com.tw
Last Revision Date:
Wednesday, March 02, 2005
Sheet
22 32
1
Rev
100
of
Page 23
5
5VDUAL
FRONT USB PORT
D D
L8
USBN4
USBN4 16
USBP4
USBP4 16
USBN5
USBN5 16
USBP5
USBP5 16
USBN1
USBN1 16
USBP1
USBP1 16
USBN0 USB_D0-
USBN0 16
C C
USBP0 16
1 2
1 2
1 2
1 2
4 3
4 3
X_CMC-L02-9008014-T34
<Priority>
4 3
L9
X_CMC-L02-9008014-T34
<Priority>
4 3
L6
X_CMC-L02-9008014-T34
<Priority>
L7
X_CMC-L02-9008014-T34
<Priority>
1 2
FS1 F-MINISMDC110
1 2
FS2 F-MINISMDC110
USB_OC#5 16
USB 2.0 PIN HEADER
(BLUE)
4
V_FUSB1
V_FUSB2
R238
47KR
USB_OC#5
C408
R239
USB_D4ÂUSB_D4+
USB_D5ÂUSB_D5+
56KR
C0.1U50Y
USB 2.0 PIN HEADER
(BLUE)
USB_D1ÂUSB_D1+
USB_D0+ USBP0
V_FUSB1
+
EC36
_CD470U6.3EL11
JUSB2
1 2
3 4
5 6
7 8
KEY
9
H2X5(9)_yellow-2
N31-2051341-H06
JUSB1
1 2
3 4
5 6
7 8
KEY
9
H2X5(9)_yellow-2
N31-2051341-H06
10
C409
X_C0.1U50Y
10
3
USB_OC#5
USB_OC#5
USB_D5ÂUSB_D5+
+
EC37
_CD470U6.3EL11
USB_D0ÂUSB_D0+
2
1
KBVCC
REAR USB PORT
R58
1 2
1 2
47KR
R61
56KR
L5
X_CMC-L02-9008014-T34
<Priority>
4 3
L4
X_CMC-L02-9008014-T34
<Priority>
4 3
USB_OC#1 16
B B
A A
USB_OC#1
C180
C0.1U50Y
USBN6 16
USBP6 16
USBN7 16
USBP7 16
5
STACKED USB CONNECTOR
EC16
+
.CD1000U6.3EL15
C171
X_C0.1U50Y
USB_D6ÂUSB_D6+
USB_D7ÂUSB_D7+
4
CONN-RJ45_USBX2_LEDX2-20-30u-in
5
6
7
8
1
2
3
4
LAN_USB1A
UP
DOWN
5VDUAL KBVCC
R255 0R1206
R313 X_0R
R314
X_0R
21
22
23
24
25
26
27
28
For EMI
R315
X_0R
CP21
X_COPPER
CP3
X_COPPER
X_COPPER
CP22
USBN3 16
USBP3 16
USBN2 16
USBP2 16
USBN3
USBP3
PGND
3
R256 0R1206
1 2
FS3 X_F-MINISMDC150
L3
X_CMC-L02-9008014-T34
<Priority>
4 3
1 2
L2
X_CMC-L02-9008014-T34
<Priority>
4 3
1 2
2
USB_D3ÂUSB_D3+
USB_D2ÂUSB_D2+
USB1
9
9
1
1
2
2
3
3
4
4
12
12
CONN-USBX2
Micro Star Restricted Secret
Title
Document Number
MICRO-STAR INT'L CO.,LTD.
No. 69, Li-De St, Jung-He City,
Taipei Hsien, Taiwan
http://www.msi.com.tw
USB Port
C162
C0.1U50Y
10
10
5
5
6
6
7
7
8
8
11
11
MS-7144
R56
X_47KR
USB_D2ÂUSB_D2+
Last Revision Date:
Wednesday, March 02, 2005
Sheet
23 32
1
Rev
100
of
Page 24
5
4
3
2
1
Super I/O
LPC_REQ# 18
D D
C C
B B
C0.1U50Y
Power-on strap, enable 48MHz
Distribute near the VCC
power pin of the LPC
VCC
A A
THRMS# 17
5VSB
C306
VCC
C307
X_C0.1U50Y
VCC3
R168
4.7KR
THERMDA_CPU 5
R167
4.7KR
C333
X_C0.1U50Y
R188 0R
VBAT
C319
X_C0.1U50Y
5
PCIDEVRST# 12,27
LPC_FRAME# 18
VCC
C562
C0.1U50Y
SOUTB
C326
C0.1U50Y
SIOPCLK 7
SERIRQ 17
LPC_AD0 18
LPC_AD1 18
LPC_AD2 18
LPC_AD3 18
THERMDA_CPU
VCC3
VCORE
CHASISS
SUSB# 17,27
SIO48M 7
VCC
R190 X_10KR
VREF
VTIN1
FANIO2
CPU_FAN_PWM
FANIO1
VCC3
C320
C0.1U50Y
SOUTA L: Disable KBC
SOUTB
DTRA#
RTSA#
DTRA#
SOUTA
VCC
U10
30
21
23
22
29
27
26
25
24
125
123
128
121
126
124
127
122
120
119
101
102
103
104
93
94
95
96
97
98
99
100
106
107
108
109
110
116
113
115
112
111
105
118
76
19
89
91
92
67
68
64
90
72
73
18
61
74
28
12
48
77
114
W83627THF
L: 24MHZ
L: CFAD=2E
L: PNP Default
RN68 8P4R-4.7KR
7 8
5 6
3 4
1 2
LRESET#
LCLK
SERIRQ
LDRQ#
LFRAME#
LAD0
LAD1
LAD2
LAD3
GPX2/GP13
GPY1/GP15
GPSA1/GP10
GPSA2/GP17
GPX1/GP12
GPY2/GP14
GPSB1/GP11
GPSB2/GP16
MSO/IRQIN0/GP20
MSI/GP21
VREF
VTIN
CPUTIN
SYSTIN
GP26
GP25
GP24
GP23
VIN3
VIN2
VIN1
CPU_VCORE
GP54
GP53
GP52
GP51
GP50
FANPWM1
FANIN1
FANPWM2
FANIN2
OVT#
GP55
GP22
CASEOPEN#
PME#
WDTO/GP33
GP31
GP30
PSOUT#/GP47
PSIN/GP46
SUSLED/GP37
PLED/GP32
PWRCTL#/GP42
SLP_SX#/GP41
CLKIN
VSB
VBAT
VCC3
VCC_1
VCC_2
GP36
VCC_4
H: Enable KBC
H: 48MHZ
H: CFAD=4E RTSA#
H: PNP no Default
GP40
SIO
4
DRVDEN0
SMI#/IRQIN1
INDEX#
MOA#
FANIN3
DSA#
FANOUT3
DIR#
STEP#
WRDATA#
WE#
TRACK0#
WP#
RDDATA#
HEAD#
DSKCHG#
SLCT
BUSY
ACK#
SLIN#
INIT#
ERR#
AFD#
STB#
IRRX/GP34
GP45
IRTX
GP40
DCDA#
DSRA#
SINA
RTSA#
SOUTA
CTSA#
DTRA#
RIA#
DCDB#
DSRB#
SINB
RTSB#
SOUTB
CTSB#
DTRB#
RIB#
GA20M
KBRST
KBDATA
KBCLK
MSDATA
MSCLK
BEEP
RSMRST#/GP44
PWROK/GP43
VSS1
VSS2
GP35
VSS4(AGND)
FLOPPY DISK HEADER
DRVDEN0
1
2
INDEX#
3
MOA#
4
5
DSA#
6
7
DIR#
8
STEP#
9
WRDATA#
10
WE#
11
TRACK0#
13
WP#
14
RDDATA#
15
HEAD#
16
DSKCHG#
17
PD0
42
PD0
PD1
PD2
PD3
PD4
PD5
PD6
PD7
PE
VCC
R148
10KR
41
40
39
38
37
36
35
31
32
33
34
43
44
45
46
47
88
69
87
75
56
50
53
51
54
49
52
57
84
79
82
80
83
78
81
85
59
60
63
62
66
65
58
70
71
20
55
86
117
PD1
PD2
PD3
PD4
PD5
PD6
PD7
GP40
RTSA#
SOUTA
DTRA#
DCDB#
DSRB#
SOUTB
CTSB#
RIB#
BIOS_WP#
BEEP
THERMDC_CPU
CP13
X_COPPER
RSLCT 25
RPE 25
RBUSY 25
RACK# 25
RSLIN# 25
RINIT# 25
RERR# 25
RAFD# 25
RSTB# 25
DCDA# 25
DSRA# 25
SINA 25
RTSA# 25
SOUTA 25
CTSA# 25
DTRA# 25
RIA# 25
DCDB# 25
DSRB# 25
SINB 25
RTSB# 25
SOUTB 25
CTSB# 25
DTRB# 25
RIB# 25
Chasiss Intrusion Header
ALARM 28
Q25
N-PMBS3904_SOT23-RH
THERMDC_CPU 5
JCASE1
1
2
H1X2_black
CONN-FDD(4)(5)(6)V
N32-2173021-H06
RN72 8P4R-4.7KR
CTSB#
DSRB#
DCDB#
RIB#
VBAT
R164
2MR
CHASISS BEEP
3
FDD1
1 2
3 4
5 6
7 8
9 10
11 12
13 14
15 16
17 18
19 20
21 22
23 24
25 26
27 28
29 30
31 32
33 34
PD[7..0] 25
7 8
5 6
3 4
1 2
VCC
+12VA
default is high
PRES4
PRES3
PRES2
PRES1
SYSTEM Thermal
VREF
CPU_FAN_PWM
C470 X_C0.1U50Y
C472
X_C0.1U50Y
+12V
+
EC24
C10U16EL
VCC3
RN86 8P4R-1KR
R178
10KR1%
R187
30KR1%
1
2
3
4
5
6
7
C471
X_C0.1U50Y
R80
4.7KR
R84 27KR
2
SYSTEM ROM
U12
1
VPP
2
PRES3
PRES2
PRES1
PRES0
BIOS_WP#
TBL#
LPC_AD0
LPC_AD1
LPC_AD2
1 2
3 4
5 6
7 8
U16
FAN1_IN
FAN1_DRV
FAN2_IN
FAN1_SEN
VCC12
FAN2_DRV
C1
FAN2_SEN
C2
FAN3_DRV
CHRPMP
FAN3_SEN
GND
X_W83391TS
SYSTEM FAN
SFAN1
3
2
1
FAN1X3_white
N32-1030011-H06
RST#
3
FGPI3
4
FGPI2
5
FGPI1
6
FGPI0
7
WP#
8
TBL#
9
ID3
10
ID2
11
ID1
12
ID0
13
FWH0
14
FWH1
15
FWH2
16
GND
PLCC-32
<Priority>
VCC3
Hardware Monitor
RT1
10KRT1%
SMD
VTIN1
THERMDA_CPU
14
13
12
11
10
9
8
FAN3_IN
R83
10KR
VCC3
32
VCC
31
CLK
30
FGPI4
29
IC(VIL)
28
GNDA
27
VCCA
26
GND
25
VCC
24
INIT#
23
FWH4
22
RFU
21
RFU
20
RFU
19
RFU
18
RFU
17
FWH3
PRES0
BIOS_WP#
TBL#
LPC_INIT#
RN87 8P4R-1KR
Q3
X_N-P3055LD_TO252
G
C469
X_C0.01U50X
R260
X_10KR
R261
X_6.49KR1%
Fan Connector
CPU_FAN_CTRL
+
EC1
C10U16EL
Micro Star Restricted Secret
Title
LPC I/O & ROM & Floppy&Fan
Document Number
MICRO-STAR INT'L CO.,LTD.
No. 69, Li-De St, Jung-He City,
Taipei Hsien, Taiwan
http://www.msi.com.tw
MS-7144
LPC_PCLK PCIDEVRST#
LPC_INIT#
LPC_FRAME#
LPC_AD3
VCC3
+12VA
D
S
PRES4
1 2
3 4
5 6
7 8
R259
0R0805
CPU_FAN_CTRL
+12VA
R3
4.7KR
CFAN1
FAN1X3_white
N32-1030011-H06
Last Revision Date:
Wednesday, March 02, 2005
Sheet
1
LPC_PCLK 7
VCC3
C328
C0.1U50Y
R322
0R0805
CPU FAN
R5
27KR
3
2
1
24 32
of
FANIO1 FANIO2
R6
10KR
Rev
100
Page 25
5
LPT / COM PORTS
RSTB#
RACK#
RBUSY
RPE
RSLCT
RAFD#
RINIT#
RERR#
RSLIN#
PD0
PD1
PD2
PD3
PD4
PD5
PD6
PD7
R33 4.7KR
7 8
5 6
3 4
1 2
7 8
5 6
3 4
1 2
7 8
5 6
3 4
1 2
7 8
5 6
3 4
1 2
RSTB# 24
D D
C C
PD[7..0] 24
PD[7..0]
RACK# 24
RBUSY 24
RPE 24
RSLCT 24
RAFD# 24
RINIT# 24
RERR# 24
RSLIN# 24
RN11
8P4R-4.7KR
RN25
8P4R-4.7KR
RN22
8P4R-4.7KR
RN15
8P4R-4.7KR
BAS32L_LL34
4
VCC
D4
For EMI
RACK#
RBUSY
RPE
RSLCT
RAFD#
RINIT#
RERR#
RSLIN#
PD0
PD1
PD2
PD3
PD4
PD5
PD6
PD7
RSTB#
CP18 X_COPPER
CN4
1 2
3 4
5 6
7 8
8P4C-180P50N
CN7
1 2
3 4
5 6
7 8
8P4C-180P50N
CN6
1 2
3 4
5 6
7 8
8P4C-180P50N
CN5
1 2
3 4
5 6
7 8
8P4C-180P50N
C84 C180P50N
PGND
3
2
1
Keyboard/Mouse Ports
KBVCC
EC3
+
C18
X_C10U16EL
X_C0.1U50Y
PGND PGND
For EMI
KBDAT# 16
KBCLK# 16
MSCLK# 16
R303 X_0R
R304 X_0R
R305 X_0R
PGND
C5
C0.1U50Y
STACKED PS2 CONNECTOR
JKBMS1
14
4
6
2
13
1
5
3
15 17
PGND PGND
CONN-KB_MS
N56-12F0031-F02
16
10
12
8
7
11
9
LPT1
48
CONN-LPT
N51-25F0041-F02
CP19 X_COPPER
CP20 X_COPPER
51
13
25
12
24
11
23
10
22
9
21
8
20
7
19
6
18
5
17
4
16
3
15
2
14
1
52
PGND
RSLCT
RPE
RBUSY
RACK#
PD7
PD6
PD5
PD4
PD3
RSLIN#
PD2
RINIT#
PD1
RERR#
PD0
RAFD#
RSTB#
C0.1U50Y
+12V
-12V
B B
NDCDA# NDSRA#
NSINA
NSOUTA
NDTRA
A A
D10
BAS32L_LL34
C272
C0.1U50Y
D11
BAS32L_LL34
RTSA# 24
DTRA# 24
SOUTA 24
RIA# 24
CTSA# 24
DSRA# 24
SINA 24
DCDA# 24
-12VCOM
1
2
3
4
5
PGND
+12VCOM
RTSA# NRTSA
DTRA# NDTRA
SOUTA NSOUTA
RIA# NRIA#
CTSA# NCTSA#
DSRA# NDSRA#
SINA NSINA
DCDA# NDCDA#
U7
1
VDD(12V)
16
DA1
15
DA2
13
DA3
19
RA1
18
RA2
17
RA3
14
RA4
12
RA5
10
VSS(-12V)
GD75232_SSOP20
I95-7523212-T07
VCC(5V)
DY1
DY2
DY3
RY1
RY2
RY3
RY4
RY5
GND
20
5
6
8
2
3
4
7
9
11
Multiple RS232 Drivers and Receivers
COM1
6
7
8
9
CONN-COM
11 10
N51-09M0021-F02
NRTSA
NCTSA#
NRIA#
NRTSA
NDSRA#
NCTSA#
NRIA#
NDCDA#
NSINA
NSOUTA
NDTRA
RESVD
CN3
1 2
3 4
5 6
7 8
8P4C-180P50N
CN2
1 2
3 4
5 6
7 8
8P4C-180P50N
L1 X_80S/1206
1 2
VCC
PGND
PGND
CP1 X_COPPER
RIB# 24
CTSB# 24
DSRB# 24
SINB 24
DCDB# 24
MSDAT# 16
RTSB# 24
DTRB# 24
SOUTB 24
C282 C0.1U50Y
PGND
5
4
3
MSDAT#
KBDAT#
MSCLK#
KBCLK#
NRTSB
NDSRB#
NCTSB#
NRIB#
NDCDB#
NSOUTB
NSINB
NDTRB
R306 X_0R C304
KBVCC
RN4
1 2
3 4
5 6
7 8
8P4R-4.7KR
R11
X_330R
SERIAL PORT 2
+12VCOM
RTSB#
DTRB#
SOUTB
RIB#
CTSB#
DSRB#
SINB
DCDB#
-12VCOM
1
3
5
7
1
3
5
7
U8
1
VDD(12V)
16
DA1
15
DA2
13
DA3
19
RA1
18
RA2
17
RA3
14
RA4
12
RA5
10
VSS(-12V)
GD75232_SSOP20
NDCDB#
NSOUTB NDTRB
NRTSB
NRIB#
2
4
6
8
2
4
6
8
1
3 4
5 6
7 8
9
CN9
8P4C-180P50N
CN8
8P4C-180P50N
COM2
H2X5(10)_black
COM2
2
C565C180P50N
KBCLK#
MSCLK#
KBDAT#
MSDAT#
C566
C567
C568
C180P50N
C180P50N
C180P50N
PGND
C303 C0.1U50Y
20
VCC(5V)
5
DY1
6
DY2
8
DY3
2
RY1
3
RY2
4
RY3
7
RY4
9
RY5
11
GND
NSINB
2
NDSRB#
NCTSB#
VCC
NRTSB
NDTRB
NSOUTB
NRIB#
NCTSB#
NDSRB#
NSINB
NDCDB#
Micro Star Restricted Secret
Title
KeyBoard/Mouse/LPT/COM
Document Number
MICRO-STAR INT'L CO.,LTD.
No. 69, Li-De St, Jung-He City,
Taipei Hsien, Taiwan
http://www.msi.com.tw
MS-7144
Last Revision Date:
Wednesday, March 02, 2005
Sheet
25 32
1
Rev
100
of
Page 26
A
B
C
D
E
REALTEK 8201CL MII PHY
C239
C0.1U50Y
32
36
C238
29
35
27
GND shielding
31
30
33
34
NET1
28
NET2
43
NET3
40
NET4
39
NET5
38
NET6
37
NET7
41
44
42
AAA
25
26
22
21
20
19
18
16
23
24
46
47
10
12
13
15
14
48
11
17
45
C252
C1U10Y
U5
MDC
MDIO
6
TXD0
5
TXD1
4
TXD2
3
TXD3
2
TXEN
7
TXC
RXDV
RXD0
RXD1
RXD2
RXD3
RXC
1
COL
CRS
RXER/FXEN
X1
X2
9
LED0/PHYAD0
LED1/PHYAD1
LED2/PHYAD2
LED3/PHYAD3
LED4/PHYAD4
8
DVDD25
DVDD33
DVDD33
DGND
DGND
AGND
RTL8201CL
X_COPPER
CP8
C257
X_C10U10Y0805
AVDD25
AVDD33
AGND
AGND
TPRX+
TPRX-
TPTX-
TPTX+
RTSET
ISOLATE
RPTR
SPEED
DUPLEX
LDPS
MII/SNIB/RTT3
RESETB
VDD33
NC
ANE
RN65
MIIRXD3
MIIRXD3 18
MIIRXD2 18
C406
MIIRXD1 18
MIIRXD0 18
X_C0.1U50Y
VCC
C20P50N
C248
3VDUAL
4 4
EMI
VCC3
3 3
MIIRXD1
MIIRXD0
MIITXCLK 18
MIIRXCLK 18
Near
Controler
Y1
25MHZ18P_D-1
C10U10Y0805
1 2
3 4
5 6
7 8
8P4R-33R
MIITXCLK
MIIRXCLK
X_C10P50N
RXD3
RXD1
RXD0
C259
C249
C20P50N
PHY address to
00001b.
VDD33
C241
C243
X_C0.1U50Y
GND
MIIMDC 18
MIIMDIO 18
MIITXD0 18
MIITXD1 18
MIITXD2 18
MIITXD3 18
R111
R104
C250
X_C10P50N
VDD33
MIITXEN 18
22R
MIIRXDV 18
22R
MIICOL 18
MIICRS 18
MIIRXER 18
R112 5.1KR
7 8
5 6
3 4
VDD25
1 2
C261
C0.1U50Y
RN66 8P4R-4.7KR
MIIMDC
MIIMDIO
MIITXD0
MIITXD1
MIITXD2
MIITXD3
MIITXEN
MIIRXDV
RXD0
RXD1
RXD2
RXD3
MIICOL
MIICRS
MIIRXER
ACTLED
AAA
SPDLED
C260
C0.1U50Y
SPDLED
DVDD33 NET8
C0.1U50Y
R95
2KR
VDD25
C244
C10U10Y1206
MX1+
MX1-
MX0ÂMX0+
RSMRST# 18,27
NET3
NET4
NET5
NET6
NET8
NET2
NET7
VDD33
VDD33
49.9R1%
C0.01U50X
MX1+
MX1- MIIRXD2 RXD2
MX0ÂMX0+
R91
49.9R1%
R93
49.9R1%
49.9R1%
C235
C234
C0.01U50X
SPDLED
R63
330R
ACT FAIL WHEN 2 PC Connect
3VDUAL
VDD25
C0.1U50Y
R57 330R
C1000P50X
C564
C179
C0.1U50Y
C187
MX1-
ACTLED
MX1+
MX0-
MX0+
CONN-RJ45_USBX2_LEDX2-20-30u-in
AMBER+
17
AMBER-
18
9
13
10
14
11
15
12
16
GREEN+
19
GREEN-
20
C192
LAN_USB1B
C0.1U50Y
RDN
RDP
TDN
TDP
NC
NC
NC
NC
R94
R92
Use K8T800Pro remove all
components
VCC
VGA CONNECTOR
F1
C112
X_C22P50N
X_F-MICROSMD110
POLY SWITCH
CB4
X_C0.1U50Y
16
10
17
JVGA1
6
1
11
7
2
12
8
3
13
9
4
14
5
15
X_CONN-VGA
R38 X_0.082U300m
R41 X_0.082U300m
C101
X_C22P50N
2 2
1 1
AB
AR
3
1
2
AR 12
AG 12
AB 12
D6
7
3
1
2
445
X__Z-PACDND006M_MSOP8
VSYNC 12
HSYNC 12
A
VCC
7
8
8
6
6
5
R49
X_75R
VVSYNC AG
VHSYNC
R50
X_75R
FB5 X_30L500m_200
FB4 X_30L500m_200
FB3 X_30L500m_200
VCC
R42
X_4.7KR
C124
X_C22P50N
VCC
B
C118
X_C22P50N
VVSYNC
VHSYNC
C131
C130
R51
X_75R
X_C22P50N
Trace Note:
1.The 5V traces should be 20 mils to VGA/DFP
C132
X_C22P50N
R40 X_33R1%
R45 X_33R1%
X_C22P50N
R39
X_4.7KR
VCC
R44
X_1.8KR
C96
X_C22P50N
C
R37
X_1.8KR
DDCDATA 12
DDCCLK 12
For EMI
R317
0R
Micro Star Restricted Secret
Title
Document Number
D
REALTEK 8201BL MII PHY
MS-7144
MICRO-STAR INT'L CO.,LTD.
No. 69, Li-De St, Jung-He City,
Taipei Hsien, Taiwan
http://www.msi.com.tw
Last Revision Date:
Wednesday, March 02, 2005
Sheet
26 32
E
Rev
100
of
Page 27
8
3VSB MODE SELECT
3VSB MODE
D D
SINGLE MOSFET
DUAL MOSFET
VDIMM LINEAR OR PWM SELECT
VDIMM MODE
LINEAR REGULATOR
PWM REGULATOR
C C
FRONT PANEL RESET BUTTON
PCIRST# INPUT
3VDLDEC#
PULL HIGH
PULL LOW
EXTRAM
PULL LOW
PULL HIGH
C255
C22P50N
PCIRST# BUFFER OUTPUT
PCI SOLT PCIRST# BUFFER OUTPUT
1.25VREF
C468
C0.1U50Y
B B
PS_OUT# 28
CONNECT TO SOUTH BRIDGE SUSB# SIGNAL
SUSB# 17,24
THE TWO BLOCK CHOICE ONE
SUPPORT SYSTEM POWER CONTROL
DDR TERMINATION
3VDUAL
U3
8
C236
C0.1U50Y
8
VREF2
7
ENABLE
6
VCNTL
5
BOOT_SEL
W83310DS_SOIC8
A A
GND
VREF1
VOUT
GND
9
VIN
R316
0R
VDD_25_SUS
1
2
3
4
7
PCISLOTRST# 19,20
R85
7
PLED1 28
SUSLED 28
PCIDEVRST# PCISLOTRST#
C265
C33P50N
PCIDEVRST# 12,24
VCORE_EN 14
5VSB
R102
4.7KR
G
R87 100R1%
100R1%
VTT_DDR_SUS
1 2
EC9
+
+
.CD1000U6.3EL15
N-PMBS3904_SOT23-RH
N-PMBS3904_SOT23-RH
FP_RST# 7,28
PCIRST# 15,16
HDDRST# 22
PG_VCORE 14
R110 33R
VCC3
VDDA_25
5VSB
CLOSE TO CHIP
R101
10KR
C247
C0.1U50Y
D S
Q33
N-2N7002_SOT23
1 2
EC2
EC27
+
.CD1000U6.3EL15
.CD1000U6.3EL15
6
5VSB
R120
330R
R134
330R
VCC3
VCC
VCC
1 2
C269
+
C4.7U10Y0805
R131
4.7KR
5VSB
R125
4.7KR
R117
220R0805
C254
C262
C0.1U50Y
C0.1U50Y
5VSB
R100 4.7KR
Q20
5VSB
Q21
R118
330R
1.25VREF
EC29
X_.CD100U16EL11
DDR AND DDR II VOLT SELECT
DDRTYPE
PULL LOW
PULL HIGH
C232
C0.1U50Y
6
5VSB
R133
R124
R132
X_1KR
3VDLDEC#
R123
10KR
X_1KR
EXTRAM
10KR
1
FP_RST#
2
PCIRST#
3
HDD_RST#
4
DEV_RST#
5
VDD_GD
6
VDD_EN
7
1.25VREF
8
VCC5
9
SLOT_RST#
10
VCC3
11
2.5VDDA
12
AGND0
C246 C0.22U10X
C242
X_C10U10Y0805
VDIMM
2.5V
1.8V
5
VCC2_5 3VDUAL 3VDUAL
R122
R106
330R
330R
41
38
39
44
42
43
45
48
46
47
S3#40S5#
5VSB
I2C_CLK
PWR_OK
RSMRST#
I2C_DATA
CPU_PWGD
CHIP_PWGD
PLED1/EXTRAM
PLED0/3VDLDEC#
1.2VLDT_DRV
1.2VLDT_SEN
TMP_FAULT#
PSIN#13PSOUT#14MEMBT15SS165VSB17DDRTYPE18VDIMM_LSEN
C245
R99
100R1%
C0.1U50Y
5
VDIMM_LDRV
VDIMM_HSEN
19
20
21
C230
C1U16Y0805
.CD1000U6.3EL15
VDIMM_HDRV
3VSB_SEN233VSB_DRV
22
+
EC22
4
LINEAR MODE
THESE OUTPUT AND INPUT PIN MUST
BE PULL HIGH
R121
10KR
5VSB
C271
C0.1U50Y
37
GND
5VUSB_DRV
VAGP_DRV
VAGP_SEN
24
U6
C270
36
C1
35
C2
CHRPMP
AGND1
5V_DRV
WD_DET
WATCHING DOG TIMER SELECT
34
33
32
31
30
29
28
27
26
25
(MS-6-RBF)
R107
10KR
VCC2_5
WD_DET
C0.1U16X
PULL HIGH
VCC3
EC25
.CD1000U6.3EL15
S
Q17
D
D
N-P3055LD_TO252
S
+
+
VDD_25_SUS
4
N-P3055LD_TO252
G
R98
100R1%
Q18
G
EC26
.CD1000U6.3EL15
5VSB_DRV
5V_DRV
R116
X_10KR
5VSB
CPU_GD 5
ALL_PWRGD 18,28
SMBCLK1 7,8,17
SMBDATA1 7,8,17
RSMRST# 18,26
SUSC# 17
SUSB# 17,24
PW_OK 28
CHARGE PUMP
VOLTAGE
9VSB
OUTPUT
C268
C1U16Y0805
THRM# 5
R113
10KR
TIMER
OFF PULL LOW
ON
THE VDIMM_HSEN IN LINEAR MODE
DDRTYPE
DDR
DDR II
THIS POINT VOLT CAN'T SETTING
BELOW 2.9V
3
CONNECT TO CPU
CPU PWR_GD OUTPUT
CHIP PWR_GD OUTPUT
I2C BUS
I2C BUS
CONNECT TO SOUTH BRIDGE RSMRST# SIGNAL
SOUTH BRIDGE POWER CONTROL(SLP_S4# OR SUSB#) SIGNAL
SOUTH BRIDGE POWER CONTROL(SLP_S3# OR SUSC#) SIGNAL
ATX POWER OK INPUT
VCC
VCC
+
EC32
.CD1000U6.3EL15
C421 X_C22P50N
C422 X_C22P50N
1
+
EC23
.CD1000U6.3EL15
Q32
1
2
3
4 5
NN-P07D03LV_SO8
VDD
Q15
2 3
4
N-APM2054N_SOT89
VDD_12_A
2
5VSB
8
7
6
THE TWO MODE ONLY ONE MODE PRESENT
SINGLE MODE DUAL MODE
THIS MODE SELECT BY PIN
47 PULL HIGH 5VSB
VDIMM_HSEN
VREF
2.0V
1.7V
3
3VDUAL
THIS MODE SELECT BY
PIN 47 PULL LOW
3VSB REGULATE BY 5VSB AND VCC3
VCC3
5V_DRV
3VSB_DRV
+
EC34
.CD1000U6.3EL15
1
2
3
4 5
NN-P07D03LV_SO8
Title
ACPI POWER CONTOLLER (MS-6)
Document Number
MICRO-STAR INT'L CO.,LTD.
No. 69, Li-De St, Jung-He City,
Taipei Hsien, Taiwan
http://www.msi.com.tw
2
+
EC35
D
N-P3055LD_TO252
S
VDDQ
+
EC28
.CD1000U6.3EL15
5VSB
8
7
6
.CD1000U6.3EL15
Q30
5VDUAL
VCC3
Q16
G
Micro Star Restricted Secret
MS-7144
Last Revision Date:
Sheet
1
Rev
100
Wednesday, March 02, 2005
27 32
of
1
Page 28
5
4
3
2
1
FRONT PANEL System Voltage Regulator
VCC
HDD+
330R
D D
R243
For MSI / Intel Front Panel
JFP1
H2X5(10)_black-N31-2051231
N31-2051231-H06
1
HDD+
3
HDDÂRESET-5PWSW+
7
RESET+
9
NC
PLED
SLED
PWSW-
PLED1
2
SUSLED
4
PWRSW
6
8
R242 100R
PWBTIN# 17
C411
C0.1U50Y
FP_RST# 7,27
VCC3
R240
4.7KR
X_C0.1U50Y
HDDLED
R241 100R
C410
VCC3
VCC
C329
C0.1U50Y
EC30
+
.CD1000U6.3EL15
U11
LT1087S_SOT89
VIN3VOUT
ADJ
1
2
R182
360R1%
R177
390R1%
VCC2_5
+
EC31
.CD1000U6.3EL15
BUZ+
BUZ-
VCCSPK
R229
180R0805
1
2
3
4
5
6
7
8
9
10
VCC3
2
4
6
8
VCC
C395
X_C0.1U50Y
VCC
5VSB
C173
C0.1U50Y
4
VCC
R62
4.7KR
PW_OK
C190
C0.1U50Y
HDDLED
PW_OK 27
D5
BAS32L_LL34
D8
BAS32L_LL34
D9
BAS32L_LL34
IDEACTP# 22 SUSLED 27
IDEACTS# 22
SATALED 18
R67 4.7KR
3
VCC
VDD VDDQ
3VDUAL
R96
VSUSNB
X_200R1%
R88
X_390R1%
D13
X_BAS32L_LL34
3VDUAL
C570
C1U10Y
R208
X_49.9R1%
R207
X_200R1%
VSUS2_5
C342
C10U10Y0805
POWER OK Circuits
3VDUAL VSUS2_5
R145
4.7KR
ALL_PWRGD 18,27
-LDTRST 11
R144
1KR
R147
1KR
Q22
N-PMBS3904_SOT23-RH
Q23
N-PMBS3904_SOT23-RH
2
3VDUAL
R146
4.7KR
-CPURST 5
Q24
N-PMBS3904_SOT23-RH
Title
Document Number
MICRO-STAR INT'L CO.,LTD.
No. 69, Li-De St, Jung-He City,
Taipei Hsien, Taiwan
http://www.msi.com.tw
5VSB VSUS2_5
U18
LT1087S_SOT89
VIN3VOUT
C569
C10U10Y1206
RN107 8P4R-47R
1
2
3
4
5
6
7
8
D14
L432M3B_SOT23
ADJ
1
VSUSNB
2
R320
100R1%
2
R321
3 1
499R1%
Micro Star Restricted Secret
System Regulator&Front Panel
MS-7144
Last Revision Date:
Wednesday, March 02, 2005
Sheet
28 32
1
of
R318
360R1%
R319
390R1%
Rev
100
CLK_RESET# 7,27
C C
B B
PS_OUT# 27
A A
PLED1 27
PS_OUT#
C205
X_C1000P50N
5
SUSLED
PLED1
ALARM 24
SPKR 17
ATX Power Connector
VCC3
11
-12V
-5V
VCC +12V
12
13
14
15
16
17
18
19
20
GND1SPEAKER
3
SLED
5
PLED
JFP2
H2X4(7)_color-N31-2041101
N31-2041101-H06
R230
1KR
JWR1
3.3V
-12V
GND
PS_ON
GND
GND
GND
-5V
PW_OK
5V
5V
PWR-ATX20
Q31
N-PMBS3904_SOT23-RH
3.3V
3.3V
GND
5V
GND
5V
GND
5V_SB
12V
Page 29
5
4
3
2
1
BULK / Decopuling
C390
X_C0.1U50Y
VCC3
C557
C0.1U50Y
VCC
C137
X_C0.1U50Y
VCC VCC
C559
C0.1U50Y
VCC3
C380
C0.1U50Y
EMI
C169
C0.1U50Y
C336
X_C0.1U50Y
C459
X_C0.1U50Y
C331
X_C0.1U50Y
C560
C0.1U50Y
C344
C0.1U50Y
C208
C1000P50X
C223
C0.1U50Y
VCC3
C327
C0.1U50Y
VCC2_5
VCC3 VCC2_5
C407
C0.1U50Y
C355
C1000P50X
Place on CPU Solder side
VCORE
D D
C C
C433
X_C0.22U16Y
C69
C0.01U50X
VCC3
VCC3
VCC
C226
C0.1U50Y
C341
C0.1U50Y
C412
C0.1U50Y
C368
X_C0.1U50Y
X_C0.1U50Y
VCC
C26
C0.1U50Y
C345
C0.1U50Y
C558
CPU
Place on inside of CPU Cavity ( 10 *
0.22uF/0603 X7R high-freq decoupling Cap. )
For EMI
ATX VIA-Hole * 9
MH2
1
CENTER
2
GND
3
GND
4
GND
5
GND
X_150 Drill / 300 Pad-0
MH4
1
CENTER
2
GND
3
GND
4
GND
5
GND
X_150 Drill / 300 Pad-0
MH6
1
CENTER
2
GND
3
GND
4
GND
5
GND
X_150 Drill / 300 Pad-0
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
6
7
8
9
6
7
8
9
6
7
8
9
MH5
1
CENTER
2
GND
3
GND
4
GND
5
GND
X_150 Drill / 300 Pad-0
MH3
1
CENTER
2
GND
3
GND
4
GND
5
GND
X_150 Drill / 300 Pad-0
MH1
1
CENTER
2
GND
3
GND
4
GND
5
GND
X_150 Drill / 300 Pad-0
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
6
7
8
9
6
7
8
9
6
7
8
9
PGND
SYSTEM
5VSB
B B
C293
C385
X_C0.1U50Y
C0.1U50Y
Buck-decoupling Mid-Freq. decoupling Cap.
( 7 * 4.7uF / 0805 , 4*10uF/1206)
VCORE
C10U10Y1206
C83
C10U10Y1206
A A
FM3
FM2
X
X
X_FM
X_FM
F_PAD_M120
C97
C104
X_C1U25Y1206
FM8
X
X_FM
5
C10U10Y1206
C92
FM4
X
X_FM
X_C10U10Y0805
C78
X_C10U10Y0805
FM1
X
X_FM
C427
FM6
X
X_FM
X_C10U10Y0805
C430
X_C10U10Y0805
FM7
X
X_FM
C434
FM5
X
X_FM
4
VCC3
C335
X_C0.1U50Y
3VDUAL
C398
X_C0.1U50Y
VCC
C379
C0.1U50Y
C348
X_C0.1U50Y
T2
1
2
X_YJ102
C375
X_C0.1U50Y
+12V -12V
VCC
C175
X_C0.1U50Y
C224
C391
X_C0.1U50Y
C0.1U50Y
C354
C0.1U50Y
C222
C0.1U50Y
Impedance Test
T1
1
2
X_YJ102
3
C357
X_C0.1U50Y
-5V
C184
C0.1U50Y
VCC3
X_C0.1U50Y
VCC
C378
X_C0.1U50Y
C393
C168
+12V
C0.1U50Y
Micro Star Restricted Secret
Title
Document Number
MICRO-STAR INT'L CO.,LTD.
No. 69, Li-De St, Jung-He City,
Taipei Hsien, Taiwan
2
http://www.msi.com.tw
BULK / Decopuling
MS-7144
Last Revision Date:
Sheet
1
Wednesday, March 02, 2005
29 32
Rev
100
of
Page 30
5
K8 CPU Power
4
NB & SB & AGP Power
3
2
1
Other Power
DDR Side CPU Side
K8 Vcore ->
"VCORE" (60A)
D D
VDDA_2.5 Power ->
DDR Power ->
"VDD_25_SUS"
(9.5A)
"VDDA_25" (0.11A)
DDR-VTTPower ->
HT Power ->
"VDD_12_A"&"VLDT0"
"VTT_DDR_SUS"
(5.21A)
NB & SB Core-Power
-> "VCC2_5" (?A)
NB & SB Core-Suspend
Power -> "VSUS2_5" (?A)
NB AGP8X Power ->
"VDDQ" (1.5A)
5VDUL
3VDUL
DDR_3VDUAL
9VSB
(2A)
ATX Power
Supply
C C
+5VSB
5VDUAL
3VDUAL
VSUS2_5
-> SB
( Q36.5) ( Q35.3 ) ( Q22/S )
VCC
Charge Pump
-> 9VSB
MS-6.34
VCORE ->
B B
+12V
K8 CPU
( CHOK2/2 )
+5VR ->
Audio
DDR_25_SUS
-> DDR
( Q13/S )
( U21/2 )
VCC1_8 ->
VCC3
SATA
( VR1/2 )
VDDA_25 ->
K8 CPU(I/O)
VTT_DDR_SUS
-> DDR
( Q8/4 )
FB2
A A
VDDQ ->
AGP
( Q28/S )
Micro Star Restricted Secret
Title
Document Number
MICRO-STAR INT'L CO.,LTD.
No. 69, Li-De St, Jung-He City,
Taipei Hsien, Taiwan
http://www.msi.com.tw
Power Generation
MS-7144
Last Revision Date:
Wednesday, March 02, 2005
Sheet
1
30 32
of
Rev
100
-12V
5
VCC1_5 ->
NB & SB
( VLINK )
( Q21/S )
4
VDD_12_A
-> HT
( Q19/1 )
3
2
Page 31
5
4
3
2
1
Ver. 00A 2004/06/27
New SPEC(Copy from 7032-10A)
D D
C C
B B
A A
Micro Star Restricted Secret
Title
Document Number
MICRO-STAR INT'L CO.,LTD.
No. 69, Li-De St, Jung-He City,
Taipei Hsien, Taiwan
5
4
3
2
http://www.msi.com.tw
History
MS-7144
Last Revision Date:
Wednesday, March 02, 2005
Sheet
31 32
1
Rev
100
of
Page 32
5
4
3
2
1
PCB1
D D
_
P50-0714410-T53
U12_X
_W39V040A
M31-39V0418-W03
U2_1
C C
CPU_RM
U2_2
1
2
CPU_RM
VBAT1_X
BAT-BCR2032P
D06-0100101-P01
U4-F
MSI
DDR
X_NB-HEATSINK-W/Fan
?
U4-H
MSI
DDR
_E31-0400310
E31-0401520-K08
B B
A A
Micro Star Restricted Secret
Title
Document Number
5
4
3
2
OPTION PART
MS-7144
MICRO-STAR INT'L CO.,LTD.
No. 69, Li-De St, Jung-He City,
Taipei Hsien, Taiwan
http://www.msi.com.tw
Last Revision Date:
Wednesday, March 02, 2005
Sheet
32 32
1
Rev
100
of