Page 1
5
4
3
2
1
MS-7142 VER:100
Page Title
Cover Sheet 1
*AMD PGA 754 K8-Processor (DDR 400)
D D
*VIA K8M800
*VIA VT8237R
(AGP 8X / VLink 8X)
*Winbond 83627THF LPC I/O
*VIA VT6103L 10/100 Base-T LAN
*USB 2.0 support (integrated into VT8237R)
*VIA VT1617 AC'97 Codec
*DDR DIMM * 2
*AGP SLOT * 1 ( 8X )
C C
*PCI SLOT * 3
B B
Block Diagram 2
GPIO SPEC
3
AMD K8 -> 754 PGA Socket 4,5,6
Clock Synthesizer
System Memory
DDR DIMM 1 & 2
DDR Terminations R & C
DDR Damping R & Bypass Cap.
NB VIA K8M800/K8T800 PRO (HT)
K8 Vcore Power
AGP SLOT 8X
VT8237R
PCI Connectors * 3
VIA VT1617 AC'97 CODEC
IDE ATA 66/100 Connectors * 2
Front and Rear USB Port
LPC I/O W83627THF& ROM & Floppy&Fan
KeyBoard/M o u s e/LPT/COM Connectors
VIA VT6103L 10/100 LAN & VGA Connector
ACPI Power Controller (MS-6)
System Regulator&Front Panel
Decoupling Cap.
Power Sequence
History
Option Parts
7
8
9
10
11,12,13
14
15
16,17,18
19,20
21
22
23
24
25
26
27
28
29
30
31
32
EMI Parts 33
A A
Micro Star Restricted Secret
Title
Document Number
MICRO-STAR INT'L CO.,LTD.
5
4
3
2
Stelly Chang
No. 69, Li-De St, Jung-He City,
Taipei Hsien, Taiwan
http://www.msi.com.tw
Cover Sheet
MS-7142
Last Revision Date:
Friday, Decemb er 1 7, 2004
Sheet
1
Rev
100
of
13 3
Page 2
5
4
3
2
1
Block Diagram
D D
CPUCLK+ & CPU CLK-(100/133/166/200)
AMD K8 Socket 754
HCLK+ & HCLK -(100/133/166/200) / GCLK(66)
SYSTEM CLOCK
Synthesizer /
ICS950410AF
C C
AGPCLK(66)
A
G
P
AGP 8X /Fast Write
S
L
O
T
K8M800/K8T800 pro
HT
VIA
DDR400
DDR * 2
VCLK(66) / OSC(14) / PCISB(33) / USBCLK(48) / APICCLK(14)
VLINK
PCICLK[1~3]
B B
4 PCI Slots
PCI-33
AC97 => S/W Audio
VIA VT1617
VT8237
AC97
Dual ATA 100/133
LPC BUS
USB
A A
AC_14(14)
SERIAL ATA *2
Dual USB 1.1 OHCI
/2.0 EHCI 8 Ports
==> Front-Port *4 ,
Back-Port *4
10/100 LAN
VIA VT6103L
SIOPCLK(33) /SIO48M(48)
5
4
3
MII
IDE Slot
==>ATA66,100,133 *2
SUPER I/O
W83627THF
2
2M ROM
LPC
BUS
Micro Star Restricted Secret
Title
Document Number
MICRO-STAR INT'L CO.,LTD.
No. 69, Li-De St, Jung-He City,
Taipei Hsien, Taiwan
http://www.msi.com.tw
1
Block Diagram
MS-7142
Last Revision Date:
Sheet
Rev
Friday, December 17, 2004
23 3
of
100
Page 3
5
GPIO FUNCTION
4
3
2
1
Default
Function
GPI0
GPI1
EXTSMI#
RING#
LID#
BATLOW#
AGPBZ
GPI7
GPI8
UDPWREN
GPI10
GPI11
GPI12
GPI13
GPI14
INTRUDER#
CPUMISS
AOLGP1
APICCLK
3
4.7K ohm Pull up to VBAT
ATADET0=>Detect IDE1 ATA100/66
4.7K ohm Pull up to 3VDUAL
4.7K ohm Pull up to 3VDUAL
ATADET1=>Detect IDE2 ATA100/66
4.7K ohm Pull up to 3VDUAL
4.7K ohm Pull up to VCC3
2.7K ohm Pull up to VCC3
4.7K ohm Pull up to VCC3
NA
330 ohm Pull up to VCC3
330 ohm Pull up to VCC3
NA
NA
NA
2.7K ohm Pull up to VCC3INTH#
1M ohm Pull up to VBAT
4.7K ohm Pull up to 3VDUAL
THRMS#
4.7K ohm Pull up to 3VDUAL
APICCLK
IDSEL
PREQ#0
PGNT#0
PREQ#1
PGNT#1
PREQ#2
AD19
AD20
AD21
CLOCK REQ#/GNT#
PCICLK1
PCICLK2
PCICLK3
USB
Rear
Front
PCI RESET DEVICE
Signals Target
PCISLOTRST#
PCIDEVRST#
HD_RST#
PCIRST# AGP SLOT
DDR DIMM Config.
DEVICE
DIMM 1
DIMM 2
CLK GEN PIN OUT MCP1 INT Pin
22 (PCICLK5)
23 (PCICLK6)
21 (PCICLK4)
2
Port DATA +/-
USB1
LAN_USB1
JUSB1
JUSB2
PCI slot 1-3
NB , Super I/O
Primary, Scondary IDE
1010000XB
1010001XB
Title
Document Number
MICRO-STAR INT'L CO.,LTD.
No. 69, Li-De St, Jung-He City,
Taipei Hsien , Taiwan
http://www.m si.com.tw
USB1USB1+
USB0USB0+
USB2USB2+
USB3USB3+
USB4USB4+
USB5USB5+
USB6USB6+
USB7USB7+
OC#
USB_OC#1
( OC#0~1 )
USB_OC#2
( OC#2~3 )
USB_OC#5
( OC#4~7 )
CLOCK ADDRESS
MEMCLK_H5/MEMCLK_L5
MEMCLK_H0/MEMCLK_L0
MEMCLK_H7/MEMCLK_L7
MEMCLK_H4/MEMCLK_L4
MEMCLK_H1/MEMCLK_L1
MEMCLK_H6/MEMCLK_L6
Micro Star Restricted Secret
GPIO Spec.
MS-7142
Last Revision Date:
Friday, December 17, 2004
Sheet
1
Rev
100
of
33 3
/GPIOAGPO24/GPI24
/GPIOB
/GPIOC
/GPIOD
5
Default
Function
GPO0
GPO1
SUSA#
SUSST#
SUSCLK
CPUSTP#
PCISTP#
GPO7
GPI8
UDPWREN
GPI10
GPI11
GPI12
GPI13
GPI14
GPI15
GPI20/ACSDIN2
GPI21/ACSDIN3
GPI22
GPI23
GPI24
GPI25
SMBDT2
SMBCK2
GPO28
/VIDSEL
GPO29
/VRDSLP
GPI30
GPI31
NA
NA
4.7K ohm Pull up to 3VDUAL
4.7K ohm Pull up to 3VDUAL
SUSST#
4.7K ohm Pull up to 3VDUAL
4.7K ohm Pull up to VCC3
4.7K ohm Pull up to VCC3
2.7K ohm Pull up to VCC3
4.7K ohm Pull up to VCC3
NA
330 ohm Pull up to VCC3
330 ohm Pull up to VCC3
NA
NA
NA
2.7K ohm Pull up to VCC3INTH#
4.7K ohm Pull down
4.7K ohm Pull down
4.7K ohm Pull up to VCC3
4.7K ohm Pull up to VCC3
4.7K ohm Pull down
4.7K ohm Pull down
4.7K ohm Pull up to 3VDUAL
4.7K ohm Pull up to 3VDUAL
SATA_LED
4.7K ohm Pull down
4.7K ohm Pull down
4.7K ohm Pull down
4
PIN NAME Function define
D D
GPO0 (VDDS)
GPO1(VDDS)
GPO2/SUSA#
(VDDS)
GPO3/SUSST#(VDDS)
GPO4/SUSCLK(VDDS)
GPO5/CPUSTP#
GPO6/PCISTP#
GPO7/GNT5
GPO8/GPI8/VGATE
*
C C
GPO9/GPI9/UDPWREN
*
GPO10/GPI10/PICD0
*
GPO11/GPI11/PICD1
*
*
GPO12/GPI12/INTE#
*
GPO13/GPI13/INTF#
*
GPO14/GPI14/INTG#
*
GPO15/GPI15/INTH#
GPO20/GPI20
/ACSDIN2/PCS0#
GPO21/GPI21/ACSDIN3
/PCS1#/SLPBTN#
GPO22/GPI22/GHI#
B B
GPO23/GPI23/DPSLP
GPO25/GPI25
GPO26/GPI26/SMBDT2
(VDDS)
GPO27/GPI27/SMBCK2
(VDDS)
GPO28/GPI28/VIDSEL
GPO29/GPI29/VRDSLP
GPO30/GPI30
GPO31/GPI31
A A
PIN NAME Function define
GPI0
(VBAT)
GPI1
(VSUS3)
GPI2/EXTSMI#
(VSUS3)
GPI3/RING#
(VSUS3)
GPI4/LID#
(VSUS3)
GPI5/BATLOW# (VDDS)
GPI6/AGPBZ
GPI7/REQ5
GPI8/VGATE
*
GPI9/UDPWREN
*
GPI10/PICD0
*
GPI11/PICD1
*
GPI12/INTE#
*
GPI13/INTF#
*
GPI14/INTG#
*
GPI15/INTH# GPI15
*
GPI16/INTRUDER#
(VBAT)
GPI17/CPUMISS
GPI18/AOLGP1/THRM#
GPI19/APICCLK
PCI Config.
DEVICE
PCI Slot 1
PCI Slot 2
PCI Slot 3
INTA#
INTB#
INTC#
INTD#
INTB#
INTC#
INTD#
INTA#
INTC#
INTD#
INTA# PGNT#2
INTB#
Page 4
5
4
3
2
1
VREF routed as 40~50 mils trace wide ,
Space>25 mils
DDR_VREF 8
D D
VDD_25_SUS
Place near CPU in 1" ,
Routed => 5:10/Trace:Space ,
Same Length
C C
B B
R70 15R1%
R71 15R1%
MD[63..0] 10
DM[7..0] 10
A A
-MDQS[7..0] 10
5
C47
X_C1000P50N
C58
AE13
C1000P50X
MEMZN
MEMZP
MD63
MD62
MD61
MD60
MD59
MD58
MD57
MD56
MD55
MD54
MD53
MD52
MD51
MD50
MD49
MD48
MD47
MD46
MD45
MD44
MD43
MD42
MD41
MD40
MD39
MD38
MD37
MD36
MD35
MD34
MD33
MD32
MD31
MD30
MD29
MD28
MD27
MD26
MD25
MD24
MD23
MD22
MD21
MD20
MD19
MD18
MD17 MAA3
MD16
MD15
MD14
MD13
MD12
MD11
MD10
MD9
MD8
MD7
MD6
MD5
MD4
MD3
MD2
MD1
MD0
-MDQS7
-MDQS6
-MDQS5
-MDQS4
-MDQS3
-MDQS2
-MDQS1
-MDQS0
VTT_SENSE
AG12
MEMVREF1
D14
MEMZN
C14
MEMZP
A16
MEMDATA63
B15
MEMDATA62
A12
MEMDATA61
B11
MEMDATA60
A17
MEMDATA59
A15
MEMDATA58
C13
MEMDATA57
A11
MEMDATA56
A10
MEMDATA55
B9
MEMDATA54
C7
MEMDATA53
A6
MEMDATA52
C11
MEMDATA51
A9
MEMDATA50
A5
MEMDATA49
B5
MEMDATA48
C5
MEMDATA47
A4
MEMDATA46
E2
MEMDATA45
E1
MEMDATA44
A3
MEMDATA43
B3
MEMDATA42
E3
MEMDATA41
F1
MEMDATA40
G2
MEMDATA39
G1
MEMDATA38
L3
MEMDATA37
L1
MEMDATA36
G3
MEMDATA35
J2
MEMDATA34
L2
MEMDATA33
M1
MEMDATA32
W1
MEMDATA31
W3
MEMDATA30
AC1
MEMDATA29
AC3
MEMDATA28
W2
MEMDATA27
Y1
MEMDATA26
AC2
MEMDATA25
AD1
MEMDATA24
AE1
MEMDATA23
AE3
MEMDATA22
AG3
MEMDATA21
AJ4
MEMDATA20
AE2
MEMDATA19
AF1
MEMDATA18
AH3
MEMDATA17
AJ3
MEMDATA16
AJ5
MEMDATA15
AJ6
MEMDATA14
AJ7
MEMDATA13
AH9
MEMDATA12
AG5
MEMDATA11
AH5
MEMDATA10
AJ9
MEMDATA9
AJ10
MEMDATA8
AH11
MEMDATA7
AJ11
MEMDATA6
AH15
MEMDATA5
AJ15
MEMDATA4
AG11
MEMDATA3
AJ12
MEMDATA2
AJ14
MEMDATA1
AJ16
MEMDATA0
R1
MEMDQS17
DM7
A13
MEMDQS16
DM6
A7
MEMDQS15
DM5
C2
MEMDQS14
DM4
H1
MEMDQS13
DM3
AA1
MEMDQS12
DM2
AG1
MEMDQS11
DM1
AH7
MEMDQS10
DM0
AH13
MEMDQS9
T1
MEMDQS8
A14
MEMDQS7
A8
MEMDQS6
D1
MEMDQS5
J1
MEMDQS4
AB1
MEMDQS3
AJ2
MEMDQS2
AJ8
MEMDQS1
AJ13
MEMDQS0
U6B
RSVD_MEMADDA15
RSVD_MEMADDA14
RSVD_MEMADDB15
RSVD_MEMADDB14
MEMORY INTERFACE
VTT_A4
VTT_A1
VTT_A2
VTT_A3
VTT_B1
VTT_B2
VTT_B3
VTT_B4
MEMRESET_L
MEMCKEA
MEMCKEB
MEMCLK_H7
MEMCLK_L7
MEMCLK_H6
MEMCLK_L6
MEMCLK_H5
MEMCLK_L5
MEMCLK_H4
MEMCLK_L4
MEMCLK_H3
MEMCLK_L3
MEMCLK_H2
MEMCLK_L2
MEMCLK_H1
MEMCLK_L1
MEMCLK_H0
MEMCLK_L0
MEMCS_L7
MEMCS_L6
MEMCS_L5
MEMCS_L4
MEMCS_L3
MEMCS_L2
MEMCS_L1
MEMCS_L0
MEMRASA_L
MEMCASA_L
MEMWEA_L
MEMBANKA1
MEMBANKA0
MEMADDA13
MEMADDA12
MEMADDA11
MEMADDA10
MEMADDA9
MEMADDA8
MEMADDA7
MEMADDA6
MEMADDA5
MEMADDA4
MEMADDA3
MEMADDA2
MEMADDA1
MEMADDA0
MEMRASB_L
MEMCASB_L
MEMWEB_L
MEMBANKB1
MEMBANKB0
MEMADDB13
MEMADDB12
MEMADDB11
MEMADDB10
MEMADDB9
MEMADDB8
MEMADDB7
MEMADDB6
MEMADDB5
MEMADDB4
MEMADDB3
MEMADDB2
MEMADDB1
MEMADDB0
MEMCHECK7
MEMCHECK6
MEMCHECK5
MEMCHECK4
MEMCHECK3
MEMCHECK2
MEMCHECK1
MEMCHECK0
4
D17
A18
B17
C17
AF16
AG16
AH16
AJ17
AG10
AE8
AE7
D10
C10
E12
E11
AF8
AG8
AF10
AE10
V3
V4
K5
K4
R5
P5
P3
P4
D8
C8
E8
E7
D6
E6
C4
E5
H5
D4
G5
K3
H3
E13
C12
E10
AE6
AF3
M5
AE5
AB5
AD3
Y5
AB4
Y3
V5
T5
T3
N5
H4
F5
F4
L5
J5
E14
D12
E9
AF6
AF4
M4
AD5
AC5
AD4
AA5
AB3
Y4
W5
U5
T4
M3
N3
N1
U3
V1
N2
P1
U1
U2
VTT_DDR_SUS
MCKE0
MCKE1
MEMCLK_H7
MEMCLK_L7
MEMCLK_H6
MEMCLK_L6
MEMCLK_H5
MEMCLK_L5
MEMCLK_H4
MEMCLK_L4
MEMCLK_H1
MEMCLK_L1
MEMCLK_H0
MEMCLK_L0
-MCS3
-MCS2
-MCS1
-MCS0
-MSRASA
-MSCASA
MAA13
MAA12
MAA11
MAA10
MAA9
MAA8
MAA7
MAA6
MAA5
MAA4
MAA2
MAA1
MAA0
MAB13
MAB12
MAB11
MAB10
MAB9
MAB8
MAB7
MAB6
MAB5
MAB4
MAB3
MAB2
MAB1
MAB0
MCKE0 8,9
MCKE1 8,9
MEMCLK_H7 8, 9
MEMCLK_L7 8,9
MEMCLK_H6 8, 9
MEMCLK_L6 8,9
MEMCLK_H5 8, 9
MEMCLK_L5 8,9
MEMCLK_H4 8, 9
MEMCLK_L4 8,9
MEMCLK_H1 8, 9
MEMCLK_L1 8,9
MEMCLK_H0 8, 9
MEMCLK_L0 8,9
-MCS3 8,9
-MCS2 8,9
-MCS1 8,9
-MCS0 8,9
-MSRASA 8,9
-MSCASA 8,9
-MSWEA 8,9
MEMBANKA1 8,9
MEMBANKA0 8,9
MAA[13..0] 8,9
-MSRASB 8,9
-MSCASB 8,9
-MSWEB 8,9
MEMBAKB1 8,9
MEMBAKB0 8,9
MAB[13..0] 8,9
CADIP[0..15] 11
CLKIP1 11
CLKIN1 11
CLKIP0 11
CLKIN0 11
VLDT0
CTLIP0 11
CTLIN0 11
3
VDD_12_A
VDD_12_A
R37 49.9R1%
R41 49.9R1%
C159
X_C0.22U16Y
CADIP15
CADIN15
CADIP14
CADIN14
CADIP13
CADIN13
CADIP12
CADIN12
CADIP11
CADIN11
CADIP10
CADIN10
CADIP9
CADIN9
CADIP8
CADIN8
CADIP7
CADIN7
CADIP6
CADIN6
CADIP5
CADIN5
CADIP4
CADIN4
CADIP3
CADIN3
CADIP2
CADIN2
CADIP1
CADIN1
CADIP0
CADIN0
CTLIP1
CTLIN1
C0.22U16Y
C196
D29
D27
D25
C28
C26
B29
B27
T25
R25
U27
U26
V25
U25
W27
W26
AA27
AA26
AB25
AA25
AC27
AC26
AD25
AC25
T27
T28
V29
U29
V27
V28
Y29
W29
AB29
AA29
AB27
AB28
AD29
AC29
AD27
AD28
Y25
W25
Y27
Y28
R27
R26
T29
R29
C0.22U16Y
U6A
N12-7540031-L06
VLDT0_A6
VLDT0_A5
VLDT0_A4
VLDT0_A3
VLDT0_A2
VLDT0_A1
VLDT0_A0
L0_CADIN_H15
L0_CADIN_L15
L0_CADIN_H14
L0_CADIN_L14
L0_CADIN_H13
L0_CADIN_L13
L0_CADIN_H12
L0_CADIN_L12
L0_CADIN_H11
L0_CADIN_L11
L0_CADIN_H10
L0_CADIN_L10
L0_CADIN_H9
L0_CADIN_L9
L0_CADIN_H8
L0_CADIN_L8
L0_CADIN_H7
L0_CADIN_L7
L0_CADIN_H6
L0_CADIN_L6
L0_CADIN_H5
L0_CADIN_L5
L0_CADIN_H4
L0_CADIN_L4
L0_CADIN_H3
L0_CADIN_L3
L0_CADIN_H2
L0_CADIN_L2
L0_CADIN_H1
L0_CADIN_L1
L0_CADIN_H0
L0_CADIN_L0
L0_CLKIN_H1
L0_CLKIN_L1
L0_CLKIN_H0
L0_CLKIN_L0
L0_CTLIN_H1
L0_CTLIN_L1
L0_CTLIN_H0
L0_CTLIN_L0
X_C0.22U16Y
C158
C171
HYPER TRANSPORT - LINK0
2
C182
C0.22U16Y
L0_CADOUT_H15
L0_CADOUT_L15
L0_CADOUT_H14
L0_CADOUT_L14
L0_CADOUT_H13
L0_CADOUT_L13
L0_CADOUT_H12
L0_CADOUT_L12
L0_CADOUT_H11
L0_CADOUT_L11
L0_CADOUT_H10
L0_CADOUT_L10
C350
C0.22U16Y
VLDT0_B6
VLDT0_B5
VLDT0_B4
VLDT0_B3
VLDT0_B2
VLDT0_B1
VLDT0_B0
L0_CADOUT_H9
L0_CADOUT_L9
L0_CADOUT_H8
L0_CADOUT_L8
L0_CADOUT_H7
L0_CADOUT_L7
L0_CADOUT_H6
L0_CADOUT_L6
L0_CADOUT_H5
L0_CADOUT_L5
L0_CADOUT_H4
L0_CADOUT_L4
L0_CADOUT_H3
L0_CADOUT_L3
L0_CADOUT_H2
L0_CADOUT_L2
L0_CADOUT_H1
L0_CADOUT_L1
L0_CADOUT_H0
L0_CADOUT_L0
L0_CLKOUT_H1
L0_CLKOUT_L1
L0_CLKOUT_H0
L0_CLKOUT_L0
L0_CTLOUT_H1
L0_CTLOUT_L1
L0_CTLOUT_H0
L0_CTLOUT_L0
Title
Document Number
MICRO-STAR IN T' L CO.,LTD.
No. 69, Li-De St, Jung-He City,
Taipei Hsien, Taiwan
http://www.msi.com.tw
C172
C0.22U16Y
VLDT0
AH29
AH27
AG28
AG26
AF29
AE28
AF25
CADOP15
N26
CADON15
N27
CADOP14
L25
CADON14
M25
CADOP13
L26
CADON13
L27
CADOP12
J25
CADON12
K25
CADOP11
G25
CADON11
H25
CADOP10
G26
CADON10
G27
CADOP9
E25
CADON9
F25
CADOP8
E26
CADON8
E27
CADOP7
N29
CADON7
P29
CADOP6
M28
CADON6
M27
CADOP5
L29
CADON5
M29
CADOP4
K28
CADON4
K27
CADOP3
H28
CADON3
H27
CADOP2
G29
CADON2
H29
CADOP1
F28
CADON1
F27
CADOP0
E29
CADON0
F29
CLKOP1
J26
CLKON1
J27
CLKOP0
J29
CLKON0
K29
N25
P25
P28
P27
CTLOP0
CTLON0
CLKOP1 11
CLKON1 11
CLKOP0 11
CLKON0 11
CTLOP0 11
CTLON0 11
Micro Star Restricted Secret
K8 DDR & HT
MS-7142
Last Revision Date:
Sheet
1
VLDT0 5
C64
C4.7U10Y0805
CADOP[0..15] 11
CADON[0..15] 11 CADIN[0..15] 11
Rev
100
Friday, December 17, 2004
of
43 3
Page 5
5
D D
4
VDDIO_SENSE
C46
X_C1000P50N
LAYOUT: Route VDDA trace approx. 50 mils wide (use 2x25 mil
VDDA_25
traces to exit bal l fi eld ) and 500 mils long.
FB7 300L700m_250_0805
CPU_VDDA_25
3
C4.7U10Y0805
2
C51
C0.22U16Y
C63
C1000P50X
C65
FB8
X_120S/0603
1
THERMDC_CPU
AH25
CLKIN_H
CLKIN_L
AF20
AE18
AF27
AE26
AE12
AF12
AE11
AH21
AH23
AE24
AF24
AG15
AH17
AE23
AF23
AF22
AF21
AE21
AJ25
AJ27
A23
A24
B23
AJ21
AJ23
C16
C15
E20
E17
B21
A21
C18
A19
A28
AJ28
AA2
AG2
B18
AH1
C20
AG4
AG6
AE9
AG9
C1
J3
R3
D3
C6
VDDA1
VDDA2
RESET_L
PWROK
LDTSTOP_L
L0_REF1
L0_REF0
COREFB_H
COREFB_L
CORE_SENSE
VDDIOFB_H
VDDIOFB_L
VDDIO_SENSE
CLKIN_H
CLKIN_L
NC_AJ23
NC_AH23
NC_AE24
NC_AF24
VTT_A5
VTT_B5
DBRDY
NC_C15
TMS
TCK
TRST_L
TDI
NC_C18
NC_A19
KEY1
KEY0
NC_AE23
NC_AF23
NC_AF22
NC_AF21
FREE29
FREE31
FREE33
FREE35
FREE1
FREE37
FREE4
FREE38
FREE41
FREE7
FREE11
FREE12
FREE13
FREE14
FREE40
C41
C68
C1000P50X
NC_C18
NC_A19
NC_C21
TDO
X_C1000P50N
VDD_25_SUS
1 2
3 4
5 6
7 8
C67
C1000P50X
Differential , "10:10:5:10:10" .
Near CPU in 0.5" .
VDDA_25 VDD_25_SUS
-CPURST 28
-LDTSTOP 11,18
CPUCLK0_H 7
CPUCLK0_L 7
8P4R-1KR
RN40
COREFB_H 14
COREFB_L 14
3
C55 C392p
C54 C392p
VTT_DDR_SUS
CPU_GD
L0_REF1
L0_REF0
VDDIO_SENSE
R38
R29 820R
R42 820R
7 8
169R1%
3 4
5 6
1 2
NC_AJ23
NC_AH23
DBRDY
TMS
TCK
TRST_L
TDI
NC_C18
NC_A19
NC_AE23
NC_AF23
NC_AF22
NC_AF21
RN6
X_8P4R-1KR
VDDA_25
C C
-LDTSTOP
R20
1KR
CPU_GD 27
VLDT0
VLDT0 4
Place near CPU in 1" ,
Routed => 5:10/Trace:Space ,
Same Length
R36 44.2R1%
R35 44.2R1%
HDT Test Port Signal .
B B
DBREQ_L
DBRDY
TCK
TMS
TDI
TRST_L
NC_AH18
NC_AJ18
NC_AG18
A A
NC_AG17
NC_D18
NC_B19
NC_C19
NC_D20
5
R30 X_1KR
R31 X_1KR
1 2
3 4
5 6
7 8
RN38 X_8P4R-1KR
1 2
3 4
5 6
7 8
1 2
3 4
5 6
7 8
VDDA_25
C198
C4.7U10Y0805
RN10
8P4R-1KR
8P4R-1KR
RN37
4
U6C
THERMTRIP_L
THERMDA
THERMDC
NC_AG18
NC_AH18
NC_AG17
NC_AJ18
G_FBCLKOUT_H
G_FBCLKOUT_L
DBREQ_L
NC_D20
NC_C21
NC_D18
NC_C19
NC_B19
NC_AF18
RSVD_SCL
RSVD_SDA
FREE26
FREE28
FREE30
FREE32
FREE34
FREE36
FREE10
FREE18
FREE19
FREE42
FREE24
FREE25
FREE27
2
A20
A26
A27
AG13
VID4
AF14
VID3
AG14
VID2
AF15
VID1
AE15
VID0
AG18
AH18
AG17
AJ18
AH19
AJ19
AE19
D20
C21
D18
C19
B19
A22
TDO
AF18
D22
C22
B13
B7
C3
K1
R2
AA3
F3
C23
AG7
AE22
C24
A25
C9
Title
Document Number
MICRO-STAR IN T' L CO.,LTD.
No. 69, Li-De St, Jung-He City,
Taipei Hsien, Taiwan
http://www.msi.com.tw
THRM#
THERMDA_CPU
THERMDC_CPU
VID4
VID4 14
VID3
VID3 14
VID2
VID2 14
VID1
VID1 14
VID0
VID0 14
NC_AG18
NC_AH18
NC_AG17
NC_AJ18
LAYOUT: Route
FBCLKOUT_H
FBCLKOUT_H/L d ifferentially
R43
with 20/8/5/8/20 spacing and
80.6R1%
trace width. ( In CPU
FBCLKOUT_L
breakout => r outed 5:5:5 )
Zdiff = 80 ohm
DBREQ_L
NC_D20
NC_C21
NC_D18
NC_C19
NC_B19
TDO
Micro Star Restricted Secret
K8 HDT & MISC
THRM# 27
THERMDA_CPU 24
THERMDC_CPU 24
MS-7142
Last Revision Date:
Sheet
1
Rev
0A
Friday, December 17, 2004
of
53 3
Page 6
5
U6E
VSS1
VSS3
VSS4
VSS5
VSS6
VSS7
VSS8
VSS9
VSS10
VSS11
VSS12
VSS13
VSS14
VSS15
VSS16
VSS17
VSS18
VSS19
VSS20
VSS21
VSS22
VSS23
VSS24
VSS25
VSS26
VSS27
VSS28
VSS29
VSS30
VSS31
VSS32
VSS33
VSS34
VSS35
VSS36
VSS37
VSS38
VSS39
VSS40
VSS41
VSS42
VSS43
VSS44
VSS45
VSS46
VSS47
VSS48
VSS49
VSS50
VSS51
VSS52
VSS53
VSS54
VSS55
VSS56
VSS57
VSS58
VSS59
VSS60
VSS61
VSS62
VSS63
VSS64
VSS65
VSS66
VSS67
VSS68
VSS69
VSS70
VSS71
VSS72
VSS73
VSS74
VSS75
VSS76
VSS77
VSS78
VSS79
VSS80
VSS81
VSS82
VSS83
VSS84
VSS85
VSS86
VSS87
VSS88
VSS89
VSS90
VSS91
VSS92
VSS187
VSS188
VSS206
VSS207
VSS208
VSS209
VSS210
VSS211
VSS212
VSS213
VSS214
VSS215
VSS216
VSS217
VSS218
VSS219
VSS220
VSS221
VSS222
GROUND
VSS93
VSS94
VSS95
VSS96
VSS97
VSS98
VSS99
VSS100
VSS101
VSS102
VSS103
VSS104
VSS105
VSS106
VSS107
VSS108
VSS109
VSS110
VSS111
VSS112
VSS113
VSS114
VSS115
VSS116
VSS117
VSS118
VSS119
VSS120
VSS121
VSS122
VSS123
VSS124
VSS125
VSS126
VSS127
VSS128
VSS129
VSS130
VSS131
VSS132
VSS133
VSS134
VSS135
VSS136
VSS137
VSS138
VSS139
VSS140
VSS141
VSS142
VSS143
VSS144
VSS145
VSS146
VSS147
VSS148
VSS149
VSS150
VSS151
VSS152
VSS153
VSS155
VSS156
VSS157
VSS158
VSS159
VSS160
VSS161
VSS162
VSS163
VSS164
VSS165
VSS166
VSS167
VSS168
VSS169
VSS170
VSS171
VSS172
VSS173
VSS174
VSS175
VSS176
VSS177
VSS178
VSS179
VSS180
VSS181
VSS182
VSS183
VSS184
VSS185
VSS186
VSS189
VSS190
VSS191
VSS192
VSS194
VSS195
VSS196
VSS197
VSS198
VSS199
VSS223
VSS201
VSS202
VSS203
VSS204
VSS205
L28
R28
W28
AC28
AF28
AH28
C29
F2
H2
VCORE
K2
M2
P2
T2
V2
Y2
AB2
AD2
AH2
B4
AH4
B6
G6
J6
L6
N6
R6
U6
AA6
AC6
AH6
F7
H7
K7
M7
P7
T7
V7
AB7
AD7
B8
G8
J8
L8
N8
R8
U8
W8
AC8
AH8
F9
H9
K9
M9
P9
T9
V9
Y9
AD9
B10
G10
J10
L10
N10
R10
U10
W10
AC10
AH10
F11
H11
K11
Y11
AB11
AD11
B12
G12
AA12
AC12
AH12
F13
H13
K13
Y13
AB13
AD13
AF17
G14
J14
AA14
AC14
AE14
D16
E15
K15
AB15
AD15
AH14
E16
G16
J16
AA16
AC16
AE29
AJ26
E18
F17
H17
K17
Y17
L7
VDD1
AC15
VDD2
H18
VDD3
B20
VDD4
E21
VDD5
H22
VDD6
J23
VDD7
H24
VDD8
F26
VDD9
N7
VDD10
L9
VDD11
V10
VDD12
G13
VDD13
K14
VDD14
Y14
VDD15
AB14
VDD16
G15
VDD17
J15
VDD18
AA15
VDD19
H16
VDD20
K16
VDD21
Y16
VDD22
AB16
VDD23
G17
VDD24
J17
VDD25
AA17
VDD26
AC17
VDD27
AE17
VDD28
F18
VDD29
K18
VDD30
Y18
VDD31
AB18
VDD32
AD18
VDD33
AG19
VDD34
E19
VDD35
G19
VDD36
AC19
VDD39
AA19
VDD38
J19
VDD37
F20
VDD40
H20
VDD41
K20
VDD42
M20
VDD43
P20
VDD44
T20
VDD45
V20
VDD46
Y20
VDD47
AB20
VDD48
AD20
VDD49
G21
VDD50
J21
VDD51
L21
VDD52
N21
VDD53
R21
VDD54
U21
VDD55
W21
VDD56
AA21
VDD57
AC21
VDD58
F22
VDD59
K22
VDD60
M22
VDD61
P22
VDD62
T22
VDD63
V22
VDD64
Y22
VDD65
AB22
VDD66
AD22
VDD67
E23
VDD68
G23
VDD69
L23
VDD70
N23
VDD71
R23
VDD72
U23
VDD73
W23
VDD74
AA23
VDD75
AC23
VDD76
B24
VDD77
D24
VDD78
F24
VDD79
K24
VDD80
M24
VDD81
P24
VDD82
T24
VDD83
V24
VDD84
Y24
VDD85
AB24
VDD86
AD24
VDD87
AH24
VDD88
AE25
VDD89
K26
VDD90
P26
VDD91
V26
VDD92
GND GND
B2
AH20
AB21
W22
M23
L24
AG25
AG27
D D
C C
B B
A A
D2
AF2
W6
Y7
AA8
AB9
AA10
J12
B14
Y15
AE16
J18
G20
R20
U20
W20
AA20
AC20
AE20
AG20
AJ20
D21
F21
H21
K21
M21
P21
T21
V21
Y21
AD21
AG21
B22
E22
G22
J22
L22
N22
R22
U22
AG29
AA22
AC22
AG22
AH22
AJ22
D23
F23
H23
K23
P23
T23
V23
Y23
AB23
AD23
AG23
E24
G24
J24
N24
R24
U24
W24
AA24
AC24
AG24
AJ24
B25
C25
B26
D26
H26
M26
T26
Y26
AD26
AF26
AH26
C27
B28
D28
G28
F15
H15
AB17
AD17
B16
G18
AA18
AC18
D19
F19
H19
K19
Y19
AB19
AD19
AF19
J20
L20
N20
5
U6D
POWER
VDDIO1
VDDIO2
VDDIO3
VDDIO4
VDDIO5
VDDIO7
VDDIO8
VDDIO9
VDDIO10
VDDIO11
VDDIO12
VDDIO13
VDDIO14
VDDIO15
VDDIO16
VDDIO17
VDDIO18
VDDIO19
VDDIO20
VDDIO21
VDDIO22
VDDIO23
VDDIO24
VDDIO25
VDDIO26
VDDIO27
VDDIO28
VDDIO29
VDDIO30
VDDIO31
VDDIO32
VDDIO33
VDDIO34
VDDIO35
VDDIO36
VDDIO37
VDDIO38
VDDIO39
VDDIO40
VDDIO41
VDDIO42
VDDIO43
VDDIO44
VDDIO45
VDDIO46
VDDIO47
VDDIO48
VDDIO49
VDDIO50
VDDIO6
VDD96
VDD97
VDD98
VDD99
VDD100
VDD101
VDD102
VDD103
VDD104
VDD105
VDD106
VDD107
VDD108
VDD109
VDD110
VDD111
VDD112
VDD113
VDD114
VDD115
VDD116
VDD117
VDD118
VDD119
VDD120
VDD121
VDD122
VDD123
VDD124
VDD125
VDD126
VDD127
VDD128
VDD129
VDD130
VDD131
VDD132
VDD133
VDD93
VDD94
VDD95
4
VDD_25_SUS
E4
G4
J4
L4
N4
U4
W4
AA4
AC4
AE4
D5
AF5
F6
H6
K6
M6
P6
T6
V6
Y6
AB6
AD6
D7
G7
J7
AA7
AC7
AF7
F8
H8
AB8
AD8
D9
G9
AC9
AF9
F10
AD10
D11
AF11
F12
AD12
D13
AF13
F14
AD14
F16
AD16
D15
R4
N28
U28
AA28
AE27
R7
U7
W7
K8
M8
P8
T8
V8
Y8
J9
N9
R9
U9
W9
AA9
H10
K10
M10
P10
T10
Y10
AB10
G11
J11
AA11
AC11
H12
K12
Y12
AB12
J13
AA13
AC13
H14
AB26
E28
J28
4
VCORE
3
LAYOUT: Place 6 EMI caps along bottom right side of Clawhammer,
2 in middle of HT link, and 12 along bottom left side of
Claw-hammer.
VCORE
C476
C471
C61
Place between DIMN1 & 2
VDD_25_SUS
C128
C154
C0.1U10X_0402
VDD_25_SUS
C92
C135
<nopop>
C1U6.3Y_0402
C472
<nopop>
<nopop>
X_C1U16Y
X_C6.8P50N
C149
C180
C0.1U10X_0402
C0.1U10X_0402
C0.1U10X_0402
LAYOUT: Place beside processor.
C73
C211
<nopop>
C1U16Y
C4.7U10Y0805
C4.7U10Y0805
In CPU.
VCORE
C102
C0.22U16Y
C103
C180P50N
C475
X_C1U16Y
X_C6.8P50N
X_C6.8P50N
GND
C132
GND
C0.1U10X_0402
C85
C165
C1000P50X
C108
C180P50N
C114
C180P50N
3
C95
C230
C4.7U10Y0805
C112
C8.2P50N
C106
C0.22U16Y
X_C0.22U16Y
X_C0.22U16Y
C116
C113
C8.2P50N
C0.22U16Y
X_C0.22U16Y
C62
X_C6.8P50N
C107
C122
C117
C0.22U16Y
C1U16Y0805
C245
C168
X_C1U16Y0805
C125
C0.22U16Y
C121
X_C0.22U16Y
2
VDD_25_SUS VTT_DDR_SUS
C199
C248
C142
C0.22U16Y
X_C1U16Y0805
C1U6.3Y_0402
GND
C105
C0.22U16Y
C126
C8.2P50N
2
C129
X_C0.22U16Y
<nopop>
C0.22U16Y
C1U16Y
VTT_DDR_SUS
X_C0.1U25Y
C474
C478
C1U16Y
BACK
C467
C188
X_C0.1U25Y
GND
Title
Document Number
MICRO-STAR INT'L CO.,LTD.
No. 69, Li-De St, Jung-He City,
Taipei Hsien , Taiwan
http://www.m si.com.tw
1
VDD_25_SUS
C469
C1U16Y
GND
Micro Star Restricted Secret
K8 POWER & GND
MS-7142
1
Last Revision Date:
Friday, December 17, 2004
Sheet
63 3
Rev
0A
of
Page 7
5
4
3
2
1
Clock Synthesizer
VCC3
D D
C C
APICCLK 17,18
"FS0~FS3" are all internal
pull-up via 100K ohm ..
FS0
FS2
FS1
FS3
B B
C322
X_104P
AC_14 21
GUICLK 12
R171 10KR
R132 10KR
R137 10KR
R130 10KR
FB21 X_120S/0805
CP8
X_COPPER
AC_14
APICCLK
GUICLK
CLKVCC3
CLKVCC3
CLKVCC3
R142 10KR
R180 22R
R136 22R
R121 22R
C323
X_4.7u/0805
FS0
FS1
FS2
2
9
16
19
29
35
38
43
46
32
5
10
15
20
27
30
33
34
39
42
47
1
48
45
C303
104P
U10
VDDHTT
VDDPCI
VDDPCI
VDDPCI
AVDD48
VDDCPU
VDDCPU
VDDA
VDDREF
PD#*
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
*FS0/REF0
*FS1/REF1
*FS2/REF2
ICS950405
C330
33P50N
C305
104P
X1
3
CLKX1
C307
C306
104P
104P
CPUCLKT0
CPUCLKC0
CPUCLKT1
CPUCLKC1
PCICLK0
PCICLK1
PCICLK2
PCICLK3
PCICLK4
PCICLK5
PCICLK6
PCICLK7
PCICLK10
HTTCLK0/ModeA*
PCICLK8/HTTCLK1/ModeB*
PCICLK9/HTTCLK2
PCICLK11/HTTCLK3
24_48M/24_48SEL#
48MHz/FS3**
SCLK
SDATA
RESET#
X2
4
CLKX2
Y2
14.318MHZ
C327
33P50N
C342
104P
41
40
37
36
13
14
17
18
21
22
23
24
12
6
7
8
11
28
31
25
26
44
C346
104P
FOR K8T800 Pro
RN69
MODEA
MODEB
HT_66_2
SEL_24
SMBCLK1
SMBDATA1
R129 10KR
C347
C304
104P
104P
R138 T_15RST
R139 T_15RST
R140 15RST
R141 15RST
RN70
7 8
5 6
3 4
1 2
R181 22R
R182 22R
7 8
5 6
3 4
1 2
R144 33R
R116 22R
8P4R-22R
8P4R-22R
HCLK+
HCLKCPUCLK0_H
CPUCLK0_L
LPC_PCLK
SIOPCLK
PCICLK1
PCICLK2
PCICLK3
SBPCLK
VCLK
GCLK_SLOT
GCLK_NB
SIO48M
USBCLK_SB FS3
SMBCLK1 8, 17,27
SMBDATA1 8,17,27
CLK_RESET# 27,28
HCLK+ 11
HCLK- 11
CPUCLK0_H 5
CPUCLK0_L 5
LPC_PCLK 24
SIOPCLK 24
PCICLK1 19
PCICLK2 19
PCICLK3 20
SBPCLK 18
VCLK 18
GCLK_SLOT 15
GCLK_NB 12
SIO48M 24
USBCLK_SB 16
APICCLK
VCLK
GCLK_SLOT
GCLK_NB
USBCLK_SB
SIO48M
AC_14
GUICLK
SBPCLK
PCICLK3
PCICLK2
PCICLK1
SIOPCLK
LPC_PCLK
CPUCLK0_H
CPUCLK0_L
HCLK+
C291 T_C10P50N
HCLK-
C292 T_C10P50N
For K8T800 Pro
C302 X_10P
CN8
7 8
5 6
3 4
1 2
8P4C-10P
C295 X_10P
C297 X_10P
C345 X_10P
C290 X_10P
C357 X_10P
C356 10P
CN9
1 2
3 4
5 6
7 8
8P4C-10P
C293 X_5P
C294 X_5P
FS(3:0)
CPU
0000
100.90
0001
133.90
0010
168.00
0011
202.00
0100
100.20
0101
133.50
0110
166.70
200.40
0111
1000
150.00
1001
180.00
1010
210.00
1011
1100
1101
1110
1111
240.00
270.00
233.33
266.67
300.00
A A
67.27
66.95
67.20
67.33
66.80
66.75
66.68
60.00
60.00
70.00
60.00
67.50
66.67
66.67
75.00
5
HTT
PCI
33.63
33.48
33.60
33.67
33.40
33.38
33.34
33.40 66.80
30.00
30.00
35.00
30.00
33.75
33.33
33.33
37.50
MODEA
R191 10KR
MODEB
R195 10KR
MODE B MODE A
0 0
HTTCLK1
HTTCLK1
PCICLK8
HTTCLK1
HTTCLK2
HTTCLK2
PCICLK9
PCICLK9
0
1
1
0
1 1
4
PIN11 PIN8 PIN7
PCICLK11
HTTCLK3
PCICLK11
PCICLK11
SEL_24
SEL_24
0
1
3
R135 X_10KR
PIN28
48M
24M
Micro Star Restricted Secret
Title
Document Number
MICRO-STAR INT'L CO.,LTD.
No. 69, Li- De St, J ung-He City,
Taipei Hsien, Taiwan
2
http://www. msi.com.tw
Clock Synthesizer
MS-7142
Last Revision Date:
Sheet
1
Friday, December 17, 2004
73 3
Rev
100
of
Page 8
5
DR_MD0
DR_MD[63..0] 9,10
D D
C C
B B
VDD_25_SUS
R106 4.7 KR
-MSWEA 4,9
DDR_VREF
VREF routed as 40~50
mils trace wide ,
Space>25 mils
Place 104p and 1000p Cap. near the DIMM
Place near the DIMM
VDD_25_SUS
R19
1KR1%
A A
R18
1KR1%
C39
C0.1U25Y
C466
X_C0.1U25Y
DDR_VREF
C38
C1U10Y
5
2
DR_MD1
4
DR_MD2
6
DR_MD3
8
DR_MD4
94
DR_MD5
95
DR_MD6
98
DR_MD7
99
DR_MD8
12
DR_MD9
13
DR_MD10
19
DR_MD11
20
DR_MD12
105
DR_MD13
106
DR_MD14
109
DR_MD15
110
DR_MD16
23
DR_MD17
24
DR_MD18
28
DR_MD19
31
DR_MD20
114
DR_MD21
117
DR_MD22
121
DR_MD23
123
DR_MD24
33
DR_MD25
35
DR_MD26
39
DR_MD27
40
DR_MD28
126
DR_MD29
127
DR_MD30
131
DR_MD31
133
DR_MD32
53
DR_MD33
55
DR_MD34
57
DR_MD35
60
DR_MD36
146
DR_MD37
147
DR_MD38
150
DR_MD39
151
DR_MD40
61
DR_MD41
64
DR_MD42
68
DR_MD43
69
DR_MD44
153
DR_MD45
155
DR_MD46
161
DR_MD47
162
DR_MD48
72
DR_MD49
73
DR_MD50
79
DR_MD51
80
DR_MD52
165
DR_MD53
166
DR_MD54
170
DR_MD55
171
DR_MD56
83
DR_MD57
84
DR_MD58
87
DR_MD59
88
DR_MD60
174
DR_MD61
175
DR_MD62
178
DR_MD63
179
WP1
90
-MSWEA
63
1
9
101
102
VREF routed as 40~50 mils trace wide ,
Space>25 mils
DDR_VREF 4
VDD_25_SUS
108
120
148
VDD07VDD138VDD246VDD370VDD485VDD5
VDD6
DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQ8
DQ9
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
DQ16
DQ17
DQ18
DQ19
DQ20
DQ21
DQ22
DQ23
DQ24
DQ25
DQ26
DQ27
DQ28
DQ29
DQ30
DQ31
DQ32
DQ33
DQ34
DQ35
DQ36
DQ37
DQ38
DQ39
DQ40
DQ41
DQ42
DQ43
DQ44
DQ45
DQ46
DQ47
DQ48
DQ49
DQ50
DQ51
DQ52
DQ53
DQ54
DQ55
DQ56
DQ57
DQ58
DQ59
DQ60
DQ61
DQ62
DQ63
WP(NC)
WE#
VREF
NC2
NC3
NC4
VSS03VSS111VSS218VSS326VSS434VSS542VSS650VSS758VSS866VSS974VSS1081VSS1189VSS1293VSS13
VDD7
168
VDD8
4
SYSTEM MEMORY
104
112
128
136
143
156
164
172
180
15
VDDQ022VDDQ130VDDQ254VDDQ362VDDQ477VDDQ596VDDQ6
VDDQ7
VDDQ8
VDDQ9
VDDQ10
VDDQ11
VDDQ12
VDDQ13
VDDQ14
VDDQ15
PIN
184
DDR DIMM
SOCKET
CK1#(CK0#)
NC(RESET#)
VSS14
VSS15
VSS16
VSS17
VSS18
VSS19
VSS20
100
DIMM1 SLAVE ADDRESS
= (1010000X)B = A0
VSS21
116
124
132
139
145
152
160
176
4
82
184
VDDID
VDDSPD
CS0#
CS1#
CS2#
CS3#
DQS0
DQS1
DQS2
DQS3
DQS4
DQS5
DQS6
DQS7
DQS8
FETEN
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10_AP
A11
A12
A13
BA0
BA1
BA2
SCL
SDA
SA0
SA1
SA2
CB0
CB1
CB2
CB3
CB4
CB5
CB6
CB7
CK0(DU)
CK0#(DU)
CK1(CK0)
CK2(DU)
CK2#(DU)
NC5
CKE0
CKE1
CAS#
RAS#
DM0
DM1
DM2
DM3
DM4
DM5
DM6
DM7
DM8
DDR1
DIMM-184_green
N13-1840061-K06
3
-MCS0
157
158
71
163
5
14
25
36
56
67
78
86
47
103
48
43
41
130
37
32
125
29
122
27
141
118
115
167
59
52
113
92
91
181
182
183
44
45
49
51
134
135
142
144
16
17
137
138
76
75
173
10
MCKE0
21
MCKE1
111
-MSCASA
65
-MSRASA
154
97
107
119
129
149
159
169
177
140
-MCS0 4,9
-MCS1
-MCS1 4,9
-DR_MDQS0
-DR_MDQS0 9,10
-DR_MDQS1
-DR_MDQS1 9,10
-DR_MDQS2
-DR_MDQS2 9,10
-DR_MDQS3
-DR_MDQS3 9,10
-DR_MDQS4
-DR_MDQS4 9,10
-DR_MDQS5
-DR_MDQS5 9,10
-DR_MDQS6
-DR_MDQS6 9,10
-DR_MDQS7
-DR_MDQS7 9,10
MAA[13..0]
MAA0
MAA1
MAA2
MAA3
MAA4
MAA5
MAA6
MAA7
MAA8
MAA9
MAA10
MAA11
MAA12 MAB12
MAA13
SMBCLK1
SMBDATA1
MEMCLK_H5
MEMCLK_L5
MEMCLK_H0
MEMCLK_L0
MEMCLK_H7
MEMCLK_L7
DR_DM0
DR_DM1
DR_DM2
DR_DM3
DR_DM4
DR_DM5
DR_DM6
DR_DM7
MAA[13..0] 4,9
MEMBANKA0 4,9
MEMBANKA1 4,9
SMBCLK1 7,17,27
SMBDATA1 7,17,27
MEMCLK_H5 4,9
MEMCLK_L5 4,9
MEMCLK_H0 4,9
MEMCLK_L0 4,9
MEMCLK_H7 4,9
MEMCLK_L7 4,9
MCKE0 4,9
MCKE1 4,9
-MSCASA 4,9
-MSRASA 4,9
DR_DM[7..0]
3
VDD_25_SUS
DR_DM [7..0] 9,10
R109 4.7 KR
-MSWEB 4,9
DDR_VREF
DR_MD0
DR_MD1
DR_MD2
DR_MD3
DR_MD4
DR_MD5
DR_MD6
DR_MD7
DR_MD8
DR_MD9
DR_MD10
DR_MD11
DR_MD12
DR_MD13
DR_MD14
DR_MD15
DR_MD16
DR_MD17
DR_MD18
DR_MD19
DR_MD20
DR_MD21
DR_MD22
DR_MD23
DR_MD24
DR_MD25
DR_MD26
DR_MD27
DR_MD28
DR_MD29
DR_MD30
DR_MD31
DR_MD32
DR_MD33
DR_MD34
DR_MD35
DR_MD36
DR_MD37
DR_MD38
DR_MD39
DR_MD40
DR_MD41
DR_MD42
DR_MD43
DR_MD44
DR_MD45
DR_MD46
DR_MD47
DR_MD48
DR_MD49
DR_MD50
DR_MD51
DR_MD52
DR_MD53
DR_MD54
DR_MD55
DR_MD56
DR_MD57
DR_MD58
DR_MD59
DR_MD60
DR_MD61
DR_MD62
DR_MD63
WP2
-MSWEB
2
4
6
8
94
95
98
99
12
13
19
20
105
106
109
110
23
24
28
31
114
117
121
123
33
35
39
40
126
127
131
133
53
55
57
60
146
147
150
151
61
64
68
69
153
155
161
162
72
73
79
80
165
166
170
171
83
84
87
88
174
175
178
179
90
63
1
9
101
102
2
VDD_25_SUS
108
120
148
168
VDD07VDD138VDD246VDD370VDD485VDD5
VDD6
VDD7
VDD8
DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQ8
DQ9
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
DQ16
DQ17
DQ18
DQ19
DQ20
DQ21
DQ22
DQ23
DQ24
DQ25
DQ26
DQ27
DQ28
DQ29
DQ30
DQ31
DQ32
DQ33
DQ34
DQ35
DQ36
DQ37
DQ38
DQ39
DQ40
DQ41
DQ42
DQ43
DQ44
DQ45
DQ46
DQ47
DQ48
DQ49
DQ50
DQ51
DQ52
DQ53
DQ54
DQ55
DQ56
DQ57
DQ58
DQ59
DQ60
DQ61
DQ62
DQ63
WP(NC)
WE#
VREF
NC2
NC3
NC4
VDDQ022VDDQ130VDDQ254VDDQ362VDDQ477VDDQ596VDDQ6
VSS03VSS111VSS218VSS326VSS434VSS542VSS650VSS758VSS866VSS974VSS1081VSS1189VSS1293VSS13
DIMM2 SLAVE ADDRESS
= (1010001X)B = A2
2
DDR DIMM
104
112
128
136
143
VDDQ7
VDDQ8
VDDQ9
VDDQ10
SOCKET
VSS14
VSS15
VSS16
100
116
124
132
82
156
164
172
180
15
VDDID
VDDQ11
VDDQ12
VDDQ13
VDDQ14
VDDQ15
DQS0
DQS1
DQS2
DQS3
DQS4
DQS5
DQS6
DQS7
DQS8
FETEN
A10_AP
PIN
184
CK0(DU)
CK0#(DU)
CK1(CK0)
CK1#(CK0#)
CK2(DU)
CK2#(DU)
NC(RESET#)
CKE0
CKE1
CAS#
RAS#
VSS17
VSS18
VSS19
VSS20
VSS21
139
145
152
160
176
Micro Star Restricted Secret
Title
System Me mory : DDR DIMM 1
Document Number
MICRO-STAR IN T' L CO.,LTD.
No. 69, Li-De St, Jung-He City,
Taipei Hsien, Taiwan
http://www.msi.com.tw
CS0#
CS1#
CS2#
CS3#
BA0
BA1
BA2
SCL
SDA
SA0
SA1
SA2
CB0
CB1
CB2
CB3
CB4
CB5
CB6
CB7
NC5
DM0
DM1
DM2
DM3
DM4
DM5
DM6
DM7
DM8
184
VDDSPD
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A11
A12
A13
-MCS2
157
-MCS3
158
71
163
-DR_MDQS0
5
-DR_MDQS1
14
-DR_MDQS2
25
-DR_MDQS3
36
-DR_MDQS4
56
-DR_MDQS5
67
-DR_MDQS6
78
-DR_MDQS7
86
47
103
MAB0
48
MAB1
43
MAB2
41
MAB3
130
MAB4
37
MAB5
32
MAB6
125
MAB7
29
MAB8
122
MAB9
27
MAB10
141
MAB11
118
115
MAB13
167
MEMBAKB0
59
MEMBAKB1
52
113
SMBCLK1
92
SMBDATA1
91
181
182
183
44
45
49
51
134
135
142
144
16
17
137
138
76
75
173
10
MCKE0
21
MCKE1
111
-MSCASB
65
-MSRASB
154
97
107
119
129
149
159
169
177
140
DDR2
DIMM-184_green
N13-1840061-K06
MS-7142
1
-MCS2 4,9
-MCS3 4,9
MAB[13..0] 4,9
MEMBAKB0 4,9
MEMBAKB1 4,9
VDD_25_SUS
MEMCLK_H4 4,9
MEMCLK_L4 4,9
MEMCLK_H1 4,9
MEMCLK_L1 4,9
MEMCLK_H6 4,9
MEMCLK_L6 4,9
-MSCASB 4,9
-MSRASB 4,9
DR_DM0
DR_DM1
DR_DM2
DR_DM3
DR_DM4
DR_DM5
DR_DM6
DR_DM7
Last Revision Date:
Friday, December 17, 2004
Sheet
83 3
1
Rev
100
of
Page 9
5
4
3
2
1
DDR Terminations
VTT_DDR_SUS VTT_DDR_SUS
DR_MD44
DR_MD35
DR_MD40
D D
RN63 8P4R-47R0402
DR_MD59
7 8
DR_MD63
5 6
DR_MD62
3 4
DR_MD58
1 2
RN61 8P4R-47R0402
-DR_MDQS7
C C
B B
-DR_MDQS6
-MCS1 4,8
-MCS0 4,8
-DR_MDQS5
-MSCASA 4,8
-MSWEB 4,8
-MSRASB 4,8
-MSRASA 4,8
MEMBAKB0 4,8
MEMBANKA0 4,8
DR_DM7
DR_MD57
DR_MD61
DR_MD60
DR_MD56
DR_MD51
DR_MD55
DR_MD50
DR_MD54
DR_DM6
MAA13
MAB13
DR_MD53
DR_MD52
DR_MD48
DR_MD49
DR_MD47
DR_MD46
DR_MD43
DR_MD42
DR_DM5
DR_MD41
-MCS1
-MCS0
-MSCASA
-MSWEB
DR_MD45
-MSRASB
-MSRASA
DR_MD37
DR_MD33
7 8
5 6
3 4
1 2
RN59 8P4R-47R0402
7 8
5 6
3 4
1 2
RN57 8P4R-47R0402
7 8
5 6
3 4
1 2
RN55 8P4R-47R0402
7 8
5 6
3 4
1 2
RN54 8P4R-47R0402
7 8
5 6
3 4
1 2
RN52 8P4R-47R0402
7 8
5 6
3 4
1 2
RN49 8P4R-47R0402
7 8
5 6
3 4
1 2
RN47 8P4R-47R0402
7 8
5 6
3 4
1 2
RN41 8P4R-47R0402
7 8
5 6
3 4
1 2
MEMBAKB1 4,8
MEMBANKA1 4,8
DR_MD39
DR_MD38
DR_MD34
DR_DM4
-DR_MDQS4
DR_MD36
DR_MD32
MAB0
MAB10
MAA10
MAA0
MAA2
MAB2
DR_MD30
MAA3
MAA4
MAA6
MAB6
MAB5
DR_MD26
DR_DM3
-DR_MDQS3
DR_MD25
DR_MD29
DR_MD28
MAB3
MAB4
MAA5
MAA8
DR_MD24
DR_MD19
VTT_DDR_SUS
RN46 8P4R-47R0402
7 8
5 6
3 4
1 2
RN43 8P4R-47R0402
7 8
5 6
3 4
1 2
RN39 8P4R-47R0402
7 8
5 6
3 4
1 2
RN36 8P4R-47R0402
7 8
5 6
3 4
1 2
RN34 8P4R-47R0402
7 8
5 6
3 4
1 2
RN29 8P4R-47R0402
7 8
5 6
3 4
1 2
RN32 8P4R-47R0402
7 8
5 6
3 4
1 2
RN31 8P4R-47R0402
7 8
5 6
3 4
1 2
RN28 8P4R-47R0402
7 8
5 6
3 4
1 2
RN25 8P4R-47R0402
DR_MD23
7 8
MAB8
5 6
MAB7
3 4
DR_MD22
1 2
RN22 8P4R-47R0402
MAA11
7 8
MAB11
5 6
MAB9
3 4
DR_MD21
1 2
RN23 8P4R-47R0402
DR_MD18
7 8
MAA7
5 6
MAA9
3 4
DR_DM2
1 2
RN20 8P4R-47R0402
-DR_MDQS2
7 8
DR_MD17
5 6
MAA12
3 4
MAB12
1 2
RN18 8P4R-47R0402
DR_MD16
7 8
DR_MD11
5 6
DR_MD20
DR_MD10
DR_MD15
DR_MD14
DR_DM1
DR_MD13
-DR_MDQS1
DR_MD12
DR_MD9
DR_MD8
DR_MD3
DR_MD6
DR_MD7
DR_MD2
DR_DM0
-DR_MDQS0
DR_MD1
DR_MD5
DR_MD4
DR_MD0
DR_MD27
DR_MD31
MAB1
MAA1
3 4
1 2
RN16 8P4R-47R0402
7 8
5 6
3 4
1 2
RN15 8P4R-47R0402
7 8
5 6
3 4
1 2
RN11 8P4R-47R0402
7 8
5 6
3 4
1 2
RN8 8P4R-47R0402
7 8
5 6
3 4
1 2
RN4 8P4R-47R0402
7 8
5 6
3 4
1 2
RN35 8P4R-47R0402
7 8
5 6
3 4
1 2
MCKE0 4,8
MCKE1 4,8
-MCS3
-MCS3 4,8
-MCS2
-MCS2 4,8
-MSCASB
-MSCASB 4,8
-MSWEA
-MSWEA 4,8
VTT_DDR_SUS
RN51 8P4R-47R0402
7 8
5 6
3 4
1 2
A A
For DIMM2 Clock
MEMCLK_H4
MEMCLK_H4 4,8 MEMCLK_L5 4,8
MEMCLK_H1 4,8
MEMCLK_H6 4,8
MEMCLK_H1
5
C70 X_C10P50N
C115 X_C10P50N
C166 X_C10P50N
MEMCLK_L4
MEMCLK_L1
MEMCLK_L6 MEMCLK_H6
MEMCLK_L4 4,8
MEMCLK_L1 4,8
MEMCLK_L6 4,8
4
For DIMM1 Clock
MEMCLK_H5 4,8
MEMCLK_H7 4,8
MEMCLK_H0 4,8
MEMCLK_H5
MEMCLK_H7
C71 X_C10P50N
C167 X_C10P50N
C124 X_C10P50N
MEMCLK_L5
MEMCLK_L7
MEMCLK_L0 MEMCLK_H0
3
MEMCLK_L7 4,8
MEMCLK_L0 4,8
DR_DM[7..0] 8,10
-DR_MDQS[7..0 ] 8,10
DR_MD[63..0] 8,10
MAB[13..0] 4,8
MAA[13..0] 4,8
DR_DM[7..0]
-DR_MDQ S[7 ..0 ]
DR_MD[63..0]
MAB[13..0]
MAA[13..0]
2
Micro Star Restricted Secret
Title
DDR Terminations Bank 0
Document Number
MICRO-STAR IN T' L CO.,LTD.
No. 69, Li-De St, Jung-He City,
Taipei Hsien, Taiwan
http://www.msi.com.tw
MS-7142
Last Revision Date:
Friday, December 17, 2004
Sheet
93 3
1
Rev
100
of
Page 10
5
DDR Terminations
-MDQS0 -DR_MDQS0
D D
C C
B B
A A
R32 10R0402
RN5 8P4R-10R0402
MD0
1 2
MD4
3 4
MD5
5 6
MD1
7 8
RN9 8P4R-10R0402
DM0
1 2
3 4
MD7
5 6
MD6
7 8
RN12 8P4R-10R0402
1 2
MD8 DR_MD8
3 4
MD9 DR_MD9
5 6
7 8
MD15
R54 10R0402
RN13 8P4R-10R0402
-MDQS1
1 2
MD13 DR_MD13
3 4
DM1
5 6
MD14 DR_MD14
7 8
RN21 8P4R-10R0402
MD17
1 2
-MDQS2
3 4
MD21 DR_MD21
5 6
DM2
7 8
MD18
R55 10R0402
RN17 8P4R-10R0402
MD10
1 2
MD20
3 4
MD11
5 6
MD16 DR_MD16
7 8
RN26 8P4R-10R0402
1 2
MD23 DR_MD23
3 4
5 6
MD24
7 8
RN30 8P4R-10R0402
1 2
MD29
3 4
5 6
-MDQS3
7 8
RN33 8P4R-10R0402
MD26
1 2
3 4
MD31
5 6
MD27
7 8
-MDQS[7..0] 4
-DR_MDQS[7..0 ] 8,9
DR_MD[63..0] 8,9
DR_DM[7..0] 8,9
-MDQS[7..0]
-DR_MDQ S[7 ..0 ]
DR_MD[63..0]
MD[63..0] 4
MD[63..0]
DR_DM[7..0]
DM[7..0]
DM[7..0] 4
5
DR_MD0
DR_MD4
DR_MD5
DR_MD1
DR_DM0
DR_MD2 MD2
DR_MD7
DR_MD6
DR_MD3 MD3
DR_MD12 MD12
-DR_MDQS1
DR_DM1
DR_MD17
-DR_MDQS2
DR_DM2
DR_MD10
DR_MD20
DR_MD11
DR_MD22 MD22
DR_MD19 MD19
DR_MD24
DR_MD28 MD28
DR_MD29
DR_MD25 MD25
-DR_MDQS3
DR_MD26
DR_MD30 MD30
DR_MD31
DR_MD27
DR_MD15
DR_MD18
-MDQS7
MD63
DM3
4
MD38
R81 10R0402
RN42 8P4R-10R0402
1 2
3 4
5 6
7 8
RN44 8P4R-10R0402
1 2
-MDQS4 -DR_MDQS4
3 4
DM4
5 6
MD34 DR_MD34
7 8
MD42
R82 10R0402
RN45 8P4R-10R0402
MD39
1 2
MD40
3 4
MD35
5 6
MD44 DR_MD44
7 8
RN50 8P4R-10R0402
1 2
-MDQS5
3 4
MD41
5 6
DM5 DR_DM5
7 8
RN53 8P4R-10R0402
MD43
1 2
MD46 DR_MD46
3 4
MD47 DR_MD47
5 6
MD49 DR_MD49
7 8
RN56 8P4R-10R0402
MD48 DR_MD48
1 2
3 4
MD53 DR_MD53
5 6
7 8
MD51
R97 10R0402
RN58 8P4R-10R0402
1 2
3 4
MD50
5 6
MD55
7 8
RN60 8P4R-10R0402
MD56
1 2
MD60
3 4
MD61 DR_MD61
5 6
MD57 DR_MD57
7 8
RN62 8P4R-10R0402
DM7
1 2
3 4
MD58 DR_MD58
5 6
7 8
R105 10R0402
R103 10R0402
R58 10R0402
4
DR_MD32 MD32
DR_MD36 MD36
DR_MD33 MD33
DR_MD37 MD37
DR_DM4
DR_MD39
DR_MD40
DR_MD35
DR_MD45 MD45
-DR_MDQS5
DR_MD41
DR_MD43
DR_MD52 MD52
DR_DM6 DM6
-DR_MDQS6 -MDQS6
DR_MD54 MD54
DR_MD50
DR_MD55
DR_MD56
DR_MD60
DR_DM7
-DR_MDQS7
DR_MD62 MD62
DR_MD38
DR_MD42
DR_MD51
DR_MD59 MD59
DR_MD63
DR_DM3
3
LAYOUT: Place on backside,
evenly spaced around VTT fill.
C91
X_C0.1U25Y
C148
X_C0.1U25Y
C33
X_C0.1U25Y
C243
X_C0.1U25Y
C205
C1U25Y
C262
X_C0.1U25Y
C228
X_C0.1U25Y
C232
X_C0.1U25Y
C237
C1U25Y
C176
X_C0.1U25Y
C35
X_C0.1U25Y
C59
X_C0.1U25Y
C250
X_C0.1U25Y
C221
C1000P50X
<nopop>
C50
X_C0.22U16Y
<nopop>
C239
X_C0.22U16Y
<nopop>
X_C0.22U16Y
<nopop>
VTT_DDR_SUS VDD_25_SUS
C156
C257
X_C0.1U25Y
C187
X_C0.1U25Y
C215
C1U25Y
C164
C1U25Y
C139
X_C0.1U25Y
C143
C1U25Y
C97
C1U25Y
2
LAYOUT: Locate close
to Clawhammer
socket.
VTT_DDR_SUS
EC23
CE470U10VD25A400RO
GND
VTT_DDR_SUS VTT_DDR_SUS VTT_DDR_SUS VTT_DDR_SUS VDD_25_SUS VDD_25_SUS VDD_25_SUS VDD_25_SUS
C104
X_C0.1U25Y
C272
C0.1U25Y
C76
C1U25Y
C123
X_C0.1U25Y
C200
X_C0.1U25Y
C220
X_C0.1U25Y
LAYOUT: Pl ace alternating caps t o GND and VDD_2.5_SUS in a single line along VTT island.
VTT_DDR_SUS
C94
VTT_DDR_SUS
C134
VTT_DDR_SUS
C0.22U16Y
C9
VTT_DDR_SUS
X_C1000P50N C160
3
X_C1U10Y
C1U10Y
C1U16Y0805
C6
C27
C83
C89
C229
C152
C131
C1U10Y
X_C0.1U25Y
X_C0.1U25Y
X_C0.1U25Y
C57
C101
C140
X_C0.1U25Y
C48
C12
X_C1000P50X
C32
X_C0.22U16Y
X_C4.7U10Y0805
C1U25Y
C3
X_C0.1U25Y
C1U16Y0805
C216
X_C4.7U10Y0805
C111
C1U25Y
LAYOUT: Locate close to
Clawhammer socket.
C7
X_C4.7U10Y0805
C45
X_C1000P50X
C234
C241
C1U10Y
C1U10Y
X_C0.1U25Y
X_C0.1U25Y
C69
C80
C127
C118
X_C1U10Y
C1000P50X
C56
X_C100P50N
C145
GND
C1000P50X
C191
C259
C261
C1U16Y0805
C1U25Y
X_C1U10Y
X_C0.1U25Y
C0.22U16Y
C186
C1U16Y0805
GND
2
C40
C226
C169
X_C0.1U25Y
X_C0.1U25Y
C246
C224
C1U10Y
C1U25Y
C255
C253
C1U10Y
C1U25Y
X_C0.1U25Y
C209
C210
C203
X_C1U10Y
X_C0.1U25Y
X_C0.1U25Y
VDD_25_SUS
Title
Document Number
MICRO-STAR IN T' L CO.,LTD.
No. 69, Li-De St, Jung-He City,
Taipei Hsien, Taiwan
http://www.msi.com.tw
1
VDD_25_SUS VCC3
C266
X_C0.1U25Y
C208
X_C0.1U25Y
C90
X_C0.1U25Y
C21
X_C0.1U25Y
C195
X_C0.1U25Y
C37
X_C0.1U25Y
VDD_25_SUS
C204
C0.1U25Y
C110
C0.1U25Y
C163
C0.1U25Y
C252
C0.1U25Y
C236
C0.1U25Y
C162
C0.1U25Y
C222
X_C0.1U25Y
C265
C0.1U25Y
C179
C197
C192
C1U25Y
C1U10Y
X_C0.1U25Y
GND
C219
C271
C218
C82
C0.1U25Y
C0.1U25Y
X_C1U10Y
GND
LAYOUT: Locate close to
Dimm2 socket.
C60
C173
C335
C0.1U25Y
C0.1U25Y
C0.1U25Y
GND
Micro Star Restricted Secret
DDR Terminations Bank 1
MS-7142
Last Revision Date:
Sheet
1
VCC
GND
GND
C0.1U25Y
Rev
100
Monday, December 20, 2004
of
10 33
Page 11
A
B
C
D
E
VDD_12_A
VDD_12_A
R293
B23
B24
VLDT
VLDT
VSS
VSS
B21
B22
B25
B26
C10
VLDT
VLDT
VLDTB9VLDT
VSSD6VSS
VSSC8VSS
D8
D12
R292
M_0R
M_0R
C11
C23
C24
C25
D10
D11
D22
D23
D24
VLDT
VLDT
VLDT
VLDT
VLDTC9VLDT
VLDT
VLDT
VLDT
VSS
VSSE5VSSE6VSSE8VSSF7VSSF8VSS
VSS
VSS
VSS
F12
D18
D20
D14
D16
B
4 4
HCLK- 7
HCLK+ 7
AVDD2
C22
A10
A24
A25
A26
B10
From Claw Hammer
CADOP0
CADOP[0..15] 4
3 3
CADON[0..15] 4
2 2
1 1
CADOP14
CLKOP0 4
CLKOP1 4
CTLOP0 4
CADON0
CADON1
CADON2
CADON3
CADON4
CADON5
CADON6
CADON7
CADON8
CADON9
CADON10
CADON11
CADON12
CADON13
CADON14
CADON15
CLKON0 4
CLKON1 4
CTLON0 4
-LDTRST 28
-LDTSTOP 5,18
A
CADOP1
CADOP2
CADOP3
CADOP4
CADOP5
CADOP6
CADOP7
CADOP8
CADOP9
CADOP10
CADOP11
CADOP12
CADOP13
CADOP15
CLKOP0
CLKOP1
CTLOP0
CLKON0
CLKON1
CTLON0
-LDTRST
-LDTSTOP
RPCOMP
PNCOMP
RTCOMP
VDD_12_A
T26
P24
P26
M24
K24
K26
H24
H26
R24
R22
N24
N22
L22
J24
J22
G24
M26
L24
F24
R26
P25
N26
M25
K25
J26
H25
G26
R23
P22
N23
M22
K22
J23
H22
G23
L26
L23
F25
B11
A12
D25
D26
C26
U24
U25
U26
V21
V22
V23
V24
V25
V26
AVDD2
RCADP0
RCADP1
RCADP2
RCADP3
RCADP4
RCADP5
RCADP6
RCADP7
RCADP8
RCADP9
RCADP10
RCADP11
RCADP12
RCADP13
RCADP14
RCADP15
RCLKP0
RCLKP1
RCTLP
RCADN0
RCADN1
RCADN2
RCADN3
RCADN4
RCADN5
RCADN6
RCADN7
RCADN8
RCADN9
RCADN10
RCADN11
RCADN12
RCADN13
RCADN14
RCADN15
RCLKN0
RCLKN1
RCTLN
LDTRST
LDTSTP
RPCOMP
RNCOMP
RTCOMP
VLDT
VLDT
VLDT
VLDT
VLDT
VLDT
VLDT
VLDT
VLDT
AGND2
C21
VLDT
VSSA8VSS
VSS
A23
VLDT
VSSB8VSS
B13
U7A
VLDT
VLDT
VLDTA9VLDT
VSS
VSS
B15
B17
B19
R92
M_0R
E10
E11
E21
E22
E23
E24
VLDT
VLDTD9VLDT
VLDT
VLDT
VLDT
VLDT
VLDT
VSS
VSS
VSS
VSS
VSS
VSS
VSS
G1
F13
F14
F17
F18
F26
G25
HCKGND
F10
F11
VLDTE9VLDT
VSSH1VSS
VSS
H2
H23
R294
M_0R
VDD_12_A V CC3HCK
F15
F16
F19
F20
F21
F22
F23
G21
G22
H21
J11
J12
J13
J14
J15
J16
J17
K18
K21
J10
VLDT
VLDT
VLDT
VLDT
VLDT
VLDT
VLDT
VLDT
VLDT
VLDT
VLDT
VLDT
VLDT
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
J2
J3
K4
J21
J25
J18
K12
K10
K16
K15
K13
K14
K11
C
L18
VLDT
VLDT
VLDT
VLDT
VLDT
VLDT
VLDT
VLDT
VLDT
B12
TCADP0
A13
TCADP1
B14
TCADP2
A15
TCADP3
A17
TCADP4
B18
TCADP5
A19
TCADP6
B20
TCADP7
E12
TCADP8
D13
TCADP9
E14
TCADP10
D15
TCADP11
D17
TCADP12
E18
TCADP13
D19
TCADP14
E20
TCADP15
B16
TCLKP0
E16
TCLKP1
A21
TCTLP
C12
TCADN0
A14
TCADN1
C14
TCADN2
A16
TCADN3
A18
TCADN4
C18
TCADN5
A20
TCADN6
C20
TCADN7
E13
TCADN8
C13
TCADN9
E15
TCADN10
C15
TCADN11
C17
TCADN12
E19
TCADN13
C19
TCADN14
D21
TCADN15
C16
TCLKN0
E17
TCLKN1
A22
TCTLN
L21
VLDT
M18
VLDT
N18
VLDT
N21
VLDT
P18
VLDT
P21
VLDT
R18
VLDT
T18
VLDT
T21
VLDT
T22
VLDT
T23
VLDT
T24
VLDT
T25
VLDT
U18
VLDT
U21
VLDT
U22
VLDT
U23
VLDT
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
L10
L11
L13
L12
L14
L15
K17
K23
FOR K8T800pro FOR K8M800
VCC3
FB14 T_0R
HCKGND
R295 T_0R
To Claw Hammer
CADIP0
CADIP1
CADIP2
CADIP3
CADIP4
CADIP5
CADIP6
CADIP7
CADIP8
CADIP9
CADIP10
CADIP11
CADIP12
CADIP13
CADIP14
CADIP15
CLKIP0
CLKIP1
CTLIP0
CADIN0
CADIN1
CADIN2
CADIN3
CADIN4
CADIN5
CADIN6
CADIN7
CADIN8
CADIN9
CADIN10
CADIN11
CADIN12
CADIN13
CADIN14
CADIN15
CLKIN0
CLKIN1
CTLIN0
VDD_12_A
(VIA-K8M800-VT8380)
VCC3HCK
C242
T_C1000P50X
CADIP[0..15] 4
CLKIP0 4
CLKIP1 4
CTLIP0 4
CADIN[0..15] 4
CLKIN0 4
CLKIN1 4
CTLIN0 4
D
C238
X_C1U10Y
CB14
X_C1000P50X
5020
PNCOMP
RTCOMP
RPCOMP
Micro Star Restricted Secret
Title
NORTH BRIDGE (HT)
Document Number
MICRO-STAR INT'L CO.,LTD.
No. 69, Li-De St, Jung-He City,
Taipei Hsien, Taiwan
http://www.msi.com.tw
C202 C0.1U25Y
Around NB
R78 49.9R1%
R80 100R1%
R79 49.9R1%
MS-7142
Last Revision Date:
Sheet
E
VDD_12_A
Rev
100
Friday, De ce mb e r 17, 2004
of
11 33
Page 12
A
K8M800/K8T800pro AGP 8X ,V-Link, Misc. Control
4 4
GAD0
GAD[31..0] 15
3 3
GC/BE#[3..0] 15
AD_STBS0 15
AD_STBF0 15
AD_STBS1 15
AD_STBF1 15
2 2
SBA[7..0] 15
AGPVREF_GC 15
1 1
AGP8XDET# 15
AD_STBS0
AD_STBF0
AD_STBS1
AD_STBF1
GFRAME 15
GIRDY 15
GTRDY 15
GDEVSEL 15
GSTOP 15
GPAR 15
RBF 15
WBF 15
GREQ 15
GGNT 15
GSERR 15
GCLK_NB 7
SB_STBS
SB_STBS 15
SB_STBF
SB_STBF 15
ST0 15
ST1 15
ST2 15
AGPPCOMP
AGPNCOMP
AGPVREF_GC
DBIL
DBIL 15
DBIH
DBIH 15
A
GAD1
GAD2
GAD3
GAD4
GAD5
GAD6
GAD7
GAD8
GAD9
GAD10
GAD11
GAD12
GAD13
GAD14
GAD15
GAD16
GAD17
GAD18
GAD19
GAD20
GAD21
GAD22
GAD23
GAD24
GAD25
GAD26
GAD27
GAD28
GAD29
GAD30
GAD31
GC/BE#0
GC/BE#1
GC/BE#2
GC/BE#3
SBA0
SBA1
SBA2
SBA3
SBA4
SBA5
SBA6
SBA7
ST0
ST1
ST2
AF18
AD18
AE18
AF17
AD17
AD16
AE16
AF16
AF14
AD14
AD13
AE13
AF13
AD12
AF12
AE12
AD10
AE10
AF10
AD15
AF11
AD11
AF15
AE15
AC10
AC14
AC11
AC12
AC16
AC15
AC13
AD9
AF9
AF8
AE9
AD8
AF6
AD7
AE6
AD5
AF5
AF4
AE4
AD4
AC7
AF7
AE7
AC9
AD6
AC1
Y1
AA3
A11
AC2
AC3
AD1
AD2
AF2
AD3
AE3
AF3
AE1
AF1
AA2
AA1
AB1
V1
W1
AC6
Y2
AC4
AC5
GD0/FPD10
GD1/FPD11
GD2/FPDVICLK
GD3/FPD09
GD4/FPD08
GD5/FPD07
GD6/FPD06
GD7/FPD05
GD8/FPDVIDET
GD9/FPDVIHS
GD10/FPD01
GD11/FPD23
GD12/FPD00
GD13/FPD22
GD14/FPD21
GD15/FPD20
GD16/FPD18
GD17/FPD17
GD18/FPD16
GD19/FPDE
GD20/FPD14
GD21/FPCLK
GD22/FPD13
GD23/FPD15
GD24/DVP1D09
GD25
GD26/DVP1D10
GD27
GD28/DVP1D07
GD29/DVP1D06
GD30/DVP1D08
GD31/DVP1D04
GCBE0/FPD03
GCBE1/SB_DA
GCBE2/FPD19
GCBE3/DVP1D11
ADSTB0S/FPD02
ADSTB0F/FPD04
ADSTB1S/FPDET
ADSTB1F/FPD12
GFRAME/FPHS
GIRDY/SB_CK
GTRDY
GDEVSEL/FPVS
GSTOP/FPDVICLK_N
GPAR/FPDVIVS
RBF
WBF/FPCLK_N
GREQ/DVI_DDCCK
GGNT/DVI_DDCDA
GSERR/FPDVIDE
GCLK
SBA0/DVP1VS
SBA1/DVP1DE
SBA2/DVP1D00
SBA3/DVP1HS
SBA4/DVP1D05
SBA5/DVP1D03
SBA6/DVP1CLK
SBA7/DVP1CLK_N
SB_STBS/DVP1D02
SB_STBF/DVP1D01
ST0
ST1/DVP1DET
ST2
AGPPCOMP
AGPNCOMP
AGPVREF0
AGPVREF1
AGP8XDET
DBIL
DBIH
VSSQQ
VSS
VSS
T1
R14
R15
R13
VSS
VDDQ
VSS
R12
B
K8
L8
R9
N5
U1
VCCQQ
VCC4/NCN9VCC4/NCP9VCC4/NC
VSS
R10
R11
B
VCC4/NCM5VCC4/NC
VCC4/NCM9VCC4/NC
VCC4/NC
VSS
VSS
VSSR1VSSR2VSSR3VSSR4VSSR5VSS
P17
P23
K5
L9
J9
VCC4/NC
VCC4/NCL5VCC4/NCK9VCC4/NC
VSS
VSSP5VSS
VSS
VSS
VSS
VSS
VSS
VSS
P10
P11
P12
P13
P14
P15
P16
N17
N25
F5
F3
VCC4/NCF6VCC4/NCF2VCC4/NC
VCC4/NCF4VCC4/NC
VCC4/NCG2VCC4/NCG3VCC4/NCG4VCC4/NCG5VCC4/NCH3VCC4/NCH4VCC4/NCH5VCC4/NCJ4VCC4/NCJ5VCC4/NC
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
N10
N11
N12
N13
N14
N15
N16
M17
M21
M23
VCCA3 VDD3
F1
E3
E1
D1
VCC4/NC
VCC4/NCE4VCC4/NCE2VCC4/NC
VCC4/NC
VCC4/NC
UPSTB
UPSTB
DNSTB
DNSTB
UPCMD
DNCMD
LVREF
LCOMPP
PWRGD
PCIRST
TESTIN
SUSTAT
DEBUG
AR/NC
AG/NC
RSET/NC
HSYNC/NC
VSYNC/NC
XIN/NC
INTA/NC
BISTIN/NC
SPCLK1/NC
SPCLK2/NC
SPD1/NC
SPD2/NC
TVD00/DVP0D00/NC
TVD01/DVP0D01/NC
TVD02/DVP0D02/NC
TVD03/DVP0D03/NC
TVD04/DVP0D04/NC
TVD05/DVP0D05/NC
TVD06/DVP0D06/NC
TVD07/DVP0D07/NC
TVD08/DVP0D08/NC
TVD09/DVP0D09/NC
TVD10/DVP0D10/NC
TVD11/DVP0D11/NC
TVCLKIN/DVP0DET/NC
TVDE/DVP0DE/NC
TVHS/DVP0HS/NC
TVVS/DVP0VS/NC
TVCLK/DVP0DCLK/NC
GPO0/NC
GPOUT/NC
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
M10
M11
M12
M13
M14
M15
M16
(VIA-K8M800-VT8380)
C
VPAR
AB/NC
VSS
L25
C
U7B
VD0
VD1
VD2
VD3
VD4
VD5
VD6
VD7
VBE
VSS
L17
AD20
AD21
AF24
AE24
AE19
AF20
AD24
AF25
AE21
AF19
AE23
AF23
AF22
AD22
AF26
AD23
AF21
AD19
AE26
AD25
AC26
AD26
AC17
B3
A3
A2
C4
A1
B1
C6
E7
D3
P2
C2
P1
C1
J1
K2
K3
L4
K1
L2
L3
M4
L1
M2
M3
M1
P4
N1
N4
N3
P3
N2
D2
VSS
L16
FOR K8T800pro
VCC3
FB18
T_0R
M_C1000P50X
VLAD0
VLAD1
VLAD2
VLAD3
VLAD4
VLAD5
VLAD6
VLAD7
LVREF_NB
LCOMPP
TESTIN
DEBUG
RSET
R110 M_80.6R1%
K8M800:0Ohm;K8T800 pro:bead
VCCA3
C273
C1U10Y
VLAD[0..7] 18
VBE0# 18
VPAR 18
UPSTB 18
UPSTB# 18
DNSTB 18
DNSTB# 18
UPCMD 18
DNCMD 18
C258
X_C1000P50N
PWROK_NB# 17
PCIDEVRST# 24,27
SUSST# 17
R94 10KR
AR 26
AG 26
AB 26
HSYNC 26
VSYNC 26
GUICLK 7
PIRQ#A 1 5,16,19,20
R107 M_1KR
DDCCLK 26
DDCDATA 26
C269
CB15
X_C1000P50X
D
R99
3KR1%
R101
1KR1%
E
VCC2_5
LVREF_NB
K8M800 and K8T800pro will be 0.625V(R153=1KST,R11-0102T13-Y01)
LAYOUT: Plac e c a p s o n t he bottom of NB
VDDQ
C489 X _C0.1U25Y
C491 X _C1U16Y
C492 X _C0.1U25Y
C487 X _C1U10Y
For K8M800.
LAYOUT: Place caps as close NB as possible
FOR K8M800 -- AN307B
R102 M_100KR
AGPVREF_GC
TESTIN
VPAR
AGPNCOMP
AGPPCOMP
LCOMPP
Micro Star Restricted Secret
Title
NORTH BRIDGE (AGP & VLINK)
Document Number
MICRO-STAR INT'L CO.,LTD.
No. 69, Li-De St, Jung-He City,
Taipei Hsien, Taiwan
D
http://www.msi.com.tw
C488 C 10U / 10Y
C256 C 0. 1U 25Y
R100 4.7KR
R224 X_8.2KR
R133 60.4R1%
R131 60.4R1%
R96 360R1%
MS-7142
Last Revision Date:
Sheet
E
C249
C0.1U25Y
C254
C0.1U25Y
VCC2_5
VDDQ
Friday, De ce mb e r 17, 2004
of
12 33
Rev
100
Page 13
A
B
C
D
E
VCC1
VCC1
VCC1
VCC1
VCC1
VCC1
VCC1
VCC1
VCC1
VCC1
VCC1
VCC1
VCC1
VCC1
VCC1
VCC1
VCC1
VCC1
VCC1
VCC1
VCC1
VCC1
VCC1
VCC1
VCC1
VCC1
VCC1
VCC1
VCC1
VCC1
VCC1
VCC1
VCC1
VCC1
VCC1
VCC1
VCC1
VCC1
VDDQ
AA4
AA5
AB11
AB12
AB13
AB14
AB7
AB8
M8
N8
T2
T3
T4
T5
T8
T9
U2
U3
U4
U5
U8
U9
V10
V11
V12
V13
V2
V3
V4
V8
V9
W2
W3
W4
W9
Y3
Y4
Y5
VDDQ
AA21
VDD
AA22
VDD
AA23
VDD
AA24
VDD
AA25
VDD
AA26
VDD
AB21
VDD
AB22
VDD
AB23
VDD
AB24
VDD
AB25
VDD
AB26
VDD
F9
VDD
H10
VDD
H11
VDD
H12
VDD
H15
VDD
H16
VDD
H8
VDD
H9
VDD
J8
VDD
K19
VDD
L19
VDD
M19
VDD
P8
VDD
R19
VDD
R8
VDD
T19
VDD
U19
VDD
V18
VDD
V19
VDD
W10
VDD
W11
VDD
W12
VDD
W13
VDD
W14
VDD
W19
VDD
Y20
VDD
Y21
VDD
Y22
VDD
Y23
VDD
Y24
VDD
Y25
VDD
Y26
VDD
AB16
VSS
AC8
VSS
AC22
VSS
AC23
VSS
AC24
VSS
AE2
VSS
AE5
VSS
AE8
VSS
AE11
VSS
AE14
VSS
AE17
VSS
AE20
VSS
AE22
VSS
AE25
VSS
Power and Ground Connections
LAYOUT : Po pualte caps on the bottom side
of NB.
VDDQ
VDDQ
B
VDDQ
C482 X_C1U10Y
C486 X_C1000P50N
C484 X_C1U10Y
C485 X_C1000P50N
X_C1000P50N
VDDQ
CB11
X_C1000P50N
CB12
CB13 C1 0U 1 0 Y 0805
VDD_12_A
C325
C0.1U25Y
C339
C338
C1U10Y
C1U10Y
C299 X_ C1U10Y
VDDQ
C321
X_C0.1U25Y
VDDQ
C340
C1U10Y
C337
X_C0.1U25Y
C320
X_C1U10Y
VDD_12_A
C319
C0.1U25Y
C324
C0.1U25Y
VDDQ
C313
X_C1U10Y
C288
C1U10Y
VDD_12_A
C479 X _C1U10Y
C480 X_C0.22U16Y
C483 X _C1U10Y
C481 X _C1U10Y
C
D
For K8M800 Only
FB17
M_0R
FB15 X_0
CP6
X_COPPER
FB16 M_0R
FB19 X_0
CP7
X_COPPER
1
3
5
7
RGBPLL
C264
M_C1000P50X
GND_RGBPLL
DAC_PLL
C267
M_C1000P50X
GND_DAC
R114
M_0R0805
2
4
RN65
6
M_8P4R-0R
8
C263
M_C1U10Y
C274
M_C1U10Y
CB3
M_C1U16Y0805
CB4
M_C1000P50X
5020
VDDQ
VDD3
VCC3 VDD3
Note: When use K8T800,
these power circuit for
GFX analog power should be
NOPOPed.
For K8M800/K8T800 Pro Only
VCC3
FB13
X_0
VCC3
Title
NORTH BRIDGE (POWER/GOUND)
Document Number
MICRO-STAR INT'L CO.,LTD.
No. 69, Li-De St, Jung-He City,
Taipei Hsien, Taiwan
http://www.msi.com.tw
AVDD1
C1000P50X
FB12 X_0
CP4
X_COPPER
C206
2 1
C1000P50X
C207
C1U10Y
AVDD2
C212
AGND2
CP5
X_COPPER
Micro Star Restricted Secret
MS-7094
Last Revision Date:
Sheet
E
CB10
X_C1000P50X
5020
C213
C1U10Y
Friday, De ce mb e r 17, 2004
13 33
Rev
100
of
VSUSNB
AVDD1
RGBPLL
GND_RGBPLL
RGBPLL
GND_RGBPLL
DAC_PLL
GND_DAC
DAC_PLL
GND_DAC
VDDQ
U7C
AC25
VSUS15/VSUS25
E25
AVDD1
E26
AGND1
D5
VCCPLL1/NC
A5
VCCPLL2/NC
C5
GNDPLL1/NC
B5
GNDPLL2/NC
A6
VCCPLL3/NC
B6
GNDPLL3/NC
B2
DACVDD/NC
C3
GNDDAC1/NC
D4
GNDDAC2/NC
A4
VCCRGB/NC
B4
GNDRGB/NC
A7
NC
D7
NC
AB17
VCC2
AB18
VCC2
AB19
VCC2
AB20
VCC2
AC18
VCC2
AC19
VCC2
AC20
VCC2
AC21
VCC2
V14
VCC2
V15
VCC2
V16
VCC2
V17
VCC2
W15
VCC2
W16
VCC2
W17
VCC2
W18
VCC2
B7
VSS/NC
C7
VSS/NC
R16
VSS
R17
VSS
R21
VSS
R25
VSS
T10
VSS
T11
VSS
T12
VSS
T13
VSS
T14
VSS
T15
VSS
T16
VSS
T17
VSS
U10
VSS
U11
VSS
U12
VSS
U13
VSS
U14
VSS
U15
VSS
U16
VSS
U17
VSS
V5
VSS
W5
VSS
W21
VSS
W22
VSS
W23
VSS
W24
VSS
W25
VSS
W26
VSS
AB2
VSS
AB3
VSS
AB4
VSS
AB5
VSS
AB6
VSS
AB9
VSS
AB10
VSS
AB15
VSS
(VIA-K8M800-VT8380)
A
C247
C1U10Y
4 4
3 3
2 2
1 1
Page 14
COREFB_H 5
COREFB_L 5
VID4 5
VID3 5
VID2 5
VID1 5
VID0 5
PG_VCORE 27
VCORE_EN 27
VRM_EN > 0.6V ENABLE
VCORE
R23
51R
R22
51R
ISL6568CR FOR AMD K8 754 POWER CKT
X_C0.1U25Y
CHOK2
CH-1.2U18A
C79
C29
C1U16Y0805
X_C4.7U16Y1206
C144
R76
D S
2.2R0805
Q7
G
C194
06N03
C1000P50X
C130
R47
D S
Q4
2.2R0805
G
06N03
C84
C1000P50X
+
12
EC15
CHOK4
CH-1.0U40A
CHOK3
CH-1.0U40A
+
+
12
12
EC5
.CD1000U16EL20
.CD1000U16EL20
EC10
+
+
12
12
EC13
EC11
EC8
.CD1000U16EL20
.CD1000U16EL20
.CD1000U16EL20
EC9
EC14
EC12
1800U/6.3V
X_1800U/6.3V
X_1800U/6.3V
EC6
EC16
EC17
1800U/6.3V
1800U/6.3V
1800U/6.3V
1800U/6.3V
+12VA
C98
C4.7U16Y1206
VCORE
C100
X_C100U2SP
Near CPU Socket
C24
C33P50N
112
X_C0.1U25Y
C78
C0.01U25Y
2
C138
X_C0.1U25Y
C81
X_C100U2SP
JPW1
3
12V
4
12V
PWR-2X2M
PH3
HS-0500410-K08
GND
GND
112
C72
C155
C4.7U16Y1206
0.8V~1.55V/80A
VCORE
ATX12V POWER CONNECTOR
PH2
2
HS-0500410-K08
C87
1
2
X_C0.1U25Y
Micro Star Restricted Secret
Title
Vcore ISL6568 2 Phase
Document Number
MICRO-STAR INT'L CO.,LTD.
No. 69, Li-De St, Jung-He City,
Taipei Hs i en, Taiwan
http://www.msi.com.tw
MS-7142
Last Revision Date:
Friday, D ec ember 17, 2004
Sheet
14 33
Rev
100
of
VCC VCC
VCC
R3
R13
1KR
1KR
C8
C0.1U25Y
C53
X_C1000P50X
C52
X_C1000P50X
R4
4.7KR
VCC
R14 10KR
C31 C330P50N
R15 1KR
R8
X_150KR
R2
150KR
S-1N5817_DO214AC
U2
ISL6568CR
32PIN 5x5QFN
22
21
30
31
32
1
28
20
C28
C0.1U25Y
C23
C5600P50X
5
6
7
9
8
3
R11
+20mV
OFFSET
24KR1%
29
2
C13
C0.01U25Y
BOTTOM PAD CONNECT TO
GND THROUGH 10vias
VID4
VID3
VID2
VID1
VID0
VID12.5
PGOOD
ENLL
COMP
FB
VDIFF
VSEN
RGND
OFST
FS
REF
D2
C10
C4.7U16Y1206
4
PVCC
BOOT1
VCC
UGATE1
PHASE1
ISEN1
LGATE1
BOOT2
UGATE2
PHASE2
ISEN2
LGATE2
OCSET
ICOMP
ISUM
IREF
GND
33
R7
15
24
2.2R0805
25
23
R9 3KR1%
26
27
R17
18
2.2R0805
17
19
16
14
10
11
12
13
C0.1U25Y
C0.1U25Y
R25
3KR1%
C44
C0.01U25Y
+12VA
C18
C34
+12VA VIN
C20
R60
1R0805
R67
0R0805
R57
1R0805
R46
0R0805
R305
10KR
R28 1 7.4K R1%
R303
10KR
C43
C0.047U16X
VIN
R302
10KR
G
G
VIN
R304
10KR
G
G
R34 39KR
R33 39KR
C1U16Y0805
D S
Q6
09N03
D S
Q8
06N03
C1U16Y0805
D S
Q5
09N03
D S
Q3
06N03
R26
4.7R0805
C42
C1U16Y0805
R24 1KR1%
Page 15
5
AGP PRO Connector
VCC
D D
C C
B B
C358
C0.1U25Y
GCLK_SLOT 7
AD_STBF1 12 AD_STBS1 12
AD_STBF0 12
4
VCC3
VDDQ
VCC
AGP1
SLOT-AGP1.5LATCH_red
N11-1240131-A10
B1
-OVRCNT
B2
5V
B3
5V
B4
USB+
B5
GND
PIRQ#B 16,19,20
SB_STBF 12
GIRDY 12
GDEVSEL 12
GSERR 12
GREQ
GREQ 12
ST0
ST0 12 ST1 12
ST2
ST2 12
RBF
RBF 12
DBIL
DBIL 12
SBA0
SBA2
SB_STBF
SBA4
SBA6
3VDUAL
GAD31
GAD29
GAD27
GAD25
AD_STBF1
GAD23
GAD21
GAD19
GAD17
GC/BE#2
GIRDY
GDEVSEL
GPERR
GSERR
GAD14
GAD12
GAD10
GAD8
AD_STBF0 AD_STBS0
GAD7
GAD5
GAD3
GAD1
VREF_CG
B6
-INTB
B7
CLK
B8
-REQ
B9
3.3V
B10
ST0
B11
ST2
B12
-RBF
B13
GND
B14
RESERVED
B15
SBA0
B16
3.3V
B17
SBA2
B18
SB_STB
B19
GND
B20
SBA4
B21
SBA6
B22
RSVD/KEY
B23
GND/KEY
B24
AUX3V/KEY
B25
3.3V/KEY
B26
AD31
B27
AD29
B28
3.3V
B29
AD27
B30
AD25
B31
GND
B32
AD_STB1
B33
AD23
B34
VDDQ
B35
AD21
B36
AD19
B37
GND
B38
AD17
B39
C/-BE2
B40
VDDQ
B41
-IRDY
B42
AUX3V/KEY
B43
GND/KEY
B44
RSVD/KEY
B45
3.3V/KEY
B46
-DEVSEL
B47
VDDQ
B48
-PERR
B49
GND
B50
-SERR
B51
C/-BE1
B52
VDDQ
B53
AD14
B54
AD12
B55
GND
B56
AD10
B57
AD8
B58
VDDQ
B59
AD_STB0
B60
AD7
B61
GND
B62
AD5
B63
AD3
B64
VDDQ
B65
AD1
B66
VREF_CG
-TYPEDET
RESERVED
RESERVED
-SB_STB
RSVD/KEY
GND/KEY
RSVD/KEY
3.3V/KEY
-AD_STB1
C/-BE3
VDDQ
VDDQ
-FRAME
RSVD/KEY
GND/KEY
RSVD/KEY
3.3V/KEY
-TRDY
-STOP
VDDQ
C/-BE0
VDDQ
-AD_STB0
VDDQ
VREF_GC
USB-
-INTA
-GNT
-PIPE
-WBF
SBA1
SBA3
SBA5
SBA7
AD30
AD28
AD26
AD24
AD22
AD20
AD18
AD16
-PME
AD15
AD13
AD11
3
VCC3
TYPEDET#
AGPGND
R174 0R
3VDUAL 3VDUAL
R196
X_4K7R2
AGP8XDET_GC#
GGNT
ST1
WBF
SBA1
SBA3
SB_STBS
SBA5
SBA7
GAD30
GAD28
GAD26
GAD24
AD_STBS1
GC/BE#3
GAD22
GAD20
GAD18
GAD16
GFRAME
GTRDY
GSTOP
GPAR
GAD15 GC/BE#1
GAD13
GAD11
GAD9
GC/BE#0
GAD6
GAD4
GAD2
GAD0
AGPVREF_GC
B
PIRQ#A 12,16,19,20
PCIRST# 16,27
GGNT 12
DBIH 12
WBF 12
SB_STBS 12
GFRAME 12
GTRDY 12
GSTOP 12
PCI_PME# 17,19,20
GPAR 12
AD_STBS0 12
AGPVREF_GC 12
VDDQ
+12V
A1
12V
A2
A3
A4
A5
GND
A6
A7
-RST
A8
A9
3.3V
A10
ST1
A11
A12
A13
GND
A14
A15
A16
3.3V
A17
A18
A19
GND
A20
A21
A22
A23
A24
A25
A26
A27
A28
3.3V
A29
A30
A31
GND
A32
A33
A34
A35
A36
A37
GND
A38
A39
A40
A41
A42
A43
A44
A45
A46
A47
A48
A49
GND
A50
PAR
A51
A52
A53
A54
A55
GND
A56
AD9
A57
A58
A59
A60
AD6
A61
GND
A62
AD4
A63
AD2
A64
A65
AD0
A66
AGP_PME#
C E
2
R194
X_4K7R2
Q25
X_2N3904S
SUSB# 17 ,24,27
1
GAD[31..0]
GAD[31..0] 12
SBA[7..0]
SBA[7..0] 12
GC/BE#[3..0]
GC/BE#[3..0] 12
GAD31
GAD30
GAD29
GAD28
GAD27
GAD26
GAD25
GAD24
GAD23
GAD22
GAD21
GAD20
GAD19
GAD18
GAD17
GAD16
GAD15
GAD14
GAD13
GAD12
GAD11
GAD10
GAD9
GAD8
GAD7
GAD6
GAD5
GAD4
GAD3
GAD2
GAD1
GAD0
SBA0
SBA1
SBA2
SBA3
SBA4
SBA5
SBA6
SBA7
GC/BE#0
GC/BE#1
GC/BE#2
GC/BE#3
AGP "Vref" => 4X : 0.5*1.5V=0.75 Volt ,
8X : 0.23*1.5 =0.345 Volt
VDDQ
4X : 0.75V
A A
8X : 0.35V
VREF_CG
C1U10Y
R188
3.32KR1%
R173
C343
C0.1U25Y
1.47KR1%
R177
1.02KR1%
C344
5
+12V
R186
D S
1KR
AGP8XDET_GC#
G
Q19
N-2N7002_SOT23
"AGP8XDET_GC#"
=>4X=High,8X=Low
VCC3
R187
4.7KR
D S
Q22
N-2N7002_SOT23
G
4
AGP8XDET#
R176
10KR
0 : 8X
1 : 4X
0 : 8X 1 : 4X
AGP8XDET# 12
3
AGP8XDET_GC#
1 : 4X
0 : 8X
VDDQ
+12V
R179
1KR
R183
10KR
Q20
N-MMBT3904_SOT23
G
R184
8.2KR
GPERR
D S
Q21
N-2N7002_SOT23
R185
200R1%
2
Add-in Card Power
VDDQ
VCC3
3VDUAL
VCC5
VCC12
Micro Star Restricted Secret
Title
Document Number
MICRO-STAR IN T' L CO.,LTD.
No. 69, Li-De St, Jung-He City,
Taipei Hsien, Taiwan
http://www.msi.com.tw
Imax
2.0A
6.0A
0.75A
2.0A
1.0A
AGP PRO Slot
MS-7142
V_Min V _M axVUnits
1.425 1.575
3.15 3.45
3.15 3.45VV
4.75 5.25
11.4 12 .6
Last Revision Date:
Sheet
1
V
V
Rev
Friday, December 17, 2004
of
15 33
100
Page 16
A
AD[31..0]
AD[31..0] 19,20
4 4
3 3
C_BE#[3..0]
C_BE#[3..0] 19,20
FRAME# 19,20
DEVSEL# 19,20
IRDY# 19,20
TRDY# 19,20
STOP# 19,20
SERR# 19,20
PAR 19,20
PERR# 19,20
PCIRST# 15,27
PIRQ#A 12,15,19,20
PIRQ#B 15,19,20
2 2
1 1
PIRQ#C 19,20
PIRQ#D 19,20
PREQ#0 19
PREQ#1 19
PREQ#2 20
PGNT#0 19
PGNT#1 19
PGNT#2 20
A
AD0
AD1
AD2
AD3
AD4
AD5
AD6
AD7
AD8
AD9
AD10
AD11
AD12
AD13
AD14
AD15
AD16
AD17
AD18
AD19
AD20
AD21
AD22
AD23
AD24
AD25
AD26
AD27
AD28
AD29
AD30
AD31
C_BE#0
C_BE#1
C_BE#2
C_BE#3
FRAME#
DEVSEL#
IRDY#
TRDY#
STOP#
SERR#
PAR
PERR#
PCIRST#
PIRQ#A
PIRQ#B
PIRQ#C
PIRQ#D
INTH#
PREQ#0
PREQ#1
PREQ#2
PREQ#3
PREQ#4
PREQ#5
PGNT#0
PGNT#1
PGNT#2
PGNT#3
PGNT#4
PGNT#5
G2
AD0
J4
AD1
J3
AD2
H3
AD3
F1
AD4
G1
AD5
H4
AD6
F2
AD7
E1
AD8
G3
AD9
E3
AD10
D1
AD11
G4
AD12
D2
AD13
D3
AD14
F3
AD15
K3
AD16
L3
AD17
K2
AD18
K1
AD19
M4
AD20
L2
AD21
N4
AD22
L1
AD23
M2
AD24
M1
AD25
P4
AD26
N3
AD27
N2
AD28
N1
AD29
P1
AD30
P2
AD31
E2
CBE0
C1
CBE1
L4
CBE2
M3
CBE3
J1
FRAME
H2
DEVSEL
J2
IRDY
H1
TRDY
K4
STOP
C2
SERR
F4
PAR
C3
PERR
R1
PCIRST
A4
INTA
B4
INTB
B5
INTC
C4
INTD
D4
INTE
E4
INTF
A3
INTG
B3
INTH
A5
REQ0
B6
REQ1
C5
REQ2
D5
REQ3
P3
REQ4
R3
REQ5
A6
GNT0
D6
GNT1
C6
GNT2
E5
GNT3
R4
GNT4
R2
GNT5
GNDA1GNDA2GND
B1
B2
GND
GNDE8GND
F25
H23
B
H10
H11
VCC33H9VCC33
GND
GND
J21
J25
B
H12
VCC33
GND
VCC33
A13
VCC3
R19
VCC33J8VCC33K8VCC33L8VCC33M8VCC33N8VCC33P8VCC33R8VCC33
USBGND
USBGND
USBGND
USBGND
USBGND
USBGND
USBGND
USBGND
A17
A19
A21
B13
B15
B17
B19
A15
T19
U8
VCC33T8VCC33
USBGND
USBGND
B21
C13
U19
VCC33
VCC33
USBGND
USBGND
C14
C15
V19
V21
VCC33V8VCC33
USBGND
USBGND
C16
C17
W10
VCC33
VCC33W9VCC33
USBGND
USBGND
C18
C19
W11
W17
VCC33
USBGND
USBGND
C20
C21
W18
W19
VCC33
VCC33
USBGND
USBGND
D13
D15
W21
Y21
VCC33
VCC33
USBGND
USBGND
D17
D19
W8
VCC33
VCC33
USBGND
USBGND
E13
D21
USBGND
USBGND
E15
E17
C
USBGND
USBGND
E19
E21
C
USBVDD
USBVDD
USBVDD
USBVDD
USBVDD
USBVDD
USBVDD
USBVDD
USBVDD
USBVDD
USBVDD
USBVDD
USBSUS25
PLLVDDA
PLLVDDA
PLLGNDA
PLLGNDA
USBP0+
USBP0USBP1+
USBP1USBP2+
USBP2USBP3+
USBP3USBP4+
USBP4USBP5+
USBP5USBP6+
USBP6USBP7+
USBP7-
USBOC0
USBOC1
USBOC2
USBOC3
USBOC4
USBOC5
USBOC6
USBOC7
USBCLK
USB REXT
UDPWR
UDPWREN
KBCK/KA20G
KBDT/KBRC
MSCK/IRQ1
MSDT/IRQ12
USBGND
USBGND
USBGND
USBGND
H13
H15
H14
USBGND
H16
H17
U16A
USBGND
USBGND
VIA-VT8237R
H18
D
3VDUAL
A22
B22
C22
CB8
D22
C0.1U25Y
E22
F22
J13
J14
J15
J16
J17
J18
C24
A23
B23
D23
C23
E20
D20
A20
B20
E18
D18
A18
B18
D16
E16
A16
B16
D14
E14
A14
B14
C26
D24
B26
C25
B24
A24
A26
A25
E23
B25
D26
D25
W3
V1
W1
W2
USBVCCA
USBGNDA
USBP0
USBN0
USBP1
USBN1
USBP2
USBN2
USBP3
USBN3
USBP4
USBN4
USBP5
USBN5
USBP6
USBN6
USBP7
USBN7
USBCLK_SB
USBREXT
VCC2_5
USB_OC#1
USB_OC#2
USB_OC#5
R232 6.04KR1%
R225 10KR
C381
C10U10Y1206
C379
C0.1U25Y
near SB
CB7
X_C1U10Y
CB18
X_C0.1U25Y
VSUS2_5
USBP0 23
USBN0 23
USBP1 23
USBN1 23
USBP2 23
USBN2 23
USBP3 23
USBN3 23
USBP4 23
USBN4 23
USBP5 23
USBN5 23
USBP6 23
USBN6 23
USBP7 23
USBN7 23
USB_OC#1 23
USB_OC#2 23
USB_OC#5 23
USBCLK_SB 7
KBCLK# 25
KBDAT# 25
MSCLK# 25
MSDAT# 25
D
Near Connector
USBN0
USBP0
USBN1
USBP1
USBN7
USBP7
USBN6
USBP6
USBP3
USBN3
USBP2
USBN2
USBN4
USBP4
USBN5
USBP5
RN48
1 2
3 4
5 6
7 8
8P4R-15KR
RN96 8P4R-15KR
7 8
5 6
3 4
1 2
7 8
5 6
3 4
1 2
RN64 8P4R -15KR
RN100
1 2
3 4
5 6
7 8
8P4R-15KR
Title
Document Number
MICRO-STAR IN T' L CO.,LTD.
No. 69, Li-De St, Jung-He City,
Taipei Hsien, Taiwan
http://www.msi.com.tw
Micro Star Restricted Secret
VCC2_5
VCC3
3VDUAL
DEVSEL#
TRDY#
IRDY#
FRAME#
SERR#
PERR#
INTH#
STOP#
PREQ#1
PREQ#2
PREQ#3
PREQ#4
PGNT#1
PGNT#2
PGNT#3
PGNT#4
PGNT#5
PREQ#5
PREQ#0
PGNT#0
PIRQ#B
PIRQ#A
PIRQ#C
PIRQ#D
VT8237 Part 1
MS-7124
Last Revision Date:
Sheet
E
CB20 X_C1U10 Y
CB19 X_C1U10 Y
CB17 X_C1U10 Y
CB21 X_C1U10 Y
CB22 X_C0.01U50X
RN90
8P4R-2.7KR
1 2
3 4
5 6
7 8
RN91
1 2
3 4
5 6
7 8
8P4R-2.7KR
RN92
8P4R-2.7KR
1 2
3 4
5 6
7 8
RN88
8P4R-4.7KR
1 2
3 4
5 6
7 8
RN97
8P4R-2.7KR
1 2
3 4
5 6
7 8
RN89
1 2
3 4
5 6
7 8
8P4R-2.7KR
Friday, December 17, 2004
16 33
of
E
VCC3
VCC3
VCC3
VCC
Rev
100
Page 17
A
J10
J11
PDD[15..0]
PDD[15..0] 22
4 4
PDDACK# 22
SDD[15..0]
SDD[15..0] 22
3 3
SDDACK# 22
Using external PHY
2 2
SRXN_1
SRXP_1
STXP_2 STXP2
near chipset
CP11
FB22
X_601S
1 2
C391
C0.1U25Y
VCC2_5
1 1
PDREQ 22
PDIOR# 22
PDIOW# 22
PIORDY 22
PDCS#1 22
PDCS#3 22
PDA0 22
PDA1 22
PDA2 22
IRQ14 22
SDREQ
SDREQ 22
SDDACK#
SDIOR#
SDIOR# 22
SDIOW#
SDIOW# 22
SIORDY
SIORDY 22
SDCS#1
SDCS#1 22
SDCS#3
SDCS#3 22
SDA0
SDA0 22
SDA1
SDA1 22
SDA2
SDA2 22
IRQ15
IRQ15 22
SIDEVREF
X_C0.1U25Y C383
SIDECOMP
R204 X_360R1%
C1000P50X C397
C1000P50X C396
C1200P25X C395
C1200P25X C393
C1000P50X C392
C1000P50X C390
C1200P25X C388
C1200P25X C382
near chipset
+2.5VSATA
C389
C1U10Y
A
PDD0
PDD1
PDD2
PDD3
PDD4
PDD5
PDD6
PDD7
PDD8
PDD9
PDD10
PDD11
PDD12
PDD13
PDD14
PDD15
PDREQ
PDDACK#
PDIOR#
PDIOW#
PIORDY
PDCS#1
PDCS#3
PDA0
PDA1
PDA2
IRQ14
SDD0
SDD1
SDD2
SDD3
SDD4
SDD5
SDD6
SDD7
SDD8
SDD9
SDD10
SDD11
SDD12
SDD13
SDD14
SDD15
STXP1 STXP_1
STXN1 STXN_1
SRXP1
SRXN1
STXN2 STXN_2
SRXN2 SRXN_2
SRXP2 SRXP_2
GNDSATA
AA22
AA26
AA25
AB26
AC26
AC23
AD25
AD26
AC24
AC25
AB24
AB23
AA24
AA23
AD24
AC20
AB20
AC21
AE18
AF18
AD18
AD19
AF19
AE20
AF20
AD20
AE21
AF21
AD21
AD22
AF22
AD17
AD23
AF23
AE23
AF17
AF25
AF26
AF24
AC22
AE24
AE26
AC19
AB21
AB13
AC13
AF13
AE13
AB15
AC15
AF15
AE15
AC17
AC11
AB17
AB11
Y24
Y26
Y23
V24
W26
Y25
Y22
V22
V23
W23
V25
W24
W12
W13
W14
W15
W16
PDD0
PDD1
PDD2
PDD3
PDD4
PDD5
PDD6
PDD7
PDD8
PDD9
PDD10
PDD11
PDD12
PDD13
PDD14
PDD15
PDDREQ
PDDACK
PDIOR
PDIOW
PDRDY
PDCS1
PDCS3
PDA0
PDA1
PDA2
IRQ14
SDD0/TBC1
SDD1/VALID
SDD2
SDD3/RXD2
SDD4/RXD3
SDD5/RXD4
SDD6/RBC0
SDD7/RBC1
SDD8/RXD5
SDD9/RXD6
SDD10/RXD7
SDD11/RXD8
SDD12/RXD9
SDD13/TXD0
SDD14/TXD1
SDD15/TXD2
SDDRQ/RXD1
SDDACK/TBC0
SDIOR/TXD4
SDIOW/TXD3
SDRDY/RXD0
SDCS1/TXD8
SDCS3/TXD9
SDA0/TXD6
SDA1/TXD5
SDA2/TXD7
IRQ15
SVREF
SCOMPP
STXP1
STXN1
SRXN1
SRXP1
STXP2
STXN2
SRXN2
SRXP2
VDDATS
VDDATS
VDDATS
VDDATS
VDDATS
VDDAS
VDDAS
VDDAS
VDDAS
VDDJ9VDD
GNDATS
AB14
AC14
J12
VDD
VDDK9VDDL9VDD
GNDATS
GNDATS
GNDATS
GNDATS
AD12
AD13
AD14
AD15
B
VCC2_5
L18
M9
M18
N18
P18
R18
T18
U18
V10
V11
V12
VDD
VDD
VDD
VDDN9VDD
VDDP9VDD
VDDR9VDD
VDDT9VDD
VDDU9VDD
VDDV9VDD
VDD
GNDATS
GNDATS
GNDATS
GNDATS
GNDATS
GNDATS
GNDATS
GNDATS
GNDAS
GNDAS
GNDAS
GNDAS
GNDF6GNDF7GNDJ5GNDK5GNDP5GND
AF14
AF12
AF16
AE12
AE14
AE16
AB16
B
AC16
AC12
AB12
VT8237
VT8237
PDDACK#
1 - Disable external SATA PHY
PDCS#1
SATA master/slave mode
1 - Disable 0 - Enable
AD16
V13
V14
V15
VDD
VDD
VDD
VDD
R5
R214 10KR
3VDUAL
AA4
AB4
AB5
V16
V17
V18
VDD
VDD
VDD
VSUS33
VSUS33
ACSDIN3/SLP_BTN
GND
GND
GND
GND
GND
GND
L13
L14
L15
L16
L11
L12
M11
R201 10KR
R200 X_10KR
VSUS2_5
AB6
VSUS33
VSUS33
VSUS25T4VSUS25
ACBITCLK
ACSDIN0
ACSDIN1
ACSDIN2
ACSYNC
ACSDO
ACRST
BATLOW
CPUMISS
SUSST1
AOLGP/THRM
EXTSMI
SMBALRT
PWRBTN
PWROK
CLKRUN
CPUSTP
PCISTP
INTRUDER
SUSCLK
SMBCK1
SMBDT1
SMBCK2
SMBDT2
GPIOA/Strap1
GPIOB/Strap2
GPIOC/Strap0
GPIOD/Strap3
SERIRQ
VDDA0
GNDA0
SREXT
SXO/Strap4
SXI/Strap5
VDDA33
GNDA33
GND
GND
GND
GND
M12
M13
M14
VCC3
VCC3
U4
RING
SUSA
SUSB
SUSC
GPO0
GPO1
SPKR
OSC
TEST
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
M15
PME
LID
GPI0
GPI1
TPO
GND
K18
U16B
T1
U3
V2
U1
V3
T2
U2
T3
W4
V4
Y1
Y2
Y3
Y4
AA1
AB1
AC1
AD2
AF1
AB7
AC7
AD6
AE1
AB3
AC4
AB2
AC3
AD1
AA2
AD3
AF2
AE2
AC2
AA3
AE3
AE5
AD5
AF5
AC6
AD9
AF8
AB8
AF9
AE9
AC10
AB10
AD11
AE10
AF10
AE11
AF11
W5
V5
M16
N11
N12
N13
N14
N15
N16
VIA-VT8237R
C
VSUS2_5
X_C1U10Y
AC_BITCLK
ACSDIN0
AC_SDIN1
AC_SDIN2
AC_SDIN3
ACSDO
ACRST
PCI_PME#
BATLOW#
CPUMISS
SUSST#
THRMS#
EXTSMI#
SMBALRT#
ATADET1
PWRBTN#
PWROK_NB#
CLKRUN#
CPUSTP#
PCISTP#
INTRUDER
SUSCLK
SMBCLK1
SMBDATA1
SMBCLK2
SMBDATA2
SUSA#
SUSB#
SUSC#
GPI0
ATADET0
GPO0
GPO1
GPIOA
GPIOB
GPIOC
GPIOD
SERIRQ
SPKR
APICCLK
TPO
TEST
VDDA0
SREXT
VDDA33
C
C494
ACSYNC
RI#
SXO
SXI
VCC2_5
C370
C1U10Y
AC_BITCLK 21
PCI_PME# 15,19,20
SUSST# 12
THRMS# 24
EXTSMI# 28
ATADET1 22
PWBTIN# 28
PWROK_NB# 12
SMBCLK1 7,8,27
SMBDATA1 7,8,27
SUSB# 15,24,27
SUSC# 27
ATADET0 22
SERIRQ 24
SPKR 28
APICCLK 7,18
VCC2_5
R244
4.7KR1%
C394
C0.1U25Y
C399
C15P50N
STXP_1
STXN_1
SRXN_1
SRXP_1
C493
C365
C0.1U25Y
C364
C0.1U25Y
FB23 X_601S
1 2
SXO
SXI
Y3 25MHZ18P_D-1
1 2
SATA1
8
1
2
3
4
5
6
7
9
X_C0.1U25Y
VCC3
CP13
C398
C15P50N
CONN-SATA_white
D
VT8237
*"ACSYNC" => LPC FWH Command
0 - Enable FWH
1 - Disable FWH(Default)
ACSYNC
R266 4.7KR
GPI0
INTRUDER
RN101
7
ACSYNC
ACSDO
ACRST
8
5
6
3
4
1
2
8P4R-22R
AC_SDIN2
AC_SDIN3
SUSCLK
RI#
CPUMISS
EXTSMI#
SUSST#
THRMS#
BATLOW#
PCI_PME#
GPO1
SMBALRT#
PWROK_NB#
PWBTIN#
GPO0
SUSB#
SUSC#
ATADET0
ATADET1
SUSA#
AC_SDIN1
CLKRUN#
PCISTP#
CPUSTP#
SERIRQ
TPO
TEST
SPKR
*"SPKR" => CPU Freq. Adjust Setting
1 - Disable (Default)
0 - Enable
SMBCLK1
SMBDATA1
SMBDATA2
SMBCLK2
STXP_2
STXN_2
SRXN_2
SRXP_2
D
R270 4.7KR
R265 1MR
AC_SDIN0 ACSDIN0
AC_SDAIN0 21
AC_SYNC
AC_SYNC 21
AC_SDOUT
AC_SDOUT 21
AC_RST#
AC_RST# 21
R268 4.7KR
R269 4.7KR
RN104
8P4R-4.7KR
1 2
3 4
5 6
7 8
1 2
3 4
5 6
7 8
1 2
3 4
5 6
7 8
R289 X_4.7KR
R281 X_4.7KR
R274 X_4.7KR
RN98
1 2
3 4
5 6
7 8
8P4R-4.7KR
RN94
8P4R-4.7KR
7 8
5 6
3 4
1 2
1 2
3 4
5 6
7 8
RN95 8P 4R-4. 7KR
RN103
1 2
3 4
5 6
7 8
8P4R-1KR
SATA2
8
1
2
3
4
5
6
7
9
CONN-SATA_white
VCC3
VBAT
3VDUAL
RN102
8P4R-4.7KR
RN99
8P4R-4.7KR
VCC3
VCC3
3VDUAL
VCC3
Title
Document Number
MICRO-STAR INT' L CO.,LTD.
No. 69, Li-De St, Jung-He City,
Taipei Hsien, Taiwan
http://www.msi.com.tw
E
*"GPIO[A, C]" => LDT Frequency
00 - 200MHz (Default)
01 - 400MHz
*"GPIOB" => LDT Width
0 - 8-Bit (Default)
1 - 16-Bit
*"GPIOD" => Fast command
0 - Disable (Default)
1 - Enable
GPIOA
GPIOD
GPIOB
GPIOC
RN93
8P4R-4.7KR
1 2
3 4
5 6
7 8
10 - 600MHz
11 - 800MHz
Strapping
*"PDA0/SDA0" => LDT Transmit Control
0 - Disable (Default)
1 - Enable
*"PDA1/SDA1" => External loop test mode
0 - Disable (Default)
1 - Enable
*"PDA2/SDA2" => ROMSIP Select
0 - Disable
1 - Enable(Default)
*"-PDCS3" => Test Mode Select
0 - Disable (Default)
1 - Enable
*"EEDI/-SDCS1" => EEPROM Select
0 - BIOS Porting - ACR
1 - External EEPROM (On-board)(Default)
R213 1KR
R211 4.7KR
VCC3
R202 X_2.7KR
R199 2.7KR
R227 X_4.7KR
R212 4.7KR
For K8T800Pro
0:External HCLK enable
1:Internal HCLK enable
ACSDO
R267 4.7KR
0/1:Enable/disable auto reboot
Micro Star Restricted Secret
VT8237 Part 2
MS-7124
PDA1
PDA2
PDCS#3
PDA0
VT8237
Last Revision Date:
Friday, Dec em be r 17, 2004
Sheet
17 33
E
VT8237
VT8237
VT8237
VT8237
of
Rev
100
Page 18
A
N21
N22
N23
N24
N25
L21
K21
VLAD[0..7] 12
4 4
3 3
R231 360R1%
LPC_AD0 24
LPC_AD1 24
LPC_AD2 24
LPC_AD3 24
2 2
LPC_FRAME# 24
LPC_REQ# 24
ALL_PWRGD 27,28
RSMRST# 27
1 1
C415
C10P50N
VBE0# 12
UPCMD 12
DNCMD 12
UPSTB 12
UPSTB# 12
DNSTB 12
DNSTB# 12
VPAR 12
VCLK 7
ALL_PWRGD
Y4
32.768KHZ12.5P_D
VLREF_SB
VCOMPP_SB
VCLK
LPC_AD0
LPC_AD1
LPC_AD2
LPC_AD3
LPC_FRAME#
LPC_REQ#
RSMRST#
VBAT
X1
A
VLAD0
VLAD1
VLAD2
VLAD3
VLAD4
VLAD5
VLAD6
VLAD7
VBE0#
UPCMD
DNCMD
UPSTB
UPSTB#
DNSTB
DNSTB#
VPAR
X2
C422
C10P50N
L23
H25
VD0
G26
VD1
K26
VD2
J23
VD3
F26
VD4
G25
VD5
K22
VD6
K24
VD7
E24
VD8
G23
VD9
L26
VD10
L25
VD11
E26
VD12
E25
VD13
L24
VD14
M26
VD15
G24
VBE
K23
UPCMD
K25
DNCMD
J26
UPSTB
J24
UPSTB
H26
DNSTB
H24
DNSTB
F24
VPAR
H22
VLREF
J22
VCOMPP
L22
VCLK
F23
VIOUT
G22
VIIN
AD8
LAD0
AF7
LAD1
AE7
LAD2
AD7
LAD3
AF6
LFRM
AE6
LREQ0
AE8
LREQ1
AC5
PWRGD
AD4
RSMRST
AF4
VBAT
AE4
RTCX1
AF3
RTCX2
VCCVK
VCCVK
VCCVK
VCCVK
VCCVK
VCCVK
VCCVK
GND
GND
GND
GND
GND
GND
P11
P12
P13
P14
P15
P16
R11
B
3VDUAL VSUS2_5 VCC2_5
N26
P22
VCCVK
VCCVK
M24
P23
P24
P25
P26
M21
M22
M23
M25
L19
M19
N19
P19
VCCVK
VCCVK
VCCVK
VCCVK
VCCVK
VCCVK
VCCVK
VCCVK
VCCVK
VCCVK
VCCVK
VCCVK
VCCVK
VCCVK
E11
E10
D9
D12
E12
MIIVCC
MIIVCCE9MIIVCC
MIIVCC
MIISUS25
MIISUS25
AGPBZ/GPI6
APICD0/APICCS
APICD1/APICACK
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
T11
T12
T16
T15
T14
T13
R15
R14
R13
R12
R16
R21
W22
W25
AA21
AB19
AB22
AB25
B
T21
K19
AA9
AE17
AE19
AE22
AE25
AA10
AB18
AC18
MCRS
MCOL
MTXENA
MTXD0
MTXD1
MTXD2
MTXD3
MTXCLK
MRXER
MRXCLK
MRXDV
MRXD0
MRXD1
MRXD2
MRXD3
MDCK
MDIO
PHYRST
EECS
EEDO
EEDI
EECK
RAMVCC
RAMGND
FERR
A20M
IGNNE
INTR
STPCLK
DPSLP
VGATE
VIDSEL
VRDSLP
PCICLK
APICCLK
PLLVCC
PLLGND
INIT
NMI
SMI
SLP
GHI
C
U16C
A11
B11
C11
A10
B10
B9
A9
C10
D10
C9
D8
C8
B8
A8
C7
A7
B7
D7
D11
B12
A12
C12
E7
E6
U24
U26
T24
R26
T25
T26
U25
R24
V26
R22
P21
AC9
AC8
AB9
AD10
R23
U23
R25
T23
T22
U22
VIA-VT8237R
C
MIITXEN
MTXD0
MTXD1
MTXD2
MTXD3
MIIMDCK
MIIMDIO
MIIRST
SEECS
SEEDO
SEEDI
SEECK
+2.5VRAM
FERR#
GHI#
ROMLOCK
VGATE
VRDSLP
AGPBZ#
SBPCLK
APICCLK
APICD0#
APICD1#
+2.5VSBPLL
MIICRS 26
MIICOL 26
MIITXCK 26
MIIRXER 26
MIIRXCK 26
MIIRXDV 26
MIIRXD0 26
MIIRXD1 26
MIIRXD2 26
MIIRXD3 26
MIIMDCK 26
MIIMDIO 26
MIIRST 26
SEECS 26
SEEDO 26
SEEDI 26
SEECK 26
CB9
C1U10Y
SATALED 28
SBPCLK 7
APICCLK 7,17
CB5
C0.1U25Y
MIITXEN
MIIMDCK
MIIMDIO
R255 2 . 2R
VIA AN258
CP10
1 2
MTXD0
7 8
MTXD1
5 6
MTXD3
3 4
MTXD2
1 2
R248 33R
R252 33R
R253 33R
SEEDI
VCC2_5
VCC2_5
VLREF_SB
Under SB Bottom
CB16
X_C0.1U25Y
RN87
8P4R-33R
R243 4. 7KR
R241
X_4.7KR
-LDTSTOP 5,11
C369
C0.1U25Y
C368
C0.1U25Y
D
VCC2_5
D
MIITXD0 26
MIITXD1 26
MIITXD3 26
MIITXD2 26
MIITXEN 26
MIIMDCK 26
MIIMDIO 26
R163 1.5KR
LAN MAC
SEEDI
0
EEPROM
BIOS 1
R206
3KR1%
R205
412R1%
VCC3
5VSB
VBAT1
BAT-2P_SO41
Title
Document Number
MICRO-STAR INT'L CO.,LTD.
No. 69, Li-De St, Jung-He City,
Taipei Hsien, Taiwan
http://www.msi.com.tw
C0.1U25Y CB6
3VDUAL
FERR#
R230 1KR
APICD0#
R228 330R
APICD1#
R220 330R
APICCLK
R229 X_4.7KR
ROMLOCK
R222 4.7KR
GHI#
R207 4.7KR
AGPBZ#
VGATE
VRDSLP
RN86
R249 1KR
R250 2.7KR
S-BAT54C_SOT23
R156 1KR
1 2
D12
Micro Star Restricted Secret
VT8237 Part 3
MS-7124
E
VCC3
1 2
3 4
5 6
7 8
8P4R-4.7KR
1 2
3
C407
X_C10U10Y1206
VBAT
Last Revision Date:
Friday, De ce mb e r 17, 2004
Sheet
E
VCC3
VBAT
C412
C0.01U50X
18 33
of
JBAT1
1
2
3
H1X3_black
R263
1KR
Rev
100
Page 19
5
PCI Connectors
D D
PIRQ#B 15,16,20
PIRQ#D 16,20
PCICLK1 7 PCICLK2 7
PREQ#0 16
C C
IRDY# 16,20
DEVSEL# 16,20
PLOCK# 20
PERR# 16,20
SERR# 16,20
B B
ACK64# 20
VCC3 VCC3 VCC3
VCC VCC VCC VCC
-12V
PIRQ#B PIRQ#C
PIRQ#D
PCICLK1
PREQ#0
AD31 AD30
AD29
AD27 AD26
AD25
C_BE#3
AD23
AD21 AD20
AD19
AD17 AD16
C_BE#2
IRDY#
DEVSEL#
PLOCK#
PERR# SDONE
SERR#
C_BE#1 AD15
AD14
AD12 AD11
AD10
AD8 C_BE#0
AD7
AD5 AD4
AD3
AD1 AD0
PCI1
B1
-12V
B2
TCK
B3
GND
B4
TDO
B5
+5V
B6
+5V
B7
INTB#
B8
INTD#
B9
PRSNT1#
B10
RSVD2
B11
PRSNT2#
B12
GND
B13
GND
B14
RSVD5
B15
GND
B16
CLK
B17
GND
B18
REQ#
B19
+5V
B20
AD31
B21
AD29
B22
GND
B23
AD27
B24
AD25
B25
+3.3V
B26
C/BE3#
B27
AD23
B28
GND
B29
AD21
B30
AD19
B31
+3.3V
B32
AD17
B33
C/BE2#
B34
GND
B35
IRDY#
B36
+3.3V
B37
DEVSEL#
B38
GND
B39
LOCK#
B40
PERR#
B41
+3.3V
B42
SERR#
B43
+3.3V
B44
C/BE1#
B45
AD14
B46
GND
B47
AD12
B48
AD10
B49
GND
B52
AD8
B53
AD7
B54
+3.3V
B55
AD5
B56
AD3
B57
GND
B58
AD1
B59
+5V
B60
ACK64#
B61
+5V
B62
+5V
4
TRST#
+12V
TMS
INTA#
INTC#
RSVD1
RSVD3
GND
GND
RSVD4
RST#
GNT#
GND
RSVD6
AD30
+3.3V
AD28
AD26
GND
AD24
IDSEL#
+3.3V
AD22
AD20
GND
AD18
AD16
+3.3V
FRAME#
GND
TRDY#
GND
STOP#
+3.3V
SDONE
SBO#
GND
AD15
+3.3V
AD13
AD11
GND
C/BE0#
+3.3V
GND
REQ64#
3
AD[31..0] 16,20
C_BE#[3..0] 16,20
+12V
A1
A2
A3
A4
TDI
A5
+5V
A6
A7
A8
+5V
A9
A10
+5V
A11
A12
A13
A14
A15
A16
+5V
A17
A18
A19
A20
A21
A22
A23
A24
A25
A26
A27
A28
A29
A30
A31
A32
A33
A34
A35
A36
A37
A38
A39
A40
A41
A42
A43
PAR
A44
A45
A46
A47
A48
A49
AD9
A52
A53
A54
AD6
A55
AD4
A56
A57
AD2
A58
AD0
A59
+5V
A60
A61
+5V
A62
+5V
PIRQ#A
PIRQ#A 12,15,16,20
PIRQ# C 16,20
PCISLOTRST#
PCISLOTRST# 20,27
PGNT#0
PGNT#0 16
PCI_PME#
PCI_PME# 15,17,20
AD28
AD24
AD22
AD18
FRAME#
FRAME# 16,20
TRDY#
TRDY# 16,20
STOP#
STOP# 16,20
SDONE 20
SBO#
SBO# 20
PAR
PAR 16,20
AD13
AD9
AD6
AD2
REQ64# ACK64# ACK64# REQ64#
REQ64# 20
AD[31..0]
C_BE#[3..0]
-12V
PIRQ#C
PIRQ#A
PCICLK2
PREQ#1
PREQ#1 16
AD31
AD29
AD27
AD25
AD19 AD20
C_BE#3
AD23
AD21
AD19
AD17
C_BE#2
IRDY#
DEVSEL#
PLOCK#
PERR#
SERR#
C_BE#1
AD14
AD12
AD10
AD8
AD7
AD5
AD3
AD1
2
VCC3
+12V
PCI2
B1
-12V
B2
TCK
B3
GND
B4
TDO
B5
+5V
B6
+5V
B7
INTB#
B8
INTD#
B9
PRSNT1#
B10
RSVD2
B11
PRSNT2#
B12
GND
B13
GND
B14
RSVD5
B15
GND
B16
CLK
B17
GND
B18
REQ#
B19
+5V
B20
AD31
B21
AD29
B22
GND
B23
AD27
B24
AD25
B25
+3.3V
B26
C/BE3#
B27
AD23
B28
GND
B29
AD21
B30
AD19
B31
+3.3V
B32
AD17
B33
C/BE2#
B34
GND
B35
IRDY#
B36
+3.3V
B37
DEVSEL#
B38
GND
B39
LOCK#
B40
PERR#
B41
+3.3V
B42
SERR#
B43
+3.3V
B44
C/BE1#
B45
AD14
B46
GND
B47
AD12
B48
AD10
B49
GND
B52
AD8
B53
AD7
B54
+3.3V
B55
AD5
B56
AD3
B57
GND
B58
AD1
B59
+5V
B60
ACK64#
B61
+5V
B62
+5V
TRST#
INTA#
INTC#
RSVD1
RSVD3
RSVD4
RST#
GNT#
RSVD6
+3.3V
IDSEL#
+3.3V
+3.3V
FRAME#
TRDY#
STOP#
+3.3V
SDONE
SBO#
+3.3V
C/BE0#
+3.3V
REQ64#
+12V
GND
GND
GND
AD30
AD28
AD26
GND
AD24
AD22
AD20
GND
AD18
AD16
GND
GND
GND
AD15
AD13
AD11
GND
GND
A1
A2
A3
TMS
A4
TDI
A5
+5V
+5V
+5V
+5V
PAR
AD9
AD6
AD4
AD2
AD0
+5V
+5V
+5V
PIRQ#B
A6
PIRQ#D
A7
A8
A9
3VDUAL 3VDUAL
A10
A11
A12
A13
A14
PCISLOTRST#
A15
A16
PGNT#1
A17
A18
PCI_PME#
A19
AD30
A20
A21
AD28
A22
AD26
A23
A24
AD24
A25
A26
A27
A28
A29
A30
A31
A32
A33
A34
A35
A36
A37
A38
A39
A40
A41
A42
A43
A44
A45
A46
A47
A48
A49
A52
A53
A54
A55
A56
A57
A58
A59
A60
A61
A62
AD22
AD20
AD18
AD16
FRAME#
TRDY#
STOP#
SDONE
SBO#
PAR
AD15
AD13
AD11
AD9
C_BE#0
AD6
AD4
AD2
AD0
R236 100R R235 100R
1
PCISLOTRST# 20,27
PGNT#1 16
SLOT-PCI
N11-1200031-A10
IDSEL#=AD19
INT#=A,B,C,D
VCC
PLOCK#
R251 2 .7KR
ACK64#
R258 2.7KR
REQ64#
A A
5
SDONE
SBO#
R254 2.7KR
R237 2.7KR
R238 2.7KR
4
3VDUAL
C443
X_C0.1U25Y
3
SLOT-PCI
N11-1200031-A10
IDSEL#=AD20
INT#=B,C,D,A
2
Micro Star Restricted Secret
Title
PCI Connector 1 & 2
Document Number
MICRO-STAR IN T' L CO.,LTD.
No. 69, Li-De St, Jung-He City,
Taipei Hsien, Taiwan
http://www.msi.com.tw
MS-7124
Last Revision Date:
Friday, December 17, 2004
Sheet
19 33
1
Rev
100
of
Page 20
5
4
3
2
1
PCI Connectors
VCC3 VCC3
VCC VCC
D D
PIRQ#D 16,19
PIRQ#B 15,16,19
PCICLK3 7
PREQ#2 16
C C
IRDY# 16,19
DEVSEL# 16,19
PLOCK# 19
PERR# 16,19
SERR# 16,19
B B
ACK64# 19 REQ64# 19
-12V
PIRQ#D PIRQ#A
PIRQ#B
PCICLK3
PREQ#2
AD31 AD30
AD29
AD27 AD26
AD25
C_BE#3
AD23
AD21 AD20
AD19
AD17 AD16
C_BE#2
IRDY#
DEVSEL#
PLOCK#
PERR#
SERR#
C_BE#1 AD15
AD14
AD12 AD11
AD10
AD8 C_BE#0
AD7
AD5 AD4
AD3
AD1 AD0
ACK64#
PCI3
B1
-12V
B2
TCK
B3
GND
B4
TDO
B5
+5V
B6
+5V
B7
INTB#
B8
INTD#
B9
PRSNT1#
B10
RSVD2
B11
PRSNT2#
B12
GND
B13
GND
B14
RSVD5
B15
GND
B16
CLK
B17
GND
B18
REQ#
B19
+5V
B20
AD31
B21
AD29
B22
GND
B23
AD27
B24
AD25
B25
+3.3V
B26
C/BE3#
B27
AD23
B28
GND
B29
AD21
B30
AD19
B31
+3.3V
B32
AD17
B33
C/BE2#
B34
GND
B35
IRDY#
B36
+3.3V
B37
DEVSEL#
B38
GND
B39
LOCK#
B40
PERR#
B41
+3.3V
B42
SERR#
B43
+3.3V
B44
C/BE1#
B45
AD14
B46
GND
B47
AD12
B48
AD10
B49
GND
B52
AD8
B53
AD7
B54
+3.3V
B55
AD5
B56
AD3
B57
GND
B58
AD1
B59
+5V
B60
ACK64#
B61
+5V
B62
+5V
SLOT-PCI
N11-1200031-A10
IDSEL#=AD21
INT#=C,D,A,B
TRST#
+12V
INTA#
INTC#
RSVD1
RSVD3
RSVD4
RST#
GNT#
RSVD6
AD30
+3.3V
AD28
AD26
AD24
IDSEL#
+3.3V
AD22
AD20
AD18
AD16
+3.3V
FRAME#
TRDY#
STOP#
+3.3V
SDONE
SBO#
AD15
+3.3V
AD13
AD11
C/BE0#
+3.3V
REQ64#
TMS
TDI
+5V
+5V
+5V
GND
GND
+5V
GND
GND
GND
GND
GND
GND
PAR
GND
AD9
AD6
AD4
GND
AD2
AD0
+5V
+5V
+5V
+12V
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10
A11
A12
A13
A14
A15
A16
A17
A18
A19
A20
A21
A22
A23
A24
A25
A26
A27
A28
A29
A30
A31
A32
A33
A34
A35
A36
A37
A38
A39
A40
A41
A42
A43
A44
A45
A46
A47
A48
A49
A52
A53
A54
A55
A56
A57
A58
A59
A60
A61
A62
PIRQ#C
3VDUAL
PCISLOTRST#
PGNT#2
PCI_PME#
AD28
AD24
AD22
AD18
FRAME#
TRDY#
STOP#
SDONE
SBO#
PAR
AD13
AD9
AD6
AD2
REQ64#
AD[31..0] 16,19
C_BE#[3..0] 16,19
PIRQ#C 16,19
PIRQ#A 12,15,16,19
PCISLOTRST# 19,27
PGNT#2 16
PCI_PME# 15 ,17,19
R259 100R
FRAME# 16,19
TRDY# 16,19
STOP# 16,19
SDONE 19
SBO# 19
PAR 16,19
AD[31..0]
C_BE#[3..0]
AD21
VCC3
C378
C404
A A
5
4
X_C0.1U25Y
C359
X_C0.1U25Y
X_C0.1U25Y
3VDUAL
3
C400
X_C0.1U25Y
Micro Star Restricted Secret
Title
PCI Connector 3
Document Number
MICRO-STAR IN T' L CO.,LTD.
No. 69, Li-De St, Jung-He City,
Taipei Hsien, Taiwan
2
http://www.msi.com.tw
MS-7124
Last Revision Date:
Sheet
1
Rev
100
Friday, December 17, 2004
of
20 33
Page 21
5
AUDIO CODEC
+5VR
JSP1
1
2
3
C542
D1x3-BK
D D
CODEC VCC3_3 NEED CAP
AS CLOSE AS POSSIBLE.
R291 0R
AC_14 7
AC_SDOUT 17
AC_BITCLK 17
AC_SDAIN0 17
AC_SYNC 17
AC_RST# 17
C C
B B
C434
X_C10P50N
C457 X_22P
YCRY24.576H
C440 X_22P
R277
X3
C0.1U25Y
C461
C0.1U25Y
XTL_IN
XTL_OUT
22R
XTL_IN
R282
X_1M
XTL_OUT
1
2
3
4
5
6
7
8
9
10
11
12
R256 0R
R257
X_4.7KR
DVDD1
XTL_IN
XTL_OUT
DVSS1
SDATA_OUT
BIT_CLK
DVSS2
SDATA_IN
DVDD2
SYNC
RESET#
PC_BEEP
4
SPDIF_OUT
R288
4.7KR
42
44
43
41
NC48NC47NC46NC45NC
NC
AVSS2
2LINE_OUT_R
PHONE_IN13AUX-L14AUX-R15NC16NC17CD-L18CD-GND_REF19CD-R20MIC121MIC222L-IN-L23L-IN-R
C414
X_C0.1U25Y
40
39
NC
37
38
AVDD2
MONO_OUT
2LINE_OUT_L
FrontMIC(NC)
24
L_OUT_R
L_OUT_L
VRDA
VRAD
AFILT2
AFILT1
VREFOUT
VREF
AVSS1
AVDD1
VIA-VT1617A
U18
NC
+5VR VCC3
36
35
34
33
32
31
30
29
28
27
26
25
C424
C1U16Y0805
C420
C1U16Y0805
C413
C1U16Y0805
C416
C1U16Y0805
C417
C1U16Y0805
C418
C1U16Y0805
C419
C1U16Y0805
C460
C0.1U25Y
C427
C0.1U25Y
C447
EC34
+
C10U16EL
C1U10Y
VREFOUT
3
C428
C433
C1U10Y
X_C4.7U10Y0805
MICIN2
MICIN1
4
3
2
1
C459 C10U10Y0805
C432
C1U10Y
LINE_IN_R
LINE_IN_L
J1
AUDIO-CDIN1X4
JCD
C458 C10U10Y0805
C435
C1000P50X
C441
C1000P50X
LINE_OUT_R
LINE_OUT_L
FR_MICIN
C442
C1U10Y
C446
X_C1U10Y
VREFOUT
MICIN2
MICIN1
VREFOUT
2
LINE_NEXT_R
LINE_NEXT_L
R296
X_47K
LINE_IN_R
LINE_IN_L
R298
X_47K
R264 X_4.7KR
R260 4.7KR
X_47K
C282
C284
C1000P50X
17
1
6
7
8
9
10
11
12
13
18
1
2
4
5
3
AUDIO1A
_
AUDIO1B
_
AUDIO1C
_
LINE_OUT
LINE_IN
MIC_IN
14
15
16
R124
100R
1 2
R125
100R
1 2
C283
R297
C1000P50X
R126
1K
C285
C1000P50X
C281
C1000P50X
C1000P50X
C280
C1000P50X
X_47K
1 2
1 2
1 2
R127
1K
1 2
R299
X_47K
1 2
1 2
R122
1K
1 2
R123
1K
1 2
R300
X_47K
R301
1 2
1 2
+5VR
R286
4.7KR
LINE_OUT_R
+12V +5VR 5VSB
C425
A A
C0.1U25Y
U17
LT1087S_SOT89
2
VIN3VOUT
ADJ
1
5
R271
100R1%
R261
309R1%
C410
C10U10Y0805
R262 X_0R0805
R272 X_0R0805
C411
X_C0.1U25Y
4
VCC
CP12 X_COPPER
R279 X_0R
R246 X_0R
3
C449
C1000P50N
4.7KR
R285
LINE_OUT_L
R284 X_0R
C452
X_C1000P50N
FR_MICIN
C448
C1000P50N
JAUDIO
JAUD1
1
MIC
3
MIC_BIAS
AUD_FPOUT_R5AUD_RET_R
7
HP_ON
AUD_FPOUT_L9AUD_RET_L
H2X5(8)_black
C453
X_C1000P50N
2
AUD_GND
AUD_VCC
CUT
C450
X_C1000P50N
2
4
+5VR
LINE_NEXT_R
6
8
LINE_NEXT_L
10
C454
X_C1000P50N
Micro Star Restricted Secret
Title
VIA VT1617 AC'97 CODEC
Document Number
MICRO-STAR INT'L CO.,LTD.
No. 69, Li-De St, Jung-He City,
Taipei Hsien , Taiwan
http://www.m si.com.tw
C451
X_C1000P50N
MS-7124
1
Last Revision Date:
Friday, December 17, 2004
Sheet
21 33
Rev
100
of
Page 22
5
ATA 33/66/100 Connector
4
PDD[15..0] 17
SDD[15..0] 17
PDD[15..0]
SDD[15..0]
3
NEAR S.B SIDE
2
1
PRIMARY IDE CONN.
R128
HDDRST#
HDDRST# 27
D D
IDEACTP# 28
PDD_7
PDD_6
PDD_5
PDD_4
PDD_3
PDD_2
PDD_1
PDD_0
PDREQ_R
PDIOW#_R
PDIOR#_R
PIORDY_R
PDDACK#_R
IRQ14_R
PDA1_R
PDA0_R PDA2_R
PDCS#1_R
IDEACTP#
IDE1
33R
1 2
3 4
5 6
7 8
9 10
11 12
13 14
15 16
17 18
19 20
21 22
23 24
25 26
27 28
29 30
31 32
33 34
35 36
37 38
39 40
_
N32-2201091-H06
PDD_8
PDD_9
PDD_10
PDD_11
PDD_12
PDD_13
PDD_14
PDD_15
R87
470R
ATADET0
PDCS#3_R
SDA0 17
SDCS#1 17
SDCS#3 17
SIORDY 17
SDDACK# 17
IRQ15 17
SDA1 17
SECONDARY ID E CONN.
R149
HDDRST#
C C
B B
A A
HDDRST# 27
SDD_7
SDD_6
SDD_5
SDD_4 SDD_11
SDD_3 SDD_12
SDD_2
SDD_1 SDD_14
SDD_0 SDD_15
SDREQ_R
SDIOW#_R
SDIOR#_R
SIORDY_R
SDDACK#_R
IRQ15_R
SDA1_R
SDA0_R
SDCS#1_R
IDEACTP#
IDEACTS#
IRQ14_R
IRQ15_R
PIORDY_R
SIORDY_R
IDEACTS#
R157 10KR
R167 10KR
R192 10KR
R208 10KR
R193 4.7KR
R209 4.7KR
5
IDEACTS# 28
IDE2
33R
1 2
3 4
5 6
7 8
9 10
11 12
13 14
15 16
17 18
19 20
21 22
23 24
25 26
27 28
29 30
31 32
33 34
35 36
37 38
39 40
_
N32-2201091-H06
Near SB < 1" ( or Damping Rs)
VCC
VCC3
PDREQ_R
SDREQ_R
PDD7
SDD7
SDD_8
SDD_9
SDD_10
SDD_13
R88
ATADET1
SDA2_R
SDCS#3_R
470R
R215 5.6KR
R210 5.6KR
R226 10KR
R240 10KR
4
SDIOR# 17
SDIOW# 17
SDREQ 17
ATADET1 17
ATADET0 17
3
SDA0
SDA2
SDCS#1
SIORDY
SDDACK#
IRQ15
SDA1
SDD15
SDD0
SDD14
SDD13
SDD9
SDD6
SDD8
SDD7
PDD7
PDD8
SDD11
SDD4
SDD10
SDD5
SDIOR#
SDIOW#
SDREQ
SDD1
SDD2
SDD12
SDD3
ATADET1
ATADET0
RN77
8P4R-22R0402
1 2
3 4
5 6
7 8
RN80 8P4R-22R0402
1 2
3 4
5 6
7 8
RN82 8P4R-22R0402
7 8
5 6
3 4
1 2
RN85 8P4R-22R0402
7 8
5 6
3 4
1 2
R223 22R0402
R219 22R0402
RN84 8P4R-22R0402
7 8
5 6
3 4
1 2
RN78 8P4R-22R0402
7 8
5 6
3 4
1 2
RN83 8P4R-22R0402
7 8
5 6
3 4
1 2
SDA0_R
SDA2_R
SDCS#1_R
SDCS#3_R SDCS#3
SIORDY_R
SDDACK#_R
IRQ15_R
SDA1_R
SDD_15
SDD_0
SDD_14
SDD_13
SDD_9
SDD_6
SDD_8
SDD_7
SDD_11
SDD_4
SDD_10
SDD_5
SDIOR#_R
SDIOW#_R
SDREQ_R
SDD_1
SDD_2
SDD_12
SDD_3
PDD_7
PDD_8
RN72 8P4R-22R0402
IRQ14
IRQ14 17
PDIOW# 17
PDCS#1 17
PDCS#3 17
PDA2 17
PDA0 17
PDA1 17
Title
Document Number
MICRO-STAR IN T' L CO.,LTD.
No. 69, Li-De St, Jung-He City,
Taipei Hsien, Taiwan
http://www.msi.com.tw
PDDACK#
PIORDY
PDIOR#
RN79 8P4R-22R0402
PDIOW#
PDREQ
PDD0
PDD15
PDCS#1
R198 22R0402
PDCS#3 PDCS#3_R
R197 22R0402
RN73 8P4R-22R0402
PDD14
PDD1
PDD13
PDD2
RN81 8P 4R-22R0402
PDD10
PDD5
PDD9
PDD6
RN74 8P 4R-22R0402
PDD12
PDD3
PDD11
PDD4
RN71
PDA2
PDA0
PDA1
8P4R-22R0402
Micro Star Restricted Secret
ATA 33/66/100 Connector
PDDACK# 17 SDA2 17
PIORDY 17
PDIOR# 17
PDREQ 17
2
7 8
5 6
3 4
1 2
7 8
5 6
3 4
1 2
7 8
5 6
3 4
1 2
7 8
5 6
3 4
1 2
MS-7142
IRQ14_R
7 8
PDDACK#_R
5 6
PIORDY_R
3 4
PDIOR#_R
1 2
PDIOW#_R
7 8
PDREQ_R
5 6
PDD_0
3 4
PDD_15
1 2
PDCS#1_R
PDD_14
PDD_1
PDD_13
PDD_2
PDD_10
PDD_5
PDD_9
PDD_6
PDD_12
PDD_3
PDD_11
PDD_4
PDA2_R
PDA0_R
PDA1_R
Last Revision Date:
Friday, December 17, 2004
Sheet
22 33
1
Rev
100
of
Page 23
5
5VDUAL
FRONT USB PORT
USB_OC#5 16
D D
L9
USBN4
USBN4 16
USBP4
USBP4 16
USBN5
USBN5 16
USBP5
USBP5 16
1 2
1 2
X_CMC_90ohm_0603
<Priority>
4 3
L10
X_CMC_90ohm_0603
<Priority>
4 3
4
USB_OC#5
C522
C0.1U25Y
C371
C0.1U25Y
47KR
3
F5
R290
R287
56KR
KEY
C423
X_C0.1U25Y
JUSB2
1 2
3 4
5 6
7 8
9
10
2X5(9)USB_yellow
N31-2051341-H06
USBVCC1
1.1A
F6
1.1A
USB_OC#5
USBVCC2
C521
X_C0.1U25Y
USBVCC2
+
EC37
.CD1000U6.3EL15
USBVCC1
+
EC36
.CD1000U6.3EL15
2
1
L7
USBN6
C C
USBN6 16
USBP6
USBP6 16
USBN7
USBN7 16
USBP7
USBP7 16
REAR USB PORT
5VDUAL
USB_OC#2
USB_OC#2 16 USB_OC#1 16
B B
A A
Near S.B Near S.B
USBN2 16
USBP2 16
USBN3 16
USBP3 16
5
1 2
1 2
F4
1.1A
C366
C0.1U25Y
1 2
1 2
X_CMC_90ohm_0603
<Priority>
4 3
L8
X_CMC_90ohm_0603
<Priority>
4 3
USBVCC3
R90
47KR
R91
56KR
L6
X_CMC_90ohm_0603
<Priority>
4 3
L5
X_CMC_90ohm_0603
<Priority>
4 3
STACKED USB CONNECTOR
EC19
+
.CD1000U6.3EL15
C217
X_C0.1U25Y
4
USB2
5
6
7
8
1
2
3
4
LAN_USB1A
UP
DOWN
KEY
21
22
23
24
25
26
27
28
JUSB1
1 2
3 4
5 6
7 8
9
10
2X5(9)USB_yellow
N31-2051341-H06
USB_OC#5
CP19 X_COPPER
CP9 X_COPPER
CP17 X_COPPER
CP18 X_COPPER
3
KBVCC 5VDUAL
F3 1.5A
EC18
R77
C367
C0.1U25Y
L4
X_CMC_90ohm_0603
<Priority>
4 3
L3
X_CMC_90ohm_0603
<Priority>
4 3
47KR
R72
56KR
USB_OC#1
USBN1 16
USBP1 16
USBN0 16
USBP0 16
1 2
1 2
+
.CD1000U6.3EL15
9
1
2
3
4
12
Title
Document Number
MICRO-STAR IN T' L CO.,LTD.
No. 69, Li-De St, Jung-He City,
Taipei Hsien, Taiwan
2
http://www.msi.com.tw
C201
X_C0.1U25Y
USB1
9
1
2
3
4
12
USBx2-D8-BK
10
10
5
5
6
6
7
7
8
8
11
11
Micro Star Restricted Secret
USB Port
MS-7142
Last Revision Date:
Sheet
1
Rev
100
Friday, December 17, 2004
of
23 33
Page 24
5
Super I/O
VCC3
D D
C C
B B
A A
R53
4.7KR
LPC_REQ# 18
THRMS# 17
5VSB
C16
C0.1U25Y
Distribute near the VCC
power pin of the LPC
VCC
C14
C385
X_C0.1U25Y
X_C0.1U25Y
VBAT
PCIDEVRST# 12,27
LPC_FRAME# 18
THERMDA_CPU 5
C86
X_C0.1U25Y
5
VCC
VCC3
VCORE
VCC
SIOPCLK 7
LPC_AD0 18
LPC_AD1 18
LPC_AD2 18
LPC_AD3 18
SERIRQ 17
SUSB# 15,17,27
SIO48M 7
C36
X_C0.1U25Y
R52 X_10KR
-12VIN
+12VIN
SYS-FANPWM
SYS-FAN
CPU-FANPWM
CPU-FAN
VCC3
C17
C0.1U25Y
U5
30
LRESET#
21
LCLK
23
SERIRQ
22
LDRQ#
29
LFRAME#
27
LAD0
26
LAD1
25
LAD2
24
LAD3
125
GPX2/GP13
123
GPY1/GP15
128
GPSA1/GP10
121
GPSA2/GP17
126
GPX1/GP12
124
GPY2/GP14
127
GPSB1/GP11
122
GPSB2/GP16
120
MSO/IRQIN0/GP20
119
VREF
THERMDA_CPU
CPU_TMP
CHASISS
MSI/GP21
101
VREF
102
VTIN
103
CPUTIN
VTIN1
104
SYSTIN
93
GP26
94
GP25
95
GP24
96
GP23
97
VIN3
98
VIN2
99
VIN1
100
CPU_VCORE
106
GP54
107
GP53
108
GP52
109
GP51
110
GP50
116
FANPWM1
113
FANIN1
115
FANPWM2
112
FANIN2
111
OVT#
105
GP55
118
GP22
76
CASEOPEN#
19
PME#
89
WDTO/GP33
91
GP31
92
GP30
67
PSOUT#/GP47
68
PSIN/GP46
64
SUSLED/GP37
90
PLED/GP32
72
PWRCTL#/GP42
73
SLP_SX#/GP41
18
CLKIN
61
VSB
74
VBAT
28
VCC3
12
VCC_1
48
VCC_2
77
GP36
114
VCC_4
W83627THF
Power-on strap, enable 48MHz
VCC
R27
X_4.7KR
SIO
SOUTB
DRVDEN0
SMI#/IRQIN1
INDEX#
FANIN3
FANOUT3
STEP#
WRDATA#
TRACK0#
RDDATA#
HEAD#
DSKCHG#
IRRX/GP34
DCDA#
DSRA#
RTSA#
SOUTA
CTSA#
DTRA#
DCDB#
DSRB#
RTSB#
SOUTB
CTSB#
DTRB#
GA20M
KBRST
KBDATA
KBCLK
MSDATA
MSCLK
RSMRST#/GP44
PWROK/GP43
VSS4(AGND)
4
1
2
3
4
MOA#
5
6
DSA#
7
8
DIR#
9
10
11
WE#
13
14
WP#
15
16
17
42
PD0
41
PD1
40
PD2
39
PD3
38
PD4
37
PD5
36
PD6
35
PD7
31
SLCT
32
PE
33
BUSY
34
ACK#
43
SLIN#
44
INIT#
45
ERR#
46
AFD#
47
STB#
88
69
GP45
87
IRTX
75
GP40
56
50
53
SINA
51
54
49
52
57
RIA#
84
79
82
SINB
80
83
78
81
85
RIB#
59
60
63
62
66
65
58
BEEP
70
71
20
VSS1
55
VSS2
86
GP35
117
4
FLOPPY DISK HEADER
DRVDEN0
INDEX#
MOA#
DSA#
DIR#
STEP#
WRDATA#
WE#
TRACK0#
WP#
RDDATA#
HEAD#
DSKCHG#
PD0
PD1
PD2
PD3
PD4
PD5
PD6
PD7
RSLCT 25
RPE 25
RBUSY 25
RACK# 25
RSLIN# 25
RINIT# 25
RERR# 25
RAFD# 25
RSTB# 25
GP40
DCDA# 25
DSRA# 25
SINA 25
RTSA#
RTSA# 25
SOUTA
SOUTA 25
CTSA# 25
DTRA#
DTRA# 25
RIA# 25
DCDB#
DCDB# 25
DSRB#
DSRB# 25
SINB 25
RTSB# 25
SOUTB
SOUTB 25
CTSB#
CTSB# 25
DTRB# 25
RIB#
RIB# 25
BEEP
BIOS_WP#
THERMDC_CPU
THERMDC_CPU 5
CP3
X_COPPER
SOUTA L: Disable KBC
SOUTB
DTRA#
RTSA#
DTRA#
SOUTA
VCC
L: 24MHZ
L: CFAD=2E
L: PNP Default
RN2 8P4R-4.7KR
7 8
5 6
3 4
1 2
H: Enable KBC
H: 48MHZ
H: CFAD=4E RTSA#
H: PNP no Default
GP40
FDD1
CONN-FDD(4)(5)(6)V
N32-2173021-H06
RN7 X_8 P4R-4.7KR
CTSB#
7 8
DSRB#
5 6
DCDB#
3 4
RIB#
1 2
1 2
3 4
5 6
7 8
9 10
11 12
13 14
15 16
17 18
19 20
21 22
23 24
25 26
27 28
29 30
31 32
33 34
PD[7..0] 25
3
VCC3
default is high
PRES4
PRES3
PRES2
PRES1
FAN CONTROL
VCC
CPU-FANPWM
SYS-FANPWM
+12V
C275
C0.1U25Y
Voltage Detect
R45 28KR1%
1 2
+12V
R39 232K
1 2
-12V
THERMDC_CPU
3
PRES3
PRES2
PRES1
PRES0
C384
TBL#
X_C0.1U25Y
LPC_AD0
LPC_AD1
LPC_AD2
RN76 8P4R-1KR
1
2
3
C276
4
C0.1U25Y
5
6
7
C277
C0.1U25Y
1 2
BIOS_WP#
U8
FAN1_IN
FAN2_IN
VCC12
C1
C2
CHRPMP
GND
R44
10KR1%
SYSTEM ROM
U15
1
VCC
VPP
2
CLK
RST#
3
FGPI4
FGPI3
4
FGPI2
IC(VIL)
5
FGPI1
GNDA
6
FGPI0
VCCA
7
WP#
GND
8
TBL#
VCC
9
INIT#
ID3
10
FWH4
ID2
11
RFU
ID1
12
RFU
ID0
13
RFU
FWH0
14
RFU
FWH1
15
RFU
FWH2
GND16FWH3
PLCC-32
<Priority>
1 2
3 4
5 6
7 8
PRES0
VCC3
BIOS_WP#
TBL#
LPC_INIT#
CPU FAN
14
FAN1_DRV
13
FAN1_SEN
12
FAN2_DRV
11
FAN2_SEN
10
FAN3_DRV
9
FAN3_SEN
8
FAN3_IN
W83391TS
Chasiss Intrusion Header
+12VIN
-12VIN
1 2
R40
56KR1%
VREF
JCASE1
1
2
H1X2_black
R21
2MR
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
CHASISS
2
VCC3
LPC_PCLK PCIDEVRST#
PRES4
LPC_INIT#
LPC_FRAME#
LPC_AD3
RN75 8P4R-1KR
2 3
1
C233
X_C0.1U25Y
2 3
1
C374
X_C0.1U25Y
2
C380
x_C0.1U25Y
LPC_PCLK 7
1 2
VCC3
3 4
5 6
7 8
4
Q9
N-APM2054N_SOT89
R104
10KR
R108
6.49KR1%
4
Q26
N-APM2054N_SOT89
R245
10KR
R247
6.49KR1%
VCC VBAT
BEEP
Hardware Monitor
SYSTEM Thermal
VREF
VCC3
+12V
D7 X_1N41 48_SOD123
R86 4.7KR R85 27KR
C227
C0.1U25Y
R84
X_0R0805
SYS FAN
+12V
D11 X_1N4148_SOD123
R233
4.7KR
C375
C0.1U25Y
R242
X_0R1206
R6
10KR
ALARM 28
Q2
N-MMBT3904_SOT23
Near SIO
R50
10KRT1%
10KR1%
VTIN1
R49
THERMDA_CPU
30KR1%
C74
C0.1U25Y
Near CPU
CPUFAN1
3
2
1
YJ103-BO
R221 27KR
SFAN1
3
2
1
YJ103-BO
Micro Star Restricted Secret
Title
LPC I/O & ROM & Floppy&Fan
Document Number
MICRO-STAR INT'L CO.,LTD.
No. 69, Li-De St, Jung-He City,
Taipei Hs i en, Taiwan
http://www.msi.com.tw
1
RT2
THERMDC_CPU
SMD
VREF
R48
10KR1%
CPU_TMP
RT3
10KRT1%
THERMDC_CPU
CPU-FAN
R89
10KR
SYS-FAN
R216
10KR
Rev
Friday, D ec ember 17, 2004
of
24 33
100
MS-7142
1
Last Revision Date:
Sheet
Page 25
5
LPT / COM PORTS
R59 4.7KR
RN14
7 8
5 6
3 4
1 2
8P4R-4.7KR
RN27
7 8
5 6
3 4
1 2
8P4R-4.7KR
RN24
8P4R-4.7KR
7 8
5 6
3 4
1 2
7 8
5 6
3 4
1 2
RN19
8P4R-4.7KR
VCC(5V)
NRIA#
NCTSA#
NDSRA#
NRTSA
NDTRA
NSINA
NSOUTA
NDCDA#
RESVD
1N4148_SOD123
DY1
DY2
DY3
RY1
RY2
RY3
RY4
RY5
GND
L2 X_80S/1206
1 2
CP2 X_COPPER
D D
C C
-12V
B B
PD[7..0] 24
C373
C0.1U25Y
+12V
C77
X_C0.1U25Y
NDCDA# NDSRA#
NSINA
NSOUTA
NDTRA
D3
1N4148_SOD123
RTSA# 24
DTRA# 24
SOUTA 24
RIA# 24
CTSA# 24
DSRA# 24
SINA 24
DCDA# 24
D4
1N4148_SOD123
1
2
3
4
5
RACK# 24
RBUSY 24
RSLCT 24
RAFD# 24
RINIT# 24
RERR# 24
RSTB# 24
PD[7..0]
+12VCOM
-12VCOM
COM1
6
7
8
9
CONN-COM
11 10
N51-09M0021-F02
RSLIN#_
RACK#
RBUSY
RPE
RPE 24
RSLCT
RAFD#
RINIT#
RERR#
RSTB#
PD0
PD1
PD2
PD3
PD4
PD5
PD6
PD7
U4
1
RTSA# NRTSA
DTRA# NDTRA
SOUTA NSOUTA
RIA# NRIA#
CTSA# NCTSA#
DSRA# NDSRA#
SINA NSINA
DCDA# NDCDA#
VDD(12V)
16
DA1
15
DA2
13
DA3
19
RA1
18
RA2
17
RA3
14
RA4
12
RA5
10
VSS(-12V)
GD75232S
I95-7523212-T07
Multiple RS232 Drivers and Receivers
NRTSA
NCTSA#
NRIA#
PGND
A A
5
D5
20
5
6
8
2
3
4
7
9
11
CN2
1 2
3 4
5 6
7 8
8P4C-180P50N
CN3
1 2
3 4
5 6
7 8
8P4C-180P50N
4
VCC
For EMI
VCC
RACK#
RBUSY
RPE
RSLCT
RAFD#
RINIT#
RERR#
RSLIN#_
PD0
PD1
PD2
PD3
PD4
PD5
PD6
PD7
RSTB#
CP14 X_COPPER
CP15 X_COPPER
CP16 X_COPPER
CN4
1 2
3 4
5 6
7 8
8P4C-180P50N
CN7
1 2
3 4
5 6
7 8
8P4C-180P50N
CN6
1 2
3 4
5 6
7 8
8P4C-180P50N
CN5
1 2
3 4
5 6
7 8
8P4C-180P50N
C137 C 180P50N
PGND
LPT1
51
13
25
12
24
11
23
10
22
9
21
8
CONN-LPT
N51-25F0041-F02
20
7
19
6
18
5
17
4
16
3
15
2
14
1
52
48
PGND
PGND
PGND
4
PGND
RSLCT
RPE
RBUSY
RACK#
PD7
PD6
PD5
PD4
PD3
RSLIN#_
PD2
RINIT#
PD1
RERR#
PD0
RAFD#
RSTB#
3
For EMI
3
2
1
Keyboard/Mouse Ports
KBVCC
EC4
+
X_C10U16EL
PGND PGND
KBDAT# 16
KBCLK# 16
MSCLK# 16
MSDAT# 16
For EMI
RIB# 24
CTSB# 24
DSRB# 24
SINB 24
DCDB# 24
RN3
1 2
3 4
5 6
7 8
8P4R-4.7KR
C354 X_C0.1U25Y
RTSB# 24
DTRB# 24
SOUTB 24
C353 X_0.1u
NRTSB
NDSRB#
NCTSB#
NRIB#
NDCDB#
NSOUTB
NSINB
NDTRB
MSDAT#
KBDAT#
MSCLK#
KBCLK#
FB3
RSLIN# RSLIN#_
0R
RSLIN# 24
C4
X_C0.1U25Y
KBVCC
+12VCOM
RTSB#
DTRB#
SOUTB
RIB#
CTSB#
DSRB#
SINB
DCDB#
-12VCOM
1
3
5
7
1
3
5
7
PGND
FB6
X_120-600mA
NDCDB#
NSOUTB
NRTSB
NRIB#
2
4
6
8
2
4
6
8
2
C5
C0.1U25Y
FB4
X_120-600mA
XKBCLK1
FB5
X_120-600mA
FB2
X_120-600mA
R5
X_330R
SERIAL PORT 2
U12
1
VDD(12V)
16
DA1
15
DA2
13
DA3
19
RA1
18
RA2
17
RA3
14
RA4
12
RA5
10
VSS(-12V)
GD75232S
1
3 4
5 6
7 8
9
CN10
X_8P4C-180P
CN11
X_8P4C-180P
STACKED PS2 CONNECTOR
JKBMS1
14
4
6
2
XKBDAT1
13
1
5
3
15 17
PGND PGND
CONN-KB_MS
N56-12F0031-F02
XMSCLK1
XMSDAT1
C22 C180P50N
XKBCLK1
C19 C180P50N
XMSCLK1
XKBDAT1
C15 C180P50N
XMSDAT1
JCOM1
COM-D9-GN
2
Title
Document Number
C11 C180P50N
VCC(5V)
DY1
DY2
DY3
RY1
RY2
RY3
RY4
RY5
GND
NSINB
NDTRB
NDSRB#
NCTSB#
MICRO-STAR IN T' L CO.,LTD.
No. 69, Li-De St, Jung-He City,
Taipei Hsien, Taiwan
http://www.msi.com.tw
PGND
C355 X_0.1u
20
VCC
NRTSB
5
NDTRB
6
NSOUTB
8
NRIB#
2
NCTSB#
3
NDSRB#
4
NSINB
7
NDCDB#
9
11
Micro Star Restricted Secret
KeyBoard/Mouse/LPT/COM
MS-7142
16
10
12
8
7
11
9
Last Revision Date:
Friday, December 17, 2004
Sheet
25 33
1
Rev
100
of
Page 26
A
TXD+
TXD-
7mil
8mil
RXIN+
7mil
RXIN-
R118
Near PHY
TX/RX_LED
100/10_LED
LAN_LED2
LAN_LED3
3VDUAL
C317
X_C1U10VY5V
R117
49.9R1%
25
26
27
28
29
30
31
32
33
34
35
36
U9
VDDRX
RXRX+
FXSD
GNDRX
GNDPLL
REXT
VDDPLL
GNDTXC
TXTX+
VDDTX
49.9R1%
FB20 X_L120RD6A3D25
C278
C0.1U25V3Y5VL
3VDUAL 3VDUAL
23
18
17
24
19
PD
INT
LED020LED121LED222LED3
VDD2
GND2
VT6103L
GNDTX37GNDOSC38XO39XI40VDDOSC41RST42MDIO43MDC44RXD345RXD246RXD147RXD0
C311
X_C1U10VY5V
R119
R120
49.9R1%
49.9R1%
4 4
3 3
MIIRST 18
RN66
1 2
3 4
5 6
7 8
8P4R-10K
RXIN-
RXIN+
TXD-
TXD+
XLOU T
XLIN
MIIRST
C279
C0.1U25V3Y5VL
LAN_REXT
R113
6.49KR1%
R146 X_0R2
B
3VDUAL
EC29 X_CE470U10VD25A400RO
C296 0.1U/16V
R159 33R
R165 33R
C287 0.1U/16V
C286 0.1U/16V
C314 0.1U/16V
C329 0.1U/16V
C332 0.1U/16V
C326 0.1U/16V
MIICRS
MIICOL
MIITXD3
MIITXD2
MIITXD1
MIITXD0
MIITXEN
R170 10KR
RN68
1 2
3 4
5 6
7 8
8P4R-33R
RN67
1 2
3 4
5 6
7 8
8P4R-33R
MIIMDCK
MIIMDIO
MIIMDCK 18
MIIMDIO 18
3VDUAL
16
14
15
COL
CRS
TXD213TXD3
12
TXD1
11
TXD0
10
TXEN
9
TXC
8
TXER
7
VDDC
6
GNDC
5
RXER
4
RXC
3
RXDV
2
GND1
1
VDD1
VT6103L
48
MIICRS 18
MIICOL 18
MIITXD3 18
MIITXD2 18
MIITXD1 18
MIITXD0 18
MIITXEN 18
MIITXCK 18
MIIRXER 18
MIIRXCK 18
MIIRXDV 18
MIIRXD0 18
MIIRXD1 18
MIIRXD2 18
MIIRXD3 18
C
3VDUAL
C240
0.1U/16V
Strap Options
LED0 / LINK
LED1 / SPD100
LED2 / DUPLEX
LED3 / NWAYEN
SEECS 18
SEECK 18
SEEDI 18
SEEDO 18
TX/RX_LEDPWR
TX/RX_LED
RCT
RXINTCT
RXIN+
TXDTXD+
100/10_LEDPWR
100/10_LED
C235
C0.01U16VX7R
XLIN
XLOU T
SEECS
SEECK
SEEDI
SEEDO
Enable Disable
Speed10 Speed100
Half Full
Disable Enable
3VDUAL
R93
330R
C251
C1000PX7R
U14
1
CS
2
SK
3
DI
4
DO
X_AT93C46
C309
C18P50V2NPO
0 1
D
R83
330R
C223 X_C1000PX7R
C244 X_C1000PX7R
17
18
9
13
10
14
11
15
12
16
19
20
C231
C1000PX7R
8
VCC
7
NC
6
NC
5
GND
X2
25MHZ-18PF
Test Mode Enable
Speed Select
Duplex Mode Select
N-Way Enable
LAN_USB1B
AMBER+
AMBER-
RDN
RDP
TDN
TDP
GREEN+
GREEN-
VCC3
C372
X_C0.1U16VY5V
C310
C18P50V2NPO
Description
E
17
Yellow
18
9
NC
1
NC
NC
NC
NC
USB2
2
3
Yellow
1
13
5
RCT
10
RX-
6
14
TCT
11
TCT
7
15
RX+
12
TX-
8 4
19
16
TX+
Green
20
Green
6
8
4
3
7
5
2
NC
NC
NC
TX-
TX+
NC
RX-
RX+
C177
M_C22P50N
VVSYNC
VHSYNC
C170
M_C22P50N
VCC
F2
M_F-MICROSMD110
POLY SWITCH
CB2
M_C0.1U25Y
JVGA1
16
6
1
11
7
2
12
8
3
13
9
4
14
10
5
15
17
M_CONN-VGA
R62 M_0.0 82U300m
R65 M_0.0 82U300m
C157
M_C22P50N
R68
M_1.8KR
C150
M_C22P50N
C
VCC
R61
M_1.8KR
DDCCLK 12
Micro Star Restricted Secret
Title
VIA VT6103L MII PHY & VGA
Document Number
MICRO-STAR IN T' L CO.,LTD.
No. 69, Li-De St, Jung-He City,
Taipei Hsien, Taiwan
D
http://www.msi.com.tw
MS-7124
Last Revision Date:
Monday, December 20, 2004
Sheet
E
26 33
of
Rev
100
Use K8T800Pro remove all
VGA CONNECTOR
2 2
1 1
D6
3
7
3
AB
AR VHSYNC
AR 12
AG 12 DDCDATA 12
AB 12
7
1
8
1
8
2
6
2
6
5
445
M_Z-PACDND006M_MSOP8
R73
M_75R
VSYNC 12
HSYNC 12
A
components
VCC
VVSYNC AG
FB11 M_30L500m_200
FB10 M_30L500m_200
FB9 M_30L500m_200
C184
C183
X_C22P50N
R69 M_22R
C185
X_C22P50N
R64 M_22R
X_C22P50N
R63
M_4.7KR
R75
R74
M_75R
M_75R
Trace Note:
1.The 5V traces should be 20 mils to VGA/DFP
C181
M_C22P50N
VCC
R66
M_4.7KR
VCC
B
Page 27
8
D D
VDIMM LINEAR OR PWM SELECT
VDIMM MODE
LINEAR REGULATOR
PWM REGULATOR
C C
FRONT PANEL RESET BUTTON
PCIRST# INPUT
PCIRST# BUFFER OUTPUT
PCI SOLT PCIRST# BUFFER OUTPUT
B B
CONNECT TO SOUTH BRIDGE SUSB# SIGNAL
SUSB# 15,17,24
THE TWO BLOCK CHOICE ONE
SUPPORT SYSTEM POWER CONTROL
DDR TERMINATION
3VDUAL
U3
8
C25
C0.1U25Y
8
VREF2
7
ENABLE
6
VCNTL
5
BOOT_SEL
W83310DS_SOIC8
VREF1
VOUT
9
GND
GND
A A
EXTRAM
PULL LOW
PULL HIGH
C312
C22P50N
PS_OUT# 28
VDD_25_SUS
1
VIN
2
3
4
7
PCISLOTRST# 19,20
R158
4.7KR
R16 1KR1%
7
SUSLED 28
C300
C33P50N
R164
4.7KR
G
C318
C0.1U16X
R12 1KR1%
EC2
+
.CD1000U6.3EL15
PLED1 28
N-MMBT3904_SOT23
N-MMBT3904_SOT23
PCIDEVRST# PCISLOTRST#
FP_RST# 7,28
PCIRST# 15,16
HDDRST# 22
PCIDEVRST# 12,24
PG_VCORE 14
VCORE_EN 14
5VSB
5VSB
R168
10KR
D S
Q18
2N7002S
VTT_DDR_SUS
1 2
1 2
EC3
+
+
.CD1000U6.3EL15
5VSB
Q23
5VSB
Q15
R153
330R
R152 33R
VCC3
VDDA_25
EC26
X_.CD100U16EL11
CLOSE TO CHIP
C331
C0.1U25Y
EC7
C26
C0.1U25Y
X_.CD1000U6.3EL15
6
5VSB
R175
330R
R134
330R
VCC
VCC
1 2
C301
+
C4.7U10Y0805
DDR AND DDR II VOLT SELECT
DDRTYPE
PULL LOW
PULL HIGH
6
R155
4.7KR
R143
4.7KR
VCC3
R151
220R0805
C315
C0.1U25Y
5VSB
R172 4.7 KR
5VSB
C316
C0.1U25Y
R150
X_1KR
R154
10KR
R145
X_1KR
R147
10KR
1
2
3
4
5
6
7
8
9
10
11
12
X_C10U10Y1206
VDIMM
2.5V
1.8V
3VDLDEC#
EXTRAM
FP_RST#
PCIRST#
HDD_RST#
DEV_RST#
VDD_GD
VDD_EN
1.25VREF
VCC5
SLOT_RST#
VCC3
2.5VDDA
AGND0
C333 C0.22U10X
C328
5
VCC2_5 3VDUAL 3VDUAL
R166
R218
330R
330R
C336
C0.1U25Y
47
45
46
48
PLED1/EXTRAM
PSIN#13PSOUT#14MEMBT15SS165VSB17DDRTYPE18VDIMM_LSEN19VDIMM_LDRV20VDIMM_HSEN21VDIMM_HDRV223VSB_SEN233VSB_DRV
C334
43
44
I2C_CLK
CPU_PWGD
CHIP_PWGD
PLED0/3VDLDEC#
C0.1U25Y
R112
75R1%
C225
C1U16Y0805
5
41
RSMRST#42I2C_DATA
39
S3#40S5#
EC21
.CD1000U6.3EL15
37
38
GND
5VSB
PWR_OK
CHRPMP
5VUSB_DRV
VAGP_DRV
VAGP_SEN
WD_DET
1.2VLDT_DRV
1.2VLDT_SEN
TMP_FAULT#
24
N-P3055LD_TO252
G
R111
75R1%
G
+
5V_DRV
Q12
4
LINEAR MODE
THESE OUTPUT AND INPUT PIN MUST
BE PULL HIGH
R169
10KR
5VSB
EC25
.CD1000U6.3EL15
U11
36
C1
35
C2
34
33
AGND1
32
31
30
29
28
27
26
25
MS6
R178
10KR
WATCHING DOG TIMER SELECT
WD_DET
PULL HIGH
VCC3
EC27
+
S
Q13
D
D
N-P3055LD_TO252
S
+
C351
C0.1U16X
VCC2_5
.CD1000U6.3EL15
VDD_25_SUS
4
CPU_GD 5
ALL_PWRGD 18,28
SMBCLK1 7,8,1 7
SMBDATA1 7,8,17
RSMRST# 18
SUSC# 17
SUSB# 15 ,17,24
PW_OK 28
CHARGE PUMP
VOLTAGE
9VSB
OUTPUT
C349
C1U16Y0805
THRM# 5
R190
X_10KR
5VSB
CONNECT TO CPU
R189
10KR
TIMER
OFF PULL LOW
ON
THE VDIMM_HSEN IN LINEAR MODE
DDRTYPE
DDR
DDR II
THIS POINT VOLT CAN'T SETTING
BELOW 2.9V
THE TWO MODE ONLY ONE MODE PRESENT
SINGLE MODE DUAL MODE
THIS MODE SELECT BY PIN
47 PULL HIGH 5VSB
3
CPU PWR_GD OUTPUT
CHIP PWR_GD OUTPUT
I2C BUS
I2C BUS
CONNECT TO SOUTH BRIDGE RSMRST# SIGNAL
SOUTH BRIDGE POWER CONTROL(SLP_S4# OR SUSB#) SIGNAL
SOUTH BRIDGE POWER CONTROL(SLP_S3# OR SUSC#) SIGNAL
ATX POWER OK INPUT
VCC
5V_DRV
5VSB_DRV
+
EC33
X_.CD1000U6.3EL15
C437 X_C22P50N
C436 X_C22P50N
EC20
CE470U10VD25A400RO
VDIMM_HSEN
VREF
2.0V
3VDUAL
1.7V
+
3
2
5VSB
VCC
Q29
8
1
7
2
3
6
4 5
NN-P07D03LV_SO8
G
Low RDS ON MOSFET
VCC3
D
Q24
G
N-P3055LD_TO252
VDDQ
2 3
4
Q10
N-APM2054N_SOT89
1
THIS MODE SELECT BY
PIN 47 PULL LOW
3VSB REGULATE BY 5VSB AND VCC3
VCC3
5V_DRV
3VSB_DRV
EC31
.CD1000U6.3EL15
Title
Document Number
MICRO-STAR IN T' L CO.,LTD.
No. 69, Li-De St, Jung-He City,
Taipei Hsien, Taiwan
http://www.msi.com.tw
S
VDDQ
+
Q28
1
2
3
4 5
EC28
.CD1000U6.3EL15
5VSB
8
7
6
VDD_12_A
NN-P07D03LV_SO8
Micro Star Restricted Secret
ACPI POWER CONTOLLER (MS-6)
2
MS-7142
+
EC35
5VDUAL
.CD1000U6.3EL15
D
Q11
X_20N03
S
Last Revision Date:
Friday, December 17, 2004
Sheet
1
+
EC22
470U/10V
of
27 33
1
Rev
100
Page 28
5
4
3
2
1
FRONT PANEL System Voltage Regulator
VCC
HDD+
330R
FP_RST# 7,27
R273
For MSI / Intel Front Panel
C426
VCC3
R280
4.7KR
X_C0.1U25Y
C444
PLED1 27
HDDLED
X_C0.1U25Y
R278 100R
SUSLED
PLED1
ALARM 24
SPKR 17
1
3
7
9
3
5
R276
1KR
ATX Power Connector
VCC3
JWR2
11
3.3V
12
-12V
PS_OUT#
-5V
C141
X_C1000P50N
VCC +12V
13
14
15
16
17
18
19
20
-12V
GND
PS_ON
GND
GND
GND
-5V
5V
5V
PWR-ATX20
JFP1
N31-2051231-H06
PLED
HDD+
SLED
HDDRESET-5PWSW+
RESET+
PWSW-
NC
GND1SPEAKER
BUZ+
SLED
BUZ-
PLED
VCCSPK
JFP2
H2X4(7)_color-N31-2041101
N31-2041101-H06
R283
220R0805
Q27
N-MMBT3904_SOT23
VCC3
1
3.3V
2
3.3V
3
GND
4
5V
5
GND
6
5V
7
GND
8
PW_OK
9
5V_SB
10
12V
2
4
6
8
2
4
6
8
PLED1
SUSLED
PWRSW
C455
VCC
C445
X_C0.1U25Y
VCC
5VSB
C99
C0.1U25Y
X_C0.1U25Y
VCC
R56
4.7KR
R275 22R
C456
X_C0.1U25Y
PW_OK
C119
C0.1U25Y
C431
C0.1U25Y
HDDLED
PW_OK 27
EXTSMI# 17
PWBTIN# 17
D8
1N4148_SOD123
D9
1N4148_SOD123
D10
1N4148_SOD123
EXTSMI#
IDEACTP# 22 SUSLED 27
IDEACTS# 22
SATALED 18
R162 4.7KR
JGS1
1
2
X_H1X2_black
VCC
D D
CLK_RESET# 7,27
C C
B B
PS_OUT# 27
VCC
C361
X_C0.1U25Y
3VDUAL
R239
49.9R1%
R234
200R1%
U13
LT1087S_SOT89
2
VIN3VOUT
ADJ
1
3VDUAL
VSUS2_5
C376
C10U10Y0805
R95
200R1%
R98
390R1%
POWER OK Circuits
ALL_PWRGD 18,27
-LDTRST 11
R160
1KR
R115
1KR
R217
360R1%
R203
390R1%
VSUSNB
3VDUAL VSUS2_5
VCC2_5
VCC3
.CD1000U6.3EL15
R161
R148
4.7KR
Q17
N-MMBT3904_SOT23
Q16
N-MMBT3904_SOT23
Q14
N-MMBT3904_SOT23
+
EC30
.CD1000U6.3EL11.5
EC32
+
4.7KR
-CPURST 5
A A
Micro Star Restricted Secret
Title
System Regulator&Front Panel
Document Number
MICRO-STAR IN T' L CO.,LTD.
No. 69, Li-De St, Jung-He City,
Taipei Hsien, Taiwan
5
4
3
2
http://www.msi.com.tw
MS-7142
Last Revision Date:
Sheet
1
Rev
100
Friday, December 17, 2004
of
28 33
Page 29
5
BULK / Decopuling
Place on CPU Solder side
VCORE
D D
C C
C468
X_C0.22U16Y
Buck-decoupling Mid-Freq. decoupling Cap.
( 7 * 4.7uF / 0805 , 4*10uF/1206)
VCORE
C136
C96
C10U10Y1206
C10U10Y1206
FM4
FM2
FM9
X
X
X
X_FM
X_FM
F_PAD_M120
X_FM
C175
X_C1U25Y1206
C66
C0.01U50X
C477
C151
C120
C10U10Y1206
FM5
FM3
X
X
X_FM
X_FM
X_C10U10Y1206
FM6
X
X_FM
X_C10U10Y1206
FM8
C473
X_C10U10Y1206
X
X_FM
C470
X_C10U10Y1206
FM7
X
X_FM
4
SYSTEM
5VSB
C348
C463
X_C0.1U25Y
C0.1U25Y
VCC3
C190
X_C0.1U25Y
3VDUAL
C439
X_C0.1U25Y
VCC3
C421
C0.1U25Y
C386
X_C0.1U25Y
T2
1
2
X_YJ102
C462
X_C0.1U25Y
+12V -12V
3
VCC
C88
X_C0.1U25Y
C174
C430
X_C0.1U25Y
C0.1U25Y
C401
C193
C0.1U25Y
C0.1U25Y
Impedance Test
T3
1
2
X_YJ102
C402
X_C0.1U25Y
-5V
C109
X_C0.1U25Y
C438
X_C0.1U25Y
C93
+12V
C0.1U25Y
2
ATX VIA-Hole * 9
MH3
1
CENTER
2
3
4
5
MH5
1
2
3
4
5
1
2
3
4
5
GND
GND
GND
GND
GND
GND
GND
GND
X_150 Drill / 300 Pad-0
CENTER
GND
GND
GND
GND
GND
GND
GND
GND
X_150 Drill / 300 Pad-0
MH7
CENTER
GND
GND
GND
GND
GND
GND
GND
GND
X_150 Drill / 300 Pad-0
6
7
8
9
6
7
8
9
6
7
8
9
1
MH6
1
CENTER
2
GND
3
GND
4
GND
5
GND
X_150 Drill / 300 Pad-0
MH4
1
CENTER
2
GND
3
GND
4
GND
5
GND
X_150 Drill / 300 Pad-0
MH2
1
CENTER
2
GND
3
GND
4
GND
5
GND
X_150 Drill / 300 Pad-0
6
GND
7
GND
8
GND
9
GND
6
GND
7
GND
8
GND
9
GND
6
GND
7
GND
8
GND
9
GND
PGND
B B
A A
Micro Star Restricted Secret
Title
Document Number
5
4
3
2
BULK / Decopuling
MICRO-STAR IN T' L CO.,LTD.
No. 69, Li-De St, Jung-He City,
Taipei Hsien, Taiwan
http://www.msi.com.tw
MS-7142
Last Revision Date:
Sheet
1
Rev
100
Friday, December 17, 2004
of
29 33
Page 30
5
K8 CPU Power
4
NB & SB & AGP Power
3
2
1
Other Power
DDR Side CPU Side
K8 Vcore ->
"VCORE" (60A)
D D
VDDA_2.5 Power ->
"VDDA_25" (0.11A)
HT Power ->
"VDD_12_A"&"VLDT0"
(2A)
DDR Power ->
"VDD_25_SUS"
(9.5A)
DDR-VTTPower ->
"VTT_DDR_SUS"
(5.21A)
NB & SB Core-Power
-> "VCC2_5" (?A)
NB & SB Core-Suspend
Power -> "VSUS2_5" (?A)
NB AGP8X Power ->
"VDDQ" (1.5A)
5VDUL
3VDUL
DDR_3VDUAL
9VSB
ATX Power
Supply
C C
+5VSB
5VDUAL
3VDUAL
( Q36.5) ( Q35.3 ) ( Q22/S )
VSUS2_5
-> SB
VCC
Charge Pump
-> 9VSB
MS-6.34
B B
+12V
VCC3
A A
-12V
5
VCORE ->
K8 CPU
( CHOK2/2 )
+5VR ->
Audio
( U21/2 )
VCC1_8 ->
SATA
( VR1/2 )
VDDA_25 ->
K8 CPU(I/O)
FB2
VDDQ ->
AGP
( Q28/S )
VCC1_5 ->
NB & SB
( VLINK )
( Q21/S )
4
VDD_12_A
-> HT
( Q19/1 )
3
DDR_25_SUS
-> DDR
( Q13/S )
VTT_DDR_SUS
-> DDR
2
( Q8/4 )
Micro Star Restricted Secret
Title
Document Number
MICRO-STAR IN T' L CO.,LTD.
No. 69, Li-De St, Jung-He City,
Taipei Hsien, Taiwan
http://www.msi.com.tw
Power Generation
MS-7142
Last Revision Date:
Friday, December 17, 2004
Sheet
1
of
30 33
Rev
100
Page 31
Ver. 00A
5
Copy from 7094
4
3
2
1
2004/11/25
Change R275 from 100ohm to 22ohm(Front Panel)
Add D2 and remove R13 for PWM leakage voltage(VRM)
2004/11/26
Change R124,R125 from 1Kohm to 100ohm for ear phone(Codec)
D D
Swap smbclk1 and smbdata1 of clock gen for H/W issue(CLOCK Gen)
Pop EC25 for MS6 power(ACPI)
Change the footprint of R194,R196,C372 from 0402 to 0603
2004/11/29
Change F3 from 24V to 6V
2004/11/30
Add R296,R297,R298,R299,R300,R301.But don't pop them for VIA recommend(Codec).
Change JUSB1 and JUSB2 PN from N31-2051131-H06 to N31-2051341-H06(USB)
2004/12/02
Don't pop R135(clock gen) and R27(SIO)==>Change SIO clock from 48MHz to 24MHz(SIO and Clock Gen)
2004/12/03
Pop U17,C425,R261,R271 and remove R262 for AC97 Power(Codec)
Swap CPU_TMP and THERMDA_CPU of SIO for smart fan control(SIO)
C C
2004/12/07
Change R98 to R11-0391T23-W08 for BOM error(Voltage Regulator)
Change R95 to 200ohm for VSUSNB from1.1V to 1.5V(Voltage Regulator)
2004/12/08
Move EC36 and ADD EC37 for USB voltage droop(USB)
Change R110 from 90.9ohm to 80.6ohm for RGB level from 0.66 to 0.71V(VGA)
Pop CB2(VCC),C273(VCCA3),C147(VCC) for VGA water-wave(VGA)
2004/12/09
Change R70,R71 from 44.2 ohm to 15 ohm for MEMORY(CPU)
Add R302,R303,R304,R305 to 10K ohm for ISL AP note(VRM)
Change R61,R68 from 10K ohm to 1.8K ohm for VGA I2C(VGA)
2004/12/10
Delete R51 for OVT function(SIO)
2004/12/13
Change C279 from 0.01u to 0.1u for LAN Rise/Fall sym fail(LAN)
B B
Change C31 from X_10p to 330p for Chock noise(VRM)
Change C330,C327 from 10p to 33p for Clock Crystal(Clock Gen)
Remove EC33(VCC),EC7(VTT_DDR) for cost
Change EC20(VDD_12_A),EC23(VTT_DDR_SUS) new PN(and footprint) for best Layout
Pop CN8,CN9,C356 for slow rise/fall time
2004/12/14
Pull R193(PIORDY_R),R209(SIORDY_R) from VCC to VCC3
2004/12/16
Change C154,C128,Cc149,C180,C132,C135,C211,C248 footprint from 0603 to 0402 for EMI
A A
Micro Star Restricted Secret
Title
Document Number
MICRO-STAR IN T' L CO.,LTD.
No. 69, Li-De St, Jung-He City,
Taipei Hsien, Taiwan
5
4
3
2
http://www.msi.com.tw
History
MS-7142
Last Revision Date:
Sheet
1
Rev
100
Monday, December 20, 2004
of
31 33
Page 32
5
4
3
2
1
NB FAN/HEAT-SINK
U7-F
PCB1
D D
VBAT1_M
MSI
U7-H
MSI
7142-10
P50-0714210-E48
U15_M
C C
LPC Flash ROM-4M
U6_1
CPU_RM
B B
BIOS FLASH ROM
U6_2
1
2
CPU_RM
BAT-BCR2032P
D06-0100101-P01
DDR
X_NB-HEATSINK-W/Fan
_
DDR
NB-HEATSINK-W/O Fan
E31-0401520-E25
Micro Star Restricted Secret
A A
5
4
3
Title
OPTION PART
Document Number
MICRO-STAR IN T'L CO.,LTD.
No. 69, Li-De St, Jung-He City,
Taipei Hsien, Taiwan
http://www.msi.com.tw
2
MS-7142
Last Revision Date:
Monday, December 20, 2004
Sheet
32 33
1
Rev
100
of
Page 33
5
For EMI
4
3
2
1
VCC3
D D
C C
B B
C406
C360
X_C0.1U25Y
X_C0.1U25Y
VCC
C308
C464
X_C0.1U25Y
X_C0.1U25Y
VCC3
C387
C268
C405
X_C0.1U25Y
C465
X_C0.1U25Y
C2
X_C0.1U25Y
X_C0.1U25Y
VCC
+12V -12V
X_C0.1U25Y
C298
C408
C161
C363
X_C0.1U25Y
C289
3VDUAL
X_C0.1U25Y
X_C0.1U25Y
C362
X_C0.1U25Y
VDD3
C341
X_C0.1U25Y
VDDQ
X_C0.1U25Y
C214
X_C0.1U25Y
X_C0.1U25Y
VCC
C147
M_C102P
VCC
C133
C75
X_C0.1U25Y
X_C0.1U25Y
PGND
C189
C429
C403
X_C0.1U25Y
X_C0.1U25Y
C490
X_C0.1U25Y
C178
C146
X_C0.1U25Y
C153
X_C0.1U25Y
X_C0.1U25Y
X_C0.1U25Y
VDD_25_SUS
C30
X_C0.1U25Y
VCC
C409
C377
C270
X_C0.1U25Y
X_C0.1U25Y
VCC3
VDDQ
X_C0.1U25Y
C260
VCC VCC
C49
X_C0.1U25Y
VCORE
X_C0.1U25Y
VDD_25_SUS
C496
C495
C497
X_C0.1U10X_0402
X_C0.1U10X_0402
VDD_25_SUS
C508
C509
C507
X_C0.1U10X_0402
X_C0.1U10X_0402
VCC
C519
C520
C523
X_C0.1U10X_0402
X_C0.1U10X_0402
VCC VDD A_25 VD D _ 25_S US
C536
VTT_DDR_SUS
X_C0.1U25Y
X_C0.1U10X_0402
X_C0.1U10X_0402
X_C0.1U10X_0402
C498
X_C0.1U10X_0402
C510
X_C0.1U10X_0402
C524
X_C0.1U10X_0402
C537
C500
C499
X_C0.1U10X_0402
X_C0.1U10X_0402
C511
C512
X_C0.1U10X_0402
X_C0.1U10X_0402
C525
C526
X_C0.1U10X_0402
X_C0.1U10X_0402
C538
X_C0.1U25Y
X_C0.1U25Y
VCC3
C501
X_C0.1U10X_0402
C513
X_C0.1U10X_0402
C527
X_C0.1U10X_0402
3VDUAL
C503
C502
X_C0.1U10X_0402
C514
C515
X_C0.1U10X_0402
VTT_DDR_SUS
C528
X_C0.1U10X_0402
C539
X_C0.1U25Y
X_C0.1U10X_0402
X_C0.1U10X_0402
C540
C504
X_C0.1U10X_0402
C516
X_C0.1U10X_0402
C529
X_C0.1U25Y
C505
C517
X_C0.1U10X_0402
-12V
X_C0.1U10X_0402
X_C0.1U10X_0402
C530
X_C0.1U10X_0402
C541
C506
X_C0.1U10X_0402
C518
X_C0.1U10X_0402
C531
X_C0.1U25Y
X_C0.1U10X_0402
C532
X_C0.1U10X_0402
C533
X_C0.1U10X_0402
C534
X_C0.1U10X_0402
C535
X_C0.1U10X_0402
A A
5
4
3
2
Micro Star Restricted Secret
Title
For EMI
Document Number
MICRO-STAR INT'L CO.,LTD.
No. 69, Li-De St, Jung-He City,
Taipei Hsien, Taiwan
http://www.msi.com.tw
MS-7142
Last Revision Date:
Friday, De ce mb e r 17, 2004
Sheet
33 33
1
Rev
100
of