Cover Sheet 1
1
2Block Diagram
GPIO
History
Intel LGA775 CPU
Intel 915P (North Bridge) 8-11
DDR I / II 12-13
DDR I / II Termination
Intel ICH6 (South Bridge)
Clock RTM862-480
LPC I/O -W83627THF
AC97 Audio
PCI-E X16 Slot
PCI Slot 1 , 2 ,3
A A
ATA33/66/100 IDE & FWH
VGA CONNECTOR
USB Connectors
ATX & Front Panel
VRM
RTL8110S
3
4
5-7
14-15
16-18
19
20
21
22
23
24
25
26
27ACPI controller
28
29
30
31EMI parts
MS(7140)
Intel (R) 915P (GMCH) + ICH6 Chipset
Intel LGA775 Processor
CPU:
Intel LGA775
System Chipset:
Intel 915P/G - GMCH (North Bridge)
Intel ICH6 (South Bridge)
On Board Chipset:
BIOS -- FWH EEPROM
AC'97 Codec -- AD1888
LPC Super I/O -- W83627THF
LAN-RTL8110S
CLOCK -RTM862-480
Main Memory:
DIMM * 4 (DDR*2,DDR2*2)
Expansion Slots:
PCI-E 16X SLOT * 1
PCI-E 1X SLOT * 1
PCI SLOT * 3
Version 20
1
PWM:
Controller:
RT8800B
MICRO-STAR INT'L CO.,LTD.
MSI
Title
Size Document Number Rev
Date: Sheet
COVER SHEET
MS-7140
132Thursday, April 14, 2005
of
20
1
RT880B
2-Phase PWM
PCI-E x 16 & DDRII
4X/8X
Connector
IDE Primary
A A
USB Port 0
UltraDMA 33/66/100
Intel LGA775 Processor
FSB
Intel 915P
HUB
Link
ICH6
64bit DDR
Channel 1
64bit DDR
Channel 2
2 DDRI
DIMM
Modules
PCI CNTRL
PCI ADDR/DATA
PCI Slot 1
PCI Slot 2
Block Diagram
RTL8110S
PCI Slot 3
USB Port 1
USB Port 2
USB
LPC Bus
USB Port 3
USB Port 4
SATA
LPC SIO
USB Port 5
Winbond
83627THF
USB Port 6
USB Port 7
AC'97 Codec
AC'97 Link
Flash
Keyboard
Mouse
Floopy Parallel Serial
1
MSI
Title
Size Document Number Rev
Date: Sheet
MICRO-STAR INT'L CO.,LTD.
BLOCK DIAGRAM
MS-7140
232Thursday, April 14, 2005
of
20
1
ICH5
FunctionTypeGPIO Pin
I
GPIO 0
GPIO 1
GPIO 2
GPIO 3
GPIO 4
GPIO 5
GPIO 6
GPIO 7
GPIO 8
GPIO 9
GPIO 10
GPIO 11
GPIO 12
GPIO 13
GPIO 14
GPIO 15
GPIO 16
GPIO 17
GPIO 18
GPIO 19
GPIO 20
GPIO 21
GPIO 22 GPO22
GPIO 23
PREQ#B
I
PREQ#B
I
PIRQ#E
I
PIRQ#F
I
PIRQ#G
PIRQ#H
I
I
GPI6
I
GPI7
I
CSA_PME#
I
OC4#
I
OC5#
I
SIO_SMI#
I
EXTSMI#
I
SIO_PME#
I OC#6
OC#7
I
PGNT#A
O
PGNT#B
O
O GPO18
O
BIOS_WP#
O
GPO20
O GPO21
OD
O
GPO23
GPIO 24 I/O GPIO24
GPIO 25 I/O
A A
*
GPIO 27
GPIO 28
GPIO 32
GPIO 33
GPIO 34
GPIO 40 PREQ#4
GPIO 41
GPIO 48
GPIO 49
LAN_DISABLE#
GPIO27
I/O
I/O GPIO28
GPIO32
I/O
GPIO33
I/O
GPIO34
I/O
I
I
GPI41
O PGNT#4
OD
CPUPWRGD
Power well
MAIN
MAIN
MAIN
MAIN
MAIN
MAIN
MAIN
MAIN
RESUME
RESUME
RESUME
RESUME
RESUME
RESUME
RESUME
RESUME
MAIN
MAIN
MAIN
MAIN
MAIN
MAIN
MAIN
MAIN
RESUME
RESUME
RESUME
RESUME
MAIN
MAIN
MAIN
MAIN
MAIN
MAIN
MAIN
default output
default output
default output
default output
default output
default output
default output
PCI Config.
DEVICE
INTA#
INTB#
PCI_REQ#0PCI Slot 1
PCI_GNT#0
INTC#
INTD#
PCI Slot 2
INTB#
INTC#
PCI_REQ#1 AD17 PCICLK1
PCI_GNT#1
INTD#
INTA#
PCI Slot 3 PCI_REQ#2 AD18
INTC#
INTD#
PCI_GNT#2
INTA#
INTB#
INTD#
PCI_REQ#3PCI Slot 4 AD19
INTA# PCI_GNT#3
INTB#
INTC#
PCI Slot 5
INTB#
INTC#
PCI_REQ#4 AD21 PCICLK4
PCI_GNT#4
INTD#
INTA#
IDSEL
AD16
DDR DIMM Config.
DEVICE
DIMM 1 MCLK_A0/MCLK_A0#
DIMM 2
1010000B
1010001B
CLOCKADDRESS
MCLK_A1/MCLK_A1#
MCLK_A2/MCLK_A2#
MCLK_B0/MCLK_B0#
MCLK_B1/MCLK_B1#
MCLK_B2/MCLK_B2#
CLOCKREQ#/GNT#
PCICLK0
PCICLK2
PCICLK3
CLK GEN PIN OUTMCP1 INT Pin
13 (PCI_CLK0)
14 (PCI_CLK1)
15 (PCI_CLK2)
16 (PCI_CLK3)
19 (PCI_CLK4)
FWH
Function
GPI 0 PD_DET
GPI 1
*
GPI 3
*
TypeGPIO Pin
I
I
SD_DET
Pull down through 1K ohms (unused)GPI 2
I
Pull down through 1K ohms (unused)
I
Pull down through 1K ohms (unused)GPI 4
I
PCI RESET DEVICE
Signals
PCIRST#1
HD_RST#
Springdale,LAN,FWH, Super I/O
PCI slot 1-3, AGP slotPCIRST#2
Primary, Scondary IDE
Target
MSI
Title
Size Document Number Rev
1
Date: Sheet
MICRO-STAR INT'L CO.,LTD.
General Purpose Spec
MS-7140
332Monday, March 07, 2005
of
20
8
7
6
5
4
3
2
1
93/08/5
1.Create MS7108 ver:0A circuit.
D D
C C
B B
A A
MSI
Title
Size Document Number Rev
8
7
6
5
4
3
Date: Sheet
MICRO-STAR INT'L CO.,LTD.
HISTORY
MS-7140
2
432Monday, March 07, 2005
1
20
of
8
7
6
5
4
3
2
1
R72
110R1%
R74
61.9R1%
2
4
6
8
VCC3
V_FSB_VTT
VTT_OUT_RIGHT
H_BPM#3
H_BPM#5
H_BPM#1
H_BPM#0
H_TDI
H_BPM#2
H_BPM#4
H_TDO
H_TMS
H_TCK
H_TRST#
CPU SIGNAL BLOCK
R66 680R
H_EDRDY
R57 680R
H_PCREQ#
D D
HDBI#[0..3]8
H_EDRDY8
H_IERR#6
FERR#6,16
STPCLK#16
HDBI#0
HDBI#1
HDBI#2
HDBI#3
H_EDRDY
HINIT#16
HDBSY#8
HDRDY#8
HTRDY#8
C C
HADS#8
HLOCK#8
HBNR#8
HIT#8
HITM#8
HBPRI#8
HDEFER#8
CPU_TMPA20
VTIN_GND20
TRMTRIP#6,16
H_PROCHOT#6
IGNNE#16
SMI#16
A20M#16
SLP#16
H_TDI
H_TDO
H_TMS
H_TRST#
H_TCK
C25 X_C0.1U25Y
B B
R46 X_1KR
H_FSBSEL06,10,19
H_FSBSEL16,10,19
H_FSBSEL26,10,19
CPU_BOOTVTT_OUT_RIGHT
H_PWRGD6,16
H_CPURST#6,8
HD#[0..63]8
HD#63
HD#62
HD#61
HD#60
HD#59
HD#58
HD#57
HD#56
HD#55
HD#54
G11
D19
C20
AB2
AB3
AD3
AD1
AF1
AC1
AG1
AE1
AL1
AK1
AE8
AL2
AH2
AE6
G10
D16
A20
AA2
G29
H30
G30
G23
B22
A22
A19
B19
B21
C21
B18
A17
B16
C18
A8
F2
R3
M3
P3
H4
B2
C1
E3
D2
C3
C2
D4
E4
G8
G7
M2
N2
P2
K3
L2
N5
C9
Y1
V2
N1
HA#[3..31]8
U4A
DBI0#
DBI1#
DBI2#
DBI3#
EDRDY#
IERR#
MCERR#
FERR#/PBE#
STPCLK#
BINIT#
INIT#
RSP#
DBSY#
DRDY#
TRDY#
ADS#
LOCK#
BNR#
HIT#
HITM#
BPRI#
DEFER#
TDI
TDO
TMS
TRST#
TCK
THERMDA
THERMDC
THERMTRIP#
GND/SKTOCC#
PROCHOT#
IGNNE#
SMI#
A20M#
SLP#
RSVD
RESERVED0
RESERVED1
RESERVED2
RESERVED3
RESERVED4
RESERVED5
BOOTSELECT
LL_ID0
LL_ID1
BSEL0
BSEL1
BSEL2
PWRGOOD
RESET#
D63#
D62#
D61#
D60#
D59#
D58#
D57#
D56#
D55#
D54#
B15
D53#
TP2
VID5
VID2
VID4
VID0
VID1
AK3
ITP_CLK1
ITP_CLK0
D7#
D6#
D5#
AM7
AM5
VID7#
D4#
VID3
AL4
AK4
AL6
VID6#
VID5#
VID4#
VID_SELECT
GTLREF_SEL
TESTHI12
TESTHI11
TESTHI10
LINT1/NMI
LINT0/INTR
D3#
D2#
D1#
AM3
AL5
AM2
VID3#
VID2#
VID1#
VID0#
GTLREF0
GTLREF1
BPM5#
BPM4#
BPM3#
BPM2#
BPM1#
BPM0#
PCREQ#
REQ4#
REQ3#
REQ2#
REQ1#
REQ0#
TESTHI9
TESTHI8
TESTHI7
TESTHI6
TESTHI5
TESTHI4
TESTHI3
TESTHI2
TESTHI1
TESTHI0
RSVD
RSVD
BCLK1#
BCLK0#
RS2#
RS1#
RS0#
AP1#
AP0#
BR0#
COMP5
COMP4
COMP3
COMP2
COMP1
COMP0
DP3#
DP2#
DP1#
DP0#
ADSTB1#
ADSTB0#
DSTBP3#
DSTBP2#
DSTBP1#
DSTBP0#
DSTBN3#
DSTBN2#
DSTBN1#
DSTBN0#
D0#
ZIF-SOCK775-15u
AN7
H1
H2
H29
AG3
AF2
AG2
AD2
AJ1
AJ2
G5
J6
K6
M6
J5
K4
W2
P1
H5
G4
G3
F24
G24
G26
G27
G25
F25
W3
F26
AK6
G6
G28
F28
A3
F5
B3
U3
U2
F3
T2
J2
R1
G2
T1
A13
J17
H16
H15
J16
AD5
R6
C17
G19
E12
B9
A16
G20
G12
C8
L1
K1
H_BPM#5
H_BPM#4
H_BPM#3
H_BPM#2
H_BPM#1
H_BPM#0
H_PCREQ#
HREQ#4
HREQ#3
HREQ#2
HREQ#1
HREQ#0
H_TESTHI12
H_TESTHI11
H_TESTHI10
H_TESTHI9
H_TESTHI8
H_TESTHI2_7
H_TESTHI1
H_TESTHI0
RSVD_AK6
RSVD_G6
HRS#2
HRS#1
HRS#0
H_COMP5
H_COMP4
H_COMP3
H_COMP2
H_COMP1
H_COMP0
TP1
CPU_GTLREF
TP9
GTLREF_SEL
RN8 8P4R-62R
1 2
3 4
5 6
7 8
R64 62R
R81 62R
R47 62R
R75 X_62R
R15 X_62R
R58 X_62R
CK_H_CPU# 19
CK_H_CPU 19
TP4
TP3
R49 X_60.4R1%
R60 X_60.4R1%
R51 100R1%
R68 100R1%
R48 60.4R1%
R91 60.4R1%
TP6
TP8
TP7
TP5
HADSTB#1 8
HADSTB#0 8
HDSTBP#3 8
HDSTBP#2 8
HDSTBP#1 8
HDSTBP#0 8
HDSTBN#3 8
HDSTBN#2 8
HDSTBN#1 8
HDSTBN#0 8
NMI 16
INTR 16
CPU_GTLREF 6
H_PCREQ# 8
HREQ#[0..4] 8
HRS#[0..2] 8
TP10
VTT_OUT_LEFT
V_FSB_VTT
VTT_OUT_RIGHT 6
H_BR#0 6,8
VTT_OUT_LEFT 6
C41
X_C0.1U25Y
VCCP
+12V
R73
R83
619R1%
10KR
GTLREF_SEL
DS
Q18
G
N-2N7002_SOT23
VCC3
R84
249R1%
DS
Q19
G
N-2N7002_SOT23
H_TESTHI0
VID329
VID129
VID429
VID229
VID029
VID529
PLACE RESISTORS OUTSIDE SOCKET
CAVITY IF NO ROOM FOR VARIABLE
RESISTOR DON'T PLACE
VTT_OUT_RIGHT
C35 C0.1U25Y
C38 C0.1U25Y
VID3
VID1
VID4
VID2
VID0
VID5
RN3 8P4R-51R
1 2
3 4
5 6
7 8
1 2
3 4
5 6
7 8
RN6 8P4R-51R
R44 X_49.9R1%
R43 X_49.9R1%
R42 49.9R1%
PLACE BPM TERMINATION NEAR CPU
MCH_GTLREF 8
RN2
X_8P4R-680R
1
3
5
7
R25 X_680R
R26 X_680R
HA#31
AJ6
AJ5
AH5
AH4
AG5
AG4
AG6
AF4
AF5
AB4
AC5
AB5
AA5
AD6
AA4Y4Y6W6AB6W5V4V5U4U5T4U6T5R4M4L4M5P6L5
A35#
A34#
A33#
A32#
A31#
A30#
A29#
A28#
A27#
A26#
A25#
A24#
A23#
A22#
A21#
A20#
A19#
A18#
A17#
A16#
A15#
A14#
A13#
A12#
A11#
D52#
D51#
D50#
D49#
D48#
D47#
D46#
D45#
D44#
D43#
D42#
D41#
D40#
D39#
D38#
D37#
D36#
D35#
D34#
D33#
D32#
D31#
D30#
D29#
D28#
D27#
D26#
D25#
D24#
C14
C15
A14
D17
D20
G22
D22
E22
G21
F21
E21
F20
E19
E18
F18
F17
G17
G18
E16
E15
G16
G15
F15
G14
F14
G13
E13
D13
F12
F11
HA#6
HA#7
HA#8
HA#9
A9#
A8#
A7#
A6#
A10#
D23#
D22#
D21#
D20#
D19#
D10
E10D7E9F9F8G9D11
HA#5
A5#
D18#
HA#4
A4#
D17#
HA#3
A3#
D16#
D15#
AC2
DBR#
D14#
C12
AN3
RSVD
D13#
D12#
B12D8C11
AN4
AN5
AN6
AJ3
RSVD
VSS_SENSE
VCC_SENSE
D11#
D10#
D9#
D8#
B10
A11
A10A7B7B6A5C6A4C5B4
HA#10
HA#11
HA#12
HA#13
HA#14
HA#15
HA#16
HA#17
HA#18
HA#19
HA#20
HA#21
HA#22
HA#23
HA#24
HA#25
HA#26
HA#27
HA#28
HA#29
HA#30
A A
8
HD#53
MSI
Title
Size Document Number Rev
7
6
5
4
3
Date: Sheet
MICRO-STAR INT'L CO.,LTD.
Intel LGA775 CPU - Signals
MS-7140
2
532Friday, March 18, 2005
1
20
of
HD#0
HD#1
HD#2
HD#3
HD#4
HD#5
HD#6
HD#7
HD#8
HD#9
HD#10
HD#11
HD#12
HD#13
HD#14
HD#15
HD#16
HD#17
HD#18
HD#19
HD#20
HD#21
HD#22
HD#23
HD#24
HD#25
HD#26
HD#27
HD#28
HD#29
HD#30
HD#31
HD#32
HD#33
HD#34
HD#35
HD#36
HD#37
HD#38
HD#39
HD#40
HD#41
HD#42
HD#43
HD#44
HD#45
HD#46
HD#47
HD#48
HD#49
HD#50
HD#51
HD#52
8
VCCP
AG21
AG19
AG18
AG15
AG14
AG12
AG11
AF9
AF8
AF22
AF21
AF19
AF18
AF15
AF14
AF12
AF11
AE9
AE23
AE22
AE21
AE19
AE18
AE15
AE14
AE12
AE11
AD8
AD30
AD29
AD28
AD27
AD26
AD25
AD24
AD23
AC8
AC30
AC29
AC28
AC27
AC26
AC25
AC24
AC23
AB8
AA8
VCCP
U4B
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
W30W8Y23
Y24
Y25
Y26
Y27
Y28
Y29
Y30
Y8
VCCP
D D
C C
AG22
VCC
VCC
W29
AG25
VCC
VCC
W28
AG26
VCC
VCC
W27
AG27
VCC
VCC
W26
AG28
VCC
VCC
W25
AG29
VCC
VCC
W24
7
AG30
VCC
VCC
W23
AG8
VCC
VCC
AG9
VCC
VCC
AH11
VCC
VCC
U30U8V8
AH12
VCC
VCC
U29
AH14
U28
VCC
VCC
AH15
VCC
VCC
U27
AH18
VCC
VCC
U26
AH19
VCC
VCC
U25
AH21
VCC
VCC
U24
AH22
VCC
VCC
AH25
VCC
VCC
AH26
VCC
VCC
T30T8U23
AH27
VCC
VCC
T29
AH28
VCC
VCC
T28
AH29
T27
VCC
VCC
AH30
VCC
VCC
T26
AH8
T25
VCC
VCC
AH9
T24
VCC
VCC
AJ11
VCC
VCC
AJ12
VCC
VCC
AJ14
VCC
VCC
AJ15
VCC
VCC
6
AJ18
AJ19
AJ21
AJ22
AJ25
AJ26
AJ8
AJ9
AK11
AK12
AK14
AK15
AK18
AK19
AK21
AK22
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
M24
M25
M26
M27
M28
M29
M30M8N23
N24
N25
N26
N27
N28
N29
N30N8P8R8T23
VCC
VCC
AK25
M23
VCC
VCC
AK26
VCC
VCC
5
AK8
AK9
AL11
AL12
AL14
AL15
AL18
AL19
AL21
AL22
AL25
AL26
AL29
AL30
AL8
AL9
AM11
AM12
AM14
AM15
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
J22
J23
J24
J25
J26
J27
J28
J29
J30J8J9
K23
K24
K25
K26
K27
K28
K29
K30K8L8
AM18
VCC
VCC
J21
AM19
VCC
VCC
J20
AM21
VCC
VCC
J19
AM22
VCC
VCC
J18
AM25
VCC
VCC
J15
AM26
VCC
VCC
J14
4
AM29
VCC
VCC
J13
AM30
VCC
VCC
J12
AM8
J11
VCC
VCC
AM9
J10
VCC
VCC
AN11
VCC
VCC
AN9
AN12
AN14
AN15
AN18
AN19
AN21
AN22
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC-IOPLL
VTTPWRGD
VTT_OUT_RIGHT
VTT_OUT_LEFT
VTT_SEL
RSVD/VTT_PKGSENSE
VCC
VCC
VCC
VCC
VCC
HS1
HS2
AN25
AN26
AN29
AN30
AN8
123
VCCA
VSSA
RSVD
HS3
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
HS4
4
H_VCCA
A23
H_VSSA
B23
D23
H_VCCA
C23
A25
A26
A27
A28
A29
A30
B25
B26
B27
B28
B29
B30
C25
C26
C27
C28
C29
C30
D25
D26
D27
D28
D29
D30
VTT_PWG
AM6
VTT_OUT_RIGHT
AA1
VTT_OUT_LEFT
J1
F27
F29
ZIF-SOCK775-15u
3
V_FSB_VTT
R80 X_1KR
VTT_SEL
VCC3
0
1
2
TEJ/PSC
RSVD
1
V_FSB_VTT
C106 C10U10Y0805
C100 C10U10Y0805
C109 X_C10U10Y0805
CAPS FOR FSB GENERIC
PLACE COMPONENTS AS CLOSE AS POSSIBLE TO PROCESSOR SOCKET
TRACE WIDTH TO CAPS MUST BE SMALLER THAN 12MILS
VTT_OUT_RIGHT
VTT_OUT_LEFT CPU_GTLREF
B B
A A
GTLREF VOLTAGE SHOULD BE
0.67*VTT = 0.8V
VTT_OUT_LEFT5
VTT_OUT_RIGHT5
VTT_OUT_LEFT
8
R56 49.9R1%
R61 X_49.9R1%
R59
100R1%
PLACE AT CPU END OF ROUTE
R55 62R
R53 100R
R69 62R
V_FSB_VTT
R54 62R
R52 62R
R45 62R
C46
C47
C220P50N
C0.1U25Y
R28 120R
H_CPURST#
H_PWRGD
H_BR#0
H_PROCHOT#VTT_OUT_RIGHT
PLACE AT ICH END OF ROUTE
TRMTRIP#
FERR#
H_IERR#
7
H_CPURST# 5,8
H_PWRGD 5,16
H_BR#0 5,8
TRMTRIP# 5,16
FERR# 5,16
H_IERR# 5
CPU_GTLREF 5
6
V_FSB_VTT
L2 X_10U100m_0805
CP4
X_COPPER
VID_GD#27,29H_PROCHOT# 5
FSBSEL RESISTOR CAN BE REMOVED IF ONLY TEJAS
AND CEDAR MILL ARE SUPPORTED
V_FSB_VTT
RN22
1
3
5
7
8P4R-470R
5
H_FSBSEL1
2
4
H_FSBSEL2
6
H_FSBSEL0
8
4
VTT_OUT_RIGHT
VTT_OUT_LEFT
VCC5_SB
R40
1KR
R39 10KR
H_FSBSEL1 5,10,19
H_FSBSEL2 5,10,19
H_FSBSEL0 5,10,19
C99
X_C1U10Y
R27 680R
R38
X_680R
3
C103
C102
C10U10Y1206
X_C10U10Y1206
1.25V VTT_PWRGOOD
VTT_PWG
Q10
N-MMBT3904_NL_SOT23
H_VCCA
H_VSSA
C31
X_C1U10Y
MICRO-STAR INT'L CO.,LTD.
MSI
Title
Size Document Number Rev
Date: Sheet
2
Intel LGA775 CPU - Power
MS-7140
632Friday, March 18, 2005
1
20
of
8
7
6
5
4
3
2
1
TP13
TP11
TP14
AC4
AE3
AE4D1D14
U4C
RSVD
RSVD
RSVD
VSS
AE29
VSS
AE30
RSVD
VSS
VSS
VSS
AE5
AE7
AF10
AF13
AA23
AA24
AA25
AA26
AA27
AA28
AA29
AA30
AB23
AB24
AB25
AB26
AB27
AB28
AB29
AB30
AC3
AC6
AC7
AD4
AD7
AE10
AE13
AE16
AE17
AE2
AE20
AE24
AE25
AE26
AE27
AE28
A12
VSS
A15
VSS
A18
VSS
A2
VSS
A21
VSS
A24
VSS
A6
VSS
A9
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
AA3
VSS
VSS
AA6
VSS
AA7
VSS
AB1
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
AB7
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
D D
C C
TP12
E23
E24E5E6E7F23F6B13J3N4P5V1W1Y3Y7Y5Y2W7W4V7V6V30V3V29
VSS
VSS
VSS
VSS
VSS
VSS
VSS
AG23
VSS
AG24
AG7
VSS
AH1
VSS
AH10
VSS
VSS
VSS
AH13
RSVD
VSS
AF16
RSVD
VSS
AF17
RSVD
VSS
AF20
RSVD
VSS
AF23
RSVD
VSS
AF24
RSVD
VSS
AF25
RSVD
VSS
AF26
RSVD
VSS
AF27
RSVD
VSS
AF28
VSS
AF29
VSS
AF3
RSVD
VSS
AF30
RSVD
VSS
AF6
RSVD
VSS
AF7
VSS
RSVD
VSS
AG10
RSVD
VSS
AG13
RSVD
VSS
AG16
VSS
AG17
AG20
VSS
VSS
AH16
VSS
VSS
AH17
VSS
VSS
AH20
AH23
VSS
VSS
V28
VSS
VSS
AH24
V27
AH3
VSS
VSS
V26
AH6
VSS
VSS
V25
AH7
VSS
VSS
V24
VSS
VSS
AJ10
V23U7U1T7T6T3R7R5R30
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
AJ13
AJ16
AJ17
AJ20
AJ23
AJ24
AJ27
AJ28
AJ29
VSS
VSS
R29
AJ30
VSS
VSS
H17
H18
H19
H20
H21
H22
H23
H24
H25
H26
H27
H28
VSS
VSS
AM28
AM4
VSS
VSS
VSS
AN1
VSS
VSS
VSS
VSS
AN10
VSS
VSS
AN13
H3H6H7H8H9J4J7
VSS
VSS
AN16
VSS
AN17
AN2
VSS
VSS
VSS
VSS
AN20
VSS
VSS
AN23
VSS
VSS
AN24
VSS
VSS
VSS
VSS
AN27
AN28B1B11
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
B14
ZIF-SOCK775-15u
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
H14
H13
H12
H11
H10
G1
F7
F4
F22
F19
F16
F13
F10
E8
E29
E28
E27
E26
E25
E20
E2
E17
E14
E11
D9
D6
D5
D3
D24
D21
D18
D15
D12
C7
C4
C24
C22
C19
C16
C13
C10
B8
B5
B24
B20
B17
R28
R27
R26
R25
R24
R23R2P7P4P30
P29
P28
P27
P26
P25
P24
P23N7N6N3M7M1L7L6L30L3L29
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
AJ4
AJ7
AK10
AK13
AK16
AK17
AK2
AK20
AK23
AK24
AK27
AK28
AK29
AK30
AK5
AK7
AL10
AL13
AL16
AL17
AL20
VSS
VSS
AL23
VSS
VSS
AL24
VSS
VSS
AL27
VSS
VSS
AL28
VSS
VSS
L28
L27
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
AL3
AL7
AM1
AM10
L26
VSS
VSS
AM13
L25
VSS
VSS
AM16
L24
VSS
VSS
AM17
L23K7K5
VSS
VSS
AM20
AM23
VSS
VSS
VSS
VSS
AM24
K2
VSS
VSS
AM27
B B
A A
MSI
Title
Size Document Number Rev
8
7
6
5
4
3
Date: Sheet
MICRO-STAR INT'L CO.,LTD.
Intel LGA775 CPU - GND
MS-7140
2
732Friday, March 18, 2005
1
20
of
8
7
6
5
4
3
2
1
4/11 Update New-PN
V_1P5_CORE
AC11
AB11
Y20
Y19
Y17
Y16
W20
W16
U20
U16
T20
T19
T17
T16
AA13
AA14
AA16
AA18
AA20
AA21
AA22
AA23
AA24
AB13
AB14
AB15
AB16
AB17
AB18
AB19
AB20
AB21
AB22
AB23
AB24
N13
N14
N15
N16
N18
N20
N21
P13
P14
P15
P17
P19
P21
P22
R13
R14
R15
R16
R18
R20
R22
R23
T13
T14
T15
T21
T23
T24
U13
U14
U22
U24
V13
V14
V15
V21
V23
V24
W13
W14
W22
W24
Y13
Y14
Y15
Y21
Y23
VCCNCTF
VCCNCTF
AP1
B35B1A34
C133
C0.1U25Y
VCCNCTF
VCCNCTF
VCCNCTF
(INTEL-915P-B1)
A2
Y24
VCCNCTF
VCCNCTF
DINV_0#
DINV_1#
DINV_2#
DINV_3#
HD_STBP0#
HD_STBN0#
HD_STBP1#
HD_STBN1#
HD_STBP2#
HD_STBN2#
HD_STBP3#
HD_STBN3#
HD0#
HD1#
HD2#
HD3#
HD4#
HD5#
HD6#
HD7#
HD8#
HD9#
HD10#
HD11#
HD12#
HD13#
HD14#
HD15#
HD16#
HD17#
HD18#
HD19#
HD20#
HD21#
HD22#
HD23#
HD24#
HD25#
HD26#
HD27#
HD28#
HD29#
HD30#
HD31#
HD32#
HD33#
HD34#
HD35#
HD36#
HD37#
HD38#
HD39#
HD40#
HD41#
HD42#
HD43#
HD44#
HD45#
HD46#
HD47#
HD48#
HD49#
HD50#
HD51#
HD52#
HD53#
HD54#
HD55#
HD56#
HD57#
HD58#
HD59#
HD60#
HD61#
HD62#
HD63#
MCH_GTLREF 5
J33
H33
J34
G35
H35
G34
F34
G33
D34
C33
D33
B34
C34
B33
C32
B32
E28
C30
D29
H28
G29
J27
F28
F27
E27
E25
G25
J25
K25
L25
L23
K23
J22
J24
K22
J21
M21
H23
M19
K21
H20
H19
M18
K18
K17
G18
H18
F17
A25
C27
C31
B30
B31
A31
B27
A29
C28
A28
C25
C26
D27
A27
E24
B25
E34
J26
K19
B26
E33
E35
H26
F26
J19
F19
B29
C29
HDBI#0
HDBI#1
HDBI#2
HDBI#3
HD#0
HD#1
HD#2
HD#3
HD#4
HD#5
HD#6
HD#7
HD#8
HD#9
HD#10
HD#11
HD#12
HD#13
HD#14
HD#15
HD#16
HD#17
HD#18
HD#19
HD#20
HD#21
HD#22
HD#23
HD#24
HD#25
HD#26
HD#27
HD#28
HD#29
HD#30
HD#31
HD#32
HD#33
HD#34
HD#35
HD#36
HD#37
HD#38
HD#39
HD#40
HD#41
HD#42
HD#43
HD#44
HD#45
HD#46
HD#47
HD#48
HD#49
HD#50
HD#51
HD#52
HD#53
HD#54
HD#55
HD#56
HD#57
HD#58
HD#59
HD#60
HD#61
HD#62
HD#63
HDSTBP#0 5
HDSTBN#0 5
HDSTBP#1 5
HDSTBN#1 5
HDSTBP#2 5
HDSTBN#2 5
HDSTBP#3 5
HDSTBN#3 5
HD#[0..63] 5
HDBI#[0..3] 5
4/11 Update New-PN
U7_H
1 2
12
_
V_1P5_CORE
C201
C0.1U25Y
C187
C0.1U25Y
C280
C0.01U50Y5
C283
C0.1U25Y
C199
C0.1U25Y
C281
C10U10Y0805
C182
C10U10Y0805
U7A
H29
HA3#
K29
HA4#
J29
HA5#
G30
HA6#
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
E16
C16
AR35
AR34
AR2
AR1
C130
X_C0.1U25Y
VCCNCTF
AP35
G32
HA7#
K30
HA8#
L29
HA9#
M30
HA10#
L31
HA11#
L28
HA12#
J28
HA13#
K27
HA14#
K33
HA15#
M28
HA16#
R29
HA17#
L26
HA18#
N26
HA19#
M26
HA20#
N31
HA21#
P26
HA22#
N29
HA23#
P28
HA24#
R28
HA25#
N33
HA26#
T27
HA27#
T31
HA28#
U28
HA29#
T26
HA30#
T29
HA31#
J31
HAD_STB0#
N27
HAD_STB1#
E31
HPCREQ#
R33
BREQ0#
E30
BPRI#
M35
BNR#
L33
HLOCK#
M31
ADS#
F33
HREQ0#
E32
HREQ1#
H31
HREQ2#
G31
HREQ3#
F31
HREQ4#
L34
HIT#
N35
HITM#
J35
DEFER#
N34
HTRDY#
L35
DBSY#
M32
DRDY#
P33
HEDRDY#
K34
RS0#
P34
RS1#
J32
RS2#
M23
HCLKP
M22
HCLKN
AG7
PWROK
G24
CPURST#
AF7
RSTIN#
M14
ICH_SYNC#
B23
HDRCOMP
D24
HDSCOMP
A23
HDSWING
A24
HDVREF
RSVRD
RSVRD
RSVRD
RSVRD
RSVRD
RSVRD
RSVRD
RSVRD
RSVRD
RSVRD
RSVRD
RSVRD
RSVRD
RSVRD
RSVRD
RSVRD
RSVRD
RSVRD
RSVRD
RSVRD
RSVRD
RSVRD
RSVRD
RSVRD
AA30
AC12
AC13
R112
300R1%
AC14
AC15
AC16
RSVRD
AC17
RSVRD
HS1
HS3
HS5
HS7
AK21
AK24
AL21
AL20
AK18
AJ24
AJ23
AJ18
AJ20
V31
V30
U30
V32
Y30
AB29
R31
R30
AJ21
135
7
60.4R1%
R116
V_FSB_VTT HSCOMP V_FSB_VTTV_FSB_VTT HSWING MCH_GTLREF
C135
X_C2.2P50N
AA31
NCNCNCNCNCNCNCNCNCNCNCNCNCNCNCNCNCNCNCNCNCNCNCNCNCNCNCNCNCNCNCNCNCNCNCNCNCNCNCNCNCNCNCNCNCNCNC
RSVRD
RSVRD
RSVRD
RSVRD
RSVRD
N12
N22
N23
N24
P12
P23
P24
R12
R24
T12
U12
V12
W12
Y12
AA12
AB12
AC23
AC24
AN19
AL28
AJ14
AH24
AG6
AD30
P30
L19
L12
K12
J12
H17
H15
H12
G12
AC18
AC19
AC20
AC21
AC22
HD_SWING VOLTAGE "10 MIL TRACE , 7 MIL
SPACE" HD_SWING S/B 1/4*VTT +/- 2%
PLACE DIVIDER RESISTOR NEAR VTT
R117
100R1%
C137
C0.01U50X
49.9R1%
R110
F24
GTLREF VOLTAGE SHOULD BE 0.67*VTT=0.8V
49.9 OHM OVER 100 RESISTORS
R109
100R1%
F12
ICH_SYNC#
R114
20R1%
C10U10Y0805
X_C10U10Y0805
HA#3
HA#4
HA#5
HA#6
HA#7
HA#8
HA#9
HA#10
HA#11
HA#12
HA#13
HA#14
HA#15
HA#16
HA#17
HA#18
HA#19
HA#20
HA#21
HA#22
HA#23
HA#24
HA#25
HA#26
HA#27
HA#28
HA#29
HA#30
HA#31
HREQ#0
HREQ#1
HREQ#2
HREQ#3
HREQ#4
HRS#0
HRS#1
HRS#2
HRCOMP
HSCOMP
HSWING
MCH_GTLREF
HA#[3..31]5
D D
HADSTB#05
HADSTB#15
ICH_SYNC#17
HREQ#[0..4]5
PLTRST#16
H_PCREQ#5
HBPRI#5
HLOCK#5
HITM#5
HDEFER#5
HTRDY#5
HDBSY#5
HDRDY#5
H_EDRDY5
HRS#[0..2]5
CK_H_MCH19
CK_H_MCH#19
PWRGD_3V17,27
H_CPURST#5,6
V_1P5_CORE
C210
C206
H_BR#05,6
HBNR#5
HADS#5
HIT#5
V_FSB_VTT5,6,10,18,27
C C
B B
A A
MSI
ICH_SYNC#ICH_SYNC#
8
7
R141 8.2KR
6
V_2P5_MCH
5
4
3
Title
Size Document Number Rev
Date: Sheet
MICRO-STAR INT'L CO.,LTD.
Intel Springdale - CPU Signals
MS-7140
2
832Monday, April 11, 2005
1
20
of
8
7
6
5
4
3
2
1
4/11 Update New-PN
DQM_A[0..7]12,15
SCKE_A[0..3]12,13,14
DATA_A[0..63]12,15
DQM_A6
DQM_A1
DQM_A4
DQM_A2
DQM_A7
DQM_A3
DATA_A31
DATA_A35
DATA_A11
DATA_A13
DATA_A16
DATA_A2
DATA_A0
D D
C C
B B
SCS_A#[0..1]12,14
RAS_A#12,13,14
CAS_A#12,14
WE_A#12,14
MAA_A[0..13]12,13,14
ODT_A[0..1]12
SBS_A[0..2]12,13,14
DQS_A012,15
DQS_A#012,15
DQS_A112,15
DQS_A#112,15
DQS_A212,15
DQS_A#212,15
DQS_A312,15
DQS_A#312,15
DQS_A412,15
DQS_A#412,15
DQS_A512,15
DQS_A#512,15
DQS_A612,15
DQS_A#612,15
DQS_A712,15
DQS_A#712,15
P_DDR0_A12
N_DDR0_A12
P_DDR1_A12
N_DDR1_A12
P_DDR2_A12
N_DDR2_A12
SCS_A#0
SCS_A#1
RAS_A#
CAS_A#
WE_A#
MAA_A0
MAA_A1
MAA_A2
MAA_A3
MAA_A4
MAA_A5
MAA_A6
MAA_A7
MAA_A8
MAA_A9
MAA_A10
MAA_A11
MAA_A12
MAA_A13
ODT_A0
ODT_A1
SBS_A0
SBS_A1
DQS_A0
DQS_A#0
DQS_A1
DQS_A#1
DQS_A2
DQS_A#2
DQS_A3
DQS_A#3
DQS_A4
DQS_A#4
DQS_A5
DQS_A#5
DQS_A6
DQS_A#6
DQS_A7
DQS_A#7
P_DDR0_A
N_DDR0_A
P_DDR1_A
N_DDR1_A
P_DDR2_A
N_DDR2_A
SM_XSLEWIN
MCH_VREF_A
SMPCOMP_P
SMPCOMP_N
U7B
AR29
SACS0#
AP32
SACS1#
AR28
SACS2#
AN31
SACS3#
AP27
SARAS#
AN29
SACAS#
AN28
SAWE#
AP26
SAMA0
AR24
SAMA1
AL24
SAMA2
AP23
SAMA3
AR23
SAMA4
AP22
SAMA5
AN23
SAMA6
AP21
SAMA7
AN22
SAMA8
AN21
SAMA9
AM27
SAMA10
AM21
SAMA11
AR20
SAMA12
AP31
SAMA13
AP30
SAODT0
AN32
SAODT1
AP29
SAODT2
AP33
SAODT3
AR27
SABA0
AN27
SABA1
AN20
SABA2
AG1
SADQS0
AG2
SADQS0#
AL3
SADQS1
AL2
SADQS1#
AP7
SADQS2
AR7
SADQS2#
AF17
SADQS3
AG17
SADQS3#
AM30
SADQS4
AL29
SADQS4#
AG35
SADQS5
AG33
SADQS5#
AA34
SADQS6
AA35
SADQS6#
U34
SADQS7
U35
SADQS7#
AN26
SACK0
AP25
SACK0#
AM2
SACK1
AM3
SACK1#
AC34
SACK2
AC35
SACK2#
AN25
SACK3
AM24
SACK3#
AN3
SACK4
AN2
SACK4#
AC33
SACK5
AB34
SACK5#
AB33
SADDR1MA13
AH15
SARCVENOUT#
AE16
SARCVENIN#
AJ12
SMSLEWIN0
AK12
SMSLEWOUT0
AE7
SMVREF0
AG8
SMRCOMP1
AG4
SMRCOMP0
R40240.2R1%
AE5
SMOCDCOMP1
R40340.2R1%
AF5
SMOCDCOMP0
DATA_A1
AE3
AF3
AH3
SADQ0
SADQ1
SADQ2
SBDQ0
AH4
DATA_A10
DATA_A7
DATA_A9
DATA_A4
DATA_A5
DATA_A6
DATA_A8
DATA_A3
AJ2
AE2
AE1
AG3
AH2
AK2
AK3
AN4
SADQ3
SADQ4
SADQ5
SADQ6
SADQ7
SADQ8
SADQ9
SADQ10
SBDQ1
SBDQ2
SBDQ3
SBDQ4
SBDQ5
SBDQ6
SBDQ7
AJ6
SBDQ8
AL6
AN6
AG9
AH7
AL5
AM5
AJ8
DATA_A18
DATA_A17
DATA_A14
DATA_A15
DATA_A12
AP4
SADQ11
SBDQ9
AL8
DATA_A19
AJ1
AJ3
AP2
AP3
AR5
AP6
AP9
AN9
SADQ12
SADQ13
SADQ14
SADQ15
SADQ16
SADQ17
SADQ18
SADQ19
SBDQ10
SBDQ11
SBDQ12
SBDQ13
SBDQ14
SBDQ15
SBDQ16
AE11
SBDQ17
AJ7
AL7
AG10
AG11
AF13
AH12
AF11
DATA_A20
DATA_A27
DATA_A28
DATA_A21
DATA_A24
DATA_A25
DATA_A26
DATA_A22
DATA_A23
AN5
AP5
AN8
AR8
AL17
AJ17
AF19
AH18
AK16
SADQ20
SADQ21
SADQ22
SADQ23
SADQ24
SADQ25
SADQ26
SADQ27
SADQ28
SBDQ18
SBDQ19
SBDQ20
SBDQ21
SBDQ22
SBDQ23
SBDQ24
SBDQ25
AD14
AD15
SBDQ26
AD12
AE13
AG14
AF14
AK19
AH19
AH21
DATA_A29
AF16
AD21
DATA_A36
DATA_A33
DATA_A30
DATA_A32
AD17
AE19
SADQ29
SADQ30
SADQ31
SBDQ27
SBDQ28
SBDQ29
AD18
AL18
AK27
AE22
DATA_A39
AL30
AD23
DATA_A46
DATA_A45
DATA_A41
DATA_A43
DATA_A42
DATA_A44
DATA_A40
AH33
AH35
AF33
AE33
AJ33
AJ34
AG32
SADQ39
SADQ40
SADQ41
SADQ42
SADQ43
SADQ44
SADQ45
SADQ46
SBDQ37
SBDQ38
SBDQ39
SBDQ40
SBDQ41
SBDQ42
SBDQ43
SBDQ44
AL25
AJ25
AK32
AJ31
AG31
AF28
AJ29
DATA_A37
DATA_A34
AJ28
AL31
AK31
AH27
AL27
AN30
SADQ32
SADQ33
SADQ34
SADQ35
SADQ36
SADQ37
SADQ38
SBDQ30
SBDQ31
SBDQ32
SBDQ33
SBDQ34
SBDQ35
SBDQ36
AF22
AF24
AF25
AL26
AJ26
AF23
DATA_A38
DATA_A47
AF34
SADQ47
SBDQ45
AK33
DATA_A48
AD31
AG30
DATA_A54
DATA_A55
DATA_A52
DATA_A51
DATA_A50
DATA_A49
DATA_A53
AD35
Y33
W34
AE35
AE34
AA32
Y35
SADQ48
SADQ49
SADQ50
SADQ51
SADQ52
SADQ53
SADQ54
SADQ55
SBDQ46
SBDQ47
SBDQ48
SBDQ49
SBDQ50
SBDQ51
SBDQ52
SBDQ53
AG27
AF27
AE27
AC26
AB26
AE31
AE29
DATA_A56
DATA_A63
DATA_A59
DATA_A61
DATA_A62
DATA_A57
DATA_A60
DATA_A58
V34
V33
R32
SADQ56
SADQ57
SADQ58
SBDQ54
SBDQ55
SBDQ56
AC28
AB27
AA28
SCKE_A1
SCKE_A0
R34
SADQ59
SBDQ57
W29
SCKE_A2
W35
W33
T33
T35
AP19
AM18
AN18
SADQ60
SADQ61
SADQ62
SADQ63
SACKE0
SACKE1
SACKE2
SBDQ58
SBDQ59
SBDQ60
SBDQ61
SBDQ62
SBDQ63
V28
SBCKE0
V29
Y26
AA29
W26
U26
AP10
SCKE_A3
AR19
SACKE3
SBCKE1
AN10
DQM_A5
DQM_A0
AF2
AL1
AN7
AH16
AK29
AG34
AA33
U33
SBCS0#
SBCS1#
SADM3
SADM4
SADM5
SADM6
SADM7
SBDDR1MA13
SBRCVENOUT#
SBRCVENIN#
SMSLEWIN1
SMSLEWOUT1
SBCS2#
SBCS3#
SBRAS#
SBCAS#
SBWE#
SBMA0
SBMA1
SBMA2
SBMA3
SBMA4
SBMA5
SBMA6
SBMA7
SBMA8
SBMA9
SBMA10
SBMA11
SBMA12
SBMA13
SBODT0
SBODT1
SBODT2
SBODT3
SBBA0
SBBA1
SBBA2
SBDQS0
SBDQS0#
SBDQS1
SBDQS1#
SBDQS2
SBDQS2#
SBDQS3
SBDQS3#
SBDQS4
SBDQS4#
SBDQS5
SBDQS5#
SBDQS6
SBDQS6#
SBDQS7
SBDQS7#
SBCK0
SBCK0#
SBCK1
SBCK1#
SBCK2
SBCK2#
SBCK3
SBCK3#
SBCK4
SBCK4#
SBCK5
SBCK5#
SADM0
SADM1
SADM2
SMVREF1
SBDM0
SBDM1
SBDM2
SBDM3
SBDM4
SBDM5
SBDM6
SBDM7
SBCKE2
SBCKE3
AR9
AM9
AJ5
AH9
AH13
AG20
AG24
AH31
AD24
W31
(INTEL-915P-B1)
AN33
AM34
AP34
AN34
AN17
AP18
AP17
AM15
AR15
AN15
AL15
AP14
AM12
AP13
AL12
AN13
AR12
AP15
AP11
AR11
AL33
AM33
AL34
AL35
AK34
AR16
AN16
AN11
AK5
AL4
AK10
AH10
AK13
AL14
AD20
AF20
AH25
AG26
AH28
AH30
AB31
AC30
W27
Y28
AH22
AG23
AK9
AL9
AE26
AE25
AL23
AK22
AJ11
AL11
AD28
AD29
AD32
AK15
AN14
AF9
AE10
AE8
SCS_B#0
SCS_B#1
RAS_B#
CAS_B#
WE_B#
MAA_B0
MAA_B1
MAA_B2
MAA_B3
MAA_B4
MAA_B5
MAA_B6
MAA_B7
MAA_B8
MAA_B9
MAA_B10
MAA_B11
MAA_B12
MAA_B13
ODT_B0
ODT_B1
ODT_B3
SBS_B0
SBS_B1
SBS_B2SBS_A2
DQS_B0
DQS_B#0
DQS_B1
DQS_B#1
DQS_B2
DQS_B#2
DQS_B3
DQS_B#3
DQS_B4
DQS_B#4
DQS_B5
DQS_B#5
DQS_B6
DQS_B#6
DQS_B7
DQS_B#7
P_DDR0_B
N_DDR0_B
P_DDR1_B
N_DDR1_B
P_DDR2_B
N_DDR2_B
P_DDR3_B
N_DDR3_B
P_DDR5_B
N_DDR5_B
SM_YSLEWIN
MCH_VREF_B
SCS_B#[0..1] 13,14
RAS_B# 13,14
CAS_B# 13,14
WE_B# 13,14
MAA_B[0..13] 12,13,14
ODT_B0 13,14
ODT_B1 12,13,14
ODT_B3 12,14
SBS_B[0..2] 12,13,14
DQS_B0 13,15
DQS_B#0 13,15
DQS_B1 13,15
DQS_B#1 13,15
DQS_B2 13,15
DQS_B#2 13,15
DQS_B3 13,15
DQS_B#3 13,15
DQS_B4 13,15
DQS_B#4 13,15
DQS_B5 13,15
DQS_B#5 13,15
DQS_B6 13,15
DQS_B#6 13,15
DQS_B7 13,15
DQS_B#7 13,15
P_DDR0_B 13
N_DDR0_B 13
P_DDR1_B 13
N_DDR1_B 13
P_DDR2_B 13
N_DDR2_B 13
P_DDR3_B 13
N_DDR3_B 13
P_DDR5_B 13
N_DDR5_B 13
DATA_B42
DATA_B14
DATA_B15
DATA_B21
DATA_B23
DATA_B27
DATA_B11
DATA_B17
DATA_B13
DATA_B16
DATA_B18
DATA_B19
DATA_B20
DATA_B22
DATA_B24
DATA_B25
DATA_B26
DATA_B10
DATA_B4
DATA_B3
DATA_B0
DATA_B2
DATA_B1
DATA_B12
DATA_B5
DATA_B7
DATA_B8
DATA_B9
DATA_B6
DATA_B28
DATA_B29
DATA_B30
DATA_B31
DATA_B32
DATA_B33
DATA_B34
DATA_B35
DATA_B36
DATA_B37
DATA_B38
DATA_B39
DATA_B40
DATA_B41
DATA_B43
DATA_B44
DATA_B45
DATA_B46
DATA_B47
DATA_B48
DATA_B49
DATA_B50
DATA_B51
DATA_B52
DATA_B53
DATA_B54
DATA_B55
DATA_B56
DATA_B57
DATA_B58
DATA_B59
DATA_B60
DATA_B61
DATA_B62
DATA_B63
SCKE_B0
SCKE_B1
SCKE_B2
DQM_B4
DQM_B2
DQM_B3
DQM_B1
DQM_B7
DQM_B6
DQM_B5
DQM_B0
DATA_B[0..63]13,15
SCKE_B[0..2]13,14
1KR1%
DQM_B[0..7]13,15
MCH_VREF_B
C183
PLACE 0.1UF CAP CLOSE TO MCH
C0.1U25Y
MCH_VREF_A
PLACE 0.1UF CAP CLOSE TO MCH
C185
C0.1U25Y
Title
Size Document Number Rev
Date: Sheet
4
3
MICRO-STAR INT'L CO., LT D.
MSI
Intel Springdale - Memory Signals
MS-7140
2
20
of
932Monday, April 11, 2005
1
CPU STRAPPING RESISTORS
VCC_DDR
A A
8
ALL COMPONENTS CLOSE TO CPU
R153 80.6R1%
C190
X_C0.1U25Y
R151 80.6R1%
7
SMPCOMP_N
SMPCOMP_P
VCC_DDR
R156 1KR1%
R155
PLACE CLOSE TO MCH
6
5
8
4/11 Update New-PN
EXP_A_RXP_022
EXP_A_RXN_022
EXP_A_RXP_122
EXP_A_RXN_122
EXP_A_RXP_222
EXP_A_RXN_222
CK_PE_100M_MCH19
CK_PE_100M_MCH#19
SDVO_CTRL_DATA22
R128 X_1KR1%
V_1P5_CORE
V_1P5_CORE
EXP_A_RXP_322
EXP_A_RXN_322
EXP_A_RXP_422
EXP_A_RXN_422
EXP_A_RXP_522
EXP_A_RXN_522
EXP_A_RXP_622
EXP_A_RXN_622
EXP_A_RXP_722
EXP_A_RXN_722
EXP_A_RXP_822
EXP_A_RXN_822
EXP_A_RXP_922
EXP_A_RXN_922
EXP_A_RXP_1022
EXP_A_RXN_1022
EXP_A_RXP_1122
EXP_A_RXN_1122
EXP_A_RXP_1222
EXP_A_RXN_1222
EXP_A_RXP_1322
EXP_A_RXN_1322
EXP_A_RXP_1422
EXP_A_RXN_1422
EXP_A_RXP_1522
EXP_A_RXN_1522
DMI_ITP_MRP_016
DMI_ITN_MRN_016
DMI_ITP_MRP_116
DMI_ITN_MRN_116
DMI_ITP_MRP_216
DMI_ITN_MRN_216
DMI_ITP_MRP_316
DMI_ITN_MRN_316
SDVO_CTRL_CLK22
R127 1KR1%
C164 C0.1U25Y
D D
C C
MEMTYPE15
B B
V_2P5_DAC_FILTERED25
A A
EXP_A_RXP_0
EXP_A_RXN_0
EXP_A_RXP_1
EXP_A_RXN_1
EXP_A_RXP_2
EXP_A_RXN_2
EXP_A_RXP_3
EXP_A_RXN_3
EXP_A_RXP_4
EXP_A_RXN_4
EXP_A_RXP_5
EXP_A_RXN_5
EXP_A_RXP_6
EXP_A_RXN_6
EXP_A_RXP_7
EXP_A_RXN_7
EXP_A_RXP_8
EXP_A_RXN_8
EXP_A_RXP_9
EXP_A_RXN_9
EXP_A_RXP_10
EXP_A_RXN_10
EXP_A_RXP_11
EXP_A_RXN_11
EXP_A_RXP_12
EXP_A_RXN_12
EXP_A_RXP_13
EXP_A_RXN_13
EXP_A_RXP_14
EXP_A_RXN_14
EXP_A_RXP_15
EXP_A_RXN_15
DMI_ITP_MRP_0
DMI_ITN_MRN_0
DMI_ITP_MRP_1
DMI_ITN_MRN_1
DMI_ITP_MRP_2
DMI_ITN_MRN_2
DMI_ITP_MRP_3
DMI_ITN_MRN_3
CK_PE_100M_MCH
CK_PE_100M_MCH#
SDVO_CTRL_DATA
SDVO_CTRL_CLK
BSEL0
BSEL1
BSEL2
MTYPE
EXP_SLR
V_1P5_CORE
VCCA_HPLLVCCA_HPLL
VCCA_MPLL
VCCA_DPLLA
VCCA_DPLLB
VCCA_GPLL
V_2P5_MCH
V_2P5_DAC_FILTERED
CP7 X_COPPER
L5 X_0R0805
CP8 X_COPPER
L6 X_0R0805
L32 OPTION 0 ohm
U7C
E11
EXPARXP0
F11
EXPARXN0
J11
EXPARXP1
H11
EXPARXN1
F9
EXPARXP2
E9
EXPARXN2
F7
EXPARXP3
E7
EXPARXN3
B3
EXPARXP4
B4
EXPARXN4
D5
EXPARXP5
E5
EXPARXN5
G6
EXPARXP6
G5
EXPARXN6
H8
EXPARXP7
H7
EXPARXN7
J6
EXPARXP8
J5
EXPARXN8
K8
EXPARXP9
K7
EXPARXN9
L6
EXPARXP10
L5
EXPARXN10
P10
EXPARXP11
R10
EXPARXN11
M8
EXPARXP12
M7
EXPARXN12
N6
EXPARXP13
N5
EXPARXN13
P7
EXPARXP14
P8
EXPARXN14
R6
EXPARXP15
R5
EXPARXN15
U5
DMI RXP0
U6
DMI RXN0
T9
DMI RXP1
T8
DMI RXN1
V7
DMI RXP2
V8
DMI RXN2
V10
DMI RXP3
U10
DMI RXN3
A11
GCLKINP
B11
GCLKINN
K13
SDVOCTRLDATA
J13
SDVOCTRLCLK
H16
BSEL0
E15
BSEL1
D17
BSEL2
M16
RSVRD
F15
RSVRD
C15
MTYPE
A16
EXP_SLR
B15
RSVRD
C14
RSVRD
K15
RSVRD
L10
DREFSSCLKINP
M10
DREFSSCLKINN
A17
VCCAHPLL
B17
VCCAMPLL
A12
VCCADPLLA
B13
VCCADPLLB
A14
VCCA3GPLL
A13
VCCHV
E13
VCCACRTDAC
D13
VCCACRTDAC
F13
VSSACRTDAC
L29 OPTION 0 ohm
C160
X_C0.22U16Y
7
V_1P5_CORE VCC_DDR
AD9
AD8
AD7
AD6
AD5
AD4
AD3
AD2
AD1
AC10
AC9
AC8
AC7
VCC
VTT
E22
V_FSB_VTT5,6,8,18,27
VCC
VCC
VTT
VTT
E19
E21
E20
I=45mA
C148
C0.1U25Y
I=60mA
C151
C0.1U25Y
AC6
VCC
VCC
VCC
VCC
VTT
VTT
VTT
VTT
D22
D21
D20
D19
AD10
VCC
VCC
VCC
VCC
VTT
VTT
VTT
G22
H22
G21
VCCA_HPLL
C150
X_C10U10Y0805
VCCA_MPLL
C149
X_C10U10Y0805
VCC
VCC
VCC
VTT
VTT
VTT
F22
F21
F20
6
AB4
AB9
AB8
AB7
AB6
AB5
AB3
AB2
AB1
W18
VCC
VCC
VCC
VCC
VTT
VTT
VTT
A21
A20
A19
V_1P5_CORE
V_1P5_CORE
V19
VCC
VCC
VCC
VCC
VSSNCTF
VSSNCTF
VSSNCTF
AC25
AB25
AA25
AC2
AC1
AB10
AC5
AC4
AC3
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VTT
VTT
VTT
VTT
VTT
VTT
C20
C19
VTT
VTT
B21
B22
V_FSB_VTT
VTT
B20
B19
A22
VTT
C22
C21
V17
VCC
VSSNCTF
AA11
U18
VCC
VSSNCTF
VSSNCTF
Y25
Y18
AR26
AR33
AR31
VCCSM
VCCSM
VCCSM
VSSNCTF
VSSNCTF
VSSNCTF
VSSNCTF
Y11
W25
W11
V25
CP11 X_COPPER
CP10 X_COPPER
AP28
AR22
AR18
AR14
AR10
AP24
AP20
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VSSNCTF
VSSNCTF
VSSNCTF
VSSNCTF
VSSNCTF
VSSNCTF
VSSNCTF
V20
V16
V11
U25
U11
T25
T18
L10 X_0R0805
L9 X_0R0805
AP16
T11
5
AM28
AM26
AM25
AM23
AN35
AM32
AM22
AM20
AM19
AM11
AM10
AK35
AM17
AM16
AM14
AP12
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VSSNCTF
VSSNCTF
VSSNCTF
VSSNCTF
VSSNCTF
VSSNCTF
VSSNCTF
R25
R11
P25
P11
N25
AD25
AM13
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VSSNCTF
VSSNCTF
VSSNCTF
VSSNCTF
VSSNCTF
VSSNCTF
VSSNCTF
VSSNCTF
VSSNCTF
VSSNCTF
AA19
N17
N19
VSSNCTF
P16
P18
P20
R17
VCCA_DPLLA
C177
X_C10U10Y0805
C172
X_C10U10Y0805
R19
N11
M11
AA15
AA17
4
V_1P5_PCIEXPRESS
Y9Y8Y7Y6Y5Y4Y3Y2Y1W9W8W7W6W4W3W2W1
VCC3G
VCC3G
VCC3G
VCC3G
VCC3G
VCC3G
VCC3G
VCC3G
VCC3G
VCC3G
VCC3G
VCC3G
VCC3G
VCC3G
VCC3G
VCC3G
VCC3G
CRTDDCDATA
VSSNCTF
VSSNCTF
VSSNCTF
VSSNCTF
VSSNCTF
VSSNCTF
VSSNCTF
VSSNCTF
VSSNCTF
VSSNCTF
R21
T22
U15
VSSNCTF
U21
U23
V22
W15
W21
W23
Y22
(INTEL-915P-B1)
I=55mA
C171
C0.1U25Y
I=55mA
C170
C0.1U25Y
V_1P5_CORE
EXPATXP0
EXPATXN0
EXPATXP1
EXPATXN1
EXPATXP2
EXPATXN2
EXPATXP3
EXPATXN3
EXPATXP4
EXPATXN4
EXPATXP5
EXPATXN5
EXPATXP6
EXPATXN6
EXPATXP7
EXPATXN7
EXPATXP8
EXPATXN8
EXPATXP9
EXPATXN9
EXPATXP10
EXPATXN10
EXPATXP11
EXPATXN11
EXPATXP12
EXPATXN12
EXPATXP13
EXPATXN13
EXPATXP14
EXPATXN14
EXPATXP15
EXPATXN15
DMI TXP0
DMI TXN0
DMI TXP1
DMI TXN1
DMI TXP2
DMI TXN2
DMI TXP3
DMI TXN3
EXPACOMPO
EXPACOMPI
CRTHSYNC
CRTVSYNC
CRTRED
CRTGREEN
CRTBLUE
CRTREDB
CRTGREENB
CTRBLUEB
CRTDDCCLK
DREFCLKINP
DREFCLKINN
CRTIREF
PMEXTTS
PMBMBUSY#
TESTIN#
MCHDETECT
C10
C9
A9
A8
C8
C7
A7
A6
C6
C5
C2
D2
E3
F3
F1
G1
G3
H3
H1
J1
J3
K3
K1
L1
L3
M3
M1
N1
N3
P3
P1
R1
R3
T3
T1
U1
U3
V3
V5
W5
Y10
W10
E12
D12
F14
D14
H14
G14
E14
J14
L14
M15
M13
M12
A15
K16
G16
R35
A35
V_1P5_CORE
3
R148 24.9R1%
EXP_A_TXP_0
EXP_A_TXN_0
EXP_A_TXP_1
EXP_A_TXN_1
EXP_A_TXP_2
EXP_A_TXN_2
EXP_A_TXP_3
EXP_A_TXN_3
EXP_A_TXP_4
EXP_A_TXN_4
EXP_A_TXP_5
EXP_A_TXN_5
EXP_A_TXP_6
EXP_A_TXN_6
EXP_A_TXP_7
EXP_A_TXN_7
EXP_A_TXP_8
EXP_A_TXN_8
EXP_A_TXP_9
EXP_A_TXN_9
EXP_A_TXP_10
EXP_A_TXN_10
EXP_A_TXP_11
EXP_A_TXN_11
EXP_A_TXP_12
EXP_A_TXN_12
EXP_A_TXP_13
EXP_A_TXN_13
EXP_A_TXP_14
EXP_A_TXN_14
EXP_A_TXP_15
EXP_A_TXN_15
DMI_MTP_IRP_0
DMI_MTN_IRN_0
DMI_MTP_IRP_1
DMI_MTN_IRN_1
DMI_MTP_IRP_2
DMI_MTN_IRN_2
DMI_MTP_IRP_3
DMI_MTN_IRN_3
GRCOMP
HSYNC
VSYNC
VGA_RED
VGA_GREEN
VGA_BLUE
MCH_DDC_DATA
MCH_DDC_CLK
CK_96M_DREF_NB
CK_96M_DREF#_NB
DACREFSET
R140 X_10KR
EXTTS
915P 3/16 Check R131
CP13 X_COPPER
L11 X_0R0805
L7 1U500m_0805
ANALOG FILTERS
GRCOMP
EXP_A_TXP_0 22
EXP_A_TXN_0 22
EXP_A_TXP_1 22
EXP_A_TXN_1 22
EXP_A_TXP_2 22
EXP_A_TXN_2 22
EXP_A_TXP_3 22
EXP_A_TXN_3 22
EXP_A_TXP_4 22
EXP_A_TXN_4 22
EXP_A_TXP_5 22
EXP_A_TXN_5 22
EXP_A_TXP_6 22
EXP_A_TXN_6 22
EXP_A_TXP_7 22
EXP_A_TXN_7 22
EXP_A_TXP_8 22
EXP_A_TXN_8 22
EXP_A_TXP_9 22
EXP_A_TXN_9 22
EXP_A_TXP_10 22
EXP_A_TXN_10 22
EXP_A_TXP_11 22
EXP_A_TXN_11 22
EXP_A_TXP_12 22
EXP_A_TXN_12 22
EXP_A_TXP_13 22
EXP_A_TXN_13 22
EXP_A_TXP_14 22
EXP_A_TXN_14 22
EXP_A_TXP_15 22
EXP_A_TXN_15 22
DMI_MTP_IRP_0 16
DMI_MTN_IRN_0 16
DMI_MTP_IRP_1 16
DMI_MTN_IRN_1 16
DMI_MTP_IRP_2 16
DMI_MTN_IRN_2 16
DMI_MTP_IRP_3 16
DMI_MTN_IRN_3 16
HSYNC 25
VSYNC 25
VGA_RED 25
VGA_GREEN 25
VGA_BLUE 25
MCH_DDC_DATA 25
MCH_DDC_CLK 25
CK_96M_DREF_NB 19
CK_96M_DREF#_NB 19
R131 X_255R1%
V_2P5_MCH
+
CT2
X__CD100U16EL5
VCCA_GPLL_RVCCA_DPLLB
915G Stuff
915P X
V_1P5_PCIEXPRESS
C198
C184 C10U10Y0805
R132 1R1%
R139 1R1%
915G X
915P
Stuff
C10U10Y0805
VCCA_GPLL
C162
X_C10U10Y0805
2
VCC_DDR VCC_DDR
C159 C1U16Y0805
C174 C1U16Y0805
C143 C1U16Y0805
C122 C1U16Y0805
915P 3/16 Check
VGA_RED
VGA_GREEN
VGA_BLUE
HSYNC
VSYNC
MCH_DDC_DATA
MCH_DDC_CLK
V_FSB_VTT
H_FSBSEL15,6,19
H_FSBSEL25,6,19
H_FSBSEL05,6,19
BSEL
2
0
1
0
0
0
133 MHZ (533)
0
0
1
200 MHZ (800)
0
1
0
I=45mA
C161
C0.1U25Y
R435 _56R-LF
R436 _56R-LF
R437 _56R-LF
R482 _56R0402
R483 _56R0402
R484 _56R0402
R485 _56R0402
C134
X_C0.1U25Y
H_FSBSEL1
H_FSBSEL2
H_FSBSEL0
TABLE
PSB FREQUENCY
RESERVED
1
C138 C1U16Y0805
C166 C1U16Y0805
C124 C1U16Y0805
C121 C1U16Y0805
V_2P5_MCH
C146
C139
C0.1U25Y
X_C0.1U25Y
BSEL1
R87
RN27
7 8
5 6
3 4
1 2
8P4R-10KR
X_2.49KR1%
BSEL2
R88
X_2.49KR1%
BSEL0
R89
X_2.49KR1%
V_2P5_MCH
L8
X_0.1U220m
CP9 X_COPPER
8
7
6
5
4
V_2P5_DAC_FILTERED
+
CT1
X__CD100U16EL5
C167
C0.1U25Y
3
C169
C0.01U50X
MSI
Title
Size Document Number Rev
Date: Sheet
2
MICRO-STAR INT'L CO.,LTD.
Intel Grantsdale PCI-Express & RBG Signals
MS-7140
of
10 32Monday, April 11, 2005
1
20
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