MSI MS-7137 Schematics
1
2
3
4
5
MS-7137
Title
A A
B B
COVER SHEET
BLOCK DIAGRAM
Intel LGA775
Intel Grantsdale
ICH6
ICS954119 Gen. & FWH
LPC I/O - W83627THF
Azalia Audio - ALC880
82541PI/GI or 82562EZ & RJ45 CONNECTOR
DDR DIMM 1 & 2
DDR Termination Resistors
CH7307 & DVI CONNECTOR
Version 1.2
Page
1
2
3 , 4 , 5
6 , 7 , 8 , 9
10,11,12
13
14
15
16
17
18
19
PCI-E X1 + PCI Slot 20
VIA-6307 IEEE1394 Controller
USB CONNECTORS
ATX ,Front Panel
MS7 ACPI Controller
21
22
23
24
25VRM10.1 Intersil 6565 3Phase
CH7021 & TV-OUT CONNECTORS
C C
SATA1,2 , IDE1& Fan control 27
VGA Connector
MANUAL PARTS
MANUAL PARTS
POWER MAP
Clock Distribution Diagram
HISTORY
PCI Routing Table
26
28
29
30
31
32
33
08/12/2005
Intel (R) Grantsdale (GMCH) + ICH6 Chipset
Intel Tejas & Prescott LGA775 Processor
CPU:
2005 Mainstream CPU(95W / 75% loading)
System Chipset:
Intel Grantsdale - 915G (North Bridge)
Intel ICH6 (South Bridge)
On Board Chipset:
BIOS -- FWH EEPROM
Azalia Codec -- REALTEK ALC880
LPC Super I/O -- W83627THF
LAN -- 82541PI/GI or 82562EZ
IEEE1394 -- VIA VT6307
CLOCK -- ICS954119
DVI Transmitter -- Chrontel CH7307
SDTV/HDTV ENCODER -- Chrontel CH7021
Main Memory:
DDR 1 * 2 (Max 2GB)
Expansion Slots:
PCI EXPRESS X1 + PCI 2.3 SLOT * 1
Intersil PWM:
Controller: HIP6565 3 Phase
Driver: HIP6614ACB * 1
Driver: HIP6612ACB * 1
PCI Device
D D
PCI Slot 1(ON RISER CARD)
PCI Slot 2(ON RISER CARD)
VT6307 EEE1394
82541PI/GI or 82562EZ
1
AD17 0 B
AD19 4 D
2
INTERRUPTIDSEL REQ/GNT
CAD18 1
C3AD22
Title
COVER SHEET
Size Document Number Rev
A3
3
4
Date: Sheet of
MICRO-START INT'L CO.,LTD.
MS-7137 1.3
133Friday, October 28, 2005
5
1
2
3
4
5
VRM 10.1
A A
Intersil 6565
Intel LGA775 Processor
Block Diagram
4-Phase PWM
FSB 133/200MHz Core Clock
S-VEDIO &
TV-OUT
CH7021
CH7307DVI OUT
Analog
Video Out
B B
UltraDMA
33/66/100
IDE Primary
SATA 0~1
USB Port 0~7
SDVOC
SDVOB
RGB
SATA
USB
AC'97 / Azalia
Grantsdale
915GL
DMI
ICH6
64bit DDR
2 DDR 1
DIMM
133/166/200MHz
Modules
CO-LAYOUT
82541PI/GI(PCI BUS)
82562EZ(LCI BUS)
LCI BUS
PCI BUS
VT6307
IEEE-1394
PCI Express x1
PCI-E X1 + PCI Slot
33MHz@16.5MB/s
LPC Bus
Azalia Codec
C C
ALC880
LPC SIO
Winbond
83627THF
Flash
Keyboard
Serial port *2
Mouse
D D
Title
BLOCK DIAGRAM
Size Document Number Rev
A3
1
2
3
4
Date: Sheet of
MICRO-START INT'L CO.,LTD.
MS-7137 1.3
233Friday, October 28, 2005
5
1
2
3
4
5
VRM_SENSE_VCC
CPU SIGNAL BLOCK
U6A
DBI0#
DBI1#
DBI2#
DBI3#
EDRDY#
IERR#
MCERR#
FERR#/PBE#
STPCLK#
BINIT#
INIT#
RSP#
DBSY#
DRDY#
TRDY#
ADS#
LOCK#
BNR#
HIT#
HITM#
BPRI#
DEFER#
TDI
TDO
TMS
TRST#
TCK
THERMDA
THERMDC
THERMTRIP#
GND/SKTOCC#
PROCHOT#
IGNNE#
SMI#
A20M#
SLP#
RSVD
RESERVED0
RESERVED1
RESERVED2
RESERVED3
RESERVED4
RESERVED5
BOOTSELECT
LL_ID0
LL_ID1
BSEL0
BSEL1
BSEL2
PWRGOOD
RESET#
D63#
D62#
D61#
D60#
D59#
D58#
D57#
D56#
D55#
D54#
D53#
B15
H_D#53
H_A#[3..31]6
H_A#10
H_A#6
H_A#8
D26#
E13
H_A#12
D13
H_D#25
H_A#11
D25#
F12
H_D#24
H_A#9
U6
A9#T5A8#R4A7#M4A6#L4A5#M5A4#P6A3#
D24#
D23#
D22#
F11
E10
D10
H_D#23
H_D#21
H_D#22
H_A#7
D21#
D20#D7D19#E9D18#F9D17#F8D16#G9D15#
H_D#20
H_D#19
AD6
A22#
D35#
G18
H_A#21
AA4
E16
H_D#34
H_A#20
A21#
D34#
E15
H_D#33
H_A#19
H_A#17
H_A#18
AB6
A20#Y4A19#Y6A18#W6A17#
D33#
D32#
D31#
F15
G16
G15
H_D#32
H_D#30
H_D#31
H_A#16
H_A#14
H_A#13
H_A#15
A16#W5A15#V4A14#V5A13#U4A12#U5A11#T4A10#
D30#
D29#
D28#
D27#
F14
G14
G13
H_D#28
H_D#26
H_D#27
H_D#29
H_A#25
AF4
F20
H_A#27
AF5
A28#
D41#
E19
H_D#40
H_A#26
AB4
A27#
D40#
E18
H_D#39
AC5
A26#
D39#
F18
H_D#38
H_A#24
A25#
D38#
H_D#37
AB5
F17
H_A#23
AA5
A24#
D37#
G17
H_D#36
H_A#22
A23#
D36#
H_D#35
H_A#30
H_A#31
H_A#29
AJ6
AJ5
AH5
AH4
AG5
AG4
AG6
A35#
A34#
A33#
A32#
A31#
A30#
A29#
D52#
D51#
D50#
D49#
D48#
D47#
D46#
D45#
D44#
D43#
D42#
A14
C14
C15
D17
H_D#49
H_D#52
H_D#50
H_D#51
2
F21
E22
D20
H_D#48
E21
D22
G22
G21
H_D#42
H_D#41 H_A#28
H_D#43
H_D#47
H_D#44
H_D#45
H_D#46
A A
H_DBI#[0..3]6
H_EDRDY#6
H_IERR#4
H_FERR#4,10
H_STPCLK#10
H_INIT#10
H_DBSY#6
H_DRDY#6
H_TRDY#6
B B
VTT_OUT_RIGHT
C C
D D
VTT_OUT_RIGHT
1
H_ADS#6
H_LOCK#6
H_BNR#6
H_HIT#6
H_HITM#6
H_BPRI#6
H_DEFER#6
RN9B 8P4R-51R
3 4
RN7A 8P4R-51R
1 2
RN9A 8P4R-51R
1 2
RN7C 8P4R-51R
5 6
RN9D 8P4R-51R
7 8
CPU_TMPA27
VTIN_GND27
TRMTRIP#4,10
H_PROCHOT#4
H_IGNNE#10
ICH_H_SMI#10
H_A20M#10
H_SLP#10
C68 0.1uF
R92 X_1K
H_CPURST#4,6
H_D#[0..63]6
H_DBI#0
H_DBI#1
H_DBI#2
H_DBI#3
CPU_BOOT
LL_ID0
LL_ID025
H_BSL04,8,13
H_BSL14,8,13
H_BSL24,8,13
H_PWRGD4,10
H_TDI
H_TDO
H_TMS
H_TRST#
H_TCK
H_D#63
H_D#62
H_D#61
H_D#60
H_D#59
H_D#58
H_D#57
H_D#56
H_D#55
H_D#54
G11
D19
C20
AB2
AB3
AD3
AD1
AF1
AC1
AG1
AE1
AL1
AK1
AE8
AL2
AH2
AE6
G10
D16
A20
AA2
G29
H30
G30
G23
B22
A22
A19
B19
B21
C21
B18
A17
B16
C18
A8
F2
R3
M3
P3
H4
B2
C1
E3
D2
C3
C2
D4
E4
G8
G7
M2
N2
P2
K3
L2
N5
C9
Y1
V2
N1
H_A#5
H_D#18
3
H_A#4
H_A#3
L5
H_D#17
H_D#16
C48
X_10UF_1206
AN3
AC2
DBR#
RSVD
D14#
D13#
D12#D8D11#
B12
D11
C12
H_D#12
H_D#13
H_D#14
H_D#15
AN4
RSVD
C11
H_D#11
AN6
AJ3
AN5
VSS_SENSE
VCC_SENSE
D10#
D9#
D8#
B10
A11
A10
H_D#10
H_D#8
H_D#9
H_D#7
C49
X_10UF_1206
VRM_SENSE_VSS
VID5
VID4
AM5
AL4
AK4
AM7
AK3
VID6#
VID5#
VID7#
VID_SELECT
ITP_CLK1
ITP_CLK0
GTLREF_SEL
D7#A7D6#B7D5#B6D4#A5D3#C6D2#A4D1#C5D0#
H_D#3
H_D#2
H_D#4
H_D#1
H_D#6
H_D#5
VID0
VID3
VID2
VID1
AL6
AM3
AL5
AM2
VID4#
VID3#
VID2#
VID1#
VID0#
GTLREF0
GTLREF1
BPM5#
BPM4#
BPM3#
BPM2#
BPM1#
BPM0#
PCREQ#
REQ4#
REQ3#
REQ2#
REQ1#
REQ0#
TESTHI12
TESTHI11
TESTHI10
TESTHI9
TESTHI8
TESTHI7
TESTHI6
TESTHI5
TESTHI4
TESTHI3
TESTHI2
TESTHI1
TESTHI0
RSVD
RSVD
BCLK1#
BCLK0#
RS2#
RS1#
RS0#
AP1#
AP0#
BR0#
COMP5
COMP4
COMP3
COMP2
COMP1
COMP0
DP3#
DP2#
DP1#
DP0#
ADSTB1#
ADSTB0#
DSTBP3#
DSTBP2#
DSTBP1#
DSTBP0#
DSTBN3#
DSTBN2#
DSTBN1#
DSTBN0#
LINT1/NMI
LINT0/INTR
ZIF-SOCK775-15u
B4
H_D#0
R49 0R
R39 0R
VID[0..5] 25
AN7
H1
H2
H29
H_BPM#5
AG3
H_BPM#4
AF2
H_BPM#3
AG2
H_BPM#2
AD2
H_BPM#1
AJ1
H_BPM#0
AJ2
H_PCREQ#
G5
H_REQ#4
J6
H_REQ#3
K6
H_REQ#2
M6
H_REQ#1
J5
H_REQ#0
K4
H_TESTHI12
W2
H_TESTHI11
P1
H_TESTHI10
H5
H_TESTHI9
G4
H_TESTHI8
G3
F24
G24
G26
G27
G25
F25
W3
F26
AK6
G6
G28
F28
H_RS#2
A3
H_RS#1
F5
H_RS#0
B3
U3
U2
F3
H_COMP5
T2
H_COMP4
J2
H_COMP3
R1
H_COMP2
G2
H_COMP1
T1
H_COMP0
A13
J17
H16
H15
J16
AD5
R6
C17
G19
E12
B9
A16
G20
G12
C8
L1
K1
VCC_VRM_SENSE 25
VSS_VRM_SENSE 25
VID_SELECT
R484 62R
CPU_GTLREF0
CPU_GTLREF1
GTLREF_SEL
RN7B 8P4R-51R
RN7D 8P4R-51R
RN9C 8P4R-51R
RN4B 8P4R-51R
RN4C 8P4R-51R
R97 62R
RN15A 8P4R-62R
RN15B 8P4R-62R
RN15D 8P4R-62R
RN15C 8P4R-62R
H_TESTHI2_7
H_TESTHI1
H_TESTHI0
RSVD_AK6
RSVD_G6
TP1
TP2
R95 60.4R/1%
R102 60.4R/1%
R99 100R/1%
R113 100R/1%
R98 60.4R/1%
R147 60.4R/1%
PLACE RESISTORS OUTSIDE SOCKET
TP7
CAVITY IF NO ROOM FOR VARIABLE
TP8
RESISTOR DON'T PLACE
TP5
TP6
4
CPU_GTLREF0 4
CPU_GTLREF1 4
GTLREF_SEL 6
H_PCREQ# 6
1 2
3 4
7 8
5 6
R136 62R
R94 62R
R120 62R
R79 X_62R
R106 X_62R
CK_H_CPU# 13
CK_H_CPU 13
H_RS#[0..2] 6
H_ADSTB#1 6
H_ADSTB#0 6
H_DSTBP#3 6
H_DSTBP#2 6
H_DSTBP#1 6
H_DSTBP#0 6
H_DSTBN#3 6
H_DSTBN#2 6
H_DSTBN#1 6
H_DSTBN#0 6
H_NMI 10
H_INTR 10
RN3
Ver 1.3
VID3
VID1
VID2
VID4
VID0
VID5
8P4R-680R
1
3
5
7
R77 680R
R74 680R
2
4
6
8
VTT_OUT_RIGHT
R127
X_249R/1%
0.1uF
VCC3
C50
Ver 1.3
VTT_OUT_RIGHT
RN4A
12
34
78
56
34
56
H_REQ#[0..4] 6
VTT_OUT_LEFT
V_FSB_VTT 4,6,8,12,13,24
VTT_OUT_RIGHT 4
Ver 1.3
Title
Size Document Number Rev
A3
Date: Sheet of
H_BR#0 4,6
VTT_OUT_LEFT 4
C79
0.1uF
Intel LGA775 - Signals
MS-7137 1.3
GTLREF_SEL
Q32
X_N-2N7002_SOT23
MICRO-START INT'L CO.,LTD.
G
5
DS
333Friday, October 28, 2005
C54
0.1uF
R121
X_110R/1%
H_TESTHI0
R117
X_61.9R/1%
1
2
3
4
5
VCCP
AH27
AH26
AH25
AH22
AH21
AH19
AH18
AH15
AH14
AH12
AH11
AG9
AG8
AG30
AG29
AG28
AG27
AG26
AG25
AG22
AG21
AG19
AG18
AG15
AG14
AG12
AG11
AF9
AF8
AF22
AF21
U6B
VCCP
A A
B B
AF19
AF18
AF15
AF14
AF12
AF11
AE9
AE23
AE22
AE21
AE19
AE18
AE15
AE14
AE12
AE11
AD8
AD30
AD29
AD28
AD27
AD26
AD25
AD24
AD23
AC8
AC30
AC29
AC28
AC27
AC26
AC25
AC24
AC23
AB8
AA8
VCCP
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
Y8
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
Y25
Y26
Y27
Y28
Y29
Y30
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCCW8VCC
VCC
Y23
Y24
W28
W29
W30
W27
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
W23
W24
W25
W26
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCCU8VCCV8VCC
U25
U26
U27
U28
U29
U30
AH28
AH29
AH30
AH8
AH9
AJ11
AJ12
AJ14
AJ15
AJ18
AJ19
AJ21
AJ22
AJ25
AJ26
AJ8
AJ9
AK11
AK12
AK14
AK15
AK18
AK19
AK21
AK22
AK25
AK26
AK8
AK9
AL11
AL12
AL14
AL15
AL18
AL19
AL21
AL22
AL25
AL26
AL29
AL30
AL8
AL9
AM11
AM12
AM14
AM15
AM18
AM19
AM21
AM22
AM25
AM26
AM29
AM30
AM8
AM9
AN11
AN12
AN14
AN15
AN18
AN19
AN21
AN22
VCC
VCC
VCC
VCC
VCC
VCC
VCC
U24
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCCA
VSSA
RSVD
VCC-IOPLL
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTTPWRGD
VTT_OUT_RIGHT
VTT_OUT_LEFT
VTT_SEL
RSVD/VTT_PKGSENSE
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCCJ8VCCJ9VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCCK8VCCL8VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCCM8VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCCN8VCCP8VCCR8VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCCT8VCC
VCC
J10
J11
J12
J13
J14
J15
J18
J19
J20
J21
J22
J23
J24
J25
J26
J27
J28
J29
U23
T30
N30
N29
N28
N27
N26
N25
N24
N23
M30
M29
M28
M27
M26
M25
M24
M23
K26
K27
K28
K29
K30
T23
T24
T25
T26
T27
T28
T29
J30
K23
K24
K25
AN8
AN9
HS11HS22HS33HS4
4
AN25
AN26
AN29
AN30
H_VCCA
A23
H_VSSA
B23
D23
H_VCCA
C23
A25
A26
A27
A28
A29
A30
B25
B26
B27
B28
B29
B30
C25
C26
C27
C28
C29
C30
D25
D26
D27
D28
D29
D30
VTT_PWG
AM6
VTT_OUT_RIGHT
AA1
VTT_OUT_LEFT
J1
VTT_SEL
F27
F29
ZIF-SOCK775-15u
V_FSB_VTT
C133 10UF_1206
C120 10UF_1206
C114 X_22uF_1206
CAPS FOR FSB GENERIC
V_FSB_VTT
R133 X_1K
TEJ/PSC
0
1
RSVD
VCC3
Ver 1.3
VTT_OUT_RIGHT
GTLREF VOLTAGE SHOULD BE
0.67*VTT = 0.8V
C C
R103 124R/1%
R101
210R/1%
100
R489 10R
C75
1uF
Ver 1.3
VTT_OUT_RIGHT
GTLREF VOLTAGE SHOULD BE
0.67*VTT = 0.8V
R486 124R/1%
R487
210R/1%
100
R488 10R
C515
1uF
PLACE AT CPU END OF ROUTE
VTT_OUT_RIGHT3
VTT_OUT_LEFT3
D D
VTT_OUT_RIGHT3
VTT_OUT_RIGHT
VTT_OUT_LEFT
R78 120R
R100 100R
R114 62R
R80 62R
R139 62R
PLACE AT ICH END OF ROUTE
V_FSB_VTT3,6,8,12,13,24
V_FSB_VTT
1
R261 62R
R260 62R
H_FERR#
CPU_GTLREF0
C73
220P
CPU_GTLREF1
C516
220P
H_PROCHOT#
H_PWRGD
H_BR#0
H_CPURST#
H_IERR#
CPU_GTLREF0 3
CPU_GTLREF1 3
H_PROCHOT# 3
H_PWRGD 3,10
H_BR#0 3,6
H_CPURST# 3,6
H_IERR# 3
TRMTRIP# 3,10
H_FERR# 3,10
2
PLACE COMPONENTS AS CLOSE AS POSSIBLE TO PROCESSOR SOCKET
TRACE WIDTH TO CAPS MUST BE SMALLER THAN 12MILS
L3 X_10U100m_0805
V_FSB_VTT
L4 X_10U100m_0805
CP5
X_COPPER
VCC5_SB
R32
1K
VID_GD#24,25
FSBSEL RESISTOR CAN BE REMOVED IF ONLY TEJAS
AND CEDAR MILL ARE SUPPORTED
V_FSB_VTTTRMTRIP#
3
RN29 8P4R-470R
1uF
VTT_OUT_RIGHT
R31 1K
1
2
3
4
5
6
7
8
C100
R90
1K
H_BSL1 3 , 8 ,13
H_BSL2 3 , 8 ,13
H_BSL0 3 , 8 ,13
C108
10UF_1206
1.25V VTT_PWRGOOD
VTT_PWG
Q27
N-MMBT3904_SOT23
H_VCCA
C104
10UF_1206
H_VSSA
4
Title
Intel LGA775 - Power
Size Document Number Rev
A3
Date: Sheet of
MICRO-START INT'L CO.,LTD.
MS-7137 1.3
433Friday, October 28, 2005
5
1
2
3
4
5
For FC10 signal Ver 1.3
AC3
AC6
AC7
AD4
AD7
A12
A15
A18
A21
A24
AA3
AA6
AA7
AB1
AB7
AE2
MCH_GTLREF
C519
0.1uF
AC4
AE3
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
AE4
RSVD
RSVD
RSVD
VSS
VSS
VSS
VSS
AE5
AE7
AF10
AE29
AE30
U6C
A2
A6
A9
TP10
D14
RSVDD1RSVD
VSS
VSS
AF13
E23
RSVD
VSS
AF16
E24
RSVD
RSVDE5RSVDE6RSVDE7RSVD
VSS
VSS
AF17
AF20
TP11
VSS
AF23
TP9
TP3
F23
B13
RSVDF6RSVD
VSS
VSS
VSS
VSS
AF24
AF25
AF26
AF27
AF28
A A
B B
MCH_GTLREF6
AA23
AA24
AA25
AA26
AA27
AA28
AA29
AA30
AB23
AB24
AB25
AB26
AB27
AB28
AB29
AB30
AE10
AE13
AE16
AE17
AE20
C C
AE24
AE25
AE26
AE27
AE28
For MSID0/MSID1 signal Ver 1.3
R485 62R
R490 62R
Y3
RSVDJ3RSVDN4RSVDP5RSVDV1RSVDW1RSVD
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
AF3
AF6
AF7
AF29
AF30
AG10
AG13
AG16
AG17
VSSY7VSSY5VSSY2VSSW7VSSW4VSSV7VSSV6VSS
VSS
VSS
VSS
VSS
VSS
VSS
AH1
AG7
AH10
AG20
AG23
AG24
H28
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSSH3VSSH6VSSH7VSSH8VSSH9VSSJ4VSSJ7VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSSB1VSS
VSS
B11
AN1
AN2
AN10
AN13
AN16
AN17
AN20
AN23
B14
AN24
AN27
AN28
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
H14
H13
H12
H11
H10
G1
F7
F4
F22
F19
F16
F13
F10
E8
E29
E28
E27
E26
E25
E20
E2
E17
E14
E11
D9
D6
D5
D3
D24
D21
D18
D15
D12
C7
C4
C24
C22
C19
C16
C13
C10
B8
B5
B24
B20
B17
ZIF-SOCK775-15u
VSS
VSS
K2
L25
L24
L23
K5
VSS
VSS
VSS
VSSK7VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
AM16
AM17
AM4
AM20
AM23
AM24
AM27
AM28
V30
V29
V28
V27
V26
V25
V24
V23
VSSV3VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSSU7VSSU1VSST7VSST6VSST3VSSR7VSSR5VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
AH3
AH6
AH7
AJ10
AJ13
AJ16
AH13
AH16
AH17
AH20
AH23
AH24
AJ17
VSS
R30
R29
R28
R27
R26
R25
R24
R23
P30
P29
P28
P27
P26
P25
P24
P23
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSSR2VSSP7VSSP4VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSSN7VSSN6VSSN3VSSM7VSSM1VSSL7VSSL6VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
AJ4
AJ7
AJ20
AJ23
AJ24
AJ27
AJ28
AJ29
AJ30
AK2
AK10
AK13
AK16
AK17
AK20
AK23
AK5
AK7
AL10
AL13
AK24
AK27
AK28
AK29
AL16
AK30
VSS
L30
L29
L28
L27
L26
VSSL3VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
AL3
AL7
AL17
AL20
AL23
AM1
AL24
AL27
AL28
AM10
AM13
H17
H18
H19
H20
H21
H22
H23
H24
H25
H26
H27
D D
Title
Intel LGA775- GND
Size Document Number Rev
A3
1
2
3
4
Date: Sheet of
MICRO-START INT'L CO.,LTD.
MS-7137 1.3
533Friday, October 28, 2005
5
1
AC11
AB11
Y20
Y19
Y17
H29
K29
J29
G30
G32
K30
L29
M30
L31
L28
J28
K27
K33
M28
R29
L26
N26
M26
N31
P26
N29
P28
R28
N33
T27
T31
U28
T26
T29
J31
N27
E31
R33
E30
M35
L33
M31
F33
E32
H31
G31
F31
L34
N35
J35
N34
L35
M32
P33
K34
P34
J32
M23
M22
AG7
G24
AF7
M14
B23
D24
A23
A24
HXSCOMP
U8A
HA3#
HA4#
HA5#
HA6#
HA7#
HA8#
HA9#
HA10#
HA11#
HA12#
HA13#
HA14#
HA15#
HA16#
HA17#
HA18#
HA19#
HA20#
HA21#
HA22#
HA23#
HA24#
HA25#
HA26#
HA27#
HA28#
HA29#
HA30#
HA31#
HAD_STB0#
HAD_STB1#
HPCREQ#
BREQ0#
BPRI#
BNR#
HLOCK#
ADS#
HREQ0#
HREQ1#
HREQ2#
HREQ3#
HREQ4#
HIT#
HITM#
DEFER#
HTRDY#
DBSY#
DRDY#
HEDRDY#
RS0#
RS1#
RS2#
HCLKP
HCLKN
PWROK
CPURST#
RSTIN#
ICH_SYNC#
HDRCOMP
HDSCOMP
HDSWING
HDVREF
H_A#[3..31]3
A A
H_ADSTB#03
H_ADSTB#13
H_REQ#[0..4]3
H_RS#[0..2]3
R221
20R1%
MCH_GTLREF5
ICH_SYNC#11
R266
8.2K
1
H_PCREQ#3
H_BR#03,4
H_BPRI#3
H_BNR#3
H_LOCK#3
H_ADS#3
H_HIT#3
H_HITM#3
H_DEFER#3
H_TRDY#3
H_DBSY#3
H_DRDY#3
H_EDRDY#3
CK_H_MCH13
CK_H_MCH#13
H_CPURST#3,4
PLTRST#10,13,24
R216
60.4R/1%
PWRGD11,24
B B
C C
Ver 1.3
V_2P5_MCH
D D
V_FSB_VTT3,4,8,12,13,24
H_A#3 H_D#0
H_A#4
H_A#5
H_A#6
H_A#7
H_A#8
H_A#9
H_A#10
H_A#11
H_A#12
H_A#13
H_A#14
H_A#15
H_A#16
H_A#17
H_A#18
H_A#19
H_A#20
H_A#21
H_A#22
H_A#23
H_A#24
H_A#25
H_A#26
H_A#27
H_A#28
H_A#29
H_A#30
H_A#31
H_REQ#0
H_REQ#1
H_REQ#2
H_REQ#3
H_REQ#4
H_RS#0
H_RS#1
H_RS#2
ICH_SYNC#
HXRCOMP
HXSCOMP
HXSWING
MCH_GTLREF
ICH_SYNC#
C163
X_2.2P
Y16
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
RSVRD
RSVRD
RSVRD
RSVRD
AJ21
AL21
AK21
AK24
GTLREF_SEL3
2
W20
W16
U20
U16
T20
T19
T17
T16
AA13
AA14
AA16
AA18
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
RSVRD
RSVRD
RSVRD
RSVRD
RSVRD
RSVRD
RSVRD
RSVRD
RSVRD
RSVRD
RSVRD
RSVRD
V31
V30
V32
Y30
AJ24
AL20
AK18
U30
AJ23
AJ18
AJ20
R128
X_10K
When install this circuit,must
change R169 to 100R,R162 to 210R.
AB29
+12V
VCCP
2
AA20
AA21
AA22
AA23
VCCNCTF
VCCNCTF
VCCNCTF
RSVRD
RSVRD
RSVRD
R31
R30
AA31
AA30
R146
X_619R/1%
V_1P5_CORE
AA24
AB13
AB14
AB15
AB16
AB17
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
RSVRD
RSVRD
RSVRD
RSVRD
RSVRD
RSVRD
RSVRD
AC12
AC13
AC14
AC15
AC16
AC17
V_FSB_VTT
X_N-2N7002_SOT23
D S
G
3
AB18
AB19
AB20
AB21
AB22
AB23
AB24
N13
N14
N15
N16
N18
N20
N21
P13
P14
P15
P17
P19
P21
P22
R13
R14
R15
R16
R18
R20
R22
R23
T13
T14
T15
T21
T23
T24
U13
U14
U22
U24
V13
V14
V15
V21
V23
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
RSVRD
RSVRD
RSVRD
RSVRD
RSVRD
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
J12
T12
P12NCP23NCP24
AC18
N12NCN22NCN23NCN24
AC19
AC20
AC21
AC22
R212
49.9R/1%Q33
MCH_GTLREF
R200
100R/1%
V12
U12
W12
Y12
AL28
AA12NCAB12
AC23NCAC24NCAN19
R12NCR24
GTLREF VOLTAGE SHOULD BE
0.67*VTT=0.8V
100 OHM OVER 210 RESISTORS
C154
0.1uF
C155
220P
L19NCL12
P30
K12
AG6
AJ14
AH24
AD30
H17NCH15NCH12
V_FSB_VTT
G12
F24NCF12
E16
C16
AR35NCAR34
CAPS SHOULD BE PLACED NEAR MCH PIN
3
4
V24
W13
W14
W22
W24
Y13
Y14
Y15
Y21
Y23
Y24
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
HD_STBP0#
HD_STBN0#
HD_STBP1#
HD_STBN1#
HD_STBP2#
HD_STBN2#
HD_STBP3#
NC
NC
NCB1NC
B35
A34
HD_STBN3#
NC
Intel Grantsdale(915G)
A2
NC
NC
NC
AP1
AR2NCAR1
AP35
HD_SWING VOLTAGE "10 MIL TRACE , 7 MIL
SPACE" HD_SWING S/B 1/4*VTT +/- 2%
HD0#
HD1#
HD2#
HD3#
HD4#
HD5#
HD6#
HD7#
HD8#
HD9#
HD10#
HD11#
HD12#
HD13#
HD14#
HD15#
HD16#
HD17#
HD18#
HD19#
HD20#
HD21#
HD22#
HD23#
HD24#
HD25#
HD26#
HD27#
HD28#
HD29#
HD30#
HD31#
HD32#
HD33#
HD34#
HD35#
HD36#
HD37#
HD38#
HD39#
HD40#
HD41#
HD42#
HD43#
HD44#
HD45#
HD46#
HD47#
HD48#
HD49#
HD50#
HD51#
HD52#
HD53#
HD54#
HD55#
HD56#
HD57#
HD58#
HD59#
HD60#
HD61#
HD62#
HD63#
DINV_0#
DINV_1#
DINV_2#
DINV_3#
J33
H33
J34
G35
H35
G34
F34
G33
D34
C33
D33
B34
C34
B33
C32
B32
E28
C30
D29
H28
G29
J27
F28
F27
E27
E25
G25
J25
K25
L25
L23
K23
J22
J24
K22
J21
M21
H23
M19
K21
H20
H19
M18
K18
K17
G18
H18
F17
A25
C27
C31
B30
B31
A31
B27
A29
C28
A28
C25
C26
D27
A27
E24
B25
E34
J26
K19
B26
E33
E35
H26
F26
J19
F19
B29
C29
H_D#1
H_D#2
H_D#3
H_D#4
H_D#5
H_D#6
H_D#7
H_D#8
H_D#9
H_D#10
H_D#11
H_D#12
H_D#13
H_D#14
H_D#15
H_D#16
H_D#17
H_D#18
H_D#19
H_D#20
H_D#21
H_D#22
H_D#23
H_D#24
H_D#25
H_D#26
H_D#27
H_D#28
H_D#29
H_D#30
H_D#31
H_D#32
H_D#33
H_D#34
H_D#35
H_D#36
H_D#37
H_D#38
H_D#39
H_D#40
H_D#41
H_D#42
H_D#43
H_D#44
H_D#45
H_D#46
H_D#47
H_D#48
H_D#49
H_D#50
H_D#51
H_D#52
H_D#53
H_D#54
H_D#55
H_D#56
H_D#57
H_D#58
H_D#59
H_D#60
H_D#61
H_D#62
H_D#63
PLACE DIVIDER RESISTOR NEAR VTT
R219
301R/1%
R220
100R/1%
4
HXSWING
C164
0.01uF
Title
Size Document Number Rev
A3
Date: Sheet of
5
H_D#[0..63] 3
H_DBI#0
H_DBI#1
H_DBI#2
H_DBI#3
H_DSTBP#0 3
H_DSTBN#0 3
H_DSTBP#1 3
H_DSTBN#1 3
H_DSTBP#2 3
H_DSTBN#2 3
H_DSTBP#3 3
H_DSTBN#3 3
H_DBI#[0..3] 3
MICRO-START INT'L CO.,LTD.
Intel Grantsdale - CPU
MS-7137 1.3
5
633Friday, October 28, 2005
1
DATA_A[0..63]17,18
C239
0.1uF
VCC_DDR
AM34
AL35
AK34
AL33
AN29
AL34
AP31
AN22
AP22
AN21
AP21
AM21
AP19
AR20
AN16
AN18
AM15
AN23
AP15
AP13
AB33
AP33
AR24
AR28
AR29
AN28
AP26
AR23
AG1
AG2
AL3
AL2
AP7
AR7
AF17
AG17
AM30
AL29
AG35
AG33
AA34
AA35
U34
U35
AM24
AN25
AN2
AN3
AB34
AC33
AP25
AN26
AM2
AM3
AC35
AC34
AN31
AH15
AE16
AJ12
AK12
AE7
AG8
AG4
AE5
AF5
U8B
SACS0#
SACS1#
SACS2#
SACS3#
SARAS#
SACAS#
SAWE#
SAMA0
SAMA1
SAMA2
SAMA3
SAMA4
SAMA5
SAMA6
SAMA7
SAMA8
SAMA9
SAMA10
SAMA11
SAMA12
SAMA13
RSV
RSV
RSV
RSV
SABA0
SABA1
RSV
SADQS0
RSV
SADQS1
RSV
SADQS2
RSV
SADQS3
RSV
SADQS4
RSV
SADQS5
RSV
SADQS6
RSV
SADQS7
RSV
SACK0
SACK0#
SACK1
SACK1#
SACK2
SACK2#
SACK3
SACK3#
SACK4
SACK4#
SACK5
SACK5#
RSV
RSV_TP1
RSV_TP0
SMXSLEWIN
SMXSLEWOUT
SMVREF0
SRCOMP1
SRCOMP0
RSV
RSV
DATA_B[0..63]17,18
R254 80.6R1%R258 80.6R1%
C236
0.1uF
A A
MAA_A[0..13]17,18
B B
DQS_A[0..7]17,18
C C
D D
SCS_A#017,18
SCS_A#117,18
RAS_A#17,18
CAS_A#17,18
P_DDR0_A17
N_DDR0_A17
P_DDR1_A17
N_DDR1_A17
P_DDR2_A17
N_DDR2_A17
PLACE 0.1UF CAP CLOSE TO MCH
1
SCS_A#0
SCS_A#1
RAS_A#
CAS_A#
WE_A#17,18
SBS_A017,18
SBS_A117,18
WE_A#
MAA_A0
MAA_A1
MAA_A2
MAA_A3
MAA_A4
MAA_A5
MAA_A6
MAA_A7
MAA_A8
MAA_A9
MAA_A10
MAA_A11
MAA_A12
SBS_A0
SBS_A1
DQS_A0
DQS_A1
DQS_A2
DQS_A3
DQS_A4
DQS_A5
DQS_A6
DQS_A7
P_DDR0_A
N_DDR0_A
P_DDR1_A
N_DDR1_A
P_DDR2_A
N_DDR2_A
SM_XSLEWIN
MCH_VREF_AB
SMPCOMP_P
SMPCOMP_N
MCH_VREF_AB
SMPCOMP_P MCH_VREF_ABSMPCOMP_N
2
DATA_A1
DATA_A0
AE3
SADQ0
AF3
DATA_A7
DATA_A8
DATA_A3
DATA_A4
DATA_A2
DATA_A6
DATA_A5
AH2
AJ2
AE2
AE1
AG3
AH3
SADQ1
SADQ2
SADQ3
SADQ4
SADQ5
SADQ6
SADQ7
SBDQ0
SBDQ1
SBDQ2
SBDQ3
SBDQ4
SBDQ5
AJ6
AL5
AH7
AN6
AH4
AG9
DATA_B3
DATA_B0
DATA_B2
DATA_B1
DATA_B4
DATA_B5
DATA_B6
2
AJ1
AM5
SADQ8
SBDQ6
DATA_A9
AK2
SADQ9
SBDQ7
AL6
DATA_B7
DATA_A10
DATA_A11
AN4
AP4
SADQ10
SADQ11
SBDQ8
SBDQ9
AJ7
AL7
DATA_B9
DATA_B8
DATA_A12
DATA_A13
AJ3
AK3
SADQ12
SADQ13
SBDQ10
SBDQ11
AF11
AE11
DATA_B11
DATA_B10
VCC_DDR
DATA_A14
DATA_A15
DATA_A17
DATA_A16
AP2
AP3
AP5
AR5
SADQ14
SADQ15
SADQ16
SADQ17
SBDQ12
SBDQ13
SBDQ14
SBDQ15
AJ8
AL8
AG10
AG11
DATA_B12
DATA_B13
DATA_B15
DATA_B14
R253 1K/1%
DATA_A19
DATA_A18
AN8
AP9
SADQ18
SADQ19
SBDQ16
SBDQ17
AF13
AE13
DATA_B16
DATA_B17
DATA_A20
DATA_B18
DATA_A21
AN5
SADQ20
SBDQ18
AG14
DATA_B19
DATA_A22
AP6
SADQ21
SBDQ19
AD14
DATA_B20
DATA_A23
AR8
SADQ22
SBDQ20
AD12
DATA_B21
DATA_A24
AN9
SADQ23
SBDQ21
AH12
DATA_B22
DATA_A25
AK16
SADQ24
SBDQ22
AF14
DATA_B23
DATA_A26
AL17
SADQ25
SBDQ23
AD15
DATA_B24
DATA_A27
AD17
SADQ26
SBDQ24
AD18
DATA_B25
R257
DATA_A28
AF19
AF16
SADQ27
SBDQ25
AK19
AE22
DATA_B26
1K/1%
DATA_A29
AJ17
SADQ28
SADQ29
SBDQ26
SBDQ27
AH21
DATA_B27
DATA_A30
DATA_A31
AE19
AH18
SADQ30
SADQ31
SBDQ28
SBDQ29
AL18
AH19
DATA_B29
DATA_B28
DATA_A32
DATA_A33
AH27
AK27
SADQ32
SADQ33
SBDQ30
SBDQ31
AF22
AD21
DATA_B31
DATA_B30
DATA_A34
DATA_A35
AN30
AK31
SADQ34
SADQ35
SBDQ32
SBDQ33
AF23
AF25
DATA_B32
DATA_B33
DATA_A36
DATA_A37
AL27
AJ28
SADQ36
SBDQ34
AJ26
AL25
DATA_B35
DATA_B34
3
DATA_A38
DATA_A39
AL30
SADQ37
SADQ38
SBDQ35
SBDQ36
AD23
DATA_B36
DATA_B37
3
DATA_A40
AL31
SADQ39
SBDQ37
AF24
DATA_B38
DATA_A41
AJ34
SADQ40
SBDQ38
AJ25
DATA_B39
DATA_A42
AH35
SADQ41
SBDQ39
AL26
DATA_B40
DATA_A43
AG32
SADQ42
SBDQ40
AJ29
DATA_B41
DATA_A44
AF34
SADQ43
SBDQ41
AJ31
DATA_B42
DATA_A45
AJ33
SADQ44
SBDQ42
AG30
DATA_B43
DATA_A46
AH33
SADQ45
SBDQ43
AG31
DATA_B44
DATA_A47
AF33
SADQ46
SBDQ44
AK33
DATA_B45
DATA_A48
AE33
SADQ47
SBDQ45
AK32
DATA_B46
DATA_A49
AE35
SADQ48
SBDQ46
AG27
DATA_B47
DATA_A50
AE34
SADQ49
SBDQ47
AF28
DATA_B48
DATA_A51
Y33
SADQ50
SBDQ48
AE31
DATA_B49
DATA_A52
W34
SADQ51
SBDQ49
AF27
DATA_B50
DATA_A53
AD31
SADQ52
SBDQ50
AB27
DATA_B51
DQM_A[0..7]17,18
DATA_A54
AD35
SADQ53
SBDQ51
AB26
DATA_B52
SCKE_A117,18
SCKE_A017,18
DATA_A55
AA32
SADQ54
SBDQ52
AE29
DATA_B53
DATA_A56
Y35
SADQ55
SBDQ53
AE27
DATA_B54
DQM_B[0..7]17,18
DATA_A57
V34
SADQ56
SBDQ54
AC28
DATA_B55
SCKE_B017,18
SCKE_B117,18
DATA_A58
V33
SADQ57
SBDQ55
AC26
DATA_B56
DATA_A59
R32
SADQ58
SBDQ56
AA29
DATA_B57
DATA_A60
R34
SADQ59
SBDQ57
W29
DATA_B58
DATA_A61
W35
SADQ60
SBDQ58
U26
DATA_B59
DATA_A62
W33
SADQ61
SBDQ59
V29
DATA_B60
DATA_A63
T33
SADQ62
SBDQ60
Y26
DATA_B61
T35
SADQ63
SBDQ61
AA28
DATA_B62
SCKE_A0
AL12
SACKE0
SBDQ62
SBDQ63
V28
W26
DATA_B63
SCKE_A1
AN11
AP11
AR11
SACKE1
SACKE2
SBCKE0
AM9
AN10
SCKE_B0
SCKE_B1
SACKE3
SBCKE1
4
DQM_A6
DQM_A2
DQM_A4
DQM_A1
DQM_A0
AF2
SADM0
SBCKE2
SBCKE3
AR9
AP10
4
DQM_A7
DQM_A3
DQM_A5
AL1
AN7
AH16
AK29
AG34
AA33
U33
SBCS0#
SBCS1#
SADM4
SADM5
SADM6
SBCS2#
SADM7
SBCS3#
SBRAS#
SBCAS#
SBWE#
SBMA0
SBMA1
SBMA2
SBMA3
SBMA4
SBMA5
SBMA6
SBMA7
SBMA8
SBMA9
SBMA10
SBMA11
SBMA12
SBMA13
RSV
RSV
RSV
RSV
SBBA0
SBBA1
RSV
SBDQS0
RSV
SBDQS1
RSV
SBDQS2
RSV
SBDQS3
RSV
SBDQS4
RSV
SBDQS5
RSV
SBDQS6
RSV
SBDQS7
RSV
SBCK0
SBCK0#
SBCK1
SBCK1#
SBCK2
SBCK2#
SBCK3
SBCK3#
SBCK4
SBCK4#
SBCK5
SBCK5#
RSV
RSV_TP3
RSV_TP2
SMYSLEWIN
SMYSLEWOUT
SADM1
SADM2
SADM3
SMVREF1
SBDM0
SBDM1
SBDM2
SBDM3
SBDM4
SBDM5
SBDM6
SBDM7
AH31
AD24
AG24
DQM_B5
DQM_B6
DQM_B4
Intel Grantsdale(915G)
W31
DQM_B7
AJ5
AH9
AH13
AG20
DQM_B3
DQM_B1
DQM_B2
DQM_B0
SCS_B#0
AP34
SCS_B#1
AN34
AN33
AM33
RAS_B#
AP27
CAS_B#
AN27
WE_B#
AR27
MAA_B0
AM18
MAA_B1
AP18
MAA_B2
AN17
MAA_B3
AR16
MAA_B4
AR15
MAA_B5
AN15
MAA_B6
AP17
MAA_B7
AL15
MAA_B8
AP14
MAA_B9
AN13
MAA_B10
AN20
MAA_B11
AR12
MAA_B12
AM12
MAA_B13MAA_A13
AD32
AN32
AP29
AP30
AP32
SBS_B0
AM27
SBS_B1
AR19
AP23
DQS_B0
AK5
AL4
DQS_B1
AK10
AH10
DQS_B2
AK13
AL14
DQS_B3
AD20
AF20
DQS_B4
AH25
AG26
DQS_B5
AH28
AH30
DQS_B6
AB31
AC30
DQS_B7
W27
Y28
P_DDR0_B
AH22
N_DDR0_B
AG23
P_DDR1_B
AL11
N_DDR1_B
AJ11
P_DDR2_B
AE26
N_DDR2_B
AE25
AL23
AK22
AK9
AL9
AD29
AD28
AL24
AK15
AN14
SM_YSLEWIN
AF9
AE10
MCH_VREF_AB
AE8
PLACE 0.1UF CAP CLOSE TO MCH
Title
Intel Grantsdale - Memory
Size Document Number Rev
A3
Date: Sheet of
SBS_B0 17,18
SBS_B1 17,18
P_DDR0_B 17
N_DDR0_B 17
P_DDR1_B 17
N_DDR1_B 17
P_DDR2_B 17
N_DDR2_B 17
MICRO-START INT'L CO.,LTD.
MS-7137 1.3
5
SCS_B#0 17,18
SCS_B#1 17,18
RAS_B# 17,18
CAS_B# 17,18
WE_B# 17,18
MAA_B[0..13] 17,18
DQS_B[0.. 7] 17,18
C215
0.1uF
5
733Friday, October 28, 2005
1
V_1P5_CORE
2
VCC_DDR
3
4
V_1P5_PCIEXPRESS
5
AR33
AR31
AR26
AR22
AR18
AR14
AR10
AP28
AP24
AP20
AP16
AP12
AN35
AM32
AM28
AM26
AM25
AM23
AM22
AM20
AM19
AM17
AM16
AM14
AM13
AM11
AM10
VCCSM
VCCSM
VSSNCTF
VSSNCTF
N17
N19
AA19
C185
0.1uF
AK35
VCC3GW1VCC3GW2VCC3GW3VCC3GW4VCC3GW6VCC3GW7VCC3GW8VCC3GW9VCC3GY1VCC3GY2VCC3GY3VCC3GY4VCC3GY5VCC3GY6VCC3GY7VCC3GY8VCC3G
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VSSNCTF
VSSNCTF
VSSNCTF
VSSNCTF
VSSNCTF
VSSNCTF
VSSNCTF
VSSNCTF
VSSNCTF
VSSNCTF
VSSNCTF
VSSNCTF
T22
P16
P18
P20
R17
V_2P5_MCH
V22
R19
R21
U15
U21
U23
W15
FB180/1.5A_0603
L10
VSSNCTF
VSSNCTF
VSSNCTF
W21
W23
10UF_1206
VSSNCTF
Y22
C198
4
Y9
EXPATXP0
EXPATXN0
EXPATXP1
EXPATXN1
EXPATXP2
EXPATXN2
EXPATXP3
EXPATXN3
EXPATXP4
EXPATXN4
EXPATXP5
EXPATXN5
EXPATXP6
EXPATXN6
EXPATXP7
EXPATXN7
EXPATXP8
EXPATXN8
EXPATXP9
EXPATXN9
EXPATXP10
EXPATXN10
EXPATXP11
EXPATXN11
EXPATXP12
EXPATXN12
EXPATXP13
EXPATXN13
EXPATXP14
EXPATXN14
EXPATXP15
EXPATXN15
DMI TXP0
DMI TXN0
DMI TXP1
DMI TXN1
DMI TXP2
DMI TXN2
DMI TXP3
DMI TXN3
EXPACOMPO
EXPACOMPI
CRTHSYNC
CRTVSYNC
CRTRED
CRTGREEN
CRTBLUE
CRTREDB
CRTGREENB
CTRBLUEB
CRTDDCDATA
CRTDDCCLK
DREFCLKINP
DREFCLKINN
CRTIREF
PMEXTTS
PMBMBUSY#
TESTIN#
MCHDETECT
AD10
AD9
AD8
AD7
AD6
AD5
AD4
AD3
AD2
AD1
AC10
AC9
AC8
AC7
AC6
AC5
AC4
AC3
AC2
AC1
AB10
AB9
AB8
AB7
AB6
AB5
AB4
AB3
AB2
AB1
W18
V19
V17
VCC
VCC
VCC
VSSNCTF
AB25
AC25
VCC
VCC
VCC
VSSNCTF
VSSNCTF
VSSNCTF
AA25
AA11
U18
VCC
VCCSM
VSSNCTF
VSSNCTF
VSSNCTF
VSSNCTF
Y25
Y18
Y11
W25
L8
10U100m_0805
L14 X_90nH
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VSSNCTF
VSSNCTF
VSSNCTF
VSSNCTF
VSSNCTF
VSSNCTF
V25
V20
V16
V11
U25
U11
W11
CP10 X_COPPER
R238 X_0R
CP13
X_COPPER
3
VCCSM
VCCSM
VCCSM
VSSNCTF
VSSNCTF
VSSNCTF
T25
T18
C235
C224
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VSSNCTF
VSSNCTF
VSSNCTF
VSSNCTF
VSSNCTF
VSSNCTF
VSSNCTF
VSSNCTF
VSSNCTF
VSSNCTF
VSSNCTF
T11
P25
P11
R25
R11
N25
N11
M11
AA15
AA17
AD25
VCCA_GPLL V_2P5_DAC _FILT ER ED
C183
10UF_1206
V_1P5_PCIEXPRESS
10UF_1206
10UF_1206
SDVO_TVClk+26
SDVO_TVClk-26
SDVOB_Int+19
SDVOB_Int-19 SDVOB_Red+ 19
A A
DMI_ITP_MRP_010
DMI_ITN_MRN_010
B B
H_BSL03,4,13 VGA_RED 28
H_BSL13,4,13
H_BSL23,4,13
DMI_ITP_MRP_110
DMI_ITN_MRN_110
DMI_ITP_MRP_210
DMI_ITN_MRN_210
DMI_ITP_MRP_310
DMI_ITN_MRN_310
CK_PE_100M_MCH13
CK_PE_100M_MCH#13
SDVO_CtrlData19,26
SDVO_CtrlClk19,26 HSYNC 28
H_BSL0 BSEL0
R229 10K L12 0R
H_BSL1 BSEL1
R239 10K
H_BSL2 BSEL2
R235 10K
R242 X_1K/1%
R237 X_1K/1%
For EMI request
V_1P5_CORE
C C
D D
V_FSB_VTT
C173 X_0.1uF
C160 X_0.1uF
V_2P5_DAC_FILTERED28
FSB GENERIC DECOUPLING
CP9
X_COPPER
V_1P5_CORE
V_1P5_CORE V_1P5_CORE
L6 X_10U100m_0805
X_COPPER
L11 X_10U100m_0805
C179
X_0.22uF
CP11
1
SDVO_TVClk+
SDVO_TVClkÂSDVOB_Int+
SDVOB_Int-
DMI_ITP_MRP_0
DMI_ITN_MRN_0
DMI_ITP_MRP_1
DMI_ITN_MRN_1
DMI_ITP_MRP_2
DMI_ITN_MRN_2
DMI_ITP_MRP_3
DMI_ITN_MRN_3
CK_PE_100M_MCH
CK_PE_100M_MCH#
SDVO_CtrlData
SDVO_CtrlClk CRT_HSYNC
MTYPE
EXP_SLR
V_1P5_CORE
VCCA_HPLLVCCA_HPLL
VCCA_MPLL
VCCA_DPLLA
VCCA_DPLLB
VCCA_GPLL
V_2P5_MCH
V_FSB_VTT3,4,6,12,13,24
C177
10UF_1206
VCCA_DPLLB
C190
10UF_1206
VCCA_MPLL
C194
0.1uF
C168
0.1uF
U8C
E11
EXPARXP0
F11
EXPARXN0
J11
EXPARXP1
H11
EXPARXN1
F9
EXPARXP2
E9
EXPARXN2
F7
EXPARXP3
E7
EXPARXN3
B3
EXPARXP4
B4
EXPARXN4
D5
EXPARXP5
E5
EXPARXN5
G6
EXPARXP6
G5
EXPARXN6
H8
EXPARXP7
H7
EXPARXN7
J6
EXPARXP8
J5
EXPARXN8
K8
EXPARXP9
K7
EXPARXN9
L6
EXPARXP10
L5
EXPARXN10
P10
EXPARXP11
R10
EXPARXN11
M8
EXPARXP12
M7
EXPARXN12
N6
EXPARXP13
N5
EXPARXN13
P7
EXPARXP14
P8
EXPARXN14
R6
EXPARXP15
R5
EXPARXN15
U5
DMI RXP0
U6
DMI RXN0
T9
DMI RXP1
T8
DMI RXN1
V7
DMI RXP2
V8
DMI RXN2
V10
DMI RXP3
U10
DMI RXN3
A11
GCLKINP
B11
GCLKINN
K13
SDVOCTRLDATA
J13
SDVOCTRLCLK
H16
BSEL0
E15
BSEL1
D17
BSEL2
M16
RSV
F15
RSV
C15
MTYPE
A16
EXP_SLR
B15
RSV
C14
RSV
K15
RSV
L10
VCC
M10
VSS
A17
VCCAHPLL
B17
VCCAMPLL
A12
VCCADPLLA
B13
VCCADPLLB
A14
VCCA3GPLL
A13
VCCHV
E13
VCCACRTDAC
D13
VCCACRTDAC
F13
VSSACRTDAC
Intel Grantsdale(915G)
V_FSB_VTT
C175
0.1uF
V_1P5_CORE V_1P5_CORE
C178
0.1uF
VCC
VCC
VTT
H22
G22
C174
0.1uF
X_COPPER
L13 X_10U100m_0805
X_COPPER
L5 X_10U100m_0805
VCC
VTT
VCC
VTT
G21
CP12
CP8
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
F22
F21
F20
E22
E21
E20
E19
D22
D21
2
D20
D19
C22
C21
VCCA_DPLLA
C204
10UF_1206
VCCA_HPLL
C170
10UF_1206
B22
B21
B20
C20
C19
C201
0.1uF
C172
0.1uF
VCC
VTT
B19
VCC
VTT
A22
VCC
VTT
VCC
VTT
A21
VCC
VCC
VTT
VTT
A20
A19
V_1P5_CORE
CLOSE TO GMCH AND SAME DISTANCE
C222 0.1uF
C10
C223 0.1uF
C9
C226 0.1uF
A9
C227 0.1uF
A8
C219 0.1uF
C8
C220 0.1uF
C7
C229 0.1uF
A7
C230 0.1uF
A6
C217 0.1uF
C6
C221 0.1uF
C5
C231 0.1uF
C2
C232 0.1uF
D2
C218 0.1uF
E3
C216 0.1uF
F3
C233 0.1uF
F1
C234 0.1uF
G1
G3
H3
H1
J1
J3
K3
K1
L1
L3
M3
M1
N1
N3
P3
P1
R1
DMI_MTP_IRP_0
R3
DMI_MTN_IRN_0
T3
DMI_MTP_IRP_1
T1
DMI_MTN_IRN_1
U1
DMI_MTP_IRP_2
U3
DMI_MTN_IRN_2
V3
DMI_MTP_IRP_3
V5
DMI_MTN_IRN_3
W5
GRCOMP V_1P5_PCIEXPRESS
Y10
W10
E12
CRT_VSYNC
D12
F_VGA_RED
F14
F_VGA_GREEN
D14
F_VGA_BLUE
H14
G14
E14
J14
MCH_DDC_DATA
L14
MCH_DDC_CLK
M15
CK_96M_DREF
M13
CK_96M_DREF#
M12
DACREFSET
A15
EXTTS
K16
G16
R35
A35
C203
C189
0.1uF
0.01uF
SDVOB_Red+
SDVOB_RedÂSDVOB_Green+
SDVOB_GreenÂSDVOB_Blue+
SDVOB_BlueÂSDVOB_Clk+
SDVOB_ClkÂSDVOC_Red+
SDVOC_RedÂSDVOC_Green+
SDVOC_GreenÂSDVOC_Blue+
SDVOC_BlueÂSDVOC_Clk+
SDVOC_Clk-
V_1P5_CORE
C240
C242
DMI_MTP_IRP_0 10
DMI_MTN_IRN_0 10
DMI_MTP_IRP_1 10
DMI_MTN_IRN_1 10
DMI_MTP_IRP_2 10
DMI_MTN_IRN_2 10
DMI_MTP_IRP_3 10
DMI_MTN_IRN_3 10
R251
24.9R/1%
MCH_DDC_DATA 28
MCH_DDC_CLK 28
CK_96M_DREF 13
CK_96M_DREF# 13
R241 255R/1%
R244 10K
Title
Intel Grantsdale-PCI EXPRESS
Size Document Number Re v
Custom
Date: Sheet
SDVOB_Red- 19
SDVOB_Green+ 19
SDVOB_Green- 19
SDVOB_Blue+ 19
SDVOB_Blue- 19
SDVOB_Clk+ 19
SDVOB_Clk- 19
SDVOC_Red+ 26
SDVOC_Red- 26
SDVOC_Green+ 26
SDVOC_Green- 26
SDVOC_Blue+ 26
SDVOC_Blue- 26
SDVOC_Clk+ 26
SDVOC_Clk- 26
VCC_DDR
C136 10UF_1206
C135 10UF_1206
C159 10UF_1206
VCC_DDR
10UF_1206
10UF_1206
C144 10UF_1206
C186 10UF_1206
C176 10UF_1206
MCH MEMORY DEC OUPLING
R153 0R
R204 0R
L9 0R
L7 0R
X_10pFC181
X_10pFC188
X_10pFC202
V_2P5_MCH
BSEL
02
1
1
0
0 133 MHZ (533)
VSYNC 28
VGA_GREEN 28
VGA_BLUE 28
TABLE
FSB FREQUENCY
01 200 MHZ (800)0
MICRO-START INT'L CO.,LTD.
MS-7137 1.3
5
of
833Friday, October 28, 2005
1
AR30
AR25
AR21
AR17
AR13
AR6
AR3
AP8
AN1
AM31
AM29
AM8
AM7
AM6
AM4
AL32
AL22
AL19
AL16
AL13
AL10
AK30
AK28
AK26
VSS
VSS
VSS
H10
VSS
H13
VSS
VSS
H21
VSS
VSS
AK25
VSS
VSS
H24
C11
C13
C17
C18
C23
C35
D10
D11
D15
D16
D18
D23
D25
D26
D28
D30
D31
D32
E10
E17
E18
E23
E26
E29
F10
F16
F18
F23
F25
F29
F30
F32
F35
A10
A18
A26
A30
A33
B10
B12
B14
B16
B18
B24
B28
U8D
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
G23
G26
VSS
VSS
G27
VSS
VSS
VSSH2VSSH4VSSH5VSSH6VSSH9VSS
G28
A3
VSS
A5
VSS
VSS
VSS
VSS
VSS
VSS
B2
VSS
B5
VSS
B6
VSS
B7
VSS
B8
VSS
B9
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
C1
VSS
C3
VSS
C4
VSS
VSS
VSS
VSS
VSS
VSS
VSS
D3
VSS
D4
VSS
D6
VSS
D7
VSS
D8
VSS
D9
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
E1
VSS
E2
VSS
E4
VSS
E6
VSS
E8
VSS
VSS
VSS
VSS
VSS
VSS
VSS
F2
VSS
F4
VSS
F5
VSS
F6
VSS
F8
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSSG2VSSG4VSSG7VSSG8VSSG9VSS
G10
G11
VSS
G13
VSS
G15
VSS
G17
VSS
G19
VSS
VSS
G20
A A
B B
C C
AK23
H25
VSS
VSS
AK20
VSS
VSS
H27
AK17
H30
VSS
VSS
AK14
VSS
VSS
H32
2
AK11
AK8
AK7
AK6
VSS
VSS
VSS
VSS
VSS
VSSJ2VSSJ4VSSJ7VSSJ8VSSJ9VSS
H34
AK4
VSS
AK1
VSS
3
AJ35
AJ32
AJ30
AJ27
AJ22
AJ19
AJ16
AJ15
AJ13
AJ10
AJ9
AJ4
AH34
AH32
AH29
AH26
AH23
AH20
AH17
AH14
AH11
AH8
AH6
AH5
AH1
AG29
AG28
AG25
AG22
AG21
AG19
AG18
AG16
AG15
AG13
AG12
AG5
AF35
AF32
AF31
AF30
AF29
AF26
AF21
AF18
AF15
AF12
AF10
AF8
AF6
AF4
AF1
AE32
AE30
AE28
AE24
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSSK2VSSK4VSSK5VSSK6VSSK9VSS
J10
J15
J16
J17
J18
J20
J23
J30
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSSL2VSSL4VSSL7VSSL8VSSL9VSS
K10
K11
K14
K20
K24
K26
K28
K31
K32
K35
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSSM2VSSM4VSSM5VSSM6VSSM9VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSSN2VSSN4VSSN7VSSN8VSSN9VSS
L11
L13
L15
L16
L17
L18
L20
L21
L22
L24
L27
L30
L32
M17
M20
M24
M25
M27
M29
M34
VSS
4
AE23
AE21
AE20
AE18
AE17
AE15
AE14
AE12
AE9
AE6
AE4
AD34
AD27
AD26
AD22
AD19
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
AD16
VSS
AD13
VSS
AD11
VSS
AC32
VSS
AC31
VSS
AC29
VSS
AC27
VSS
AB35
VSS
AB32
VSS
AB30
VSS
AB28
VSS
AA27
VSS
AA26
VSS
AA10
VSS
AA9
VSS
AA8
VSS
AA7
VSS
AA6
VSS
AA5
VSS
AA4
VSS
AA3
VSS
AA2
VSS
AA1
VSS
Y34
VSS
Y32
VSS
Y31
VSS
Y29
VSS
Y27
VSS
W32
VSS
W30
VSS
W28
VSS
W19
VSS
W17
VSS
V35
VSS
V27
VSS
V26
VSS
V18
VSS
V9
VSS
V6
VSS
V4
VSS
V2
VSS
V1
VSS
U32
VSS
U31
VSS
U29
VSS
U27
VSS
U19
VSS
U17
VSS
U9
VSS
U8
VSS
U7
VSS
U4
VSS
U2
VSS
T34
VSS
T32
VSS
T30
VSS
T28
VSS
T10
VSS
T7
VSS
T6
VSS
T5
VSS
T4
VSS
T2
VSS
R27
VSS
R26
VSS
R9
VSS
R8
VSS
R7
VSS
R4
VSS
R2
VSS
P35
VSS
P32
VSS
VSS
VSS
VSS
N10
N28
N30
VSSP2VSSP4VSSP5VSSP6VSSP9VSS
N32
VSS
VSS
Intel Grantsdale(915G)
P27
P29
P31
5
D D
Title
Intel Grantsdale GND
Size Document Number Rev
A3
1
2
3
4
Date: Sheet of
MICRO-START INT'L CO.,LTD.
MS-7137 1.3
933Friday, October 28, 2005
5
1
2
3
4
5
AF23
A20M#
AE27
CPUSLP#
AF24
FERR#
AG26
AD0
A A
B B
C C
D D
1
AD[31..0]16,20,21
C_BE#[3..0]16,20,21
DEVSEL#16,20,21
FRAME#16,20,21
IRDY#16,20,21
TRDY#16,20,21
STOP#16,20,21
PAR16,20,21
LOCK#20
SERR#16,20
PERR#16,20,21
PCI_PME#16,20
ICH_PCLK13
PCIRST_ICH6#20
PREQ#020
PREQ#120
PREQ#220
PREQ#316,20
PREQ#420,21
PREQ#520
PREQ#620
PGNT#020
PGNT#120
PGNT#316
PGNT#421
PIRQ#A20
PIRQ#B20
PIRQ#C16,20
PIRQ#D20,21
PIRQ#E20
PIRQ#F20
PIRQ#G20
PIRQ#H20
SERIRQ14
IDE_IRQ27
SERIRQ LCI_TXD2
AD1
AD2
AD3
AD4
AD5
AD6
AD7
AD8
AD9
AD10
AD11
AD12
AD13
AD14
AD15
AD16
AD17
AD18
AD19
AD20
AD21
AD22
AD23
AD24
AD25
AD26
AD27
AD28
AD29
AD30
AD31
C_BE#0
C_BE#1
C_BE#2
C_BE#3
PREQ#0
PREQ#1
PREQ#2
PREQ#3
PREQ#4
PREQ#5
PREQ#6
PGNT#0
PGNT#1
PGNT#3
PGNT#4
E2
E5
C2
F5
F3
E9
F2
D6
E6
D3
A2
D2
D5
H3
B4
J5
K2
K5
D4
L6
G3
H4
H2
H5
B3
M6
B2
K6
K3
A5
L1
K4
J6
H6
G4
G2
C3
J3
A3
J2
J1
E1
C5
G5
E3
P6
G6
R2
L5
B5
M5
B8
F7
E8
B7
C1
B6
F1
C8
E7
F6
D8
N2
L2
M1
L3
D9
C7
C6
M3
AB20
AB16
U11A
ICH6_716
AD0
AD1
AD2
AD3
AD4
AD5
AD6
AD7
AD8
AD9
AD10
AD11
AD12
AD13
AD14
AD15
AD16
AD17
AD18
AD19
AD20
AD21
AD22
AD23
AD24
AD25
AD26
AD27
AD28
AD29
AD30
AD31
C/BE0#
C/BE1#
C/BE2#
C/BE3#
DEVSEL#
FRAME#
IRDY#
TRDY#
STOP#
PAR
PLOCK#
SERR#
PERR#
PME#
PCICLK
PCIRST#
REQ0#
REQ1#
REQ2#
REQ3#
GPI40/REQ4#
GPI1/REQ5#
GPI0/REQ6#
GNT0#
GNT1#
GNT2#
GNT3#
GPO48/GNT4#
GPO17/GNT5#
GPO16/GNT6#
PIRQA#
PIRQB#
PIRQC#
PIRQD#
GPI2/PIRQE#
GPI3/PIRQF#
GPI4/PIRQG#
GPI5/PIRQH#
SERIRQ
IDEIRQ
VSS_0A1VSS_1
VSS_2
A12
A15
A19
CPULAN PCI EXPRESSDIRECT MEDIA
PCI INTERFACE INTERRUPT
ICH 6
PART 1/3
VSS_3
VSS_4
VSS_5
VSS_6
VSS_7A4VSS_8A7VSS_9A9VSS_10
VSS_11
VSS_12
VSS_13
VSS_14
VSS_15
VSS_16
VSS_17
VSS_18
VSS_19
VSS_20
VSS_21
VSS_22
VSS_23
VSS_24
VSS_25
VSS_26
VSS_27
VSS_28
VSS_29
VSS_30
VSS_31
VSS_32
VSS_33
VSS_34
A21
A23
A26
AA4
AB1
AB2
AB7
AA11
AA13
AA16
2
AB9
AB10
AB19
AC10
AC3
AC6
AD1
AD2
AD6
AC12
AC22
AC23
AC24
AC26
AD10
AE10
AD15
AD18
AD24
IGNNE#
INIT3_3V#
STPCLK#
RCIN#
A20GATE
THRMTRIP#
GPO49/CPUPWRGD
PLTRST#
PERN_1
PERP_1
PETN_1
PETP_1
PERN_2
PERP_2
PETN_2
PETP_2
PERN_3
PERP_3
PETN_3
PETP_3
PERN_4
PERP_4
PETN_4
PETP_4
DMI_0RXN
DMI_0RXP
DMI_0TXN
DMI_0TXP
DMI_1RXN
DMI_1RXP
DMI_1TXN
DMI_1TXP
DMI_2RXN
DMI_2RXP
DMI_2TXN
DMI_2TXP
DMI_3RXN
DMI_3RXP
DMI_3TXN
DMI_3TXP
DMI_CLKN
DMI_CLKP
DMI_ZCOMP
DMI_IRCOMP
LAN_CLK
LAN_RSTSYNC
LAN_RXD0
LAN_RXD1
LAN_RXD2
LAN_TXD0
LAN_TXD1
LAN_TXD2
EE_CS
EE_DIN
EE_DOUT
EE_SHCLK
VSS_35
VSS_36
VSS_37
VSS_38
VSS_39
VSS_40
AE2
AE11
AE12
AE21
AE25
3
INIT#
INTR
NMI
SMI#
AF27
AE22
AG24
AF25
AG27
AE26
AD23
AF22
AE23
AG25
R5
H25
H24
G27
G26
K25
K24
J27
J26
M25
M24
L27
L26
P24
P23
N27
N26
T25
T24
R27
R26
V25
V24
U27
U26
Y25
Y24
W27
W26
AB24
AB23
AA27
AA26
AD25
AC25
F24
F23
F12
B11
E12
E11
C13
C12
C11
E13
D12
F13
D11
B12
C_HSO_N1
C_HSO_P1
C_HSO_N2
C_HSO_P2
DMI_BIAS
<200mils
LCI_CLK
LCI_SYNC
LCI_RXD0
LCI_RXD1
LCI_RXD2
LCI_TXD0
LCI_TXD1
C285 0.1uF
C281 0.1uF
C272 0.1uF
C265 0.1uF
R280 24.9R/1%
H_A20M# 3
H_SLP# 3
H_FERR# 3,4
H_IGNNE# 3
H_INIT# 3
FWH_INIT 13
H_INTR 3
H_NMI 3
ICH_H_SMI# 3
H_STPCLK# 3
KBRST# 14
A20GATE 14
TRMTRIP# 3,4
H_PWRGD 3,4
PLTRST# 6,13,24
HSI_N1 20
HSI_P1 20
HSO_N1 20
HSO_P1 20
HSI_N2 20
HSI_P2 20
HSO_N2 20
HSO_P2 20
DMI_MTN_IRN_0 8
DMI_MTP_IRP_0 8
DMI_ITN_MRN_0 8
DMI_ITP_MRP_0 8
DMI_MTN_IRN_1 8
DMI_MTP_IRP_1 8
DMI_ITN_MRN_1 8
DMI_ITP_MRP_1 8
DMI_MTN_IRN_2 8
DMI_MTP_IRP_2 8
DMI_ITN_MRN_2 8
DMI_ITP_MRP_2 8
DMI_MTN_IRN_3 8
DMI_MTP_IRP_3 8
DMI_ITN_MRN_3 8
DMI_ITP_MRP_3 8
CK_PE_100M_ICH# 13
CK_PE_100M_ICH 13
V_1P5_CORE
LCI_CLK 16
LCI_SYNC 16
LCI_RXD0 16
LCI_RXD1 16
LCI_RXD2 16
LCI_TXD0 16
LCI_TXD1 16
LCI_TXD2 16
THERM#11,14
DMI Interface
Trace width 5 mils & 7 mils space.
GMCH breakout space 5 mils, length <
250 mils
Length matching < 5 mils
Trace Length 2" to 11"
VCC3_SB
U14
1
CS
VCC
2
SK
3
4
NC
DI
ORG
DO
GND
93C46
4
R337
8
7
6
5
C306
4.7K
0.1uF
Title
Size Document Number Rev
A3
Date: Sheet of
KBRST#
A20GATE
SERIRQ
THERM#
RN55
1 2
3 4
5 6
7 8
8P4R-10K
VCC3
For 10/100 LAN
MICRO-START INT'L CO.,LTD.
ICH6 - PCI, DMI, CPU, IRQ
MS-7137 1.3
10 33Friday, October 28, 2005
5
Loading...