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Cover Sheet 1
Block Diagram
D D
POWER MAP
GPIO/MEMORY/PCI/HW STRAPPING
Intel LGA775_Signals
Intel LGA775_Power
Intel LGA775_GND
Intel Grantsdale_CPU
Intel Grantsdale_Memory
Intel Grantsdale_PCI EXPRESS
Intel Grantsdale_GND
DDR DIMM 1 & 2
C C
DDR Termination Resistors
ICH6_PCI, DMI, CPU, IRQ
ICH6_LPC, ATA, USB, GPIO
ICH6_POWER
ICS954119 & FWH & FDD
LPC I/O_W83627THF
AC97 Audio_ALC6555
AGP Slot & FAN
PCI Slot 1 & 2
IDE, SATA & CNR
B B
USB CONNECTORS
ACPI CONTROLLER_MS7
ATX & Front Panel & VGA
VRM10.1_RT8800B
LAN_RTL8100C
Jumper Setting / Manual Part
History
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
MS(7131)
Intel (R) Grantsdale (GMCH) + ICH6 Chipset
Intel LGA775 Processor
CPU:
Intel LGA775
System Chipset:
Intel Grantsdale - GMCH (North Bridge)
Intel ICH6 (South Bridge)
On Board Chipset:
BIOS -- FWH EEPROM
AC'97 Codec -- ALC655
LPC Super I/O -- W83627THF
LAN --RTL8100C
CLOCK --ICS 954119
Main Memory:
DDR * 2 (Max 2GB)
Expansion Slots:
PCI SLOT * 2
AGP 1X 3.3V SLOT * 1
CNR SLOT * 1
Version 100
PWM:
Controller: RT8800+RT9602
A A
Title
Cover Sheet
Size Document Number Re v
Custom
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Date: Sheet
2
MICRO-START INT'L CO.,LTD.
MS-7131 100
of
13 0 Wednesday, November 24, 2004
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Block Diagram
RT9602
D D
2-Phase PWM
915GV: 133MHz and 200MHz
Intel LGA775 Processor
FSB
2004 Mainstream/Value FMB (Mainstream 2 through bottom of Value segment)
TDP = 84 W
VR_TDC = 68 A
Icc(max) = 78 A
Prescott Tcase = [P x 0.28] + 44.2
Socket loadline = 1.4 mOhm
VR tolerance = +/- 25 mV
910GL: 133MHz
Grantsdale
AGP 3.3V
Connector
915 GV
910 GL
DMI
C C
IDE
USB Port 0
UltraDMA 33/66/ 100
ICH6
64bit DDR
Channel 1
64bit DDR
Channel 2
2 DDR
DIMM
Modules
PCI CNTRL
PCI ADDR/DATA
PCI Slot 1
RTL8100C
PCI Slot 2
USB Port 1
USB Port 2
USB
LPC Bus
USB Port 3
USB Port 4
SATA
LPC SIO
B B
USB Port 5
Winbond
83627THF
USB Port 6
USB Port 7
AC'97 Codec
AC'97 Link
Flash
Keyboard
Floopy Parallel
Serial
Mouse
A A
8
CNR Slot
7
Title
Block Diagram
Size Document Number Re v
Custom
6
5
4
3
Date: Sheet
2
MICRO-START INT'L CO.,LTD.
MS-7131 100
of
23 0 Wednesday, November 24, 2004
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Prescott
0.8375V - 1.6000V Core
D D
1.2V FSB Vtt
- 78A
- 3.5A
RT8800B
VCCP
0.8375V-1.6000V
2-Phase Switch
VRM 10.1
78A
DDR DIMM & TERMINATOR
1.3V VTT_DDR - 1.0A
2.6V VCC_DDR
(S0,S1)
(S3) -160mA
-4.0A 2.6V VCC_DDR
W83310DS
Gransdale GMCH
- 1.0A 1.2V FSB Vtt
2.6V DDR I/O -4.0A
(S0,S1)
-250mA (S3) 2.6V DDR I/O
*2.5V DAC
2.5V HV
(Integrated)
1.5V Core
C C
(Discrete) - 7.7A
- 0.07A
- TBD A
- 9.7A 1.5V Core
- 1.4A *1.5V PCI Express
ICH6
1.2V VCC_CPU
1.5V Core
*1.5V PCI Express
1.5V SATA
(G3) - 5uA RTC
B B
5VrefSus
- TBD A
- 1.88A
- 560mA
- 430mA
- 330mA +3.3V VccSus
- TBD A 5VRef
- TBD A
VTT_DDR
Linear
1.0A 1.3V
MS7 Regulator
V_FSB_VTT
Linear 1.2V 5.0A
VCC_DDR
Linear
(S0,S1)
(S3)
8.0A 2.6V
570mA
V_2P5_MCH
2.5V Linear
100mA
VCC3_SB
3.3V Linear
1.5A
5VDUAL1,2
5V Linear
22mA
MS6+ Regulator
V_1P5_CORE
1.5V
Switch 14A
PCI slot x3
(include 1X AGP slot)
+3.3Vaux
+3.3Vaux
+3.3V
+5V
+12V
(wake)
(no wake)
- 375mA
- 20mA
- 7.6A
- 5.0A
- 0.5A
USB
+5V - 4A (S0,S1)
+5V (S3) - 20mA
+3.3V
- 180mA
PS2
FWH
+5V (S3) - 2.0mA
+3.3V (S0,S1) - 107mA
3V
+3.3V +5V +12V +5VSB
Battery
A A
8
7
6
ATX POWER
5
4
3
- 345mA +5V (S0,S1)
Title
POWER MAP
Size Document Number Re v
Custom
Date: Sheet
2
MICRO-START INT'L CO.,LTD.
MS-7131 100
of
33 0 Wednesday, November 24, 2004
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ICH6
PCI Configuration
GPIO PinIType
D D
GPIO 0
GPIO 1
GPIO 2
GPIO 3
GPIO 4
GPIO 5
GPIO 6
GPIO 7
GPIO 8
GPIO 9
GPIO 10
GPIO 11
GPIO 12
GPIO 13
GPIO 14
GPIO 15
C C
GPIO 16
GPIO 17 O
GPIO 19
GPIO 20
GPIO 21
GPIO 23
GPIO 24
GPIO 25
GPIO 26
GPIO 27
GPIO 28
GPIO 29
GPIO 30
GPIO 31
B B
GPIO 32
GPIO 33
GPIO 34
GPIO 40
GPIO 41
GPIO 48
GPIO 49
Function
REQ#6 pull-up to VCC5 with 2.7K
I
REQ#5 pull-up to VCC5 with 2.7 K,and connect to RTL8100C
I
PIRQ#E pull-up to VCC5 with 2.7K
I
PIRQ#F pull-up to VCC5 with 2.7K
PIRQ#G pull-up to VCC5 with 2.7K
I
PIRQ#H pull-up to VCC5 with 2.7K
I
GPI6 pull-up to VCC3 with 10K
I
GPI7 pull-up to VCC3 with 10K
I
GPI8 pull-up to VCC3_SB with 10K
I
OC#3_4 connect to USB connector
I
OC#3_4 connect to USB connector
I
SMB_ALERT# pull-up to VCC3_SB with 10K
I
PS_DETECT p u l l- u p t o V C C3 with 10K
I
SIO_PME# co nnect to LPC I/O
I
OC#3_4 connect to USB connector
I
OC#3_4 connect to USB connector
I
NC
O
PGNT#5 connect to RTL8100C
NC
O GPIO 18
BIOS_WP# co n nect to FWH
O
NC
O
NC
O
NC
O
NC
I/O
pull-down to GND with 1K directly (enable internal 2.5V VRM)
I/O
pull-up to V CC 3 w it h 1 0 K directly
I
NC
I/O
NC
I/O
pull-up to V CC 3 w it h 1 0 K directly
I
pull-up to V CC 3 w it h 1 0 K directly
I
pull-up to V CC 3 w it h 1 0 K directly
I
NC
I/O
NC
I/O
NC
I/O
PREQ#4 pull-up to VCC5 with 2.7K
I
NC
I
NC
O
H_PWRGD pull - u p t o V TT _ O U T_LEFT with 100
OD
ohm,and connect to CPU
Power Pin
5V
5V
5V
5V
5V
5V
3.3V
3.3V
3.3V_SB
3.3V_SB
3.3V_SB
3.3V_SB
3.3V
3.3V_SB
3.3V_SB
3.3V_SB
3.3V
3.3V
3.3V
3.3V
3.3V
3.3V
3.3V
3.3V_SB
3.3V_SB
3.3V
3.3V_SB
3.3V_SB
3.3V
3.3V
3.3V
3.3V
3.3V
3.3V
5V
3.3V
3.3V
VCPU
B7
E8
D9
C7
C6
M3
AD19
AE19
R1
C23
D23
W6
M2
R6
C25
C24
D8
F6
AC21
AB21
AD22
AD20
AD21
V3
P5
AF17
R3
T3
AE18
AF18
AG18
AF19
AF20
AC18
F7
P4
E7
AG25
DEVICE
AGP Slot
PCI Slot 1
INT Pin REQ#/GNT#
INTA#
INTB#
INTB# PCICLK1
INTC#
PCI_REQ#0
PCI_GNT#0
PCI_REQ#1
PCI_GNT#1
IDSEL
AD16
AD17
AD18
INTD#
INTA#
INTC#
INTD#
PCI_REQ#2 PCI Slot 2
PCI_GNT#2
AD19
INTA#
INTB#
LAN
INTH#
PCI_REQ#5
PCI_GNT#5
AD27
PCI RESET DEVICE
Signals Target
PCIRST_ICH5# FWH
PCIRST#1
LAN, Super I/O
PCI slot 1,2,AGP Slot PCIRST#2
HD_RST#
IDE
PLTRST# Grandstale,MS7
DDR DIMM Config.
DEVICE
ADDRESS
DIMM 1
DIMM 2 MCLK_B1/MCLK_B#1
A4H
JUMPER SETTING
RTCRST
(1-2)CLEAR (2-3)NORMAL
CLOCK
MCLK_A0/MCLK_A#0
MCLK_A1/MCLK_A#1 A0H
MCLK_A2/MCLK_A#2
MCLK_B0/MCLK_B#0
MCLK_B2/MCLK_B#2
CLOCK
AGP_CLK
PCICLK2
LAN_CLK
FWH
Function
GPI 0 PD_DET I
Type GPIO Pin
A A
Title
GPIO/MEMORY/PCI/HW STRAPPING
Size Document Number Re v
Custom
8
7
6
5
4
3
Date: Sheet
2
MICRO-START INT'L CO.,LTD.
MS-7131 100
of
43 0 Wednesday, November 24, 2004
1
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CPU SIGNAL BLOCK
AN6
AN5
VSS_SENSE
VCC_SENSE
D10#
D9#
D8#
B10
A11
A10
HD#7
HD#8
HD#9
HD#10
TP2
AJ3
TP3
VID5
VID4
VID3
AM5
AL4
AK4
AL6
AM7
AK3
VID6#
VID5#
VID4#
VID7#
VID_SELECT
ITP_CLK1
ITP_CLK0
GTLREF_SEL
TESTHI12
TESTHI11
TESTHI10
LINT1/NMI
LINT0/INTR
D7#A7D6#B7D5#B6D4#A5D3#C6D2#A4D1#C5D0#
B4
HD#1
HD#2
HD#3
HD#4
HD#5
HD#6
HD#0
VID2
VID0
VID1
AM3
AL5
AM2
VID3#
VID2#
VID1#
VID0#
AN7
H1
GTLREF0
H2
GTLREF1
H29
AG3
BPM5#
AF2
BPM4#
AG2
BPM3#
AD2
BPM2#
AJ1
BPM1#
AJ2
BPM0#
G5
PCREQ#
J6
REQ4#
K6
REQ3#
M6
REQ2#
J5
REQ1#
K4
REQ0#
W2
P1
H5
G4
TESTHI9
G3
TESTHI8
F24
TESTHI7
G24
TESTHI6
G26
TESTHI5
G27
TESTHI4
G25
TESTHI3
F25
TESTHI2
W3
TESTHI1
F26
TESTHI0
AK6
RSVD
G6
RSVD
G28
BCLK1#
F28
BCLK0#
A3
RS2#
F5
RS1#
B3
RS0#
U3
AP1#
U2
AP0#
F3
BR0#
T2
COMP5
J2
COMP4
R1
COMP3
G2
COMP2
T1
COMP1
A13
COMP0
J17
DP3#
H16
DP2#
H15
DP1#
J16
DP0#
AD5
ADSTB1#
R6
ADSTB0#
C17
DSTBP3#
G19
DSTBP2#
E12
DSTBP1#
B9
DSTBP0#
A16
DSTBN3#
G20
DSTBN2#
G12
DSTBN1#
C8
DSTBN0#
L1
K1
ZIF-SOCK775-15u
H_BPM#5
H_BPM#4
H_BPM#3
H_BPM#2
H_BPM#1
H_BPM#0
H_PCREQ#
HREQ#4
HREQ#3
HREQ#2
HREQ#1
HREQ#0
H_TESTHI12
H_TESTHI11
H_TESTHI10
H_TESTHI9
H_TESTHI8
H_TESTHI2_7
H_TESTHI1
H_TESTHI0
RSVD_AK6
RSVD_G6
CPU_CLK#
CPU_CLK
HRS#2
HRS#1
HRS#0
H_COMP5
H_COMP4
H_COMP3
H_COMP2
H_COMP1
H_COMP0
TP1
CPU_GTLREF
TP9
GTLREF_SEL
H_PCREQ# 8
HREQ#[0..4] 8
RN9 8P4R-62R
1 2
3 4
5 6
7 8
R77 62R
R125 62R
R67 62R
R123 62R
R27 X_62R
R73 X_62R
CPU_CLK# 17
CPU_CLK 17
HRS#[0..2] 8
TP5
TP4
R69 X_60.4R1%
R74 X_60.4R1%
R70 100R1%
R80 100R1%
R68 60.4R1%
R129 60.4R1%
TP7
TP10
TP8
TP6
HADSTB#1 8
HADSTB#0 8
HDSTBP#3 8
HDSTBP#2 8
HDSTBP#1 8
HDSTBP#0 8
HDSTBN#3 8
HDSTBN#2 8
HDSTBN#1 8
HDSTBN#0 8
NMI 14
INTR 14
CPU_GTLREF 6
TP11
VTT_OUT_LEFT
V_FSB_VTT
VTT_OUT_RIGHT 6
H_BR#0 6,8
VTT_OUT_LEFT 6
C59
X_C0.1U25Y
RN2 X_8P4R-680R
VID3
VID3 26
VID1
VID1 26
VID4
VID4 26
VID2
VID2 26
VID0
VID0 26
VID5 26
PLACE RESISTORS OUTSIDE SOCKET
CAVITY IF NO ROOM FOR VARIABLE
RESISTOR DON'T PLACE
VTT_OUT_RIGHT
C51 C0.1U25Y
C54 C0.1U25Y
R40 X_680R
VID5
R42 X_680R
RN3 8P4R-51R
1 2
3 4
5 6
7 8
1 2
3 4
5 6
7 8
RN4 8P4R-51R
R61 X_49.9R1%
R56 X_49.9R1%
R54 49.9R1%
PLACE BPM TERMINATION NEAR CPU
2
4
6
8
VTT_OUT_RIGHT
H_BPM#3
H_BPM#5
H_BPM#1
H_BPM#0
H_TDI
H_BPM#2
H_BPM#4
H_TDO
H_TMS
H_TCK
H_TRST#
1
3
5
7
D D
HA#[3..31] 8
Chipset does not support extended
addressing over 4GB,leave A[35:32]#
unconnected.
AG1
G11
D19
C20
AB2
AB3
AD3
AD1
AF1
AC1
AE1
AL1
AK1
AE8
AL2
AH2
AE6
G10
D16
A20
AA2
G29
H30
G30
G23
B22
A22
A19
B19
B21
C21
B18
A17
B16
C18
A8
F2
R3
M3
P3
H4
B2
C1
E3
D2
C3
C2
D4
E4
G8
G7
M2
N2
P2
K3
L2
N5
C9
Y1
V2
N1
U8A
DBI0#
DBI1#
DBI2#
DBI3#
EDRDY#
IERR#
MCERR#
FERR#/PBE#
STPCLK#
BINIT#
INIT#
RSP#
DBSY#
DRDY#
TRDY#
ADS#
LOCK#
BNR#
HIT#
HITM#
BPRI#
DEFER#
TDI
TDO
TMS
TRST#
TCK
THERMDA
THERMDC
THERMTRIP#
GND/SKTOCC#
PROCHOT#
IGNNE#
SMI#
A20M#
SLP#
RSVD
RESERVED0
RESERVED1
RESERVED2
RESERVED3
RESERVED4
RESERVED5
BOOTSELECT
LL_ID0
LL_ID1
BSEL0
BSEL1
BSEL2
PWRGOOD
RESET#
D63#
D62#
D61#
D60#
D59#
D58#
D57#
D56#
D55#
D54#
B15
HD#53
D53#
HD#52
C14
D52#
C15
HD#51
HDBI#[0..3] 8
H_EDRDY 8
H_IERR# 6
FERR# 14
STPCLK# 14
HDBSY# 8
HDRDY# 8
C C
B B
A A
VTT_OUT_RIGHT
HTRDY# 8
HADS# 8
HLOCK# 8
HBNR# 8
HIT# 8
HITM# 8
HDEFER# 8
CPU_TMPA 18
TRMTRIP# 14
H_PROCHOT# 6
C48 X_C0.1U25Y
R64 X_1KR
H_FSBSEL0 6,10,17
H_FSBSEL1 6,10,17
H_FSBSEL2 6,10,17
H_PWRGD 6,14
H_CPURST# 6,8
HD#[0..63] 8
HDBI#0
HDBI#1
HDBI#2
HDBI#3
H_EDRDY
HINIT# 14
HBPRI# 8
H_TDI
H_TDO
H_TMS
H_TRST#
H_TCK
IGNNE# 14
SMI# 14
A20M# 14
SLP# 14
CPU_BOOT
HD#63
HD#62
HD#61
HD#60
HD#59
HD#58
HD#57
HD#56
HD#55
HD#54
D51#
HD#50
HA#31
AJ6
AJ5
AH5
AH4
AG5
A35#
A34#
A33#
A32#
D50#
D49#
D48#
D47#
D46#
D45#
A14
E22
D17
D20
D22
G22
G21
HD#44
HD#45
HD#46
HD#47
HD#48
HD#49
HA#30
A31#
D44#
HD#43
AG4
F21
HA#29
A30#
D43#
HD#42
AG6
E21
HA#28
A29#
D42#
HD#41
HA#24
HA#25
HA#26
HA#27
AF4
AF5
AB4
AC5
AB5
A28#
A27#
A26#
A25#
D41#
D40#
D39#
D38#
F20
F18
F17
E19
E18
HD#37
HD#38
HD#39
HD#40
HA#23
A24#
D37#
HD#36
HA#17
HA#18
HA#19
HA#20
HA#21
HA#22
AA5
AD6
AA4
AB6
A23#
A22#
A21#
A20#Y4A19#Y6A18#W6A17#
D36#
D35#
D34#
D33#
D32#
D31#
F15
E16
E15
G17
G18
G16
G15
HD#30
HD#31
HD#32
HD#33
HD#34
HD#35
HA#12
HA#13
HA#14
HA#15
HA#16
A16#W5A15#V4A14#V5A13#U4A12#U5A11#T4A10#
D30#
D29#
D28#
D27#
D26#
D25#
F14
E13
D13
G14
G13
HD#25
HD#26
HD#27
HD#28
HD#29
HA#10
HA#11
U6
D24#
F12
F11
HD#23
HD#24
HA#5
HA#6
HA#7
HA#8
HA#9
A9#T5A8#R4A7#M4A6#L4A5#M5A4#P6A3#
D23#
D22#
D21#
D20#D7D19#E9D18#F9D17#F8D16#G9D15#
E10
D10
HD#18
HD#19
HD#20
HD#21
HD#22
HA#4
HD#17
HA#3
remove
L5
D11
HD#15
HD#16
HD#14
AC2
C12
DBR#
D14#
B12
HD#13
D13#
HD#12
AN3
RSVD
D12#D8D11#
HD#11
AN4
RSVD
C11
Title
Intel LGA 775_Sign als
Size Document Number Re v
Custom
8
7
6
5
4
3
Date: Sheet
2
MICRO-START INT'L CO.,LTD.
MS-7131 100
of
53 0 Wednesday, November 24, 2004
1
Page 6
8
VCCP
7
6
5
4
3
2
1
AF21
VCCP
D D
C C
B B
U8B
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
AF19
AF18
AF15
AF14
AF12
AF11
AE9
AE23
AE22
AE21
AE19
AE18
AE15
AE14
AE12
AE11
AD8
AD30
AD29
AD28
AD27
AD26
AD25
AD24
AD23
AC8
AC30
AC29
AC28
AC27
AC26
AC25
AC24
AC23
AB8
AA8
GTLREF VOLTAGE SHOULD BE
0.67*VTT = 0.8V
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCCU8VCCV8VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCCW8VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
Y8
Y30
VCCP
VTT_OUT_LEFT CPU_GTLREF
Y24
Y25
Y26
Y27
Y28
Y29
R76 49.9R1%
Y23
W30
W28
W29
R75
100R1%
W27
W26
W25
W24
W23
U30
C69
C220P50N
U26
U27
U28
U29
C68
C0.1U25Y
AH28
AH29
AH30
AH8
AH9
AJ11
AJ12
AJ14
AJ15
AJ18
AJ19
AJ21
AJ22
AJ25
AJ26
AJ8
AJ9
AK11
AK12
AK14
AK15
AK18
AK19
AK21
AK22
AK25
AK26
AK8
AK9
AL11
AL12
AL14
AL15
AL18
AL19
AL21
AL22
AL25
AL26
AL29
AL30
AL8
AL9
AM11
AM12
AM14
AM15
AM18
AM19
AM21
AM22
AM25
AM26
AM29
AM30
AM8
AM9
AN11
AN12
AN14
AN15
AN18
AN19
AN21
AN22
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCCA
VSSA
RSVD
VCC-IOPLL
VTTPWRGD
VTT_OUT_RIGHT
VTT_OUT_LEFT
VTT_SEL
RSVD/VTT_PKGSENSE
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCCJ8VCCJ9VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCCK8VCCL8VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCCM8VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCCN8VCCP8VCCR8VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCCT8VCC
VCC
VCC
J10
J11
J12
J13
J14
J15
J18
J19
J20
J21
J22
J23
J24
J25
J26
J27
J28
J29
T30
U23
U24
U25
N30
CPU_GTLREF 5
N23
N24
N25
N26
N27
N28
N29
M24
M25
M26
M27
M28
M29
M30
K27
K28
K29
K30
M23
T23
T24
T25
T26
T27
T28
T29
J30
K23
K24
K25
K26
PLACE COMPONENTS AS CLOSE AS POSSIBLE TO PROCESSOR SOCKET
TRACE WIDTH TO CAPS MUST BE SMALLER THAN 12MILS
V_FSB_VTT
AN9
L3 X_10U100m_0805
CP4 X_COPPER
AN8
AN30
AN29
AN26
HS11HS22HS33HS4
AN25
AH27
AH26
AH25
AH22
AH21
AH19
AH18
AH15
AH14
AH12
AH11
AG9
AG8
AG30
AG29
AG28
AG27
AG26
AG25
AG22
AG21
AG19
AG18
AG15
AG14
AG12
AG11
AF9
AF8
AF22
VCCA: pay special attention to the
voltage noise (check SI)
H_VCCA
A23
H_VSSA
B23
D23
H_VCCA
C23
A25
VTT
A26
VTT
A27
VTT
A28
VTT
A29
VTT
A30
VTT
B25
VTT
B26
VTT
B27
VTT
B28
VTT
B29
VTT
B30
VTT
C25
VTT
C26
VTT
C27
VTT
C28
VTT
C29
VTT
C30
VTT
D25
VTT
D26
VTT
D27
VTT
D28
VTT
D29
VTT
D30
VTT
VTT_PWG
AM6
VTT_OUT_RIGHT
AA1
VTT_OUT_LEFT
J1
4
C142
X_C1U16Y
F27
F29
ZIF-SOCK775-15u
C147
C10U10Y1206
R127 X_1KR
VTT_SEL
V_FSB_VTT
Pull up signal Signals to be pulled up
VTT_OUT_RIGHT
VTT_OUT_LEFT
VCC3
H_VCCA
C146
C10U10Y1206
H_VSSA
V_FSB_VTT
C144 C10U10Y0805
C156 X_C10U10Y0805
C150 C10U10Y0805
CAPS FOR FSB GENERIC
VTTPWRGD, VID[5:0], GTREF, TMS, TDI, TDO,
BPM[5:0, other VRD components]
RESET#, BR0#, PWRGOOD, TESTHI1, TESTHI8, TESTHI9
,TESTHI10, TESTHI11,TESTHI12
TEJ/PSC
0
1
RSVD
VTT_OUT_LEFT
VCC5_SB
R50
680R
3
H_CPURST#
H_PWRGD
H_BR#0
H_PROCHOT#
H_CPURST# 5,8
H_PWRGD 5,14
H_BR#0 5,8
H_PROCHOT# 5
6
VID_GD# 24,26
FSBSEL RESISTOR CAN BE REMOVED IF ONLY TEJAS
AND CEDAR MILL ARE SUPPORTED
V_FSB_VTT
RN27
1
3
5
7
8P4R-470R
5
H_FSBSEL1
2
H_FSBSEL2
4
H_FSBSEL0
6
8
4
R53
1KR
R51 10KR
H_FSBSEL1 5,10,17
H_FSBSEL2 5,10,17
H_FSBSEL0 5,10,17
NOT Stuff
VTT_OUT_RIGHT 5
VTT_OUT_RIGHT
R44 120R
PLACE AT CPU END OF ROUTE
VTT_OUT_LEFT 5
A A
8
VTT_OUT_LEFT
V_FSB_VTT
R63 62R
R72 62R
R71 100R
R83 62R
The processor does not have on-die
termination on the RESET# and BR0# signals.
H_IERR#
H_IERR# 5
7
1.25V VTT_PWRGOOD
VTT_PWG
Q12
N-MMBT3904_SOT23
C50
X_C1U16Y
Title
Intel LGA775_Power
Size Document Number Re v
Custom
Date: Sheet
2
MICRO-START INT'L CO.,LTD.
MS-7131 100
of
63 0 Wednesday, November 24, 2004
1
Page 7
8
D D
C C
AA23
AA24
AA25
AA26
AA27
AA28
AA29
AA30
AB23
AB24
AB25
AB26
AB27
AB28
AB29
AB30
AC3
AC6
AC7
AD4
AD7
AE10
AE13
AE16
AE17
AE20
AE24
AE25
AE26
AE27
AE28
7
TP14
TP12
TP15
AC4
AE3
AE4
VSS
AE29
RSVD
VSS
AE30
AE5
RSVD
VSS
AE7
RSVD
VSS
AF10
D14
RSVDD1RSVD
VSS
VSS
AF13
U8C
A12
VSS
A15
VSS
A18
VSS
A2
VSS
A21
VSS
A24
VSS
A6
VSS
A9
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
AA3
VSS
VSS
AA6
VSS
AA7
VSS
AB1
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
AB7
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
AE2
VSS
VSS
VSS
VSS
VSS
VSS
VSS
E23
AF16
E24
RSVD
VSS
AF17
RSVD
VSS
F23
RSVDE5RSVDE6RSVDE7RSVD
VSS
VSS
VSS
AF20
AF23
AF24
AF25
TP13
VSS
AF26
B13
RSVDF6RSVD
VSS
VSS
AF27
AF28
VSS
AF29
RSVDJ3RSVDN4RSVDP5RSVDV1RSVDW1RSVD
VSS
VSS
VSS
VSS
VSS
VSS
AF3
AF6
AF7
AF30
AG10
AG13
VSS
6
Y3
VSS
AG16
VSS
AG17
VSS
AG20
VSSY7VSSY5VSSY2VSSW7VSSW4VSSV7VSSV6VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
AH1
AG7
AH10
AH13
AH16
AG23
AG24
V30
VSS
AH17
VSSV3VSS
VSS
AH20
V29
VSS
AH23
V28
VSS
VSS
AH24
V27
AH3
VSS
VSS
V26
VSS
VSS
AH6
V25
V24
V23
VSS
VSS
VSS
VSSU7VSSU1VSST7VSST6VSST3VSSR7VSSR5VSS
VSS
VSS
VSS
VSS
AH7
AJ10
AJ13
AJ16
AJ17
VSS
AJ20
VSS
5
AJ23
VSS
AJ24
VSS
AJ27
VSS
AJ28
VSS
R30
AJ29
VSS
R29
AJ30
VSS
VSS
4
R28
R27
R26
R25
R24
R23
P30
P29
P28
P27
P26
P25
P24
P23
VSS
VSS
VSS
VSS
VSS
VSS
VSSR2VSSP7VSSP4VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSSN7VSSN6VSSN3VSSM7VSSM1VSSL7VSSL6VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
AJ4
AJ7
AK10
AK13
AK16
AK17
AK2
AK20
AK23
AK24
AK27
AK28
AK29
AK30
AK5
AK7
AL10
AL13
AL16
VSS
AL17
VSS
AL20
VSS
AL23
VSS
AL24
VSS
AL27
VSS
L30
AL28
VSS
VSSL3VSS
VSS
AL3
L29
L28
L27
L26
L25
L24
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
AL7
AM1
AM10
AM13
AM16
AM17
L23
VSS
VSS
AM20
VSSK7VSS
VSS
AM23
K5
VSS
AM24
K2
VSS
AM27
VSS
AM28
AM4
VSS
3
H18
H19
H20
H21
H22
H23
H24
H25
H26
H27
H28
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSSH3VSSH6VSSH7VSSH8VSSH9VSSJ4VSSJ7VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSSB1VSS
VSS
B11
AN1
AN10
AN13
AN16
AN17
AN2
AN20
AN23
AN24
AN27
AN28
B14
H17
VSS
VSS
H14
VSS
H13
VSS
H12
VSS
H11
VSS
H10
VSS
G1
VSS
F7
VSS
F4
VSS
F22
VSS
F19
VSS
F16
VSS
F13
VSS
F10
VSS
E8
VSS
E29
VSS
E28
VSS
E27
VSS
E26
VSS
E25
VSS
E20
VSS
E2
VSS
E17
VSS
E14
VSS
E11
VSS
D9
VSS
D6
VSS
D5
VSS
D3
VSS
D24
VSS
D21
VSS
D18
VSS
D15
VSS
D12
VSS
C7
VSS
C4
VSS
C24
VSS
C22
VSS
C19
VSS
C16
VSS
C13
VSS
C10
VSS
B8
VSS
B5
VSS
B24
VSS
B20
VSS
B17
VSS
ZIF-SOCK775-15u
2
1
B B
VCC3 VCC5
C389
C319
X_C0.1U25Y
VCC3
C284
X_C0.1U25Y
C91
X_C0.1U25Y
C214
X_C0.1U25Y
C387
C292
C0.1U25Y
X_C0.1U25Y
EMI reserve
C375
X_C0.1U25Y
Reserve x3 104p cap (VCC3/GND)
close to C2431, R2425, R2349,
2004.9.16 2004.9.16
A A
VCC3
C307
X_C0.1U25Y
C18
X_C0.1U25Y
C417
X_C0.1U25Y
C164
X_C0.1U25Y
C90
X_C0.1U25Y
X_C0.1U25Y
Reserve x8 104p cap (VCC3/GND) close to
C244, C2416, RN2075, C399, C2402,
C2415, C261, R2322.
EMI reserve
C343
C396
X_C0.1U25Y
C413
X_C0.1U25Y
X_C0.1U25Y
C330
X_C0.1U25Y
2004.9.20
8
7
6
C152
X_C0.1U25Y
C52
X_C0.1U25Y
VCC5
C124
X_C0.1U25Y
VCC5
C280
X_C0.1U25Y
C182
C0.1U25Y
C6
C410
X_C0.1U25Y
X_C0.1U25Y
EMI reserve
C316
X_C0.1U25Y
2004.9.20
5
C388
C34
X_C0.1U25Y
EMI reserve
C353
X_C0.1U25Y
Reserve x2 104p cap
(VCC5/GND) close to PCI_CLK1
via, C300.
C158
X_C0.1U25Y
C1000P50N
Reserve x4 104p cap
(VCC5/GND) close to C300,
PCI_CLK1 via,
C16
X_C0.1U25Y
4
C5
X_C1000P50N
Reserve a 104p cap (VCC5/VCC3)
close to USB3, RN71.
C407
C403
C0.1U25Y
X_C0.1U25Y
EMI reserve
C213 X_C0 . 1 U25Y
C345 X_C0 . 1 U25Y
C17
X_C0.1U25Y
VCC3 VCC5
2004.9.20
3
C129
X_C0.1U25Y
C58
X_C0.1U25Y
C89
C315
X_C0.1U25Y
X_C0.1U25Y
VCC5
C108 X_C0.1U25Y
X_C10P50N0402 C367
Title
Intel LGA775_GND
Size Document Number Re v
Custom
Date: Sheet
2
MICRO-START INT'L CO.,LTD.
MS-7131 100
73 0 Wednesday, November 24, 2004
1
VCC3
of
Page 8
8
7
6
5
4
3
2
1
V_1P5_CORE
AC11
AB11
Y20
Y19
Y17
Y16
W20
W16
U20
U16
T20
T19
T17
T16
AA13
AA14
AA16
AA18
AA20
AA21
AA22
AA23
AA24
AB13
AB14
AB15
AB16
AB17
AB18
AB19
AB20
AB21
AB22
AB23
AB24
N13
N14
N15
N16
N18
N20
N21
P13
P14
P15
P17
P19
P21
P22
R13
R14
R15
R16
R18
R20
R22
R23
T13
T14
T15
T21
T23
T24
U13
U14
U22
U24
V13
V14
V15
V21
V23
V24
W13
W14
W22
W24
Y13
Y14
Y15
Y21
Y23
G30
G32
M30
M28
M26
M35
M31
G31
M32
M23
M22
AG7
G24
M14
H29
K29
J29
K30
L29
L31
L28
J28
K27
K33
R29
L26
N26
N31
P26
N29
P28
R28
N33
T27
T31
U28
T26
T29
J31
N27
E31
R33
E30
L33
F33
E32
H31
F31
L34
N35
J35
N34
L35
P33
K34
P34
J32
AF7
B23
D24
A23
A24
U10A
HA3#
HA4#
HA5#
HA6#
HA7#
HA8#
HA9#
HA10#
HA11#
HA12#
HA13#
HA14#
HA15#
HA16#
HA17#
HA18#
HA19#
HA20#
HA21#
HA22#
HA23#
HA24#
HA25#
HA26#
HA27#
HA28#
HA29#
HA30#
HA31#
HAD_STB0#
HAD_STB1#
HPCREQ#
BREQ0#
BPRI#
BNR#
HLOCK#
ADS#
HREQ0#
HREQ1#
HREQ2#
HREQ3#
HREQ4#
HIT#
HITM#
DEFER#
HTRDY#
DBSY#
DRDY#
HEDRDY#
RS0#
RS1#
RS2#
HCLKP
HCLKN
PWROK
CPURST#
RSTIN#
ICH_SYNC#
HDRCOMP
HDSCOMP
HDSWING
HDVREF
V_FSB_VTT
VCCNCTF
VCCNCTF
VCCNCTF
RSVRD
AJ21
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
RSVRD
RSVRD
RSVRD
RSVRD
RSVRD
RSVRD
RSVRD
RSVRD
RSVRD
RSVRD
RSVRD
RSVRD
RSVRD
RSVRD
RSVRD
RSVRD
RSVRD
RSVRD
RSVRD
V31
V30
V32
Y30
U30
R31
AK21
AK24
AL21
AL20
AK18
AJ24
AJ23
AJ18
AJ20
AB29
R30
AA31
AA30
GTLREF VOLTAGE SHOULD BE 0.67*VTT=0.8V
R163
49.9R1%0402
MCH_GTLREF HXSWING
R166
100R1%0402
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
RSVRD
RSVRD
RSVRD
RSVRD
RSVRD
AC12
AC13
AC14
AC15
AC16
AC17
C185
C100000P16Y0402
VCCNCTF
VCCNCTF
VCCNCTF
RSVRD
RSVRD
RSVRD
AC18
AC19
VCCNCTF
VCCNCTF
RSVRD
RSVRD
AC20
AC21
AC22
VCCNCTF
RSVRD
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
NC
NC
P12NCP23NCP24
N12NCN22NCN23NCN24
C189
X_C220P16X0402
VCCNCTF
VCCNCTF
VCCNCTF
NC
R12NCR24
VCCNCTF
VCCNCTF
VCCNCTF
NC
NC
T12
V12
U12
VCCNCTF
VCCNCTF
VCCNCTF
NC
NC
NC
Y12
W12
AA12NCAB12
V_FSB_VTT
VCCNCTF
VCCNCTF
VCCNCTF
NC
NC
AC23NCAC24NCAN19
VCCNCTF
VCCNCTF
VCCNCTF
NC
AJ14
AL28
VCCNCTF
VCCNCTF
VCCNCTF
NC
NC
NC
AG6
AH24
VCCNCTF
VCCNCTF
NC
NC
L19NCL12
P30
AD30
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
J12
F24NCF12
K12
E16
H17NCH15NCH12
C16
G12
HD_SWING VOLTAGE "10 MIL TRACE , 7 MIL
SPACE" HD_SWING S/B 1/4*VTT +/- 2%
AR35NCAR34
AR2NCAR1
AP35
PLACE DIVIDER RESISTOR NEAR VTT
R173
301R1%0402
R174
102R1%0402
C198
_C10000P16X0402/20%
D D
C C
HA#[3..31] 5
HADSTB#0 5
HADSTB#1 5
H_PCREQ# 5
H_BR#0 5,6
HBPRI# 5
HA#3
HA#4
HA#5
HA#6
HA#7
HA#8
HA#9
HA#10
HA#11
HA#12
HA#13
HA#14
HA#15
HA#16
HA#17
HA#18
HA#19
HA#20
HA#21
HA#22
HA#23
HA#24
HA#25
HA#26
HA#27
HA#28
HA#29
HA#30
HA#31
HBNR# 5
HLOCK# 5
HADS# 5
HXRCOMP
HXSCOMP
HXSWING
HREQ#0
HREQ#1
HREQ#2
HREQ#3
HREQ#4
HRS#0
HRS#1
HRS#2
HREQ#[0..4] 5
HIT# 5
HITM# 5
HDEFER# 5
HTRDY# 5
HDBSY# 5
HDRDY# 5
H_EDRDY 5
HRS#[0..2] 5
CK_H_MCH 17
B B
CK_H_MCH# 17
MS7_POK 15,24
H_CPURST# 5,6
PLTRST# 14,24
ICH_SYNC# 15
MCH_GTLREF
V_2P5_MCH
ICH_SYNC#
R228 8.2KR 0402
R183 20R1%0402
A A
V_FSB_VTT
HXRCOMP
R170 60.4R1%0402
C195
X_C2.2P50N0402
HXSCOMP
CAPS SHOULD BE PLACED NEAR MCH PIN
8
7
6
5
4
VCCNCTF
VCCNCTF
NC
NC
B35
AP1
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
NCB1NC
NC
(INTEL-915GV-B1)
A2
A34
Y24
HD0#
HD1#
HD2#
HD3#
VCCNCTF
HD4#
HD5#
HD6#
HD7#
HD8#
HD9#
HD10#
HD11#
HD12#
HD13#
HD14#
HD15#
HD16#
HD17#
HD18#
HD19#
HD20#
HD21#
HD22#
HD23#
HD24#
HD25#
HD26#
HD27#
HD28#
HD29#
HD30#
HD31#
HD32#
HD33#
HD34#
HD35#
HD36#
HD37#
HD38#
HD39#
HD40#
HD41#
HD42#
HD43#
HD44#
HD45#
HD46#
HD47#
HD48#
HD49#
HD50#
HD51#
HD52#
HD53#
HD54#
HD55#
HD56#
HD57#
HD58#
HD59#
HD60#
HD61#
HD62#
HD63#
DINV_0#
DINV_1#
DINV_2#
DINV_3#
HD_STBP0#
HD_STBN0#
HD_STBP1#
HD_STBN1#
HD_STBP2#
HD_STBN2#
HD_STBP3#
HD_STBN3#
3
J33
H33
J34
G35
H35
G34
F34
G33
D34
C33
D33
B34
C34
B33
C32
B32
E28
C30
D29
H28
G29
J27
F28
F27
E27
E25
G25
J25
K25
L25
L23
K23
J22
J24
K22
J21
M21
H23
M19
K21
H20
H19
M18
K18
K17
G18
H18
F17
A25
C27
C31
B30
B31
A31
B27
A29
C28
A28
C25
C26
D27
A27
E24
B25
E34
J26
K19
B26
E33
E35
H26
F26
J19
F19
B29
C29
HD#0
HD#1
HD#2
HD#3
HD#4
HD#5
HD#6
HD#7
HD#8
HD#9
HD#10
HD#11
HD#12
HD#13
HD#14
HD#15
HD#16
HD#17
HD#18
HD#19
HD#20
HD#21
HD#22
HD#23
HD#24
HD#25
HD#26
HD#27
HD#28
HD#29
HD#30
HD#31
HD#32
HD#33
HD#34
HD#35
HD#36
HD#37
HD#38
HD#39
HD#40
HD#41
HD#42
HD#43
HD#44
HD#45
HD#46
HD#47
HD#48
HD#49
HD#50
HD#51
HD#52
HD#53
HD#54
HD#55
HD#56
HD#57
HD#58
HD#59
HD#60
HD#61
HD#62
HD#63
HDBI#0
HDBI#1
HDBI#2
HDBI#3
HD#[0..63] 5
HDBI#[0..3] 5
HDSTBP#0 5
HDSTBN#0 5
HDSTBP#1 5
HDSTBN#1 5
HDSTBP#2 5
HDSTBN#2 5
HDSTBP#3 5
HDSTBN#3 5
Title
Intel Grantsdale_CPU
Size Document Number Re v
Custom
Date: Sheet
2
MICRO-START INT'L CO.,LTD.
MS-7131 100
of
83 0 Wednesday, November 24, 2004
1
Page 9
8
7
6
5
4
3
2
1
DQM_A[0..7] 12,13
SCKE_A1 12,13
SCKE_A0 12,13
DATA_A[0..63] 12,13
DQM_A7
DQM_A3
DQM_A6
DQM_A5
DQM_A2
DQM_A4
DATA_A3
AJ2
SADQ2
SADQ3
SBDQ0
SBDQ1
AJ6
DATA_B1
DATA_A4
AE2
SADQ4
SBDQ2
AL5
DATA_B2
DATA_A5
AE1
SADQ5
SBDQ3
AN6
DATA_B3
DATA_A6
AG3
SADQ6
SBDQ4
AG9
DATA_B4
DATA_A7
AH3
SADQ7
SBDQ5
AH4
DATA_B5
DATA_A8
AJ1
SADQ8
SBDQ6
AM5
DATA_B6
DATA_A9
AK2
SADQ9
SBDQ7
AL6
DATA_B7
DATA_A11
DATA_A10
AN4
AP4
SADQ10
SBDQ8
AJ7
AL7
DATA_B9
DATA_B8
DATA_A13
DATA_A12
AJ3
AK3
SADQ11
SADQ12
SBDQ9
SBDQ10
AF11
AE11
DATA_B10
DATA_B11
DATA_A15
DATA_A14
AP2
AP3
SADQ13
SADQ14
SBDQ11
SBDQ12
AJ8
AL8
DATA_B12
DATA_B13
DATA_A17
DATA_A16
AP5
AR5
SADQ15
SADQ16
SBDQ13
SBDQ14
AG10
AG11
DATA_B14
DATA_B15
DATA_A19
DATA_A18
AN8
AP9
SADQ17
SADQ18
SBDQ15
SBDQ16
AF13
AE13
DATA_B16
DATA_B17
DATA_A21
DATA_A20
AN5
AP6
SADQ19
SADQ20
SBDQ17
SBDQ18
AD14
AG14
DATA_B18
DATA_B19
DATA_A23
DATA_A22
AR8
AN9
SADQ21
SADQ22
SBDQ19
SBDQ20
AD12
AH12
DATA_B20
DATA_B21
DATA_A24
DATA_A25
AK16
AL17
SADQ23
SADQ24
SBDQ21
SBDQ22
AF14
AD15
DATA_B23
DATA_B22
DATA_A27
DATA_A26
AD17
AF19
SADQ25
SADQ26
SBDQ23
SBDQ24
AK19
AD18
DATA_B25
DATA_B24
DATA_A28
DATA_A29
AF16
AJ17
SADQ27
SADQ28
SBDQ25
SBDQ26
AE22
AH21
DATA_B26
DATA_B27
DATA_A31
DATA_A30
AE19
AH18
SADQ29
SADQ30
SBDQ27
SBDQ28
AL18
AH19
DATA_B29
DATA_B28
DATA_A32
DATA_A33
AH27
AK27
SADQ31
SADQ32
SBDQ29
SBDQ30
AF22
AD21
DATA_B30
DATA_B31
DATA_A35
DATA_A34
AN30
AK31
SADQ33
SADQ34
SBDQ31
SBDQ32
AF23
AF25
DATA_B33
DATA_B32
DATA_A2
DATA_A1
SACS0#
SACS1#
SACS2#
SACS3#
SARAS#
SACAS#
SAWE#
SAMA0
SAMA1
SAMA2
SAMA3
SAMA4
SAMA5
SAMA6
SAMA7
SAMA8
SAMA9
SAMA10
SAMA11
SAMA12
SAMA13
RSV
RSV
RSV
RSV
SABA0
SABA1
RSV
SADQS0
RSV
SADQS1
RSV
SADQS2
RSV
SADQS3
RSV
SADQS4
RSV
SADQS5
RSV
SADQS6
RSV
SADQS7
RSV
SACK0
SACK0#
SACK1
SACK1#
SACK2
SACK2#
SACK3
SACK3#
SACK4
SACK4#
SACK5
SACK5#
RSV
RSV_TP1
RSV_TP0
SMXSLEWIN
SMXSLEWOUT
SMVREF0
SRCOMP1
SRCOMP0
RSV
RSV
DATA_A0
AE3
SADQ0
AF3
SADQ1
AH2
AH7
D D
SCS_A#0
SCS_A#0 12,13
SCS_A#1
SCS_A#1 12,13
RAS_A# 12,13
CAS_A# 12,13
WE_A# 12,13
RAS_A#
CAS_A#
WE_A#
MAA_A0
MAA_A1
MAA_A2
MAA_A3
MAA_A4
MAA_A5
MAA_A6
MAA_A7
MAA_A8
MAA_A9
MAA_A10
MAA_A11
MAA_A12
MAA_A13
MAA_A[0..13] 12,13
C C
DQS_A[0..7] 12,13
SBS_A0 12,13
SBS_A1
SBS_A1 12,13
DQS_A0
DQS_A1
DQS_A2
DQS_A3
DQS_A4
DQS_A5
DQS_A6
DQS_A7
P_DDR0_A 12
N_DDR0_A 12
P_DDR1_A 12
N_DDR1_A 12
P_DDR2_A 12
N_DDR2_A 12
B B
P_DDR0_A
N_DDR0_A
P_DDR1_A
N_DDR1_A
P_DDR2_A
N_DDR2_A
SM_XSLEWIN
MCH_VREF_A
SMPCOMP_P
SMPCOMP_N
AM34
AL35
AK34
AL33
AN29
AL34
AP31
AN22
AP22
AN21
AP21
AM21
AP19
AR20
AN16
AN18
AM15
AN23
AP15
AP13
AB33
AP33
AR24
AR28
AR29
AN28
AP26
AR23
AG1
AG2
AP7
AR7
AF17
AG17
AM30
AL29
AG35
AG33
AA34
AA35
AM24
AN25
AN2
AN3
AB34
AC33
AP25
AN26
AM2
AM3
AC35
AC34
AN31
AH15
AE16
AJ12
AK12
AE7
AG8
AG4
AE5
U10B
AL3
AL2
U34
U35
AF5
MCH_VREF_A
PLACE 0.1UF CAP CLOSE TO MCH
C262
C100000P16Y0402
DATA_B0
DATA_A37
DATA_A36
AL27
AJ28
SADQ35
SADQ36
SBDQ33
SBDQ34
AJ26
AL25
DATA_B34
DATA_B35
DATA_A39
DATA_A38
AL30
AL31
SADQ37
SADQ38
SBDQ35
SBDQ36
AF24
AD23
DATA_B37
DATA_B36
DATA_A41
DATA_A40
AJ34
AH35
SADQ39
SADQ40
SBDQ37
SBDQ38
AJ25
AL26
DATA_B38
DATA_B39
DATA_A42
DATA_A43
AG32
AF34
SADQ41
SADQ42
SBDQ39
SBDQ40
AJ29
AJ31
DATA_B41
DATA_B40
DATA_A45
DATA_A44
AJ33
AH33
SADQ43
SADQ44
SBDQ41
SBDQ42
AG30
AG31
DATA_B42
DATA_B43
DATA_A46
DATA_A47
AF33
AE33
SADQ45
SADQ46
SBDQ43
SBDQ44
AK33
AK32
DATA_B44
DATA_B45
DATA_A49
DATA_A48
AE35
AE34
SADQ47
SADQ48
SBDQ45
SBDQ46
AF28
AG27
DATA_B47
DATA_B46
DATA_A51
DATA_A50
Y33
W34
SADQ49
SADQ50
SBDQ47
SBDQ48
AF27
AE31
DATA_B48
DATA_B49
DATA_A53
DATA_A52
AD31
AD35
SADQ51
SADQ52
SBDQ49
SBDQ50
AB27
AB26
DATA_B50
DATA_B51
DATA_A54
AA32
SADQ53
SBDQ51
AE29
DATA_B52
DATA_A55
DATA_A56
Y35
V34
SADQ54
SADQ55
SBDQ52
SBDQ53
AE27
AC28
DATA_B54
DATA_B53
DATA_A58
DATA_A57
V33
R32
SADQ56
SADQ57
SBDQ54
SBDQ55
AA29
AC26
DATA_B55
DATA_B56
DATA_A59
DATA_A60
R34
W35
SADQ58
SADQ59
SBDQ56
SBDQ57
U26
W29
DATA_B58
DATA_B57
DATA_A61
DATA_A62
W33
T33
SADQ60
SADQ61
SBDQ58
SBDQ59
V29
Y26
DATA_B60
DATA_B59
DATA_A63
T35
SADQ62
SADQ63
SBDQ60
SBDQ61
W26
AA28
DATA_B62
DATA_B61
DATA_B[0..63] 12,13
A A
SMPCOMP_P
8
VCC_DDR
R253 80.6R1%0402 R254 80.6R1%0402
C269
C0.1U25Y
SMPCOMP_N
7
6
5
SCKE_B0 12,13
SCKE_B1 12,13
DQM_B[0..7] 12,13
SCKE_A0
SCKE_A1
AL12
AN11
SACKE0
SBDQ62
SBDQ63
V28
DATA_B63
4
AP11
AR11
SACKE1
SACKE2
SBCKE0
AM9
AN10
SCKE_B0
SCKE_B1
DQM_A0
AF2
SACKE3
SBCKE1
SBCKE2
AR9
AP10
DQM_A1
AL1
AN7
SADM0
SADM1
SBCKE3
AJ5
DQM_B0
AH16
SADM2
SADM3
SBDM0
SBDM1
AH9
DQM_B1
AK29
SADM4
SBDM2
AH13
DQM_B2
AG34
AG20
DQM_B3
AA33
U33
SADM5
SADM6
SADM7
SMYSLEWIN
SMYSLEWOUT
SBDM3
SBDM4
SBDM5
SBDM6
AH31
AD24
AG24
DQM_B6
DQM_B5
DQM_B4
SBCS0#
SBCS1#
SBCS2#
SBCS3#
SBRAS#
SBCAS#
SBWE#
SBMA0
SBMA1
SBMA2
SBMA3
SBMA4
SBMA5
SBMA6
SBMA7
SBMA8
SBMA9
SBMA10
SBMA11
SBMA12
SBMA13
RSV
RSV
RSV
RSV
SBBA0
SBBA1
RSV
SBDQS0
RSV
SBDQS1
RSV
SBDQS2
RSV
SBDQS3
RSV
SBDQS4
RSV
SBDQS5
RSV
SBDQS6
RSV
SBDQS7
RSV
SBCK0
SBCK0#
SBCK1
SBCK1#
SBCK2
SBCK2#
SBCK3
SBCK3#
SBCK4
SBCK4#
SBCK5
SBCK5#
RSV
RSV_TP3
RSV_TP2
SMVREF1
SBDM7
(INTEL-915GV-B1)
W31
DQM_B7
SCS_B#0
AP34
AN34
AN33
AM33
AP27
AN27
AR27
AM18
AP18
AN17
AR16
AR15
AN15
AP17
AL15
AP14
AN13
AN20
AR12
AM12
AD32
AN32
AP29
AP30
AP32
AM27
AR19
AP23
AK5
AL4
AK10
AH10
AK13
AL14
AD20
AF20
AH25
AG26
AH28
AH30
AB31
AC30
W27
Y28
AH22
AG23
AL11
AJ11
AE26
AE25
AL23
AK22
AK9
AL9
AD29
AD28
AL24
AK15
AN14
AF9
AE10
AE8
SCS_B#1
RAS_B#
CAS_B#
WE_B#
MAA_B0
MAA_B1
MAA_B2
MAA_B3
MAA_B4
MAA_B5
MAA_B6
MAA_B7
MAA_B8
MAA_B9
MAA_B10
MAA_B11
MAA_B12
MAA_B13
SBS_B0 SBS_A0
SBS_B1
DQS_B0
DQS_B1
DQS_B2
DQS_B3
DQS_B4
DQS_B5
DQS_B6
DQS_B7
P_DDR0_B
N_DDR0_B
P_DDR1_B
N_DDR1_B
P_DDR2_B
N_DDR2_B
SM_YSLEWIN
MCH_VREF_B
SCS_B#0 12,13
SCS_B#1 12,13
RAS_B# 12,13
CAS_B# 12,13
WE_B# 12,13
SBS_B0 12,13
SBS_B1 12,13
P_DDR0_B 12
N_DDR0_B 12
P_DDR1_B 12
N_DDR1_B 12
P_DDR2_B 12
N_DDR2_B 12
C261
C100000P16Y0402
PLACE 0.1UF CAP CLOSE TO MCH
3
MAA_B[0..13] 12,13
DQS_B[0..7] 12,13
VCC_DDR
R251 1KR1%0402
Title
Size Document Number Re v
Date: Sheet
R244 0R0402
MCH_VREF_A
R245
1KR1%0402
MICRO-START INT'L CO.,LTD.
Intel Gra ntsdale_Memory
Custom
MS-7131 100
2
MCH_VREF_B
93 0 Wednesday, November 24, 2004
1
of
Page 10
8
D D
DMI_ITP_MRP_0 14
C C
H_FSBSEL0 5,6,17
H_FSBSEL1 5,6,17
H_FSBSEL2 5,6,17
B B
X_COPPER
V_1P5_CORE
A A
V_1P5_CORE V_1P5_CORE
L6 X_10U100m_0805
X_COPPER
L12 X_10U100m_0805
8
DMI_ITN_MRN_0 14
DMI_ITP_MRP_1 14
DMI_ITN_MRN_1 14
DMI_ITP_MRP_2 14
DMI_ITN_MRN_2 14
DMI_ITP_MRP_3 14
DMI_ITN_MRN_3 14
CK_PE_100M_MCH 17
CK_PE_100M_MCH# 17
H_FSBSEL0
R179 10KR0402
H_FSBSEL1
R190 10KR0402
H_FSBSEL2
R184 10KR0402
R205 X_1KR1%0402
R204 X_1KR1%0402
V_2P5_DAC_FILTERED
V_FSB_VTT
CP5
FSB GENERIC DECOUPLING
C215
X_C0.22U16Y
CP11
V_1P5_CORE
V_2P5_MCH
C193
C100000P16Y0402
VCCA_MPLL
C219
X_C10U10Y0805
VCCA_DPLLB
C260
X_C10U10Y0805
7
DMI_ITP_MRP_0
DMI_ITN_MRN_0
DMI_ITP_MRP_1
DMI_ITN_MRN_1
DMI_ITP_MRP_2
DMI_ITN_MRN_2
DMI_ITP_MRP_3
DMI_ITN_MRN_3
CK_PE_100M_MCH
CK_PE_100M_MCH#
BSEL0
BSEL1
BSEL2
MTYPE
EXP_SLR
VCCA_HPLL VCCA_HPLL
VCCA_MPLL
VCCA_DPLLA
VCCA_DPLLB
VCCA_GPLL
C217
C100000P16Y0402
C251
C100000P16Y0402
7
6
V_1P5_CORE
AD10
AD9
AD8
AD7
AD6
AD5
AD4
AD3
AD2
AD1
AC10
AC9
AC8
AC7
AC6
AC5
AC4
AC3
AC2
AC1
AB10
AB9
VCC
VTT
C21
C20
VCC
VTT
VCC
VCC
VTT
VTT
B22
B21
C19
AB8
VCC
VCC
VTT
VTT
B20
B19
C244
C100000P16Y0402
C223
C100000P16Y0402
U10C
E11
EXPARXP0
F11
EXPARXN0
J11
EXPARXP1
H11
EXPARXN1
F9
EXPARXP2
E9
EXPARXN2
F7
EXPARXP3
E7
EXPARXN3
B3
EXPARXP4
B4
EXPARXN4
D5
EXPARXP5
E5
EXPARXN5
G6
EXPARXP6
G5
EXPARXN6
H8
EXPARXP7
H7
EXPARXN7
J6
EXPARXP8
J5
EXPARXN8
K8
EXPARXP9
K7
EXPARXN9
L6
EXPARXP10
L5
EXPARXN10
P10
EXPARXP11
R10
EXPARXN11
M8
EXPARXP12
M7
EXPARXN12
N6
EXPARXP13
N5
EXPARXN13
P7
EXPARXP14
P8
EXPARXN14
R6
EXPARXP15
R5
EXPARXN15
U5
DMI RXP0
U6
DMI RXN0
T9
DMI RXP1
T8
DMI RXN1
V7
DMI RXP2
V8
DMI RXN2
V10
DMI RXP3
U10
DMI RXN3
A11
GCLKINP
B11
GCLKINN
K13
SDVOCTRLDATA
J13
SDVOCTRLCLK
H16
BSEL0
E15
BSEL1
D17
BSEL2
M16
RSV
F15
RSV
C15
MTYPE
A16
EXP_SLR
B15
RSV
C14
RSV
K15
RSV
L10
VCC
M10
VSS
A17
VCCAHPLL
B17
VCCAMPLL
A12
VCCADPLLA
B13
VCCADPLLB
A14
VCCA3GPLL
A13
VCCHV
E13
VCCACRTDAC
D13
VCCACRTDAC
F13
VSSACRTDAC
(INTEL-915GV-B1)
C188
C100000P16Y0402
V_1P5_CORE V_1P5_CORE
VCC
VCC
VCC
VCC
VCC
VCC
VTT
VTT
VTT
VTT
VTT
F22
F21
H22
G22
G21
C200
C100000P16Y0402
CP10
X_COPPER
L10 X_10U100m_0805
CP6
X_COPPER
L7 X_10U100m_0805
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
F20
E22
E21
E20
E19
D22
D21
D20
D19
C22
VCCA_DPLLA
C247
X_C10U10Y0805
VCCA_HPLL V_1P5_PCIEXPRESS
C226
X_C10U10Y0805
6
AB7
VCC
VTT
A22
VCC
VTT
AB6
AB5
VCC
VTT
A21
A20
AB4
AB3
AB2
AB1
VCC
VCC
VCC
VCC
VTT
VTT
A19
AC25
V_1P5_CORE
5
VCC_DDR
AR33
W18
V19
V17
U18
VCC
VCC
VCC
VCC
VCC
VCCSM
VSSNCTF
VSSNCTF
VSSNCTF
VSSNCTF
VSSNCTF
VSSNCTF
VSSNCTF
VSSNCTF
Y25
Y18
Y11
W25
AB25
AA25
AA11
L8 10U100m_0805
L9 X_10U100m_0805
5
AR31
AR26
AR22
VCCSM
VCCSM
VSSNCTF
VSSNCTF
V25
V20
W11
CP9
X_COPPER
AR18
AR14
AR10
AP28
VCCSM
VCCSM
VCCSM
VCCSM
VSSNCTF
VSSNCTF
VSSNCTF
VSSNCTF
V16
V11
U25
U11
R208 0R0402
AP24
AP20
VCCSM
VCCSM
VCCSM
VSSNCTF
VSSNCTF
VSSNCTF
T25
T18
C250
C258
AP16
AP12
AN35
AM32
VCCSM
VCCSM
VCCSM
VSSNCTF
VSSNCTF
VSSNCTF
T11
P25
R25
R11
C232
X_C10U10Y0805
AM28
AM26
VCCSM
VCCSM
VCCSM
VSSNCTF
VSSNCTF
VSSNCTF
P11
N25
VCCA_GPLL
4
AM25
AM23
AM22
AM20
AM19
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VSSNCTF
VSSNCTF
VSSNCTF
VSSNCTF
VSSNCTF
N11
M11
AA15
AA17
AD25
C10U10Y0805
X_C10U10Y0805
4
AM17
AM16
AM14
AM13
AM11
AM10
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VSSNCTF
VSSNCTF
VSSNCTF
VSSNCTF
VSSNCTF
P16
P18
P20
N17
N19
AA19
V_2P5_MCH
C228
C100000P16Y0402
3
AK35
VCC3GW1VCC3GW2VCC3GW3VCC3GW4VCC3GW6VCC3GW7VCC3GW8VCC3GW9VCC3GY1VCC3GY2VCC3GY3VCC3GY4VCC3GY5VCC3GY6VCC3GY7VCC3GY8VCC3G
VCCSM
VCCSM
VSSNCTF
VSSNCTF
VSSNCTF
VSSNCTF
VSSNCTF
VSSNCTF
VSSNCTF
VSSNCTF
VSSNCTF
VSSNCTF
VSSNCTF
VSSNCTF
VSSNCTF
T22
V22
R17
R19
R21
U15
Y22
U21
U23
W15
W21
W23
L11 0.1U50m
C264
C10U10Y0805
BSEL
0 2
1
PSB FREQUENCY
1
0
0 133 MHZ (533)
0 1 200 MHZ (800) 0
3
V_1P5_PCIEXPRESS
Y9
EXPATXP0
EXPATXN0
EXPATXP1
EXPATXN1
EXPATXP2
EXPATXN2
EXPATXP3
EXPATXN3
EXPATXP4
EXPATXN4
EXPATXP5
EXPATXN5
EXPATXP6
EXPATXN6
EXPATXP7
EXPATXN7
EXPATXP8
EXPATXN8
EXPATXP9
EXPATXN9
EXPATXP10
EXPATXN10
EXPATXP11
EXPATXN11
EXPATXP12
EXPATXN12
EXPATXP13
EXPATXN13
EXPATXP14
EXPATXN14
EXPATXP15
EXPATXN15
DMI TXP0
DMI TXN0
DMI TXP1
DMI TXN1
DMI TXP2
DMI TXN2
DMI TXP3
DMI TXN3
EXPACOMPO
EXPACOMPI
CRTHSYNC
CRTVSYNC
CRTRED
CRTGREEN
CRTBLUE
CRTREDB
CRTGREENB
CTRBLUEB
CRTDDCDATA
CRTDDCCLK
DREFCLKINP
DREFCLKINN
CRTIREF
PMEXTTS
PMBMBUSY#
TESTIN#
MCHDETECT
V_2P5_DAC_FILTERED
C252
C100000P16Y0402
TABLE
2
V_1P5_CORE
C222
C10
C9
A9
A8
C8
C7
A7
A6
C6
C5
C2
D2
E3
F3
F1
G1
G3
H3
H1
J1
J3
K3
K1
L1
L3
M3
M1
N1
N3
P3
P1
R1
DMI_MTP_IRP_0
R3
DMI_MTN_IRN_0
T3
DMI_MTP_IRP_1
T1
DMI_MTN_IRN_1
U1
DMI_MTP_IRP_2
U3
DMI_MTN_IRN_2
V3
DMI_MTP_IRP_3
V5
DMI_MTN_IRN_3
W5
GRCOMP
Y10
W10
HSYNC_27980312
E12
VSYNC_27980314
D12
F14
D14
H14
G14
E14
J14
3VDDCDA
L14
3VDDCCL
M15
CK_96M_DREF
M13
CK_96M_DREF#
M12
DACREFSET
A15
EXTTS
K16
G16
R35
To prevent Grantsdale VSYNC and HSYNC signal level issue
A35
C257
_C10000P16X0402/20%
DMI_MTP_IRP_0 14
DMI_MTN_IRN_0 14
DMI_MTP_IRP_1 14
DMI_MTN_IRN_1 14
DMI_MTP_IRP_2 14
DMI_MTN_IRN_2 14
DMI_MTP_IRP_3 14
DMI_MTN_IRN_3 14
V_1P5_PCIEXPRESS
R233
24.9R1%0402
CRT_R
CRT_R 25
CRT_G
CRT_G 25
CRT_B
CRT_B 25
3VDDCDA 25
3VDDCCL 25
CK_96M_DREF 17
CK_96M_DREF# 17
R207 255R1%
R227 10KR0402
Title
Size Document Number Re v
Custom
Date: Sheet
2
V_2P5_MCH
1
HSYNC_27980312
2
5
VSYNC_27980314
6
Intel Grantsdale_PCI EXPRESS
MS-7131 100
C273
VCC_DDR
C175 C10U10Y0805
C170 C10U10Y0805
C218 C10U10Y0805
VCC_DDR
C196 C10U10Y0805
C171 C10U10Y0805
C231 C10U10Y0805
MCH MEMORY DEC O UPLING
VCC3
8 4
7
CRT_HSYNC 25
U11A
NC7WZ08_US8
VCC3
C270
8 4
C100000P16Y0402
3
CRT_VSYNC 25
U11B
NC7WZ08_US8
MICRO-START INT'L CO.,LTD.
1
X_C10U10Y0805
C10U10Y0805
of
10 30 Wednesday, November 24, 2004
1
Page 11
8
7
6
5
4
3
2
1
D D
C C
B B
AR30
AR25
AR21
AR17
AR13
AR6
AR3
AP8
AN1
AM31
AM29
AM8
AM7
AM6
AM4
AL32
AL22
AL19
AL16
AL13
AL10
AK30
AK28
AK26
AK25
AK23
AK20
AK17
AK14
AK11
AK8
AK7
AK6
AK4
AK1
AJ35
AJ32
AJ30
AJ27
AJ22
AJ19
AJ16
AJ15
AJ13
AJ10
AJ9
AJ4
AH34
AH32
AH29
AH26
AH23
AH20
AH17
AH14
AH11
AH8
AH6
AH5
AH1
AG29
AG28
AG25
AG22
AG21
AG19
AG18
AG16
AG15
AG13
AG12
AG5
AF35
AF32
AF31
AF30
AF29
AF26
AF21
AF18
AF15
AF12
AF10
AF8
AF6
AF4
AF1
AE32
AE30
AE28
AE24
AE23
AE21
AE20
AE18
AE17
AE15
AE14
AE12
AE9
AE6
AE4
AD34
AD27
AD26
AD22
VSS
VSS
VSS
VSS
VSS
VSS
VSS
P27
P29
P31
AD19
VSS
VSS
AD16
VSS
AD13
VSS
AD11
VSS
AC32
VSS
AC31
VSS
AC29
VSS
AC27
VSS
AB35
VSS
AB32
VSS
AB30
VSS
AB28
VSS
AA27
VSS
AA26
VSS
AA10
VSS
AA9
VSS
AA8
VSS
AA7
VSS
AA6
VSS
AA5
VSS
AA4
VSS
AA3
VSS
AA2
VSS
AA1
VSS
Y34
VSS
Y32
VSS
Y31
VSS
Y29
VSS
Y27
VSS
W32
VSS
W30
VSS
W28
VSS
W19
VSS
W17
VSS
V35
VSS
V27
VSS
V26
VSS
V18
VSS
V9
VSS
V6
VSS
V4
VSS
V2
VSS
V1
VSS
U32
VSS
U31
VSS
U29
VSS
U27
VSS
U19
VSS
U17
VSS
U9
VSS
U8
VSS
U7
VSS
U4
VSS
U2
VSS
T34
VSS
T32
VSS
T30
VSS
T28
VSS
T10
VSS
T7
VSS
T6
VSS
T5
VSS
T4
VSS
T2
VSS
R27
VSS
R26
VSS
R9
VSS
R8
VSS
R7
VSS
R4
VSS
R2
VSS
P35
VSS
P32
VSS
(INTEL-915GV-B1)
U10D
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
N10
VSS
VSS
N28
N30
VSS
VSS
VSSP2VSSP4VSSP5VSSP6VSSP9VSS
N32
A3
VSS
A5
VSS
A10
VSS
A18
VSS
A26
VSS
A30
VSS
A33
VSS
B2
VSS
B5
VSS
B6
VSS
B7
VSS
B8
VSS
B9
VSS
B10
VSS
B12
VSS
B14
VSS
B16
VSS
B18
VSS
B24
VSS
B28
VSS
C1
VSS
C3
VSS
C4
VSS
C11
VSS
C13
VSS
C17
VSS
C18
VSS
C23
VSS
C35
VSS
D3
VSS
D4
VSS
D6
VSS
D7
VSS
D8
VSS
D9
VSS
D10
VSS
D11
VSS
D15
VSS
D16
VSS
D18
VSS
D23
VSS
D25
VSS
D26
VSS
D28
VSS
D30
VSS
D31
VSS
D32
VSS
E1
VSS
E2
VSS
E4
VSS
E6
VSS
E8
VSS
E10
VSS
E17
VSS
E18
VSS
E23
VSS
E26
VSS
E29
VSS
F2
VSS
F4
VSS
F5
VSS
F6
VSS
F8
VSS
F10
VSS
F16
VSS
F18
VSS
F23
VSS
F25
VSS
F29
VSS
F30
VSS
F32
VSS
F35
VSS
VSSG2VSSG4VSSG7VSSG8VSSG9VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSSH2VSSH4VSSH5VSSH6VSSH9VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSSJ2VSSJ4VSSJ7VSSJ8VSSJ9VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSSK2VSSK4VSSK5VSSK6VSSK9VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSSL2VSSL4VSSL7VSSL8VSSL9VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSSM2VSSM4VSSM5VSSM6VSSM9VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSSN2VSSN4VSSN7VSSN8VSSN9VSS
J10
J15
J16
J17
J18
J20
J23
J30
K10
K11
K14
K20
K24
K26
K28
K31
H10
H13
H21
H24
H25
H27
H30
H32
G10
G11
G13
G15
G17
G19
G20
G23
G26
G27
G28
H34
K32
L11
L13
L15
L16
L17
L18
L20
L21
L22
L24
L27
L30
K35
L32
M17
M20
M24
M25
M27
M29
M34
A A
Title
Intel Grantsdale_GND
Size Document Number Re v
Custom
8
7
6
5
4
3
Date: Sheet
2
MICRO-START INT'L CO.,LTD.
MS-7131 100
of
11 30 Wednesday, November 24, 2004
1
Page 12
8
7
6
5
4
3
2
1
Channel A DDR DIMM1
48
43
41
130
37
32
125
29
122
27
141
118
115
167
59
52
113
157
158
71
163
154
65
63
5
14
25
36
56
67
78
86
47
97
107
119
129
149
159
169
177
140
44
45
49
51
134
135
142
144
21
111
92
91
181
182
183
16
17
137
138
76
75
82
184
7
38
46
70
85
108
120
148
168
81
89
93
100
116
124
132
139
145
152
160
176
DDR1
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10/AP
A11
A12/NC
A13/NC
BA0
BA1
NC/BA2
CS0#
CS1#
NC/CS2#
NC/CS3#
RAS#
CAS#
WE#
DQS0
DQS1
DQS2
DQS3
DQS4
DQS5
DQS6
DQS7
DQS8
DQM0/DQS9
DQM1/DQS10
DQM2/DQS11
DQM3/DQS12
DQM4/DQS13
DQM5/DQS14
DQM6/DQS15
DQM7/DQS16
DQM8/DQS17
MECC0
MECC1
MECC2
MECC3
MECC4
MECC5
MECC6
MECC7
CKE0
CKE1
SCL
SDA
SA0
SA1
SA2
CK0/NC
CK0#/NC
CK1/CK0
CK1#/CK0#
CK2/NC
CK2#/NC
ID_VDD
SPD_VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
DIMM-184
SIGNALS
POWER
DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQ8
DQ9
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
DQ16
DQ17
DQ18
DQ19
DQ20
DQ21
DQ22
DQ23
DQ24
DQ25
DQ26
DQ27
DQ28
DQ29
DQ30
DQ31
DQ32
DQ33
DQ34
DQ35
DQ36
DQ37
DQ38
DQ39
DQ40
DQ41
DQ42
DQ43
DQ44
DQ45
DQ46
DQ47
DQ48
DQ49
DQ50
DQ51
DQ52
DQ53
DQ54
DQ55
DQ56
DQ57
DQ58
DQ59
DQ60
DQ61
DQ62
DQ63
VREF
FETEN/NC
NC/RESET#
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
6
DATA_A0
2
DATA_A1
4
DATA_A2
6
DATA_A3
8
DATA_A4
94
DATA_A5
95
DATA_A6
98
DATA_A7
99
DATA_A8
12
DATA_A9
13
DATA_A10
19
DATA_A11
20
DATA_A12
105
DATA_A13
106
DATA_A14
109
DATA_A15
110
DATA_A16
23
DATA_A17
24
DATA_A18
28
DATA_A19
31
DATA_A20
114
DATA_A21
117
DATA_A22
121
DATA_A23
123
DATA_A24
33
DATA_A25
35
DATA_A26
39
DATA_A27
40
DATA_A28
126
DATA_A29
127
DATA_A30
131
DATA_A31
133
DATA_A32
53
DATA_A33
55
DATA_A34
57
DATA_A35
60
DATA_A36
146
DATA_A37
147
DATA_A38
150
DATA_A39
151
DATA_A40
61
DATA_A41
64
DATA_A42
68
DATA_A43
69
DATA_A44
153
DATA_A45
155
DATA_A46
161
DATA_A47
162
DATA_A48
72
DATA_A49
73
DATA_A50
79
DATA_A51
80
DATA_A52
165
DATA_A53
166
DATA_A54
170
DATA_A55
171
DATA_A56
83
DATA_A57
84
DATA_A58
87
DATA_A59
88
DATA_A60
174
DATA_A61
175
DATA_A62
178
DATA_A63
179
DIMM VREF => Plase close DIMM < 1"
9
NC
101
NC
NC
NC
WP
Trace width 12 mils & 12mils
102
space.
173
DIMM_VREF
1
90
103
10
15
22
30
54
62
77
96
104
112
128
136
143
156
164
172
180
3
11
18
26
34
42
50
58
66
74
C265
C0.1U25Y
MAA_A0
MAA_A1
MAA_A2
VCC3
VCC_DDR
7
MAA_A3
MAA_A4
MAA_A5
MAA_A6
MAA_A7
MAA_A8
MAA_A9
MAA_A10
MAA_A11
MAA_A12
MAA_A13
SBS_A0
SBS_A1
SCS_A#0
SCS_A#1
RAS_A#
CAS_A#
WE_A#
DQS_A0
DQS_A1
DQS_A2
DQS_A3
DQS_A4
DQS_A5
DQS_A6
DQS_A7
DQM_A0
DQM_A1
DQM_A2
DQM_A3
DQM_A4
DQM_A5
DQM_A6
DQM_A7
D D
SBS_A0 9,13
SBS_A1 9,13
SCS_A#0 9,13
SCS_A#1 9,13
RAS_A# 9,13
CAS_A# 9,13
WE_A# 9,13
C C
DQM_A[0..7] 9,13
SCKE_A0 9,13
SCKE_A1 9,13
SMBCLK 15,17,22,24
SMBDATA 15,17,22,24
B B
A A
8
ADDRESS: 000
0xA0
P_DDR1_A 9
N_DDR1_A 9
P_DDR0_A 9
N_DDR0_A 9
P_DDR2_A 9
N_DDR2_A 9
DATA_A[0..63] 9,13 MAA_A[0..13] 9,13
PLACE CLOSE TO DIMM PIN
VCC_DDR
VCC_DDR
R248 1KR1%
DIMM_VREF
R247
1KR1%
5
Channel B
MAA_B[0..13] 9,13 DATA_B[0..63] 9,13
SBS_B0 9,13
SBS_B1 9,13
SCS_B#0 9,13
SCS_B#1 9,13
DQS_B[0..7] 9,13 DQS_A[0..7] 9,13
DQM_B[0..7] 9,13
SCKE_B0 9,13
SCKE_B1 9,13
SMBDATA 15,17,22,24
ADDRESS: 010
0xA4
P_DDR1_B 9
N_DDR1_B 9
P_DDR0_B 9
N_DDR0_B 9
P_DDR2_B 9
N_DDR2_B 9
RAS_B# 9,13
CAS_B# 9,13
WE_B# 9,13
SMBCLK 15,17,22,24
VCC_DDR
VCC3
SBS_B0
SBS_B1
SCS_B#0
SCS_B#1
VCC3
MAA_B0
MAA_B1
MAA_B2
MAA_B3
MAA_B4
MAA_B5
MAA_B6
MAA_B7
MAA_B8
MAA_B9
MAA_B10
MAA_B11
MAA_B12
MAA_B13
RAS_B#
CAS_B#
WE_B#
DQS_B0
DQS_B1
DQS_B2
DQS_B3
DQS_B4
DQS_B5
DQS_B6
DQS_B7
DQM_B0
DQM_B1
DQM_B2
DQM_B3
DQM_B4
DQM_B5
DQM_B6
DQM_B7
4
48
43
41
130
37
32
125
29
122
27
141
118
115
167
59
52
113
157
158
71
163
154
65
63
5
14
25
36
56
67
78
86
47
97
107
119
129
149
159
169
177
140
44
45
49
51
134
135
142
144
21
111
92
91
181
182
183
16
17
137
138
76
75
82
184
7
38
46
70
85
108
120
148
168
81
89
93
100
116
124
132
139
145
152
160
176
DDR2
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10/AP
A11
A12/NC
A13/NC
BA0
BA1
NC/BA2
CS0#
CS1#
NC/CS2#
NC/CS3#
RAS#
CAS#
WE#
DQS0
DQS1
DQS2
DQS3
DQS4
DQS5
DQS6
DQS7
DQS8
DQM0/DQS9
DQM1/DQS10
DQM2/DQS11
DQM3/DQS12
DQM4/DQS13
DQM5/DQS14
DQM6/DQS15
DQM7/DQS16
DQM8/DQS17
MECC0
MECC1
MECC2
MECC3
MECC4
MECC5
MECC6
MECC7
CKE0
CKE1
SCL
SDA
SA0
SA1
SA2
CK0/NC
CK0#/NC
CK1/CK0
CK1#/CK0#
CK2/NC
CK2#/NC
ID_VDD
SPD_VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
DIMM-184
DDR DIMM2
SIGNALS
POWER
DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQ8
DQ9
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
DQ16
DQ17
DQ18
DQ19
DQ20
DQ21
DQ22
DQ23
DQ24
DQ25
DQ26
DQ27
DQ28
DQ29
DQ30
DQ31
DQ32
DQ33
DQ34
DQ35
DQ36
DQ37
DQ38
DQ39
DQ40
DQ41
DQ42
DQ43
DQ44
DQ45
DQ46
DQ47
DQ48
DQ49
DQ50
DQ51
DQ52
DQ53
DQ54
DQ55
DQ56
DQ57
DQ58
DQ59
DQ60
DQ61
DQ62
DQ63
VREF
FETEN/NC
NC/RESET#
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
DATA_B0
2
DATA_B1
4
DATA_B2
6
DATA_B3
8
DATA_B4
94
DATA_B5
95
DATA_B6
98
DATA_B7
99
DATA_B8
12
DATA_B9
13
DATA_B10
19
DATA_B11
20
DATA_B12
105
DATA_B13
106
DATA_B14
109
DATA_B15
110
DATA_B16
23
DATA_B17
24
DATA_B18
28
DATA_B19
31
DATA_B20
114
DATA_B21
117
DATA_B22
121
DATA_B23
123
DATA_B24
33
DATA_B25
35
DATA_B26
39
DATA_B27
40
DATA_B28
126
DATA_B29
127
DATA_B30
131
DATA_B31
133
DATA_B32
53
DATA_B33
55
DATA_B34
57
DATA_B35
60
DATA_B36
146
DATA_B37
147
DATA_B38
150
DATA_B39
151
DATA_B40
61
DATA_B41
64
DATA_B42
68
DATA_B43
69
DATA_B44
153
DATA_B45
155
DATA_B46
161
DATA_B47
162
DATA_B48
72
DATA_B49
73
DATA_B50
79
DATA_B51
80
DATA_B52
165
DATA_B53
166
DATA_B54
170
DATA_B55
171
DATA_B56
83
DATA_B57
84
DATA_B58
87
DATA_B59
88
DATA_B60
174
DATA_B61
175
DATA_B62
178
DATA_B63
179
9
NC
101
NC
102
NC
173
NC
1
90
WP
103
10
15
22
30
54
62
77
96
104
112
128
136
143
156
164
172
180
3
11
18
26
34
42
50
58
66
74
3
DIMM VREF => Plase close DIMM < 1"
Trace width 12 mils & 12mils
space.
DIMM_VREF
C248
PLACE CLOSE TO DIMM PIN
C0.1U25Y
VCC_DDR
Title
Size Document Number Re v
Date: Sheet
MICRO-START INT'L CO.,LTD.
DDR DIMM 1 & 2
Custom
MS-7131 100
2
of
12 30 Wednesday, November 24, 2004
1
Page 13
8
7
6
5
4
3
2
1
PLACED AT LEFT AND RIGHT ENDS OF VTT ISLAND
VTT_DDR
C55 C4 .7U 35Y1206
C137 C4.7U35Y1206
D D
CHANNEL A ADDRESS/CONTROL STITCHING CAPS
VTT_DDR
C133 X_C100000P16Y0402
C73 X_C100000P16Y0402
C221 X_C100000P16Y0402
C238 C56P50N0402
C227 X_C100000P16Y0402
C151 X_C100000P16Y0402
C111 X_C100000P16Y0402
VCC_DDR
CHANNEL A V_SM_VTT DECOULPING CAPS
C C
C67 X_C0.1U25Y
C145 X_C0.1U25Y
C56 X_C0.1U25Y
C153 X_C0.1U25Y
C132 X_C0.1U25Y
C167 C0.1U25Y
C95 C0.1U25Y
VTT_DDR VTT_DDR VTT_DDR VTT_DDR
C63 C0.1U25Y
C75 C0.1U25Y
C126 C0.1U25Y
C160 C0.1U25Y
C173 C0.1U25Y
C229 C56P 50N
C186 C0.1U25Y
PLACED AT LEFT AND RIGHT ENDS OF VTT ISLAND
VTT_DDR
C157 C4.7U35Y1206
C225 C4.7U35Y1206
CHANNEL B ADDRESS/CONTROL STITCHING CAPS
VTT_DDR
C143 X_C100000P16Y0402
C192 X_C100000P16Y0402
C220 X_C100000P16Y0402
C206 X_C100000P16Y0402
C130 X_C100000P16Y0402
C71 X_C100000P16Y0402
C172 X_C100000P16Y0402
VCC_DDR
CHANNEL B V_SM_VTT DECOULPING CAPS
C161 C56P50N
C176 C56P50N
C234 C56P50N
C136 C56P50N
C205 C56P50N
C66 C56P 50N
C114 C56P50N
C74 C0.1U25Y
C118 C0.1U25Y
C191 C0.1U25Y
C169 C0.1U25Y
C60 C0.1U25Y
C127 C0.1U25Y
C107 C0.1U25Y
DQS_A7
DQM_A7
DATA_A57
DATA_A56
DATA_A37
DATA_A33
DATA_A36
DATA_A32
DATA_A53
DATA_A52
DATA_A49
DATA_A48
DATA_A11
DATA_A10
DATA_A15
DATA_A14
DQS_A5
DQM_A5
DATA_A41
DATA_A45
DATA_A20
SCS_A#1 9,12
SCS_A#0 9,12
SCKE_A0 9,12
SCKE_A1 9,12
MAA_A1
MAA_A2
MAA_A5
MAA_A8
MAA_A7
MAA_A3
MAA_A4
MAA_A10
MAA_A0
MAA_A6
MAA_A9
MAA_A11
MAA_A12
MAA_A13
SBS_A0 9,12
SBS_A1 9,12
WE_A# 9,12
RAS_A# 9,12
CAS_A# 9,12
1 2
3 4
5 6
7 8
1 2
3 4
5 6
7 8
1 2
3 4
5 6
7 8
1 2
3 4
5 6
7 8
R91 56R0402
R93 56R0402
R107 56R0402
R111 56R0402
R182 56R0402
R95 56R0402
R105 56R0402
R181 56R0402
R185 56R0402
R139 47R0402
R141 47R0402
R150 47R0402
R159 47R0402
R160 47R0402
R145 47R0402
R147 47R0402
R134 47R0402
R136 47R0402
R149 47R0402
R165 47R0402
R169 47R0402
R178 47R0402
R82 47R0402
R119 47R0402
R131 47R0402
R113 47R0402
R114 47R0402
R97 47R0402
RN7
8P4R-56R0402
RN26
8P4R-56R0402
RN17
8P4R-56R0402
RN40
8P4R-56R0402
VTT_DDR
DATA_A12
DATA_A8
DATA_A3
DATA_A7
DATA_A2
DATA_A6
DQS_A0
DQM_A0
DQM_A1
DQS_A1
DATA_A13
DATA_A9
DQS_A2
DATA_A17
DATA_A21
DATA_A16
DATA_A18
DATA_A22
DQM_A2
DQM_A3
DQS_A3
DATA_A29
DATA_A25
DATA_A31
DATA_A27
DATA_A26
DATA_A30
DATA_A38
DQM_A4
DATA_A34
DQS_A4
DATA_A40
DATA_A44
DATA_A35
DATA_A39
DATA_A28
DATA_A24
DATA_A19
DATA_A23
DATA_A1
DATA_A0
DATA_A5
DATA_A4
DATA_A47
DATA_A46
DATA_A43
DATA_A42
DATA_A61
DATA_A60
DATA_A51
DATA_A50
DATA_A59
DATA_A58
DATA_A63
DATA_A62
DATA_A55
DATA_A54
DQS_A6
DQM_A6
1 2
3 4
5 6
7 8
1 2
3 4
5 6
7 8
1 2
3 4
5 6
7 8
1 2
3 4
5 6
7 8
1 2
3 4
5 6
7 8
1 2
3 4
5 6
7 8
1 2
3 4
5 6
7 8
1 2
3 4
5 6
7 8
1 2
3 4
5 6
7 8
1 2
3 4
5 6
7 8
1 2
3 4
5 6
7 8
1 2
3 4
5 6
7 8
1 2
3 4
5 6
7 8
1 2
3 4
5 6
7 8
1 2
3 4
5 6
7 8
RN45
8P4R-56R0402
RN47
8P4R-56R0402
RN42
8P4R-56R0402
RN38
8P4R-56R0402
RN36
8P4R-56R0402
RN32
8P4R-56R0402
RN30
8P4R-56R0402
RN24
8P4R-56R0402
RN22
8P4R-56R0402
RN34
8P4R-56R0402
RN48
8P4R-56R0402
RN20
8P4R-56R0402
RN12
8P4R-56R0402
RN6
8P4R-56R0402
RN15
8P4R-56R0402
DQS_B7
DQM_B7
DATA_B57
DATA_B61
DATA_B33
DATA_B37
DATA_B36
DATA_B32
DATA_B53
DATA_B49
DATA_B52
DATA_B48
DATA_B11
DATA_B10
DATA_B15
DATA_B14
DQS_B5
DQM_B5
DATA_B41
DATA_B45
DATA_B20
SCS_B#0 9,12
SCS_B#1 9,12
SCKE_B0 9,12
SCKE_B1 9,12
MAA_B1
MAA_B2
MAA_B5
MAA_B8
MAA_B7
MAA_B3
MAA_B4
MAA_B10
MAA_B0
MAA_B6
MAA_B9
MAA_B11
MAA_B12
MAA_B13
SBS_B0 9,12
SBS_B1 9,12
WE_B# 9,12
RAS_B# 9,12
CAS_B# 9,12
1 2
3 4
5 6
7 8
1 2
3 4
5 6
7 8
1 2
3 4
5 6
7 8
1 2
3 4
5 6
7 8
R90 56R0402
R89 56R0402
R104 56R0402
R106 56R0402
R171 56R0402
R94 56R0402
R92 56R0402
R175 56R0402
R177 56R0402
R140 47R0402
R143 47R0402
R151 47R0402
R153 47R0402
R155 47R0402
R144 47R0402
R146 47R0402
R133 47R0402
R135 47R0402
R148 47R0402
R161 47R0402
R162 47R0402
R164 47R0402
R81 47R0402
R115 47R0402
R130 47R0402
R108 47R0402
R110 47R0402
R96 47R0402
VTT_DDR VTT_DDR VTT_DDR
RN11
8P4R-56R0402
RN25
8P4R-56R0402
RN16
8P4R-56R0402
RN39
8P4R-56R0402
VTT_DDR
DATA_B9
DATA_B8
DATA_B3
DATA_B7
DATA_B6
DATA_B2
DQM_B0
DQS_B0
DQM_B1
DATA_B13
DQS_B1
DATA_B12
DQS_B2
DATA_B21
DATA_B17
DATA_B16
DATA_B22
DATA_B18
DQM_B2
DQM_B3
DQS_B3
DATA_B29
DATA_B25
DATA_B31
DATA_B27
DATA_B30
DATA_B26
DATA_B38
DATA_B34
DQM_B4
DQS_B4
DATA_B44
DATA_B40
DATA_B35
DATA_B39
DATA_B28
DATA_B24
DATA_B23
DATA_B19
DATA_B5
DATA_B1
DATA_B0
DATA_B4
DATA_B47
DATA_B43
DATA_B46
DATA_B42
DATA_B56
DATA_B60
DATA_B51
DATA_B55
DATA_B59
DATA_B63
DATA_B58
DATA_B62
DATA_B50
DATA_B54
DQS_B6
DQM_B6
1 2
3 4
5 6
7 8
1 2
3 4
5 6
7 8
1 2
3 4
5 6
7 8
1 2
3 4
5 6
7 8
1 2
3 4
5 6
7 8
1 2
3 4
5 6
7 8
1 2
3 4
5 6
7 8
1 2
3 4
5 6
7 8
1 2
3 4
5 6
7 8
1 2
3 4
5 6
7 8
1 2
3 4
5 6
7 8
1 2
3 4
5 6
7 8
1 2
3 4
5 6
7 8
1 2
3 4
5 6
7 8
1 2
3 4
5 6
7 8
VTT_DDR
RN43
8P4R-56R0402
RN44
8P4R-56R0402
RN41
8P4R-56R0402
RN37
8P4R-56R0402
RN35
8P4R-56R0402
RN31
8P4R-56R0402
RN28
8P4R-56R0402
RN23
8P4R-56R0402
RN21
8P4R-56R0402
RN33
8P4R-56R0402
RN46
8P4R-56R0402
RN19
8P4R-56R0402
RN13
8P4R-56R0402
RN8
8P4R-56R0402
RN14
8P4R-56R0402
VCC_DDR VCC_DDR VCC_DDR
B B
C166 C1U16Y
C92 C1U 16Y
C128 C1U16Y
C241 C1U16Y
C237 C56P 50N
C62 C1U 16Y
C97 C1U 16Y
A A
8
C178 X_C1U16Y
C184 X_C1U16Y
C183 C56P50N
C216 X_C1U16Y
C154 X_C1U16Y
C121 X_C1U16Y
C141 X_C1U16Y
C57 X_C1U16Y
C162 X_C1U16Y
C70 X_C1U16Y
C64 X_C1U16Y
C61 X_C1U16Y
C110 X_C1U16Y
7
+
EC16 470u/10V
+
EC25 .C D1000U6.3EL15
6
5
DQS_A[0..7] 9,12
DATA_A[0..63] 9,12
DQM_A[0..7] 9,12
MAA_A[0..13] 9,12
Data Group: SDQS,SDQ & SDM (56 ohm)
Control Group: SCS# & SCKE (56 ohm)
Command Group: SMA,SBS,SRAS#,SCAS# & SWE# (47 ohm)
4
DQS_B[0..7] 9,12
DATA_B[0..63] 9,12
DQM_B[0..7] 9,12
MAA_B[0..13] 9,12
Data Group: SDQS,SDQ & SDM (56 ohm)
Control Group: SCS# & SCKE (56 ohm)
Command Group: SMA,SBS,SRAS#,SCAS# & SWE# (47 ohm)
Title
DDR Termination Resistors
Size Document Number Re v
Custom
3
Date: Sheet
2
MICRO-START INT'L CO.,LTD.
MS-7131 100
of
13 30 Wednesday, November 24, 2004
1
Page 14
8
7
6
5
4
3
2
1
AF23
A20M#
AE27
CPUSLP#
AF24
FERR#
D D
C C
B B
These signals have
internal pull-ups.
A A
AD[31..0] 20,21,27
C_BE#[3..0] 20,21,27
DEVSEL# 20,21,27
ICH_PCLK 17
PCIRST_ICH5# 17
SERIRQ 18
IRQ14 22
FRAME# 20,21,27
IRDY# 20,21,27
TRDY# 20,21,27
STOP# 20,21,27
PAR 20,21,27
LOCK# 21
SERR# 20,21,27
PERR# 20,21,27
PME# 20,21,27
PREQ#0 20,21
PREQ#1 21
PREQ#2 21
PREQ#4 21
PREQ#5 21,27
PGNT#0 20
PGNT#1 21
PGNT#2 21
PGNT#5 27
PIRQ#A 20,21
PIRQ#B 20,21
PIRQ#C 21
PIRQ#D 21
PIRQ#G 21
PIRQ#H 21,27
AD0
E2
AD1
E5
AD2
C2
AD3
F5
AD4
F3
AD5
E9
AD6
F2
AD7
D6
AD8
E6
AD9
D3
AD10
A2
AD11
D2
AD12
D5
AD13
H3
AD14
B4
AD15
J5
AD16
K2
AD17
K5
AD18
D4
AD19
L6
AD20
G3
AD21
H4
AD22
H2
AD23
H5
AD24
B3
AD25
M6
AD26
B2
AD27
K6
AD28
K3
AD29
A5
AD30
L1
AD31
K4
C_BE#0
J6
C_BE#1
H6
C_BE#2
G4
C_BE#3
G2
C3
J3
A3
J2
J1
E1
C5
G5
E3
P6
G6
R2
PREQ#0
L5
PREQ#1
B5
PREQ#2
M5
PREQ#3
B8
PREQ#4
F7
PREQ#5
E8
PREQ#6
B7
PGNT#0
C1
PGNT#1
B6
PGNT#2
F1
C8
E7
PGNT#5
F6
D8
N2
L2
M1
L3
PIRQ#E
D9
PIRQ#F
C7
C6
M3
SERIRQ
AB20
AB16
XX1
XX2
XX3
XX4
U15A
_INTEL-82801FR-B1
AD0
AD1
AD2
AD3
AD4
AD5
AD6
AD7
AD8
AD9
AD10
AD11
AD12
AD13
AD14
AD15
AD16
AD17
AD18
AD19
AD20
AD21
AD22
AD23
AD24
AD25
AD26
AD27
AD28
AD29
AD30
AD31
C/BE0#
C/BE1#
C/BE2#
C/BE3#
DEVSEL#
FRAME#
IRDY#
TRDY#
STOP#
PAR
PLOCK#
SERR#
PERR#
PME#
PCICLK
PCIRST#
REQ0#
REQ1#
REQ2#
REQ3#
GPI40/REQ4#
GPI1/REQ5#
GPI0/REQ6#
GNT0#
GNT1#
GNT2#
GNT3#
GPO48/GNT4#
GPO17/GNT5#
GPO16/GNT6#
PIRQA#
PIRQB#
PIRQC#
PIRQD#
GPI2/PIRQE#
GPI3/PIRQF#
GPI4/PIRQG#
GPI5/PIRQH#
SERIRQ
IDEIRQ
HS1
HS2
HS3
HS4
VSS_0A1VSS_1
VSS_2
A12
A15
VSS_3
A19
VSS_4
A21
A23
VSS_5
VSS_6
VSS_7A4VSS_8A7VSS_9A9VSS_10
A26
PCI INTERFACE INTERRUPT
ICH 6
PART 1/3
VSS_11
VSS_12
VSS_13
VSS_14
VSS_15
VSS_16
VSS_17
VSS_18
VSS_19
VSS_20
VSS_21
AA4
AB1
AB2
AB7
AB10
AB19
AB9
AC10
AC12
AA11
AA13
AA16
VSS_22
AC22
AC23
VSS_23
VSS_24
AC24
VSS_25
AC3
AC26
VSS_26
VSS_27
AC6
VSS_28
AD1
AD10
CPU LAN PCI EXPRESS DIRECT MEDIA
VSS_29
VSS_30
AD15
AD18
VSS_31
VSS_32
AD2
VSS_33
AD24
GPO49/CPUPWRGD
DMI_ZCOMP
DMI_IRCOMP
LAN_RSTSYNC
VSS_34
VSS_35
VSS_36
VSS_37
VSS_38
AE2
AD6
AE10
AE11
AE12
AE21
THRMTRIP#
IGNNE#
INIT3_3V#
STPCLK#
RCIN#
A20GATE
PLTRST#
PERN_1
PERP_1
PETN_1
PETP_1
PERN_2
PERP_2
PETN_2
PETP_2
PERN_3
PERP_3
PETN_3
PETP_3
PERN_4
PERP_4
PETN_4
PETP_4
DMI_0RXN
DMI_0RXP
DMI_0TXN
DMI_0TXP
DMI_1RXN
DMI_1RXP
DMI_1TXN
DMI_1TXP
DMI_2RXN
DMI_2RXP
DMI_2TXN
DMI_2TXP
DMI_3RXN
DMI_3RXP
DMI_3TXN
DMI_3TXP
DMI_CLKN
DMI_CLKP
LAN_CLK
LAN_RXD0
LAN_RXD1
LAN_RXD2
LAN_TXD0
LAN_TXD1
LAN_TXD2
EE_CS
EE_DIN
EE_DOUT
EE_SHCLK
VSS_39
VSS_40
AE25
INIT#
INTR
SMI#
AG26
AF27
AE22
AG24
AF25
NMI
AG27
AE26
AD23
AF22
AE23
AG25
R5
H25
H24
G27
G26
K25
K24
J27
J26
M25
M24
L27
L26
P24
P23
N27
N26
T25
T24
R27
R26
V25
V24
U27
U26
Y25
Y24
W27
W26
AB24
AB23
AA27
AA26
AD25
AC25
DMI_BIAS
F24
F23
F12
B11
E12
E11
C13
C12
C11
E13
D12
F13
D11
B12
R263 24.9R1%0402
<200mils
connect to CNR connector directly
A20M# 5
SLP# 5
FERR# 5
IGNNE# 5
HINIT# 5
FWH_INIT# 17
INTR 5
NMI 5
SMI# 5
STPCLK# 5
KBRST# 18
A20GATE 18
TRMTRIP# 5
H_PWRGD 5,6
PLTRST# 8,24
DMI_MTN_IRN_0 10
DMI_MTP_IRP_0 10
DMI_ITN_MRN_0 10
DMI_ITP_MRP_0 10
DMI_MTN_IRN_1 10
DMI_MTP_IRP_1 10
DMI_ITN_MRN_1 10
DMI_ITP_MRP_1 10
DMI_MTN_IRN_2 10
DMI_MTP_IRP_2 10
DMI_ITN_MRN_2 10
DMI_ITP_MRP_2 10
DMI_MTN_IRN_3 10
DMI_MTP_IRP_3 10
DMI_ITN_MRN_3 10
DMI_ITP_MRP_3 10
CK_PE_100M_ICH# 17
CK_PE_100M_ICH 17
LAN_CNRCLK 22
LAN_RSTSYNC 22
LAN_RXD0 22
LAN_RXD1 22
LAN_RXD2 22
LAN_TXD0 22
LAN_TXD1 22
LAN_TXD2 22
ICH5_CS 22
ICH5_DIN 22
ICH5_DOUT 22
ICH5_SHCLK 22
THRM# 15,18
ICH6 Pull-Up / Down Resistors
DMI Interface
Trace widt h 5 m i ls & 7 mils space.
GMCH breakout sp a c e 5 m i ls, length < 250 mils
Length matching < 5 mils
Trace Length 2" to 11"
V_1P5_CORE
LAN_CLK: integrated 100K pull-down
LAN_RXD[2:0]: integrated 10K pull-up
EE_DOUT: integrated 20K pull-up
EE_DIN: integrated 20K pull-up
KBRST#
A20GATE
SERIRQ
THRM#
TRMTRIP#
FERR#
PREQ#6
PIRQ#F
PREQ#3
PIRQ#E
RN55 8P4R-10KR0402
1 2
3 4
5 6
7 8
R280 62R0402
R279 62R0402
* near ICH6 *
RN62 8P4R-2.7KR0402
1 2
3 4
5 6
7 8
VCC3
V_FSB_VTT
VCC5
Title
ICH6_PCI, DMI, CPU, IRQ
Size Document Number Re v
Custom
8
7
6
5
4
3
Date: Sheet
2
MICRO-START INT'L CO.,LTD.
MS-7131 100
of
14 30 Wednesday, November 24, 2004
1
Page 15
8
ICH6 integrates 20K ohm
nomial pull-up resistors
LPC_AD0 17,18
LPC_AD1 17,18
RSMRST# 24
PWRBTN# 18
MS7_POK 8,24
VRM_GD 26
SLP_S3# 18,24
SLP_S4# 24
THRM# 14,18
SPKR 25
ICH_14M 17
USB_48 17
LPC_AD2 17,18
LPC_AD3 17,18
LPC_DRQ#0 18
LPC_FRAME# 17,18
AC_BITCLK 19,22
AC_RST# 19,22
AC_SDIN0 22
AC_SDIN1 22
AC_SDIN2 19,22
AC_SDOUT 19,22
AC_SYNC 19,22
USB4- 23
USB4+ 23
USB1- 23
USB1+ 23
USB0- 23
USB0+ 23
USB5- 23
USB5+ 23
USB2- 23
USB2+ 23
USB3- 23
USB3+ 23
USB6- 23
USB6+ 23
USB7- 23
USB7+ 23
OC#1_2 23
OC#3_4 23
R283 22.6R1%0402
SMBCLK 12,17,22,24
SMBDATA 12,17,22,24
R298 10KR0402
SMBCLK
SMBDATA
SMB_ALERT#
SM_LINK0
SM_LINK1
LINK_ALERT#
RSMRST#
LPCPD#
INTRUDER#
WAKE#
RI#
THRM#
BATTLOW#
USB_BIAS
D D
C C
B B
ICH_RST# 25
ICH_SYNC# 8
LAN_RST#
AA1
AF21
AA3
AC20
AG21
AE20
AD27
AE24
7
P2
N3
N5
N4
N6
P4
P3
C10
A10
F11
F10
B10
C9
B9
C21
D21
A20
B20
D19
C19
A18
B18
E17
D17
B16
A16
C15
D15
A14
B14
C27
B27
B26
C26
C23
D23
C25
C24
B22
A22
Y4
W5
W6
W4
U6
Y5
Y3
V5
U1
U2
T4
T5
T6
W3
V6
U5
T2
F8
V2
U3
E10
A27
LAD0/FB0
LAD1/FB1
LAD2/FB2
LAD3/FB3
LDRQ_0#
LDRQ_1#/GPI41
LFRAME#/FB4
ACZ_BIT_CLK
ACZ_RST#
ACZ_SDIN_0
ACZ_SDIN_1
ACZ_SDIN_2
ACZ_SDOUT
ACZ_SYNC
USBP_0N
USBP_0P
USBP_1N
USBP_1P
USBP_2N
USBP_2P
USBP_3N
USBP_3P
USBP_4N
USBP_4P
USBP_5N
USBP_5P
USBP_6N
USBP_6P
USBP_7N
USBP_7P
OC_0#
OC_1#
OC_2#
OC_3#
GPI9/OC_4#
GPI10/OC_5#
GPI14/OC_6#
GPI15/OC_7#
USBRBIAS
USBRBIAS#
SMBCLK
SMBDATA
GPI11/SMBALERT#
SMLINK_0
SMLINK_1
LINKALERT#
RSMRST#
LAN_RST#
PWRBTN#
PWROK
VRMPWRGD
SYS_RESET#
SLP_S3#
SLP_S4#
SLP_S5#
LPCPD#/SUSSTAT#
SUSCLK
INTRUDER#
WAKE#
RI#
THRM#
MCH_SYNC#
SPKR
BATLOW#/TP_0
DPRSLPVR/TP_1
DPSLP#/TP2
TP_3
DPRSLP#/TP_4
CLK14
CLK48
6
ICH 6
PART 2/3
MISC POWER MGNT SM BUS USB AC-LINK LPC
5
P-ATA S-ATA
GPIO RTC
DDACK#
DDREQ
DIOR#
DIOW#
IORDY
DCS1#
DCS3#
DD_0
DD_1
DD_2
DD_3
DD_4
DD_5
DD_6
DD_7
DD_8
DD_9
DD_10
DD_11
DD_12
DD_13
DD_14
DD_15
SATA_0RXN
SATA_0RXP
SATA_0TXN
SATA_0TXP
SATA_1RXN
SATA_1RXP
SATA_1TXN
SATA_1TXP
SATA_2RXN
SATA_2RXP
SATA_2TXN
SATA_2TXP
SATA_3RXN
SATA_3RXP
SATA_3TXN
SATA_3TXP
SATA_CLKN
SATA_CLKP
SATARBIAS#
SATARBIAS
SATALED#
GPIO26/SATA_0GP
GPIO29/SATA_1GP
GPIO30/SATA_2GP
GPIO31/SATA_3GP
BMBUSY/GPI6
GPI7
GPI8
GPI12
GPI13
STP_PCI#/GPO18
GPO19
STP_CPU#/GPO20
GPO21
GPO23
GPIO24
GPIO25
GPIO27
GPIO28
CLKRUN#/GPIO32
GPIO33
GPIO34
VCCRTC
INTVRMEN
RTCRST#
RTCX1
RTCX2
AB15
AB14
AE16
AC14
AF16
AC16
DA0
AB17
DA1
AC17
DA2
AD16
AE17
AD14
AF15
AF14
AD12
AE14
AC11
AD11
AB11
AE13
AF13
AB12
AB13
AC13
AE15
AG15
AD13
AE3
AD3
AG2
AF2
AC5
AD5
AF4
AG4
AD7
AC7
AF6
AG6
AC9
AD9
AF8
AG8
AC2
AC1
SATA_BIAS
AG11
AF11
AC19
AF17
AE18
AF18
AG18
AD19
AE19
R1
M2
R6
AC21
AB21
AD22
AD20
AD21
V3
GPIO25
P5
Enable internal 2.5V VRM
R3
T3
AF19
AF20
AC18
AB3
INTVRMEN
AA5
AA2
Y1
Y3
32.768KHZ12.5P_D
Y2
4
PD_DACK# 22
PD_DREQ 22
PD_IOR# 22
PD_IOW# 22
PD_IORDY 22
PD_A0 22
PD_A1 22
PD_A2 22
PD_CS#1 22
PD_CS#3 22
PDD0
PDD1
PDD2
PDD3
PDD4
PDD5
PDD6
PDD7
PDD8
PDD9
PDD10
PDD11
PDD12
PDD13
PDD14
PDD15
R289 24.9R1%0402
RN57 8P4R-10KR0402
GPI6
GPI7
GPI8
PS_DETECT
R309 1KR0402
R294 330KR0402
RTC_RST#
RTCX1
RTCX2
integrated series resistors
SATA_RX#0 22
SATA_RX0 22
SATA_TX#0 22
SATA_TX0 22
SATA_RX#1 22
SATA_RX1 22
SATA_TX#1 22
SATA_TX1 22
SATA_RX#2 22
SATA_RX2 22
SATA_TX#2 22
SATA_TX2 22
SATA_RX#3 22
SATA_RX3 22
SATA_TX#3 22
SATA_TX3 22
CK_ICHSATA# 17
CK_ICHSATA 17
SATALED# 25
1 2
3 4
5 6
7 8
SIO_PME# 18
BIOS_WP# 17
C100000P16Y0402 C373
R319
10MR
PDD[0..15] 22
VCC3
VBAT
VBAT
C18P50N0402 C405
C18P50N0402 C402
VBAT0
VCC5_SB
3
R292
1.2KR
R291
2.7KR0402
R312
1KR0402
SMB_ALERT#
LPCPD#
LINK_ALERT#
SIO_PME#
GPI8
RI#
BATTLOW#
SM_LINK1
WAKE#
SM_LINK0
PS_DETECT
GPI7
GPI6
SATALED#
MS7_POK
check Power on sequency (SI)
INTRUDER#
SM BUS Pull-High
SMBCLK
SMBDATA
C383
X_C100P16X0402
1 2
D12
3
S-BAT54A_SOT23
D13
S-BAT54A_SOT23
1 2
3
R300
1KR0402
BAT1
2
1 2
VCC3_SB
3 4
RN69
5 6
8P4R-10KR0402
7 8
1 2
RN65
3 4
8P4R-10KR0402
5 6
7 8
1 2
RN68
3 4
8P4R-10KR0402
5 6
7 8
1 2
RN56
3 4
8P4R-10KR0402
5 6
7 8
VCC3
should go high no sooner
R296 10KR0402
R295 2MR0402
than 10ms after both VCC3
anc VCC1.5 have reached
their nomial voltages
SPD Error Issue:
R302 4.7KR0402
R305 4.7KR0402
C382
X_C100P16X0402
near ICH6
* Put a GND Plane under X'TAL
* Please put this block close ICH6
VBAT
R317 180KR0402
C370
C1U16Y0805
RC filter on this line
should be 18 ~ 25ms
C411
C0.1U10X0402
1
VBAT
BIOS before programming Clock
generator need check 32Byte Buffer
enable or not , dependent on BIOS
programming Block read/write method.
VCC3
RTC BLOCK
CLR_CMOS
2 - 3
Normal
1 - 2 Clear CMOS
J_RTCRST#
RTC_RST#
*
CLR_CMOS1
3
2
1
H1X3_black
VSS_41
VSS_42
VSS_43
VSS_44
VSS_45
VSS_46
VSS_47
VSS_48
VSS_49
VSS_50
VSS_51
VSS_52
VSS_53
VSS_54
VSS_55
VSS_56
VSS_57
VSS_58
VSS_59
VSS_60
VSS_61
VSS_62
VSS_63
VSS_64
VSS_65
VSS_66C4VSS_67D1VSS_68
VSS_69
VSS_70
VSS_71
VSS_72
VSS_73
VSS_74D7VSS_75
VSS_76
VSS_77
VSS_78
VSS_79
VSS_80
VSS_81
VSS_82
VCC5_SB
A A
RSMRST#
8
R301
4.7KR0402
R297
10KR0402
U15B
_INTEL-82801FR-B1
should go high no sooner
than 10ms after both VCC3_SB
anc VCC1.5_SB have reached
their nomial voltages
7
AF1
AF3
AF7
AE6
AE7
AG1
AF12
AF26
AG12
AG14
AG17
AG20
AG22
AG3
AG7
B13
B15
B19
B21
B23
B25
C14
C18
C20
C22
D10
6
E14
D13
E15
D14
D18
D20
D22
VSS_83F4VSS_84G1VSS_85
F17
F19
F22
E18
E19
E25
G12
Title
ICH6_LPC, AT A, USB, G PIO
Size Document Number Re v
Custom
5
4
3
Date: Sheet
2
MICRO-START INT'L CO.,LTD.
MS-7131 100
of
15 30 Wednesday, November 24, 2004
1
Page 16
8
7
6
5
4
3
2
1
V_1P5_CORE
D D
C289 C100000P16Y0402
C287 C100000P16Y0402
C286 _C10000P16X0402/20%
C C
V_1P5_CORE
C298 C100000P16Y0402
C318 C100000P16Y0402
C351 _C10000P16X0402/20%
B B
A A
8
AA22
VCCDMIPWR-1
AA23
VCCDMIPWR-2
AA24
VCCDMIPWR-3
AA25
VCCDMIPWR-4
AB25
VCCDMIPWR-5
AB26
VCCDMIPWR-6
AB27
VCCDMIPWR-7
F25
VCCDMIPWR-8
F26
VCCDMIPWR-9
F27
VCCDMIPWR-10
G22
VCCDMIPWR-11
G23
VCCDMIPWR-12
G24
VCCDMIPWR-13
G25
VCCDMIPWR-14
H21
VCCDMIPWR-15
H22
VCCDMIPWR-16
J21
VCCDMIPWR-17
J22
VCCDMIPWR-18
K21
VCCDMIPWR-19
K22
VCCDMIPWR-20
L21
VCCDMIPWR-21
L22
VCCDMIPWR-22
M21
VCCDMIPWR-23
M22
VCCDMIPWR-24
N21
VCCDMIPWR-25
N22
VCCDMIPWR-26
N23
VCCDMIPWR-27
N24
VCCDMIPWR-28
N25
VCCDMIPWR-29
P21
VCCDMIPWR-30
P25
VCCDMIPWR-31
P26
VCCDMIPWR-32
P27
VCCDMIPWR-33
R21
VCCDMIPWR-34
R22
VCCDMIPWR-35
T21
VCCDMIPWR-36
T22
VCCDMIPWR-37
U21
VCCDMIPWR-38
U22
VCCDMIPWR-39
V21
VCCDMIPWR-40
V22
VCCDMIPWR-41
W21
VCCDMIPWR-42
W22
VCCDMIPWR-43
Y21
VCCDMIPWR-44
Y22
VCCDMIPWR-45
AA6
VCC1_5-3
AB4
VCC1_5-4
AB5
VCC1_5-5
AB6
VCC1_5-6
AC4
VCC1_5-7
AD4
VCC1_5-8
AE4
VCC1_5-9
AE5
VCC1_5-10
AG5
VCC1_5-11
AF5
VCC1_5-12
AA7
VCC1_5-13
AA8
VCC1_5-14
AA9
VCC1_5-15
AB8
VCC1_5-16
AC8
VCC1_5-17
AD8
VCC1_5-18
AE8
VCC1_5-19
AE9
VCC1_5-20
AF9
VCC1_5-21
AG9
VCC1_5-22
AA19
VCC1_5-23
AA20
VCC1_5-24
AA21
VCC1_5-25
L11
VCC1_5-26
L12
VCC1_5-27
L14
VCC1_5-28
L16
VCC1_5-29
L17
VCC1_5-30
M11
VCC1_5-31
M17
VCC1_5-32
P11
VCC1_5-33
P17
VCC1_5-34
T11
VCC1_5-35
T17
VCC1_5-36
U11
VCC1_5-37
U12
VCC1_5-38
U14
VCC1_5-39
U16
VCC1_5-40
U17
VCC1_5-41
G8
VCC1_5-42
D24
VCC1_5-43
D25
VCC1_5-44
D26
VCC1_5-45
D27
VCC1_5-46
E20
VCC1_5-47
E21
VCC1_5-48
E22
VCC1_5-49
E23
VCC1_5-50
E24
VCC1_5-51
F20
VCC1_5-52
G20
VCC1_5-53
F9
VCC1_5-54
_INTEL-82801FR-B1
U15C
VSS_167
VSS_168
Y6
Y27
7
VSS_165
VSS_166
Y23
Y26
1.5V DMI POWER 1.5V CORE WELL POWER
VSS_147
VSS_148
VSS_149
VSS_150
VSS_151
VSS_152
VSS_153
VSS_154
VSS_155
VSS_156
VSS_157
VSS_158
VSS_159
VSS_160
VSS_161
VSS_162
VSS_163
VSS_164
V4
W1
W7
W25
W24
W23
V26
V27
T7
T23
T26
V23
T27
U13
U15
U23
U24
U25
ICH 6
PART 3/3
VSS_135
VSS_136
VSS_137
VSS_138
VSS_139
VSS_140
VSS_141
VSS_142
VSS_143
VSS_144
VSS_145
VSS_146
T1
R4
T12
T13
T14
T15
T16
6
R16
R17
R23
R24
R25
VSS_133
VSS_134
R14
R15
VSS_131
VSS_132
R12
R13
VSS_129
VSS_130
P22
R11
VSS_127
VSS_128
P15
P16
VSS_125
VSS_126
P13
P14
VSS_123
VSS_124
N7
P12
VSS_122
N16
N17
5
VSS_119
VSS_120
VSS_121
N14
N15
VSS_117
VSS_118
N12
N13
VSS_115
VSS_116
N1
N11
VSS_113
VSS_114
M4
M27
S0 POWER MISC S5 POWER
VCCLAN3_3-1/VCCSUS3_3-1
VCCLAN3_3-2/VCCSUS3_3-2
VCCLAN3_3-3/VCCSUS3_3-3
VCCLAN3_3-4/VCCSUS3_3-4
VSS_107
VSS_108
VSS_109
VSS_110
VSS_111
VSS_112
M13
M14
M15
M16
M23
M26
VCC3_3-10
VCC3_3-11
VCC3_3-12
VCC3_3-13
VCC3_3-14
VCC3_3-15
VCC3_3-16
VCC3_3-17
VCC3_3-18
VCC3_3-19
VCC3_3-20
VCC_CPU_IO-1
VCC_CPU_IO-2
VCC_CPU_IO-3
VCCA3GBG/VCC3_3
VSSA3GBG/VSS
VCCASATABG/VCC3_3
VSSASATABG/VSS
VCCAUBG/VCCSUS3_3
VSSAUBG/VSS
VCCDMIPLL
VCCSATAPLL
VCCUSBPLL
V5REF_SUS
VCCSUS3_3-1
VCCSUS3_3-2
VCCSUS3_3-3
VCCSUS3_3-4
VCCSUS3_3-5
VCCSUS3_3-6
VCCSUS3_3-7
VCCSUS3_3-8
VCCSUS3_3-9
VCCSUS3_3-10
VCCSUS3_3-11
VCCSUS3_3-12
VCCSUS3_3-13
VCCSUS3_3-14
VCCSUS3_3-15
VCCSUS3_3-16
VCCSUS3_3-17
VCCSUS3_3-18
VCCSUS3_3-19
VCCSUS1_5-1
VCCSUS1_5-2
VCCSUS1_5-3
VCC1_5-2/VCCSUS1_5
VCC1_5-1/VCCSUS1_5
VSS_100
VSS_101
VSS_102
VSS_103
VSS_104
VSS_105
VSS_106
K7
L13
L15
L23
L24
L25
M12
4
V5REF1
V5REF2
VCC3_3-1
VCC3_3-2
VCC3_3-3
VCC3_3-4
VCC3_3-5
VCC3_3-6
VCC3_3-7
VCC3_3-8
VCC3_3-9
VCC2_5-2
VCC2_5-4
VSS_86
VSS_87
VSS_88
VSS_89
VSS_90
VSS_91
VSS_92
VSS_93
VSS_94
VSS_95
VSS_98
VSS_99
K23
K26
K27
VSS_96K1VSS_97
A8
AA18
AA10
AA12
AA14
AA15
AA17
AC15
AD17
AG13
AG16
AG19
A6
B1
E4
H1
H7
J7
L4
L7
M7
P1
A13
F14
G13
G14
AB18
P7
AB22
AD26
AG23
E26
E27
AG10
AF10
A24
B24
AC27
AE1
A25
F21
A11
U4
V1
V7
W2
Y7
A17
B17
C16
C17
D16
E16
F15
F16
F18
G15
G16
G17
G18
R7
U7
G19
G11
G10
G21
G7
G9
H23
H26
H27
J23
J24
J25
J4
5VREF
V_2P5_ICH
C333 C100 000P 16Y0402
C394 C100 000P 16Y0402
C304 C100 000P 16Y0402
CP12 X_COPPER
L13 X_1U500m_0805
C294 C4.7U10Y0805
VCC3
VCC3_SB
L14
DMIPLL
C326 C0.1U10X0402
VCCSUS_1_5-1
VCCSUS_1_5-2
VCCSUS_1_5-3
1U500m_0805
C303 C10U10Y0805
C288 _C10000P16X0402/20%
Near Pin F21
VCC3
VCC3
C368 C100000P 16Y0402
VCC3_SB
CAUTION
V_FSB_VTT
R259
1R1%0402
VCC5_SB
VCC3_SB
C395 _C10000P16X0402/20%
C384 _C10000P16X0402/20%
C329 _C10000P16X0402/20%
3
VCC3
V_1P5_CORE
V_1P5_CORE
V_1P5_CORE
5VREF Sequencing Circuit
D11 S-1N5817_DO214AC
5VREF
5VREF must power up before or
simultaneous to VCC3. It must power
down after or simultaneous to VCC3.
Title
ICH6_POWER
Size Document Number Re v
Custom
Date: Sheet
MS-7131 100
2
R288 1KR0402
C352 C100000P 16Y0402
VCC5 VCC3
MICRO-START INT'L CO.,LTD.
of
16 30 Wednesday, November 24, 2004
1
Page 17
8
7
6
5
4
3
2
1
CP8
X_COPPER
FB8 X_80L3_100_0805
VCC3
C239
C0.1U25Y
D D
CP7
1 2
VCC3
C C
FB7 X_80L3_100_0805
C243
C0.1U25X
+
C100000P16Y0402
X_COPPER
+
SMBCLK 12,15,22,24
SMBDATA 12,15,22,24
VCC3V MCHCLK#
C245
X_C10U10Y1206
EC33
CD10U16EL5
ALE
VCC3V
C100000P16Y0402
C299
C100000P16Y0402
C301
C100000P16Y0402
VCC3VA
C100000P16Y0402
C100000P16Y0402
C100000P16Y0402
C100000P16Y0402
C100000P16Y0402
SMBCLK
SMBDATA
R256 X_8.2KR
Clock Generato r - ICS954119
U13
41
C290
VDD_CPU
38
GND
20
GND
34
VDD_PCIEX
28
VDDSRC
29
GND
25
GND
19
VDDPCIEX
35
VDDA
36
GNDA
6
VDDPCI
5
GND
56
VDDPCI
1
GND
10
VDD48
13
GND
46
VDDREF
49
GND
45
SCLK
44
SDATA
52
RESET#
ICS954119_SSOP56
DOTT_96MHZ
DOTC_96MHZ
FSA/PCICLK_F1
FSB/PCICLK_F2
SEL24_48#/24_48MHZ
VTT_PWRGD#/PD
C300
C255
C267
C256
C266
C272
CPUCLKT0
CPUCLKC0
CPUCLKT1
CPUCLKC1
PCIEXT0
PCIEXC0
PCIEXT1
PCIEXC1
PCIEXT2
PCIEXC2
PCIEXT3
PCIEXC3
PCIEXT4
PCIEXC4
SRCCLKT
SRCCLKC
PCICLK_F0
PCICLK0
PCICLK1
PCICLK2
PCICLK3
PCICLK4
PCICLK5
USB_48MHZ
REF1
REF0/FSC
IREF
Trace length less than 0.5inchs
MCHCLK
R241 33R0402
R242 33R0402
CPUCLK
R239 33R0402
CPUCLK#
R240 33R0402
CK_PE_SRC3
CK_PE_SRC3# CK_PE_100M_MCH#
CK_PE_SRC2
CK_PE_SRC2#
R262 33R0402
R270 33R0402
R267 33R0402
R268 33R0402
ICHCLK
R269 33R0402
FSA
R278 33R0402
FSB
RN50 8P4R-33R0402
AGPCLK AGP_CLK
PCICLK1
FWHPCLK
PCICLK2
LANPCLK
SIO48 SIO_48
R264 33R0402
USB48 USB_48
R265 33R0402
ICH14M
FSC
PLL_XI
PLL_XO
CK_VID_GD#
CLK_IREF
R243 475R1%0402
RN53 8P4R-33R
CK_PE_SRC2
CK_PE_SRC2#
CK_PE_SRC3
CK_PE_SRC3#
1 2
3 4
5 6
7 8
1 2
3 4
5 6
7 8
RN54 8P4R-33R0402
R237 22R0402
R246 22R0402
C276 C47P50N0402
Y2
14.318MHZ16P_D
C279 C47P50N0402
SIO48
R275 X_10KR0402
X1
X2
43
42
40
39
17
18
21
22
23
24
31
30
33
32
CK_PE_SRC5
26
CK_PE_SRC5#
27
CK_DOT96
14
CK_DOT96#
15
7
8
9
53
54
55
2
3
4
11
12
50
51
48
47
16
37
CK_H_MCH
CK_H_MCH#
CPU_CLK
CPU_CLK#
7 8
5 6
3 4
1 2
CK_ICHSATA
CK_ICHSATA#
CK_96M_DREF
CK_96M_DREF#
FWH_PCLK
CK_H_MCH 8
CK_H_MCH# 8
CPU_CLK 5
CPU_CLK# 5
CK_PE_100M_MCH
CK_PE_100M_ICH
CK_PE_100M_ICH#
AC_14
ICH_14M
1 to 2: check SI
CK_PE_100M_MCH 10
CK_PE_100M_MCH# 10
CK_PE_100M_ICH 14
CK_PE_100M_ICH# 14
CK_ICHSATA 15
CK_ICHSATA# 15
CK_96M_DREF 10
CK_96M_DREF# 10
ICH_PCLK 14
SIO_PCLK 18
AGP_CLK 20
PCI_CLK1 21
LAN_CLK 27
PCI_CLK2 21
SIO_48 18
USB_48 15
AC_14 19
ICH_14M 15
CPU_CLK
CPU_CLK#
CK_H_MCH
CK_H_MCH#
CK_ICHSATA
CK_ICHSATA#
CK_PE_100M_MCH
CK_PE_100M_MCH#
CK_PE_100M_ICH
CK_PE_100M_ICH#
CK_96M_DREF
CK_96M_DREF#
FSA
FSB
FSC
8P4R-10KR0402
RN49
VCC3V
1 2
3 4
5 6
7 8
R229 49.9R1%0402
R230 49.9R1%0402
R231 49.9R1%0402
R232 49.9R1%0402
R273 49.9R1%0402
R274 49.9R1%0402
RN52 8P4R-51R
7 8
5 6
3 4
1 2
R276 49.9R1%0402
R277 49.9R1%0402
1 23 45 6
7 8
RN51
8P4R-1KR0402
Clock Generator VTT Power Down Block
CK_VID_GD#
R272
X_0R0402
R225 10KR0402
VIDGD
Q32
N-MMBT3904_SOT23
PCI_CLK2
PCI_CLK1
AGP_CLK
ICH_PCLK
FWH_PCLK
SIO_PCLK
USB_48
EMC HF filter capacitors, located close to PLL
Modify
1 23 45 6
N-MMBT3904_SOT23
Q18
R223 220R0402
7 8
RN29
8P4R-1KR0402
N-MMBT3904_SOT23
Q19
N-MMBT3904_SOT23
Q17
VCC3_SB
VCCP
V_FSB_VTT
X_C10P50N0402 C285
X_C10P50N0402 C254
X_C10P50N0402 C253
X_C10P50N0402 C310
X_C10P50N0402 C263
X_C10P50N0402 C314
X_C10P50N0402 C312
H_FSBSEL0 5,6 ,10
H_FSBSEL1 5,6 ,10
H_FSBSEL2 5,6 ,10
LAN_CLK
AC_14
ICH_14M
SIO_48
FSA
FSB
FSC
FSA FSB FSC
100
010
Other combinations are
reserved.
SM BUS Pull-High
VCC5 VCC3
X_C10P50N0402 C418
SMBCLK
SMBDATA
R57 X_1KR
R62 X_1KR
X_C10P50N0402 C308
C10P50N0402 C249
X_C10P50N0402 C259
X_C10P50N0402 C309
X_C10P50N0402 C311
X_C10P50N0402 C302
X_C10P50N0402 C271
Host
Clock
133M
200M
VCC3
FSB
Freq.
533M
800M
B B
BIOS Update Config.
HIGH
Un_protected
LOW
Protected
Default
FWH DECOUPLING CAPACITORS
A A
VCC3
C87
C0.1U25Y
C80
X_C10U10Y0805
PCIRST_ICH5# 14
PD_DET 22
BIOS_WP# 15
LPC_AD0 15,18
LPC_AD1 15,18
LPC_AD2 15,18
FWH Resistors
default is high
BIOS_WP#
PRES2
PRES3
PRES4
PRES1
PRES3 PRES4
PRES2
PRES1
PD_DET
BIOS_WP#
RN18 8P4R-2.7KR0402
1 2
3 4
5 6
7 8
R86 1KR
Place Cap. as Close to FWH< 350 mil
8
7
6
Firware Hub (FWH) BIOS PROTECT BLOCK FLOPPY CONNECTOR
FDD1
1 2
546
7 8
9 10
11 12
13 14
15 16
17 18
19
20
21 22
23 24
25 26
27 28
29 30
31 32
33 34
CONN-FDD(4)(5)(6)
3
DRVDEN0
INDEX#
MOT_A#
DRV_A#
DIR#
STEP#
WT_DT#
WT_EN#
TRACK0#
FDD_WP#
RDATA#
HEAD#
DSKCHG#
VCC3
VCC3
10
11
12
13
14
15
16
1
2
3
4
5
6
7
8
9
BIOS1
VPP
RST#
FGPI3
FGPI2
FGPI1
FGPI0
WP#
TBL#
ID3
ID2
ID1
ID0
FWH0
FWH1
FWH2
GND
PLCC-32
<Priority>
VCC
FGPI4
IC(VIL)
GNDA
VCCA
GND
VCC
INIT#
FWH4
RFU
RFU
RFU
RFU
RFU
FWH3
CLK
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
check PRES4 is pull up or pull down
5
VCC3
FWH_PCLK
FWH_INIT#
4
FWH_INIT# 14
LPC_FRAME# 15,18
LPC_AD3 15,18
DRVDEN0 18
INDEX# 18
MOT_A# 18
DRV_A# 18
DIR# 18
STEP# 18
WT_DT# 18
WT_EN# 18
TRACK0# 18
FDD_WP# 18
RDATA# 18
HEAD# 18
DSKCHG# 18
Placement check to this page
Title
ICS954119 & FWH & FDD
Size Document Number Re v
Custom
Date: Sheet
MS-7131 100
2
MICRO-START INT'L CO.,LTD.
of
17 30 Wednesday, November 24, 2004
1
Page 18
8
PCIRST#1 24,27
SIO_PCLK 17
SERIRQ 14
LPC_DRQ#0 15 MOT_A# 17
C14
C0.1U25Y
LPC_FRAME# 15,17
LPC_AD0 15,17
LPC_AD1 15,17
LPC_AD2 15,17
LPC_AD3 15,17
R55 30KR
CPU_TMPA
R49 0R
SIO_PME# 15
PWRBTN# 15
PWRBTIN 25
PS_ON# 25
SLP_S3# 15,24
VBAT0
VCC3
VCC5
LPC_+12VIN
VCC3
VCCP
C45
C0.1U25Y
VCC5
CHASSIS
D D
CPU_TMPA 5
C C
SYS_FAN 20
CPUFAN_PWM 20
CPU_FAN 20
THRM# 14,15
SIO_48 17
VCC5_SB
C36
B B
C10P50N
LPC I/O STRAPPING RESISTOR
R7 4.7KR
VCC5
R19 4.7KR
VCC5
R2 4.7KR
R6 X_4.7KR
R5 4.7KR
SOUTA
SOUTB
RTSA#
L: Disable KBC
L: 24MHZ
L: CFAD=2E
L: PNP Default
8
A A
SOUTA
SOUTB
RTSA# CHASSIS
DTRA#
H: Enable KBC
H: 48MHZ
H: CFAD=4E
H: PNP no Default DTRA#
7
LPC SUPER I/O W83627HF/NHF/THF
U4
30
LRESET#
TMP_VREF
SYS_TMP
21
LCLK
23
SERIRQ
22
LDRQ#
29
LFRAME#
27
LAD0
26
LAD1
25
LAD2
24
LAD3
125
GPX2/GP13
123
GPY1/GP15
128
GPSA1/GP10
121
GPSA2/GP17
126
GPX1/GP12
124
GPY2/GP14
127
GPSB1/GP11
122
GPSB2/GP16
120
MSO/IRQIN0/GP20
119
MSI/GP21
101
VREF
102
VTIN
103
CPUTIN
104
SYSTIN
93
GP26
94
GP25
95
GP24
96
GP23
97
VIN3
98
VIN2
99
VIN1
100
CPU_VCORE
106
GP54
107
GP53
108
GP52
109
GP51
110
GP50
116
FANPWM1
113
FANIN1
115
FANPWM2
112
FANIN2
111
OVT#
105
GP55
118
GP22
76
CASEOPEN#
19
PME#
89
WDTO/GP33
91
GP31
92
GP30
67
PSOUT#/GP47
68
PSIN/GP46
64
SUSLED/GP37
90
PLED/GP32
72
PWRCTL#/GP42
73
SLP_SX#/GP41
18
CLKIN
61
VSB
74
VBAT
28
VCC3
12
VCC_1
48
VCC_2
77
GP36
114
VCC_4
W83627THF-E
SMI#/IRQIN1
RSMRST#/GP44
PWROK/GP43
VSS4(AGND)
83627NHF
Chasiss Intrusion
JCI1
1
2
H1X2_black
1
2
BEEP
7
VBAT0
R3
2MR
VCC5
R4
R1 4.7KR
10KR
B
VBAT0
C E
Q1
N-MMBT3904_SOT23
DRVDEN0
INDEX#
MOA#
FANIN3
DSA#
FANOUT3
DIR#
STEP#
WRDATA#
WE#
TRACK0#
WP#
RDDATA#
HEAD#
DSKCHG#
PD0
PD1
PD2
PD3
PD4
PD5
PD6
PD7
SLCT
PE
BUSY
ACK#
SLIN#
INIT#
ERR#
AFD#
STB#
IRRX/GP34
GP45
IRTX
GP40
DCDA#
DSRA#
SINA
RTSA#
SOUTA
CTSA#
DTRA#
RIA#
DCDB#
DSRB#
SINB
RTSB#
SOUTB
CTSB#
DTRB#
RIB#
GA20M
KBRST
KBDATA
KBCLK
MSDATA
MSCLK
BEEP
VSS1
VSS2
GP35
C8
C0.1U10X0402
ALARM 25
+12V
6
1
2
3
4
5
6
7
8
9
10
11
13
14
15
16
17
42
41
40
39
38
37
36
35
31
32
33
34
43
44
45
46
47
88
69
87
75
56
50
53
51
54
49
52
57
84
79
82
80
83
78
81
85
59
60
63
62
66
65
58
70
71
20
55
86
117
VCC5
6
DRVDEN0 17
INDEX# 17
DRV_A# 17
DIR# 17
STEP# 17
WT_DT# 17
WT_EN# 17
TRACK0# 17
FDD_WP# 17
RDATA# 17
HEAD# 17
PRND0
PRND1
PRND2
PRND3
PRND4
PRND5
PRND6
PRND7
SLCT
PE
BUSY
ACK#
PSLIN#
PINIT#
ERR#
AFD#
STB#
R15 10KR
DCDA#
DSRA#
SINA
RTSA#
SOUTA
CTSA#
DTRA#
RIA#
DCDB#
DSRB#
SINB
RTSB#
SOUTB
CTSB#
DTRB#
RIB#
KBDAT#
KBCLK#
MSDAT#
MSCLK#
BEEP
BEEP:This pin is low after
system reset. (OD)
VTIN_GND
C39 C0.1U25Y
C10 C0.1U25Y
C49 C0.1U25Y
R58 28KR1%
VTIN_GND
DSKCHG# 17
FB3 0R
A20GATE 14
KBRST# 14
R48
10KR1%
RT1
10KRT1%0805
NOTE: LOCATE CLOSE
STATUS PANEL
R59
10KR1%
FB2 X_0R
CP2 X_COPPER
5
VCC5
TMP_VREF
SYS_TMP
VTIN_GND
C40
X_C0.1U25Y
5
SLIN#
LPC_+12VIN
VCC5
NCTSA#
NDSRA#
NSINA
NDCDA#
RTSA#
DTRA#
SOUTA
NRTSA
NDSRA#
NCTSA#
NRIA#
NDCDA#
NSOUTA
NSINA
NDTRA
4
SERIAL PORT 1
U1
20
VCC
2
RIN1
3
RIN2
4
RIN3
7
RIN4
9
RIN5
16
DIN1
15
DIN2
13
DIN3
11
GND
GD75232_SSOP20
1
2
4
6
8
2
4
6
8
MSDAT#
MSCLK#
KBDAT#
KBCLK#
VCC5
NRIB#
NCTSB#
NDSRB#
NSINB
NDCDB#
RTSB#
DTRB#
SOUTB
VCC5
PRND6
PRND5
PRND4
PRND3
PE
BUSY
ACK#
PRND7
SLIN#
PRND2
PINIT#
PRND1
ERR#
AFD#
PRND0
STB#
SLCT
CN2
8P4C-330P50N
CN3
8P4C-330P50N
3
5
7
1
3
5
7
COM2 HEADER
NDCDB#
NSOUTB
NRTSB
NRIB#
4
+12VCOM
1
V+
19
ROUT1
18
ROUT2
17
ROUT3
14
ROUT4
12
ROUT5
5
DOUT1
6
DOUT2
8
DOUT3
-12VCOM
10
V-
NDCDA# N D SRA#
NSINA
NSOUTA
NDTRA
D3 1N4148_SOD123
D4
1
5
1
5
2
2
3
3
RN5
4
4
10P8R-2.7KR
6
6
7
7
8
8
9
10
9
10
1
5
1
5
2
2
3
3
RN10
4
4
10P8R-2.7KR
6
6
7
7
8
8
9
10
9
10
R43 2.7KR
RN1
8P4R-4.7KR
1 2
3 4
5 6
7 8
U6
20
VCC
2
RIN1
3
4
7
9
16
15
13
11
ROUT1
RIN2
ROUT2
RIN3
ROUT3
RIN4
ROUT4
RIN5
ROUT5
DIN1
DOUT1
DIN2
DOUT2
DIN3
DOUT3
GND
GD75232_SSOP20
JCOM1
1 2
3 4
5 6
7 8
9
H2X5(10)_black
3
C29 C0.1U25Y
D2 1N4148_SOD123
RIA# NRIA#
CTSA#
DSRA#
SINA
DCDA#
NRTSA
NDTRA
NSOUTA
D4 1N4148_SOD123
C35
PRND7
ACK#
BUSY
PE
PRND6
PRND5
PRND4
PRND3
SLIN#
PRND2
PINIT#
PRND1
ERR#
AFD#
PRND0
STB#
SLCT
C0.1U25Y
1
2
3
4
5
1
3
5
7
7
5
3
1
7
5
3
1
7
5
3
1
+12V
-12V
COM1
6
7
8
9
CONN-COM
11 10
N51-09M0021-F02
2
4
6
8
8
6
4
2
8
6
4
2
8
6
4
2
NRTSA
NCTSA#
NRIA#
CN4
8P4C-330P50N
CN7
8P4C-330P50N
CN8
8P4C-330P50N
CN9
8P4C-330P50N
C330P50N C46
PS2 KEYBOARD & MOUSE CONNECTOR
C1
C0.1U25Y
JKBMS1
7
8
11
12
MS
1
2
5
6
C425
C220P50N
CONN-KB_MS
C426
C220P50N
SERIAL PORT 2
NDTRB
2
NSINB
4
NSOUTB
6
NDCDB#
8
NRIB#
2
NCTSB#
4
NDSRB#
6
NRTSB
8
Title
Size Document Number Re v
Custom
Date: Sheet
V+
V-
NSINB
NDTRB
NDSRB#
NCTSB#
C423
C220P50N
C424
C220P50N
+12VCOM
1
RIB#
19
CTSB#
18
DSRB#
17
SINB
14
DCDB#
12
NRTSB
5
NDTRB
6
NSOUTB
8
-12VCOM
10
3
2
LPT1
48
CONN-LPT
N51-25F0041-F02
10
9
4
3
KB
1
3
CN5
5
8P4C-330P50N
7
1
CN6
3
8P4C-330P50N
5
7
PARALLAL PORT
51
13
25
12
24
11
23
10
22
9
21
8
20
7
19
6
18
5
17
4
16
3
15
2
14
1
52
USBVCC2 23
VCC5
FB1 X_0R
CP1 X_COPPER
CP14 X_COPPER
X_C10P50N0402 C47
X_C10P50N0402 C11
MICRO-START INT'L CO.,LTD.
LPC I/O_W 83627THF
MS-7131 100
2
SLCT
PE
BUSY
ACK#
PRND7
PRND6
PRND5
PRND4
PRND3
SLIN#
PRND2
PINIT#
PRND1
ERR#
PRND0
AFD#
STB#
1
of
18 30 Wednesday, November 24, 2004
1
Page 19
8
7
6
5
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2
1
AC'97 Codec -- ALC655
COPPER
+5VR
CP16 X_COPPER
FB9 X_0R
R236 X_0R
CP17 X_COPPER
SPEAKER OUT
6
7
LINE_OUT
8
9
17
AUDIO1A
JACK-EARX3-13P
C236
+5VR
C380
D D
VCC3
C385
C399
C0.1U25Y
C0.1U25Y
AC_14 17
AC_RST# 15,22
AC_SDIN2 15,22
AC_SDOUT 15,22
AC_SYNC 15,22
AC_BITCLK 15,22
C C
AC_14
R303 33R0402
R330 33R0402
R331 33R0402
R308 2 2R
C392
C22P50N
97_SDIN2
97_BITCLK
48
44
46
45
47
U16
1
9
4
7
2
3
11
8
5
10
6
12
DVDD1
DVDD2
DVSS1
DVSS2
XTL_IN
XTL_OUT
RESET#
SDATA_IN
SDATA_OUT
SYNC
BIT_CLK
PC_BEEP
CD_L
CD_GND
CD_R
ID0#
SPDIF
GPIO1
XTLSEL
EAPD/JD
PHONE13AUXL14AUXR15VIDEOL16VIDEOR17CDL18CDGND19CDR20MIC121MIC222LINL23LINR
43
GPIO0
42
AVSS2
39
40
38
41
37
NC
LOUTR
MONO
LOUTL
AVDD2
HPOUT-L
HPOUT-R
NC
NC
VRDA
VRAD
AFILT2
AFILT1
VREFOUT
VREF
AVDD1
AVSS1
24
IN_L INL
C0.1U25Y
36
35
C404 C1U16Y0805
34
33
VRDA
32
VRAD
31
AFILT2
30
AFILT1
29
VREF_OUT
28
AC_VREF
27
25
+5VR
C414
C0.1U25Y
26
ALC655<Priority>
C377 C1U16Y0805
C378 C1U16Y0805
C365 C10U16Y1206
C366 C10U16Y1206
FNT_MIC
C379
C4.7U10Y0805
R198 X_22KR0402
R200 X_22KR0402
C381
C0.1U25Y
INR IN_R
C386
C1U16Y
C390
C1000P50N
C211
C1000P50X0402
C212
C1000P50X0402
C397
C1000P50N
C398
C1U16Y
LINE IN
10
11
12
13
18
AUDIO1B
JACK-EARX3-13P
LINE_IN
C400
X_C1U16Y
+5VR
FNT_MIC
R286 10KR
ROUT
LOUT
C369
X_C1000P50N
R284
X_0R
R290
X_22KR
C356
X_C1000P50N
X_C1000P50X0402
FRONT AUDIO
JAUD1
MIC1GNDA
MIC_VCC3VCCA
FPOUT_R5RET_R
DET#7KEY
FPOUT_L9RET_L
H2X5(8)_black
C204
X_C1000P50X0402
2
4
6
8
10
C342 X_C0.1U25Y
SPEAKER_R
SPEAKER_L
C210
C1000P50X0402
FNT_MIC
C209
C1000P50X0402
C376 C1U16Y0805
VREF_OUT
MIC_IN
C374 C1U16Y0805
must use 0805 Size,the Low frequency
response better than the 0603 Size
(Audio Position result)
B B
MIC_IN2
R201 X_22KR0402
R196 4.7KR 0402
R197 4.7KR 0402
R202
X_22KR0402
C207
C1000P50X0402
C208
C1000P50X0402
MIC
1
2
MIC_IN
4
5
3
AUDIO1C
JACK-EARX3-13P
MIC IN
C341
X_C1000P50X
14
15
16
AUDIO CODE REGULATORS
CD_R
Trace Width 40mils.
U17
LT1087S_SOT89
VIN3VOUT
1 2
C408
C1U16Y
A A
8
7
2
ADJ
1
R328
100R1%
R329
300R1%
+5VR +12V
+
EC43
C10U16EL
6
VCC5
L19 X_1U500m_0805
5
+5VR
C412
X_C10U10Y0805
4
CD_GND
CD_L
3
C224 C 1 U16Y
C230 C 1 U16Y
C233 C 1 U16Y
R214
X_47KR0402
R209
X_47KR0402
C_R
C_G
C_L
R195
X_47KR0402
Title
AC97 Audio_ALC6555
Size Document Number Re v
Custom
Date: Sheet
MS-7131 100
2
CD1
4
3
2
1
AUDIO-CDIN1X4
(Black)
2.54mm
CD IN
MICRO-START INT'L CO.,LTD.
of
19 30 Wednesday, November 24, 2004
1
Page 20
8
7
6
5
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2
1
AGP 3.3V 1X SLOT(AGP VER:3.0)
VCC5 = 60mils trace / 15 mils space
AGP1
D D
PIRQ#B 14,21
AGP_CLK 17
PREQ#0 14,21
AD31 14,21,27
AD29 14,21,27
AD27 14,21,27
C C
B B
AD25 14,21,27
AD23 14,21,27
AD21 14,21,27
AD19 14,21,27
AD17 14,21,27
C_BE#2 14,21,27
IRDY# 14,21,27
DEVSEL# 14,21,27
PERR# 14,21,27
SERR# 14,21,27
C_BE#1 14,21,27
AD14 14,21,27
AD12 14,21,27
AD10 14,21,27
AD8 14,21,27
AD7 14,21,27
AD5 14,21,27
AD3 14,21,27
AD1 14,21,27
VCC3
R266
1KR
R271
1KR
PREQ#0
IRDY#
DEVSEL#
PERR#
SERR#
AGP_REF
VCC5
VCC3
VCC3_SB
VCC3
C293
C0.1U25Y
B1
-OVRCNT
B2
5V
B3
5V
B4
USB+
B5
GND
B6
-INTB
B7
CLK
B8
-REQ
B9
3.3V
B10
ST0
B11
ST2
B12
-RBF
B13
GND
B14
RESERVED
B15
SBA0
B16
3.3V
B17
SBA2
B18
SB_STB
B19
GND
B20
SBA4
B21
SBA6
B22
RSVD/KEY
B23
GND/KEY
B24
AUX3V/KEY
B25
3.3V/KEY
B26
AD31
B27
AD29
B28
3.3V
B29
AD27
B30
AD25
B31
GND
B32
AD_STB1
B33
AD23
B34
VDDQ
B35
AD21
B36
AD19
B37
GND
B38
AD17
B39
C/-BE2
B40
VDDQ
B41
-IRDY
B42
AUX3V/KEY
B43
GND/KEY
B44
RSVD/KEY
B45
3.3V/KEY
B46
-DEVSEL
B47
VDDQ
B48
-PERR
B49
GND
B50
-SERR
B51
C/-BE1
B52
VDDQ
B53
AD14
B54
AD12
B55
GND
B56
AD10
B57
AD8
B58
VDDQ
B59
AD_STB0
B60
AD7
B61
GND
B62
AD5
B63
AD3
B64
VDDQ
B65
AD1
B66
VREF_CG
SLOT-AGP1.5LATCH_red
PIRQ#A / PIRQ#B
-TYPEDET
RESERVED
USB-
GND
-INTA
-RST
-GNT
3.3V
RESERVED
-PIPE
GND
-WBF
SBA1
3.3V
SBA3
-SB_STB
GND
SBA5
SBA7
RSVD/KEY
GND/KEY
RSVD/KEY
3.3V/KEY
AD30
AD28
3.3V
AD26
AD24
GND
-AD_STB1
C/-BE3
VDDQ
AD22
AD20
GND
AD18
AD16
VDDQ
-FRAME
RSVD/KEY
GND/KEY
RSVD/KEY
3.3V/KEY
-TRDY
-STOP
-PME
GND
PAR
AD15
VDDQ
AD13
AD11
GND
AD9
C/-BE0
VDDQ
-AD_STB0
AD6
GND
AD4
AD2
VDDQ
AD0
VREF_GC
A1
12V
ST1
+12V
A2
A3
A4
A5
A6
A7
PGNT#0
A8
A9
A10
A11
A12
A13
A14
A15
A16
A17
A18
A19
A20
A21
A22
A23
A24
A25
A26
A27
A28
A29
A30
A31
A32
A33
A34
A35
A36
A37
A38
A39
A40
A41
A42
A43
A44
A45
A46
A47
A48
A49
A50
A51
A52
A53
A54
A55
A56
A57
A58
A59
A60
A61
A62
A63
A64
A65
A66
VCC3
VCC3
FRAME#
TRDY#
STOP#
PME#
PAR
AGP Slot Imax
VCC3 6.0A
VCC12 1.0A
VCC5 2.0A
VCC3_SB 0.75A
PIRQ#A 14,21
PCIRST#2 21,24
PGNT#0 14
AD30 14,21,27
AD28 14,21,27
AD26 14,21,27
AD24 14,21,27
C_BE#3 14,21,27
AD22 14,21,27
AD20 14,21,27
AD18 14,21,27
AD16 14,21,27
FRAME# 14,21,27
TRDY# 14,21,27
STOP# 14,21,27
PME# 14,21,27
PAR 14,21,27
AD15 14,21,27
AD13 14,21,27
AD11 14,21,27
AD9 14,21,27
C_BE#0 14,21,27
AD6 14,21,27
AD4 14,21,27
AD2 14,21,27
AD0 14,21,27
CPU FAN
+12V
R65 4.7KR
C53 C0.1U25Y
CPUFAN_PWM 18
CPUFAN_PWM
R66 27KR
CPUFAN1
4
3
2
1
BH1X4BF_white
R60
10KR
CPU_FAN 18
SYSTEM FAN
+12V
R16 4.7KR
C28 C0.1U25Y
R22 27KR
SYSFAN1
3
2
1
FAN1X3_white
R21
10KR
SYS_FAN 18
AGP SLOT DECOUPLING CAPACITORS
VCC3_SB
C393 X_C0.1U25Y
C296 X_C0.1U25Y
C295 C0.1U25Y
VCC3
C274 X_C100000P16Y0402
C291 C0.1U25Y
C297 C0.1U25Y
+12V VCC5
C324 X_C0 . 1 U25Y
C275 C0.1U25Y
A A
Title
AGP Slot & FAN
Size Document Number Re v
Custom
8
7
6
5
4
3
Date: Sheet
2
MICRO-START INT'L CO.,LTD.
MS-7131 100
of
20 30 Wednesday, November 24, 2004
1
Page 21
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PCI SLOT 1 PCI SLOT 2
-12V
PCI1
B1
-12V
B2
TCK
B3
GND
B4
TDO
VCC3
B5
+5V
B6
+5V
B7
INTB#
B8
INTD#
B9
PRSNT#1
B10
RESERVED
B11
PRSNT#2
B12
GND
B13
GND
B14
RESERVED
B15
GND
B16
CLK
B17
GND
B18
REQ#
B19
+5V(I/O)
B20
AD31
B21
AD29
B22
GND
B23
AD27
B24
AD25
B25
+3.3V
B26
C/BE#3
B27
AD23
B28
GND
B29
AD21
B30
AD19
B31
+3.3V
B32
AD17
B33
C/BE#2
B34
GND
B35
IRDY#
B36
+3.3V
B37
DEVSEL#
B38
GND
B39
LOCK#
B40
PERR#
B41
+3.3V
B42
SERR#
B43
+3.3V
B44
C/BE#1
B45
AD14
B46
GND
B47
AD12
B48
AD10
B49
GND
B52
AD8
B53
AD7
B54
+3.3V
B55
AD5
B56
AD3
B57
GND
B58
AD1
B59
+5V(I/O)
B60
ACK64#
B61
+5V
B62
+5V
SLOT-PCI
IDSEL = AD18
MASTER = PREQ#1
RESERVED
+5V(I/O)
RESERVED
RESERVED
+5V(I/O)
RESERVED
FRAME#
SDONE
+5V(I/O)
REQ64#
VCC5
D D
IRDY# 14, 20,27
C C
B B
DEVSEL# 14,20,27
LOCK# 14
PERR# 14,20,27
SERR# 14,20,27
PIRQ#C
PIRQ#A
PCI_CLK1 17
PREQ#1 14
AD31
AD29
AD27
AD25
C_BE#3
AD23
AD21
AD19
AD17
C_BE#2
IRDY#
DEVSEL#
LOCK#
PERR#
SERR#
C_BE#1
AD14
AD12
AD10
AD8
AD7
AD5
AD3
AD1
ACK#64
TRST#
+12V
TMS
INTA#
INTC#
GND
GND
RST#
GNT#
GND
AD30
+3.3V
AD28
AD26
GND
AD24
IDSEL
+3.3
AD22
AD20
GND
AD18
AD16
+3.3V
GND
TRDY#
GND
STOP#
+3.3V
SBO#
GND
PAR
AD15
+3.3V
AD13
AD11
GND
AD9
C/BE#0
+3.3V
AD6
AD4
GND
AD2
AD0
+12V
A1
A2
A3
A4
TDI
A5
+5V
A6
A7
A8
+5V
A9
A10
A11
A12
A13
A14
A15
A16
A17
A18
A19
A20
A21
A22
A23
A24
A25
A26
A27
A28
A29
A30
A31
A32
A33
A34
A35
A36
A37
A38
A39
A40
A41
A42
A43
A44
A45
A46
A47
A48
A49
A52
A53
A54
A55
A56
A57
A58
A59
A60
A61
+5V
A62
+5V
VCC3
VCC5
PIRQ#B
PIRQ#D
PCIRST#2
PME#
AD30
AD28
AD26
AD24
ID1
AD22
AD20
AD18
AD16
FRAME#
TRDY#
STOP#
PAR
AD15
AD13
AD11
AD9
C_BE#0
AD6
AD4
AD2
AD0
REQ#64
VCC3_SB
PGNT#1 14
R281 330R
PCIRST#2 20,24
PME# 14,20,27
AD18
FRAME# 14,20,27
TRDY# 14,20,27
STOP# 14,20,27
PAR 14,20,27
PIRQ#D
PIRQ#B
PCI_CLK2 17
PREQ#2 14
AD31
AD29
AD27
AD25
C_BE#3
AD23
AD21
AD19
AD17
C_BE#2
IRDY#
DEVSEL#
LOCK#
PERR#
SERR#
C_BE#1
AD14
AD12
AD10
AD8
AD7
AD5
AD3
AD1
ACK#64
AD[31..0] 14, 20,27
C_BE#[3..0] 14,20,27
AD[31..0]
C_BE#[3..0]
PIRQ#B
VCC5
VCC3
-12V
PCI2
B1
-12V
B2
TCK
B3
GND
B4
TDO
B5
+5V
B6
+5V
B7
INTB#
B8
INTD#
B9
PRSNT#1
B10
RESERVED
B11
PRSNT#2
B12
GND
B13
GND
B14
RESERVED
B15
GND
B16
CLK
B17
GND
B18
REQ#
B19
+5V(I/O)
B20
AD31
B21
AD29
B22
GND
B23
AD27
B24
AD25
B25
+3.3V
B26
C/BE#3
B27
AD23
B28
GND
B29
AD21
B30
AD19
B31
+3.3V
B32
AD17
B33
C/BE#2
B34
GND
B35
IRDY#
B36
+3.3V
B37
DEVSEL#
B38
GND
B39
LOCK#
B40
PERR#
B41
+3.3V
B42
SERR#
B43
+3.3V
B44
C/BE#1
B45
AD14
B46
GND
B47
AD12
B48
AD10
B49
GND
B52
AD8
B53
AD7
B54
+3.3V
B55
AD5
B56
AD3
B57
GND
B58
AD1
B59
+5V(I/O)
B60
ACK64#
B61
+5V
B62
+5V
SLOT-PCI
IDSEL = AD19
MASTER = PREQ#2
PIRQ#C
TRST#
+12V
TMS
INTA#
INTC#
RESERVED
+5V(I/O)
RESERVED
GND
GND
RESERVED
RST#
+5V(I/O)
GNT#
GND
RESERVED
AD30
+3.3V
AD28
AD26
GND
AD24
IDSEL
+3.3
AD22
AD20
GND
AD18
AD16
+3.3V
FRAME#
GND
TRDY#
GND
STOP#
+3.3V
SDONE
SBO#
GND
PAR
AD15
+3.3V
AD13
AD11
GND
AD9
C/BE#0
+3.3V
AD6
AD4
GND
AD2
AD0
+5V(I/O)
REQ64#
+12V
A1
A2
A3
A4
TDI
A5
+5V
A6
A7
A8
+5V
A9
A10
A11
A12
A13
A14
A15
A16
A17
A18
A19
A20
A21
A22
A23
A24
A25
A26
A27
A28
A29
A30
A31
A32
A33
A34
A35
A36
A37
A38
A39
A40
A41
A42
A43
A44
A45
A46
A47
A48
A49
A52
A53
A54
A55
A56
A57
A58
A59
A60
A61
+5V
A62
+5V
VCC3
VCC5
ID2
PIRQ#C
PIRQ#A
VCC3_SB
PCIRST#2
PGNT#2 14
PME#
AD30
AD28
AD26
AD24
R293 330R
AD22
AD20
AD18
AD16
FRAME#
TRDY#
STOP#
PAR
AD15
AD13
AD11
AD9
C_BE#0
AD6
AD4
AD2
AD0
REQ#64
AD19
PCI PULL-UP / DOWN RESISTORS
PCI SLOT DECOUP LI NG CAPACITORS
PREQ#0 14,20
PREQ#5 14,27
A A
8
PREQ#0
PREQ#2
PREQ#5
PREQ#1
REQ#64
ACK#64
DEVSEL#
TRDY#
IRDY#
FRAME#
SERR#
PERR#
LOCK#
STOP#
1 2
3 4
5 6
7 8
R285 4.7KR
R287 4.7KR
1 2
3 4
5 6
7 8
1 2
3 4
5 6
7 8
7
VCC5 VCC5
RN61
8P4R-2.7K
VCC5
VCC5
RN58
8P4R-2.7K
RN59
8P4R-2.7K
PIRQ#B 14,20
PIRQ#D 14
PIRQ#C 14
PIRQ#A 14,20
PIRQ#H 14,27
PIRQ#G 14
PREQ#4 14
PIRQ#B
PIRQ#D
PIRQ#C
PIRQ#A
PIRQ#H
PIRQ#G
PREQ#4
6
1 2
3 4
5 6
7 8
7 8
5 6
3 4
1 2
RN60
8P4R-2.7K
RN63
8P4R-2.7KR0402
VCC5
C354 C 0.1U25Y
C364 C 0.1U25Y
C346 X_C0.1U25Y
C359 X_C100000P16Y0402
VCC3
C325 C 0.1U25Y
C363 C 0.1U25Y
C360 X_C0.1U25Y
C323 X_C0.1U25Y
5
4
-12V
VCC3_SB
3
C347 X_C0.1U25Y
C348 C 0.1U25Y
+12V
+
EC40 X_C10U16EL
C344 X_C0.1U25Y
C361 X_C0.1U25Y
Title
PCI Slot 1 & 2
Size Document Number Re v
Custom
Date: Sheet
2
MICRO-START INT'L CO.,LTD.
MS-7131 100
21 30 Wednesday, November 24, 2004
1
of
Page 22
8
7
6
5
4
3
2
1
ATA 33/66/100 IDE Connectors
IDE1
D D
HD_RST# 24
PD_DREQ 15
PD_IOW# 15
PD_IOR# 15
PD_IORDY 15
PD_DACK# 15
IRQ14 14
PD_A1 15
PD_A0 15
PD_CS#1 15
PD_LED 25
R142 33R0402 C349 _C10000P16X0402/20%
PDD7
PDD6
PDD5
PDD4
PDD3
PDD2
PDD1
PDD0
R221
4.7KR
HDRST#P HD_RST#
R203
8.2KR
PDD[0..15] 15
C C
B B
AC_SYNC 15,19
AC_SDOUT 15,19
AC_BITCLK 15,19
CONN-IDE(20)V_blue
1
2
3 4
5 6
7 8
91110
12
13 14
16 15
17 18
19
22
21
24
23
26
25
28
27
30
29
32
31
34
33
36
35
38
37
40 39
R194
4.7KR
VCC3 VCC3
ICH5_DOUT 14
ICH5_SHCLK 14
AC_SYNC
AC_SDOUT
R324 0R
PDD8
PDD9
PDD10
PDD11
PDD12
PDD13
PDD14
PDD15
PD_DET 17
PD_A2 15
PD_CS#3 15
R210
10KR
CNR1
B1
MII_MDIO
B2
MII_COL
B3
MII_TXCLK
B4
GND1
B5
MII_RXER
B6
MII_TXD3
B7
CNR_TXD1
CNR_RSTSYNC
CNR_RXD2
CNR_RXD0
VCC5_SB
-12V
VCC3
ICH5_DOUT ICH5_DIN
SMBCLK
PRIMARY_DN#
AC97_BITCLK
GND2
B8
MII_TXD1
B9
MII_TXEN
B10
GND3
B11
MII_RXD2
B12
MII_RXD0
B13
GND4
B14
RESV6
B15
+5VDUAL
B16
USB_OC#
B17
GND5
B18
-12V
B19
+3.3VD
B20
GND6
B21
EE_DOUT
B22
EE_SHCLK
B23
GND7
B24
SMB_A0
B25
SMB_SCL
B26
PRIMARY_DN#
B27
GND8
B28
AC97_SYNC
B29
AC97_SDATA_OUT
B30
AC97_BITCLK
SLOT-CNR
MII_MDC
MII_CRS
MII_RXDV
MII_RXCLK
MII_TXD2
MII_TXD0
LAN_CLK
MII_RXD1
MII_RXD3
+3.3VDUAL
SMB_A1
SMB_A2
SMB_SDA
AC97_RESET#
AC97_SDATA_IN1
AC97_SDATA_IN0
C419
GND9
GND10
GND11
USB+
GND12
USB+12V
GND13
+5VD
GND14
EE_DIN
EE_CS
RESV12
GND15
SATA_TX0 15
SATA_TX#0 15
SATA_RX#0 15
SATA_RX0 15
SATA_TX2 15
SATA_TX#2 15
SATA_RX#2 15
SATA_RX2 15
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10
A11
A12
A13
A14
A15
A16
A17
A18
A19
A20
A21
A22
A23
A24
A25
A26
A27
A28
A29
A30
C358 _C10000P16X0402/20%
C357 _C10000P16X0402/20%
C371 _C10000P16X0402/20%
C372 _C10000P16X0402/20%
C327 _C10000P16X0402/20%
C328 _C10000P16X0402/20%
C339 _C10000P16X0402/20%
C340 _C10000P16X0402/20%
CNR_TXD2
CNR_TXD0
CNR_CLK
CNR_RXD1
+12V
VCC3_SB
VCC5
ICH5_CS ICH5_SHCLK
ICH5_DIN 14
ICH5_CS 14
SMBDATA
AC_SDIN2
AC_SDIN1
AC_SDIN0
SMBDATA 12,15,17,24 SMBCLK 12,15,17,24
AC_RST# 15 ,19
AC_SDIN2 15,19
AC_SDIN1 15
AC_SDIN0 15
SATA CONNECTOR
SATA1
1
GND
2
HT+
3
HT-
4
GND
5
HR-
6
HR+
7
GND
CONN-SATA_white
SATA3
1
GND
2
HT+
3
HT-
4
GND
5
HR-
6
HR+
7
GND
CONN-SATA_white
VCC3
SATA_TX1 15
SATA_TX#1 15
SATA_RX#1 15
SATA_RX1 15
SATA_TX3 15
SATA_TX#3 15
SATA_RX#3 15
SATA_RX3 15
VCC3
C409
X_C100000P16Y0402
C350 _C10000P16X0402/20%
C355 _C10000P16X0402/20%
C362 _C10000P16X0402/20%
C320 _C10000P16X0402/20%
C321 _C10000P16X0402/20%
C336 _C10000P16X0402/20%
C337 _C10000P16X0402/20%
SATA2
1
GND
2
HT+
3
HT-
4
GND
5
HR-
6
HR+
7
GND
CONN-SATA_white
SATA4
1
GND
2
HT+
3
HT-
4
GND
5
HR-
6
HR+
7
GND
CONN-SATA_white
X_C10P50N0402
R322
CLOSED TO CNR
0R
LAN_RXD0 14
LAN_RXD2 14
A A
8
7
LAN_RXD1 14
LAN_CNRCLK 14
LAN_RSTSYNC 14
LAN_TXD0 14
LAN_TXD1 14
LAN_TXD2 14
LAN_RXD0
LAN_RXD2
LAN_RXD1
LAN_CNRCLK
RN66 8P4R-33R0402
LAN_RSTSYNC
LAN_TXD0
LAN_TXD1
LAN_TXD2
RN67 8P4R-33R0402
6
1 2
3 4
5 6
7 8
1 2
3 4
5 6
7 8
CNR_RXD0
CNR_RXD2
CNR_RXD1
CNR_CLK
CNR_RSTSYNC
CNR_TXD0
CNR_TXD1
CNR_TXD2
5
AC_SDIN2
4
R304 X_10KR0402
Title
IDE, SATA & CNR
Size Document Number Re v
Custom
3
Date: Sheet
2
MICRO-START INT'L CO.,LTD.
MS-7131 100
of
22 30 Wednesday, November 24, 2004
1
Page 23
H
G
F
E
D
C
B
A
POWER CIRCUIT FOR USB PORT 0,1,2,3
POWER CIRCUIT FOR USB PORT 4,5,6,7
FS4
F-MINISMDC110
C0.1U25Y
F-MINISMDC110
X_C0.1U25Y
L17
4 3
L18
4 3
1 2
C335
FS3
1 2
C401
R314
2.7KR
R318
5.1KR
NEAR USB CONNECTOR
R315
2.7KR
R316
5.1KR
NEAR USB CONNECTOR
SBD4SBD4+
SBD5SBD5+
NEAR USB CONNECTOR
5VDUAL1
4 4
3 3
USB4- 15
USB4+ 15
USB5- 15
USB5+ 15
OC#3_4 15
OC#3_4
5VDUAL1
OC#3_4
Front PANEL USB CONNECTOR FOR USB PORT 4,5
X_CMC-L02-9008014-T34
1 2
1 2
X_CMC-L02-9008014-T34
USBVCC4_5
+
EC42
CD470U10EL11.5
USBVCC6_7
+
EC41
CD470U10EL11.5
R313
1KR
Footprint: MINISMD050 ; NewPN:D08-0100100-P16
check voltage-drop
R323
1KR
R415 and R2442:
EMI suggestion for ESD
USBVCC4_5
5 2
6
SBD5-
USB2
SBD5SBD5+ SBD4+
1 2
3 4
5 6
7 8
H2X5(9)_yellow
1
10
4
3
D18
X_IPC220CZ6 /SO6
USBVCC4_5
C416 C1000P50N
SBD4-
OC#3_4
SBD4+ SBD5+
SBD4-
C1000P50N
USB3- 15
USB3+ 15
USB2- 15
USB2+ 15
5VDUAL1
6
1
USBVCC2
C139
USBVCC2
5 2
4
3
X_IPC220CZ6 /SO6
R326 X_0R0805
R325 X_0R0805
FS2
F-MINISMDC200
OC#1_2 15
C0.1U25Y
1 2
C322
R132
2.7KR
R137
5.1KR
NEAR USB CONNECTOR
USBVCC2
+
EC23
.CD1000U6.3EL15
REAR PANEL USB CONNECTOR FOR USB PORT 2,3
SBD2- SBD3+
SBD2+ SBD3-
D15
CMC-L02-9008014-T34
1 2
4 3
L4
4 3
L5
CMC-L02-9008014-T34
1 2
USBVCC2
SBD3SBD3+
USBVCC2
SBD2SBD2+
USBVCC2 18
LAN_USB1A
5
6
7
8
UP
1
2
3
4
DOWN
_CONN-RJ45_USBX2_LEDX2-20-30u-in
NEAR USB CONNECTOR
CP15 X_COPPER
21
22
23
24
25
26
27
28
2 2
USBVCC2
6
1
5 2
X_IPC220CZ6 /SO6
D
USB1+
X_CMC-L02-9008014-T34
L15
USB7- 15
USB7+ 15
USB6+ 15
USB6- 15
1 1
H
4 3
1 2
L16
4 3
1 2
X_CMC-L02-9008014-T34
G
SBD7SBD6+
SBD6-
SBD7+ SBD6+
6
1
F
SBD7+
USBVCC6_7
5 2
4
3
X_IPC220CZ6 /SO6
SBD6- SBD7-
D17
USBVCC6_7
USB3
1 2
3 4
5 6
7 8
10 9
H2X5(9)_yellow
C415 C1000P50N
SBD6- SBD7SBD6+ SBD7+
OC#3_4
E
USB1-
USB0-
4
USB0+
3
D16
REAR PANEL USB CONNECTOR FOR USB PORT 0,1 Front PANEL USB CONNECTOR FOR USB PORT 6,7
USB0- 15
USB0+ 15
USB1- 15
USB1+ 15
CP3 X_COPPER
CP13 X_COPPER
C72 X_C0.1U25Y
USBVCC2
C131
CMC-L02-9008014-T34
L1
4 3
1 2
L2
4 3
1 2
CMC-L02-9008014-T34
C
NEAR USB CONNECTOR
Title
Size Document Number Re v
Custom
Date: Sheet
C1000P50N
USB1
USBVCC2
5
5
6
7
UP
8
1
2
3
DOWN
4
CONN-USBX2
9
10
11
12
SBD0SBD0+
USBVCC2
SBD1SBD1+
6
7
8
1
2
3
4
MICRO-START INT'L CO.,LTD.
USB CONNECTORS
MS-7131 100
B
9
10
11
12
of
23 30 Wednesday, November 24, 2004
A
Page 24
8
7
6
5
4
3
2
1
ACPI Controller
DDR AND DDR II VOLT SELECT
DDRTYPE VDIMM
VCC5_SB
D D
N-MMBT3904_SOT23
C C
SMBDATA 12,15,17,22
THIS PIN IS OPEN DRAIN OUTPUT
B B
VCC_VID / VID _GOOD
Place MOSFET near CPU
VID_GD# 6,26
PWR_OK 25
AGP_PRT 25
PLED1 25
PLED2 25
SMBCLK 12,15,17,22
MS5_RST# 25
MS7_POK 8,15
R206
330R
Q23
VCC3
R168
1KR
V_FSB_VTT
C155
C10U16Y1206
shape (pay attention layout)
R211
330R
R186 4.7KR
Q24
N-MMBT3904_SOT23
R189 4.7KR
VCC5_SB
R172
4.7KR
R180 33R0402
R176 33R0402
MS7_POK
PWR_OK
X7R
C181 C0.22U10X
VCC5
C180
C0.1U25Y
R156 0R
S
Q20
D
V_1P5_CORE
PULL LOW 2.5V
PULL HIGH 1.8V
R187
1KR
R167
1KR
1
2
3
4
5
6
7
8
9
10
11
12
G
N-P45N02LD_TO252
VCC5_SB
R154 3.3R
R188
1KR
46
48
47
SCL
SDA
PLED1/EXTRAM
FP_RST#
CHIP_PWGD
CPU_PWGD
PWROK_BUF
PWROK
PSOUT#
DDRTYPE
SS
GND0
VCC5
PLED0/3VDLDEC#
VID_GD13VID_SEN14VID_DRV155VSB016RAM_SBDRV/DMSB
C177
C1U16Y
VCC5
R193
330R
40
44
41
42
43
S3#45S5#
VCC3
PCI_RST#
DEV_RST#
HDD_RST#
SLOT_RST#
MS-7
RAM_LSEN17RAM_LDRV18RAM_HSEN
RAM_HDRV/DMV193VSB223VSB_DRV23VAGP_SEN
21
20
RAMDRV
38
39
37
AGND
RSMRST#
BUF_RST#
5VUSB_DRV
VAGP_DRV
24
Wide Trace
R191 33R0402
R192 33R0402
U9
CHARPMP
C2
C1
5VSB1
VLR1_DRV
VLR1_SEN
5V_DRV
VLR2_DRV
VLR2_SEN
GND1
MS-7-RBC
SLP_S4# 15
SLP_S3# 15,18
PLTRST# 8,14
HD_RST# 22
RSMRST# 15
VCC3
VCC5_SB
EC24 .CD1000U6.3EL15
36
35
34
33
32
31
30
29
28
27
26
25
C179
C1000P50X
PCIRST#2 20,21
PCIRST#1 18,27
9VSB:for MS7 internal control logic voltage
+
C194 C 1 U16Y
9VSB
C203 C1U16Y0805
C197 C1U16Y0805
V_2P5_MCH_DRV
R78
33R
C332
X_C1000P50X
Wide Trace
RAMDRV
G
Q8
N-P45N02LD_TO252
+
EC6
.CD1000U6.3EL15
+
EC34
470u/10V
+
EC38
.CD1000U6.3EL15
DDR 2.5V Power
2.5V/7A(DIMM)+5A(NB)
C37
DDR VTT Power
C44
C0.1U25Y
VCC_DDR
R41
1KR1%
R47
1KR1%
VCC_DDR
VCC3_SB
A A
C32
C0.1U25Y
U5
8
VREF2
7
ENABLE
6
VCNTL
5
BOOT_SEL
W83310DS_SOIC8
9
1
VIN
2
GND
GND
3
VREF1
4
VOUT
.CD1000U6.3EL15
8
VTT_DDR
+
EC17
+
EC35
.CD1000U6.3EL15
7
X_C1000P50X
G
R157
0R
R158
X_75R1%
6
VCC3
VCC3_SB
D S
Q9
N-NDS351AN_SOT23
G
S
D
D
Q10
N-P45N02LD_TO252
S
R101 5.1KR1%
AGP_VREF
R100 51KR1%
C106 C2200P16X
R98
C0.1U16X
200R
VCC5
CHARGE PUMP
VOLTAGE
OUTPUT
C190 X_C1000P50X C199 C0.1U25Y
V_2P5_MCH_SENSE
AGP_VREF
C79
C1000P50X
R249 130R1%
C99
R250
120R1%
R99
49.9KR1%
Close to MS6+
4 5
3
5V_DRV
2
1
VCC3
NN-P2103HV_SO8
VCC_DDR
5
VCC5_SB
6
Q34
7
VCC3_SB
8
VCC3
+
4
MCH & ICH Core POWER
VCC5
D5
S-1N5817_DO214AC
U7
ISET7BOOT
6
VREF_IN
5
FB
4
COMP
3
SS
2
GND
1
PWROK
MS-6+_SOP14
EC28
.CD1000U6.3EL15
8
9
H_DRV
10
PGND
11
ISEN
12
L_DRV
13
VDD
14
VDDA
C76
C2.2U10X0805
V_1P5_CORE
SLP_S3# 15,18
R79
10R0805
CLOSE TO CHIP
VCC5
X_C2200P50X
R199
4.7KR0402
R212
4.7KR0402
Remove if sequencing not require.
VCC5
+
EC39
.CD1000U6.3EL15
CHOKE5 CH-3.3U4A
C65
X_C100000P16X
C78 C0.22U16X
V_1P5_HGATE
R84 3.92KR1%
C77 C2.2U10X0805
V_1P5_SENSE
V_1P5_LGATE
1 2
D S
Q25
N-NTD80N02_T0252
G
D S
G
Q22
N-P50N03LD_TO252
+
1 2
+
1 2
CH-4.2U10A
EC29
.CD1000U6.3EL15
EC30
.CD1000U6.3EL15
CHOKE4
1 2
.CD1000U6.3EL15
+
1 2
+
EC27
.CD1000U6.3EL15
.CD1000U6.3EL15
V_1P5_CORE
EC36
Assume Iagp=12A, 50N03 Rds,on(max)=12mOhm
Rsen(R84)>=1.5*Iagp*Rds,on(max)/72uA
>=1.5*12*12m/72u
>=3K Ohm
If Iagp>=7A, high side and low side driver MOS please use TO-252 type
(8 Device,each port 500mA==>8X0.5=4A)
Vdrop=4A X 35m ohm (Rds)=140mV
5VDUAL1=5.00V-0.14V=4.86V
5VDUAL1
D
Q36
REAR
S
N-P45N02LD_TO252
VCC5
Low RDS ON MOSFET
Q28
P-SI2303DS_SOT23
D S
D S
Q30
N-NDS351AN_SOT23
+
1 2
EC32
.CD100U16EL11
V_2P5_MCH
C240
C0.1U10X0402
EC31
X_C22U6.3EL
MICRO-START INT'L CO.,LTD.
ACPI CONTROLLER_MS7
MS-7131 100
2
C202
5V_DRV
C201
X_C1000P50X
V_FSB_VTT
3
Q21
4 5
3
2
1
NN-P2103HV_SO8
VCC5
+12V
R219
1KR0402
Q26
N-MMBT3904_SOT23
Q27
N-MMBT3904_SOT23
+
EC26
CD1500U6.3EL20-1
5V DUAL Power
VCC5_SB
6
7
G
8
VCC3
G
G
Title
Size Document Number Re v
Custom
Date: Sheet
+
1 2
C187
C0.1U25Y
EC37
+
of
24 30 Wednesday, November 24, 2004
1
Page 25
8
7
6
5
4
3
2
1
VCC5_SB
R117
X_4.7KR
VCC3
D D
AGP_PRT 24
C C
VCC5_SB
PS_ON# 18
R118
PS_ON#
-12V
1KR
R116 0R
Q16 X_N-2N7002_SOT23
C109
C1000P50N
C117
C1000P50N
D S
G
C148
C1000P50N
VCC5
ATX Connector INTEL/PB Front Panel Connector MSI Front Panel Connector
ATX1
13
14
15
16
17
18
-5V
19
20
21
22
23
24
2X12 POWER
PWR-2X12M
3.3V
-12V
GND
P_ON
GND
GND
GND
-5V
5V
5V
5V
GND
3.3V
3.3V
GND
GND
GND
POK
5VSB
+12V
+12V
DET
1
2
3
4
5V
5
6
5V
7
8
9
10
11
X_C1000P50N
12
C138
VCC5
+12V
R128
10KR
C1000P50N
C135
C100P_50V
C94
C1000P50N
C125
X_C0.1U25Y
C149
VCC3
VCC5
PWR_OK
C140
C1000P50N
VCC5_SB
+12V
C134
X_C0.1U25Y
PWR_OK 24
C E
B
2.2KR0402
JFP1
GND
SPK-
BUZ+
PLED2
PLED15BUZ-
SPK+
CUT
H2X4(7)_color-N31-2041101
PLED2
PLED1
R299
1
3
SPKR 15
7
SPKR:ICH6 integrated pull-down,only
enable at boot/reset for strapping
functions; at other time is disabled.
ALARM 18
RN64 8P4R-100R_0402
1 2
3 4
5 6
7 8
Q35
N-MMBT3904_SOT23
R306 X_0R0402
2
4
6
8
VCC5
PLED1
PLED2
PWSW-
CUT
D14
1 2
S-BAT54A_SOT23
3
PLED1
2
PLED2
4
PWSW+
6
8
10
IDE_LED
PLED1 24
PLED2 24
R307 1K R0402
R310
10KR0402
PD_LED 22
SATALED# 15
VCC3
MS5_RST# 24 PWRBTIN 18
ICH_RST# 15
R321 X_0R0402
check SI
VCC3_SB
R311 4.7KR0402
HDD+
R320 220R 0402
IDE_LED
X_C100000P16Y0402
JFP2
1
HDD+
3
HDDGNDR5PWSW+
7
RESET
9
RSVD
H2X5(10)_black-N31-2051231
C406
SATALED#:
1.tristated:not activate
2.low:active
VCC5_SB
C391
C1U16Y
VGA Connector
D6
1PS226_SOT23
2
Video Connector
15
10
14
9
13
8
12
7
11
6
VGA1
CONN-VGA
17
5
4
3
2
1
16
CRTB
FB4 0.082U300m
C115
C3.3P50N
50V
BLUE "rounted GND", use one via to GND.
CRTG
FB5 0.082U300m
C119
C3.3P50N
50V
GREEN "rounted GND", use one via to GND.
CRTR
FB6 0.082U300m
C122
C3.3P50N
50V
RED "rounted GND", use one via to G ND.
C116
C3.3P50N
C120
C3.3P50N
C123
C3.3P50N
R122
150R1%
R124
150R1%
R126
150R1%
C88
C0.1U25Y
C113
C47P50N
C112
C47P50N
VGA_PWR
R85
X_47KR
FOR ESD
FS1 F-MICROSMD110
VCC5
POLY SWITCH
R103 2.2KR
3VDDCCL 10
R112 2.2KR
B B
3VDDCDA 10
CRT_HSYNC 10
CRT_VSYNC 10
V_2P5_MCH
G
Q14 N-2N7002_SOT23
V_2P5_MCH
G
Q15 N-2N7002_SOT23
D S
D S
VCC5
R88 2.2KR
5VDDCCL
VCC5
R109 2.2KR
5VDDCDA
D7
R120 33R0402 D10
D8
R121 33R0402
R87 100R
R102 100R
1PS226_SOT23
231
VCC5
1PS226_SOT23
231
VCC5
5V_DCCL
5V_DCDA
Place clamping diodes close to VGA conn.
HSYNC
VSYNC
C98
C47P50N
C93
C47P50N
1
1
1
Place another RC to close VGA connector.
3
D9
1PS226_SOT23
2
3
1PS226_SOT23
2
3
V_2P5_DAC_FILTERED
R213
150R1%0402
V_2P5_DAC_FILTERED
R216
150R1%0402
V_2P5_DAC_FILTERED
R218
150R1%0402
Place close to
MCH,within 750 mil
of pin
CRT_B 10
CRT_G 10
CRT_R 10
A A
Title
ATX & Front Panel & VGA
Size Document Number Re v
Custom
8
7
6
5
4
3
Date: Sheet
2
MICRO-START INT'L CO.,LTD.
MS-7131 100
of
25 30 Wednesday, November 24, 2004
1
Page 26
8
7
6
5
4
3
2
1
VCCP
Operating temperature must under 85 degree
C15
X_C4.7U16X1206
C13
X_C10U16Y1206
D D
C3
C0.1U16X
C4
C0.1U16X
C12
X_C10U16Y1206
+
1 2
+
1 2
+
1 2
+
1 2
EC2
CD1000U16EL20-1
EC3
CD1000U16EL20-1
EC4
CD1000U16EL20-1
EC1
CD1000U16EL20-1
VINMOS
C2
C1U16X0805-1
CHOKE1
CH-1.2U18A
C9
X_C0.1U16X
C1U16X0805-1
Icap(85 degree)=2.55A*4*1.7=17.34A
Icap(75 degree)=2.55A*4*2=20.4A
Icap(rms)=Iout*(D/N-D*D)1/2
=78*(0.117/2-0.117*0.117)1/2=16.512A
(For Mainstream CPU_3.2GHz_max)
VID5
VID5 5
C C
VID0 5
VID1 5
VID2 5
VID3 5
VID4 5
VID0
VID1
VID2
VID3
VID4
R34
12.4KR1%
R31
6.2KR1%
R26
3.09KR1%
R30
1.54KR1%
R25
768R1%
R29
392R1%
R32
590R1%
VID_ADJ
VID_GD# 6,24
R52 10KR
N-2N7002_SOT23
Q13
VRM_EN
D S
G
C20
+12VP
C27
X_C4.7U16X1206
+
EC5 .CD3300U6.3EL25
1 2
+
EC10 .CD3300U6.3EL25
1 2
+
EC8 .CD1800U6.3EL20
1 2
VCCP VCCP
C84 C10U10Y1206
C102 C10U10Y1206
C101 C10U10Y1206
C85 C10U10Y1206
C103 C10U10Y1206
C81 C10U10Y1206
*Pay attention*
This solution is cost-down solution and didnt'
meet the Intel Load-line specification,can't
use for OEM project.
For the OEM project: some components value
and MOSFET AVL should be fine-tune or change
VCCP
+
C420 X_C100U2SP-2
1 2
+
C422 X_C100U2SP-2
1 2
+
C96 C100U 2SP- 2
1 2
+
C421 X_C100U2SP-2
1 2
C82 C10U10Y1206
C105 C10U10Y1206
C100 C10U10Y1206
C86 C10U10Y1206
C104 C10U10Y1206
C83 C10U10Y1206
VCCP
+
EC20 X_CD680U4EL8
1 2
+
EC19 X_CD680U4EL8
1 2
+
EC18 X_CD680U4EL8
1 2
+
EC15 X_CD680U4EL8
1 2
+
EC14 CD680U4EL8
1 2
+
EC13 CD680U4EL8
1 2
+
EC21 X_CD680U4EL8
1 2
+
EC22 X_CD680U4EL8
1 2
+
EC12 CD680U4EL8
1 2
+
EC11 X_CD680U4EL8
1 2
HS1
2
112
HS-0500410-K08
HS2
2
112
HS-0500410-K08
Output Inductor(L)>=[1/(Iripple*Fsw)]*[Vout-(Vout/Vin)2]
>=[1/(11.7A*200KHz)]*[1.4-(1.4/12)2]=0.59uH
(We choose 1uH /40A)
C7
C1U16Y
PHASE1
CHOKE3
CH-1.0U40A
Q5
N-SUR50N024-06P_TO252-3
Q6
N-SUR50N024-06P_TO252-3
PHASE2
CHOKE2
CH-1.0U40A
R17
each Phase current must under 40A
2.2R0805
Q3
C26
C10000P50Y5
N-SUR50N024-06P_TO252-3
Q4
N-SUR50N024-06P_TO252-3
3
VCCP
ATX12V Power Connector
JPW1
+12VP
C19
C10000P50Y5
Title
VRM10.1_RT8800B
Size Document Number Re v
Custom
Date: Sheet
MS-7131 100
2
3
4
PWR-2X2M
MICRO-START INT'L CO.,LTD.
1
GND
12V
2
GND
12V
26 30 Thursday, December 02, 2004
1
of
C38
C10000P50Y5
R33 X_3.48KR1% C42 C33P50N
R28
34KR1%
7
R46 3KR1% R38 15KR1%
1
2
3
4
5
6
7
C43
C0.01U50X
VCC5
B B
A A
C33
C1U16Y
VID_ADJ
+12VP
R45 191R1%0805
R36 27KR
R37 3KR
8
VRM_EN
VCC3
Q11
X_N-MMBT3904_SOT23
R35 0R
R39 1.33KR1%
C41 X_C2200P50X
U3
VCC
PWM2
DACFB
PWM1
DACQ
N/C
FB
ISEN1
DVD
ISEN2
COMP
PGOOD
PI
GND
RT8ICOMMON
_RT8800BPS_SOIC16
VRM_GD
15
R20 2.2R0805
+12VP
C30
C1U16Y
16
15
14
13
12
11
10
9
R327
0R
R24
4.7KR
VCC3
R13
R23
110KR0603
R11 X_1KR1%
C23
R12 X_1KR1%
C24
523R1%
6
C1U10X
C1U10X
VCCP
R10
R14
1KR1%
1KR1%
PHASE1
PHASE2
3
D1
S-BAT54A_SOT23
2
1
C25 C0.1U25X
11
14
VCC
BOOT1
5
PVCC
1
PWM1
2
PWM2
6
PGND
5
GND
3
UGATE1
PHASE1
LGATE1
UGATE2
PHASE2
LGATE2
BOOT2
RT9602
10
C22 C0.1U25X
R8
12
2.2R0805
13
4
R9
9
2.2R0805
8
7
U2
G
G
4
D S
Q7
N-P0903BR_TO252-3
2 3
1
D S
D S
G
1
D S
Q2
G
N-P0903BR_TO252-3
D S
G
G
Q37
N-P0903BI_TO251
R18
2.2R0805
C31
C10000P50Y5
2 3
Q38
N-P0903BI_TO251
D S
VINMOS
C21
C1U16Y
Page 27
8
R261
1KR1%
R260
15KR1%
PCIRST#1 18,24
CTRL25
8
VCC5
PGNT#5 14
PREQ#5 14,21
PME# 14,20,21
ISOLATEB
LAN_TX+
LAN_TX-
LAN_RX+
LAN_RX-
CTRL25
LAN_V25
ISOLATEB
VCC3_SB
PIRQ#H
LAN_CLK
PGNT#5
PREQ#5
PME#
LAN_V25
AD31
AD30
AD29
AD28
AD[31..0] 14,20,21
C_BE#[3..0] 14,20,21
PAR 14,20,21
FRAME# 14,20,21
IRDY# 14,20,21
TRDY# 14,20,21
STOP# 14,20,21
PIRQ#H 14,21
VCC3_SB
B
P-PMBT2907ALT1_SOT23
C E
VCC3_SB
Q33
D D
C C
B B
AD[31..0]
C_BE#[3..0]
PAR
FRAME#
IRDY#
TRDY#
STOP#
PIRQ#H
A A
7
RTL8100C 5.9K
R238
5.49KR1%0402
U14
1
MDI0+/TX+
2
MDI0-/TX-
3
AVDDL/AVDD33
4
VSS
5
MDI1+/RX+
6
MDI1-/RX-
7
AVDDL/AVDD33
8
CTRL25
9
VSS/NC
10
AVDDH/NC
11
NC
12
NC/AVDD25
13
VSS/NC
14
MDI2+/NC
15
MDI2-/NC
16
AVDDL/NC
17
VSS
18
MDI3+/NC
19
MDI3-/NC
20
AVDDL/AVDD33
21
VSSPST
22
GND/NC
23
ISOLATEB
24
VDD18/NC
25
INTAB
26
VDD33
27
RSTB
28
CLK
29
GNTB
30
REQB
31
PMEB
32
VDD18/VDD25
33
AD31
34
AD30
35
GND
36
AD29
37
AD28
38
VSSPST
LAN_V25
C317
C10U10Y1206
7
6
LAN_X1
LAN_X2
LAN_EEDIN
LAN_EESHCLK
LAN_EEDOUT
112
LED3/NC
111
110
EESK
GND/NC
LAN_EECS
109
107
106
105
108
EEDI
EECS
EEDO
VDD33
VDD18/NC
LANWAKEUP
LAN_LINK100
LAN_X1
LAN_X2
LAN_TX_RX
127
128
125
126
VSS
RSET
VDD18/NC
CTRL18/NC
118
114
115
117
123
124
120
121
122
VSS
VSS
XTAL1
XTAL2
AVDDH/NC
119
VSSPST
116
LED0
GND/NC
113
LED2
LED1
VDD18/NC
RTL8100C
AD2739AD2640VDD3341AD2542AD2443CBE3B44VDD18/NC45IDSEL46AD2347GND/NC48AD2249AD2150VSSPST51GND52AD2053VDD18/VDD2554AD1955VDD3356AD1857AD1758AD1659CBE2B60FRAMEB61GND/NC62IRDYB63VDD18/NC
C_BE#3
AD27
AD24
AD23
AD27
VCC3_SB
AD22
C305
C0.1U25Y
AD21
AD20
C306
C0.1U25Y
AD25
AD26
R282
330R
LAN_V25
AD19
C_BE#2
AD18
AD17
AD16
C281
X_C10000P50Y5
6
FRAME#
C331
C0.1U25Y
AD0
AD1
103
104
AD1
AD0
VSSPST
VDD18/VDD25
VDD33
CBE0B
VSSPST
M66EN/NC
VDD33
VSSPST
VDD18/VDD25
CBE1B
SERRB
SMBDATA
GND/NC
SMBCLK
VDD33
PERRB
STOPB
DEVSELB
TRDYB
VSSPST
CLKRUNB
64
IRDY#
R226 X_0R0402
Y1
1 2
C22P50N0402
C242
VCC3_SB
102
AD2
101
100
GND
99
98
AD3
97
AD4
96
AD5
95
AD6
94
93
AD7
92
91
90
AD8
89
AD9
88
87
AD10
86
AD11
85
AD12
84
83
AD13
82
AD14
81
80
GND
79
AD15
78
77
76
PAR
75
74
73
72
71
70
69
68
67
66
65
C313
C10000P50Y5
C334
C282
C0.1U25Y
C0.1U25Y
25MHZ18P_D-1
C22P50N0402
C246
AD2
LAN_V25
AD3
AD4
AD5
AD6
AD7
C_BE#0
AD8
AD9
AD10
AD11
AD12
AD13
AD14
AD15
LAN_V25
C_BE#1
PAR
SERR#
PERR#
STOP#
DEVSEL#
TRDY#
LAN_V25
C283
C0.1U25Y
C277
C0.1U25Y
5
5
SERR# 14,20,21 LAN_CLK 17
PERR# 14,20,21
DEVSEL# 14,20,21
X_10KR
C338
X_C1U16Y
4
3
LAN Connector
49.9R1%
R152
330R
R234
X_10KR
3
R255
49.9R1%
R252
49.9R1%
R258
R257 49.9R1%
R138
330R
C165
X_C0.1U25Y
R235
3.6KR
C268 C0.1U25Y
C278 C0.1U25Y
VCC3_SB
LAN_LINK100
LAN_TX_RX
C174
X_C0.1U25Y
C163
X_C0.1U25Y
EMI reserve for Pin18,Pin20 EMI reserve for Pin17,Pin19
VCC3_SB VCC3_SB VCC3_SB
R222
8
7
6
5
4
U12
CS
VCC
SK
NC
DI
NC
DO
GND
AT93C46-10SI-2.7-A
LAN_EECS
1
LAN_EESHCLK
2
LAN_EEDIN
3
LAN_EEDOUT
4
R235 use 3.6k for 3.3v Voltage. 5.6k for 5v voltage
VCC3_SB
LAN_LINK100
LAN_RX-
LAN_RX+
LAN_TXLAN_TX+
LAN_TX_RX
2
LAN_RX+
LAN_RX-
LAN_TX+
LAN_TX-
LAN_USB1B
AMBER+
17
AMBER-
18
13
10
14
11
15
12
16
19
20
C159
C168
C1000P50N
C1000P50N
Title
LAN_RTL8100C
Size Document Number Re v
Custom
Date: Sheet
MS-7131 100
2
NC
9
NC
RDN
NC
NC
RDP
TDN
TDP
GREEN+
GREEN-
_CONN-RJ45_USBX2_LEDX2-20-30u-in
MICRO-START INT'L CO.,LTD.
1
of
27 30 Wednesday, November 24, 2004
1
Page 28
8
7
6
5
4
3
2
1
Jumper Setting / Manual Part
D D
U10_1
X5
X6
X7
X8
Heatsink
E31-0401101-K08 for 8 pin
C C
X1
MCH
X2
X3
X4
V_Grantsdale_heatsink
U15_1
V_ICH6_Hearsink
Optics Orientation Holes Mounting Holes Simulation
FM9
FM1
FM10
X
X
X_FM
X_FM
FM8
X_FM
X
X_FM
FM2
X
B B
FM12
X
X
X_FM
X_FM
FM11
X
X_FM
FM5
FM3
X
X_FM
FM7
FM6
X_FM
X_FM
FM4
X
X_FM
X
X_FM
X
X
VCC5
J1
SIM2 SIM1
X_PIN1*2
J2
X_PIN1*2
7
7
7
7
8
9
2
MH3
6
5
3
4
8
9
2
MH2
6
5
3
4
8
9
2
MH6
6
5
3
4
8
9
2
MH1
6
5
3
4
7
8
9
2
MH4
6
5
3
4
7
8
9
2
MH5
6
5
3
4
A A
Title
Jumper Setting / Manual Part
Size Document Number Re v
Custom
8
7
6
5
4
3
Date: Sheet
2
MICRO-START INT'L CO.,LTD.
MS-7131 100
of
28 30 Wednesday, November 24, 2004
1
Page 29
8
7
6
5
4
3
2
1
MS7131V100 to V1A change list
93/09/13
1 ADD Q37,Q38 COMPONENT IN BOM PART NUMBER: D03-0903B01-N03 2004.10.21
1.Create MS7131 ver:0A circuit.
2 2004.11.11
MODIFY VRM_GD SCHMATIC
D D
0923
MS7131V0A to V100 change list
Don't stuff RN2 , R40 ,R42 for CPU VCORE and Memtest fail issue 1 2004.10.13
Stuff the R224 for Power-on fail issue
2
Add two 0ohm/0805 (R325,R326) resistor instead of FS2, and don't stuff FS2 for Cost-down
3
Don't stuff all VCC_DDR to VTT_DDR stitching cap.(C143, C73, C192, C130 , C227,
4 2004.10.13
C151, C71, C133, C221, C220, C206, C238, C111, C172)
2004.10.13
2004.10.13
3
MODIFY AC97 SCHMATIC (POWER AND ACLINK)
4
MODIFY r320 from 330 to 220 for hdd led too dark issue
5
changeCN1 to 4 C0603 for cap burn issue
6
changeR23,39,45 FOR INTEL LOAD LINE
2004.11.11
2004.11.16
2004.11.17
2004.12.02
5 change EC1-4 footprint tp 560U_4V 2004.10.18
2004.10.18 6 change U11 power VCC5 to VCC3
C C
7
ADD Q37,Q38 FOR HI-SIDE MOSFET
8
change EC9, EC10 VALUE 3300UF TO 1800UF AND SIZ E 220U_16V TO 560U_4V
EXCHANGE SATA1-4 PRINT LOCATION
9 2004.10.18
CHANGE R238 VALUE TO SOLVE LAN TEST FAIL ISSUE
2004.10.18
2004.10.18
2004.10.19 10
11 add c155,c146 for VTT ,VCCP,VCCAAND VCCIOPLL VOLTAGE OUT SPC. 2004.10.19
12 change R84 for V_1P5_CORE OCP vol t a ge (3K to 3.92K)
2004.10.20
1314ADD 100p ON C94,149,135,158,148,109 LOCATION
B B
ADD L02-9008014-T34 ON L1,2,3,4
15
2004.10.20
2004.10.20
2004.10.21 MODIFY JFP1 180 OC
16 2004.10.21 ADD EC12,13,14 IN BOM PART NUMBER:C71-5610451-S03
2004.10.21 CHANGE 7131100 BCB PART NUMBER:P50-0713110-G37,E55 17
18 DEL R198,200,201,202 FOR AC97 TEST FAI L ISSUE 2004.10.21
19 2004.10.21 MODIFY R308 VALUE FROM 10 TO 22 OMH AND ADD C392 FOR AC97 TEST FAIL ISSUE
20 MODIFY C276,279 FROM 56P TO 47P FOR 14.318Mhz ACCURACY ISSUE 2004.10.29
21 MODIF Y C99 from 0 . 0 1u to 0.1u f or high tempratur e can no t boo t is s u e 2004.11.09
ADD EC12,13,14 IN BOM PART NUMBER:C71-5610451-S03 22 2004.11.09
22 2004.11.11 MODIFY C43 TO X7R, R25 TO 768,R39 TO 3.32k,R31 TO 523 FOR PWM UPDATE
A A
23
24
25
26
8
7
6
5
4
3
Title
History
Size Document Number Re v
Custom
Date: Sheet
2
MICRO-START INT'L CO.,LTD.
MS-7131 100
of
29 30 Thursday, December 02, 2004
1