1
Digitally signed by Nhat Tin
DN: cn=Nhat Tin, o, ou,
email=support@kythuatviti
nh.com, c=VN
Date: 2010.01.08 09:43:39
+07'00'
Cover Sheet
Block Diagram
Intel LGA775 CPU - Signals
Intel LGA775 CPU - Power
Intel LGA775 CPU- GND
Intel Grantsdale - CPU
Intel Grantsdale - Memory
Intel Grantsdale - PCI Express
Intel Grantsdale - GND
ICH6 Signal, Power, GND 10-12
Clock - CLOCK ICS954101DF & FWH
SIO NS PC8374L/K/T & I/O CONNECTOR
SERIAL PORT & VGA CONNECTOR
AC97 Audio Codec- AD1981B
A A
BCM 4401/5702/5705M LAN
DDR2 System Memory 1 , 2
DDR VTT DECPUPLING
IBM Slim IDE & SATA Conn.
ATX & FRONT PANEL
FAN Connectors 25
USB Connectors
MS-7 ACPI CONTROLLER
1
2
3
4
5
6
7
8
9
13
14
15
16
17 PCI-E X1 & PCI & ADD2R-N SLOT
18
20-21
22
23
24
26
27
IBM Wellfleet
MS-7129
Intel (R) Grantsdale (GMCH) + ICH6 Chipset
Intel Tejas & Prescott LGA775 Processor
Next Generation
CPU:
Intel Tejas & Prescott - 3.8G
System Chipset:
Intel (R) Grantsdale (GMCH) North Bridge
Intel (R) ICH6 South Bridge
On Board Chipset:
BIOS -- FWH 4M EEPROM
AC'97 Codec -- AD1981B
LPC Super I/O -- NS PC8374L/K/T
LAN --BCM 4401/5702/5705M LAN
CLOCK -- ICS954101DF
Main Memory:
2 CHANNEL DDR2 * 2 (Max 2GB)
PCI-E Slots:
PCI-E X1 & PCI & ADD2-N SLOT
Intersil PWM:
Controller: HIP6565ACV
Driver: HIP6602B *1 / HIP6601B * 1
Version 0A
VRM10 - INTERSIL 6565 3PHASE
Decoupling CAP
GPIO & Jumper setting
Power Delivery Mapping
Revision History
Manual Parts
28
29
30
31
32
33
MICRO-STAR INt'L CO., LTD.
MSI
Title
Size Document Number Rev
1
Date: Sheet
COVER SHEET
(MS-7129)
13 3 Saturday, October 16, 2004
0A
of
1
IBM Wellfleet Next
Generation
VRM 10.1
Intersil 6561
3-Phase PWM
Analog
VRM_GD
P.27
VTT_PWG
Intel LGA775 Processor
FSB
H_PWRGD
H_CPURST#
Grantsdale-G
P.3~5
CHANNEL A
2 DDR2
DIMM
Modules
P.20-21
PWR_GD
PCIRST#1
MS7
MS-7129
System Block Diagram
VID_GD
RSMRST#
HD_RST#
P.27
Video
Out
HD_RST#
A A
UltraBay Silm
Enhance
SERIAL ATA1
USB2.0
P.15
P.23
P.23
UltraDMA
33/66/100
USB
VRM_GD
ICH6
USB Port 1~ 7
P.26
RSMRST#
AD1981B
AC'97 Codec
P.16
DMI
P.6~9
PLTRST#
P.10~12
PWR_GD
LPC Bus
SLP_S4#
SLP_S3#
LPC SIO
NS
PC8374L/K/T
PCIRST_ICH6#
PCIRST#2
P.14
PCI
ATX1
PWR_OK
PCI-E Slot
1
PCIRST#2
P.25
BroadCOM
5702/5705M
PCIRST#1
P.18
PCI
PWRBTN#
4M Flash
P.14
Keyboard
Mouse
P.14
P.14
Parallel
P.14
Serial FWH
CPU_FAN1 REAR_FAN1
P.15
P.23
P.23
JFP1
P.24
PCIRST#2
Title
Size Document Number Rev
1
Date: Sheet
BLOCK DIAGRAM
(MS-7129)
0A
of
23 3 Saturday, October 16, 2004
MICRO-STAR INt'L CO., LTD.
MSI
8
7
6
5
4
3
2
1
VID Pull-Up Resistor
VTT_OUT_RIGHT
RN1
8P4R-680
H_VID3
1
2
3
4
5
6
7
8
R2 680/0402
R3 680/0402
H_TRST#
H_TCK
VTT_OUT_RIGHT
C1 104P
C2 104P
VTT_OUT_LEFT [4]
V_FSB_VTT [4,6,8,12,27]
VTT_OUT_RIGHT [4]
VTT_OUT_LEFT
H_VID1
H_VID2
H_VID4
H_VID0
H_VID5
R4 49.9RST/0402
R5 49.9RST/0402
MICRO-STAR INt'L CO., LTD.
Intel LGA775 CPU - Signals
(MS-7129)
of
33 3 Saturday, October 16, 2004
1
0A
AJ3
AK3
ITP_CLK1
ITP_CLK0
D7#
D6#
D5#
H_D#5
H_D#6
H_D#7
4
DBRESET#
VCC_VRM_SENSE
VSS_VRM_SENSE
CPU2_ITP
CPU2_ITP#
H_VID4
H_VID5
H_VID2
H_VID3
AM5
AL4
AK4
AL6
AM3
RSVD
VID5#
VID4#
VID3#
VID2#
GTLREF
BPM5#
BPM4#
BPM3#
BPM2#
BPM1#
BPM0#
PCREQ#
REQ4#
REQ3#
REQ2#
REQ1#
REQ0#
TESTHI12
TESTHI11
TESTHI10
TESTHI9
TESTHI8
TESTHI7
TESTHI6
TESTHI5
TESTHI4
TESTHI3
TESTHI2
TESTHI1
TESTHI0
BCLK1#
BCLK0#
COMP3
COMP2
COMP1
COMP0
ADSTB1#
ADSTB0#
DSTBP3#
DSTBP2#
DSTBP1#
DSTBP0#
DSTBN3#
DSTBN2#
DSTBN1#
DSTBN0#
LINT1/NMI
LINT0/INTR
D4#
D3#
D2#
D1#
D0#
H_D#0
H_D#1
H_D#3
H_D#2
H_D#4
H_VID0
H_VID1
AL5
AM2
VID1#
RSVD
RSVD
RS2#
RS1#
RS0#
AP1#
AP0#
BR0#
DP3#
DP2#
DP1#
DP0#
LGA775
VID0#
H1
AG3
AF2
AG2
AD2
AJ1
AJ2
G5
J6
K6
M6
J5
K4
W2
P1
H5
G4
G3
F24
G24
G26
G27
G25
F25
W3
F26
AK6
G6
G28
F28
A3
F5
B3
U3
U2
F3
R1
G2
T1
A13
J17
H16
H15
J16
AD5
R6
C17
G19
E12
B9
A16
G20
G12
C8
L1
K1
DBRESET# [11]
VCC_VRM_SENSE [28]
VSS_VRM_SENSE [28]
CPU2_ITP [13]
CPU2_ITP# [13]
H_VID[0..5] [28]
CPU_GTLREF
H_BPM#5
H_BPM#4
H_BPM#3
H_BPM#2
H_BPM#1
H_BPM#0
H_PCREQ#
H_REQ#4
H_REQ#3
H_REQ#2
H_REQ#1
H_REQ#0
H_TESTHI12
H_TESTHI11
H_TESTHI10
H_TESTHI9
H_TESTHI8
H_TESTHI2_7
H_TESTHI1
H_TESTHI0
RSVD_AK6
RSVD_G6
H_RS#2
H_RS#1
H_RS#0
H_COMP3
R13 100RST /0402
R15 100RST/0402
H_COMP2
H_COMP1
R16 60.4RST/0402
H_COMP0
R17 60.4RST/0402
3
H_TMS
RN2 8P4R-51/0402
H_TDO
H_TDI
RN3
H_PCREQ# [6]
H_REQ#[0..4] [6]
R7 62/0402
R8 62/0402
R9 62/0402
R10 62/0402
R11 X_62/0402
R12 X_62/0402
CK_H_CPU# [13]
CK_H_CPU [13]
H_RS#[0..2] [6]
H_BR#0 [4,6]
H_ADSTB#1 [6]
H_ADSTB#0 [6]
H_DSTBP#3 [6]
H_DSTBP#2 [6]
H_DSTBP#1 [6]
H_DSTBP#0 [6]
H_DSTBN#3 [6]
H_DSTBN#2 [6]
H_DSTBN#1 [6]
H_DSTBN#0 [6]
H_NMI [10]
H_INTR [10]
CPU_GTLREF [4]
R6 49.9RST/0402
1 2
3 4
5 6
7 8
7 8
5 6
3 4
1 2
8P4R-51/0402
VTT_OUT_LEFT
H_TESTHI10
7 8
H_TESTHI11
5 6
H_TESTHI9
3 4
H_TESTHI8
1 2
RN4 8P4R-62/0402
V_FSB_VTT
VTT_OUT_LEFT
V_FSB_VTT
VTT_OUT_RIGHT
VTT_OUT_LEFT
C4
X_104P
PLACE RESISTORS OUTSIDE SOCKET
CAVITY IF NO ROOM FOR VARIABLE
RESISTOR DON'T PLACE
MSI
Title
Size Document Number Rev
Date: Sheet
2
R1 X_0/0402
CPU SIGNAL BLOCK
A8#
D21#
DBR#
H_A#6
H_A#3
H_A#5
H_A#7
H_A#4
AC2
AN3
AN4
AN5
AN6
A7#
A6#
A5#
A4#
A3#
DBR#
RSVD
RSVD
VSS_SENSE
VCC_SENSE
D20#
D19#
D18#
D17#
D16#
D15#
D14#
D13#
D12#
D11#
D10#
D9#
D8#
C12
B12D8C11
B10
A11
A10A7B7B6A5C6A4C5B4
H_D#20
H_D#19
H_D#12
H_D#18
H_D#11
H_D#17
H_D#14
H_D#13
H_D#15
H_D#16
H_D#10
H_D#8
H_D#9
D D
H_DBI#[0..3] [6]
H_EDRDY# [6]
H_IERR# [4]
H_FERR# [4,10]
H_STPCLK# [10]
H_INIT# [10]
C C
B B
H_D#[0..63] [6]
A A
8
H_DRDY# [6]
H_TRDY# [6]
H_DEFER# [6]
THERMDP# [14]
THERMDN#
TRMTRIP# [4,10]
H_PROCHOT# [4]
H_IGNNE# [10]
ICH_H_SMI# [10,14]
H_FSBSEL0 [4,8,13]
H_FSBSEL1 [4,8,13]
H_FSBSEL2 [4,8,13]
H_PWRGD [4,10]
H_CPURST# [4,6]
H_DBSY# [6]
H_ADS# [6]
H_LOCK# [6]
H_BNR# [6]
H_HIT# [6]
H_HITM# [6]
H_BPRI# [6]
H_A20M# [10]
H_SLP# [10]
H_DBI#0
H_DBI#1
H_DBI#2
H_DBI#3
H_TDI
H_TDO
H_TMS
H_TRST#
H_TCK
H_D#63
H_D#62
H_D#61
H_D#60
H_D#59
H_D#58
H_D#57
H_D#56
H_D#55
H_D#54
7
AD3
AD1
AC1
AG1
AH2
A8
G11
D19
C20
F2
AB2
AB3
R3
M3
P3
H4
B2
C1
E3
D2
C3
C2
D4
E4
G8
G7
AF1
AE1
AL1
AK1
M2
AE8
AL2
N2
P2
K3
L2
N5
AE6
C9
G10
D16
A20
Y1
V2
AA2
G29
H30
G30
N1
G23
B22
A22
A19
B19
B21
C21
B18
A17
B16
C18
H_A#[3..31] [6]
U1A
DBI0#
DBI1#
DBI2#
DBI3#
EDRDY#
IERR#
MCERR#
FERR#/PBE#
STPCLK#
BINIT#
INIT#
RSP#
DBSY#
DRDY#
TRDY#
ADS#
LOCK#
BNR#
HIT#
HITM#
BPRI#
DEFER#
TDI
TDO
TMS
TRST#
TCK
THERMDA
THERMDC
THERMTRIP#
GND/SKTOCC#
PROCHOT#
IGNNE#
SMI#
A20M#
SLP#
RSVD
RESERVED0
RESERVED1
RESERVED2
RESERVED3
RESERVED4
RESERVED5
BOOTSELECT
LL_ID0
LL_ID1
BSEL0
BSEL1
BSEL2
PWRGOOD
RESET#
D63#
D62#
D61#
D60#
D59#
D58#
D57#
D56#
D55#
D54#
D53#
B15
H_D#53
H_A#8
H_A#9
H_A#27
A28#
D41#
H_D#40
H_A#21
H_A#23
H_A#26
H_A#25
H_A#24
H_A#19
H_A#20
H_A#18
H_A#17
H_A#22
AF5
AB4
AC5
AB5
AA5
AD6
AA4Y4Y6W6AB6W5V4V5U4U5T4U6T5R4M4L4M5P6L5
A27#
A26#
A25#
A24#
A23#
A22#
A21#
A20#
A19#
A18#
A17#
D40#
D39#
D38#
D37#
D36#
D35#
D34#
D33#
D32#
D31#
D30#
E19
E18
F18
F17
G17
G18
E16
E15
G16
G15
F15
H_D#39
H_D#37
H_D#31
H_D#36
H_D#32
H_D#34
H_D#38
H_D#35
H_D#33
H_D#30
H_A#30
H_A#31
H_A#29
H_A#28
AJ6
AJ5
AH5
AH4
AG5
AG4
AG6
AF4
A35#
A34#
A33#
A32#
A31#
A30#
A29#
D52#
D51#
D50#
D49#
D48#
D47#
D46#
D45#
D44#
D43#
D42#
C14
C15
A14
D17
D20
G22
D22
E22
G21
F21
E21
F20
H_D#51
H_D#46
H_D#49
H_D#47
H_D#50
H_D#52
H_D#42
H_D#45
H_D#48
H_D#41
H_D#44
H_D#43
6
H_A#10
H_A#14
H_A#12
H_A#15
H_A#13
H_A#11
H_A#16
A16#
D29#
G14
H_D#29
H_D#28
A9#
A15#
A14#
A13#
A12#
A11#
A10#
D28#
D27#
D26#
D25#
D24#
D23#
D22#
F14
G13
E13
D13
F12
F11
D10
E10D7E9F9F8G9D11
H_D#21
H_D#22
H_D#26
H_D#24
H_D#25
H_D#23
H_D#27
5
8
VCCP
AG14
AG12
AG11
AF9
AF8
AF22
AF21
AF19
AF18
AF15
AF14
AF12
AF11
AE9
AE23
AE22
AE21
AE19
AE18
AE15
AE14
AE12
AE11
AD8
AD30
AD29
AD28
AD27
AD26
AD25
AD24
AD23
AC8
AC30
AC29
AC28
AC27
AC26
AC25
AC24
AC23
AB8
AA8
VCCP
U1B
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
Y25
Y26
Y27
Y28
Y29
Y30
Y8
VCCP
D D
C C
7
AH19
AH18
AH15
AH14
AH12
AH11
AG9
AG8
AG30
AG29
AG28
AG27
AG26
AG25
AG22
AG21
AG19
AG18
AG15
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
U25
U26
U27
U28
U29
U30U8V8
W23
W24
W25
W26
W27
W28
W29
W30W8Y23
Y24
6
AH27
AH26
AH25
AH22
AH21
AH28
AH29
AH30
AH8
AH9
AJ11
AJ12
AJ14
AJ15
AJ18
AJ19
AJ21
AJ22
AJ25
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
N26
N27
N28
N29
N30N8P8R8T23
T24
T25
T26
T27
T28
T29
T30T8U23
U24
5
AJ26
AJ8
AJ9
AK11
AK12
AK14
AK15
AK18
AK19
AK21
AK22
AK25
AK26
AK8
AK9
AL11
AL12
AL14
AL15
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
K26
K27
K28
K29
K30K8L8
M23
M24
M25
M26
M27
M28
M29
M30M8N23
N24
N25
4
AL18
AL19
AL21
AL22
AL25
AL26
AL29
AL30
AL8
AL9
AM11
AM12
AM14
AM15
AM18
AM19
AM21
AM22
AM25
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
J15
J18
J19
J20
J21
J22
J23
J24
J25
J26
J27
J28
J29
J30J8J9
K23
K24
K25
3
AM26
AM29
AM30
AM8
AM9
AN11
AN12
AN14
AN15
AN18
AN19
AN21
AN22
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
A23
VCCA
B23
VSSA
D23
RSVD
C23
VCC-IOPLL
A25
VTT
A26
VTT
A27
VTT
A28
VTT
A29
VTT
A30
VTT
B25
VTT
B26
VTT
B27
VTT
B28
VTT
B29
VTT
B30
VTT
C25
VTT
C26
VTT
C27
VTT
C28
VTT
C29
VTT
C30
VTT
D25
VTT
D26
VTT
D27
VTT
D28
VTT
D29
VTT
D30
VTT
VTT_OUT
VTT_OUT
VTT_SEL
LGA775
AM6
AA1
J1
F27
F29
VTTPWRGD
RSVD/VTT_PKGSENSE
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
AN25
AN26
AN29
AN30
AN8
AN9
J10
J11
J12
J13
J14
2
H_VCCA
H_VSSA
H_VCCIOPLL
VCCFUSEPRG
VIDFUSEPRG
VTT_PWG
VTT_OUT_RIGHT
VTT_OUT_LEFT
V_FSB_VTT
R19
X_0/0402
VTT_OUT_RIGHT [3]
VTT_OUT_LEFT [3]
R18 X_1K/0402
VTT_SEL
1
V_FSB_VTT [3,6,8,12]
VCC3
It must close bulk caps.
C5 X_106P/0805
B B
100 OHMS OVER 210 OHMS RESISTORS
VTT_OUT_LEFT
GTLREF VOLTAGE SHOULD BE
0.67*VTT = 0.8V
R20
49.9RST/0402
R21
100RST/0402
V_FSB_VTT
C6 106P/0805
C7 106P/0805
CPU_GTLREF
C9
C10
105P
X_222P
CPU_GTLREF [3]
DC voltage drop should
be less than 70mV.
PLACE AT CPU END OF ROUTE
VTT_OUT_RIGHT
VTT_OUT_LEFT
A A
V_FSB_VTT H_IERR#
R24 62/0402
R25 120/0402
R27 100RST/0402
R28 62/0402
R29 62/0402
PLACE AT ICH END OF ROUTE
V_FSB_VTT
RN5 8P4R-62/0402
8
1 2
3 4
5 6
7 8
7
H_CPURST#
H_PROCHOT#
H_PWRGD
H_BR#0
TRMTRIP#
H_FERR#
H_CPURST# [3,6]
H_PROCHOT# [3]
H_PWRGD [3,10]
H_BR#0 [3,6]
H_IERR# [3]
TRMTRIP# [3,10]
H_FERR# [3,10]
6
FSBSEL RESISTOR CAN BE REMOVED IF ONLY TEAJS
AND CEDAR MILL ARE SUPPORTED
V_FSB_VTT
5
It support DC current if 125mA.
V_FSB_VTT
RN6
8P4R-470
1 2
3 4
5 6
7 8
4
L1 X_10uH/8
L2 X_10uH/8
VID_GD# [27,28]
CP15 X_COPPER
1 2
VCC5_SB
H_FSBSEL0
H_FSBSEL1
H_FSBSEL2
VTT_OUT_LEFT
R23
1K/0402
R26 1K
22u/6.3V/1206
H_FSBSEL0 [3,8,13]
H_FSBSEL1 [3,8,13]
H_FSBSEL2 [3,8,13]
3
H_VCCIOPLL
H_VSSA
EC1
EC2
X_106P/0805
R22
1.25V VTT_PWRGOOD
680/0402
VTT_PWG
SOT23EBC
Q1
MMBT3904
ECB
MSI
Title
Size Document Number Rev
Date: Sheet
C8
105P
H_VCCA
MICRO-STAR INt'L CO., LTD.
Intel LGA775 CPU - Power
(MS-7129)
2
0A
of
43 3 Saturday, October 16, 2004
1
8
AC4
AE3
AE4D1D14
U1C
D D
C C
AA23
AA24
AA25
AA26
AA27
AA28
AA29
AA30
AB23
AB24
AB25
AB26
AB27
AB28
AB29
AB30
AE10
AE13
AE16
AE17
AE20
AE24
AE25
AE26
AE27
AE28
A12
A15
A18
A21
A24
AA3
AA6
AA7
AB1
AB7
AC3
AC6
AC7
AD4
AD7
AE2
RSVD
RSVD
VSS
VSS
VSS
A2
VSS
VSS
VSS
A6
VSS
A9
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
AE29
AE30
AE5
AE7
7
E23
E24E5E6E7F23F6B13H2J2J3N4P5T2V1W1Y3Y7Y5Y2W7W4V7V6
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
AF10
AF13
AF16
AF17
AF20
AF23
AF24
AF25
AF26
AF27
AF28
AF29
AF3
AF30
AF6
AF7
AG10
AG13
AG16
AG17
6
V30V3V29
V28
V27
V26
V25
V24
V23U7U1T7T6T3R7R5R30
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
AG20
AG23
AG24
AG7
AH1
AH10
AH13
AH16
AH17
AH20
AH23
AH24
AH3
AH6
AH7
AJ10
AJ13
AJ16
5
R29
R28
R27
R26
R25
R24
R23R2P7P4P30
P29
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
AJ17
AJ20
AJ23
AJ24
AJ27
AJ28
AJ29
AJ30
AJ4
AJ7
AK10
AK13
AK16
AK17
AK2
AK20
AK23
AK24
AK27
P28
P27
P26
P25
P24
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
AK28
AK29
AK30
AK5
AK7
4
P23N7N6N3M7M1L7L6L30L3L29
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
AL10
AL13
AL16
AL17
AL20
AL23
AL24
AL27
AL28
AL3
3
H24
H25
H26
H27
H28
AM4
VSS
VSS
AM7
VSS
VSS
H29H3H6H7H8H9J4J7K2
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
AN1
AN10
AN13
AN16
AN17
AN2
AN20
AN23
AN24
AN27
L28
L27
L26
L25
L24
L23K7K5
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
AM16
AM17
AM20
AM23
AM24
AM27
AM28
VSS
VSS
VSS
VSS
VSS
VSS
AL7
AM1
AM10
AM13
2
H17
H18
H19
H20
H21
H22
H23
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
AN28
AN7B1B11
B14
H14
VSS
H13
VSS
H12
VSS
H11
VSS
H10
VSS
G1
VSS
F7
VSS
F4
VSS
F22
VSS
F19
VSS
F16
VSS
F13
VSS
F10
VSS
E8
VSS
E29
VSS
E28
VSS
E27
VSS
E26
VSS
E25
VSS
E20
VSS
E2
VSS
E17
VSS
E14
VSS
E11
VSS
D9
VSS
D6
VSS
D5
VSS
D3
VSS
D24
VSS
D21
VSS
D18
VSS
D15
VSS
D12
VSS
C7
VSS
C4
VSS
C24
VSS
C22
VSS
C19
VSS
C16
VSS
C13
VSS
C10
VSS
B8
VSS
B5
VSS
B24
VSS
B20
VSS
B17
VSS
VSS
LGA775
1
B B
HEAT SINK Retention Module
U25
HEATSINK_RM
8
1
5
6
7
A A
16
15
14
13
3
8
7
6
5
9
2
10
11
12
18
19
20
4
17
4
3
MSI
Title
Size Document Number Rev
Date: Sheet
MICRO-STAR INt'L CO., LTD.
Intel LGA775 CPU - GND
(MS-7129)
2
53 3 Saturday, October 16, 2004
0A
of
1
8
H_A#[3..31] [3]
D D
20RST/0402
R31
V_1P5_CORE
C11
C12
H_REQ#[0..4] [3]
H_RS#[0..2] [3]
H_ADSTB#0 [3 ]
H_ADSTB#1 [3 ]
H_PCREQ# [3]
H_BR#0 [3,4]
H_BPRI# [3]
H_BNR# [3 ]
H_LOCK# [3]
H_ADS# [3]
H_HIT# [3]
H_HITM# [3]
H_DEFER# [3]
H_TRDY# [3]
H_DBSY# [3]
H_DRDY# [3]
H_EDRDY# [3]
CK_H_MCH [1 3]
CK_H_MCH# [13]
PWR_GD [11,14,27]
H_CPURST# [3,4]
PLTRST# [10]
ICH_SYNC# [11]
R30 X_4.7K
V_FSB_VTT [3,4,8,12,27]
8
C C
B B
V_2P5_MCH
A A
H_A#3 H_D#0
H_A#4
H_A#5
H_A#6
H_A#7
H_A#8
H_A#9
H_A#10
H_A#11
H_A#12
H_A#13
H_A#14
H_A#15
H_A#16
H_A#17
H_A#18
H_A#19
H_A#20
H_A#21
H_A#22
H_A#23
H_A#24
H_A#25
H_A#26
H_A#27
H_A#28
H_A#29
H_A#30
H_A#31
H_REQ#0
H_REQ#1
H_REQ#2
H_REQ#3
H_REQ#4
H_RS#0
H_RS#1
H_RS#2
HRCOMP
HSCOMP
HSWING
MCH_GTLREF
106P/0805
106P/0805
5 mils trace 8 mils space rout in same layer
within 750 mils
V_FSB_VTT HSCOMP V_FSB_VTT V_FSB_VTT MCH_GTLREF
M30
M28
M26
M35
M31
M32
M23
M22
AG7
M14
H29
K29
J29
G30
G32
K30
L29
L31
L28
J28
K27
K33
R29
L26
N26
N31
P26
N29
P28
R28
N33
T27
T31
U28
T26
T29
J31
N27
E31
R33
E30
L33
F33
E32
H31
G31
F31
L34
N35
J35
N34
L35
P33
K34
P34
J32
G24
AF7
B23
D24
A23
A24
7
AC11
AB11
U2A
HA3#
HA4#
HA5#
HA6#
VCCNCTF
HA7#
HA8#
HA9#
HA10#
HA11#
HA12#
HA13#
HA14#
HA15#
HA16#
HA17#
HA18#
HA19#
HA20#
HA21#
HA22#
HA23#
HA24#
HA25#
HA26#
HA27#
HA28#
HA29#
HA30#
HA31#
HAD_STB0#
HAD_STB1#
HPCREQ#
BREQ0#
BPRI#
BNR#
HLOCK#
ADS#
HREQ0#
HREQ1#
HREQ2#
HREQ3#
HREQ4#
HIT#
HITM#
DEFER#
HTRDY#
DBSY#
DRDY#
HEDRDY#
RS0#
RS1#
RS2#
HCLKP
HCLKN
PWROK
CPURST#
RSTIN#
ICH_SYNC#
HDRCOMP
HDSCOMP
HDSWING
HDVREF
R32 60.4RST/0402
C16
X_2.2P
7
Y20
VCCNCTF
VCCNCTF
RSVRD
AJ21
Y19
VCCNCTF
RSVRD
AK21
Y17
Y16
VCCNCTF
RSVRD
AK24
AL21
W20
VCCNCTF
VCCNCTF
RSVRD
RSVRD
AL20
W16
VCCNCTF
RSVRD
AK18
U20
VCCNCTF
RSVRD
AJ24
U16
VCCNCTF
RSVRD
AJ23
T20
VCCNCTF
RSVRD
AJ18
T19
VCCNCTF
RSVRD
AJ20
T17
VCCNCTF
RSVRD
V31
T16
VCCNCTF
RSVRD
V30
AA13
VCCNCTF
RSVRD
U30
AA14
VCCNCTF
RSVRD
V32
AA16
VCCNCTF
RSVRD
Y30
6
V_1P5_CORE
AA18
AA20
AA21
AA22
AA23
AA24
AB13
AB14
AB15
AB16
AB17
AB18
AB19
AB20
AB21
AB22
AB23
AB24
N13
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
RSVRD
RSVRD
RSVRD
RSVRD
RSVRD
RSVRD
RSVRD
RSVRD
RSVRD
RSVRD
RSVRD
AB29
R31
R30
AA31
AA30
AC12
AC13
AC14
AC15
AC16
AC17
AC18
HD_SWING VOLTAGE "12 MIL TRACE , 10MIL
SPACE" HD_SWING S/B 1/4*VTT +/- 2%n
R33 301RST/0402
PLACE DIVIDER RESISTOR NEAR VTT
6
NCNCNCNCNCNCNCNCNCNCNCNCNCNCNCNCNCNCNCNCNCNCNCNCNCNCNCNCNCNCNCNCNCNCNCNCNCNCNCNCNCNCNCNCNCNCNC
RSVRD
RSVRD
RSVRD
RSVRD
RSVRD
N12
N22
AC19
AC20
AC21
AC22
R35
102RST/0402
N14
VCCNCTF
N23
5
N15
VCCNCTF
N24
5
N16
VCCNCTF
P12
N18
VCCNCTF
P23
N20
N21
VCCNCTF
P24
R12
HSWING
C13
103P
P13
VCCNCTF
VCCNCTF
R24
P14
VCCNCTF
T12
P15
VCCNCTF
U12
P17
VCCNCTF
V12
P19
VCCNCTF
W12
P21
VCCNCTF
Y12
P22
VCCNCTF
AA12
R13
R14
VCCNCTF
AB12
AC23
R15
VCCNCTF
VCCNCTF
AC24
R16
VCCNCTF
AN19
4
R18
R20
R22
R23
T13
T14
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
AL28
AJ14
AH24
AG6
AD30
P30
R34 49.9RST/0402
4
T15
VCCNCTF
VCCNCTF
L19
3
T21
T23
T24
U13
U14
U22
U24
V13
V14
V15
V21
V23
V24
W13
W14
W22
W24
Y13
Y14
Y15
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
L12
K12
J12
H17
H15
H12
G12
F24
F12
E16
C16
AR35
AR34
AR2
AR1
AP35
AP1
B35B1A34
GTLREF VOLTAGE SHOULD BE 0.67*VTT=0.8V
49.9 OHM OVER 100 RESISTORS
R36
100RST/0402
C14
X_104P
C15
104P
3
Y21
Y23
Y24
VCCNCTF
VCCNCTF
VCCNCTF
DINV_0#
DINV_1#
DINV_2#
DINV_3#
HD_STBP0#
HD_STBN0#
HD_STBP1#
HD_STBN1#
HD_STBP2#
HD_STBN2#
HD_STBP3#
HD_STBN3#
Grantsdale-G_B1
A2
2
J33
HD0#
H_D#1
H33
HD1#
H_D#2
J34
HD2#
H_D#3
G35
HD3#
H_D#4
H35
HD4#
H_D#5
G34
HD5#
H_D#6
F34
HD6#
H_D#7
G33
HD7#
H_D#8
D34
HD8#
H_D#9
C33
HD9#
H_D#10
D33
HD10#
H_D#11
B34
HD11#
H_D#12
C34
HD12#
H_D#13
B33
HD13#
H_D#14
C32
HD14#
H_D#15
B32
HD15#
H_D#16
E28
HD16#
H_D#17
C30
HD17#
H_D#18
D29
HD18#
H_D#19
H28
HD19#
H_D#20
G29
HD20#
H_D#21
J27
HD21#
H_D#22
F28
HD22#
H_D#23
F27
HD23#
H_D#24
E27
HD24#
H_D#25
E25
HD25#
H_D#26
G25
HD26#
H_D#27
J25
HD27#
H_D#28
K25
HD28#
H_D#29
L25
HD29#
H_D#30
L23
HD30#
H_D#31
K23
HD31#
H_D#32
J22
HD32#
H_D#33
J24
HD33#
H_D#34
K22
HD34#
H_D#35
J21
HD35#
H_D#36
M21
HD36#
H_D#37
H23
HD37#
H_D#38
M19
HD38#
H_D#39
K21
HD39#
H_D#40
H20
HD40#
H_D#41
H19
HD41#
H_D#42
M18
HD42#
H_D#43
K18
HD43#
H_D#44
K17
HD44#
H_D#45
G18
HD45#
H_D#46
H18
HD46#
H_D#47
F17
HD47#
H_D#48
A25
HD48#
H_D#49
C27
HD49#
H_D#50
C31
HD50#
H_D#51
B30
HD51#
H_D#52
B31
HD52#
H_D#53
A31
HD53#
H_D#54
B27
HD54#
H_D#55
A29
HD55#
H_D#56
C28
HD56#
H_D#57
A28
HD57#
H_D#58
C25
HD58#
H_D#59
C26
HD59#
H_D#60
D27
HD60#
H_D#61
A27
HD61#
H_D#62
E24
HD62#
H_D#63
B25
HD63#
H_DBI#0
E34
H_DBI#1
J26
H_DBI#2
K19
H_DBI#3
B26
E33
E35
H26
F26
J19
F19
B29
C29
MSI
Title
Size Document Number Rev
Date: Sheet
H_DSTBP#0 [3]
H_DSTBN#0 [3]
H_DSTBP#1 [3]
H_DSTBN#1 [3]
H_DSTBP#2 [3]
H_DSTBN#2 [3]
H_DSTBP#3 [3]
H_DSTBN#3 [3]
MICRO-STAR INt'L CO., LTD.
Intel Grantsdale - CPU Signals
(MS-7129)
2
1
H_D#[0..63] [3]
H_DBI#[0..3] [3]
63 3 Saturday, October 16, 2004
1
of
0A
8
7
6
5
4
3
2
1
M_CHA_DQ[0..63] [20]
M_CHA_DQ15
M_CHA_DQ12
M_CHA_DQ10
M_CHA_DQ0
M_CHA_DQ3
M_CHA_DQ1
D D
~M_CHA_CS[0..1] [20,22]
~M_CHA_RAS [20,22]
~M_CHA_CAS [20,22]
~M_CHA_WE [ 20,22]
M_CHA_MA[0..13] [20,22]
M_CHA_ODT[0..1] [20,22]
C C
B B
M_CHA_BA[0..2] [20,22]
M_CHA_DQS0 [20]
~M_CHA_DQS0 [20]
M_CHA_DQS1 [20]
~M_CHA_DQS1 [20]
M_CHA_DQS2 [20]
~M_CHA_DQS2 [20]
M_CHA_DQS3 [20]
~M_CHA_DQS3 [20]
M_CHA_DQS4 [20]
~M_CHA_DQS4 [20]
M_CHA_DQS5 [20]
~M_CHA_DQS5 [20]
M_CHA_DQS6 [20]
~M_CHA_DQS6 [20]
M_CHA_DQS7 [20]
~M_CHA_DQS7 [20]
M_CHA_SCK0 [20]
~M_CHA_SCK0 [20]
M_CHA_SCK1 [20]
~M_CHA_SCK1 [20]
M_CHA_SCK2 [20]
~M_CHA_SCK2 [20]
~M_CHA_CS0
~M_CHA_CS1
~M_CHA_RAS
~M_CHA_CAS
~M_CHA_WE
M_CHA_MA0
M_CHA_MA1
M_CHA_MA2
M_CHA_MA3
M_CHA_MA4
M_CHA_MA5
M_CHA_MA6
M_CHA_MA7
M_CHA_MA8
M_CHA_MA9
M_CHA_MA10
M_CHA_MA11
M_CHA_MA12
M_CHA_MA13
M_CHA_ODT0
M_CHA_ODT1
M_CHA_BA0
M_CHA_BA1
M_CHA_BA2
M_CHA_DQS0
~M_CHA_DQS0
M_CHA_DQS1
~M_CHA_DQS1
M_CHA_DQS2
~M_CHA_DQS2
M_CHA_DQS3
~M_CHA_DQS3
M_CHA_DQS4
~M_CHA_DQS4
M_CHA_DQS5
~M_CHA_DQS5
M_CHA_DQS6
~M_CHA_DQS6
M_CHA_DQS7
~M_CHA_DQS7
M_CHA_SCK0
~M_CHA_SCK0
M_CHA_SCK1
~M_CHA_SCK1
M_CHA_SCK2
~M_CHA_SCK2
TP_SA_RCVENOUT
TP_SA_RCVENIN
BUFFER_SLEW_A
SM_VREF
SM_RCOMP_P
SM_RCOMP_N
SMOCDCOMP1
SMOCDCOMP0
AR29
AP32
AR28
AN31
AP27
AN29
AN28
AP26
AR24
AL24
AP23
AR23
AP22
AN23
AP21
AN22
AN21
AM27
AM21
AR20
AP31
AP30
AN32
AP29
AP33
AR27
AN27
AN20
AG1
AG2
AF17
AG17
AM30
AL29
AG35
AG33
AA34
AA35
AN26
AP25
AM2
AM3
AC34
AC35
AN25
AM24
AC33
AB34
AB33
AH15
AE16
AJ12
AK12
AG8
AG4
AL3
AL2
AP7
AR7
U34
U35
AN3
AN2
AE7
AE5
AF5
U2B
SACS0#
SACS1#
SACS2#
SACS3#
SARAS#
SACAS#
SAWE#
SAMA0
SAMA1
SAMA2
SAMA3
SAMA4
SAMA5
SAMA6
SAMA7
SAMA8
SAMA9
SAMA10
SAMA11
SAMA12
SAMA13
SAODT0
SAODT1
SAODT2
SAODT3
SABA0
SABA1
SABA2
SADQS0
SADQS0#
SADQS1
SADQS1#
SADQS2
SADQS2#
SADQS3
SADQS3#
SADQS4
SADQS4#
SADQS5
SADQS5#
SADQS6
SADQS6#
SADQS7
SADQS7#
SACK0
SACK0#
SACK1
SACK1#
SACK2
SACK2#
SACK3
SACK3#
SACK4
SACK4#
SACK5
SACK5#
SADDR1MA13
SARCVENOUT#
SARCVENIN#
SMXSLEWIN
SMXSLEWOUT
SMVREF0
SMRCOMPP
SMRCOMPN
SMOCDCOMP1
SMOCDCOMP0
M_CHA_DQ2
AE3
AF3
AH3
AJ2
SADQ0
SADQ1
SADQ2
SADQ3
SBDQ0
SBDQ1
AH4
AJ6
M_CHA_DQ11
M_CHA_DQ5
M_CHA_DQ4
M_CHA_DQ9
M_CHA_DQ7
M_CHA_DQ8
M_CHA_DQ6
AE2
AE1
AG3
AH2
AK2
AK3
AN4
AP4
AJ1
SADQ4
SADQ5
SADQ6
SADQ7
SADQ8
SADQ9
SADQ10
SADQ11
SADQ12
SBDQ2
SBDQ3
SBDQ4
SBDQ5
SBDQ6
SBDQ7
SBDQ8
SBDQ9
AL6
AN6
SBDQ10
AG9
AH7
AL5
AM5
AJ8
AL8
AF11
M_CHA_DQ13
AJ3
AE11
M_CHA_DQ20
M_CHA_DQ14
M_CHA_DQ21
M_CHA_DQ16
M_CHA_DQ17
M_CHA_DQ18
M_CHA_DQ19
AP2
AP3
AR5
AP6
AP9
AN9
AN5
AP5
SADQ13
SADQ14
SADQ15
SADQ16
SADQ17
SADQ18
SADQ19
SADQ20
SADQ21
SBDQ11
SBDQ12
SBDQ13
SBDQ14
SBDQ15
SBDQ16
SBDQ17
SBDQ18
AJ7
SBDQ19
AL7
AG10
AG11
AF13
AH12
AD14
AD15
M_CHA_DQ29
M_CHA_DQ27
M_CHA_DQ34
M_CHA_DQ30
M_CHA_DQ24
M_CHA_DQ25
M_CHA_DQ23
M_CHA_DQ22
AN8
AR8
AL17
AJ17
SADQ22
SADQ23
SADQ24
SADQ25
SBDQ20
SBDQ21
SBDQ22
SBDQ23
AD12
AE13
AG14
AF14
M_CHA_DQ26
AF19
SADQ26
SBDQ24
AK19
M_CHA_DQ33
M_CHA_DQ31
M_CHA_DQ28
M_CHA_DQ32
AH18
AK16
AF16
AD17
AE19
AK27
AJ28
AL31
SADQ27
SADQ28
SADQ29
SADQ30
SADQ31
SADQ32
SADQ33
SBDQ25
SBDQ26
SBDQ27
SBDQ28
SBDQ29
SBDQ30
SBDQ31
AH19
AH21
AD21
AD18
AL18
AE22
AF22
AF24
M_CHA_CKE[0..1] [20, 22]
M_CHA_DQ45
M_CHA_DQ38
M_CHA_DQ35
M_CHA_DQ37
M_CHA_DQ36
AK31
AH27
AL27
AN30
SADQ34
SADQ35
SADQ36
SADQ37
SADQ38
SBDQ32
SBDQ33
SBDQ34
SBDQ35
SBDQ36
AF25
AL26
AJ26
AF23
M_CHA_DQ46
M_CHA_DQ43
M_CHA_DQ47
M_CHA_DQ42
M_CHA_DQ40
M_CHA_DQ44
M_CHA_DQ39
M_CHA_DQ41
AL30
AH33
AH35
AF33
AE33
AJ33
AJ34
AG32
AF34
SADQ39
SADQ40
SADQ41
SADQ42
SADQ43
SADQ44
SADQ45
SADQ46
SADQ47
SBDQ37
SBDQ38
SBDQ39
SBDQ40
SBDQ41
SBDQ42
SBDQ43
SBDQ44
AD23
AL25
SBDQ45
AJ25
AK32
AJ31
AG31
AF28
AJ29
AK33
M_CHA_DM[0..7] [20]
M_CHA_DM4
M_CHA_DM3
M_CHA_DM2
M_CHA_DM1
M_CHA_DM6
M_CHA_DM7
M_CHA_DM5
M_CHA_DQ53
M_CHA_DQ58
M_CHA_DQ55
M_CHA_DQ51
M_CHA_DQ50
M_CHA_DQ49
M_CHA_DQ52
M_CHA_DQ48
AD31
AD35
Y33
W34
AE35
AE34
SADQ48
SADQ49
SADQ50
SADQ51
SADQ52
SADQ53
SBDQ46
SBDQ47
SBDQ48
SBDQ49
SBDQ50
SBDQ51
AG30
AG27
AF27
AE27
AC26
AB26
M_CHA_DQ54
AA32
AE31
M_CHA_DQ61
M_CHA_DQ62
M_CHA_DQ57
M_CHA_DQ60
M_CHA_DQ59
M_CHA_DQ56
Y35
V34
V33
R32
R34
W35
W33
T33
SADQ54
SADQ55
SADQ56
SADQ57
SADQ58
SADQ59
SADQ60
SADQ61
SADQ62
SBDQ52
SBDQ53
SBDQ54
SBDQ55
SBDQ56
SBDQ57
SBDQ58
SBDQ59
AE29
SBDQ60
AC28
AB27
AA28
W29
V28
V29
Y26
M_CHA_DQ63
T35
AA29
M_CHA_DM0
M_CHA_CKE1
M_CHA_CKE0
AF2
AL1
AN7
AH16
AK29
AG34
AA33
AP19
AM18
AN18
AR19
SACKE0
SACKE1
SACKE2
SACKE3
SADQ63
SBDQ61
SBDQ62
SBDQ63
SBCKE0
SBCKE1
SBCKE2
W26
U26
AP10
AN10
AR9
U33
SBCS0#
SBCS1#
SADM3
SBDM6
AH31
AD24
SADM4
SADM5
SADM6
SBRCVENOUT#
SBDM3
SBDM4
SBDM5
AH13
AG20
AG24
SBCS2#
SADM7
SBCS3#
SBRAS#
SBCAS#
SBWE#
SBMA0
SBMA1
SBMA2
SBMA3
SBMA4
SBMA5
SBMA6
SBMA7
SBMA8
SBMA9
SBMA10
SBMA11
SBMA12
SBMA13
SBODT0
SBODT1
SBODT2
SBODT3
SBBA0
SBBA1
SBBA2
SBDQS0
SBDQS0#
SBDQS1
SBDQS1#
SBDQS2
SBDQS2#
SBDQS3
SBDQS3#
SBDQS4
SBDQS4#
SBDQS5
SBDQS5#
SBDQS6
SBDQS6#
SBDQS7
SBDQS7#
SBCK0
SBCK0#
SBCK1
SBCK1#
SBCK2
SBCK2#
SBCK3
SBCK3#
SBCK4
SBCK4#
SBCK5
SBCK5#
SBDDR1MA13
SBRCVENIN#
SMYSLEWIN
SMYSLEWOUT
SMVREF1
SBDM0
SBDM1
SBDM2
AJ5
AH9
Grantsdale-G_B1
SADM0
SADM1
SADM2
SBCKE3
SBDM7
W31
AM9
AN33
AM34
AP34
AN34
AN17
AP18
AP17
AM15
AR15
AN15
AL15
AP14
AM12
AP13
AL12
AN13
AR12
AP15
AP11
AR11
AL33
AM33
AL34
AL35
AK34
AR16
AN16
AN11
AK5
AL4
AK10
AH10
AK13
AL14
AD20
AF20
AH25
AG26
AH28
AH30
AB31
AC30
W27
Y28
AH22
AG23
AK9
AL9
AE26
AE25
AL23
AK22
AJ11
AL11
AD28
AD29
AD32
AK15
AN14
AF9
AE10
AE8
M_CHB_DQS0
~M_CHB_DQS0
M_CHB_DQS1
~M_CHB_DQS1
M_CHB_DQS2
~M_CHB_DQS2
M_CHB_DQS3
~M_CHB_DQS3
M_CHB_DQS4
~M_CHB_DQS4
M_CHB_DQS5
~M_CHB_DQS5
M_CHB_DQS6
~M_CHB_DQS6
M_CHB_DQS7
~M_CHB_DQS7
M_CHB_SCK0
~M_CHB_SCK0
M_CHB_SCK1
~M_CHB_SCK1
M_CHB_SCK2
~M_CHB_SCK2
~M_CHB_CS0
~M_CHB_CS1
~M_CHB_RAS
~M_CHB_CAS
~M_CHB_WE
M_CHB_MA0
M_CHB_MA1
M_CHB_MA2
M_CHB_MA3
M_CHB_MA4
M_CHB_MA5
M_CHB_MA6
M_CHB_MA7
M_CHB_MA8
M_CHB_MA9
M_CHB_MA10
M_CHB_MA11
M_CHB_MA12
M_CHB_MA13
M_CHB_ODT0
M_CHB_ODT1
M_CHB_BA0
M_CHB_BA1
M_CHB_BA2
TP_SB_RCVENOUT
TP_SB_RCVENIN
BUFFER_SLEW_B
SM_VREF
~M_CHB_CS[0..1] [21,22]
~M_CHB_RAS [21,22]
~M_CHB_CAS [21,22]
~M_CHB_WE [21,22]
M_CHB_MA[0..13] [21,22]
M_CHB_ODT[0..1] [21,22]
M_CHB_BA[0..2] [21,22]
M_CHB_DQS0 [21]
~M_CHB_DQS0 [ 21]
M_CHB_DQS1 [21]
~M_CHB_DQS1 [ 21]
M_CHB_DQS2 [21]
~M_CHB_DQS2 [ 21]
M_CHB_DQS3 [21]
~M_CHB_DQS3 [ 21]
M_CHB_DQS4 [21]
~M_CHB_DQS4 [ 21]
M_CHB_DQS5 [21]
~M_CHB_DQS5 [ 21]
M_CHB_DQS6 [21]
~M_CHB_DQS6 [ 21]
M_CHB_DQS7 [21]
~M_CHB_DQS7 [ 21]
M_CHB_SCK0 [21]
~M_CHB_SCK0 [21]
M_CHB_SCK1 [21]
~M_CHB_SCK1 [21]
M_CHB_SCK2 [21]
~M_CHB_SCK2 [21]
M_CHB_DQ[0..63] [21]
M_CHB_DQ4
M_CHB_DQ13
M_CHB_DQ10
M_CHB_DQ6
M_CHB_DQ3
M_CHB_DQ9
M_CHB_DQ2
M_CHB_DQ5
M_CHB_DQ0
M_CHB_DQ1
M_CHB_DQ7
M_CHB_DQ8
M_CHB_DQ21
M_CHB_DQ15
M_CHB_DQ23
M_CHB_DQ22
M_CHB_DQ16
M_CHB_DQ20
M_CHB_DQ24
M_CHB_DQ19
M_CHB_DQ14
M_CHB_DQ12
M_CHB_DQ18
M_CHB_DQ11
M_CHB_DQ17
M_CHB_DQ32
M_CHB_DQ28
M_CHB_DQ27
M_CHB_DQ25
M_CHB_DQ31
M_CHB_DQ26
M_CHB_DQ30
M_CHB_DQ29
CPU STRAPPING RESISTORS
ALL COMPONENTS CLOSE TO CPU
V_SM
A A
R37
80.6RST/0402
C17
X_104P
R41 80.6RST/0402
8
SM_RCOMP_N
SM_RCOMP_P
7
R38 40.2/4/1
R42 40.2/4/1
SMOCDCOMP1
SMOCDCOMP0
6
V_SM
5
R39 1KST/0402
PLACE CLOSE TO MCH
M_CHB_DQ40
M_CHB_DQ33
M_CHB_DQ34
M_CHB_DQ42
M_CHB_DQ45
M_CHB_DQ43
M_CHB_DQ36
M_CHB_DQ41
M_CHB_DQ35
M_CHB_DQ38
M_CHB_DQ37
M_CHB_DQ39
R40
1KST/0402
M_CHB_DQ46
M_CHB_DQ47
M_CHB_DQ48
M_CHB_DQ44
M_CHB_CKE[0..1] [21, 22]
4
M_CHB_DQ56
M_CHB_DQ54
M_CHB_DQ50
M_CHB_DQ49
M_CHB_DQ55
M_CHB_DQ53
M_CHB_DQ51
M_CHB_DQ52
M_CHB_DM[0..7] [21]
C18
104P
M_CHB_DQ63
M_CHB_DQ61
M_CHB_DQ60
M_CHB_DQ58
M_CHB_DQ57
M_CHB_DQ59
M_CHB_DQ62
PLACE 0.1UF CAP CLOSE TO MCH
SM_VREF
C19
104P
M_CHB_DM1
M_CHB_DM2
M_CHB_DM6
M_CHB_DM5
M_CHB_DM4
M_CHB_CKE0
M_CHB_CKE1
3
M_CHB_DM0
M_CHB_DM7
M_CHB_DM3
MICRO-STAR INt'L CO., LTD.
MSI
Title
Size Document Number Rev
Date: Sheet
Intel Grantsdale - Memory Signals
(MS-7129)
2
73 3 Saturday, October 16, 2004
0A
of
1
8
7
6
5
4
3
2
1
V_1P5_CORE
AD9
AD8
AD7
AD6
AD5
AD4
AD3
AD2
AD1
AC10
AC9
AC8
AC7
AC6
AC5
AC4
VCC
VCC
VTT
VTT
E19
E20
I=45mA
I=60mA
AC3
VCC
VCC
VCC
VCC
VCC
VCC
VTT
VTT
VTT
VTT
VTT
VTT
C22
D22
D21
D20
D19
C21
C20
E11
VCCA_HPLL VCCA_HPLL
VCCA_MPLL
VCCA_DPLLB
VCCA_GPLL
CP20
1 2
F11
J11
H11
F9
E9
F7
E7
B3
B4
D5
E5
G6
G5
H8
H7
J6
J5
K8
K7
L6
L5
P10
R10
M8
M7
N6
N5
P7
P8
R6
R5
U5
U6
T9
T8
V7
V8
V10
U10
A11
B11
K13
J13
H16
E15
D17
M16
F15
C15
A16
B15
C14
K15
L10
M10
A17
B17
A12
B13
A14
A13
E13
D13
F13
CP18
1 2
C37
X_224P
V_1P5_CORE
V_2P5_MCH
V_2P5_MCH
V_1P5_CORE
V_1P5_CORE
EXP_A_RXP_1
EXP_A_RXN_1
EXP_A_RXP_2
EXP_A_RXN_2
DMI_ITP_MRP_0
DMI_ITN_MRN_0
DMI_ITP_MRP_1
DMI_ITN_MRN_1
DMI_ITP_MRP_2
DMI_ITN_MRN_2
DMI_ITP_MRP_3
DMI_ITN_MRN_3
CK_PE_100M_MCH
CK_PE_100M_MCH#
SDVO_CTRL_DATA
SDVO_CTRL_CLK
BSEL0
BSEL1
BSEL2
MTYPE
EXP_SLR
EXP_A_RXP_1 [17]
D D
C C
B B
A A
EXP_A_RXN_1 [17]
EXP_A_RXP_2 [17]
EXP_A_RXN_2 [17]
DMI_ITP_MRP_0 [10]
DMI_ITN_MRN_0 [10]
DMI_ITP_MRP_1 [10]
DMI_ITN_MRN_1 [10]
DMI_ITP_MRP_2 [10]
DMI_ITN_MRN_2 [10]
DMI_ITP_MRP_3 [10]
DMI_ITN_MRN_3 [10]
CK_PE_100M_MCH [13]
CK_PE_100M_MCH# [13]
SDVO_CTRL_DATA [17]
SDVO_CTRL_CLK [17]
R45 1K/0402
R46 X_1K/0402
C30 104P
VCC
VCC
VCC
VCC
EXPARXP0/SDVOC_TVCLKIN+
EXPARXN0/SDVOC_TVCLKINÂEXPARXP1/SDVOB_INT+
EXPARXN1/SDVOB_INTÂEXPARXP2/SDVO_STALL+
EXPARXN2/SDVO_STALLÂEXPARXP3/RSV_F7
EXPARXN3/RSV_E7
EXPARXP4/RSV_B3
EXPARXN4/RSV_B4
EXPARXP5/SDVOC_INT+
EXPARXN5/SDVOC_INTÂEXPARXP6/RSV_G6
EXPARXN6//RSV_G5
EXPARXP7/RSV_H8
EXPARXN7/RSV_H7
EXPARXP8/RSV_J6
EXPARXN8//RSV_J5
EXPARXP9/RSV_K8
EXPARXN9/RSV_K7
EXPARXP10/RSV_L6
EXPARXN10/RSV_L5
EXPARXP11/RSV_P10
EXPARXN11/RSV_R10
EXPARXP12/RSV_M8
EXPARXN12/RSV_M7
EXPARXP13/RSV_N6
EXPARXN13/RSV_N5
EXPARXP14/RSV_P7
EXPARXN14/RSV_P8
EXPARXP15/RSV_R6
EXPARXN15/RSV_R5
DMI RXP0
DMI RXN0
DMI RXP1
DMI RXN1
DMI RXP2
DMI RXN2
DMI RXP3
DMI RXN3
GCLKINP
GCLKINN
SDVOCTRLDATA
SDVOCTRLCLK
BSEL0
BSEL1
BSEL2
RSV
RSV
MTYPE
EXP_SLR/RSV_A16
RSV
RSV
RSV
VCC
VSS
VCCAHPLL
VCCAMPLL
VCCADPLLA
VCCADPLLB
VCCA3GPLL
VCCHV
VCCACRTDAC
VCCACRTDAC
VSSACRTDAC
VTT
VTT
G22
H22
VCCA_HPLL
C32
X_106P/0805
C38
X_106P/0805
VTT
G21
F22
VCC
VCC
VCC
VCC
VCC
VTT
VTT
VTT
VTT
VTT
F21
F20
E22
E21
V_FSB_VTT [3,4,6,12,27]
C33
104P
C39
104P
AD10
U2C
AC2
VCC
VCC
VTT
VTT
C19
AB9
AC1
AB10
VCC
VCC
VCC
VTT
VTT
VTT
B21
B20
B22
V_FSB_VTT
AB4
AB8
AB7
AB6
AB5
AB3
VCC
VCC
VCC
VCC
VCC
VCC
VTT
VTT
VTT
VTT
VTT
B19
A22
A21
A20
A19
V_SM
U18
AR26
AP28
AM28
AM26
AM25
AB2
AB1
W18
V19
V17
AR33
AR31
AR22
AR18
AR14
AR10
AP24
VCC
VCC
VCC
VCC
VCC
VCC
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VSSNCTF
VSSNCTF
VSSNCTF
VSSNCTF
VSSNCTF
VSSNCTF
VSSNCTF
VSSNCTF
VSSNCTF
VSSNCTF
VSSNCTF
VSSNCTF
VSSNCTF
VSSNCTF
VSSNCTF
AC25
AB25
AA25
AA11
Y25
Y18
Y11
W25
V_1P5_CORE
V_1P5_CORE
VSSNCTF
W11
V25
V20
V16
V11
U25
U11
T25
CP19
1 2
CP21
1 2
AP20
AP16
VCCSM
VSSNCTF
T18
T11
AP12
VCCSM
VSSNCTF
R25
AN35
VCCSM
VCCSM
VSSNCTF
VSSNCTF
R11
AM32
VCCSM
VSSNCTF
P25
VCCSM
VSSNCTF
P11
N25
VCCSM
VCCSM
VSSNCTF
VSSNCTF
AD25
AM23
N11
AM22
VCCSM
VCCSM
VSSNCTF
VSSNCTF
M11
AM20
VCCSM
VSSNCTF
AA15
AM19
VCCSM
VSSNCTF
AA17
AM17
AA19
AM16
VCCSM
VSSNCTF
N17
AM11
AM10
AK35
AM14
AM13
VCC3G
VCC3G
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
EXPATXP4/SDVOC_RED+/SDVOB_ALPHA+
EXPATXN4/SDVOC_RED-/SDVOB_ALPHA-
VSSNCTF
VSSNCTF
VSSNCTF
VSSNCTF
VSSNCTF
VSSNCTF
VSSNCTF
VSSNCTF
VSSNCTF
N19
P16
P18
P20
R17
R19
R21
T22
VCCA_DPLLA
C34
X_106P/0805
C40
X_106P/0805
U15
C35
104P
C41
104P
VCC3G
VSSNCTF
VCC3G
VCC3G
VSSNCTF
VSSNCTF
U21
U23
V22
I=55mA
I=55mA
VCC3G
VSSNCTF
W15
VCC3G
VSSNCTF
VCC3G
EXPATXP1/SDVOB_GREEN+
EXPATXN1/SDVOB_GREEN-
EXPATXP5/SDVOC_GREEN+
EXPATXN5/SDVOC_GREEN-
VSSNCTF
W21
V_1P5_PCIEXPRESS
Y9Y8Y7Y6Y5Y4Y3Y2Y1W9W8W7W6W4W3W2W1
VCC3G
VCC3G
VCC3G
VCC3G
VCC3G
VCC3G
VCC3G
VCC3G
VCC3G
EXPATXP0/SDVOB_RED+
EXPATXN0/SDVOB_RED-
EXPATXP2/SDVOB_BLUE+
EXPATXN2/SDVOB_BLUE-
EXPATXP3/SDVOB_CLK+
EXPATXN3/SDVOB_CLK-
EXPATXP6/SDVOC_BLUE+
EXPATXN6/SDVOC_BLUE-
EXPATXP7/SDVOC_CLK+
EXPATXN7/SDVOC_CLK-
EXPATXP8/RSV_G3
EXPATXN8/RSV_H3
EXPATXP9/RSV_H1
EXPATXN9//RSV_J1
EXPATXP10//RSV_J3
EXPATXN10/RSV_K3
EXPATXP11/RSV_K1
EXPATXN11/RSV_L1
EXPATXP12/RSV_L3
EXPATXN12/RSV_M3
EXPATXP13/RSV_M1
EXPATXN13/RSV_N1
EXPATXP14/RSV_N3
EXPATXN14/RSV_P3
EXPATXP15/RSV_P1
EXPATXN15/RSV_R1
DMI TXP0
DMI TXN0
DMI TXP1
DMI TXN1
DMI TXP2
DMI TXN2
DMI TXP3
DMI TXN3
EXPACOMPO
EXPACOMPI
CRTHSYNC
CRTVSYNC
CRTRED
CRTGREEN
CRTBLUE
CRTREDB
CRTGREENB
CTRBLUEB
CRTDDCDATA
CRTDDCCLK
DREFCLKINP
DREFCLKINN
CRTIREF
PMEXTTS
PMBMBUSY#
TESTIN#
MCHDETECT
VSSNCTF
VSSNCTF
W23
Y22
Grantsdale-G_B1
V_1P5_CORE
V_1P5_CORE
EXP_A_TXP_0
C10
EXP_A_TXN_0
C9
EXP_A_TXP_1
A9
EXP_A_TXN_1
A8
EXP_A_TXP_2
C8
EXP_A_TXN_2
C7
EXP_A_TXP_3
A7
EXP_A_TXN_3
A6
C6
C5
C2
D2
E3
F3
F1
G1
G3
H3
H1
J1
J3
K3
K1
L1
L3
M3
M1
N1
N3
P3
P1
R1
DMI_MTP_IRP_0
R3
DMI_MTN_IRN_0
T3
DMI_MTP_IRP_1
T1
DMI_MTN_IRN_1
U1
DMI_MTP_IRP_2
U3
DMI_MTN_IRN_2
V3
DMI_MTP_IRP_3
V5
DMI_MTN_IRN_3
W5
Y10
W10
E12
D12
F14
D14
H14
G14
E14
J14
3VDDCDA
L14
3VDDCCL
M15
M13
M12
A15
EXTTS VCCA_DPLLA
K16
G16
R35
A35
L8 1UH/0805/0.5 A
R43 24.9RST
GRCOMP
CRT_HSYNC
CRT_VSYNC
CRT_R
CRT_G
CRT_B
DOT_96M
-DOT_96M
R48 255/6/1
R49 10K
CP17
1 2
GRCOMP
EXP_A_TXP_0 [17]
EXP_A_TXN_0 [17]
EXP_A_TXP_1 [17]
EXP_A_TXN_1 [17]
EXP_A_TXP_2 [17]
EXP_A_TXN_2 [17]
EXP_A_TXP_3 [17]
EXP_A_TXN_3 [17]
DMI_MTP_IRP_0 [10]
DMI_MTN_IRN_0 [10]
DMI_MTP_IRP_1 [10]
DMI_MTN_IRN_1 [10]
DMI_MTP_IRP_2 [10]
DMI_MTN_IRN_2 [10]
DMI_MTP_IRP_3 [10]
DMI_MTN_IRN_3 [10]
CRT_HSYNC [15]
CRT_VSYNC [15]
CRT_R [15]
CRT_G [15]
CRT_B [15]
3VDDCDA [15]
3VDDCCL [15]
DOT_96M [13]
-DOT_96M [13]
V_2P5_MCH
+
CT1
470u/10V/6.3*11.5
VCCA_GPLL_R VCCA_GPLL VCCA_DPLLB VCCA_MPLL
ANALOG FILTERS
V_1P5_PCIEXPRESS
R51 1RST
R52 1RST
C20 106P/0805
C22 106P/0805
C24 106P/0805
C26 106P/0805
H_FSBSEL0 [3,4,13]
H_FSBSEL1 [3,4,13]
H_FSBSEL2 [3,4,13]
C31
106P/0805
C36 106P/08 05
C42
X_106P/0805
V_SM V_SM
V_FSB_VTT
C28
X_104P
H_FSBSEL0
H_FSBSEL1
H_FSBSEL2
2
0
0
0
C21 106P/0805
C23 106P/0805
C25 X_106P/0805
C27 X_106P/0805
C29
104P
RN7
7 8
5 6
3 4
1 2
8P4R-10K
BSEL
0
1
0
0
0
1
1
0
I=45mA
C43
104P
R44
X_2.49K
R47
X_2.49K
R50
X_2.49K
TABLE
PSB FREQUENCY
RESERVED
133 MHZ (533)
200 MHZ (800)
BSEL0
BSEL1
BSEL2
MICRO-STAR INt'L CO., LTD.
MSI
Title
Intel Grantsdale PCI-Exp ress & RBG Signals
Size Document Number Rev
8
7
6
5
4
3
Date: Sheet
2
(MS-7129)
83 3 Saturday, October 16, 2004
1
0A
of
8
7
6
5
4
3
2
1
D D
C C
B B
AR25
AR30
U2D
VSS
VSS
A3
VSS
A5
VSS
A10
VSS
A18
VSS
A26
VSS
A30
VSS
A33
VSS
B2
VSS
B5
VSS
B6
VSS
B7
VSS
B8
VSS
B9
VSS
B10
VSS
B12
VSS
B14
VSS
B16
VSS
B18
VSS
B24
VSS
B28
VSS
C1
VSS
C3
VSS
C4
VSS
C11
VSS
C13
VSS
C17
VSS
C18
VSS
C23
VSS
C35
VSS
D3
VSS
D4
VSS
D6
VSS
D7
VSS
D8
VSS
D9
VSS
D10
VSS
D11
VSS
D15
VSS
D16
VSS
D18
VSS
D23
VSS
D25
VSS
D26
VSS
D28
VSS
D30
VSS
D31
VSS
D32
VSS
E1
VSS
E2
VSS
E4
VSS
E6
VSS
E8
VSS
E10
VSS
E17
VSS
E18
VSS
E23
VSS
E26
VSS
E29
VSS
F2
VSS
F4
VSS
F5
VSS
F6
VSS
F8
VSS
F10
VSS
F16
VSS
F18
VSS
F23
VSS
F25
VSS
F29
VSS
F30
VSS
F32
VSS
F35
VSS
VSS
VSS
G2G4G7
AN1
AP8
AR3
AR6
AR13
AR17
AR21
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
G15
G13
G11
G10G9G8
AL32
AM4
AM6
AM7
AM8
AM29
AM31
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
G27
G26
G23
G20
G19
G17
AK28
AK30
AL10
AL13
AL16
AL19
AL22
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
H13
H10H9H6H5H4H2G28
AK11
AK14
AK17
AK20
AK23
AK25
AK26
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
H27
H25
H24
H21
H32
H30
AJ32
AJ35
AK1
AK4
AK6
AK7
AK8
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
J15
J10J9J8J7J4J2H34
AJ13
AJ15
AJ16
AJ19
AJ22
AJ27
AJ30
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
J16
J23
J20
J18
J17
AH26
AH29
AH32
AH34
AJ4
AJ9
AJ10
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
K11
K10K9K6K5K4K2J30
K14
AH6
AH8
AH11
AH14
AH17
AH20
AH23
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
K32
K31
K28
K26
K24
K20
AG21
AG22
AG25
AG28
AG29
AH1
AH5
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
L8L7L4L2K35
L9
L11
L13
AG5
AG12
AG13
AG15
AG16
AG18
AG19
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
L15
L16
L17
L18
L20
L21
L22
AF31
AF32
AF35
VSS
VSS
VSS
VSS
L24
L27
L30
AF21
AF26
AF29
AF30
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
L32M2M4M5M6M9M17
AF4
AF6
AF8
AF10
AF12
AF15
AF18
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
M20
M24
M25
M27
AE24
AE28
AE30
AE32
AF1
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
M29
M34N2N4N7N8N9N10
AE21
AE23
VSS
VSS
VSS
VSS
AE18
AE20
VSS
VSS
VSS
VSS
N28
AE12
AE14
AE15
AE17
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
N30
N32P2P4P5P6P9P27
AE9
VSS
VSS
AD19
AD22
AD26
AD27
AD34
AE4
AE6
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
AD16
VSS
AD13
VSS
AD11
VSS
AC32
VSS
AC31
VSS
AC29
VSS
AC27
VSS
AB35
VSS
AB32
VSS
AB30
VSS
AB28
VSS
AA27
VSS
AA26
VSS
AA10
VSS
AA9
VSS
AA8
VSS
AA7
VSS
AA6
VSS
AA5
VSS
AA4
VSS
AA3
VSS
AA2
VSS
AA1
VSS
Y34
VSS
Y32
VSS
Y31
VSS
Y29
VSS
Y27
VSS
W32
VSS
W30
VSS
W28
VSS
W19
VSS
W17
VSS
V35
VSS
V27
VSS
V26
VSS
V18
VSS
V9
VSS
V6
VSS
V4
VSS
V2
VSS
V1
VSS
U32
VSS
U31
VSS
U29
VSS
U27
VSS
U19
VSS
U17
VSS
U9
VSS
U8
VSS
U7
VSS
U4
VSS
U2
VSS
T34
VSS
T32
VSS
T30
VSS
T28
VSS
T10
VSS
T7
VSS
T6
VSS
T5
VSS
T4
VSS
T2
VSS
R27
VSS
R26
VSS
R9
VSS
R8
VSS
R7
VSS
R4
VSS
R2
VSS
P35
VSS
P32
VSS
VSS
VSS
VSS
P29
P31
A A
8
7
6
5
4
Grantsdale-G_B1
3
MSI
Title
Size Document Number Rev
Date: Sheet
MICRO-STAR INt'L CO., LTD.
Intel Grantsdale - GND
(MS-7129)
2
93 3 Saturday, October 16, 2004
of
1
0A
8
D D
C C
ICH_PCLK [13]
PCIRST_ICH6# [27]
B B
A A
ATADET0
ATADET0
R74 X_10K
8
VCC3
7
PAR [17,18]
R54 0
ATADET0
PGNT#1
PGNT#2
PGNT#3
AD0
AD1
AD2
AD3
AD4
AD5
AD6
AD7
AD8
AD9
AD10
AD11
AD12
AD13
AD14
AD15
AD16
AD17
AD18
AD19
AD20
AD21
AD22
AD23
AD24
AD25
AD26
AD27
AD28
AD29
AD30
AD31
C_BE#0
C_BE#1
C_BE#2
C_BE#3
PREQ#0
PREQ#1
PREQ#2
PREQ#3
PREQ#4
PREQ#5
AD[0..31] [17,18]
C_BE#[0..3] [17,18]
DEVSEL# [17,18]
FRAME# [17,18]
IRDY# [17,18]
TRDY# [17,18]
STOP# [17,18]
LOCK# [1 7]
SERR# [17,18]
PERR# [17,18]
PCI_PME# [17,18]
PREQ#[0..6] [17, 18]
ATADET0 [23]
PGNT#1 [17]
PGNT#2 [17]
PGNT#3 [18]
PIRQ#A [17,18]
PIRQ#B [17]
PIRQ#C [17]
PIRQ#D [17]
PIRQ#E [17]
PIRQ#F [17]
PIRQ#G [17]
PIRQ#H [17]
SERIRQ [14]
IDE_IRQ [23]
7
AB20
AB16
E2
E5
C2
F5
F3
E9
F2
D6
E6
D3
A2
D2
D5
H3
B4
J5
K2
K5
D4
L6
G3
H4
H2
H5
B3
M6
B2
K6
K3
A5
L1
K4
J6
H6
G4
G2
C3
J3
A3
J2
J1
E1
C5
G5
E3
P6
G6
R2
L5
B5
M5
B8
F7
E8
B7
C1
B6
F1
C8
E7
F6
D8
N2
L2
M1
L3
D9
C7
C6
M3
6
AD0
AD1
AD2
AD3
AD4
AD5
AD6
AD7
AD8
AD9
AD10
AD11
AD12
AD13
AD14
AD15
AD16
AD17
AD18
AD19
AD20
AD21
AD22
AD23
AD24
AD25
AD26
AD27
AD28
AD29
AD30
AD31
C/BE0#
C/BE1#
C/BE2#
C/BE3#
DEVSEL#
FRAME#
IRDY#
TRDY#
STOP#
PAR
PLOCK#
SERR#
PERR#
PME#
PCICLK
PCIRST#
REQ0#
REQ1#
REQ2#
REQ3#
GPI40/REQ4#
GPI1/REQ5#
GPI0/REQ6#
GNT0#
GNT1#
GNT2#
GNT3#
GPO48/GNT4#
GPO17/GNT5#
GPO16/GNT6#
PIRQA#
PIRQB#
PIRQC#
PIRQD#
GPI2/PIRQE#
GPI3/PIRQF#
GPI4/PIRQG#
GPI5/PIRQH#
SERIRQ
IDEIRQ
VSS_0
VSS_1
VSS_2
A1
A12
A15
6
VSS_3
A19
VSS_4
VSS_5
A21
A23
PCI INTERFACE INTERRUPT
PART 1/3
VSS_6
VSS_7
VSS_8
VSS_9
VSS_10
VSS_11
VSS_12
VSS_13
A26A4A7A9AA11
AA13
AA16
AA4
5
ICH 6
VSS_14
VSS_15
VSS_16
VSS_17
VSS_18
VSS_19
VSS_20
AB1
AB10
AB19
AB2
AB7
AB9
AC10
5
4
U3A
AF23
A20M#
AE27
CPUSLP#
AF24
FERR#
AG26
IGNNE#
AF27
INIT#
AE22
INIT3_3V#
AG24
INTR
AF25
NMI
AG27
SMI#
AE26
STPCLK#
AD23
CPU LAN PCI EXPRESS DIRECT MEDIA
VSS_21
VSS_22
VSS_23
VSS_24
VSS_25
VSS_26
VSS_27
VSS_28
VSS_29
VSS_30
VSS_31
VSS_32
VSS_33
VSS_34
AC12
AC22
AC23
AC24
AC26
AC3
AC6
AD1
AD10
AD15
AD18
AD2
AD24
AD6
AE10
RCIN#
A20GATE
THRMTRIP#
GPO49/CPUPWRGD
PLTRST#
PERN_1
PERP_1
PETN_1
PETP_1
PERN_2
PERP_2
PETN_2
PETP_2
PERN_3
PERP_3
PETN_3
PETP_3
PERN_4
PERP_4
PETN_4
PETP_4
DMI_0RXN
DMI_0RXP
DMI_0TXN
DMI_0TXP
DMI_1RXN
DMI_1RXP
DMI_1TXN
DMI_1TXP
DMI_2RXN
DMI_2RXP
DMI_2TXN
DMI_2TXP
DMI_3RXN
DMI_3RXP
DMI_3TXN
DMI_3TXP
DMI_CLKN
DMI_CLKP
DMI_ZCOMP
DMI_IRCOMP
LAN_CLK
LAN_RSTSYNC
LAN_RXD0
LAN_RXD1
LAN_RXD2
LAN_TXD0
LAN_TXD1
LAN_TXD2
EE_CS
EE_DIN
EE_DOUT
EE_SHCLK
VSS_35
VSS_36
VSS_37
VSS_38
VSS_39
VSS_40
AE11
AE12
AE2
AE21
AE25
4
ICH6_NHS
AF22
AE23
AG25
R5
H25
H24
G27
G26
K25
K24
J27
J26
M25
M24
L27
L26
P24
P23
N27
N26
T25
T24
R27
R26
V25
V24
U27
U26
Y25
Y24
W27
W26
AB24
AB23
AA27
AA26
AD25
AC25
DMI_BIAS
F24
F23
PLACE THE RESISTOR WHIN 500MILS
F12
B11
E12
E11
C13
C12
C11
E13
D12
F13
D11
B12
3
H_A20M# [3]
H_SLP# [3]
H_FERR# [3,4]
H_IGNNE# [3]
H_INIT# [3]
FWH_INIT# [13]
H_INTR [3]
H_NMI [3]
ICH_H_SMI# [3,14]
H_STPCLK# [3]
KBRST# [14]
A20GATE [14 ]
TRMTRIP# [3,4]
H_PWRGD [3,4]
R53 22/0402
ICHPETN_1 ICH_PETN_1
ICHPETP_1
C44 104P
C45 104P
R55 24.9RST
3
ICH_PERN_1
ICH_PERP_1
ICH_PETP_1
DMI_MTN_IRN_0 [8]
DMI_MTP_IRP_0 [8]
DMI_ITN_MRN_0 [8]
DMI_ITP_MRP_0 [8]
DMI_MTN_IRN_1 [8]
DMI_MTP_IRP_1 [8]
DMI_ITN_MRN_1 [8]
DMI_ITP_MRP_1 [8]
DMI_MTN_IRN_2 [8]
DMI_MTP_IRP_2 [8]
DMI_ITN_MRN_2 [8]
DMI_ITP_MRP_2 [8]
DMI_MTN_IRN_3 [8]
DMI_MTP_IRP_3 [8]
DMI_ITN_MRN_3 [8]
DMI_ITP_MRP_3 [8]
CK_PE_100M_ICH# [13]
CK_PE_100M_ICH [13]
V_1P5_CORE
Title
Size Document Number Rev
Date: Sheet
2
PLTRST# [6]
ICH_PERN_1 [17]
ICH_PERP_1 [17]
ICH_PETN_1 [17]
ICH_PETP_1 [17]
MSI
MICRO-STAR INt'L CO., LTD.
Intel ICH6 - PCI & DMI & CPU & IRQ
(MS-7129)
2
1
VCC3
CB1 X_104P
CB2 X_104P
CB3 X_104P
CB4 104P
PLACE 1 EACH NEAR A3 & F1
PLACE REMAINDER ANUWHERE
XX3
XX3
E31-0401020-T29
of
10 33 Saturday, October 16, 2004
1
XX4
XX4
U26
XX1
XX2
XX1
XX2
0A